94853 Commits

Author SHA1 Message Date
Kenneth Graunke
47482090ea meta: Initialize depth/clear values on declaration.
This helps avoid compiler warningss in the next commit - everything
was initialized, but it wasn't obvious to static analysis.

Suggested-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit d6d16c0218)
2017-12-08 18:27:00 +00:00
Gert Wollny
b3b08d534c r600/sb: do not convert if-blocks that contain indirect array access
If an array is accessed within an if block, then currently it is not known
whether the value in the address register is involved in the evaluation of the
if condition, and converting the if condition may actually result in
out-of-bounds array access. Consequently, if blocks that contain indirect array
access should not be converted.

Fixes piglits on r600/BARTS:
spec/glsl-1.10/execution/variable-indexing/
  vs-output-array-float-index-wr
  vs-output-array-vec3-index-wr
  vs-output-array-vec4-index-wr

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104143

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 6c268ea79a)
2017-12-08 18:27:00 +00:00
Emil Velikov
76b54923c0 cherry-ignore: radeonsi: allow DMABUF exports for local buffers
Commit depends on at least 8b3a257851, which did not land in branch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-12-08 18:27:00 +00:00
Marek Olšák
4d0ec672cb radeonsi: flush the context after resource_copy_region for buffer exports
Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 5e805cc74b)
[Emil Velikov: s/si_texture_disable_dcc/r600_texture_disable_dcc/]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/drivers/radeon/r600_texture.c
2017-12-08 18:27:00 +00:00
Jason Ekstrand
b50154eff7 i965: Disable regular fast-clears (CCS_D) on gen9+
This partially reverts commit 3e57e9494c
which caused a bunch of GPU hangs on several Source titles.  To date, we
have no clue why these hangs are actually happening.  This undoes the
final effect of 3e57e9494c and gets us back to not hanging.  Tested
with Team Fortress 2.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435
Fixes: 3e57e9494c
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ee57b15ec7)
2017-12-08 18:27:00 +00:00
Marek Olšák
a995d6bb78 radeonsi/gfx9: fix importing shared textures with DCC
VI has 11 dwords at least. GFX9 has 10 dwords.

Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit ed4780383c)
[Emil Velikov: s|radeon/r600_texture.c|radeonsi/si_state.c|]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/drivers/radeon/r600_texture.c
2017-12-08 17:30:34 +00:00
Marek Olšák
e893ae4d9d radeonsi: fix layered DCC fast clear
Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 6863651bbd)
2017-12-08 17:30:34 +00:00
Dave Airlie
de438f1569 r600/sb: handle jump after target to end of program. (v2)
This fixes hangs on cayman with
tests/spec/arb_tessellation_shader/execution/trivial-tess-gs_no-gs-inputs.shader_test

This has a single if/else in it, and when this peephole activated,
it would set the jump target to NULL if there was no instruction
after the final POP. This adds a NOP if we get a jump in this case,
and seems to fix the hangs, so we have a valid target for the ELSE
instruction to go to, instead of 0 (which causes infinite loops).

v2: update last_cf correctly. (I had some other patches hide this)

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 579ec9c311)
2017-12-08 17:30:34 +00:00
Ben Crocker
ab5585ff9f docs/llvmpipe.html: Minor edits
Language and spelling fixups in three places.

Cc: "17.2" "17.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

[Eric: move two fixes from the other patch to this one.]
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit b43daf7bf6)
2017-12-08 17:30:34 +00:00
Kai Wasserbäch
b25baea79d docs: Point to apt.llvm.org for development snapshot packages
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit d25123e23a)
2017-12-08 17:30:34 +00:00
Tapani Pälli
4f97100a97 mesa/gles: adjust internal format in glTexSubImage2D error checks
When floating point textures are created on OpenGL ES 2.0, driver
is free to choose used internal format. Mesa makes this decision in
adjust_for_oes_float_texture. Error checking for glTexImage2D properly
checks that sized formats are not used. We use same error checking
path for glTexSubImage2D (since there is lot of overlap), however since
those checks include internalFormat checks, we need to pass original
internalFormat passed by the client. Patch adds oes_float_internal_format
that does reverse adjust_for_oes_float_texture to get that format.

Fixes following test failure:
   ES2-CTS.gtf.GL2ExtensionTests.texture_float.texture_float

(when running test with MESA_GLES_VERSION_OVERRIDE=2.0)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103227
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 1e508e10d9)
2017-12-08 17:30:34 +00:00
Emil Velikov
779a028fbc gl_table.py: add extern C guard for the generated glapitable.h
The header can be included from C++, hence contents should have
appropriate notation.

Cc: mesa-stable@lists.freedesktop.org
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit c7616ac069)
2017-12-08 17:30:34 +00:00
Gert Wollny
c2ff8e3e5d r600: Emit EOP for more CF instruction types
So far on pre-cayman chipsets the CF instructions CF_OP_LOOP_END,
CF_OP_CALL_FS, CF_OP_POP, and CF_OP_GDS an extra CF_NOP instruction
was added to add the EOP flag, even though this is not actually
needed, because all these instrutions support the EOP flag.

This patch removes the fixup code, adds setting the EOP flag for the
according instructions as well as others like CF_OP_TEX and CF_OP_VTX,
and adds writing out EOP for this type of instruction in the disassembler.

This also fixes a bug where shaders were created that didn't actually have
the EOP flag set in the last CF instruction, which might have resulted
in GPU lockups.

[airlied: cleaned up a little]
Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 1d076aafbc)
2017-12-08 17:30:34 +00:00
Ilia Mirkin
a8a5a97f46 glsl: fix derived cs variables
There are two issues with the current implementation. First, it relies
on the layout(local_size_*) happening in the same shader as the main
function, and secondly it doesn't work for variable group sizes.

In both cases, the simplest fix is to move the setup of these derived
values to a later time, similar to how the gl_VertexID workarounds are
done. There already exist system values defined for both of the derived
values, so we use them unconditionally, and lower them after linking is
performed.

While we're at it, we move to using gl_LocalGroupSizeARB instead of
gl_WorkGroupSize for variable group sizes.

Also the dead code elimination avoidance can be removed, since there
can be situations where gl_LocalGroupSizeARB is needed but has not been
inserted for the shader with main function. As a result, the lowering
code has to insert its own copies of the system values if needed.

Reported-by: Stephane Chevigny <stephane.chevigny@polymtl.ca>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103393
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 4d24a7cb97)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/compiler/glsl/meson.build
2017-12-08 17:30:34 +00:00
Andres Gomez
b9b60dbf55 docs: remove bug 103626 from fix list as per 17.2.6
Bug https://bugs.freedesktop.org/show_bug.cgi?id=103626 was
incorrectly listed as fixed.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-26 02:15:43 +02:00
Andres Gomez
93c2beafc0 docs: add sha256 checksums for 17.2.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-26 01:40:36 +02:00
Andres Gomez
00b52f8e99 docs: add release notes for 17.2.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
mesa-17.2.6
2017-11-26 01:32:53 +02:00
Andres Gomez
6f34ba40f3 Update version to 17.2.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-26 01:26:34 +02:00
Andres Gomez
9888913a57 cherry-ignore: Revert "intel/fs: Use a pure vertical stride for large register strides"
extra: The commit just references a proper fix that has already
landed.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
a231bbd639 cherry-ignore: egl: pass the dri2_dpy to the $plat_teardown functions
fixes: This commit makes reference to 2 other commits but none have
made it to the 17.2 queue.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
f6d3eed513 cherry-ignore: glsl: Fix typo fragement -> fragment
fixes: This commit is only a typo correction on an error message.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
ba0f965771 cherry-ignore: added 17.3 nominations.
stable: 17.3 nominations only.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
8cd5bd2a8a cherry-ignore: i965: Mark BOs as external when we export their handle
stable: These commits addressed earlier commit 2c4097aff1 which did
not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
807da6e270 cherry-ignore: anv/cmd_buffer: Take bo_offset into account in fast clear state addresses
stable: This commit addressed earlier commit a62a979335 which did
not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
c9325693f1 cherry-ignore: anv/cmd_buffer: Advance the address when initializing clear colors
stable: This commit depends on earlier commit 3735af0415 which did
not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:24 +02:00
Andres Gomez
1519933ce2 cherry-ignore: r600/shader: reserve first register of vertex shader.
stable: This commit addressed earlier commit ea1b97714d which did
not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:23 +02:00
Andres Gomez
d255b77237 cherry-ignore: intel/fs: refactors
stable: These commits are refactorings rather than fixes.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:23 +02:00
Andres Gomez
96be105d41 cherry-ignore: intel/fs: Use the original destination region for int MUL lowering
stable: These commits resulted in a CTS regression being addressed at
https://bugs.freedesktop.org/show_bug.cgi?id=103626 .

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:23 +02:00
Andres Gomez
010751e95d cherry-ignore: intel/nir: Use the correct indirect lowering masks in link_shaders
stable: These commits addressed earlier commit 379b24a40d which did
not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:23 +02:00
Andres Gomez
f562d93049 cherry-ignore: intel/fs: Use a pure vertical stride for large register strides
stable: This commit is not really needed after 6ac2d16901.

Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-11-22 18:41:23 +02:00
Nicolai Hähnle
49277c6e36 ddebug: fix use-after-free of streamout targets
Fixes: b47727a83a ("ddebug: implement pipelined hang detection mode")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 16f8da2997)
2017-11-22 18:41:23 +02:00
George Barrett
ae629ca805 glsl: Catch subscripted calls to undeclared subroutines
generate_array_index fails to check whether the target of a subroutine
call exists in the AST, potentially passing around null ir_rvalue
pointers eventuating in abort/segfault.

Fixes: fd01840c0b ("glsl: add AoA support to subroutines")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100438
(cherry picked from commit f09c2cefdd)
2017-11-22 18:41:23 +02:00
Kenneth Graunke
a445658178 i965: Upload invariant state once at the start of the batch on Gen4-5.
We want to emit invariant state at the start of a render batch.  In the
past, this more or less happened: a new batch flagged BRW_NEW_CONTEXT
(because we don't have hardware contexts), which triggered the
brw_invariant_state atom.  So, it would be emitted before any 3D
drawing.  (Technically, there might be some BLT commands in the batch
because Gen4-5 have a single combined render/BLT ring, but that should
be harmless).

With the advent of BLORP, this broke.  The first item in a batch might
be a BLORP operation, which bypasses the normal draw upload path.  So,
we need to ensure invariant state happens first.  To do that, we just
upload it when creating a new batch.  On Gen6+ we'd need to worry about
whether it's a RENDER or BLT batch, but because we have a combined ring,
this approach should work fine on Gen4-5.

Seems to fix GPU hangs when playing hardware accelerated video with
mpv -hwdec=vaapi on Ironlake.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103529
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 8f91aa35a5)
2017-11-22 18:41:23 +02:00
Derek Foreman
0d02e91c2c egl/wayland: Add a fallback when fourcc query isn't supported
When queryImage doesn't support __DRI_IMAGE_ATTRIB_FOURCC wayland clients
will die with a NULL derefence in wl_proxy_add_listener.

Attempt to provide a simple fallback to keep ancient systems working.

Fixes: 6595c69951 ("egl/wayland: Remove more surface specifics from
create_wl_buffer")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103519
Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 0db36caa19)

Squashed with:

egl: fix var type

queryImage() takes an `int*`; compiler is warning about the
signed<->unsigned pointer mismatch.

Fixes: 0db36caa19 "egl/wayland: Add a fallback when fourcc
       query isn't supported"
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Derek Foreman <derekf@osg.samsung.com>
(cherry picked from commit ca95d7ad4e)
2017-11-22 18:41:23 +02:00
Kenneth Graunke
f288607eb7 i965: Implement another VF cache invalidate workaround on Gen8+.
...and provide a better citation for the existing one.

v2:
- Apply the workaround to Gen8 too, as intended (caught by Topi).
- Restructure to add bits instead of an extra flush (based on a similar
  patch by Rafael Antognolli).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
(cherry picked from commit 8d48671492)
[Andres Gomez: brw->gen not yet dropped in favor of devinfo->gen]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_pipe_control.c

Squashed with:

i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.

This apparently causes hangs on Broadwell, so let's back it out for now.
I think there are other PIPE_CONTROL workarounds that we're missing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103787
(cherry picked from commit a01ba366e0)
[Andres Gomez: brw->gen not yet dropped in favor of devinfo->gen]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_pipe_control.c
2017-11-22 18:41:18 +02:00
Matt Turner
b3410696e0 i965/fs: Split all 32->64-bit MOVs on CHV, BXT, GLK
Fixes the following tests on CHV, BXT, and GLK:
    KHR-GL46.shader_ballot_tests.ShaderBallotFunctionBallot
    dEQP-VK.spirv_assembly.instruction.compute.uconvert.uint32_to_int64
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103115

(cherry picked from commit cfcfa0b9cd)
2017-11-21 18:16:46 +02:00
Matt Turner
70b1c115b8 i965/fs: Fix extract_i8/u8 to a 64-bit destination
The MOV instruction can extract bytes to words/double words, and
words/double words to quadwords, but not byte to quadwords.

For unsigned byte to quadword, we can read them as words and AND off the
high byte and extract to quadword in one instruction. For signed bytes,
we need to first sign extend to word and the sign extend that word to a
quadword.

Fixes the following test on CHV, BXT, and GLK:
   KHR-GL46.shader_ballot_tests.ShaderBallotBitmasks
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103628
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

(cherry picked from commit 6ac2d16901)
2017-11-21 18:16:46 +02:00
Anuj Phogat
82876e24c4 i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DW
Number of dwords in MI_FLUSH_DW changed from 4 to 5 in gen8+.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1dc45d75bb)
[Andres Gomez: brw->gen not yet dropped in favor of devinfo->gen]
Signed-off-by: Andres Gomez <agomez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_pipe_control.c
	src/mesa/drivers/dri/i965/intel_blit.c
2017-11-21 18:16:46 +02:00
Anuj Phogat
653a203937 i965: Program DWord Length in MI_FLUSH_DW
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6165fda59b)

Squashed with:

i965: Remove DWord length from MI_FLUSH_DW definition

Fixes: 6165fda59b ("i965: Program DWord Length in MI_FLUSH_DW")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 822fd2341d)
2017-11-21 18:16:46 +02:00
Tim Rowley
8edbc8f109 swr/rast: Faster emulated simd16 permute
Speed up simd16 frontend (default) on avx/avx2 platforms;
fixes performance regression caused by switch to simdlib.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit d8489517a5)
2017-11-21 18:16:46 +02:00
Tim Rowley
0f4dfee254 swr/rast: Use gather instruction for i32gather_ps on simd16/avx512
Speed up avx512 platforms; fixes performance regression caused
by swithc to simdlib.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 439904847e)
2017-11-21 18:16:46 +02:00
Bas Nieuwenhuizen
256733683b radv: Free temporary syncobj after waiting on it.
Otherwise we leak it.

Fixes: eaa56eab6d "radv: initial support for shared semaphores (v2)"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 7c25578863)
2017-11-21 18:16:46 +02:00
Bas Nieuwenhuizen
75efb540e2 radv: Free syncobj with multiple imports.
Otherwise we can leak the old syncobj.

Fixes: eaa56eab6d "radv: initial support for shared semaphores (v2)"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 917d3b43f2)
2017-11-21 18:16:46 +02:00
Jason Ekstrand
179acf6579 i965: Add stencil buffers to cache set regardless of stencil texturing
We may access them as a texture using blorp regardless of whether or not
stencil texturing is enabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 6830ba0d3b)
2017-11-21 18:16:46 +02:00
Dave Airlie
84f765ce25 r600: fix isoline tess factor component swapping.
As per radeonsi, the tess factor components for isolines
are reversed.

Fixes: tests/spec/arb_tessellation_shader/execution/isoline.shader_test
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f3f8615d76)
2017-11-21 18:16:46 +02:00
Kenneth Graunke
0465cfe0b0 intel/tools: Fix detection of enabled shader stages.
We renamed "Function Enable" to "Enable", which broke our detection
of whether shaders are enabled or not.  So, we'd see a bunch of HS/DS
packets with program offsets of 0, and think that was a valid TCS/TES.

Fixes: c032cae9ff (genxml: Rename "Function Enable" to "Enable".)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 9a0465b3a3)
2017-11-21 18:16:46 +02:00
Kenneth Graunke
9229774b86 i965: Make L3 configuration atom listen for TCS/TES program updates.
The L3 configuration code already considers the TCS and TES programs,
but failed to listen for TCS/TES program changes.

This was somehow missing.

Fixes: e9644cb1f9 ("i965: Consider tessellation in get_pipeline_state_l3_weights.")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit b8d42cccd0)
2017-11-21 18:16:45 +02:00
Dylan Baker
f5e82045ca autotools: Set C++ visibility flags on Intel
These flags are set for C sources, but not C++. This causes symbol
visibility leaks from the C++ parts of the Intel compiler.

Fixes: 700bebb958 ("i965: Move the back-end compiler to src/intel/compiler")
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 854455498c)
2017-11-21 18:16:45 +02:00
Adam Jackson
167f50ae68 glx/dri3: Fix passing renderType into glXCreateContext
Without this, trying to create a GLX_RGBA_FLOAT_TYPE_ARB context would
fail, because GLX_RGBA_TYPE would be a mismatch with the fbconfig.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit 257edb5b9a)
2017-11-21 18:16:45 +02:00
Adam Jackson
d53558fd67 glx/drisw: Fix glXMakeCurrent(dpy, None, ctx)
This is perfectly legal in GL 3.0+.

Fixes piglit/glx-create-context-current-no-framebuffer.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit 033cfb17db)
2017-11-21 18:16:45 +02:00