1040 Commits

Author SHA1 Message Date
Chad Versace
eb16ec715f turnip: Use vk_errorf() for initialization error messages
This small cleanup better prepares turnip for VK_EXT_debug_report.
2019-03-11 10:01:33 -07:00
Chad Versace
1372c95ad2 turnip: Add TODO for Android logging 2019-03-11 10:01:33 -07:00
Chad Versace
cca208a033 turnip: Require DRM device version >= 1.3
Because the driver will require support for iova.
2019-03-11 10:01:33 -07:00
Chad Versace
5486943ed9 turnip: Fix indentation 2019-03-11 10:01:33 -07:00
Chad Versace
99a5de14cb turnip: Fix a real -Wmaybe-uninitialized 2019-03-11 10:01:33 -07:00
Chad Versace
75f2c8458b turnip: Use vk_outarray in all relevant public functions 2019-03-11 10:01:33 -07:00
Chad Versace
3ec87d56bd turnip: Fix result of vkEnumerate*ExtensionProperties
Given an unsupported layer name, the functions must return
VK_ERROR_LAYER_NOT_PRESENT.
2019-03-11 10:01:33 -07:00
Chad Versace
ee835c7790 turnip: Fix result of vkEnumerate*LayerProperties
The functions must not return VK_ERROR_LAYER_NOT_PRESENT. The spec
reserves that error for vkEnumerate*ExtensionProperties.
2019-03-11 10:01:33 -07:00
Chad Versace
daffb01704 turnip: Fix indentation in function signatures
Due to s/anv/tu/, in many function signatures the indentation of
parameters was off-by-one.
2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
b4f3e0d549 turnip: Disable more features. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
a01edd9c86 turnip: Initialize memory type in requirements. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
7be2e1fc37 turnip: Cargo cult the Intel heap size functionality. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
462b693d94 turnip: Report a memory type and heap. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
8e52e8183c turnip: Add buffer allocation & mapping support. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
a0d62e4337 turnip: Fix newly introduced warning. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
bcd15ab34e turnip: Remove abort. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
13ff7ffbcb turnip: Gather some device info. 2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
7922d50bd4 turnip: Fix up detection of device. 2019-03-11 10:01:33 -07:00
Chad Versace
c63cb15745 turnip: Drop Makefile.am and Android.mk
The Makefile.am doesn't work. I tried fixing it but gave up because
I don't understand Autotools. I strongly suspect the Android.mk also
doesn't work.

Rather than maintain the broken build files, let's delete them and
re-add working build files if-and-when we need them. (Maybe we'll be
lucky and turnip will never need to support Autotools!).
2019-03-11 10:01:33 -07:00
Bas Nieuwenhuizen
26380b3a9f turnip: Add driver skeleton (v2)
meson files have been updated, autotools and android still need
updating.

Only build tested.

v2 (chadv):
  - Rebase onto master.
  - Fix build breakage in Python scripts.
  - Drop the WSI code. The internal WSI apis have changed recently, and
    will likely change again before the driver goes upstream. To avoid
    unnecessary rebase work, let's drop the WSI code and re-add it when
    we're ready to really use WSI.

(olv, after rebase) do not enable freedreno by default on ARM
2019-03-11 10:01:15 -07:00
Rob Clark
ad25948261 freedreno/ir3: turn on [iu]mul_high
Which also requires uadd_carry lowering

Until recently this was lowered in glsl ir so it went unnoticed that we
weren't lowering it.

Fixes: 1d8994a63b glsl: [u/i]mulExtended optimization for GLSL
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-08 18:44:57 -05:00
Rob Clark
00f838fa73 freedreno/ir3: track register pressure in sched
Not a perfect solution, and the "pressure" target is hard-coded.  But it
doesn't really seem to much in the common case, and avoids exploding
register usage in dEQP ssbo tests.

So this should serve as a stop-gap solution until I have time to re-
write the scheduler.

Hurts slightly in instruction count, but gains (reduces) slightly the
register usage in shader-db.  Fixes ~150 dEQP-GLES31.functional.ssbo.*
that were failing due to RA fail.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-03 13:27:50 -05:00
Rob Clark
8a5f2d9444 freedreno/ir3: add Sethi–Ullman numbering pass
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-03 13:27:50 -05:00
Rob Clark
c8e351ee3a freedreno/ir3: include nopN in expanded instruction count
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-03 13:27:50 -05:00
Kristian H. Kristensen
87c2e8cbc9 freedreno: Fix a couple of warnings
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2019-02-28 10:43:53 -08:00
Rob Clark
64206102fc freedreno/ir3: gsampler2DMSArray fixes
Array index should come before sample-id.  And exclude all isam variants
(which take integer texel coords) from adding of offset.

Fixes dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_*_2d_array

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-26 13:19:44 -05:00
Rob Clark
a06bb486b0 freedreno/ir3/a6xx: fix atomic shader outputs
We also need to put in the output mov.  Possibly we could just fixup the
output register to read it directly from the dummy, but that is more
work and I guess dEQP is probably the only time you encounter this.

Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.atomic_counter.const_literal_fragment

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-26 13:19:44 -05:00
Rob Clark
db1fa21374 freedreno/a6xx: vertex_id is not _zero_based
Fixes dEQP-GLES31.functional.draw_base_vertex.draw_elements_base_vertex.builtin_variable.vertex_id

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-26 13:19:44 -05:00
Rob Clark
cabe55a2e7 freedreno/ir3/a6xx: fix non-ssa atomic dst
We weren't propagating the array info for cases where result of atomic
is array/reg.  This can happen, for example, if result is part of a phi
web lowered to regs.

Fixes dEQP-GLES31.functional.ssbo.atomic.compswap.*

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-26 13:19:44 -05:00
Rob Clark
cb884d8ab2 freedreno/ir3: use nopN encoding when possible
Use the (nopN) encoding for slightly denser shaders.. this lets us fold
nop instructions into the previous alu instruction in certain cases.

Shouldn't change the # of cycles a shader takes to execute, but reduces
the size.  (ex: glmark2 refract goes from 168 to 116 instructions)

Currently only enabled for a6xx, but I think we could enable this for
a5xx and possibly a4xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-26 13:19:44 -05:00
Rob Clark
f90c3b4485 freedreno/a6xx: fix border-color offset
Fixes nearly all of dEQP-GLES31.functional.texture.border_clamp.* when
run after a test that binds textures used in vertex shader.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-22 14:05:32 -05:00
Rob Clark
bdedb8277a freedreno/ir3: don't hardcode wrmask
Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.vertex.samplercubeshadow
and few other similar tests that do multiple texture fetches into
individual components of a packet output.  Mostly works around the
issue mentioned in ra_block_find_definers().

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-22 14:05:32 -05:00
Rob Clark
908d5ee9eb freedreno/a6xx: enable tiled images
Turns out we can write to tiled images as well as read.  This avoids
having to linearize or do the tiling in the shader.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-21 09:06:06 -05:00
Rob Clark
323958908e freedreno/a6xx: samplerBuffer fixes
Use the 'UNK31' bit (which should probably be called 'BUFFER') for
samplerBuffer case, which increases the size of supported buffer
texture beyond 2^15 elements.

Also need to fix the 2nd coord injected to handle the tex instructions
that take integer coords.

Fixes dEQP-GLES31.functional.texture.texture_buffer.render.as_fragment_texture.buffer_size_131071
and similar

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
50dd773a2d freedreno/ir3/a6xx: use ldib for ssbo reads
... instead of isam.  It seems like when using isam, plus atomics, we
can have the problem of old data being in the texture cache.  Plus this
way we don't have to load a component at a time.

Note that blob still seems to use isam in some cases.  I suppose it might
be preferable in the case of loading a single component, when atomics
are not in the picture (or that the ssbo does not need to otherwise be
coherent).

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
c543a2cf6f freedreno/ir3: sync instr/disasm and add ldib encoding
Resync disasm and instr header from envytools, and add ldib encoding.
This replaces an opcode from a3xx which was never seen in practice,
since that seemed easier than dealing with the same opc # meaning a
different thing on a6xx.  (Not really sure if 'sti' was actually a
real thing, I think it was only seen in fuzzing.)

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
cadf6def0c freedreno/ir3/a6xx: fix load_ssbo barrier type.
Silly copy/pasta bug, since load_image is actually the same instruction
but different barrier class.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
0df0fc28a5 freedreno/ir3: rename put_dst()
This was overlooked when it moved to ir3_context.c and ceased to be
static..

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
7fe9e790e7 freedreno: fix crash w/ masked non-SSA dst
Fixes
dEQP-GLES3.functional.shaders.indexing.varying_array.vec3_dynamic_write_dynamic_loop_read
regression.

Fixes: c1a27ba9ba freedreno/ir3: HIGH reg w/a for a6xx
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
97479df8aa freedreno/ir3: fix crash in compile fail case
The variant will be NULL if RA failed.  Which isn't ideal, but at least
lets not segfault and bring down the rest of the dEQP run with us.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Rob Clark
f5ee8c54ed freedreno/ir3: fix legalize for vecN inputs
The wrmask is handled in regmask_get()/regmask_set(), but it wasn't
being propagated from SSA src to dst.  So for example, an SSBO read
value that is passed in as src2.y component to atomic op, wasn't
getting the (sy) flag set.  Causing lots of fail.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-20 18:50:08 -05:00
Kristian H. Kristensen
e827ea8c83 freedreno: Update headers
Add support for multisampled sources for the blitter.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2019-02-20 08:56:21 -08:00
Rob Clark
d6c43cceff freedreno/ir3: handle quirky atomic dst for a6xx
The new encoding returns a value via the 2nd src.  The legalize pass
needs to be aware of this to set the correct needs_sy flag, otherwise we
can, in cases where the atomic dst is not used, overwrite the register
that hardware will asynchronously load result into without (sy) flag, so
it gets clobbered by the atomic result.

This fixes a whole lot of rando ssbo+atomic fails, like
dEQP-GLES31.functional.ssbo.layout.single_basic_type.packed.highp_vec4.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-18 12:01:36 -05:00
Rob Clark
c1a27ba9ba freedreno/ir3: HIGH reg w/a for a6xx
It seems like some instructions (noticed this w/ cat3), cannot read HIGH
regs.. cat1 (mov/cov) can, and possibly some/all of cat2.

The blob seems to stick w/ an extra mov into low regs.  So lets do the
same.

This fixes WGID on a6xx, which unsurprisingly is related to a lot of
deqp compute fails.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:28:00 -05:00
Rob Clark
947848524d freedreno/ir3: add a6xx+ SSBO/image support
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:28:00 -05:00
Rob Clark
b46d5b8a84 freedreno/ir3: add a6xx instruction encoding
For the handful of instructions that use a new encoding.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:27:59 -05:00
Rob Clark
2e0ea3f09c freedreno/ir3: add image/ssbo <-> ibo/tex mapping
Images and SSBOs don't map directly to the hw.  They end up being part
texture and part something else.  Starting with a6xx, the hack used for
a5xx to smash the image tex state into hw texture state starting from
MAX counting down won't work, because we start using tex state also for
SSBO read.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:27:59 -05:00
Rob Clark
75f3a5245e freedreno/ir3: fix ncomp for _store_image() src
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:27:59 -05:00
Rob Clark
feee3050d3 freedreno/ir3: split out a4xx+ instructions
Note that image/ssbo support is currently only implemented for a5xx.
But the instruction encoding is the same for a4xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:27:59 -05:00
Rob Clark
42af0640f6 freedreno/ir3: split out image helpers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-02-16 16:27:59 -05:00