127412 Commits

Author SHA1 Message Date
Michel Dänzer
9f3d7d54d8 iris/bufmgr: Handle NULL bufmgr in iris_bufmgr_get_for_fd
iris_bufmgr_create can return NULL, in which case we'd crash in
list_addtail.

Reported by Coverity/clang (for i965, but iris code looks the same).

Fixes: 7557f16059 ("iris: share buffer managers accross screens")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7335>
(cherry picked from commit 1eda842318)
2020-11-19 10:47:37 -08:00
Michel Dänzer
436592d1f4 i965/bufmgr: Handle NULL bufmgr in brw_bufmgr_get_for_fd
brw_bufmgr_create can return NULL, in which case we'd crash in
list_addtail.

Reported by Coverity/clang.

Fixes: 4094558e86 ("i965: share buffer managers across screens")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7335>
(cherry picked from commit eb61f8959e)
2020-11-19 10:47:37 -08:00
Timothy Arceri
f06c466895 glsl: add extra pp tokens workaround and enable for CoR
The CTS now tests to make sure these are not allowed. However, previously
drivers (including Mesa) would allow them to exist and just issue a
warning. Some old applications such as Champions of Regnum seem to
depend on this.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/422

Fixes: 43047384c3 ("glsl/glcpp: Promote "extra token at end of directive" from warning to error")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7361>
(cherry picked from commit a09717c4de)

Conflicts:
	src/gallium/auxiliary/pipe-loader/driinfo_gallium.h
	src/mesa/drivers/dri/i965/intel_screen.c
2020-11-19 10:47:37 -08:00
Dylan Baker
889f43c3f1 .pick_status.json: Update to 87dc3106b0 2020-11-19 10:47:37 -08:00
Krunal Patel
46415c169d radeon/vcn: Bitrate not updated when changing framerate
Issue: Encoding parameters not updated after changing FrameRate

Root Cause:
In radeon_enc_begin_frame, there is a parameter need_rate_control
which was enabled only if the bitrate is changed. Due to this the
radeon_enc_rc_layer_init was not updating the encoder parameters with new
framerate, peak_bits_per_picture_integer and avg_target_bits_per_picture

Fix:
Added the condition where we will check if there is a change in
other parameters and enable rate control. Eventually updating the
encoder parameters with new framerate and bitrate.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Boyuan Zhang boyuan.zhang@amd.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7363>
(cherry picked from commit 4143572f93)
2020-11-19 10:47:37 -08:00
Krunal Patel
cef988c3cf gallium/auxiliary/vl: Odd Dimensions are failing
Issue: While running the tast for odd resolutions there are green lines
observed in the dumped image. The resolution is 321x241, the extra 1 pixel
data is missing in the image. The reason for this is in the post
processing when we adjust the size of height and width we are
dividing it by 2.

Fix: To resolve this issue we first need to align it to 2 and then divide
by 2 to get the required values. Once we do this we will have proper data
in the dumped image and missing pixel data will be available.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit d78e7b7aee)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7282>
2020-11-19 10:47:37 -08:00
Bas Nieuwenhuizen
fa905a29d0 radv: Add ETC2 support on RAVEN2.
I did a whole bunch of validation and it essentially works.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 8531830038)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7282>
2020-11-19 10:47:37 -08:00
Louis Li
8b6ef5568a radeon/radeon_vce: fix out of target bitrate in CBR mode (H.264)
StoneyRidge may not comply to required target bitrate
when generating H.264 stream in CBR mode.

Signed-off-by: Louis Li <Ching-shih.Li@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit f7e7cf637e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7282>
2020-11-19 10:47:37 -08:00
Woody Chow
bb6f48a54c st/mesa: Fix EGLImageTargetTexture2D for GL_TEXTURE_2D
Before this change, internalFormat was defaulted to GL_RGBA (
unsized internal format). Therefore, subsequent glTexSubImage2D
call with type != GL_UNSIGNED_BYTE, GL_UNSIGNED_SHORT_4_4_4_4 or
GL_UNSIGNED_SHORT_5_5_5_1 would give GL_INVALID_OPERATION.

This fixes

android.graphics.cts.BitmapColorSpaceTest#test16bitHardware
android.graphics.cts.ImageDecoderTest#testDecodeBitmap*
android.graphics.cts.BitmapTest#testNdkFormatsHardware

in CtsGraphicsTestCases

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6382>
(cherry picked from commit 5e4d69ec78)
2020-11-19 10:47:37 -08:00
Gert Wollny
1c40db5dc4 r600: revert disabling llvm draw
Now that llvm supports NIR and lowers uniforms to UBO in draw
calls when this hasn't be done before this can be used again.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-11-19 10:47:37 -08:00
Raven
288d33d3f4 winsys/svga: fix display corruption after surface_init
Cherry-pick of commit f41848a9 to fix display corruption in KDE
Fixes: ba37d408 ("svga: Performance fixes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3599
2020-11-19 10:47:37 -08:00
Eric Anholt
6111de07d1 freedreno/cffdec: When .mergedregs is set, don't count half regs.
This matches what ir3.c does in the mergedregs case: just count max full
reg used.  This flag is unset so far, but will be soon and keeps our
output comparable between blob and freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6323>
(cherry picked from commit ce335dcb19)
2020-11-19 10:47:37 -08:00
Dylan Baker
0ff10e6be4 .pick_status.json: Update to bf5cea7232 2020-11-19 10:47:37 -08:00
Dylan Baker
b09d6e2bfe dcs: Add sha256 sums for 20.2.2 2020-11-06 20:45:47 -08:00
Dylan Baker
df2977f871 Bump version for 20.2.2 release mesa-20.2.2 2020-11-06 15:40:35 -08:00
Dylan Baker
92a401d4a3 docs: add release notes for 20.2.2 2020-11-06 15:40:06 -08:00
Lionel Landwerlin
f17e6fcb7a blorp: allow blits with floating point source layers
The current blorp API only allows source layers for 3D images to be
integers. That is causing problems with the Vulkan API where we need
to be able to use a 3D layer that could be in between 2 layers.

This change allows a floating point value to be passed for blits and
internally sets up the input parameters to pass floating point values
to kernels.

v2: Use tex op to determinate what types are the coordinates (Jason)
    Drop setting params->z (Lionel)

v3: Fix nir_texop_txf_ms_mcs op not considered as having integer coords (Lionel)

v4: Fix incorrect test on nir_texop_txf_ms_mcs (Ivan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3458
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
(cherry picked from commit 87934f02f9)
2020-11-02 07:48:29 -08:00
Lionel Landwerlin
35b93d6f8a anv: fix source/destination layers for 3D blits
When blitting from source depth range [0-3] into destination depth
range [0-2], we'll have to use a source layer that is in between 2
layers of the 3D source image.

Other than having an incorrect formula, we're also using integer which
prevent us from using the right source layer.

v2: Drop + 0.5 on application offsets

v3: Reuse num_layers (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3458
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
(cherry picked from commit ea32691257)
2020-11-02 07:48:26 -08:00
Marek Olšák
a7e169380d winsys/amdgpu: remove incorrect assertion check against max_check_space_size
Fixes: 114a899cc8 "winsys/amdgpu: cs_check_space sets the minimum IB size for future IBs"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>
(cherry picked from commit 095ee8f867)
2020-11-02 07:48:26 -08:00
Bas Nieuwenhuizen
52ef9c22a0 radv: Fix variable name collision.
idx was aliased, and eb104e949e started
using the outer var in the inner scope ...

Fixes: eb104e949e
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3701
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7388>
(cherry picked from commit 8943c80c9b)
2020-11-02 07:48:26 -08:00
Michael Tretter
e8b625bc96 etnaviv: free tgsi tokens when shader state is deleted
The tokens are allocated using tgsi_dup_tokens when the shader state is
created, so we need to free them explicitly when deleting the shader state.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>
(cherry picked from commit 98db7c4841)
2020-11-02 07:48:26 -08:00
Lucas Stach
25bc222815 etnaviv: blt: properly program surface TS offset for clears
We clear the wrong TS region for != level 0 surfaces or TS buffers
with a internal offset.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>
(cherry picked from commit 3ba753d9f5)
2020-11-02 07:48:26 -08:00
Lucas Stach
fd3c49bb78 etnaviv: drm: fix BO refcount race
There is a race where the BO refcount might drop to 0 before the
dmabuf/name import paths had a chance to grab a reference for a
BO found in the handle_table. The easiest solution is to keep the
refcount stable as long as the table_lock is held.

While a more involved scheme of rechecking the refcount before
actually destroying the BO might also work, the bo_del path isn't
called very often, so micro-optimizing a single mutex_lock seems
to be over-engineered, so go for the easy solution.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>
(cherry picked from commit 866bb22d6b)
2020-11-02 07:48:26 -08:00
Lionel Landwerlin
833d68899a intel/dev: Bump Max EU per subslice/dualsubslice
This isn't a problem right now because the previous max would give the
same result when aligned to a byte (8bits).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7288>
(cherry picked from commit b03c86a71f)
2020-11-02 07:48:26 -08:00
Dave Airlie
f401af6f18 gallivm: zero init the temporary register storage.
Due to flow control we can end up with random values in here having
side effects.

This fixes a crash in gtk4-demo.

Fixes: 44a6b0107b ("gallivm: add nir->llvm translation (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7327>
(cherry picked from commit f7d1460418)
2020-11-02 07:48:26 -08:00
Marcin Ślusarz
3e2245c454 intel/tools: fix invalid type in argument to printf
$2 is exp2, exp2 is defined to be llint and llint is defined to be
unsigned long long int.

Fixes error reported by Coverity:
CID 1451141: Invalid type in argument to printf format specifier (PRINTF_ARGS)

Fixes: 70308a5a8a ("intel/tools: New i965 instruction assembler tool")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7351>
(cherry picked from commit e96f33cd30)
2020-11-02 07:48:26 -08:00
Bas Nieuwenhuizen
b540aaa0a8 radv: Do not access set layout during vkCmdBindDescriptorSets.
The spec says:

"
VkDescriptorSetLayout objects may be accessed by commands that operate on descriptor sets allocated using that layout
"

So our behavior is valid here, but this is a temporary workaround for an issue with Baldur's Gate 3.

CC: mesa-stable
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7207>
(cherry picked from commit eb104e949e)
2020-11-02 07:48:26 -08:00
Bas Nieuwenhuizen
7ccf2cf839 radv: Fix 1D compressed mipmaps on GFX9.
Partial rollback as GFX9 really requires height = 1 to work.

The two substantial parts of the fix remaining:

1) Deal with views with multiple levels.
2) Limit the expansion to the base mip pitch/height. On GFX9 this
   is exactly equal to the surf_pitch that was used before. I've
   done some investigation to make sure that on GFX10 this always
   results in the right physical layout.

Remaining stupid question is how the actual extents for bounds
checking never end up too low when the size gets clamped, but
this change and the previous change don't change that ...

Fixes: 1fb3e1fb70 "radv: Fix mipmap extent adjustment on GFX9+."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7245>
(cherry picked from commit 29999e6b9d)
2020-11-02 07:48:26 -08:00
Rhys Perry
562e89ff0d aco: ignore the ACO-inserted continue in create_continue_phis()
Otherwise, for loops without continue_or_break, create_continue_phis()
always returns an undef operand.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 638cbc21a1 ("aco: handle when ACO adds new continue edges")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2848
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7148>
(cherry picked from commit 26e53e3afa)
2020-11-02 07:48:26 -08:00
Rhys Perry
1ddbe3aa11 aco: update phi_map in add_subdword_operand()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 56345b8c61 ("aco: allow reading/writing upper halves/bytes when possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7216>
(cherry picked from commit d4503a9020)
2020-11-02 07:48:26 -08:00
Dylan Baker
63754d2b77 .pick_status.json: Update to 8077f3f4c4 2020-11-02 07:48:26 -08:00
Rob Clark
bfa8ac8c67 freedreno: Disallow tiled if SHARED and not QCOM_COMPRESSED
If the user is not aware of modifiers, and wants to allocate a shared
resource, we shouldn't leave them with tiled.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3678
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7308>
(cherry picked from commit 67238f95b5)
2020-11-02 07:48:26 -08:00
Tapani Pälli
5afe855fde iris: fix the order of src and dst for fence memcpy
This fixes random failures with "deqp-egl --deqp-case=*multithread*":
   iris: Failed to submit batchbuffer: No such file or directory

Fixes: 6b1a56b908 ("iris: Drop stale syncobj references in fence_server_sync")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7289>
(cherry picked from commit cb6ce4a265)
2020-11-02 07:48:26 -08:00
Michel Dänzer
cacca2aaa1 loader/dri3: Allocate up to 4 back buffers for page flips
With swap interval 0, i.e. sync-to-vblank disabled.

This can be necessary for unthrottled drawing with Xwayland:

1) One buffer can be scanned out
2) One buffer can be pending in the kernel for a page flip
3) One buffer can be pending in the Wayland compositor

Therefore, with 3 buffers, the frame-rate could be capped much lower
than the throughput the GPU is capable of, in the worst case at the
Wayland compositor refresh rate.

(The native Wayland EGL backend always uses up to 4 buffers)

Leave the maximum number of buffers at 3 for swap interval != 0, it's
sufficient in that case to always be able to queue one frame ahead of
time.

https://gitlab.gnome.org/GNOME/mutter/-/issues/1455
https://gitlab.gnome.org/GNOME/mutter/-/issues/1462

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
(cherry picked from commit 31e9de9c8a)
2020-11-02 07:48:26 -08:00
Michel Dänzer
fa73f34f79 loader/dri3: Keep current number of back buffers if frame was skipped
We'd previously take the copy path. If we were actually flipping (in
which case skipped frames are more likely to occur), we'd ping-pong
between a smaller and larger number of back buffers, and frame-rate
could vary / take a dip due to the buffer management overhead.

While I'm not sure this is actually possible to hit at this point, it
definitely will be with the next change.

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
(cherry picked from commit 16a7cc4d44)
2020-11-02 07:48:26 -08:00
Michel Dänzer
86a542b0ab loader/dri3: Only allocate additional buffers if needed
Previously, we would always allocate 3 buffers for page flipping. But 2
buffers can suffice for clients which always wait for buffer swaps to
complete before starting a new frame.

Therefore, keep track of the maximum number of buffers separately from
the current number, and only bump the latter if both current buffers are
busy.

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
(cherry picked from commit 60585fc4e3)
2020-11-02 07:48:26 -08:00
Samuel Pitoiset
e12a581a3a aco: fix determining if LOD is zero for nir_texop_txf/nir_texop_txs
txf/txs expects LOD to be a 32-bit unsigned integer while other
texture operations expects a float.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3668
Fixes: 93c8ebfa78 ("aco: Initial commit of independent AMD compiler")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7256>
(cherry picked from commit 4e2fe34aa9)
2020-10-26 10:34:25 -07:00
Tapani Pälli
2f09ff3fc8 gallivm/nir: handle nir_op_flt in lp_build_nir_llvm
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3663
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7248>
(cherry picked from commit c83d6ffa32)
2020-10-26 10:34:24 -07:00
Dylan Baker
4f0bee6775 .pick_status.json: Update to b92eadb29c 2020-10-26 10:34:22 -07:00
Ryan Neph
17e7be7c79 virgl: Fixes portal2 binary name in tweak config
Portal 2 on virgl w/ GLES host requires bgraswz and emubgra tweaks.
Application binary name matching mismatch caused tweaks to default
to a disabled state.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Fixes: 9760a7ed91 ("virgl: apply bgra dest swizzle and add Portal 2")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7246>
(cherry picked from commit b2c737cf57)
2020-10-21 16:16:34 -07:00
Thong Thai
b9693aa851 frontends/va/postproc: Un-break field flag
Fixes an issue where deinterlaced videos would play at half the
framerate, since only one field was repeated, instead of using both
fields. Reverts a change I made previously which broke this.

Fixes: 78786a219e ("frontends/va: Fix deinterlace bottom field first flag")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3621
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7194>
(cherry picked from commit 354e375c9c)
2020-10-21 16:16:32 -07:00
Timothy Arceri
a1f8f5e241 glsl: relax rule on varying matching for shaders older than 4.00
Please see new code commment for full justification.

Fixes: 18004c338f ("glsl: fail when a shader's input var has not an equivalent out var in previous")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3648

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7184>
(cherry picked from commit c54c42321e)
2020-10-21 16:16:30 -07:00
Dylan Baker
bfa702dd0b .pick_status.json: Update to 025050bae7 2020-10-21 16:16:29 -07:00
Marcin Ślusarz
0bc9a81733 vulkan/wsi: fix possible random stalls in wsi_display_wait_for_event
pthread_cond_broadcast man page says this:
"The pthread_cond_broadcast() or pthread_cond_signal() functions may
 be called by a thread whether or not it currently owns the mutex that
 threads calling pthread_cond_wait() or pthread_cond_timedwait() have
 associated with the condition variable during their waits; however,
 if predictable scheduling behavior is required, then that mutex shall
 be locked by the thread calling pthread_cond_broadcast() or
 pthread_cond_signal()."

Found by reading the code.
Compile tested only.

Fixes: da997ebec9 ("vulkan: Add KHR_display extension using DRM [v10]")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7197>
(cherry picked from commit 4408131142)
2020-10-20 10:02:11 -07:00
Dylan Baker
cdcf4542bd .pick_status.json: Update to d0f8fe5909 2020-10-20 10:02:08 -07:00
Nanley Chery
1219eace69 isl: Fix the aux-map encoding for D24_UNORM_X8
Bspec: 53911 now defines the encoding for this format.

Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7198>
(cherry picked from commit 3c87ac1f60)
2020-10-19 09:53:35 -07:00
Marek Olšák
07e1df3cd1 Revert "radeonsi/gfx10: disable vertex grouping"
This reverts commit 42f921387b.

It causes GPU hangs on gfx10.3.

Fixes: a23802bcb9 - ac,radeonsi: start adding support for gfx10.3

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7172>
(cherry picked from commit 6810e6e4d0)
2020-10-19 09:53:34 -07:00
Nanley Chery
ae6b7d1e3e intel/isl: Drop redundant unpack of unorm channels
Fixes: 09ced65420 ("intel/isl: Add format conversion code")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7168>
(cherry picked from commit 5e27e04322)
2020-10-19 09:53:32 -07:00
Nanley Chery
c6396afbac st/mesa: Add missing sentinels in format_map[]
Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7169>
(cherry picked from commit cf11ebfbc2)
2020-10-19 09:53:27 -07:00
Dylan Baker
a4e81dd7a2 .pick_status.json: Update to 3c87ac1f60 2020-10-19 09:53:24 -07:00