this was accidentally duplicated from the conditional below,
except this one didn't have the buffer_stride_unaligned
caps check, which meant any 4-byte attrib which was
unaligned got marked for rewrites even on drivers
supporting unaligned strides
the correct change should have checked the stride against
the component size in the top case
Fixes: 7672545223 ("gallium: move vertex stride to CSO")
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31425>
(cherry picked from commit 8a1ce9a144)
X11 starts up if Mesa is compiled with legacy-x11=dri2 and shows
the desktop.
It crashes with segfault as soon as an application is started.
At src/egl/drivers/dri2/platform_x11.c function dri2_from_names
(at src/gallium/frontends/dri/dri2.c) should be called
with offset address instead of with offset value.
Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31406>
(cherry picked from commit 6c84103276)
The per-primitive have their own separate section in the FS thread
payload, and are not considered when setting the mask in
3STATE_SBE's ConstantInterpolationEnable.
This is also consistent with what is done for brw_interp_reg().
Fixes
- dEQP-VK.mesh_shader.ext.misc.clip_geom_provoking_last
- dEQP-VK.mesh_shader.ext.misc.clip_geom_and_task_shader_provoking_last
Backport-to: 24.2
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11844
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31417>
(cherry picked from commit 93c3780bc1)
At i945_texture_layout_3d() util_next_power_of_two() is called,
which oversizes the npot-blocks for every level to get power of 2
for width and height. Hardware doesnot expect these oversized
npot-blocks. The call is removed.
Code is added to align allocation of npot-blocks correctly.
Also at i915_texture_layout_3d() the util_next_power_of_two() call
is removed. Besides the computation of block-allocation is changed,
because it still was using classic i915-coding.
Cc: mesa-stable
Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31057>
(cherry picked from commit a95bd2dcf0)
If ftrunc@64 is lowered by nir_lower_doubles it is turned into a
comparable long series of 32 bit operations. If the hardware
supports ffract@64 then nir_opt_algebraic can first lower ftrunc@64
to use some combinations with ffloor@64. They can then be turned
into a combination of fsub@64 and ffract@64 resulting in less
all-over instructions.
Fixes: 5218cff34b
nir/algebraic: avoid double lowering of some fp64 operations
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29281>
(cherry picked from commit f19f1ec17b)
We were unlocking the bo handles hash table right after removing the bo handle
and afterward closing it. This leads to race conditions where the handle could
have been re-acquired on another thread. As the kernel would return the same
bo handle and do not reference count them, this leads to it being used after
being closed.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31421>
(cherry picked from commit bef454f227)
When allocating a buffer normally, this flag gets to the allocator from
the memory requirements, but when sparse bindings are created we were
checking for them but never setting them.
Fixes sparse descriptor buffers on Xe2.
Makes the failure on TRTT more obvious.
Fixes: c6a91f1695 ("anv: add new heap/pool for descriptor buffers")
Fixes: 692e1ab2c1 ("anv: get rid of the second dynamic state heap")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31372>
(cherry picked from commit a4cbc903a8)
Importing an opaque fd no longer returns the mapped pointer but
a pointer to llvmpipe_memory_allocation to support both memfds and
dma bufs. This saves the pointer with the correct type and we can
unwrap the mapped data in a correct way.
Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31022>
(cherry picked from commit 3e01c15fa7)
If the buffer is not unmapped then a reference to the DMA buffer
is still kept. The DRM device is then not properly cleaned up.
This can cause the application to keep a DRM device open which is
still DRM master without any visible open file descriptors.
Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31022>
(cherry picked from commit 39156b6cd4)
Make the external memory object a reference counted object. Without
that deleting the memory object in OpenGL would also delete and unmap
the memfd, which causes any operation on a texture or buffer that is
bound to that memory object to access invalid memory.
Fixes: 1608a815e3 ("llvmpipe: add support for EXT_memory_object(_fd)")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31022>
(cherry picked from commit af16ec6e0c)
If the pipeline is created with no
VkPipelineSampleLocationsStateCreateInfoEXT, but
VK_DYNAMIC_STATE_SAMPLE_LOCATIONS_ENABLE_EXT is set, we end up
dereferencing a NULL pointer.
Fixes future dEQP-VK.pipeline.*.extended_dynamic_state.*.sample_locations_enable_no_create_info
Fixes: 1deb83fb86 ("vulkan: Add more dynamic multisample states")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31377>
(cherry picked from commit 101a803858)
Based on a patch by weab chan.
The chip_id wasn't getting picked up with the capital B, so use lowercase hex values
like everywhere else.
Move it as a separate entry and turn on enable_tp_ubwc_flag_hint as the Quest 3 ships
with blob version 7xx, and expose the name as FD740v3 for clarity.
Unify the raw_magic_regs with a740, but as noted by Danylo in the initial enablement, set
RB_DBG_ECO_CNTL to 1 on a740v3 in magic_regs.
Fixes image corruption issues on this device.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10316
Fixes: 0b5097081a ("freedreno/devices: Add A740v3 from Quest 3")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31328>
(cherry picked from commit 7968b356f8)
Kernel does VCN instance scheduling per context, so when we have
multiple instances we should use new context to be able to utilize
all of them.
Another issue is with AV1, VCN 3 and VCN 4 only support AV1 on
first instance. Kernel parses IBs and switches to first instance when
it detects AV1, but this only works for first submitted IB in context.
The CS would be rejected if we first decode/encode other codecs, kernel
schedules on second instance (default) and then we try to decode/encode AV1.
Cc: mesa-stable
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31249>
(cherry picked from commit 712e49f137)
In an earlier commit, I made us stop counting sync.nops in the shader
statistics we use for shader-db (brw_debug_log_message) and fossil-db
(stats->instructions = ...). However, I missed adjusting the printout
for INTEL_DEBUG.
Fixes: 1497f4e0c2 ("intel/fs: Don't include sync.nop in instruction count statistics")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31311>
(cherry picked from commit 878ae9708a)
When no pipeline cache is provided by the application and we rely on the
internal one, cache hits are not counted as such.
This was causing us to return COMPILE_REQUIRED on some cases where all
shaders had been found in the cache, as well as some unnecessary extra
processing in the case that we did have to compile the pipeline.
Fixes: 1dacea10f3 ("anv: implement caching for ray tracing pipelines")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31298>
(cherry picked from commit 2e1c278e3d)
