Commit Graph

523 Commits

Author SHA1 Message Date
Rhys Perry
77e7fd0dee aco: swap the correct v_mov_b32 if there are two of them
Previously, this function tried to swap the instruction which is not
v_mov_b32, so that it doesn't introduce any new OPY-only instructions. If
both were v_mov_b32, it swapped Y. Since this makes Y opy-only, this can't
be done if X is also opy-only.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 408fa33c09 ("aco/gfx12: don't use second VALU for VOPD's OPX if there is a WaR")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13101
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34841>
(cherry picked from commit 9ca71b52aa)
2025-05-07 09:04:39 +02:00
Eric Engestrom
9c49a2e03f .pick_status.json: Update to 84b9c281fe 2025-05-07 09:04:33 +02:00
Mel Henning
4c1447e89b nak: Check that swizzles are none
wherever we check that src_mod is none.

This commit simply does:
s/src_mod.is_none()/is_unmodified()/
across all of nak except the definition of is_unmodified() itself.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Fixes: bad23ddb48 ("nak: Add F16 and F16v2 sources")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
(cherry picked from commit 9d1c38ddf1)
2025-05-06 23:40:53 +02:00
Mel Henning
81b877c9a0 nak: Add Src::is_unmodified() helper
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Fixes: bad23ddb48 ("nak: Add F16 and F16v2 sources")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
(cherry picked from commit 6e72f0f81b)
2025-05-06 17:45:13 +02:00
Lionel Landwerlin
0ce1adf683 brw: add pre ray trace intrinsic moves
Some intrinsics are implemented by reading memory location that could
be rewritten by a further tracing calls. So we need to move those
reads prior to tracing operations in the shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8979
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34214>
(cherry picked from commit c434050a00)
2025-05-06 17:24:10 +02:00
Karol Herbst
8780fd7da5 iris/xe: take the grids variable_shared_mem into account
This fixes OpenCL local memory kernel arguments.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34548>
(cherry picked from commit 7c78c76181)
2025-05-06 17:24:07 +02:00
Karol Herbst
de59c4b553 iris/xe: fix compute shader start address
It needs to apply the offset so it selects the correct SIMD shader.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34548>
(cherry picked from commit fee9230bb5)
2025-05-06 17:24:06 +02:00
Karol Herbst
855bc8242a iris: parse global bindings for every gen
This fixes OpenCL support on gen 12.5+

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34548>
(cherry picked from commit 57ccfd0502)
2025-05-06 17:24:05 +02:00
Mary Guillemard
8d2520cf95 pan/genxml: Fix inverted logic on nr_regs
v10 have 96 and v12+ have 128, not the opposite.

Fixes: 811525b543 ("pan/genxml: Build libpanfrost_decode for v12")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34815>
(cherry picked from commit 8447f7aaae)
2025-05-06 17:24:04 +02:00
Samuel Pitoiset
867fb6756b radv: fix GPU hangs with image copies for ASTC/ETC2 formats on transfer queue
Emitting compute dispatches on SDMA just hangs. It might be needed
to switch to gang submit for these to work but fixing the GPU hang is
more important for now.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34805>
(cherry picked from commit 0684dc5fa8)
2025-05-06 17:24:03 +02:00
Danylo Piliaiev
024ccb1c4b tu: Fix disable_fs state update condition
tu_calc_disable_fs depends on FS, so it should be updated on
TU_CMD_DIRTY_FS.

Fixes: be481e6615 ("tu: Disable FS in certain cases even if FS is not empty")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34791>
(cherry picked from commit 2797f42451)
2025-05-06 17:24:03 +02:00
Samuel Pitoiset
963b9fc2f3 radv: disable SINGLE clear codes to workaround a hw bug with DCC on GFX11
This fixes a very weird cache-related corruption with DCC on GFX11 due
to a hw bug according to PAL.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12932
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34790>
(cherry picked from commit 1356d20042)
2025-05-06 17:24:02 +02:00
Samuel Pitoiset
49d96917d5 radv: do not clear unwritten color attachments with dual-source blending
This is incorrect because the color format at slot 0 needs to be
replicated to the slot 1. But with dual-source blending the colors
written mask is only 0xf and this was clearing the color format at
slot 1.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13082
Fixes: e1483d022b ("radv: clear unwritten color attachments for monolithic PS earlier")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34773>
(cherry picked from commit 55ad0fd35c)
2025-05-06 17:24:01 +02:00
Timothy Arceri
52d082981f util/driconf: add force_gl_depth_component_type_int workaround
This allow us to force mesa to use GL_UNSIGNED_INT rather than
GL_UNSIGNED_SHORT for when chosing the texture format for
GL_DEPTH_COMPONENT. The increased depth precision allows us to
match the Nvidia/AMD closed drivers default behaviour.

Here we also enable the workaround for the remastered tombraider
games.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13032
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34752>
(cherry picked from commit e0a111540f)
2025-05-06 17:24:00 +02:00
Eric Engestrom
d762b354c7 .pick_status.json: Update to c434050a00 2025-05-06 17:23:57 +02:00
José Roberto de Souza
293aaa43b9 intel/tools: Fix batch buffer decoder
intel_decoder_init() initializes intel_batch_decode_ctx so later
we can call decode functions but it depends on data stored in
brw/elk_isa_info but that was being allocated in stack
of intel_decoder_init() then when the decode functions were executed
it was accessing garbage at the brw/elk_isa_info memory.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ec2d20a70d ("intel/tools: Add helpers for decoder_init/disasm")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34776>
(cherry picked from commit 3e5a735d01)
2025-05-03 12:48:02 +02:00
Lionel Landwerlin
d8cf36fbb1 intel: fix null render target setup logic
Or current render target cache setting is to key on the binding table
index, meaning the HW associates a number in the range [0, 7] to a
RENDER_SURFACE_STATE description. If you want change the render target
0 between 2 draw calls, you need to insert a PIPE_CONTROL in between
the 2 draw calls with pb-stall + rt-flush in order to flush an writes
to a previous RENDER_SURFACE_STATE that has now becomed disassociated
with the [0, 7] number.

This PIPE_CONTROL taking care of the flush is dealt with in
cmd_buffer_maybe_flush_rt_writes(). This function diffs the current
BTI setup for render targets (first 0 to 7 BTIs) with what the next
fragment shader wants.

The issue here is we might have a render pass with 0 color attachments
and yet in 98cdb9349a we added one pointing to the render target 0,
but in the emit_binding_table() when we finally program the BTI, we
check the render pass color count and program a null surface state
instead of an actual surface state. And this leads to hangs because
the render target cache will end up with inconsistent state data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 98cdb9349a ("anv: ensure null-rt bit in compiler isn't used when there is ds attachment")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12955
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34603>
(cherry picked from commit 63f633557f)
2025-05-03 12:48:02 +02:00
Paul Gofman
234d66a1e2 radv/amdgpu: Fix hash key in radv_amdgpu_winsys_destroy().
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34774>
(cherry picked from commit 96765935e8)
2025-05-03 12:48:02 +02:00
Karol Herbst
c42b829ac4 r600: fix r600_buffer_from_user_memory for rusticl
Not entirely sure if it's actually required, but this makes it consistence
with r600_resource_create also calling r600_compute_global_buffer_create
for global memory buffers.

Cc: mesa-stable
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Patrick Lerda <patrick9876@free.fr>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34623>
(cherry picked from commit f6e3c967d9)
2025-05-03 12:48:02 +02:00
Eric Engestrom
53adfa7182 ci: drop tracking of removed folder
Fixes: 185a3f9105 ("gallium: delete tests")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34623>
(cherry picked from commit 7addf551f3)
2025-05-03 12:48:02 +02:00
Eric Engestrom
28264fe953 .pick_status.json: Update to 7f0de1a512 2025-05-03 12:48:02 +02:00
Aleksi Sapon
8125b0def2 lp: fix gnu-empty-initializer warning
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34655>
(cherry picked from commit 501ed5be49)
2025-05-03 12:48:02 +02:00
Mike Blumenkrantz
cdafaef206 egl: fix sw fallback rejection in non-sw EGL_PLATFORM=device
previously progress could still be made during sw fallback here,
which would lead to unpredictable results with driver loading e.g., crashing

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34609>
(cherry picked from commit 8a339cdebc)
2025-05-01 09:39:47 +02:00
Connor Abbott
746f2986ec ir3: Take LB restriction on constlen into account on a7xx
On a7xx, the max constlen for compute is increased to 512 vec4s or 8KB,
however the size of the LB was not increased beyond 40KB. A quick
calculation shows that 8KB of consts multiplied by 2 banks plus the
API maximum of 32KB shared memory would exceed 40KB. This means that
we can't always use a constlen of 512, and sometimes have to fall back
to 256 when a lot of shared memory is in use.

In the future, we can use similar calculations to figure out how much
"extra" shared memory is available for the backend to spill to, but we
currently don't support spilling to shared memory.

Fixes: 5879eaac18 ("ir3: Increase compute const size on a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34746>
(cherry picked from commit ea9d694a7b)
2025-05-01 09:39:45 +02:00
Connor Abbott
385a56642b freedreno/a6xx, turnip: Set CONSTANTRAMMODE correctly
This should fix hangs when using more than 256 constants on a7xx.

Fixes: 5879eaac18 ("ir3: Increase compute const size on a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34746>
(cherry picked from commit 80bcbc0e92)
2025-05-01 09:39:44 +02:00
Connor Abbott
2a06a20a4a freedreno/a6xx: Define CONSTANTRAMMODE
While we're here, give SP_CS_UNKNOWN_A9B1 a better name.

Fixes: 5879eaac18 ("ir3: Increase compute const size on a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34746>
(cherry picked from commit 57986ae5ec)
2025-05-01 09:39:43 +02:00
Connor Abbott
f6450df88f freedreno: Add compute_lb_size device info
This is really a guess except for a6xx and later, however it shouldn't
change behavior from before.

Fixes: 5879eaac18 ("ir3: Increase compute const size on a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34746>
(cherry picked from commit 156ab5839d)
2025-05-01 09:39:42 +02:00
Karol Herbst
84f1dcdc2a nak: fix handling of delays > 15
Fixes: 2b569ecdb6 ("nak: Handle delays > 15")
Acked-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34722>
(cherry picked from commit 9a97a5d577)
2025-05-01 09:39:41 +02:00
Janne Grunau
6101b0ae4b ci: Switch cross-builds to '-D tools=panfrost'
It is not longer necessary to build the panfrost gallium driver for
panfrost_compile so do not do that.

Backport-to: 25.1
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34693>
(cherry picked from commit f6c5f0c19d)
2025-05-01 09:39:39 +02:00
Janne Grunau
e37333798c panfrost: build panfrost_compile for -Dtools=panfrost
This allows building tools for cross-compiling without building gallium
or vulkan drivers unnecessarily.

Backport-to: 25.1
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34693>
(cherry picked from commit 674c96ad0a)
2025-05-01 09:38:52 +02:00
Janne Grunau
449a7f98c7 asahi: Drop unnecessary idep_mesaclc dependency
Fixes build with `-Dmesa-clc=system`.

Backport-to: 25.1
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34693>
(cherry picked from commit a228d715b6)
2025-05-01 09:38:51 +02:00
Janne Grunau
afe870756d asahi: build asahi_clc for -Dtools=asahi
This allows building tools for cross-compiling without building gallium
or vulkan drivers unnecessarily.

Backport-to: 25.1
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34693>
(cherry picked from commit 007d7418f8)
2025-05-01 09:38:50 +02:00
Lionel Landwerlin
a17da10518 anv: force fragment shader execution when occlusion queries are active
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34732>
(cherry picked from commit f7bc22e0d7)
2025-05-01 09:38:49 +02:00
Eric Engestrom
ebf87ad70b .pick_status.json: Update to 615d0c9669 2025-05-01 09:38:44 +02:00
Tapani Pälli
5838a36951 intel/dev: update mesa_defs.json from internal database
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34753>
(cherry picked from commit eeffb4e674)
2025-04-30 14:16:00 +02:00
Karmjit Mahil
058922a3b8 tu: Fix segfault in fail_submit KGSL path
Fixes: ec268fa5b6 ("tu/kgsl: Support u_trace and perfetto")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34749>
(cherry picked from commit 9dfd4a091c)
2025-04-30 14:15:59 +02:00
Iván Briano
b939de025d brw: make HALT instruction act as barrier in new CSE pass
This brings back c9e33e5cbf ("intel/fs/cse: Make HALT instruction act
as CSE barrier."), from the old CSE pass into the new one.

Fixes new CTS test: dEQP-VK.subgroups.shader_quad_control.terminated_invocation

Fixes: 9690bd369d ("intel/brw: Delete old local common subexpression elimination pass")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34643>
(cherry picked from commit 29d7b90cfc)
2025-04-30 14:15:58 +02:00
Mel Henning
d0627d243d nak: Remove hfma2 src 1 modifiers
This fixes a compilation issue in Marvel Rivals where the legalization
logic and the encoding logic don't line up, which results in an
assertion failure on this instruction:

    r17 = hfma2 r17.xx -r18.xx 0x3c003c00

The fix here is a little overly restrictive because it turns out we
actually do have modifiers for all 3 sources. Those modifiers will
be added in later commits.

Fixes: 567cae69c3 ("nak: Add 16-bits float operations")
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34750>
(cherry picked from commit 1ff7135691)
2025-04-30 14:15:58 +02:00
Sagar Ghuge
fd80d0027b intel/compiler: Fix stackIDs on Xe2+
For Xe2+, from Bspec 64643, bit field "StackID": The maximum number of
StackIDs can be 2^12- 1.

Cc: mesa-stable
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34709>
(cherry picked from commit 821c1bfa7e)
2025-04-30 14:15:57 +02:00
Caio Oliveira
bb56867a1b intel/executor: Fix bfloat example for converting F to packed BF
In float pointing rules adding +0.0f preserves all values except
for -0.0f, so what we want here is to add -0.0f.  In the future
we should add proper support for float immediates in the assembler.

Fixes: fafdd24285 ("intel/executor: Update bfloat example")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
(cherry picked from commit 3e0418ba02)
2025-04-30 14:15:56 +02:00
Mary Guillemard
1f82af229d pan/bi: Properly lower add/sub with saturation on v11+
We were wrongly lowering all add/sub operations with saturation on 8-bit
values on v11+.

This fixes CTS failures on
"dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.*" and
likely more apps.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: d79a31bf81 ("pan/bi: Lower removed instructions in algebraic on v11+")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34743>
(cherry picked from commit 6ab4ae1a19)
2025-04-30 14:15:55 +02:00
Samuel Pitoiset
03dc23baa2 radv: fix re-emitting VRS state when rendering begins
This state also depends on whether a VRS attachment is used.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11693
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34735>
(cherry picked from commit 1fccc09abe)
2025-04-30 14:15:54 +02:00
Ian Romanick
f2a54f5244 brw/cmod: Don't propagate from CMP to possible Inf + (-Inf)
Most of the churn in this commit is changing unit tests that were
testing things that are now invalid.

shader-db:

All Intel platforms had similar results. (Lunar Lake shown)
total instructions in shared programs: 17122204 -> 17122669 (<.01%)
instructions in affected programs: 120669 -> 121134 (0.39%)
helped: 0 / HURT: 124

total cycles in shared programs: 895602370 -> 895613210 (<.01%)
cycles in affected programs: 17868974 -> 17879814 (0.06%)
helped: 35 / HURT: 85

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 210736518 -> 210743769 (+0.00%)
Cycle count: 30377733040 -> 30377699060 (-0.00%); split: -0.00%, +0.00%
Max live registers: 66056852 -> 66056966 (+0.00%)

Totals from 1505 (0.21% of 706776) affected shaders:
Instrs: 1890151 -> 1897402 (+0.38%)
Cycle count: 48397408 -> 48363428 (-0.07%); split: -0.11%, +0.04%
Max live registers: 256821 -> 256935 (+0.04%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: 020b0055e7 ("i965/fs: Propagate conditional modifiers from compares to adds")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34509>
(cherry picked from commit e26270249b)
2025-04-30 14:15:52 +02:00
Ian Romanick
aa08dfbad4 brw/cmod: Fix some errors when propagating from CMP to ADD.SAT
When I originally wrote that code, I didn't understand what a jerk NaN
can be.

v2: Remove the brw_type_is_uint stuff. This function is currently only
called for float types. In a later commit, integer types will be
supported but only for NZ and Z conditions. Noticed by Matt.

shader-db:

All Intel platforms had similar results. (Lunar Lake shown)
total instructions in shared programs: 17122197 -> 17122204 (<.01%)
instructions in affected programs: 1691 -> 1698 (0.41%)
helped: 0 / HURT: 4

total cycles in shared programs: 895602484 -> 895602370 (<.01%)
cycles in affected programs: 912964 -> 912850 (-0.01%)
helped: 2 / HURT: 2

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 210736388 -> 210736518 (+0.00%)
Cycle count: 30377728900 -> 30377733040 (+0.00%); split: -0.00%, +0.00%

Totals from 130 (0.02% of 706776) affected shaders:
Instrs: 169911 -> 170041 (+0.08%)
Cycle count: 18021210 -> 18025350 (+0.02%); split: -0.00%, +0.02%

Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: 020b0055e7 ("i965/fs: Propagate conditional modifiers from compares to adds")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34509>
(cherry picked from commit 0dab520a19)
2025-04-30 14:15:51 +02:00
Danylo Piliaiev
d14c0562c6 ir3: VARYING_SLOT_LAYER output is used for binning
In multi-layered framebuffer LRZ also has several layers and binning
pass needs to write depth to a correct layer, so binning VS needs
VARYING_SLOT_LAYER.

Fixes: 9775b33d0f ("tu: Enable GMEM with layered rendering")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34728>
(cherry picked from commit dea4bb3757)
2025-04-30 14:15:50 +02:00
Samuel Pitoiset
1664381813 radv: set radv_disable_dcc=true for WWE 2k23
This game is no longer available Steam, so it's more annoying to
reproduce the issue.

Let's disable DCC for that game to workaround rendering issues which
are likely game bugs.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10850
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34607>
(cherry picked from commit 5841d44f91)
2025-04-30 14:15:48 +02:00
Rhys Perry
87902dca71 aco: fix get_temp_reg_changes with clobbered operands
The spiller might have tried to spill a live-through first or second
s_fmac_f32 operand, but this wouldn't have reduced the SGPRs if the third
operand wasn't killed

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13038
Fixes: d6cb45dbb0 ("aco/spill: Allow spilling live-through operands")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34699>
(cherry picked from commit 7fe84024cb)
2025-04-30 14:15:47 +02:00
Tapani Pälli
a900b3f39d anv: put parenthesis to the set_sampler_size equation
This fixes errors seen with some renderdoc captures failing to allocate
descriptor sets.

Fixes: 76096d04bb ("anv: relax restriction on variable count descriptors")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34671>
(cherry picked from commit ed9f135936)
2025-04-30 14:15:45 +02:00
Eric Engestrom
d06fb6fb4b .pick_status.json: Update to eeffb4e674 2025-04-30 14:15:30 +02:00
Erik Faye-Lund
7926758a78 panvk: support vulkan 1.2 on v10+
While not yet officially conformant, we support all the required
features, and we pass the CTS. Let's mark off Vulkan 1.2, to make things
easier for applications.

Backport-to: 25.1
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34512>
(cherry picked from commit b3fd8ddf6a)
2025-04-27 11:51:59 +02:00