Trying to use Zink with the DRM winsys is problematic at best. In
theory all the pieces should be there but there are bugs around
synchronization, etc. This copies the current behavior of X11 which
also refuses to initialize DRM on Zink.
This is particularly important for Nouveau users which are getting Zink
via the loader returning "zink" for get_driver_for_fd(). On Wayland
today, we go ahead and load zink and attempt to use the DRM EGL paths,
which are broken. On X11, it fails to load the driver and then the EGL
device initialization code re-tries with zink which succeeds. Because
the second try is using Zink from the start, it's equivalent to if the
user had set MESA_LOADER_DRIVER_OVERRIDE=zink and they get the kopper
path, which is more reliable.
This absolutely not what we want because it means we don't load the
driver the loader requested and are dependent on fallback paths to get a
driver loaded at all. However, the real solution in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36014
is too complex to backport.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13498
Acked-by: Mel Henning <mhenning@darkrefraction.com>
This is because Android prefers it -- the project likes to make
changes to bionic that have a global effect, and using raw-syscalls
potentially complicates that. This is a backport of:
https://github.com/bytecodealliance/rustix/pull/1478
In addition, nothing in Mesa3D needs the added functionality provided
by raw syscalls.
Test:
meson setup gfxstream-build -Dvulkan-drivers="gfxstream" -Dgallium-drivers="" -Dvirtgpu_kumquat=true -Dopengl=false -Drust_std=2021
still compiles.
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36116>
Either Rb or Rc can be the non-register, so the copy if both
not reg should be sufficient.
Totals:
CodeSize: 14025216 -> 14022144 (-0.02%)
Static cycle count: 5313517 -> 5312651 (-0.02%)
Totals from 4 (0.30% of 1332) affected shaders:
CodeSize: 119168 -> 116096 (-2.58%)
Static cycle count: 33920 -> 33054 (-2.55%)
Only affects:
q2rtx/q2rtx-rt-pipeline 42 -0.48% -0.45%
This also helps with the coop matrix shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36104>
The border color of the rv770 gpu behaves the same way as
the evergreen border color. This change updates the software
accordingly.
This change is enabled for all the pre-evergreen gpus.
This change fixes 120 piglit tests. The rv770 ci is updated
as well.
Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34502>
This is the backport of 0c0b978938 "radeonsi: set NEVER as
the depth compare func if depth compare is disabled".
The function r600_tex_compare arguments are updated with the "const"
keyword.
This change fixes the test below which was broken after 0c6e56c391:
khr-gl4[5-6]/incomplete_texture_access/sampler: fail pass
Fixes: 0c6e56c391 ("mesa: (more) correctly handle incomplete depth textures")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35968>
The `.profile-traces` template was nearly identical to
`.piglit-performance-base`, differing only by one additional variable.
Since all jobs extending `.piglit-performance-base` were already using
`EGL_PLATFORM: surfaceless`, that setting has been moved into the base
template, allowing `.profile-traces` to be simplified.
This also hides the performance traces jobs from non-Marge pipelines,
as intended.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36074>
The a618-traces-performance job wasn’t actually running performance tests
because it didn’t extend the `.piglit-performance-base` template, which
is what sets the traces to be replayed 150 times.
This also hides the job from non-Marge pipelines, as intended.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36070>
Since 655cf2f553 ("ci: Simplify filter_env_vars using indirect expansion"),
PIGLIT_REPLAY_DEVICE_NAME is declared using `declare -x`, not `export`.
Update the regex in update_traces_checksum.py accordingly. This is safe
for now, as all performance trace jobs currently run in LAVA and use this
declaration style.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36070>
Add support for disabling the VRT (Variable Register Thread) feature.
The strategy here is to force the old BRW_MAX_GRF limit for the
register allocator (locks the upper limit) and make sure
ptl_register_blocks() always return that amount of blocks (locks
the lower limit).
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35781>
Explicitly layout the resource in all cases, rather than depending on
the partial/incomplete layout that is done in fd_resource_from_handle()
(which will be going away).
Now that we are not YOLOing the layout, it turns up some questionable
assumptions in piglit. Just mark those xfails for now.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
fdl6_layout() (and to a lesser degree) fdl5_layout() is growing an
unwieldly argument list, and it isn't obvious at first glance what
fdl_layout fields should be initialized before calling it. So split
out a fdl_image_params struct to clean this up.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
