Commit Graph

174371 Commits

Author SHA1 Message Date
Mike Blumenkrantz
0bde71b725 zink: disable validation
stable branch validation can't work since not all validation fixes
get backported
2023-09-21 19:43:06 -04:00
Dylan Baker
ed1a0b98f3 Revert "zink: set pipeline dynamic state count after all dynamic states are set"
This reverts commit ad0a9aaadc.
2023-09-21 16:06:55 -07:00
Dylan Baker
9a2e406706 Revert "nir/lower_io_to_scalar: fix 64bit io splitting"
This reverts commit dd04cf5d41a614ce5019ddd7bc5c687e42d516bf.
2023-09-21 16:06:25 -07:00
Timur Kristóf
c882d7b095 ac/nir/ngg: Wait for attribute ring stores in mesh shaders.
Make sure that both per-vertex and per-primitive attribute
ring stores are finished before position or primitive export
instructions are executed.

This is necessary because we need to ensure that mesh shader
waves work correctly when they have either vertex-only or
primitive-only waves.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 93b4f200de)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-21 16:06:21 -07:00
Timur Kristóf
057af805e4 ac/nir/ngg: Refactor mesh shader primitive export.
Cleanup the code that generates the two channels of the
primitive export instruction, and move storing the built-in
per-primitive outputs out to match how vertex attributes work.

Prepares the mesh shader lowering for a workaround that
affect export instructions.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 0721784b78)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-21 16:06:21 -07:00
Timur Kristóf
a8bcf44618 ac/nir/ngg: Wait for attribute stores before VS/TES/GS pos0 export.
This is a HW bug workaround for some (all?) GFX11 chips.

On these chips, rasterization can start before the attribute ring
stores are finished, which can cause issues.
As a workaround, wait for attribute ring stores to finish
before doing the position export.

Mesh shaders will be taken care of in another commit.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit edd51655f0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-21 16:06:21 -07:00
Timur Kristóf
6c14a7b646 ac/nir: Slightly refactor how pos0 exports are added when missing.
Prepares for a workaround. Makes it possible for this function
to not emit the pos0 export at all so that it can be emitted
by a subsequent call to the function later.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 9c096e4ace)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-21 16:06:21 -07:00
Timur Kristóf
b886aee46b ac/nir: Add done arg to ac_nir_export_position.
This prepares for a workaround where we won't need to add
the done flag to the last export in this function, because
it will be added in a subsequent call to the same function.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 838d886d90)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-21 16:06:21 -07:00
Iván Briano
1a8288c5ea intel/fs: use ffsll so we don't explode on 32 bits
Fixes: b200e5765c ("anv: use a simpler MUE layout for fast linked libraries")

Tested-by: Mark Janes <markjanes@swizzler.org>
(cherry picked from commit f1bc58cb7b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Iván Briano
0b9080a1d9 anv: enable VK_EXT_mesh_shader where supported
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 23f9e89fce)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Iván Briano
44ea732eed intel/fs: handle URB setup for fast linked mesh pipelines
Up until now, the mesh pipeline assumed it would be always linked to the
fragment shader, and so the calculated MUE map would always be
available.
That is not the case for fast linked pipeline libraries, so the URB
setup needs to account for this. We do this by replicating what's done
for non-mesh pipelines, defining the URB based on the FS inputs, and
always assuming they will be laid out in order of varying number, except
that we also account for per-primitive attributes.

Fixes all GPL using tests under dEQP-VK.mesh_shader.ext.smoke.*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 4eddeea7bf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Iván Briano
dfb38ea10c intel/fs: read viewport and layer from the FS payload
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 17d7f7a292)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Iván Briano
7a4067fe50 anv: track what kind of pipeline a fragment shader may be used with
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit d36da7c5f8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Iván Briano
bd31378d7c anv: use a simpler MUE layout for fast linked libraries
The compaction introduced in a252123363 ("intel/compiler/mesh: compactify MUE layout")
is not suitable for the case where graphics pipeline libraries are fast
linked, as the fragment shader won't receive the mue_map to know where
to locate its inputs.
For that case, keep doing what we did before and lay things down in the
order varyings are defined, which is also how it works for the non-mesh
case.

Fixes dEQP-VK.fragment_shading_rate.*fast_linked_library*.ms

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit b200e5765c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Iván Briano
57da837aeb blorp: fix hangs with mesh enabled
Move mesh URB allocations together with the other stages.

This fixes a hang that started happening with mesh enabled after
419531c5d9 ("intel/blorp: add a new flag to communicate PSS sync need")

Bspec 45352 says:
  L3 Space allocation can only be changed when the GPU pipeline is
  completely flushed.

It's likely that the PIPE_CONTROL added in that commit was breaking that
assumption and the URB allocation happening afterwards at the end of the
pipeline emission would then hang. And before that, we were probably
just getting lucky.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit bcde58ea86)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Marcin Ślusarz
6bb99621d7 intel/compiler: load debug mesh compaction options once
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
(cherry picked from commit 48885c7fe3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:21 -07:00
Marcin Ślusarz
e8ccf7997c intel/compiler,anv: put some vertex and primitive data in headers
Both per-primitive and per-vertex space is allocated in MUE in 8 dword
chunks and those 8-dword chunks (granularity of
3DSTATE_SBE_MESH.Per[Primitive|Vertex]URBEntryOutputReadLength)
are passed to fragment shaders as inputs (either non-interpolated
for per-primitive and flat vertex attributes or interpolated
for non-flat vertex attributes).

Some attributes have a special meaning and must be placed in separate
8/16-dword slot called Primitive Header or Vertex Header.

Primitive Header contains 4 such attributes (Cull Primitive,
ViewportIndex, RTAIndex, CPS), leaving 4 dwords (the rest of 8-dword
slot) potentially unused.

Vertex Header is similar - it starts with 3 unused dwords, 1 dword for
Point Size (but if we declare that shader doesn't produce Point Size
then we can reuse it), followed by 4 dwords for Position and optionally
8 dwords for clip distances.

This means we have an interesting optimization problem - we can put
some user attributes into holes in Primitive and Vertex Headers, which
may lead to smaller MUE size and potentially more mesh threads running
in parallel, but we have to be careful to use those holes only when
we need it, otherwise we could force HW to pass too much data to
fragment shader.

Example 1:
Let's assume that Primitive Header is enabled and user defined
12 dwords of per-primitive attributes.

Without packing we would consume 8 + ALIGN(12, 8) = 24 dwords of
MUE space and pass ALIGN(12, 8) = 16 dwords to fragment shader.

With packing, we'll consume 4 + 4 + ALIGN(12 - 4, 8) = 16 dwords of
MUE space and pass ALIGN(4, 8) + ALIGN(12 - 4, 8) = 16 dwords to
fragment shader.

16/16 is better than 24/16, so packing makes sense.

Example 2:
Now let's assume that Primitive Header is enabled and user defined
16 dwords of per-primitive attributes.

Without packing we would consume 8 + ALIGN(16, 8) = 24 dwords of
MUE space and pass ALIGN(16, 16) = 16 dwords to fragment shader.

With packing, we'll consume 4 + 4 + ALIGN(16 - 4, 8) = 24 dwords of
MUE space and pass ALIGN(4, 8) + ALIGN(16 - 4, 8) = 24 dwords to
fragment shader.

24/24 is worse than 24/16, so packing doesn't make sense.

This change doesn't affect vk_meshlet_cadscene in default configuration,
but it speeds it up by up to 25% with "-extraattributes N", where
N is some small value divisible by 2 (by default N == 1) and we
are bound by URB size.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
(cherry picked from commit c1685f08dd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:20 -07:00
Marcin Ślusarz
43bcf577be intel/compiler/mesh: compactify MUE layout
Instead of using 4 dwords for each output slot, use only the amount
of memory actually needed by each variable.

There are some complications from this "obvious" idea:
- flat and non-flat variables can't be merged into the same vec4 slot,
  because flat inputs mask has vec4 stride
- multi-slot variables can have different layout:
   float[N] requires N 1-dword slots, but
   i64vec3 requires 1 fully occupied 4-dword slot followed by 2-dword slot
- some output variables occur both in single-channel/component split
  and combined variants
- crossing vec4 boundary requires generating more writes, so avoiding them
  if possible is beneficial

This patch fixes some issues with arrays in per-vertex and per-primitive data
(func.mesh.ext.outputs.*.indirect_array.q0 in crucible)
and by reduction in single MUE size it allows spawning more threads at
the same time.

Note: this patch doesn't improve vk_meshlet_cadscene performance because
default layout is already optimal enough.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
(cherry picked from commit a252123363)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-21 16:06:20 -07:00
Rhys Perry
9e76138d41 radv: fix 128bpp comp-to-single clears
We were clearing GB to A, instead of R.

This fixes some red tinting in Overwatch 2 when shadow quality is set to
"Ultra".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 7451eb1d61 ("radv: implement DCC fast clears with comp-to-single")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9446
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
(cherry picked from commit e2c7ce3719)
2023-09-21 16:06:20 -07:00
Dylan Baker
59b89236da .pick_status.json: Updates notes for 9865e5dff4 2023-09-21 16:06:20 -07:00
Dylan Baker
4e5d6dbd3b .pick_status.json: Updates notes for 7e246f7f2b 2023-09-21 16:06:20 -07:00
Tapani Pälli
07780f12dc mesa: fix some TexParameter and SamplerParameter cases
EXT extension was added without tests so these functions did
not work properly.

Fixes: 799710be88 ("mesa: Add EXT_texture_mirror_clamp_to_edge to extension table")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24845>
(cherry picked from commit d65fe6eff1)
2023-09-21 16:06:20 -07:00
Dylan Baker
07310546ba .pick_status.json: Updates notes for 93b4f200de 2023-09-21 16:06:20 -07:00
Georg Lehmann
5d0248db61 aco: fix u2f16 with 32bit input
The vulkan spec says all conversions are correctly rounded, so if the input
is larger than the largest fp16 value, we need to return MAX_FLOAT/inf
instead of cutting off the msbs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24826>
(cherry picked from commit 6d949e18fd)
2023-09-21 16:06:20 -07:00
Rhys Perry
f179d999fc aco: fix p_bpermute_gfx6 with input at non-zero byte
Same as the other bpermute pseudo instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
(cherry picked from commit 85957dd6e5)
2023-09-21 16:06:20 -07:00
Mike Blumenkrantz
14ae64b72c zink: don't start multiple cache jobs for the same program
if there's already a cache job in flight then starting a second one
is illegal

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
(cherry picked from commit d5157356ce)
2023-09-21 16:06:20 -07:00
Sagar Ghuge
23ed4fbd06 blorp: Drop unnecessary assertions in blorp_can_hiz_clear_depth
We already checks for the alignment and the multislice surface, we don't
need to add assertions around those two.

fixes: 37fcbb375c ("blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too")
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9684

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24837>
(cherry picked from commit 839b03cc06)
2023-09-21 16:06:20 -07:00
Friedrich Vock
d4c1a169ca nir/load_store_vectorize: Handle intrinsics with constant base
This includes nir_load_stack and nir_store_stack, which are vectorized
in nir_lower_shader_calls. If not adjusted, we end up loading from
the wrong base.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
(cherry picked from commit a28ff7f240)
2023-09-21 16:06:20 -07:00
Chia-I Wu
49e7dde502 ac/surface: limit RADEON_SURF_NO_TEXTURE to color surfaces
For z surfaces, flags.texture should be based on
RADEON_SURF_TC_COMPATIBLE_HTILE alone.  Otherwise, addrlib could pick a
_X/_T swizzle mode for a MSAA depth texture, which is said to be broken:

  When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane
  equation from wrong address within memory range a tile covered and use the
  garbage data for compressed Z reading which finally leads to corruption.

Fixes: de0885cdb8 ("amd/surface: add RADEON_SURF_NO_TEXTURE flag")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24767>
(cherry picked from commit e74c3dbb70)
2023-09-21 16:06:20 -07:00
Mike Blumenkrantz
3e0711bd8d zink: wait on async fence during ctx program removal
removed=true implies that no async jobs are outstanding

fixes #9580

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24811>
(cherry picked from commit ca987c0dfb)
2023-09-21 16:06:20 -07:00
Tatsuyuki Ishi
7b821c820c radv/amdgpu: Do not pass in a BO handle when clearing PRT VA region.
This field is invalid to access for virtual BOs.

Fixes: a931d5a4a4 ("radv/winsys: clear the PRT VA range when destroying a virtual BO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24805>
(cherry picked from commit 6c5512568b)
2023-09-21 16:06:20 -07:00
Samuel Pitoiset
00abc931bc Revert "radv/amdgpu: skip adding per VM BOs for sparse during CS BO list build"
This reverts commit 51caece74c.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
(cherry picked from commit e3fae01730)
2023-09-21 16:06:20 -07:00
Samuel Pitoiset
86ff49871d Revert "radv/amdgpu: workaround a kernel bug when replacing sparse mappings"
This workaround was added temporarily but it can actually cause
stuttering in some games like Forza Horizon 5.

The kernel fix
(https://lists.freedesktop.org/archives/amd-gfx/2023-June/094648.html)
landed in some stable kernels (5.15.121+, 6.1.40+ and 6.4.5+). Sadly,
older stable kernels don't have it, so you might experiment random GPU
hangs in games that use sparse mapping. Please ensure your kernel is
up-to-date for the best experience.

This reverts commit 9b00867327.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9443
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
(cherry picked from commit f67eb9ce07)
2023-09-21 16:06:20 -07:00
Marek Olšák
2901f78257 Revert "ac: don't call ac_query_pci_bus_info from ac_query_gpu_info"
This reverts commit a48642400b.

Instead, add a new parameter require_pci_bus_info to control the behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
(cherry picked from commit 5d19a0a19b)
2023-09-21 16:06:20 -07:00
Eric Engestrom
e3bccd57f6 v3d/qpu: fix type of function argument
Fixes: 05c7d9715b ("broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit 953ac9da79)
2023-09-21 16:06:20 -07:00
Eric Engestrom
788c0163eb v3dv: fix shader stage name in error message
Fixes: 60145629a2 ("v3dv: initial CreateGraphicsPipeline/DestroyPipeline implementation")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit 8a1f3d0d73)
2023-09-21 16:06:20 -07:00
Eric Engestrom
ee647aab82 v3dv: fix copy/pasted type of sample
And use the type in functions instead of a generic `uint32_t` to make it
easier to notice the wrong type.

Fixes: 47e02a2ef1 ("v3dv: add a fast path for vkCmdClearAttachments")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit ae0cb0b998)
2023-09-21 16:06:20 -07:00
Eric Engestrom
e6107766a1 v3dv: fix VK_PIPELINE_ROBUSTNESS_{BUFFER,IMAGE}_BEHAVIOR_DEVICE_DEFAULT_EXT copy/paste typo
Fixes: 24d9a80247 ("v3dv: implement VK_EXT_pipeline_robustness")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit 4dc0cb1ebe)
2023-09-21 16:06:20 -07:00
Alyssa Rosenzweig
7bb56a2e65 nir/passthrough_gs: Fix array size
Triangle strips with adjacency have 6 vertices input, so we need an array big
enough for all 6 vertices to avoid overflow. Fixes passthrough GS generated for
KHR-GLES31.core.draw_indirect.basic-mode-*-triangle*adj*.

Fixes: ea14579f3d ("nir: handle primitives with adjacency")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24780>
(cherry picked from commit 558e36f641)
2023-09-21 16:06:20 -07:00
Dylan Baker
dc30d1d4f1 Revert "Revert "intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR""
This reverts commit dd98f98764.
2023-09-21 16:06:20 -07:00
Dylan Baker
fd08444dd5 .pick_status.json: Updates notes for f8cb0d8a44 2023-09-21 16:06:20 -07:00
Alyssa Rosenzweig
d8e10e6346 nir/lower_helper_writes: Consider bindless images
These need to be handled like other image ops.

Fixes KHR-GLES31.core.shader_image_load_store.basic-allTargets-atomicFS on Asahi
with bindless image access forced.

Fixes: 586da7b329 ("nir: Add nir_lower_helper_writes pass")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24778>
(cherry picked from commit 04ba4059b7)
2023-09-21 16:06:20 -07:00
Eric Engestrom
dba163b599 zink: fix format in zink_make_{image,texture}_handle_resident()
`ds->db.format` is a `pipe_format`, while `buffer_infos[handle].format` is
a `VkFormat`; the conversion from one to the other was missing.

Fixes: 99ba529fee ("zink: implement descriptor buffer handling of bindless texture")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24790>
(cherry picked from commit ab0f0d1563)
2023-09-21 16:06:20 -07:00
Eric Engestrom
3ea69bf0fe vc4: drop duplicate .lower_ldexp
It's set 3 lines above already.

Fixes: 2a33ea95d6 ("glsl: Retire ldexp lowering in favor of the nir lowering flag.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24786>
(cherry picked from commit af28356de0)
2023-09-21 16:06:20 -07:00
Pavel Ondračka
4084c2e28d r300: don't abort on flow control when using draw for vs
It can handle it just fine. Around 250 dEQPs go from Skip to Pass.

Fixes: 1021e2b946
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24769>
(cherry picked from commit 8657a09f9a)
2023-09-21 16:06:19 -07:00
Faith Ekstrand
87aa5bdf9b nir: Fix metadata in nir_lower_is_helper_invocation
It does not preserve everything.  It adds and removes instructions and
even adds a variable.

Fixes: f17b41ab4f ("nir: add lowering pass for helperInvocationEXT()")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
(cherry picked from commit 831085afa3)
2023-09-21 16:06:19 -07:00
Sviatoslav Peleshko
51d0d942a0 dri: Use RGB internal formats for RGBX formats
These formats do not contain alpha channel, so their internal formats
should reflect that.

Fixes: bf576772 ("dri_util: add driImageFormatToSizedInternalGLFormat function")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9429
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24580>
(cherry picked from commit e62f2c48a0)
2023-09-21 16:06:19 -07:00
Karol Herbst
3c26800a10 nv50: limit max code uploads to 0x8000
I have no idea why a bigger size doesn't work, the hardware doesn't
complain, but it turns out that uploading big shaders still causes issues
with the old limit. *shrug*

Fixes: 7f63d2ebdb ("nv50: fix code uploads bigger than 0x10000 bytes")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24758>
(cherry picked from commit 3e0cd6dfb9)
2023-09-21 16:06:19 -07:00
Emma Anholt
2d95f4f097 disk_cache: Disable the "List" test for RO disk cache.
It uses a poll function that waits for a second hoping for another thread
to catch up, which is not a reliable way to do synchronization.  The test
has been spuriously failing merges on a regular basis recently.

This is issue #9222, which I'm leaving open until the author can fix the test.

Fixes: 3b69b67545 ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24755>
(cherry picked from commit 4dfd306454)
2023-09-21 16:06:19 -07:00
Mike Blumenkrantz
637f4a50a6 Revert "vk/wsi/x11: handle geometry updating more asynchronously"
This reverts commit 36d5b58317.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24742>
(cherry picked from commit 8f3499bafc)
2023-09-21 16:06:19 -07:00