Commit Graph

101804 Commits

Author SHA1 Message Date
Ilia Mirkin
90bb2d7152 st/mesa: tex offsets can't be in a const or 2d-indexed
All consts are now implicitly 2d (they set .Dimension), so trigger
asserts. Also, the texture offset can't handle any sort of 2d indexing.
While this could be tacked on, this seems unnecessary, just move it off
into a separate temp.

Fixes assertion failure in
tests/spec/arb_gpu_shader5/compiler/builtin-functions/fs-gatherOffset-uniform-offset.frag

Note that this was an issue even before the const-always-2d thing, since
there was no detection of when even a proper second dimension was used,
e.g. for UBO or geom/tess inputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-04-07 16:45:00 -04:00
Ilia Mirkin
2a2b22e9b1 nvc0: restore image binding on RGB10A2, remove from BGR10A2
Fixes a bunch of new CTS pbo tests that use those as an output format,
which the state tracker converts into buffer image writes.

No part of the driver is ready for BGR10A2. It could probably be enabled
on Maxwell+, but seems unnecessary. This error was introduced when
flipping the displayable bit on those formats, which accidentally also
moved the image bit.

Fixes: e1a70aed10 (nv50,nvc0: mark ABGR format as displayable instead of ARGB format)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-04-07 16:45:00 -04:00
Rob Clark
684f7cd7e3 freedreno/ir3: use lower_global_vars_to_local in cmdline compiler
tgsi_to_nir emits things with arrays as global vars.. and nir->ir3 does
lower_locals_to_regs.  But nothing was lowering global to local, which
breaks compiling tgsi shaders

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-04-07 11:33:41 -04:00
Kenneth Graunke
a3782a612f i965: Use %x instead of %u in debug print.
I mistakenly printed out the address as 0x<decimal number> instead of
printing a proper hex number.  This was...surprising.
2018-04-06 22:57:48 -07:00
Dylan Baker
b5f92b6fd4 meson: fix warnings about comparing unlike types
In the old days (0.42.x), when mesa's meson system was written the
recommendation for handling conditional dependencies was to define them
as empty lists. When meson would evaluate the dependencies of a target
it would recursively flatten all of the arguments, and empty lists would
be removed. There are some problems with this, among them that lists and
dependencies have different methods (namely .found()), so the
recommendation changed to use `dependency('', required : false)` for
such cases.  This has the advantage of providing a .found() method, so
there is no need to do things like `dep_foo != [] and dep_foo.found()`,
such a dependency should never exist.

I've tested this with 0.42 (the minimum we claim to support) and 0.45.
On 0.45 this removes warnings about comparing unlike types, such as:

meson.build:1337: WARNING: Trying to compare values of different types
(DependencyHolder, list) using !=.

v2: - Use dependency('', required : false) instead of
      declare_dependency(), the later will always report that it is
      found, which is not what we want.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2018-04-06 15:29:53 -07:00
Ian Romanick
81ed629b38 intel/compiler: Explicitly cast register type in switch
brw_reg::type is "enum brw_reg_type type:4".  For whatever reason, GCC
is treating this as an int instead of an enum.  As a result, it doesn't
detect missing switch cases and it doesn't detect that flow can get out
of the switch.

This silences the warning:

src/intel/compiler/brw_reg.h: In function ‘bool brw_regs_negative_equal(const brw_reg*, const brw_reg*)’:
src/intel/compiler/brw_reg.h:305:1: warning: control reaches end of non-void function [-Wreturn-type]
 }
 ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-04-06 15:22:10 -07:00
Axel Davy
39240926cd st/nine: Declare lighting consts for ff shaders
The lighting constants were not declared previously,
but were accessed with indirect addressing, which is
illegal.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105442

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>
2018-04-06 23:34:31 +02:00
Caio Marcelo de Oliveira Filho
67c728f7a9 nir: rename variables in nir_lower_io_to_temporaries for clarity
In the emit_copies() function, the use of "newv" and "temp" names made
sense when only copies from temporaries to the new variables were
being done. But now there are other calls to copy with other pairings,
and "temp" doesn't always refer to a temporary created in this
pass. Use the names "dest" and "src" instead.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-04-06 11:08:08 -07:00
Samuel Pitoiset
8f9f62c2db radv: don't pass the pipeline to radv_flush_constants()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-04-06 19:46:27 +02:00
Samuel Pitoiset
2bd50cceff radv: rename radv_cmd_buffer_update_vertex_descriptors()
... to radv_flush_vertex_descriptors().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-04-06 19:46:23 +02:00
Samuel Pitoiset
e829a0cc1e radv: do not try to skip draw calls when VBOs upload failed
This is unnecessary because we record an error which should
be returned by vkEndCommandBuffer(), and the app shouldn't
submit a command buffer when this happens.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-04-06 19:46:21 +02:00
Samuel Pitoiset
f1d7c16e85 radv: fix prefetching compute shaders on CIK and older chips
Because the check was moved to radv_emit_prefetch_L2().

Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2()")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-04-06 19:46:18 +02:00
Samuel Pitoiset
7fe586f6fb radv: only enable PERFECT_ZPASS_COUNTS for precision occlusion queries
This unnecessary when the precision bit flag is not set, and this
might hurt performance. The Vulkan explains that not setting
VK_QUERY_CONTROL_PRECISE_BIT might be more efficient on some
implementations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-04-06 09:07:34 +02:00
Samuel Pitoiset
d53dff3bfc radv: enable the Polaris small primitive filter control
Enable it directly in the preamble, but do not enable line
on Polaris10/11/12 because there is a hw bug.

There is possibly an issue when MSAA is off, but this doesn't
regress any CTS and AMDVLK doesn't have a workaround as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-04-06 09:07:31 +02:00
Jason Ekstrand
c5b87c94d8 anv: Add WSI support for the I915_FORMAT_MOD_Y_TILED_CCS
v2 (Jason Ekstrand):
 - Return the correct enum values from anv_layout_to_fast_clear_type

v3 (Jason Ekstrand):
 - Always return ANV_FAST_CLEAR_NONE and leave doing the right thing for
   the patch which adds a modifier which supports fast-clears.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Daniel Stone <daniels@collabora.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
2018-04-05 21:17:02 -07:00
Anuj Phogat
ff8b82666a Add more Coffee Lake brand strings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2018-04-05 14:50:11 -07:00
Jan Vesely
2406e8848e radeonsi: Reorder checks in si_check_render_feedback
si_get_total_colormask accesses NULL pointer on compute shaders
Fixes crashes on clover
Fixes: 0669dca9c0 ("radeonsi: skip DCC render feedback checking if color writes are disabled")
CC: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-04-05 17:11:18 -04:00
Kevin Rogovin
cc41603d6d intel/tools: new intel_sanitize_gpu tool
Adds a new debug tool to pad each GEM BO allocated with (weak)
pseudo-random noise values which are then checked after each
batchbuffer dispatch to the kernel. This can be quite valuable to
find diffucult to track down heisenberg style bugs.

[scott.d.phillips@intel.com: split to separate tool]

v2: (by Scott D Phillips)
    - track gem handles per fd (Kevin)
    - remove handles on GEM_CLOSE (Kevin)
    - ignore prime handles
    - meson & shell script

v3: (by Scott D Phillips)
    - don't track prime bos at all (Kevin)
    - protect the hash table with a mutex (Kevin)
    - hook fds by drm_version.name, not path (Chris Wilson)

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-04-05 13:52:49 -07:00
Jason Ekstrand
e85b95269e prog/nir: Simplify some load/store operations
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-04-05 13:20:39 -07:00
Marek Olšák
c7dd59b06d radeonsi: fix a crash if ps_shader.cso is NULL in si_get_total_colormask 2018-04-05 15:53:52 -04:00
Marek Olšák
be4250aa88 radeonsi: remove more R600 references
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
c0dfc0c6df radeonsi: try to fix android
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
f55d1f806e radeonsi: try to fix meson
This is not fully tested. Meson can't link LLVM even though automake can.

PATH=/usr/llvm/x86_64-linux-gnu/bin:$PATH meson build/ -Dgallium-va=false \
    -Dplatforms=x11,drm -Dgallium-drivers=radeonsi -Ddri-drivers= \
    -Dgallium-omx=disabled -Dgallium-xvmc=false -Dgles1=false \
    -Dtexture-float=true -Dvulkan-drivers=

src/gallium/auxiliary/libgallium.a(gallivm_lp_bld_misc.cpp.o):
(.data.rel.ro._ZTI26DelegatingJITMemoryManager[_ZTI26DelegatingJITMemoryManager]+0x10):
undefined reference to `typeinfo for llvm::RTDyldMemoryManager'

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
38faac43e3 radeonsi: don't build libradeon.la separately
for better parallelism

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
f9323ddbb9 radeonsi: clean up GET_MAX_VIEWPORT_RANGE definition
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
6a93441295 radeonsi: remove r600_common_context
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
5f77361d2e radeonsi: remove r600_pipe_common::screen
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
321bd6c280 radeonsi: move r600_buffer_common.c and r600_texture.c into radeonsi
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
d58080b318 radeonsi: move r600_gpu_load.c to si_gpu_load.c
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
f7f4ba5306 radeonsi: move r600_query.c/h files to si_query.c/h
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
5777488406 radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
eced536ed6 radeonsi: rename query definitions R600_ -> SI_
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
72e9e98076 radeonsi: move and rename R600_ERR out of r600_pipe_common.h
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
076afb4f0e radeonsi: rename a few R600/r600_ -> SI_/si_
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
5f1cddde78 radeonsi: move definitions out of r600_pipe_common.h
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
a67ee02388 radeonsi: move functions out of and remove r600_pipe_common.c
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
90d12f1d77 radeonsi: rename r600 -> si in some places
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
50c7aa6756 radeonsi: use si_context instead of pipe_context in parameters pt3
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
e332ba61f4 radeonsi: use si_context instead of pipe_context in parameters pt2
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
c424f86180 radeonsi: use si_context instead of pipe_context in parameters pt1
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
2a62e5eec9 radeonsi: pass sctx to si_rebind_buffer and clean up
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
605ba1b9ae radeonsi: use r600_common_context less pt7
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
0b2f2a6a18 radeonsi: use r600_common_context less pt6
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
4c5efc40f4 radeonsi: update copyrights
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
95bc30275b radeonsi: switch radeon_add_to_buffer_list parameter to si_context
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
e5053060eb radeonsi: use r600_common_context less pt5
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
884fd97f6b radeonsi: use r600_common_context less pt4
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
a8291a23c5 radeonsi: use r600_common_context less pt3
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
3069cb8b78 radeonsi: use r600_common_context less pt2
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00
Marek Olšák
71d9028b7a radeonsi: use r600_common_context less pt1
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-04-05 15:34:58 -04:00