The following chain of events results in an incorrectly sized buffer
persisting beyond its useful lifetime, and causing visual artifacts.
buffer is attached at size A
window is resized to size B
rendering takes place for size B
window is resized back to size A
swapbuffers with damage is called
In this scenario, update_buffers fails to recognize that the surface it's
about to commit is a different size than it has rendered. The
attached_width and attached_height are set incorrectly, and periodic
flickering is observed.
Instead, we set a boolean flag at time of resize and use this at the time
we latch the window dimensions as surface dimensions to decide whether to
discard stale buffers.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13270>
(cherry picked from commit 28d12716e8)
originally, a slab attempts to reclaim a single bo. there are two outcomes
to this which can occur:
* the bo is reclaimed
* the bo is not reclaimed
if the bo is reclaimed, great.
if the bo is not reclaimed, it remains at the head of the list until it can
be reclaimed. this means that any bo with a "long" work queue which makes it
into a slab will effectively kill the entire slab. in a benchmarking scenario,
this can occur in rapid succession, and every slab will get 1-2 suballocations
before it reaches a bo that blocks long enough for a new slab to be needed.
the inevitable result of this scenario is that all memory is depleted almost instantly,
all because pb assumes that if the first bo in the reclaim list isn't ready, none of them
can be ready
for drivers like radeonsi, this happens to be a fine assumption
for drivers like zink, this is entirely not workable and explodes the gpu
Cc: mesa-stable
Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13345>
(cherry picked from commit 3d6c8829f5)
Scratch patching code in iris_upload_dirty_render_state (see MERGE_SCRATCH_ADDR
calls) assumes that in all shader stages derived_data field stores 3DSTATE_XS
packet first.
This is not true for TESS_EVAL (DS), so we end up patching 3DSTATE_TE
instead of 3DSTATE_DS leading to DWordLength becoming 11 instead of 9
(9 == 3DSTATE_DS.DWordLength, 2 == 3DSTATE_TE.DWordLength, and 9|2 == 11),
and hardware hanging on the next instruction.
Fix this by reversing the order of packets for TESS_EVAL stage.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5499
Fixes: 4256f7ed58 ("iris: Fill out scratch base address dynamically")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13358>
(cherry picked from commit 5387522bd0)
When eglReleaseThread() is called from application's
destructor (API with __attribute__((destructor))),
it crashes due to invalid memory access.
In this case, _egl_TLS is freed in the flow of
_eglAtExit() as below but _egl_TLS is not set to NULL.
_eglDestroyThreadInfo
_eglFiniTSD
_eglAtExit
_run_exit_handlers
exit
Later when the eglReleaseThread is called from
application's destructor, it ends-up accessing
the freed _egl_TLS pointer.
eglReleaseThread -> in libEGL_mesa
eglReleaseThread -> in libEGL(glvnd)
destructor() -> App's destructor
To resolve the invalid access, setting the _egl_TLS
pointer as NULL after freeing it.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5466
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13302>
(cherry picked from commit 796c9ab3fd)
This sets the conformance version to 0.0.0.0 for GPUs that have
incomplete support for vulkan, so that it's easier to check if vulkan is
fully supported by a GPU at runtime for applications/libraries.
$ vulkaninfo|grep conf
MESA-INTEL: warning: Ivy Bridge Vulkan support is incomplete
conformanceVersion = 0.0.0.0
Signed-off-by: Clayton Craft <clayton@craftyguy.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13275>
(cherry picked from commit b2ef7e6d6b)
VK_ERROR_INITIALIZATION_FAILED can happen as part of device creation and
isn't really an instance error in that case.
VK_ERROR_EXTENSION_NOT_PRESENT, on the other hand, is always an instance
thing and we should handle it as such.
Fixes: 0cad3beb2a ("vulkan/log: Add common vk_error and vk_errorf helpers")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13341>
(cherry picked from commit 071437d29d)
Mapping unimplemented entrypoints to a global function pointer variable
initialized to NULL is a bit cumbersome, and actually led to a bug
in the vk_xxx_dispatch_table_from_entrypoints() template: the !override
case didn't have the right check on the source table entries. Instead of
fixing that case, let's simplify the logic by creating a stub function
and making the alternatename pragma point to this stub. This way we get
rid of all those uneeded xxx_Null symbols/variables and simplify the
tests in vk_xxxx_dispatch_table_from_entrypoints().
Cc: mesa-stable
Fixes: 98c622a96e ("vulkan: Update dispatch table gen for Windows")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13348>
(cherry picked from commit 6d44b21d4f)
Two carchase compute shaders (shader-db) and two Fallout 4 fragment
shaders (fossil-db) were helped. Based on the NIR of the shaders, all
four had structures like
for (i = 0; i < 1; i++) {
...
for (...) {
...
}
}
All HSW+ platforms had similar results. (Ice Lake shown)
total loops in shared programs: 6033 -> 6031 (-0.03%)
loops in affected programs: 4 -> 2 (-50.00%)
helped: 2
HURT: 0
All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs: 143692018 -> 143692006 (-0.0%)
SENDs in all programs: 6947154 -> 6947154 (+0.0%)
Loops in all programs: 38285 -> 38283 (-0.0%)
Cycles in all programs: 8434822225 -> 8434476815 (-0.0%)
Spills in all programs: 191665 -> 191665 (+0.0%)
Fills in all programs: 298822 -> 298822 (+0.0%)
In the presense of loop unrolling like this, the change in cycles is not
accurate.
v2: Rearrange the logic in the if-condition to read a little better.
Suggested by Tim.
Closes: #5089
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit ae99ea6f4d)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13366>
Apparently, we've been requiring a 4K alignment for internally allocated
clear color addresses to work around some unknown issues. There's a
comment to that effect in iris_resource_create_with_modifiers().
When importing a dmabuf and tacking on an additional clear color BO, we
only required an alignment of 1. This wasn't a problem for a long time
because all BO allocations were naturally aligned to the 4K page size.
However, once we enabled suballocation, we were able to allocate "BOs"
at 256B granularity, making this no longer 4K aligned. Increase the
alignment requirement to 4K to match the behavior of our normal
allocations and also our previous behavior.
Fixes Piglit's ext_image_dma_buf_import-intel-modifiers.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5482
Fixes: ce2e2296ab ("iris: Suballocate BO using the Gallium pb_slab mechanism")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13326>
Since we're not checking for this, xcb has to do it for us the first
time we call xcb_sync_destroy_fence, which puts a blocking round-trip in
the swapchain destroy path for no reason. Check for the extension so we
have the extension's opcode cached when we need it.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13339>
Only try to invalidate L2 if we actually hit one of the incoherent images.
Note we may actually insert some extra flushes at the end of a command
buffer so that we may asume the caches are clean the start of the next
command buffer. However, on average I think that case is uncommon
enough that being able to make assumptions at the start of a cmdbuffer
is beneficial. Especially since MSAA is somewhat rare in more recent
games.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13239>
By default line mode is VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT,
when lineRasterizationMode is VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT
and primtype is line - we enable bresenham line mode.
We have to disable MSAA when bresenham lines are used, this is
a hardware limitation and spec allows it:
"When Bresenham lines are being rasterized, sample locations may
all be treated as being at the pixel center (this may affect
attribute and depth interpolation)."
This forces us to re-emit msaa state when line mode is changed.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
This bit seems like the control for line mode of rastrization.
That can be simply figured out by comparing
dEQP-VK.rasterization.primitives.no_stipple.bresenham_lines,
dEQP-VK.rasterization.primitives.no_stipple.rectangular_lines and
dEQP-VK.rasterization.primitives.no_stipple.lines.
For opengl, the value of bresenham lines mode, which is 0, is set
by default and the value of rectangular mode, which is 0x1, is set
when multi-sampled.
For vulkan, the bresenham lines are enabled when lineRasterizationMode is
VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT, which sets the bit to 0, while
the value is 1 when it's VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT,
that seems to be default.
If both multi-sampled and bresenham-lines are used when primitive type is
line, the bit is to be set as 0 and makes msaa disabled.
Note that this is only tested on a6xx, but I guess it's likely the same
for a5xx.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
