Commit Graph

183197 Commits

Author SHA1 Message Date
Mark Janes
7354d3a947 intel/dev: improve descriptions of workaround macros.
Instructions for INTEL_WA_{num}_GFX_VER macros were confusing and
contradicted itself.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26898>
2024-01-05 22:51:45 +00:00
Yonggang Luo
d6c258d9ee util: Add align_uintptr and use it treewide to replace ALIGN that works on size_t and uintptr_t
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26866>
2024-01-05 21:54:35 +00:00
Yonggang Luo
aa8ea0f1b9 glsl: Fixes glcpp/tests with mingw/gcc
glcpp mingw failing in the following way:
```
49/56 mesa:compiler+glcpp / glcpp test (unix)     FAIL             3.39s   exit status 1
50/56 mesa:compiler+glcpp / glcpp test (oldmac)   FAIL             3.41s   exit status 1
51/56 mesa:compiler+glcpp / glcpp test (bizarro)  FAIL             3.42s   exit status 1
52/56 mesa:compiler+glcpp / glcpp test (windows)  FAIL             3.45s   exit status 1
```

The test failed because on mingw, the stderr will comes after stdout,
but all the expect files, the stderr is coming first,
so we flush(stderr) first to makesure stderr out before stdout

The failing example:

039-func-arg-obj-macro-with-comma: FAIL
---

+++

@@ -1,3 +1,5 @@

+0:12(21): preprocessor error: Error: macro foo invoked with 2 arguments (expected 1)
+

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26778>
2024-01-05 21:15:58 +00:00
Rhys Perry
ae54cbeb3f nir: remove sad_u8x4
All uses of this can be replaced with msad_4x8.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26907>
2024-01-05 18:55:22 +00:00
Rhys Perry
5fd747a502 radv: enable msad_4x8
This helps some FSR3 shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26907>
2024-01-05 18:55:22 +00:00
Rhys Perry
a339699b5c ac/llvm: implement msad_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26907>
2024-01-05 18:55:22 +00:00
Rhys Perry
1410735a62 aco: implement msad_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26907>
2024-01-05 18:55:22 +00:00
Rhys Perry
e86ab8173b nir/algebraic: optimize vkd3d-proton's MSAD
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26907>
2024-01-05 18:55:22 +00:00
Rhys Perry
0477421f7d nir: add msad_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26907>
2024-01-05 18:55:22 +00:00
Konstantin Seurer
c511b8968a radv: Implement VK_KHR_ray_tracing_position_fetch
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26895>
2024-01-05 18:20:20 +00:00
Rhys Perry
24ef827f71 radv: remove radv_shader_info's cs.subgroup_size
This is the same as wave_size.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26894>
2024-01-05 17:35:48 +00:00
Rhys Perry
59dbe633e3 radv: use CS wave selection for task shaders
This uses wave32 for small workgroups and wave64 when certain subgroup
operations are used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26894>
2024-01-05 17:35:48 +00:00
Rhys Perry
3009dcd102 aco: correctly set min/max_subgroup_size for wave32-as-wave64
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26894>
2024-01-05 17:35:48 +00:00
Friedrich Vock
1e3541728b radv,aco: Convert 1D ray launches to 2D
Because we use unaligned dispatches, 1D launches only use 8 threads per
wave. Converting to 2D and fixing up launch IDs in the prolog
significantly increases occupancy.

Gives ~30% uplift in Ghostwire Tokyo.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26105>
2024-01-05 17:08:05 +00:00
Juan A. Suarez Romero
12563a527f ci/v3d: add support for rpi5
Add full Vulkan CTS testing for the new V3D 7.1 driver, used in the
Raspberry Pi 5.

So far we add it to run nightly; in future will be added to pre-merge
CI.

Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26705>
2024-01-05 16:10:50 +00:00
Mary Guillemard
b6d828576e zink: Always fill external_only in zink_query_dmabuf_modifiers
Fix piglit.spec@ext_image_dma_buf_import@ext_image_dma_buf_import-modifiers
randomly skipping some tests as external_only content was never initialized.

Cc: mesa-stable

Reviewed-by: default avatarMike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26305>
2024-01-05 13:30:45 +00:00
Mary Guillemard
db0f177edd zink: Initialize pQueueFamilyIndices for image query / create
Fixes: d922850e36 ("zink: break out image/buffer create info structs into helper funcs")

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26303>
2024-01-05 13:59:49 +01:00
Georg Lehmann
71edf4de5e aco/gfx12: implement broadcast dmask shrink behavior
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26897>
2024-01-05 12:03:54 +00:00
Georg Lehmann
4a6ee2c483 aco: shrink buffer stores with undef/zero components
Buffer stores store 0 like image stores for unspecified components.

Foz-DB Navi21:
Totals from 91 (0.11% of 79330) affected shaders:
Instrs: 63327 -> 63121 (-0.33%)
CodeSize: 315312 -> 314440 (-0.28%); split: -0.28%, +0.00%
VGPRs: 3144 -> 3120 (-0.76%)
Latency: 441424 -> 441300 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 65501 -> 65130 (-0.57%)
Copies: 6197 -> 5999 (-3.20%)
PreVGPRs: 2197 -> 2182 (-0.68%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26897>
2024-01-05 12:03:54 +00:00
Connor Abbott
862df28f6b ir3/legalize: Fix helper propagation with b.any/b.all/getone
We need to set uses_helpers_beginning in order to propagate it to
predecessor blocks.

Fixes: aa322a37fc ("ir3: Implement helper invocation optimization")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26564>
2024-01-05 11:37:09 +00:00
Yonggang Luo
91ec3cc7e2 panfrost: Avoid use align as variable, replace it with other names
align is a function and when we want use it, the align variable will shadow it
So replace it with other names

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26885>
2024-01-05 02:42:05 +00:00
Yonggang Luo
b389bccccd util,compiler: Avoid use align as variable, replace it with other names
align is a function and when we want use it, the align variable will shadow it
So replace it with other names

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26885>
2024-01-05 02:42:05 +00:00
Karol Herbst
5ff33f9905 rusticl: use real buffer for cb0 for drivers prefering
At the moment it's radeonsi and zink.

Consequentially this also fixes data races in zink due to driver internal
reasons.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25946>
2024-01-05 01:26:44 +01:00
Karol Herbst
900ce1f4f4 rusticl/queue: release bound constant buffer
This fixes memory leaks in drivers.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25946>
2024-01-05 01:26:44 +01:00
Karol Herbst
5f97ef3d03 rusticl: add QueueContext to track GPU state
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25946>
2024-01-05 01:26:44 +01:00
Karol Herbst
a4f47ba52c rusticl: specify buffer bindings explicitly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25946>
2024-01-05 01:26:44 +01:00
Caio Oliveira
77f4f3112d intel/fs: Use linear allocator in fs_live_variables
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25670>
2024-01-04 23:06:07 +00:00
Caio Oliveira
b5cd91501d intel/fs: Use linear allocator in opt_copy_propagation
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25670>
2024-01-04 23:06:07 +00:00
Caio Oliveira
6d2503e935 intel/fs: Only allocate acp_entry if we are adding one
In practice it seems we are always entering here, haven't looked
in detail whether at this point we could just assert.  But for now
only allocate a new acp_entry if we are going to add it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25670>
2024-01-04 23:06:07 +00:00
Sagar Ghuge
96e0d979a7 intel/fs: Check fs_visitor instance before using it
On Xe2+, we don't build the SIMD8 shader so this check makes sure we
don't execute the uninitialized invocations.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26886>
2024-01-04 22:24:07 +00:00
Dave Airlie
56a72e014f intel/compiler: reemit boolean resolve for inverted if on gen5
Gen5 adds some boolean conversion instructions after nir emits,
but that nir srcs don't line up with them, so reemit the boolean
conversion if we reemit the inot.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 31b5f5a51f ("nir/opt_if: Simplify if's with general conditions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26782>
2024-01-04 21:27:23 +00:00
Karol Herbst
b06f6e00fb zink: fix heap-use-after-free on batch_state with sub-allocated pipe_resources
zink_bo_create can run into a heap-use-after-free when the bo is still
referencing an batch_state from an older destroyed context. In order to
fix this, every context gives back their batch_states to the zink, where
they can be reused from for new contexts.

Cc: mesa-stable
Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26889>
2024-01-04 20:56:09 +00:00
Juan A. Suarez Romero
e2a7c877ad ci/vc4/v3d: remove some flakes
Remove some flakes not seen in the last 7 months.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26893>
2024-01-04 15:51:30 +00:00
Friedrich Vock
34cc765172 radv/rt: Free traversal NIR after compilation
Could lead to OOM in games that compile RTPSOs often,
like Ghostwire Tokyo.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26892>
2024-01-04 14:48:28 +00:00
Corentin Noël
b8e06fa48a virgl: Only send the same amount of data than declared in pipe_sampler_state
Adjust the masks to only send the data that we are sure to actually use.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26856>
2024-01-04 11:00:12 +00:00
Samuel Pitoiset
395dee0d89 radv: drop si_ prefix from all functions
Most of these functions were copied from RadeonSI but they should be
prefixed with radv_ instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26854>
2024-01-04 08:40:37 +00:00
Samuel Pitoiset
89947eb151 radv: remove radv_write_scissors()
This function is useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26854>
2024-01-04 08:40:36 +00:00
Samuel Pitoiset
dd64293104 radv: rename si_make_texture_descriptor() to gfx6_make_texture_descriptor()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26854>
2024-01-04 08:40:36 +00:00
Samuel Pitoiset
887ac765bb radv: remove duplicated si_tile_mode_index() function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26854>
2024-01-04 08:40:36 +00:00
Samuel Pitoiset
aa1eb54b3b radv: constify a variable in radv_emit_depth_control()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26847>
2024-01-04 07:54:41 +00:00
Samuel Pitoiset
8b7b5be98b radv: disable stencil test without a stencil attachment
Implementations are supposed to do that per the Vulkan spec.

This fixes the following new VKCTS tests
dEQP-VK.pipeline.*.stencil.no_stencil_att.*

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26847>
2024-01-04 07:54:40 +00:00
Pavel Ondračka
cc7ce6c01f r300: mark load_ubo_vec4 with ACCESS_CAN_SPECULATE
This is safe to do in all circumstances due to the age of the hardware.
(we don't have UBOs, just constant registers with automatic OOB checks)

R500 hardware doesn't have standard adress register in fragment shaders
and while we have the loop register which we in theory can use for indirect
access, this is currently not possible to wire through NIR. So anytime
there is an indirect uniform array access in a loop, we end with a if
ladder with size depending on the size of the uniform array. The two worst
behaving apps here are glamor and some GTK shaders, both of which are
sometimes ending over the 512 instructions limit. Flattening the if
ladders helps a LOT, so we can get into the instruction limit in most
cases (all glamor shaders are OK now). So just enable the flattening by
setting all load_ubo_vec4 with ACCESS_CAN_SPECULATE.

Shader-db RV530:
total instructions in shared programs: 128762 -> 128440 (-0.25%)
instructions in affected programs: 540 -> 218 (-59.63%)
helped: 3
HURT: 0
total temps in shared programs: 17543 -> 17550 (0.04%)
temps in affected programs: 11 -> 18 (63.64%)
helped: 0
HURT: 3
total cycles in shared programs: 196984 -> 196657 (-0.17%)
cycles in affected programs: 592 -> 265 (-55.24%)
helped: 3
HURT: 0

LOST:   0
GAINED: 7

No changes for R300/R400 because there we don't have control flow
anyway.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6366
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26877>
2024-01-04 08:27:42 +01:00
Pavel Ondračka
f8a5cba3b4 r300: remove backend LRP lowering
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:01 +01:00
Pavel Ondračka
f62a128274 r300: remove backend CMP lowering
Leave assert in place for now though.

No changes in shader-db.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:01 +01:00
Pavel Ondračka
e6e1da8124 r300: lower ftrunc in NIR
and remove the backend TRUNC lowering.

Shader-db RV370:
total instructions in shared programs: 82155 -> 82154 (<.01%)
instructions in affected programs: 38 -> 37 (-2.63%)
helped: 1
HURT: 0
total consts in shared programs: 80719 -> 80733 (0.02%)
consts in affected programs: 2775 -> 2789 (0.50%)
helped: 0
HURT: 14

Shader-db RV530:
total presub in shared programs: 7676 -> 7702 (0.34%)
presub in affected programs: 81 -> 107 (32.10%)
helped: 0
HURT: 26

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:01 +01:00
Pavel Ondračka
77f429e1a5 r300: fcsel_ge lowering from lowered ftrunc
The fcsel lowering for R3xx happens already in the main loop, here we
only do it for the fcsel_ge that comes from the frunc.

No change in shader-db

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:01 +01:00
Pavel Ondračka
6167f6e096 r300: lower flrp in NIR
Shader-db RV370:
total instructions in shared programs: 82071 -> 82155 (0.10%)
instructions in affected programs: 792 -> 876 (10.61%)
helped: 0
HURT: 12
total temps in shared programs: 12775 -> 12778 (0.02%)
temps in affected programs: 27 -> 30 (11.11%)
helped: 0
HURT: 3
total cycles in shared programs: 128403 -> 128499 (0.07%)
cycles in affected programs: 864 -> 960 (11.11%)
helped: 0
HURT: 12

The same regression for the few GTK shaders that happens with the R500
nir fcsel lowering also happens here due to the
nir_move_vec_src_uses_to_dest.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6126
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:00 +01:00
Pavel Ondračka
ddcf29202d r300: add some more early bool lowering
We can't call nir_lower_bool_to_float too early, because some other
passes like nir_opt_peephole_select will blow up, but we can still do
some selected parts to enable some optimiazions at a later point
(like fcsel(a,b,0) into fmul), etc.

No change in shader-db with RV370 or RV530 at this point.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:00 +01:00
Pavel Ondračka
024491f60f r300: nir fcsel/CMP lowering pass for R500
Right now this is done in the backend so move it up to NIR. Doing this
in the backend is easier, as at that time we can have a better idea
about when we hit the hardware limits of three different TMP sources,
however moving this to NIR allows for some optimizations. Specifically,
at this time if we decide we actually have to lower we still have the
info if we have plain fcsel for which we can save the comparison and
emit flrp only. During translation to TGSI all of fcsel, fcsel_gt, and
fcsel_ge translate to CMP so at that point the comparison is always needed.

Shader-db RV530:
total instructions in shared programs: 126057 -> 125823 (-0.19%)
instructions in affected programs: 11359 -> 11125 (-2.06%)
helped: 68
HURT: 12
total temps in shared programs: 17043 -> 17023 (-0.12%)
temps in affected programs: 459 -> 439 (-4.36%)
helped: 32
HURT: 12
total cycles in shared programs: 191604 -> 191294 (-0.16%)
cycles in affected programs: 11834 -> 11524 (-2.62%)
helped: 68
HURT: 12

The hurt shaders are some GTK shaders where there is some bad
interaction with nir_move_vec_src_uses_to_dest. This is known and might
be improved later by thweking the pass more.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:00 +01:00
Pavel Ondračka
75e7790ee5 r300: small adress register load optimization
We do ffloor by default for adress register load so no need to do it
explicitly. This needs to happen after int lowering, otherwise we get
ftrunc by default as a bonus. This is mostly for wined3d.

Shader-db RV370:
total instructions in shared programs: 82147 -> 82071 (-0.09%)
instructions in affected programs: 2772 -> 2696 (-2.74%)
helped: 32
HURT: 0
total cycles in shared programs: 128479 -> 128403 (-0.06%)
cycles in affected programs: 2813 -> 2737 (-2.70%)
helped: 32
HURT: 0

Shader-db RV530:
total instructions in shared programs: 126141 -> 126057 (-0.07%)
instructions in affected programs: 3170 -> 3086 (-2.65%)
helped: 36
HURT: 0
total cycles in shared programs: 191688 -> 191604 (-0.04%)
cycles in affected programs: 3222 -> 3138 (-2.61%)
helped: 36
HURT: 0

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26816>
2024-01-04 08:02:00 +01:00