Commit Graph

183653 Commits

Author SHA1 Message Date
Yonggang Luo
1cc79c6d89 util: Fixes futex_wait on win32
The timeout compute is invalid

Fixes: 095dfc6caa ("util: Move the implementation of futex_wake and futex_wait from futex.h to futex.c")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28473>
(cherry picked from commit 54e3fde5ca)
2024-04-09 21:27:42 +01:00
Samuel Pitoiset
f794f5fa08 radv: enable radv_zero_vram for Red Dead Redemption 2
This fixes some very rare glitches that are unrelated to DCC.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8719
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28393>
(cherry picked from commit a535425fb6)
2024-04-09 21:27:41 +01:00
Georg Lehmann
2f9c2f74ce aco/ra: use SDWA for 16bit instructions when the second byte is blocked
Found by inspection, I think this can happen with pack_32_4x8(f2u8(a@16)),
which will use v_cvt_u16_f16 (a 16bit instruction) with a v1b definition.

No Foz-DB changes on Navi21.

Cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28443>
(cherry picked from commit 80652de67b)
2024-04-09 21:27:40 +01:00
Tapani Pälli
b657ee8138 anv: disable fcv optimization on >= gfx125
Earlier strategy was to enable always on DG2 but there has been bunch of
issues that indicate this feature is not working correctly. Disable
until we figure out issues with it.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28184>
(cherry picked from commit a87d888546)
2024-04-09 21:27:33 +01:00
Kenneth Graunke
92cf2460ef intel/brw: Fix lower_regioning for BROADCAST, MOV_INDIRECT on Q types
For BROADCAST and MOV_INDIRECT, required_exec_type was returning
brw_int_type(type_sz(t), false), which is an unsigned type.  However,
get_exec_type(inst) returns the original type for either Q or UQ.
This meant that has_invalid_exec_type would detect a mismatch and
trigger lowering.

That lowering would insert new 64-bit MOVs, which would need to be
lowered on platforms which don't support Q/UQ.  Except, we already
ran that lowering pass earlier.  So, the unlowered Q/UQ MOVs would
reach the software scoreboarding pass, and trigger failures in the
inferred_exec_pipe() function, as no pipe is available to handle
64-bit integer operations.

It turns out that we don't need the region lowering pass to do
anything for these opcodes.  The generator code for both BROADCAST
and MOV_INDIRECT already handle decomposing Q/UQ operations into
32-bit MOVs when they're not supported.  And, it also implicitly
converts to integer types, even for floating point sources.  The
inferred_exec_pipe function already special cases them to note
that they'll always be handled on the integer pipe, so that matches.

Just drop the region lowering code for these opcodes.

Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28458>
(cherry picked from commit 7a24f29fbb)
2024-04-09 21:22:25 +01:00
Kenneth Graunke
12d72d4d37 intel/brw: Fix generate_mov_indirect to check has_64bit_int not float
We are overriding the type to Q/UQ, so we need to split to two MOVs
if 64-bit integer math is not supported.  For reference, Meteorlake
does support 64-bit floats but would still not work correctly here.

See also brw_broadcast(), which does similar indirects but correctly
checks has_64bit_int instead of has_64bit_float.

Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28458>
(cherry picked from commit a90edad9f7)
2024-04-09 21:20:42 +01:00
Paulo Zanoni
eadd6fd2f8 anv/xe: don't leak xe_syncs during trtt submission
==134077== 96 bytes in 1 blocks are definitely lost in loss record 1 of 3
==134077==    at 0x4840808: malloc (in /usr/libexec/valgrind/vgpreload_memcheck-amd64-linux.so)
==134077==    by 0x6D6F690: vk_default_alloc (vk_alloc.c:26)
==134077==    by 0x52EEEBE: vk_alloc (vk_alloc.h:48)
==134077==    by 0x52EEEEE: vk_zalloc (vk_alloc.h:56)
==134077==    by 0x52EF47E: xe_exec_process_syncs (anv_batch_chain.c:132)
==134077==    by 0x52EF8F6: xe_execute_trtt_batch (anv_batch_chain.c:215)
==134077==    by 0x5301670: anv_queue_submit_trtt_batch (anv_batch_chain.c:1697)
==134077==    by 0x603D135: gfx125_write_trtt_entries (genX_cmd_buffer.c:6091)
==134077==    by 0x5370B44: anv_sparse_bind_trtt (anv_sparse.c:595)
==134077==    by 0x5370CFC: anv_sparse_bind (anv_sparse.c:629)
==134077==    by 0x5370E6E: anv_init_sparse_bindings (anv_sparse.c:670)
==134077==    by 0x5328037: anv_CreateBuffer (anv_device.c:5071)

Note to backporters: this is only for when xe.ko is being used and
ANV_SPARSE_USE_TRTT=1 is exported. This is not the regular code path.

Fixes: 18bd00c024 ("anv/trtt: don't wait/signal syncobjs using the CPU anymore")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28455>
(cherry picked from commit 38af7254e2)
2024-04-09 21:19:14 +01:00
José Roberto de Souza
8f5cdfe3fe iris: Wait for drm_xe_exec_queue to be idle before destroying it
Xe KMD don't refcount anything, so resources could be freed while they
are still in use if we don't wait for exec_queue to be idle.

This issue was found with Xe KMD error capture, VM was already
destroyed when it attemped to capture error state but it can also
happen in applications that did not hang.

This fixed the '*ERROR* GT0: TLB invalidation' errors when running
piglit all test list.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27500>
(cherry picked from commit 665d30b544)
2024-04-09 21:16:54 +01:00
José Roberto de Souza
db324a6bfd anv: Fix calculation of syncs required in Xe KMD
num_syncs was being incremented by one if 'utrace_submit != NULL' but
a sync was only being set if also
'util_dynarray_num_elements(&utrace_submit->batch_bos) == 0'.

This mismatch could cause application to abort due to
'assert(count == num_syncs)'.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27244>
(cherry picked from commit d5ec2fa52f)
2024-04-09 21:16:39 +01:00
Nikita Popov
4b5623a067 Pass no-verify-fixpoint option to instcombine in LLVM 18
When LLVM 18 is used, pass the no-verify-fixpoint option when
running the instcombine pass. Otherwise LLVM may abort with an
error.

The background here is that this option is enabled by default for
testing purposes, because instcombine is normally only explicitly
invoked like this inside tests. If it is used in an actual
production pipeline, the no-verify-fixpoint option needs to be
enabled.

This should fix the issue reported at
https://bugzilla.redhat.com/show_bug.cgi?id=2268800.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28101>
(cherry picked from commit 99f0449987)
2024-04-09 21:16:02 +01:00
Eric Engestrom
ef08816b25 .pick_status.json: Update to 078fe5454e 2024-04-09 21:15:28 +01:00
Iago Toral Quiroga
5254932711 broadcom/compiler: fix workaround for GFXH-1602
In this scenario drivers are adding a dummy attribute with a size
of 1, so we should account for it here.

Fixes missing window decorations with GTK4+.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10853
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28414>
(cherry picked from commit 9fad2922fb)
2024-04-01 16:08:13 +01:00
Iago Toral Quiroga
7cbcbd3bbf v3d: implement fix for GFXH-1602
Same fix as implemented for v3dv.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28414>
(cherry picked from commit ad647e2c90)
2024-04-01 16:08:08 +01:00
David Heidelberg
33da1afe5d docs: we support EGL 1.5 for a long time
Cc: mesa-stable
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28495>
(cherry picked from commit 28a1cdf7e0)
2024-04-01 16:08:05 +01:00
Eric Engestrom
f0ab4edc1b .pick_status.json: Update to fcb568a5d5 2024-04-01 16:07:59 +01:00
David Heidelberg
8ab2fb3fe4 r300: add missing copyright header
Missed copyright header in newly added file.

Fixes: 024491f60f ("r300: nir fcsel/CMP lowering pass for R500")
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28384>
(cherry picked from commit a2d3cdd5f2)
2024-04-01 08:26:34 +01:00
David Heidelberg
c84e2e3181 r300: add missing licence to the r300_public.h
Hardly a copyrightable file, though it should inherit the MIT
license as the code originate from MIT licensed r300_winsys.h.

Fixes: 6e3fc2de2a ("r300g: Move bootstrap code to targets")
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28384>
(cherry picked from commit b2ae73b27e)
2024-04-01 08:26:08 +01:00
Zan Dobersek
d7af7fdecc tu: fix memory leaks in tu_shader
When tu_shader object is destroyed through vk_pipeline_cache, the relevant
destroy callback should relay to the general tu_shader_destroy function
that will also clean up owned resources.

During shader creation, the ir3_shader object should be destroyed once the
shader variants are retrieved. Since those variants are owned by tu_shader
they should be freed up in tu_shader_destroy.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: a03525d8db ("tu: Split program draw state into per-shader states")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27847>
(cherry picked from commit 3ee81ffe14)
2024-04-01 08:26:05 +01:00
Ian Romanick
27faffb976 nir: intel/brw: Change the order of sources for nir_dpas_intel
It was by pure luck that all sources (and the result) of nir_dpas_intel
had the same number of components. It is possible to support matrix
sizes where the accumlator matrix and the result matrix are larger
(e.g., 16x8 * 8x16 = 16x16).

This breaks all of the assumptions of NIR's infrastructure for code
generating intrinsics. Fix the by making the accumulator matrix be the
first source. The accumulator and the result will always have the same
dimensions (due to rules of matrix multiplication) and the same type
(due to restructions of the cooperative matrix extension). This forces
them to have the same number of components.

This doesn't fix all the potential problems. NIR expects that all
0-sized sources will have the same number of components. This just
ensures that the result has the correct number of components.

Fixes: 6b14da33ad ("intel/fs: nir: Add nir_intrinsic_dpas_intel")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28404>
(cherry picked from commit a8115221e5)
2024-04-01 08:26:04 +01:00
Ian Romanick
da2e83a332 intel/brw: Use enums for DPAS source regioning
Was previously passing 1, 1, 0 as the regioning. This generated
incorrect disassembly because the encoding for a width of 1 is 0. Use
the enums to ensure the correct values are used.

Fixes: 1c92dad5cb ("intel/disasm: Disassembly support for DPAS")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28404>
(cherry picked from commit c6bd6f2a41)
2024-04-01 08:26:01 +01:00
Ian Romanick
b10ce2157b intel/brw: Clear write_accumulator flag when changing the destination
If the destination was the accumulator but is no longer, having the flag
set is not correct. On Xe2 this also causes a validation error.

v2: Reword the comment to be more clear. Suggested by Jordan.

Fixes: efa4e4bc5f ("intel/fs: Introduce regioning lowering pass.")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28404>
(cherry picked from commit be4fa59a72)
2024-04-01 08:26:00 +01:00
Mike Blumenkrantz
4bd77aff49 zink: only check that CUBE_COMPATIBLE for images doesn't subtract flags
the flags may change if e.g., HOST_TRANSFER is enabled by adding CUBE

fixes #10924

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28460>
(cherry picked from commit edeb3fec4d)
2024-04-01 08:25:59 +01:00
Karol Herbst
6c9706d99e meson: fix link failure with llvm-18
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10739
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10775
cc: mesa-stable

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28267>
(cherry picked from commit 88a9576a3e)
2024-04-01 08:25:57 +01:00
Juston Li
c34dc4bebf Revert "zink: store last pipeline directly for zink_gfx_program::last_pipeline"
This reverts commit be8b7980e6.

Store the cache entry so that the fast path picks up the optimized
pipeline when its available from a background optimized_compile_job().

Observed traces where it would take the fast path back and forth using
an unoptimized pipeline and never pick up the optimized pipeline leading
to >50% fps drop.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28440>
(cherry picked from commit d6978b1af2)
2024-04-01 08:25:54 +01:00
Georg Lehmann
6c4a85a04e aco: don't combine mul+add_clamp to mad_clamp
The result is not the same if the multiplication overflows, mad_clamp
does not truncate between the mul and the add.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28421>
(cherry picked from commit 51a5ebbd01)
2024-04-01 08:25:51 +01:00
Samuel Pitoiset
e0c85b916c radv: fix conditional rendering with mesh+task and multiview (again)
ViewIndex isn't allowed with task shaders and the whole thing was just
wrong.

Fixes GPU hangs with
dEQP-VK.mesh_shader.ext.conditional_rendering.*_multiview.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28157>
(cherry picked from commit bcf793306f)
2024-04-01 08:21:55 +01:00
David Stern
f8bfdc4bbb vulkan/wsi/x11: Explicitly discard errors from xcb_present_pixmap.
Errors produced by the call to `xcb_present_pixmap` should be explicitly
discarded to ensure they don't leak into the application event loop.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Fixes: 2b885b23 ("vk/wsi/x11: stop roundtripping on presentation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28402>
(cherry picked from commit 82ed8aadea)
2024-04-01 08:14:33 +01:00
Lucas Stach
3a181751ee etnaviv: fix depth writes without testing
Depth writes are only gated by the depth writemask. The state object
member depth_enabled must only affect depth testing.

Fixes: b29fe26d43 ("etnaviv: rework ZSA into a derived state")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28403>
(cherry picked from commit 3a10d1be0e)
2024-04-01 08:12:53 +01:00
Eric Engestrom
60c5bc93b4 .pick_status.json: Update to 3d68dd78d0 2024-04-01 08:11:08 +01:00
Eric Engestrom
06d94df022 docs: add sha256sum for 24.0.4 2024-03-27 21:54:17 +00:00
Eric Engestrom
bb6a55b75b VERSION: bump for 24.0.4 mesa-24.0.4 2024-03-27 21:45:03 +00:00
Eric Engestrom
ea5e99da51 docs: add release notes for 24.0.4 2024-03-27 21:44:22 +00:00
Dave Airlie
25dac7bc12 radv/video: fix h265 decode with unaligned w/h
This is similiar to the h264 fix done previously.

Fixes decoding with the nvpro samples app and a test video.

Fixes: db62c38091 ("radv: add vcn h265 decode.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28359>
(cherry picked from commit 4fc2ab43c0)
2024-03-27 19:33:04 +00:00
Kenneth Graunke
0bc813906c intel/brw: Fix opt_split_sends() to allow for FIXED_GRF send sources
opt_copy_propagation() can sometimes propagate FIXED_GRF sources into
SHADER_OPCODE_SENDs as the message payload.  For example, GS input
reads, which simply take a URB handle and have the offset in the
descriptor.  For non-VGRFs, there isn't a payload to split, so just
skip past such send messages.

Fixes: 589b03d02f ("intel/fs: Opportunistically split SEND message payloads")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28067>
(cherry picked from commit ba11127944)
2024-03-27 19:33:04 +00:00
Charlie Turner
f942a50676 {vulkan,radv,anv}/video: fix issue in H264 scaling lists derivation
Originally was trying to copy a pps's scaling list when an sps's was
signaled.

Fixes: 8daa32963 ("vulkan/video: add helper to derive H264 scaling lists")

Signed-off-by: Charlie Turner <cturner@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28352>
(cherry picked from commit 9e3932e990)
2024-03-27 19:33:04 +00:00
Gert Wollny
9900dc15e4 nir_to_spirv: Allow LOD for external images
External images translate to 2D images in ntv, so we will have to emit
OpImageQuerySizeLod instead of OpImageQuerySize (thanks Faith for
pointing that out). This quells

  VUID-VkShaderModuleCreateInfo-pCode-08737

  Image must have either 'MS'=1 or 'Sampled'=0 or 'Sampled'=2
     %32 = OpImageQuerySize %v2int %31

triggred by piglit

  spec@oes_egl_image_external_essl3@oes_egl_image_external_essl3

on Zink.

Fixes: 3f783a3c50
  zink: omit Lod image operand in ntv when not using an image texture dim

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28389>
(cherry picked from commit b6c1390354)
2024-03-27 19:33:04 +00:00
Lionel Landwerlin
acee542721 anv: fix bitfield checks in gfx runtime flushing
s/SET/TEST/

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28387>
(cherry picked from commit 601d219257)
2024-03-27 19:33:04 +00:00
Lionel Landwerlin
0edfbaaf99 anv: fix block pool allocation failure
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28387>
(cherry picked from commit 0264fc688f)
2024-03-27 19:33:04 +00:00
Lionel Landwerlin
7c6ea9011b blorp: handle a few allocation failure cases
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28387>
(cherry picked from commit 1d7c38a5de)
2024-03-27 19:33:04 +00:00
Yusuf Khan
cdfe4171c5 nvk: fix valve segfault from setting a descriptor set from NULL
Reported by Nikita Vilunov and fix found by him when analyzing his
CS2 dump.

cc: mesa-stable

v2: these two need to be zero when set == NULL

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10719
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28353>
(cherry picked from commit 561fae6845)
2024-03-27 19:18:44 +00:00
Boris Brezillon
31be238fe8 panvk: Disable global offset on varying and non-VS attribute descriptors
We are not supposed to apply the vertex index offset to our varying or
non-VS attribute (AKA image) descriptors. While at it, explicitly set
offset_enable to true when emitting vertex attribute descriptors, to
clarify our intentions.

Fixes: c0d6539827 ("panvk: Drop support for Midgard")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28182>
(cherry picked from commit d9d6514fbc)
2024-03-27 19:08:23 +00:00
Faith Ekstrand
32c80c965c nir/gather_types: Support unstructured control-flow
This fixes nir_print for unstructured control-flow.  It's safe to
backport just this patch because the worst case is that we don't set as
many types and not as much gets printed.

Fixes: 260a9167db ("nir/print: Improve NIR_PRINT=print_consts by using nir_gather_ssa_types()")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28300>
(cherry picked from commit 2be97717e6)
2024-03-27 19:07:29 +00:00
Faith Ekstrand
cd6b71cd47 nir/builder: Correctly handle decl_reg or undef as the first instruction
These are both handled by inserting them directly at the top of the
nir_function_impl.  However, if the cursor is already at the top, it
never gets updated so we end up inserting other stuff after the newly
inserted undef or decl_reg.  It's an odd edge case to be sure but I hit
it with my new NIR CF pass for NAK.

Fixes: 1be4c61c95 ("nir/builder: Add a helper for creating undefs")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28300>
(cherry picked from commit a782809f81)
2024-03-27 19:07:27 +00:00
Ruijing Dong
465e9bd99e radeonsi/vcn: update to use correct padding size.
Update padding size calculation to use cropping.
Original method could result in 0 padding, which
generated unnessary noise in the encoding result.

Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9196

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28280>
(cherry picked from commit fecbb4177c)
2024-03-27 19:07:26 +00:00
Ruijing Dong
aade46435a frontends/va: add surface alignment attribute
It is only taking effect in hevc encoding so far.

Cc: mesa-stable
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28280>
(cherry picked from commit b24748a93a)
2024-03-27 19:07:24 +00:00
Ruijing Dong
27c7c50793 radeonsi/vcn: add enc surface alignment caps
set [64x16] as the alignment for hevc
encoding surface.

Cc: mesa-stable
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28280>
(cherry picked from commit 7525d2242b)
2024-03-27 19:07:22 +00:00
Samuel Pitoiset
21e95719ee radv: invalidate L2 metadata for VK_ACCESS_2_MEMORY_READ_BIT
When shaders might read metadata (DCC) this must be flushed.
VK_ACCESS_2_MEMORY_READ_BIT includes all READ bits that are relevant.

I think this issue has been uncoverd since vkd3d-proton d1425ee4
("vkd3d: Use VK_ACCESS_MEMORY_{READ,WRITE}_BIT where appropriate")
because RADV used to be missing VK_ACCESS_2_MEMORY_{READ,WRITE} in the
past and vkd3d-proton added a special workaround that has been removed.

This fixes some DCC corruption in WWE 2K24.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10774
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28332>
(cherry picked from commit 585b4c5a01)
2024-03-27 19:06:37 +00:00
Philipp Zabel
90dc45bcff rusticl: work around reference-to-mutable-static warnings
Creating mutable or shared references to mutable static variables is
discouraged, but still possible by taking a detour to a raw pointer
via the addr_of! / addr_of_mut! macros.

For details, see: https://github.com/rust-lang/rust/issues/114447

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10887
Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28415>
(cherry picked from commit f4199a9b21)
2024-03-27 19:06:01 +00:00
Eric Engestrom
b75b707f96 .pick_status.json: Update to c0875d2156 2024-03-27 18:48:21 +00:00
Matthew Waters
3e0fc344c9 teximage: allow glCopyTex{Sub}Image[123]D into R/RG textures with OpenGL ES 2.0
This is explicitly allowed in the GL_EXT_texture_rg extension.

Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28313>
(cherry picked from commit cf8f894921)
2024-03-24 23:04:54 +00:00