Commit Graph

254 Commits

Author SHA1 Message Date
Samuel Pitoiset
6eb9c86d23 radv: fix VRS subpass attachments with mipmaps
On GFX10.3, the driver should use the VRS image view provided by the
rendering state because it sets the base level correctly. On GFX11+,
using the image view dimension is enough.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29531>
(cherry picked from commit 964f2b8140)
2024-06-05 16:05:07 +02:00
Faith Ekstrand
3b86c96d22 spirv: Handle constant cooperative matrices in OpCompositeExtract
Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
(cherry picked from commit 8fa46b31a8)
2024-06-05 16:05:06 +02:00
Faith Ekstrand
87d89f480b nir: Handle cmat types in lower_variable_initializers
Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
(cherry picked from commit 7e6cd395c7)
2024-06-05 16:05:05 +02:00
Lionel Landwerlin
55a105966d anv: fix Gfx9 fast clears on srgb formats
Only MCS surfaces are affected because SRGB format are not listed as
supporting CCS compression.

Fixes CTS test :
  dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.*_srgb_*sample_count_*
  dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.*srgb*

This is similar to what we did in Iris in f8961ea0 ("iris: Disable
sRGB fast-clears for non-0/1 values").

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10003
Fixes: 4cfb4f7d12 ("anv: support fast color clears on vkCmdClearAttachments")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29518>
(cherry picked from commit d9567b5ee4)
2024-06-05 16:05:03 +02:00
bbhtt
e0405c9670 nvk: Clean up unused header from libdrm_nouveau
This was added in 6e0089307e without a
dependency on libdrm_nouveau. If libdrm is not compiled with nouveau
enabled, the build errors here.

This is currently unused and since
821f4c8d99 removed dependency on
libdrm_nouveau, this should be gone too.

Fixes: 821f4c8d99 ("nouveau: import libdrm_nouveau")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29517>
(cherry picked from commit 4f5503fa2d)
2024-06-05 16:04:26 +02:00
Eric Engestrom
451e723c3e .pick_status.json: Update to 6889a0a5dd 2024-06-05 16:00:13 +02:00
Karol Herbst
2b70963ef4 iris: fix PIPE_RESOURCE_PARAM_STRIDE for buffers
Iris calls iris_resource_get_param with PIPE_RESOURCE_PARAM_STRIDE
internally now when exporting memory objects. OpenCL's gl_sharing allows
to export buffers as well, which do not have strides.

This fixes the assert being hit there for buffers.

Fixes: 831703157e ("iris: Use resource_get_param in resource_get_handle")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29501>
(cherry picked from commit bc149e0303)
2024-06-04 14:40:28 +02:00
Lionel Landwerlin
d5d9dade4b brw: use a single virtual opcode to read ARF registers
In 2c65d90bc8 I forgot to add the new SHADER_OPCODE_READ_MASK_REG
opcode to the list of barrier instruction in the scheduler. Let's just
use a single opcode for all ARF registers that need special
scoreboarding and put the register as source (nicer for the debug
output).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2c65d90bc8 ("intel/brw: ensure find_live_channel don't access arch register without sync")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446>
(cherry picked from commit d8b78924c5)
2024-06-04 14:40:26 +02:00
Ian Romanick
bb08cee929 nir/search: Fix is_16_bits for vectors
Require that all elements of a vector be representable as either
int16_t or uint16_t.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Fixes: 7ef45e661f ("intel/fs: Add constant propagation for ADD3")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
(cherry picked from commit 6e53be2a0a)
2024-06-04 11:50:09 +02:00
Karol Herbst
a1ba39a9eb rusticl/event: fix deadlock when calling clGetEventProfilingInfo inside callbacks
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11243
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29483>
(cherry picked from commit 6f713a764f)
2024-06-04 11:50:07 +02:00
Eric Engestrom
f5a085109c .pick_status.json: Update to 0311ac50ad 2024-06-04 11:49:59 +02:00
Juan A. Suarez Romero
6c28c84871 ci: define SNMP base interface on runner
In order to turn on/off through SNMP DuT under PoE switch, the SNMP key
in some vendors don't directly use the interface number, but a number
shifted a base number.

Define this base number as BM_POE_BASE environment in the runner.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29306>
(cherry picked from commit 90f8be9bda)
2024-05-31 18:06:37 +02:00
Jose Maria Casanova Crespo
68702b795a v3d: really fix CLE MMU errors on 7.1HW Rpi5
Macro values that define values for different HW generations should
use the V3DV_X helper instead of being defined under a V3D_VERSION #if
condition.

Without this change, the original V3D_CLE_READAHEAD and
V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
For the 7.1 HW (RPi5) the 4.2 definitions were applied.

The CLE MMU errors were hidden as they were reported at dmesg as
"MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
client CLE. So fixes all v3d dmesg warnings for PTB MMU errors on RPi5.

With this change we really don't need different functions per HW generation,
so we rename back file v3dx_cl.c to v3d_cl.c. As before, we can use
only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.

Fixes: 11dce2ac81 ("v3d: fix CLE MMU errors avoiding using last bytes of CL BOs.")
Fixes: e2c624e74e ("v3d: Increase alignment to 16k on CL BO on RPi5")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496>
(cherry picked from commit f32a258503)
2024-05-31 13:29:48 +02:00
Jose Maria Casanova Crespo
3f3553dfb9 v3dv: really fix CLE MMU errors on 7.1HW Rpi5
Macro values that define values for different HW generations should
use the V3DV_X helper instead of being defined under a V3D_VERSION #if
condition.

Without this change, the original V3D_CLE_READAHEAD and
V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
For the 7.1 HW (RPi5) the 4.2 definitions were applied.

The CLE MMU errors were hidden as they were reported at dmesg as
"MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
client CLE. So fixes all v3dv dmesg warnings for PTB MMU errors on RPi5.

With this change we really don't need different functions per HW generation,
so we rename back file v3dvx_cl.c to v3dv_cl.c. As before, we can use
only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.

It fixes also an indentation error introduced with 26c8a5cd72.

Fixes: bb77ac983e ("v3dv: Increase alignment to 16k on CL BO on RPi5")
Fixes: 26c8a5cd72 ("v3dv: fix CLE MMU errors avoiding using last bytes of CL BOs.")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496>
(cherry picked from commit 07d3d55783)
2024-05-31 13:29:47 +02:00
Lionel Landwerlin
ee3ed15b51 intel: fix HW generated local-id with indirect compute walker
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5e7f4ff97f ("intel: Add driver support for hardware generated local invocation IDs")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29473>
(cherry picked from commit a1ea0956b4)
2024-05-31 13:29:46 +02:00
Eric Engestrom
15598aa49b .pick_status.json: Update to f32a258503 2024-05-31 13:29:44 +02:00
Eric Engestrom
be0ea0c01f panfrost/ci: add missing genxml trigger path
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29487>
(cherry picked from commit fbb306df15)
2024-05-31 13:29:32 +02:00
Eric Engestrom
34aa074b2d panfrost: mark tests as fixed
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29487>
(cherry picked from commit 3ec480825e)
2024-05-31 13:29:32 +02:00
Eric R. Smith
91db0990f0 panfrost: change default rounding mode for samplers
The SamplerDescriptor structure has a field which describes how
floating point coordinates should be converted to fixed point.
Setting this to "true" (which causes round to nearest even) fixes
a failing CTS test.

The CTS test in question is:
dEQP-GLES31.functional.texture.border_clamp.range_clamp.linear_float_color

The OpenGL spec is somewhat vague about how rounding is to be
performed, so it appears both settings should be legal; this may
indicate a problem with the CTS. Nevertheless "round to nearest even"
is probably a better default and since it fixes the failing test we
may as well use it.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29464>
(cherry picked from commit d91d2c275e)
2024-05-31 13:27:57 +02:00
Karol Herbst
869a117030 rusticl: link against libgalliumvl_stub
Fixes compiling rusticl with certain configurations

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
(cherry picked from commit 691a22f015)
2024-05-31 13:27:56 +02:00
Karol Herbst
da37f699a9 meson: centralize galliumvl_stub handling
This way frontends can simply link against the stub, but get the full
version if it's actually required (e.g. for radeonsi).

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
(cherry picked from commit b6f281bcb5)
2024-05-31 13:27:55 +02:00
Karol Herbst
93ffbd4d69 gallium/vl: remove stubs which are defined in mesa_util
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
(cherry picked from commit 6c9c48a3ae)
2024-05-31 13:27:51 +02:00
Karol Herbst
75a8d20ae6 gallium/vl: stub vl_video_buffer_create_as_resource
It's used by radeonsi

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
(cherry picked from commit 95871d48aa)
2024-05-31 13:27:50 +02:00
Lionel Landwerlin
d8246f604d anv: fix timestamp copies from secondary buffers
We increased the size of the timestamps but only copied 64bit values
from the secondaries.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
(cherry picked from commit 1d4e56d22a)
2024-05-31 13:27:49 +02:00
Lionel Landwerlin
985fff6c40 anv: fix utrace compute walker timestamp captures
The output of the POSTSYNC_DATA has to be 32-byte aligned.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
(cherry picked from commit 1511b25b0f)
2024-05-31 13:27:48 +02:00
Kevin Chuang
fbdf6424a7 anv: Properly fetch partial results in vkGetQueryPoolResults
Currently for an "unavailable" query, if VK_QUERY_RESULT_PARTIAL_BIT is
set, anv will return (slot.end - slot.begin). This can cause underflow
because slot.end might still be at the initial value of 0.

This commit fixes the issue by returning 0 in that situation.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29447>
(cherry picked from commit f8ccf70c99)
2024-05-31 13:27:48 +02:00
Eric Engestrom
cf9e82b281 freedreno/a6xx: fix kernel -> compute handling
9b2780dcaf folds the kernel path into the compute path, and then adds
a `compute -> compute` conversion that was very likely meant to be
`kernel -> compute`, so fix that.

Fixes: 9b2780dcaf ("freedreno/a6xx: Re-work fd6_emit_shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29458>
(cherry picked from commit b8f1e95cbe)
2024-05-31 13:27:47 +02:00
Samuel Pitoiset
b29453c0c5 radv: fix flushing DB meta cache on GFX11.5
Only GFX11 is affected by this hw bug.
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29424>
(cherry picked from commit 07a826ba93)
2024-05-31 13:27:37 +02:00
Iván Briano
9ad3c9db3b anv: check cmd_buffer is on a transfer queue more properly
The queueFlags of the associated queue may have more flags than just the
type of queue it is, based on what that queue supports, like sparse or
protected content. Check that the queue is a blitter engine instead.

Fixes a bunch of dEQP-VK.api.copy_and_blit.core.*_transfer on MTL with
ANV_SPARSE=0

Fixes: 17b8b2cffd ("anv: Add support for a transfer queue on Alchemist")

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29336>
(cherry picked from commit 8d098ecfea)
2024-05-31 13:27:35 +02:00
Mike Blumenkrantz
7550d3bff8 zink: add atomic image ops to the ms deleting pass
this otherwise results in nir validation errors

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11209

Fixes: 90cf8d14d6 ("zink: add a pass to strip out multisample storage image ops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29383>
(cherry picked from commit bc29d2c9fc)
2024-05-31 13:27:32 +02:00
Yusuf Khan
874fc52dd6 zink/query: begin time elapsed queries even if we arent in a rp
If we arent in a renderpass, but still wanna start the time elapsed
query(eg. to figure out how long some random operation will take) then
this seems to fix that case.

Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29411>
(cherry picked from commit 42ee8d80d9)
2024-05-31 13:27:18 +02:00
Eric Engestrom
c0349c0e02 .pick_status.json: Mark 410ca6a3e9 as denominated 2024-05-31 12:47:27 +02:00
Eric R. Smith
9b3418e1c7 panfrost: fix some omissions in valhall flow control
The code for checking flow control did not realize that
`LD_TEX` and `LD_TEX_IMM` were memory accesses, and hence was
not inserting waits where these were necessary. This showed up
as flakes in KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-fs

Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29363>
(cherry picked from commit 272dcaff01)
2024-05-31 12:46:52 +02:00
Tapani Pälli
a5bcd3a2c3 anv/android: enable emulated astc for applications
This layer was blocking Android emulated ASTC support as it did not
take "emu_astc_ldr" in to account.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Mi, Yanfeng <yanfeng.mi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29415>
(cherry picked from commit 6836118cd2)
2024-05-31 12:46:49 +02:00
Konstantin Seurer
b3d9f853cd llvmpipe: Use a second LLVMContext for compiling sample functions
LLVMContextr is not thread safe. There are many code paths that use
llvmpipe_context::context and adding locking to all of them is
difficult and adds unnecessary overhead. This approach restricts locking
to lp_sampler_matrix, which makes covering all uses of the LLVMContext
easy and only adds overhead when running lavapipe.

Fixes: 7ebf7f4 ("llvmpipe: Compile sample functioins on demand")
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29397>
(cherry picked from commit c31038ef98)
2024-05-31 12:46:47 +02:00
Karol Herbst
7981b12585 nouveau: import nvif/ioctl.h file from libdrm_nouveau
Technically this is UAPI and should be moved into the UAPI headers, but
for now let's unbreak users this way.

Fixes: 821f4c8d99 ("nouveau: import libdrm_nouveau")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29420>
(cherry picked from commit 7c07f1cdfb)
2024-05-31 12:46:42 +02:00
Rhys Perry
efaaeac604 radv: malloc graphics pipeline stages
This uses a lot of stack, which is apparently a problem for musl libc.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29379>
(cherry picked from commit c9f5152ddd)
2024-05-31 12:46:36 +02:00
David Rosca
c5cd47dea5 frontends/va: Fix leak when destroying VAEncCodedBufferType
Fixes: be4287c3aa ("pipe: Extend get_feedback with additional metadata")
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29217>
(cherry picked from commit cc03f2ea5a)
2024-05-31 12:46:33 +02:00
Eric R. Smith
882e411e1a glsl: test both inputs when sorting varyings for xfb
In the sort functions used to sort varyings in gl_nir_link_varyings,
we were only checking the first input for whether or not it is xfb.
Check both inputs, and also provide a definite order for the xfb vs.
non-xfb varyings (the xfb come last, as the initial sort established).

This fixes a problem encountered on panfrost, where qsort could
mix xfb and non-xfb varyings which started out separate.

Note that the sort is still not stable. We probably should make it
stable, but that is a more extensive change that's handled in a later
commit.

Cc: mesa-stable
Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29178>
(cherry picked from commit 5102a922e7)
2024-05-31 12:46:31 +02:00
Natanael Copa
eb34c21747 nir/opt_varyings: reduce stack usage
Avoid put a huge struct on stack to fix a stack overflow on musl libc.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10988
Fixes: c66967b5cb (nir: add nir_opt_varyings, new pass optimizing and compacting varyings)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29375>
(cherry picked from commit 0274518615)
2024-05-31 12:46:29 +02:00
Eric R. Smith
11fa599bcd get_color_read_type: make sure format/type combo is legal for gles
The GLES spec limits the valid combinations of format and type that
may be returned by queries and/or used by ReadPixel. The list of valid
combinations appears in table 8.2 of the GLES 3.2 spec. Our code for
reporting the type and format of the current framebuffer, however,
does not verify that the combination is legal for GLES. For example,
RGBA and UNSIGNED_SHORT_1_5_5_5_REV is not a valid GLES combination,
but it's what we were returning for a panthor 16 bit frame buffer.

We can fix this either by changing the format or type that we return
(internally we can handle any format/type combination). We advertise the
read_format_bgra extension, so we could return GL_BGRA for the format.
However, very few applications (including notably the Khronos CTS for GLES)
cope well with BGRA. So instead we change the type to a non-_REV one
so that the combination appears in the GLES spec table of legal values.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29144>
(cherry picked from commit 4d298673da)
2024-05-31 12:46:28 +02:00
Samuel Pitoiset
40e1c62b96 radv: fix setting a custom pitch for CB on GFX10_3+
The gfx_level check was missing the version...

Found by inspection.

Fixes: 3f7ddaf281 ("radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29331>
(cherry picked from commit 2867a07922)
2024-05-31 12:39:09 +02:00
Dave Airlie
e217c0f238 Revert "zink: use a slab allocator for zink_kopper_present_info"
This reverts commit 738fbddca8.

This was missing locking which caused problems

Closes: 11161
Fixes: 738fbddca8 ("zink: use a slab allocator for zink_kopper_present_info")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29338>
(cherry picked from commit 2abdc84606)
2024-05-31 12:34:43 +02:00
Amit Pundir
9e63dfe52d android: Fix zink build failure
Otherwise we run into following build error on Android:

    ld.lld: error: undefined symbol: galliumvk_driver_extensions

Fixes: cfa955ed78 ("glx/egl: fix LIBGL_KOPPER_DISABLE")
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29475>
(cherry picked from commit 38dfbae116)
2024-05-31 08:52:48 +02:00
Jose Maria Casanova Crespo
749a2f92bb v3dv: Emit stencil draw clear if needed for GFXH-1461
Fixes: 1e81bb05ae (v3dv: implement workaround for GFXH-1461)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29427>
(cherry picked from commit 4835dc0e7f)
2024-05-31 08:52:34 +02:00
Iago Toral Quiroga
a2716f97d8 v3dv: fix incorrect index buffer size
When programming the size, we should take into account the
offset from the start of the index buffer address.

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29425>
(cherry picked from commit 70aa470bdb)
2024-05-31 08:52:33 +02:00
Valentine Burley
4319c1c6e8 wsi: Guard DRM-dependent function implementations with HAVE_LIBDRM
Adress an implicit function declaration error by ensuring that DRM-dependent
functions are only compiled when HAVE_LIBDRM is set.

Fixes: 59813ae468 ("wsi: Add common infrastructure for explicit sync")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29267>
(cherry picked from commit d93d989e5d)
2024-05-31 08:52:25 +02:00
Lionel Landwerlin
7261464189 intel/brw: ensure find_live_channel don't access arch register without sync
Another architecture register that requires some care before reading.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 49ee3ae9e8 ("intel/compiler: Lower FIND_[LAST_]LIVE_CHANNEL in IR on Gfx8+")
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29319>
(cherry picked from commit 2c65d90bc8)
2024-05-31 08:52:19 +02:00
Iago Toral Quiroga
1d9ae05492 broadcom/compiler: apply payload conflict to spill setup before RA
We can emit spill setup before RA if we use scratch. In that case
we have the same situation as during spilling, with the caveat that
we have already emitted the instructions so we need to find them
(they should be the only instructions ones before the instructions
accessing payload registers) and flag them as such.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
(cherry picked from commit 865e682ad7)
2024-05-31 08:34:27 +02:00
Iago Toral Quiroga
946ce7a6e6 broadcom/compiler: don't assign payload registers to spilling setup temps
We read our payload registers first in the shader so we generally don't have
to care about temps being allocated to them and stomping their value before
we can read them. Hoewer, spilling setup instructions are an exception since
these will be inserted first when there is any spilling in the program.
To fix this, we flag RA nodes involved with these instructions so we can
then try to avoid assiging these registers to them.

Fixes CTS failures with V3D_DEBUG=opt_compile_time, particularly:
dEQP-VK.binding_model.buffer_device_address.set0.depth2.basessbo.convertcheckuv2.nostore.single.std140.comp_offset_nonzero

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
(cherry picked from commit cb83f25b39)
2024-05-31 08:34:25 +02:00