docs: Add 8.0.3 release notes

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

Makefile

@@ -184,7 +184,7 @@ ultrix-gcc:
 
 # Rules for making release tarballs
 
-PACKAGE_VERSION=8.0-devel
+PACKAGE_VERSION=8.0.3
 PACKAGE_DIR = Mesa-$(PACKAGE_VERSION)
 PACKAGE_NAME = MesaLib-$(PACKAGE_VERSION)
 
@@ -199,6 +199,12 @@ EXTRA_FILES = \
 	src/glsl/glcpp/glcpp-lex.c			\
 	src/glsl/glcpp/glcpp-parse.c			\
 	src/glsl/glcpp/glcpp-parse.h			\
+	src/mesa/main/api_exec_es1.c			\
+	src/mesa/main/api_exec_es1_dispatch.h		\
+	src/mesa/main/api_exec_es1_remap_helper.h	\
+	src/mesa/main/api_exec_es2.c			\
+	src/mesa/main/api_exec_es2_dispatch.h		\
+	src/mesa/main/api_exec_es2_remap_helper.h	\
 	src/mesa/program/lex.yy.c			\
 	src/mesa/program/program_parse.tab.c		\
 	src/mesa/program/program_parse.tab.h

bin/mklib

@@ -334,7 +334,9 @@ case $ARCH in
 	    # environment.  If so, pass -m32 flag to linker.
 	    set ${OBJECTS}
 	    ABI32=`file $1 | grep 32-bit`
-	    if [ "${ABI32}" -a `uname -m` = "x86_64" ] ; then
+	    ARM=`file $1 | grep ARM`
+	    # Do not add "-m32" option for arm.
+            if [ -z "$ARM" -a "${ABI32}" -a `uname -m` = "x86_64" ] ; then
 		OPTS="-m32 ${OPTS}"
 	    fi
 
@@ -391,7 +393,9 @@ case $ARCH in
 	    # environment.  If so, pass -m32 flag to linker.
 	    set ${OBJECTS}
 	    ABI32=`file $1 | grep 32-bit`
-	    if [ "${ABI32}" -a `uname -m` = "x86_64" ] ; then
+            ARM=`file $1 | grep ARM`
+	    # Do not add "-m32" option for arm.
+            if [ -z "$ARM" -a "${ABI32}" -a `uname -m` = "x86_64" ] ; then
 		OPTS="-m32 ${OPTS}"
 	    fi
             if [ "${ALTOPTS}" ] ; then

configs/darwin

@@ -9,8 +9,8 @@ INSTALL_DIR = /usr/X11
 X11_DIR = $(INSTALL_DIR)
 
 # Compiler and flags
-CC = gcc
+CC = $(shell xcrun -find cc)
-CXX = g++
+CXX = $(shell xcrun -find c++)
 PIC_FLAGS = -fPIC
 DEFINES =  -D_DARWIN_C_SOURCE -DPTHREADS -D_GNU_SOURCE \
 	   -DGLX_ALIAS_UNSUPPORTED \
@@ -24,11 +24,14 @@ DEFINES =  -D_DARWIN_C_SOURCE -DPTHREADS -D_GNU_SOURCE \
 # -DIN_DRI_DRIVER
 
 ARCH_FLAGS += $(RC_CFLAGS)
+INCLUDE_FLAGS = -I$(INSTALL_DIR)/include -I$(X11_DIR)/include
+OPT_FLAGS = -g3 -gdwarf-2 -Os -ffast-math -fno-strict-aliasing
+WARN_FLAGS = -Wall -Wmissing-prototypes
 
-CFLAGS =  -ggdb3 -Os -Wall -Wmissing-prototypes -std=c99 -ffast-math -fno-strict-aliasing -fvisibility=hidden \
+CFLAGS = -std=c99 -fvisibility=hidden \
-	-I$(INSTALL_DIR)/include -I$(X11_DIR)/include $(OPT_FLAGS) $(PIC_FLAGS) $(ARCH_FLAGS) $(ASM_FLAGS) $(DEFINES)
+	$(OPT_FLAGS) $(WARN_FLAGS) $(INCLUDE_FLAGS) $(PIC_FLAGS) $(ARCH_FLAGS) $(ASM_FLAGS) $(DEFINES) $(EXTRA_CFLAGS)
-CXXFLAGS =  -ggdb3 -Os -Wall -fno-strict-aliasing -fvisibility=hidden \
+CXXFLAGS = -fvisibility=hidden \
-	-I$(INSTALL_DIR)/include -I$(X11_DIR)/include $(OPT_FLAGS) $(PIC_FLAGS) $(ARCH_FLAGS) $(ASM_FLAGS) $(DEFINES)
+	$(OPT_FLAGS) $(WARN_FLAGS) $(INCLUDE_FLAGS) $(PIC_FLAGS) $(ARCH_FLAGS) $(ASM_FLAGS) $(DEFINES) $(EXTRA_CFLAGS)
 
 # Library names (actual file names)
 GL_LIB_NAME = lib$(GL_LIB).dylib
@@ -44,10 +47,10 @@ GLW_LIB_GLOB = lib$(GLW_LIB).*dylib
 OSMESA_LIB_GLOB = lib$(OSMESA_LIB).*dylib
 VG_LIB_GLOB = lib$(VG_LIB).*dylib
 
-GL_LIB_DEPS = -L$(INSTALL_DIR)/$(LIB_DIR) -L$(X11_DIR)/$(LIB_DIR) -lX11 -lXext -lm -lpthread
+GL_LIB_DEPS = -L$(INSTALL_DIR)/$(LIB_DIR) -L$(X11_DIR)/$(LIB_DIR) -lX11-xcb -lxcb -lX11 -lXext $(EXTRA_LDFLAGS)
-OSMESA_LIB_DEPS =
+OSMESA_LIB_DEPS = $(EXTRA_LDFLAGS)
-GLU_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(GL_LIB)
+GLU_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(GL_LIB) $(EXTRA_LDFLAGS)
-GLW_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(GL_LIB) -L$(INSTALL_DIR)/$(LIB_DIR) -L$(X11_DIR)/$(LIB_DIR) -lX11 -lXt
+GLW_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(GL_LIB) -L$(INSTALL_DIR)/$(LIB_DIR) -L$(X11_DIR)/$(LIB_DIR) -lX11 -lXt $(EXTRA_LDFLAGS)
 
 SRC_DIRS = glsl mapi/glapi mapi/vgapi glx/apple mesa gallium glu
 GLU_DIRS = sgi

configs/darwin-fat-intel

@@ -0,0 +1,7 @@
+# Configuration for Darwin / MacOS X, making 32bit and 64bit fat dynamic libs for intel
+
+RC_CFLAGS=-arch i386 -arch x86_64
+
+include $(TOP)/configs/darwin
+
+CONFIG_NAME = darwin-fat-intel

configs/default

@@ -10,7 +10,7 @@ CONFIG_NAME = default
 # Version info
 MESA_MAJOR=8
 MESA_MINOR=0
-MESA_TINY=0
+MESA_TINY=3
 MESA_VERSION = $(MESA_MAJOR).$(MESA_MINOR).$(MESA_TINY)
 
 # external projects.  This should be useless now that we use libdrm.

configs/linux-dri

@@ -70,7 +70,6 @@ INTEL_CFLAGS = $(shell $(PKG_CONFIG) --cflags libdrm_intel)
 NOUVEAU_LIBS = $(shell $(PKG_CONFIG) --libs libdrm_nouveau)
 NOUVEAU_CFLAGS = $(shell $(PKG_CONFIG) --cflags libdrm_nouveau)
 
-LIBDRM_RADEON_LIBS = $(shell $(PKG_CONFIG) --libs libdrm_radeon)
+RADEON_LIBS = $(shell $(PKG_CONFIG) --libs libdrm_radeon)
-LIBDRM_RADEON_CFLAGS = $(shell $(PKG_CONFIG) --cflags libdrm_radeon)
+RADEON_CFLAGS = $(shell $(PKG_CONFIG) --cflags libdrm_radeon)
-RADEON_CFLAGS = "-DHAVE_LIBDRM_RADEON=1 $(LIBDRM_RADEON_CFLAGS)"
 RADEON_LDFLAGS = $(LIBDRM_RADEON_LIBS)

configure.ac

@@ -88,13 +88,13 @@ AC_COMPILE_IFELSE(
        not clang
 #endif
 ]])],
-[CLANG=yes], [CLANG=no])
+[acv_mesa_CLANG=yes], [acv_mesa_CLANG=no])
 
-AC_MSG_RESULT([$CLANG])
+AC_MSG_RESULT([$acv_mesa_CLANG])
 
 dnl If we're using GCC, make sure that it is at least version 3.3.0.  Older
 dnl versions are explictly not supported.
-if test "x$GCC" = xyes -a "x$CLANG" = xno; then
+if test "x$GCC" = xyes -a "x$acv_mesa_CLANG" = xno; then
     AC_MSG_CHECKING([whether gcc version is sufficient])
     major=0
     minor=0
@@ -168,9 +168,6 @@ esac
 dnl Add flags for gcc and g++
 if test "x$GCC" = xyes; then
     CFLAGS="$CFLAGS -Wall -Wmissing-prototypes -std=c99"
-    if test "x$CLANG" = "xno"; then
-       CFLAGS="$CFLAGS -ffast-math"
-    fi
 
     # Enable -fvisibility=hidden if using a gcc that supports it
     save_CFLAGS="$CFLAGS"
@@ -662,7 +659,7 @@ AC_ARG_ENABLE([gallium_gbm],
     [enable_gallium_gbm=auto])
 
 # Option for Gallium drivers
-GALLIUM_DRIVERS_DEFAULT="r300,r600,swrast"
+GALLIUM_DRIVERS_DEFAULT="r300,r600,svga,swrast"
 
 AC_ARG_WITH([gallium-drivers],
     [AS_HELP_STRING([--with-gallium-drivers@<:@=DIRS...@:>@],
@@ -1566,7 +1563,7 @@ if test "x$enable_gallium_g3dvl" = xyes; then
 fi
 
 if test "x$enable_xvmc" = xyes; then
-    PKG_CHECK_MODULES([XVMC], [xvmc >= 1.0.6 xorg-server])
+    PKG_CHECK_MODULES([XVMC], [xvmc >= 1.0.6])
     GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS xorg/xvmc"
     HAVE_ST_XVMC="yes"
 fi

docs/contents.html

@@ -52,7 +52,6 @@ a:visited {
 
 <b>User Topics</b>
 <ul>
-<li><a href="shading.html" target="MainFrame">Shading Language</a>
 <li><a href="egl.html" target="MainFrame">EGL</a>
 <li><a href="opengles.html" target="MainFrame">OpenGL ES</a>
 <li><a href="openvg.html" target="MainFrame">OpenVG / Vega</a>
@@ -63,6 +62,7 @@ a:visited {
 <LI><A HREF="extensions.html" target="MainFrame">Mesa Extensions</A>
 <LI><A HREF="mangling.html" target="MainFrame">Function Name Mangling</A>
 <LI><A href="llvmpipe.html" target="MainFrame">Gallium llvmpipe driver</A>
+<LI><A href="vmware-guest.html" target="MainFrame">VMware SVGA3D guest driver</a>
 <LI><A href="postprocess.html" target="MainFrame">Gallium post-processing</A>
 <LI><A href="viewperf.html" target="MainFrame">Viewperf Issues</A>
 </ul>

docs/intro.html

@@ -132,12 +132,26 @@ June 2007: Mesa 7.0 is released, implementing the OpenGL 2.1 specification
 and OpenGL Shading Language.
 </p>
 
+<p>
+2008: Keith Whitwell and other Tungsten Graphics employees develop
+<a href="http://en.wikipedia.org/wiki/Gallium3D"  target="_parent">Gallium</a>
+- a new GPU abstraction layer.  The latest Mesa drivers are based on
+Gallium and other APIs such as OpenVG are implemented on top of Gallium.
+</p>
 
 <p>
-Ongoing: Mesa is used as the core of many hardware OpenGL drivers for
+February 2012: Mesa 8.0 is released, implementing the OpenGL 3.0 specification
-the XFree86 and X.org X servers within the
+and version 1.30 of the OpenGL Shading Language.
-<A href="http://dri.freedesktop.org/" target="_parent">DRI project</A>.
+</p>
-I continue to enhance Mesa with new extensions and features.
+
+<p>
+Ongoing: Mesa is the OpenGL implementation for several types of hardware
+made by Intel, AMD and NVIDIA, plus the VMware virtual GPU.
+There's also several software-based renderers: swrast (the legacy
+Mesa rasterizer), softpipe (a gallium reference driver) and llvmpipe
+(LLVM/JIT-based high-speed rasterizer).
+Work continues on the drivers and core Mesa to implement newer versions
+of the OpenGL specification.
 </p>
 
 
@@ -151,6 +165,15 @@ of the OpenGL specification is implemented.
 </p>
 
 
+<H2>Version 8.x features</H2>
+<p>
+Version 8.x of Mesa implements the OpenGL 3.0 API.
+The developers at Intel deserve a lot of credit for implementing most
+of the OpenGL 3.0 features in core Mesa, the GLSL compiler as well as
+the i965 driver.
+</p>
+
+
 <H2>Version 7.x features</H2>
 <p>
 Version 7.x of Mesa implements the OpenGL 2.1 API.  The main feature

docs/news.html

@@ -11,6 +11,32 @@
 <H1>News</H1>
 
 
+<h2>March 21, 2012</h2>
+
+<p>
+<a href="relnotes-8.0.2.html">Mesa 8.0.2</a> is released.
+This is a bug fix release.
+</p>
+
+
+<h2>February 16, 2012</h2>
+
+<p>
+<a href="relnotes-8.0.1.html">Mesa 8.0.1</a> is released.
+This is a bug fix release.
+</p>
+
+
+<h2>February 9, 2012</h2>
+
+<p>
+<a href="relnotes-8.0.html">Mesa 8.0</a> is released.
+This is the first version of Mesa to support OpenGL 3.0 and GLSL 1.30
+(with the i965 driver).
+See the release notes for more information about the release.
+</p>
+
+
 <h2>November 27, 2011</h2>
 
 <p>

docs/relnotes-8.0.1.html

@@ -0,0 +1,153 @@
+<HTML>
+
+<head>
+<TITLE>Mesa Release Notes</TITLE>
+<link rel="stylesheet" type="text/css" href="mesa.css">
+<meta http-equiv="content-type" content="text/html; charset=utf-8" />
+</head>
+
+<BODY>
+
+<body bgcolor="#eeeeee">
+
+<H1>Mesa 8.0.1 Release Notes / February 16, 2012</H1>
+
+<p>
+Mesa 8.0.1 is a bug fix release which fixes bugs found since the 8.0 release.
+</p>
+<p>
+Mesa 8.0 implements the OpenGL 3.0 API, but the version reported by
+glGetString(GL_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.0.
+</p>
+<p>
+See the <a href="install.html">Compiling/Installing page</a> for prerequisites
+for DRI hardware acceleration.
+</p>
+
+
+<h2>MD5 checksums</h2>
+<pre>
+4855c2d93bd2ebd43f384bdcc92c9a27  MesaLib-8.0.1.tar.gz
+24eeebf66971809d8f40775a379b36c9  MesaLib-8.0.1.tar.bz2
+54e745d14dac5717f7f65b4e2d5c1df2  MesaLib-8.0.1.zip
+</pre>
+
+<h2>New features</h2>
+<p>None.</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=28924">Bug 28924</a> - [ILK] piglit tex-border-1 fail</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=40864">Bug 40864</a> - [bisected pineview] oglc pxconv-gettex(basic.allCases) fails on pineview</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=43327">Bug 43327</a> - [bisected SNB] HiZ make many oglc cases regressed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=44333">Bug 44333</a> - [bisected] Color distortion with xbmc mediaplayer</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=44927">Bug 44927</a> - [SNB IVB regression] gl-117 abort when click</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45221">Bug 45221</a> - [bisected IVB] glean/fbo regression in stencil-only case</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45877">Bug 45877</a> - main/image.c:1597: _mesa_convert_colors: Assertion `dstType == 0x1406' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45578">Bug 45578</a> - main/image.c:1659: _mesa_convert_colors: Assertion `dstType == 0x1403' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45872">Bug 45872</a> - [bisected PNV] oglc mustpass(basic.stipple) regressed on pineview</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45876">Bug 45876</a> - [PNV]oglc texenv(basic.allCases) regressed on pineview</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45917">Bug 45917</a> - [PNV] Regression in Piglit test general/two-sided-lighting-separate-specular</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45943">Bug 45943</a> - [r300g] r300_emit.c:365:r300_emit_aa_state: Assertion `(aa-d&gt;dest)-&gt;cs_buf' failed.</li>
+
+<!-- <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=">Bug </a> - </li> -->
+
+</ul>
+
+
+<h2>Changes</h2>
+<p>The full set of changes can be viewed by using the following GIT command:</p>
+
+<pre>
+  git log mesa-8.0..mesa-8.0.1
+</pre>
+
+<p>Alex Deucher (2):
+<ul>
+  <li>r600g: fix tex tile_type offset for cayman</li>
+  <li>r600g: 128 bit formats require tile_type = 1 on cayman</li>
+</ul></p>
+
+<p>Anuj Phogat (2):
+<ul>
+  <li>meta: Add pixel store/pack operations in decompress_texture_image</li>
+  <li>meta: Avoid FBO resizing/reallocating in decompress_texture_image</li>
+</ul></p>
+
+<p>Brian Paul (6):
+<ul>
+  <li>docs: add news item for 8.0 release</li>
+  <li>docs: update info about supported systems, GPUs, APIs</li>
+  <li>docs: add VMware link</li>
+  <li>docs: remove link to the GLSL compiler page</li>
+  <li>mesa: fix proxy texture target initialization</li>
+  <li>swrast: fix span color type selection</li>
+</ul></p>
+
+<p>Chad Versace (2):
+<ul>
+  <li>i965: Rewrite the HiZ op</li>
+  <li>i965: Remove file i965/junk, accidentally added in 7b36c68</li>
+</ul></p>
+
+<p>Dave Airlie (1):
+<ul>
+  <li>st/mesa: only resolve if number of samples is &gt; 1</li>
+</ul></p>
+
+<p>Eric Anholt (3):
+<ul>
+  <li>i965: Fix HiZ change compiler warning.</li>
+  <li>i965: Report the failure message when failing to compile the fragment shader.</li>
+  <li>i965/fs: Enable register spilling on gen7 too.</li>
+</ul></p>
+
+<p>Ian Romanick (4):
+<ul>
+  <li>docs: Add 8.0 MD5 checksums</li>
+  <li>glapi: Include GLES2 headers for ES2 extension functions</li>
+  <li>swrast: Only avoid empty _TexEnvPrograms</li>
+  <li>mesa: Bump version number to 8.0.1</li>
+</ul></p>
+
+<p>Kenneth Graunke (4):
+<ul>
+  <li>i965: Fix border color on Ironlake.</li>
+  <li>i965/fs: Add a new fs_inst::regs_written function.</li>
+  <li>i965/fs: Take # of components into account in try_rewrite_rhs_to_dst.</li>
+  <li>i965: Emit Ivybridge VS workaround flushes.</li>
+</ul></p>
+
+<p>Mathias Fröhlich (1):
+<ul>
+  <li>state_stracker: Fix access to uninitialized memory.</li>
+</ul></p>
+
+<p>Paul Berry (1):
+<ul>
+  <li>i915: Fix type of "specoffset" variable.</li>
+</ul></p>
+
+<p>Simon Farnsworth (1):
+<ul>
+  <li>r600g: Use a fake reloc to sleep for fences</li>
+</ul></p>
+
+</body>
+</html>

docs/relnotes-8.0.2.html

@@ -0,0 +1,160 @@
+<HTML>
+
+<head>
+<TITLE>Mesa Release Notes</TITLE>
+<link rel="stylesheet" type="text/css" href="mesa.css">
+<meta http-equiv="content-type" content="text/html; charset=utf-8" />
+</head>
+
+<BODY>
+
+<body bgcolor="#eeeeee">
+
+<H1>Mesa 8.0.2 Release Notes / March 21, 2012</H1>
+
+<p>
+Mesa 8.0.2 is a bug fix release which fixes bugs found since the 8.0.1 release.
+</p>
+<p>
+Mesa 8.0.2 implements the OpenGL 3.0 API, but the version reported by
+glGetString(GL_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.0.
+</p>
+<p>
+See the <a href="install.html">Compiling/Installing page</a> for prerequisites
+for DRI hardware acceleration.
+</p>
+
+
+<h2>MD5 checksums</h2>
+<pre>
+70eb3dc74fbfcd72f6776268ee1db52e  MesaLib-8.0.2.tar.gz
+a368104e5700707048dc3e8691a9a7a1  MesaLib-8.0.2.tar.bz2
+d5e5cdb85d2afdbcd1c0623d3ed1c54d  MesaLib-8.0.2.zip
+</pre>
+
+<h2>New features</h2>
+<p>None.</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=38720">Bug 38720</a> - [SNB] Trine triggers a GPU hang</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=40059">Bug 40059</a> - [SNB] hang in "Amnesia: The Dark Descent" demo</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45216">Bug 45216</a> - [SNB] GPU hang in OilRush</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46631">Bug 46631</a> - It's really hard to hit the fast path for the fallback glReadPixels code</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46679">Bug 46679</a> - glReadPixels on a luminance texture returns the wrong values</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46311">Bug 46311</a> - Missing support of point size in Mesa core</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46665">Bug 46665</a> - [PNV] webgl conformance case max texture fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45975">Bug 45975</a> - [Gen4 + ILK] render with pointcoord will fail to render</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46666">Bug 46666</a> - [PNV] webgl conformance case NPOT case fails with TEXTURE_MIN_FILTER set to LINEAR</li>
+
+<!-- <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=">Bug </a> - </li> -->
+
+</ul>
+
+
+<h2>Changes</h2>
+<p>The full set of changes can be viewed by using the following GIT command:</p>
+
+<pre>
+  git log mesa-8.0.1..mesa-8.0.2
+</pre>
+
+<p>Brian Paul (7):
+<ul>
+      <li>svga: add null vs pointer check in update_need_pipeline()</li>
+      <li>util: add mutex lock in u_debug_memory.c code</li>
+      <li>mesa: add _mesa_rebase_rgba_float/uint() functions</li>
+      <li>mesa: use _mesa_rebase_rgba_float/uint() in glReadPixels code</li>
+      <li>mesa: use _mesa_rebase_rgba_float/uint() in glGetTexImage code</li>
+      <li>mesa: fix GL_LUMINANCE handling in glGetTexImage</li>
+      <li>docs: add links to 8.0.1 release notes</li>
+</ul></p>
+
+<p>Daniel Vetter (1):
+<ul>
+      <li>i965: fixup W-tile offset computation to take swizzling into account</li>
+<ul></p>
+
+<p>Dylan Noblesmith (1):
+<ul>
+      <li>mesa: add back glGetnUniform*v() overflow error reporting</li>
+</ul></p>
+
+<p>Ian Romanick (1):
+<ul>
+      <li>docs: Add 8.0.1 release md5sums</li>
+</ul></p>
+
+<p>Jakob Bornecrantz (3):
+<ul>
+      <li>mesa: Include mesa ES mapi generated files</li>
+      <li>mesa: Bump version number to 8.0.2</li>
+      <li>docs: Add 8.0.2 release notes</li>
+</ul></p>
+
+<p>Jeremy Huddleston (3):
+<ul>
+      <li>darwin: config file cleanups</li>
+      <li>darwin: Build create_context.c</li>
+      <li>darwin: Link against libxcb</li>
+</ul></p>
+
+<p>José Fonseca (1):
+<ul>
+      <li>svga: Clamp advertised PIPE_SHADER_CAP_MAX_TEMPS to SVGA3D_TEMPREG_MAX.</li>
+</ul></p>
+
+<p>Kenneth Graunke (2):
+<ul>
+      <li>i965: Only set Last Render Target Select on the last FB write.</li>
+      <li>i965: Fix Gen6+ dynamic state upper bound on older kernels.</li>
+</ul></p>
+
+<p>Marek Olšák (1):
+<ul>
+      <li>gallium/rtasm: properly detect SSE and SSE2</li>
+</ul></p>
+
+<p>Neil Roberts (1):
+<ul>
+      <li>mesa: Don't disable fast path for normalized types</li>
+</ul></p>
+
+<p>Tom Stellard (1):
+<ul>
+      <li>r300/compiler: Fix bug when lowering KILP on r300 cards</li>
+</ul></p>
+
+<p>Yuanhan Liu (6):
+<ul>
+      <li>mesa: let GL3 buf obj queries not depend on opengl major version</li>
+      <li>tnl: let _TNL_ATTRIB_POINTSIZE do not depend on ctx-&gt;VertexProgram._Enabled</li>
+      <li>i915: fix wrong rendering of gl_PointSize on Pineview</li>
+      <li>i915: move the FALLBACK_DRAW_OFFSET check outside the drawing rect check</li>
+      <li>i965: handle gl_PointCoord for Gen4 and Gen5 platforms</li>
+      <li>i915: fallback for NPOT cubemap texture</li>
+</ul></p>
+
+<p>Zack Rusin (3):
+<ul>
+      <li>svga: fix a crash happening before setting fragment shaders.</li>
+      <li>svga: Fix stencil op mapping</li>
+      <li>svga: fix the rasterizer state resets</li>
+</ul></p>
+
+
+</body>
+</html>

docs/relnotes-8.0.3.html

@@ -0,0 +1,317 @@
+<HTML>
+
+<head>
+<TITLE>Mesa Release Notes</TITLE>
+<link rel="stylesheet" type="text/css" href="mesa.css">
+<meta http-equiv="content-type" content="text/html; charset=utf-8" />
+</head>
+
+<BODY>
+
+<body bgcolor="#eeeeee">
+
+<H1>Mesa 8.0.3 Release Notes / May 18, 2012</H1>
+
+<p>
+Mesa 8.0.3 is a bug fix release which fixes bugs found since the 8.0.2 release.
+</p>
+<p>
+Mesa 8.0.3 implements the OpenGL 3.0 API, but the version reported by
+glGetString(GL_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.0.
+</p>
+<p>
+See the <a href="install.html">Compiling/Installing page</a> for prerequisites
+for DRI hardware acceleration.
+</p>
+
+
+<h2>MD5 checksums</h2>
+<pre>
+TBD.
+</pre>
+
+<h2>New features</h2>
+<p>None.</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=28138">Bug 28138</a> - [G45] Regnum Online, sparkling in in-game rendering</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=30102">Bug 30102</a> - glean depthStencil test fails BadLength with indirect non-swrast rendering</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=40361">Bug 40361</a> - Glitches on X3100 after upgrade to 7.11</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=41152">Bug 41152</a> - [glsl] Shader backend in Regnum Online does not work</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=41216">Bug 41216</a> - [bisected pineview]oglc filtercubemin(basic.sizedRGBA) fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=41372">Bug 41372</a> - i830_state.c PBO crash</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=41495">Bug 41495</a> - i830: intel_get_vb_max / intel_batchbuffer_space mismatch.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=44701">Bug 44701</a> - Regnum online textures flickering</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=44961">Bug 44961</a> - [bisected i965] oglc sRGB(Mipmap.1D_textures) regressed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=44970">Bug 44970</a> - [i965]oglc max_values(negative.textureSize.textureCube) segfaults</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45214">Bug 45214</a> - Textures disappearing or missing in RegnumOnline OpenGL game</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45558">Bug 45558</a> - cannot render on a drawable of size equal the max framebuffer size</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45921">Bug 45921</a> - [r300g, bisected] Multiple piglit regressions after glsl_to_tgsi changes</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46303">Bug 46303</a> - [SNB] segfault in intel_miptree_release()</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46739">Bug 46739</a> - [snb-m-gt2+] compiz crashed with SIGSEGV in intel_miptree_release()</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=46834">Bug 46834</a> - small performance when playing flightgear (swrast fallback through GTT mapping)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=47126">Bug 47126</a> - tests/fbo/fbo-array.c:109: create_array_fbo: Assertion `glGetError() == 0' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=48218">Bug 48218</a> - brw_fs_schedule_instructions.cpp segfault due to accessing not allocated last_mrf_write[16]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=48545">Bug 48545</a> - LLVMpipe glReadPixels Firefox hits the slow path (WebGL rendering)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=49124">Bug 49124</a> - swrast/s_texfetch.c:1156: set_fetch_functions: Assertion `texImage-&gt;FetchTexel' failed.</li>
+
+<!-- <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=">Bug </a> - </li> -->
+
+</ul>
+
+
+<h2>Changes</h2>
+<p>The full set of changes can be viewed by using the following GIT command:</p>
+
+<pre>
+  git log mesa-8.0.2..mesa-8.0.3
+</pre>
+
+<p>Alban Browaeys (1):
+<ul>
+  <li>dri/i915: Fix off-by-one in i830 clip region size.</li>
+</ul></p>
+
+<p>Alex Deucher (2):
+<ul>
+  <li>r200: fix fog coordinate emit</li>
+  <li>radeon: fix fog coordinate emit</li>
+</ul></p>
+
+<p>Alexander von Gluck (4):
+<ul>
+  <li>llvmpipe: fix symbol conflict on Haiku</li>
+  <li>svga: fix typedef conflicts on Haiku</li>
+  <li>mesa: Don't use newlocale on Haiku</li>
+  <li>glsl: Don't use newlocale on Haiku</li>
+</ul></p>
+
+<p>Anuj Phogat (4):
+<ul>
+  <li>mesa: fix issues with texture border and array textures</li>
+  <li>mesa: Fix valid texture target test in _mesa_GetTexLevelParameteriv()</li>
+  <li>mesa: Fix the cause of piglit test fbo-array failure</li>
+  <li>intel: Fix a case when mapping large texture fails</li>
+</ul></p>
+
+<p>Brian Paul (17):
+<ul>
+  <li>mesa: add a couple fast-paths to fast_read_rgba_pixels_memcpy()</li>
+  <li>mesa/gdi: remove wmesa_set_renderbuffer_funcs() function</li>
+  <li>mesa/gdi: remove clear_color() function</li>
+  <li>mesa: bump version to 8.0.2 in configs/default</li>
+  <li>swrast: include s_fragprog.h to silence warnings</li>
+  <li>mesa: remove LSB-first pixel packing check in glReadPixels</li>
+  <li>mesa: fix error in _mesa_format_matches_format_and_type() for RGB888</li>
+  <li>mesa: add BGR888 code in _mesa_format_matches_format_and_type()</li>
+  <li>vbo: fix node_attrsz[] usage in vbo_bind_vertex_list()</li>
+  <li>mesa: add missing texture integer test in glTexSubImage()</li>
+  <li>mesa: add missing return after _mesa_error() in update_array()</li>
+  <li>glsl: propagate MaxUnrollIterations to the optimizer's loop unroller</li>
+  <li>st/mesa: set MaxUnrollIterations = 255</li>
+  <li>st/mesa: no-op glCopyPixels if source region is out of bounds</li>
+  <li>mesa: do more teximage error checking for generic compressed formats</li>
+  <li>mesa: fix/add error check in _mesa_ColorMaterial()</li>
+  <li>mesa: fix glMaterial / dlist bug</li>
+</ul></p>
+
+<p>Chad Versace (3):
+<ul>
+  <li>glsl: Fix Android build</li>
+  <li>main: Fix memory leak in _mesa_make_extension_string()</li>
+  <li>intel: Disable ARB_framebuffer_object in ES contexts</li>
+</ul></p>
+
+<p>Chris Wilson (1):
+<ul>
+  <li>i830: Compute initial number of vertices from remaining batch space</li>
+</ul></p>
+
+<p>Dave Airlie (4):
+<ul>
+  <li>mesa/format_unpack: add LUMINANCE 8/16 UINT/INT</li>
+  <li>glx/drisw: avoid segfaults when we fail to get visual</li>
+  <li>drisw: fix image stride calculation for 16-bit.</li>
+  <li>intel: fix TFP at 16-bpp</li>
+</ul></p>
+
+<p>Dylan Noblesmith (7):
+<ul>
+  <li>intel: fix null dereference processing HiZ buffer</li>
+  <li>util: fix undefined behavior</li>
+  <li>util: fix uninitialized table</li>
+  <li>egl: fix uninitialized values</li>
+  <li>st/vega: fix uninitialized values</li>
+  <li>egl-static: fix printf warning</li>
+  <li>i965: fix typo</li>
+</ul></p>
+
+<p>Eric Anholt (19):
+<ul>
+  <li>i965/fs: Jump from discard statements to the end of the program when done.</li>
+  <li>intel: Fix rendering from textures after RenderTexture().</li>
+  <li>mesa: Fix handling of glCopyBufferSubData() for src == dst.</li>
+  <li>i965/fs: Move GL_CLAMP handling to coordinate setup.</li>
+  <li>i965/fs: Implement GL_CLAMP behavior on texture rectangles on gen6+.</li>
+  <li>mesa: Fix push/pop of multisample coverage invert.</li>
+  <li>mesa: Include the multisample enables under GL_MULTISAMPLE_BIT attrib as well.</li>
+  <li>mesa: Fix display list handling for GL_ARB_draw_instanced.</li>
+  <li>mesa: Fix display lists for draw_elements_base_vertex with draw_instanced.</li>
+  <li>mesa: Add missing error check for first &lt 0 in glDrawArraysInstanced().</li>
+  <li>i915: Fix piglit fbo-nodepth-test on i830.</li>
+  <li>intel: Return success when asked to allocate a 0-width/height renderbuffer.</li>
+  <li>mesa: Throw error on glGetActiveUniform inside Begin/End.</li>
+  <li>i965/vs: Fix up swizzle for dereference_array of matrices.</li>
+  <li>glsl: Fix indentation of switch code.</li>
+  <li>glsl: Let the constructor figure out the types of switch-related expressions.</li>
+  <li>glsl: Reject non-scalar switch expressions.</li>
+  <li>glsl: Fix assertion failure on handling switch on uint expressions.</li>
+  <li>mesa: Check for framebuffer completeness before looking at the rb.</li>
+</ul></p>
+
+<p>Eugeni Dodonov (1):
+<ul>
+  <li>intel: add PCI IDs for Ivy Bridge GT2 server variant</li>
+</ul></p>
+
+<p>Han Shen(沈涵) (1):
+<ul>
+  <li>bin/mklib: remove '-m32' for arm linux</li>
+</ul></p>
+
+<p>Ian Romanick (1):
+<ul>
+  <li>mesa: Bump version number to 8.0.3</li>
+</ul></p>
+
+<p>Jakob Bornecrantz (1):
+<ul>
+  <li>docs: Add 8.0.2 md5sums</li>
+</ul></p>
+
+<p>Jeremy Huddleston (7):
+<ul>
+  <li>darwin: Eliminate a pthread mutex leak</li>
+  <li>darwin: Fix an error message</li>
+  <li>darwin: Make reported errors more user-friendly</li>
+  <li>darwin: Use ASL for logging</li>
+  <li>darwin: Unlock our mutex before destroying it</li>
+  <li>darwin: Eliminate a possible race condition while destroying a surface</li>
+  <li>darwin: Address a build failure on Leopard and earlier OS versions</li>
+</ul></p>
+
+<p>Jon TURNEY (1):
+<ul>
+  <li>Have __glImageSize handle format GL_DEPTH_STENCIL_NV the same way as the server does</li>
+</ul></p>
+
+<p>Jonas Maebe (2):
+<ul>
+  <li>glapi: Correct size of allocated _glapi_table struct</li>
+  <li>apple: Fix a use after free</li>
+</ul></p>
+
+<p>Jordan Justen (1):
+<ul>
+  <li>mesa: Add primitive restart support to glArrayElement</li>
+</ul></p>
+
+<p>Kenneth Graunke (12):
+<ul>
+  <li>i965: Actually upload sampler state pointers for the VS unit on Gen6.</li>
+  <li>i965/fs: Fix FB writes that tried to use the non-existent m16 register.</li>
+  <li>vbo: Remove pedantic warning about 'end' beind out of bounds.</li>
+  <li>vbo: Ignore invalid element ranges which are outside VBO bounds.</li>
+  <li>vbo: Rework checking of 'end' against _MaxElement.</li>
+  <li>vbo: Eliminate short-circuiting in invalid-start case.</li>
+  <li>i965: Fix GPU hangs in the dummy fragment shader.</li>
+  <li>i965: Make the dummy fragment shader work in SIMD16 mode.</li>
+  <li>drirc: Add force_glsl_extensions_warn workaround for Unigine Heaven.</li>
+  <li>i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7.</li>
+  <li>intel: Remove pointless software fallback for glBitmap on Gen6.</li>
+  <li>glsl: Fix broken constant expression handling for &lt, &lt=, &gt;, and &gt;=.</li>
+</ul></p>
+
+<p>Kurt Roeckx (2):
+<ul>
+  <li>i915: Compute maximum number of verts using the actual batchbuffer size.</li>
+  <li>i915: Fix i830 polygon stipple from PBOs.</li>
+</ul></p>
+
+<p>Marek Olšák (5):
+<ul>
+  <li>r300g/swtcl: don't print an error when getting ClipVertex</li>
+  <li>r300g/swtcl: don't enter u_vbuf_mgr</li>
+  <li>r300g/swtcl: don't expose shader subroutine support</li>
+  <li>r300g/swtcl: fix polygon offset</li>
+  <li>r300g/swtcl: fix crash when back color is present in vertex shader</li>
+</ul></p>
+
+<p>Mathias Fröhlich (1):
+<ul>
+  <li>glsl: Avoid excessive loop unrolling.</li>
+</ul></p>
+
+<p>Matt Turner (1):
+<ul>
+  <li>Remove -ffast-math from default CFLAGS</li>
+</ul></p>
+
+<p>Paul Berry (1):
+<ul>
+  <li>i915: Initialize swrast_texture_image structure fields.</li>
+</ul></p>
+
+<p>Roland Scheidegger (1):
+<ul>
+  <li>mesa: check_index_bounds off-by-one fix</li>
+</ul></p>
+
+<p>Tom Stellard (2):
+<ul>
+  <li>r300/compiler: Clear loop registers in vertex shaders w/o loops</li>
+  <li>r300/compiler: Copy all instruction attributes during local transfoms</li>
+</ul></p>
+
+<p>Vinson Lee (5):
+<ul>
+  <li>mesa: Fix memory leak in _mesa_get_uniform_location.</li>
+  <li>linker: Fix memory leak in count_uniform_size::visit_field.</li>
+  <li>swrast: Fix memory leaks in blit_linear.</li>
+  <li>ir_to_mesa: Fix uninitialized member in add_uniform_to_shader.</li>
+  <li>mesa: Fix memory leak in generate_mipmap_compressed.</li>
+</ul></p>
+
+<p>Yuanhan Liu (2):
+<ul>
+  <li>i915: set SPRITE_POINT_ENABLE bit correctly</li>
+  <li>i965: fix wrong cube/3D texture layout</li>
+</ul></p>
+
+</body>
+</html>

docs/relnotes-8.0.html

@@ -10,7 +10,7 @@
 
 <body bgcolor="#eeeeee">
 
-<H1>Mesa 8.0 Release Notes / (release date TBD)</H1>
+<H1>Mesa 8.0 Release Notes / February 9, 2012</H1>
 
 <p>
 Mesa 8.0 is a new development release.
@@ -30,7 +30,9 @@ for DRI hardware acceleration.
 
 <h2>MD5 checksums</h2>
 <pre>
-tbd
+3516fea6c28ce4a0fa9759e4894729a1  MesaLib-8.0.tar.gz
+1a5668fe72651a670611164cefc703b2  MesaLib-8.0.tar.bz2
+66f5a01a85530a91472a3acceb556db8  MesaLib-8.0.zip
 </pre>
 
 

docs/relnotes.html

@@ -13,6 +13,8 @@ The release notes summarize what's new or changed in each Mesa release.
 </p>
 
 <UL>
+<LI><A HREF="relnotes-8.0.2.html">8.0.2 release notes</A>
+<LI><A HREF="relnotes-8.0.1.html">8.0.1 release notes</A>
 <LI><A HREF="relnotes-8.0.html">8.0 release notes</A>
 <LI><A HREF="relnotes-7.11.html">7.11 release notes</A>
 <LI><A HREF="relnotes-7.10.3.html">7.10.3 release notes</A>

docs/systems.html

@@ -9,34 +9,78 @@
 <H1>Supported Systems and Drivers</H1>
 
 <p>
-Mesa was originally designed for Unix/X11 systems and is still best
+Mesa is primarily developed and used on Linux systems.
-supported on those systems. All you need is an ANSI C compiler and the
+But there's also support for Windows, other flavors of Unix and other
-X development environment to use Mesa.
+systems such as Haiku.
+We're actively developing and maintaining several hardware and
+software drivers.
 </p>
 
 <p>
-The DRI hardware drivers for the X.org server and XFree86 provide
+The primary API is OpenGL but there's also support for OpenGL ES 1
-hardware accelerated rendering for chips from ATI, Intel, and NVIDIA
+and ES 2, OpenVG and the EGL interface.
-on Linux and FreeBSD.
 </p>
 
 <p>
-Drivers for other assorted platforms include:
+Hardware drivers include:
-the Apple Macintosh and Windows.
 </p>
+<ul>
+<li>Intel i965, i945, i915.
+    See <a href="http://intellinuxgraphics.org/index.html" target="_parent">
+    Intel's website</a>
+<li>AMD Radeon series
+<li>Some NVIDIA GPus.
+<li>VMware virtual GPU
+</ul>
 
 <p>
-Details about particular drivers follows:
+Software drivers include:
+</p>
+<ul>
+<li><a href="llvmpipe.html">llvmpipe</a> - uses LLVM for x86 JIT code
+    generation and is multi-threaded
+<li>softpipe - a reference Gallium driver
+<li>swrast - the legacy/original Mesa software rasterizer
+</ul>
+
+<p>
+Additional driver information:
 </p>
 
 <UL>
 <li><a href="http://dri.freedesktop.org/" target="_parent"> DRI hardware
 drivers</a> for the X Window System
-<LI><a href="xlibdriver.html">Xlib software driver</a> for the X Window System
+<li><a href="xlibdriver.html">Xlib / swrast driver</a> for the X Window System
 and Unix-like operating systems
-<LI>Microsoft Windows <A HREF="README.WIN32">(README.WIN32)</A>
+<li><a href="README.WIN32">Microsoft Windows</a>
-<LI>DEC VMS <A HREF="README.VMS">(README.VMS)</A>
+<li><a href="vmware-guest.html">VMware</a> guest OS driver
 </UL>
 
+
+<h1>
+Deprecated Systems and Drivers
+</h1>
+
+<p>
+In the past there were other drivers for older GPUs and operating
+systems.
+These have been removed from the Mesa source tree and distribution.
+If anyone's interested though, the code can be found in the git repo.
+The list includes:
+</p>
+
+<ul>
+<li>3dfx/glide
+<li>Matrox
+<li>ATI R128
+<li>Savage
+<li>VIA Unichrome
+<li>SIS
+<li>3Dlabs gamma
+<li>DOS
+<li>fbdev
+<li>DEC/VMS
+<ul>
+
 </body>
 </html>

docs/vmware-guest.html

@@ -0,0 +1,195 @@
+<html>
+
+<title>VMware guest GL driver</title>
+
+<link rel="stylesheet" type="text/css" href="mesa.css"></head>
+
+<body>
+
+
+<h1>VMware guest GL driver</h1>
+
+<p>
+This page describes how to build, install and use the
+<a href="http://www.vmware.com/" target="_parent">VMware</a> guest GL driver
+(aka the SVGA or SVGA3D driver) for Linux using the latest source code.
+This driver gives a Linux virtual machine access to the host's GPU for
+hardware-accelerated 3D.
+VMware Workstation running on Linux or Windows and VMware Fusion running on
+MacOS are all supported.
+</p>
+
+<p>
+End users shouldn't have to go through all these steps once the driver is
+included in newer Linux distributions.
+</p>
+
+<p>
+For more information about the X components see these wiki pages at x.org:
+</p>
+<ul>
+<li><a href="http://wiki.x.org/wiki/vmware" target="_parent">
+Driver Overview</a>
+<li><a href="http://wiki.x.org/wiki/vmware/vmware3D" target="_parent">
+xf86-video-vmware Details</a>
+</ul>
+
+
+<h2>Components</h2>
+
+The components involved in this include:
+<ul>
+<li>Linux kernel module: vmwgfx
+<li>X server 2D driver: xf86-video-vmware
+<li>User-space libdrm library
+<li>Mesa/gallium OpenGL driver: "svga"
+</ul>
+
+
+<h2>Prerequisites</h2>
+
+<ul>
+<li>Kernel version at least 2.6.25 
+<li>Xserver version at least 1.7 
+<li>Ubuntu: For ubuntu you need to install a number of build dependencies. 
+  <pre>
+  sudo apt-get install git-core
+  sudo apt-get install automake libtool libpthread-stubs0-dev
+  sudo apt-get install xserver-xorg-dev x11proto-xinerama-dev
+  sudo apt-get build-dep libgl1-mesa-dri libxcb-glx0-dev
+  </pre>
+<li>Fedora: For Fedora you also need to install a number of build dependencies. 
+  <pre>
+  sudo yum install mesa-libGL-devel xorg-x11-server-devel xorg-x11-util-macros
+  sudo yum install automake gcc libtool expat-devel kernel-devel git-core
+  </pre>
+</ul>
+
+<p>
+Depending on your Linux distro, other packages may be needed.
+The configure scripts should tell you what's missing.
+</p>
+
+
+
+<h2>Getting the Latest Source Code</h2>
+
+Begin by saving your current directory location:
+  <pre>
+  export TOP=$PWD
+  </pre>
+
+<ul>
+<li>Mesa/Gallium master branch. This code is used to build libGL, and the direct rendering svga driver for libGL, vmwgfx_dri.so, and the X acceleration library libxatracker.so.x.x.x. 
+  <pre>
+  git clone git://anongit.freedesktop.org/git/mesa/mesa
+  </pre>
+<li>VMware Linux guest kernel module. Note that this repo contains the complete DRM and TTM code. The vmware-specific driver is really only the files prefixed with vmwgfx. 
+  <pre>
+  git clone git://anongit.freedesktop.org/git/mesa/vmwgfx
+  </pre>
+
+<li>libdrm, A user-space library that interfaces with drm. Most distros ship with this driver. Safest bet is really to replace the system one. Optionally you can point LIBDRM_CFLAGS and LIBDRM_LIBS to the libdrm-2.4.22 package in toolchain. But here, we replace: 
+  <pre>
+  git clone git://anongit.freedesktop.org/git/mesa/drm
+  </pre>
+<li>xf86-video-vmware. The chainloading driver, vmware_drv.so, the legacy driver vmwlegacy_drv.so, and the vmwgfx driver vmwgfx_drv.so. 
+  <pre>
+  git clone git://anongit.freedesktop.org/git/xorg/driver/xf86-video-vmware
+  </pre>
+</ul>
+
+
+<h2>Building the Code</h2>
+
+<ul>
+<li>Build libdrm: If you're on a 32-bit system, you should skip the --libdir configure option. Note also the comment about toolchain libdrm above. 
+  <pre>
+  cd $TOP/drm
+  ./autogen.sh --prefix=/usr --enable-vmwgfx-experimental-api --libdir=/usr/lib64
+  make
+  sudo make install
+  </pre>
+<li>Build Mesa and the vmwgfx_dri.so driver, the vmwgfx_drv.so xorg driver, the X acceleration library libxatracker.
+The vmwgfx_dri.so is used by the OpenGL libraries during direct rendering,
+and by the Xorg server during accelerated indirect GL rendering.
+The libxatracker library is used exclusively by the X server to do render,
+copy and video acceleration:
+<br>
+The following configure options doesn't build the EGL system.
+<br>
+As before, if you're on a 32-bit system, you should skip the --libdir
+configure option.
+  <pre>
+  cd $TOP/mesa
+  ./autogen.sh --prefix=/usr --libdir=/usr/lib64 --with-gallium-drivers=svga --with-dri-drivers= --enable-xa
+  make
+  sudo make install
+  </pre>
+
+Note that you may have to install other packages that Mesa depends upon
+if they're not installed in your system.  You should be told what's missing.
+<br>
+<br>
+
+<li>xf86-video-vmware: Now, once libxatracker is installed, we proceed with building and replacing the current Xorg driver. First check if your system is 32- or 64-bit. If you're building for a 32-bit system, you will not be needing the --libdir=/usr/lib64 option to autogen. 
+  <pre>
+  cd $TOP/xf86-video-vmware
+  ./autogen.sh --prefix=/usr --libdir=/usr/lib64
+  make
+  sudo make install
+  </pre>
+<li>vmwgfx kernel module. First make sure that any old version of this kernel module is removed from the system by issuing
+  <pre>
+  sudo rm /lib/modules/`uname -r`/kernel/drivers/gpu/drm/vmwgfx.ko*
+  </pre>
+Then 
+  <pre>
+  cd $TOP/vmwgfx
+  make
+  sudo make install
+  sudo cp 00-vmwgfx.rules /etc/udev/rules.d
+  sudo depmod -ae
+  </pre>
+</ul>
+
+
+Now try to load the kernel module by issuing
+  <pre>
+  sudo modprobe vmwgfx</pre>
+Then type 
+  <pre>
+  dmesg</pre>
+to watch the debug output. It should contain a number of lines prefixed with "[vmwgfx]". 
+
+<p>
+Then restart the Xserver (or reboot).
+The lines starting with "vmwlegacy" or "VMWARE" in the file /var/log/Xorg.0.log
+should now have been replaced with lines starting with "vmwgfx", indicating that
+the new Xorg driver is in use. 
+</p>
+
+
+<h2>Running OpenGL Programs</h2>
+
+<p>
+In a shell, run 'glxinfo' and look for the following to verify that the
+driver is working:
+</p>
+
+<pre>
+OpenGL vendor string: VMware, Inc.
+OpenGL renderer string: Gallium 0.4 on SVGA3D; build: RELEASE;
+OpenGL version string: 2.1 Mesa 8.0
+</pre>
+
+If you don't see this, try setting this environment variable:
+  <pre>
+  export LIBGL_DEBUG=verbose</pre>
+then rerun glxinfo and examine the output for error messages.
+</p>
+
+
+
+</body>
+</html>

include/pci_ids/i965_pci_ids.h

@@ -25,3 +25,4 @@ CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
 CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
 CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
 CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)
+CHIPSET(0x016a, IVYBRIDGE_S_GT2, ivb_gt2)

src/egl/main/eglimage.c

@@ -45,7 +45,7 @@ _eglParseImageAttribList(_EGLImageAttribs *attrs, _EGLDisplay *dpy,
 
    (void) dpy;
 
-   memset(attrs, 0, sizeof(attrs));
+   memset(attrs, 0, sizeof(*attrs));
    attrs->ImagePreserved = EGL_FALSE;
    attrs->GLTextureLevel = 0;
    attrs->GLTextureZOffset = 0;

src/gallium/auxiliary/draw/draw_context.h

@@ -80,6 +80,21 @@ void draw_set_viewport_state( struct draw_context *draw,
 void draw_set_clip_state( struct draw_context *pipe,
                           const struct pipe_clip_state *clip );
 
+/**
+ * Sets the rasterization state used by the draw module.
+ * The rast_handle is used to pass the driver specific representation
+ * of the rasterization state. It's going to be used when the
+ * draw module sets the state back on the driver itself using the
+ * pipe::bind_rasterizer_state method.
+ *
+ * NOTE: if you're calling this function from within the pipe's
+ * bind_rasterizer_state you should always call it before binding
+ * the actual state - that's because the draw module can try to
+ * bind its own rasterizer state which would reset your newly
+ * set state. i.e. always do
+ * draw_set_rasterizer_state(driver->draw, state->pipe_state, state);
+ * driver->state.raster = state;
+ */
 void draw_set_rasterizer_state( struct draw_context *draw,
                                 const struct pipe_rasterizer_state *raster,
                                 void *rast_handle );

src/gallium/auxiliary/postprocess/postprocess.h

@@ -72,8 +72,7 @@ void pp_free(struct pp_queue_t *);
 void pp_free_fbos(struct pp_queue_t *);
 void pp_debug(const char *, ...);
 struct program *pp_init_prog(struct pp_queue_t *, struct pipe_screen *);
-void pp_init_fbos(struct pp_queue_t *, unsigned int, unsigned int,
+void pp_init_fbos(struct pp_queue_t *, unsigned int, unsigned int);
-                  struct pipe_resource *);
 
 /* The filters */
 

src/gallium/auxiliary/postprocess/pp_init.c

@@ -195,7 +195,7 @@ pp_debug(const char *fmt, ...)
 /** Allocate the temp FBOs. Called on makecurrent and resize. */
 void
 pp_init_fbos(struct pp_queue_t *ppq, unsigned int w,
-             unsigned int h, struct pipe_resource *indepth)
+             unsigned int h)
 {
 
    struct program *p = ppq->p;  /* The lazy will inherit the earth */
@@ -242,11 +242,7 @@ pp_init_fbos(struct pp_queue_t *ppq, unsigned int w,
          goto error;
    }
 
-   tmp_res.format = p->surf.format = indepth->format;
    tmp_res.bind = p->surf.usage = PIPE_BIND_DEPTH_STENCIL;
-   ppq->depth = indepth;
-   if (!ppq->depth)
-      goto error;
 
    tmp_res.format = p->surf.format = PIPE_FORMAT_S8_UINT_Z24_UNORM;
 

src/gallium/auxiliary/postprocess/pp_run.c

@@ -42,14 +42,14 @@ void
 pp_run(struct pp_queue_t *ppq, struct pipe_resource *in,
        struct pipe_resource *out, struct pipe_resource *indepth)
 {
-
+   struct pipe_resource *refin = NULL, *refout = NULL;
    unsigned int i;
 
    if (in->width0 != ppq->p->framebuffer.width ||
        in->height0 != ppq->p->framebuffer.height) {
       pp_debug("Resizing the temp pp buffers\n");
       pp_free_fbos(ppq);
-      pp_init_fbos(ppq, in->width0, in->height0, indepth);
+      pp_init_fbos(ppq, in->width0, in->height0);
    }
 
    if (in == out && ppq->n_filters == 1) {
@@ -64,6 +64,11 @@ pp_run(struct pp_queue_t *ppq, struct pipe_resource *in,
       in = ppq->tmp[0];
    }
 
+   // Kept only for this frame.
+   pipe_resource_reference(&ppq->depth, indepth);
+   pipe_resource_reference(&refin, in);
+   pipe_resource_reference(&refout, out);
+
    switch (ppq->n_filters) {
    case 1:                     /* No temp buf */
       ppq->pp_queue[0] (ppq, in, out, 0);
@@ -93,6 +98,10 @@ pp_run(struct pp_queue_t *ppq, struct pipe_resource *in,
 
       break;
    }
+
+   pipe_resource_reference(&ppq->depth, NULL);
+   pipe_resource_reference(&refin, NULL);
+   pipe_resource_reference(&refout, NULL);
 }
 
 

src/gallium/auxiliary/rtasm/rtasm_cpu.c

@@ -25,43 +25,43 @@
  *
  **************************************************************************/
 
-
+#include "pipe/p_config.h"
-#include "util/u_debug.h"
 #include "rtasm_cpu.h"
 
-
 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
-static boolean rtasm_sse_enabled(void)
+
+#include "util/u_debug.h"
+#include "util/u_cpu_detect.h"
+
+DEBUG_GET_ONCE_BOOL_OPTION(nosse, "GALLIUM_NOSSE", FALSE);
+
+static struct util_cpu_caps *get_cpu_caps(void)
 {
-   static boolean firsttime = 1;
+   util_cpu_detect();
-   static boolean enabled;
+   return &util_cpu_caps;
-   
-   /* This gets called quite often at the moment:
-    */
-   if (firsttime) {
-      enabled =  !debug_get_bool_option("GALLIUM_NOSSE", FALSE);
-      firsttime = FALSE;
-   }
-   return enabled;
 }
-#endif
 
 int rtasm_cpu_has_sse(void)
 {
-   /* FIXME: actually detect this at run-time */
+   return !debug_get_option_nosse() && get_cpu_caps()->has_sse;
-#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
-   return rtasm_sse_enabled();
-#else
-   return 0;
-#endif
 }
 
 int rtasm_cpu_has_sse2(void) 
 {
-   /* FIXME: actually detect this at run-time */
+   return !debug_get_option_nosse() && get_cpu_caps()->has_sse2;
-#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
-   return rtasm_sse_enabled();
-#else
-   return 0;
-#endif
 }
+
+
+#else
+
+int rtasm_cpu_has_sse(void)
+{
+   return 0;
+}
+
+int rtasm_cpu_has_sse2(void)
+{
+   return 0;
+}
+
+#endif

src/gallium/auxiliary/util/u_debug_memory.c

@@ -38,6 +38,7 @@
 
 #include "os/os_memory.h"
 #include "os/os_memory_debug.h"
+#include "os/os_thread.h"
 
 #include "util/u_debug.h" 
 #include "util/u_debug_stack.h" 
@@ -72,6 +73,8 @@ struct debug_memory_footer
 
 static struct list_head list = { &list, &list };
 
+pipe_static_mutex(list_mutex);
+
 static unsigned long last_no = 0;
 
 
@@ -132,7 +135,9 @@ debug_malloc(const char *file, unsigned line, const char *function,
    ftr = footer_from_header(hdr);
    ftr->magic = DEBUG_MEMORY_MAGIC;
    
+   pipe_mutex_lock(list_mutex);
    LIST_ADDTAIL(&hdr->head, &list);
+   pipe_mutex_unlock(list_mutex);
    
    return data_from_header(hdr);
 }
@@ -164,7 +169,9 @@ debug_free(const char *file, unsigned line, const char *function,
       debug_assert(0);
    }
 
+   pipe_mutex_lock(list_mutex);
    LIST_DEL(&hdr->head);
+   pipe_mutex_unlock(list_mutex);
    hdr->magic = 0;
    ftr->magic = 0;
    
@@ -232,7 +239,9 @@ debug_realloc(const char *file, unsigned line, const char *function,
    new_ftr = footer_from_header(new_hdr);
    new_ftr->magic = DEBUG_MEMORY_MAGIC;
    
+   pipe_mutex_lock(list_mutex);
    LIST_REPLACE(&old_hdr->head, &new_hdr->head);
+   pipe_mutex_unlock(list_mutex);
 
    /* copy data */
    new_ptr = data_from_header(new_hdr);

src/gallium/auxiliary/util/u_double_list.h

@@ -105,6 +105,11 @@ static INLINE void list_delinit(struct list_head *item)
 #define LIST_IS_EMPTY(__list)                   \
     ((__list)->next == (__list))
 
+/**
+ * Cast from a pointer to a member of a struct back to the containing struct.
+ *
+ * 'sample' MUST be initialized, or else the result is undefined!
+ */
 #ifndef container_of
 #define container_of(ptr, sample, member)				\
     (void *)((char *)(ptr)						\
@@ -112,29 +117,29 @@ static INLINE void list_delinit(struct list_head *item)
 #endif
 
 #define LIST_FOR_EACH_ENTRY(pos, head, member)				\
-   for (pos = container_of((head)->next, pos, member);			\
+   for (pos = NULL, pos = container_of((head)->next, pos, member);	\
 	&pos->member != (head);						\
 	pos = container_of(pos->member.next, pos, member))
 
 #define LIST_FOR_EACH_ENTRY_SAFE(pos, storage, head, member)	\
-   for (pos = container_of((head)->next, pos, member),			\
+   for (pos = NULL, pos = container_of((head)->next, pos, member),	\
 	storage = container_of(pos->member.next, pos, member);	\
 	&pos->member != (head);						\
 	pos = storage, storage = container_of(storage->member.next, storage, member))
 
 #define LIST_FOR_EACH_ENTRY_SAFE_REV(pos, storage, head, member)	\
-   for (pos = container_of((head)->prev, pos, member),			\
+   for (pos = NULL, pos = container_of((head)->prev, pos, member),	\
 	storage = container_of(pos->member.prev, pos, member);		\
 	&pos->member != (head);						\
 	pos = storage, storage = container_of(storage->member.prev, storage, member))
 
 #define LIST_FOR_EACH_ENTRY_FROM(pos, start, head, member)		\
-   for (pos = container_of((start), pos, member);			\
+   for (pos = NULL, pos = container_of((start), pos, member);		\
 	&pos->member != (head);						\
 	pos = container_of(pos->member.next, pos, member))
 
 #define LIST_FOR_EACH_ENTRY_FROM_REV(pos, start, head, member)		\
-   for (pos = container_of((start), pos, member);			\
+   for (pos = NULL, pos = container_of((start), pos, member);		\
 	&pos->member != (head);						\
 	pos = container_of(pos->member.prev, pos, member))
 

src/gallium/auxiliary/util/u_linkage.h

@@ -49,15 +49,16 @@ unsigned util_semantic_set_from_program_file(struct util_semantic_set *set, cons
  *
  * num_slots is the size of the layout array and hardware limit instead.
  *
- * efficient_slots == 0 or efficient_solts == num_slots are typical settings.
+ * efficient_slots == 0 or efficient_slots == num_slots are typical settings.
  */
 void util_semantic_layout_from_set(unsigned char *layout, const struct util_semantic_set *set, unsigned efficient_slots, unsigned num_slots);
 
 static INLINE void
-util_semantic_table_from_layout(unsigned char *table, unsigned char *layout, unsigned char first_slot_value, unsigned char num_slots)
+util_semantic_table_from_layout(unsigned char *table, size_t table_size, unsigned char *layout,
+                                unsigned char first_slot_value, unsigned char num_slots)
 {
-   int i;
+   unsigned char i;
-   memset(table, 0xff, sizeof(table));
+   memset(table, 0xff, table_size);
 
    for(i = 0; i < num_slots; ++i)
       table[layout[i]] = first_slot_value + i;

src/gallium/drivers/llvmpipe/lp_rast.c

@@ -792,7 +792,7 @@ lp_rast_finish( struct lp_rasterizer *rast )
  *   2. do work
  *   3. signal that we're done
  */
-static PIPE_THREAD_ROUTINE( thread_func, init_data )
+static PIPE_THREAD_ROUTINE( thread_function, init_data )
 {
    struct lp_rasterizer_task *task = (struct lp_rasterizer_task *) init_data;
    struct lp_rasterizer *rast = task->rast;
@@ -860,7 +860,7 @@ create_rast_threads(struct lp_rasterizer *rast)
    for (i = 0; i < rast->num_threads; i++) {
       pipe_semaphore_init(&rast->tasks[i].work_ready, 0);
       pipe_semaphore_init(&rast->tasks[i].work_done, 0);
-      rast->threads[i] = pipe_thread_create(thread_func,
+      rast->threads[i] = pipe_thread_create(thread_function,
                                             (void *) &rast->tasks[i]);
    }
 }

src/gallium/drivers/nv50/codegen/nv50_ir.cpp

@@ -938,6 +938,7 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
    }
    info->io.clipDistance = 0xff;
    info->io.pointSize = 0xff;
+   info->io.vertexId = 0xff;
    info->io.edgeFlagIn = 0xff;
    info->io.edgeFlagOut = 0xff;
    info->io.fragDepth = 0xff;

src/gallium/drivers/nv50/codegen/nv50_ir_driver.h

@@ -42,6 +42,7 @@ struct nv50_ir_varying
    unsigned mask     : 4; /* vec4 mask */
    unsigned linear   : 1; /* linearly interpolated if true (and not flat) */
    unsigned flat     : 1;
+   unsigned sc       : 1; /* special colour interpolation mode (SHADE_MODEL) */
    unsigned centroid : 1;
    unsigned patch    : 1; /* patch constant value */
    unsigned regular  : 1; /* driver-specific meaning (e.g. input in sreg) */
@@ -155,6 +156,7 @@ struct nv50_ir_prog_info
       uint8_t cullDistanceMask;  /* clip distance mode (1 bit per output) */
       int8_t genUserClip;        /* request user clip planes for ClipVertex */
       uint8_t pointSize;         /* output index for PointSize */
+      uint8_t vertexId;          /* system value index of VertexID */
       uint8_t edgeFlagIn;
       uint8_t edgeFlagOut;
       uint8_t fragDepth;         /* output index of FragDepth */

src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp

@@ -817,9 +817,11 @@ bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
                case TGSI_INTERPOLATE_CONSTANT:
                   info->in[i].flat = 1;
                   break;
+               case TGSI_INTERPOLATE_COLOR:
+                  info->in[i].sc = 1;
+                  break;
                case TGSI_INTERPOLATE_LINEAR:
-                  if (sn != TGSI_SEMANTIC_COLOR) // GL_NICEST
+                  info->in[i].linear = 1;
-                     info->in[i].linear = 1;
                   break;
                default:
                   break;
@@ -864,6 +866,13 @@ bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
       }
       break;
    case TGSI_FILE_SYSTEM_VALUE:
+      switch (sn) {
+      case TGSI_SEMANTIC_VERTEXID:
+         info->io.vertexId = first;
+         break;
+      default:
+         break;
+      }
       for (i = first; i <= last; ++i, ++si) {
          info->sv[i].sn = sn;
          info->sv[i].si = si;
@@ -1134,7 +1143,7 @@ Converter::makeSym(uint tgsiFile, int fileIdx, int idx, int c, uint32_t address)
 static inline uint8_t
 translateInterpMode(const struct nv50_ir_varying *var, operation& op)
 {
-   uint8_t mode;
+   uint8_t mode = NV50_IR_INTERP_PERSPECTIVE;
 
    if (var->flat)
       mode = NV50_IR_INTERP_FLAT;
@@ -1142,9 +1151,11 @@ translateInterpMode(const struct nv50_ir_varying *var, operation& op)
    if (var->linear)
       mode = NV50_IR_INTERP_LINEAR;
    else
-      mode = NV50_IR_INTERP_PERSPECTIVE;
+   if (var->sc)
+      mode = NV50_IR_INTERP_SC;
 
-   op = (mode == NV50_IR_INTERP_PERSPECTIVE) ? OP_PINTERP : OP_LINTERP;
+   op = (mode == NV50_IR_INTERP_PERSPECTIVE || mode == NV50_IR_INTERP_SC)
+      ? OP_PINTERP : OP_LINTERP;
 
    if (var->centroid)
       mode |= NV50_IR_INTERP_CENTROID;

src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp

@@ -703,11 +703,6 @@ NVC0LoweringPass::visit(Instruction *i)
          assert(prog->getType() != Program::TYPE_FRAGMENT);
       }
       break;
-   case OP_PINTERP:
-      if (i->getSrc(0)->reg.data.offset >= 0x280 &&
-          i->getSrc(0)->reg.data.offset <  0x2c0)
-         i->setInterpolate(i->getSampleMode() | NV50_IR_INTERP_SC);
-      break;
    default:
       break;
    }   

src/gallium/drivers/nvc0/nvc0_3d.xml.h

@@ -913,6 +913,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NVC0_3D_VERTEX_BEGIN_GL_INSTANCE_NEXT			0x04000000
 #define NVC0_3D_VERTEX_BEGIN_GL_INSTANCE_CONT			0x08000000
 
+#define NVC0_3D_VERTEX_ID_REPLACE				0x0000161c
+#define NVC0_3D_VERTEX_ID_REPLACE_ENABLE			0x00000001
+#define NVC0_3D_VERTEX_ID_REPLACE_SOURCE__MASK			0x00000ff0
+#define NVC0_3D_VERTEX_ID_REPLACE_SOURCE__SHIFT			4
+
 #define NVC0_3D_VERTEX_DATA					0x00001640
 
 #define NVC0_3D_PRIM_RESTART_ENABLE				0x00001644

src/gallium/drivers/nvc0/nvc0_context.h

@@ -134,9 +134,6 @@ struct nvc0_context {
    struct draw_context *draw;
 };
 
-#define NVC0_USING_EDGEFLAG(ctx) \
-   ((ctx)->vertprog->vp.edgeflag < PIPE_MAX_ATTRIBS)
-
 static INLINE struct nvc0_context *
 nvc0_context(struct pipe_context *pipe)
 {

src/gallium/drivers/nvc0/nvc0_program.c

@@ -107,7 +107,7 @@ nvc0_vp_assign_input_slots(struct nv50_ir_prog_info *info)
 
    for (n = 0, i = 0; i < info->numInputs; ++i) {
       switch (info->in[i].sn) {
-      case TGSI_SEMANTIC_INSTANCEID:
+      case TGSI_SEMANTIC_INSTANCEID: /* for SM4 only, in TGSI they're SVs */
       case TGSI_SEMANTIC_VERTEXID:
          info->in[i].mask = 0x1;
          info->in[i].slot[0] =
@@ -580,7 +580,11 @@ nvc0_program_translate(struct nvc0_program *prog)
    prog->relocs = info->bin.relocData;
    prog->max_gpr = MAX2(4, (info->bin.maxGPR + 1));
 
-   prog->vp.edgeflag = PIPE_MAX_ATTRIBS;
+   prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS;
+
+   if (info->io.edgeFlagOut < PIPE_MAX_ATTRIBS)
+      info->out[info->io.edgeFlagOut].mask = 0; /* for headergen */
+   prog->vp.edgeflag = info->io.edgeFlagIn;
 
    switch (prog->type) {
    case PIPE_SHADER_VERTEX:

src/gallium/drivers/nvc0/nvc0_program.h

@@ -37,8 +37,9 @@ struct nvc0_program {
    struct {
       uint32_t clip_mode; /* clip/cull selection */
       uint8_t clip_enable; /* mask of defined clip planes */
-      uint8_t edgeflag;
       uint8_t num_ucps; /* also set to max if ClipDistance is used */
+      uint8_t edgeflag; /* attribute index of edgeflag input */
+      boolean need_vertex_id;
    } vp;
    struct {
       uint8_t early_z;

src/gallium/drivers/nvc0/nvc0_push.c

@@ -21,6 +21,7 @@ struct push_context {
    struct translate *translate;
 
    boolean primitive_restart;
+   boolean need_vertex_id;
    uint32_t prim;
    uint32_t restart_index;
    uint32_t instance_id;
@@ -42,22 +43,23 @@ init_push_context(struct nvc0_context *nvc0, struct push_context *ctx)
    ctx->chan = nvc0->screen->base.channel;
    ctx->translate = nvc0->vertex->translate;
 
+   if (likely(nvc0->vertex->num_elements < 32))
+      ctx->need_vertex_id = nvc0->vertprog->vp.need_vertex_id;
+   else
+      ctx->need_vertex_id = FALSE;
+
+   ctx->edgeflag.buffer = -1;
    ctx->edgeflag.value = 0.5f;
 
-   if (NVC0_USING_EDGEFLAG(nvc0)) {
+   if (unlikely(nvc0->vertprog->vp.edgeflag < PIPE_MAX_ATTRIBS)) {
       ve = &nvc0->vertex->element[nvc0->vertprog->vp.edgeflag].pipe;
-
       ctx->edgeflag.buffer = ve->vertex_buffer_index;
       ctx->edgeflag.offset = ve->src_offset;
-
       ctx->packet_vertex_limit = 1;
    } else {
-      ctx->edgeflag.buffer = -1;
-      ctx->edgeflag.offset = 0;
-      ctx->edgeflag.stride = 0;
-      ctx->edgeflag.data = NULL;
-
       ctx->packet_vertex_limit = nvc0->vertex->vtx_per_packet_max;
+      if (unlikely(ctx->need_vertex_id))
+         ctx->packet_vertex_limit = 1;
    }
 
    ctx->vertex_words = nvc0->vertex->vtx_size;
@@ -74,6 +76,17 @@ set_edgeflag(struct push_context *ctx, unsigned vtx_id)
    }
 }
 
+static INLINE void
+set_vertexid(struct push_context *ctx, uint32_t vtx_id)
+{
+#if 0
+   BEGIN_RING(ctx->chan, RING_3D(VERTEX_ID), 1); /* broken on nvc0 */
+#else
+   BEGIN_RING(ctx->chan, RING_3D(VERTEX_DATA), 1); /* as last attribute */
+#endif
+   OUT_RING  (ctx->chan, vtx_id);
+}
+
 static INLINE unsigned
 prim_restart_search_i08(uint8_t *elts, unsigned push, uint8_t index)
 {
@@ -117,7 +130,7 @@ emit_vertices_i08(struct push_context *ctx, unsigned start, unsigned count)
       if (ctx->primitive_restart)
          nr = prim_restart_search_i08(elts, push, ctx->restart_index);
 
-      if (unlikely(ctx->edgeflag.buffer >= 0) && nr)
+      if (unlikely(ctx->edgeflag.buffer >= 0) && likely(nr))
          set_edgeflag(ctx, elts[0]);
 
       size = ctx->vertex_words * nr;
@@ -126,8 +139,11 @@ emit_vertices_i08(struct push_context *ctx, unsigned start, unsigned count)
 
       ctx->translate->run_elts8(ctx->translate, elts, nr, ctx->instance_id,
                                 ctx->chan->cur);
-
       ctx->chan->cur += size;
+
+      if (unlikely(ctx->need_vertex_id) && likely(size))
+         set_vertexid(ctx, elts[0]);
+
       count -= nr;
       elts += nr;
 
@@ -155,7 +171,7 @@ emit_vertices_i16(struct push_context *ctx, unsigned start, unsigned count)
       if (ctx->primitive_restart)
          nr = prim_restart_search_i16(elts, push, ctx->restart_index);
 
-      if (unlikely(ctx->edgeflag.buffer >= 0) && nr)
+      if (unlikely(ctx->edgeflag.buffer >= 0) && likely(nr))
          set_edgeflag(ctx, elts[0]);
 
       size = ctx->vertex_words * nr;
@@ -164,8 +180,11 @@ emit_vertices_i16(struct push_context *ctx, unsigned start, unsigned count)
 
       ctx->translate->run_elts16(ctx->translate, elts, nr, ctx->instance_id,
                                  ctx->chan->cur);
-
       ctx->chan->cur += size;
+
+      if (unlikely(ctx->need_vertex_id))
+         set_vertexid(ctx, elts[0]);
+
       count -= nr;
       elts += nr;
 
@@ -193,7 +212,7 @@ emit_vertices_i32(struct push_context *ctx, unsigned start, unsigned count)
       if (ctx->primitive_restart)
          nr = prim_restart_search_i32(elts, push, ctx->restart_index);
 
-      if (unlikely(ctx->edgeflag.buffer >= 0) && nr)
+      if (unlikely(ctx->edgeflag.buffer >= 0) && likely(nr))
          set_edgeflag(ctx, elts[0]);
 
       size = ctx->vertex_words * nr;
@@ -202,8 +221,11 @@ emit_vertices_i32(struct push_context *ctx, unsigned start, unsigned count)
 
       ctx->translate->run_elts(ctx->translate, elts, nr, ctx->instance_id,
                                ctx->chan->cur);
-
       ctx->chan->cur += size;
+
+      if (unlikely(ctx->need_vertex_id))
+         set_vertexid(ctx, elts[0]);
+
       count -= nr;
       elts += nr;
 
@@ -233,6 +255,10 @@ emit_vertices_seq(struct push_context *ctx, unsigned start, unsigned count)
       ctx->translate->run(ctx->translate, start, push, ctx->instance_id,
                           ctx->chan->cur);
       ctx->chan->cur += size;
+
+      if (unlikely(ctx->need_vertex_id))
+         set_vertexid(ctx, start);
+
       count -= push;
       start += push;
    }
@@ -326,6 +352,16 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
    ctx.instance_id = info->start_instance;
    ctx.prim = nvc0_prim_gl(info->mode);
 
+   if (unlikely(ctx.need_vertex_id)) {
+      const unsigned a = nvc0->vertex->num_elements;
+      BEGIN_RING(ctx.chan, RING_3D(VERTEX_ATTRIB_FORMAT(a)), 1);
+      OUT_RING  (ctx.chan, (a << NVC0_3D_VERTEX_ATTRIB_FORMAT_BUFFER__SHIFT) |
+                 NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_FLOAT |
+                 NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_32);
+      BEGIN_RING(ctx.chan, RING_3D(VERTEX_ID_REPLACE), 1);
+      OUT_RING  (ctx.chan, (((0x80 + a * 0x10) / 4) << 4) | 1);
+   }
+
    while (inst_count--) {
       BEGIN_RING(ctx.chan, RING_3D(VERTEX_BEGIN_GL), 1);
       OUT_RING  (ctx.chan, ctx.prim);
@@ -355,6 +391,16 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
    if (unlikely(ctx.edgeflag.value == 0.0f))
       IMMED_RING(ctx.chan, RING_3D(EDGEFLAG_ENABLE), 1);
 
+   if (unlikely(ctx.need_vertex_id)) {
+      const unsigned a = nvc0->vertex->num_elements;
+      IMMED_RING(ctx.chan, RING_3D(VERTEX_ID_REPLACE), 0);
+      BEGIN_RING(ctx.chan, RING_3D(VERTEX_ATTRIB_FORMAT(a)), 1);
+      OUT_RING  (ctx.chan,
+                 NVC0_3D_VERTEX_ATTRIB_FORMAT_CONST |
+                 NVC0_3D_VERTEX_ATTRIB_FORMAT_TYPE_FLOAT |
+                 NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_32);
+   }
+
    if (info->indexed)
       nouveau_resource_unmap(nv04_resource(nvc0->idxbuf.buffer));
 

src/gallium/drivers/nvc0/nvc0_screen.c

@@ -69,15 +69,14 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 {
    switch (param) {
    case PIPE_CAP_MAX_COMBINED_SAMPLERS:
-      return 64;
+      return 16 * PIPE_SHADER_TYPES; /* NOTE: should not count COMPUTE */
    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
-      return 13;
-   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
-      return 10;
    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
-      return 13;
+      return 15;
+   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
+      return 12;
    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
-      return 8192;
+      return 2048;
    case PIPE_CAP_MIN_TEXEL_OFFSET:
       return -8;
    case PIPE_CAP_MAX_TEXEL_OFFSET:
@@ -167,7 +166,9 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
    case PIPE_SHADER_CAP_MAX_INPUTS:
       if (shader == PIPE_SHADER_VERTEX)
          return 32;
-      return 0x300 / 16;
+      if (shader == PIPE_SHADER_FRAGMENT)
+         return (0x200 + 0x20 + 0x80) / 16; /* generic + colors + TexCoords */
+      return (0x200 + 0x40 + 0x80) / 16; /* without 0x60 for per-patch inputs */
    case PIPE_SHADER_CAP_MAX_CONSTS:
       return 65536 / 16;
    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
@@ -191,7 +192,11 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
    case PIPE_SHADER_CAP_INTEGERS:
       return 1;
    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+      return 16; /* would be 32 in linked (OpenGL-style) mode */
+      /*
+   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLER_VIEWS:
       return 32;
+      */
    case PIPE_SHADER_CAP_OUTPUT_READ:
       return 0; /* shader != PIPE_SHADER_TESSELLATION_CONTROL; */
    default:
@@ -208,12 +213,13 @@ nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
       return 10.0f;
    case PIPE_CAPF_MAX_POINT_WIDTH:
+      return 63.0f;
    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
-      return 64.0f;
+      return 63.375f;
    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
       return 16.0f;
    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
-      return 4.0f;
+      return 15.0f;
    default:
       NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
       return 0.0f;

src/gallium/drivers/nvc0/nvc0_vbo.c

@@ -263,7 +263,8 @@ nvc0_vertex_arrays_validate(struct nvc0_context *nvc0)
    struct nvc0_vertex_element *ve;
    unsigned i;
 
-   if (unlikely(vertex->need_conversion || NVC0_USING_EDGEFLAG(nvc0))) {
+   if (unlikely(vertex->need_conversion) ||
+       unlikely(nvc0->vertprog->vp.edgeflag < PIPE_MAX_ATTRIBS)) {
       nvc0->vbo_fifo = ~0;
       nvc0->vbo_user = 0;
    } else {

src/gallium/drivers/nvfx/nvfx_fragprog.c

@@ -977,7 +977,8 @@ nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc)
 	if(fpc->fp->num_slots > num_texcoords)
 		return FALSE;
 	util_semantic_layout_from_set(fpc->fp->slot_to_generic, &set, 0, num_texcoords);
-	util_semantic_table_from_layout(fpc->generic_to_slot, fpc->fp->slot_to_generic, 0, num_texcoords);
+	util_semantic_table_from_layout(fpc->generic_to_slot, sizeof fpc->generic_to_slot,
+                                        fpc->fp->slot_to_generic, 0, num_texcoords);
 
 	memset(fpc->fp->slot_to_fp_input, 0xff, sizeof(fpc->fp->slot_to_fp_input));
 

src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c

@@ -547,7 +547,7 @@ static void do_advanced_regalloc(struct regalloc_state * s)
 	struct ra_graph * graph;
 
 	/* Allocate the main ra data structure */
-	regs = ra_alloc_reg_set(s->C->max_temp_regs * RC_MASK_XYZW);
+	regs = ra_alloc_reg_set(NULL, s->C->max_temp_regs * RC_MASK_XYZW);
 
 	/* Get list of program variables */
 	variables = rc_get_variables(s->C);

src/gallium/drivers/r300/compiler/radeon_program_alu.c

@@ -41,13 +41,16 @@
 
 static struct rc_instruction *emit1(
 	struct radeon_compiler * c, struct rc_instruction * after,
-	rc_opcode Opcode, rc_saturate_mode Saturate, struct rc_dst_register DstReg,
+	rc_opcode Opcode, struct rc_sub_instruction * base,
-	struct rc_src_register SrcReg)
+	struct rc_dst_register DstReg, struct rc_src_register SrcReg)
 {
 	struct rc_instruction *fpi = rc_insert_new_instruction(c, after);
 
+	if (base) {
+		memcpy(&fpi->U.I, base, sizeof(struct rc_sub_instruction));
+	}
+
 	fpi->U.I.Opcode = Opcode;
-	fpi->U.I.SaturateMode = Saturate;
 	fpi->U.I.DstReg = DstReg;
 	fpi->U.I.SrcReg[0] = SrcReg;
 	return fpi;
@@ -55,13 +58,17 @@ static struct rc_instruction *emit1(
 
 static struct rc_instruction *emit2(
 	struct radeon_compiler * c, struct rc_instruction * after,
-	rc_opcode Opcode, rc_saturate_mode Saturate, struct rc_dst_register DstReg,
+	rc_opcode Opcode, struct rc_sub_instruction * base,
+	struct rc_dst_register DstReg,
 	struct rc_src_register SrcReg0, struct rc_src_register SrcReg1)
 {
 	struct rc_instruction *fpi = rc_insert_new_instruction(c, after);
 
+	if (base) {
+		memcpy(&fpi->U.I, base, sizeof(struct rc_sub_instruction));
+	}
+
 	fpi->U.I.Opcode = Opcode;
-	fpi->U.I.SaturateMode = Saturate;
 	fpi->U.I.DstReg = DstReg;
 	fpi->U.I.SrcReg[0] = SrcReg0;
 	fpi->U.I.SrcReg[1] = SrcReg1;
@@ -70,14 +77,18 @@ static struct rc_instruction *emit2(
 
 static struct rc_instruction *emit3(
 	struct radeon_compiler * c, struct rc_instruction * after,
-	rc_opcode Opcode, rc_saturate_mode Saturate, struct rc_dst_register DstReg,
+	rc_opcode Opcode, struct rc_sub_instruction * base,
+	struct rc_dst_register DstReg,
 	struct rc_src_register SrcReg0, struct rc_src_register SrcReg1,
 	struct rc_src_register SrcReg2)
 {
 	struct rc_instruction *fpi = rc_insert_new_instruction(c, after);
 
+	if (base) {
+		memcpy(&fpi->U.I, base, sizeof(struct rc_sub_instruction));
+	}
+
 	fpi->U.I.Opcode = Opcode;
-	fpi->U.I.SaturateMode = Saturate;
 	fpi->U.I.DstReg = DstReg;
 	fpi->U.I.SrcReg[0] = SrcReg0;
 	fpi->U.I.SrcReg[1] = SrcReg1;
@@ -221,7 +232,7 @@ static void transform_ABS(struct radeon_compiler* c,
 	struct rc_src_register src = inst->U.I.SrcReg[0];
 	src.Abs = 1;
 	src.Negate = RC_MASK_NONE;
-	emit1(c, inst->Prev, RC_OPCODE_MOV, inst->U.I.SaturateMode, inst->U.I.DstReg, src);
+	emit1(c, inst->Prev, RC_OPCODE_MOV, &inst->U.I, inst->U.I.DstReg, src);
 	rc_remove_instruction(inst);
 }
 
@@ -240,7 +251,7 @@ static void transform_CEIL(struct radeon_compiler* c,
 
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 	emit1(c, inst->Prev, RC_OPCODE_FRC, 0, dst, negate(inst->U.I.SrcReg[0]));
-	emit2(c, inst->Prev, RC_OPCODE_ADD, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit2(c, inst->Prev, RC_OPCODE_ADD, &inst->U.I, inst->U.I.DstReg,
 		inst->U.I.SrcReg[0], srcreg(RC_FILE_TEMPORARY, dst.Index));
 	rc_remove_instruction(inst);
 }
@@ -256,7 +267,7 @@ static void transform_CLAMP(struct radeon_compiler *c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 	emit2(c, inst->Prev, RC_OPCODE_MIN, 0, dst,
 		inst->U.I.SrcReg[0], inst->U.I.SrcReg[2]);
-	emit2(c, inst->Prev, RC_OPCODE_MAX, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit2(c, inst->Prev, RC_OPCODE_MAX, &inst->U.I, inst->U.I.DstReg,
 		srcreg(RC_FILE_TEMPORARY, dst.Index), inst->U.I.SrcReg[1]);
 	rc_remove_instruction(inst);
 }
@@ -272,7 +283,7 @@ static void transform_DP2(struct radeon_compiler* c,
 	src1.Negate &= ~(RC_MASK_Z | RC_MASK_W);
 	src1.Swizzle &= ~(63 << (3 * 2));
 	src1.Swizzle |= (RC_SWIZZLE_ZERO << (3 * 2)) | (RC_SWIZZLE_ZERO << (3 * 3));
-	emit2(c, inst->Prev, RC_OPCODE_DP3, inst->U.I.SaturateMode, inst->U.I.DstReg, src0, src1);
+	emit2(c, inst->Prev, RC_OPCODE_DP3, &inst->U.I, inst->U.I.DstReg, src0, src1);
 	rc_remove_instruction(inst);
 }
 
@@ -283,7 +294,7 @@ static void transform_DPH(struct radeon_compiler* c,
 	src0.Negate &= ~RC_MASK_W;
 	src0.Swizzle &= ~(7 << (3 * 3));
 	src0.Swizzle |= RC_SWIZZLE_ONE << (3 * 3);
-	emit2(c, inst->Prev, RC_OPCODE_DP4, inst->U.I.SaturateMode, inst->U.I.DstReg, src0, inst->U.I.SrcReg[1]);
+	emit2(c, inst->Prev, RC_OPCODE_DP4, &inst->U.I, inst->U.I.DstReg, src0, inst->U.I.SrcReg[1]);
 	rc_remove_instruction(inst);
 }
 
@@ -294,7 +305,7 @@ static void transform_DPH(struct radeon_compiler* c,
 static void transform_DST(struct radeon_compiler* c,
 	struct rc_instruction* inst)
 {
-	emit2(c, inst->Prev, RC_OPCODE_MUL, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit2(c, inst->Prev, RC_OPCODE_MUL, &inst->U.I, inst->U.I.DstReg,
 		swizzle(inst->U.I.SrcReg[0], RC_SWIZZLE_ONE, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ONE),
 		swizzle(inst->U.I.SrcReg[1], RC_SWIZZLE_ONE, RC_SWIZZLE_Y, RC_SWIZZLE_ONE, RC_SWIZZLE_W));
 	rc_remove_instruction(inst);
@@ -305,7 +316,7 @@ static void transform_FLR(struct radeon_compiler* c,
 {
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 	emit1(c, inst->Prev, RC_OPCODE_FRC, 0, dst, inst->U.I.SrcReg[0]);
-	emit2(c, inst->Prev, RC_OPCODE_ADD, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit2(c, inst->Prev, RC_OPCODE_ADD, &inst->U.I, inst->U.I.DstReg,
 		inst->U.I.SrcReg[0], negate(srcreg(RC_FILE_TEMPORARY, dst.Index)));
 	rc_remove_instruction(inst);
 }
@@ -379,14 +390,14 @@ static void transform_LIT(struct radeon_compiler* c,
 		swizzle_wwww(srctemp));
 
 	/* tmp.z = (tmp.x > 0) ? tmp.w : 0.0 */
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I,
 		dstregtmpmask(temp, RC_MASK_Z),
 		negate(swizzle_xxxx(srctemp)),
 		swizzle_wwww(srctemp),
 		builtin_zero);
 
 	/* tmp.x, tmp.y, tmp.w = 1.0, tmp.x, 1.0 */
-	emit1(c, inst->Prev, RC_OPCODE_MOV, inst->U.I.SaturateMode,
+	emit1(c, inst->Prev, RC_OPCODE_MOV, &inst->U.I,
 		dstregtmpmask(temp, RC_MASK_XYW),
 		swizzle(srctemp, RC_SWIZZLE_ONE, RC_SWIZZLE_X, RC_SWIZZLE_ONE, RC_SWIZZLE_ONE));
 
@@ -401,7 +412,7 @@ static void transform_LRP(struct radeon_compiler* c,
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0,
 		dst,
 		inst->U.I.SrcReg[1], negate(inst->U.I.SrcReg[2]));
-	emit3(c, inst->Prev, RC_OPCODE_MAD, inst->U.I.SaturateMode,
+	emit3(c, inst->Prev, RC_OPCODE_MAD, &inst->U.I,
 		inst->U.I.DstReg,
 		inst->U.I.SrcReg[0], srcreg(RC_FILE_TEMPORARY, dst.Index), inst->U.I.SrcReg[2]);
 
@@ -418,7 +429,7 @@ static void transform_POW(struct radeon_compiler* c,
 
 	emit1(c, inst->Prev, RC_OPCODE_LG2, 0, tempdst, swizzle_xxxx(inst->U.I.SrcReg[0]));
 	emit2(c, inst->Prev, RC_OPCODE_MUL, 0, tempdst, tempsrc, swizzle_xxxx(inst->U.I.SrcReg[1]));
-	emit1(c, inst->Prev, RC_OPCODE_EX2, inst->U.I.SaturateMode, inst->U.I.DstReg, tempsrc);
+	emit1(c, inst->Prev, RC_OPCODE_EX2, &inst->U.I, inst->U.I.DstReg, tempsrc);
 
 	rc_remove_instruction(inst);
 }
@@ -472,7 +483,7 @@ static void transform_SEQ(struct radeon_compiler* c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0, dst, inst->U.I.SrcReg[0], negate(inst->U.I.SrcReg[1]));
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I, inst->U.I.DstReg,
 		negate(absolute(srcreg(RC_FILE_TEMPORARY, dst.Index))), builtin_zero, builtin_one);
 
 	rc_remove_instruction(inst);
@@ -481,7 +492,7 @@ static void transform_SEQ(struct radeon_compiler* c,
 static void transform_SFL(struct radeon_compiler* c,
 	struct rc_instruction* inst)
 {
-	emit1(c, inst->Prev, RC_OPCODE_MOV, inst->U.I.SaturateMode, inst->U.I.DstReg, builtin_zero);
+	emit1(c, inst->Prev, RC_OPCODE_MOV, &inst->U.I, inst->U.I.DstReg, builtin_zero);
 	rc_remove_instruction(inst);
 }
 
@@ -491,7 +502,7 @@ static void transform_SGE(struct radeon_compiler* c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0, dst, inst->U.I.SrcReg[0], negate(inst->U.I.SrcReg[1]));
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I, inst->U.I.DstReg,
 		srcreg(RC_FILE_TEMPORARY, dst.Index), builtin_zero, builtin_one);
 
 	rc_remove_instruction(inst);
@@ -503,7 +514,7 @@ static void transform_SGT(struct radeon_compiler* c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0, dst, negate(inst->U.I.SrcReg[0]), inst->U.I.SrcReg[1]);
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I, inst->U.I.DstReg,
 		srcreg(RC_FILE_TEMPORARY, dst.Index), builtin_one, builtin_zero);
 
 	rc_remove_instruction(inst);
@@ -515,7 +526,7 @@ static void transform_SLE(struct radeon_compiler* c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0, dst, negate(inst->U.I.SrcReg[0]), inst->U.I.SrcReg[1]);
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I, inst->U.I.DstReg,
 		srcreg(RC_FILE_TEMPORARY, dst.Index), builtin_zero, builtin_one);
 
 	rc_remove_instruction(inst);
@@ -527,7 +538,7 @@ static void transform_SLT(struct radeon_compiler* c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0, dst, inst->U.I.SrcReg[0], negate(inst->U.I.SrcReg[1]));
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I, inst->U.I.DstReg,
 		srcreg(RC_FILE_TEMPORARY, dst.Index), builtin_one, builtin_zero);
 
 	rc_remove_instruction(inst);
@@ -539,7 +550,7 @@ static void transform_SNE(struct radeon_compiler* c,
 	struct rc_dst_register dst = try_to_reuse_dst(c, inst);
 
 	emit2(c, inst->Prev, RC_OPCODE_ADD, 0, dst, inst->U.I.SrcReg[0], negate(inst->U.I.SrcReg[1]));
-	emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_CMP, &inst->U.I, inst->U.I.DstReg,
 		negate(absolute(srcreg(RC_FILE_TEMPORARY, dst.Index))), builtin_one, builtin_zero);
 
 	rc_remove_instruction(inst);
@@ -604,7 +615,7 @@ static void transform_XPD(struct radeon_compiler* c,
 	emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dst,
 		swizzle(inst->U.I.SrcReg[0], RC_SWIZZLE_Z, RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_W),
 		swizzle(inst->U.I.SrcReg[1], RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_X, RC_SWIZZLE_W));
-	emit3(c, inst->Prev, RC_OPCODE_MAD, inst->U.I.SaturateMode, inst->U.I.DstReg,
+	emit3(c, inst->Prev, RC_OPCODE_MAD, &inst->U.I, inst->U.I.DstReg,
 		swizzle(inst->U.I.SrcReg[0], RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_X, RC_SWIZZLE_W),
 		swizzle(inst->U.I.SrcReg[1], RC_SWIZZLE_Z, RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_W),
 		negate(srcreg(RC_FILE_TEMPORARY, dst.Index)));
@@ -719,7 +730,7 @@ static void transform_r300_vertex_DP3(struct radeon_compiler* c,
 	src1.Negate &= ~RC_MASK_W;
 	src1.Swizzle &= ~(7 << (3 * 3));
 	src1.Swizzle |= RC_SWIZZLE_ZERO << (3 * 3);
-	emit2(c, inst->Prev, RC_OPCODE_DP4, inst->U.I.SaturateMode, inst->U.I.DstReg, src0, src1);
+	emit2(c, inst->Prev, RC_OPCODE_DP4, &inst->U.I, inst->U.I.DstReg, src0, src1);
 	rc_remove_instruction(inst);
 }
 
@@ -1043,22 +1054,22 @@ static void r300_transform_SIN_COS_SCS(struct radeon_compiler *c,
 	unsigned srctmp)
 {
 	if (inst->U.I.Opcode == RC_OPCODE_COS) {
-		emit1(c, inst->Prev, RC_OPCODE_COS, inst->U.I.SaturateMode, inst->U.I.DstReg,
+		emit1(c, inst->Prev, RC_OPCODE_COS, &inst->U.I, inst->U.I.DstReg,
 			srcregswz(RC_FILE_TEMPORARY, srctmp, RC_SWIZZLE_WWWW));
 	} else if (inst->U.I.Opcode == RC_OPCODE_SIN) {
-		emit1(c, inst->Prev, RC_OPCODE_SIN, inst->U.I.SaturateMode,
+		emit1(c, inst->Prev, RC_OPCODE_SIN, &inst->U.I,
 			inst->U.I.DstReg, srcregswz(RC_FILE_TEMPORARY, srctmp, RC_SWIZZLE_WWWW));
 	} else if (inst->U.I.Opcode == RC_OPCODE_SCS) {
 		struct rc_dst_register moddst = inst->U.I.DstReg;
 
 		if (inst->U.I.DstReg.WriteMask & RC_MASK_X) {
 			moddst.WriteMask = RC_MASK_X;
-			emit1(c, inst->Prev, RC_OPCODE_COS, inst->U.I.SaturateMode, moddst,
+			emit1(c, inst->Prev, RC_OPCODE_COS, &inst->U.I, moddst,
 				srcregswz(RC_FILE_TEMPORARY, srctmp, RC_SWIZZLE_WWWW));
 		}
 		if (inst->U.I.DstReg.WriteMask & RC_MASK_Y) {
 			moddst.WriteMask = RC_MASK_Y;
-			emit1(c, inst->Prev, RC_OPCODE_SIN, inst->U.I.SaturateMode, moddst,
+			emit1(c, inst->Prev, RC_OPCODE_SIN, &inst->U.I, moddst,
 				srcregswz(RC_FILE_TEMPORARY, srctmp, RC_SWIZZLE_WWWW));
 		}
 	}
@@ -1165,35 +1176,79 @@ int radeonTransformDeriv(struct radeon_compiler* c,
 }
 
 /**
+ * IF Temp[0].x -> IF Temp[0].x
+ * ...          -> ...
+ * KILP         -> KIL -abs(Temp[0].x)
+ * ...          -> ...
+ * ENDIF        -> ENDIF
+ *
+ * === OR ===
+ *
  * IF Temp[0].x -\
  * KILP         - > KIL -abs(Temp[0].x)
  * ENDIF        -/
  *
- * This needs to be done in its own pass, because it modifies the instructions
+ * === OR ===
- * before and after KILP.
+ *
+ * IF Temp[0].x -> IF Temp[0].x
+ * ...          -> ...
+ * ELSE         -> ELSE
+ * ...	        -> ...
+ * KILP	        -> KIL -abs(Temp[0].x)
+ * ...          -> ...
+ * ENDIF        -> ENDIF
+ *
+ * === OR ===
+ *
+ * KILP         -> KIL -none.1111
+ *
+ * This needs to be done in its own pass, because it might modify the
+ * instructions before and after KILP.
  */
 void rc_transform_KILP(struct radeon_compiler * c, void *user)
 {
 	struct rc_instruction * inst;
 	for (inst = c->Program.Instructions.Next;
 			inst != &c->Program.Instructions; inst = inst->Next) {
+		struct rc_instruction * if_inst;
+		unsigned in_if = 0;
 
 		if (inst->U.I.Opcode != RC_OPCODE_KILP)
 			continue;
 
+		for (if_inst = inst->Prev; if_inst != &c->Program.Instructions;
+						if_inst = if_inst->Prev) {
+
+			if (if_inst->U.I.Opcode == RC_OPCODE_IF) {
+				in_if = 1;
+				break;
+			}
+		}
+
 		inst->U.I.Opcode = RC_OPCODE_KIL;
 
-		if (inst->Prev->U.I.Opcode != RC_OPCODE_IF
+		if (!in_if) {
-				|| inst->Next->U.I.Opcode != RC_OPCODE_ENDIF) {
 			inst->U.I.SrcReg[0] = negate(builtin_one);
 		} else {
-
+			/* This should work even if the KILP is inside the ELSE
+			 * block, because -0.0 is considered negative. */
 			inst->U.I.SrcReg[0] =
-				negate(absolute(inst->Prev->U.I.SrcReg[0]));
+				negate(absolute(if_inst->U.I.SrcReg[0]));
-			/* Remove IF */
+
-			rc_remove_instruction(inst->Prev);
+			if (inst->Prev->U.I.Opcode != RC_OPCODE_IF
-			/* Remove ENDIF */
+				&& inst->Next->U.I.Opcode != RC_OPCODE_ENDIF) {
-			rc_remove_instruction(inst->Next);
+
+				/* Optimize the special case:
+				 * IF Temp[0].x
+				 * KILP
+				 * ENDIF
+				 */
+
+				/* Remove IF */
+				rc_remove_instruction(inst->Prev);
+				/* Remove ENDIF */
+				rc_remove_instruction(inst->Next);
+			}
 		}
 	}
 }

src/gallium/drivers/r300/r300_blit.c

@@ -63,8 +63,13 @@ static void r300_blitter_begin(struct r300_context* r300, enum r300_blitter_op o
     util_blitter_save_vertex_shader(r300->blitter, r300->vs_state.state);
     util_blitter_save_viewport(r300->blitter, &r300->viewport);
     util_blitter_save_vertex_elements(r300->blitter, r300->velems);
-    util_blitter_save_vertex_buffers(r300->blitter, r300->vbuf_mgr->nr_vertex_buffers,
+    if (r300->vbuf_mgr) {
-                                     r300->vbuf_mgr->vertex_buffer);
+        util_blitter_save_vertex_buffers(r300->blitter, r300->vbuf_mgr->nr_vertex_buffers,
+                                         r300->vbuf_mgr->vertex_buffer);
+    } else {
+        util_blitter_save_vertex_buffers(r300->blitter, r300->swtcl_nr_vertex_buffers,
+                                         r300->swtcl_vertex_buffer);
+    }
 
     if (op & R300_SAVE_FRAMEBUFFER) {
         util_blitter_save_framebuffer(r300->blitter, r300->fb_state.state);

src/gallium/drivers/r300/r300_context.c

@@ -419,17 +419,19 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
     r300_init_query_functions(r300);
     r300_init_state_functions(r300);
     r300_init_resource_functions(r300);
-    
+
     r300->context.create_video_decoder = vl_create_decoder;
     r300->context.create_video_buffer = vl_video_buffer_create;
 
-    r300->vbuf_mgr = u_vbuf_create(&r300->context, 1024 * 1024, 16,
+    if (r300->screen->caps.has_tcl) {
+        r300->vbuf_mgr = u_vbuf_create(&r300->context, 1024 * 1024, 16,
                                        PIPE_BIND_VERTEX_BUFFER |
                                        PIPE_BIND_INDEX_BUFFER,
                                        U_VERTEX_FETCH_DWORD_ALIGNED);
-    if (!r300->vbuf_mgr)
+        if (!r300->vbuf_mgr)
-        goto fail;
+            goto fail;
-    r300->vbuf_mgr->caps.format_fixed32 = 0;
+        r300->vbuf_mgr->caps.format_fixed32 = 0;
+    }
 
     r300->blitter = util_blitter_create(&r300->context);
     if (r300->blitter == NULL)

src/gallium/drivers/r300/r300_context.h

@@ -581,6 +581,9 @@ struct r300_context {
     void *dsa_decompress_zmask;
 
     struct u_vbuf *vbuf_mgr;
+    struct pipe_index_buffer swtcl_index_buffer;
+    struct pipe_vertex_buffer swtcl_vertex_buffer[PIPE_MAX_ATTRIBS];
+    unsigned swtcl_nr_vertex_buffers;
 
     struct util_slab_mempool pool_transfers;
 

src/gallium/drivers/r300/r300_emit.c

@@ -1030,20 +1030,18 @@ void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
             R300_PVS_VF_MAX_VTX_NUM(12) |
             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
 
-    /* Emit flow control instructions. */
+    /* Emit flow control instructions.  Even if there are no fc instructions,
-    if (code->num_fc_ops) {
+     * we still need to write the registers to make sure they are cleared. */
-
+    OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
-        OUT_CS_REG(R300_VAP_PVS_FLOW_CNTL_OPC, code->fc_ops);
+    if (r300screen->caps.is_r500) {
-        if (r300screen->caps.is_r500) {
+        OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, R300_VS_MAX_FC_OPS * 2);
-            OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
+        OUT_CS_TABLE(code->fc_op_addrs.r500, R300_VS_MAX_FC_OPS * 2);
-            OUT_CS_TABLE(code->fc_op_addrs.r500, code->num_fc_ops * 2);
+    } else {
-        } else {
+        OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, R300_VS_MAX_FC_OPS);
-            OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_ADDRS_0, code->num_fc_ops);
+        OUT_CS_TABLE(code->fc_op_addrs.r300, R300_VS_MAX_FC_OPS);
-            OUT_CS_TABLE(code->fc_op_addrs.r300, code->num_fc_ops);
-        }
-        OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, code->num_fc_ops);
-        OUT_CS_TABLE(code->fc_loop_index, code->num_fc_ops);
     }
+    OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, R300_VS_MAX_FC_OPS);
+    OUT_CS_TABLE(code->fc_loop_index, R300_VS_MAX_FC_OPS);
 
     END_CS;
 }

src/gallium/drivers/r300/r300_render.c

@@ -818,7 +818,7 @@ static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
     struct pipe_transfer *ib_transfer = NULL;
     int i;
     void *indices = NULL;
-    boolean indexed = info->indexed && r300->vbuf_mgr->index_buffer.buffer;
+    boolean indexed = info->indexed && r300->swtcl_index_buffer.buffer;
 
     if (r300->skip_rendering) {
         return;
@@ -831,10 +831,10 @@ static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
             (indexed ? PREP_INDEXED : 0),
             indexed ? 256 : 6);
 
-    for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
+    for (i = 0; i < r300->swtcl_nr_vertex_buffers; i++) {
-        if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
+        if (r300->swtcl_vertex_buffer[i].buffer) {
             void *buf = pipe_buffer_map(pipe,
-                                  r300->vbuf_mgr->vertex_buffer[i].buffer,
+                                  r300->swtcl_vertex_buffer[i].buffer,
                                   PIPE_TRANSFER_READ |
                                   PIPE_TRANSFER_UNSYNCHRONIZED,
                                   &vb_transfer[i]);
@@ -843,7 +843,7 @@ static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
     }
 
     if (indexed) {
-        indices = pipe_buffer_map(pipe, r300->vbuf_mgr->index_buffer.buffer,
+        indices = pipe_buffer_map(pipe, r300->swtcl_index_buffer.buffer,
                                   PIPE_TRANSFER_READ |
                                   PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer);
     }
@@ -856,8 +856,8 @@ static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
     draw_flush(r300->draw);
     r300->draw_vbo_locked = FALSE;
 
-    for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
+    for (i = 0; i < r300->swtcl_nr_vertex_buffers; i++) {
-        if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
+        if (r300->swtcl_vertex_buffer[i].buffer) {
             pipe_buffer_unmap(pipe, vb_transfer[i]);
             draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
         }

src/gallium/drivers/r300/r300_screen.c

@@ -212,6 +212,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
         switch (param)
         {
         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+        case PIPE_SHADER_CAP_SUBROUTINES:
             return 0;
         default:;
         }

src/gallium/drivers/r300/r300_state.c

@@ -1048,6 +1048,10 @@ static void* r300_create_rs_state(struct pipe_context* pipe,
 
     /* Override some states for Draw. */
     rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
+    rs->rs_draw.offset_point = 0;
+    rs->rs_draw.offset_line = 0;
+    rs->rs_draw.offset_tri = 0;
+    rs->rs_draw.offset_clamp = 0;
 
 #ifdef PIPE_ARCH_LITTLE_ENDIAN
     vap_control_status = R300_VC_NO_SWAP;
@@ -1595,7 +1599,6 @@ static void r300_set_vertex_buffers(struct pipe_context* pipe,
                                     const struct pipe_vertex_buffer* buffers)
 {
     struct r300_context* r300 = r300_context(pipe);
-    unsigned i;
     struct pipe_vertex_buffer dummy_vb = {0};
 
     /* There must be at least one vertex buffer set, otherwise it locks up. */
@@ -1605,18 +1608,13 @@ static void r300_set_vertex_buffers(struct pipe_context* pipe,
         count = 1;
     }
 
-    u_vbuf_set_vertex_buffers(r300->vbuf_mgr, count, buffers);
-
     if (r300->screen->caps.has_tcl) {
-        /* HW TCL. */
+        u_vbuf_set_vertex_buffers(r300->vbuf_mgr, count, buffers);
-        for (i = 0; i < count; i++) {
-            if (buffers[i].buffer &&
-		!r300_resource(buffers[i].buffer)->b.user_ptr) {
-            }
-        }
         r300->vertex_arrays_dirty = TRUE;
     } else {
-        /* SW TCL. */
+        util_copy_vertex_buffers(r300->swtcl_vertex_buffer,
+                                 &r300->swtcl_nr_vertex_buffers,
+                                 buffers, count);
         draw_set_vertex_buffers(r300->draw, count, buffers);
     }
 }
@@ -1626,9 +1624,15 @@ static void r300_set_index_buffer(struct pipe_context* pipe,
 {
     struct r300_context* r300 = r300_context(pipe);
 
-    u_vbuf_set_index_buffer(r300->vbuf_mgr, ib);
+    if (r300->screen->caps.has_tcl) {
-
+        u_vbuf_set_index_buffer(r300->vbuf_mgr, ib);
-    if (!r300->screen->caps.has_tcl) {
+    } else {
+        if (ib) {
+            pipe_resource_reference(&r300->swtcl_index_buffer.buffer, ib->buffer);
+            memcpy(&r300->swtcl_index_buffer, ib, sizeof(*ib));
+        } else {
+            pipe_resource_reference(&r300->swtcl_index_buffer.buffer, NULL);
+        }
         draw_set_index_buffer(r300->draw, ib);
     }
 }
@@ -1702,11 +1706,11 @@ static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
         return NULL;
 
     velems->count = count;
-    velems->vmgr_elements =
-        u_vbuf_create_vertex_elements(r300->vbuf_mgr, count, attribs,
-                                          velems->velem);
 
     if (r300_screen(pipe->screen)->caps.has_tcl) {
+        velems->vmgr_elements =
+            u_vbuf_create_vertex_elements(r300->vbuf_mgr, count, attribs,
+                                          velems->velem);
         /* Setup PSC.
          * The unused components will be replaced by (..., 0, 1). */
         r300_vertex_psc(velems);
@@ -1716,6 +1720,8 @@ static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
                 align(util_format_get_blocksize(velems->velem[i].src_format), 4);
             velems->vertex_size_dwords += velems->format_size[i] / 4;
         }
+    } else {
+        memcpy(velems->velem, attribs, count * sizeof(struct pipe_vertex_element));
     }
 
     return velems;
@@ -1733,9 +1739,9 @@ static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
 
     r300->velems = velems;
 
-    u_vbuf_bind_vertex_elements(r300->vbuf_mgr, state, velems->vmgr_elements);
+    if (r300->screen->caps.has_tcl) {
-
+        u_vbuf_bind_vertex_elements(r300->vbuf_mgr, state, velems->vmgr_elements);
-    if (r300->draw) {
+    } else {
         draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
         return;
     }
@@ -1750,7 +1756,9 @@ static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *s
     struct r300_context *r300 = r300_context(pipe);
     struct r300_vertex_element_state *velems = state;
 
-    u_vbuf_destroy_vertex_elements(r300->vbuf_mgr, velems->vmgr_elements);
+    if (r300->screen->caps.has_tcl) {
+        u_vbuf_destroy_vertex_elements(r300->vbuf_mgr, velems->vmgr_elements);
+    }
     FREE(state);
 }
 
@@ -1765,10 +1773,10 @@ static void* r300_create_vs_state(struct pipe_context* pipe,
     vs->state.tokens = tgsi_dup_tokens(shader->tokens);
 
     if (r300->screen->caps.has_tcl) {
-        r300_init_vs_outputs(vs);
+        r300_init_vs_outputs(r300, vs);
         r300_translate_vertex_shader(r300, vs);
     } else {
-        r300_draw_init_vertex_shader(r300->draw, vs);
+        r300_draw_init_vertex_shader(r300, vs);
     }
 
     return vs;
@@ -1794,9 +1802,8 @@ static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
     if (r300->screen->caps.has_tcl) {
         unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2;
         r300_mark_atom_dirty(r300, &r300->vs_state);
-        r300->vs_state.size =
+        r300->vs_state.size = vs->code.length + 9 +
-                vs->code.length + 9 +
+			(R300_VS_MAX_FC_OPS * fc_op_dwords + 4);
-        (vs->code.num_fc_ops ? vs->code.num_fc_ops * fc_op_dwords + 4 : 0);
 
         r300_mark_atom_dirty(r300, &r300->vs_constants);
         r300->vs_constants.size =

src/gallium/drivers/r300/r300_vs.c

@@ -36,6 +36,7 @@
 
 /* Convert info about VS output semantics into r300_shader_semantics. */
 static void r300_shader_read_vs_outputs(
+    struct r300_context *r300,
     struct tgsi_shader_info* info,
     struct r300_shader_semantics* vs_outputs)
 {
@@ -83,6 +84,14 @@ static void r300_shader_read_vs_outputs(
                 fprintf(stderr, "r300 VP: cannot handle edgeflag output.\n");
                 break;
 
+            case TGSI_SEMANTIC_CLIPVERTEX:
+                assert(index == 0);
+                /* Draw does clip vertex for us. */
+                if (r300->screen->caps.has_tcl) {
+                    fprintf(stderr, "r300 VP: cannot handle clip vertex output.\n");
+                }
+                break;
+
             default:
                 fprintf(stderr, "r300 VP: unknown vertex output semantic: %i.\n",
                         info->output_semantic_name[i]);
@@ -160,10 +169,11 @@ static void set_vertex_inputs_outputs(struct r300_vertex_program_compiler * c)
     c->code->outputs[outputs->wpos] = reg++;
 }
 
-void r300_init_vs_outputs(struct r300_vertex_shader *vs)
+void r300_init_vs_outputs(struct r300_context *r300,
+                          struct r300_vertex_shader *vs)
 {
     tgsi_scan_shader(vs->state.tokens, &vs->info);
-    r300_shader_read_vs_outputs(&vs->info, &vs->outputs);
+    r300_shader_read_vs_outputs(r300, &vs->info, &vs->outputs);
 }
 
 static void r300_dummy_vertex_shader(
@@ -187,7 +197,7 @@ static void r300_dummy_vertex_shader(
     ureg_destroy(ureg);
 
     shader->dummy = TRUE;
-    r300_init_vs_outputs(shader);
+    r300_init_vs_outputs(r300, shader);
     r300_translate_vertex_shader(r300, shader);
 }
 

src/gallium/drivers/r300/r300_vs.h

@@ -56,12 +56,13 @@ struct r300_vertex_shader {
     void *draw_vs;
 };
 
-void r300_init_vs_outputs(struct r300_vertex_shader *vs);
+void r300_init_vs_outputs(struct r300_context *r300,
+                          struct r300_vertex_shader *vs);
 
 void r300_translate_vertex_shader(struct r300_context *r300,
                                   struct r300_vertex_shader *vs);
 
-void r300_draw_init_vertex_shader(struct draw_context *draw,
+void r300_draw_init_vertex_shader(struct r300_context *r300,
                                   struct r300_vertex_shader *vs);
 
 #endif /* R300_VS_H */

src/gallium/drivers/r300/r300_vs_draw.c

@@ -29,7 +29,7 @@
  *
  * Transformations:
  * 1) If the secondary color output is present, the primary color must be
- *    inserted before it.
+ *    present too.
  * 2) If any back-face color output is present, there must be all 4 color
  *    outputs and missing ones must be inserted.
  * 3) Insert a trailing texcoord output containing a copy of POS, for WPOS.
@@ -52,7 +52,6 @@ struct vs_transform_context {
 
     boolean color_used[2];
     boolean bcolor_used[2];
-    boolean temp_used[128];
 
     /* Index of the pos output, typically 0. */
     unsigned pos_output;
@@ -72,6 +71,8 @@ struct vs_transform_context {
     boolean first_instruction;
     /* End instruction processed? */
     boolean end_instruction;
+
+    boolean temp_used[1024];
 };
 
 static void emit_temp(struct tgsi_transform_context *ctx, unsigned reg)
@@ -102,9 +103,9 @@ static void emit_output(struct tgsi_transform_context *ctx,
     ++vsctx->num_outputs;
 }
 
-static void insert_output(struct tgsi_transform_context *ctx,
+static void insert_output_before(struct tgsi_transform_context *ctx,
-                          struct tgsi_full_declaration *before,
+                                 struct tgsi_full_declaration *before,
-                          unsigned name, unsigned index, unsigned interp)
+                                 unsigned name, unsigned index, unsigned interp)
 {
     struct vs_transform_context *vsctx = (struct vs_transform_context *)ctx;
     unsigned i;
@@ -115,28 +116,29 @@ static void insert_output(struct tgsi_transform_context *ctx,
     }
 
     /* Insert the new output. */
-    emit_output(ctx, name, index, interp, before->Range.First);
+    emit_output(ctx, name, index, interp,
+                before->Range.First + vsctx->decl_shift);
 
     ++vsctx->decl_shift;
 }
 
-static void insert_trailing_bcolor(struct tgsi_transform_context *ctx,
+static void insert_output_after(struct tgsi_transform_context *ctx,
-                                   struct tgsi_full_declaration *before)
+                                struct tgsi_full_declaration *after,
+                                unsigned name, unsigned index, unsigned interp)
 {
     struct vs_transform_context *vsctx = (struct vs_transform_context *)ctx;
+    unsigned i;
 
-    /* If BCOLOR0 is used, make sure BCOLOR1 is present too. Otherwise
+    /* Make a place for the new output. */
-     * the rasterizer doesn't do the color selection correctly. */
+    for (i = after->Range.First+1; i < Elements(vsctx->out_remap); i++) {
-    if (vsctx->bcolor_used[0] && !vsctx->bcolor_used[1]) {
+        ++vsctx->out_remap[i];
-        if (before) {
-            insert_output(ctx, before, TGSI_SEMANTIC_BCOLOR, 1,
-                          TGSI_INTERPOLATE_LINEAR);
-        } else {
-            emit_output(ctx, TGSI_SEMANTIC_BCOLOR, 1,
-                        TGSI_INTERPOLATE_LINEAR, vsctx->num_outputs);
-        }
-        vsctx->bcolor_used[1] = TRUE;
     }
+
+    /* Insert the new output. */
+    emit_output(ctx, name, index, interp,
+                after->Range.First + 1);
+
+    ++vsctx->decl_shift;
 }
 
 static void transform_decl(struct tgsi_transform_context *ctx,
@@ -153,41 +155,38 @@ static void transform_decl(struct tgsi_transform_context *ctx,
 
             case TGSI_SEMANTIC_COLOR:
                 assert(decl->Semantic.Index < 2);
-                vsctx->color_used[decl->Semantic.Index] = TRUE;
 
                 /* We must rasterize the first color if the second one is
                  * used, otherwise the rasterizer doesn't do the color
                  * selection correctly. Declare it, but don't write to it. */
                 if (decl->Semantic.Index == 1 && !vsctx->color_used[0]) {
-                    insert_output(ctx, decl, TGSI_SEMANTIC_COLOR, 0,
+                    insert_output_before(ctx, decl, TGSI_SEMANTIC_COLOR, 0,
-                                  TGSI_INTERPOLATE_LINEAR);
+                                         TGSI_INTERPOLATE_LINEAR);
                     vsctx->color_used[0] = TRUE;
                 }
                 break;
 
             case TGSI_SEMANTIC_BCOLOR:
                 assert(decl->Semantic.Index < 2);
-                vsctx->bcolor_used[decl->Semantic.Index] = TRUE;
 
                 /* We must rasterize all 4 colors if back-face colors are
                  * used, otherwise the rasterizer doesn't do the color
                  * selection correctly. Declare it, but don't write to it. */
                 if (!vsctx->color_used[0]) {
-                    insert_output(ctx, decl, TGSI_SEMANTIC_COLOR, 0,
+                    insert_output_before(ctx, decl, TGSI_SEMANTIC_COLOR, 0,
-                                  TGSI_INTERPOLATE_LINEAR);
+                                         TGSI_INTERPOLATE_LINEAR);
                     vsctx->color_used[0] = TRUE;
                 }
                 if (!vsctx->color_used[1]) {
-                    insert_output(ctx, decl, TGSI_SEMANTIC_COLOR, 1,
+                    insert_output_before(ctx, decl, TGSI_SEMANTIC_COLOR, 1,
-                                  TGSI_INTERPOLATE_LINEAR);
+                                         TGSI_INTERPOLATE_LINEAR);
                     vsctx->color_used[1] = TRUE;
                 }
                 if (decl->Semantic.Index == 1 && !vsctx->bcolor_used[0]) {
-                    insert_output(ctx, decl, TGSI_SEMANTIC_BCOLOR, 0,
+                    insert_output_before(ctx, decl, TGSI_SEMANTIC_BCOLOR, 0,
-                                  TGSI_INTERPOLATE_LINEAR);
+                                         TGSI_INTERPOLATE_LINEAR);
                     vsctx->bcolor_used[0] = TRUE;
                 }
-                /* One more case is handled in insert_trailing_bcolor. */
                 break;
 
             case TGSI_SEMANTIC_GENERIC:
@@ -195,11 +194,6 @@ static void transform_decl(struct tgsi_transform_context *ctx,
                 break;
         }
 
-        if (decl->Semantic.Name != TGSI_SEMANTIC_BCOLOR) {
-            /* Insert it as soon as possible. */
-            insert_trailing_bcolor(ctx, decl);
-        }
-
         /* Since we're inserting new outputs in between, the following outputs
          * should be moved to the right so that they don't overlap with
          * the newly added ones. */
@@ -214,6 +208,14 @@ static void transform_decl(struct tgsi_transform_context *ctx,
     }
 
     ctx->emit_declaration(ctx, decl);
+
+    /* Insert BCOLOR1 if needed. */
+    if (decl->Declaration.File == TGSI_FILE_OUTPUT &&
+        decl->Semantic.Name == TGSI_SEMANTIC_BCOLOR &&
+        !vsctx->bcolor_used[1]) {
+        insert_output_after(ctx, decl, TGSI_SEMANTIC_BCOLOR, 1,
+                            TGSI_INTERPOLATE_LINEAR);
+    }
 }
 
 static void transform_inst(struct tgsi_transform_context *ctx,
@@ -226,10 +228,6 @@ static void transform_inst(struct tgsi_transform_context *ctx,
     if (!vsctx->first_instruction) {
         vsctx->first_instruction = TRUE;
 
-        /* The trailing BCOLOR should be inserted before the code
-         * if it hasn't already been done so. */
-        insert_trailing_bcolor(ctx, NULL);
-
         /* Insert the generic output for WPOS. */
         emit_output(ctx, TGSI_SEMANTIC_GENERIC, vsctx->last_generic + 1,
                     TGSI_INTERPOLATE_PERSPECTIVE, vsctx->num_outputs);
@@ -309,14 +307,18 @@ static void transform_inst(struct tgsi_transform_context *ctx,
     ctx->emit_instruction(ctx, inst);
 }
 
-void r300_draw_init_vertex_shader(struct draw_context *draw,
+void r300_draw_init_vertex_shader(struct r300_context *r300,
                                   struct r300_vertex_shader *vs)
 {
+    struct draw_context *draw = r300->draw;
     struct pipe_shader_state new_vs;
+    struct tgsi_shader_info info;
     struct vs_transform_context transform;
     const uint newLen = tgsi_num_tokens(vs->state.tokens) + 100 /* XXX */;
     unsigned i;
 
+    tgsi_scan_shader(vs->state.tokens, &info);
+
     new_vs.tokens = tgsi_alloc_tokens(newLen);
     if (new_vs.tokens == NULL)
         return;
@@ -329,6 +331,22 @@ void r300_draw_init_vertex_shader(struct draw_context *draw,
     transform.base.transform_instruction = transform_inst;
     transform.base.transform_declaration = transform_decl;
 
+    for (i = 0; i < info.num_outputs; i++) {
+        unsigned index = info.output_semantic_index[i];
+
+        switch (info.output_semantic_name[i]) {
+            case TGSI_SEMANTIC_COLOR:
+                assert(index < 2);
+                transform.color_used[index] = TRUE;
+                break;
+
+            case TGSI_SEMANTIC_BCOLOR:
+                assert(index < 2);
+                transform.bcolor_used[index] = TRUE;
+                break;
+        }
+    }
+
     tgsi_transform_shader(vs->state.tokens,
                           (struct tgsi_token*)new_vs.tokens,
                           newLen, &transform.base);
@@ -350,7 +368,7 @@ void r300_draw_init_vertex_shader(struct draw_context *draw,
     vs->state.tokens = new_vs.tokens;
 
     /* Init the VS output table for the rasterizer. */
-    r300_init_vs_outputs(vs);
+    r300_init_vs_outputs(r300, vs);
 
     /* Make the last generic be WPOS. */
     vs->outputs.wpos = vs->outputs.generic[transform.last_generic + 1];

src/gallium/drivers/r600/eg_asm.c

@@ -38,6 +38,23 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf)
 	case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
 	case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
 	case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
+		/* prepend ALU_EXTENDED if we need more than 2 kcache sets */
+		if (cf->eg_alu_extended) {
+			bc->bytecode[id++] =
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(V_SQ_CF_INDEX_NONE) |
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(V_SQ_CF_INDEX_NONE) |
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(V_SQ_CF_INDEX_NONE) |
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(V_SQ_CF_INDEX_NONE) |
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
+				S_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(cf->kcache[2].mode);
+			bc->bytecode[id++] = EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_EXTENDED |
+				S_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(cf->kcache[3].mode) |
+				S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(cf->kcache[2].addr) |
+				S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(cf->kcache[3].addr) |
+				S_SQ_CF_ALU_WORD1_EXT_BARRIER(1);
+		}
+
 		bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
 			S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
 			S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |

src/gallium/drivers/r600/eg_sq.h

@@ -78,6 +78,10 @@
 #define   S_SQ_CF_ALU_WORD0_KCACHE_MODE0(x)                          (((x) & 0x3) << 30)
 #define   G_SQ_CF_ALU_WORD0_KCACHE_MODE0(x)                          (((x) >> 30) & 0x3)
 #define   C_SQ_CF_ALU_WORD0_KCACHE_MODE0                             0x3FFFFFFF
+#define     V_SQ_CF_KCACHE_NOP                                       0x00000000
+#define     V_SQ_CF_KCACHE_LOCK_1                                    0x00000001
+#define     V_SQ_CF_KCACHE_LOCK_2                                    0x00000002
+#define     V_SQ_CF_KCACHE_LOCK_LOOP_INDEX                           0x00000003
 #define P_SQ_CF_ALU_WORD1
 #define   S_SQ_CF_ALU_WORD1_KCACHE_MODE1(x)                          (((x) & 0x3) << 0)
 #define   G_SQ_CF_ALU_WORD1_KCACHE_MODE1(x)                          (((x) >> 0) & 0x3)
@@ -103,7 +107,50 @@
 #define   S_SQ_CF_ALU_WORD1_BARRIER(x)                               (((x) & 0x1) << 31)
 #define   G_SQ_CF_ALU_WORD1_BARRIER(x)                               (((x) >> 31) & 0x1)
 #define   C_SQ_CF_ALU_WORD1_BARRIER                                  0x7FFFFFFF
-/* extended TODO */
+
+#define P_SQ_CF_ALU_WORD0_EXT
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(x)           (((x) & 0x3) << 4)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(x)           (((x) >> 4) & 0x3)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0              0xFFFFFFCF
+#define	    V_SQ_CF_INDEX_NONE                                       0x00
+#define	    V_SQ_CF_INDEX_0                                          0x01
+#define	    V_SQ_CF_INDEX_1                                          0x02
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(x)           (((x) & 0x3) << 6)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(x)           (((x) >> 6) & 0x3)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1              0xFFFFFF3F
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(x)           (((x) & 0x3) << 8)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(x)           (((x) >> 8) & 0x3)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2              0xFFFFFCFF
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(x)           (((x) & 0x3) << 10)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(x)           (((x) >> 10) & 0x3)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3              0xFFFFF3FF
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(x)                      (((x) & 0xF) << 22)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(x)                      (((x) >> 22) & 0xF)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2                         0xFC3FFFFF
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(x)                      (((x) & 0xF) << 26)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(x)                      (((x) >> 26) & 0xF)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3                         0xC3FFFFFF
+#define   S_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(x)                      (((x) & 0x3) << 30)
+#define   G_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(x)                      (((x) >> 30) & 0x3)
+#define   C_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2                         0x3FFFFFFF
+
+#define P_SQ_CF_ALU_WORD1_EXT
+#define   S_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(x)                      (((x) & 0x3) << 0)
+#define   G_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(x)                      (((x) >> 0) & 0x3)
+#define   C_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3                         0xFFFFFFFC
+#define   S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(x)                      (((x) & 0xFF) << 2)
+#define   G_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(x)                      (((x) >> 2) & 0xFF)
+#define   C_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2                         0xFFFFFC03
+#define   S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(x)                      (((x) & 0xFF) << 10)
+#define   G_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(x)                      (((x) >> 10) & 0xFF)
+#define   C_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3                         0xFFFC03FF
+#define   S_SQ_CF_ALU_WORD1_EXT_CF_INST(x)                           (((x) & 0xF) << 26)
+#define   G_SQ_CF_ALU_WORD1_EXT_CF_INST(x)                           (((x) >> 26) & 0xF)
+#define   C_SQ_CF_ALU_WORD1_EXT_CF_INST                              0xC3FFFFFF
+#define   S_SQ_CF_ALU_WORD1_EXT_BARRIER(x)                           (((x) & 0x1) << 31)
+#define   G_SQ_CF_ALU_WORD1_EXT_BARRIER(x)                           (((x) >> 31) & 0x1)
+#define   C_SQ_CF_ALU_WORD1_EXT_BARRIER                              0x7FFFFFFF
+
 /* done */
 #define P_SQ_CF_ALLOC_EXPORT_WORD0
 #define   S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(x)                   (((x) & 0x1FFF) << 0)

src/gallium/drivers/r600/evergreen_hw_context.c

@@ -99,7 +99,9 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_028058_DB_DEPTH_SIZE, 0, 0, 0},
 	{R_02805C_DB_DEPTH_SLICE, 0, 0, 0},
 	{R_028140_ALU_CONST_BUFFER_SIZE_PS_0, REG_FLAG_DIRTY_ALWAYS, 0, 0},
+	{R_028144_ALU_CONST_BUFFER_SIZE_PS_1, REG_FLAG_DIRTY_ALWAYS, 0, 0},
 	{R_028180_ALU_CONST_BUFFER_SIZE_VS_0, REG_FLAG_DIRTY_ALWAYS, 0, 0},
+	{R_028184_ALU_CONST_BUFFER_SIZE_VS_1, REG_FLAG_DIRTY_ALWAYS, 0, 0},
 	{R_028200_PA_SC_WINDOW_OFFSET, 0, 0, 0},
 	{R_028204_PA_SC_WINDOW_SCISSOR_TL, 0, 0, 0},
 	{R_028208_PA_SC_WINDOW_SCISSOR_BR, 0, 0, 0},
@@ -293,7 +295,9 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_028924_SQ_GS_VERT_ITEMSIZE_2, 0, 0, 0},
 	{R_028928_SQ_GS_VERT_ITEMSIZE_3, 0, 0, 0},
 	{R_028940_ALU_CONST_CACHE_PS_0, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
+	{R_028944_ALU_CONST_CACHE_PS_1, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
 	{R_028980_ALU_CONST_CACHE_VS_0, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
+	{R_028984_ALU_CONST_CACHE_VS_1, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
 	{R_028A00_PA_SU_POINT_SIZE, 0, 0, 0},
 	{R_028A04_PA_SU_POINT_MINMAX, 0, 0, 0},
 	{R_028A08_PA_SU_LINE_CNTL, 0, 0, 0},
@@ -465,7 +469,9 @@ static const struct r600_reg cayman_context_reg_list[] = {
 	{R_028058_DB_DEPTH_SIZE, 0, 0, 0},
 	{R_02805C_DB_DEPTH_SLICE, 0, 0, 0},
 	{R_028140_ALU_CONST_BUFFER_SIZE_PS_0, REG_FLAG_DIRTY_ALWAYS, 0, 0},
+	{R_028144_ALU_CONST_BUFFER_SIZE_PS_1, REG_FLAG_DIRTY_ALWAYS, 0, 0},
 	{R_028180_ALU_CONST_BUFFER_SIZE_VS_0, REG_FLAG_DIRTY_ALWAYS, 0, 0},
+	{R_028184_ALU_CONST_BUFFER_SIZE_VS_1, REG_FLAG_DIRTY_ALWAYS, 0, 0},
 	{R_028200_PA_SC_WINDOW_OFFSET, 0, 0, 0},
 	{R_028204_PA_SC_WINDOW_SCISSOR_TL, 0, 0, 0},
 	{R_028208_PA_SC_WINDOW_SCISSOR_BR, 0, 0, 0},
@@ -658,7 +664,9 @@ static const struct r600_reg cayman_context_reg_list[] = {
 	{R_028924_SQ_GS_VERT_ITEMSIZE_2, 0, 0, 0},
 	{R_028928_SQ_GS_VERT_ITEMSIZE_3, 0, 0, 0},
 	{R_028940_ALU_CONST_CACHE_PS_0, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
+	{R_028944_ALU_CONST_CACHE_PS_1, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
 	{R_028980_ALU_CONST_CACHE_VS_0, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
+	{R_028984_ALU_CONST_CACHE_VS_1, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
 	{R_028A00_PA_SU_POINT_SIZE, 0, 0, 0},
 	{R_028A04_PA_SU_POINT_MINMAX, 0, 0, 0},
 	{R_028A08_PA_SU_LINE_CNTL, 0, 0, 0},

src/gallium/drivers/r600/evergreen_state.c

@@ -508,6 +508,10 @@ static uint32_t r600_translate_colorformat(enum pipe_format format)
 	case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 		return V_028C70_COLOR_X24_8_32_FLOAT;
 
+	case PIPE_FORMAT_R32_UINT:
+	case PIPE_FORMAT_R32_SINT:
+		return V_028C70_COLOR_32;
+
 	case PIPE_FORMAT_R32_FLOAT:
 	case PIPE_FORMAT_Z32_FLOAT:
 		return V_028C70_COLOR_32_FLOAT;
@@ -902,6 +906,8 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
 	rs->clamp_fragment_color = state->clamp_fragment_color;
 	rs->flatshade = state->flatshade;
 	rs->sprite_coord_enable = state->sprite_coord_enable;
+	rs->two_side = state->light_twoside;
+	rs->clip_plane_enable = state->clip_plane_enable;
 
 	clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
 
@@ -939,8 +945,8 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
 		S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
 		S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_02881C_PA_CL_VS_OUT_CNTL,
-			S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex) |
+			S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex),
-			S_02881C_VS_OUT_MISC_VEC_ENA(state->point_size_per_vertex), 0xFFFFFFFF, NULL, 0);
+			S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x00000000, 0xFFFFFFFF, NULL, 0);
 	/* point size 12.4 fixed point */
 	tmp = (unsigned)(state->point_size * 8.0);
@@ -987,9 +993,10 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
 	r600_pipe_state_add_reg(rstate, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, fui(state->offset_clamp), 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, clip_rule, 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_028810_PA_CL_CLIP_CNTL,
-			S_028810_PS_UCP_MODE(3) | (state->clip_plane_enable & 63) |
+			S_028810_PS_UCP_MODE(3) | S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
-			S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
+			S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip),
-			S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip), 0xFFFFFFFF, NULL, 0);
+			S_028810_PS_UCP_MODE(3) | S_028810_ZCLIP_NEAR_DISABLE(1) |
+			S_028810_ZCLIP_FAR_DISABLE(1), NULL, 0);
 	return rstate;
 }
 
@@ -1039,6 +1046,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
 							struct pipe_resource *texture,
 							const struct pipe_sampler_view *state)
 {
+	struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 	struct r600_pipe_sampler_view *view = CALLOC_STRUCT(r600_pipe_sampler_view);
 	struct r600_pipe_resource_state *rstate;
 	struct r600_resource_texture *tmp = (struct r600_resource_texture*)texture;
@@ -1085,6 +1093,11 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
 		      util_format_get_blockwidth(state->format), 8);
 	array_mode = tmp->array_mode[0];
 	tile_type = tmp->tile_type;
+	/* 128 bit formats require tile type = 1 */
+	if (rctx->chip_class == CAYMAN) {
+		if (util_format_get_blocksize(state->format) >= 16)
+			tile_type = 1;
+	}
 
 	if (texture->target == PIPE_TEXTURE_1D_ARRAY) {
 	        height = 1;
@@ -1100,8 +1113,11 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
 
 	rstate->val[0] = (S_030000_DIM(r600_tex_dim(texture->target)) |
 			  S_030000_PITCH((pitch / 8) - 1) |
-			  S_030000_NON_DISP_TILING_ORDER(tile_type) |
 			  S_030000_TEX_WIDTH(texture->width0 - 1));
+	if (rctx->chip_class == CAYMAN)
+		rstate->val[0] |= CM_S_030000_NON_DISP_TILING_ORDER(tile_type);
+	else
+		rstate->val[0] |= S_030000_NON_DISP_TILING_ORDER(tile_type);
 	rstate->val[1] = (S_030004_TEX_HEIGHT(height - 1) |
 			  S_030004_TEX_DEPTH(depth - 1) |
 			  S_030004_ARRAY_MODE(array_mode));
@@ -1204,6 +1220,7 @@ static void evergreen_set_clip_state(struct pipe_context *ctx,
 {
 	struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 	struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
+	struct pipe_resource *cbuf;
 
 	if (rstate == NULL)
 		return;
@@ -1228,6 +1245,13 @@ static void evergreen_set_clip_state(struct pipe_context *ctx,
 	free(rctx->states[R600_PIPE_STATE_CLIP]);
 	rctx->states[R600_PIPE_STATE_CLIP] = rstate;
 	r600_context_pipe_state_set(&rctx->ctx, rstate);
+
+	cbuf = pipe_user_buffer_create(ctx->screen,
+                                   state->ucp,
+                                   4*4*8, /* 8*4 floats */
+                                   PIPE_BIND_CONSTANT_BUFFER);
+	r600_set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 1, cbuf);
+	pipe_resource_reference(&cbuf, NULL);
 }
 
 static void evergreen_set_polygon_stipple(struct pipe_context *ctx,
@@ -1442,6 +1466,11 @@ static void evergreen_cb(struct r600_pipe_context *rctx, struct r600_pipe_state
 		tile_type = rtex->tile_type;
 	} else /* workaround for linear buffers */
 		tile_type = 1;
+	/* 128 bit formats require tile type = 1 */
+	if (rctx->chip_class == CAYMAN) {
+		if (util_format_get_blocksize(surf->base.format) >= 16)
+			tile_type = 1;
+	}
 
 	/* FIXME handle enabling of CB beyond BASE8 which has different offset */
 	r600_pipe_state_add_reg(rstate,
@@ -2462,6 +2491,16 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader
 	r600_pipe_state_add_reg(rstate,
 				R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF,
 				0xFFFFFFFF, NULL, 0);
+
+	r600_pipe_state_add_reg(rstate,
+				R_02881C_PA_CL_VS_OUT_CNTL,
+				S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) |
+				S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) |
+				S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write),
+				S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) |
+				S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) |
+				S_02881C_VS_OUT_MISC_VEC_ENA(1),
+				NULL, 0);
 }
 
 void evergreen_fetch_shader(struct pipe_context *ctx,

src/gallium/drivers/r600/evergreend.h

@@ -675,13 +675,6 @@
 #define   G_028814_MULTI_PRIM_IB_ENA(x)                (((x) >> 21) & 0x1)
 #define   C_028814_MULTI_PRIM_IB_ENA                   0xFFDFFFFF
 
-#define R_028004_DB_DEPTH_VIEW                       0x028004
-#define   S_028004_SLICE_START(x)                      (((x) & 0x7FF) << 0)
-#define   G_028004_SLICE_START(x)                      (((x) >> 0) & 0x7FF)
-#define   C_028004_SLICE_START                         0xFFFFF800
-#define   S_028004_SLICE_MAX(x)                        (((x) & 0x7FF) << 13)
-#define   G_028004_SLICE_MAX(x)                        (((x) >> 13) & 0x7FF)
-#define   C_028004_SLICE_MAX                           0xFF001FFF
 #define R_028D24_DB_HTILE_SURFACE                    0x028D24
 #define   S_028D24_HTILE_WIDTH(x)                      (((x) & 0x1) << 0)
 #define   G_028D24_HTILE_WIDTH(x)                      (((x) >> 0) & 0x1)
@@ -977,6 +970,9 @@
 #define   S_030000_NON_DISP_TILING_ORDER(x)            (((x) & 0x1) << 5)
 #define   G_030000_NON_DISP_TILING_ORDER(x)            (((x) >> 5) & 0x1)
 #define   C_030000_NON_DISP_TILING_ORDER               0xFFFFFFDF
+#define   CM_S_030000_NON_DISP_TILING_ORDER(x)         (((x) & 0x3) << 4)
+#define   CM_G_030000_NON_DISP_TILING_ORDER(x)         (((x) >> 4) & 0x3)
+#define   CM_C_030000_NON_DISP_TILING_ORDER            0xFFFFFFCF
 #define   S_030000_PITCH(x)                            (((x) & 0xFFF) << 6)
 #define   G_030000_PITCH(x)                            (((x) >> 6) & 0xFFF)
 #define   C_030000_PITCH                               0xFFFC003F
@@ -1469,6 +1465,12 @@
 #define   S_028004_ZPASS_INCREMENT_DISABLE        (((x) & 0x1) << 0)
 #define   S_028004_PERFECT_ZPASS_COUNTS(x)        (((x) & 0x1) << 1)
 #define R_028008_DB_DEPTH_VIEW                       0x00028008
+#define   S_028008_SLICE_START(x)                      (((x) & 0x7FF) << 0)
+#define   G_028008_SLICE_START(x)                      (((x) >> 0) & 0x7FF)
+#define   C_028008_SLICE_START                         0xFFFFF800
+#define   S_028008_SLICE_MAX(x)                        (((x) & 0x7FF) << 13)
+#define   G_028008_SLICE_MAX(x)                        (((x) >> 13) & 0x7FF)
+#define   C_028008_SLICE_MAX                           0xFF001FFF
 #define R_02800C_DB_RENDER_OVERRIDE                  0x0002800C
 #define   V_02800C_FORCE_OFF                         0
 #define   V_02800C_FORCE_ENABLE                      1
@@ -1524,7 +1526,9 @@
 #define R_028050_DB_Z_WRITE_BASE                     0x00028050
 #define R_028054_DB_STENCIL_WRITE_BASE               0x00028054
 #define R_028140_ALU_CONST_BUFFER_SIZE_PS_0          0x00028140
+#define R_028144_ALU_CONST_BUFFER_SIZE_PS_1          0x00028144
 #define R_028180_ALU_CONST_BUFFER_SIZE_VS_0          0x00028180
+#define R_028184_ALU_CONST_BUFFER_SIZE_VS_1          0x00028184
 #define R_028200_PA_SC_WINDOW_OFFSET                 0x00028200
 #define R_02820C_PA_SC_CLIPRECT_RULE                 0x0002820C
 #define R_028210_PA_SC_CLIPRECT_0_TL                 0x00028210
@@ -1701,7 +1705,9 @@
 #define R_028924_SQ_GS_VERT_ITEMSIZE_2               0x00028924
 #define R_028928_SQ_GS_VERT_ITEMSIZE_3               0x00028928
 #define R_028940_ALU_CONST_CACHE_PS_0                0x00028940
+#define R_028944_ALU_CONST_CACHE_PS_1                0x00028944
 #define R_028980_ALU_CONST_CACHE_VS_0                0x00028980
+#define R_028984_ALU_CONST_CACHE_VS_1                0x00028984
 #define R_028A04_PA_SU_POINT_MINMAX                  0x00028A04
 #define R_028A08_PA_SU_LINE_CNTL                     0x00028A08
 #define   S_028A08_WIDTH(x)                            (((x) & 0xFFFF) << 0)

src/gallium/drivers/r600/r600_asm.c

@@ -91,6 +91,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode *
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR:
+		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
 		case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
@@ -236,8 +237,18 @@ static struct r600_bytecode_tex *r600_bytecode_tex(void)
 	return tex;
 }
 
-void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class)
+void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family)
 {
+	if ((chip_class == R600) && (family != CHIP_RV670))
+		bc->ar_handling = AR_HANDLE_RV6XX;
+	else
+		bc->ar_handling = AR_HANDLE_NORMAL;
+
+	if ((chip_class == R600) && (family != CHIP_RV670 && family != CHIP_RS780 &&
+					   family != CHIP_RS880))
+		bc->r6xx_nop_after_rel_dst = 1;
+	else
+		bc->r6xx_nop_after_rel_dst = 0;
 	LIST_INITHEAD(&bc->cf);
 	bc->chip_class = chip_class;
 }
@@ -249,8 +260,14 @@ static int r600_bytecode_add_cf(struct r600_bytecode *bc)
 	if (cf == NULL)
 		return -ENOMEM;
 	LIST_ADDTAIL(&cf->list, &bc->cf);
-	if (bc->cf_last)
+	if (bc->cf_last) {
 		cf->id = bc->cf_last->id + 2;
+		if (bc->cf_last->eg_alu_extended) {
+			/* take into account extended alu size */
+			cf->id += 2;
+			bc->ndw += 2;
+		}
+	}
 	bc->cf_last = cf;
 	bc->ncf++;
 	bc->ndw += 2;
@@ -428,7 +445,8 @@ static int is_alu_mova_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *
 		return !alu->is_op3 && (
 			alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA ||
 			alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR ||
-			alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
+			alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT ||
+			alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT);
 	case EVERGREEN:
 	case CAYMAN:
 	default:
@@ -444,7 +462,8 @@ static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_a
 	case R600:
 	case R700:
 		return is_alu_reduction_inst(bc, alu) ||
-			is_alu_mova_inst(bc, alu);
+			(is_alu_mova_inst(bc, alu) && 
+			 (alu->inst != V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT));
 	case EVERGREEN:
 	case CAYMAN:
 	default:
@@ -452,6 +471,7 @@ static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_a
 			is_alu_mova_inst(bc, alu) ||
 			(alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT ||
 			 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR ||
+			 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_LOAD_P0 ||
 			 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_XY ||
 			 alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INTERP_ZW);
 	}
@@ -465,6 +485,7 @@ static int is_alu_trans_unit_inst(struct r600_bytecode *bc, struct r600_bytecode
 	case R700:
 		if (!alu->is_op3)
 			return alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT ||
+				alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT ||
 				alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT ||
 			        alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT ||
 				alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT ||
@@ -536,6 +557,19 @@ static int is_alu_any_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_a
 		!is_alu_trans_unit_inst(bc, alu);
 }
 
+static int is_nop_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+{
+	switch (bc->chip_class) {
+	case R600:
+	case R700:
+		return (!alu->is_op3 && alu->inst == V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
+	case EVERGREEN:
+	case CAYMAN:
+	default:
+		return (!alu->is_op3 && alu->inst == EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
+	}
+}		
+
 static int assign_alu_units(struct r600_bytecode *bc, struct r600_bytecode_alu *alu_first,
 			    struct r600_bytecode_alu *assignment[5])
 {
@@ -688,7 +722,7 @@ static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
 					return r;
 			}
 		} else if (is_cfile(sel)) {
-			r = reserve_cfile(bc, bs, sel, elem);
+			r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
 			if (r)
 				return r;
 		}
@@ -715,7 +749,7 @@ static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
 				const_count++;
 		}
 		if (is_cfile(sel)) {
-			r = reserve_cfile(bc, bs, sel, elem);
+			r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
 			if (r)
 				return r;
 		}
@@ -1037,6 +1071,10 @@ static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu
 		alu = slots[i];
 		num_once_inst += is_alu_once_inst(bc, alu);
 
+		/* don't reschedule NOPs */
+		if (is_nop_inst(bc, alu))
+			return 0;
+
 		/* Let's check dst gpr. */
 		if (alu->dst.rel) {
 			if (have_mova)
@@ -1111,117 +1149,203 @@ static int merge_inst_groups(struct r600_bytecode *bc, struct r600_bytecode_alu
 	return 0;
 }
 
-/* This code handles kcache lines as single blocks of 32 constants. We could
+/* we'll keep kcache sets sorted by bank & addr */
- * probably do slightly better by recognizing that we actually have two
+static int r600_bytecode_alloc_kcache_line(struct r600_bytecode *bc,
- * consecutive lines of 16 constants, but the resulting code would also be
+		struct r600_bytecode_kcache *kcache,
- * somewhat more complicated. */
+		unsigned bank, unsigned line)
-static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, int type)
 {
-	struct r600_bytecode_kcache *kcache = bc->cf_last->kcache;
+	int i, kcache_banks = bc->chip_class >= EVERGREEN ? 4 : 2;
-	unsigned int required_lines;
-	unsigned int free_lines = 0;
-	unsigned int cache_line[3];
-	unsigned int count = 0;
-	unsigned int i, j;
-	int r;
 
-	/* Collect required cache lines. */
+	for (i = 0; i < kcache_banks; i++) {
-	for (i = 0; i < 3; ++i) {
+		if (kcache[i].mode) {
-		boolean found = false;
+			int d;
-		unsigned int line;
 
-		if (alu->src[i].sel < 512)
+			if (kcache[i].bank < bank)
+				continue;
+
+			if ((kcache[i].bank == bank && kcache[i].addr > line+1) ||
+					kcache[i].bank > bank) {
+				/* try to insert new line */
+				if (kcache[kcache_banks-1].mode) {
+					/* all sets are in use */
+					return -ENOMEM;
+				}
+
+				memmove(&kcache[i+1],&kcache[i], (kcache_banks-i-1)*sizeof(struct r600_bytecode_kcache));
+				kcache[i].mode = V_SQ_CF_KCACHE_LOCK_1;
+				kcache[i].bank = bank;
+				kcache[i].addr = line;
+				return 0;
+			}
+
+			d = line - kcache[i].addr;
+
+			if (d == -1) {
+				kcache[i].addr--;
+				if (kcache[i].mode == V_SQ_CF_KCACHE_LOCK_2) {
+					/* we are prepending the line to the current set,
+					 * discarding the existing second line,
+					 * so we'll have to insert line+2 after it */
+					line += 2;
+					continue;
+				} else if (kcache[i].mode == V_SQ_CF_KCACHE_LOCK_1) {
+					kcache[i].mode = V_SQ_CF_KCACHE_LOCK_2;
+					return 0;
+				} else {
+					/* V_SQ_CF_KCACHE_LOCK_LOOP_INDEX is not supported */
+					return -ENOMEM;
+				}
+			} else if (d == 1) {
+				kcache[i].mode = V_SQ_CF_KCACHE_LOCK_2;
+				return 0;
+			} else if (d == 0)
+				return 0;
+		} else { /* free kcache set - use it */
+			kcache[i].mode = V_SQ_CF_KCACHE_LOCK_1;
+			kcache[i].bank = bank;
+			kcache[i].addr = line;
+			return 0;
+		}
+	}
+	return -ENOMEM;
+}
+
+static int r600_bytecode_alloc_inst_kcache_lines(struct r600_bytecode *bc,
+		struct r600_bytecode_kcache *kcache,
+		struct r600_bytecode_alu *alu)
+{
+	int i, r;
+
+	for (i = 0; i < 3; i++) {
+		unsigned bank, line, sel = alu->src[i].sel;
+
+		if (sel < 512)
 			continue;
 
-		line = ((alu->src[i].sel - 512) / 32) * 2;
+		bank = alu->src[i].kc_bank;
+		line = (sel-512)>>4;
 
-		for (j = 0; j < count; ++j) {
+		if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line)))
-			if (cache_line[j] == line) {
-				found = true;
-				break;
-			}
-		}
-
-		if (!found)
-			cache_line[count++] = line;
-	}
-
-	/* This should never actually happen. */
-	if (count >= 3) return -ENOMEM;
-
-	for (i = 0; i < 2; ++i) {
-		if (kcache[i].mode == V_SQ_CF_KCACHE_NOP) {
-			++free_lines;
-		}
-	}
-
-	/* Filter lines pulled in by previous intructions. Note that this is
-	 * only for the required_lines count, we can't remove these from the
-	 * cache_line array since we may have to start a new ALU clause. */
-	for (i = 0, required_lines = count; i < count; ++i) {
-		for (j = 0; j < 2; ++j) {
-			if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
-			    kcache[j].addr == cache_line[i]) {
-				--required_lines;
-				break;
-			}
-		}
-	}
-
-	/* Start a new ALU clause if needed. */
-	if (required_lines > free_lines) {
-		if ((r = r600_bytecode_add_cf(bc))) {
 			return r;
-		}
-		bc->cf_last->inst = type;
-		kcache = bc->cf_last->kcache;
 	}
+	return 0;
+}
 
-	/* Setup the kcache lines. */
+static int r600_bytecode_assign_kcache_banks(struct r600_bytecode *bc,
-	for (i = 0; i < count; ++i) {
+		struct r600_bytecode_alu *alu,
-		boolean found = false;
+		struct r600_bytecode_kcache * kcache)
-
+{
-		for (j = 0; j < 2; ++j) {
+	int i, j;
-			if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
-			    kcache[j].addr == cache_line[i]) {
-				found = true;
-				break;
-			}
-		}
-
-		if (found) continue;
-
-		for (j = 0; j < 2; ++j) {
-			if (kcache[j].mode == V_SQ_CF_KCACHE_NOP) {
-				kcache[j].bank = 0;
-				kcache[j].addr = cache_line[i];
-				kcache[j].mode = V_SQ_CF_KCACHE_LOCK_2;
-				break;
-			}
-		}
-	}
 
 	/* Alter the src operands to refer to the kcache. */
 	for (i = 0; i < 3; ++i) {
 		static const unsigned int base[] = {128, 160, 256, 288};
-		unsigned int line;
+		unsigned int line, sel = alu->src[i].sel, found = 0;
 
-		if (alu->src[i].sel < 512)
+		if (sel < 512)
 			continue;
 
-		alu->src[i].sel -= 512;
+		sel -= 512;
-		line = (alu->src[i].sel / 32) * 2;
+		line = sel>>4;
 
-		for (j = 0; j < 2; ++j) {
+		for (j = 0; j < 4 && !found; ++j) {
-			if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
+			switch (kcache[j].mode) {
-			    kcache[j].addr == line) {
+			case V_SQ_CF_KCACHE_NOP:
-				alu->src[i].sel &= 0x1f;
+			case V_SQ_CF_KCACHE_LOCK_LOOP_INDEX:
-				alu->src[i].sel += base[j];
+				R600_ERR("unexpected kcache line mode\n");
-				break;
+				return -ENOMEM;
+			default:
+				if (kcache[j].bank == alu->src[i].kc_bank &&
+						kcache[j].addr <= line &&
+						line < kcache[j].addr + kcache[j].mode) {
+					alu->src[i].sel = sel - (kcache[j].addr<<4);
+					alu->src[i].sel += base[j];
+					found=1;
+			    }
 			}
 		}
 	}
+	return 0;
+}
 
+static int r600_bytecode_alloc_kcache_lines(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, int type)
+{
+	struct r600_bytecode_kcache kcache_sets[4];
+	struct r600_bytecode_kcache *kcache = kcache_sets;
+	int r;
+
+	memcpy(kcache, bc->cf_last->kcache, 4 * sizeof(struct r600_bytecode_kcache));
+
+	if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) {
+		/* can't alloc, need to start new clause */
+		if ((r = r600_bytecode_add_cf(bc))) {
+			return r;
+		}
+		bc->cf_last->inst = type;
+
+		/* retry with the new clause */
+		kcache = bc->cf_last->kcache;
+		if ((r = r600_bytecode_alloc_inst_kcache_lines(bc, kcache, alu))) {
+			/* can't alloc again- should never happen */
+			return r;
+		}
+	} else {
+		/* update kcache sets */
+		memcpy(bc->cf_last->kcache, kcache, 4 * sizeof(struct r600_bytecode_kcache));
+	}
+
+	/* if we actually used more than 2 kcache sets - use ALU_EXTENDED on eg+ */
+	if (kcache[2].mode != V_SQ_CF_KCACHE_NOP) {
+		if (bc->chip_class < EVERGREEN)
+			return -ENOMEM;
+		bc->cf_last->eg_alu_extended = 1;
+	}
+
+	return 0;
+}
+
+static int insert_nop_r6xx(struct r600_bytecode *bc)
+{
+	struct r600_bytecode_alu alu;
+	int r, i;
+
+	for (i = 0; i < 4; i++) {
+		memset(&alu, 0, sizeof(alu));
+		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP;
+		alu.src[0].chan = i;
+		alu.dst.chan = i;
+		alu.last = (i == 3);
+		r = r600_bytecode_add_alu(bc, &alu);
+		if (r)
+			return r;
+	}
+	return 0;
+}
+
+/* load AR register from gpr (bc->ar_reg) with MOVA_INT */
+static int load_ar_r6xx(struct r600_bytecode *bc)
+{
+	struct r600_bytecode_alu alu;
+	int r;
+
+	if (bc->ar_loaded)
+		return 0;
+
+	/* hack to avoid making MOVA the last instruction in the clause */
+	if ((bc->cf_last->ndw>>1) >= 110)
+		bc->force_add_cf = 1;
+
+	memset(&alu, 0, sizeof(alu));
+	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT;
+	alu.src[0].sel = bc->ar_reg;
+	alu.last = 1;
+	alu.index_mode = INDEX_MODE_LOOP;
+	r = r600_bytecode_add_alu(bc, &alu);
+	if (r)
+		return r;
+
+	/* no requirement to set uses waterfall on MOVA_GPR_INT */
+	bc->ar_loaded = 1;
 	return 0;
 }
 
@@ -1231,6 +1355,9 @@ static int load_ar(struct r600_bytecode *bc)
 	struct r600_bytecode_alu alu;
 	int r;
 
+	if (bc->ar_handling)
+		return load_ar_r6xx(bc);
+
 	if (bc->ar_loaded)
 		return 0;
 
@@ -1365,6 +1492,10 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc, const struct r600_bytec
 		bc->cf_last->prev_bs_head = bc->cf_last->curr_bs_head;
 		bc->cf_last->curr_bs_head = NULL;
 	}
+
+	if (nalu->dst.rel && bc->r6xx_nop_after_rel_dst)
+		insert_nop_r6xx(bc);
+
 	return 0;
 }
 
@@ -1588,6 +1719,7 @@ static int r600_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecod
 				S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
 				S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
 				S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
+				S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) |
 				S_SQ_ALU_WORD0_LAST(alu->last);
 
 	if (alu->is_op3) {
@@ -1837,6 +1969,8 @@ int r600_bytecode_build(struct r600_bytecode *bc)
 					if (r)
 						return r;
 					r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
+					r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
+
 					switch(bc->chip_class) {
 					case EVERGREEN: /* eg alu is same encoding as r700 */
 					case CAYMAN:
@@ -1932,6 +2066,8 @@ int r600_bytecode_build(struct r600_bytecode *bc)
 					if (r)
 						return r;
 					r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
+					r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
+
 					switch(bc->chip_class) {
 					case R600:
 						r = r600_bytecode_alu_build(bc, alu, addr);
@@ -2072,6 +2208,19 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
 			case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER:
 			case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER:
 			case EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE:
+				if (cf->eg_alu_extended) {
+					fprintf(stderr, "%04d %08X ALU_EXT0 ", id, bc->bytecode[id]);
+					fprintf(stderr, "KCACHE_BANK2:%X ", cf->kcache[2].bank);
+					fprintf(stderr, "KCACHE_BANK3:%X ", cf->kcache[3].bank);
+					fprintf(stderr, "KCACHE_MODE2:%X\n", cf->kcache[2].mode);
+					id++;
+					fprintf(stderr, "%04d %08X ALU_EXT1 ", id, bc->bytecode[id]);
+					fprintf(stderr, "KCACHE_MODE3:%X ", cf->kcache[3].mode);
+					fprintf(stderr, "KCACHE_ADDR2:%X ", cf->kcache[2].addr);
+					fprintf(stderr, "KCACHE_ADDR3:%X\n", cf->kcache[3].addr);
+					id++;
+				}
+
 				fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
 				fprintf(stderr, "ADDR:%d ", cf->addr);
 				fprintf(stderr, "KCACHE_MODE0:%X ", cf->kcache[0].mode);
@@ -2275,7 +2424,8 @@ void r600_bytecode_dump(struct r600_bytecode *bc)
 			fprintf(stderr, "SRC1(SEL:%d ", alu->src[1].sel);
 			fprintf(stderr, "REL:%d ", alu->src[1].rel);
 			fprintf(stderr, "CHAN:%d ", alu->src[1].chan);
-			fprintf(stderr, "NEG:%d) ", alu->src[1].neg);
+			fprintf(stderr, "NEG:%d ", alu->src[1].neg);
+			fprintf(stderr, "IM:%d) ", alu->index_mode);
 			fprintf(stderr, "LAST:%d)\n", alu->last);
 			id++;
 			fprintf(stderr, "%04d %08X %c ", id, bc->bytecode[id], alu->last ? '*' : ' ');
@@ -2554,7 +2704,7 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru
 	}
 
 	memset(&bc, 0, sizeof(bc));
-	r600_bytecode_init(&bc, rctx->chip_class);
+	r600_bytecode_init(&bc, rctx->chip_class, rctx->family);
 
 	for (i = 0; i < ve->count; i++) {
 		if (elements[i].instance_divisor > 1) {

src/gallium/drivers/r600/r600_asm.h

@@ -32,6 +32,7 @@ struct r600_bytecode_alu_src {
 	unsigned			neg;
 	unsigned			abs;
 	unsigned			rel;
+	unsigned			kc_bank;
 	uint32_t			value;
 };
 
@@ -54,6 +55,7 @@ struct r600_bytecode_alu {
 	unsigned			bank_swizzle;
 	unsigned			bank_swizzle_force;
 	unsigned			omod;
+	unsigned                        index_mode;
 };
 
 struct r600_bytecode_tex {
@@ -143,8 +145,9 @@ struct r600_bytecode_cf {
 	unsigned			cond;
 	unsigned			pop_count;
 	unsigned			cf_addr; /* control flow addr */
-	struct r600_bytecode_kcache		kcache[2];
+	struct r600_bytecode_kcache		kcache[4];
 	unsigned			r6xx_uses_waterfall;
+	unsigned			eg_alu_extended;
 	struct list_head		alu;
 	struct list_head		tex;
 	struct list_head		vtx;
@@ -176,6 +179,10 @@ struct r600_cf_callstack {
 	int				max;
 };
 
+#define AR_HANDLE_NORMAL 0
+#define AR_HANDLE_RV6XX 1 /* except RV670 */
+
+
 struct r600_bytecode {
 	enum chip_class			chip_class;
 	int				type;
@@ -194,13 +201,15 @@ struct r600_bytecode {
 	struct r600_cf_callstack	callstack[SQ_MAX_CALL_DEPTH];
 	unsigned	ar_loaded;
 	unsigned	ar_reg;
+	unsigned        ar_handling;
+	unsigned        r6xx_nop_after_rel_dst;
 };
 
 /* eg_asm.c */
 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
 
 /* r600_asm.c */
-void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class);
+void r600_bytecode_init(struct r600_bytecode *bc, enum chip_class chip_class, enum radeon_family family);
 void r600_bytecode_clear(struct r600_bytecode *bc);
 int r600_bytecode_add_alu(struct r600_bytecode *bc, const struct r600_bytecode_alu *alu);
 int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx);

src/gallium/drivers/r600/r600_hw_context.c

@@ -408,9 +408,13 @@ static const struct r600_reg r600_context_reg_list[] = {
 	{R_028128_CB_CLEAR_BLUE, 0, 0, 0},
 	{R_02812C_CB_CLEAR_ALPHA, 0, 0, 0},
 	{R_028140_ALU_CONST_BUFFER_SIZE_PS_0, REG_FLAG_DIRTY_ALWAYS, 0, 0},
+	{R_028144_ALU_CONST_BUFFER_SIZE_PS_1, REG_FLAG_DIRTY_ALWAYS, 0, 0},
 	{R_028180_ALU_CONST_BUFFER_SIZE_VS_0, REG_FLAG_DIRTY_ALWAYS, 0, 0},
+	{R_028184_ALU_CONST_BUFFER_SIZE_VS_1, REG_FLAG_DIRTY_ALWAYS, 0, 0},
 	{R_028940_ALU_CONST_CACHE_PS_0, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
+	{R_028944_ALU_CONST_CACHE_PS_1, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
 	{R_028980_ALU_CONST_CACHE_VS_0, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
+	{R_028984_ALU_CONST_CACHE_VS_1, REG_FLAG_NEED_BO, S_0085F0_SH_ACTION_ENA(1), 0xFFFFFFFF},
 	{R_02823C_CB_SHADER_MASK, 0, 0, 0},
 	{R_028238_CB_TARGET_MASK, 0, 0, 0},
 	{R_028410_SX_ALPHA_TEST_CONTROL, 0, 0, 0},
@@ -1326,15 +1330,20 @@ void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *
 			if (block->pm4_bo_index[j]) {
 				/* find relocation */
 				struct r600_block_reloc *reloc = &block->reloc[block->pm4_bo_index[j]];
-				block->pm4[reloc->bo_pm4_index] =
+				if (reloc->bo) {
-					r600_context_bo_reloc(ctx, reloc->bo, reloc->bo_usage);
+					block->pm4[reloc->bo_pm4_index] =
-				r600_context_bo_flush(ctx,
+							r600_context_bo_reloc(ctx, reloc->bo, reloc->bo_usage);
-						      reloc->flush_flags,
+					r600_context_bo_flush(ctx,
-						      reloc->flush_mask,
+							reloc->flush_flags,
-						      reloc->bo);
+							reloc->flush_mask,
+							reloc->bo);
+				} else {
+					block->pm4[reloc->bo_pm4_index] = 0;
+				}
 				nbo--;
 				if (nbo == 0)
 					break;
+
 			}
 		}
 		ctx->flags &= ~R600_CONTEXT_CHECK_EVENT_FLUSH;

src/gallium/drivers/r600/r600_pipe.c

@@ -47,6 +47,7 @@
 #include "r600_resource.h"
 #include "r600_shader.h"
 #include "r600_pipe.h"
+#include "r600_hw_context_priv.h"
 
 /*
  * pipe_context
@@ -116,6 +117,14 @@ static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
 
 	rscreen->fences.data[fence->index] = 0;
 	r600_context_emit_fence(&ctx->ctx, rscreen->fences.bo, fence->index, 1);
+
+	/* Create a dummy BO so that fence_finish without a timeout can sleep waiting for completion */
+	fence->sleep_bo = (struct r600_resource*)
+			pipe_buffer_create(&ctx->ctx.screen->screen, PIPE_BIND_CUSTOM,
+					   PIPE_USAGE_STAGING, 1);
+	/* Add the fence as a dummy relocation. */
+	r600_context_bo_reloc(&ctx->ctx, fence->sleep_bo, RADEON_USAGE_READWRITE);
+
 out:
 	pipe_mutex_unlock(rscreen->fences.mutex);
 	return fence;
@@ -492,7 +501,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
 	case PIPE_SHADER_CAP_MAX_CONSTS:
 		return R600_MAX_CONST_BUFFER_SIZE;
 	case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
-		return R600_MAX_CONST_BUFFERS;
+		return R600_MAX_CONST_BUFFERS-1;
 	case PIPE_SHADER_CAP_MAX_PREDS:
 		return 0; /* FIXME */
 	case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
@@ -505,8 +514,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
 	case PIPE_SHADER_CAP_SUBROUTINES:
 		return 0;
 	case PIPE_SHADER_CAP_INTEGERS:
-		if (rscreen->chip_class == EVERGREEN)
-			return 1;
 		return 0;
 	case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 		return 16;
@@ -570,6 +577,7 @@ static void r600_fence_reference(struct pipe_screen *pscreen,
 	if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
 		struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 		pipe_mutex_lock(rscreen->fences.mutex);
+		pipe_resource_reference((struct pipe_resource**)&(*oldf)->sleep_bo, NULL);
 		LIST_ADDTAIL(&(*oldf)->head, &rscreen->fences.pool);
 		pipe_mutex_unlock(rscreen->fences.mutex);
 	}
@@ -603,6 +611,17 @@ static boolean r600_fence_finish(struct pipe_screen *pscreen,
 	}
 
 	while (rscreen->fences.data[rfence->index] == 0) {
+		/* Special-case infinite timeout - wait for the dummy BO to become idle */
+		if (timeout == PIPE_TIMEOUT_INFINITE) {
+			rscreen->ws->buffer_wait(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE);
+			break;
+		}
+
+		/* The dummy BO will be busy until the CS including the fence has completed, or
+		 * the GPU is reset. Don't bother continuing to spin when the BO is idle. */
+		if (!rscreen->ws->buffer_is_busy(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE))
+			break;
+
 		if (++spins % 256)
 			continue;
 #ifdef PIPE_OS_UNIX
@@ -612,11 +631,11 @@ static boolean r600_fence_finish(struct pipe_screen *pscreen,
 #endif
 		if (timeout != PIPE_TIMEOUT_INFINITE &&
 		    os_time_get() - start_time >= timeout) {
-			return FALSE;
+			break;
 		}
 	}
 
-	return TRUE;
+	return rscreen->fences.data[rfence->index] != 0;
 }
 
 static int r600_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)

src/gallium/drivers/r600/r600_pipe.h

@@ -39,7 +39,7 @@
 #include "r600_shader.h"
 #include "r600_resource.h"
 
-#define R600_MAX_CONST_BUFFERS 1
+#define R600_MAX_CONST_BUFFERS 2
 #define R600_MAX_CONST_BUFFER_SIZE 4096
 
 #ifdef PIPE_ARCH_BIG_ENDIAN
@@ -108,7 +108,9 @@ struct r600_pipe_rasterizer {
 	boolean				clamp_vertex_color;
 	boolean				clamp_fragment_color;
 	boolean				flatshade;
+	boolean				two_side;
 	unsigned			sprite_coord_enable;
+	unsigned                        clip_plane_enable;
 	float				offset_units;
 	float				offset_scale;
 };
@@ -170,6 +172,7 @@ struct r600_textures_info {
 struct r600_fence {
 	struct pipe_reference		reference;
 	unsigned			index; /* in the shared bo */
+	struct r600_resource            *sleep_bo;
 	struct list_head		head;
 };
 
@@ -218,6 +221,9 @@ struct r600_pipe_context {
 	/* shader information */
 	boolean				clamp_vertex_color;
 	boolean				clamp_fragment_color;
+	boolean				two_side;
+	unsigned			user_clip_plane_enable;
+	unsigned			clip_dist_enable;
 	unsigned			sprite_coord_enable;
 	boolean				export_16bpc;
 	unsigned			alpha_ref;

src/gallium/drivers/r600/r600_shader.c

@@ -191,6 +191,10 @@ struct r600_shader_ctx {
 	boolean                                 input_linear;
 	boolean                                 input_perspective;
 	int					num_interp_gpr;
+	int					face_gpr;
+	int					colors_used;
+	boolean                 clip_vertex_write;
+	unsigned                cv_output;
 };
 
 struct r600_shader_tgsi_instruction {
@@ -374,12 +378,6 @@ static int r600_spi_sid(struct r600_shader_io * io)
 			/* For generic params simply use sid from tgsi */
 			index = io->sid;
 		} else {
-
-			/* FIXME: two-side rendering is broken in r600g, this will
-			 * keep old functionality */
-			if (name == TGSI_SEMANTIC_BCOLOR)
-				name = TGSI_SEMANTIC_COLOR;
-
 			/* For non-generic params - pack name and sid into 8 bits */
 			index = 0x80 | (name<<3) | (io->sid);
 		}
@@ -393,6 +391,51 @@ static int r600_spi_sid(struct r600_shader_io * io)
 	return index;
 };
 
+/* turn input into interpolate on EG */
+static int evergreen_interp_input(struct r600_shader_ctx *ctx, int index)
+{
+	int r = 0;
+
+	if (ctx->shader->input[index].spi_sid) {
+		ctx->shader->input[index].lds_pos = ctx->shader->nlds++;
+		if (ctx->shader->input[index].interpolate > 0) {
+			r = evergreen_interp_alu(ctx, index);
+		} else {
+			r = evergreen_interp_flat(ctx, index);
+		}
+	}
+	return r;
+}
+
+static int select_twoside_color(struct r600_shader_ctx *ctx, int front, int back)
+{
+	struct r600_bytecode_alu alu;
+	int i, r;
+	int gpr_front = ctx->shader->input[front].gpr;
+	int gpr_back = ctx->shader->input[back].gpr;
+
+	for (i = 0; i < 4; i++) {
+		memset(&alu, 0, sizeof(alu));
+		alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT);
+		alu.is_op3 = 1;
+		alu.dst.write = 1;
+		alu.dst.sel = gpr_front;
+		alu.src[0].sel = ctx->face_gpr;
+		alu.src[1].sel = gpr_front;
+		alu.src[2].sel = gpr_back;
+
+		alu.dst.chan = i;
+		alu.src[1].chan = i;
+		alu.src[2].chan = i;
+		alu.last = (i==3);
+
+		if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
+			return r;
+	}
+
+	return 0;
+}
+
 static int tgsi_declaration(struct r600_shader_ctx *ctx)
 {
 	struct tgsi_full_declaration *d = &ctx->parse.FullToken.FullDeclaration;
@@ -408,15 +451,15 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
 		ctx->shader->input[i].interpolate = d->Declaration.Interpolate;
 		ctx->shader->input[i].centroid = d->Declaration.Centroid;
 		ctx->shader->input[i].gpr = ctx->file_offset[TGSI_FILE_INPUT] + d->Range.First;
-		if (ctx->type == TGSI_PROCESSOR_FRAGMENT && ctx->bc->chip_class >= EVERGREEN) {
+		if (ctx->type == TGSI_PROCESSOR_FRAGMENT) {
-			/* turn input into interpolate on EG */
+			if (ctx->shader->input[i].name == TGSI_SEMANTIC_FACE)
-			if (ctx->shader->input[i].spi_sid) {
+				ctx->face_gpr = ctx->shader->input[i].gpr;
-				ctx->shader->input[i].lds_pos = ctx->shader->nlds++;
+			else if (ctx->shader->input[i].name == TGSI_SEMANTIC_COLOR)
-				if (ctx->shader->input[i].interpolate > 0) {
+				ctx->colors_used++;
-					evergreen_interp_alu(ctx, i);
+			if (ctx->bc->chip_class >= EVERGREEN) {
-				} else {
+				r = evergreen_interp_input(ctx, i);
-					evergreen_interp_flat(ctx, i);
+				if (r)
-				}
+					return r;
 			}
 		}
 		break;
@@ -427,6 +470,21 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
 		ctx->shader->output[i].spi_sid = r600_spi_sid(&ctx->shader->output[i]);
 		ctx->shader->output[i].gpr = ctx->file_offset[TGSI_FILE_OUTPUT] + d->Range.First;
 		ctx->shader->output[i].interpolate = d->Declaration.Interpolate;
+		ctx->shader->output[i].write_mask = d->Declaration.UsageMask;
+		if (ctx->type == TGSI_PROCESSOR_VERTEX) {
+			switch (d->Semantic.Name) {
+			case TGSI_SEMANTIC_CLIPDIST:
+				ctx->shader->clip_dist_write |= d->Declaration.UsageMask << (d->Semantic.Index << 2);
+				break;
+			case TGSI_SEMANTIC_PSIZE:
+				ctx->shader->vs_out_misc_write = 1;
+				break;
+			case TGSI_SEMANTIC_CLIPVERTEX:
+				ctx->clip_vertex_write = TRUE;
+				ctx->cv_output = i;
+				break;
+			}
+		}
 		break;
 	case TGSI_FILE_CONSTANT:
 	case TGSI_FILE_TEMPORARY:
@@ -690,6 +748,47 @@ static int tgsi_split_literal_constant(struct r600_shader_ctx *ctx)
 	return 0;
 }
 
+static int process_twoside_color_inputs(struct r600_shader_ctx *ctx)
+{
+	int i, r, count = ctx->shader->ninput;
+
+	/* additional inputs will be allocated right after the existing inputs,
+	 * we won't need them after the color selection, so we don't need to
+	 * reserve these gprs for the rest of the shader code and to adjust
+	 * output offsets etc. */
+	int gpr = ctx->file_offset[TGSI_FILE_INPUT] +
+			ctx->info.file_max[TGSI_FILE_INPUT] + 1;
+
+	if (ctx->face_gpr == -1) {
+		i = ctx->shader->ninput++;
+		ctx->shader->input[i].name = TGSI_SEMANTIC_FACE;
+		ctx->shader->input[i].spi_sid = 0;
+		ctx->shader->input[i].gpr = gpr++;
+		ctx->face_gpr = ctx->shader->input[i].gpr;
+	}
+
+	for (i = 0; i < count; i++) {
+		if (ctx->shader->input[i].name == TGSI_SEMANTIC_COLOR) {
+			int ni = ctx->shader->ninput++;
+			memcpy(&ctx->shader->input[ni],&ctx->shader->input[i], sizeof(struct r600_shader_io));
+			ctx->shader->input[ni].name = TGSI_SEMANTIC_BCOLOR;
+			ctx->shader->input[ni].spi_sid = r600_spi_sid(&ctx->shader->input[ni]);
+			ctx->shader->input[ni].gpr = gpr++;
+
+			if (ctx->bc->chip_class >= EVERGREEN) {
+				r = evergreen_interp_input(ctx, ni);
+				if (r)
+					return r;
+			}
+
+			r = select_twoside_color(ctx, i, ni);
+			if (r)
+				return r;
+		}
+	}
+	return 0;
+}
+
 static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pipe_shader *pipeshader)
 {
 	struct r600_shader *shader = &pipeshader->shader;
@@ -701,11 +800,12 @@ static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pi
 	struct r600_bytecode_output output[32];
 	unsigned output_done, noutput;
 	unsigned opcode;
-	int i, j, r = 0, pos0;
+	int i, j, k, r = 0;
+	int next_pixel_base = 0, next_pos_base = 60, next_param_base = 0;
 
 	ctx.bc = &shader->bc;
 	ctx.shader = shader;
-	r600_bytecode_init(ctx.bc, rctx->chip_class);
+	r600_bytecode_init(ctx.bc, rctx->chip_class, rctx->family);
 	ctx.tokens = tokens;
 	tgsi_scan_shader(tokens, &ctx.info);
 	tgsi_parse_init(&ctx.parse, tokens);
@@ -713,6 +813,12 @@ static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pi
 	shader->processor_type = ctx.type;
 	ctx.bc->type = shader->processor_type;
 
+	ctx.face_gpr = -1;
+	ctx.colors_used = 0;
+	ctx.clip_vertex_write = 0;
+
+	shader->two_side = (ctx.type == TGSI_PROCESSOR_FRAGMENT) && rctx->two_side;
+
 	shader->clamp_color = (((ctx.type == TGSI_PROCESSOR_FRAGMENT) && rctx->clamp_fragment_color) ||
 		((ctx.type == TGSI_PROCESSOR_VERTEX) && rctx->clamp_vertex_color));
 
@@ -791,6 +897,37 @@ static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pi
 			if (r)
 				goto out_err;
 			break;
+		case TGSI_TOKEN_TYPE_INSTRUCTION:
+			break;
+		case TGSI_TOKEN_TYPE_PROPERTY:
+			property = &ctx.parse.FullToken.FullProperty;
+			switch (property->Property.PropertyName) {
+			case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
+				if (property->u[0].Data == 1)
+					shader->fs_write_all = TRUE;
+				break;
+			case TGSI_PROPERTY_VS_PROHIBIT_UCPS:
+				if (property->u[0].Data == 1)
+					shader->vs_prohibit_ucps = TRUE;
+				break;
+			}
+			break;
+		default:
+			R600_ERR("unsupported token type %d\n", ctx.parse.FullToken.Token.Type);
+			r = -EINVAL;
+			goto out_err;
+		}
+	}
+
+	if (shader->two_side && ctx.colors_used) {
+		if ((r = process_twoside_color_inputs(&ctx)))
+			return r;
+	}
+
+	tgsi_parse_init(&ctx.parse, tokens);
+	while (!tgsi_parse_end_of_tokens(&ctx.parse)) {
+		tgsi_parse_token(&ctx.parse);
+		switch (ctx.parse.FullToken.Token.Type) {
 		case TGSI_TOKEN_TYPE_INSTRUCTION:
 			r = tgsi_is_supported(&ctx);
 			if (r)
@@ -814,22 +951,57 @@ static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pi
 			if (r)
 				goto out_err;
 			break;
-		case TGSI_TOKEN_TYPE_PROPERTY:
-			property = &ctx.parse.FullToken.FullProperty;
-			if (property->Property.PropertyName == TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS) {
-				if (property->u[0].Data == 1)
-					shader->fs_write_all = TRUE;
-			}
-			break;
 		default:
-			R600_ERR("unsupported token type %d\n", ctx.parse.FullToken.Token.Type);
+			break;
-			r = -EINVAL;
-			goto out_err;
 		}
 	}
 
 	noutput = shader->noutput;
 
+	if (ctx.clip_vertex_write) {
+		/* need to convert a clipvertex write into clipdistance writes and not export
+		   the clip vertex anymore */
+
+		memset(&shader->output[noutput], 0, 2*sizeof(struct r600_shader_io));
+		shader->output[noutput].name = TGSI_SEMANTIC_CLIPDIST;
+		shader->output[noutput].gpr = ctx.temp_reg;
+		noutput++;
+		shader->output[noutput].name = TGSI_SEMANTIC_CLIPDIST;
+		shader->output[noutput].gpr = ctx.temp_reg+1;
+		noutput++;
+
+		/* reset spi_sid for clipvertex output to avoid confusing spi */
+		shader->output[ctx.cv_output].spi_sid = 0;
+
+		shader->clip_dist_write = 0xFF;
+
+		for (i = 0; i < 8; i++) {
+			int oreg = i >> 2;
+			int ochan = i & 3;
+
+			for (j = 0; j < 4; j++) {
+				struct r600_bytecode_alu alu;
+				memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+				alu.inst = BC_INST(ctx.bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4);
+				alu.src[0].sel = shader->output[ctx.cv_output].gpr;
+				alu.src[0].chan = j;
+
+				alu.src[1].sel = 512 + i;
+				alu.src[1].kc_bank = 1;
+				alu.src[1].chan = j;
+
+				alu.dst.sel = ctx.temp_reg + oreg;
+				alu.dst.chan = j;
+				alu.dst.write = (j == ochan);
+				if (j == 3)
+					alu.last = 1;
+				r = r600_bytecode_add_alu(ctx.bc, &alu);
+				if (r)
+					return r;
+			}
+		}
+	}
+
 	/* clamp color outputs */
 	if (shader->clamp_color) {
 		for (i = 0; i < noutput; i++) {
@@ -949,68 +1121,86 @@ static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pi
 	}
 
 	/* export output */
-	j = 0;
+	for (i = 0, j = 0; i < noutput; i++, j++) {
-	for (i = 0, pos0 = 0; i < noutput; i++) {
+		memset(&output[j], 0, sizeof(struct r600_bytecode_output));
-		memset(&output[i], 0, sizeof(struct r600_bytecode_output));
+		output[j].gpr = shader->output[i].gpr;
-		output[i + j].gpr = shader->output[i].gpr;
+		output[j].elem_size = 3;
-		output[i + j].elem_size = 3;
+		output[j].swizzle_x = 0;
-		output[i + j].swizzle_x = 0;
+		output[j].swizzle_y = 1;
-		output[i + j].swizzle_y = 1;
+		output[j].swizzle_z = 2;
-		output[i + j].swizzle_z = 2;
+		output[j].swizzle_w = 3;
-		output[i + j].swizzle_w = 3;
+		output[j].burst_count = 1;
-		output[i + j].burst_count = 1;
+		output[j].barrier = 1;
-		output[i + j].barrier = 1;
+		output[j].type = -1;
-		output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
+		output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
-		output[i + j].array_base = i - pos0;
-		output[i + j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
 		switch (ctx.type) {
 		case TGSI_PROCESSOR_VERTEX:
-			if (shader->output[i].name == TGSI_SEMANTIC_POSITION) {
+			switch (shader->output[i].name) {
-				output[i + j].array_base = 60;
+			case TGSI_SEMANTIC_POSITION:
-				output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
+				output[j].array_base = next_pos_base++;
-				/* position doesn't count in array_base */
+				output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
-				pos0++;
+				break;
-			}
+
-			if (shader->output[i].name == TGSI_SEMANTIC_PSIZE) {
+			case TGSI_SEMANTIC_PSIZE:
-				output[i + j].array_base = 61;
+				output[j].array_base = next_pos_base++;
-				output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
+				output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
-				/* position doesn't count in array_base */
+				break;
-				pos0++;
+			case TGSI_SEMANTIC_CLIPVERTEX:
+				j--;
+				break;
+			case TGSI_SEMANTIC_CLIPDIST:
+				output[j].array_base = next_pos_base++;
+				output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
+				/* spi_sid is 0 for clipdistance outputs that were generated
+				 * for clipvertex - we don't need to pass them to PS */
+				if (shader->output[i].spi_sid) {
+					j++;
+					/* duplicate it as PARAM to pass to the pixel shader */
+					memcpy(&output[j], &output[j-1], sizeof(struct r600_bytecode_output));
+					output[j].array_base = next_param_base++;
+					output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
+				}
+				break;
+			case TGSI_SEMANTIC_FOG:
+				output[j].swizzle_y = 4; /* 0 */
+				output[j].swizzle_z = 4; /* 0 */
+				output[j].swizzle_w = 5; /* 1 */
+				break;
 			}
 			break;
 		case TGSI_PROCESSOR_FRAGMENT:
 			if (shader->output[i].name == TGSI_SEMANTIC_COLOR) {
-				output[i + j].array_base = shader->output[i].sid;
+				output[j].array_base = next_pixel_base++;
-				output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+				output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
 				if (shader->fs_write_all && (rctx->chip_class >= EVERGREEN)) {
-					for (j = 1; j < shader->nr_cbufs; j++) {
+					for (k = 1; k < shader->nr_cbufs; k++) {
-						memset(&output[i + j], 0, sizeof(struct r600_bytecode_output));
+						j++;
-						output[i + j].gpr = shader->output[i].gpr;
+						memset(&output[j], 0, sizeof(struct r600_bytecode_output));
-						output[i + j].elem_size = 3;
+						output[j].gpr = shader->output[i].gpr;
-						output[i + j].swizzle_x = 0;
+						output[j].elem_size = 3;
-						output[i + j].swizzle_y = 1;
+						output[j].swizzle_x = 0;
-						output[i + j].swizzle_z = 2;
+						output[j].swizzle_y = 1;
-						output[i + j].swizzle_w = 3;
+						output[j].swizzle_z = 2;
-						output[i + j].burst_count = 1;
+						output[j].swizzle_w = 3;
-						output[i + j].barrier = 1;
+						output[j].burst_count = 1;
-						output[i + j].array_base = shader->output[i].sid + j;
+						output[j].barrier = 1;
-						output[i + j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+						output[j].array_base = next_pixel_base++;
-						output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+						output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+						output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
 					}
-					j = shader->nr_cbufs-1;
 				}
 			} else if (shader->output[i].name == TGSI_SEMANTIC_POSITION) {
-				output[i + j].array_base = 61;
+				output[j].array_base = 61;
-				output[i + j].swizzle_x = 2;
+				output[j].swizzle_x = 2;
-				output[i + j].swizzle_y = 7;
+				output[j].swizzle_y = 7;
-				output[i + j].swizzle_z = output[i + j].swizzle_w = 7;
+				output[j].swizzle_z = output[j].swizzle_w = 7;
-				output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+				output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
 			} else if (shader->output[i].name == TGSI_SEMANTIC_STENCIL) {
-				output[i + j].array_base = 61;
+				output[j].array_base = 61;
-				output[i + j].swizzle_x = 7;
+				output[j].swizzle_x = 7;
-				output[i + j].swizzle_y = 1;
+				output[j].swizzle_y = 1;
-				output[i + j].swizzle_z = output[i + j].swizzle_w = 7;
+				output[j].swizzle_z = output[j].swizzle_w = 7;
-				output[i + j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+				output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
 			} else {
 				R600_ERR("unsupported fragment output name %d\n", shader->output[i].name);
 				r = -EINVAL;
@@ -1022,48 +1212,49 @@ static int r600_shader_from_tgsi(struct r600_pipe_context * rctx, struct r600_pi
 			r = -EINVAL;
 			goto out_err;
 		}
+
+		if (output[j].type==-1) {
+			output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
+			output[j].array_base = next_param_base++;
+		}
 	}
-	noutput += j;
+
 	/* add fake param output for vertex shader if no param is exported */
-	if (ctx.type == TGSI_PROCESSOR_VERTEX) {
+	if (ctx.type == TGSI_PROCESSOR_VERTEX && next_param_base == 0) {
-		for (i = 0, pos0 = 0; i < noutput; i++) {
+			memset(&output[j], 0, sizeof(struct r600_bytecode_output));
-			if (output[i].type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM) {
+			output[j].gpr = 0;
-				pos0 = 1;
+			output[j].elem_size = 3;
-				break;
+			output[j].swizzle_x = 7;
-			}
+			output[j].swizzle_y = 7;
-		}
+			output[j].swizzle_z = 7;
-		if (!pos0) {
+			output[j].swizzle_w = 7;
-			memset(&output[i], 0, sizeof(struct r600_bytecode_output));
+			output[j].burst_count = 1;
-			output[i].gpr = 0;
+			output[j].barrier = 1;
-			output[i].elem_size = 3;
+			output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
-			output[i].swizzle_x = 7;
+			output[j].array_base = 0;
-			output[i].swizzle_y = 7;
+			output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
-			output[i].swizzle_z = 7;
+			j++;
-			output[i].swizzle_w = 7;
-			output[i].burst_count = 1;
-			output[i].barrier = 1;
-			output[i].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
-			output[i].array_base = 0;
-			output[i].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
-			noutput++;
-		}
 	}
+
 	/* add fake pixel export */
-	if (ctx.type == TGSI_PROCESSOR_FRAGMENT && !noutput) {
+	if (ctx.type == TGSI_PROCESSOR_FRAGMENT && j == 0) {
-		memset(&output[0], 0, sizeof(struct r600_bytecode_output));
+		memset(&output[j], 0, sizeof(struct r600_bytecode_output));
-		output[0].gpr = 0;
+		output[j].gpr = 0;
-		output[0].elem_size = 3;
+		output[j].elem_size = 3;
-		output[0].swizzle_x = 7;
+		output[j].swizzle_x = 7;
-		output[0].swizzle_y = 7;
+		output[j].swizzle_y = 7;
-		output[0].swizzle_z = 7;
+		output[j].swizzle_z = 7;
-		output[0].swizzle_w = 7;
+		output[j].swizzle_w = 7;
-		output[0].burst_count = 1;
+		output[j].burst_count = 1;
-		output[0].barrier = 1;
+		output[j].barrier = 1;
-		output[0].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
+		output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
-		output[0].array_base = 0;
+		output[j].array_base = 0;
-		output[0].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
+		output[j].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
-		noutput++;
+		j++;
 	}
+
+	noutput = j;
+
 	/* set export done on last export of each type */
 	for (i = noutput - 1, output_done = 0; i >= 0; i--) {
 		if (ctx.bc->chip_class < CAYMAN) {

src/gallium/drivers/r600/r600_shader.h

@@ -34,6 +34,7 @@ struct r600_shader_io {
 	unsigned		interpolate;
 	boolean                 centroid;
 	unsigned		lds_pos; /* for evergreen */
+	unsigned		write_mask;
 };
 
 struct r600_shader {
@@ -46,8 +47,14 @@ struct r600_shader {
 	struct r600_shader_io	output[32];
 	boolean			uses_kill;
 	boolean			fs_write_all;
+	boolean			vs_prohibit_ucps;
 	boolean			clamp_color;
+	boolean			two_side;
 	unsigned		nr_cbufs;
+	/* bit n is set if the shader writes gl_ClipDistance[n] */
+	unsigned		clip_dist_write;
+	/* flag is set if the shader writes VS_OUT_MISC_VEC (e.g. for PSIZE) */
+	boolean			vs_out_misc_write;
 };
 
 #endif

src/gallium/drivers/r600/r600_sq.h

@@ -471,4 +471,11 @@
 #define SQ_ALU_SCL_122                           0x00000001
 #define SQ_ALU_SCL_212                           0x00000002
 #define SQ_ALU_SCL_221                           0x00000003
+
+#define   INDEX_MODE_AR_X 0
+#define   INDEX_MODE_AR_Y 1
+#define   INDEX_MODE_AR_Z 2
+#define   INDEX_MODE_AR_W 3
+#define   INDEX_MODE_LOOP 4
+
 #endif

src/gallium/drivers/r600/r600_state.c

@@ -509,6 +509,10 @@ static uint32_t r600_translate_colorformat(enum pipe_format format)
 	case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 		return V_0280A0_COLOR_X24_8_32_FLOAT;
 
+	case PIPE_FORMAT_R32_UINT:
+	case PIPE_FORMAT_R32_SINT:
+		return V_0280A0_COLOR_32;
+
 	case PIPE_FORMAT_R32_FLOAT:
 	case PIPE_FORMAT_Z32_FLOAT:
 		return V_0280A0_COLOR_32_FLOAT;
@@ -954,6 +958,8 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
 	rs->clamp_fragment_color = state->clamp_fragment_color;
 	rs->flatshade = state->flatshade;
 	rs->sprite_coord_enable = state->sprite_coord_enable;
+	rs->two_side = state->light_twoside;
+	rs->clip_plane_enable = state->clip_plane_enable;
 
 	clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
 	/* offset */
@@ -990,8 +996,8 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
 		S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
 		S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_02881C_PA_CL_VS_OUT_CNTL,
-			S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex) |
+			S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex),
-			S_02881C_VS_OUT_MISC_VEC_ENA(state->point_size_per_vertex), 0xFFFFFFFF, NULL, 0);
+			S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x00000000, 0xFFFFFFFF, NULL, 0);
 	/* point size 12.4 fixed point */
 	tmp = (unsigned)(state->point_size * 8.0);
@@ -1030,10 +1036,10 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
 	r600_pipe_state_add_reg(rstate, R_028DFC_PA_SU_POLY_OFFSET_CLAMP, fui(state->offset_clamp), 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, clip_rule, 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_028810_PA_CL_CLIP_CNTL,
-			S_028810_PS_UCP_MODE(3) | (state->clip_plane_enable & 63) |
+			S_028810_PS_UCP_MODE(3) | S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
-			S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
+			S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip),
-			S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip), 0xFFFFFFFF, NULL, 0);
+			S_028810_PS_UCP_MODE(3) | S_028810_ZCLIP_NEAR_DISABLE(1) |
-
+			S_028810_ZCLIP_FAR_DISABLE(1), NULL, 0);
 	return rstate;
 }
 
@@ -1311,6 +1317,7 @@ static void r600_set_clip_state(struct pipe_context *ctx,
 {
 	struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 	struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
+	struct pipe_resource * cbuf;
 
 	if (rstate == NULL)
 		return;
@@ -1335,6 +1342,13 @@ static void r600_set_clip_state(struct pipe_context *ctx,
 	free(rctx->states[R600_PIPE_STATE_CLIP]);
 	rctx->states[R600_PIPE_STATE_CLIP] = rstate;
 	r600_context_pipe_state_set(&rctx->ctx, rstate);
+
+	cbuf = pipe_user_buffer_create(ctx->screen,
+                                   state->ucp,
+                                   4*4*8, /* 8*4 floats */
+                                   PIPE_BIND_CONSTANT_BUFFER);
+	r600_set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 1, cbuf);
+	pipe_resource_reference(&cbuf, NULL);
 }
 
 static void r600_set_polygon_stipple(struct pipe_context *ctx,
@@ -2069,7 +2083,7 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
 	struct r600_shader *rshader = &shader->shader;
 	unsigned i, exports_ps, num_cout, spi_ps_in_control_0, spi_input_z, spi_ps_in_control_1, db_shader_control;
 	int pos_index = -1, face_index = -1;
-	unsigned tmp, sid;
+	unsigned tmp, sid, ufi = 0;
 
 	rstate->nregs = 0;
 
@@ -2147,6 +2161,10 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
 			S_0286D0_FRONT_FACE_ADDR(rshader->input[face_index].gpr);
 	}
 
+	/* HW bug in original R600 */
+	if (rctx->family == CHIP_R600)
+		ufi = 1;
+
 	r600_pipe_state_add_reg(rstate, R_0286CC_SPI_PS_IN_CONTROL_0, spi_ps_in_control_0, 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_0286D0_SPI_PS_IN_CONTROL_1, spi_ps_in_control_1, 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_0286D8_SPI_INPUT_Z, spi_input_z, 0xFFFFFFFF, NULL, 0);
@@ -2156,7 +2174,8 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
 	r600_pipe_state_add_reg(rstate,
 				R_028850_SQ_PGM_RESOURCES_PS,
 				S_028850_NUM_GPRS(rshader->bc.ngpr) |
-				S_028850_STACK_SIZE(rshader->bc.nstack),
+				S_028850_STACK_SIZE(rshader->bc.nstack) |
+				S_028850_UNCACHED_FIRST_INST(ufi),
 				0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate,
 				R_028854_SQ_PGM_EXPORTS_PS,
@@ -2234,6 +2253,16 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shad
 	r600_pipe_state_add_reg(rstate,
 				R_03E200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF,
 				0xFFFFFFFF, NULL, 0);
+
+	r600_pipe_state_add_reg(rstate,
+				R_02881C_PA_CL_VS_OUT_CNTL,
+				S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) |
+				S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) |
+				S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write),
+				S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) |
+				S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) |
+				S_02881C_VS_OUT_MISC_VEC_ENA(1),
+				NULL, 0);
 }
 
 void r600_fetch_shader(struct pipe_context *ctx,

src/gallium/drivers/r600/r600_state_common.c

@@ -103,6 +103,7 @@ void r600_bind_rs_state(struct pipe_context *ctx, void *state)
 	rctx->clamp_fragment_color = rs->clamp_fragment_color;
 
 	rctx->sprite_coord_enable = rs->sprite_coord_enable;
+	rctx->two_side = rs->two_side;
 
 	rctx->rasterizer = rs;
 
@@ -352,11 +353,11 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
 	case PIPE_SHADER_VERTEX:
 		rctx->vs_const_buffer.nregs = 0;
 		r600_pipe_state_add_reg(&rctx->vs_const_buffer,
-					R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
+					R_028180_ALU_CONST_BUFFER_SIZE_VS_0 + index * 4,
 					ALIGN_DIVUP(buffer->width0 >> 4, 16),
 					0xFFFFFFFF, NULL, 0);
 		r600_pipe_state_add_reg(&rctx->vs_const_buffer,
-					R_028980_ALU_CONST_CACHE_VS_0,
+					R_028980_ALU_CONST_CACHE_VS_0 + index * 4,
 					offset >> 8, 0xFFFFFFFF, rbuffer, RADEON_USAGE_READ);
 		r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_const_buffer);
 
@@ -549,6 +550,30 @@ static int r600_shader_rebuild(struct pipe_context * ctx, struct r600_pipe_shade
 static void r600_update_derived_state(struct r600_pipe_context *rctx)
 {
 	struct pipe_context * ctx = (struct pipe_context*)rctx;
+	struct r600_pipe_state rstate;
+	unsigned user_clip_plane_enable;
+	unsigned clip_dist_enable;
+
+	if (rctx->vs_shader->shader.clip_dist_write || rctx->vs_shader->shader.vs_prohibit_ucps)
+		user_clip_plane_enable = 0;
+	else
+		user_clip_plane_enable = rctx->rasterizer->clip_plane_enable & 0x3F;
+
+	clip_dist_enable = rctx->rasterizer->clip_plane_enable & rctx->vs_shader->shader.clip_dist_write;
+	rstate.nregs = 0;
+
+	if (user_clip_plane_enable != rctx->user_clip_plane_enable) {
+		r600_pipe_state_add_reg(&rstate, R_028810_PA_CL_CLIP_CNTL, user_clip_plane_enable , 0x3F, NULL, 0);
+		rctx->user_clip_plane_enable = user_clip_plane_enable;
+	}
+
+	if (clip_dist_enable != rctx->clip_dist_enable) {
+		r600_pipe_state_add_reg(&rstate, R_02881C_PA_CL_VS_OUT_CNTL, clip_dist_enable, 0xFF, NULL, 0);
+		rctx->clip_dist_enable = clip_dist_enable;
+	}
+
+	if (rstate.nregs)
+		r600_context_pipe_state_set(&rctx->ctx, &rstate);
 
 	if (!rctx->blitter->running) {
 		if (rctx->have_depth_fb || rctx->have_depth_texture)
@@ -564,6 +589,7 @@ static void r600_update_derived_state(struct r600_pipe_context *rctx)
 	}
 
 	if ((rctx->ps_shader->shader.clamp_color != rctx->clamp_fragment_color) ||
+	    (rctx->ps_shader->shader.two_side != rctx->two_side) ||
 	    ((rctx->chip_class >= EVERGREEN) && rctx->ps_shader->shader.fs_write_all &&
 	     (rctx->ps_shader->shader.nr_cbufs != rctx->nr_cbufs))) {
 		r600_shader_rebuild(&rctx->context, rctx->ps_shader);

src/gallium/drivers/r600/r600_texture.c

@@ -869,6 +869,7 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
 	const struct util_format_description *desc;
 	boolean uniform = TRUE;
 	static int r600_enable_s3tc = -1;
+	bool is_srgb_valid = FALSE;
 
 	int i;
 	const uint32_t sign_bit[4] = {
@@ -980,14 +981,17 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
 		case PIPE_FORMAT_DXT1_SRGB:
 		case PIPE_FORMAT_DXT1_SRGBA:
 			result = FMT_BC1;
+			is_srgb_valid = TRUE;
 			goto out_word4;
 		case PIPE_FORMAT_DXT3_RGBA:
 		case PIPE_FORMAT_DXT3_SRGBA:
 			result = FMT_BC2;
+			is_srgb_valid = TRUE;
 			goto out_word4;
 		case PIPE_FORMAT_DXT5_RGBA:
 		case PIPE_FORMAT_DXT5_SRGBA:
 			result = FMT_BC3;
+			is_srgb_valid = TRUE;
 			goto out_word4;
 		default:
 			goto out_unknown;
@@ -1095,6 +1099,7 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
 				goto out_word4;
 			case 4:
 				result = FMT_8_8_8_8;
+				is_srgb_valid = TRUE;
 				goto out_word4;
 			}
 			goto out_unknown;
@@ -1158,6 +1163,9 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
 	}
 
 out_word4:
+
+	if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB && !is_srgb_valid)
+		return ~0;
 	if (word4_p)
 		*word4_p = word4;
 	if (yuv_format_p)

src/gallium/drivers/r600/r600d.h

@@ -3538,9 +3538,13 @@
 #define R_038018_RESOURCE0_WORD6                     0x038018
 
 #define R_028140_ALU_CONST_BUFFER_SIZE_PS_0          0x00028140
+#define R_028144_ALU_CONST_BUFFER_SIZE_PS_1          0x00028144
 #define R_028180_ALU_CONST_BUFFER_SIZE_VS_0          0x00028180
+#define R_028184_ALU_CONST_BUFFER_SIZE_VS_1          0x00028184
 #define R_028940_ALU_CONST_CACHE_PS_0                0x00028940
+#define R_028944_ALU_CONST_CACHE_PS_1                0x00028944
 #define R_028980_ALU_CONST_CACHE_VS_0                0x00028980
+#define R_028984_ALU_CONST_CACHE_VS_1                0x00028984
 
 #define R_03CFF0_SQ_VTX_BASE_VTX_LOC                 0x03CFF0
 #define R_03CFF4_SQ_VTX_START_INST_LOC               0x03CFF4

src/gallium/drivers/softpipe/sp_screen.c

@@ -45,7 +45,7 @@
 #include "sp_fence.h"
 #include "sp_public.h"
 
-DEBUG_GET_ONCE_BOOL_OPTION(use_llvm, "SOFTPIPE_USE_LLVM", FALSE);
+DEBUG_GET_ONCE_BOOL_OPTION(use_llvm, "SOFTPIPE_USE_LLVM", FALSE)
 
 static const char *
 softpipe_get_vendor(struct pipe_screen *screen)
@@ -121,7 +121,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
       return 1;
    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
-      return 64; /* matches core Mesa defaults */
+      return 256; /* for GL3 */
    case PIPE_CAP_MIN_TEXEL_OFFSET:
       return -8;
    case PIPE_CAP_MAX_TEXEL_OFFSET:
@@ -138,7 +138,9 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
 static int
 softpipe_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
 {
+#ifdef HAVE_LLVM
    struct softpipe_screen *sp_screen = softpipe_screen(screen);
+#endif
    switch(shader)
    {
    case PIPE_SHADER_FRAGMENT:

src/gallium/drivers/softpipe/sp_state_derived.c

@@ -88,7 +88,7 @@ softpipe_get_vertex_info(struct softpipe_context *softpipe)
       vinfo->num_attribs = 0;
       for (i = 0; i < fsInfo->num_inputs; i++) {
          int src;
-         enum interp_mode interp;
+         enum interp_mode interp = INTERP_LINEAR;
 
          switch (fsInfo->input_interpolate[i]) {
          case TGSI_INTERPOLATE_CONSTANT:
@@ -105,7 +105,6 @@ softpipe_get_vertex_info(struct softpipe_context *softpipe)
             break;
          default:
             assert(0);
-            interp = INTERP_LINEAR;
          }
 
          switch (fsInfo->input_semantic_name[i]) {

src/gallium/drivers/svga/include/svga_types.h

@@ -28,6 +28,7 @@
 
 #include "pipe/p_compiler.h"
 
+#ifndef __HAIKU__
 typedef int64_t int64;
 typedef uint64_t uint64;
 
@@ -39,6 +40,9 @@ typedef uint16_t uint16;
 
 typedef int8_t int8;
 typedef uint8_t uint8;
+#else
+#include <OS.h>
+#endif /* HAIKU */
 
 typedef uint8_t Bool;
 

src/gallium/drivers/svga/svga_pipe_depthstencil.c

@@ -57,10 +57,10 @@ svga_translate_stencil_op(unsigned op)
    case PIPE_STENCIL_OP_KEEP:      return SVGA3D_STENCILOP_KEEP;
    case PIPE_STENCIL_OP_ZERO:      return SVGA3D_STENCILOP_ZERO;
    case PIPE_STENCIL_OP_REPLACE:   return SVGA3D_STENCILOP_REPLACE;
-   case PIPE_STENCIL_OP_INCR:      return SVGA3D_STENCILOP_INCR;
+   case PIPE_STENCIL_OP_INCR:      return SVGA3D_STENCILOP_INCRSAT;
-   case PIPE_STENCIL_OP_DECR:      return SVGA3D_STENCILOP_DECR;
+   case PIPE_STENCIL_OP_DECR:      return SVGA3D_STENCILOP_DECRSAT;
-   case PIPE_STENCIL_OP_INCR_WRAP: return SVGA3D_STENCILOP_INCRSAT; /* incorrect? */
+   case PIPE_STENCIL_OP_INCR_WRAP: return SVGA3D_STENCILOP_INCR;
-   case PIPE_STENCIL_OP_DECR_WRAP: return SVGA3D_STENCILOP_DECRSAT; /* incorrect? */
+   case PIPE_STENCIL_OP_DECR_WRAP: return SVGA3D_STENCILOP_DECR;
    case PIPE_STENCIL_OP_INVERT:    return SVGA3D_STENCILOP_INVERT;
    default:
       assert(0);

src/gallium/drivers/svga/svga_pipe_rasterizer.c

@@ -237,11 +237,11 @@ static void svga_bind_rasterizer_state( struct pipe_context *pipe,
    struct svga_context *svga = svga_context(pipe);
    struct svga_rasterizer_state *raster = (struct svga_rasterizer_state *)state;
 
-   svga->curr.rast = raster;
 
    draw_set_rasterizer_state(svga->swtnl.draw, raster ? &raster->templ : NULL,
                              state);
-   
+   svga->curr.rast = raster;
+
    svga->dirty |= SVGA_NEW_RAST;
 }
 

src/gallium/drivers/svga/svga_resource_texture.c

@@ -454,16 +454,19 @@ svga_texture_create(struct pipe_screen *screen,
    }
 
    /* 
-    * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
+    * Note: Previously we never passed the
+    * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
     * know beforehand whether a texture will be used as a rendertarget or not
     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
+    *
+    * However, this was changed since other state trackers
+    * (XA for example) uses it accurately and certain device versions
+    * relies on it in certain situations to render correctly.
     */
-#if 0
    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
       !util_format_is_s3tc(template->format))
       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
-#endif
    
    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;

src/gallium/drivers/svga/svga_screen.c

@@ -235,7 +235,7 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en
       case PIPE_SHADER_CAP_MAX_TEMPS:
          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
             return 32;
-         return result.u;
+         return MIN2(result.u, SVGA3D_TEMPREG_MAX);
       case PIPE_SHADER_CAP_MAX_ADDRS:
       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 	 /* 
@@ -286,7 +286,7 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en
       case PIPE_SHADER_CAP_MAX_TEMPS:
          if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
             return 32;
-         return result.u;
+         return MIN2(result.u, SVGA3D_TEMPREG_MAX);
       case PIPE_SHADER_CAP_MAX_ADDRS:
          return 1;
       case PIPE_SHADER_CAP_MAX_PREDS:

src/gallium/drivers/svga/svga_state_framebuffer.c

@@ -477,7 +477,7 @@ emit_clip_planes( struct svga_context *svga,
 
    /* TODO: just emit directly from svga_set_clip_state()?
     */
-   for (i = 0; i < 6; i++) {
+   for (i = 0; i < SVGA3D_MAX_CLIP_PLANES; i++) {
       /* need to express the plane in D3D-style coordinate space.
        * GL coords get converted to D3D coords with the matrix:
        * [ 1  0  0  0 ]

src/gallium/drivers/svga/svga_state_need_swtnl.c

@@ -136,7 +136,7 @@ update_need_pipeline( struct svga_context *svga,
 
    /* EDGEFLAGS
     */
-    if (vs->base.info.writes_edgeflag) {
+    if (vs && vs->base.info.writes_edgeflag) {
       SVGA_DBG(DEBUG_SWTNL, "%s: edgeflags\n", __FUNCTION__);
       need_pipeline = TRUE;
    }
@@ -145,7 +145,8 @@ update_need_pipeline( struct svga_context *svga,
     */
    if (svga->curr.reduced_prim == PIPE_PRIM_POINTS) {
       unsigned sprite_coord_gen = svga->curr.rast->templ.sprite_coord_enable;
-      unsigned generic_inputs = svga->curr.fs->generic_inputs;
+      unsigned generic_inputs =
+         svga->curr.fs ? svga->curr.fs->generic_inputs : 0;
 
       if (sprite_coord_gen &&
           (generic_inputs & ~sprite_coord_gen)) {

src/gallium/drivers/svga/svga_state_rss.c

@@ -244,8 +244,8 @@ static int emit_rss( struct svga_context *svga,
       EMIT_RS_FLOAT( svga, bias, DEPTHBIAS, fail );
    }
 
-   if (dirty & SVGA_NEW_CLIP) {
+   if (dirty & SVGA_NEW_RAST) {
-      /* the number of clip planes is how many planes to enable */
+      /* bitmask of the enabled clip planes */
       unsigned enabled = svga->curr.rast->templ.clip_plane_enable;
       EMIT_RS( svga, enabled, CLIPPLANEENABLE, fail );
    }
@@ -285,7 +285,6 @@ struct svga_tracked_state svga_hw_rss =
 
    (SVGA_NEW_BLEND |
     SVGA_NEW_BLEND_COLOR |
-    SVGA_NEW_CLIP |
     SVGA_NEW_DEPTH_STENCIL |
     SVGA_NEW_STENCIL_REF |
     SVGA_NEW_RAST |

src/gallium/state_trackers/dri/common/dri_context.c

@@ -232,8 +232,7 @@ dri_make_current(__DRIcontext * cPriv,
    if (draw->textures[ST_ATTACHMENT_BACK_LEFT] && draw->textures[ST_ATTACHMENT_DEPTH_STENCIL]
       && ctx->pp)
          pp_init_fbos(ctx->pp, draw->textures[ST_ATTACHMENT_BACK_LEFT]->width0,
-            draw->textures[ST_ATTACHMENT_BACK_LEFT]->height0,
+            draw->textures[ST_ATTACHMENT_BACK_LEFT]->height0);
-            draw->textures[ST_ATTACHMENT_DEPTH_STENCIL]);
 
    return GL_TRUE;
 }

src/gallium/state_trackers/dri/common/dri_drawable.c

@@ -53,6 +53,7 @@ dri_st_framebuffer_validate(struct st_framebuffer_iface *stfbi,
    unsigned statt_mask, new_mask;
    boolean new_stamp;
    int i;
+   unsigned int lastStamp;
 
    statt_mask = 0x0;
    for (i = 0; i < count; i++)
@@ -66,23 +67,26 @@ dri_st_framebuffer_validate(struct st_framebuffer_iface *stfbi,
     * client stamp.  It has the value of the server stamp when last
     * checked.
     */
-   new_stamp = (drawable->texture_stamp != drawable->dPriv->lastStamp);
+   do {
+      lastStamp = drawable->dPriv->lastStamp;
+      new_stamp = (drawable->texture_stamp != lastStamp);
 
-   if (new_stamp || new_mask || screen->broken_invalidate) {
+      if (new_stamp || new_mask || screen->broken_invalidate) {
-      if (new_stamp && drawable->update_drawable_info)
+         if (new_stamp && drawable->update_drawable_info)
-         drawable->update_drawable_info(drawable);
+            drawable->update_drawable_info(drawable);
 
-      drawable->allocate_textures(drawable, statts, count);
+         drawable->allocate_textures(drawable, statts, count);
 
-      /* add existing textures */
+         /* add existing textures */
-      for (i = 0; i < ST_ATTACHMENT_COUNT; i++) {
+         for (i = 0; i < ST_ATTACHMENT_COUNT; i++) {
-         if (drawable->textures[i])
+            if (drawable->textures[i])
-            statt_mask |= (1 << i);
+               statt_mask |= (1 << i);
+         }
+
+         drawable->texture_stamp = lastStamp;
+         drawable->texture_mask = statt_mask;
       }
-
+   } while (lastStamp != drawable->dPriv->lastStamp);
-      drawable->texture_stamp = drawable->dPriv->lastStamp;
-      drawable->texture_mask = statt_mask;
-   }
 
    if (!out)
       return TRUE;

src/gallium/state_trackers/dri/drm/dri2.c

@@ -316,6 +316,9 @@ dri2_allocate_buffer(__DRIscreen *sPriv,
 
    switch (format) {
       case 32:
+         pf = PIPE_FORMAT_B8G8R8A8_UNORM;
+         break;
+      case 24:
          pf = PIPE_FORMAT_B8G8R8X8_UNORM;
          break;
       case 16:

src/gallium/state_trackers/dri/sw/drisw.c

@@ -253,6 +253,7 @@ drisw_update_tex_buffer(struct dri_drawable *drawable,
    char *map;
    int x, y, w, h;
    int ximage_stride, line;
+   int cpp = util_format_get_blocksize(res->format);
 
    get_drawable_info(dPriv, &x, &y, &w, &h);
 
@@ -265,9 +266,8 @@ drisw_update_tex_buffer(struct dri_drawable *drawable,
    /* Copy the Drawable content to the mapped texture buffer */
    get_image(dPriv, x, y, w, h, map);
 
-   /* The pipe transfer has a pitch rounded up to the nearest 64 pixels.
+   /* The pipe transfer has a pitch rounded up to the nearest 64 pixels. */
-      We assume 32 bit pixels. */
+   ximage_stride = w * cpp;
-   ximage_stride = w * 4;
    for (line = h-1; line; --line) {
       memmove(&map[line * transfer->stride],
               &map[line * ximage_stride],

src/gallium/state_trackers/egl/wayland/native_shm.c

@@ -94,11 +94,10 @@ wayland_create_shm_buffer(struct wayland_display *display,
 
    switch (surface->color_format) {
    case PIPE_FORMAT_B8G8R8A8_UNORM:
-      format = (surface->premultiplied_alpha) ?
+      format = WL_SHM_FORMAT_ARGB8888;
-         WL_SHM_FORMAT_PREMULTIPLIED_ARGB32 : WL_SHM_FORMAT_ARGB32;
       break;
    case PIPE_FORMAT_B8G8R8X8_UNORM:
-      format = WL_SHM_FORMAT_XRGB32;
+      format = WL_SHM_FORMAT_XRGB8888;
       break;
    default:
       return NULL;
@@ -116,7 +115,7 @@ shm_handle_format(void *data, struct wl_shm *shm, uint32_t format)
    struct wayland_shm_display *shmdpy = data;
 
    switch (format) {
-   case WL_SHM_FORMAT_ARGB32:
+   case WL_SHM_FORMAT_ARGB8888:
       shmdpy->base.formats |= HAS_ARGB8888;
       break;
    case WL_SHM_FORMAT_XRGB8888:

src/gallium/state_trackers/vega/path.c

@@ -367,6 +367,8 @@ static struct polygon_array * path_get_fill_polygons(struct path *p, struct matr
    void *coords = (VGfloat *)p->control_points->data;
    struct array *array;
 
+   memset(data, 0, sizeof(data));
+
    if (p->fill_polys.polygon_array.array)
    {
       if (memcmp( &p->fill_polys.matrix,

src/gallium/state_trackers/vega/text.c

@@ -73,8 +73,8 @@ static void add_glyph(struct vg_font *font,
    glyph = CALLOC_STRUCT(vg_glyph);
    glyph->object = obj;
    glyph->is_hinted = isHinted;
-   memcpy(glyph->glyph_origin, glyphOrigin, sizeof(glyphOrigin));
+   memcpy(glyph->glyph_origin, glyphOrigin, sizeof(glyph->glyph_origin));
-   memcpy(glyph->escapement, escapement, sizeof(escapement));
+   memcpy(glyph->escapement, escapement, sizeof(glyph->glyph_origin));
 
    cso_hash_insert(font->glyphs, (unsigned) glyphIndex, glyph);
 }

src/gallium/state_trackers/xa/xa_tracker.h

@@ -36,8 +36,8 @@
 
 #include <stdint.h>
 
-#define XA_TRACKER_VERSION_MAJOR 0
+#define XA_TRACKER_VERSION_MAJOR 1
-#define XA_TRACKER_VERSION_MINOR 6
+#define XA_TRACKER_VERSION_MINOR 0
 #define XA_TRACKER_VERSION_PATCH 0
 
 #define XA_FLAG_SHARED         (1 << 0)

src/gallium/state_trackers/xorg/xvmc/subpicture.c

@@ -29,7 +29,6 @@
 
 #include <X11/Xlibint.h>
 #include <X11/extensions/XvMClib.h>
-#include <xorg/fourcc.h>
 
 #include "pipe/p_screen.h"
 #include "pipe/p_video_decoder.h"
@@ -46,6 +45,8 @@
 #include "xvmc_private.h"
 
 #define FOURCC_RGB 0x0000003
+#define FOURCC_AI44 0x34344941
+#define FOURCC_IA44 0x34344149
 
 static enum pipe_format XvIDToPipe(int xvimage_id)
 {

src/gallium/targets/egl-static/egl_st.c

@@ -54,8 +54,9 @@ dlopen_gl_lib_cb(const char *dir, size_t len, void *callback_data)
    int ret;
 
    if (len) {
+      assert(len <= INT_MAX && "path is insanely long!");
       ret = util_snprintf(path, sizeof(path), "%.*s/%s" UTIL_DL_EXT,
-            len, dir, name);
+            (int)len, dir, name);
    }
    else {
       ret = util_snprintf(path, sizeof(path), "%s" UTIL_DL_EXT, name);

src/gallium/targets/xa-vmwgfx/Makefile

@@ -3,8 +3,8 @@ include $(TOP)/configs/current
 
 ##### MACROS #####
 
-XA_MAJOR = 0
+XA_MAJOR = 1
-XA_MINOR = 6
+XA_MINOR = 0
 XA_TINY = 0
 XA_CFLAGS = -Wall -pedantic
 

src/gbm/main/gbm.c

@@ -48,6 +48,10 @@ struct gbm_device *devices[16];
 
 static int device_num = 0;
 
+/** Returns the file description for the gbm device
+ *
+ * \return The fd that the struct gbm_device was created with
+ */
 GBM_EXPORT int
 gbm_device_get_fd(struct gbm_device *gbm)
 {
@@ -55,12 +59,29 @@ gbm_device_get_fd(struct gbm_device *gbm)
 }
 
 /* FIXME: maybe superfluous, use udev subclass from the fd? */
+/** Get the backend name for the given gbm device
+ *
+ * \return The backend name string - this belongs to the device and must not
+ * be freed
+ */
 GBM_EXPORT const char *
 gbm_device_get_backend_name(struct gbm_device *gbm)
 {
    return gbm->name;
 }
 
+/** Test if a format is supported for a given set of usage flags.
+ *
+ * \param gbm The created buffer manager
+ * \param format The format to test
+ * \param usage A bitmask of the usages to test the format against
+ * \return 1 if the format is supported otherwise 0
+ *
+ * \sa enum gbm_bo_flags for the list of flags that the format can be
+ * tested against
+ *
+ * \sa enum gbm_bo_format for the list of formats
+ */
 int
 gbm_device_is_format_supported(struct gbm_device *gbm,
                                enum gbm_bo_format format,
@@ -69,6 +90,10 @@ gbm_device_is_format_supported(struct gbm_device *gbm,
    return gbm->is_format_supported(gbm, format, usage);
 }
 
+/** Destroy the gbm device and free all resources associated with it.
+ *
+ * \param gbm The device created using gbm_create_device()
+ */
 GBM_EXPORT void
 gbm_device_destroy(struct gbm_device *gbm)
 {
@@ -103,6 +128,18 @@ _gbm_mesa_get_device(int fd)
    return gbm;
 }
 
+/** Create a gbm device for allocating buffers
+ *
+ * The file descriptor passed in is used by the backend to communicate with
+ * platform for allocating the memory. For allocations using DRI this would be
+ * the file descriptor returned when opening a device such as \c
+ * /dev/dri/card0
+ *
+ * \param fd The file descriptor for an backend specific device
+ * \return The newly created struct gbm_device. The resources associated with
+ * the device should be freed with gbm_device_destroy() when it is no longer
+ * needed. If the creation of the device failed NULL will be returned.
+ */
 GBM_EXPORT struct gbm_device *
 gbm_create_device(int fd)
 {
@@ -131,36 +168,85 @@ gbm_create_device(int fd)
    return gbm;
 }
 
+/** Get the width of the buffer object
+ *
+ * \param bo The buffer object
+ * \return The width of the allocated buffer object
+ *
+ */
 GBM_EXPORT unsigned int
 gbm_bo_get_width(struct gbm_bo *bo)
 {
    return bo->width;
 }
 
+/** Get the height of the buffer object
+ *
+ * \param bo The buffer object
+ * \return The height of the allocated buffer object
+ */
 GBM_EXPORT unsigned int
 gbm_bo_get_height(struct gbm_bo *bo)
 {
    return bo->height;
 }
 
+/** Get the stride of the buffer object
+ *
+ * This is calculated by the backend when it does the allocation in
+ * gbm_bo_create()
+ *
+ * \param bo The buffer object
+ * \return The stride of the allocated buffer object
+ */
 GBM_EXPORT uint32_t
 gbm_bo_get_pitch(struct gbm_bo *bo)
 {
    return bo->pitch;
 }
 
+/** Get the handle of the buffer object
+ *
+ * This is stored in the platform generic union gbm_bo_handle type. However
+ * the format of this handle is platform specific.
+ *
+ * \param bo The buffer object
+ * \return Returns the handle of the allocated buffer object
+ */
 GBM_EXPORT union gbm_bo_handle
 gbm_bo_get_handle(struct gbm_bo *bo)
 {
    return bo->handle;
 }
 
+/**
+ * Destroys the given buffer object and frees all resources associated with
+ * it.
+ *
+ * \param bo The buffer object
+ */
 GBM_EXPORT void
 gbm_bo_destroy(struct gbm_bo *bo)
 {
    bo->gbm->bo_destroy(bo);
 }
 
+/**
+ * Allocate a buffer object for the given dimensions
+ *
+ * \param gbm The gbm device returned from gbm_create_device()
+ * \param width The width for the buffer
+ * \param height The height for the buffer
+ * \param format The format to use for the buffer
+ * \param usage The union of the usage flags for this buffer
+ *
+ * \return A newly allocated buffer that should be freed with gbm_bo_destroy()
+ * when no longer needed. If an error occurs during allocation %NULL will be
+ * returned.
+ *
+ * \sa enum gbm_bo_format for the list of formats
+ * \sa enum gbm_bo_flags for the list of usage flags
+ */
 GBM_EXPORT struct gbm_bo *
 gbm_bo_create(struct gbm_device *gbm,
               uint32_t width, uint32_t height,
@@ -176,6 +262,24 @@ gbm_bo_create(struct gbm_device *gbm,
    return gbm->bo_create(gbm, width, height, format, usage);
 }
 
+/**
+ * Create a buffer object representing the contents of an EGLImage
+ *
+ * \param gbm The gbm device returned from gbm_create_device()
+ * \param egl_dpy The EGLDisplay on which the EGLImage was created
+ * \param egl_image The EGLImage to create the buffer from
+ * \param width The width to use in the creation of the buffer object
+ * \param height The height to use in the creation of the buffer object
+ * \param usage The union of the usage flags for this buffer
+ *
+ * \return A newly allocated buffer object that should be freed with
+ * gbm_bo_destroy() when no longer needed.
+ *
+ * \sa enum gbm_bo_flags for the list of usage flags
+ *
+ * \note The expectation is that this function will use an efficient method
+ * for making the contents of the EGLImage available as a buffer object.
+ */
 GBM_EXPORT struct gbm_bo *
 gbm_bo_create_from_egl_image(struct gbm_device *gbm,
                              void *egl_dpy, void *egl_image,

src/gbm/main/gbm.h

@@ -37,9 +37,28 @@ extern "C" {
 
 #include <stdint.h>
 
+/**
+ * \file gbm.h
+ * \brief Generic Buffer Manager
+ */
+
 struct gbm_device;
 struct gbm_bo;
 
+/**
+ * \mainpage The Generic Buffer Manager
+ *
+ * This module provides an abstraction that the caller can use to request a
+ * buffer from the underlying memory management system for the platform.
+ *
+ * This allows the creation of portable code whilst still allowing access to
+ * the underlying memory manager.
+ */
+
+/**
+ * Abstraction representing the handle to a buffer allocated by the
+ * manager
+ */
 union gbm_bo_handle {
    void *ptr;
    int32_t s32;
@@ -48,14 +67,36 @@ union gbm_bo_handle {
    uint64_t u64;
 };
 
+/** Format of the allocated buffer */
 enum gbm_bo_format {
-   GBM_BO_FORMAT_XRGB8888,
+   /** RGB with 8 bits per channel in a 32 bit value */
-   GBM_BO_FORMAT_ARGB8888,
+   GBM_BO_FORMAT_XRGB8888, 
+   /** ARGB with 8 bits per channel in a 32 bit value */
+   GBM_BO_FORMAT_ARGB8888
 };
 
+/**
+ * Flags to indicate the intended use for the buffer - these are passed into
+ * gbm_bo_create(). The caller must set the union of all the flags that are
+ * appropriate
+ *
+ * \sa Use gbm_device_is_format_supported() to check if the combination of format
+ * and use flags are supported
+ */
 enum gbm_bo_flags {
+   /**
+    * Buffer is going to be presented to the screen using an API such as KMS
+    */
    GBM_BO_USE_SCANOUT      = (1 << 0),
+   /**
+    * Buffer is going to be used as cursor - the dimensions for the buffer
+    * must be 64x64 if this flag is passed.
+    */
    GBM_BO_USE_CURSOR_64X64 = (1 << 1),
+   /**
+    * Buffer is to be used for rendering - for example it is going to be used
+    * as the storage for a color buffer
+    */
    GBM_BO_USE_RENDERING    = (1 << 2),
 };
 

src/gbm/main/gbmint.h

@@ -38,6 +38,16 @@
 #define GBM_EXPORT
 #endif
 
+/**
+ * \file gbmint.h
+ * \brief Internal implementation details of gbm
+ */
+
+/**
+ * The device used for the memory allocation.
+ *
+ * The members of this structure should be not accessed directly
+ */
 struct gbm_device {
    /* Hack to make a gbm_device detectable by its first element. */
    struct gbm_device *(*dummy)(int);
@@ -63,6 +73,11 @@ struct gbm_device {
    void (*bo_destroy)(struct gbm_bo *bo);
 };
 
+/**
+ * The allocated buffer object.
+ *
+ * The members in this structure should not be accessed directly.
+ */
 struct gbm_bo {
    struct gbm_device *gbm;
    uint32_t width;

src/glsl/Android.mk

@@ -39,6 +39,7 @@ LOCAL_SRC_FILES := \
 	$(LIBGLSL_CXX_SOURCES)
 
 LOCAL_C_INCLUDES := \
+	external/astl/include \
 	$(MESA_TOP)/src/mapi \
 	$(MESA_TOP)/src/mesa
 

src/glsl/ast_to_hir.cpp

@@ -54,6 +54,7 @@
 #include "glsl_parser_extras.h"
 #include "ast.h"
 #include "glsl_types.h"
+#include "program/hash_table.h"
 #include "ir.h"
 
 void
@@ -3405,7 +3406,7 @@ ast_jump_statement::hir(exec_list *instructions,
 			  "continue may only appear in a loop");
       } else if (mode == ast_break &&
 		 state->loop_nesting_ast == NULL &&
-		 state->switch_nesting_ast == NULL) {
+		 state->switch_state.switch_nesting_ast == NULL) {
 	 YYLTYPE loc = this->get_location();
 
 	 _mesa_glsl_error(& loc, state,
@@ -3423,11 +3424,11 @@ ast_jump_statement::hir(exec_list *instructions,
 							  state);
 	 }
 
-	 if (state->is_switch_innermost &&
+	 if (state->switch_state.is_switch_innermost &&
 	     mode == ast_break) {
 	    /* Force break out of switch by setting is_break switch state.
 	     */
-	    ir_variable *const is_break_var = state->is_break_var;
+	    ir_variable *const is_break_var = state->switch_state.is_break_var;
 	    ir_dereference_variable *const deref_is_break_var =
 	       new(ctx) ir_dereference_variable(is_break_var);
 	    ir_constant *const true_val = new(ctx) ir_constant(true);
@@ -3515,11 +3516,9 @@ ast_switch_statement::hir(exec_list *instructions,
     *
     *    "The type of init-expression in a switch statement must be a 
     *     scalar integer." 
-    *
-    * The checks are separated so that higher quality diagnostics can be
-    * generated for cases where the rule is violated.
     */
-   if (!test_expression->type->is_integer()) {
+   if (!test_expression->type->is_scalar() ||
+       !test_expression->type->is_integer()) {
       YYLTYPE loc = this->test_expression->get_location();
 
       _mesa_glsl_error(& loc,
@@ -3530,25 +3529,25 @@ ast_switch_statement::hir(exec_list *instructions,
 
    /* Track the switch-statement nesting in a stack-like manner.
     */
-   ir_variable *saved_test_var = state->test_var;
+   struct glsl_switch_state saved = state->switch_state;
-   ir_variable *saved_is_fallthru_var = state->is_fallthru_var;
-   
-   bool save_is_switch_innermost = state->is_switch_innermost;
-   ast_switch_statement *saved_nesting_ast = state->switch_nesting_ast;
 
-   state->is_switch_innermost = true;
+   state->switch_state.is_switch_innermost = true;
-   state->switch_nesting_ast = this;
+   state->switch_state.switch_nesting_ast = this;
+   state->switch_state.labels_ht = hash_table_ctor(0, hash_table_pointer_hash,
+						   hash_table_pointer_compare);
+   state->switch_state.previous_default = NULL;
 
    /* Initalize is_fallthru state to false.
     */
    ir_rvalue *const is_fallthru_val = new (ctx) ir_constant(false);
-   state->is_fallthru_var = new(ctx) ir_variable(glsl_type::bool_type,
+   state->switch_state.is_fallthru_var =
-					        "switch_is_fallthru_tmp",
+      new(ctx) ir_variable(glsl_type::bool_type,
-					        ir_var_temporary);
+			   "switch_is_fallthru_tmp",
-   instructions->push_tail(state->is_fallthru_var);
+			   ir_var_temporary);
+   instructions->push_tail(state->switch_state.is_fallthru_var);
 
    ir_dereference_variable *deref_is_fallthru_var =
-      new(ctx) ir_dereference_variable(state->is_fallthru_var);
+      new(ctx) ir_dereference_variable(state->switch_state.is_fallthru_var);
    instructions->push_tail(new(ctx) ir_assignment(deref_is_fallthru_var,
 						  is_fallthru_val,
 						  NULL));
@@ -3556,13 +3555,13 @@ ast_switch_statement::hir(exec_list *instructions,
    /* Initalize is_break state to false.
     */
    ir_rvalue *const is_break_val = new (ctx) ir_constant(false);
-   state->is_break_var = new(ctx) ir_variable(glsl_type::bool_type,
+   state->switch_state.is_break_var = new(ctx) ir_variable(glsl_type::bool_type,
-					      "switch_is_break_tmp",
+							   "switch_is_break_tmp",
-					      ir_var_temporary);
+							   ir_var_temporary);
-   instructions->push_tail(state->is_break_var);
+   instructions->push_tail(state->switch_state.is_break_var);
 
    ir_dereference_variable *deref_is_break_var =
-      new(ctx) ir_dereference_variable(state->is_break_var);
+      new(ctx) ir_dereference_variable(state->switch_state.is_break_var);
    instructions->push_tail(new(ctx) ir_assignment(deref_is_break_var,
 						  is_break_val,
 						  NULL));
@@ -3570,21 +3569,16 @@ ast_switch_statement::hir(exec_list *instructions,
    /* Cache test expression.
     */
    test_to_hir(instructions, state);
-   
+
    /* Emit code for body of switch stmt.
     */
    body->hir(instructions, state);
 
-   /* Restore previous nesting before returning.
+   hash_table_dtor(state->switch_state.labels_ht);
-    */
-   state->switch_nesting_ast = saved_nesting_ast;
-   state->is_switch_innermost = save_is_switch_innermost;
 
-   state->test_var = saved_test_var;
+   state->switch_state = saved;
-   state->is_fallthru_var = saved_is_fallthru_var;
 
-   /* Switch statements do not have r-values.
+   /* Switch statements do not have r-values. */
-    */
    return NULL;
 }
 
@@ -3595,21 +3589,19 @@ ast_switch_statement::test_to_hir(exec_list *instructions,
 {
    void *ctx = state;
 
-   /* Cache value of test expression.
+   /* Cache value of test expression. */
-    */
    ir_rvalue *const test_val =
       test_expression->hir(instructions,
 			   state);
 
-   state->test_var = new(ctx) ir_variable(glsl_type::int_type,
+   state->switch_state.test_var = new(ctx) ir_variable(test_val->type,
-					  "switch_test_tmp",
+						       "switch_test_tmp",
-					  ir_var_temporary);
+						       ir_var_temporary);
    ir_dereference_variable *deref_test_var =
-      new(ctx) ir_dereference_variable(state->test_var);
+      new(ctx) ir_dereference_variable(state->switch_state.test_var);
 
-   instructions->push_tail(state->test_var);
+   instructions->push_tail(state->switch_state.test_var);
-   instructions->push_tail(new(ctx) ir_assignment(deref_test_var,
+   instructions->push_tail(new(ctx) ir_assignment(deref_test_var, test_val,
-						  test_val,
 						  NULL));
 }
 
@@ -3620,58 +3612,51 @@ ast_switch_body::hir(exec_list *instructions,
 {
    if (stmts != NULL)
       stmts->hir(instructions, state);
-      
+
-   /* Switch bodies do not have r-values.
+   /* Switch bodies do not have r-values. */
-    */
    return NULL;
 }
 
-
 ir_rvalue *
 ast_case_statement_list::hir(exec_list *instructions,
 			     struct _mesa_glsl_parse_state *state)
 {
    foreach_list_typed (ast_case_statement, case_stmt, link, & this->cases)
       case_stmt->hir(instructions, state);
-         
+
-   /* Case statements do not have r-values.
+   /* Case statements do not have r-values. */
-    */
    return NULL;
 }
 
-
 ir_rvalue *
 ast_case_statement::hir(exec_list *instructions,
 			struct _mesa_glsl_parse_state *state)
 {
    labels->hir(instructions, state);
-   
+
-   /* Conditionally set fallthru state based on break state.
+   /* Conditionally set fallthru state based on break state. */
-    */
    ir_constant *const false_val = new(state) ir_constant(false);
    ir_dereference_variable *const deref_is_fallthru_var =
-      new(state) ir_dereference_variable(state->is_fallthru_var);
+      new(state) ir_dereference_variable(state->switch_state.is_fallthru_var);
    ir_dereference_variable *const deref_is_break_var =
-      new(state) ir_dereference_variable(state->is_break_var);
+      new(state) ir_dereference_variable(state->switch_state.is_break_var);
    ir_assignment *const reset_fallthru_on_break =
       new(state) ir_assignment(deref_is_fallthru_var,
 			       false_val,
 			       deref_is_break_var);
    instructions->push_tail(reset_fallthru_on_break);
 
-   /* Guard case statements depending on fallthru state.
+   /* Guard case statements depending on fallthru state. */
-    */
    ir_dereference_variable *const deref_fallthru_guard =
-      new(state) ir_dereference_variable(state->is_fallthru_var);
+      new(state) ir_dereference_variable(state->switch_state.is_fallthru_var);
    ir_if *const test_fallthru = new(state) ir_if(deref_fallthru_guard);
-   
+
    foreach_list_typed (ast_node, stmt, link, & this->stmts)
       stmt->hir(& test_fallthru->then_instructions, state);
 
    instructions->push_tail(test_fallthru);
-         
+
-   /* Case statements do not have r-values.
+   /* Case statements do not have r-values. */
-    */
    return NULL;
 }
 
@@ -3682,13 +3667,11 @@ ast_case_label_list::hir(exec_list *instructions,
 {
    foreach_list_typed (ast_case_label, label, link, & this->labels)
       label->hir(instructions, state);
-         
+
-   /* Case labels do not have r-values.
+   /* Case labels do not have r-values. */
-    */
    return NULL;
 }
 
-
 ir_rvalue *
 ast_case_label::hir(exec_list *instructions,
 		    struct _mesa_glsl_parse_state *state)
@@ -3696,49 +3679,86 @@ ast_case_label::hir(exec_list *instructions,
    void *ctx = state;
 
    ir_dereference_variable *deref_fallthru_var =
-      new(ctx) ir_dereference_variable(state->is_fallthru_var);
+      new(ctx) ir_dereference_variable(state->switch_state.is_fallthru_var);
-   
+
    ir_rvalue *const true_val = new(ctx) ir_constant(true);
 
-   /* If not default case, ...
+   /* If not default case, ... */
-    */
    if (this->test_value != NULL) {
       /* Conditionally set fallthru state based on
        * comparison of cached test expression value to case label.
        */
-      ir_rvalue *const test_val = this->test_value->hir(instructions, state);
+      ir_rvalue *const label_rval = this->test_value->hir(instructions, state);
+      ir_constant *label_const = label_rval->constant_expression_value();
+
+      if (!label_const) {
+	 YYLTYPE loc = this->test_value->get_location();
+
+	 _mesa_glsl_error(& loc, state,
+			  "switch statement case label must be a "
+			  "constant expression");
+
+	 /* Stuff a dummy value in to allow processing to continue. */
+	 label_const = new(ctx) ir_constant(0);
+      } else {
+	 ast_expression *previous_label = (ast_expression *)
+	    hash_table_find(state->switch_state.labels_ht,
+			    (void *)(uintptr_t)label_const->value.u[0]);
+
+	 if (previous_label) {
+	    YYLTYPE loc = this->test_value->get_location();
+	    _mesa_glsl_error(& loc, state,
+			     "duplicate case value");
+
+	    loc = previous_label->get_location();
+	    _mesa_glsl_error(& loc, state,
+			     "this is the previous case label");
+	 } else {
+	    hash_table_insert(state->switch_state.labels_ht,
+			      this->test_value,
+			      (void *)(uintptr_t)label_const->value.u[0]);
+	 }
+      }
 
       ir_dereference_variable *deref_test_var =
-	 new(ctx) ir_dereference_variable(state->test_var);
+	 new(ctx) ir_dereference_variable(state->switch_state.test_var);
 
       ir_rvalue *const test_cond = new(ctx) ir_expression(ir_binop_all_equal,
-							  glsl_type::bool_type,
+							  label_const,
-							  test_val,
 							  deref_test_var);
 
       ir_assignment *set_fallthru_on_test =
 	 new(ctx) ir_assignment(deref_fallthru_var,
 				true_val,
 				test_cond);
-   
+
       instructions->push_tail(set_fallthru_on_test);
    } else { /* default case */
-      /* Set falltrhu state.
+      if (state->switch_state.previous_default) {
-       */
+	 printf("a\n");
+	 YYLTYPE loc = this->get_location();
+	 _mesa_glsl_error(& loc, state,
+			  "multiple default labels in one switch");
+
+	 printf("b\n");
+
+	 loc = state->switch_state.previous_default->get_location();
+	 _mesa_glsl_error(& loc, state,
+			  "this is the first default label");
+      }
+      state->switch_state.previous_default = this;
+
+      /* Set falltrhu state. */
       ir_assignment *set_fallthru =
-	 new(ctx) ir_assignment(deref_fallthru_var,
+	 new(ctx) ir_assignment(deref_fallthru_var, true_val, NULL);
-				true_val,
+
-				NULL);
-   
       instructions->push_tail(set_fallthru);
    }
-   
+
-   /* Case statements do not have r-values.
+   /* Case statements do not have r-values. */
-    */
    return NULL;
 }
 
-
 void
 ast_iteration_statement::condition_to_hir(ir_loop *stmt,
 					  struct _mesa_glsl_parse_state *state)
@@ -3760,8 +3780,7 @@ ast_iteration_statement::condition_to_hir(ir_loop *stmt,
 	  * like 'if (!condition) break;' as the loop termination condition.
 	  */
 	 ir_rvalue *const not_cond =
-	    new(ctx) ir_expression(ir_unop_logic_not, glsl_type::bool_type, cond,
+	    new(ctx) ir_expression(ir_unop_logic_not, cond);
-				   NULL);
 
 	 ir_if *const if_stmt = new(ctx) ir_if(not_cond);
 
@@ -3792,8 +3811,7 @@ ast_iteration_statement::hir(exec_list *instructions,
    ir_loop *const stmt = new(ctx) ir_loop();
    instructions->push_tail(stmt);
 
-   /* Track the current loop nesting.
+   /* Track the current loop nesting. */
-    */
    ast_iteration_statement *nesting_ast = state->loop_nesting_ast;
 
    state->loop_nesting_ast = this;
@@ -3801,8 +3819,8 @@ ast_iteration_statement::hir(exec_list *instructions,
    /* Likewise, indicate that following code is closest to a loop,
     * NOT closest to a switch.
     */
-   bool saved_is_switch_innermost = state->is_switch_innermost;
+   bool saved_is_switch_innermost = state->switch_state.is_switch_innermost;
-   state->is_switch_innermost = false;
+   state->switch_state.is_switch_innermost = false;
 
    if (mode != ast_do_while)
       condition_to_hir(stmt, state);
@@ -3819,10 +3837,9 @@ ast_iteration_statement::hir(exec_list *instructions,
    if (mode != ast_do_while)
       state->symbols->pop_scope();
 
-   /* Restore previous nesting before returning.
+   /* Restore previous nesting before returning. */
-    */
    state->loop_nesting_ast = nesting_ast;
-   state->is_switch_innermost = saved_is_switch_innermost;
+   state->switch_state.is_switch_innermost = saved_is_switch_innermost;
 
    /* Loops do not have r-values.
     */

src/glsl/glcpp/glcpp-lex.l

@@ -70,7 +70,15 @@ HSPACE		[ \t]
 HASH		^{HSPACE}*#{HSPACE}*
 IDENTIFIER	[_a-zA-Z][_a-zA-Z0-9]*
 PUNCTUATION	[][(){}.&*~!/%<>^|;,=+-]
-OTHER		[^][(){}.&*~!/%<>^|;,=#[:space:]+-]+
+
+/* The OTHER class is simply a catch-all for things that the CPP
+parser just doesn't care about. Since flex regular expressions that
+match longer strings take priority over those matching shorter
+strings, we have to be careful to avoid OTHER matching and hiding
+something that CPP does care about. So we simply exclude all
+characters that appear in any other expressions. */
+
+OTHER		[^][_#[:space:]#a-zA-Z0-9(){}.&*~!/%<>^|;,=+-]
 
 DIGITS			[0-9][0-9]*
 DECIMAL_INTEGER		[1-9][0-9]*[uU]?

src/glsl/glcpp/glcpp-parse.y

@@ -85,7 +85,6 @@ _token_create_ival (void *ctx, int type, int ival);
 static token_list_t *
 _token_list_create (void *ctx);
 
-/* Note: This function calls ralloc_steal on token. */
 static void
 _token_list_append (token_list_t *list, token_t *token);
 
@@ -763,8 +762,6 @@ _token_list_append (token_list_t *list, token_t *token)
 	node->token = token;
 	node->next = NULL;
 
-	ralloc_steal (list, token);
-
 	if (list->head == NULL) {
 		list->head = node;
 	} else {

src/glsl/glsl_parser.yy

@@ -1671,6 +1671,7 @@ switch_statement:
 	SWITCH '(' expression ')' switch_body
 	{
 	   $$ = new(state) ast_switch_statement($3, $5);
+	   $$->set_location(yylloc);
 	}
 	;
 
@@ -1691,10 +1692,12 @@ case_label:
 	CASE expression ':'
 	{
 	   $$ = new(state) ast_case_label($2);
+	   $$->set_location(yylloc);
 	}
 	| DEFAULT ':'
 	{
 	   $$ = new(state) ast_case_label(NULL);
+	   $$->set_location(yylloc);
 	}
 	;
 
@@ -1705,6 +1708,7 @@ case_label_list:
 
 	   labels->labels.push_tail(& $1->link);
 	   $$ = labels;
+	   $$->set_location(yylloc);
 	}
 	| case_label_list case_label
 	{
@@ -1717,6 +1721,7 @@ case_statement:
 	case_label_list statement
 	{
 	   ast_case_statement *stmts = new(state) ast_case_statement($1);
+	   stmts->set_location(yylloc);
 
 	   stmts->stmts.push_tail(& $2->link);
 	   $$ = stmts;
@@ -1732,6 +1737,7 @@ case_statement_list:
 	case_statement
 	{
 	   ast_case_statement_list *cases= new(state) ast_case_statement_list();
+	   cases->set_location(yylloc);
 
 	   cases->cases.push_tail(& $1->link);
 	   $$ = cases;

src/glsl/glsl_parser_extras.cpp

@@ -51,7 +51,7 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *ctx,
    this->info_log = ralloc_strdup(mem_ctx, "");
    this->error = false;
    this->loop_nesting_ast = NULL;
-   this->switch_nesting_ast = NULL;
+   this->switch_state.switch_nesting_ast = NULL;
 
    this->num_builtins_to_link = 0;
 
@@ -114,6 +114,9 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *ctx,
    }
 
    this->supported_version_string = supported;
+
+   if (ctx->Const.ForceGLSLExtensionsWarn)
+      _mesa_glsl_process_extension("all", NULL, "warn", NULL, this);
 }
 
 const char *

src/glsl/glsl_parser_extras.h

@@ -42,6 +42,20 @@ enum _mesa_glsl_parser_targets {
 
 struct gl_context;
 
+struct glsl_switch_state {
+   /** Temporary variables needed for switch statement. */
+   ir_variable *test_var;
+   ir_variable *is_fallthru_var;
+   ir_variable *is_break_var;
+   class ast_switch_statement *switch_nesting_ast;
+
+   /** Table of constant values already used in case labels */
+   struct hash_table *labels_ht;
+   class ast_case_label *previous_default;
+
+   bool is_switch_innermost; // if switch stmt is closest to break, ...
+};
+
 struct _mesa_glsl_parse_state {
    _mesa_glsl_parse_state(struct gl_context *ctx, GLenum target,
 			  void *mem_ctx);
@@ -150,13 +164,8 @@ struct _mesa_glsl_parse_state {
 
    /** Loop or switch statement containing the current instructions. */
    class ast_iteration_statement *loop_nesting_ast;
-   class ast_switch_statement *switch_nesting_ast;
-   bool is_switch_innermost; // if switch stmt is closest to break, ...
 
-   /** Temporary variables needed for switch statement. */
+   struct glsl_switch_state switch_state;
-   ir_variable *test_var;
-   ir_variable *is_fallthru_var;
-   ir_variable *is_break_var;
 
    /** List of structures defined in user code. */
    const glsl_type **user_structures;