mesa: Bump version to 10.0 (final)

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

VERSION

@@ -1 +1 @@
-10.0.0-devel
+10.0.0

bin/.cherry-ignore

@@ -0,0 +1,8 @@
+# Since we've disabled DRI3 completely in 10.0, this commit is no longer
+# necessary.
+f0f202e6b764be803470e27cba9102f14361ae22 glx: conditionaly build dri3 and present loader (v3)
+
+# This patch makes bug #71870 worse, so it won't be cherry picked until that
+# issue can be resolved.  See
+# http://lists.freedesktop.org/archives/mesa-dev/2013-November/048899.html
+068a073c1d4853b5c8f33efdeb481026f42e23a5 meta: fix meta clear of layered framebuffers

configure.ac

@@ -29,14 +29,11 @@ AC_SUBST([OSMESA_VERSION])
 dnl Versions for external dependencies
 LIBDRM_REQUIRED=2.4.24
 LIBDRM_RADEON_REQUIRED=2.4.46
-LIBDRM_INTEL_REQUIRED=2.4.38
+LIBDRM_INTEL_REQUIRED=2.4.49
 LIBDRM_NVVIEUX_REQUIRED=2.4.33
 LIBDRM_NOUVEAU_REQUIRED="2.4.33 libdrm >= 2.4.41"
 LIBDRM_FREEDRENO_REQUIRED=2.4.39
 DRI2PROTO_REQUIRED=2.6
-DRI3PROTO_REQUIRED=1.0
-PRESENTPROTO_REQUIRED=1.0
-LIBUDEV_REQUIRED=151
 GLPROTO_REQUIRED=1.4.14
 
 dnl Check for progs
@@ -811,13 +808,10 @@ xyesno)
         fi
         PKG_CHECK_MODULES([DRI2PROTO], [dri2proto >= $DRI2PROTO_REQUIRED])
         GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV libdrm >= $LIBDRM_REQUIRED"
-        PKG_CHECK_MODULES([DRI3PROTO], [dri3proto >= $DRI3PROTO_REQUIRED])
-        PKG_CHECK_MODULES([PRESENTPROTO], [presentproto >= $PRESENTPROTO_REQUIRED])
-        PKG_CHECK_MODULES([LIBUDEV], [libudev >= $LIBUDEV_REQUIRED])
     fi
 
     # find the DRI deps for libGL
-    dri_modules="x11 xext xdamage xfixes x11-xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8 xcb-dri3 xcb-present xcb-sync xshmfence"
+    dri_modules="x11 xext xdamage xfixes x11-xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8"
 
     # add xf86vidmode if available
     PKG_CHECK_MODULES([XF86VIDMODE], [xxf86vm], HAVE_XF86VIDMODE=yes, HAVE_XF86VIDMODE=no)
@@ -827,8 +821,8 @@ xyesno)
 
     PKG_CHECK_MODULES([DRIGL], [$dri_modules])
     GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV $dri_modules"
-    X11_INCLUDES="$X11_INCLUDES $DRIGL_CFLAGS $LIBUDEV_CFLAGS"
-    GL_LIB_DEPS="$DRIGL_LIBS $LIBUDEV_LIBS"
+    X11_INCLUDES="$X11_INCLUDES $DRIGL_CFLAGS"
+    GL_LIB_DEPS="$DRIGL_LIBS"
 
     # need DRM libs, $PTHREAD_LIBS, etc.
     GL_LIB_DEPS="$GL_LIB_DEPS $LIBDRM_LIBS -lm $PTHREAD_LIBS $DLOPEN_LIBS"
@@ -1500,12 +1494,6 @@ AC_ARG_WITH([llvm-shared-libs],
         [link with LLVM shared libraries @<:@default=disabled@:>@])],
     [],
     [with_llvm_shared_libs=no])
-AS_IF([test x$enable_opencl = xyes],
-    [
-        if test "x$with_llvm_shared_libs" != xyes; then
-            AC_MSG_ERROR([OpenCL requires LLVM shared libraries])
-        fi
-    ])
 
 AC_ARG_WITH([llvm-prefix],
     [AS_HELP_STRING([--with-llvm-prefix],

docs/relnotes/10.0.html

@@ -14,7 +14,7 @@
 <iframe src="../contents.html"></iframe>
 <div class="content">
 
-<h1>Mesa 10.0 Release Notes / TBD</h1>
+<h1>Mesa 10.0 Release Notes / (November 30th, 2013)</h1>
 
 <p>
 Mesa 10.0 is a new development release.
@@ -55,16 +55,89 @@ Note: some of the new features are only available with certain drivers.
 <li>GL_ARB_vertex_attrib_binding</li>
 <li>GL_ARB_vertex_type_10f_11f_11f_rev on i965 and r600g</li>
 <li>GL_KHR_debug</li>
+<li>GLX_MESA_query_renderer</li>
 </ul>
 
 
 <h2>Bug fixes</h2>
 
-TBD.
+<p>Attempts have been made to <b>not</b> include bugs fixed in previous 9.2
+releases or bugs that were regressions during 10.0 development. This list is
+likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=47755">Bug 47755</a> - [glsl-compiler] no error checking when Interpolation qualifier for built-in variable is different in vertex and fragment shader</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=52171">Bug 52171</a> - [gallium/r600/clover] Simple benchmarks failed to run</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=53077">Bug 53077</a> - [IVB] Output error with msaa when both of framebuffer and source color's alpha are not 1</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=54867">Bug 54867</a> - bug in r300 compiler</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60929">Bug 60929</a> - [r600-llvm] mono games with opengl are blocking on start</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62142">Bug 62142</a> - Mesa/demo mipmap_limits upside down with running by SOFTWARE</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62698">Bug 62698</a> - [bisected] WebGL demo &quot;Consumed&quot;: texstate.c:628: update_texture_state: Assertion „__builtin_popcount(enabledTargets) == 1“ failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64225">Bug 64225</a> - bfgminer --scyte generates Segmentation Fault on Northern Island</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64226">Bug 64226</a> - python-opencl package generate segmentation fault at pipe_r600.so</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64261">Bug 64261</a> - [SNB Bisected]Ogles3conform GL3Tests_color_buffer_float_color_buffer_float_clamp_fixed.test fail</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66213">Bug 66213</a> - Certain Mesa Demos Rendering Inverted (vertically)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66806">Bug 66806</a> - [softpipe] glxgears floating point exception</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67921">Bug 67921</a> - [bisected commit 883987] crosscompiling fails with util/u_cpu_detect.c:247:4: error: 'asm' undeclared (first use in this function)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68162">Bug 68162</a> - [radeonsi] texture rendering is broken in Source-Engine games</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68451">Bug 68451</a> - Texture flicker in native Dota2 in mesa 9.2.0rc1</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68503">Bug 68503</a> - Graphical glitches in Serious Sam 3 when SB is enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68792">Bug 68792</a> - Problems during playback of h264 files using UVD and VLC on AMD E-350 CPU</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68845">Bug 68845</a> - VDPAU/UVD regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69078">Bug 69078</a> - Modern Warfare (1, 2 and 3) broken in Wine on SNB</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69321">Bug 69321</a> - starting openCL crashes/boots system</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70042">Bug 70042</a> - Major texture flickering in Dota 2 (r600g on HD 6950)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70088">Bug 70088</a> - Glamor on r600g crashes Xserver</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70123">Bug 70123</a> - Freeze caused by 'winsys/radeon: remove cs_queue_empty' commit</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70327">Bug 70327</a> - Casting floating point variable to integer not working properly while constant gets converted properly</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70891">Bug 70891</a> - CL_INVALID_BUILD_OPTIONS results in CL_INVALID_DEVICE when asking for build log</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70913">Bug 70913</a> - [PIGLIT,radeonsi] crash in &quot;spec/EXT_framebuffer_multisample/sample-alpha-to-coverage 4 depth&quot; (buffer overflow)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71022">Bug 71022</a> - configure: error: Expat required for DRI.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71110">Bug 71110</a> - xorg_driver.c:1030:2: error: too many arguments to function ‘DamageUnregister’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71172">Bug 71172</a> - Segfault when running glxinfo. NV25GL [Quadro4 900 XGL]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71512">Bug 71512</a> - dlopen.h:54: undefined reference to `dlopen'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71870">Bug 71870</a> - Metro: Last Light rendering issues</li>
+
+</ul>
 
 <h2>Changes</h2>
 
-TBD.
+<ul>
+<li>Removed X.Org state tracker (unmaintained and broken)</li>
+<li>Removed the video-accel r300 targets</li>
+<li>Removed the video-accel softpipe targets</li>
+</ul>
 
 </div>
 </body>

include/GL/internal/dri_interface.h

@@ -782,12 +782,6 @@ typedef __DRIdrawable *
                               const __DRIconfig *config,
                               void *loaderPrivate);
 
-typedef __DRIcontext *
-(*__DRIcreateNewContextFunc)(__DRIscreen *screen,
-                             const __DRIconfig *config,
-                             __DRIcontext *shared,
-                             void *loaderPrivate);
-
 typedef __DRIcontext *
 (*__DRIcreateContextAttribsFunc)(__DRIscreen *screen,
                                  int api,
@@ -949,7 +943,10 @@ struct __DRIdri2ExtensionRec {
 				    void *loaderPrivate);
 
    __DRIcreateNewDrawableFunc   createNewDrawable;
-   __DRIcreateNewContextFunc    createNewContext;
+   __DRIcontext *(*createNewContext)(__DRIscreen *screen,
+                                     const __DRIconfig *config,
+                                     __DRIcontext *shared,
+                                     void *loaderPrivate);
 
    /* Since version 2 */
    __DRIgetAPIMaskFunc          getAPIMask;
@@ -1405,7 +1402,6 @@ struct __DRIimageDriverExtensionRec {
    /* Common DRI functions, shared with DRI2 */
    __DRIcreateNewScreen2Func            createNewScreen2;
    __DRIcreateNewDrawableFunc           createNewDrawable;
-   __DRIcreateNewContextFunc            createNewContext;
    __DRIcreateContextAttribsFunc        createContextAttribs;
    __DRIgetAPIMaskFunc                  getAPIMask;
 };

src/egl/drivers/dri2/egl_dri2.h

@@ -117,7 +117,7 @@ struct dri2_egl_display
 
    __DRIdri2LoaderExtension    dri2_loader_extension;
    __DRIswrastLoaderExtension  swrast_loader_extension;
-   const __DRIextension     *extensions[4];
+   const __DRIextension     *extensions[5];
    const __DRIextension    **driver_extensions;
 
 #ifdef HAVE_X11_PLATFORM
@@ -189,7 +189,6 @@ struct dri2_egl_surface
 #ifdef HAVE_WAYLAND_PLATFORM
       struct wl_buffer   *wl_buffer;
       __DRIimage         *dri_image;
-      int                 pitch, name;
 #endif
 #ifdef HAVE_DRM_PLATFORM
       struct gbm_bo       *bo;

src/egl/drivers/dri2/platform_drm.c

@@ -175,13 +175,12 @@ dri2_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
 }
 
 static int
-get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
+get_back_bo(struct dri2_egl_surface *dri2_surf)
 {
    struct dri2_egl_display *dri2_dpy =
       dri2_egl_display(dri2_surf->base.Resource.Display);
-   struct gbm_dri_bo *bo;
    struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
-   int i, name, pitch;
+   int i;
 
    if (dri2_surf->back == NULL) {
       for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
@@ -201,6 +200,17 @@ get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
    if (dri2_surf->back->bo == NULL)
       return -1;
 
+   return 0;
+}
+
+static void
+back_bo_to_dri_buffer(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
+{
+   struct dri2_egl_display *dri2_dpy =
+      dri2_egl_display(dri2_surf->base.Resource.Display);
+   struct gbm_dri_bo *bo;
+   int name, pitch;
+
    bo = (struct gbm_dri_bo *) dri2_surf->back->bo;
 
    dri2_dpy->image->queryImage(bo->image, __DRI_IMAGE_ATTRIB_NAME, &name);
@@ -211,8 +221,6 @@ get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
    buffer->pitch = pitch;
    buffer->cpp = 4;
    buffer->flags = 0;
-
-   return 0;
 }
 
 static int
@@ -254,10 +262,11 @@ dri2_get_buffers_with_format(__DRIdrawable *driDrawable,
 
       switch (attachments[i]) {
       case __DRI_BUFFER_BACK_LEFT:
-	 if (get_back_bo(dri2_surf, &dri2_surf->buffers[j]) < 0) {
+	 if (get_back_bo(dri2_surf) < 0) {
 	    _eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
 	    return NULL;
 	 }
+         back_bo_to_dri_buffer(dri2_surf, &dri2_surf->buffers[j]);
 	 break;
       default:
 	 if (get_aux_bo(dri2_surf, attachments[i], attachments[i + 1],
@@ -312,6 +321,27 @@ dri2_get_buffers(__DRIdrawable * driDrawable,
    return buffer;
 }
 
+static int
+dri_image_get_buffers(__DRIdrawable *driDrawable,
+                      unsigned int format,
+                      uint32_t *stamp,
+                      void *loaderPrivate,
+                      uint32_t buffer_mask,
+                      struct __DRIimageList *buffers)
+{
+   struct dri2_egl_surface *dri2_surf = loaderPrivate;
+   struct gbm_dri_bo *bo;
+
+   if (get_back_bo(dri2_surf) < 0)
+      return 0;
+
+   bo = (struct gbm_dri_bo *) dri2_surf->back->bo;
+   buffers->image_mask = __DRI_IMAGE_BUFFER_BACK;
+   buffers->back = bo->image;
+
+   return 1;
+}
+
 static void
 dri2_flush_front_buffer(__DRIdrawable * driDrawable, void *loaderPrivate)
 {
@@ -348,9 +378,8 @@ dri2_query_buffer_age(_EGLDriver *drv,
                       _EGLDisplay *disp, _EGLSurface *surface)
 {
    struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surface);
-   __DRIbuffer buffer;
 
-   if (get_back_bo(dri2_surf, &buffer) < 0) {
+   if (get_back_bo(dri2_surf) < 0) {
       _eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
       return 0;
    }
@@ -469,6 +498,7 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
    dri2_dpy->gbm_dri->get_buffers = dri2_get_buffers;
    dri2_dpy->gbm_dri->flush_front_buffer = dri2_flush_front_buffer;
    dri2_dpy->gbm_dri->get_buffers_with_format = dri2_get_buffers_with_format;
+   dri2_dpy->gbm_dri->image_get_buffers = dri_image_get_buffers;
 
    dri2_dpy->gbm_dri->base.base.surface_lock_front_buffer = lock_front_buffer;
    dri2_dpy->gbm_dri->base.base.surface_release_buffer = release_buffer;

src/egl/drivers/dri2/platform_wayland.c

@@ -257,12 +257,11 @@ dri2_release_buffers(struct dri2_egl_surface *dri2_surf)
 }
 
 static int
-get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
+get_back_bo(struct dri2_egl_surface *dri2_surf)
 {
    struct dri2_egl_display *dri2_dpy =
       dri2_egl_display(dri2_surf->base.Resource.Display);
-   __DRIimage *image;
-   int i, name, pitch;
+   int i;
 
    /* There might be a buffer release already queued that wasn't processed */
    wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
@@ -295,23 +294,30 @@ get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
    if (dri2_surf->back->dri_image == NULL)
       return -1;
 
+   dri2_surf->back->locked = 1;
+
+   return 0;
+}
+
+
+static void
+back_bo_to_dri_buffer(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
+{
+   struct dri2_egl_display *dri2_dpy =
+      dri2_egl_display(dri2_surf->base.Resource.Display);
+   __DRIimage *image;
+   int name, pitch;
+
    image = dri2_surf->back->dri_image;
 
    dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_NAME, &name);
    dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &pitch);
 
-   dri2_surf->back->name = name;
-   dri2_surf->back->pitch = pitch;
-
    buffer->attachment = __DRI_BUFFER_BACK_LEFT;
    buffer->name = name;
    buffer->pitch = pitch;
    buffer->cpp = 4;
    buffer->flags = 0;
-
-   dri2_surf->back->locked = 1;
-
-   return 0;
 }
 
 static int
@@ -337,16 +343,12 @@ get_aux_bo(struct dri2_egl_surface *dri2_surf,
    return 0;
 }
 
-static __DRIbuffer *
-dri2_get_buffers_with_format(__DRIdrawable * driDrawable,
-			     int *width, int *height,
-			     unsigned int *attachments, int count,
-			     int *out_count, void *loaderPrivate)
+static int
+update_buffers(struct dri2_egl_surface *dri2_surf)
 {
-   struct dri2_egl_surface *dri2_surf = loaderPrivate;
    struct dri2_egl_display *dri2_dpy =
       dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i, j;
+   int i;
 
    if (dri2_surf->base.Type == EGL_WINDOW_BIT &&
        (dri2_surf->base.Width != dri2_surf->wl_win->width || 
@@ -360,22 +362,9 @@ dri2_get_buffers_with_format(__DRIdrawable * driDrawable,
       dri2_surf->dy = dri2_surf->wl_win->dy;
    }
 
-   for (i = 0, j = 0; i < 2 * count; i += 2, j++) {
-      switch (attachments[i]) {
-      case __DRI_BUFFER_BACK_LEFT:
-	 if (get_back_bo(dri2_surf, &dri2_surf->buffers[j]) < 0) {
+   if (get_back_bo(dri2_surf) < 0) {
       _eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
-	    return NULL;
-	 }
-	 break;
-      default:
-	 if (get_aux_bo(dri2_surf, attachments[i], attachments[i + 1],
-			&dri2_surf->buffers[j]) < 0) {
-	    _eglError(EGL_BAD_ALLOC, "failed to allocate aux buffer");
-	    return NULL;
-	 }
-	 break;
-      }
+      return -1;
    }
 
    /* If we have an extra unlocked buffer at this point, we had to do triple
@@ -391,6 +380,36 @@ dri2_get_buffers_with_format(__DRIdrawable * driDrawable,
       }
    }
 
+   return 0;
+}
+
+static __DRIbuffer *
+dri2_get_buffers_with_format(__DRIdrawable * driDrawable,
+			     int *width, int *height,
+			     unsigned int *attachments, int count,
+			     int *out_count, void *loaderPrivate)
+{
+   struct dri2_egl_surface *dri2_surf = loaderPrivate;
+   int i, j;
+
+   if (update_buffers(dri2_surf) < 0)
+      return NULL;
+
+   for (i = 0, j = 0; i < 2 * count; i += 2, j++) {
+      switch (attachments[i]) {
+      case __DRI_BUFFER_BACK_LEFT:
+         back_bo_to_dri_buffer(dri2_surf, &dri2_surf->buffers[j]);
+	 break;
+      default:
+	 if (get_aux_bo(dri2_surf, attachments[i], attachments[i + 1],
+			&dri2_surf->buffers[j]) < 0) {
+	    _eglError(EGL_BAD_ALLOC, "failed to allocate aux buffer");
+	    return NULL;
+	 }
+	 break;
+      }
+   }
+
    *out_count = j;
    if (j == 0)
 	   return NULL;
@@ -434,6 +453,25 @@ dri2_get_buffers(__DRIdrawable * driDrawable,
    return buffer;
 }
 
+static int
+image_get_buffers(__DRIdrawable *driDrawable,
+                  unsigned int format,
+                  uint32_t *stamp,
+                  void *loaderPrivate,
+                  uint32_t buffer_mask,
+                  struct __DRIimageList *buffers)
+{
+   struct dri2_egl_surface *dri2_surf = loaderPrivate;
+
+   if (update_buffers(dri2_surf) < 0)
+      return 0;
+
+   buffers->image_mask = __DRI_IMAGE_BUFFER_BACK;
+   buffers->back = dri2_surf->back->dri_image;
+
+   return 1;
+}
+
 static void
 dri2_flush_front_buffer(__DRIdrawable * driDrawable, void *loaderPrivate)
 {
@@ -441,6 +479,12 @@ dri2_flush_front_buffer(__DRIdrawable * driDrawable, void *loaderPrivate)
    (void) loaderPrivate;
 }
 
+static const __DRIimageLoaderExtension image_loader_extension = {
+   { __DRI_IMAGE_LOADER, 1 },
+   image_get_buffers,
+   dri2_flush_front_buffer
+};
+
 static void
 wayland_frame_callback(void *data, struct wl_callback *callback, uint32_t time)
 {
@@ -459,7 +503,7 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
 {
    struct dri2_egl_display *dri2_dpy =
       dri2_egl_display(dri2_surf->base.Resource.Display);
-   int fd;
+   int fd, stride, name;
 
    if (dri2_surf->current->wl_buffer != NULL)
       return;
@@ -467,6 +511,8 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
    if (dri2_dpy->capabilities & WL_DRM_CAPABILITY_PRIME) {
       dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
                                   __DRI_IMAGE_ATTRIB_FD, &fd);
+      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
+                                  __DRI_IMAGE_ATTRIB_STRIDE, &stride);
 
       dri2_surf->current->wl_buffer =
          wl_drm_create_prime_buffer(dri2_dpy->wl_drm,
@@ -474,17 +520,22 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
                                     dri2_surf->base.Width,
                                     dri2_surf->base.Height,
                                     dri2_surf->format,
-                                    0, dri2_surf->current->pitch,
+                                    0, stride,
                                     0, 0,
                                     0, 0);
       close(fd);
    } else {
+      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
+                                  __DRI_IMAGE_ATTRIB_NAME, &name);
+      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
+                                  __DRI_IMAGE_ATTRIB_STRIDE, &stride);
+
       dri2_surf->current->wl_buffer =
          wl_drm_create_buffer(dri2_dpy->wl_drm,
-                              dri2_surf->current->name,
+                              name,
                               dri2_surf->base.Width,
                               dri2_surf->base.Height,
-                              dri2_surf->current->pitch,
+                              stride,
                               dri2_surf->format);
    }
 
@@ -506,7 +557,6 @@ dri2_swap_buffers_with_damage(_EGLDriver *drv,
 {
    struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
    struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw);
-   __DRIbuffer buffer;
    int i, ret = 0;
 
    while (dri2_surf->frame_callback && ret != -1)
@@ -526,7 +576,7 @@ dri2_swap_buffers_with_damage(_EGLDriver *drv,
 
    /* Make sure we have a back buffer in case we're swapping without ever
     * rendering. */
-   if (get_back_bo(dri2_surf, &buffer) < 0) {
+   if (get_back_bo(dri2_surf) < 0) {
       _eglError(EGL_BAD_ALLOC, "dri2_swap_buffers");
       return EGL_FALSE;
    }
@@ -573,9 +623,8 @@ dri2_query_buffer_age(_EGLDriver *drv,
                       _EGLDisplay *disp, _EGLSurface *surface)
 {
    struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surface);
-   __DRIbuffer buffer;
 
-   if (get_back_bo(dri2_surf, &buffer) < 0) {
+   if (get_back_bo(dri2_surf) < 0) {
       _eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
       return 0;
    }
@@ -801,9 +850,10 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp)
       dri2_get_buffers_with_format;
 
    dri2_dpy->extensions[0] = &dri2_dpy->dri2_loader_extension.base;
-   dri2_dpy->extensions[1] = &image_lookup_extension.base;
-   dri2_dpy->extensions[2] = &use_invalidate.base;
-   dri2_dpy->extensions[3] = NULL;
+   dri2_dpy->extensions[1] = &image_loader_extension.base;
+   dri2_dpy->extensions[2] = &image_lookup_extension.base;
+   dri2_dpy->extensions[3] = &use_invalidate.base;
+   dri2_dpy->extensions[4] = NULL;
 
    if (!dri2_create_screen(disp))
       goto cleanup_driver;

src/gallium/auxiliary/os/os_thread.h

@@ -41,7 +41,7 @@
 #include "util/u_debug.h" /* for assert */
 
 
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
 
 #include <pthread.h> /* POSIX threads headers */
 #include <stdio.h> /* for perror() */
@@ -316,7 +316,7 @@ typedef int64_t pipe_condvar;
  * pipe_barrier
  */
 
-#if (defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS)) && !defined(PIPE_OS_ANDROID)
+#if (defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_HURD)) && !defined(PIPE_OS_ANDROID)
 
 typedef pthread_barrier_t pipe_barrier;
 
@@ -444,7 +444,7 @@ pipe_semaphore_wait(pipe_semaphore *sema)
  */
 
 typedef struct {
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
    pthread_key_t key;
 #elif defined(PIPE_SUBSYSTEM_WINDOWS_USER)
    DWORD key;
@@ -459,7 +459,7 @@ typedef struct {
 static INLINE void
 pipe_tsd_init(pipe_tsd *tsd)
 {
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
    if (pthread_key_create(&tsd->key, NULL/*free*/) != 0) {
       perror("pthread_key_create(): failed to allocate key for thread specific data");
       exit(-1);
@@ -476,7 +476,7 @@ pipe_tsd_get(pipe_tsd *tsd)
    if (tsd->initMagic != (int) PIPE_TSD_INIT_MAGIC) {
       pipe_tsd_init(tsd);
    }
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
    return pthread_getspecific(tsd->key);
 #elif defined(PIPE_SUBSYSTEM_WINDOWS_USER)
    assert(0);
@@ -493,7 +493,7 @@ pipe_tsd_set(pipe_tsd *tsd, void *value)
    if (tsd->initMagic != (int) PIPE_TSD_INIT_MAGIC) {
       pipe_tsd_init(tsd);
    }
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
    if (pthread_setspecific(tsd->key, value) != 0) {
       perror("pthread_set_specific() failed");
       exit(-1);

src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c

@@ -88,6 +88,9 @@ find_drm_pci_id(struct pipe_loader_drm_device *ddev)
               &ddev->base.u.pci.chip_id) != 2)
       goto fail;
 
+   udev_device_unref(device);
+   udev_unref(udev);
+
    return TRUE;
 
   fail:

src/gallium/drivers/nouveau/nouveau_video.c

@@ -519,7 +519,7 @@ nouveau_create_decoder(struct pipe_context *context,
       goto vl;
    if (screen->device->chipset >= 0x98 && screen->device->chipset != 0xa0)
       goto vl;
-   if (screen->device->chipset < 0x31 || screen->device->chipset == 0x35)
+   if (screen->device->chipset < 0x40)
       goto vl;
 
    dec = CALLOC_STRUCT(nouveau_decoder);
@@ -611,7 +611,6 @@ nouveau_create_decoder(struct pipe_context *context,
    BEGIN_NV04(push, NV31_MPEG(FORMAT), 2);
    PUSH_DATA (push, 0);
    switch (templ->entrypoint) {
-      case PIPE_VIDEO_ENTRYPOINT_BITSTREAM: PUSH_DATA (push, 0x100); break;
       case PIPE_VIDEO_ENTRYPOINT_IDCT: PUSH_DATA (push, 1); break;
       case PIPE_VIDEO_ENTRYPOINT_MC: PUSH_DATA (push, 0); break;
       default: assert(0);
@@ -782,7 +781,7 @@ nouveau_video_buffer_create(struct pipe_context *pipe,
     */
    if (templat->buffer_format != PIPE_FORMAT_NV12 || getenv("XVMC_VL") ||
        (screen->device->chipset >= 0x98 && screen->device->chipset != 0xa0) ||
-       screen->device->chipset < 0x31 || screen->device->chipset == 0x35)
+       screen->device->chipset < 0x40)
       return vl_video_buffer_create(pipe, templat);
 
    assert(templat->chroma_format == PIPE_VIDEO_CHROMA_FORMAT_420);
@@ -839,7 +838,8 @@ nouveau_screen_get_video_param(struct pipe_screen *pscreen,
 {
    switch (param) {
    case PIPE_VIDEO_CAP_SUPPORTED:
-      return vl_profile_supported(pscreen, profile, entrypoint);
+      return entrypoint >= PIPE_VIDEO_ENTRYPOINT_IDCT &&
+         u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_MPEG12;
    case PIPE_VIDEO_CAP_NPOT_TEXTURES:
       return 1;
    case PIPE_VIDEO_CAP_MAX_WIDTH:

src/gallium/drivers/r600/evergreen_compute.c

@@ -474,6 +474,10 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
 	r600_flush_emit(ctx);
 	ctx->b.flags = 0;
 
+	if (ctx->b.chip_class >= CAYMAN) {
+		ctx->skip_surface_sync_on_next_cs_flush = true;
+	}
+
 #if 0
 	COMPUTE_DBG(ctx->screen, "cdw: %i\n", cs->cdw);
 	for (i = 0; i < cs->cdw; i++) {

src/gallium/drivers/r600/r600_blit.c

@@ -619,6 +619,36 @@ void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsig
 	}
 }
 
+/**
+ * Global buffers are not really resources, they are are actually offsets
+ * into a single global resource (r600_screen::global_pool).  The means
+ * they don't have their own cs_buf handle, so they cannot be passed
+ * to r600_copy_buffer() and must be handled separately.
+ *
+ * XXX: It should be possible to implement this function using
+ * r600_copy_buffer() by passing the memory_pool resource as both src
+ * and dst and updating dstx and src_box to point to the correct offsets.
+ * This would likely perform better than the current implementation.
+ */
+static void r600_copy_global_buffer(struct pipe_context *ctx,
+				    struct pipe_resource *dst, unsigned
+				    dstx, struct pipe_resource *src,
+				    const struct pipe_box *src_box)
+{
+	struct pipe_box dst_box; struct pipe_transfer *src_pxfer,
+	*dst_pxfer;
+
+	u_box_1d(dstx, src_box->width, &dst_box);
+	void *src_ptr = ctx->transfer_map(ctx, src, 0, PIPE_TRANSFER_READ,
+					  src_box, &src_pxfer);
+	void *dst_ptr = ctx->transfer_map(ctx, dst, 0, PIPE_TRANSFER_WRITE,
+					  &dst_box, &dst_pxfer);
+	memcpy(dst_ptr, src_ptr, src_box->width);
+
+	ctx->transfer_unmap(ctx, src_pxfer);
+	ctx->transfer_unmap(ctx, dst_pxfer);
+}
+
 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
 			      unsigned offset, unsigned size, unsigned value)
 {
@@ -671,7 +701,12 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
 
 	/* Handle buffers first. */
 	if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
+		if ((src->bind & PIPE_BIND_GLOBAL) ||
+					(dst->bind & PIPE_BIND_GLOBAL)) {
+			r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
+		} else {
 			r600_copy_buffer(ctx, dst, dstx, src, src_box);
+		}
 		return;
 	}
 

src/gallium/drivers/r600/r600_hw_context.c

@@ -293,7 +293,7 @@ void r600_flush_emit(struct r600_context *rctx)
 				S_0085F0_SMX_ACTION_ENA(1);
 	}
 
-	if (cp_coher_cntl) {
+	if (cp_coher_cntl && !rctx->skip_surface_sync_on_next_cs_flush) {
 		cs->buf[cs->cdw++] = PKT3(PKT3_SURFACE_SYNC, 3, 0);
 		cs->buf[cs->cdw++] = cp_coher_cntl;   /* CP_COHER_CNTL */
 		cs->buf[cs->cdw++] = 0xffffffff;      /* CP_COHER_SIZE */
@@ -354,6 +354,8 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags)
 
 	/* Flush the CS. */
 	ctx->b.ws->cs_flush(ctx->b.rings.gfx.cs, flags, ctx->screen->cs_count++);
+
+	ctx->skip_surface_sync_on_next_cs_flush = false;
 }
 
 void r600_begin_new_cs(struct r600_context *ctx)

src/gallium/drivers/r600/r600_llvm.c

@@ -712,6 +712,7 @@ unsigned r600_llvm_compile(
 	const char * gpu_family = r600_llvm_gpu_string(family);
 	unsigned i;
 
+	memset(&binary, 0, sizeof(struct radeon_llvm_binary));
 	r = radeon_llvm_compile(mod, &binary, gpu_family, dump);
 
 	assert(binary.code_size % 4 == 0);
@@ -744,6 +745,9 @@ unsigned r600_llvm_compile(
 		}
 	}
 
+	FREE(binary.code);
+	FREE(binary.config);
+
 	return r;
 }
 

src/gallium/drivers/r600/r600_pipe.h

@@ -507,6 +507,16 @@ struct r600_context {
 
 	void				*sb_context;
 	struct r600_isa		*isa;
+
+	/* Work-around for flushing problems with compute shaders on Cayman:
+	 * Emitting a SURFACE_SYNC packet with any of the CB*_DEST_BASE_ENA
+	 * or DB_DEST_BASE_ENA bits set after dispatching a compute shader
+	 * hangs the GPU.
+	 *
+	 * Setting this to true will prevent r600_flush_emit() from emitting
+	 * a SURFACE_SYNC packet.  This field will be cleared by
+	 * by r600_context_flush() after flushing the command stream. */
+	boolean				skip_surface_sync_on_next_cs_flush;
 };
 
 static INLINE void r600_emit_command_buffer(struct radeon_winsys_cs *cs,

src/gallium/drivers/r600/sb/sb_bc.h

@@ -614,6 +614,10 @@ public:
 	unsigned num_slots;
 	bool uses_mova_gpr;
 
+	bool stack_workaround_8xx;
+	bool stack_workaround_9xx;
+
+	unsigned wavefront_size;
 	unsigned stack_entry_size;
 
 	static unsigned dump_pass;
@@ -638,6 +642,23 @@ public:
 	bool is_cayman() {return hw_class == HW_CLASS_CAYMAN;}
 	bool is_egcm() {return hw_class >= HW_CLASS_EVERGREEN;}
 
+	bool needs_8xx_stack_workaround() {
+		if (!is_evergreen())
+			return false;
+
+		switch (hw_chip) {
+		case HW_CHIP_CYPRESS:
+		case HW_CHIP_JUNIPER:
+			return false;
+		default:
+			return true;
+		}
+	}
+
+	bool needs_9xx_stack_workaround() {
+		return is_cayman();
+	}
+
 	sb_hw_class_bits hw_class_bit() {
 		switch (hw_class) {
 		case HW_CLASS_R600:return HB_R6;

src/gallium/drivers/r600/sb/sb_bc_finalize.cpp

@@ -40,8 +40,9 @@ namespace r600_sb {
 
 int bc_finalizer::run() {
 
-	regions_vec &rv = sh.get_regions();
+	run_on(sh.root);
 
+	regions_vec &rv = sh.get_regions();
 	for (regions_vec::reverse_iterator I = rv.rbegin(), E = rv.rend(); I != E;
 			++I) {
 		region_node *r = *I;
@@ -58,8 +59,6 @@ int bc_finalizer::run() {
 		r->expand();
 	}
 
-	run_on(sh.root);
-
 	cf_peephole();
 
 	// workaround for some problems on r6xx/7xx
@@ -213,18 +212,36 @@ void bc_finalizer::run_on(container_node* c) {
 		if (n->is_alu_group()) {
 			finalize_alu_group(static_cast<alu_group_node*>(n));
 		} else {
-			if (n->is_fetch_inst()) {
+			if (n->is_alu_clause()) {
+				cf_node *c = static_cast<cf_node*>(n);
+
+				if (c->bc.op == CF_OP_ALU_PUSH_BEFORE && ctx.is_egcm()) {
+					if (ctx.stack_workaround_8xx) {
+						region_node *r = c->get_parent_region();
+						if (r) {
+							unsigned ifs, loops;
+							unsigned elems = get_stack_depth(r, loops, ifs);
+							unsigned dmod1 = elems % ctx.stack_entry_size;
+							unsigned dmod2 = (elems + 1) % ctx.stack_entry_size;
+
+							if (elems && (!dmod1 || !dmod2))
+								c->flags |= NF_ALU_STACK_WORKAROUND;
+						}
+					} else if (ctx.stack_workaround_9xx) {
+						region_node *r = c->get_parent_region();
+						if (r) {
+							unsigned ifs, loops;
+							get_stack_depth(r, loops, ifs);
+							if (loops >= 2)
+								c->flags |= NF_ALU_STACK_WORKAROUND;
+						}
+					}
+				}
+			} else if (n->is_fetch_inst()) {
 				finalize_fetch(static_cast<fetch_node*>(n));
 			} else if (n->is_cf_inst()) {
 				finalize_cf(static_cast<cf_node*>(n));
-			} else if (n->is_alu_clause()) {
-
-			} else if (n->is_fetch_clause()) {
-
-			} else {
-				assert(!"unexpected node");
 			}
-
 			if (n->is_container())
 				run_on(static_cast<container_node*>(n));
 		}
@@ -578,10 +595,6 @@ void bc_finalizer::finalize_cf(cf_node* c) {
 
 	unsigned flags = c->bc.op_ptr->flags;
 
-	if (flags & CF_CALL) {
-		update_nstack(c->get_parent_region(), ctx.is_cayman() ? 1 : 2);
-	}
-
 	c->bc.end_of_program = 0;
 	last_cf = c;
 
@@ -715,17 +728,8 @@ void bc_finalizer::finalize_cf(cf_node* c) {
 
 			c->bc.index_gpr = reg >= 0 ? reg : 0;
 		}
-
-
-
-	} else {
-
-#if 0
-		if ((flags & (CF_BRANCH | CF_LOOP)) && !sh.uses_gradients) {
-			c->bc.valid_pixel_mode = 1;
-		}
-#endif
-
+	} else if (flags & CF_CALL) {
+		update_nstack(c->get_parent_region(), ctx.wavefront_size == 16 ? 2 : 1);
 	}
 }
 
@@ -763,37 +767,78 @@ void bc_finalizer::update_ngpr(unsigned gpr) {
 		ngpr = gpr + 1;
 }
 
+unsigned bc_finalizer::get_stack_depth(node *n, unsigned &loops,
+                                           unsigned &ifs, unsigned add) {
+	unsigned stack_elements = add;
+	bool has_non_wqm_push_with_loops_on_stack = false;
+	bool has_non_wqm_push = (add != 0);
+	region_node *r = n->is_region() ?
+			static_cast<region_node*>(n) : n->get_parent_region();
+
+	loops = 0;
+	ifs = 0;
+
+	while (r) {
+		if (r->is_loop()) {
+			++loops;
+			if (has_non_wqm_push)
+				has_non_wqm_push_with_loops_on_stack = true;
+		} else {
+			++ifs;
+			has_non_wqm_push = true;
+		}
+		r = r->get_parent_region();
+	}
+	stack_elements += (loops * ctx.stack_entry_size) + ifs;
+
+	// reserve additional elements in some cases
+	switch (ctx.hw_class) {
+	case HW_CLASS_R600:
+	case HW_CLASS_R700:
+		if (has_non_wqm_push)
+			stack_elements += 2;
+		break;
+	case HW_CLASS_CAYMAN:
+		if (stack_elements)
+			stack_elements += 2;
+		break;
+	case HW_CLASS_EVERGREEN:
+		if (has_non_wqm_push_with_loops_on_stack)
+			++stack_elements;
+		break;
+	}
+	return stack_elements;
+}
+
 void bc_finalizer::update_nstack(region_node* r, unsigned add) {
 	unsigned loops = 0;
 	unsigned ifs = 0;
+	unsigned elems = r ? get_stack_depth(r, loops, ifs, add) : add;
 
-	while (r) {
-		if (r->is_loop())
-			++loops;
-		else
-			++ifs;
-
-		r = r->get_parent_region();
-	}
-
-	unsigned stack_elements = (loops * ctx.stack_entry_size) + ifs + add;
-
-	// FIXME calculate more precisely
-	if (ctx.is_evergreen()) {
-		++stack_elements;
-	} else {
-		stack_elements += 2;
-		if (ctx.is_cayman())
-			++stack_elements;
-	}
-
-	unsigned stack_entries = (stack_elements + 3) >> 2;
+	// XXX all chips expect this value to be computed using 4 as entry size,
+	// not the real entry size
+	unsigned stack_entries = (elems + 3) >> 2;
 
 	if (nstack < stack_entries)
 		nstack = stack_entries;
 }
 
 void bc_finalizer::cf_peephole() {
+	if (ctx.stack_workaround_8xx || ctx.stack_workaround_9xx) {
+		for (node_iterator N, I = sh.root->begin(), E = sh.root->end(); I != E;
+				I = N) {
+			N = I; ++N;
+			cf_node *c = static_cast<cf_node*>(*I);
+
+			if (c->bc.op == CF_OP_ALU_PUSH_BEFORE &&
+					(c->flags & NF_ALU_STACK_WORKAROUND)) {
+				cf_node *push = sh.create_cf(CF_OP_PUSH);
+				c->insert_before(push);
+				push->jump(c);
+				c->bc.set_op(CF_OP_ALU);
+			}
+		}
+	}
 
 	for (node_iterator N, I = sh.root->begin(), E = sh.root->end(); I != E;
 			I = N) {

src/gallium/drivers/r600/sb/sb_context.cpp

@@ -66,20 +66,27 @@ int sb_context::init(r600_isa *isa, sb_hw_chip chip, sb_hw_class cclass) {
 	case HW_CHIP_RS780:
 	case HW_CHIP_RV620:
 	case HW_CHIP_RS880:
-
+		wavefront_size = 16;
+		stack_entry_size = 8;
+		break;
 	case HW_CHIP_RV630:
 	case HW_CHIP_RV635:
 	case HW_CHIP_RV730:
 	case HW_CHIP_RV710:
 	case HW_CHIP_PALM:
 	case HW_CHIP_CEDAR:
+		wavefront_size = 32;
 		stack_entry_size = 8;
 		break;
 	default:
+		wavefront_size = 64;
 		stack_entry_size = 4;
 		break;
 	}
 
+	stack_workaround_8xx = needs_8xx_stack_workaround();
+	stack_workaround_9xx = needs_9xx_stack_workaround();
+
 	return 0;
 }
 

src/gallium/drivers/r600/sb/sb_ir.h

@@ -700,7 +700,10 @@ enum node_flags {
 	NF_DONT_MOVE = (1 << 8),
 
 	// for KILLxx - we want to schedule them as early as possible
-	NF_SCHEDULE_EARLY = (1 << 9)
+	NF_SCHEDULE_EARLY = (1 << 9),
+
+	// for ALU_PUSH_BEFORE - when set, replace with PUSH + ALU
+	NF_ALU_STACK_WORKAROUND = (1 << 10)
 };
 
 inline node_flags operator |(node_flags l, node_flags r) {

src/gallium/drivers/r600/sb/sb_pass.h

@@ -708,6 +708,9 @@ public:
 	void update_ngpr(unsigned gpr);
 	void update_nstack(region_node *r, unsigned add = 0);
 
+	unsigned get_stack_depth(node *n, unsigned &loops, unsigned &ifs,
+	                         unsigned add = 0);
+
 	void cf_peephole();
 
 };

src/gallium/drivers/radeon/radeon_llvm_emit.c

@@ -173,6 +173,10 @@ unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_llvm_binary *binary,
 		}
 	}
 
+	if (elf){
+		elf_end(elf);
+	}
+	FREE(elf_buffer);
 	LLVMDisposeMemoryBuffer(out_buffer);
 	LLVMDisposeTargetMachine(tm);
 	return 0;

src/gallium/drivers/radeon/radeon_llvm_util.c

@@ -30,6 +30,7 @@
 #include <llvm-c/BitReader.h>
 #include <llvm-c/Core.h>
 #include <llvm-c/Target.h>
+#include <llvm-c/Transforms/IPO.h>
 #include <llvm-c/Transforms/PassManagerBuilder.h>
 
 LLVMModuleRef radeon_llvm_parse_bitcode(const unsigned char * bitcode,
@@ -42,6 +43,7 @@ LLVMModuleRef radeon_llvm_parse_bitcode(const unsigned char * bitcode,
 	buf = LLVMCreateMemoryBufferWithMemoryRangeCopy((const char*)bitcode,
 							bitcode_len, "radeon");
 	LLVMParseBitcodeInContext(ctx, buf, &module, NULL);
+	LLVMDisposeMemoryBuffer(buf);
 	return module;
 }
 
@@ -58,9 +60,26 @@ static void radeon_llvm_optimize(LLVMModuleRef mod)
 	LLVMTargetDataRef TD = LLVMCreateTargetData(data_layout);
 	LLVMPassManagerBuilderRef builder = LLVMPassManagerBuilderCreate();
 	LLVMPassManagerRef pass_manager = LLVMCreatePassManager();
-	LLVMAddTargetData(TD, pass_manager);
 
-	LLVMPassManagerBuilderUseInlinerWithThreshold(builder, 1000000000);
+	/* Functions calls are not supported yet, so we need to inline
+	 * everything.  The most efficient way to do this is to add
+	 * the always_inline attribute to all non-kernel functions
+	 * and then run the Always Inline pass.  The Always Inline
+	 * pass will automaically inline functions with this attribute
+	 * and does not perform the expensive cost analysis that the normal
+	 * inliner does.
+	 */
+
+	LLVMValueRef fn;
+	for (fn = LLVMGetFirstFunction(mod); fn; fn = LLVMGetNextFunction(fn)) {
+		/* All the non-kernel functions have internal linkage */
+		if (LLVMGetLinkage(fn) == LLVMInternalLinkage) {
+			LLVMAddFunctionAttr(fn, LLVMAlwaysInlineAttribute);
+		}
+	}
+
+	LLVMAddTargetData(TD, pass_manager);
+	LLVMAddAlwaysInlinerPass(pass_manager);
 	LLVMPassManagerBuilderPopulateModulePassManager(builder, pass_manager);
 
 	LLVMRunPassManager(pass_manager, mod);

src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

@@ -1379,7 +1379,7 @@ void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx)
 	LLVMAddAggressiveDCEPass(gallivm->passmgr);
 	LLVMAddCFGSimplificationPass(gallivm->passmgr);
 
-	/* Run the passs */
+	/* Run the pass */
 	LLVMRunFunctionPassManager(gallivm->passmgr, ctx->main_fn);
 
 	LLVMDisposeBuilder(gallivm->builder);

src/gallium/drivers/radeonsi/radeonsi_compute.c

@@ -49,6 +49,7 @@ static void *radeonsi_create_compute_state(
 		LLVMModuleRef mod = radeon_llvm_get_kernel_module(i, code,
 							header->num_bytes);
 		si_compile_llvm(rctx, &program->kernels[i], mod);
+		LLVMDisposeModule(mod);
 	}
 
 	return program;
@@ -102,6 +103,7 @@ static void radeonsi_launch_grid(
 	unsigned arg_user_sgpr_count = 2;
 	unsigned i;
 	struct si_pipe_shader *shader = &program->kernels[pc];
+	unsigned lds_blocks;
 
 	pm4->compute_pkt = true;
 	si_cmd_context_control(pm4);
@@ -161,9 +163,18 @@ static void radeonsi_launch_grid(
 		si_pm4_add_bo(pm4, buffer, RADEON_USAGE_READWRITE);
 	}
 
+	/* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID
+	 * and is now per pipe, so it should be handled in the
+	 * kernel if we want to use something other than the default value,
+	 * which is now 0x22f.
+	 */
+	if (rctx->b.chip_class <= SI) {
 		/* XXX: This should be:
 		 * (number of compute units) * 4 * (waves per simd) - 1 */
-	si_pm4_set_reg(pm4, R_00B82C_COMPUTE_MAX_WAVE_ID, 0x190 /* Default value */);
+
+		si_pm4_set_reg(pm4, R_00B82C_COMPUTE_MAX_WAVE_ID,
+						0x190 /* Default value */);
+	}
 
 	shader_va = r600_resource_va(ctx->screen, (void *)shader->bo);
 	si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ);
@@ -184,6 +195,20 @@ static void radeonsi_launch_grid(
 		                        shader->num_sgprs)) - 1) / 8))
 		;
 
+	lds_blocks = shader->lds_size;
+	/* XXX: We are over allocating LDS.  For SI, the shader reports LDS in
+	 * blocks of 256 bytes, so if there are 4 bytes lds allocated in
+	 * the shader and 4 bytes allocated by the state tracker, then
+	 * we will set LDS_SIZE to 512 bytes rather than 256.
+	 */
+	if (rctx->b.chip_class <= SI) {
+		lds_blocks += align(program->local_size, 256) >> 8;
+	} else {
+		lds_blocks += align(program->local_size, 512) >> 9;
+	}
+
+	assert(lds_blocks <= 0xFF);
+
 	si_pm4_set_reg(pm4, R_00B84C_COMPUTE_PGM_RSRC2,
 		S_00B84C_SCRATCH_EN(0)
 		| S_00B84C_USER_SGPR(arg_user_sgpr_count)
@@ -192,7 +217,7 @@ static void radeonsi_launch_grid(
 		| S_00B84C_TGID_Z_EN(1)
 		| S_00B84C_TG_SIZE_EN(1)
 		| S_00B84C_TIDIG_COMP_CNT(2)
-		| S_00B84C_LDS_SIZE(shader->lds_size)
+		| S_00B84C_LDS_SIZE(lds_blocks)
 		| S_00B84C_EXCP_EN(0))
 		;
 	si_pm4_set_reg(pm4, R_00B854_COMPUTE_RESOURCE_LIMITS, 0);
@@ -236,7 +261,21 @@ static void radeonsi_launch_grid(
 }
 
 
-static void si_delete_compute_state(struct pipe_context *ctx, void* state){}
+static void si_delete_compute_state(struct pipe_context *ctx, void* state){
+	struct si_pipe_compute *program = (struct si_pipe_compute *)state;
+
+	if (!state) {
+		return;
+	}
+
+	if (program->kernels) {
+		FREE(program->kernels);
+	}
+
+	//And then free the program itself.
+	FREE(program);
+}
+
 static void si_set_compute_resources(struct pipe_context * ctx_,
 		unsigned start, unsigned count,
 		struct pipe_surface ** surfaces) { }

src/gallium/drivers/svga/svga_draw_elements.c

@@ -24,6 +24,7 @@
  **********************************************************/
 
 #include "util/u_inlines.h"
+#include "util/u_prim.h"
 #include "indices/u_indices.h"
 
 #include "svga_cmd.h"
@@ -37,17 +38,25 @@
 
 static enum pipe_error
 translate_indices(struct svga_hwtnl *hwtnl, struct pipe_resource *src,
-                  unsigned offset, unsigned nr, unsigned index_size,
+                  unsigned offset, unsigned prim, unsigned nr,
+                  unsigned index_size,
                   u_translate_func translate, struct pipe_resource **out_buf)
 {
    struct pipe_context *pipe = &hwtnl->svga->pipe;
    struct pipe_transfer *src_transfer = NULL;
    struct pipe_transfer *dst_transfer = NULL;
-   unsigned size = index_size * nr;
+   unsigned size;
    const void *src_map = NULL;
    struct pipe_resource *dst = NULL;
    void *dst_map = NULL;
 
+   /* Need to trim vertex count to make sure we don't write too much data
+    * to the dst buffer in the translate() call.
+    */
+   u_trim_pipe_prim(prim, &nr);
+
+   size = index_size * nr;
+
    dst = pipe_buffer_create(pipe->screen,
                             PIPE_BIND_INDEX_BUFFER, PIPE_USAGE_STATIC, size);
    if (dst == NULL)
@@ -180,7 +189,7 @@ svga_hwtnl_draw_range_elements(struct svga_hwtnl *hwtnl,
       ret = translate_indices(hwtnl,
                               index_buffer,
                               start * index_size,
-                              gen_nr, gen_size, gen_func, &gen_buf);
+                              gen_prim, gen_nr, gen_size, gen_func, &gen_buf);
       if (ret != PIPE_OK)
          goto done;
 

src/gallium/drivers/svga/svga_pipe_blit.c

@@ -148,6 +148,8 @@ static void svga_surface_copy(struct pipe_context *pipe,
 
 #endif
 
+   /* Mark the destination image as being defined */
+   svga_define_texture_level(dtex, dst_face, dst_level);
 }
 
 

src/gallium/state_trackers/clover/api/context.cpp

@@ -61,18 +61,24 @@ clCreateContextFromType(const cl_context_properties *d_props,
                         void *user_data, cl_int *r_errcode) try {
    cl_platform_id d_platform;
    cl_uint num_platforms;
-   cl_device_id d_dev;
    cl_int ret;
+   std::vector<cl_device_id> devs;
+   cl_uint num_devices;
 
    ret = clGetPlatformIDs(1, &d_platform, &num_platforms);
    if (ret || !num_platforms)
       throw error(CL_INVALID_PLATFORM);
 
-   ret = clGetDeviceIDs(d_platform, type, 1, &d_dev, 0);
+   ret = clGetDeviceIDs(d_platform, type, 0, NULL, &num_devices);
+   if (ret)
+      throw error(CL_DEVICE_NOT_FOUND);
+   devs.resize(num_devices);
+   ret = clGetDeviceIDs(d_platform, type, num_devices, devs.data(), 0);
    if (ret)
       throw error(CL_DEVICE_NOT_FOUND);
 
-   return clCreateContext(d_props, 1, &d_dev, pfn_notify, user_data, r_errcode);
+   return clCreateContext(d_props, num_devices, devs.data(), pfn_notify,
+                          user_data, r_errcode);
 
 } catch (error &e) {
    ret_error(r_errcode, e);

src/gallium/state_trackers/clover/api/program.cpp

@@ -173,11 +173,15 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
       break;
 
    case CL_PROGRAM_NUM_DEVICES:
-      buf.as_scalar<cl_uint>() = prog.devices().size();
+      buf.as_scalar<cl_uint>() = prog.devices().size() ?
+                                 prog.devices().size() :
+                                 prog.ctx.devs().size();
       break;
 
    case CL_PROGRAM_DEVICES:
-      buf.as_vector<cl_device_id>() = descs(prog.devices());
+      buf.as_vector<cl_device_id>() = prog.devices().size() ?
+                                      descs(prog.devices()) :
+                                      descs(prog.ctx.devs());
       break;
 
    case CL_PROGRAM_SOURCE:

src/gallium/state_trackers/clover/util/range.hpp

@@ -269,7 +269,8 @@ namespace clover {
 
       typename super::const_iterator
       end() const {
-         return { f, tuple::map(ends(), os) };
+         return { f, tuple::map(advances_by(size()),
+                                tuple::map(begins(), os)) };
       }
 
       typename super::size_type

src/gallium/state_trackers/dri/common/dri_context.h

@@ -89,6 +89,7 @@ dri_create_context(gl_api api,
 		   unsigned major_version,
 		   unsigned minor_version,
 		   uint32_t flags,
+		   bool notify_reset,
 		   unsigned *error,
 		   void *sharedContextPrivate);
 

src/gallium/targets/egl-static/Makefile.am

@@ -30,6 +30,8 @@
 #
 include $(top_srcdir)/src/gallium/Automake.inc
 
+LDFLAGS += -Wl,--version-script=$(top_srcdir)/src/gallium/targets/egl-static/egl.link
+
 AM_CFLAGS = $(PTHREAD_CFLAGS)
 AM_CPPFLAGS = \
 	$(GALLIUM_CFLAGS) \

src/gallium/targets/egl-static/egl.link

@@ -0,0 +1,3 @@
+VERSION {
+	global: _eglMain; local: *;
+};

src/gallium/targets/pipe-loader/Makefile.am

@@ -22,6 +22,8 @@
 
 include $(top_srcdir)/src/gallium/Automake.inc
 
+LDFLAGS += -Wl,--version-script=$(top_srcdir)/src/gallium/targets/pipe-loader/pipe.link
+
 AM_CPPFLAGS = \
 	$(GALLIUM_CFLAGS) \
 	-I$(top_srcdir)/include \

src/gallium/targets/pipe-loader/pipe.link

@@ -0,0 +1,3 @@
+VERSION {
+	global: driver_descriptor; local: *;
+};

src/gbm/backends/dri/gbm_dri.c

@@ -104,6 +104,24 @@ dri_get_buffers_with_format(__DRIdrawable * driDrawable,
                                    count, out_count, surf->dri_private);
 }
 
+static int
+image_get_buffers(__DRIdrawable *driDrawable,
+                  unsigned int format,
+                  uint32_t *stamp,
+                  void *loaderPrivate,
+                  uint32_t buffer_mask,
+                  struct __DRIimageList *buffers)
+{
+   struct gbm_dri_surface *surf = loaderPrivate;
+   struct gbm_dri_device *dri = gbm_dri_device(surf->base.gbm);
+
+   if (dri->image_get_buffers == NULL)
+      return 0;
+
+   return dri->image_get_buffers(driDrawable, format, stamp,
+                                 surf->dri_private, buffer_mask, buffers);
+}
+
 static const __DRIuseInvalidateExtension use_invalidate = {
    { __DRI_USE_INVALIDATE, 1 }
 };
@@ -113,13 +131,20 @@ static const __DRIimageLookupExtension image_lookup_extension = {
    dri_lookup_egl_image
 };
 
-const __DRIdri2LoaderExtension dri2_loader_extension = {
+static const __DRIdri2LoaderExtension dri2_loader_extension = {
    { __DRI_DRI2_LOADER, 3 },
    dri_get_buffers,
    dri_flush_front_buffer,
    dri_get_buffers_with_format,
 };
 
+static const __DRIimageLoaderExtension image_loader_extension = {
+   { __DRI_IMAGE_LOADER, 1 },
+   image_get_buffers,
+   dri_flush_front_buffer,
+};
+
+
 struct dri_extension_match {
    const char *name;
    int version;
@@ -258,7 +283,8 @@ dri_screen_create(struct gbm_dri_device *dri)
    dri->extensions[0] = &image_lookup_extension.base;
    dri->extensions[1] = &use_invalidate.base;
    dri->extensions[2] = &dri2_loader_extension.base;
-   dri->extensions[3] = NULL;
+   dri->extensions[3] = &image_loader_extension.base;
+   dri->extensions[4] = NULL;
 
    if (dri->dri2 == NULL)
       return -1;

src/gbm/backends/dri/gbm_driint.h

@@ -52,7 +52,7 @@ struct gbm_dri_device {
    __DRIdri2LoaderExtension *loader;
 
    const __DRIconfig   **driver_configs;
-   const __DRIextension *extensions[4];
+   const __DRIextension *extensions[5];
    const __DRIextension **driver_extensions;
 
    __DRIimage *(*lookup_image)(__DRIscreen *screen, void *image, void *data);
@@ -67,6 +67,12 @@ struct gbm_dri_device {
 			     int *width, int *height,
 			     unsigned int *attachments, int count,
 			     int *out_count, void *data);
+   int (*image_get_buffers)(__DRIdrawable *driDrawable,
+                            unsigned int format,
+                            uint32_t *stamp,
+                            void *loaderPrivate,
+                            uint32_t buffer_mask,
+                            struct __DRIimageList *buffers);
 
    struct wl_drm *wl_drm;
 };

src/glsl/ast_to_hir.cpp

@@ -3355,6 +3355,15 @@ ast_declarator_list::hir(exec_list *instructions,
       ir_variable *earlier =
          get_variable_being_redeclared(var, decl->get_location(), state,
                                        false /* allow_all_redeclarations */);
+      if (earlier != NULL) {
+         if (strncmp(var->name, "gl_", 3) == 0 &&
+             earlier->how_declared == ir_var_declared_in_block) {
+            _mesa_glsl_error(&loc, state,
+                             "`%s' has already been redeclared using "
+                             "gl_PerVertex", var->name);
+         }
+         earlier->how_declared = ir_var_declared_normally;
+      }
 
       if (decl->initializer != NULL) {
 	 result = process_initializer((earlier == NULL) ? var : earlier,
@@ -5048,6 +5057,7 @@ ast_interface_block::hir(exec_list *instructions,
             _mesa_glsl_error(&loc, state, "`%s' redeclared",
                              this->instance_name);
          }
+         earlier->how_declared = ir_var_declared_normally;
          earlier->type = var->type;
          earlier->reinit_interface_type(block_type);
          delete var;
@@ -5078,7 +5088,11 @@ ast_interface_block::hir(exec_list *instructions,
                _mesa_glsl_error(&loc, state,
                                 "redeclaration of gl_PerVertex can only "
                                 "include built-in variables");
+            } else if (earlier->how_declared == ir_var_declared_normally) {
+               _mesa_glsl_error(&loc, state,
+                                "`%s' has already been redeclared", var->name);
             } else {
+               earlier->how_declared = ir_var_declared_in_block;
                earlier->reinit_interface_type(block_type);
             }
             continue;
@@ -5125,6 +5139,12 @@ ast_interface_block::hir(exec_list *instructions,
             if (var != NULL &&
                 var->get_interface_type() == earlier_per_vertex &&
                 var->mode == var_mode) {
+               if (var->how_declared == ir_var_declared_normally) {
+                  _mesa_glsl_error(&loc, state,
+                                   "redeclaration of gl_PerVertex cannot "
+                                   "follow a redeclaration of `%s'",
+                                   var->name);
+               }
                state->symbols->disable_variable(var->name);
                var->remove();
             }

src/glsl/builtin_variables.cpp

@@ -434,6 +434,7 @@ builtin_variable_generator::add_variable(const char *name,
                                          enum ir_variable_mode mode, int slot)
 {
    ir_variable *var = new(symtab) ir_variable(type, name, mode);
+   var->how_declared = ir_var_declared_implicitly;
 
    switch (var->mode) {
    case ir_var_auto:

src/glsl/glsl_parser_extras.cpp

@@ -191,6 +191,8 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *_ctx,
    this->gs_input_prim_type = GL_POINTS;
    this->gs_input_size = 0;
    this->out_qualifier = new(this) ast_type_qualifier();
+   memset(this->atomic_counter_offsets, 0,
+          sizeof(this->atomic_counter_offsets));
 }
 
 /**

src/glsl/ir.cpp

@@ -1586,7 +1586,8 @@ ir_variable::ir_variable(const struct glsl_type *type, const char *name,
 			 ir_variable_mode mode)
    : max_array_access(0), max_ifc_array_access(NULL),
      read_only(false), centroid(false), invariant(false),
-        mode(mode), interpolation(INTERP_QUALIFIER_NONE), atomic()
+     how_declared(ir_var_declared_normally), mode(mode),
+     interpolation(INTERP_QUALIFIER_NONE), atomic()
 {
    this->ir_type = ir_type_variable;
    this->type = type;

src/glsl/ir.h

@@ -283,6 +283,34 @@ enum ir_variable_mode {
    ir_var_mode_count	/**< Number of variable modes */
 };
 
+/**
+ * Enum keeping track of how a variable was declared.  For error checking of
+ * the gl_PerVertex redeclaration rules.
+ */
+enum ir_var_declaration_type {
+   /**
+    * Normal declaration (for most variables, this means an explicit
+    * declaration.  Exception: temporaries are always implicitly declared, but
+    * they still use ir_var_declared_normally).
+    *
+    * Note: an ir_variable that represents a named interface block uses
+    * ir_var_declared_normally.
+    */
+   ir_var_declared_normally = 0,
+
+   /**
+    * Variable was explicitly declared (or re-declared) in an unnamed
+    * interface block.
+    */
+   ir_var_declared_in_block,
+
+   /**
+    * Variable is an implicitly declared built-in that has not been explicitly
+    * re-declared by the shader.
+    */
+   ir_var_declared_implicitly,
+};
+
 /**
  * \brief Layout qualifiers for gl_FragDepth.
  *
@@ -515,6 +543,14 @@ public:
     */
    unsigned assigned:1;
 
+   /**
+    * Enum indicating how the variable was declared.  See
+    * ir_var_declaration_type.
+    *
+    * This is used to detect certain kinds of illegal variable redeclarations.
+    */
+   unsigned how_declared:2;
+
    /**
     * Storage class of the variable.
     *

src/glsl/ir_clone.cpp

@@ -68,6 +68,7 @@ ir_variable::clone(void *mem_ctx, struct hash_table *ht) const
    var->has_initializer = this->has_initializer;
    var->depth_layout = this->depth_layout;
    var->assigned = this->assigned;
+   var->how_declared = this->how_declared;
    var->used = this->used;
 
    var->num_state_slots = this->num_state_slots;

src/glsl/link_interface_blocks.cpp

@@ -30,13 +30,230 @@
 #include "glsl_symbol_table.h"
 #include "linker.h"
 #include "main/macros.h"
+#include "program/hash_table.h"
+
+
+namespace {
+
+/**
+ * Information about a single interface block definition that we need to keep
+ * track of in order to check linkage rules.
+ *
+ * Note: this class is expected to be short lived, so it doesn't make copies
+ * of the strings it references; it simply borrows the pointers from the
+ * ir_variable class.
+ */
+struct interface_block_definition
+{
+   /**
+    * Extract an interface block definition from an ir_variable that
+    * represents either the interface instance (for named interfaces), or a
+    * member of the interface (for unnamed interfaces).
+    */
+   explicit interface_block_definition(const ir_variable *var)
+      : type(var->get_interface_type()),
+        instance_name(NULL),
+        array_size(-1)
+   {
+      if (var->is_interface_instance()) {
+         instance_name = var->name;
+         if (var->type->is_array())
+            array_size = var->type->length;
+      }
+      explicitly_declared = (var->how_declared != ir_var_declared_implicitly);
+   }
+
+   /**
+    * Interface block type
+    */
+   const glsl_type *type;
+
+   /**
+    * For a named interface block, the instance name.  Otherwise NULL.
+    */
+   const char *instance_name;
+
+   /**
+    * For an interface block array, the array size (or 0 if unsized).
+    * Otherwise -1.
+    */
+   int array_size;
+
+   /**
+    * True if this interface block was explicitly declared in the shader;
+    * false if it was an implicitly declared built-in interface block.
+    */
+   bool explicitly_declared;
+};
+
+
+/**
+ * Check if two interfaces match, according to intrastage interface matching
+ * rules.  If they do, and the first interface uses an unsized array, it will
+ * be updated to reflect the array size declared in the second interface.
+ */
+bool
+intrastage_match(interface_block_definition *a,
+                 const interface_block_definition *b,
+                 ir_variable_mode mode)
+{
+   /* Types must match. */
+   if (a->type != b->type) {
+      /* Exception: if both the interface blocks are implicitly declared,
+       * don't force their types to match.  They might mismatch due to the two
+       * shaders using different GLSL versions, and that's ok.
+       */
+      if (a->explicitly_declared || b->explicitly_declared)
+         return false;
+   }
+
+   /* Presence/absence of interface names must match. */
+   if ((a->instance_name == NULL) != (b->instance_name == NULL))
+      return false;
+
+   /* For uniforms, instance names need not match.  For shader ins/outs,
+    * it's not clear from the spec whether they need to match, but
+    * Mesa's implementation relies on them matching.
+    */
+   if (a->instance_name != NULL && mode != ir_var_uniform &&
+       strcmp(a->instance_name, b->instance_name) != 0) {
+      return false;
+   }
+
+   /* Array vs. nonarray must be consistent, and sizes must be
+    * consistent, with the exception that unsized arrays match sized
+    * arrays.
+    */
+   if ((a->array_size == -1) != (b->array_size == -1))
+      return false;
+   if (b->array_size != 0) {
+      if (a->array_size == 0)
+         a->array_size = b->array_size;
+      else if (a->array_size != b->array_size)
+         return false;
+   }
+
+   return true;
+}
+
+
+/**
+ * Check if two interfaces match, according to interstage (in/out) interface
+ * matching rules.
+ *
+ * If \c extra_array_level is true, then vertex-to-geometry shader matching
+ * rules are enforced (i.e. a successful match requires the consumer interface
+ * to be an array and the producer interface to be a non-array).
+ */
+bool
+interstage_match(const interface_block_definition *producer,
+                 const interface_block_definition *consumer,
+                 bool extra_array_level)
+{
+   /* Unsized arrays should not occur during interstage linking.  They
+    * should have all been assigned a size by link_intrastage_shaders.
+    */
+   assert(consumer->array_size != 0);
+   assert(producer->array_size != 0);
+
+   /* Types must match. */
+   if (consumer->type != producer->type) {
+      /* Exception: if both the interface blocks are implicitly declared,
+       * don't force their types to match.  They might mismatch due to the two
+       * shaders using different GLSL versions, and that's ok.
+       */
+      if (consumer->explicitly_declared || producer->explicitly_declared)
+         return false;
+   }
+   if (extra_array_level) {
+      /* Consumer must be an array, and producer must not. */
+      if (consumer->array_size == -1)
+         return false;
+      if (producer->array_size != -1)
+         return false;
+   } else {
+      /* Array vs. nonarray must be consistent, and sizes must be consistent.
+       * Since unsized arrays have been ruled out, we can check this by just
+       * making sure the sizes are equal.
+       */
+      if (consumer->array_size != producer->array_size)
+         return false;
+   }
+   return true;
+}
+
+
+/**
+ * This class keeps track of a mapping from an interface block name to the
+ * necessary information about that interface block to determine whether to
+ * generate a link error.
+ *
+ * Note: this class is expected to be short lived, so it doesn't make copies
+ * of the strings it references; it simply borrows the pointers from the
+ * ir_variable class.
+ */
+class interface_block_definitions
+{
+public:
+   interface_block_definitions()
+      : mem_ctx(ralloc_context(NULL)),
+        ht(hash_table_ctor(0, hash_table_string_hash,
+                           hash_table_string_compare))
+   {
+   }
+
+   ~interface_block_definitions()
+   {
+      hash_table_dtor(ht);
+      ralloc_free(mem_ctx);
+   }
+
+   /**
+    * Lookup the interface definition having the given block name.  Return
+    * NULL if none is found.
+    */
+   interface_block_definition *lookup(const char *block_name)
+   {
+      return (interface_block_definition *) hash_table_find(ht, block_name);
+   }
+
+   /**
+    * Add a new interface definition.
+    */
+   void store(const interface_block_definition &def)
+   {
+      interface_block_definition *hash_entry =
+         rzalloc(mem_ctx, interface_block_definition);
+      *hash_entry = def;
+      hash_table_insert(ht, hash_entry, def.type->name);
+   }
+
+private:
+   /**
+    * Ralloc context for data structures allocated by this class.
+    */
+   void *mem_ctx;
+
+   /**
+    * Hash table mapping interface block name to an \c
+    * interface_block_definition struct.  interface_block_definition structs
+    * are allocated using \c mem_ctx.
+    */
+   hash_table *ht;
+};
+
+
+}; /* anonymous namespace */
+
 
 void
 validate_intrastage_interface_blocks(struct gl_shader_program *prog,
                                      const gl_shader **shader_list,
                                      unsigned num_shaders)
 {
-   glsl_symbol_table interfaces;
+   interface_block_definitions in_interfaces;
+   interface_block_definitions out_interfaces;
+   interface_block_definitions uniform_interfaces;
 
    for (unsigned int i = 0; i < num_shaders; i++) {
       if (shader_list[i] == NULL)
@@ -52,17 +269,36 @@ validate_intrastage_interface_blocks(struct gl_shader_program *prog,
          if (iface_type == NULL)
             continue;
 
-         const glsl_type *old_iface_type =
-            interfaces.get_interface(iface_type->name,
-                                     (enum ir_variable_mode) var->mode);
-
-         if (old_iface_type == NULL) {
-            /* This is the first time we've seen the interface, so save
-             * it into our symbol table.
+         interface_block_definitions *definitions;
+         switch (var->mode) {
+         case ir_var_shader_in:
+            definitions = &in_interfaces;
+            break;
+         case ir_var_shader_out:
+            definitions = &out_interfaces;
+            break;
+         case ir_var_uniform:
+            definitions = &uniform_interfaces;
+            break;
+         default:
+            /* Only in, out, and uniform interfaces are legal, so we should
+             * never get here.
              */
-            interfaces.add_interface(iface_type->name, iface_type,
-                                     (enum ir_variable_mode) var->mode);
-         } else if (old_iface_type != iface_type) {
+            assert(!"illegal interface type");
+            continue;
+         }
+
+         const interface_block_definition def(var);
+         interface_block_definition *prev_def =
+            definitions->lookup(iface_type->name);
+
+         if (prev_def == NULL) {
+            /* This is the first time we've seen the interface, so save
+             * it into the appropriate data structure.
+             */
+            definitions->store(def);
+         } else if (!intrastage_match(prev_def, &def,
+                                      (ir_variable_mode) var->mode)) {
             linker_error(prog, "definitions of interface block `%s' do not"
                          " match\n", iface_type->name);
             return;
@@ -72,43 +308,78 @@ validate_intrastage_interface_blocks(struct gl_shader_program *prog,
 }
 
 void
-validate_interstage_interface_blocks(struct gl_shader_program *prog,
+validate_interstage_inout_blocks(struct gl_shader_program *prog,
                                  const gl_shader *producer,
                                  const gl_shader *consumer)
 {
-   glsl_symbol_table interfaces;
+   interface_block_definitions definitions;
+   const bool extra_array_level = consumer->Type == GL_GEOMETRY_SHADER;
 
-   /* Add non-output interfaces from the consumer to the symbol table. */
+   /* Add input interfaces from the consumer to the symbol table. */
    foreach_list(node, consumer->ir) {
       ir_variable *var = ((ir_instruction *) node)->as_variable();
-      if (!var || !var->get_interface_type() || var->mode == ir_var_shader_out)
+      if (!var || !var->get_interface_type() || var->mode != ir_var_shader_in)
          continue;
 
-      interfaces.add_interface(var->get_interface_type()->name,
-                               var->get_interface_type(),
-                               (enum ir_variable_mode) var->mode);
+      definitions.store(interface_block_definition(var));
    }
 
-   /* Verify that the producer's interfaces match. */
+   /* Verify that the producer's output interfaces match. */
    foreach_list(node, producer->ir) {
       ir_variable *var = ((ir_instruction *) node)->as_variable();
-      if (!var || !var->get_interface_type() || var->mode == ir_var_shader_in)
+      if (!var || !var->get_interface_type() || var->mode != ir_var_shader_out)
          continue;
 
-      enum ir_variable_mode consumer_mode =
-         var->mode == ir_var_uniform ? ir_var_uniform : ir_var_shader_in;
-      const glsl_type *expected_type =
-         interfaces.get_interface(var->get_interface_type()->name,
-                                  consumer_mode);
+      interface_block_definition *consumer_def =
+         definitions.lookup(var->get_interface_type()->name);
 
       /* The consumer doesn't use this output block.  Ignore it. */
-      if (expected_type == NULL)
+      if (consumer_def == NULL)
          continue;
 
-      if (var->get_interface_type() != expected_type) {
+      const interface_block_definition producer_def(var);
+
+      if (!interstage_match(&producer_def, consumer_def, extra_array_level)) {
          linker_error(prog, "definitions of interface block `%s' do not "
                       "match\n", var->get_interface_type()->name);
          return;
       }
    }
 }
+
+
+void
+validate_interstage_uniform_blocks(struct gl_shader_program *prog,
+                                   gl_shader **stages, int num_stages)
+{
+   interface_block_definitions definitions;
+
+   for (int i = 0; i < num_stages; i++) {
+      if (stages[i] == NULL)
+         continue;
+
+      const gl_shader *stage = stages[i];
+      foreach_list(node, stage->ir) {
+         ir_variable *var = ((ir_instruction *) node)->as_variable();
+         if (!var || !var->get_interface_type() || var->mode != ir_var_uniform)
+            continue;
+
+         interface_block_definition *old_def =
+            definitions.lookup(var->get_interface_type()->name);
+         const interface_block_definition new_def(var);
+         if (old_def == NULL) {
+            definitions.store(new_def);
+         } else {
+            /* Interstage uniform matching rules are the same as intrastage
+             * uniform matchin rules (for uniforms, it is as though all
+             * shaders are in the same shader stage).
+             */
+            if (!intrastage_match(old_def, &new_def, ir_var_uniform)) {
+               linker_error(prog, "definitions of interface block `%s' do not "
+                            "match\n", var->get_interface_type()->name);
+               return;
+            }
+         }
+      }
+   }
+}

src/glsl/linker.cpp

@@ -2154,7 +2154,7 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
       if (prog->_LinkedShaders[i] == NULL)
          continue;
 
-      validate_interstage_interface_blocks(prog, prog->_LinkedShaders[prev],
+      validate_interstage_inout_blocks(prog, prog->_LinkedShaders[prev],
                                        prog->_LinkedShaders[i]);
       if (!prog->LinkStatus)
          goto done;
@@ -2168,6 +2168,11 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
       prev = i;
    }
 
+   /* Cross-validate uniform blocks between shader stages */
+   validate_interstage_uniform_blocks(prog, prog->_LinkedShaders,
+                                      MESA_SHADER_TYPES);
+   if (!prog->LinkStatus)
+      goto done;
 
    for (unsigned int i = 0; i < MESA_SHADER_TYPES; i++) {
       if (prog->_LinkedShaders[i] != NULL)

src/glsl/linker.h

@@ -65,10 +65,14 @@ validate_intrastage_interface_blocks(struct gl_shader_program *prog,
                                      unsigned num_shaders);
 
 void
-validate_interstage_interface_blocks(struct gl_shader_program *prog,
+validate_interstage_inout_blocks(struct gl_shader_program *prog,
                                  const gl_shader *producer,
                                  const gl_shader *consumer);
 
+void
+validate_interstage_uniform_blocks(struct gl_shader_program *prog,
+                                   gl_shader **stages, int num_stages);
+
 extern void
 link_assign_atomic_counter_resources(struct gl_context *ctx,
                                      struct gl_shader_program *prog);

src/glsl/lower_clip_distance.cpp

@@ -381,6 +381,11 @@ lower_clip_distance_visitor::fix_lhs(ir_assignment *ir)
 ir_visitor_status
 lower_clip_distance_visitor::visit_leave(ir_assignment *ir)
 {
+   /* First invoke the base class visitor.  This causes handle_rvalue() to be
+    * called on ir->rhs and ir->condition.
+    */
+   ir_rvalue_visitor::visit_leave(ir);
+
    if (this->is_clip_distance_vec8(ir->lhs) ||
        this->is_clip_distance_vec8(ir->rhs)) {
       /* LHS or RHS of the assignment is the entire 1D gl_ClipDistance array

src/glsl/opt_cse.cpp

@@ -352,6 +352,7 @@ equals(ir_texture *a, ir_texture *b)
       if (!equals(a->lod_info.grad.dPdx, b->lod_info.grad.dPdx) ||
           !equals(a->lod_info.grad.dPdy, b->lod_info.grad.dPdy))
          return false;
+      break;
    case ir_txf_ms:
       if (!equals(a->lod_info.sample_index, b->lod_info.sample_index))
          return false;
@@ -359,6 +360,7 @@ equals(ir_texture *a, ir_texture *b)
    case ir_tg4:
       if (!equals(a->lod_info.component, b->lod_info.component))
          return false;
+      break;
    default:
       assert(!"Unrecognized texture op");
    }

src/glx/Makefile.am

@@ -94,8 +94,6 @@ libglx_la_SOURCES = \
 	  dri2_glx.c \
 	  dri2.c \
 	  dri2_query_renderer.c \
-          dri3_glx.c \
-          dri3_common.c \
 	  applegl_glx.c
 
 GL_LIBS = \

src/glx/SConscript

@@ -63,6 +63,7 @@ sources = [
     'indirect_vertex_program.c',
     'pixel.c',
     'pixelstore.c',
+    'query_renderer.c',
     'render2.c',
     'renderpix.c',
     'single2.c',
@@ -78,6 +79,9 @@ sources = [
     'glxhash.c',
     'dri2_glx.c',
     'dri2.c',
+    'dri2_query_renderer.c',
+    #'dri3_glx.c',
+    #'dri3_common.c',
     'applegl_glx.c',
 ]
 

src/glx/dri3_glx.c

@@ -159,51 +159,6 @@ dri3_unbind_context(struct glx_context *context, struct glx_context *new)
    (*psc->core->unbindContext) (pcp->driContext);
 }
 
-static struct glx_context *
-dri3_create_context(struct glx_screen *base,
-                    struct glx_config *config_base,
-                    struct glx_context *shareList, int renderType)
-{
-   struct dri3_context *pcp, *pcp_shared;
-   struct dri3_screen *psc = (struct dri3_screen *) base;
-   __GLXDRIconfigPrivate *config = (__GLXDRIconfigPrivate *) config_base;
-   __DRIcontext *shared = NULL;
-
-   if (shareList) {
-      /* If the shareList context is not a DRI3 context, we cannot possibly
-       * create a DRI3 context that shares it.
-       */
-      if (shareList->vtable->destroy != dri3_destroy_context) {
-         return NULL;
-      }
-
-      pcp_shared = (struct dri3_context *) shareList;
-      shared = pcp_shared->driContext;
-   }
-
-   pcp = calloc(1, sizeof *pcp);
-   if (pcp == NULL)
-      return NULL;
-
-   if (!glx_context_init(&pcp->base, &psc->base, &config->base)) {
-      free(pcp);
-      return NULL;
-   }
-
-   pcp->driContext =
-      (*psc->image_driver->createNewContext) (psc->driScreen,
-                                              config->driConfig, shared, pcp);
-
-   if (pcp->driContext == NULL) {
-      free(pcp);
-      return NULL;
-   }
-
-   pcp->base.vtable = &dri3_context_vtable;
-
-   return &pcp->base;
-}
-
 static struct glx_context *
 dri3_create_context_attribs(struct glx_screen *base,
                             struct glx_config *config_base,
@@ -299,6 +254,17 @@ error_exit:
    return NULL;
 }
 
+static struct glx_context *
+dri3_create_context(struct glx_screen *base,
+                    struct glx_config *config_base,
+                    struct glx_context *shareList, int renderType)
+{
+   unsigned int error;
+
+   return dri3_create_context_attribs(base, config_base, shareList,
+                                      0, NULL, &error);
+}
+
 static void
 dri3_destroy_drawable(__GLXDRIdrawable *base)
 {

src/glx/glxclient.h

@@ -477,7 +477,7 @@ struct glx_screen_vtable {
 						 unsigned *error);
    int (*query_renderer_integer)(struct glx_screen *psc,
                                  int attribute,
-                                 int *value);
+                                 unsigned int *value);
    int (*query_renderer_string)(struct glx_screen *psc,
                                 int attribute,
                                 const char **value);

src/glx/glxcmds.c

@@ -183,7 +183,7 @@ GetGLXPrivScreenConfig(Display * dpy, int scrn, struct glx_display ** ppriv,
 
    /* Check to see if the GL is supported on this screen */
    *ppsc = (*ppriv)->screens[scrn];
-   if ((*ppsc)->configs == NULL) {
+   if ((*ppsc)->configs == NULL && (*ppsc)->visuals == NULL) {
       /* No support for GL on this screen regardless of visual */
       return GLX_BAD_VISUAL;
    }

src/glx/glxext.c

@@ -865,8 +865,6 @@ __glXInitialize(Display * dpy)
     ** (e.g., those called in AllocAndFetchScreenConfigs).
     */
    if (glx_direct && glx_accel) {
-      if (!getenv("LIBGL_DRI3_DISABLE"))
-         dpyPriv->dri3Display = dri3_create_display(dpy);
       dpyPriv->dri2Display = dri2CreateDisplay(dpy);
       dpyPriv->driDisplay = driCreateDisplay(dpy);
    }

src/glx/query_renderer.c

@@ -30,7 +30,7 @@ __glXQueryRendererInteger(struct glx_screen *psc, int attribute,
                           unsigned int *value)
 {
    unsigned int values_for_query = 0;
-   int buffer[32];
+   unsigned int buffer[32];
    int err;
 
    /* This probably means the caller is trying to use an extension function

src/glx/tests/query_renderer_unittest.cpp

@@ -56,7 +56,8 @@ static bool query_renderer_string_called = false;
 static bool query_renderer_integer_called = false;
 
 static int
-fake_query_renderer_integer(struct glx_screen *psc, int attribute, int *value)
+fake_query_renderer_integer(struct glx_screen *psc, int attribute,
+                            unsigned int *value)
 {
    (void) psc;
    (void) attribute;

src/mapi/shared-glapi/tests/Makefile.am

@@ -3,6 +3,7 @@ AM_CFLAGS = $(PTHREAD_CFLAGS)
 AM_CPPFLAGS = \
 	-I$(top_srcdir)/src/gtest/include \
 	-I$(top_srcdir)/src/mapi \
+	-I$(top_builddir)/src/mapi \
 	-I$(top_srcdir)/include
 
 TESTS = shared-glapi-test

src/mesa/drivers/SConscript

@@ -10,3 +10,6 @@ if env['dri']:
 
 if env['platform'] == 'windows':
     SConscript('windows/gdi/SConscript')
+
+if env['platform'] == 'haiku':
+    SConscript('haiku/swrast/SConscript')

src/mesa/drivers/common/meta.c

@@ -1515,6 +1515,9 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
                                    sizeof(struct vertex), OFFSET(x));
       _mesa_VertexAttribPointer(1, 2, GL_FLOAT, GL_FALSE,
                                    sizeof(struct vertex), OFFSET(s));
+
+      _mesa_EnableVertexAttribArray(0);
+      _mesa_EnableVertexAttribArray(1);
    }
 
    /* Generate a relevant fragment shader program for the texture target */
@@ -1591,8 +1594,6 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
    _mesa_DeleteObjectARB(vs);
    _mesa_BindAttribLocation(ShaderProg, 0, "position");
    _mesa_BindAttribLocation(ShaderProg, 1, "texcoords");
-   _mesa_EnableVertexAttribArray(0);
-   _mesa_EnableVertexAttribArray(1);
    link_program_with_debug(ctx, ShaderProg);
    ralloc_free(mem_ctx);
    if (texture_2d)

src/mesa/drivers/dri/common/dri_util.c

@@ -407,8 +407,10 @@ driCreateContextAttribs(__DRIscreen *screen, int api,
        mesa_api = API_OPENGL_CORE;
     }
 
-    if ((flags & ~(__DRI_CTX_FLAG_DEBUG | __DRI_CTX_FLAG_FORWARD_COMPATIBLE))
-        != 0) {
+    const uint32_t allowed_flags = (__DRI_CTX_FLAG_DEBUG
+                                    | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
+                                    | __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS);
+    if (flags & ~allowed_flags) {
 	*error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
 	return NULL;
     }
@@ -868,7 +870,6 @@ const __DRIimageDriverExtension driImageDriverExtension = {
 
     .createNewScreen2           = driCreateNewScreen2,
     .createNewDrawable          = driCreateNewDrawable,
-    .createNewContext           = driCreateNewContext,
     .getAPIMask                 = driGetAPIMask,
     .createContextAttribs       = driCreateContextAttribs,
 };

src/mesa/drivers/dri/common/utils.c

@@ -494,7 +494,7 @@ driIndexConfigAttrib(const __DRIconfig *config, int index,
  * Zero if a recognized value of \c param is supplied, -1 otherwise.
  */
 int
-driQueryRendererIntegerCommon(__DRIscreen *psp, int param, int *value)
+driQueryRendererIntegerCommon(__DRIscreen *psp, int param, unsigned int *value)
 {
    switch (param) {
    case __DRI2_RENDERER_VERSION: {

src/mesa/drivers/dri/common/utils.h

@@ -66,6 +66,6 @@ driIndexConfigAttrib(const __DRIconfig *config, int index,
 		     unsigned int *attrib, unsigned int *value);
 
 int
-driQueryRendererIntegerCommon(__DRIscreen *psp, int param, int *value);
+driQueryRendererIntegerCommon(__DRIscreen *psp, int param, unsigned int *value);
 
 #endif /* DRI_DEBUG_H */

src/mesa/drivers/dri/i915/intel_screen.c

@@ -246,7 +246,8 @@ intel_allocate_image(int dri_format, void *loaderPrivate)
     image->offset = 0;
 
     image->format = driImageFormatToGLFormat(dri_format);
-    if (image->format == 0) {
+    if (dri_format != __DRI_IMAGE_FORMAT_NONE &&
+        image->format == MESA_FORMAT_NONE) {
        free(image);
        return NULL;
     }
@@ -702,7 +703,7 @@ static struct __DRIimageExtensionRec intelImageExtension = {
 };
 
 static int
-i915_query_renderer_integer(__DRIscreen *psp, int param, int *value)
+i915_query_renderer_integer(__DRIscreen *psp, int param, unsigned int *value)
 {
    const struct intel_screen *const intelScreen =
       (struct intel_screen *) psp->driverPrivate;
@@ -722,9 +723,13 @@ i915_query_renderer_integer(__DRIscreen *psp, int param, int *value)
        * assume that there's some fragmentation, and we start doing extra
        * flushing, etc.  That's the big cliff apps will care about.
        */
-      const unsigned long agp_bytes = drmAgpSize(psp->fd);
+      size_t aper_size;
+      size_t mappable_size;
+
+      drm_intel_get_aperture_sizes(psp->fd, &mappable_size, &aper_size);
+
       const unsigned gpu_mappable_megabytes =
-         (agp_bytes / (1024 * 1024)) * 3 / 4;
+         (aper_size / (1024 * 1024)) * 3 / 4;
 
       const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
       const long system_page_size = sysconf(_SC_PAGE_SIZE);

src/mesa/drivers/dri/i965/Makefile.am

@@ -46,8 +46,8 @@ TEST_LIBS = \
 	libi965_dri.la \
 	../common/libdricommon.la \
 	../common/libmegadriver_stub.la \
-	$(DRI_LIB_DEPS) \
         ../../../libmesa.la \
+	$(DRI_LIB_DEPS) \
         -lrt \
 	../common/libdri_test_stubs.la
 

src/mesa/drivers/dri/i965/brw_binding_tables.c

@@ -128,7 +128,7 @@ static void
 brw_gs_upload_binding_table(struct brw_context *brw)
 {
    /* If there's no GS, skip changing anything. */
-   if (!brw->gs.prog_data)
+   if (brw->geometry_program == NULL)
       return;
 
    brw_upload_binding_table(brw, BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);

src/mesa/drivers/dri/i965/brw_blorp.cpp

@@ -266,7 +266,6 @@ retry:
     */
    brw->state.dirty.brw = ~0;
    brw->state.dirty.cache = ~0;
-   brw->state_batch_count = 0;
    brw->batch.need_workaround_flush = true;
    brw->ib.type = -1;
    intel_batchbuffer_clear_cache(brw);

src/mesa/drivers/dri/i965/brw_blorp_clear.cpp

@@ -67,7 +67,8 @@ public:
                           struct gl_framebuffer *fb,
                           struct gl_renderbuffer *rb,
                           GLubyte *color_mask,
-                          bool partial_clear);
+                          bool partial_clear,
+                          unsigned layer);
 };
 
 
@@ -183,12 +184,13 @@ brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
                                                struct gl_framebuffer *fb,
                                                struct gl_renderbuffer *rb,
                                                GLubyte *color_mask,
-                                               bool partial_clear)
+                                               bool partial_clear,
+                                               unsigned layer)
 {
    struct gl_context *ctx = &brw->ctx;
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
 
-   dst.set(brw, irb->mt, irb->mt_level, irb->mt_layer, true);
+   dst.set(brw, irb->mt, irb->mt_level, layer, true);
 
    /* Override the surface format according to the context's sRGB rules. */
    gl_format format = _mesa_get_render_format(ctx, irb->mt->format);
@@ -439,41 +441,17 @@ brw_blorp_const_color_program::compile(struct brw_context *brw,
    return brw_get_program(&func, program_size);
 }
 
-extern "C" {
+
 bool
-brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
-                      bool partial_clear)
+do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
+                      struct gl_renderbuffer *rb, unsigned buf,
+                      bool partial_clear, unsigned layer)
 {
    struct gl_context *ctx = &brw->ctx;
-
-   /* The constant color clear code doesn't work for multisampled surfaces, so
-    * we need to support falling back to other clear mechanisms.
-    * Unfortunately, our clear code is based on a bitmask that doesn't
-    * distinguish individual color attachments, so we walk the attachments to
-    * see if any require fallback, and fall back for all if any of them need
-    * to.
-    */
-   for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
-      struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
 
-      if (irb && irb->mt->msaa_layout != INTEL_MSAA_LAYOUT_NONE)
-         return false;
-   }
-
-   for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
-      struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
-      struct intel_renderbuffer *irb = intel_renderbuffer(rb);
-
-      /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported,
-       * the framebuffer can be complete with some attachments missing.  In
-       * this case the _ColorDrawBuffers pointer will be NULL.
-       */
-      if (rb == NULL)
-         continue;
-
    brw_blorp_clear_params params(brw, fb, rb, ctx->Color.ColorMask[buf],
-                                    partial_clear);
+                                 partial_clear, layer);
 
    bool is_fast_clear =
       (params.fast_clear_op == GEN7_FAST_CLEAR_OP_FAST_CLEAR);
@@ -493,7 +471,7 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
        * redundant and can be skipped.
        */
       if (irb->mt->mcs_state == INTEL_MCS_STATE_CLEAR)
-            continue;
+         return true;
 
       /* If the MCS buffer hasn't been allocated yet, we need to allocate
        * it now.
@@ -522,6 +500,53 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
        */
       irb->mt->mcs_state = INTEL_MCS_STATE_CLEAR;
    }
+
+   return true;
+}
+
+
+extern "C" {
+bool
+brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
+                      bool partial_clear)
+{
+   /* The constant color clear code doesn't work for multisampled surfaces, so
+    * we need to support falling back to other clear mechanisms.
+    * Unfortunately, our clear code is based on a bitmask that doesn't
+    * distinguish individual color attachments, so we walk the attachments to
+    * see if any require fallback, and fall back for all if any of them need
+    * to.
+    */
+   for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
+      struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
+      struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+
+      if (irb && irb->mt->msaa_layout != INTEL_MSAA_LAYOUT_NONE)
+         return false;
+   }
+
+   for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
+      struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
+      struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+
+      /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported,
+       * the framebuffer can be complete with some attachments missing.  In
+       * this case the _ColorDrawBuffers pointer will be NULL.
+       */
+      if (rb == NULL)
+         continue;
+
+      if (fb->NumLayers > 0) {
+         assert(fb->NumLayers == irb->mt->level[irb->mt_level].depth);
+         for (unsigned layer = 0; layer < fb->NumLayers; layer++) {
+            if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, layer))
+               return false;
+         }
+      } else {
+         unsigned layer = irb->mt_layer;
+         if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, layer))
+            return false;
+      }
    }
 
    return true;

src/mesa/drivers/dri/i965/brw_clear.c

@@ -181,8 +181,16 @@ brw_fast_clear_depth(struct gl_context *ctx)
     */
    intel_batchbuffer_emit_mi_flush(brw);
 
+   if (fb->NumLayers > 0) {
+      assert(fb->NumLayers == depth_irb->mt->level[depth_irb->mt_level].depth);
+      for (unsigned layer = 0; layer < fb->NumLayers; layer++) {
+         intel_hiz_exec(brw, mt, depth_irb->mt_level, layer,
+                        GEN6_HIZ_OP_DEPTH_CLEAR);
+      }
+   } else {
       intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
                      GEN6_HIZ_OP_DEPTH_CLEAR);
+   }
 
    if (brw->gen == 6) {
       /* From the Sandy Bridge PRM, volume 2 part 1, page 314:

src/mesa/drivers/dri/i965/brw_context.c

@@ -589,9 +589,16 @@ brwCreateContext(gl_api api,
    struct dd_function_table functions;
    struct gl_config visual;
 
-   if (flags & ~(__DRI_CTX_FLAG_DEBUG
-                 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
-                 | __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS)) {
+   /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
+    * provides us with context reset notifications.
+    */
+   uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
+      | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
+
+   if (screen->has_context_reset_notification)
+      allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
+
+   if (flags & ~allowed_flags) {
       *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
       return false;
    }
@@ -713,21 +720,6 @@ brwCreateContext(gl_api api,
       }
    }
 
-   /* Notification of GPU resets requires hardware contexts and a kernel new
-    * enough to support DRM_IOCTL_I915_GET_RESET_STATS.
-    */
-   if (notify_reset &&
-       (brw->hw_ctx == NULL
-        || drm_intel_get_reset_stats(brw->hw_ctx, &brw->reset_count, NULL,
-                                     NULL))) {
-      /* This is the wrong error code, but the correct error code (one that
-       * will cause EGL to generate EGL_BAD_MATCH) doesn't seem to exist.
-       */
-      *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
-      intelDestroyContext(driContextPriv);
-      return false;
-   }
-
    brw_init_surface_formats(brw);
 
    if (brw->is_g4x || brw->gen >= 5) {
@@ -766,6 +758,7 @@ brwCreateContext(gl_api api,
 
    brw->prim_restart.in_progress = false;
    brw->prim_restart.enable_cut_index = false;
+   brw->gs.enabled = false;
 
    if (brw->gen < 6) {
       brw->curbe.last_buf = calloc(1, 4096);

src/mesa/drivers/dri/i965/brw_context.h

@@ -1300,6 +1300,12 @@ struct brw_context
    struct {
       struct brw_stage_state base;
       struct brw_gs_prog_data *prog_data;
+
+      /**
+       * True if the 3DSTATE_GS command most recently emitted to the 3D
+       * pipeline enabled the GS; false otherwise.
+       */
+      bool enabled;
    } gs;
 
    struct {

src/mesa/drivers/dri/i965/brw_fs.cpp

@@ -3192,8 +3192,11 @@ fs_visitor::assign_binding_table_offsets()
 {
    uint32_t next_binding_table_offset = 0;
 
+   /* If there are no color regions, we still perform an FB write to a null
+    * renderbuffer, which we place at surface index 0.
+    */
    c->prog_data.binding_table.render_target_start = next_binding_table_offset;
-   next_binding_table_offset += c->key.nr_color_regions;
+   next_binding_table_offset += MAX2(c->key.nr_color_regions, 1);
 
    assign_common_binding_table_offsets(next_binding_table_offset);
 }
@@ -3281,22 +3284,35 @@ fs_visitor::run()
 	 progress = compute_to_mrf() || progress;
       } while (progress);
 
-      schedule_instructions(false);
-
       lower_uniform_pull_constant_loads();
 
       assign_curb_setup();
       assign_urb_setup();
 
+      schedule_instructions(SCHEDULE_PRE_NON_LIFO);
+
       if (0)
 	 assign_regs_trivial();
       else {
-	 while (!assign_regs()) {
+         if (!assign_regs(false)) {
+            /* Try a non-spilling register allocation again with a different
+             * scheduling heuristic.
+             */
+            schedule_instructions(SCHEDULE_PRE_LIFO);
+            if (!assign_regs(false)) {
+               if (dispatch_width == 16) {
+                  fail("Failure to register allocate.  Reduce number of "
+                       "live scalar values to avoid this.");
+               } else {
+                  while (!assign_regs(true)) {
                      if (failed)
                         break;
                   }
                }
             }
+         }
+      }
+   }
    assert(force_uncompressed_stack == 0);
    assert(force_sechalf_stack == 0);
 
@@ -3309,7 +3325,7 @@ fs_visitor::run()
    if (failed)
       return false;
 
-   schedule_instructions(true);
+   schedule_instructions(SCHEDULE_POST);
 
    if (dispatch_width == 8) {
       c->prog_data.reg_blocks = brw_register_blocks(grf_used);

src/mesa/drivers/dri/i965/brw_fs.h

@@ -291,7 +291,7 @@ public:
    void assign_curb_setup();
    void calculate_urb_setup();
    void assign_urb_setup();
-   bool assign_regs();
+   bool assign_regs(bool allow_spilling);
    void assign_regs_trivial();
    void get_used_mrfs(bool *mrf_used);
    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
@@ -322,7 +322,7 @@ public:
    bool remove_dead_constants();
    bool remove_duplicate_mrf_writes();
    bool virtual_grf_interferes(int a, int b);
-   void schedule_instructions(bool post_reg_alloc);
+   void schedule_instructions(instruction_scheduler_mode mode);
    void insert_gen4_send_dependency_workarounds();
    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);

src/mesa/drivers/dri/i965/brw_fs_cse.cpp

@@ -129,7 +129,8 @@ fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb)
 	inst = (fs_inst *) inst->next) {
 
       /* Skip some cases. */
-      if (is_expression(inst) && !inst->is_partial_write())
+      if (is_expression(inst) && !inst->is_partial_write() &&
+          (inst->dst.file != HW_REG || inst->dst.is_null()))
       {
 	 bool found = false;
 

src/mesa/drivers/dri/i965/brw_fs_generator.cpp

@@ -757,7 +757,7 @@ fs_generator::generate_scratch_write(fs_inst *inst, struct brw_reg src)
 	   retype(brw_message_reg(inst->base_mrf + 1), BRW_REGISTER_TYPE_UD),
 	   retype(src, BRW_REGISTER_TYPE_UD));
    brw_oword_block_write_scratch(p, brw_message_reg(inst->base_mrf),
-                                 inst->mlen, inst->offset);
+                                 dispatch_width / 8, inst->offset);
 }
 
 void

src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp

@@ -417,7 +417,7 @@ fs_visitor::setup_mrf_hack_interference(struct ra_graph *g, int first_mrf_node)
 }
 
 bool
-fs_visitor::assign_regs()
+fs_visitor::assign_regs(bool allow_spilling)
 {
    /* Most of this allocation was written for a reg_width of 1
     * (dispatch_width == 8).  In extending to 16-wide, the code was
@@ -496,14 +496,10 @@ fs_visitor::assign_regs()
       if (reg == -1) {
          fail("no register to spill:\n");
          dump_instructions();
-      } else if (dispatch_width == 16) {
-	 fail("Failure to register allocate.  Reduce number of live scalar "
-              "values to avoid this.");
-      } else {
+      } else if (allow_spilling) {
          spill_reg(reg);
       }
 
-
       ralloc_free(g);
 
       return false;

src/mesa/drivers/dri/i965/brw_lower_offset_array.cpp

@@ -34,26 +34,31 @@
 #include "glsl/glsl_types.h"
 #include "glsl/ir.h"
 #include "glsl/ir_builder.h"
+#include "glsl/ir_rvalue_visitor.h"
 
 using namespace ir_builder;
 
-class brw_lower_offset_array_visitor : public ir_hierarchical_visitor {
+class brw_lower_offset_array_visitor : public ir_rvalue_visitor {
 public:
    brw_lower_offset_array_visitor()
    {
       progress = false;
    }
 
-   ir_visitor_status visit_leave(ir_texture *ir);
+   void handle_rvalue(ir_rvalue **rv);
 
    bool progress;
 };
 
-ir_visitor_status
-brw_lower_offset_array_visitor::visit_leave(ir_texture *ir)
+void
+brw_lower_offset_array_visitor::handle_rvalue(ir_rvalue **rv)
 {
+   if (*rv == NULL || (*rv)->ir_type != ir_type_texture)
+      return;
+
+   ir_texture *ir = (ir_texture *) *rv;
    if (ir->op != ir_tg4 || !ir->offset || !ir->offset->type->is_array())
-      return visit_continue;
+      return;
 
    void *mem_ctx = ralloc_parent(ir);
 
@@ -68,10 +73,9 @@ brw_lower_offset_array_visitor::visit_leave(ir_texture *ir)
       base_ir->insert_before(assign(var, swizzle_w(tex), 1 << i));
    }
 
-   base_ir->replace_with(new (mem_ctx) ir_dereference_variable(var));
+   *rv = new (mem_ctx) ir_dereference_variable(var);
 
    progress = true;
-   return visit_continue;
 }
 
 extern "C" {

src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp

@@ -56,29 +56,12 @@ using namespace brw;
 
 static bool debug = false;
 
+class instruction_scheduler;
+
 class schedule_node : public exec_node
 {
 public:
-   schedule_node(backend_instruction *inst, const struct brw_context *brw)
-   {
-      this->inst = inst;
-      this->child_array_size = 0;
-      this->children = NULL;
-      this->child_latency = NULL;
-      this->child_count = 0;
-      this->parent_count = 0;
-      this->unblocked_time = 0;
-      this->cand_generation = 0;
-
-      /* We can't measure Gen6 timings directly but expect them to be much
-       * closer to Gen7 than Gen4.
-       */
-      if (brw->gen >= 6)
-         set_latency_gen7(brw->is_haswell);
-      else
-         set_latency_gen4();
-   }
-
+   schedule_node(backend_instruction *inst, instruction_scheduler *sched);
    void set_latency_gen4();
    void set_latency_gen7(bool is_haswell);
 
@@ -352,6 +335,8 @@ schedule_node::set_latency_gen7(bool is_haswell)
        * then around 140.  Presumably this is cache hit vs miss.
        */
       latency = 50;
+      break;
+
    case SHADER_OPCODE_UNTYPED_ATOMIC:
       /* Test code:
        *   mov(8)    g112<1>ud       0x00000000ud       { align1 WE_all 1Q };
@@ -408,15 +393,24 @@ schedule_node::set_latency_gen7(bool is_haswell)
 
 class instruction_scheduler {
 public:
-   instruction_scheduler(backend_visitor *v, int grf_count, bool post_reg_alloc)
+   instruction_scheduler(backend_visitor *v, int grf_count,
+                         instruction_scheduler_mode mode)
    {
       this->bv = v;
       this->mem_ctx = ralloc_context(NULL);
       this->grf_count = grf_count;
       this->instructions.make_empty();
       this->instructions_to_schedule = 0;
-      this->post_reg_alloc = post_reg_alloc;
+      this->post_reg_alloc = (mode == SCHEDULE_POST);
+      this->mode = mode;
       this->time = 0;
+      if (!post_reg_alloc) {
+         this->remaining_grf_uses = rzalloc_array(mem_ctx, int, grf_count);
+         this->grf_active = rzalloc_array(mem_ctx, bool, grf_count);
+      } else {
+         this->remaining_grf_uses = NULL;
+         this->grf_active = NULL;
+      }
    }
 
    ~instruction_scheduler()
@@ -442,6 +436,10 @@ public:
     */
    virtual int issue_time(backend_instruction *inst) = 0;
 
+   virtual void count_remaining_grf_uses(backend_instruction *inst) = 0;
+   virtual void update_register_pressure(backend_instruction *inst) = 0;
+   virtual int get_register_pressure_benefit(backend_instruction *inst) = 0;
+
    void schedule_instructions(backend_instruction *next_block_header);
 
    void *mem_ctx;
@@ -452,27 +450,116 @@ public:
    int time;
    exec_list instructions;
    backend_visitor *bv;
+
+   instruction_scheduler_mode mode;
+
+   /**
+    * Number of instructions left to schedule that reference each vgrf.
+    *
+    * Used so that we can prefer scheduling instructions that will end the
+    * live intervals of multiple variables, to reduce register pressure.
+    */
+   int *remaining_grf_uses;
+
+   /**
+    * Tracks whether each VGRF has had an instruction scheduled that uses it.
+    *
+    * This is used to estimate whether scheduling a new instruction will
+    * increase register pressure.
+    */
+   bool *grf_active;
 };
 
 class fs_instruction_scheduler : public instruction_scheduler
 {
 public:
-   fs_instruction_scheduler(fs_visitor *v, int grf_count, bool post_reg_alloc);
+   fs_instruction_scheduler(fs_visitor *v, int grf_count,
+                            instruction_scheduler_mode mode);
    void calculate_deps();
    bool is_compressed(fs_inst *inst);
    schedule_node *choose_instruction_to_schedule();
    int issue_time(backend_instruction *inst);
    fs_visitor *v;
+
+   void count_remaining_grf_uses(backend_instruction *inst);
+   void update_register_pressure(backend_instruction *inst);
+   int get_register_pressure_benefit(backend_instruction *inst);
 };
 
 fs_instruction_scheduler::fs_instruction_scheduler(fs_visitor *v,
                                                    int grf_count,
-                                                   bool post_reg_alloc)
-   : instruction_scheduler(v, grf_count, post_reg_alloc),
+                                                   instruction_scheduler_mode mode)
+   : instruction_scheduler(v, grf_count, mode),
      v(v)
 {
 }
 
+void
+fs_instruction_scheduler::count_remaining_grf_uses(backend_instruction *be)
+{
+   fs_inst *inst = (fs_inst *)be;
+
+   if (!remaining_grf_uses)
+      return;
+
+   if (inst->dst.file == GRF)
+      remaining_grf_uses[inst->dst.reg]++;
+
+   for (int i = 0; i < 3; i++) {
+      if (inst->src[i].file != GRF)
+         continue;
+
+      remaining_grf_uses[inst->src[i].reg]++;
+   }
+}
+
+void
+fs_instruction_scheduler::update_register_pressure(backend_instruction *be)
+{
+   fs_inst *inst = (fs_inst *)be;
+
+   if (!remaining_grf_uses)
+      return;
+
+   if (inst->dst.file == GRF) {
+      remaining_grf_uses[inst->dst.reg]--;
+      grf_active[inst->dst.reg] = true;
+   }
+
+   for (int i = 0; i < 3; i++) {
+      if (inst->src[i].file == GRF) {
+         remaining_grf_uses[inst->src[i].reg]--;
+         grf_active[inst->src[i].reg] = true;
+      }
+   }
+}
+
+int
+fs_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be)
+{
+   fs_inst *inst = (fs_inst *)be;
+   int benefit = 0;
+
+   if (inst->dst.file == GRF) {
+      if (remaining_grf_uses[inst->dst.reg] == 1)
+         benefit += v->virtual_grf_sizes[inst->dst.reg];
+      if (!grf_active[inst->dst.reg])
+         benefit -= v->virtual_grf_sizes[inst->dst.reg];
+   }
+
+   for (int i = 0; i < 3; i++) {
+      if (inst->src[i].file != GRF)
+         continue;
+
+      if (remaining_grf_uses[inst->src[i].reg] == 1)
+         benefit += v->virtual_grf_sizes[inst->src[i].reg];
+      if (!grf_active[inst->src[i].reg])
+         benefit -= v->virtual_grf_sizes[inst->src[i].reg];
+   }
+
+   return benefit;
+}
+
 class vec4_instruction_scheduler : public instruction_scheduler
 {
 public:
@@ -481,19 +568,64 @@ public:
    schedule_node *choose_instruction_to_schedule();
    int issue_time(backend_instruction *inst);
    vec4_visitor *v;
+
+   void count_remaining_grf_uses(backend_instruction *inst);
+   void update_register_pressure(backend_instruction *inst);
+   int get_register_pressure_benefit(backend_instruction *inst);
 };
 
 vec4_instruction_scheduler::vec4_instruction_scheduler(vec4_visitor *v,
                                                        int grf_count)
-   : instruction_scheduler(v, grf_count, true),
+   : instruction_scheduler(v, grf_count, SCHEDULE_POST),
      v(v)
 {
 }
 
+void
+vec4_instruction_scheduler::count_remaining_grf_uses(backend_instruction *be)
+{
+}
+
+void
+vec4_instruction_scheduler::update_register_pressure(backend_instruction *be)
+{
+}
+
+int
+vec4_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be)
+{
+   return 0;
+}
+
+schedule_node::schedule_node(backend_instruction *inst,
+                             instruction_scheduler *sched)
+{
+   struct brw_context *brw = sched->bv->brw;
+
+   this->inst = inst;
+   this->child_array_size = 0;
+   this->children = NULL;
+   this->child_latency = NULL;
+   this->child_count = 0;
+   this->parent_count = 0;
+   this->unblocked_time = 0;
+   this->cand_generation = 0;
+
+   /* We can't measure Gen6 timings directly but expect them to be much
+    * closer to Gen7 than Gen4.
+    */
+   if (!sched->post_reg_alloc)
+      this->latency = 1;
+   else if (brw->gen >= 6)
+      set_latency_gen7(brw->is_haswell);
+   else
+      set_latency_gen4();
+}
+
 void
 instruction_scheduler::add_inst(backend_instruction *inst)
 {
-   schedule_node *n = new(mem_ctx) schedule_node(inst, bv->brw);
+   schedule_node *n = new(mem_ctx) schedule_node(inst, this);
 
    assert(!inst->is_head_sentinel());
    assert(!inst->is_tail_sentinel());
@@ -1037,12 +1169,30 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
             continue;
          }
 
-         /* Prefer instructions that recently became available for scheduling.
-          * These are the things that are most likely to (eventually) make a
-          * variable dead and reduce register pressure.  Typical register
-          * pressure estimates don't work for us because most of our pressure
-          * comes from texturing, where no single instruction to schedule will
-          * make a vec4 value dead.
+         /* Most important: If we can definitely reduce register pressure, do
+          * so immediately.
+          */
+         int register_pressure_benefit = get_register_pressure_benefit(n->inst);
+         int chosen_register_pressure_benefit =
+            get_register_pressure_benefit(chosen->inst);
+
+         if (register_pressure_benefit > 0 &&
+             register_pressure_benefit > chosen_register_pressure_benefit) {
+            chosen = n;
+            continue;
+         } else if (chosen_register_pressure_benefit > 0 &&
+                    (register_pressure_benefit <
+                     chosen_register_pressure_benefit)) {
+            continue;
+         }
+
+         if (mode == SCHEDULE_PRE_LIFO) {
+            /* Prefer instructions that recently became available for
+             * scheduling.  These are the things that are most likely to
+             * (eventually) make a variable dead and reduce register pressure.
+             * Typical register pressure estimates don't work for us because
+             * most of our pressure comes from texturing, where no single
+             * instruction to schedule will make a vec4 value dead.
              */
             if (n->cand_generation > chosen->cand_generation) {
                chosen = n;
@@ -1051,11 +1201,11 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
                continue;
             }
 
-         /* On MRF-using chips, prefer non-SEND instructions.  If we don't do
-          * this, then because we prefer instructions that just became
-          * candidates, we'll end up in a pattern of scheduling a SEND, then
-          * the MRFs for the next SEND, then the next SEND, then the MRFs,
-          * etc., without ever consuming the results of a send.
+            /* On MRF-using chips, prefer non-SEND instructions.  If we don't
+             * do this, then because we prefer instructions that just became
+             * candidates, we'll end up in a pattern of scheduling a SEND,
+             * then the MRFs for the next SEND, then the next SEND, then the
+             * MRFs, etc., without ever consuming the results of a send.
              */
             if (v->brw->gen < 7) {
                fs_inst *chosen_inst = (fs_inst *)chosen->inst;
@@ -1072,6 +1222,7 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
                   continue;
                }
             }
+         }
 
          /* For instructions pushed on the cands list at the same time, prefer
           * the one with the highest delay to the end of the program.  This is
@@ -1153,6 +1304,7 @@ instruction_scheduler::schedule_instructions(backend_instruction *next_block_hea
       chosen->remove();
       next_block_header->insert_before(chosen->inst);
       instructions_to_schedule--;
+      update_register_pressure(chosen->inst);
 
       /* Update the clock for how soon an instruction could start after the
        * chosen one.
@@ -1228,6 +1380,15 @@ instruction_scheduler::run(exec_list *all_instructions)
       bv->dump_instructions();
    }
 
+   /* Populate the remaining GRF uses array to improve the pre-regalloc
+    * scheduling.
+    */
+   if (remaining_grf_uses) {
+      foreach_list(node, all_instructions) {
+         count_remaining_grf_uses((backend_instruction *)node);
+      }
+   }
+
    while (!next_block_header->is_tail_sentinel()) {
       /* Add things to be scheduled until we get to a new BB. */
       while (!next_block_header->is_tail_sentinel()) {
@@ -1255,18 +1416,18 @@ instruction_scheduler::run(exec_list *all_instructions)
 }
 
 void
-fs_visitor::schedule_instructions(bool post_reg_alloc)
+fs_visitor::schedule_instructions(instruction_scheduler_mode mode)
 {
    int grf_count;
-   if (post_reg_alloc)
+   if (mode == SCHEDULE_POST)
       grf_count = grf_used;
    else
       grf_count = virtual_grf_count;
 
-   fs_instruction_scheduler sched(this, grf_count, post_reg_alloc);
+   fs_instruction_scheduler sched(this, grf_count, mode);
    sched.run(&instructions);
 
-   if (unlikely(INTEL_DEBUG & DEBUG_WM) && post_reg_alloc) {
+   if (unlikely(INTEL_DEBUG & DEBUG_WM) && mode == SCHEDULE_POST) {
       printf("fs%d estimated execution time: %d cycles\n",
              dispatch_width, sched.time);
    }

src/mesa/drivers/dri/i965/brw_shader.h

@@ -59,6 +59,12 @@ public:
    bool predicate_inverse;
 };
 
+enum instruction_scheduler_mode {
+   SCHEDULE_PRE_NON_LIFO,
+   SCHEDULE_PRE_LIFO,
+   SCHEDULE_POST,
+};
+
 class backend_visitor : public ir_visitor {
 public:
 

src/mesa/drivers/dri/i965/brw_tex_layout.c

@@ -86,7 +86,7 @@ intel_horizontal_texture_alignment_unit(struct brw_context *brw,
 
 static unsigned int
 intel_vertical_texture_alignment_unit(struct brw_context *brw,
-                                     gl_format format)
+                                      gl_format format, bool multisampled)
 {
    /**
     * From the "Alignment Unit Size" section of various specs, namely:
@@ -110,8 +110,6 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
     *
     * On SNB+, non-special cases can be overridden by setting the SURFACE_STATE
     * "Surface Vertical Alignment" field to VALIGN_2 or VALIGN_4.
-    *
-    * We currently don't support multisampling.
     */
    if (_mesa_is_format_compressed(format))
       return 4;
@@ -119,6 +117,9 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
    if (format == MESA_FORMAT_S8)
       return brw->gen >= 7 ? 8 : 4;
 
+   if (multisampled)
+      return 4;
+
    GLenum base_format = _mesa_get_format_base_format(format);
 
    if (brw->gen >= 6 &&
@@ -276,8 +277,10 @@ brw_miptree_layout_texture_3d(struct brw_context *brw,
 void
 brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt)
 {
+   bool multisampled = mt->num_samples > 1;
    mt->align_w = intel_horizontal_texture_alignment_unit(brw, mt->format);
-   mt->align_h = intel_vertical_texture_alignment_unit(brw, mt->format);
+   mt->align_h =
+      intel_vertical_texture_alignment_unit(brw, mt->format, multisampled);
 
    switch (mt->target) {
    case GL_TEXTURE_CUBE_MAP:

src/mesa/drivers/dri/i965/brw_vec4_gs.c

@@ -259,6 +259,13 @@ brw_upload_gs_prog(struct brw_context *brw)
          brw->vue_map_geom_out = brw->vue_map_vs;
          brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
       }
+
+      /* Other state atoms had better not try to access prog_data, since
+       * there's no GS program.
+       */
+      brw->gs.prog_data = NULL;
+      brw->gs.base.prog_data = NULL;
+
       return;
    }
 

src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp

@@ -53,7 +53,6 @@ vec4_instruction::vec4_instruction(vec4_visitor *v,
    this->mlen = 0;
    this->base_mrf = 0;
    this->offset = 0;
-   this->ir = NULL;
    this->annotation = v->current_annotation;
 }
 

src/mesa/drivers/dri/i965/brw_wm_surface_state.c

@@ -701,7 +701,7 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw)
       for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) {
 	 if (intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[i])) {
 	    brw->vtbl.update_renderbuffer_surface(brw, ctx->DrawBuffer->_ColorDrawBuffers[i],
-                                                  ctx->DrawBuffer->Layered, i);
+                                                  ctx->DrawBuffer->NumLayers > 0, i);
 	 } else {
 	    brw->vtbl.update_null_renderbuffer_surface(brw, i);
 	 }
@@ -890,7 +890,7 @@ brw_upload_abo_surfaces(struct brw_context *brw,
       struct intel_buffer_object *intel_bo =
          intel_buffer_object(binding->BufferObject);
       drm_intel_bo *bo = intel_bufferobj_buffer(
-         brw, intel_bo, binding->Offset, bo->size - binding->Offset);
+         brw, intel_bo, binding->Offset, intel_bo->Base.Size - binding->Offset);
 
       brw->vtbl.create_raw_surface(brw, bo, binding->Offset,
                                    bo->size - binding->Offset,

src/mesa/drivers/dri/i965/gen6_clip_state.c

@@ -121,7 +121,7 @@ upload_clip_state(struct brw_context *brw)
 	     dw2);
    OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
              U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
-             (fb->Layered ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX));
+             (fb->NumLayers > 0 ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX));
    ADVANCE_BATCH();
 }
 

src/mesa/drivers/dri/i965/gen7_blorp.cpp

@@ -402,6 +402,21 @@ gen7_blorp_emit_gs_disable(struct brw_context *brw,
    OUT_BATCH(0);
    ADVANCE_BATCH();
 
+   /**
+    * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages >
+    * Geometry > Geometry Shader > State:
+    *
+    *     "Note: Because of corruption in IVB:GT2, software needs to flush the
+    *     whole fixed function pipeline when the GS enable changes value in
+    *     the 3DSTATE_GS."
+    *
+    * The hardware architects have clarified that in this context "flush the
+    * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS
+    * Stall" bit set.
+    */
+   if (!brw->is_haswell && brw->gt == 2 && brw->gs.enabled)
+      gen7_emit_cs_stall_flush(brw);
+
    BEGIN_BATCH(7);
    OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
    OUT_BATCH(0);
@@ -411,6 +426,7 @@ gen7_blorp_emit_gs_disable(struct brw_context *brw,
    OUT_BATCH(0);
    OUT_BATCH(0);
    ADVANCE_BATCH();
+   brw->gs.enabled = false;
 }
 
 /* 3DSTATE_STREAMOUT

src/mesa/drivers/dri/i965/gen7_gs_state.c

@@ -80,6 +80,21 @@ upload_gs_state(struct brw_context *brw)
 
    gen7_upload_constant_state(brw, stage_state, active, _3DSTATE_CONSTANT_GS);
 
+   /**
+    * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages >
+    * Geometry > Geometry Shader > State:
+    *
+    *     "Note: Because of corruption in IVB:GT2, software needs to flush the
+    *     whole fixed function pipeline when the GS enable changes value in
+    *     the 3DSTATE_GS."
+    *
+    * The hardware architects have clarified that in this context "flush the
+    * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS
+    * Stall" bit set.
+    */
+   if (!brw->is_haswell && brw->gt == 2 && brw->gs.enabled != active)
+      gen7_emit_cs_stall_flush(brw);
+
    if (active) {
       BEGIN_BATCH(7);
       OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
@@ -176,6 +191,7 @@ upload_gs_state(struct brw_context *brw)
       OUT_BATCH(0);
       ADVANCE_BATCH();
    }
+   brw->gs.enabled = active;
 }
 
 const struct brw_tracked_state gen7_gs_state = {

src/mesa/drivers/dri/i965/gen7_misc_state.c

@@ -81,7 +81,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
       break;
    }
 
-   if (fb->Layered || !irb) {
+   if (fb->NumLayers > 0 || !irb) {
       min_array_element = 0;
    } else if (irb->mt->num_samples > 1) {
       /* Convert physical layer to logical layer. */

src/mesa/drivers/dri/i965/gen7_urb.c

@@ -122,28 +122,8 @@ gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
     *
     * No such restriction exists for Haswell.
     */
-   if (!brw->is_haswell) {
-      BEGIN_BATCH(4);
-      OUT_BATCH(_3DSTATE_PIPE_CONTROL | (4 - 2));
-      /* From p61 of the Ivy Bridge PRM (1.10.4 PIPE_CONTROL Command: DW1[20]
-       * CS Stall):
-       *
-       *     One of the following must also be set:
-       *     - Render Target Cache Flush Enable ([12] of DW1)
-       *     - Depth Cache Flush Enable ([0] of DW1)
-       *     - Stall at Pixel Scoreboard ([1] of DW1)
-       *     - Depth Stall ([13] of DW1)
-       *     - Post-Sync Operation ([13] of DW1)
-       *
-       * We choose to do a Post-Sync Operation (Write Immediate Data), since
-       * it seems like it will incur the least additional performance penalty.
-       */
-      OUT_BATCH(PIPE_CONTROL_CS_STALL | PIPE_CONTROL_WRITE_IMMEDIATE);
-      OUT_RELOC(brw->batch.workaround_bo,
-                I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0);
-      OUT_BATCH(0);
-      ADVANCE_BATCH();
-   }
+   if (!brw->is_haswell)
+      gen7_emit_cs_stall_flush(brw);
 }
 
 const struct brw_tracked_state gen7_push_constant_space = {

src/mesa/drivers/dri/i965/intel_batchbuffer.c

@@ -510,6 +510,36 @@ gen7_emit_vs_workaround_flush(struct brw_context *brw)
    ADVANCE_BATCH();
 }
 
+
+/**
+ * Emit a PIPE_CONTROL command for gen7 with the CS Stall bit set.
+ */
+void
+gen7_emit_cs_stall_flush(struct brw_context *brw)
+{
+   BEGIN_BATCH(4);
+   OUT_BATCH(_3DSTATE_PIPE_CONTROL | (4 - 2));
+   /* From p61 of the Ivy Bridge PRM (1.10.4 PIPE_CONTROL Command: DW1[20]
+    * CS Stall):
+    *
+    *     One of the following must also be set:
+    *     - Render Target Cache Flush Enable ([12] of DW1)
+    *     - Depth Cache Flush Enable ([0] of DW1)
+    *     - Stall at Pixel Scoreboard ([1] of DW1)
+    *     - Depth Stall ([13] of DW1)
+    *     - Post-Sync Operation ([13] of DW1)
+    *
+    * We choose to do a Post-Sync Operation (Write Immediate Data), since
+    * it seems like it will incur the least additional performance penalty.
+    */
+   OUT_BATCH(PIPE_CONTROL_CS_STALL | PIPE_CONTROL_WRITE_IMMEDIATE);
+   OUT_RELOC(brw->batch.workaround_bo,
+             I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0);
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
+}
+
+
 /**
  * Emits a PIPE_CONTROL with a non-zero post-sync operation, for
  * implementing two workarounds on gen6.  From section 1.4.7.1

src/mesa/drivers/dri/i965/intel_batchbuffer.h

@@ -59,6 +59,7 @@ void intel_batchbuffer_emit_mi_flush(struct brw_context *brw);
 void intel_emit_post_sync_nonzero_flush(struct brw_context *brw);
 void intel_emit_depth_stall_flushes(struct brw_context *brw);
 void gen7_emit_vs_workaround_flush(struct brw_context *brw);
+void gen7_emit_cs_stall_flush(struct brw_context *brw);
 
 static INLINE uint32_t float_as_int(float f)
 {

src/mesa/drivers/dri/i965/intel_screen.c

@@ -300,7 +300,8 @@ intel_allocate_image(int dri_format, void *loaderPrivate)
     image->offset = 0;
 
     image->format = driImageFormatToGLFormat(dri_format);
-    if (image->format == 0) {
+    if (dri_format != __DRI_IMAGE_FORMAT_NONE &&
+        image->format == MESA_FORMAT_NONE) {
        free(image);
        return NULL;
     }
@@ -804,7 +805,7 @@ static struct __DRIimageExtensionRec intelImageExtension = {
 };
 
 static int
-brw_query_renderer_integer(__DRIscreen *psp, int param, int *value)
+brw_query_renderer_integer(__DRIscreen *psp, int param, unsigned int *value)
 {
    const struct intel_screen *const intelScreen =
       (struct intel_screen *) psp->driverPrivate;
@@ -823,10 +824,14 @@ brw_query_renderer_integer(__DRIscreen *psp, int param, int *value)
       /* Once a batch uses more than 75% of the maximum mappable size, we
        * assume that there's some fragmentation, and we start doing extra
        * flushing, etc.  That's the big cliff apps will care about.
-       *
-       * Can only map 2G onto the GPU through the GTT.
        */
-      const unsigned gpu_mappable_megabytes = 2 * 1024 * 3 / 4;
+      size_t aper_size;
+      size_t mappable_size;
+
+      drm_intel_get_aperture_sizes(psp->fd, &mappable_size, &aper_size);
+
+      const unsigned gpu_mappable_megabytes =
+         (aper_size / (1024 * 1024)) * 3 / 4;
 
       const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
       const long system_page_size = sysconf(_SC_PAGE_SIZE);
@@ -889,6 +894,15 @@ static const struct __DRIrobustnessExtensionRec dri2Robustness = {
 };
 
 static const __DRIextension *intelScreenExtensions[] = {
+    &intelTexBufferExtension.base,
+    &intelFlushExtension.base,
+    &intelImageExtension.base,
+    &intelRendererQueryExtension.base,
+    &dri2ConfigQueryExtension.base,
+    NULL
+};
+
+static const __DRIextension *intelRobustScreenExtensions[] = {
     &intelTexBufferExtension.base,
     &intelFlushExtension.base,
     &intelImageExtension.base,
@@ -1297,7 +1311,22 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
 
    set_max_gl_versions(intelScreen);
 
-   psp->extensions = intelScreenExtensions;
+   /* Notification of GPU resets requires hardware contexts and a kernel new
+    * enough to support DRM_IOCTL_I915_GET_RESET_STATS.  If the ioctl is
+    * supported, calling it with a context of 0 will either generate EPERM or
+    * no error.  If the ioctl is not supported, it always generate EINVAL.
+    * Use this to determine whether to advertise the __DRI2_ROBUSTNESS
+    * extension to the loader.
+    */
+   struct drm_i915_reset_stats stats;
+   memset(&stats, 0, sizeof(stats));
+
+   const int ret = drmIoctl(psp->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
+
+   intelScreen->has_context_reset_notification = (ret != -1 || errno != EINVAL);
+
+   psp->extensions = !intelScreen->has_context_reset_notification
+      ? intelScreenExtensions : intelRobustScreenExtensions;
 
    return (const __DRIconfig**) intel_screen_make_configs(psp);
 }

src/mesa/drivers/dri/i965/intel_screen.h

@@ -50,6 +50,11 @@ struct intel_screen
 
    bool hw_has_swizzling;
 
+   /**
+    * Does the kernel support context reset notifications?
+    */
+   bool has_context_reset_notification;
+
    dri_bufmgr *bufmgr;
 
    /**

src/mesa/drivers/dri/i965/intel_tex_subimage.c

@@ -331,6 +331,12 @@ ytile_copy(
    }
 }
 
+#ifdef __GNUC__
+#define FLATTEN __attribute__((flatten))
+#else
+#define FLATTEN
+#endif
+
 /**
  * Copy texture data from linear to X tile layout, faster.
  *
@@ -340,7 +346,7 @@ ytile_copy(
  *
  * \copydoc tile_copy_fn
  */
-static void
+static FLATTEN void
 xtile_copy_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
                   uint32_t y0, uint32_t y1,
                   char *dst, const char *src,
@@ -376,7 +382,7 @@ xtile_copy_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
  *
  * \copydoc tile_copy_fn
  */
-static void
+static FLATTEN void
 ytile_copy_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
                   uint32_t y0, uint32_t y1,
                   char *dst, const char *src,

src/mesa/drivers/dri/swrast/swrast.c

@@ -406,8 +406,8 @@ swrast_map_renderbuffer(struct gl_context *ctx,
 				     (char *) xrb->Base.Buffer,
 				     dPriv->loaderPrivate);
 
-      *out_map = xrb->Base.Buffer;
-      *out_stride = stride;
+      *out_map = xrb->Base.Buffer + (h - 1) * stride;
+      *out_stride = -stride;
       return;
    }
 
@@ -664,6 +664,7 @@ dri_create_context(gl_api api,
 		   unsigned major_version,
 		   unsigned minor_version,
 		   uint32_t flags,
+		   bool notify_reset,
 		   unsigned *error,
 		   void *sharedContextPrivate)
 {

src/mesa/drivers/haiku/swrast/SConscript

@@ -0,0 +1,28 @@
+Import('*')
+
+env = env.Clone()
+
+env.Append(CPPPATH = [
+    '#/src/mapi',
+    '#/src/mesa',
+    '#/src/mesa/main',
+    '/boot/system/develop/headers/private',
+    Dir('../../../mapi'), # src/mapi build path for python-generated GL API files/headers
+])
+
+env.Prepend(LIBS = [
+    glsl,
+    mesa,
+])
+
+sources = [
+	'SoftwareRast.cpp'
+]
+
+# Disallow undefined symbols
+#env.Append(SHLINKFLAGS = ['-Wl,-z,defs'])
+
+libswrast = env.SharedLibrary(
+    target = 'swrast',
+    source = sources
+)

src/mesa/drivers/haiku/swrast/SoftwareRast.cpp

@@ -0,0 +1,697 @@
+/*
+ * Copyright 2006-2012, Haiku, Inc. All rights reserved.
+ * Distributed under the terms of the MIT License.
+ *
+ * Authors:
+ *		Jérôme Duval, korli@users.berlios.de
+ *		Philippe Houdoin, philippe.houdoin@free.fr
+ *		Artur Wyszynski, harakash@gmail.com
+ *		Alexander von Gluck, kallisti5@unixzen.com
+ */
+
+
+#include <kernel/image.h>
+#include "SoftwareRast.h"
+
+#include <Autolock.h>
+#include <interface/DirectWindowPrivate.h>
+#include <GraphicsDefs.h>
+#include <Screen.h>
+#include <stdio.h>
+#include <string.h>
+
+extern "C" {
+#include "extensions.h"
+#include "drivers/common/driverfuncs.h"
+#include "drivers/common/meta.h"
+#include "main/api_exec.h"
+#include "main/colormac.h"
+#include "main/cpuinfo.h"
+#include "main/buffers.h"
+#include "main/formats.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
+#include "main/version.h"
+#include "main/vtxfmt.h"
+#include "swrast/swrast.h"
+#include "swrast/s_renderbuffer.h"
+#include "swrast_setup/swrast_setup.h"
+#include "tnl/tnl.h"
+#include "tnl/t_context.h"
+#include "tnl/t_pipeline.h"
+#include "vbo/vbo.h"
+
+
+#ifdef DEBUG
+#	define TRACE(x...) printf("MesaSoftwareRast: " x)
+#	define CALLED() printf("MesaSoftwareRast: %s\n", __PRETTY_FUNCTION__)
+#else
+#	define TRACE(x...)
+#	define CALLED()
+#endif
+
+#define ERROR(x...) printf("MesaSoftwareRast: " x)
+}
+
+
+extern const char* color_space_name(color_space space);
+
+
+extern "C" _EXPORT BGLRenderer*
+instantiate_gl_renderer(BGLView* view, ulong options,
+	BGLDispatcher* dispatcher)
+{
+	return new MesaSoftwareRast(view, options, dispatcher);
+}
+
+
+MesaSoftwareRast::MesaSoftwareRast(BGLView* view, ulong options,
+	BGLDispatcher* dispatcher)
+	: BGLRenderer(view, options, dispatcher),
+	fBitmap(NULL),
+	fDirectModeEnabled(false),
+	fInfo(NULL),
+	fInfoLocker("info locker"),
+	fVisual(NULL),
+	fFrameBuffer(NULL),
+	fFrontRenderBuffer(NULL),
+	fBackRenderBuffer(NULL),
+	fColorSpace(B_NO_COLOR_SPACE)
+{
+	CALLED();
+
+	fColorSpace = BScreen(GLView()->Window()).ColorSpace();
+
+	// We force single buffering for the time being
+	options &= ~BGL_DOUBLE;
+
+	const GLboolean rgbFlag = ((options & BGL_INDEX) == 0);
+	const GLboolean alphaFlag = ((options & BGL_ALPHA) == BGL_ALPHA);
+	const GLboolean dblFlag = ((options & BGL_DOUBLE) == BGL_DOUBLE);
+	const GLboolean stereoFlag = false;
+	const GLint depth = (options & BGL_DEPTH) ? 16 : 0;
+	const GLint stencil = (options & BGL_STENCIL) ? 8 : 0;
+	const GLint accum = (options & BGL_ACCUM) ? 16 : 0;
+	const GLint red = rgbFlag ? 8 : 0;
+	const GLint green = rgbFlag ? 8 : 0;
+	const GLint blue = rgbFlag ? 8 : 0;
+	const GLint alpha = alphaFlag ? 8 : 0;
+
+	fOptions = options; // | BGL_INDIRECT;
+	struct dd_function_table functions;
+
+	fVisual = _mesa_create_visual(dblFlag, stereoFlag, red, green,
+		blue, alpha, depth, stencil, accum, accum, accum,
+		alpha ? accum : 0, 1);
+
+	// Initialize device driver function table
+	_mesa_init_driver_functions(&functions);
+
+	functions.GetString = _GetString;
+	functions.UpdateState = _UpdateState;
+	functions.MapRenderbuffer = _RenderBufferMap;
+	functions.Flush = _Flush;
+
+	// create core context
+	// We inherit gl_context to this class
+	_mesa_initialize_context(this, API_OPENGL_COMPAT, fVisual, NULL,
+		&functions);
+
+	/* Initialize the software rasterizer and helper modules. */
+	_swrast_CreateContext(this);
+	_vbo_CreateContext(this);
+	_tnl_CreateContext(this);
+	_swsetup_CreateContext(this);
+	_swsetup_Wakeup(this);
+
+	// Use default TCL pipeline
+	TNL_CONTEXT(this)->Driver.RunPipeline = _tnl_run_pipeline;
+
+	_mesa_meta_init(this);
+	_mesa_enable_sw_extensions(this);
+
+	_mesa_compute_version(this);
+
+	_mesa_initialize_dispatch_tables(this);
+	_mesa_initialize_vbo_vtxfmt(this);
+
+	// create core framebuffer
+	fFrameBuffer = _mesa_create_framebuffer(fVisual);
+	if (fFrameBuffer == NULL) {
+		ERROR("%s: Unable to calloc GL FrameBuffer!\n", __func__);
+		_mesa_destroy_visual(fVisual);
+		return;
+	}
+
+	// Setup front render buffer
+	fFrontRenderBuffer = _NewRenderBuffer(true);
+	if (fFrontRenderBuffer == NULL) {
+		ERROR("%s: FrontRenderBuffer is requested but unallocated!\n",
+			__func__);
+		_mesa_destroy_visual(fVisual);
+		free(fFrameBuffer);
+		return;
+	}
+	_mesa_add_renderbuffer(fFrameBuffer, BUFFER_FRONT_LEFT,
+		&fFrontRenderBuffer->Base);
+
+	// Setup back render buffer (if requested)
+	if (fVisual->doubleBufferMode) {
+		fBackRenderBuffer = _NewRenderBuffer(false);
+		if (fBackRenderBuffer == NULL) {
+			ERROR("%s: BackRenderBuffer is requested but unallocated!\n",
+				__func__);
+			_mesa_destroy_visual(fVisual);
+			free(fFrameBuffer);
+			return;
+		}
+		_mesa_add_renderbuffer(fFrameBuffer, BUFFER_BACK_LEFT,
+			&fBackRenderBuffer->Base);
+	}
+
+	_swrast_add_soft_renderbuffers(fFrameBuffer, GL_FALSE,
+		fVisual->haveDepthBuffer, fVisual->haveStencilBuffer,
+		fVisual->haveAccumBuffer, alphaFlag, GL_FALSE);
+
+	BRect bounds = view->Bounds();
+	fWidth = (GLint)bounds.Width();
+	fHeight = (GLint)bounds.Height();
+
+	// some stupid applications (Quake2) don't even think about calling LockGL()
+	// before using glGetString and its glGet*() friends...
+	// so make sure there is at least a valid context.
+
+	if (!_mesa_get_current_context()) {
+		LockGL();
+		// not needed, we don't have a looper yet: UnlockLooper();
+	}
+}
+
+
+MesaSoftwareRast::~MesaSoftwareRast()
+{
+	CALLED();
+	_swsetup_DestroyContext(this);
+	_swrast_DestroyContext(this);
+	_tnl_DestroyContext(this);
+	_vbo_DestroyContext(this);
+	_mesa_destroy_visual(fVisual);
+	_mesa_destroy_framebuffer(fFrameBuffer);
+	_mesa_destroy_context(this);
+
+	free(fInfo);
+	free(fFrameBuffer);
+
+	delete fBitmap;
+}
+
+
+void
+MesaSoftwareRast::LockGL()
+{
+	CALLED();
+	BGLRenderer::LockGL();
+
+	_mesa_make_current(this, fFrameBuffer, fFrameBuffer);
+
+	color_space colorSpace = BScreen(GLView()->Window()).ColorSpace();
+
+	GLuint width = fWidth;
+	GLuint height = fHeight;
+
+	BAutolock lock(fInfoLocker);
+	if (fDirectModeEnabled && fInfo != NULL) {
+		width = fInfo->window_bounds.right
+			- fInfo->window_bounds.left + 1;
+		height = fInfo->window_bounds.bottom
+			- fInfo->window_bounds.top + 1;
+	}
+
+	if (fColorSpace != colorSpace) {
+		fColorSpace = colorSpace;
+		_SetupRenderBuffer(&fFrontRenderBuffer->Base, fColorSpace);
+		if (fVisual->doubleBufferMode)
+			_SetupRenderBuffer(&fBackRenderBuffer->Base, fColorSpace);
+	}
+
+	_CheckResize(width, height);
+}
+
+
+void
+MesaSoftwareRast::UnlockGL()
+{
+	CALLED();
+	_mesa_make_current(this, NULL, NULL);
+	BGLRenderer::UnlockGL();
+}
+
+
+void
+MesaSoftwareRast::SwapBuffers(bool VSync)
+{
+	CALLED();
+
+	if (!fBitmap)
+		return;
+
+	if (fVisual->doubleBufferMode)
+		_mesa_notifySwapBuffers(this);
+
+	if (!fDirectModeEnabled || fInfo == NULL) {
+		if (GLView()->LockLooperWithTimeout(1000) == B_OK) {
+			GLView()->DrawBitmap(fBitmap, B_ORIGIN);
+			GLView()->UnlockLooper();
+		}
+	} else {
+		// TODO: Here the BGLView needs to be drawlocked.
+		_CopyToDirect();
+	}
+
+	if (VSync) {
+		BScreen screen(GLView()->Window());
+		screen.WaitForRetrace();
+	}
+}
+
+
+void
+MesaSoftwareRast::Draw(BRect updateRect)
+{
+	CALLED();
+	if (fBitmap && (!fDirectModeEnabled || (fInfo == NULL)))
+		GLView()->DrawBitmap(fBitmap, updateRect, updateRect);
+}
+
+
+status_t
+MesaSoftwareRast::CopyPixelsOut(BPoint location, BBitmap* bitmap)
+{
+	CALLED();
+	color_space scs = fBitmap->ColorSpace();
+	color_space dcs = bitmap->ColorSpace();
+
+	if (scs != dcs && (scs != B_RGBA32 || dcs != B_RGB32)) {
+		fprintf(stderr, "CopyPixelsOut(): incompatible color space: %s != %s\n",
+			color_space_name(scs),
+			color_space_name(dcs));
+		return B_BAD_TYPE;
+	}
+
+	BRect sr = fBitmap->Bounds();
+	BRect dr = bitmap->Bounds();
+
+	sr = sr & dr.OffsetBySelf(location);
+	dr = sr.OffsetByCopy(-location.x, -location.y);
+
+	uint8* ps = (uint8*)fBitmap->Bits();
+	uint8* pd = (uint8*)bitmap->Bits();
+	uint32* s;
+	uint32* d;
+	uint32 y;
+	for (y = (uint32)sr.top; y <= (uint32)sr.bottom; y++) {
+		s = (uint32*)(ps + y * fBitmap->BytesPerRow());
+		s += (uint32)sr.left;
+
+		d = (uint32*)(pd + (y + (uint32)(dr.top - sr.top))
+			* bitmap->BytesPerRow());
+		d += (uint32)dr.left;
+
+		memcpy(d, s, dr.IntegerWidth() * 4);
+	}
+	return B_OK;
+}
+
+
+status_t
+MesaSoftwareRast::CopyPixelsIn(BBitmap* bitmap, BPoint location)
+{
+	CALLED();
+	color_space scs = bitmap->ColorSpace();
+	color_space dcs = fBitmap->ColorSpace();
+
+	if (scs != dcs && (dcs != B_RGBA32 || scs != B_RGB32)) {
+		fprintf(stderr, "CopyPixelsIn(): incompatible color space: %s != %s\n",
+			color_space_name(scs),
+			color_space_name(dcs));
+		return B_BAD_TYPE;
+	}
+
+	BRect sr = bitmap->Bounds();
+	BRect dr = fBitmap->Bounds();
+
+	sr = sr & dr.OffsetBySelf(location);
+	dr = sr.OffsetByCopy(-location.x, -location.y);
+
+	uint8* ps = (uint8*)bitmap->Bits();
+	uint8* pd = (uint8*)fBitmap->Bits();
+	uint32* s;
+	uint32* d;
+	uint32 y;
+	for (y = (uint32)sr.top; y <= (uint32)sr.bottom; y++) {
+		s = (uint32*)(ps + y * bitmap->BytesPerRow());
+		s += (uint32)sr.left;
+
+		d = (uint32*)(pd + (y + (uint32)(dr.top - sr.top))
+			* fBitmap->BytesPerRow());
+		d += (uint32)dr.left;
+
+		memcpy(d, s, dr.IntegerWidth() * 4);
+	}
+	return B_OK;
+}
+
+
+void
+MesaSoftwareRast::EnableDirectMode(bool enabled)
+{
+	fDirectModeEnabled = enabled;
+}
+
+
+void
+MesaSoftwareRast::DirectConnected(direct_buffer_info* info)
+{
+	// TODO: I'm not sure we need to do this: BGLView already
+	// keeps a local copy of the direct_buffer_info passed by
+	// BDirectWindow::DirectConnected().
+	BAutolock lock(fInfoLocker);
+	if (info) {
+		if (!fInfo) {
+			fInfo = (direct_buffer_info*)malloc(DIRECT_BUFFER_INFO_AREA_SIZE);
+			if (!fInfo)
+				return;
+		}
+		memcpy(fInfo, info, DIRECT_BUFFER_INFO_AREA_SIZE);
+	} else if (fInfo) {
+		free(fInfo);
+		fInfo = NULL;
+	}
+}
+
+
+void
+MesaSoftwareRast::FrameResized(float width, float height)
+{
+	BAutolock lock(fInfoLocker);
+	_CheckResize((GLuint)width, (GLuint)height);
+}
+
+
+void
+MesaSoftwareRast::_CheckResize(GLuint newWidth, GLuint newHeight)
+{
+	CALLED();
+
+	if (fBitmap && newWidth == fWidth
+		&& newHeight == fHeight) {
+		return;
+	}
+
+	_mesa_resize_framebuffer(this, fFrameBuffer, newWidth, newHeight);
+	fHeight = newHeight;
+	fWidth = newWidth;
+
+	_AllocateBitmap();
+}
+
+
+void
+MesaSoftwareRast::_AllocateBitmap()
+{
+	CALLED();
+
+	// allocate new size of back buffer bitmap
+	delete fBitmap;
+	fBitmap = NULL;
+
+	if (fWidth < 1 || fHeight < 1) {
+		TRACE("%s: Cannot allocate bitmap < 1x1!\n", __func__);
+		return;
+	}
+
+	BRect rect(0.0, 0.0, fWidth - 1, fHeight - 1);
+	fBitmap = new BBitmap(rect, fColorSpace);
+
+	#if 0
+	// Used for platform optimized drawing
+	for (uint i = 0; i < fHeight; i++) {
+		fRowAddr[fHeight - i - 1] = (GLvoid *)((GLubyte *)fBitmap->Bits()
+			+ i * fBitmap->BytesPerRow());
+	}
+	#endif
+
+	fFrameBuffer->Width = fWidth;
+	fFrameBuffer->Height = fHeight;
+	TRACE("%s: Bitmap Size: %" B_PRIu32 "\n", __func__, fBitmap->BitsLength());
+
+	fFrontRenderBuffer->Buffer = (GLubyte*)fBitmap->Bits();
+}
+
+
+// #pragma mark - static
+
+
+const GLubyte*
+MesaSoftwareRast::_GetString(gl_context* ctx, GLenum name)
+{
+	switch (name) {
+		case GL_VENDOR:
+			return (const GLubyte*) "Mesa Project";
+		case GL_RENDERER:
+			return (const GLubyte*) "Software Rasterizer";
+		default:
+			// Let core library handle all other cases
+			return NULL;
+	}
+}
+
+
+void
+MesaSoftwareRast::_UpdateState(gl_context* ctx, GLuint new_state)
+{
+	if (!ctx)
+		return;
+
+	CALLED();
+	_swrast_InvalidateState(ctx, new_state);
+	_swsetup_InvalidateState(ctx, new_state);
+	_vbo_InvalidateState(ctx, new_state);
+	_tnl_InvalidateState(ctx, new_state);
+}
+
+
+GLboolean
+MesaSoftwareRast::_RenderBufferStorage(gl_context* ctx,
+	struct gl_renderbuffer* render, GLenum internalFormat,
+	GLuint width, GLuint height)
+{
+	CALLED();
+
+	render->Width = width;
+	render->Height = height;
+
+	struct swrast_renderbuffer *swRenderBuffer = swrast_renderbuffer(render);
+
+	swRenderBuffer->RowStride = width * _mesa_get_format_bytes(render->Format);
+
+	return GL_TRUE;
+}
+
+
+GLboolean
+MesaSoftwareRast::_RenderBufferStorageMalloc(gl_context* ctx,
+	struct gl_renderbuffer* render, GLenum internalFormat,
+	GLuint width, GLuint height)
+{
+	CALLED();
+
+	render->Width = width;
+	render->Height = height;
+
+	struct swrast_renderbuffer *swRenderBuffer = swrast_renderbuffer(render);
+
+	if (swRenderBuffer != NULL) {
+		free(swRenderBuffer->Buffer);
+		swRenderBuffer->RowStride
+			= width * _mesa_get_format_bytes(render->Format);
+
+		uint32 size = swRenderBuffer->RowStride * height;
+		TRACE("%s: Allocate %" B_PRIu32 " bytes for RenderBuffer\n",
+			__func__, size);
+		swRenderBuffer->Buffer = (GLubyte*)malloc(size);
+		if (!swRenderBuffer->Buffer) {
+			ERROR("%s: Memory allocation failure!\n", __func__);
+			return GL_FALSE;
+		}
+	} else {
+		ERROR("%s: Couldn't obtain software renderbuffer!\n",
+			__func__);
+		return GL_FALSE;
+	}
+
+	return GL_TRUE;
+}
+
+
+void
+MesaSoftwareRast::_Flush(gl_context* ctx)
+{
+	CALLED();
+	MesaSoftwareRast* driverContext = static_cast<MesaSoftwareRast*>(ctx);
+
+	//MesaSoftwareRast* driverContext = (MesaSoftwareRast*)ctx->DriverCtx;
+	if ((driverContext->fOptions & BGL_DOUBLE) == 0) {
+		// TODO: SwapBuffers() can call _CopyToDirect(), which should
+		// be always called with with the BGLView drawlocked.
+		// This is not always the case if called from here.
+		driverContext->SwapBuffers();
+	}
+}
+
+
+struct swrast_renderbuffer*
+MesaSoftwareRast::_NewRenderBuffer(bool front)
+{
+	CALLED();
+	struct swrast_renderbuffer *swRenderBuffer
+		= (struct swrast_renderbuffer*)calloc(1, sizeof *swRenderBuffer);
+
+	if (!swRenderBuffer) {
+		ERROR("%s: Failed calloc RenderBuffer\n", __func__);
+		return NULL;
+	}
+
+	_mesa_init_renderbuffer(&swRenderBuffer->Base, 0);
+
+	swRenderBuffer->Base.ClassID = HAIKU_SWRAST_RENDERBUFFER_CLASS;
+	swRenderBuffer->Base.RefCount = 1;
+	swRenderBuffer->Base.Delete = _RenderBufferDelete;
+
+	if (!front)
+		swRenderBuffer->Base.AllocStorage = _RenderBufferStorageMalloc;
+	else
+		swRenderBuffer->Base.AllocStorage = _RenderBufferStorage;
+
+	if (_SetupRenderBuffer(&swRenderBuffer->Base, fColorSpace) != B_OK) {
+		free(swRenderBuffer);
+		return NULL;
+	}
+
+	return swRenderBuffer;
+}
+
+
+status_t
+MesaSoftwareRast::_SetupRenderBuffer(struct gl_renderbuffer* rb,
+	color_space colorSpace)
+{
+	CALLED();
+
+	rb->InternalFormat = GL_RGBA;
+
+	switch (colorSpace) {
+		case B_RGBA32:
+			rb->_BaseFormat = GL_RGBA;
+			rb->Format = MESA_FORMAT_ARGB8888;
+			break;
+		case B_RGB32:
+			rb->_BaseFormat = GL_RGB;
+			rb->Format = MESA_FORMAT_XRGB8888;
+			break;
+		case B_RGB24:
+			rb->_BaseFormat = GL_RGB;
+			rb->Format = MESA_FORMAT_RGB888;
+			break;
+		case B_RGB16:
+			rb->_BaseFormat = GL_RGB;
+			rb->Format = MESA_FORMAT_RGB565;
+			break;
+		case B_RGB15:
+			rb->_BaseFormat = GL_RGB;
+			rb->Format = MESA_FORMAT_ARGB1555;
+			break;
+		default:
+			fprintf(stderr, "Unsupported screen color space %s\n",
+				color_space_name(fColorSpace));
+			debugger("Unsupported OpenGL color space");
+			return B_ERROR;
+	}
+	return B_OK;
+}
+
+
+/*!	Y inverted Map RenderBuffer function
+	We use a BBitmap for storage which has Y inverted.
+	If the Mesa provided Map function ever allows external
+	control of this we can omit this function.
+*/
+void
+MesaSoftwareRast::_RenderBufferMap(gl_context *ctx,
+	struct gl_renderbuffer *rb, GLuint x, GLuint y, GLuint w, GLuint h,
+	GLbitfield mode, GLubyte **mapOut, GLint *rowStrideOut)
+{
+	if (rb->ClassID == HAIKU_SWRAST_RENDERBUFFER_CLASS) {
+		struct swrast_renderbuffer *srb = swrast_renderbuffer(rb);
+		const GLuint bpp = _mesa_get_format_bytes(rb->Format);
+		GLint rowStride = rb->Width * bpp; // in Bytes
+
+		y = rb->Height - y - 1;
+
+		*rowStrideOut = -rowStride;
+		*mapOut = (GLubyte *) srb->Buffer + y * rowStride + x * bpp;
+	} else {
+		_swrast_map_soft_renderbuffer(ctx, rb, x, y, w, h, mode,
+			mapOut, rowStrideOut);
+	}
+}
+
+
+void
+MesaSoftwareRast::_RenderBufferDelete(struct gl_context *ctx,
+	struct gl_renderbuffer* rb)
+{
+	CALLED();
+	if (rb != NULL) {
+		struct swrast_renderbuffer *swRenderBuffer
+			= swrast_renderbuffer(rb);
+		if (swRenderBuffer != NULL)
+			free(swRenderBuffer->Buffer);
+	}
+	free(rb);
+}
+
+
+void
+MesaSoftwareRast::_CopyToDirect()
+{
+	BAutolock lock(fInfoLocker);
+
+	// check the bitmap size still matches the size
+	if (fInfo->window_bounds.bottom - fInfo->window_bounds.top
+		!= fBitmap->Bounds().IntegerHeight()
+		|| fInfo->window_bounds.right - fInfo->window_bounds.left
+			!= fBitmap->Bounds().IntegerWidth())
+		return;
+
+	uint8 bytesPerPixel = fInfo->bits_per_pixel / 8;
+	uint32 bytesPerRow = fBitmap->BytesPerRow();
+	for (uint32 i = 0; i < fInfo->clip_list_count; i++) {
+		clipping_rect *clip = &fInfo->clip_list[i];
+		int32 height = clip->bottom - clip->top + 1;
+		int32 bytesWidth
+			= (clip->right - clip->left + 1) * bytesPerPixel;
+		uint8* p = (uint8*)fInfo->bits + clip->top
+			* fInfo->bytes_per_row + clip->left * bytesPerPixel;
+		uint8* b = (uint8*)fBitmap->Bits()
+			+ (clip->top - fInfo->window_bounds.top) * bytesPerRow
+			+ (clip->left - fInfo->window_bounds.left)
+				* bytesPerPixel;
+
+		for (int y = 0; y < height; y++) {
+			memcpy(p, b, bytesWidth);
+			p += fInfo->bytes_per_row;
+			b += bytesPerRow;
+		}
+	}
+}

src/mesa/drivers/haiku/swrast/SoftwareRast.h

@@ -0,0 +1,95 @@
+/*
+ * Copyright 2006-2012, Haiku, Inc. All rights reserved.
+ * Distributed under the terms of the MIT License.
+ *
+ * Authors:
+ *		Jérôme Duval, korli@users.berlios.de
+ * 		Philippe Houdoin, philippe.houdoin@free.fr
+ *		Artur Wyszynski, harakash@gmail.com
+ */
+#ifndef MESASOFTWARERENDERER_H
+#define MESASOFTWARERENDERER_H
+
+
+#define HAIKU_SWRAST_RENDERBUFFER_CLASS 0x737752 // swR
+
+
+#include "GLRenderer.h"
+
+extern "C" {
+#include "context.h"
+#include "main/version.h"
+#include "swrast/s_chan.h"
+#include "swrast/s_context.h"
+}
+
+
+class MesaSoftwareRast : public BGLRenderer, public gl_context {
+public:
+							MesaSoftwareRast(BGLView* view,
+								ulong bgl_options,
+								BGLDispatcher* dispatcher);
+	virtual					~MesaSoftwareRast();
+
+	virtual	void			LockGL();
+	virtual	void 			UnlockGL();
+
+	virtual	void 			SwapBuffers(bool VSync = false);
+	virtual	void			Draw(BRect updateRect);
+	virtual	status_t		CopyPixelsOut(BPoint source, BBitmap* dest);
+	virtual	status_t		CopyPixelsIn(BBitmap* source, BPoint dest);
+	virtual void			FrameResized(float width, float height);
+
+	virtual	void			EnableDirectMode(bool enabled);
+	virtual	void			DirectConnected(direct_buffer_info* info);
+
+private:
+	static	const GLubyte*	_GetString(gl_context* ctx, GLenum name);
+			void			_CheckResize(GLuint newWidth, GLuint newHeight);
+	static	void			_UpdateState(gl_context* ctx, GLuint newState);
+	static	void			_Flush(gl_context *ctx);
+
+	struct	swrast_renderbuffer* _NewRenderBuffer(bool front);
+			status_t		_SetupRenderBuffer(struct gl_renderbuffer* rb,
+								color_space colorSpace);
+
+/* Mesa callbacks */
+	static	void			_RenderBufferDelete(struct gl_context *ctx,
+								struct gl_renderbuffer* rb);
+	static	GLboolean		_RenderBufferStorage(gl_context* ctx,
+								struct gl_renderbuffer* render,
+								GLenum internalFormat,
+								GLuint width, GLuint height);
+	static	GLboolean		_RenderBufferStorageMalloc(gl_context* ctx,
+								struct gl_renderbuffer* render,
+								GLenum internalFormat,
+								GLuint width, GLuint height);
+	static	void			_RenderBufferMap(gl_context *ctx,
+								struct gl_renderbuffer *rb,
+								GLuint x, GLuint y, GLuint w, GLuint h,
+								GLbitfield mode, GLubyte **mapOut,
+								GLint *rowStrideOut);
+
+			void			_AllocateBitmap();
+			void			_CopyToDirect();
+
+			BBitmap*		fBitmap;
+			bool			fDirectModeEnabled;
+			direct_buffer_info* fInfo;
+			BLocker			fInfoLocker;
+			ulong			fOptions;
+
+			gl_config*		fVisual;
+
+			struct gl_framebuffer* fFrameBuffer;
+			struct swrast_renderbuffer* fFrontRenderBuffer;
+			struct swrast_renderbuffer* fBackRenderBuffer;
+
+			GLuint			fWidth;
+			GLuint			fHeight;
+			color_space		fColorSpace;
+
+			void*			fRowAddr[SWRAST_MAX_HEIGHT];
+};
+
+#endif	// MESASOFTWARERENDERER_H

src/mesa/drivers/haiku/swrast/SoftwareRast.rdef

@@ -0,0 +1,39 @@
+/*
+ * Copyright 2012, Haiku, Inc. All rights reserved.
+ * Distributed under the terms of the MIT License.
+ */
+
+resource app_signature "application/x-vnd.Haiku-swrast";
+
+resource app_version {
+    major  = 9,
+    middle = 0,
+    minor  = 0,
+    variety = 0,
+    internal = 0,
+    short_info = "Software Rasterizer",
+    long_info = "Haiku Mesa Software GL Rasterizer"
+};
+
+resource vector_icon {
+	$"6E6369660A0200140294A9FF18020014028DFFFF97058C0500020006023B10B7"
+	$"37F036BA1A993D466848C719BEBE2000919292FFD5D5D5020016023900000000"
+	$"000000003EE0004AE00048E0005EF884C702000203392E8D383001BAD97F3C12"
+	$"8B4786BD48B8AD0D97BBFFFF7B4168DBE9FF4168DB97020002023A0C1238D099"
+	$"BE44203F4BD14B38844678240DF56A7D9FE1EA064CC704016B0500090A044024"
+	$"2438404C5C380A044028243C40505C3C0A042438243B5C3C5C380608BFBE4D59"
+	$"4D59515957575659585560406044603C5E3A5C3CCB4FBFBA5E3ECA9DC11F564B"
+	$"584A544C504C0606AF0F2F3D2F3D393D4034BF593542324130432F42364432C0"
+	$"3FBC5A2F48354A2F480608AE9A22303EB5BD3AB42542B755422E412F3C29322D"
+	$"32223C0204263726372538263F253E263F304430443143303C313D303C02043D"
+	$"423D423C433D4A3C493D4A495049504A4F49474A484947060DAEAAAE014E445A"
+	$"3456365E325E3D5D3F5A3A5542544E4D573A4E364439463342324A2242310A0A"
+	$"0002020102403CA00C88888C8CC1401673C40D6544F2950A01010002403CA000"
+	$"0000000000401673C40D65446CF80A08020304023EC16A0000000000003EC16A"
+	$"45DD1844C6550A030105123EC16A0000000000003EC16A45DD1844C655011784"
+	$"22040A040105023EC16A0000000000003EC16A45DD1844C6550A030108123EC1"
+	$"6A0000000000003EC16A45DD1844C65501178422040A0503080706023EC16A00"
+	$"00000000003EC16A45DD1844C6550A030206071A3EC16A0000000000003EC16A"
+	$"45DD1844C65510FF0215810004178222040A060106023EC16A0000000000003E"
+	$"C16A45DD1844C6550A070107023EC16A0000000000003EC16A45DD1844C655"
+};

src/mesa/drivers/osmesa/osmesa.c

@@ -197,6 +197,14 @@ osmesa_choose_line_function( struct gl_context *ctx )
    const OSMesaContext osmesa = OSMESA_CONTEXT(ctx);
    const SWcontext *swrast = SWRAST_CONTEXT(ctx);
 
+   if (ctx->DrawBuffer &&
+       ctx->DrawBuffer->Visual.redBits == 32) {
+      /* the special-case line functions in this file don't work
+       * for float color channels.
+       */
+      return NULL;
+   }
+
    if (ctx->RenderMode != GL_RENDER)      return NULL;
    if (ctx->Line.SmoothFlag)              return NULL;
    if (ctx->Texture._EnabledUnits)        return NULL;
@@ -298,6 +306,14 @@ osmesa_choose_triangle_function( struct gl_context *ctx )
    const OSMesaContext osmesa = OSMESA_CONTEXT(ctx);
    const SWcontext *swrast = SWRAST_CONTEXT(ctx);
 
+   if (ctx->DrawBuffer &&
+       ctx->DrawBuffer->Visual.redBits == 32) {
+      /* the special-case triangle functions in this file don't work
+       * for float color channels.
+       */
+      return (swrast_tri_func) NULL;
+   }
+
    if (ctx->RenderMode != GL_RENDER)    return (swrast_tri_func) NULL;
    if (ctx->Polygon.SmoothFlag)         return (swrast_tri_func) NULL;
    if (ctx->Polygon.StippleFlag)        return (swrast_tri_func) NULL;

src/mesa/main/api_arrayelt.c

@@ -1469,6 +1469,18 @@ check_vbo(AEcontext *actx, struct gl_buffer_object *vbo)
 }
 
 
+static inline void
+update_derived_client_arrays(struct gl_context *ctx)
+{
+   struct gl_array_object *arrayObj = ctx->Array.ArrayObj;
+
+   if (arrayObj->NewArrays) {
+      _mesa_update_array_object_client_arrays(ctx, arrayObj);
+      arrayObj->NewArrays = 0;
+   }
+}
+
+
 /**
  * Make a list of per-vertex functions to call for each glArrayElement call.
  * These functions access the array data (i.e. glVertex, glColor, glNormal,
@@ -1486,12 +1498,6 @@ _ae_update_state(struct gl_context *ctx)
 
    actx->nr_vbos = 0;
 
-   if (arrayObj->NewArrays) {
-      /* update the derived client arrays */
-      _mesa_update_array_object_client_arrays(ctx, arrayObj);
-      arrayObj->NewArrays = 0;
-   }
-
    /* conventional vertex arrays */
    if (arrayObj->_VertexAttrib[VERT_ATTRIB_COLOR_INDEX].Enabled) {
       aa->array = &arrayObj->_VertexAttrib[VERT_ATTRIB_COLOR_INDEX];
@@ -1618,6 +1624,8 @@ _ae_map_vbos(struct gl_context *ctx)
    if (actx->mapped_vbos)
       return;
 
+   update_derived_client_arrays(ctx);
+
    if (actx->NewState)
       _ae_update_state(ctx);
 
@@ -1669,6 +1677,8 @@ _ae_ArrayElement(GLint elt)
    const struct _glapi_table * const disp = GET_DISPATCH();
    GLboolean do_map;
 
+   update_derived_client_arrays(ctx);
+
    /* If PrimitiveRestart is enabled and the index is the RestartIndex
     * then we call PrimitiveRestartNV and return.
     */

src/mesa/main/context.c

@@ -494,7 +494,7 @@ init_program_limits(struct gl_context *ctx, GLenum type,
       prog->MaxParameters = MAX_VERTEX_PROGRAM_PARAMS;
       prog->MaxAttribs = MAX_VERTEX_GENERIC_ATTRIBS;
       prog->MaxAddressRegs = MAX_VERTEX_PROGRAM_ADDRESS_REGS;
-      prog->MaxUniformComponents = MAX_GEOMETRY_UNIFORM_COMPONENTS;
+      prog->MaxUniformComponents = 4 * MAX_UNIFORMS;
       prog->MaxInputComponents = 16 * 4; /* old limit not to break tnl and swrast */
       prog->MaxOutputComponents = 16 * 4; /* old limit not to break tnl and swrast */
       break;