docs: Add 7.8.2 release MD5 sums

When building OSMesa and xlib GL, the resulting OSMesa would be linked
against libGL instead of the internal mesa libraries. However, when
building with -fvisibility=hidden, some of the internal functions used
in OSMesa could not be resolved through libGL.

Instead, always build OSMesa standalone without linking against libGL.
This has the advantage that OSMesa is always built the same way, but it
means that disk space is wasted when libGL is installed since both
libraries will contain the internal objects.

Signed-off-by: Dan Nicholson <dbn.lists@gmail.com>
Tested-by: Tom Fogal <tfogal@alumni.unh.edu>
(cherry picked from commit cbf30fce32)

Makefile

@@ -180,7 +180,7 @@ ultrix-gcc:
 
 # Rules for making release tarballs
 
-VERSION=7.8.1
+VERSION=7.8.2
 DIRECTORY = Mesa-$(VERSION)
 LIB_NAME = MesaLib-$(VERSION)
 DEMO_NAME = MesaDemos-$(VERSION)

configs/default

@@ -10,7 +10,7 @@ CONFIG_NAME = default
 # Version info
 MESA_MAJOR=7
 MESA_MINOR=8
-MESA_TINY=1
+MESA_TINY=2
 MESA_VERSION = $(MESA_MAJOR).$(MESA_MINOR).$(MESA_TINY)
 
 # external projects.  This should be useless now that we use libdrm.

configure.ac

@@ -865,7 +865,7 @@ else
 fi
 AC_ARG_ENABLE([gl-osmesa],
     [AS_HELP_STRING([--enable-gl-osmesa],
-        [enable OSMesa on libGL @<:@default=enabled for xlib driver@:>@])],
+        [enable OSMesa with libGL @<:@default=enabled for xlib driver@:>@])],
     [gl_osmesa="$enableval"],
     [gl_osmesa="$default_gl_osmesa"])
 if test "x$gl_osmesa" = xyes; then
@@ -900,8 +900,8 @@ x16|x32)
 esac
 AC_SUBST([OSMESA_LIB])
 
-case "$mesa_driver" in
-osmesa)
+case "$DRIVER_DIRS" in
+*osmesa*)
     # only link libraries with osmesa if shared
     if test "$enable_static" = no; then
         OSMESA_LIB_DEPS="-lm -lpthread $SELINUX_LIBS $DLOPEN_LIBS"
@@ -911,19 +911,7 @@ osmesa)
     OSMESA_MESA_DEPS=""
     OSMESA_PC_LIB_PRIV="-lm -lpthread $SELINUX_LIBS $DLOPEN_LIBS"
     ;;
-*)
-    # Link OSMesa to libGL otherwise
-    OSMESA_LIB_DEPS=""
-    # only link libraries with osmesa if shared
-    if test "$enable_static" = no; then
-        OSMESA_MESA_DEPS='-l$(GL_LIB)'
-    else
-        OSMESA_MESA_DEPS=""
-    fi
-    OSMESA_PC_REQ="gl"
-    ;;
 esac
-OSMESA_PC_LIB_PRIV="$OSMESA_PC_LIB_PRIV"
 AC_SUBST([OSMESA_LIB_DEPS])
 AC_SUBST([OSMESA_MESA_DEPS])
 AC_SUBST([OSMESA_PC_REQ])

docs/devinfo.html

@@ -145,7 +145,7 @@ Make sure the values in src/mesa/main/version.h are correct.
 </p>
 
 <p>
-Update the docs/news.html file and docs/download.html files.
+Update docs/news.html.
 </p>
 
 <p>
@@ -208,10 +208,11 @@ sftp USERNAME,mesa3d@web.sourceforge.net
 
 <p>
 Make an announcement on the mailing lists:
-<em>m</em><em>e</em><em>s</em><em>a</em><em>3</em><em>d</em><em>-</em><em>d</em><em>e</em><em>v</em><em>@</em><em>l</em><em>i</em><em>s</em><em>t</em><em>s</em><em>.</em><em>s</em><em>f</em><em>.</em><em>n</em><em>e</em><em>t</em>,
-<em>m</em><em>e</em><em>s</em><em>a</em><em>3</em><em>d</em><em>-</em><em>u</em><em>s</em><em>e</em><em>r</em><em>s</em><em>@</em><em>l</em><em>i</em><em>s</em><em>t</em><em>s</em><em>.</em><em>s</em><em>f</em><em>.</em><em>n</em><em>e</em><em>t</em>
+
+<em>m</em><em>e</em><em>s</em><em>a</em><em>-</em><em>d</em><em>e</em><em>v</em><em>@</em><em>l</em><em>i</em><em>s</em><em>t</em><em>s</em><em>.</em><em>f</em><em>r</em><em>e</em><em>e</em><em>d</em><em>e</em><em>s</em><em>k</em><em>t</em><em>o</em><em>p</em><em>.</em><em>o</em><em>r</em><em>g</em>,
+<em>m</em><em>e</em><em>s</em><em>a</em><em>-</em><em>u</em><em>s</em><em>e</em><em>r</em><em>s</em><em>@</em><em>l</em><em>i</em><em>s</em><em>t</em><em>s</em><em>.</em><em>f</em><em>r</em><em>e</em><em>e</em><em>d</em><em>e</em><em>s</em><em>k</em><em>t</em><em>o</em><em>p</em><em>.</em><em>o</em><em>r</em><em>g</em>
 and
-<em>m</em><em>e</em><em>s</em><em>a</em><em>3</em><em>d</em><em>-</em><em>a</em><em>n</em><em>n</em><em>o</em><em>u</em><em>n</em><em>c</em><em>e</em><em>@</em><em>l</em><em>i</em><em>s</em><em>t</em><em>s</em><em>.</em><em>s</em><em>f</em><em>.</em><em>n</em><em>e</em><em>t</em>
+<em>m</em><em>e</em><em>s</em><em>a</em><em>-</em><em>a</em><em>n</em><em>n</em><em>o</em><em>u</em><em>n</em><em>c</em><em>e</em><em>@</em><em>l</em><em>i</em><em>s</em><em>t</em><em>s</em><em>.</em><em>f</em><em>r</em><em>e</em><em>e</em><em>d</em><em>e</em><em>s</em><em>k</em><em>t</em><em>o</em><em>p</em><em>.</em><em>o</em><em>r</em><em>g</em>
 </p>
 
 

docs/news.html

@@ -11,6 +11,14 @@
 <H1>News</H1>
 
 
+<h2>June 16, 2010</h2>
+
+<p>
+<a href="relnotes-7.8.2.html">Mesa 7.8.2</a> is released.  This is a bug-fix
+release collecting fixes since the 7.8.1 release.
+</p>
+
+
 <h2>April 5, 2010</h2>
 
 <p>

docs/relnotes-7.8.2.html

@@ -8,7 +8,7 @@
 
 <body bgcolor="#eeeeee">
 
-<H1>Mesa 7.8.2 Release Notes / April, 5, 2010</H1>
+<H1>Mesa 7.8.2 Release Notes / (date tbd)</H1>
 
 <p>
 Mesa 7.8.2 is a bug fix release which fixes bugs found since the 7.8.1 release.
@@ -26,7 +26,15 @@ for DRI hardware acceleration.
 
 <h2>MD5 checksums</h2>
 <pre>
-tbd
+c89b63d253605ed40e8ac370d25a833c  MesaLib-7.8.2.tar.gz
+6be2d343a0089bfd395ce02aaf8adb57  MesaLib-7.8.2.tar.bz2
+a04ad3b06ac5ff3969a003fa7bbf7d5b  MesaLib-7.8.2.zip
+7c213f92efeb471f0331670d5079d4c0  MesaDemos-7.8.2.tar.gz
+757d9e2e06f48b1a52848be9b0307ced  MesaDemos-7.8.2.tar.bz2
+8d0e5cfe68b8ebf90265d350ae2c48b1  MesaDemos-7.8.2.zip
+b74482e3f44f35ed395c4aada4fd8240  MesaGLUT-7.8.2.tar.gz
+a471807b65e49c325808ba4551be93ed  MesaGLUT-7.8.2.tar.bz2
+9f190268c42be582ef66e47365ee61e3  MesaGLUT-7.8.2.zip
 </pre>
 
 
@@ -43,6 +51,94 @@ tbd
 <h2>Bug fixes</h2>
 <ul>
 <li>Fixed Gallium glDrawPixels(GL_DEPTH_COMPONENT).
+<li>Fixed Gallium Cell driver to buildable, runable state
+<li>Fixed bad error checking for glFramebufferRenderbuffer(attachment=GL_DEPTH_STENCIL_ATTACHMENT).
+<li>Fixed incorrect Z coordinate handling in "meta" glDraw/CopyPixels.
+    <a href="https://bugs.freedesktop.org/show_bug.cgi?id=23670">Bug
+    #23670</a>.</li>
+
+<li>Assorted i965 driver fixes.
+    Including but not limited to:
+  <ul>
+    <li>Fix scissoring when width or height is
+    0.  <a href="https://bugs.freedesktop.org/show_bug.cgi?id=27643">Bug
+    #27643</a>.
+    <li>Fix bit allocation for number of color regions for
+    ARB_draw_buffers.</li>
+    <li>Set the correct provoking vertex for clipped first-mode
+    trifans.  <a href="https://bugs.freedesktop.org/show_bug.cgi?id=24470">Bug
+    #24470</a>.</li>
+    <li>Use <code>R16G16B16A16_FLOAT</code> for 3-component half-float.</li>
+    <li>Fix assertion for surface tile offset usage on Ironlake.</li>
+    <li>Fix cube map layouts on Ironlake.</li>
+    <li>When an RB gets a new region, clear the old from the state
+    cache.  <a href="https://bugs.freedesktop.org/show_bug.cgi?id=24119">Bug
+    #24119</a>.</li>
+    <li>Reject shaders with uninlined function calls instead of hanging.</li>
+  </ul>
+</li>
+
+<li>Assorted i915 driver fixes.  Including but not limited to:
+  <ul>
+    <li>Fixed texture LOD clamping in i915 driver.
+    <a href="https://bugs.freedesktop.org/show_bug.cgi?id=24846">Bug
+    #24846</a>.</li>
+    <li>Fix off-by-one for drawing rectangle.
+    <a href="https://bugs.freedesktop.org/show_bug.cgi?id=27408">Bug
+    #27408</a>.</li>
+  </ul>
+</li>
+
+<li>Fixed hangs in etracer on 830 and 845
+    chipsets.  <a href="https://bugs.freedesktop.org/show_bug.cgi?id=26557">Bug
+    #26557</a>.</li>
+<li>Fixed tiling of small textures on all Intel drivers.</li>
+<li>Fixed crash in Savage driver when using <code>_mesa_CopyTexImage2D</code>.
+    <a href="https://bugs.freedesktop.org/show_bug.cgi?id=27652">Bug
+    #27652</a>.</li>
+
+<li>Assorted GLX fixes.  Including but not limited to:
+  <ul>
+    <li>Fixed <code>__glXInitializeVisualConfigFromTags</code>'s handling of
+        unrecognized fbconfig tags.</li>
+    <li>Fixed regression with <code>GLX_USE_GL</code>.
+    <li>Fixed config chooser logic for 'mask' matching.</li>
+    <li>Report swap events correctly in direct rendered case (DRI2)</li>
+    <li>Fixed build with dri2proto which doesn't define
+        <code>X_DRI2SwapInterval</code>.</li>
+    <li>Get <code>GLX_SCREEN</code> first in <code>__glXQueryContextInfo</code>.
+        <a href="https://bugs.freedesktop.org/show_bug.cgi?id=14245">Bug
+	#14245</a>.</li>
+  </ul>
+</li>
+
+<li>Assorted GLSL fixes.  Including but not limited to:
+  <ul>
+    <li>Change variable declared assertion into conditional in GLSL
+        compiler.  <a href="https://bugs.freedesktop.org/show_bug.cgi?id=27921">Bug
+        #27921</a>.</li>
+    <li>Fix instruction indexing
+        bugs.  <a href="https://bugs.freedesktop.org/show_bug.cgi?id=27566">Bug
+        #27566</a>.</li>
+    <li>Updated uniform location / offset encoding to be more like
+        other implementations.</li>
+    <li>Don't overwrite a driver's shader infolog with generic failure
+        message.</li>
+  </ul>
+</li>
+
+<li>Fixed OSMesa build for 16 and 32-bit color channel depth.
+<li>Fixed OSMesa build with hidden symbol visibility. libOSMesa no longer links to libGL.
+    <a href="https://bugs.freedesktop.org/show_bug.cgi?id=28305">Bug
+    #28305</a>.
+<li>Fixed handling of multiple render targets in fixed-function
+    texture envrionmnent programs.</li>
+<li>Fixed conversion errors in <code>signed_rgba8888[rev]</code> texel
+    fetch.</li>
+<li>Don't set srcLevel on <code>GL_TEXTURE_RECTANGLE_ARB</code> targets.</li>
+<li>Various build fixes for OpenBSD.</li>
+<li>Various build fixes for OS X.</li>
+<li>Various build fixes for GCC 3.3.</li>
 </ul>
 
 

src/egl/drivers/dri2/egl_dri2.c

@@ -1331,6 +1331,7 @@ _eglMain(const char *args)
    if (!dri2_drv)
       return NULL;
 
+   memset(dri2_drv, 0, sizeof *dri2_drv);
    _eglInitDriverFallbacks(&dri2_drv->base);
    dri2_drv->base.API.Initialize = dri2_initialize;
    dri2_drv->base.API.Terminate = dri2_terminate;

src/gallium/auxiliary/draw/draw_vs_ppc.c

@@ -125,7 +125,7 @@ vs_ppc_run_linear( struct draw_vertex_shader *base,
        */
       shader->func(inputs_soa, outputs_soa, temps_soa,
 		   (float (*)[4]) shader->base.immediates,
-                   (const float (*)[4])constants[0],
+                   (float (*)[4]) constants[0],
                    ppc_builtin_constants);
 
       /* convert (up to) four output verts from SoA back to AoS format */

src/gallium/auxiliary/indices/.gitignore

@@ -0,0 +1,2 @@
+u_indices_gen.c
+u_unfilled_gen.c

src/gallium/auxiliary/indices/u_unfilled_gen.c

@@ -1,992 +0,0 @@
-/* File automatically generated by u_unfilled_gen.py */
-
-/*
- * Copyright 2009 VMware, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
- * VMWARE AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-
-
-/**
- * @file
- * Functions to translate and generate index lists
- */
-
-#include "indices/u_indices.h"
-#include "indices/u_indices_priv.h"
-#include "pipe/p_compiler.h"
-#include "util/u_debug.h"
-#include "pipe/p_defines.h"
-#include "util/u_memory.h"
-
-
-static unsigned out_size_idx( unsigned index_size )
-{
-   switch (index_size) {
-   case 4: return OUT_UINT;
-   case 2: return OUT_USHORT;
-   default: assert(0); return OUT_USHORT;
-   }
-}
-
-static unsigned in_size_idx( unsigned index_size )
-{
-   switch (index_size) {
-   case 4: return IN_UINT;
-   case 2: return IN_USHORT;
-   case 1: return IN_UBYTE;
-   default: assert(0); return IN_UBYTE;
-   }
-}
-
-
-static u_generate_func generate_line[OUT_COUNT][PRIM_COUNT];
-static u_translate_func translate_line[IN_COUNT][OUT_COUNT][PRIM_COUNT];
-
-
-static void generate_tris_ushort(
-    unsigned nr,
-    void *_out )
-{
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (ushort)(i);
-      (out+j)[1] = (ushort)(i+1);
-      (out+j+2)[0] = (ushort)(i+1);
-      (out+j+2)[1] = (ushort)(i+2);
-      (out+j+4)[0] = (ushort)(i+2);
-      (out+j+4)[1] = (ushort)(i);
-   }
-}
-static void generate_tristrip_ushort(
-    unsigned nr,
-    void *_out )
-{
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)(i);
-      (out+j)[1] = (ushort)(i+1/*+(i&1)*/);
-      (out+j+2)[0] = (ushort)(i+1/*+(i&1)*/);
-      (out+j+2)[1] = (ushort)(i+2/*-(i&1)*/);
-      (out+j+4)[0] = (ushort)(i+2/*-(i&1)*/);
-      (out+j+4)[1] = (ushort)(i);
-   }
-}
-static void generate_trifan_ushort(
-    unsigned nr,
-    void *_out )
-{
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)(0);
-      (out+j)[1] = (ushort)(i+1);
-      (out+j+2)[0] = (ushort)(i+1);
-      (out+j+2)[1] = (ushort)(i+2);
-      (out+j+4)[0] = (ushort)(i+2);
-      (out+j+4)[1] = (ushort)(0);
-   }
-}
-static void generate_quads_ushort(
-    unsigned nr,
-    void *_out )
-{
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (ushort)(i+0);
-      (out+j)[1] = (ushort)(i+1);
-      (out+j+2)[0] = (ushort)(i+1);
-      (out+j+2)[1] = (ushort)(i+2);
-      (out+j+4)[0] = (ushort)(i+2);
-      (out+j+4)[1] = (ushort)(i+3);
-      (out+j+6)[0] = (ushort)(i+3);
-      (out+j+6)[1] = (ushort)(i+0);
-   }
-}
-static void generate_quadstrip_ushort(
-    unsigned nr,
-    void *_out )
-{
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (ushort)(i+2);
-      (out+j)[1] = (ushort)(i+0);
-      (out+j+2)[0] = (ushort)(i+0);
-      (out+j+2)[1] = (ushort)(i+1);
-      (out+j+4)[0] = (ushort)(i+1);
-      (out+j+4)[1] = (ushort)(i+3);
-      (out+j+6)[0] = (ushort)(i+3);
-      (out+j+6)[1] = (ushort)(i+2);
-   }
-}
-static void generate_polygon_ushort(
-    unsigned nr,
-    void *_out )
-{
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)(0);
-      (out+j)[1] = (ushort)(i+1);
-      (out+j+2)[0] = (ushort)(i+1);
-      (out+j+2)[1] = (ushort)(i+2);
-      (out+j+4)[0] = (ushort)(i+2);
-      (out+j+4)[1] = (ushort)(0);
-   }
-}
-static void generate_tris_uint(
-    unsigned nr,
-    void *_out )
-{
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (uint)(i);
-      (out+j)[1] = (uint)(i+1);
-      (out+j+2)[0] = (uint)(i+1);
-      (out+j+2)[1] = (uint)(i+2);
-      (out+j+4)[0] = (uint)(i+2);
-      (out+j+4)[1] = (uint)(i);
-   }
-}
-static void generate_tristrip_uint(
-    unsigned nr,
-    void *_out )
-{
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)(i);
-      (out+j)[1] = (uint)(i+1/*+(i&1)*/);
-      (out+j+2)[0] = (uint)(i+1/*+(i&1)*/);
-      (out+j+2)[1] = (uint)(i+2/*-(i&1)*/);
-      (out+j+4)[0] = (uint)(i+2/*-(i&1)*/);
-      (out+j+4)[1] = (uint)(i);
-   }
-}
-static void generate_trifan_uint(
-    unsigned nr,
-    void *_out )
-{
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)(0);
-      (out+j)[1] = (uint)(i+1);
-      (out+j+2)[0] = (uint)(i+1);
-      (out+j+2)[1] = (uint)(i+2);
-      (out+j+4)[0] = (uint)(i+2);
-      (out+j+4)[1] = (uint)(0);
-   }
-}
-static void generate_quads_uint(
-    unsigned nr,
-    void *_out )
-{
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (uint)(i+0);
-      (out+j)[1] = (uint)(i+1);
-      (out+j+2)[0] = (uint)(i+1);
-      (out+j+2)[1] = (uint)(i+2);
-      (out+j+4)[0] = (uint)(i+2);
-      (out+j+4)[1] = (uint)(i+3);
-      (out+j+6)[0] = (uint)(i+3);
-      (out+j+6)[1] = (uint)(i+0);
-   }
-}
-static void generate_quadstrip_uint(
-    unsigned nr,
-    void *_out )
-{
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (uint)(i+2);
-      (out+j)[1] = (uint)(i+0);
-      (out+j+2)[0] = (uint)(i+0);
-      (out+j+2)[1] = (uint)(i+1);
-      (out+j+4)[0] = (uint)(i+1);
-      (out+j+4)[1] = (uint)(i+3);
-      (out+j+6)[0] = (uint)(i+3);
-      (out+j+6)[1] = (uint)(i+2);
-   }
-}
-static void generate_polygon_uint(
-    unsigned nr,
-    void *_out )
-{
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)(0);
-      (out+j)[1] = (uint)(i+1);
-      (out+j+2)[0] = (uint)(i+1);
-      (out+j+2)[1] = (uint)(i+2);
-      (out+j+4)[0] = (uint)(i+2);
-      (out+j+4)[1] = (uint)(0);
-   }
-}
-static void translate_tris_ubyte2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (ushort)in[i];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[i];
-   }
-}
-static void translate_tristrip_ubyte2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[i];
-      (out+j)[1] = (ushort)in[i+1/*+(i&1)*/];
-      (out+j+2)[0] = (ushort)in[i+1/*+(i&1)*/];
-      (out+j+2)[1] = (ushort)in[i+2/*-(i&1)*/];
-      (out+j+4)[0] = (ushort)in[i+2/*-(i&1)*/];
-      (out+j+4)[1] = (ushort)in[i];
-   }
-}
-static void translate_trifan_ubyte2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[0];
-   }
-}
-static void translate_quads_ubyte2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (ushort)in[i+0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[i+3];
-      (out+j+6)[0] = (ushort)in[i+3];
-      (out+j+6)[1] = (ushort)in[i+0];
-   }
-}
-static void translate_quadstrip_ubyte2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (ushort)in[i+2];
-      (out+j)[1] = (ushort)in[i+0];
-      (out+j+2)[0] = (ushort)in[i+0];
-      (out+j+2)[1] = (ushort)in[i+1];
-      (out+j+4)[0] = (ushort)in[i+1];
-      (out+j+4)[1] = (ushort)in[i+3];
-      (out+j+6)[0] = (ushort)in[i+3];
-      (out+j+6)[1] = (ushort)in[i+2];
-   }
-}
-static void translate_polygon_ubyte2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[0];
-   }
-}
-static void translate_tris_ubyte2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (uint)in[i];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[i];
-   }
-}
-static void translate_tristrip_ubyte2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[i];
-      (out+j)[1] = (uint)in[i+1/*+(i&1)*/];
-      (out+j+2)[0] = (uint)in[i+1/*+(i&1)*/];
-      (out+j+2)[1] = (uint)in[i+2/*-(i&1)*/];
-      (out+j+4)[0] = (uint)in[i+2/*-(i&1)*/];
-      (out+j+4)[1] = (uint)in[i];
-   }
-}
-static void translate_trifan_ubyte2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[0];
-   }
-}
-static void translate_quads_ubyte2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (uint)in[i+0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[i+3];
-      (out+j+6)[0] = (uint)in[i+3];
-      (out+j+6)[1] = (uint)in[i+0];
-   }
-}
-static void translate_quadstrip_ubyte2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (uint)in[i+2];
-      (out+j)[1] = (uint)in[i+0];
-      (out+j+2)[0] = (uint)in[i+0];
-      (out+j+2)[1] = (uint)in[i+1];
-      (out+j+4)[0] = (uint)in[i+1];
-      (out+j+4)[1] = (uint)in[i+3];
-      (out+j+6)[0] = (uint)in[i+3];
-      (out+j+6)[1] = (uint)in[i+2];
-   }
-}
-static void translate_polygon_ubyte2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ubyte*in = (const ubyte*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[0];
-   }
-}
-static void translate_tris_ushort2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (ushort)in[i];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[i];
-   }
-}
-static void translate_tristrip_ushort2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[i];
-      (out+j)[1] = (ushort)in[i+1/*+(i&1)*/];
-      (out+j+2)[0] = (ushort)in[i+1/*+(i&1)*/];
-      (out+j+2)[1] = (ushort)in[i+2/*-(i&1)*/];
-      (out+j+4)[0] = (ushort)in[i+2/*-(i&1)*/];
-      (out+j+4)[1] = (ushort)in[i];
-   }
-}
-static void translate_trifan_ushort2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[0];
-   }
-}
-static void translate_quads_ushort2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (ushort)in[i+0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[i+3];
-      (out+j+6)[0] = (ushort)in[i+3];
-      (out+j+6)[1] = (ushort)in[i+0];
-   }
-}
-static void translate_quadstrip_ushort2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (ushort)in[i+2];
-      (out+j)[1] = (ushort)in[i+0];
-      (out+j+2)[0] = (ushort)in[i+0];
-      (out+j+2)[1] = (ushort)in[i+1];
-      (out+j+4)[0] = (ushort)in[i+1];
-      (out+j+4)[1] = (ushort)in[i+3];
-      (out+j+6)[0] = (ushort)in[i+3];
-      (out+j+6)[1] = (ushort)in[i+2];
-   }
-}
-static void translate_polygon_ushort2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[0];
-   }
-}
-static void translate_tris_ushort2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (uint)in[i];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[i];
-   }
-}
-static void translate_tristrip_ushort2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[i];
-      (out+j)[1] = (uint)in[i+1/*+(i&1)*/];
-      (out+j+2)[0] = (uint)in[i+1/*+(i&1)*/];
-      (out+j+2)[1] = (uint)in[i+2/*-(i&1)*/];
-      (out+j+4)[0] = (uint)in[i+2/*-(i&1)*/];
-      (out+j+4)[1] = (uint)in[i];
-   }
-}
-static void translate_trifan_ushort2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[0];
-   }
-}
-static void translate_quads_ushort2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (uint)in[i+0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[i+3];
-      (out+j+6)[0] = (uint)in[i+3];
-      (out+j+6)[1] = (uint)in[i+0];
-   }
-}
-static void translate_quadstrip_ushort2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (uint)in[i+2];
-      (out+j)[1] = (uint)in[i+0];
-      (out+j+2)[0] = (uint)in[i+0];
-      (out+j+2)[1] = (uint)in[i+1];
-      (out+j+4)[0] = (uint)in[i+1];
-      (out+j+4)[1] = (uint)in[i+3];
-      (out+j+6)[0] = (uint)in[i+3];
-      (out+j+6)[1] = (uint)in[i+2];
-   }
-}
-static void translate_polygon_ushort2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const ushort*in = (const ushort*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[0];
-   }
-}
-static void translate_tris_uint2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (ushort)in[i];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[i];
-   }
-}
-static void translate_tristrip_uint2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[i];
-      (out+j)[1] = (ushort)in[i+1/*+(i&1)*/];
-      (out+j+2)[0] = (ushort)in[i+1/*+(i&1)*/];
-      (out+j+2)[1] = (ushort)in[i+2/*-(i&1)*/];
-      (out+j+4)[0] = (ushort)in[i+2/*-(i&1)*/];
-      (out+j+4)[1] = (ushort)in[i];
-   }
-}
-static void translate_trifan_uint2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[0];
-   }
-}
-static void translate_quads_uint2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (ushort)in[i+0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[i+3];
-      (out+j+6)[0] = (ushort)in[i+3];
-      (out+j+6)[1] = (ushort)in[i+0];
-   }
-}
-static void translate_quadstrip_uint2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (ushort)in[i+2];
-      (out+j)[1] = (ushort)in[i+0];
-      (out+j+2)[0] = (ushort)in[i+0];
-      (out+j+2)[1] = (ushort)in[i+1];
-      (out+j+4)[0] = (ushort)in[i+1];
-      (out+j+4)[1] = (ushort)in[i+3];
-      (out+j+6)[0] = (ushort)in[i+3];
-      (out+j+6)[1] = (ushort)in[i+2];
-   }
-}
-static void translate_polygon_uint2ushort(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  ushort *out = (ushort*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (ushort)in[0];
-      (out+j)[1] = (ushort)in[i+1];
-      (out+j+2)[0] = (ushort)in[i+1];
-      (out+j+2)[1] = (ushort)in[i+2];
-      (out+j+4)[0] = (ushort)in[i+2];
-      (out+j+4)[1] = (ushort)in[0];
-   }
-}
-static void translate_tris_uint2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i+=3) { 
-      (out+j)[0] = (uint)in[i];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[i];
-   }
-}
-static void translate_tristrip_uint2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[i];
-      (out+j)[1] = (uint)in[i+1/*+(i&1)*/];
-      (out+j+2)[0] = (uint)in[i+1/*+(i&1)*/];
-      (out+j+2)[1] = (uint)in[i+2/*-(i&1)*/];
-      (out+j+4)[0] = (uint)in[i+2/*-(i&1)*/];
-      (out+j+4)[1] = (uint)in[i];
-   }
-}
-static void translate_trifan_uint2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[0];
-   }
-}
-static void translate_quads_uint2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=4) { 
-      (out+j)[0] = (uint)in[i+0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[i+3];
-      (out+j+6)[0] = (uint)in[i+3];
-      (out+j+6)[1] = (uint)in[i+0];
-   }
-}
-static void translate_quadstrip_uint2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=8, i+=2) { 
-      (out+j)[0] = (uint)in[i+2];
-      (out+j)[1] = (uint)in[i+0];
-      (out+j+2)[0] = (uint)in[i+0];
-      (out+j+2)[1] = (uint)in[i+1];
-      (out+j+4)[0] = (uint)in[i+1];
-      (out+j+4)[1] = (uint)in[i+3];
-      (out+j+6)[0] = (uint)in[i+3];
-      (out+j+6)[1] = (uint)in[i+2];
-   }
-}
-static void translate_polygon_uint2uint(
-    const void * _in,
-    unsigned nr,
-    void *_out )
-{
-  const uint*in = (const uint*)_in;
-  uint *out = (uint*)_out;
-  unsigned i, j;
-  (void)j;
-  for (j = i = 0; j < nr; j+=6, i++) { 
-      (out+j)[0] = (uint)in[0];
-      (out+j)[1] = (uint)in[i+1];
-      (out+j+2)[0] = (uint)in[i+1];
-      (out+j+2)[1] = (uint)in[i+2];
-      (out+j+4)[0] = (uint)in[i+2];
-      (out+j+4)[1] = (uint)in[0];
-   }
-}
-void u_unfilled_init( void )
-{
-  static int firsttime = 1;
-  if (!firsttime) return;
-  firsttime = 0;
-generate_line[OUT_USHORT][PIPE_PRIM_TRIANGLES] = generate_tris_ushort;
-generate_line[OUT_USHORT][PIPE_PRIM_TRIANGLE_FAN] = generate_trifan_ushort;
-generate_line[OUT_USHORT][PIPE_PRIM_TRIANGLE_STRIP] = generate_tristrip_ushort;
-generate_line[OUT_USHORT][PIPE_PRIM_QUADS] = generate_quads_ushort;
-generate_line[OUT_USHORT][PIPE_PRIM_QUAD_STRIP] = generate_quadstrip_ushort;
-generate_line[OUT_USHORT][PIPE_PRIM_POLYGON] = generate_polygon_ushort;
-generate_line[OUT_UINT][PIPE_PRIM_TRIANGLES] = generate_tris_uint;
-generate_line[OUT_UINT][PIPE_PRIM_TRIANGLE_FAN] = generate_trifan_uint;
-generate_line[OUT_UINT][PIPE_PRIM_TRIANGLE_STRIP] = generate_tristrip_uint;
-generate_line[OUT_UINT][PIPE_PRIM_QUADS] = generate_quads_uint;
-generate_line[OUT_UINT][PIPE_PRIM_QUAD_STRIP] = generate_quadstrip_uint;
-generate_line[OUT_UINT][PIPE_PRIM_POLYGON] = generate_polygon_uint;
-translate_line[IN_UBYTE][OUT_USHORT][PIPE_PRIM_TRIANGLES] = translate_tris_ubyte2ushort;
-translate_line[IN_UBYTE][OUT_USHORT][PIPE_PRIM_TRIANGLE_FAN] = translate_trifan_ubyte2ushort;
-translate_line[IN_UBYTE][OUT_USHORT][PIPE_PRIM_TRIANGLE_STRIP] = translate_tristrip_ubyte2ushort;
-translate_line[IN_UBYTE][OUT_USHORT][PIPE_PRIM_QUADS] = translate_quads_ubyte2ushort;
-translate_line[IN_UBYTE][OUT_USHORT][PIPE_PRIM_QUAD_STRIP] = translate_quadstrip_ubyte2ushort;
-translate_line[IN_UBYTE][OUT_USHORT][PIPE_PRIM_POLYGON] = translate_polygon_ubyte2ushort;
-translate_line[IN_UBYTE][OUT_UINT][PIPE_PRIM_TRIANGLES] = translate_tris_ubyte2uint;
-translate_line[IN_UBYTE][OUT_UINT][PIPE_PRIM_TRIANGLE_FAN] = translate_trifan_ubyte2uint;
-translate_line[IN_UBYTE][OUT_UINT][PIPE_PRIM_TRIANGLE_STRIP] = translate_tristrip_ubyte2uint;
-translate_line[IN_UBYTE][OUT_UINT][PIPE_PRIM_QUADS] = translate_quads_ubyte2uint;
-translate_line[IN_UBYTE][OUT_UINT][PIPE_PRIM_QUAD_STRIP] = translate_quadstrip_ubyte2uint;
-translate_line[IN_UBYTE][OUT_UINT][PIPE_PRIM_POLYGON] = translate_polygon_ubyte2uint;
-translate_line[IN_USHORT][OUT_USHORT][PIPE_PRIM_TRIANGLES] = translate_tris_ushort2ushort;
-translate_line[IN_USHORT][OUT_USHORT][PIPE_PRIM_TRIANGLE_FAN] = translate_trifan_ushort2ushort;
-translate_line[IN_USHORT][OUT_USHORT][PIPE_PRIM_TRIANGLE_STRIP] = translate_tristrip_ushort2ushort;
-translate_line[IN_USHORT][OUT_USHORT][PIPE_PRIM_QUADS] = translate_quads_ushort2ushort;
-translate_line[IN_USHORT][OUT_USHORT][PIPE_PRIM_QUAD_STRIP] = translate_quadstrip_ushort2ushort;
-translate_line[IN_USHORT][OUT_USHORT][PIPE_PRIM_POLYGON] = translate_polygon_ushort2ushort;
-translate_line[IN_USHORT][OUT_UINT][PIPE_PRIM_TRIANGLES] = translate_tris_ushort2uint;
-translate_line[IN_USHORT][OUT_UINT][PIPE_PRIM_TRIANGLE_FAN] = translate_trifan_ushort2uint;
-translate_line[IN_USHORT][OUT_UINT][PIPE_PRIM_TRIANGLE_STRIP] = translate_tristrip_ushort2uint;
-translate_line[IN_USHORT][OUT_UINT][PIPE_PRIM_QUADS] = translate_quads_ushort2uint;
-translate_line[IN_USHORT][OUT_UINT][PIPE_PRIM_QUAD_STRIP] = translate_quadstrip_ushort2uint;
-translate_line[IN_USHORT][OUT_UINT][PIPE_PRIM_POLYGON] = translate_polygon_ushort2uint;
-translate_line[IN_UINT][OUT_USHORT][PIPE_PRIM_TRIANGLES] = translate_tris_uint2ushort;
-translate_line[IN_UINT][OUT_USHORT][PIPE_PRIM_TRIANGLE_FAN] = translate_trifan_uint2ushort;
-translate_line[IN_UINT][OUT_USHORT][PIPE_PRIM_TRIANGLE_STRIP] = translate_tristrip_uint2ushort;
-translate_line[IN_UINT][OUT_USHORT][PIPE_PRIM_QUADS] = translate_quads_uint2ushort;
-translate_line[IN_UINT][OUT_USHORT][PIPE_PRIM_QUAD_STRIP] = translate_quadstrip_uint2ushort;
-translate_line[IN_UINT][OUT_USHORT][PIPE_PRIM_POLYGON] = translate_polygon_uint2ushort;
-translate_line[IN_UINT][OUT_UINT][PIPE_PRIM_TRIANGLES] = translate_tris_uint2uint;
-translate_line[IN_UINT][OUT_UINT][PIPE_PRIM_TRIANGLE_FAN] = translate_trifan_uint2uint;
-translate_line[IN_UINT][OUT_UINT][PIPE_PRIM_TRIANGLE_STRIP] = translate_tristrip_uint2uint;
-translate_line[IN_UINT][OUT_UINT][PIPE_PRIM_QUADS] = translate_quads_uint2uint;
-translate_line[IN_UINT][OUT_UINT][PIPE_PRIM_QUAD_STRIP] = translate_quadstrip_uint2uint;
-translate_line[IN_UINT][OUT_UINT][PIPE_PRIM_POLYGON] = translate_polygon_uint2uint;
-}
-#include "indices/u_unfilled_indices.c"

src/gallium/auxiliary/rtasm/rtasm_x86sse.c

@@ -1757,6 +1757,8 @@ void (*x86_get_func( struct x86_function *p ))(void)
 
 #else
 
+void x86sse_dummy( void );
+
 void x86sse_dummy( void )
 {
 }

src/gallium/drivers/cell/ppu/cell_context.c

@@ -74,7 +74,7 @@ cell_destroy_context( struct pipe_context *pipe )
 static struct draw_context *
 cell_draw_create(struct cell_context *cell)
 {
-   struct draw_context *draw = draw_create();
+   struct draw_context *draw = draw_create(&cell->pipe);
 
 #if 0 /* broken */
    if (getenv("GALLIUM_CELL_VS")) {

src/gallium/drivers/cell/ppu/cell_fence.c

@@ -92,7 +92,6 @@ cell_add_buffer_to_list(struct cell_context *cell,
                         struct cell_buffer_list *list,
                         struct pipe_buffer *buffer)
 {
-   struct pipe_screen *ps = cell->pipe.screen;
    struct cell_buffer_node *node = CALLOC_STRUCT(cell_buffer_node);
    /* create new list node which references the buffer, insert at head */
    if (node) {

src/gallium/drivers/cell/ppu/cell_pipe_state.c

@@ -197,7 +197,7 @@ cell_bind_rasterizer_state(struct pipe_context *pipe, void *rast)
    struct cell_context *cell = cell_context(pipe);
 
    /* pass-through to draw module */
-   draw_set_rasterizer_state(cell->draw, rasterizer);
+   draw_set_rasterizer_state(cell->draw, rasterizer, rast);
 
    cell->rasterizer = rasterizer;
 

src/glx/glxcmds.c

@@ -887,9 +887,6 @@ glXCopyContext(Display * dpy, GLXContext source,
 static Bool
 __glXIsDirect(Display * dpy, GLXContextID contextID)
 {
-#ifdef GLX_USE_APPLEGL /* TODO: apple indirect */
-   return GC_IS_DIRECT(gc);
-#else
 #if !defined(USE_XCB)
    xGLXIsDirectReq *req;
    xGLXIsDirectReply reply;
@@ -925,7 +922,6 @@ __glXIsDirect(Display * dpy, GLXContextID contextID)
 
    return reply.isDirect;
 #endif /* USE_XCB */
-#endif /* GLX_USE_APPLEGL */
 }
 
 /**
@@ -943,7 +939,11 @@ glXIsDirect(Display * dpy, GLXContext gc)
    else if (GC_IS_DIRECT(gc)) {
       return GL_TRUE;
    }
+#ifdef GLX_USE_APPLEGL  /* TODO: indirect on darwin */
+      return GL_FALSE;
+#else
    return __glXIsDirect(dpy, gc->xid);
+#endif
 }
 
 PUBLIC GLXPixmap
@@ -1766,6 +1766,15 @@ static int __glXQueryContextInfo(Display * dpy, GLXContext ctx)
 	 unsigned i;
 
          _XRead(dpy, (char *) propList, nPropListBytes);
+
+	 /* Look up screen first so we can look up visuals/fbconfigs later */
+         pProp = propList;
+         for (i = 0; i < numValues; i++, pProp += 2)
+	     if (pProp[0] == GLX_SCREEN) {
+		 ctx->screen = pProp[1];
+		 ctx->psc = GetGLXScreenConfigs(dpy, ctx->screen);
+	     }
+
          pProp = propList;
          for (i = 0; i < numValues; i++) {
             switch (*pProp++) {
@@ -1776,9 +1785,6 @@ static int __glXQueryContextInfo(Display * dpy, GLXContext ctx)
                ctx->mode =
                   _gl_context_modes_find_visual(ctx->psc->visuals, *pProp++);
                break;
-            case GLX_SCREEN:
-               ctx->screen = *pProp++;
-               break;
             case GLX_FBCONFIG_ID:
                ctx->mode =
                   _gl_context_modes_find_fbconfig(ctx->psc->configs,
@@ -1787,6 +1793,7 @@ static int __glXQueryContextInfo(Display * dpy, GLXContext ctx)
             case GLX_RENDER_TYPE:
                ctx->renderType = *pProp++;
                break;
+            case GLX_SCREEN:
             default:
                pProp++;
                continue;

src/glx/glxext.c

@@ -584,6 +584,10 @@ __glXInitializeVisualConfigFromTags(__GLcontextModes * config, int count,
          config->yInverted = *bp++;
          break;
 #endif
+      case GLX_USE_GL:
+         if (fbconfig_style_tags)
+            bp++;
+         break;
       case None:
          i = count;
          break;

src/mesa/drivers/common/meta.c

@@ -812,6 +812,21 @@ _mesa_meta_end(GLcontext *ctx)
 }
 
 
+/**
+ * Convert Z from a normalized value in the range [0, 1] to an object-space
+ * Z coordinate in [-1, +1] so that drawing at the new Z position with the
+ * default/identity ortho projection results in the original Z value.
+ * Used by the meta-Clear, Draw/CopyPixels and Bitmap functions where the Z
+ * value comes from the clear value or raster position.
+ */
+static INLINE GLfloat
+invert_z(GLfloat normZ)
+{
+   GLfloat objZ = 1.0 - 2.0 * normZ;
+   return objZ;
+}
+
+
 /**
  * One-time init for a temp_texture object.
  * Choose tex target, compute max tex size, etc.
@@ -1433,7 +1448,7 @@ _mesa_meta_Clear(GLcontext *ctx, GLbitfield buffers)
       const GLfloat y0 = (GLfloat) ctx->DrawBuffer->_Ymin;
       const GLfloat x1 = (GLfloat) ctx->DrawBuffer->_Xmax;
       const GLfloat y1 = (GLfloat) ctx->DrawBuffer->_Ymax;
-      const GLfloat z = 1.0 - 2.0 * ctx->Depth.Clear;
+      const GLfloat z = invert_z(ctx->Depth.Clear);
       GLuint i;
 
       verts[0].x = x0;
@@ -1539,7 +1554,7 @@ _mesa_meta_CopyPixels(GLcontext *ctx, GLint srcX, GLint srcY,
       const GLfloat dstY0 = (GLfloat) dstY;
       const GLfloat dstX1 = dstX + width * ctx->Pixel.ZoomX;
       const GLfloat dstY1 = dstY + height * ctx->Pixel.ZoomY;
-      const GLfloat z = ctx->Current.RasterPos[2];
+      const GLfloat z = invert_z(ctx->Current.RasterPos[2]);
 
       verts[0].x = dstX0;
       verts[0].y = dstY0;
@@ -1828,7 +1843,7 @@ _mesa_meta_DrawPixels(GLcontext *ctx,
       const GLfloat y0 = (GLfloat) y;
       const GLfloat x1 = x + width * ctx->Pixel.ZoomX;
       const GLfloat y1 = y + height * ctx->Pixel.ZoomY;
-      const GLfloat z = ctx->Current.RasterPos[2];
+      const GLfloat z = invert_z(ctx->Current.RasterPos[2]);
 
       verts[0].x = x0;
       verts[0].y = y0;
@@ -2031,7 +2046,7 @@ _mesa_meta_Bitmap(GLcontext *ctx,
       const GLfloat y0 = (GLfloat) y;
       const GLfloat x1 = (GLfloat) (x + width);
       const GLfloat y1 = (GLfloat) (y + height);
-      const GLfloat z = ctx->Current.RasterPos[2];
+      const GLfloat z = invert_z(ctx->Current.RasterPos[2]);
       GLuint i;
 
       verts[0].x = x0;

src/mesa/drivers/dri/i915/i915_tex_layout.c

@@ -484,7 +484,7 @@ i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
    case GL_TEXTURE_1D:
    case GL_TEXTURE_2D:
    case GL_TEXTURE_RECTANGLE_ARB:
-      i945_miptree_layout_2d(intel, mt, tiling);
+      i945_miptree_layout_2d(intel, mt, tiling, 1);
       break;
    default:
       _mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");

src/mesa/drivers/dri/i915/i915_texstate.c

@@ -281,6 +281,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
       GLenum ws = tObj->WrapS;
       GLenum wt = tObj->WrapT;
       GLenum wr = tObj->WrapR;
+      float minlod;
 
       /* We program 1D textures as 2D textures, so the 2D texcoord could
        * result in sampling border values if we don't set the T wrap to
@@ -321,8 +322,9 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
           (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
           (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
 
+      minlod = MIN2(tObj->MinLod, tObj->_MaxLevel - tObj->BaseLevel);
       state[I915_TEXREG_SS3] |= (unit << SS3_TEXTUREMAP_INDEX_SHIFT);
-      state[I915_TEXREG_SS3] |= (U_FIXED(CLAMP(tObj->MinLod, 0.0, 11.0), 4) <<
+      state[I915_TEXREG_SS3] |= (U_FIXED(CLAMP(minlod, 0.0, 11.0), 4) <<
 				 SS3_MIN_LOD_SHIFT);
 
    }

src/mesa/drivers/dri/i915/i915_vtbl.c

@@ -627,8 +627,8 @@ i915_set_draw_region(struct intel_context *intel,
    state->Buffer[I915_DESTREG_DRAWRECT2] = 0;
    state->Buffer[I915_DESTREG_DRAWRECT3] = (draw_y << 16) | draw_x;
    state->Buffer[I915_DESTREG_DRAWRECT4] =
-      ((ctx->DrawBuffer->Width + draw_x) & 0xffff) |
-      ((ctx->DrawBuffer->Height + draw_y) << 16);
+      ((ctx->DrawBuffer->Width + draw_x - 1) & 0xffff) |
+      ((ctx->DrawBuffer->Height + draw_y - 1) << 16);
    state->Buffer[I915_DESTREG_DRAWRECT5] = (draw_y << 16) | draw_x;
 
    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);

src/mesa/drivers/dri/i965/brw_clip.c

@@ -72,7 +72,7 @@ static void compile_clip_prog( struct brw_context *brw,
     */
    c.header_position_offset = ATTR_SIZE;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        delta = 3 * REG_SIZE;
    else
        delta = REG_SIZE;
@@ -85,7 +85,7 @@ static void compile_clip_prog( struct brw_context *brw,
 
    c.nr_attrs = brw_count_bits(c.key.attrs);
    
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        c.nr_regs = (c.nr_attrs + 1) / 2 + 3;  /* are vertices packed, or reg-aligned? */
    else
        c.nr_regs = (c.nr_attrs + 1) / 2 + 1;  /* are vertices packed, or reg-aligned? */
@@ -162,7 +162,7 @@ static void upload_clip_prog(struct brw_context *brw)
    /* _NEW_TRANSFORM */
    key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled);
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        key.clip_mode = BRW_CLIPMODE_KERNEL_CLIP;
    else
        key.clip_mode = BRW_CLIPMODE_NORMAL;

src/mesa/drivers/dri/i965/brw_clip_state.c

@@ -102,10 +102,10 @@ clip_unit_create_from_key(struct brw_context *brw,
        */
       assert(key->nr_urb_entries % 2 == 0);
       
-      /* Although up to 16 concurrent Clip threads are allowed on IGDNG, 
+      /* Although up to 16 concurrent Clip threads are allowed on Ironlake,
        * only 2 threads can output VUEs at a time.
        */
-      if (intel->is_ironlake)
+      if (intel->gen == 5)
          clip.thread4.max_threads = 16 - 1;        
       else
          clip.thread4.max_threads = 2 - 1;

src/mesa/drivers/dri/i965/brw_clip_tri.c

@@ -78,7 +78,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
       for (j = 0; j < 3; j++) {
 	 GLuint delta = c->nr_attrs*16 + 32;
 
-         if (intel->is_ironlake)
+         if (intel->gen == 5)
              delta = c->nr_attrs * 16 + 32 * 3;
 
 	 brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0));
@@ -177,7 +177,7 @@ void brw_clip_tri_init_vertices( struct brw_clip_compile *c )
 void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
-   struct brw_instruction *is_poly;
+   struct brw_instruction *is_poly, *is_trifan;
    struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
 
    brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK)); 
@@ -195,8 +195,22 @@ void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
    is_poly = brw_ELSE(p, is_poly);
    {
       if (c->key.pv_first) {
-         brw_clip_copy_colors(c, 1, 0);
-         brw_clip_copy_colors(c, 2, 0);
+	 brw_CMP(p,
+		 vec1(brw_null_reg()),
+		 BRW_CONDITIONAL_EQ,
+		 tmp0,
+		 brw_imm_ud(_3DPRIM_TRIFAN));
+	 is_trifan = brw_IF(p, BRW_EXECUTE_1);
+	 {
+	    brw_clip_copy_colors(c, 0, 1);
+	    brw_clip_copy_colors(c, 2, 1);
+	 }
+	 is_trifan = brw_ELSE(p, is_trifan);
+	 {
+	    brw_clip_copy_colors(c, 1, 0);
+	    brw_clip_copy_colors(c, 2, 0);
+	 }
+	 brw_ENDIF(p, is_trifan);
       }
       else {
          brw_clip_copy_colors(c, 0, 2);

src/mesa/drivers/dri/i965/brw_clip_util.c

@@ -151,7 +151,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
    for (i = 0; i < c->nr_attrs; i++) {
       GLuint delta = i*16 + 32;
 
-      if (intel->is_ironlake)
+      if (intel->gen == 5)
           delta = i * 16 + 32 * 3;
 
       if (delta == c->offset[VERT_RESULT_EDGE]) {
@@ -185,7 +185,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
    if (i & 1) {
       GLuint delta = i*16 + 32;
 
-      if (intel->is_ironlake)
+      if (intel->gen == 5)
           delta = i * 16 + 32 * 3;
 
       brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0));

src/mesa/drivers/dri/i965/brw_context.c

@@ -150,7 +150,7 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 	   ctx->Const.FragmentProgram.MaxEnvParams);
 
-   if (intel->is_ironlake || intel->is_g4x || intel->gen >= 6) {
+   if (intel->is_g4x || intel->gen >= 5) {
       brw->CMD_VF_STATISTICS = CMD_VF_STATISTICS_GM45;
       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
       brw->has_surface_tile_offset = GL_TRUE;
@@ -162,7 +162,7 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
    }
 
    /* WM maximum threads is number of EUs times number of threads per EU. */
-   if (intel->is_ironlake) {
+   if (intel->gen == 5) {
       brw->urb.size = 1024;
       brw->vs_max_threads = 72;
       brw->wm_max_threads = 12 * 6;

src/mesa/drivers/dri/i965/brw_defines.h

@@ -674,12 +674,12 @@
 #define BRW_SAMPLER_MESSAGE_SIMD8_LD                  3
 #define BRW_SAMPLER_MESSAGE_SIMD16_LD                 3
 
-#define BRW_SAMPLER_MESSAGE_SAMPLE_IGDNG            0
-#define BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_IGDNG       1
-#define BRW_SAMPLER_MESSAGE_SAMPLE_LOD_IGDNG        2
-#define BRW_SAMPLER_MESSAGE_SAMPLE_COMPARE_IGDNG    3
+#define BRW_SAMPLER_MESSAGE_SAMPLE_GEN5            0
+#define BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_GEN5       1
+#define BRW_SAMPLER_MESSAGE_SAMPLE_LOD_GEN5        2
+#define BRW_SAMPLER_MESSAGE_SAMPLE_COMPARE_GEN5    3
 
-/* for IGDNG only */
+/* for GEN5 only */
 #define BRW_SAMPLER_SIMD_MODE_SIMD4X2                   0
 #define BRW_SAMPLER_SIMD_MODE_SIMD8                     1
 #define BRW_SAMPLER_SIMD_MODE_SIMD16                    2

src/mesa/drivers/dri/i965/brw_draw_upload.c

@@ -59,7 +59,7 @@ static GLuint half_float_types[5] = {
    0,
    BRW_SURFACEFORMAT_R16_FLOAT,
    BRW_SURFACEFORMAT_R16G16_FLOAT,
-   0, /* can't seem to render this one */
+   BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
    BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
 };
 
@@ -522,7 +522,7 @@ static void brw_emit_vertices(struct brw_context *brw)
       OUT_RELOC(input->bo,
 		I915_GEM_DOMAIN_VERTEX, 0,
 		input->offset);
-      if (intel->is_ironlake || intel->gen >= 6) {
+      if (intel->gen >= 5) {
 	 OUT_RELOC(input->bo,
 		   I915_GEM_DOMAIN_VERTEX, 0,
 		   input->bo->size - 1);
@@ -565,7 +565,7 @@ static void brw_emit_vertices(struct brw_context *brw)
 		   (0 << BRW_VE0_SRC_OFFSET_SHIFT));
       }
 
-      if (intel->is_ironlake || intel->gen >= 6)
+      if (intel->gen >= 5)
           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |

src/mesa/drivers/dri/i965/brw_eu_emit.c

@@ -253,19 +253,19 @@ static void brw_set_math_message( struct brw_context *brw,
    struct intel_context *intel = &brw->intel;
    brw_set_src1(insn, brw_imm_d(0));
 
-   if (intel->is_ironlake) {
-       insn->bits3.math_igdng.function = function;
-       insn->bits3.math_igdng.int_type = integer_type;
-       insn->bits3.math_igdng.precision = low_precision;
-       insn->bits3.math_igdng.saturate = saturate;
-       insn->bits3.math_igdng.data_type = dataType;
-       insn->bits3.math_igdng.snapshot = 0;
-       insn->bits3.math_igdng.header_present = 0;
-       insn->bits3.math_igdng.response_length = response_length;
-       insn->bits3.math_igdng.msg_length = msg_length;
-       insn->bits3.math_igdng.end_of_thread = 0;
-       insn->bits2.send_igdng.sfid = BRW_MESSAGE_TARGET_MATH;
-       insn->bits2.send_igdng.end_of_thread = 0;
+   if (intel->gen == 5) {
+       insn->bits3.math_gen5.function = function;
+       insn->bits3.math_gen5.int_type = integer_type;
+       insn->bits3.math_gen5.precision = low_precision;
+       insn->bits3.math_gen5.saturate = saturate;
+       insn->bits3.math_gen5.data_type = dataType;
+       insn->bits3.math_gen5.snapshot = 0;
+       insn->bits3.math_gen5.header_present = 0;
+       insn->bits3.math_gen5.response_length = response_length;
+       insn->bits3.math_gen5.msg_length = msg_length;
+       insn->bits3.math_gen5.end_of_thread = 0;
+       insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_MATH;
+       insn->bits2.send_gen5.end_of_thread = 0;
    } else {
        insn->bits3.math.function = function;
        insn->bits3.math.int_type = integer_type;
@@ -293,18 +293,18 @@ static void brw_set_ff_sync_message( struct brw_context *brw,
 {
 	brw_set_src1(insn, brw_imm_d(0));
 
-	insn->bits3.urb_igdng.opcode = 1;
-	insn->bits3.urb_igdng.offset = offset;
-	insn->bits3.urb_igdng.swizzle_control = swizzle_control;
-	insn->bits3.urb_igdng.allocate = allocate;
-	insn->bits3.urb_igdng.used = used;
-	insn->bits3.urb_igdng.complete = complete;
-	insn->bits3.urb_igdng.header_present = 1;
-	insn->bits3.urb_igdng.response_length = response_length;
-	insn->bits3.urb_igdng.msg_length = msg_length;
-	insn->bits3.urb_igdng.end_of_thread = end_of_thread;
-	insn->bits2.send_igdng.sfid = BRW_MESSAGE_TARGET_URB;
-	insn->bits2.send_igdng.end_of_thread = end_of_thread;
+	insn->bits3.urb_gen5.opcode = 1;
+	insn->bits3.urb_gen5.offset = offset;
+	insn->bits3.urb_gen5.swizzle_control = swizzle_control;
+	insn->bits3.urb_gen5.allocate = allocate;
+	insn->bits3.urb_gen5.used = used;
+	insn->bits3.urb_gen5.complete = complete;
+	insn->bits3.urb_gen5.header_present = 1;
+	insn->bits3.urb_gen5.response_length = response_length;
+	insn->bits3.urb_gen5.msg_length = msg_length;
+	insn->bits3.urb_gen5.end_of_thread = end_of_thread;
+	insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB;
+	insn->bits2.send_gen5.end_of_thread = end_of_thread;
 }
 
 static void brw_set_urb_message( struct brw_context *brw,
@@ -321,17 +321,17 @@ static void brw_set_urb_message( struct brw_context *brw,
     struct intel_context *intel = &brw->intel;
     brw_set_src1(insn, brw_imm_d(0));
 
-    if (intel->is_ironlake || intel->gen >= 6) {
-        insn->bits3.urb_igdng.opcode = 0;	/* ? */
-        insn->bits3.urb_igdng.offset = offset;
-        insn->bits3.urb_igdng.swizzle_control = swizzle_control;
-        insn->bits3.urb_igdng.allocate = allocate;
-        insn->bits3.urb_igdng.used = used;	/* ? */
-        insn->bits3.urb_igdng.complete = complete;
-        insn->bits3.urb_igdng.header_present = 1;
-        insn->bits3.urb_igdng.response_length = response_length;
-        insn->bits3.urb_igdng.msg_length = msg_length;
-        insn->bits3.urb_igdng.end_of_thread = end_of_thread;
+    if (intel->gen >= 5) {
+        insn->bits3.urb_gen5.opcode = 0;	/* ? */
+        insn->bits3.urb_gen5.offset = offset;
+        insn->bits3.urb_gen5.swizzle_control = swizzle_control;
+        insn->bits3.urb_gen5.allocate = allocate;
+        insn->bits3.urb_gen5.used = used;	/* ? */
+        insn->bits3.urb_gen5.complete = complete;
+        insn->bits3.urb_gen5.header_present = 1;
+        insn->bits3.urb_gen5.response_length = response_length;
+        insn->bits3.urb_gen5.msg_length = msg_length;
+        insn->bits3.urb_gen5.end_of_thread = end_of_thread;
 	if (intel->gen >= 6) {
 	   /* For SNB, the SFID bits moved to the condmod bits, and
 	    * EOT stayed in bits3 above.  Does the EOT bit setting
@@ -339,8 +339,8 @@ static void brw_set_urb_message( struct brw_context *brw,
 	    */
 	   insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_URB;
 	} else {
-	   insn->bits2.send_igdng.sfid = BRW_MESSAGE_TARGET_URB;
-	   insn->bits2.send_igdng.end_of_thread = end_of_thread;
+	   insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB;
+	   insn->bits2.send_gen5.end_of_thread = end_of_thread;
 	}
     } else {
         insn->bits3.urb.opcode = 0;	/* ? */
@@ -369,18 +369,18 @@ static void brw_set_dp_write_message( struct brw_context *brw,
    struct intel_context *intel = &brw->intel;
    brw_set_src1(insn, brw_imm_d(0));
 
-   if (intel->is_ironlake) {
-       insn->bits3.dp_write_igdng.binding_table_index = binding_table_index;
-       insn->bits3.dp_write_igdng.msg_control = msg_control;
-       insn->bits3.dp_write_igdng.pixel_scoreboard_clear = pixel_scoreboard_clear;
-       insn->bits3.dp_write_igdng.msg_type = msg_type;
-       insn->bits3.dp_write_igdng.send_commit_msg = 0;
-       insn->bits3.dp_write_igdng.header_present = 1;
-       insn->bits3.dp_write_igdng.response_length = response_length;
-       insn->bits3.dp_write_igdng.msg_length = msg_length;
-       insn->bits3.dp_write_igdng.end_of_thread = end_of_thread;
-       insn->bits2.send_igdng.sfid = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
-       insn->bits2.send_igdng.end_of_thread = end_of_thread;
+   if (intel->gen == 5) {
+       insn->bits3.dp_write_gen5.binding_table_index = binding_table_index;
+       insn->bits3.dp_write_gen5.msg_control = msg_control;
+       insn->bits3.dp_write_gen5.pixel_scoreboard_clear = pixel_scoreboard_clear;
+       insn->bits3.dp_write_gen5.msg_type = msg_type;
+       insn->bits3.dp_write_gen5.send_commit_msg = 0;
+       insn->bits3.dp_write_gen5.header_present = 1;
+       insn->bits3.dp_write_gen5.response_length = response_length;
+       insn->bits3.dp_write_gen5.msg_length = msg_length;
+       insn->bits3.dp_write_gen5.end_of_thread = end_of_thread;
+       insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
+       insn->bits2.send_gen5.end_of_thread = end_of_thread;
    } else {
        insn->bits3.dp_write.binding_table_index = binding_table_index;
        insn->bits3.dp_write.msg_control = msg_control;
@@ -407,18 +407,18 @@ static void brw_set_dp_read_message( struct brw_context *brw,
    struct intel_context *intel = &brw->intel;
    brw_set_src1(insn, brw_imm_d(0));
 
-   if (intel->is_ironlake) {
-       insn->bits3.dp_read_igdng.binding_table_index = binding_table_index;
-       insn->bits3.dp_read_igdng.msg_control = msg_control;
-       insn->bits3.dp_read_igdng.msg_type = msg_type;
-       insn->bits3.dp_read_igdng.target_cache = target_cache;
-       insn->bits3.dp_read_igdng.header_present = 1;
-       insn->bits3.dp_read_igdng.response_length = response_length;
-       insn->bits3.dp_read_igdng.msg_length = msg_length;
-       insn->bits3.dp_read_igdng.pad1 = 0;
-       insn->bits3.dp_read_igdng.end_of_thread = end_of_thread;
-       insn->bits2.send_igdng.sfid = BRW_MESSAGE_TARGET_DATAPORT_READ;
-       insn->bits2.send_igdng.end_of_thread = end_of_thread;
+   if (intel->gen == 5) {
+       insn->bits3.dp_read_gen5.binding_table_index = binding_table_index;
+       insn->bits3.dp_read_gen5.msg_control = msg_control;
+       insn->bits3.dp_read_gen5.msg_type = msg_type;
+       insn->bits3.dp_read_gen5.target_cache = target_cache;
+       insn->bits3.dp_read_gen5.header_present = 1;
+       insn->bits3.dp_read_gen5.response_length = response_length;
+       insn->bits3.dp_read_gen5.msg_length = msg_length;
+       insn->bits3.dp_read_gen5.pad1 = 0;
+       insn->bits3.dp_read_gen5.end_of_thread = end_of_thread;
+       insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_DATAPORT_READ;
+       insn->bits2.send_gen5.end_of_thread = end_of_thread;
    } else {
        insn->bits3.dp_read.binding_table_index = binding_table_index; /*0:7*/
        insn->bits3.dp_read.msg_control = msg_control;  /*8:11*/
@@ -447,17 +447,17 @@ static void brw_set_sampler_message(struct brw_context *brw,
    assert(eot == 0);
    brw_set_src1(insn, brw_imm_d(0));
 
-   if (intel->is_ironlake) {
-      insn->bits3.sampler_igdng.binding_table_index = binding_table_index;
-      insn->bits3.sampler_igdng.sampler = sampler;
-      insn->bits3.sampler_igdng.msg_type = msg_type;
-      insn->bits3.sampler_igdng.simd_mode = simd_mode;
-      insn->bits3.sampler_igdng.header_present = header_present;
-      insn->bits3.sampler_igdng.response_length = response_length;
-      insn->bits3.sampler_igdng.msg_length = msg_length;
-      insn->bits3.sampler_igdng.end_of_thread = eot;
-      insn->bits2.send_igdng.sfid = BRW_MESSAGE_TARGET_SAMPLER;
-      insn->bits2.send_igdng.end_of_thread = eot;
+   if (intel->gen == 5) {
+      insn->bits3.sampler_gen5.binding_table_index = binding_table_index;
+      insn->bits3.sampler_gen5.sampler = sampler;
+      insn->bits3.sampler_gen5.msg_type = msg_type;
+      insn->bits3.sampler_gen5.simd_mode = simd_mode;
+      insn->bits3.sampler_gen5.header_present = header_present;
+      insn->bits3.sampler_gen5.response_length = response_length;
+      insn->bits3.sampler_gen5.msg_length = msg_length;
+      insn->bits3.sampler_gen5.end_of_thread = eot;
+      insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_SAMPLER;
+      insn->bits2.send_gen5.end_of_thread = eot;
    } else if (intel->is_g4x) {
       insn->bits3.sampler_g4x.binding_table_index = binding_table_index;
       insn->bits3.sampler_g4x.sampler = sampler;
@@ -663,7 +663,7 @@ struct brw_instruction *brw_ELSE(struct brw_compile *p,
    struct brw_instruction *insn;
    GLuint br = 1;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       br = 2;
 
    if (p->single_program_flow) {
@@ -705,7 +705,7 @@ void brw_ENDIF(struct brw_compile *p,
    struct intel_context *intel = &p->brw->intel;
    GLuint br = 1;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       br = 2; 
  
    if (p->single_program_flow) {
@@ -820,7 +820,7 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p,
    struct brw_instruction *insn;
    GLuint br = 1;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       br = 2;
 
    if (p->single_program_flow)
@@ -864,7 +864,7 @@ void brw_land_fwd_jump(struct brw_compile *p,
    struct brw_instruction *landing = &p->store[p->nr_insn];
    GLuint jmpi = 1;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        jmpi = 2;
 
    assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI);

src/mesa/drivers/dri/i965/brw_gs.c

@@ -60,7 +60,7 @@ static void compile_gs_prog( struct brw_context *brw,
     */
    c.nr_attrs = brw_count_bits(c.key.attrs);
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        c.nr_regs = (c.nr_attrs + 1) / 2 + 3;  /* are vertices packed, or reg-aligned? */
    else
        c.nr_regs = (c.nr_attrs + 1) / 2 + 1;  /* are vertices packed, or reg-aligned? */

src/mesa/drivers/dri/i965/brw_gs_state.c

@@ -98,7 +98,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
    else
       gs.thread4.max_threads = 0;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       gs.thread4.rendering_enable = 1;
 
    if (INTEL_DEBUG & DEBUG_STATS)

src/mesa/drivers/dri/i965/brw_misc_state.c

@@ -248,7 +248,7 @@ static void emit_depthbuffer(struct brw_context *brw)
 
    if (intel->gen >= 6)
       len = 7;
-   else if (intel->is_g4x || intel->is_ironlake)
+   else if (intel->is_g4x || intel->gen == 5)
       len = 6;
    else
       len = 5;
@@ -262,7 +262,7 @@ static void emit_depthbuffer(struct brw_context *brw)
       OUT_BATCH(0);
       OUT_BATCH(0);
 
-      if (intel->is_g4x || intel->is_ironlake || intel->gen >= 6)
+      if (intel->is_g4x || intel->gen >= 5)
          OUT_BATCH(0);
 
       if (intel->gen >= 6)
@@ -306,7 +306,7 @@ static void emit_depthbuffer(struct brw_context *brw)
 		((region->height - 1) << 19));
       OUT_BATCH(0);
 
-      if (intel->is_g4x || intel->is_ironlake || intel->gen >= 6)
+      if (intel->is_g4x || intel->gen >= 5)
          OUT_BATCH(0);
 
       if (intel->gen >= 6)
@@ -608,7 +608,7 @@ static void upload_state_base_address( struct brw_context *brw )
        OUT_BATCH(1); /* Indirect object upper bound */
        OUT_BATCH(1); /* Instruction access upper bound */
        ADVANCE_BATCH();
-   } else if (intel->is_ironlake) {
+   } else if (intel->gen == 5) {
        BEGIN_BATCH(8);
        OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (8 - 2));
        OUT_BATCH(1); /* General state base address */

src/mesa/drivers/dri/i965/brw_program.c

@@ -34,6 +34,7 @@
 #include "shader/prog_parameter.h"
 #include "shader/program.h"
 #include "shader/programopt.h"
+#include "shader/shader_api.h"
 #include "tnl/tnl.h"
 
 #include "brw_context.h"
@@ -119,12 +120,28 @@ static GLboolean brwIsProgramNative( GLcontext *ctx,
    return GL_TRUE;
 }
 
+static void
+shader_error(GLcontext *ctx, struct gl_program *prog, const char *msg)
+{
+   struct gl_shader_program *shader;
+
+   shader = _mesa_lookup_shader_program(ctx, prog->Id);
+
+   if (shader) {
+      if (shader->InfoLog) {
+	 free(shader->InfoLog);
+      }
+      shader->InfoLog = _mesa_strdup(msg);
+      shader->LinkStatus = GL_FALSE;
+   }
+}
 
 static GLboolean brwProgramStringNotify( GLcontext *ctx,
                                          GLenum target,
                                          struct gl_program *prog )
 {
    struct brw_context *brw = brw_context(ctx);
+   int i;
 
    if (target == GL_FRAGMENT_PROGRAM_ARB) {
       struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
@@ -160,7 +177,22 @@ static GLboolean brwProgramStringNotify( GLcontext *ctx,
       _tnl_program_string(ctx, target, prog);
    }
 
-   /* XXX check if program is legal, within limits */
+   /* Reject programs with subroutines, which are totally broken at the moment
+    * (all program flows return when any program flow returns, and
+    * the VS also hangs if a function call calls a function.
+    *
+    * See piglit glsl-{vs,fs}-functions-[23] tests.
+    */
+   for (i = 0; i < prog->NumInstructions; i++) {
+      if (prog->Instructions[i].Opcode == OPCODE_CAL) {
+	 shader_error(ctx, prog,
+		      "i965 driver doesn't yet support uninlined function "
+		      "calls.  Move to using a single return statement at "
+		      "the end of the function to work around it.");
+	 return GL_FALSE;
+      }
+   }
+
    return GL_TRUE;
 }
 

src/mesa/drivers/dri/i965/brw_sf_emit.c

@@ -162,7 +162,7 @@ static void do_flatshade_triangle( struct brw_sf_compile *c )
    if (c->key.primitive == SF_UNFILLED_TRIS)
       return;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        jmpi = 2;
 
    brw_push_insn_state(p);
@@ -201,7 +201,7 @@ static void do_flatshade_line( struct brw_sf_compile *c )
    if (c->key.primitive == SF_UNFILLED_TRIS)
       return;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        jmpi = 2;
 
    brw_push_insn_state(p);

src/mesa/drivers/dri/i965/brw_sf_state.c

@@ -76,7 +76,20 @@ static void upload_sf_vp(struct brw_context *brw)
     * Note that the hardware's coordinates are inclusive, while Mesa's min is
     * inclusive but max is exclusive.
     */
-   if (render_to_fbo) {
+
+   if (ctx->DrawBuffer->_Xmin == ctx->DrawBuffer->_Xmax ||
+       ctx->DrawBuffer->_Ymin == ctx->DrawBuffer->_Ymax) {
+      /* If the scissor was out of bounds and got clamped to 0
+       * width/height at the bounds, the subtraction of 1 from
+       * maximums could produce a negative number and thus not clip
+       * anything.  Instead, just provide a min > max scissor inside
+       * the bounds, which produces the expected no rendering.
+       */
+      sfv.scissor.xmin = 1;
+      sfv.scissor.xmax = 0;
+      sfv.scissor.ymin = 1;
+      sfv.scissor.ymax = 0;
+   } else if (render_to_fbo) {
       /* texmemory: Y=0=bottom */
       sfv.scissor.xmin = ctx->DrawBuffer->_Xmin;
       sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
@@ -177,7 +190,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
 
    sf.thread3.dispatch_grf_start_reg = 3;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
        sf.thread3.urb_entry_read_offset = 3;
    else
        sf.thread3.urb_entry_read_offset = 1;
@@ -190,7 +203,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
    /* Each SF thread produces 1 PUE, and there can be up to 24 (Pre-Ironlake) or
     * 48 (Ironlake) threads.
     */
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       chipset_max_threads = 48;
    else
       chipset_max_threads = 24;

src/mesa/drivers/dri/i965/brw_structs.h

@@ -925,7 +925,7 @@ struct brw_gs_unit_state
    struct
    {
       GLuint pad0:8;
-      GLuint rendering_enable:1; /* for IGDNG */
+      GLuint rendering_enable:1; /* for Ironlake */
       GLuint pad4:1;
       GLuint stats_enable:1; 
       GLuint nr_urb_entries:7; 
@@ -1035,7 +1035,7 @@ struct brw_wm_unit_state
    GLfloat global_depth_offset_constant;  
    GLfloat global_depth_offset_scale;   
    
-   /* for IGDNG only */
+   /* for Ironlake only */
    struct {
       GLuint pad0:1;
       GLuint grf_reg_count_1:3; 
@@ -1448,7 +1448,7 @@ struct brw_instruction
            GLuint end_of_thread:1;
            GLuint pad1:1;
            GLuint sfid:4;
-       } send_igdng;  /* for IGDNG only */
+       } send_gen5;  /* for Ironlake only */
 
    } bits2;
 
@@ -1549,7 +1549,7 @@ struct brw_instruction
 	 GLuint msg_length:4;
 	 GLuint pad1:2;
 	 GLuint end_of_thread:1;
-      } math_igdng;
+      } math_gen5;
 
       struct {
 	 GLuint binding_table_index:8;
@@ -1585,7 +1585,7 @@ struct brw_instruction
 	 GLuint msg_length:4;
 	 GLuint pad1:2;
 	 GLuint end_of_thread:1;
-      } sampler_igdng;
+      } sampler_gen5;
 
       struct brw_urb_immediate urb;
 
@@ -1603,7 +1603,7 @@ struct brw_instruction
 	 GLuint msg_length:4;
 	 GLuint pad1:2;
 	 GLuint end_of_thread:1;
-      } urb_igdng;
+      } urb_gen5;
 
       struct {
 	 GLuint binding_table_index:8;
@@ -1628,7 +1628,7 @@ struct brw_instruction
 	 GLuint msg_length:4;
 	 GLuint pad1:2;
 	 GLuint end_of_thread:1;
-      } dp_read_igdng;
+      } dp_read_gen5;
 
       struct {
 	 GLuint binding_table_index:8;
@@ -1655,7 +1655,7 @@ struct brw_instruction
 	 GLuint msg_length:4;
 	 GLuint pad1:2;
 	 GLuint end_of_thread:1;
-      } dp_write_igdng;
+      } dp_write_gen5;
 
       struct {
 	 GLuint pad:16;
@@ -1673,7 +1673,7 @@ struct brw_instruction
 	 GLuint msg_length:4;
 	 GLuint pad1:2;
 	 GLuint end_of_thread:1;
-      } generic_igdng;
+      } generic_gen5;
 
       GLint d;
       GLuint ud;

src/mesa/drivers/dri/i965/brw_tex_layout.c

@@ -48,77 +48,31 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
 
    switch (mt->target) {
    case GL_TEXTURE_CUBE_MAP:
-      if (intel->is_ironlake) {
-          GLuint align_h = 2, align_w = 4;
+      if (intel->gen == 5) {
+          GLuint align_h = 2;
           GLuint level;
-          GLuint x = 0;
-          GLuint y = 0;
-          GLuint width = mt->width0;
-          GLuint height = mt->height0;
           GLuint qpitch = 0;
-          GLuint y_pitch = 0;
+	  int h0, h1, q;
 
-          mt->pitch = mt->width0;
-          intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
-          y_pitch = ALIGN(height, align_h);
+	  /* On Ironlake, cube maps are finally represented as just a series
+	   * of MIPLAYOUT_BELOW 2D textures (like 2D texture arrays), separated
+	   * by a pitch of qpitch rows, where qpitch is defined by the equation
+	   * given in Volume 1 of the BSpec.
+	   */
+	  h0 = ALIGN(mt->height0, align_h);
+	  h1 = ALIGN(minify(h0), align_h);
+	  qpitch = (h0 + h1 + 11 * align_h);
+          if (mt->compressed)
+	     qpitch /= 4;
 
-          if (mt->compressed) {
-              mt->pitch = ALIGN(mt->width0, align_w);
-          }
-
-          if (mt->first_level != mt->last_level) {
-              GLuint mip1_width;
-
-              if (mt->compressed) {
-                  mip1_width = ALIGN(minify(mt->width0), align_w)
-                      + ALIGN(minify(minify(mt->width0)), align_w);
-              } else {
-                  mip1_width = ALIGN(minify(mt->width0), align_w)
-                      + minify(minify(mt->width0));
-              }
-
-              if (mip1_width > mt->pitch) {
-                  mt->pitch = mip1_width;
-              }
-          }
-
-          mt->pitch = intel_miptree_pitch_align(intel, mt, tiling, mt->pitch);
-
-          if (mt->compressed) {
-              qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4;
-              mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6;
-          } else {
-              qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h);
-              mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6;
-          }
+	  i945_miptree_layout_2d(intel, mt, tiling, 6);
 
           for (level = mt->first_level; level <= mt->last_level; level++) {
-              GLuint img_height;
-              GLuint nr_images = 6;
-              GLuint q = 0;
-
-              intel_miptree_set_level_info(mt, level, nr_images, x, y, width, 
-                                           height, 1);
-
-              for (q = 0; q < nr_images; q++)
-                  intel_miptree_set_image_offset(mt, level, q,
-						 x, y + q * qpitch);
-
-              if (mt->compressed)
-                  img_height = MAX2(1, height/4);
-              else
-                  img_height = ALIGN(height, align_h);
-
-              if (level == mt->first_level + 1) {
-                  x += ALIGN(width, align_w);
-              }
-              else {
-                  y += img_height;
-              }
-
-              width  = minify(width);
-              height = minify(height);
+	     for (q = 0; q < 6; q++) {
+		intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch);
+	     }
           }
+	  mt->total_height = qpitch * 6;
 
           break;
       }
@@ -208,7 +162,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
    }
 
    default:
-      i945_miptree_layout_2d(intel, mt, tiling);
+      i945_miptree_layout_2d(intel, mt, tiling, 1);
       break;
    }
    DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,

src/mesa/drivers/dri/i965/brw_urb.c

@@ -148,7 +148,7 @@ static void recalculate_urb_fence( struct brw_context *brw )
 
       brw->urb.constrained = 0;
 
-      if (intel->is_ironlake) {
+      if (intel->gen == 5) {
          brw->urb.nr_vs_entries = 128;
          brw->urb.nr_sf_entries = 48;
          if (check_urb_layout(brw)) {

src/mesa/drivers/dri/i965/brw_vs_emit.c

@@ -182,7 +182,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c )
 
    if (intel->gen >= 6)
       mrf = 6;
-   else if (intel->is_ironlake)
+   else if (intel->gen == 5)
       mrf = 8;
    else
       mrf = 4;
@@ -283,7 +283,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c )
 
    if (intel->gen >= 6)
       c->prog_data.urb_entry_size = (attributes_in_vue + 4 + 7) / 8;
-   else if (intel->is_ironlake)
+   else if (intel->gen == 5)
       c->prog_data.urb_entry_size = (attributes_in_vue + 6 + 3) / 4;
    else
       c->prog_data.urb_entry_size = (attributes_in_vue + 2 + 3) / 4;
@@ -1288,7 +1288,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
       brw_MOV(p, offset(m0, 2), pos);
       brw_MOV(p, offset(m0, 5), pos);
       len_vertex_header = 4;
-   } else if (intel->is_ironlake) {
+   } else if (intel->gen == 5) {
       /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
        * dword 0-3 (m1) of the header is indices, point width, clip flags.
        * dword 4-7 (m2) is the ndc position (set above)
@@ -1710,7 +1710,7 @@ void brw_vs_emit(struct brw_vs_compile *c )
 
             loop_depth--;
 
-	    if (intel->is_ironlake)
+	    if (intel->gen == 5)
 	       br = 2;
 
             inst0 = inst1 = brw_WHILE(p, loop_inst[loop_depth]);

src/mesa/drivers/dri/i965/brw_vs_state.c

@@ -98,7 +98,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
     */
    vs.thread1.single_program_flow = 0;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       vs.thread1.binding_table_entry_count = 0; /* hardware requirement */
    else
       vs.thread1.binding_table_entry_count = key->nr_surfaces;
@@ -109,7 +109,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
    vs.thread3.urb_entry_read_offset = 0;
    vs.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
 
-   if (intel->is_ironlake) {
+   if (intel->gen == 5) {
       switch (key->nr_urb_entries) {
       case 8:
       case 12:
@@ -150,7 +150,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
 
    /* No samplers for ARB_vp programs:
     */
-   /* It has to be set to 0 for IGDNG
+   /* It has to be set to 0 for Ironlake
     */
    vs.vs5.sampler_count = 0;
 

src/mesa/drivers/dri/i965/brw_wm.h

@@ -67,7 +67,7 @@ struct brw_wm_prog_key {
    GLuint flat_shade:1;
    GLuint linear_color:1;  /**< linear interpolation vs perspective interp */
    GLuint runtime_check_aads_emit:1;
-   GLuint nr_color_regions:2;
+   GLuint nr_color_regions:5;
    
    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
    GLuint shadowtex_mask:16;

src/mesa/drivers/dri/i965/brw_wm_emit.c

@@ -898,7 +898,7 @@ void emit_tex(struct brw_wm_compile *c,
    }
 
    /* Pre-Ironlake, the 8-wide sampler always took u,v,r. */
-   if (!intel->is_ironlake && c->dispatch_width == 8)
+   if (intel->gen < 5 && c->dispatch_width == 8)
       nr_texcoords = 3;
 
    /* For shadow comparisons, we have to supply u,v,r. */
@@ -916,7 +916,7 @@ void emit_tex(struct brw_wm_compile *c,
 
    /* Fill in the shadow comparison reference value. */
    if (shadow) {
-      if (intel->is_ironlake) {
+      if (intel->gen == 5) {
 	 /* Fill in the cube map array index value. */
 	 brw_MOV(p, brw_message_reg(cur_mrf), brw_imm_f(0));
 	 cur_mrf += mrf_per_channel;
@@ -929,11 +929,11 @@ void emit_tex(struct brw_wm_compile *c,
       cur_mrf += mrf_per_channel;
    }
 
-   if (intel->is_ironlake) {
+   if (intel->gen == 5) {
       if (shadow)
-	 msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_COMPARE_IGDNG;
+	 msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_COMPARE_GEN5;
       else
-	 msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_IGDNG;
+	 msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_GEN5;
    } else {
       /* Note that G45 and older determines shadow compare and dispatch width
        * from message length for most messages.
@@ -981,16 +981,16 @@ void emit_txb(struct brw_wm_compile *c,
     * undefined, and trust the execution mask to keep the undefined pixels
     * from mattering.
     */
-   if (c->dispatch_width == 16 || !intel->is_ironlake) {
-      if (intel->is_ironlake)
-	 msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_IGDNG;
+   if (c->dispatch_width == 16 || intel->gen < 5) {
+      if (intel->gen == 5)
+	 msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_GEN5;
       else
 	 msg_type = BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS;
       mrf_per_channel = 2;
       dst_retyped = retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW);
       response_length = 8;
    } else {
-      msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_IGDNG;
+      msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_GEN5;
       mrf_per_channel = 1;
       dst_retyped = retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW);
       response_length = 4;

src/mesa/drivers/dri/i965/brw_wm_glsl.c

@@ -2006,7 +2006,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
                   struct brw_instruction *inst0, *inst1;
                   GLuint br = 1;
 
-                  if (intel->is_ironlake)
+                  if (intel->gen == 5)
                      br = 2;
 
 		  assert(loop_depth > 0);

src/mesa/drivers/dri/i965/brw_wm_state.c

@@ -137,7 +137,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
    wm.thread1.depth_coef_urb_read_offset = 1;
    wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       wm.thread1.binding_table_entry_count = 0; /* hardware requirement */
    else
       wm.thread1.binding_table_entry_count = key->nr_surfaces;
@@ -157,7 +157,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
    wm.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
    wm.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
 
-   if (intel->is_ironlake)
+   if (intel->gen == 5)
       wm.wm4.sampler_count = 0; /* hardware requirement */
    else
       wm.wm4.sampler_count = (key->sampler_count + 1) / 4;

src/mesa/drivers/dri/i965/brw_wm_surface_state.c

@@ -588,7 +588,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
 	    tile_base = ((key.draw_y / 32) * (32 * pitch));
 	    tile_base += (key.draw_x - tile_x) / (128 / key.cpp) * 4096;
 	 }
-	 assert(intel->is_g4x || (tile_x == 0 && tile_y == 0));
+	 assert(brw->has_surface_tile_offset || (tile_x == 0 && tile_y == 0));
 	 assert(tile_x % 4 == 0);
 	 assert(tile_y % 2 == 0);
 	 /* Note that the low bits of these fields are missing, so

src/mesa/drivers/dri/intel/intel_chipset.h

@@ -93,7 +93,7 @@
 
 #define IS_ILD(devid)           (devid == PCI_CHIP_ILD_G)
 #define IS_ILM(devid)           (devid == PCI_CHIP_ILM_G)
-#define IS_IGDNG(devid)           (IS_ILD(devid) || IS_ILM(devid))
+#define IS_GEN5(devid)          (IS_ILD(devid) || IS_ILM(devid))
 
 #define IS_915(devid)		(devid == PCI_CHIP_I915_G || \
 				 devid == PCI_CHIP_E7221_G || \
@@ -118,7 +118,7 @@
 
 #define IS_965(devid)		(IS_GEN4(devid) || \
 				 IS_G4X(devid) || \
-				 IS_IGDNG(devid) || \
+				 IS_GEN5(devid) || \
 				 IS_GEN6(devid))
 
 #define IS_9XX(devid)		(IS_915(devid) || \

src/mesa/drivers/dri/intel/intel_context.c

@@ -159,10 +159,10 @@ intelGetString(GLcontext * ctx, GLenum name)
          chipset = "Intel(R) B43";
          break;
       case PCI_CHIP_ILD_G:
-         chipset = "Intel(R) IGDNG_D";
+         chipset = "Intel(R) Ironlake Desktop";
          break;
       case PCI_CHIP_ILM_G:
-         chipset = "Intel(R) IGDNG_M";
+         chipset = "Intel(R) Ironlake Mobile";
          break;
       default:
          chipset = "Unknown Intel Chipset";
@@ -362,7 +362,7 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
        if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
 	  depth_region = region;
 
-       intel_renderbuffer_set_region(rb, region);
+       intel_renderbuffer_set_region(intel, rb, region);
        intel_region_release(&region);
 
        if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
@@ -374,7 +374,7 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 		   continue;
 
 	     intel_region_reference(&stencil_region, region);
-	     intel_renderbuffer_set_region(rb, stencil_region);
+	     intel_renderbuffer_set_region(intel, rb, stencil_region);
 	     intel_region_release(&stencil_region);
 	  }
        }
@@ -610,12 +610,21 @@ intelInitContext(struct intel_context *intel,
    intel->driContext = driContextPriv;
    intel->driFd = sPriv->fd;
 
+   intel->has_xrgb_textures = GL_TRUE;
    if (IS_GEN6(intel->intelScreen->deviceID)) {
       intel->gen = 6;
       intel->needs_ff_sync = GL_TRUE;
       intel->has_luminance_srgb = GL_TRUE;
+   } else if (IS_GEN5(intel->intelScreen->deviceID)) {
+      intel->gen = 5;
+      intel->needs_ff_sync = GL_TRUE;
+      intel->has_luminance_srgb = GL_TRUE;
    } else if (IS_965(intel->intelScreen->deviceID)) {
       intel->gen = 4;
+      if (IS_G4X(intel->intelScreen->deviceID)) {
+	  intel->has_luminance_srgb = GL_TRUE;
+	  intel->is_g4x = GL_TRUE;
+      }
    } else if (IS_9XX(intel->intelScreen->deviceID)) {
       intel->gen = 3;
       if (IS_945(intel->intelScreen->deviceID)) {
@@ -623,15 +632,10 @@ intelInitContext(struct intel_context *intel,
       }
    } else {
       intel->gen = 2;
-   }
-
-   if (IS_IGDNG(intel->intelScreen->deviceID)) {
-      intel->is_ironlake = GL_TRUE;
-      intel->needs_ff_sync = GL_TRUE;
-      intel->has_luminance_srgb = GL_TRUE;
-   } else if (IS_G4X(intel->intelScreen->deviceID)) {
-      intel->has_luminance_srgb = GL_TRUE;
-      intel->is_g4x = GL_TRUE;
+      if (intel->intelScreen->deviceID == PCI_CHIP_I830_M ||
+	  intel->intelScreen->deviceID == PCI_CHIP_845_G) {
+	 intel->has_xrgb_textures = GL_FALSE;
+      }
    }
 
    driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,

src/mesa/drivers/dri/intel/intel_context.h

@@ -142,10 +142,10 @@ struct intel_context
     */
    int gen;
    GLboolean needs_ff_sync;
-   GLboolean is_ironlake;
    GLboolean is_g4x;
    GLboolean is_945;
    GLboolean has_luminance_srgb;
+   GLboolean has_xrgb_textures;
 
    int urb_size;
 

src/mesa/drivers/dri/intel/intel_fbo.c

@@ -42,7 +42,9 @@
 #include "intel_fbo.h"
 #include "intel_mipmap_tree.h"
 #include "intel_regions.h"
-
+#ifndef I915
+#include "brw_state.h"
+#endif
 
 #define FILE_DEBUG_FLAG DEBUG_FBO
 
@@ -280,7 +282,8 @@ intel_nop_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
 
 
 void
-intel_renderbuffer_set_region(struct intel_renderbuffer *rb,
+intel_renderbuffer_set_region(struct intel_context *intel,
+			      struct intel_renderbuffer *rb,
 			      struct intel_region *region)
 {
    struct intel_region *old;
@@ -288,6 +291,12 @@ intel_renderbuffer_set_region(struct intel_renderbuffer *rb,
    old = rb->region;
    rb->region = NULL;
    intel_region_reference(&rb->region, region);
+#ifndef I915
+   if (old) {
+      brw_state_cache_bo_delete(&brw_context(&intel->ctx)->surface_cache,
+				old->buffer);
+   }
+#endif
    intel_region_release(&old);
 }
 

src/mesa/drivers/dri/intel/intel_fbo.h

@@ -82,7 +82,8 @@ intel_get_renderbuffer(struct gl_framebuffer *fb, int attIndex)
 
 
 extern void
-intel_renderbuffer_set_region(struct intel_renderbuffer *irb,
+intel_renderbuffer_set_region(struct intel_context *intel,
+			      struct intel_renderbuffer *irb,
 			      struct intel_region *region);
 
 

src/mesa/drivers/dri/intel/intel_mipmap_tree.c

@@ -117,17 +117,16 @@ intel_miptree_create(struct intel_context *intel,
 		     GLboolean expect_accelerated_upload)
 {
    struct intel_mipmap_tree *mt;
-   uint32_t tiling;
+   uint32_t tiling = I915_TILING_NONE;
 
    if (intel->use_texture_tiling && compress_byte == 0) {
       if (intel->gen >= 4 &&
 	  (base_format == GL_DEPTH_COMPONENT ||
 	   base_format == GL_DEPTH_STENCIL_EXT))
 	 tiling = I915_TILING_Y;
-      else
+      else if (width0 >= 64)
 	 tiling = I915_TILING_X;
-   } else
-      tiling = I915_TILING_NONE;
+   }
 
    mt = intel_miptree_create_internal(intel, target, internal_format,
 				      first_level, last_level, width0,

src/mesa/drivers/dri/intel/intel_pixel_draw.c

@@ -167,7 +167,7 @@ intel_stencil_drawpixels(GLcontext * ctx,
    irb = intel_create_renderbuffer(MESA_FORMAT_ARGB8888);
    irb->Base.Width = depth_irb->Base.Width;
    irb->Base.Height = depth_irb->Base.Height;
-   intel_renderbuffer_set_region(irb, depth_irb->region);
+   intel_renderbuffer_set_region(intel, irb, depth_irb->region);
 
    /* Create a name for our renderbuffer, which lets us use other mesa
     * rb functions for convenience.

src/mesa/drivers/dri/intel/intel_tex_format.c

@@ -49,7 +49,14 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
       if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) {
          return MESA_FORMAT_RGB565;
       }
-      return do32bpt ? MESA_FORMAT_XRGB8888 : MESA_FORMAT_RGB565;
+      if (do32bpt) {
+	 if (intel->has_xrgb_textures)
+	    return MESA_FORMAT_XRGB8888;
+	 else
+	    return MESA_FORMAT_ARGB8888;
+      } else {
+	 return MESA_FORMAT_RGB565;
+      }
 
    case GL_RGBA8:
    case GL_RGB10_A2:
@@ -68,7 +75,10 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
    case GL_RGB10:
    case GL_RGB12:
    case GL_RGB16:
-      return MESA_FORMAT_XRGB8888;
+      if (intel->has_xrgb_textures)
+	 return MESA_FORMAT_XRGB8888;
+      else
+	 return MESA_FORMAT_ARGB8888;
 
    case GL_RGB5:
    case GL_RGB4:

src/mesa/drivers/dri/intel/intel_tex_layout.c

@@ -63,9 +63,9 @@ void intel_get_texture_alignment_unit(GLenum internalFormat, GLuint *w, GLuint *
     }
 }
 
-void i945_miptree_layout_2d( struct intel_context *intel,
-			     struct intel_mipmap_tree *mt,
-			     uint32_t tiling )
+void i945_miptree_layout_2d(struct intel_context *intel,
+			    struct intel_mipmap_tree *mt,
+			    uint32_t tiling, int nr_images)
 {
    GLuint align_h = 2, align_w = 4;
    GLuint level;
@@ -111,7 +111,7 @@ void i945_miptree_layout_2d( struct intel_context *intel,
    for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
       GLuint img_height;
 
-      intel_miptree_set_level_info(mt, level, 1, x, y, width, 
+      intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
 				   height, 1);
 
       if (mt->compressed)

src/mesa/drivers/dri/intel/intel_tex_layout.h

@@ -40,5 +40,5 @@ static INLINE GLuint minify( GLuint d )
 
 extern void i945_miptree_layout_2d(struct intel_context *intel,
 				   struct intel_mipmap_tree *mt,
-				   uint32_t tiling);
+				   uint32_t tiling, int nr_images);
 extern void intel_get_texture_alignment_unit(GLenum, GLuint *, GLuint *);

src/mesa/drivers/osmesa/Makefile

@@ -19,17 +19,11 @@ INCLUDE_DIRS = \
 	-I$(TOP)/src/mesa \
 	-I$(TOP)/src/mesa/main
 
-# Standalone osmesa needs to be linked with core Mesa APIs
-ifeq ($(DRIVER_DIRS), osmesa)
 CORE_MESA = \
 	$(TOP)/src/mesa/libmesa.a \
 	$(TOP)/src/mesa/libglapi.a \
 	$(TOP)/src/glsl/cl/libglslcl.a \
 	$(TOP)/src/glsl/pp/libglslpp.a
-else
-CORE_MESA =
-endif
-
 
 .c.o:
 	$(CC) -c $(INCLUDE_DIRS) $(CFLAGS) $< -o $@

src/mesa/drivers/osmesa/osmesa.c

@@ -1004,7 +1004,20 @@ new_osmesa_renderbuffer(GLcontext *ctx, GLenum format, GLenum type)
       rb->AllocStorage = osmesa_renderbuffer_storage;
 
       rb->InternalFormat = GL_RGBA;
-      rb->Format = MESA_FORMAT_RGBA8888;
+      switch (type) {
+      case GL_UNSIGNED_BYTE:
+         rb->Format = MESA_FORMAT_RGBA8888;
+         break;
+      case GL_UNSIGNED_SHORT:
+         rb->Format = MESA_FORMAT_SIGNED_RGBA_16;
+         break;
+      case GL_FLOAT:
+         rb->Format = MESA_FORMAT_RGBA_FLOAT32;
+         break;
+      default:
+         assert(0 && "Unexpected type in new_osmesa_renderbuffer()");
+         rb->Format = MESA_FORMAT_RGBA8888;
+      }
       rb->_BaseFormat = GL_RGBA;
       rb->DataType = type;
    }
@@ -1167,11 +1180,9 @@ OSMesaCreateContextExt( GLenum format, GLint depthBits, GLint stencilBits,
          return NULL;
       }
 
-      /* create front color buffer in user-provided memory (no back buffer) */
-      osmesa->rb = new_osmesa_renderbuffer(&osmesa->mesa, format, type);
-      _mesa_add_renderbuffer(osmesa->gl_buffer, BUFFER_FRONT_LEFT, osmesa->rb);
-      assert(osmesa->rb->RefCount == 2);
-                        
+      /* Create depth/stencil/accum buffers.  We'll create the color
+       * buffer later in OSMesaMakeCurrent().
+       */
       _mesa_add_soft_renderbuffers(osmesa->gl_buffer,
                                    GL_FALSE, /* color */
                                    osmesa->gl_visual->haveDepthBuffer,
@@ -1308,11 +1319,23 @@ OSMesaMakeCurrent( OSMesaContext osmesa, void *buffer, GLenum type,
     */
    _glapi_check_multithread();
 
+
+   /* Create a front/left color buffer which wraps the user-provided buffer.
+    * There is no back color buffer.
+    * If the user tries to use a 8, 16 or 32-bit/channel buffer that
+    * doesn't match what Mesa was compiled for (CHAN_BITS) the
+    * _mesa_add_renderbuffer() function will create a "wrapper" renderbuffer
+    * that converts rendering from CHAN_BITS to the user-requested channel
+    * size.
+    */
+   osmesa->rb = new_osmesa_renderbuffer(&osmesa->mesa, osmesa->format, type);
+   _mesa_add_renderbuffer(osmesa->gl_buffer, BUFFER_FRONT_LEFT, osmesa->rb);
+   assert(osmesa->rb->RefCount == 2);
+
    /* Set renderbuffer fields.  Set width/height = 0 to force 
     * osmesa_renderbuffer_storage() being called by _mesa_resize_framebuffer()
     */
    osmesa->rb->Data = buffer;
-   osmesa->rb->DataType = type;
    osmesa->rb->Width = osmesa->rb->Height = 0;
 
    /* Set the framebuffer's size.  This causes the

src/mesa/main/fbobject.c

@@ -1766,10 +1766,10 @@ _mesa_FramebufferRenderbufferEXT(GLenum target, GLenum attachment,
       rb = NULL;
    }
 
-   if (attachment == GL_DEPTH_STENCIL_ATTACHMENT) {
+   if (attachment == GL_DEPTH_STENCIL_ATTACHMENT &&
+       rb && rb->Format != MESA_FORMAT_NONE) {
       /* make sure the renderbuffer is a depth/stencil format */
-      const GLenum baseFormat =
-         _mesa_get_format_base_format(att->Renderbuffer->Format);
+      const GLenum baseFormat = _mesa_get_format_base_format(rb->Format);
       if (baseFormat != GL_DEPTH_STENCIL) {
          _mesa_error(ctx, GL_INVALID_OPERATION,
                      "glFramebufferRenderbufferEXT(renderbuffer"

src/mesa/main/version.h

@@ -34,8 +34,8 @@
 /* Mesa version */
 #define MESA_MAJOR 7
 #define MESA_MINOR 8
-#define MESA_PATCH 1
-#define MESA_VERSION_STRING "7.8.1"
+#define MESA_PATCH 2
+#define MESA_VERSION_STRING "7.8.2"
 
 /* To make version comparison easy */
 #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))

src/mesa/shader/shader_api.c

@@ -1259,6 +1259,54 @@ lookup_uniform_parameter(GLcontext *ctx, GLuint program, GLint location,
 }
 
 
+/**
+ * GLGL uniform arrays and structs require special handling.
+ *
+ * The GL_ARB_shader_objects spec says that if you use
+ * glGetUniformLocation to get the location of an array, you CANNOT
+ * access other elements of the array by adding an offset to the
+ * returned location.  For example, you must call
+ * glGetUniformLocation("foo[16]") if you want to set the 16th element
+ * of the array with glUniform().
+ *
+ * HOWEVER, some other OpenGL drivers allow accessing array elements
+ * by adding an offset to the returned array location.  And some apps
+ * seem to depend on that behaviour.
+ *
+ * Mesa's gl_uniform_list doesn't directly support this since each
+ * entry in the list describes one uniform variable, not one uniform
+ * element.  We could insert dummy entries in the list for each array
+ * element after [0] but that causes complications elsewhere.
+ *
+ * We solve this problem by encoding two values in the location that's
+ * returned by glGetUniformLocation():
+ *  a) index into gl_uniform_list::Uniforms[] for the uniform
+ *  b) an array/field offset (0 for simple types)
+ *
+ * These two values are encoded in the high and low halves of a GLint.
+ * By putting the uniform number in the high part and the offset in the
+ * low part, we can support the unofficial ability to index into arrays
+ * by adding offsets to the location value.
+ */
+static void
+merge_location_offset(GLint *location, GLint offset)
+{
+   *location = (*location << 16) | offset;
+}
+
+
+/**
+ * Seperate the uniform location and parameter offset.  See above.
+ */
+static void
+split_location_offset(GLint *location, GLint *offset)
+{
+   *offset = *location & 0xffff;
+   *location = *location >> 16;
+}
+
+
+
 /**
  * Called via ctx->Driver.GetUniformfv().
  */
@@ -1268,6 +1316,9 @@ _mesa_get_uniformfv(GLcontext *ctx, GLuint program, GLint location,
 {
    struct gl_program *prog;
    GLint paramPos;
+   GLint offset;
+
+   split_location_offset(&location, &offset);
 
    lookup_uniform_parameter(ctx, program, location, &prog, &paramPos);
 
@@ -1298,7 +1349,10 @@ _mesa_get_uniformiv(GLcontext *ctx, GLuint program, GLint location,
 {
    struct gl_program *prog;
    GLint paramPos;
+   GLint offset;
 
+   split_location_offset(&location, &offset);
+ 
    lookup_uniform_parameter(ctx, program, location, &prog, &paramPos);
 
    if (prog) {
@@ -1318,31 +1372,6 @@ _mesa_get_uniformiv(GLcontext *ctx, GLuint program, GLint location,
 }
 
 
-/**
- * The value returned by GetUniformLocation actually encodes two things:
- * 1. the index into the prog->Uniforms[] array for the uniform
- * 2. an offset in the prog->ParameterValues[] array for specifying array
- *    elements or structure fields.
- * This function merges those two values.
- */
-static void
-merge_location_offset(GLint *location, GLint offset)
-{
-   *location = *location | (offset << 16);
-}
-
-
-/**
- * Seperate the uniform location and parameter offset.  See above.
- */
-static void
-split_location_offset(GLint *location, GLint *offset)
-{
-   *offset = (*location >> 16);
-   *location = *location & 0xffff;
-}
-
-
 /**
  * Called via ctx->Driver.GetUniformLocation().
  *

src/mesa/shader/slang/slang_codegen.c

@@ -4187,11 +4187,10 @@ _slang_gen_variable(slang_assemble_ctx * A, slang_operation *oper)
    slang_atom name = oper->var ? oper->var->a_name : oper->a_id;
    slang_variable *var = _slang_variable_locate(oper->locals, name, GL_TRUE);
    slang_ir_node *n;
-   if (!var) {
+   if (!var || !var->declared) {
       slang_info_log_error(A->log, "undefined variable '%s'", (char *) name);
       return NULL;
    }
-   assert(var->declared);
    n = new_var(A, var);
    return n;
 }

src/mesa/shader/slang/slang_compile_variable.h

@@ -41,7 +41,7 @@ typedef struct slang_variable_
    GLuint size;                     /**< Variable's size in bytes */
    GLboolean is_global;
    GLboolean isTemp;                /**< a named temporary (__resultTmp) */
-   GLboolean declared;              /**< for debug */
+   GLboolean declared;              /**< has the var been declared? */
    struct slang_ir_storage_ *store; /**< Storage for this var */
 } slang_variable;
 

src/mesa/shader/slang/slang_link.c

@@ -921,7 +921,10 @@ _slang_link(GLcontext *ctx,
 
    if (!vertNotify || !fragNotify) {
       /* driver rejected one/both of the vertex/fragment programs */
-      link_error(shProg, "Vertex and/or fragment program rejected by driver\n");
+      if (!shProg->InfoLog) {
+	 link_error(shProg,
+		    "Vertex and/or fragment program rejected by driver\n");
+      }
    }
    else {
       shProg->LinkStatus = (shProg->VertexProgram || shProg->FragmentProgram);

src/mesa/state_tracker/st_extensions.c

@@ -67,6 +67,7 @@ void st_init_limits(struct st_context *st)
 {
    struct pipe_screen *screen = st->pipe->screen;
    struct gl_constants *c = &st->ctx->Const;
+   struct gl_program_constants *pc;
 
    c->MaxTextureLevels
       = _min(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
@@ -137,6 +138,96 @@ void st_init_limits(struct st_context *st)
    /* XXX separate query for early function return? */
    st->ctx->Shader.EmitContReturn =
       screen->get_param(screen, PIPE_CAP_TGSI_CONT_SUPPORTED);
+
+   if (screen->get_param(screen, PIPE_CAP_GLSL)) {
+      /*
+       * In the lack of more fine grained capabilities, if the pipe driver supports
+       * GLSL then assume native limits match Mesa software limits.
+       */
+
+      pc = &c->FragmentProgram;
+      pc->MaxNativeInstructions      = pc->MaxInstructions;
+      pc->MaxNativeAluInstructions   = pc->MaxAluInstructions;
+      pc->MaxNativeTexInstructions   = pc->MaxTexInstructions;
+      pc->MaxNativeTexIndirections   = pc->MaxTexIndirections;
+      pc->MaxNativeAttribs           = pc->MaxAttribs;
+      pc->MaxNativeTemps             = pc->MaxTemps;
+      pc->MaxNativeAddressRegs       = pc->MaxAddressRegs;
+      pc->MaxNativeParameters        = pc->MaxParameters;
+
+      pc = &c->VertexProgram;
+      pc->MaxNativeInstructions      = pc->MaxInstructions;
+      pc->MaxNativeAluInstructions   = pc->MaxAluInstructions;
+      pc->MaxNativeTexInstructions   = pc->MaxTexInstructions;
+      pc->MaxNativeTexIndirections   = pc->MaxTexIndirections;
+      pc->MaxNativeAttribs           = pc->MaxAttribs;
+      pc->MaxNativeTemps             = pc->MaxTemps;
+      pc->MaxNativeAddressRegs       = pc->MaxAddressRegs;
+      pc->MaxNativeParameters        = pc->MaxParameters;
+   } else if (screen->get_param(screen, PIPE_CAP_SM3)) {
+      /*
+       * Assume the hardware meets the minimum requirements
+       * for Shader Model 3.
+       *
+       * See also:
+       * - http://msdn.microsoft.com/en-us/library/bb172920(VS.85).aspx
+       * - http://msdn.microsoft.com/en-us/library/bb172963(VS.85).aspx
+       */
+
+      pc = &c->FragmentProgram;
+      pc->MaxNativeInstructions      = 512; /* D3DMIN30SHADERINSTRUCTIONS */
+      pc->MaxNativeAluInstructions   = pc->MaxNativeInstructions;
+      pc->MaxNativeTexInstructions   = pc->MaxNativeInstructions;
+      pc->MaxNativeTexIndirections   = pc->MaxNativeTexInstructions;
+      pc->MaxNativeAttribs           = 10;
+      pc->MaxNativeTemps             = 32;
+      pc->MaxNativeAddressRegs       = 1; /* aL */
+      pc->MaxNativeParameters        = 224;
+
+      pc = &c->VertexProgram;
+      pc->MaxNativeInstructions      = 512; /* D3DMIN30SHADERINSTRUCTIONS */
+      pc->MaxNativeAluInstructions   = pc->MaxNativeInstructions;
+      pc->MaxNativeTexInstructions   = pc->MaxNativeInstructions;
+      pc->MaxNativeTexIndirections   = pc->MaxNativeTexInstructions;
+      pc->MaxNativeAttribs           = 16;
+      pc->MaxNativeTemps             = 32;
+      pc->MaxNativeAddressRegs       = 2; /* a0 and aL */
+      pc->MaxNativeParameters        = 256;
+   } else {
+      /*
+       * Assume the hardware meets the minimum requirements
+       * for Shader Model 2.
+       *
+       * See also:
+       * - http://msdn.microsoft.com/en-us/library/bb172918(VS.85).aspx
+       * - http://msdn.microsoft.com/en-us/library/bb172961(VS.85).aspx
+       */
+
+      pc = &c->FragmentProgram;
+      pc->MaxNativeInstructions      = 96; /* D3DPS20_MIN_NUMINSTRUCTIONSLOTS */
+      pc->MaxNativeAluInstructions   = 64;
+      pc->MaxNativeTexInstructions   = 32;
+      pc->MaxNativeTexIndirections   = pc->MaxNativeTexInstructions;
+      pc->MaxNativeAttribs           = 10; /* 2 color + 8 texture coord */
+      pc->MaxNativeTemps             = 12; /* D3DPS20_MIN_NUMTEMPS */
+      pc->MaxNativeAddressRegs       = 0;
+      pc->MaxNativeParameters        = 16;
+
+      pc = &c->VertexProgram;
+      pc->MaxNativeInstructions      = 256;
+      pc->MaxNativeAluInstructions   = 256;
+      pc->MaxNativeTexInstructions   = 0;
+      pc->MaxNativeTexIndirections   = 0;
+      pc->MaxNativeAttribs           = 16;
+      pc->MaxNativeTemps             = 12; /* D3DVS20_MIN_NUMTEMPS */
+      pc->MaxNativeAddressRegs       = 2; /* a0 and aL */
+      pc->MaxNativeParameters        = 256;
+   }
+
+   if (!screen->get_param(screen, PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS)) {
+      c->VertexProgram.MaxNativeTexInstructions = 0;
+      c->VertexProgram.MaxNativeTexIndirections = 0;
+   }
 }
 
 

src/mesa/state_tracker/st_mesa_to_tgsi.c

@@ -154,7 +154,7 @@ dst_register( struct st_translate *t,
       return t->temps[index];
 
    case PROGRAM_OUTPUT:
-      if (index == t->psizoutindex)
+      if (index == VERT_RESULT_PSIZ)
          t->prevInstWrotePsiz = GL_TRUE;
       return t->outputs[t->outputMapping[index]];