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Author SHA1 Message Date
Emil Velikov
f60875e211 docs: add release notes for 17.1.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19 12:13:25 +01:00
Emil Velikov
5ab872d64a Update version to 17.1.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19 12:10:00 +01:00
Chuck Atkins
9bc4ee1c8e configure.ac: Reduce zlib requirement from 1.2.8 to 1.2.3.
Testing with zlib versions 1.2.{3,4,5,6,7,8} showed no difference in
functionality, correctness, or zlib API usage and 1.2.3 is the oldest
version available in still actively deployed production Linux
distributions (RHEL/CentOS 6 and SuSE 11).

Build 17.1.1 against the system supplied zlib-devel packages for 1.2.3
in EL6 and 1.2.7 on EL7. I then swapped out the zlib version at runtime
via LD_LIBRARY_PATH with ones build from the release tarballs from
zlib.net

Testwise - I ran the piglit shader profile with --quick addded to the
tests since I figured that would exercise the shader cache, which would
in turn use zlib.

Signed-off-by: Chuck Atkins <chuck.atkins@kitware.com>
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
[Emil Velikov: add hunk about version/piglit testing]
Acked-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ad69b037b1)
2017-06-14 12:47:58 +01:00
Nicolas Dechesne
b708c2961e util/rand_xor: add missing include statements
Fixes for:

src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' [-Werror=implicit-function-declaration]
    int fd = open("/dev/urandom", O_RDONLY);
             ^~~~
src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this function)
    int fd = open("/dev/urandom", O_RDONLY);
                                  ^~~~~~~~

Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit adadadc151)
2017-06-14 12:47:58 +01:00
Dave Airlie
538975fdf8 glsl/lower_distance: only set max_array_access for 1D clip dist arrays
The max_array_access field applies to the first dimension, which means
we only want to set it for the 1D clip dist arrays.

This fixes an ir_validate assert seen with
KHR-GL44.cull_distance.functional
on nouveau and radeon with debug builds.

Fixes: a08c4ebbe (glsl: rewrite clip/cull distance lowering pass)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 53587b7105)
2017-06-14 12:47:58 +01:00
Grazvydas Ignotas
3734a7de6c radv: fix trace dumping for !use_ib_bos
Fixes trace dumping crash for SI or when RADV_DEBUG=noibs is set.

Fixes: 97dfff5410 "radv: Dump command buffer on hang."
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit fae3b13905)
2017-06-14 12:47:58 +01:00
Dave Airlie
423dab9d32 radv: set fmask state to all 0s when no fmask. (v2)
The shader reads the descriptor to decide if it should take the
fmask value, however we weren't initing it always, which meant
random crap, esp with MSAA depth textures.

Fixes random hangs with:
dEQP-VK.glsl.builtin_var.fragdepth.*

v2: check fmask_state is not NULL

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 51553c0bea)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_image.c
2017-06-14 12:47:58 +01:00
Bas Nieuwenhuizen
18fd7249c5 radv: Remove SI num RB override for occlusion queries.
radeonsi doesn't have it anymore either.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 59c2e2a061)
2017-06-14 12:47:58 +01:00
Nicolai Hähnle
f66de22af4 radv: fewer than 8 RBs are possible
This fixes the subsequent assertion on Bonaire.

Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 388d36dfd1)
2017-06-14 12:47:58 +01:00
Dave Airlie
8bd7d8c042 radv: expose integrated device type for APUs.
This just sets the vulkan device type depending on whether
this is an APU or GPU.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
(cherry picked from commit 2890a71158)
2017-06-14 12:47:58 +01:00
Bas Nieuwenhuizen
ffb46c8826 radv: Dirty all descriptors sets when changing the pipeline.
Sets could have been ignored during previous descriptor set flush
due to the shader not using them and therefore no SGPR being assigned.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
(cherry picked from commit 4415a46be2)

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
	src/amd/vulkan/radv_meta.c
2017-06-14 12:47:58 +01:00
Bas Nieuwenhuizen
c8226d3782 radv: Set both compute and graphics SGPRS on descriptor set flush.
We clear the descriptors_dirty array afterwards, so the SGPRs for
the other pipeline don't get updated on the flush for that other
draw/dispatch, so we have to make sure we do it immediately.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
(cherry picked from commit 5fb8bb3065)
[Emil Velikov: drop radv_flush_indirect_descriptor_sets hunk - missing
in branch]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
2017-06-14 12:47:57 +01:00
Tapani Pälli
6f062ba893 egl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT case
Specification states that in case of error, value should not be
written, patch changes buffer age queries to return -1 in case of
error so that we can skip changing the value.

In addition, small change to droid_query_buffer_age to return 0
in case buffer does not have a back buffer available.

Fixes:
   dEQP-EGL.functional.negative_partial_update.not_postable_surface

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8fac894f9b)
2017-06-14 12:47:57 +01:00
Tim Rowley
891dafc8e7 swr: relax c++ requirement from c++14 to c++11
Remove c++14 generic lambda to keep compiler requirement at c++11.

No regressions on piglit or vtk test suites.

Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

CC: mesa-stable@lists.freedesktop.org
(cherry picked from commit 0b80b02502)
2017-06-14 12:47:57 +01:00
Marek Olšák
2a7279fa8f radeonsi: disable the patch ID workaround on SI when the patch ID isn't used (v2)
The workaround causes a massive performance decrease on 1-SE parts.
(Cape Verde, Hainan, Oland)

The performance regression is already part of 17.0 and 17.1.

v2: check tess_uses_prim_id

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 391673af7a)
[Emil Velikov: s/tcs_tes_uses_prim_id/tess_uses_prim_id/]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-14 12:47:43 +01:00
Jason Ekstrand
ae960d7dee i965: Mark depth surfaces as needing a HiZ resolve after blitting
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 5097fcbfdc)
2017-06-14 10:40:22 +01:00
Jason Ekstrand
3a193c009b i965: Perform HiZ flush/stall prior to HiZ resolves
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit acbd02450b)
2017-06-14 10:40:22 +01:00
Jason Ekstrand
4889bb6af3 i965: Move the pre-depth-clear flush/stalls to intel_hiz_exec
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit acb9a2ef8f)
2017-06-14 10:40:22 +01:00
Jason Ekstrand
845c238ce2 i965/blorp: Take a layer range in intel_hiz_exec
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 252b004a51)
2017-06-14 10:40:22 +01:00
Thomas Hellstrom
67acca073a dri3/GLX: Fix drawable invalidation v2
A number of internal VMware apitrace traces image comparisons fail with
dri3 because the viewport transformation becomes incorrect after an X
drawable resize. The incorrect viewport transformation sometimes persist
until the second draw-call after a swapBuffer.

Comparing with the dri2 glx code there are a couple of places where dri2
invalidates the drawable in the absence of server-triggered invalidation,
where dri3 doesn't do that. When these invalidation points are added to
dri3, the image comparisons become correct.

v2:
Addressed review comment by Michel Dänzer.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-and-tested-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 1253d58983)
2017-06-14 10:40:22 +01:00
Marek Olšák
7b10ed6a12 radeonsi: fix a GPU hang with tessellation on 2-CU configs
Only harvested Stoney has 2 CUs. Tested on 2-CU Stoney and Fiji forced
to 2 CUs.

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit 6c655cfeb4)
2017-06-14 10:40:22 +01:00
Marek Olšák
5a8d7ef65a st/mesa: don't load cached TGSI shaders on demand
This fixes a performance issue with the shader cache that delayed Gallium
shader create calls until draw calls.

I'd like this in stable, but it's not a showstopper.

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 2ec50f98a9)
2017-06-14 10:40:22 +01:00
Lyude
98564569d0 nvc0: disable BGRA8 images on Fermi
BGRA8 image stores on Fermi don't work, which results in breaking
PBO downloads, such that they always return 0x0. Discovered this
through a glamor bug, and confirmed it does indeed break a good number
of piglit tests such as spec/arb_pixel_buffer_object/pbo-read-argb8888

Fixes: 8e7893eb53 ("nvc0: add support for BGRA8 images")
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 245912b684)
2017-06-14 10:40:22 +01:00
Brian Paul
6348a02e27 xlib: fix glXGetCurrentDisplay() failure
glXGetCurrentDisplay() has been broken for years and nobody noticed until
recently.  This change adds a new XMesaGetCurrentDisplay() that the GLX
emulation API can call, just as we did for glXGetCurrentContext().

Tested by hacking glxgears to call glXGetCurrentContext() before and
after glXMakeCurrent() to verify the return value is NULL beforehand and
the same as the opened display afterward.

Also tested by Tom Hudson with his tests programs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100988
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Tom Hudson <tom.hudson.phd@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit c6ba85a8c0)
2017-06-14 10:40:22 +01:00
Jose Fonseca
c24bdf046e automake: Link all libGL.so variants with -Bsymbolic.
We were linking src/glx with -Bsymbolic, but not the classic/gallium X11
libGL.so.

But it's always a good idea to build all libGL.so and all DRI drivers
with -Bsymbolic, otherwise they might resolve symbols from the 3rd party
application executable or shared libraries, which is _never_ what we
want.

In particular, this can happen when intercepting OpenGL calls with
apitrace, before
63194b2573

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ce5e83b8a0)
2017-06-14 10:40:22 +01:00
Chad Versace
15b5e5996a i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()
This function never occurs in the callchain of a GL function. It occurs
only in the callchain of eglCreate*Surface and the analogous paths for
GLX.  Therefore, even if a  thread does have a bound GL context,
emitting a GL error here is wrong. A misplaced GL error, when no GL
call is made, can confuse clients.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 9d996e94fb)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/intel_fbo.c
2017-06-14 10:39:50 +01:00
Lucas Stach
8cfaa8ad66 etnaviv: always do cpu_fini in transfer_unmap
The cpu_fini() call pushes the buffer back into the GPU domain, which needs
to be done for all buffers, not just the ones with CPU written content. The
etnaviv kernel driver currently doesn't validate this, but may start to do
so at a later point in time. If there is a temporary resource the fini needs
to happen before the RS uses this one as the source for the upload.

Also remove an invalid comment about flushing CPU caches, cpu_fini takes
care of everything involved in this.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
(cherry picked from commit cab5996c26)
2017-06-14 09:49:45 +01:00
Juan A. Suarez Romero
4908b1e909 docs: add sha256 checksums for 17.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05 21:15:43 +00:00
Juan A. Suarez Romero
97f6404e50 docs: add release notes for 17.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05 20:27:24 +00:00
Juan A. Suarez Romero
eada8963c1 Update version to 17.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05 20:15:30 +00:00
Jason Ekstrand
ae55ab84b5 anv: Require vertex buffers to come from a 32-bit heap
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 39adea9330)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-03 20:37:13 +02:00
Juan A. Suarez Romero
57cdaa3dcc Revert "cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap"
This reverts commit b3e48a07c0.
2017-06-03 20:37:13 +02:00
Jason Ekstrand
2c23389922 i965: Rework Sandy Bridge HiZ and stencil layouts
Sandy Bridge does not technically support mipmapped depth/stencil.  In
order to work around this, we allocate what are effectively completely
separate images for each miplevel, ensure that they are page-aligned,
and manually offset to them.  Prior to layered rendering, this was a
simple matter of setting a large enough halign/valign.

With the advent of layered rendering, however, things got more
complicated.  Now, things weren't as simple as just handing a surface
off to the hardware.  Any miplevel of a normally mipmapped surface can
be considered as just an array surface given the right qpitch.  However,
the hardware gives us no capability to specify qpitch so this won't
work.  Instead, the chosen solution was to use a new "all slices at each
LOD" layout which laid things out as a mipmap of arrays rather than an
array of mipmaps.  This way you can easily offset to any of the
miplevels and each is a valid array.

Unfortunately, the "all slices at each lod" concept missed one
fundamental thing about SNB HiZ and stencil hardware:  It doesn't just
always act as if you're always working with a non-mipmapped surface, it
acts as if you're always working on a non-mipmapped surface of the same
size as LOD0.  In other words, even though it may only write the
upper-left corner of each array slice, the qpitch for the array is for a
surface the size of LOD0 of the depth surface.  This mistake causes us
to under-allocate HiZ and stencil in some cases and also to accidentally
allow different miplevels to overlap.  Sadly, piglit test coverage
didn't quite catch this until I started making changes to the resolve
code that caused additional HiZ resolves in certain tests.

This commit switches Sandy Bridge HiZ and stencil over to a new scheme
that lays out the non-zero miplevels horizontally below LOD0.  This way
they can all have the same qpitch without interfering with each other.
Technically, the miplevels still overlap, but things are spaced out
enough that each page is only in the "written area" of one LOD.

Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 10903d2289)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Jason Ekstrand
f967ae7b3f anv: Advertise both 32-bit and 48-bit heaps when we have enough memory
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 50d0eb5096)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Jason Ekstrand
de8ebbcf1e anv: Refactor memory type setup
This makes us walk over the heaps one at a time and add the types for
LLC and !LLC to each heap.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 34581fdd4f)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Jason Ekstrand
2562b3252b anv: Make supports_48bit_addresses a heap property
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b83b1af6f6)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
2017-06-02 23:04:01 +02:00
Jason Ekstrand
86a8854b11 anv: Stop setting BO flags in bo_init_new
The idea behind doing this was to make it easier to set various flags.
However, we have enough custom flag settings floating around the driver
that this is more of a nuisance than a help.  This commit has the
following functional changes:

 1) The workaround_bo created in anv_CreateDevice loses both flags.
    This shouldn't matter because it's very small and entirely internal
    to the driver.

 2) The bo created in anv_CreateDmaBufImageINTEL loses the
    EXEC_OBJECT_ASYNC flag.  In retrospect, it never should have gotten
    EXEC_OBJECT_ASYNC in the first place.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 00df1cd9d6)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_allocator.c
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_queue.c
2017-06-02 23:04:01 +02:00
Jason Ekstrand
0f042901e3 anv: Add valid_bufer_usage to the memory type metadata
Instead of returning valid types as just a number, we now walk the list
and check the buffer's usage against the usage flags we store in the new
anv_memory_type structure.  Currently, valid_buffer_usage == ~0.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f7736ccf53)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_private.h
2017-06-02 23:04:01 +02:00
Jason Ekstrand
15bc6d4d21 anv: Determine the type of mapping based on type metadata
Before, we were just comparing the type index to 0.  Now we actually
look the type up in the table and check its properties to determine what
kind of mapping we want to do.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 92325a7efc)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_private.h
2017-06-02 23:04:01 +02:00
Jason Ekstrand
0aa1e6acde anv: Set EXEC_OBJECT_ASYNC when available
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 35e626bd0e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Squashed with:

anv/tests: Create a dummy instance as well as device

This fixes crashes caused by 35e626bd0e
which made us start referencing the instance in the allocators.  With
this commit, the tests now happily pass again.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100877
Tested-by: Vinson Lee <vlee@freedesktop.org>
(cherry picked from commit 6ef1bd4fa5)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Juan A. Suarez Romero
b7b3c0fce7 Revert "cherry-ignore: anv: [...]"
Revert "cherry-ignore: anv: Refactor memory type setup"
This reverts commit eab4a503a0.

Revert "cherry-ignore: anv: Add valid_bufer_usage to the memory type metadata"
This reverts commit c31e814a85.

Revert "cherry-ignore: anv: Advertise both 32-bit and 48-bit heaps when we have enough memory"
This reverts commit e391144853.

Revert "cherry-ignore: anv: Make supports_48bit_addresses a heap property"
This reverts commit dbadd06632.

Revert "cherry-ignore: anv: Stop setting BO flags in bo_init_new"
This reverts commit 07867f72cf.

Revert "cherry-ignore: anv: Determine the type of mapping based on type metadata"
This reverts commit 9299466b83.
2017-06-02 23:03:47 +02:00
Juan A. Suarez Romero
eab4a503a0 cherry-ignore: anv: Refactor memory type setup 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
c31e814a85 cherry-ignore: anv: Add valid_bufer_usage to the memory type metadata 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
7a636d8ff1 cherry-ignore: radv: fix regression in descriptor set freeing 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
b3e48a07c0 cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
e391144853 cherry-ignore: anv: Advertise both 32-bit and 48-bit heaps when we have enough memory 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
dbadd06632 cherry-ignore: anv: Make supports_48bit_addresses a heap property 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
07867f72cf cherry-ignore: anv: Stop setting BO flags in bo_init_new 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
9299466b83 cherry-ignore: anv: Determine the type of mapping based on type metadata 2017-06-01 10:09:43 +02:00
Juan A. Suarez Romero
103ec6e231 cherry-ignore: radeonsi: load patch_id for TES-as-ES when exporting for PS 2017-06-01 10:09:43 +02:00
Ian Romanick
f1d487f4f0 r100: Use _mesa_get_format_base_format in radeon_update_wrapper
The wrapper is for a renderbuffer around a texture.  Textures can have
formats (e.g., 3) that aren't valide for API generated renderbuffers.
_mesa_base_fbo_format will return 0, but _mesa_get_format_base_format
will return the base format of RGB.

Fixes a crashes in piglit tests fbo-alphatest-formats (all subtests
pass) and fbo-colormask-formats (some subtests pass, some fail).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 303b47f253)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Ian Romanick
57b38cc077 r100,r200: Don't assume glVisual is non-NULL during context creation
Thanks to EGL_MESA_configless_context, the visual pointer can be NULL.

Fixes a segfault (or assertion failure) in piglit's
egl-configless-context test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c24881d39c)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Ian Romanick
ca8481c41c r100: Don't assume that the base mipmap of a texture exists
Fixes crashes in piglit's gl-1.2-texture-base-level.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 2dcec62075)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Tapani Pälli
5b81c0524b egl/android: fix segfault within swap_buffers
Function droid_swap_buffers may get called without dri2_surf->buffer set,
in these cases we don't have a back buffer set either. Patch fixes segfault
seen with 3DMark that uses android.opengl.GLSurfaceView for rendering it's UI.

backtrace:
   #00 pc 00013f88  /system/lib/egl/libGLES_mesa.so (droid_swap_buffers+104)
   #01 pc 000117b2  /system/lib/egl/libGLES_mesa.so (dri2_swap_buffers+50)
   #02 pc 000058b2  /system/lib/egl/libGLES_mesa.so (eglSwapBuffers+386)
   #03 pc 00011329  /system/lib/libEGL.so (eglSwapBuffersWithDamageKHR+553)
   #04 pc 000118e7  /system/lib/libEGL.so (eglSwapBuffers+55)
   #05 pc 000754dc  /system/lib/libandroid_runtime.so

Note, this is v1 as v2 caused dEQP regressions.

Fixes: 2acc69d ("EGL/Android: Add EGL_EXT_buffer_age extension")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f347bac30f)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Juan A. Suarez Romero
ed38bcedfb Revert "android: fix segfault within swap_buffers"
This reverts commit 4d4558411d.

See https://lists.freedesktop.org/archives/mesa-stable/2017-June/006408.html

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Nicolas Boichat
012c198bb7 configure.ac: Also match -androideabi tuple
On ARM Android platforms, the host_os tuple should be linux-androideabi,
so let's match both -android and -androideabi (or any other
-android* tuple) to determine if we should do an Android build.

Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit f6ac3d0db6)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Nicolai Hähnle
1534330eba st/mesa: remove redundant stfb->iface checks
stfb->iface is always non-NULL for an st_framebuffer. These checks
were incorrect, relying on out-of-bounds memory access in the
surface-less case of EGL_KHR_surfaceless_context.

v2: remove redundant stread check (Marek)

Reviewed-by: Marek Olšák <marek@olsak@amd.com> (v2)
(cherry picked from commit 9d346af322)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Bartosz Tomczyk
580a2e6c15 mesa: Avoid leaking surface in st_renderbuffer_delete
v2: add comment in code

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100741
Fixes: a5e733c6b5 mesa: drop current draw/read buffer when ctx is released
Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit fd6c2a3f3e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Bas Nieuwenhuizen
ce2b96dd8b radv: Reserve space for descriptor and push constant user SGPR setting.
flush_compute_state doesn't reserve a large chunk, so these need their own reservation.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
(cherry picked from commit 18efb404cf)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
2017-06-01 04:25:10 +02:00
Emil Velikov
e4c4b86f70 egl/wayland: select the format based on the interface used
Rather than misleadingly depending on DRI2 for the WL_DRM vs WL_SHM
formats, use the wl_drm and wl_shm interface respectively.

Fixes: a1727aa75e ("egl/wayland: Don't use DRM format codes for SHM")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6ef0fc400c)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Rob Clark
da7bde9d9a freedreno: fix fence creation fail if no rendering
Android tries to create a FENCE_FD fence without any rendering.  And
then falls over when that fails.  So just always create an initial
batch.

Fixes: e4ad8695 ("freedreno: fix crash when flush() but no rendering")
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 8fc9702a1b)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Timothy Arceri
7e9129f487 st/mesa: don't mark the program as in cache_fallback when there is cache miss
When we fallback currently the gl_program objects are re-allocated.

This is likely to change when the i965 cache lands, but for now
this fixes a crash when using MESA_GLSL=cache_fb. This env var
simulates the fallback path taken when a tgsi cache item doesn't
exist due to being evicted previously or some kind of error.

Unlike i965 we are always falling back at link time so it's safe to
just re-allocate everything. We will be unnecessarily freeing and
re-allocate a bunch of things here but it's probably not a huge deal,
and can be changed when the i965 code lands.

Fixes: 0e9991f957 ("glsl: don't reference shader prog data during cache fallback")

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 80e643345e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Daniel Stone
d6d334c5fb egl/wayland: Ensure we get a back buffer
Commit 9ca6711faa changed the Wayland winsys to only block for the
frame callback inside SwapBuffers, rather than get_back_bo. get_back_bo
would perform a single non-blocking Wayland event dispatch, to try to
find any release events which we had pulled off the wire but not
actually processed. The blocking dispatch was moved to SwapBuffers.

This removed a guarantee that we would've processed all events inside
get_back_bo(), and introduced a failure whereby the server could've sent
a buffer release event, but we wouldn't have read it. In clients
unconstrained by SwapInterval (rendering ~as fast as possible), which
were being displayed directly without composition (buffer release delayed),
this could lead to get_back_bo() failing because there were no free
buffers available to it.

The drawing rightly failed, but this was papered over because of the
path in eglSwapBuffers() which attempts to guarantee a BO, in order to
support calling SwapBuffers twice in a row with no rendering actually
having been performed.

Since eglSwapBuffers will perform a blocking dispatch of Wayland
events, a buffer release would have arrived by that point, and we
could then choose a buffer to post to the server. The effect was that
frames were displayed out-of-order, since we grabbed a frame with random
past content to display to the compositor.

Ideally get_back_bo() failing should store a failure flag inside the
surface and cause the next SwapBuffers to fail, but for the meantime,
restore the correct behaviour such that get_back_bo() no longer fails.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reported-by: Eero Tamminen <eero.t.tamminen@intel.com>
Acked-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98833
Fixes: 9ca6711faa ("Revert "wayland: Block for the frame callback in get_back_bo not dri2_swap_buffers"")
(cherry picked from commit 1f2d0093bf)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Emil Velikov
4af9c15052 radv: automake: list shared libraries after the static ones
Analogous to previous commit - the compiler can discard xcb + wayland
libs, since there is no user (the static libraries) before it on the
command line.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
(cherry picked from commit 2b6ad89d86)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:09 +02:00
Emil Velikov
007611b3c0 anv: automake: list shared libraries after the static ones
The compiler can discard the shared ones from the link chain, since
there is no user (the static libraries) before it on the command line.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Laurent Carlier <lordheavym@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
(cherry picked from commit 3e8790bff0)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:09 +02:00
Jason Ekstrand
39c70f902c i965: Round copy size to the nearest block in intel_miptree_copy
The width and height of the copy don't have to be aligned to the block
size if they specify the right or bottom edges of the image.  (See also
the comment and asserts right above).  We need to round them up when we
do the division in order to get it 100% right.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0901d0bc4c)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:09 +02:00
Jason Ekstrand
af08c1672e i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops
We've discovered in the Vulkan driver that simply doing the end-of-pipe
sync afterwards is insufficient.  The specific requirement stated in the
PRM is that you have to do one every time you transition between the
tree modes of "clear", "render", and "resolve".  This is GL, so we could
track it but any attempt to do so would most likely get it wrong.  For
now, it's easier to just assume that every fast-clear op is an island
and do the sync both before and after.

This also removes the unneeded flush and stall after slow-clear
operations.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 441cd7a81d)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:08 +02:00
Jason Ekstrand
2f8ede04d9 anv: Set image memory types based on the type count
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 10fad58b31)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:07 +02:00
Jason Ekstrand
e064f7d826 anv: Set up memory types and heaps during physical device init
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c1f4343807)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_private.h
2017-06-01 04:16:53 +02:00
Jason Ekstrand
deecf2a49a anv: Predicate 48bit support on gen >= 8
This doesn't matter right now since it only affects whether or not we
set the kernel bit but, if we ever do anything else based on it, we'll
want it to be correct per-gen.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit eceaf7e234)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Jason Ekstrand
fafa17bd19 anv/image: Get rid of the memset(aux, 0, sizeof(aux)) hack
Up until now, we've been memsetting the auxiliary surface to 0 at
BindImageMemory time to ensure that it is properly initialized.
However, this isn't correct because apps are allowed to freely alias
memory between different images and buffers so long as they properly
track whether or not a particular image is valid and, if it isn't,
transition from UNINITIALIZED to something else before using it.  We
now implement those transitions so we can drop the hack.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4eecd534f0)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Jason Ekstrand
667ec77634 anv: Handle transitioning depth from UNDEFINED to other layouts
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit cc45c4bb80)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Jason Ekstrand
207dd2e9e6 anv: Handle color layout transitions from the UNINITIALIZED layout
This causes dEQP-VK.api.copy_and_blit.resolve_image.partial.* to start
failing due to test bugs.  See CL 1031 for a test fix.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 75edecf502)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Marek Olšák
c5b1b05e1c radeonsi/gfx9: compile shaders with +xnack
so that LLVM doesn't allocate SGPRs where XNACK is.

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 2beb31bd7c)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Emil Velikov
cfa6a8bb50 travis: remove workarounds for the Vulkan target
Previously we required --enable-egl for the platform selection to work.
Additionally due to the broken DRI3 dependency tracking we needed
--enable-glx.

Since both of these are now sorted now we no longer need the
workarounds.

While we're here, explicitly enable dri3.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 552cd5cce5)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Emil Velikov
22ba39352d configure: error out if building XVMC w/o supported platform
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit b496fc2932)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:04 +02:00
Emil Velikov
f7b6b34aae configure: error out if building VDPAU w/o supported platform
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 037e9d37b4)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
112e732867 configure: error out if building OMX w/o supported platform
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 1914c814a6)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
637a5d58b0 configure: error out if building VA w/o supported platform
A bit pedantic patch to fool proof should someone start thinkering
without knowing what they do.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 63e11ac2b5)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
1f88c3c0cb gallium/targets: link against XCB only as needed
OMX and VA can optionally use the X11 DRI2/DRI3, thus we should link
only as required.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit fcbedce310)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
3bcbf4d1d5 st/omx: fix building against X11-less setups
The vl_*_screen_create API properly falls back to a NOP when we're
building without specific platforms. So the only thing we need is to
handle the lack of X11/Xlib.h and provide a dummy Display define.

Cc: <mesa-stable@lists.freedesktop.org>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 115cb729d8)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
114a4a99bd st/omx: remove unneeded X11 include
En route to a X11-less builds

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit d71ce62e84)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
9b44f3fa95 st/va: fix misplaced closing bracket
It's been like this since the code was introduced.

Fixes: 86eb4131a9 (st/va: add headless support, i.e. VA_DISPLAY_DRM)
Cc: <mesa-stable@lists.freedesktop.org>
Cc: Julien Isorce <julien.isorce@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit aaea53c2c0)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
1e8e12e09c auxiliary/vl: use vl_*_screen_create stubs when building w/o platform
Provide a dummy stub when the user has opted w/o said platform, thus
we can build the binaries without unnecessarily requiring X11/other
headers.

In order to avoid build and link-time issues, we remove the HAVE_DRI3
guards in the VA and VDPAU state-trackers.

With this change st/va will return VA_STATUS_ERROR_ALLOCATION_FAILED
instead of VA_STATUS_ERROR_UNIMPLEMENTED. That is fine since upstream
users of libva such as vlc and mpv do little error checking, let
alone distinguish between the two.

Cc: Leo Liu <leo.liu@amd.com>
Cc: Guttula, Suresh <Suresh.Guttula@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 369e5dd939)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
023b1da8c0 configure: error out when building X11 Vulkan without DRI3
Vulkan supports only DRI3 enabled X11 platforms. Make it obvious,
should one consider building without it.

Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 05043e0e8e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
15fc135cda loader: build libloader_dri3_helper.la only with HAVE_PLATFORM_X11
Pretty much every other place does the same.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit d80d6d662e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
60297c97cd configure: check once for DRI3 dependencies
Currently we are having the XCB_DRI3 dependencies duplicated,
partially.

Just do a once-off check and add all of the respective CFLAGS/LIBS
where needed.

As a nice side effect this helps us solve a couple of FIXMEs.

DRI3 is not a thing w/o X11 so disable it in such cases.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit acf3d2afab)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

squashed with:

configure.ac: add xcb-fixes to the XCB DRI3 list

The XCB module is used by the VL targets. Thus omitting it can lead to
link-time errors due to unresolved symbols.

Other DRI3 users such as the Vulkan WSI and the dri3 loader helper do
not use an update region in their xcb_present_pixmap() call. We will
look into that at a later stage.

Fixes: acf3d2afab ("configure: check once for DRI3 dependencies")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101110
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 9a90d6a9d4)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

squashed with:

configure.ac: s/xcb-fixes/xcb-xfixes/

Former is not a thing, even if I have a hacked xcb-fixes.pc on my system.
Thanks for spotting it Mark!

Fixes: 9a90d6a9d4 ("configure.ac: add xcb-fixes to the XCB DRI3 list")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 48cd1919ff)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
4c0010e93c configure: error out when building GLX w/o the X11 platform
Building EGL/Vulkan/other without X11, while GLX is enabled is confusing
and misleading. In practise anyone aiming at the former will also
disable GLX.

The inverse (some examples below) should still work:
 ./configure --disable-glx --with-platforms=x11 --with-vulkan-drivers=intel
 ./configure --disable-glx --with-platforms=x11 --enable-egl

Keep in mind that the X11 platform is enabled, by default.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 8212fc95b5)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:03 +02:00
Emil Velikov
5e2a985a54 configure: set HAVE_foo_PLATFORM as applicable
Rather than having multiple places that define the macros, do it just
once in configure. Makes existing code a bit shorter and easier to
manage as we fix the VL targets with follow-up commits.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit f353f844a0)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:02 +02:00
Emil Velikov
a0f311a588 configure: enable the surfaceless platform by default
A simple platform that you want to use in a many usecases. See the
spec file details.

It has no special requirements plus it takes less than a second to
build.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 2d35773221)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:02 +02:00
Emil Velikov
1d89787a19 configure: loosen --with-platforms heuristics
Remove the enable-egl pre-requirement. Platform selection does not
depend on EGL.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit edb5a65f93)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:02 +02:00
Emil Velikov
29dc0b2d8c configure: update remaining --with-egl-platforms references
Rename the remaining references to omit the egl part.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 73682f82bc)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:02 +02:00
Emil Velikov
76362188cc configure: rename remaining HAVE_EGL_PLATFORM_* guards
Analogous to others earlier, these will be used to control the platform
for more than the EGL driver.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 27737e7e84)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:02 +02:00
Emil Velikov
817f9982d5 configure: move platform handling further up
We'll need it for the Vulkan drivers and the VL targets.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 3208fd2e46)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:32:02 +02:00
Daniel Stone
2ebf5e5aa5 egl/wayland: Use per-surface event queues
During display initialisation, we need a separate event queue to handle
the registry events, which is correctly handled. But we also need
separate per-surface event queues to handle swapchain-related events,
such as surface frame events and buffer release events. This avoids two
surfaces from the same EGLDisplay, both current on separate threads,
dispatching each other's events.

Create separate per-surface event queues, create wl_surface and wl_drm
proxy wrapper objects per surface, so we eliminate the race around
sending events to the wrong queue. swrast buffers do not need a
dedicated proxy wrapper, as the wl_shm_pool used to create the
wl_buffers, being transient, can itself be assigned to a queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 36b9976e1f ("egl/wayland: Avoid race conditions when on non-main thread")
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 03dd9a88b0)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Squashed with:

egl/wayland: verify event queue was allocated

We're already verified that 'window' wasn't NULL, I'm guessing this
allocation error is about the newly created queue.

CID: 1409754
Fixes: 03dd9a88b0 ("egl/wayland: Use per-surface event queues")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 30dc56bb5b)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 22:31:42 +02:00
Daniel Stone
013433b3d9 egl/wayland: Don't open-code roundtrip
wl_display_roundtrip_queue() exists and can replace roundtrip(). The
API was introduced with wayland 1.6, while we currently require 1.11.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8118bc269f)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 21:53:24 +02:00
Daniel Stone
0dbab1e0f7 vulkan/wsi/wayland: Use proxy wrappers for swapchain
Though most swapchain operations used a queue, they were racy in that
the object was created with the queue only set later, meaning that its
event could potentially be dispatched from the default queue in between
these two steps.

Use proxy wrappers to avoid this race, also assigning wl_buffers created
for the swapchain to the event queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 5034c61558)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Squashed with:

vulkan/wsi/wayland: Fix proxy wrappers for swapchain recreation

Before the swapchain event queue is destroyed, all proxy objects that reference
it must be dropped. Otherwise we risk a use-after-free if a frame callback event
or buffer release events are received afterwards.
This happens when an application destroys and recreates a swapchain in FIFO
mode between two frames without using the VkSwapchainCreateInfoKHR::oldSwapchain
mechanism to keep the old swapchain until after the next redraw.

Fixes: 5034c61558 ("vulkan/wsi/wayland: Use proxy wrappers for swapchain")
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 1586768e74)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 21:53:24 +02:00
Daniel Stone
7cd7f0bfe4 vulkan/wsi/wayland: Use per-display event queue
Calling random callbacks on the display's event queue is hostile, as
we may call into client code when it least expects it. Create our own
event queue, one per wsi_wl_display, and use that for the registry.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c902a1957d)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 21:53:24 +02:00
Daniel Stone
260dac8447 vulkan/wsi/wayland: Remove roundtrip when creating image
There's no need to call wl_display_roundtrip() after trying to create a
buffer through wl_drm; if it succeeds then everything is fine, and if it
fails, then we get a fatal protocol error so can't recover anyway.

Additionally, doing a roundtrip on the default / main application queue,
is destructive anyway, so would need to be its own queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit afe8c8a299)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 21:53:24 +02:00
Daniel Stone
36dd525569 vulkan: Fix Wayland uninitialised registry
Untangle the exit cleanup paths so we don't try to use the registry
variable before it's been initialised.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit d9a8bba7f4)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-05-31 21:53:23 +02:00
Emil Velikov
092c485b8e docs: add sha256 checksums for 17.1.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-25 08:18:59 +01:00
Emil Velikov
ca0a148a4d docs: add release notes for 17.1.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-25 08:11:42 +01:00
Emil Velikov
0eaf422957 Update version to 17.1.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-25 08:06:23 +01:00
Ilia Mirkin
4da22e2b68 nvc0/ir: SHLADD's middle source must be an immediate
The instruction encodings only allow for immediates. Don't try to
replace a zero (which is dumb to have in that op in any case) with RZ.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 82e77d4e44)
2017-05-22 10:19:30 +01:00
Emil Velikov
88309a985a automake: add SWR LLVM gen_builder.hpp workaround
As gen_builder.hpp file is generated, it contains information that is
specific to the LLVM version it originates from.

As suggested by Tim, the file seems to be forwards compatible. So in
order to produce ship a file which will work everywhere we should be
using earlies supported LLVM - 3.9.

With this we're back on track and can build all of mesa without
python/mako/flex and friends.

In the long term we might want to see if the python generators can be
updated to produce LLVM version agnostic files. At least within the
range supported by SWR.

Cc: <mesa-stable@lists.freedesktop.org>
Cc: Chuck Atkins <chuck.atkins@kitware.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
(cherry picked from commit 5233eaf9ee)
2017-05-22 10:19:04 +01:00
Johnson Lin
3922a43bf2 nir/lower_tex: Fix minor error in YUV color conversion matrix
The matrix used for YCbCr to RGB is listed in:

    https://en.wikipedia.org/wiki/YCbCr

There was an error in converting the offsets from integers to unorm
values: 0.0625=16/256 should be 16.0/255,and 0.5=128.0/256 should be
128.0/255.  With this fix, the CSC result is bit aligned with wikipedia's
conversion result and FFMPeg's result.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100854
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
(cherry picked from commit a6fb943f3e)
2017-05-19 23:23:21 +01:00
Rob Herring
832f6b4543 virgl: fix virgl_bo_transfer_{put, get} box struct copy
Commit 3dfe61ed6e ("gallium: decrease the size of pipe_box - 24 -> 16
bytes") changed the size of pipe_box, but the virgl code was relying on
pipe_box and drm_virtgpu_3d_box structs having the same size/layout doing
a struct copy. Copy the fields one by one instead.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Dave Airlie <airlied@redhat.com>
Fixes: 3dfe61ed6e ("gallium: decrease the size of pipe_box - 24 -> 16 bytes")
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 5771ecc90e)
2017-05-19 23:17:29 +01:00
Emil Velikov
b6f92084bd egl: add g_egldispatchstubs.h to the release tarball
Fixes: ce562f9e3f ("EGL: Implement the libglvnd interface for EGL (v3)")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e19ea928b9)
2017-05-19 23:17:19 +01:00
Nanley Chery
50cd4e37d9 i965/formats: Update the three-channel DXT1 mappings
The procedure for decompressing an opaque DXT1 OpenGL format is
dependant on the comparison of two colors stored in the first 32 bits of
the compressed block. Here's the specified OpenGL behavior for
reference:

   The RGB color for a texel at location (x,y) in the block is given by:

      RGB0,              if color0 > color1 and code(x,y) == 0
      RGB1,              if color0 > color1 and code(x,y) == 1
      (2*RGB0+RGB1)/3,   if color0 > color1 and code(x,y) == 2
      (RGB0+2*RGB1)/3,   if color0 > color1 and code(x,y) == 3

      RGB0,              if color0 <= color1 and code(x,y) == 0
      RGB1,              if color0 <= color1 and code(x,y) == 1
      (RGB0+RGB1)/2,     if color0 <= color1 and code(x,y) == 2
      BLACK,             if color0 <= color1 and code(x,y) == 3

The sampling operation performed on an opaque DXT1 Intel format essentially
hard-codes the comparison result of the two colors as color0 > color1.
This means that the behavior is incompatible with OpenGL. This is stated
in the SKL PRM, Vol 5: Memory Views:

   Opaque Textures (DXT1_RGB)
      Texture format DXT1_RGB is identical to DXT1, with the exception that the
      One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and
      the resulting texel color is derived strictly from the Opaque Color Encoding.
      The alpha channel defaults to 1.0.

      Programming Note
      Context: Opaque Textures (DXT1_RGB)
      The behavior of this format is not compliant with the OGL spec.

The opaque and non-opaque DXT1 OpenGL formats are specified to be
decoded in exactly the same way except the BLACK value must have a
transparent alpha channel in the latter. Use the four-channel BC1 Intel
formats with the alpha set to 1 to provide the behavior required by the
spec. Note that the alpha is already set to 1 for RGB formats in
brw_get_texture_swizzle().

v2: Provide a more detailed commit message (Kenneth Graunke).
v3: Ensure the alpha channel is set to 1 for DXT1 formats.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925
Cc: <mesa-stable@lists.freedesktop.org>
Acked-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 688ddb85c8)
2017-05-19 23:14:39 +01:00
Nanley Chery
6e977a358f anv/formats: Update the three-channel BC1 mappings
The procedure for decompressing an opaque BC1 Vulkan format is dependant on the
comparison of two colors stored in the first 32 bits of the compressed block.
Here's the specified OpenGL (and Vulkan) behavior for reference:

   The RGB color for a texel at location (x,y) in the block is given by:

      RGB0,              if color0 > color1 and code(x,y) == 0
      RGB1,              if color0 > color1 and code(x,y) == 1
      (2*RGB0+RGB1)/3,   if color0 > color1 and code(x,y) == 2
      (RGB0+2*RGB1)/3,   if color0 > color1 and code(x,y) == 3

      RGB0,              if color0 <= color1 and code(x,y) == 0
      RGB1,              if color0 <= color1 and code(x,y) == 1
      (RGB0+RGB1)/2,     if color0 <= color1 and code(x,y) == 2
      BLACK,             if color0 <= color1 and code(x,y) == 3

The sampling operation performed on an opaque DXT1 Intel format essentially
hard-codes the comparison result of the two colors as color0 > color1. This
means that the behavior is incompatible with OpenGL and Vulkan. This is stated
in the SKL PRM, Vol 5: Memory Views:

   Opaque Textures (DXT1_RGB)
      Texture format DXT1_RGB is identical to DXT1, with the exception that the
      One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and
      the resulting texel color is derived strictly from the Opaque Color Encoding.
      The alpha channel defaults to 1.0.

      Programming Note
      Context: Opaque Textures (DXT1_RGB)
      The behavior of this format is not compliant with the OGL spec.

The opaque and non-opaque BC1 Vulkan formats are specified to be decoded in
exactly the same way except the BLACK value must have a transparent alpha
channel in the latter. Use the four-channel BC1 Intel formats with the alpha
set to 1 to provide the behavior required by the spec.

v2 (Kenneth Graunke):
- Provide a more detailed commit message.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 56458cb168)
2017-05-19 23:14:33 +01:00
Tom Stellard
e0df523795 gallivm: Make sure module has the correct data layout when pass manager runs
The datalayout for modules was purposely not being set in order to work around
the fact that the ExecutionEngine requires that the module's datalayout
matches the datalayout of the TargetMachine that the ExecutionEngine is
using.

When the pass manager runs on a module with no datalayout, it uses
the default datalayout which is little-endian.  This causes problems
on big-endian targets, because some optimizations that are legal on
little-endian or illegal on big-endian.

To resolve this, we set the datalayout prior to running the pass
manager, and then clear it before creating the ExectionEngine.

This patch fixes a lot of piglit tests on big-endian ppc64.

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 14e525a4d7)
2017-05-19 23:14:24 +01:00
Chad Versace
6199b3d485 egl: Partially revert 23c86c74, fix eglMakeCurrent
Fixes regressions in Android CtsVerifier.apk on Intel Chrome OS devices
due to incorrect error handling in eglMakeCurrent. See below on how to
confirm the regression is fixed.

This partially reverts

    commit 23c86c74cc
    Author:  Chad Versace <chadversary@chromium.org>
    Subject: egl: Emit error when EGLSurface is lost

The problem with commit 23c86c74 is that, once an EGLSurface became
lost, the app could never unbind the bad surface. Each attempt to unbind
the bad surface with eglMakeCurrent failed with EGL_BAD_CURRENT_SURFACE.

Specificaly, the bad commit added the error handling below. #2 and #3
were right, but #1 was wrong.

    1. eglMakeCurrent emits EGL_BAD_CURRENT_SURFACE if the calling
       thread has unflushed commands and either previous surface is no
       longer valid.

    2. eglMakeCurrent emits EGL_BAD_NATIVE_WINDOW if either new surface
       is no longer valid.

    3. eglSwapBuffers emits EGL_BAD_NATIVE_WINDOW if the swapped surface
       is no longer valid.

Whe I wrote the bad commit, I misunderstood the EGL spec language
for #1. The correct behavior is, if I understand correctly now, is
below. This patch doesn't implement the correct behavior, though, it
just reverts the broken behavior.

    - Assume a bound EGLSurface is no longer valid.
    - Assume the bound EGLContext has unflushed commands.
    - The app calls eglMakeCurrent. The spec requires eglMakeCurrent to
      implicitly flush. After flushing, eglMakeCurrent emits
      EGL_BAD_CURRENT_SURFACE and does *not* alter the thread's
      current bindings.
    - If the app calls eglMakeCurrent again, and the app inserts no
      commands into the GL command stream between the two eglMakeCurrent
      calls, then this second eglMakeCurrent succeeds without emitting an
      error.

How to confirm this fixes the regression:

    Download android-cts-verifier-7.1_r5-linux_x86-x86.zip from
    source.android.com, unpack, and `adb install CtsVerifier.apk`.
    Run test "Projection Cube". Click the Pass button (a
    green checkmark). Then run test "Projection Widget". Confirm that
    widgets are visible and that logcat does not complain about
    eglMakeCurrent failure.

    Then confirm there are no regressions in the cts-traded module that
    commit 263243b1 fixed:

        cts-tf > run cts --skip-preconditions --skip-device-info \
                 -m CtsCameraTestCases \
                 -t android.hardware.camera2.cts.RobustnessTest

    Tested with Chrome OS board "reef".

Fixes: 23c86c74 (egl: Emit error when EGLSurface is lost)
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 8f62d21bd7)
2017-05-19 23:14:12 +01:00
Rob Clark
6c5bcc6473 freedreno: fix crash when flush() but no rendering
If we haven't created a batch, just bail in pipe->flush(), since there
is nothing to do.

Fixes crash in warsow, which creates a whole bunch of contexts used for
nothing but texture uploads.

Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit e4ad86952a)
2017-05-18 18:45:20 +01:00
Daniel Stone
15338b0d19 gbm/dri: Fix sign-extension in modifier query
When we were assembling the unsigned 64-bit query return from its
two signed 32-bit component parts, the lower half was getting
sign-extended into the top half. Be more explicit about what we want to
do.

Fixes gbm_bo_get_modifier() returning ((1 << 64) - 1) rather than
((1 << 56) - 1), i.e. DRM_FORMAT_MOD_INVALID.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
(cherry picked from commit 80ac89a952)
Fixes: 8378c576ab ("gbm: Export a get modifiers")
2017-05-18 18:24:06 +01:00
Andres Gomez
700dcb9ab4 bin/get-fixes-pick-list.sh: bring back the warning
We warn again if there are more than one line with the "fixes:" tag.

The warning is silenced when the commit has already landed or each
fixes tag reference a commit that is in branch.

v2:
 - Warn if any of the fixes tags has not landed (Emil)

v3:
 - Remove unnecessary head command
 - Clarify commit message (Emil)
 - Skip already picked commits sooner (Emil)

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b7af0ddfef)
2017-05-18 18:03:30 +01:00
Andres Gomez
81bdf59610 bin/get-fixes-pick-list.sh: don't warn if more than one, go over them
If an identified commit was having more than one fix, we would warn
about that and only treat the first.

Now, we don't warn but treat all of them.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 77306e2afc)
2017-05-18 18:03:14 +01:00
Juan A. Suarez Romero
68e64d92bc bin/get-{extra,fixes}-pick-list.sh: improve output
Show the commit hash and the title in a way that it is easier to copy
and paste in the bin/.cherry-ignore-extra file if we want to ignore
those commits for the future.

v2:
- Use printf instead echo (Eric Engestrom)

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 3af7f8275b)
2017-05-18 18:03:06 +01:00
Juan A. Suarez Romero
364048cf42 bin/get-{extra,fixes}-pick-list.sh: add support for ignore list
Both scripts does not use a file with the commits to ignore. So if we
have handled one of the suggested commits and decided we won't pick it,
the scripts will continue suggesting them.

v2:
- Mark the candidates in bin/get-extra-pick-list.sh (Juan A. Suarez)
- Use bin/.cherry-ignore to store rejected patches (Emil)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 99b41631bb)
2017-05-18 18:02:56 +01:00
Nicolai Hähnle
72a8fd8d50 st/mesa: remove an incorrect assertion
There is really no reason why the current DrawBuffer needs to be complete
at this point. In particular, the assertion gets hit on the X server side
in libglx when running .../piglit/bin/glx-get-current-display-ext -auto
(which uses indirect GLX rendering).

Fixes: 19b61799e3 ("st/mesa: don't cast the incomplete framebufer to st_framebuffer")
Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 377877ff5f)
2017-05-18 18:01:53 +01:00
Chih-Wei Huang
5cace16ac6 Android: correct libz dependency
Commit 6facb0c0 ("android: fix libz dynamic library dependencies")
unconditionally adds libz as a dependency to all shared libraries.
That is unnecessary.

Commit 85a9b1b5 introduced libz as a dependency to libmesa_util.
So only the shared libraries that use libmesa_util need libz.

Fix Android Lollipop build by adding the include path of zlib to
libmesa_util explicitly instead of getting the path implicitly
from zlib since it doesn't export the include path in Lollipop.

Fixes: 6facb0c0 "android: fix libz dynamic library dependencies"

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
(cherry picked from commit bfc0c23843)
2017-05-18 18:01:44 +01:00
Emil Velikov
d6439cb297 configure: remove unneeded bits around libunwind handling
If libunwind is not found we'll fail at PKG_CHECK_MODULES, so the
follow-up check will be false. Additionally the AM_CONDITIONAL is not
used, so we can drop it.

Fixes: 3bcef6aa24 ("configure.ac: honour --disable-libunwind if the .pc file is present")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 709468a808)
2017-05-18 18:01:10 +01:00
Emil Velikov
0e4c34b347 radeon: automake: remove unneeded elf Cflags/Libs
No longer required as of commit d90bf4ef3e ("radeon: remove unused
radeon_elf_util.{c,h}")

v2: Add the required libelf link in src/amd/Makefile.common.am

Fixes: d90bf4ef3e ("radeon: remove unused  radeon_elf_util.{c,h}")
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
(cherry picked from commit 88b8aaea3b)
2017-05-18 18:00:59 +01:00
Grazvydas Ignotas
f56fff79e7 anv: don't leak DRM devices
After successful drmGetDevices2() call, drmFreeDevices() needs to be
called.

Fixes: b1fb6e8d "anv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> # radv version
(cherry picked from commit 0ef302638f)
2017-05-18 18:00:41 +01:00
Grazvydas Ignotas
70cbcb2d39 anv: fix possible stack corruption
drmGetDevices2 takes count and not size. Probably hasn't caused problems
yet in practice and was missed as setups with more than 8 DRM devices
are not very common.

Fixes: b1fb6e8d "anv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit e0aee8b667)
2017-05-18 18:00:33 +01:00
Samuel Iglesias Gonsálvez
5755f40874 i965/vec4: load dvec3/4 uniforms first in the push constant buffer
Reorder the uniforms to load first the dvec4-aligned variables in the
push constant buffer and then push the vec4-aligned ones. It takes
into account that the relocated uniforms should be aligned to their
channel size.

This fixes a bug were the dvec3/4 might be loaded one part on a GRF and
the rest in next GRF, so the region parameters to read that could break
the HW rules.

v2:
- Fix broken logic.
- Add a comment to explain what should be needed to optimise the usage
  of the push constant buffer slots, as this patch does not pack the
  uniforms.

v3:
- Implemented the push constant buffer usage optimization.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit e69e5c7006)
2017-05-18 17:57:52 +01:00
Samuel Iglesias Gonsálvez
085efa0261 i965/vec4: fix swizzle and writemask when loading an uniform with constant offset
It was setting XYWZ swizzle and writemask to all uniforms, no matter if they
were a vector or scalar, so this can lead to problems when loading them
to the push constant buffer.

Moreover, 'shift' calculation was designed to calculate the offset in
DWORDS, but it doesn't take into account DFs, so the calculated swizzle
for the later ones was wrong.

The indirect case is not changed because MOV INDIRECT will write
to all components. Added an assert to verify that these uniforms
are aligned.

v2:
- Fix 'shift' calculation (Curro)
- Set both swizzle and writemask.
- Add assert(shift == 0) for the indirect case.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 8aa6ada838)
2017-05-18 17:57:52 +01:00
Samuel Iglesias Gonsálvez
2401051b16 i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution
We are going to add a packing feature to reduce the usage of the push
constant buffer. One of the consequences is that 'nr_params' would be
modified by vec4_visitor's run call, so we need to restore it if one of
them failed before executing the fallback ones. Same thing happens to the
uniforms values that would be reordered afterwards.

Fixes GL45-CTS.arrays_of_arrays_gl.InteractionFunctionCalls2 when
the dvec4 alignment and packing patch is applied.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 354f7f2cb9)
2017-05-18 17:57:52 +01:00
Eric Anholt
4b14ad64d0 vc4: Don't allocate new BOs to avoid synchronization when they're shared.
If X11 did a software fallback to the entire screen, we would throw out
the BO the screen is scanning out from and allocate a new one.

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit e8ea42d245)
2017-05-18 17:57:52 +01:00
Hans de Goede
bcd09ef32e glxglvnddispatch: Add missing dispatch for GetDriverConfig
Together with some fixes to xdriinfo this fixes xdriinfo not working
with glvnd.

Since apps (xdriinfo) expect GetDriverConfig to work without going to
need through the dance to setup a glxcontext (which is a reasonable
expectation IMHO), the dispatch for this ends up significantly different
then any other dispatch function.

This patch gets the job done, but I'm not really happy with how this
patch turned out, suggestions for a better fix are welcome.

Cc: Kyle Brenneman <kbrenneman@nvidia.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 84f764a759)
2017-05-18 17:57:52 +01:00
Pohjolainen, Topi
6123a076d0 intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4
The reasoning Chad gave in the comment for choosing a valign of 4 is
entirely bunk.  The fact that you have to multiply pitch by 2 is
completely unrelated to the halign/valign parameters used for texture
layout.  (Not completely unrelated.  W-tiling is just Y-tiling with a
bit of extra swizzling which turns 8x8 W-tiled chunks into 16x4 y-tiled
chunks so it makes everything easier if miplevels are always aligned to
8x8.)  The fact that RENDER_SURFACE_STATE::SurfaceVerticalAlignmet
doesn't have a VALIGN_8 option doesn't matter since this is gen7 and you
can't do stencil texturing anyway.

v2 (Jason Ekstrand):
 - Delete most of Chad's comment and add a more descriptive commit
   message.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 236f17a9f7)
2017-05-18 17:57:52 +01:00
Rob Clark
691d42700b mesa/st: fix yuv EGLImage's
Don't reject YUV formats that the driver doesn't handle natively, since
mesa/st already knows how to lower this in shader.

Reported-by: Nicolas Dechesne <ndec@linaro.org>
Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling")
Cc: 17.1 <mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Nicolas Dechesne <ndec@linaro.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 8b4588b090)
2017-05-18 17:57:52 +01:00
Lucas Stach
f36cd7fc57 etnaviv: allow R/B swapped surfaces to be cleared
Fixes: 7f62ffb68a ("etnaviv: add support for rb swap")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 20ce6f1361)
2017-05-18 17:57:52 +01:00
Lucas Stach
c006ced2c9 etnaviv: stop oversizing buffer resources
PIPE_BUFFER is a target enum, not a binding. This caused the driver to
up-align the height of buffer resources, leading to largely oversizing
those resources. This is especially bad, as the buffer resources used
by the upload manager are already 1MB in size. Height alignment meant
that those would result in 4 to 8MB big BOs.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 8173d7d9e8)
2017-05-18 17:57:51 +01:00
Nicolai Hähnle
5c9b59de8b radeonsi: fix gl_PrimitiveIDIn in geometry shader when using tessellation
This builds on commit 0549ea15ec ("radeonsi: fix primitive ID in
fragment shader when using tessellation").

Fixes piglit
arb_tessellation_shader/execution/gs-primitiveid-instanced.shader_test

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit f4dbe2efb7)
2017-05-18 17:57:51 +01:00
Marek Olšák
b7d7458b9a radeonsi/gfx9: add support for Raven
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 7622181cad)
2017-05-18 17:57:51 +01:00
Marek Olšák
e39c07dbdf amd/addrlib: import Raven support
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit efdb378c36)
2017-05-18 17:57:51 +01:00
Eric Anholt
3b9b7a1342 renderonly: Initialize fields of struct winsys_handle.
vc4 was rejecting renderonly's import, because the offset field was
nonzero.

Fixes: 848b49b288 ("gallium: add renderonly library")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit c98f03c6eb)
2017-05-18 17:57:51 +01:00
Alex Deucher
054a27c508 radeonsi: add new vega10 pci ids
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 2f0450c627)
2017-05-18 17:57:51 +01:00
Bruce Cherniak
1b3704c22d swr: move msaa resolve to generalized StoreTile
v3: list piglit tests fixed by this patch. Fixed typo Tim pointed out.
v2: Reword commit message to more closely adhere to community
guidelines.

This patch moves msaa resolve down into core/StoreTiles where the
surface format conversion routines are available.  The previous
"experimental" resolve was limited to 8-bit unsigned render targets.

This fixes a number of piglit msaa tests by adding resolve support for
all the render target formats we support.

Specifically:
layered-rendering/gl-layer-render: fail->pass
layered-rendering/gl-layer-render-storage: fail->pass
multisample-formats *[2,4,8,16] gl_arb_texture_rg: crash->pass
multisample-formats *[2,4,8,16] gl_ext_texture_snorm: crash->pass
multisample-formats *[2,4,8,16] gl_arb_texture_float: fail->pass
multisample-formats *[2,4,8,16] gl_arb_texture_rg-float: fail->pass

MSAA is still disabled by default, but can be enabled with
"export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options)
The default is 0, which is disabled.

This patch improves the number of multisample-formats supported by swr,
and fixes several crashes currently in the 17.1 branch.  Therefore, it
should be considered for inclusion in the 17.1 stable release.  Being
disabled by default, it poses no risk to most users of swr.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit f52e63069a)
2017-05-18 17:57:51 +01:00
Nicolai Hähnle
ad3b5b7f5f radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit f16b755863)
2017-05-18 17:57:51 +01:00
Nicolai Hähnle
35ec26bb00 radeonsi: fix primitive ID in fragment shader when using tessellation
In a VS->TCS->TES->PS pipeline, the primitive ID is read from TES exports,
so it is as if TES were using the primitive ID.

Specifically, this fixes a bug where the primitive ID is not reset at
the start of a new instance.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 0549ea15ec)
2017-05-18 17:41:09 +01:00
Nicolai Hähnle
424bf46f27 radeonsi: mark fast-cleared textures as compressed when dirtying
There are a bunch of piglit fast clear tests that regressed on SI, for
example ./bin/ext_framebuffer_multisample-fast-clear single-sample.

The problem is that a texture is bound as a framebuffer, cleared, and
then rendered from in a loop that loops through different clear colors.
The texture is never rebound during all this, so the change to
tex->dirty_level_mask during fast clear was not taken into account
when checking for compressed textures.

I have considered simply reverting the problematic commit. However,
I think this solution is better. It does require looping through all
bound textures after a fast clear, but the alternative would require
visiting more textures needless on every draw. Draws are much more
common than clears.

Note that the rendering feedback loop rules do not apply here, because
the framebuffer binding is changed between the glClear and the draw
that samples from the texture that was cleared.

Fixes: bdd6449769 ("radeonsi: don't mark non-dirty textures with CMASK as compressed")
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 854ed47f3e)
2017-05-18 17:41:09 +01:00
Emil Velikov
806f802e7b docs: add sha256 checksums for 17.1.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-10 15:20:37 +01:00
Emil Velikov
15a38605fc docs: Update 17.1.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-10 12:11:03 +01:00
Emil Velikov
0831cc7c2f Update version to 17.1.0(final)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-10 12:02:52 +01:00
Dave Airlie
43678114c7 radv: don't advertise transfer props unless we can do anything else
There is no reason to advertise transfer ability for formats we can't
use for anything else. This stops some CTS tests hitting internal
error for 64-bit types when they see the transfer flags.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit efa19f5a54)
2017-05-10 11:29:28 +01:00
Dave Airlie
072b1f5270 radv/ac: canonicalize the output for 32-bit float min/max.
This fixes:
dEQP-VK.glsl.builtin.precision.min.*
dEQP-VK.glsl.builtin.precision.max.*
dEQP-VK.glsl.builtin.precision.clamp.*

The problem is the hw doesn't compare denorms properly,
so we have to flush them, even though the spec says
flushing is optional, if you don't flush the results
should be correct.

The -pro driver changes the shader float mode,
it would be nice if llvm could grow that perhaps.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3bf3f9866c)
2017-05-10 11:28:45 +01:00
Dave Airlie
bd79ce4356 radv: flush f32->f16 conversion denormals to zero. (v2)
SPIR-V defines the f32->f16 operation as flushing denormals to 0,
this compares the class using amd class opcode.

Thanks to Matt Arsenault for figuring it out.

This fix is VI+ only, add a TODO for SI/CIK.

This fixes:
dEQP-VK.spirv_assembly.instruction.compute.opquantize.flush_to_zero

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 83e58b036e)
2017-05-10 11:28:07 +01:00
Dave Airlie
0640bae86c radv: flush more stages when semaphore are waiting.
This still doesn't give us complete pWaitDstStageMask support,
but it should provide enough to be correct if not as efficent as
possible.

If we have wait semaphores we must flush between submits and
flush the shaders as well.

This fixes the remaining fails in:
dEQP-VK.synchronization.op.single_queue.semaphore.*ssbo*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a524704025)
2017-05-10 11:26:38 +01:00
Dave Airlie
9b808c5748 radv: fix stencil only clears.
If we are clearing stencil only, we still need to provide a
a valid Z output from the vertex shader, we can't rely
on the depth clear value having any meaning, as we use this
for the position output, and it could get clipped, so we
don't end up clearing anything.

Fixes:
dEQP-VK.renderpass.simple.stencil
since I added S8 support.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3c73063974)
2017-05-10 11:26:17 +01:00
Dave Airlie
9105e36765 radv/wsi: report presentation error per image request
This ports
0fcb92c17d
anv: wsi: report presentation error per image request

This fixes:
dEQP-VK.wsi.xlib.incremental_present.scale_none.*

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 09034aab64)
2017-05-10 11:25:33 +01:00
Daniel Stone
e1678159b1 i915: Fix build break with empty unreachable()
Actually put something in unreachable(), so as not to break the build on
a Friday evening.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reported-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit d4342b1398)
Fixes: 467332a0ab ("i965: Use helper function for modifier -> tiling")
Fixes: 8b8af19065 ("i965: Set modifier for imported and duplicated images")
2017-05-10 11:17:05 +01:00
Emil Velikov
da13cc7e4b Update version to 17.1.0-rc4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-05-08 11:40:34 +01:00
Dave Airlie
3db01cd4e7 radv: apply the tess+GS hang workaround to Polaris12 as well
As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 2add79a732)
2017-05-08 11:37:10 +01:00
Fredrik Höglund
396f9ae52f radv/meta: fix restoring a push descriptor set
radv_bind_descriptor_set cannot be used to bind a push descriptor set
since a push descriptor set does not have a buffer list. However,
there is no need to add the buffers again when restoring a set, so
this fix is also an optimization.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 5ff4858111)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_meta.c
2017-05-08 11:36:26 +01:00
Kenneth Graunke
0eaab97f21 i965: Don't try to unmap NULL program cache BO.
When running shader-db with intel_stub and recent Mesa, context creation
fails when making a logical hardware context.  In this case, we call
intelDestroyContext(), which gets here and tries to unmap the cache BO.

But there isn't one - we haven't made it yet.  So we try to unmap a
NULL pointer, which used to be safe (it did nothing), but crashes
after commit 7c3b8ed878.

The result is that we crash rather than failing context creation with
a nice message.  Either way nothing works, but this is more polite.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit bc074a4518)
2017-05-08 11:33:00 +01:00
Kenneth Graunke
b0394dfe2f Revert "mesa: Require mipmap completeness for glCopyImageSubData(), sometimes."
This reverts commit c5bf7cb529.

This broke rendering in "Total War: WARHAMMER", which uses a single
level RGBA_UINT32 texture and the default filter modes of GL_LINEAR
and GL_NEAREST_MIPMAP_LINEAR.  However, the texture max level is 0,
so it is actually mipmap complete - it's the integer + linear rule
that causes the error.

I'm working with Khronos to find a real solution.  However it turns
out, this patch is not correct and breaks real programs, so let's
revert it for now.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100690
Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16224
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 1456da91c8)
2017-05-08 11:32:57 +01:00
Rob Clark
639481e340 freedreno/a3xx: fix hang w/ large render targets and small gmem
Possibly other gen's have a similar limit.  Fixes glmark2 -b shadow
with larger resolutions on devices with small gmem (for example,
fullscreen 1080p on 8x16/db410c).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 6050d5bf3d)
2017-05-08 11:32:49 +01:00
Daniel Stone
ee0254a12f i965: Set modifier for imported and duplicated images
When a buffer is being created from FD or GEM flink import, the current
API makes no provision for passing modifier information along with this.
Set the modifier for such images to DRM_FORMAT_MOD_INVALID.

Also preserve the modifier when duplicating an image, as will be done by
GBM when importing from a wl_buffer.

This doubly tripped up Wayland, as the images would first have been
created (as wl_buffers) with a 0 modifier, and then lost what modifier
they would've had when being duplicated into gbm_bos.

Fixes: d78a36ea62 ("i965/dri: Handle the linear fb modifier")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 8b8af19065)
2017-05-08 11:24:05 +01:00
Daniel Stone
5b7cc779d2 i965: Use helper function for modifier -> tiling
Use a helper function and struct to convert between a modifier and
tiling mode, so we can use it later for a tiling -> modifier lookup.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 467332a0ab)
2017-05-08 11:24:05 +01:00
Grazvydas Ignotas
ae9a2c1fc4 radv: don't leak DRM devices
After successful drmGetDevices2() call, drmFreeDevices() needs to be called.

Fixes: 743315f2 "radv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 8aab792e92)
2017-05-08 11:24:05 +01:00
Grazvydas Ignotas
64b98a1e72 radv: fix possible stack corruption
drmGetDevices2 takes count and not size. Probably hasn't caused problems
yet in practice and was missed as setups with more than 8 DRM devices
are not very common.

Fixes: 743315f2 "radv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 898cbb491b)
2017-05-08 11:24:05 +01:00
Bas Nieuwenhuizen
7bbece985e radv: Don't set dynamic state for pipelines with rasterizer dicard.
All of the dynamic states apply to rasterization & fragment processing,
so we don't need to set them if we don't rasterize.

We don't clear the dirty flags for them though, so we don't miss any
updates for the next pipeline with rasterization.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: 76603aa90b "radv: Drop the default viewport when 0 viewports are given."
(cherry picked from commit 9e847eedd5)
2017-05-08 11:24:05 +01:00
Marek Olšák
929ae9581c radeonsi: apply the tess+GS hang workaround to Polaris12 as well
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit ee5908396e)
2017-05-08 11:24:05 +01:00
Dave Airlie
d4c08bc8c1 radv: enable POLARIS12 support.
This just adds the chip in the right places.

We don't set the partial_vs_wave workaround, as radeonsi
doesn't, but have to confirm it's not required.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a096d8d3f7)
2017-05-08 11:24:04 +01:00
Nicolas Boichat
cd284ce928 egl/android: Set EGLSurface.Lost to EGL_TRUE/EGL_FALSE
Lost is an EGLBoolean, so we should assign it to EGL_TRUE/EGL_FALSE,
not true/false.

Fixes: e5eace5868 ("egl/android: Mark surface as lost when dequeueBuffer fails")
Fixes: 0212db3504 ("egl/android: Cancel any outstanding ANativeBuffer in surface destructor")
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 63b12b0c77)
2017-05-08 11:24:04 +01:00
Chad Versace
e972294b8e egl/android: Mark surface as lost when dequeueBuffer fails
This ensures that future calls to eglSwapBuffers and eglMakeCurrent emit
an error.

This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.

Cc: mesa-stable@lists.freedesktop.org
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e5eace5868)
2017-05-08 11:24:04 +01:00
Chad Versace
5ef17d6854 egl/android: Cancel any outstanding ANativeBuffer in surface destructor
That is, call ANativeWindow::cancelBuffer in droid_destroy_surface().

This should prevent application deadlock when the app destroys the
EGLSurface after EGL has acquired a buffer from SurfaceFlinger
(ANativeWindow::dequeueBuffer) but before EGL has released it
(ANativeWindow::enqueueBuffer).

This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.

Cc: mesa-stable@lists.freedesktop.org
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 0212db3504)
2017-05-08 11:24:04 +01:00
Chad Versace
1a23aff6b7 egl: Emit error when EGLSurface is lost
Add a new bool, _EGLSurface::Lost, and check it in eglMakeCurrent and
eglSwapBuffers. The EGL 1.5 spec says that those functions emit errors
when the native surface is no longer valid.

This patch just updates core EGL. No driver sets _EGLSurface::Lost yet.

I discovered that Mesa failed to detect lost surfaces while debugging an
Android CTS camera test,
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface.
This patch doesn't fix the test though, though, because the test expects
EGL_BAD_SURFACE when the surface becomes lost, and this patch actually
complies with the EGL spec. If I interpreted the EGL spec correctly,
EGL_BAD_NATIVE_WINDOW or EGL_BAD_CURRENT_SURFACE is the correct error.

Cc: mesa-stable@lists.freedesktop.org
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 23c86c74cc)
2017-05-08 11:24:04 +01:00
Marek Olšák
9a226fa669 winsys/amdgpu: fix Polaris12 (RX 550) breakage
reported by Greg White.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100892
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 69e6eab653)
2017-05-08 11:24:04 +01:00
Marek Olšák
41dfe1f275 radeonsi/gfx9: make some PA & DB registers match the closed Vulkan driver
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 283a1d1e27)
2017-05-08 11:24:04 +01:00
Emil Velikov
ba6cb5d97a glx: glX_proto_send.py: use correct compile guard GLX_INDIRECT_RENDERING
The code itself has nothing to do with shared glapi, thus having it
behind GLX_SHARED_GLAPI is misleading. Use GLX_INDIRECT_RENDERING
instead.

The latter macro is set at global scope by the Autotools and Scons build
systems.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 6177d60a37)
2017-05-08 11:24:04 +01:00
Emil Velikov
7e4b3aec9f mesa/dri: always link against shared glapi
Analogous to previous commit. Check with the extensive commit
description and bug report referenced.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 51accecce7)
2017-05-08 11:24:04 +01:00
Emil Velikov
124e7b3bc8 gallium/dri: always link against shared glapi
In the early days of Xorg and Mesa we had multiple providers of the
GLAPI. All of those were the ones responsible for dlopening the DRI
module. Hence it was perfectly fine, and actually expected, for the DRI
modules to have unresolved symbols.

Since then we've moved the API to a separate shared library and no other
libraries provide the symbols.

Here comes the picky part:
It's possible that one uses old Xorg (where libglx.so provides the
GLAPI) and new Mesa (with DRI modules linking against libglapi.so).

That should still work, since the the libglx.so symbols will take
precedence over the libglapi.so ones.

I've verified this while running 1.14 series Xorg alongside this (and
next) patch.

It may seem a bit fragile, but that's of reasonably OK since all of the
affected Xorg versions have been EOL for years.

The final one being the 1.14 series, which saw its final bug fix release
1.14.7 in June 2014.

To ensure that the binaries do not have unresolved symbols add
-no-undefined and $(LD_NO_UNDEFINED), just like we do everywhere else
throughout mesa.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98428
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 79a26b663a)
2017-05-08 11:24:04 +01:00
Ben Boeckel
5c43c3fc73 scons: update for LLVM 4.0
LLVMDemangle, LLVMGlobalISel, and LLVMDebugInfoMSF are new.

Also update the comment to add irreader to the list of components.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chuck Atkins <chuck.atkins@kitware.com>
Signed-off-by: Ben Boeckel <ben.boeckel@kitware.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 58f51f0754)
2017-05-08 11:24:03 +01:00
Adam Jackson
0bd957be11 egl/platform/drm: Don't take display ownership until gbm is initialized
If the gbm_create_device() call here actually did fail, any subsequent
eglTerminate on the display would segfault.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit f258815c7d)
2017-05-08 11:24:03 +01:00
Samuel Iglesias Gonsálvez
4ad2c57c26 anv: anv_gem_mmap() returns MAP_FAILED as mapping error
Take it into account when checking if the mapping failed.

v2:
- Remove map == NULL and its related comment (Emil)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

Fixes: 6f3e3c715a ("vk/allocator: Add a BO pool")
Fixes: 9919a2d34d ("anv/image: Memset hiz surfaces to 0 when binding memory")
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b546c9d318)

Squashed with:

anv: vkBindImageMemory() should return VK_ERROR_OUT_OF_{HOST,DEVICE}_MEMORY on failure

According to the spec we get VK_ERROR_OUT_OF_HOST_MEMORY or
VK_ERROR_OUT_OF_DEVICE_MEMORY on vkBindImageMemory failure.

Fixes returned value changed by b546c9d.

Fixes: b546c9d ("anv: anv_gem_mmap() returns MAP_FAILED as mapping error")
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 939b015736)

Squashed with:

anv: fix anv_gem_mmap comment to not mention NULL

The function cannot return NULL, update the comment accordingly.

Fixes: b546c9d ("anv: anv_gem_mmap() returns MAP_FAILED as mapping error")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 9d2aa6e506)
2017-05-08 11:23:40 +01:00
Marek Olšák
14bbc51e6d radeonsi/gfx9: fix gl_ViewportIndex
v2: remove unnecessary LLVMBuildAnd calls

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit f466683cb0)
2017-05-05 19:35:08 +01:00
Christian Gmeiner
caa6baa688 etnaviv: add L8A8_UNORM texture format
No piglit regressions.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
(cherry picked from commit a8007ed687)
2017-05-05 19:35:08 +01:00
Samuel Iglesias Gonsálvez
56922e8f33 i965/vec4: don't modify regioning parameters to the sources of DF align1 instructions
The regioning parameters are now properly set by convert_to_hw_regs()
and we don't need to fix them in the generator. That latter fix
previously done in the generator was strictly speaking wrong for any
non-identity regions.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit f57e234fdd)
2017-05-05 19:35:08 +01:00
Samuel Iglesias Gonsálvez
6c96e750f1 i965/vec4: fix register width for DF VGRF and UNIFORM
On gen7, the swizzles used in DF align16 instructions works for element
size of 32 bits, so we can address only 2 consecutive DFs. As we assumed that
in the rest of the code and prepare the instructions for this (scalarize_df()),
we need to set it to two again.

However, for DF align1 instructions, a width of 2 is wrong as we are not
reading the data we want. For example, an uniform would have a region of
<0, 2, 1> so it would repeat the first 2 DFs, when we wanted to access
to the first 4.

This patch sets the default one to 4 and then modifies the width of
align16 instruction's DF sources when we translate the logical swizzle
to the physical one.

v2:
- Remove conditional (Curro).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit aaeb1c99be)
2017-05-05 19:35:08 +01:00
Samuel Iglesias Gonsálvez
ca357be5aa i965/vec4: fix vertical stride to avoid breaking region parameter rule
From IVB PRM, vol4, part3, "General Restrictions on Regioning
Parameters":

  "If ExecSize = Width and HorzStride ≠ 0, VertStride must
   be set to Width * HorzStride."

In next patch, we are going to modify the region parameter for
uniforms and vgrf. For uniforms that are the source of
DF align1 instructions, they will have <0, 4, 1> regioning and
the execsize for those instructions will be 4, so they will break
the regioning rule. This will be the same for VGRF sources where
we use the vstride == 0 exploit.

As we know we are not going to cross the GRF boundary with that
execsize and parameters (not even with the exploit), we just fix
the vstride here.

v2:
- Move is_align1_df() (Curro)
- Refactor exec_size == width calculation (Curro)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 7f728bce81)
2017-05-05 19:35:08 +01:00
Philipp Zabel
e702379663 renderonly: use drmIoctl
To restart interrupted system calls, use drmIoctl.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit b539335e50)
2017-05-05 19:35:08 +01:00
Philipp Zabel
ff27a47807 renderonly: drop resources on destroy
The renderonly_scanout holds a reference on its prime pipe resource,
which should be released when it is destroyed. If it was created by
renderonly_create_kms_dumb_buffer_for_resource, the dumb BO also has
to be destroyed.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit cd8ee259c8)
2017-05-05 19:35:08 +01:00
Philipp Zabel
63d75fbfe3 renderonly: close transfer prime_fd
prime_fd is only used to transfer the scanout buffer to the GPU inside
renderonly_create_kms_dumb_buffer_for_resource. It should be closed
immediately to avoid leaking the DMA-BUF file handle.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit ab51cd2f26)
2017-05-05 19:35:08 +01:00
Eric Anholt
cabca7185b nir: Pick just the channels we want for bitmap and drawpixels lowering.
NIR now validates that SSA references use the same number of channels as
are in the SSA value.

v2: Reword commit message, since the commit didn't land before the
    validation change did.

Fixes: 370d68babc ("nir/validate: Validate that bit sizes and components always match")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit fba6559a1e)
2017-05-05 19:35:08 +01:00
Randy Xu
8020ce02fc i965: Solve Android native fence fd double close
The Android native fence in i965 has two fds: _EGLSync::SyncFd and
brw_fence::sync_fd.

The semantics of __DRI2fenceExtensionRec::create_fence_fd are unclear on
whether the DRI driver takes ownership of the incoming fd (which is the
same incoming fd from eglCreateSync).  i965 did take ownership, but all
other Mesa drivers do not; instead, they dup the incoming fd. As
a result, _EGLSync::SyncFd and brw_fence::sync_fd were the same fd, and
both egl_dri2 and i965 believed they owned it. On eglDestroySync, that
led to a double-close.

Fix the double-close by making brw_dri_create_fence_fd dup the incoming
fd, just like the other drivers do.

Signed-off-by: Randy Xu <randy.xu@intel.com>
Test: Run Vulkan and GLES stress test and no crash.
Fixes: 6403e37651 ("i965/sync: Implement fences based on Linux sync_file")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
[chadv: Polish the commit message]
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 6f21b5601c)
2017-05-05 19:35:08 +01:00
Eric Anholt
7b4b055a24 vc4: Only build the NEON code on arm32.
NEON is sufficiently different on arm64 that we can't just reuse this
code.  Disable it on arm64 for now.

v2: Use PIPE_ARCH_ARM instead, as __ARM_ARCH may be 8 for a 32-bit build
    for a v8 CPU.

Signed-off-by: Eric Anholt <eric@anholt.net>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d884d1a654)
2017-05-05 19:35:08 +01:00
Emil Velikov
72e52fa7c8 Update version to 17.1.0-rc3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-30 09:46:32 +01:00
Emil Velikov
6ca6d53e1c travis: bump MAKEFLAGS to -j4
The instance should have 2 cores, yet bumping the jobs to 4 should give
us a minor speed improvement.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit b1d45c3366)
2017-04-30 09:46:32 +01:00
Emil Velikov
5f88ebaf5c travis: enable wayland support
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 27a0b383b9)
2017-04-30 09:46:32 +01:00
Emil Velikov
f068a360cd travis: add Gallium state-tracker targets
Split into OpenCL and others, since the former is quite time consuming.

v2:
 - explicitly enable/disable components
 - build libvdpau 1.1 requirement
 - enable st/vdpau
 - build libva 1.6.2 (API 0.38) requirement

v3: Drop ubuntu-toolchain-r-test from sources (Andres)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 0e6a36cd3f)
2017-04-30 09:46:32 +01:00
Emil Velikov
e7cafd09ba travis: model scons check target like the make one
Should make things a bit more consistent across the board.

Cc: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit b3f2076549)
2017-04-30 09:46:32 +01:00
Emil Velikov
f76068b879 travis: split the make target to three separate ones
Split the target to allow faster builds for each run.

The overall build time will be more, yet Travis runs multiple builds in
parallel so we're limited by the slowest one.

Things are split roughly as:
 - DRI loaders, classic DRI drivers, classic OSMesa, make check
 - All Gallium drivers (minus the SWR) alongside st/dri (mesa)
 - The Vulkan drivers - ANV and RADV, make check (anv)

v2:
 - rework RUN_CHECK to MAKE_CHECK_COMMAND
 - explicitly disable DRI loaders
 - generate linux/memfd.h locally and enable ANV
 - add libedit-dev

v3: Use printf to create the header (Andres).
v4: Really add the libedit + printf hunks.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 7e2af37474)
2017-04-30 09:46:32 +01:00
Emil Velikov
ef6da453f0 travis: add "make swr" to the build matrix
v2: Quote OVERRIDE variables.
v3: Add missplaced libedit-dev hunk (Andres).

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 8479fd8a10)
2017-04-30 09:46:32 +01:00
Emil Velikov
5b4bff2ddb travis: add "scons swr" to the build matrix
Requires GCC 5.0 (due to the C++14 requirement) and LLVM 3.9.

v2: Enable the target, add libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS, quote OVERRIDE
variables.
v4: Keep check target as-is (Andres)

Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: George Kyriazis <george.kyriazis@intel.com>
Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit f55d98ac85)
2017-04-30 09:46:32 +01:00
Emil Velikov
667cb4bc9e travis: add separate "scons" and "scons llvm" targets
The former does not require any LLVM, while the latter uses LLVM 3.3.

This way we'll quickly catch any LLVM 3.3+ functionality that gets
introduced where it shouldn't.

Add the full list of addons for each build permutation.

v2: Keep libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
v4:
 - Remove llvm-toolchain-trusty-3.3 source (Andres)
 - Keep check target as-is (Andres)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 85ee2c6cfc)
2017-04-30 09:46:32 +01:00
Emil Velikov
3f0b544745 travis: split out matrix from env
With next commits we'll add a couple of more options.

v2: Rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
v4: Keep check target as-is, will rework with later patch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 56ba252e23)
2017-04-30 09:46:31 +01:00
Emil Velikov
27d4beb2e1 travis: rework "if test" blocks in the script section
Split the "if test" blocks so that we get more sensible output in case
of a failure.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit abcfea23ad)
2017-04-30 09:46:31 +01:00
Emil Velikov
5e8e015db3 travis: remove unused -dev packages
We effectively override libdrm-dev and libxcb-dri2-0-dev since we build
and install the package locally.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit ae713a7b79)
2017-04-30 09:46:31 +01:00
Emil Velikov
135615caa0 travis: automatically manage ccache caching
According to the manual

"If you are using ccache, use:

  language: c # or other C/C++ variants

  cache: ccache

to cache $HOME/.ccache and automatically add /usr/lib/ccache to your
$PATH."

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 6431b98c54)
2017-04-30 09:46:31 +01:00
Emil Velikov
2acd78cfab travis: enable apt cache
Provides a small, but consistent improvement.
Example numbers of the jobs added later in the series.

"make loaders/classic DRI" - 1s
"scons SWR" - 6s

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 486f28ba88)
2017-04-30 09:46:31 +01:00
Andres Gomez
642228ceaf travis: add the possibility of using the txc-dxtn library
The txc-dxtn library implements the patented S3 Texture Compression
algorithm.

By default it won't be used but we add the possibility of setting the
USE_TXC_DXTN variable to yes in the travis web UI so it will be
installed and used for the scons tests.

Cc: Eric Anholt <eric@anholt.net>
Cc: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
[Emil Velikov: keep the LIB prefix, drop the LD_LIBRARY_PATH, fold URL]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 29322daef2)
2017-04-30 09:46:31 +01:00
Andres Gomez
12e7ec2c05 travis: replace Trusty-based LLVM toolchain apt-get with apt addon
Trusty's LLVM toochain repository was whitelisted some time ago. See:
479067c5e7

Signed-off-by: Andres Gomez <agomez@igalia.com>
[Emil Velikov]
 - set sudo to false
 - reference the Trusty change (Rhys)
 - keep libedit-dev
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7819d265c7)
2017-04-30 09:46:31 +01:00
Emil Velikov
f2d91f2065 travis: explicitly LD_LIBRARY_PATH the local libraries
Some of the libraries may be dlopened, which may not always work due to
the non-standard prefix that we're using.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit cb820daa3f)
2017-04-30 09:46:31 +01:00
Jason Ekstrand
9a97d9081d anv/cmd_buffer: Use the device allocator for QueueSubmit
The command is really operating on a Queue not a command buffer and the
nearest object to that with an allocator is VkDevice.

Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: "17.0 17.1" <mesa-dev@lists.freedesktop.org>
(cherry picked from commit bd3a9813b9)
2017-04-30 09:46:31 +01:00
Ilia Mirkin
a720963140 gallium/targets: fix bool setting on BE architectures
val_bool and val_int are in a union. val_bool gets the first byte, which
happens to work on LE when setting via the int, but breaks on BE. By
setting the value properly, we are able to use DRI3 on BE architectures.
Tested by running glxgears with a NV34 in a G5 PPC.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
[Emil Velikov: squash the vmwgfx hunk]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 6af14778a3)
2017-04-30 09:46:31 +01:00
Nicolai Hähnle
3f0740e87c st/mesa: don't cast the incomplete framebufer to st_framebuffer
The incomplete framebuffer is set for a surfaceless context. This leads to
the following error in piglit spec@egl_khr_surfaceless_context@viewport:

==26703==ERROR: AddressSanitizer: global-buffer-overflow on address 0x7f6886e43240 at pc 0x7f68854db0fd bp 0x7ffca404b3b0 sp 0x7ffca404b3a0
READ of size 8 at 0x7f6886e43240 thread T0
    #0 0x7f68854db0fc in st_viewport ../../../mesa-src/src/mesa/state_tracker/st_cb_viewport.c:57
    #1 0x556840176cdb in main tests/egl/spec/egl_khr_surfaceless_context/viewport.c:101
    #2 0x7f688edcf3f0 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x203f0)
    #3 0x556840176e19 in _start (/home/nha/amd/piglit/bin/egl-surfaceless-context-viewport+0xe19)

0x7f6886e43240 is located 32 bytes to the left of global variable 'DummyRenderbuffer' defined in '../../../mesa-src/src/mesa/main/fbobject.c:69:31' (0x7f6886e43260) of size 112
0x7f6886e43240 is located 8 bytes to the right of global variable 'IncompleteFramebuffer' defined in '../../../mesa-src/src/mesa/main/fbobject.c:73:30' (0x7f6886e42de0) of size 1112
SUMMARY: AddressSanitizer: global-buffer-overflow ../../../mesa-src/src/mesa/state_tracker/st_cb_viewport.c:57 in st_viewport

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek@olsak@amd.com>
(cherry picked from commit 19b61799e3)
2017-04-30 09:46:31 +01:00
Timothy Arceri
2609ac2b5a util/disk_cache: remove percentage based max cache limit
The more I think about it the more this seems like a bad idea.
When we were deleting old cache dirs this wasn't so bad as it
was unlikely we would ever hit the actual limit before things
were cleaned up. Now that we only start cleaning up old cache
items once the limit is reached the a percentage based max
cache limit is more risky.

For the inital release of shader cache I think its better to
stick to a more conservative cache limit, at least until we
have some way of cleaning up the cache more aggressively.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 22fa3d90a9)
2017-04-30 09:46:30 +01:00
Timothy Arceri
3597829605 disk_cache: use block size rather than file size
The majority of cache files are less than 1kb this resulted in us
greatly miscalculating the amount of disk space used by the cache.

Using the number of blocks allocated to the file is more
conservative and less likely to cause issues.

This change will result in cache sizes being miscalculated further
until old items added with the previous calculation have all been
removed. However I don't see anyway around that, the previous
patch should help limit that problem.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 4e1f3afea9)
2017-04-30 09:46:30 +01:00
Timothy Arceri
505e7cd232 disk_cache: reduce default cache size to 5% of filesystem
Modern disks are extremely large and are only going to get bigger.
Usage has shown frequent Mesa upgrades can result in the cache
growing very fast i.e. wasting a lot of disk space unnecessarily.

5% seems like a more reasonable default.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit ce41237151)
2017-04-30 09:46:30 +01:00
Jason Ekstrand
791f0fb429 anv: Don't place scratch buffers above the 32-bit boundary
This fixes rendering corruptions in DOOM.  Hopefully, it will also make
Jenkins a bit more stable as we've been seeing some random failures and
GPU hangs ever since turning on 48bit.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100620
Fixes: 651ec926fc "anv: Add support for 48-bit addresses"
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c43b4bc85e)
2017-04-30 09:46:30 +01:00
Marek Olšák
f1fe2b30b1 radeonsi: adjust ESGS ring buffer size computation on VI
Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 3f2a0649ab)
2017-04-30 09:46:30 +01:00
Marek Olšák
ee36cbe219 radeonsi/gfx9: don't set deprecated field PARTIAL_ES_WAVE_ON
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 80814819c2)
2017-04-30 09:46:30 +01:00
Marek Olšák
2cd07c39cc radeonsi/gfx9: set MAX_PRIMGRP_IN_WAVE in the correct register
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 60a20e6879)
2017-04-30 09:46:30 +01:00
Marek Olšák
76f046add3 radeonsi/gfx9: add a workaround for viewing a slice of 3D as a 2D image
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 8e8570a9e8)
2017-04-30 09:46:30 +01:00
Marek Olšák
328afc7e86 radeonsi/gfx9: fix 1D array shader images
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 482e6b07cc)
2017-04-30 09:46:30 +01:00
Marek Olšák
77345993ec radeonsi/gfx9: fix most things wrong with shader images
There are 2 major hw changes:
- The address must always point to the address of level 0. GFX9 tiling
  modes don't allow binding to a non-0 level.
- 3D must always be bound as 3D, because 2D and 3D use entirely different
  tiling modes, and the texture target determines which set of modes is
  used.

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 5c94779585)
2017-04-30 09:46:30 +01:00
Marek Olšák
f2673a0f40 radeonsi/gfx9: fix texture buffer objects and image buffers with IDXEN==0
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 65e0c3fba7)
2017-04-30 09:46:30 +01:00
Francisco Jerez
b38423210e intel/fs: Take into account amount of data read in spilling cost heuristic.
Until now the spilling cost calculation was neglecting the amount of
data read from the register during the spilling cost calculation.
This caused it to make suboptimal decisions in some cases leading to
higher memory bandwidth usage than necessary.

Improves Unigine Heaven performance by ~4% on BDW, reversing an
unintended FPS regression from my previous commit
147e71242c with n=12 and statistical
significance 5%.  In addition SynMark2 OglCSDof performance is
improved by an additional ~5% on SKL, and a Kerbal Space Program
apitrace around the Moho planet I can provide on request improves by
~20%.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 58324389be)
2017-04-30 09:46:29 +01:00
Francisco Jerez
ba6fd491a1 intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.
This is what we use later on to compute the number of registers that
will actually get spilled to memory, so it's more likely to match
reality than the current open-coded approximation.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit ecc19e12dc)
2017-04-30 09:46:29 +01:00
Kenneth Graunke
36f6fc59cb i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().
opt_register_coalesce() was optimizing sequences such as:

   mul(8) acc0:D, attr18.xyyy:D, attr19.xyyy:D
   mach(8) vgrf5.xy:D, attr18.xyyy:D, attr19.xyyy:D
   mov(8) m4.zw:F, vgrf5.xxxy:F

into:

   mul(8) acc0:D, attr18.xyyy:D, attr19.xyyy:D
   mach(8) m4.zw:D, attr18.xxxy:D, attr19.xxxy:D

This doesn't work - if we're going to reswizzle MACH, we'd need to
reswizzle the MUL as well.  Here, the MUL fills the accumulator's .zw
components with attr18.yy * attr19.yy.  But the MACH instruction expects
.z to contain attr18.x * attr19.x.  Bogus results ensue.

No change in shader-db on Haswell.  Prevents regressions in Timothy's
patches to use enhanced layouts for varying packing (which rearrange
code just enough to trigger this pre-existing bug, but were fine
themselves).

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 2faf227ec2)

Squashed with commit:

i965/vec4: Use reads_accumulator_implicitly(), not MACH checks.

Curro pointed out that I should not just check for MACH, but use
the reads_accumulator_implicitly() helper, which would also prevent
the same bug with MAC and SADA2 (if we ever decide to use them).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 6b10c37b9c)
2017-04-30 09:46:15 +01:00
Emil Velikov
2bf79cb2f1 Update version to 17.1.0-rc2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-24 15:23:07 +01:00
Emil Velikov
fb6379697b st/clover: add space between < and ::
As pointed out by compiler

./llvm/codegen.hpp:52:22: error: ‘<::’ cannot begin a template-argument list [-fpermissive]
./llvm/codegen.hpp:52:22: note: ‘<:’ is an alternate spelling for ‘[’. Insert whitespace between ‘<’ and ‘::’

Cc: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
(cherry picked from commit dd6ec78b4f)
2017-04-24 13:27:37 +01:00
Vinson Lee
0948e113d2 configure.ac: Fix typos.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b81d85f175)
2017-04-24 13:14:07 +01:00
Timothy Arceri
f61c453cfc mesa: validate sampler type across the whole program
Currently we were only making sure types were the same within a
single stage. This looks to have regressed with 953a0af8e3.

Fixes: 953a0af8e3 ("mesa: validate sampler uniforms during gluniform calls")

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
https://bugs.freedesktop.org/show_bug.cgi?id=97524
(cherry picked from commit d682f8aa8e)
2017-04-24 13:13:38 +01:00
Emil Velikov
612fc14aab mesa/glthread: correctly compare thread handles
As mentioned in the manual - comparing pthread_t handles via the C
comparison operator is incorrect and pthread_equal() should be used
instead.

Cc: Timothy Arceri <tarceri@itsqueeze.com>
Fixes: d8d81fbc31 ("mesa: Add infrastructure for a worker thread to process GL commands.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 52df318d61)
2017-04-24 13:13:22 +01:00
Emil Velikov
8aa9aa6a5f st/mesa: automake: honour the vdpau header install location
If VDPAU is installed in the non-default location, we'll fail to find
the headers and error at build time.

../../src/gallium/include/state_tracker/vdpau_dmabuf.h:37:25: fatal error: vdpau/vdpau.h: No such file or directory
 #include <vdpau/vdpau.h>
                         ^

Fixes: faba96bc60 ("st/vdpau: add new interop interface")
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 51c0c213b7)
2017-04-24 13:13:07 +01:00
Emil Velikov
10ff4b49dc configure.ac: check require_basic_egl only if egl enabled
Fixes: 1ac40173c2 ("configure.ac: simplify EGL requirements for drivers dependent on EGL")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 4516bfbd30)
2017-04-24 13:12:59 +01:00
Emil Velikov
3d40db7892 configure.ac: manually expand PKG_CHECK_VAR
The macro is introduced with pkgconfig v0.28 which isn't universally
available. Thus it will error at configure stage.

Reported-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
Fixes: ce562f9e3f ("EGL: Implement the libglvnd interface for EGL (v3)")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 179e21a720)
2017-04-24 13:12:51 +01:00
Rob Clark
99da9dfd95 util/queue: don't hang at exit
So atexit() is horrible and 4aea8fe7 is probably not a good idea.  But
add an extra layer of duct-tape to the problem.  Otherwise we hit a
situation where app using an atexit() handler that runs later than ours
doesn't hang when trying to tear down a context.

 (gdb) bt
 #0  util_queue_killall_and_wait (queue=queue@entry=0x52bc80) at ../../../src/util/u_queue.c:264
 #1  0x0000007fb6c380c0 in atexit_handler () at ../../../src/util/u_queue.c:51
 #2  0x0000007fb7730e2c in __run_exit_handlers () from /lib64/libc.so.6
 #3  0x0000007fb7730e5c in exit () from /lib64/libc.so.6
 #4  0x0000007fb7ce17dc in piglit_report_result (result=PIGLIT_PASS) at /home/robclark/src/piglit/tests/util/piglit-util.c:267
 #5  0x0000007fb7ef99f8 in process_next_event (x11_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:139
 #6  0x0000007fb7ef9a90 in enter_event_loop (winsys_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:153
 #7  0x0000007fb7ef8e50 in run_test (gl_fw=0x432c20, argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:88
 #8  0x0000007fb7edb890 in piglit_gl_test_run (argc=1, argv=0x7ffffff588, config=0x7ffffff400) at /home/robclark/src/piglit/tests/util/piglit-framework-gl.c:203
 #9  0x0000000000401224 in main (argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/bugs/drawbuffer-modes.c:46
 (gdb) c
 Continuing.
 [Thread 0x7fb67580c0 (LWP 3471) exited]
 ^C
 Thread 1 "drawbuffer-mode" received signal SIGINT, Interrupt.
 0x0000007fb72dda34 in pthread_cond_wait@@GLIBC_2.17 () from /lib64/libpthread.so.0
 (gdb) bt
 #0  0x0000007fb72dda34 in pthread_cond_wait@@GLIBC_2.17 () from /lib64/libpthread.so.0
 #1  0x0000007fb6c38304 in cnd_wait (mtx=0x5bdc90, cond=0x5bdcc0) at ../../../include/c11/threads_posix.h:159
 #2  util_queue_fence_wait (fence=0x5bdc90) at ../../../src/util/u_queue.c:106
 #3  0x0000007fb6daac70 in fd_batch_sync (batch=0x5bdc70) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:233
 #4  batch_reset (batch=batch@entry=0x5bdc70) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:183
 #5  0x0000007fb6daa5e0 in batch_flush (batch=0x5bdc70) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:290
 #6  fd_batch_flush (batch=0x5bdc70, sync=<optimized out>) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch.c:308
 #7  0x0000007fb6daba2c in fd_bc_flush (cache=0x461220, ctx=0x52b920) at ../../../../../src/gallium/drivers/freedreno/freedreno_batch_cache.c:141
 #8  0x0000007fb6dac954 in fd_context_flush (pctx=0x52b920, fence=0x0, flags=<optimized out>) at ../../../../../src/gallium/drivers/freedreno/freedreno_context.c:54
 #9  0x0000007fb6b43294 in st_glFlush (ctx=<optimized out>) at ../../../src/mesa/state_tracker/st_cb_flush.c:121
 #10 0x0000007fb69a84e8 in _mesa_make_current (newCtx=newCtx@entry=0x0, drawBuffer=drawBuffer@entry=0x0, readBuffer=readBuffer@entry=0x0) at ../../../src/mesa/main/context.c:1654
 #11 0x0000007fb6b7ca58 in st_api_make_current (stapi=<optimized out>, stctxi=0x0, stdrawi=0x0, streadi=0x0) at ../../../src/mesa/state_tracker/st_manager.c:827
 #12 0x0000007fb6cc87e8 in dri_unbind_context (cPriv=<optimized out>) at ../../../../../src/gallium/state_trackers/dri/dri_context.c:217
 #13 0x0000007fb6cc80b0 in driUnbindContext (pcp=0x5271e0) at ../../../../../../src/mesa/drivers/dri/common/dri_util.c:591
 #14 0x0000007fb7d1da08 in MakeContextCurrent (dpy=0x433380, draw=0, read=0, gc_user=0x0) at ../../../src/glx/glxcurrent.c:214
 #15 0x0000007fb7a8d5e0 in glx_platform_make_current () from /lib64/libwaffle-1.so.0
 #16 0x0000007fb7a894e4 in waffle_make_current () from /lib64/libwaffle-1.so.0
 #17 0x0000007fb7ef8c60 in piglit_wfl_framework_teardown (wfl_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_wfl_framework.c:628
 #18 0x0000007fb7ef939c in piglit_winsys_framework_teardown (winsys_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:238
 #19 0x0000007fb7ef9c30 in destroy (gl_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:212
 #20 0x0000007fb7edb7c4 in destroy () at /home/robclark/src/piglit/tests/util/piglit-framework-gl.c:184
 #21 0x0000007fb7730e2c in __run_exit_handlers () from /lib64/libc.so.6
 #22 0x0000007fb7730e5c in exit () from /lib64/libc.so.6
 #23 0x0000007fb7ce17dc in piglit_report_result (result=PIGLIT_PASS) at /home/robclark/src/piglit/tests/util/piglit-util.c:267
 #24 0x0000007fb7ef99f8 in process_next_event (x11_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:139
 #25 0x0000007fb7ef9a90 in enter_event_loop (winsys_fw=0x432c20) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_x11_framework.c:153
 #26 0x0000007fb7ef8e50 in run_test (gl_fw=0x432c20, argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:88
 #27 0x0000007fb7edb890 in piglit_gl_test_run (argc=1, argv=0x7ffffff588, config=0x7ffffff400) at /home/robclark/src/piglit/tests/util/piglit-framework-gl.c:203
 #28 0x0000000000401224 in main (argc=1, argv=0x7ffffff588) at /home/robclark/src/piglit/tests/bugs/drawbuffer-modes.c:46
 (gdb) r

Fixes: 4aea8fe7 ("gallium/u_queue: fix random crashes when the app calls exit()")
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 6fb7935ded)
2017-04-24 13:12:41 +01:00
Emil Velikov
fcbb263f8c configure.ac: print deprecation warning as needed
The warning should be printed only when one explicitly uses the
deprecated configure toggle.

Fixes: 7748c3f5eb ("configure.ac: deprecate --with-egl-platforms over
--with-platforms")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9915753e63)
2017-04-24 13:12:26 +01:00
Marek Olšák
29fa5b6e1c st/mesa: invalidate the readpix cache in st_indirect_draw_vbo
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 7cd6e2df65)
2017-04-24 13:11:14 +01:00
Emil Velikov
4e7e903bb3 winsys/sw/dri: don't use GNU void pointer arithmetic
Resolves build issues like the following:

src/gallium/winsys/sw/dri/dri_sw_winsys.c:203:31: error: pointer of type ‘void *’ used in arithmetic [-Werror=pointer-arith]
        data = dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize;
                               ^
src/gallium/winsys/sw/dri/dri_sw_winsys.c:203:62: error: pointer of type ‘void *’ used in arithmetic [-Werror=pointer-arith]
        data = dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize;
                                                              ^

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 309f4067a7)
2017-04-24 13:11:14 +01:00
Nicolai Hähnle
26949e872b vbo: fix gl_DrawID handling in glMultiDrawArrays
Fixes a bug in
KHR-GL45.shader_draw_parameters_tests.ShaderMultiDrawArraysParameters.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 51deba0eb3)
2017-04-24 13:11:14 +01:00
Nicolai Hähnle
2cc119c35a mesa: move glMultiDrawArrays to vbo and fix error handling
When any count[i] is negative, we must skip all draws.

Moving to vbo makes the subsequent change easier.

v2:
- provide the function in all contexts, including GLES
- adjust validation accordingly to include the xfb check
v3:
- fix mix-up of pre- and post-xfb prim count (Nils Wallménius)

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 42d5465b9b)
2017-04-24 13:11:13 +01:00
Nicolai Hähnle
6abdbd8b10 mesa: extract need_xfb_remaining_prims_check
The same logic needs to be applied to glMultiDrawArrays.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 756e9ebbdd)
2017-04-24 13:11:13 +01:00
Nicolai Hähnle
24c05c57e4 mesa: fix remaining xfb prims check for GLES with multiple instances
Found by inspection.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit ea9a8940ca)
2017-04-24 13:11:13 +01:00
Nanley Chery
7ae90b4f65 anv/cmd_buffer: Disable CCS on BDW input attachments
The description under RENDER_SURFACE_STATE::RedClearColor says,

   For Sampling Engine Multisampled Surfaces and Render Targets:
    Specifies the clear value for the red channel.
   For Other Surfaces:
    This field is ignored.

This means that the sampler on BDW doesn't support CCS.

Cc: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit d9d793696b)
2017-04-24 13:11:13 +01:00
Lionel Landwerlin
0f2ac6ded8 anv: blorp: flush memory after copy
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d71efbe5f2)
2017-04-24 13:11:13 +01:00
Rob Clark
bea2c4b88f freedreno: fix crash if ctx torn down with no rendering
In this case, ctx->flush_queue would not have been initialized.

Fixes: 0b613c20 ("freedreno: enable draw/batch reordering by default")
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit d4601b0efc)
2017-04-24 13:11:13 +01:00
Emil Velikov
ed846b4c78 Update version to 17.1.0-rc1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-17 14:51:04 +01:00
Emil Velikov
8c69adf9a9 Revert "docs: add 17.2.0-devel release notes template, bump version"
This reverts commit 47dd2544e1.

Should have landed in the master branch
2017-04-17 14:30:44 +01:00
Emil Velikov
47dd2544e1 docs: add 17.2.0-devel release notes template, bump version
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-17 14:28:27 +01:00
199 changed files with 3547 additions and 1276 deletions

View File

@@ -1,24 +1,11 @@
language: c
sudo: required
sudo: false
dist: trusty
cache:
directories:
- $HOME/.ccache
addons:
apt:
packages:
- libdrm-dev
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libxcb-dri2-0-dev
- libx11-xcb-dev
# LLVM packaging is broken and misses these dependencies
- libedit-dev
- libelf-dev
- scons
apt: true
ccache: true
env:
global:
@@ -32,17 +19,257 @@ env:
- XCBPROTO_VERSION=xcb-proto-1.11
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LLVM_VERSION=3.9
- LLVM_PACKAGE="llvm-${LLVM_VERSION} llvm-${LLVM_VERSION}-dev"
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- LIBTXC_DXTN_VERSION=libtxc_dxtn-1.0.1
- LIBVDPAU_VERSION=libvdpau-1.1
- LIBVA_VERSION=libva-1.6.2
- LIBWAYLAND_VERSION=wayland-1.11.1
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- MAKEFLAGS=-j2
matrix:
- BUILD=make
- BUILD=scons
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
matrix:
include:
- env:
- LABEL="make loaders/classic DRI"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make check"
- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl --with-platforms=x11,drm,surfaceless,wayland --enable-osmesa"
- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS=""
addons:
apt:
packages:
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- env:
# NOTE: Building SWR is 2x (yes two) times slower than all the other
# gallium drivers combined.
# Start this early so that it doesn't hunder the run time.
- LABEL="make Gallium Drivers SWR"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC="gcc-5"
- OVERRIDE_CXX="g++-5"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS="swr"
- VULKAN_DRIVERS=""
addons:
apt:
sources:
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-3.9
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- g++-5
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="make Gallium Drivers Other"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS="i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
- VULKAN_DRIVERS=""
addons:
apt:
sources:
- llvm-toolchain-trusty-3.9
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.6
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC=gcc-4.7
- OVERRIDE_CXX=g++-4.7
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
# i915 most likely doesn't work with OpenCL.
# Regardless - we're doing a quick build test here.
- GALLIUM_DRIVERS="i915"
- VULKAN_DRIVERS=""
addons:
apt:
sources:
- llvm-toolchain-trusty-3.6
packages:
- libclc-dev
# LLVM packaging is broken and misses these dependencies
- libedit-dev
- g++-4.7
# From sources above
- llvm-3.6-dev
- clang-3.6
- libclang-3.6-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="make Gallium ST Other"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --enable-xa --enable-nine --enable-xvmc --enable-vdpau --enable-va --enable-omx --enable-gallium-osmesa"
# We need swrast for osmesa and nine.
# i915 most likely doesn't work with most ST.
# Regardless - we're doing a quick build test here.
- GALLIUM_DRIVERS="i915,swrast"
- VULKAN_DRIVERS=""
addons:
apt:
packages:
# Nine requires gcc 4.6... which is the one we have right ?
- libxvmc-dev
# Build locally, for now.
#- libvdpau-dev
#- libva-dev
- libomxil-bellagio-dev
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="make Vulkan"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel check"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl --with-platforms=x11,wayland"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --enable-dri3 --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx --disable-gallium-osmesa"
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS="intel,radeon"
addons:
apt:
sources:
- llvm-toolchain-trusty-3.9
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="scons"
- BUILD=scons
- SCONSFLAGS="-j4"
# Explicitly disable.
- SCONS_TARGET="llvm=0"
# Keep it symmetrical to the make build.
- SCONS_CHECK_COMMAND="scons llvm=0 check"
addons:
apt:
packages:
- scons
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="scons LLVM"
- BUILD=scons
- SCONSFLAGS="-j4"
- SCONS_TARGET="llvm=1"
# Keep it symmetrical to the make build.
- SCONS_CHECK_COMMAND="scons llvm=1 check"
- LLVM_VERSION=3.3
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
addons:
apt:
packages:
- scons
# LLVM packaging is broken and misses these dependencies
- libedit-dev
- llvm-3.3-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- env:
- LABEL="scons SWR"
- BUILD=scons
- SCONSFLAGS="-j4"
- SCONS_TARGET="swr=1"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# Keep it symmetrical to the make build. There's no actual SWR, yet.
- SCONS_CHECK_COMMAND="true"
- OVERRIDE_CC="gcc-5"
- OVERRIDE_CXX="g++-5"
addons:
apt:
sources:
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-3.9
packages:
- scons
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- g++-5
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
install:
- export PATH="/usr/lib/ccache:$PATH"
- pip install --user mako
# Since libdrm gets updated in configure.ac regularly, try to pick up the
@@ -90,25 +317,64 @@ install:
- tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
- (cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make install)
# Install LLVM directly via apt-get (not Travis-CI's apt addon)
# See https://github.com/travis-ci/apt-source-whitelist/pull/205#issuecomment-216054237
# libtxc-dxtn uses the patented S3 Texture Compression
# algorithm. Therefore, we don't want to use this library but it is
# still possible through setting the USE_TXC_DXTN variable to yes in
# the travis web UI.
#
# According to Wikipedia, the patent expires on October 2, 2017:
# https://en.wikipedia.org/wiki/S3_Texture_Compression#Patent
- if test "x$USE_TXC_DXTN" = xyes; then
wget https://people.freedesktop.org/~cbrill/libtxc_dxtn/$LIBTXC_DXTN_VERSION.tar.bz2;
tar -jxvf $LIBTXC_DXTN_VERSION.tar.bz2;
(cd $LIBTXC_DXTN_VERSION && ./configure --prefix=$HOME/prefix && make install);
fi
- wget -nv -O - http://llvm.org/apt/llvm-snapshot.gpg.key | sudo apt-key add -
- sudo apt-add-repository -y 'deb http://llvm.org/apt/trusty llvm-toolchain-trusty-3.9 main'
- sudo apt-add-repository -y 'deb http://llvm.org/apt/trusty llvm-toolchain-trusty main'
- sudo apt-get update -qq
- sudo apt-get install -qq -y $LLVM_PACKAGE
- wget http://people.freedesktop.org/~aplattner/vdpau/$LIBVDPAU_VERSION.tar.bz2
- tar -jxvf $LIBVDPAU_VERSION.tar.bz2
- (cd $LIBVDPAU_VERSION && ./configure --prefix=$HOME/prefix && make install)
- wget http://www.freedesktop.org/software/vaapi/releases/libva/$LIBVA_VERSION.tar.bz2
- tar -jxvf $LIBVA_VERSION.tar.bz2
- (cd $LIBVA_VERSION && ./configure --prefix=$HOME/prefix --disable-wayland --disable-dummy-driver && make install)
- wget http://wayland.freedesktop.org/releases/$LIBWAYLAND_VERSION.tar.xz
- tar -axvf $LIBWAYLAND_VERSION.tar.xz
- (cd $LIBWAYLAND_VERSION && ./configure --prefix=$HOME/prefix --enable-libraries --without-host-scanner --disable-documentation --disable-dtd-validation && make install)
# Generate the header since one is missing on the Travis instance
- mkdir -p linux
- printf "%s\n" \
"#ifndef _LINUX_MEMFD_H" \
"#define _LINUX_MEMFD_H" \
"" \
"#define __NR_memfd_create 319" \
"#define SYS_memfd_create __NR_memfd_create" \
"" \
"#define MFD_CLOEXEC 0x0001U" \
"#define MFD_ALLOW_SEALING 0x0002U" \
"" \
"#endif /* _LINUX_MEMFD_H */" > linux/memfd.h
script:
- if test "x$BUILD" = xmake; then
test -n "$OVERRIDE_CC" && export CC="$OVERRIDE_CC";
test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
export CC="$CC -isystem`pwd`";
./autogen.sh --enable-debug
--with-platforms=x11,drm
--with-dri-drivers=i915,i965,radeon,r200,swrast,nouveau
--with-gallium-drivers=i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx
--with-vulkan-drivers=radeon
$DRI_LOADERS
--with-dri-drivers=$DRI_DRIVERS
$GALLIUM_ST
--with-gallium-drivers=$GALLIUM_DRIVERS
--with-vulkan-drivers=$VULKAN_DRIVERS
--disable-llvm-shared-libs
;
make && make check;
elif test x$BUILD = xscons; then
scons llvm=1 && scons llvm=1 check;
&&
make && eval $MAKE_CHECK_COMMAND;
fi
- if test "x$BUILD" = xscons; then
test -n "$OVERRIDE_CC" && export CC="$OVERRIDE_CC";
test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
scons $SCONS_TARGET && eval $SCONS_CHECK_COMMAND;
fi

View File

@@ -116,7 +116,3 @@ endif
# Quiet down the build system and remove any .h files from the sources
LOCAL_SRC_FILES := $(patsubst %.h, , $(LOCAL_SRC_FILES))
ifneq ($(LOCAL_IS_HOST_MODULE),true)
LOCAL_SHARED_LIBRARIES += libz
endif

View File

@@ -1 +1 @@
17.1.0-devel
17.1.3

4
bin/.cherry-ignore Normal file
View File

@@ -0,0 +1,4 @@
# This commit depends on 9fd9a7d0ba3 and 678d568c7b2, neither of which is in branch.
b84b631c6381d9b36bca5d0e7cc67dd23af188c1 radeonsi: load patch_id for TES-as-ES when exporting for PS
# This commit addressed an earlier commit 126d5ad which did not land in branch.
9da104593386f6e8ddec8f0d9d288aceb8908fe1 radv: fix regression in descriptor set freeing.

View File

@@ -30,7 +30,15 @@ do
if grep -q ^$candidate already_picked ; then
continue
fi
echo Commit $candidate references $sha
# Or if it isn't in the ignore list.
if [ -f bin/.cherry-ignore ] ; then
if grep -q ^$candidate bin/.cherry-ignore ; then
continue
fi
fi
printf "Commit \"%s\" references %s\n" \
"`git log -n1 --pretty=oneline $candidate`" \
"$sha"
done
done

View File

@@ -24,35 +24,52 @@ git log --reverse --grep="cherry picked from commit" $latest_branchpoint..HEAD |
git log --reverse --pretty=%H -i --grep="fixes:" $latest_branchpoint..origin/master |\
while read sha
do
# For each one try to extract the tag
fixes_count=`git show $sha | grep -i "fixes:" | wc -l`
if [ "x$fixes_count" != x1 ] ; then
echo WARNING: Commit $sha has more than one Fixes tag
# Check to see whether the patch is on the ignore list ...
if [ -f bin/.cherry-ignore ] ; then
if grep -q ^$sha bin/.cherry-ignore ; then
continue
fi
fi
fixes=`git show $sha | grep -i "fixes:" | head -n 1`
# The following sed/cut combination is borrowed from GregKH
id=`echo ${fixes} | sed -e 's/^[ \t]*//' | cut -f 2 -d ':' | sed -e 's/^[ \t]*//' | cut -f 1 -d ' '`
# Bail out if we cannot find suitable id.
# Any specific validation the $id is valid and not some junk, is
# implied with the follow up code
if [ "x$id" = x ] ; then
# Skip if it has been already cherry-picked.
if grep -q ^$sha already_picked ; then
continue
fi
# Check if the offending commit is in branch.
# For each one try to extract the tag
fixes_count=`git show $sha | grep -i "fixes:" | wc -l`
warn=`(test $fixes_count -gt 1 && echo $fixes_count) || echo 0`
while [ $fixes_count -gt 0 ] ; do
fixes=`git show $sha | grep -i "fixes:" | tail -n $fixes_count`
fixes_count=$(($fixes_count-1))
# The following sed/cut combination is borrowed from GregKH
id=`echo ${fixes} | sed -e 's/^[ \t]*//' | cut -f 2 -d ':' | sed -e 's/^[ \t]*//' | cut -f 1 -d ' '`
# Be that cherry-picked ...
# ... or landed before the branchpoint.
if grep -q ^$id already_picked ||
grep -q ^$id already_landed ; then
# Finally nominate the fix if it hasn't landed yet.
if grep -q ^$sha already_picked ; then
# Bail out if we cannot find suitable id.
# Any specific validation the $id is valid and not some junk, is
# implied with the follow up code
if [ "x$id" = x ] ; then
continue
fi
echo Commit $sha fixes $id
# Check if the offending commit is in branch.
# Be that cherry-picked ...
# ... or landed before the branchpoint.
if grep -q ^$id already_picked ||
grep -q ^$id already_landed ; then
printf "Commit \"%s\" fixes %s\n" \
"`git log -n1 --pretty=oneline $sha`" \
"$id"
warn=$(($warn-1))
fi
done
if [ $warn -gt 0 ] ; then
printf "WARNING: Commit \"%s\" has more than one Fixes tag\n" \
"`git log -n1 --pretty=oneline $sha`"
fi
done

View File

@@ -97,7 +97,7 @@ XSHMFENCE_REQUIRED=1.1
XVMC_REQUIRED=1.0.6
PYTHON_MAKO_REQUIRED=0.8.0
LIBSENSORS_REQUIRED=4.0.0
ZLIB_REQUIRED=1.2.8
ZLIB_REQUIRED=1.2.3
dnl LLVM versions
LLVM_REQUIRED_GALLIUM=3.3.0
@@ -269,7 +269,7 @@ DEFINES="-D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS"
AC_SUBST([DEFINES])
android=no
case "$host_os" in
*-android)
*-android*)
android=yes
;;
linux*|*-gnu*|gnu*|cygwin*)
@@ -724,7 +724,7 @@ dnl Arch/platform-specific settings
dnl
AC_ARG_ENABLE([asm],
[AS_HELP_STRING([--disable-asm],
[disable assembly usage @<:@default=enabled on supported plaforms@:>@])],
[disable assembly usage @<:@default=enabled on supported platforms@:>@])],
[enable_asm="$enableval"],
[enable_asm=yes]
)
@@ -1079,14 +1079,9 @@ fi
if test "x$LIBUNWIND" = "xyes"; then
PKG_CHECK_MODULES(LIBUNWIND, libunwind)
if test "x$HAVE_LIBUNWIND" != "xyes"; then
AC_MSG_ERROR([libunwind requested but not installed.])
fi
AC_DEFINE(HAVE_LIBUNWIND, 1, [Have libunwind support])
fi
AM_CONDITIONAL(HAVE_LIBUNWIND, [test "x$LIBUNWIND" = xyes])
dnl Options for APIs
AC_ARG_ENABLE([opengl],
@@ -1367,7 +1362,7 @@ if test "x$enable_libglvnd" = xyes ; then
esac
PKG_CHECK_MODULES([GLVND], libglvnd >= 0.2.0)
PKG_CHECK_VAR(LIBGLVND_DATADIR, libglvnd, datadir)
LIBGLVND_DATADIR=`$PKG_CONFIG --variable=datadir libglvnd`
AC_SUBST([LIBGLVND_DATADIR])
DEFINES="${DEFINES} -DUSE_LIBGLVND=1"
@@ -1541,15 +1536,10 @@ xdri)
PKG_CHECK_MODULES([DRI2PROTO], [dri2proto >= $DRI2PROTO_REQUIRED])
GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV libdrm >= $LIBDRM_REQUIRED"
if test x"$enable_dri" = xyes; then
dri_modules="$dri_modules xcb-dri2 >= $XCBDRI2_REQUIRED"
fi
if test x"$enable_dri3" = xyes; then
PKG_CHECK_EXISTS([xcb >= $XCB_REQUIRED], [], AC_MSG_ERROR([DRI3 requires xcb >= $XCB_REQUIRED]))
dri3_modules="xcb xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
fi
fi
if test x"$dri_platform" = xapple ; then
DEFINES="$DEFINES -DGLX_USE_APPLEGL"
@@ -1638,6 +1628,111 @@ if test "x$enable_glx_read_only_text" = xyes; then
DEFINES="$DEFINES -DGLX_X86_READONLY_TEXT"
fi
dnl
dnl DEPRECATED: EGL Platforms configuration
dnl
AC_ARG_WITH([egl-platforms],
[AS_HELP_STRING([--with-egl-platforms@<:@=DIRS...@:>@],
[DEPRECATED: use --with-platforms instead@<:@default=auto@:>@])],
[with_egl_platforms="$withval"],
[with_egl_platforms=auto])
if test "x$with_egl_platforms" = xauto; then
with_egl_platforms="x11,surfaceless"
if test "x$enable_gbm" = xyes; then
with_egl_platforms="$with_egl_platforms,drm"
fi
else
AC_MSG_WARN([--with-egl-platforms is deprecated. Use --with-platforms instead.])
fi
dnl
dnl Platforms configuration
dnl
AC_ARG_WITH([platforms],
[AS_HELP_STRING([--with-platforms@<:@=DIRS...@:>@],
[comma delimited native platforms libEGL/Vulkan/other supports, e.g.
"x11,drm,wayland,surfaceless..." @<:@default=auto@:>@])],
[with_platforms="$withval"],
[with_platforms=auto])
# Reuse the autodetection rather than duplicating it.
if test "x$with_platforms" = xauto; then
with_platforms=$with_egl_platforms
fi
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
WAYLAND_SCANNER='')
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
fi
# Do per platform setups and checks
platforms=`IFS=', '; echo $with_platforms`
for plat in $platforms; do
case "$plat" in
wayland)
PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED])
if test "x$WAYLAND_SCANNER" = "x:"; then
AC_MSG_ERROR([wayland-scanner is needed to compile the wayland platform])
fi
DEFINES="$DEFINES -DHAVE_WAYLAND_PLATFORM"
;;
x11)
PKG_CHECK_MODULES([XCB_DRI2], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED xcb-xfixes])
DEFINES="$DEFINES -DHAVE_X11_PLATFORM"
;;
drm)
test "x$enable_gbm" = "xno" &&
AC_MSG_ERROR([EGL platform drm needs gbm])
DEFINES="$DEFINES -DHAVE_DRM_PLATFORM"
;;
surfaceless)
DEFINES="$DEFINES -DHAVE_SURFACELESS_PLATFORM"
;;
android)
PKG_CHECK_MODULES([ANDROID], [cutils hardware sync])
DEFINES="$DEFINES -DHAVE_ANDROID_PLATFORM"
;;
*)
AC_MSG_ERROR([platform '$plat' does not exist])
;;
esac
case "$plat" in
wayland|drm|surfaceless)
require_libdrm "Platform $plat"
;;
esac
done
if test "x$enable_glx" != xno; then
if ! echo "$platforms" | grep -q 'x11'; then
AC_MSG_ERROR([Building without the x11 platform as GLX is enabled, is not supported])
fi
fi
if test x"$enable_dri3" = xyes; then
DEFINES="$DEFINES -DHAVE_DRI3"
dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
fi
AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, echo "$platforms" | grep -q 'wayland')
AM_CONDITIONAL(HAVE_PLATFORM_DRM, echo "$platforms" | grep -q 'drm')
AM_CONDITIONAL(HAVE_PLATFORM_SURFACELESS, echo "$platforms" | grep -q 'surfaceless')
AM_CONDITIONAL(HAVE_PLATFORM_ANDROID, echo "$platforms" | grep -q 'android')
dnl
dnl More DRI setup
dnl
@@ -1680,10 +1775,6 @@ if test "x$enable_dri" = xyes; then
# Platform specific settings and drivers to build
case "$host_os" in
linux*)
if test "x$enable_dri3" = xyes; then
DEFINES="$DEFINES -DHAVE_DRI3"
fi
case "$host_cpu" in
powerpc* | sparc*)
# Build only the drivers for cards that exist on PowerPC/sparc
@@ -1839,6 +1930,14 @@ AC_ARG_WITH([vulkan-icddir],
[VULKAN_ICD_INSTALL_DIR='${datarootdir}/vulkan/icd.d'])
AC_SUBST([VULKAN_ICD_INSTALL_DIR])
require_x11_dri3() {
if echo "$platforms" | grep -q 'x11'; then
if test "x$enable_dri3" != xyes; then
AC_MSG_ERROR([$1 Vulkan driver requires DRI3 when built with X11])
fi
fi
}
if test -n "$with_vulkan_drivers"; then
if test "x$ac_cv_func_dl_iterate_phdr" = xno; then
AC_MSG_ERROR([Vulkan drivers require the dl_iterate_phdr function])
@@ -1850,12 +1949,14 @@ if test -n "$with_vulkan_drivers"; then
xintel)
require_libdrm "ANV"
PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
require_x11_dri3 "ANV"
HAVE_INTEL_VULKAN=yes
;;
xradeon)
require_libdrm "radv"
PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
radeon_llvm_check $LLVM_REQUIRED_RADV "radv"
require_x11_dri3 "radv"
HAVE_RADEON_VULKAN=yes
;;
*)
@@ -1961,23 +2062,47 @@ if test "x$enable_xa" = xyes; then
fi
AM_CONDITIONAL(HAVE_ST_XA, test "x$enable_xa" = xyes)
if echo $platforms | grep -q "x11"; then
have_xvmc_platform=yes
else
have_xvmc_platform=no
fi
if echo $platforms | grep -q "x11"; then
have_vdpau_platform=yes
else
have_vdpau_platform=no
fi
if echo $platforms | grep -q "x11\|drm"; then
have_omx_platform=yes
else
have_omx_platform=no
fi
if echo $platforms | grep -q "x11\|drm\|wayland"; then
have_va_platform=yes
else
have_va_platform=no
fi
dnl
dnl Gallium G3DVL configuration
dnl
if test -n "$with_gallium_drivers" -a "x$with_gallium_drivers" != xswrast; then
if test "x$enable_xvmc" = xauto; then
if test "x$enable_xvmc" = xauto -a "x$have_xvmc_platform" = xyes; then
PKG_CHECK_EXISTS([xvmc >= $XVMC_REQUIRED], [enable_xvmc=yes], [enable_xvmc=no])
fi
if test "x$enable_vdpau" = xauto; then
if test "x$enable_vdpau" = xauto -a "x$have_vdpau_platform" = xyes; then
PKG_CHECK_EXISTS([vdpau >= $VDPAU_REQUIRED], [enable_vdpau=yes], [enable_vdpau=no])
fi
if test "x$enable_omx" = xauto; then
if test "x$enable_omx" = xauto -a "x$have_omx_platform" = xyes; then
PKG_CHECK_EXISTS([libomxil-bellagio >= $LIBOMXIL_BELLAGIO_REQUIRED], [enable_omx=yes], [enable_omx=no])
fi
if test "x$enable_va" = xauto; then
if test "x$enable_va" = xauto -a "x$have_va_platform" = xyes; then
PKG_CHECK_EXISTS([libva >= $LIBVA_REQUIRED], [enable_va=yes], [enable_va=no])
fi
fi
@@ -1995,23 +2120,24 @@ if test "x$enable_xvmc" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx" = xyes -o \
"x$enable_va" = xyes; then
if test x"$enable_dri3" = xyes; then
PKG_CHECK_MODULES([VL], [xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED
xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
else
PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
fi
PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
need_gallium_vl_winsys=yes
fi
AM_CONDITIONAL(NEED_GALLIUM_VL_WINSYS, test "x$need_gallium_vl_winsys" = xyes)
if test "x$enable_xvmc" = xyes; then
if test "x$have_xvmc_platform" != xyes; then
AC_MSG_ERROR([XVMC requires the x11 platforms])
fi
PKG_CHECK_MODULES([XVMC], [xvmc >= $XVMC_REQUIRED])
gallium_st="$gallium_st xvmc"
fi
AM_CONDITIONAL(HAVE_ST_XVMC, test "x$enable_xvmc" = xyes)
if test "x$enable_vdpau" = xyes; then
if test "x$have_vdpau_platform" != xyes; then
AC_MSG_ERROR([VDPAU requires the x11 platforms])
fi
PKG_CHECK_MODULES([VDPAU], [vdpau >= $VDPAU_REQUIRED])
gallium_st="$gallium_st vdpau"
DEFINES="$DEFINES -DHAVE_ST_VDPAU"
@@ -2019,12 +2145,18 @@ fi
AM_CONDITIONAL(HAVE_ST_VDPAU, test "x$enable_vdpau" = xyes)
if test "x$enable_omx" = xyes; then
if test "x$have_omx_platform" != xyes; then
AC_MSG_ERROR([OMX requires at least one of the x11 or drm platforms])
fi
PKG_CHECK_MODULES([OMX], [libomxil-bellagio >= $LIBOMXIL_BELLAGIO_REQUIRED])
gallium_st="$gallium_st omx"
fi
AM_CONDITIONAL(HAVE_ST_OMX, test "x$enable_omx" = xyes)
if test "x$enable_va" = xyes; then
if test "x$have_va_platform" != xyes; then
AC_MSG_ERROR([VA requires at least one of the x11 drm or wayland platforms])
fi
PKG_CHECK_MODULES([VA], [libva >= $LIBVA_REQUIRED])
gallium_st="$gallium_st va"
fi
@@ -2141,112 +2273,21 @@ dnl Gallium configuration
dnl
AM_CONDITIONAL(HAVE_GALLIUM, test -n "$with_gallium_drivers")
dnl
dnl DEPRECATED: EGL Platforms configuration
dnl
AC_ARG_WITH([egl-platforms],
[AS_HELP_STRING([--with-egl-platforms@<:@=DIRS...@:>@],
[DEPRECATED: use --with-plaforms instead@<:@default=auto@:>@])],
[with_egl_platforms="$withval"],
[with_egl_platforms=auto])
if test "x$with_egl_platforms" = xauto; then
AC_MSG_WARN([--with-egl-platforms is deprecated. Use --with-plaforms instead.])
if test "x$enable_egl" = xyes; then
if test "x$enable_gbm" = xyes; then
with_egl_platforms="x11,drm"
else
with_egl_platforms="x11"
fi
else
with_egl_platforms=""
fi
fi
dnl
dnl Platforms configuration
dnl
AC_ARG_WITH([platforms],
[AS_HELP_STRING([--with-platforms@<:@=DIRS...@:>@],
[comma delimited native platforms libEGL/Vulkan/other supports, e.g.
"x11,drm,wayland,surfaceless..." @<:@default=auto@:>@])],
[with_platforms="$withval"],
[with_platforms=auto])
# For the time being, we still reuse the EGL named variables/defines.
if test "x$with_platforms" != xauto; then
with_egl_platforms=$with_platforms
fi
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
WAYLAND_SCANNER='')
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
fi
# Do per-EGL platform setups and checks
egl_platforms=`IFS=', '; echo $with_egl_platforms`
for plat in $egl_platforms; do
case "$plat" in
wayland)
PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED])
if test "x$WAYLAND_SCANNER" = "x:"; then
AC_MSG_ERROR([wayland-scanner is needed to compile the wayland egl platform])
fi
;;
x11)
PKG_CHECK_MODULES([XCB_DRI2], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED xcb-xfixes])
;;
drm)
test "x$enable_gbm" = "xno" &&
AC_MSG_ERROR([EGL platform drm needs gbm])
;;
surfaceless)
;;
android)
PKG_CHECK_MODULES([ANDROID], [cutils hardware sync])
;;
*)
AC_MSG_ERROR([EGL platform '$plat' does not exist])
;;
esac
case "$plat" in
wayland|drm|surfaceless)
require_libdrm "Platform $plat"
;;
esac
done
# libEGL wants to default to the first platform specified in
# ./configure. parse that here.
if test "x$egl_platforms" != "x"; then
FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr '[[a-z]]' '[[A-Z]]'`
if test "x$platforms" != "x"; then
FIRST_PLATFORM_CAPS=`echo $platforms | sed 's| .*||' | tr '[[a-z]]' '[[A-Z]]'`
EGL_NATIVE_PLATFORM="_EGL_PLATFORM_$FIRST_PLATFORM_CAPS"
else
EGL_NATIVE_PLATFORM="_EGL_INVALID_PLATFORM"
fi
AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$egl_platforms" | grep -q 'x11')
AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, echo "$egl_platforms" | grep -q 'wayland')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_DRM, echo "$egl_platforms" | grep -q 'drm')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_SURFACELESS, echo "$egl_platforms" | grep -q 'surfaceless')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_ANDROID, echo "$egl_platforms" | grep -q 'android')
AC_SUBST([EGL_NATIVE_PLATFORM])
AC_SUBST([EGL_CFLAGS])
# If we don't have the X11 platform, set this define so we don't try to include
# the X11 headers.
if ! echo "$egl_platforms" | grep -q 'x11'; then
if ! echo "$platforms" | grep -q 'x11'; then
DEFINES="$DEFINES -DMESA_EGL_NO_X11_HEADERS"
GL_PC_CFLAGS="$GL_PC_CFLAGS -DMESA_EGL_NO_X11_HEADERS"
fi
@@ -2316,7 +2357,7 @@ dnl DRM is needed by X, Wayland, and offscreen rendering.
dnl Surfaceless is an alternative for the last one.
dnl
require_basic_egl() {
case "$with_egl_platforms" in
case "$with_platforms" in
*drm*|*surfaceless*)
;;
*)
@@ -2435,10 +2476,10 @@ if test -n "$with_gallium_drivers"; then
xswr)
llvm_require_version $LLVM_REQUIRED_SWR "swr"
swr_require_cxx_feature_flags "C++14" "__cplusplus >= 201402L" \
"-std=c++14" \
SWR_CXX14_CXXFLAGS
AC_SUBST([SWR_CXX14_CXXFLAGS])
swr_require_cxx_feature_flags "C++11" "__cplusplus >= 201103L" \
",-std=c++11" \
SWR_CXX11_CXXFLAGS
AC_SUBST([SWR_CXX11_CXXFLAGS])
swr_require_cxx_feature_flags "AVX" "defined(__AVX__)" \
",-mavx,-march=core-avx" \
@@ -2465,7 +2506,9 @@ if test -n "$with_gallium_drivers"; then
xvirgl)
HAVE_GALLIUM_VIRGL=yes
require_libdrm "virgl"
require_basic_egl "virgl"
if test "x$enable_egl" = xyes; then
require_basic_egl "virgl"
fi
;;
*)
AC_MSG_ERROR([Unknown Gallium driver: $driver])
@@ -2474,6 +2517,10 @@ if test -n "$with_gallium_drivers"; then
done
fi
# XXX: Keep in sync with LLVM_REQUIRED_SWR
AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x3.9.0 -a \
"x$LLVM_VERSION" != x3.9.1)
if test "x$enable_llvm" = "xyes" -a "$with_gallium_drivers"; then
llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium"
llvm_add_default_components "gallium"
@@ -2869,7 +2916,7 @@ else
echo " GBM: no"
fi
echo " EGL/Vulkan/VL platforms: $egl_platforms"
echo " EGL/Vulkan/VL platforms: $platforms"
# Vulkan
echo ""

View File

@@ -77,15 +77,13 @@ drivers will be installed to <code>${libdir}/egl</code>.</p>
</dd>
<dt><code>--with-egl-platforms</code></dt>
<dt><code>--with-platforms</code></dt>
<dd>
<p>List the platforms (window systems) to support. Its argument is a comma
separated string such as <code>--with-egl-platforms=x11,drm</code>. It decides
separated string such as <code>--with-platforms=x11,drm</code>. It decides
the platforms a driver may support. The first listed platform is also used by
the main library to decide the native platform: this defines EGL native
types such as <code>EGLNativeDisplayType</code> or
<code>EGLNativeWindowType</code>.</p>
the main library to decide the native platform.</p>
<p>The available platforms are <code>x11</code>, <code>drm</code>,
<code>wayland</code>, <code>surfaceless</code>, <code>android</code>,
@@ -167,9 +165,9 @@ binaries.</p>
<dd>
<p>This variable specifies the native platform. The valid values are the same
as those for <code>--with-egl-platforms</code>. When the variable is not set,
as those for <code>--with-platforms</code>. When the variable is not set,
the main library uses the first platform listed in
<code>--with-egl-platforms</code> as the native platform.</p>
<code>--with-platforms</code> as the native platform.</p>
<p>Extensions like <code>EGL_MESA_drm_display</code> define new functions to
create displays for non-native platforms. These extensions are usually used by

View File

@@ -402,7 +402,7 @@ Here is one solution that I've been using.
--enable-glx-tls \
--enable-gbm \
--enable-egl \
--with-egl-platforms=x11,drm,wayland
--with-platforms=x11,drm,wayland,surfaceless
make -j2 &amp;&amp; DESTDIR=`pwd`/test make -j6 install
__glxinfo_cmd='glxinfo 2>&amp;1 | egrep -o "Mesa.*|Gallium.*|.*dri\.so"'
__glxgears_cmd='glxgears 2>&amp;1 | grep -v "configuration file"'

View File

@@ -14,7 +14,7 @@
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.1.0 Release Notes / TBD</h1>
<h1>Mesa 17.1.0 Release Notes / May 10, 2017</h1>
<p>
Mesa 17.1.0 is a new development release.
@@ -33,7 +33,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
TBD.
c388069581a72853161657ac365f2c083afabd7cffd53f80513dacfa1cfa58a8 mesa-17.1.0.tar.gz
cf234a6ed4764673886b6661553b54675776ef0898f774716173cec890ac3b17 mesa-17.1.0.tar.xz
</pre>
@@ -63,6 +64,147 @@ Note: some of the new features are only available with certain drivers.
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68504">Bug 68504</a> - 9.2-rc1 workaround for clover build failure on ppc/altivec: cannot convert 'bool' to '__vector(4) __bool int' in return</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84325">Bug 84325</a> - X.Org segfaults when starting DE on an Intel+Radeon laptop, caused by libpciaccess cleanup, patch attached</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=93089">Bug 93089</a> - mesa fails to check for gcc atomic primitives before using them</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=95460">Bug 95460</a> - Please add more drivers (freedreno, virgl) to features.txt status document</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=96743">Bug 96743</a> - [BYT, HSW, SKL, BXT, KBL] GPU hangs with GfxBench 4.0 CarChase</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97102">Bug 97102</a> - [dri][swr] stack overflow / infinite loop with GALLIUM_DRIVER=swr</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97338">Bug 97338</a> - Black squares in the Spec Ops: The Line chapter select screen</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97524">Bug 97524</a> - Samplers referring to the same texture unit with different types should raise GL_INVALID_OPERATION</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97967">Bug 97967</a> - glsl/tests/cache-test regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97988">Bug 97988</a> - [radeonsi] playing back videos with VDPAU exhibits deinterlacing/anti-aliasing issues not visible with VA-API</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98263">Bug 98263</a> - [radv] The Talos Principle fails to launch with &quot;Fatal error: Cannot set display mode.&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98428">Bug 98428</a> - Undefined non-weak-symbol in dri-drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98502">Bug 98502</a> - Delay when starting firefox, thunderbird or chromium and dmesg spam</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98869">Bug 98869</a> - Electronic Super Joy graphic artefacts (regression,bisected)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98975">Bug 98975</a> - Wasteland 2 Directors Cut: Hangs. GPU fault</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99010">Bug 99010</a> - --disable-gallium-llvm no longer recognized</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99246">Bug 99246</a> - [d3dadapter+radeonsi &amp; bisect] EVE-Online : hang on wormhole sight</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99265">Bug 99265</a> - i965: Piglit egl_khr_gl_renderbuffer_image-clear-shared-image fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99339">Bug 99339</a> - Blender line rendering broken after removing XY clipping of lines</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99401">Bug 99401</a> - [g33] regression: piglit.spec.!opengl 1_0.gl-1_0-beginend-coverage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99450">Bug 99450</a> - [amdgpu] Payday 2 visual glitches on some models</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99451">Bug 99451</a> - polygon offset use after free</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99456">Bug 99456</a> - Firefox crashing when opening about:support with WebGL2 enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99465">Bug 99465</a> - vtn_vector_construct writing out of bounds when given multiple non-zero length sources</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99484">Bug 99484</a> - Crusader Kings 2 - Loading bars, siege bars, morale bars, etc. do not render correctly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99532">Bug 99532</a> - Compute shader doesn't give right result under some circumstances</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99542">Bug 99542</a> - vdpau logging errors since gallium/radeon: adjust the rule for using the LINEAR_ALIGNED layout</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99631">Bug 99631</a> - segfault with OSVRTrackerView and openscenegraph git master</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99633">Bug 99633</a> - rasterizer/core/clip.h:279:49: error: const struct API_STATE has no member named linkageCount</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99660">Bug 99660</a> - Not all of the int64 conversion opcodes got implemented</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99677">Bug 99677</a> - heap-use-after-free in glsl</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99692">Bug 99692</a> - [radv] Mostly broken on Hawaii PRO/CIK ASICs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99701">Bug 99701</a> - loader.c:353:8: error: implicit declaration of function 'geteuid' is invalid in C99 [-Werror,-Wimplicit-function-declaration]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99715">Bug 99715</a> - Don't print: &quot;Note: Buggy applications may crash, if they do please report to vendor&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99789">Bug 99789</a> - Memory leak on failure to create an ir_constant in calculate_iterations in loop_controls.cpp</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99817">Bug 99817</a> - [softpipe] piglit glsl-fs-tan-1 regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99842">Bug 99842</a> - GL_ARB_transform_feedback2 on i965 gen6</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99850">Bug 99850</a> - Tessellation bug on Carrizo</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99918">Bug 99918</a> - disk_cache.h:57:20: error: no member named 'st_mtim' in 'struct stat'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99953">Bug 99953</a> - device9.c:122:49: error: PIPE_CAP_USER_INDEX_BUFFERS undeclared (first use in this function)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99955">Bug 99955</a> - [r600g] GPU load always displayed at 100% with GALLIUM_HUD=GPU-load</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100026">Bug 100026</a> - piglit.spec.arb_shader_subroutine.compiler.direct-call_vert regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100049">Bug 100049</a> - &quot;ralloc: Make sure ralloc() allocations match malloc()'s alignment.&quot; causes seg fault in 32bit build</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100060">Bug 100060</a> - wsi/wsi_common_wayland.c:25:41: fatal error: wayland-drm-client-protocol.h: No such file or directory</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100061">Bug 100061</a> - LODQ instruction generated with invalid dst mask</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100068">Bug 100068</a> - LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.buffer.load.format</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100088">Bug 100088</a> - piglit.spec.arb_get_texture_sub_image.arb_get_texture_sub_image regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100091">Bug 100091</a> - Failure to create folder for on-disk shader cache</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100133">Bug 100133</a> - swr_context.cpp:336:44: error: invalid conversion from uint {aka unsigned int} to pipe_render_cond_flag [-fpermissive]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100154">Bug 100154</a> - test_eu_compact regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100180">Bug 100180</a> - Build failure in GNOME Continuous</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100182">Bug 100182</a> - Flickering in The Talos Principle on Sky Lake GT4.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100201">Bug 100201</a> - Windows scons build with MSVC toolchain and LLVM 4.0 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100223">Bug 100223</a> - marshal_generated.c:38:10: fatal error: 'X11/Xlib-xcb.h' file not found</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100236">Bug 100236</a> - Undefined symbols for architecture x86_64: &quot;typeinfo for llvm::RTDyldMemoryManager&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100259">Bug 100259</a> - [EGL] [GBM] undefined reference to `gbm_bo_create_with_modifiers'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100288">Bug 100288</a> - clover unable to run OpenCL kernels since 03127bb radeonsi: compile all TGSI compute shaders asynchronously</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100303">Bug 100303</a> - Adding a single, meaningless if-else to a shader source leads to different image</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100391">Bug 100391</a> - SachaWillems deferredmultisampling asserts</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100452">Bug 100452</a> - push_constants host memory leak when resetting command buffer</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100531">Bug 100531</a> - [regression] Broken graphics in several games</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100562">Bug 100562</a> - u_debug_stack.c:59: undefined reference to `_Ux86_64_getcontext'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100569">Bug 100569</a> - core/resource.cpp:36:33: error: non-constant-expression cannot be narrowed from type 'int' to 'int16_t' (aka 'short') in initializer list [-Wc++11-narrowing]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100574">Bug 100574</a> - anv_device.c:189: undefined reference to `anv_gem_supports_48b_addresses'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100582">Bug 100582</a> - [GEN8+] piglit.spec.arb_stencil_texturing.glblitframebuffer corrupts state.gl_texture* assertions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100600">Bug 100600</a> - anv_device.c:1337: undefined reference to `anv_gem_busy'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100620">Bug 100620</a> - [SKL] 48-bit addresses break DOOM</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100663">Bug 100663</a> - commit 61e47d92c5196 breaks RS780</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100690">Bug 100690</a> - [Regression, bisected] TotalWar: Warhammer corrupted graphics</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100892">Bug 100892</a> - Polaris 12: winsys init bad switch (missing break) initializing addrlib</li>
</ul>
<h2>Changes</h2>

188
docs/relnotes/17.1.1.html Normal file
View File

@@ -0,0 +1,188 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.1.1 Release Notes / March 25, 2017</h1>
<p>
Mesa 17.1.1 is a bug fix release which fixes bugs found since the 17.1.0 release.
</p>
<p>
Mesa 17.1.1 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
652315af87f2bb015ce99ee3b90d9d115d53cbf9e052493bd13d521a753b1930 mesa-17.1.1.tar.gz
aed503f94c0c1630a162a3e276f4ee12a86764cee4cb92338ea2dea99a04e7ef mesa-17.1.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100854">Bug 100854</a> - YUV to RGB Color Space Conversion result is not precise</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100925">Bug 100925</a> - [HSW/BSW/BDW/SKL] Google Earth is not resolving all the details in the map correctly</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (1):</p>
<ul>
<li>radeonsi: add new vega10 pci ids</li>
</ul>
<p>Andres Gomez (2):</p>
<ul>
<li>bin/get-fixes-pick-list.sh: don't warn if more than one, go over them</li>
<li>bin/get-fixes-pick-list.sh: bring back the warning</li>
</ul>
<p>Bruce Cherniak (1):</p>
<ul>
<li>swr: move msaa resolve to generalized StoreTile</li>
</ul>
<p>Chad Versace (1):</p>
<ul>
<li>egl: Partially revert 23c86c74, fix eglMakeCurrent</li>
</ul>
<p>Chih-Wei Huang (1):</p>
<ul>
<li>Android: correct libz dependency</li>
</ul>
<p>Daniel Stone (1):</p>
<ul>
<li>gbm/dri: Fix sign-extension in modifier query</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: add sha256 checksums for 17.1.0</li>
<li>radeon: automake: remove unneeded elf Cflags/Libs</li>
<li>configure: remove unneeded bits around libunwind handling</li>
<li>egl: add g_egldispatchstubs.h to the release tarball</li>
<li>automake: add SWR LLVM gen_builder.hpp workaround</li>
<li>Update version to 17.1.1</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>renderonly: Initialize fields of struct winsys_handle.</li>
<li>vc4: Don't allocate new BOs to avoid synchronization when they're shared.</li>
</ul>
<p>Grazvydas Ignotas (2):</p>
<ul>
<li>anv: fix possible stack corruption</li>
<li>anv: don't leak DRM devices</li>
</ul>
<p>Hans de Goede (1):</p>
<ul>
<li>glxglvnddispatch: Add missing dispatch for GetDriverConfig</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nvc0/ir: SHLADD's middle source must be an immediate</li>
</ul>
<p>Johnson Lin (1):</p>
<ul>
<li>nir/lower_tex: Fix minor error in YUV color conversion matrix</li>
</ul>
<p>Juan A. Suarez Romero (2):</p>
<ul>
<li>bin/get-{extra,fixes}-pick-list.sh: add support for ignore list</li>
<li>bin/get-{extra,fixes}-pick-list.sh: improve output</li>
</ul>
<p>Lucas Stach (2):</p>
<ul>
<li>etnaviv: stop oversizing buffer resources</li>
<li>etnaviv: allow R/B swapped surfaces to be cleared</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>amd/addrlib: import Raven support</li>
<li>radeonsi/gfx9: add support for Raven</li>
</ul>
<p>Nanley Chery (2):</p>
<ul>
<li>anv/formats: Update the three-channel BC1 mappings</li>
<li>i965/formats: Update the three-channel DXT1 mappings</li>
</ul>
<p>Nicolai Hähnle (5):</p>
<ul>
<li>radeonsi: mark fast-cleared textures as compressed when dirtying</li>
<li>radeonsi: fix primitive ID in fragment shader when using tessellation</li>
<li>radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI</li>
<li>radeonsi: fix gl_PrimitiveIDIn in geometry shader when using tessellation</li>
<li>st/mesa: remove an incorrect assertion</li>
</ul>
<p>Pohjolainen, Topi (1):</p>
<ul>
<li>intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4</li>
</ul>
<p>Rob Clark (2):</p>
<ul>
<li>mesa/st: fix yuv EGLImage's</li>
<li>freedreno: fix crash when flush() but no rendering</li>
</ul>
<p>Rob Herring (1):</p>
<ul>
<li>virgl: fix virgl_bo_transfer_{put, get} box struct copy</li>
</ul>
<p>Samuel Iglesias Gonsálvez (3):</p>
<ul>
<li>i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution</li>
<li>i965/vec4: fix swizzle and writemask when loading an uniform with constant offset</li>
<li>i965/vec4: load dvec3/4 uniforms first in the push constant buffer</li>
</ul>
<p>Tom Stellard (1):</p>
<ul>
<li>gallivm: Make sure module has the correct data layout when pass manager runs</li>
</ul>
</div>
</body>
</html>

187
docs/relnotes/17.1.2.html Normal file
View File

@@ -0,0 +1,187 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.1.2 Release Notes / June 5, 2017</h1>
<p>
Mesa 17.1.2 is a bug fix release which fixes bugs found since the 17.1.1 release.
</p>
<p>
Mesa 17.1.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
0d2020c2115db0d13a5be0075abf0da143290f69f5817a2f277861e89166a3e1 mesa-17.1.2.tar.gz
0937804f43746339b1f9540d8f9c8b4a1bb3d3eec0e4020eac283b8799798239 mesa-17.1.2.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98833">Bug 98833</a> - [REGRESSION, bisected] Wayland revert commit breaks non-Vsync fullscreen frame updates</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100741">Bug 100741</a> - Chromium - Memory leak</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100877">Bug 100877</a> - vulkan/tests/block_pool_no_free regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101110">Bug 101110</a> - Build failure in GNOME Continuous</li>
</ul>
<h2>Changes</h2>
<p>Bartosz Tomczyk (1):</p>
<ul>
<li>mesa: Avoid leaking surface in st_renderbuffer_delete</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: Reserve space for descriptor and push constant user SGPR setting.</li>
</ul>
<p>Daniel Stone (7):</p>
<ul>
<li>vulkan: Fix Wayland uninitialised registry</li>
<li>vulkan/wsi/wayland: Remove roundtrip when creating image</li>
<li>vulkan/wsi/wayland: Use per-display event queue</li>
<li>vulkan/wsi/wayland: Use proxy wrappers for swapchain</li>
<li>egl/wayland: Don't open-code roundtrip</li>
<li>egl/wayland: Use per-surface event queues</li>
<li>egl/wayland: Ensure we get a back buffer</li>
</ul>
<p>Emil Velikov (24):</p>
<ul>
<li>docs: add sha256 checksums for 17.1.1</li>
<li>configure: move platform handling further up</li>
<li>configure: rename remaining HAVE_EGL_PLATFORM_* guards</li>
<li>configure: update remaining --with-egl-platforms references</li>
<li>configure: loosen --with-platforms heuristics</li>
<li>configure: enable the surfaceless platform by default</li>
<li>configure: set HAVE_foo_PLATFORM as applicable</li>
<li>configure: error out when building GLX w/o the X11 platform</li>
<li>configure: check once for DRI3 dependencies</li>
<li>loader: build libloader_dri3_helper.la only with HAVE_PLATFORM_X11</li>
<li>configure: error out when building X11 Vulkan without DRI3</li>
<li>auxiliary/vl: use vl_*_screen_create stubs when building w/o platform</li>
<li>st/va: fix misplaced closing bracket</li>
<li>st/omx: remove unneeded X11 include</li>
<li>st/omx: fix building against X11-less setups</li>
<li>gallium/targets: link against XCB only as needed</li>
<li>configure: error out if building VA w/o supported platform</li>
<li>configure: error out if building OMX w/o supported platform</li>
<li>configure: error out if building VDPAU w/o supported platform</li>
<li>configure: error out if building XVMC w/o supported platform</li>
<li>travis: remove workarounds for the Vulkan target</li>
<li>anv: automake: list shared libraries after the static ones</li>
<li>radv: automake: list shared libraries after the static ones</li>
<li>egl/wayland: select the format based on the interface used</li>
</ul>
<p>Ian Romanick (3):</p>
<ul>
<li>r100: Don't assume that the base mipmap of a texture exists</li>
<li>r100,r200: Don't assume glVisual is non-NULL during context creation</li>
<li>r100: Use _mesa_get_format_base_format in radeon_update_wrapper</li>
</ul>
<p>Jason Ekstrand (17):</p>
<ul>
<li>anv: Handle color layout transitions from the UNINITIALIZED layout</li>
<li>anv: Handle transitioning depth from UNDEFINED to other layouts</li>
<li>anv/image: Get rid of the memset(aux, 0, sizeof(aux)) hack</li>
<li>anv: Predicate 48bit support on gen &gt;= 8</li>
<li>anv: Set up memory types and heaps during physical device init</li>
<li>anv: Set image memory types based on the type count</li>
<li>i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops</li>
<li>i965: Round copy size to the nearest block in intel_miptree_copy</li>
<li>anv: Set EXEC_OBJECT_ASYNC when available</li>
<li>anv: Determine the type of mapping based on type metadata</li>
<li>anv: Add valid_bufer_usage to the memory type metadata</li>
<li>anv: Stop setting BO flags in bo_init_new</li>
<li>anv: Make supports_48bit_addresses a heap property</li>
<li>anv: Refactor memory type setup</li>
<li>anv: Advertise both 32-bit and 48-bit heaps when we have enough memory</li>
<li>i965: Rework Sandy Bridge HiZ and stencil layouts</li>
<li>anv: Require vertex buffers to come from a 32-bit heap</li>
</ul>
<p>Juan A. Suarez Romero (13):</p>
<ul>
<li>Revert "android: fix segfault within swap_buffers"</li>
<li>cherry-ignore: radeonsi: load patch_id for TES-as-ES when exporting for PS</li>
<li>cherry-ignore: anv: Determine the type of mapping based on type metadata</li>
<li>cherry-ignore: anv: Stop setting BO flags in bo_init_new</li>
<li>cherry-ignore: anv: Make supports_48bit_addresses a heap property</li>
<li>cherry-ignore: anv: Advertise both 32-bit and 48-bit heaps when we have enough memory</li>
<li>cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap</li>
<li>cherry-ignore: radv: fix regression in descriptor set freeing</li>
<li>cherry-ignore: anv: Add valid_bufer_usage to the memory type metadata</li>
<li>cherry-ignore: anv: Refactor memory type setup</li>
<li>Revert "cherry-ignore: anv: [...]"</li>
<li>Revert "cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap"</li>
<li>Update version to 17.1.2</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi/gfx9: compile shaders with +xnack</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>st/mesa: remove redundant stfb-&gt;iface checks</li>
</ul>
<p>Nicolas Boichat (1):</p>
<ul>
<li>configure.ac: Also match -androideabi tuple</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno: fix fence creation fail if no rendering</li>
</ul>
<p>Tapani Pälli (1):</p>
<ul>
<li>egl/android: fix segfault within swap_buffers</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>st/mesa: don't mark the program as in cache_fallback when there is cache miss</li>
</ul>
</div>
</body>
</html>

155
docs/relnotes/17.1.3.html Normal file
View File

@@ -0,0 +1,155 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.1.3 Release Notes / June 19, 2017</h1>
<p>
Mesa 17.1.3 is a bug fix release which fixes bugs found since the 17.1.2 release.
</p>
<p>
Mesa 17.1.3 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100988">Bug 100988</a> - glXGetCurrentDisplay() no longer works for FakeGLX contexts?</li>
</ul>
<h2>Changes</h2>
<p>Bas Nieuwenhuizen (3):</p>
<ul>
<li>radv: Set both compute and graphics SGPRS on descriptor set flush.</li>
<li>radv: Dirty all descriptors sets when changing the pipeline.</li>
<li>radv: Remove SI num RB override for occlusion queries.</li>
</ul>
<p>Brian Paul (1):</p>
<ul>
<li>xlib: fix glXGetCurrentDisplay() failure</li>
</ul>
<p>Chad Versace (1):</p>
<ul>
<li>i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()</li>
</ul>
<p>Chuck Atkins (1):</p>
<ul>
<li>configure.ac: Reduce zlib requirement from 1.2.8 to 1.2.3.</li>
</ul>
<p>Dave Airlie (3):</p>
<ul>
<li>radv: expose integrated device type for APUs.</li>
<li>radv: set fmask state to all 0s when no fmask. (v2)</li>
<li>glsl/lower_distance: only set max_array_access for 1D clip dist arrays</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>Update version to 17.1.3</li>
</ul>
<p>Grazvydas Ignotas (1):</p>
<ul>
<li>radv: fix trace dumping for !use_ib_bos</li>
</ul>
<p>Jason Ekstrand (4):</p>
<ul>
<li>i965/blorp: Take a layer range in intel_hiz_exec</li>
<li>i965: Move the pre-depth-clear flush/stalls to intel_hiz_exec</li>
<li>i965: Perform HiZ flush/stall prior to HiZ resolves</li>
<li>i965: Mark depth surfaces as needing a HiZ resolve after blitting</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>automake: Link all libGL.so variants with -Bsymbolic.</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.1.2</li>
</ul>
<p>Lucas Stach (1):</p>
<ul>
<li>etnaviv: always do cpu_fini in transfer_unmap</li>
</ul>
<p>Lyude (1):</p>
<ul>
<li>nvc0: disable BGRA8 images on Fermi</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>st/mesa: don't load cached TGSI shaders on demand</li>
<li>radeonsi: fix a GPU hang with tessellation on 2-CU configs</li>
<li>radeonsi: disable the patch ID workaround on SI when the patch ID isn't used (v2)</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>radv: fewer than 8 RBs are possible</li>
</ul>
<p>Nicolas Dechesne (1):</p>
<ul>
<li>util/rand_xor: add missing include statements</li>
</ul>
<p>Tapani Pälli (1):</p>
<ul>
<li>egl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT case</li>
</ul>
<p>Thomas Hellstrom (1):</p>
<ul>
<li>dri3/GLX: Fix drawable invalidation v2</li>
</ul>
<p>Tim Rowley (1):</p>
<ul>
<li>swr: relax c++ requirement from c++14 to c++11</li>
</ul>
</div>
</body>
</html>

View File

@@ -219,6 +219,10 @@ CHIPSET(0x6860, VEGA10_, VEGA10)
CHIPSET(0x6861, VEGA10_, VEGA10)
CHIPSET(0x6862, VEGA10_, VEGA10)
CHIPSET(0x6863, VEGA10_, VEGA10)
CHIPSET(0x6864, VEGA10_, VEGA10)
CHIPSET(0x6867, VEGA10_, VEGA10)
CHIPSET(0x6868, VEGA10_, VEGA10)
CHIPSET(0x687F, VEGA10_, VEGA10)
CHIPSET(0x686C, VEGA10_, VEGA10)
CHIPSET(0x15DD, RAVEN_, RAVEN)

View File

@@ -103,8 +103,26 @@ def generate(env):
'HAVE_STDINT_H',
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
# LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter`
if llvm_version >= distutils.version.LooseVersion('3.9'):
# LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter irreader`
if llvm_version >= distutils.version.LooseVersion('4.0'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
'LLVMDebugInfoCodeView', 'LLVMCodeGen',
'LLVMScalarOpts', 'LLVMInstCombine',
'LLVMTransformUtils',
'LLVMBitWriter', 'LLVMX86Desc',
'LLVMMCDisassembler', 'LLVMX86Info',
'LLVMX86AsmPrinter', 'LLVMX86Utils',
'LLVMMCJIT', 'LLVMExecutionEngine', 'LLVMTarget',
'LLVMAnalysis', 'LLVMProfileData',
'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser',
'LLVMBitReader', 'LLVMMC', 'LLVMCore',
'LLVMSupport',
'LLVMIRReader', 'LLVMAsmParser',
'LLVMDemangle', 'LLVMGlobalISel', 'LLVMDebugInfoMSF',
])
elif llvm_version >= distutils.version.LooseVersion('3.9'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',

View File

@@ -65,6 +65,8 @@ common_libamd_common_la_SOURCES += $(AMD_NIR_FILES)
endif
endif
common_libamd_common_la_LIBADD = $(LIBELF_LIBS)
common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h
$(AM_V_at)$(MKDIR_P) $(@D)
$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@

View File

@@ -1193,6 +1193,20 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily(
m_settings.depthPipeXorDisable = 1;
break;
case FAMILY_RV:
m_settings.isArcticIsland = 1;
m_settings.isRaven = ASICREV_IS_RAVEN(uChipRevision);
if (m_settings.isRaven)
{
m_settings.isDcn1 = 1;
}
m_settings.metaBaseAlignFix = 1;
m_settings.depthPipeXorDisable = 1;
break;
default:
ADDR_ASSERT(!"This should be a Fusion");
break;
@@ -2734,6 +2748,35 @@ BOOL_32 Gfx9Lib::IsValidDisplaySwizzleMode(
break;
}
}
else if (m_settings.isDcn1)
{
switch (swizzleMode)
{
case ADDR_SW_4KB_D:
case ADDR_SW_64KB_D:
case ADDR_SW_VAR_D:
case ADDR_SW_64KB_D_T:
case ADDR_SW_4KB_D_X:
case ADDR_SW_64KB_D_X:
case ADDR_SW_VAR_D_X:
support = (pIn->bpp == 64);
break;
case ADDR_SW_LINEAR:
case ADDR_SW_4KB_S:
case ADDR_SW_64KB_S:
case ADDR_SW_VAR_S:
case ADDR_SW_64KB_S_T:
case ADDR_SW_4KB_S_X:
case ADDR_SW_64KB_S_X:
case ADDR_SW_VAR_S_X:
support = (pIn->bpp <= 64);
break;
default:
break;
}
}
else
{
ADDR_NOT_IMPLEMENTED();
@@ -3195,6 +3238,20 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
// DCE12 does not support display surface to be _T swizzle mode
prtXor = FALSE;
}
else if (m_settings.isDcn1)
{
// _R is not supported by Dcn1
if (pIn->bpp == 64)
{
swType = ADDR_SW_D;
}
else
{
swType = ADDR_SW_S;
}
blockSet.micro = FALSE;
}
else
{
ADDR_NOT_IMPLEMENTED();

View File

@@ -54,11 +54,13 @@ struct Gfx9ChipSettings
// Asic/Generation name
UINT_32 isArcticIsland : 1;
UINT_32 isVega10 : 1;
UINT_32 reserved0 : 30;
UINT_32 isRaven : 1;
UINT_32 reserved0 : 29;
// Display engine IP version name
UINT_32 isDce12 : 1;
UINT_32 reserved1 : 31;
UINT_32 isDcn1 : 1;
UINT_32 reserved1 : 29;
// Misc configuration bits
UINT_32 metaBaseAlignFix : 1;
@@ -201,7 +203,7 @@ protected:
if (IsXor(swizzleMode))
{
if (m_settings.isVega10)
if (m_settings.isVega10 || m_settings.isRaven)
{
baseAlign = GetBlockSize(swizzleMode);
}

View File

@@ -114,6 +114,7 @@ static const char *ac_get_llvm_processor_name(enum radeon_family family)
case CHIP_POLARIS10:
return "polaris10";
case CHIP_POLARIS11:
case CHIP_POLARIS12:
return "polaris11";
#endif
default:

View File

@@ -1230,6 +1230,33 @@ static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
}
static LLVMValueRef emit_f2f16(struct nir_to_llvm_context *ctx,
LLVMValueRef src0)
{
LLVMValueRef result;
LLVMValueRef cond;
src0 = to_float(ctx, src0);
result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
/* TODO SI/CIK options here */
if (ctx->options->chip_class >= VI) {
LLVMValueRef args[2];
/* Check if the result is a denormal - and flush to 0 if so. */
args[0] = result;
args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
}
/* need to convert back up to f32 */
result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
if (ctx->options->chip_class >= VI)
result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero, result, "");
return result;
}
static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx,
LLVMValueRef src0, LLVMValueRef src1)
{
@@ -1626,10 +1653,18 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
case nir_op_fmax:
result = emit_intrin_2f_param(ctx, "llvm.maxnum",
to_float_type(ctx, def_type), src[0], src[1]);
if (instr->dest.dest.ssa.bit_size == 32)
result = emit_intrin_1f_param(ctx, "llvm.canonicalize",
to_float_type(ctx, def_type),
result);
break;
case nir_op_fmin:
result = emit_intrin_2f_param(ctx, "llvm.minnum",
to_float_type(ctx, def_type), src[0], src[1]);
if (instr->dest.dest.ssa.bit_size == 32)
result = emit_intrin_1f_param(ctx, "llvm.canonicalize",
to_float_type(ctx, def_type),
result);
break;
case nir_op_ffma:
result = emit_intrin_3f_param(ctx, "llvm.fma",
@@ -1717,10 +1752,7 @@ static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
result = emit_b2f(ctx, src[0]);
break;
case nir_op_fquantize2f16:
src[0] = to_float(ctx, src[0]);
result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, "");
/* need to convert back up to f32 */
result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
result = emit_f2f16(ctx, src[0]);
break;
case nir_op_umul_high:
result = emit_umul_high(ctx, src[0], src[1]);

View File

@@ -93,6 +93,7 @@ enum radeon_family {
CHIP_POLARIS11,
CHIP_POLARIS12,
CHIP_VEGA10,
CHIP_RAVEN,
CHIP_LAST,
};

View File

@@ -49,6 +49,7 @@ enum {
FAMILY_CZ,
FAMILY_PI,
FAMILY_AI,
FAMILY_RV,
FAMILY_LAST,
};
@@ -185,4 +186,13 @@ enum {
#define ASICREV_IS_VEGA10_P(eChipRev) \
((eChipRev) >= AI_VEGA10_P_A0 && (eChipRev) < AI_UNKNOWN)
/* RV specific rev IDs */
enum {
RAVEN_A0 = 0x01,
RAVEN_UNKNOWN = 0xFF
};
#define ASICREV_IS_RAVEN(eChipRev) \
((eChipRev) >= RAVEN_A0 && (eChipRev) < RAVEN_UNKNOWN)
#endif /* AMDGPU_ID_H */

View File

@@ -4074,6 +4074,10 @@
#define S_028060_PUNCHOUT_MODE(x) (((unsigned)(x) & 0x03) << 0)
#define G_028060_PUNCHOUT_MODE(x) (((x) >> 0) & 0x03)
#define C_028060_PUNCHOUT_MODE 0xFFFFFFFC
#define V_028060_AUTO 0
#define V_028060_FORCE_ON 1
#define V_028060_FORCE_OFF 2
#define V_028060_RESERVED 3
#define S_028060_POPS_DRAIN_PS_ON_OVERLAP(x) (((unsigned)(x) & 0x1) << 2)
#define G_028060_POPS_DRAIN_PS_ON_OVERLAP(x) (((x) >> 2) & 0x1)
#define C_028060_POPS_DRAIN_PS_ON_OVERLAP 0xFFFFFFFB

View File

@@ -9094,5 +9094,18 @@
#define CIK_SDMA_PACKET_SRBM_WRITE 0xe
#define CIK_SDMA_COPY_MAX_SIZE 0x3fffe0
enum amd_cmp_class_flags {
S_NAN = 1 << 0, // Signaling NaN
Q_NAN = 1 << 1, // Quiet NaN
N_INFINITY = 1 << 2, // Negative infinity
N_NORMAL = 1 << 3, // Negative normal
N_SUBNORMAL = 1 << 4, // Negative subnormal
N_ZERO = 1 << 5, // Negative zero
P_ZERO = 1 << 6, // Positive zero
P_SUBNORMAL = 1 << 7, // Positive subnormal
P_NORMAL = 1 << 8, // Positive normal
P_INFINITY = 1 << 9 // Positive infinity
};
#endif /* _SID_H */

View File

@@ -59,8 +59,22 @@ VULKAN_SOURCES = \
$(VULKAN_GENERATED_FILES) \
$(VULKAN_FILES)
VULKAN_LIB_DEPS =
VULKAN_LIB_DEPS = \
libvulkan_common.la \
$(top_builddir)/src/vulkan/libvulkan_util.la \
$(top_builddir)/src/vulkan/libvulkan_wsi.la \
$(top_builddir)/src/amd/common/libamd_common.la \
$(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(LLVM_LIBS) \
$(LIBELF_LIBS) \
$(PTHREAD_LIBS) \
$(AMDGPU_LIBS) \
$(LIBDRM_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
-lm
if HAVE_PLATFORM_X11
AM_CPPFLAGS += \
@@ -70,8 +84,7 @@ AM_CPPFLAGS += \
VULKAN_SOURCES += $(VULKAN_WSI_X11_FILES)
# FIXME: Use pkg-config for X11-xcb ldflags.
VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS) -lX11-xcb
VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS)
endif
@@ -89,23 +102,6 @@ endif
noinst_LTLIBRARIES = libvulkan_common.la
libvulkan_common_la_SOURCES = $(VULKAN_SOURCES)
VULKAN_LIB_DEPS += \
libvulkan_common.la \
$(top_builddir)/src/vulkan/libvulkan_util.la \
$(top_builddir)/src/vulkan/libvulkan_wsi.la \
$(top_builddir)/src/amd/common/libamd_common.la \
$(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(LLVM_LIBS) \
$(LIBELF_LIBS) \
$(PTHREAD_LIBS) \
$(AMDGPU_LIBS) \
$(LIBDRM_LIBS) \
$(PTHREAD_LIBS) \
$(DLOPEN_LIBS) \
-lm
nodist_EXTRA_libvulkan_radeon_la_SOURCES = dummy.cpp
libvulkan_radeon_la_SOURCES = $(VULKAN_GEM_FILES)

View File

@@ -1186,6 +1186,15 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer)
{
struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
if (G_028810_DX_RASTERIZATION_KILL(cmd_buffer->state.pipeline->graphics.raster.pa_cl_clip_cntl))
return;
if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
radv_emit_viewport(cmd_buffer);
if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_SCISSOR | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
radv_emit_scissor(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH) {
unsigned width = cmd_buffer->state.dynamic.line_width * 8;
radeon_set_context_reg(cmd_buffer->cs, R_028A08_PA_SU_LINE_CNTL,
@@ -1259,38 +1268,39 @@ emit_stage_descriptor_set_userdata(struct radv_cmd_buffer *cmd_buffer,
static void
radv_emit_descriptor_set_userdata(struct radv_cmd_buffer *cmd_buffer,
struct radv_pipeline *pipeline,
VkShaderStageFlags stages,
struct radv_descriptor_set *set,
unsigned idx)
{
if (stages & VK_SHADER_STAGE_FRAGMENT_BIT)
emit_stage_descriptor_set_userdata(cmd_buffer, pipeline,
idx, set->va,
MESA_SHADER_FRAGMENT);
if (cmd_buffer->state.pipeline) {
if (stages & VK_SHADER_STAGE_FRAGMENT_BIT)
emit_stage_descriptor_set_userdata(cmd_buffer, cmd_buffer->state.pipeline,
idx, set->va,
MESA_SHADER_FRAGMENT);
if (stages & VK_SHADER_STAGE_VERTEX_BIT)
emit_stage_descriptor_set_userdata(cmd_buffer, pipeline,
idx, set->va,
MESA_SHADER_VERTEX);
if (stages & VK_SHADER_STAGE_VERTEX_BIT)
emit_stage_descriptor_set_userdata(cmd_buffer, cmd_buffer->state.pipeline,
idx, set->va,
MESA_SHADER_VERTEX);
if ((stages & VK_SHADER_STAGE_GEOMETRY_BIT) && radv_pipeline_has_gs(pipeline))
emit_stage_descriptor_set_userdata(cmd_buffer, pipeline,
idx, set->va,
MESA_SHADER_GEOMETRY);
if ((stages & VK_SHADER_STAGE_GEOMETRY_BIT) && radv_pipeline_has_gs(cmd_buffer->state.pipeline))
emit_stage_descriptor_set_userdata(cmd_buffer, cmd_buffer->state.pipeline,
idx, set->va,
MESA_SHADER_GEOMETRY);
if ((stages & VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT) && radv_pipeline_has_tess(pipeline))
emit_stage_descriptor_set_userdata(cmd_buffer, pipeline,
idx, set->va,
MESA_SHADER_TESS_CTRL);
if ((stages & VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT) && radv_pipeline_has_tess(cmd_buffer->state.pipeline))
emit_stage_descriptor_set_userdata(cmd_buffer, cmd_buffer->state.pipeline,
idx, set->va,
MESA_SHADER_TESS_CTRL);
if ((stages & VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT) && radv_pipeline_has_tess(pipeline))
emit_stage_descriptor_set_userdata(cmd_buffer, pipeline,
idx, set->va,
MESA_SHADER_TESS_EVAL);
if ((stages & VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT) && radv_pipeline_has_tess(cmd_buffer->state.pipeline))
emit_stage_descriptor_set_userdata(cmd_buffer, cmd_buffer->state.pipeline,
idx, set->va,
MESA_SHADER_TESS_EVAL);
}
if (stages & VK_SHADER_STAGE_COMPUTE_BIT)
emit_stage_descriptor_set_userdata(cmd_buffer, pipeline,
if (cmd_buffer->state.compute_pipeline && (stages & VK_SHADER_STAGE_COMPUTE_BIT))
emit_stage_descriptor_set_userdata(cmd_buffer, cmd_buffer->state.compute_pipeline,
idx, set->va,
MESA_SHADER_COMPUTE);
}
@@ -1315,7 +1325,6 @@ radv_flush_push_descriptors(struct radv_cmd_buffer *cmd_buffer)
static void
radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
struct radv_pipeline *pipeline,
VkShaderStageFlags stages)
{
unsigned i;
@@ -1325,6 +1334,10 @@ radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
if (cmd_buffer->state.push_descriptors_dirty)
radv_flush_push_descriptors(cmd_buffer);
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs,
MAX_SETS * MESA_SHADER_STAGES * 4);
for (i = 0; i < MAX_SETS; i++) {
if (!(cmd_buffer->state.descriptors_dirty & (1 << i)))
continue;
@@ -1332,10 +1345,11 @@ radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
if (!set)
continue;
radv_emit_descriptor_set_userdata(cmd_buffer, pipeline, stages, set, i);
radv_emit_descriptor_set_userdata(cmd_buffer, stages, set, i);
}
cmd_buffer->state.descriptors_dirty = 0;
cmd_buffer->state.push_descriptors_dirty = false;
assert(cmd_buffer->cs->cdw <= cdw_max);
}
static void
@@ -1364,6 +1378,8 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
va = cmd_buffer->device->ws->buffer_get_va(cmd_buffer->upload.upload_bo);
va += offset;
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs, MESA_SHADER_STAGES * 4);
if (stages & VK_SHADER_STAGE_VERTEX_BIT)
radv_emit_userdata_address(cmd_buffer, pipeline, MESA_SHADER_VERTEX,
AC_UD_PUSH_CONSTANTS, va);
@@ -1389,6 +1405,7 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
AC_UD_PUSH_CONSTANTS, va);
cmd_buffer->push_constant_stages &= ~stages;
assert(cmd_buffer->cs->cdw <= cdw_max);
}
static void radv_emit_primitive_reset_state(struct radv_cmd_buffer *cmd_buffer,
@@ -1474,12 +1491,6 @@ radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer,
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RENDER_TARGETS)
radv_emit_framebuffer_state(cmd_buffer);
if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
radv_emit_viewport(cmd_buffer);
if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_SCISSOR | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT))
radv_emit_scissor(cmd_buffer);
ia_multi_vgt_param = si_get_ia_multi_vgt_param(cmd_buffer, instanced_draw, indirect_draw, draw_vertex_count);
if (cmd_buffer->state.last_ia_multi_vgt_param != ia_multi_vgt_param) {
if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK)
@@ -1504,8 +1515,7 @@ radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer,
radv_emit_primitive_reset_state(cmd_buffer, indexed_draw);
radv_flush_descriptors(cmd_buffer, cmd_buffer->state.pipeline,
VK_SHADER_STAGE_ALL_GRAPHICS);
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
VK_SHADER_STAGE_ALL_GRAPHICS);
@@ -1900,6 +1910,8 @@ void radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer,
{
struct radeon_winsys *ws = cmd_buffer->device->ws;
assert(!(set->layout->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR));
cmd_buffer->state.descriptors[idx] = set;
cmd_buffer->state.descriptors_dirty |= (1 << idx);
if (!set)
@@ -2140,6 +2152,13 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer)
assert(cmd_buffer->cs->cdw <= cdw_max);
}
static void radv_mark_descriptor_sets_dirty(struct radv_cmd_buffer *cmd_buffer)
{
for (unsigned i = 0; i < MAX_SETS; i++) {
if (cmd_buffer->state.descriptors[i])
cmd_buffer->state.descriptors_dirty |= (1u << i);
}
}
void radv_CmdBindPipeline(
VkCommandBuffer commandBuffer,
@@ -2149,10 +2168,7 @@ void radv_CmdBindPipeline(
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_pipeline, pipeline, _pipeline);
for (unsigned i = 0; i < MAX_SETS; i++) {
if (cmd_buffer->state.descriptors[i])
cmd_buffer->state.descriptors_dirty |= (1 << i);
}
radv_mark_descriptor_sets_dirty(cmd_buffer);
switch (pipelineBindPoint) {
case VK_PIPELINE_BIND_POINT_COMPUTE:
@@ -2161,6 +2177,9 @@ void radv_CmdBindPipeline(
break;
case VK_PIPELINE_BIND_POINT_GRAPHICS:
cmd_buffer->state.pipeline = pipeline;
if (!pipeline)
break;
cmd_buffer->state.vertex_descriptors_dirty = true;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
cmd_buffer->push_constant_stages |= pipeline->active_stages;
@@ -2323,7 +2342,6 @@ void radv_CmdSetStencilReference(
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
}
void radv_CmdExecuteCommands(
VkCommandBuffer commandBuffer,
uint32_t commandBufferCount,
@@ -2368,6 +2386,7 @@ void radv_CmdExecuteCommands(
primary->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_ALL;
primary->state.last_primitive_reset_en = -1;
primary->state.last_primitive_reset_index = 0;
radv_mark_descriptor_sets_dirty(primary);
}
}
@@ -2744,8 +2763,7 @@ static void
radv_flush_compute_state(struct radv_cmd_buffer *cmd_buffer)
{
radv_emit_compute_pipeline(cmd_buffer);
radv_flush_descriptors(cmd_buffer, cmd_buffer->state.compute_pipeline,
VK_SHADER_STAGE_COMPUTE_BIT);
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_COMPUTE_BIT);
radv_flush_constants(cmd_buffer, cmd_buffer->state.compute_pipeline,
VK_SHADER_STAGE_COMPUTE_BIT);
si_emit_cache_flush(cmd_buffer);

View File

@@ -401,7 +401,7 @@ radv_enumerate_devices(struct radv_instance *instance)
instance->physicalDeviceCount = 0;
max_devices = drmGetDevices2(0, devices, sizeof(devices));
max_devices = drmGetDevices2(0, devices, ARRAY_SIZE(devices));
if (max_devices < 1)
return VK_ERROR_INCOMPATIBLE_DRIVER;
@@ -417,9 +417,11 @@ radv_enumerate_devices(struct radv_instance *instance)
if (result == VK_SUCCESS)
++instance->physicalDeviceCount;
else if (result != VK_ERROR_INCOMPATIBLE_DRIVER)
return result;
break;
}
}
drmFreeDevices(devices, max_devices);
return result;
}
@@ -674,7 +676,7 @@ void radv_GetPhysicalDeviceProperties(
.driverVersion = radv_get_driver_version(),
.vendorID = 0x1002,
.deviceID = pdevice->rad_info.pci_id,
.deviceType = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU,
.deviceType = pdevice->rad_info.has_dedicated_vram ? VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU : VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU,
.limits = limits,
.sparseProperties = {0},
};
@@ -915,6 +917,7 @@ radv_device_init_gs_info(struct radv_device *device)
case CHIP_FIJI:
case CHIP_POLARIS10:
case CHIP_POLARIS11:
case CHIP_POLARIS12:
device->gs_table_depth = 32;
return;
default:
@@ -1046,6 +1049,22 @@ VkResult radv_CreateDevice(
break;
}
device->ws->cs_finalize(device->flush_cs[family]);
device->flush_shader_cs[family] = device->ws->cs_create(device->ws, family);
switch (family) {
case RADV_QUEUE_GENERAL:
case RADV_QUEUE_COMPUTE:
si_cs_emit_cache_flush(device->flush_shader_cs[family],
device->physical_device->rad_info.chip_class,
family == RADV_QUEUE_COMPUTE && device->physical_device->rad_info.chip_class >= CIK,
family == RADV_QUEUE_COMPUTE ? RADV_CMD_FLAG_CS_PARTIAL_FLUSH : (RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH) |
RADV_CMD_FLAG_INV_ICACHE |
RADV_CMD_FLAG_INV_SMEM_L1 |
RADV_CMD_FLAG_INV_VMEM_L1 |
RADV_CMD_FLAG_INV_GLOBAL_L2);
break;
}
device->ws->cs_finalize(device->flush_shader_cs[family]);
}
if (getenv("RADV_TRACE_FILE")) {
@@ -1121,6 +1140,8 @@ void radv_DestroyDevice(
device->ws->cs_destroy(device->empty_cs[i]);
if (device->flush_cs[i])
device->ws->cs_destroy(device->flush_cs[i]);
if (device->flush_shader_cs[i])
device->ws->cs_destroy(device->flush_shader_cs[i]);
}
radv_device_finish_meta(device);
@@ -1822,7 +1843,7 @@ VkResult radv_QueueSubmit(
for (uint32_t i = 0; i < submitCount; i++) {
struct radeon_winsys_cs **cs_array;
bool do_flush = !i;
bool do_flush = !i || pSubmits[i].pWaitDstStageMask;
bool can_patch = !do_flush;
uint32_t advance;
@@ -1849,7 +1870,9 @@ VkResult radv_QueueSubmit(
(pSubmits[i].commandBufferCount + do_flush));
if(do_flush)
cs_array[0] = queue->device->flush_cs[queue->queue_family_index];
cs_array[0] = pSubmits[i].waitSemaphoreCount ?
queue->device->flush_shader_cs[queue->queue_family_index] :
queue->device->flush_cs[queue->queue_family_index];
for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j++) {
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer,

View File

@@ -597,13 +597,13 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
tiled |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT;
}
}
if (util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
if (tiled && util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
tiled |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
}
}
if (util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
if (linear && util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
linear |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
}

View File

@@ -382,7 +382,8 @@ si_make_texture_descriptor(struct radv_device *device,
S_008F24_LAST_ARRAY(last_layer);
fmask_state[6] = 0;
fmask_state[7] = 0;
}
} else if (fmask_state)
memset(fmask_state, 0, 8 * 4);
}
static void

View File

@@ -51,8 +51,10 @@ void
radv_meta_restore(const struct radv_meta_saved_state *state,
struct radv_cmd_buffer *cmd_buffer)
{
cmd_buffer->state.pipeline = state->old_pipeline;
radv_bind_descriptor_set(cmd_buffer, state->old_descriptor_set0, 0);
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS,
radv_pipeline_to_handle(state->old_pipeline));
cmd_buffer->state.descriptors[0] = state->old_descriptor_set0;
memcpy(cmd_buffer->state.vertex_bindings, state->old_vertex_bindings,
sizeof(state->old_vertex_bindings));
@@ -110,7 +112,8 @@ radv_meta_restore_compute(const struct radv_meta_saved_compute_state *state,
{
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE,
radv_pipeline_to_handle(state->old_pipeline));
radv_bind_descriptor_set(cmd_buffer, state->old_descriptor_set0, 0);
cmd_buffer->state.descriptors[0] = state->old_descriptor_set0;
if (push_constant_size) {
memcpy(cmd_buffer->push_constants, state->push_constants, push_constant_size);

View File

@@ -693,6 +693,9 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
VK_IMAGE_ASPECT_STENCIL_BIT));
assert(pass_att != VK_ATTACHMENT_UNUSED);
if (!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
clear_value.depth = 1.0f;
const struct depthstencil_clear_vattrs vertex_data[3] = {
{
.position = {

View File

@@ -495,7 +495,7 @@ struct radv_device {
int queue_count[RADV_MAX_QUEUE_FAMILIES];
struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
struct radeon_winsys_cs *flush_cs[RADV_MAX_QUEUE_FAMILIES];
struct radeon_winsys_cs *flush_shader_cs[RADV_MAX_QUEUE_FAMILIES];
uint64_t debug_flags;
bool llvm_supports_spill;

View File

@@ -44,11 +44,6 @@ static unsigned get_max_db(struct radv_device *device)
unsigned num_db = device->physical_device->rad_info.num_render_backends;
MAYBE_UNUSED unsigned rb_mask = device->physical_device->rad_info.enabled_rb_mask;
if (device->physical_device->rad_info.chip_class == SI)
num_db = 8;
else
num_db = MAX2(8, num_db);
/* Otherwise we need to change the query reset procedure */
assert(rb_mask == ((1ull << num_db) - 1));

View File

@@ -460,16 +460,20 @@ VkResult radv_QueuePresentKHR(
RADV_FROM_HANDLE(wsi_swapchain, swapchain, pPresentInfo->pSwapchains[i]);
struct radeon_winsys_cs *cs;
const VkPresentRegionKHR *region = NULL;
VkResult item_result;
assert(radv_device_from_handle(swapchain->device) == queue->device);
if (swapchain->fences[0] == VK_NULL_HANDLE) {
result = radv_CreateFence(radv_device_to_handle(queue->device),
item_result = radv_CreateFence(radv_device_to_handle(queue->device),
&(VkFenceCreateInfo) {
.sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO,
.flags = 0,
}, &swapchain->alloc, &swapchain->fences[0]);
if (result != VK_SUCCESS)
return result;
if (pPresentInfo->pResults != NULL)
pPresentInfo->pResults[i] = item_result;
result = result == VK_SUCCESS ? item_result : result;
if (item_result != VK_SUCCESS)
continue;
} else {
radv_ResetFences(radv_device_to_handle(queue->device),
1, &swapchain->fences[0]);
@@ -493,12 +497,15 @@ VkResult radv_QueuePresentKHR(
if (regions && regions->pRegions)
region = &regions->pRegions[i];
result = swapchain->queue_present(swapchain,
item_result = swapchain->queue_present(swapchain,
pPresentInfo->pImageIndices[i],
region);
/* TODO: What if one of them returns OUT_OF_DATE? */
if (result != VK_SUCCESS)
return result;
if (pPresentInfo->pResults != NULL)
pPresentInfo->pResults[i] = item_result;
result = result == VK_SUCCESS ? item_result : result;
if (item_result != VK_SUCCESS)
continue;
VkFence last = swapchain->fences[2];
swapchain->fences[2] = swapchain->fences[1];

View File

@@ -297,6 +297,7 @@ si_emit_config(struct radv_physical_device *physical_device,
raster_config_1 = 0x0000002a;
break;
case CHIP_POLARIS11:
case CHIP_POLARIS12:
raster_config = 0x16000012;
raster_config_1 = 0x00000000;
break;
@@ -671,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
if (family == CHIP_TONGA ||
family == CHIP_FIJI ||
family == CHIP_POLARIS10 ||
family == CHIP_POLARIS11)
family == CHIP_POLARIS11 ||
family == CHIP_POLARIS12)
partial_vs_wave = true;
} else {
partial_vs_wave = true;

View File

@@ -931,6 +931,9 @@ static void *radv_amdgpu_winsys_get_cpu_addr(void *_cs, uint64_t addr)
{
struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs;
void *ret = NULL;
if (!cs->ib_buffer)
return NULL;
for (unsigned i = 0; i <= cs->num_old_ib_buffers; ++i) {
struct radv_amdgpu_winsys_bo *bo;
@@ -949,10 +952,15 @@ static void radv_amdgpu_winsys_cs_dump(struct radeon_winsys_cs *_cs,
uint32_t trace_id)
{
struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs;
void *ib = cs->base.buf;
int num_dw = cs->base.cdw;
ac_parse_ib(file,
radv_amdgpu_winsys_get_cpu_addr(cs, cs->ib.ib_mc_address),
cs->ib.size, trace_id, "main IB", cs->ws->info.chip_class,
if (cs->ws->use_ib_bos) {
ib = radv_amdgpu_winsys_get_cpu_addr(cs, cs->ib.ib_mc_address);
num_dw = cs->ib.size;
}
assert(ib);
ac_parse_ib(file, ib, num_dw, trace_id, "main IB", cs->ws->info.chip_class,
radv_amdgpu_winsys_get_cpu_addr, cs);
}

View File

@@ -107,6 +107,7 @@ get_chip_name(enum radeon_family family)
case CHIP_FIJI: return "AMD RADV FIJI";
case CHIP_POLARIS10: return "AMD RADV POLARIS10";
case CHIP_POLARIS11: return "AMD RADV POLARIS11";
case CHIP_POLARIS12: return "AMD RADV POLARIS12";
case CHIP_STONEY: return "AMD RADV STONEY";
default: return "AMD RADV unknown";
}
@@ -271,6 +272,10 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
ws->family = FAMILY_VI;
ws->rev_id = VI_POLARIS11_M_A0;
break;
case CHIP_POLARIS12:
ws->family = FAMILY_VI;
ws->rev_id = VI_POLARIS12_V_A0;
break;
default:
fprintf(stderr, "amdgpu: Unknown family.\n");
goto fail;

View File

@@ -167,7 +167,6 @@ lower_distance_visitor::visit(ir_variable *ir)
/* Clone the old var so that we inherit all of its properties */
*new_var = ir->clone(ralloc_parent(ir), NULL);
(*new_var)->name = ralloc_strdup(*new_var, GLSL_CLIP_VAR_NAME);
(*new_var)->data.max_array_access = new_size - 1;
(*new_var)->data.location = VARYING_SLOT_CLIP_DIST0;
if (!ir->type->fields.array->is_array()) {
@@ -182,6 +181,7 @@ lower_distance_visitor::visit(ir_variable *ir)
this->shader_stage == MESA_SHADER_GEOMETRY)));
assert (ir->type->fields.array == glsl_type::float_type);
(*new_var)->data.max_array_access = new_size - 1;
/* And change the properties that we need to change */
(*new_var)->type = glsl_type::get_array_instance(glsl_type::vec4_type,

View File

@@ -1292,7 +1292,7 @@ shader_cache_read_program_metadata(struct gl_context *ctx,
return false;
struct disk_cache *cache = ctx->Cache;
if (!cache || prog->data->cache_fallback)
if (!cache || prog->data->cache_fallback || prog->data->skip_cache)
return false;
/* Include bindings when creating sha1. These bindings change the resulting

View File

@@ -96,7 +96,9 @@ lower_bitmap(nir_shader *shader, nir_builder *b,
tex->texture_index = options->sampler;
tex->dest_type = nir_type_float;
tex->src[0].src_type = nir_tex_src_coord;
tex->src[0].src = nir_src_for_ssa(texcoord);
tex->src[0].src =
nir_src_for_ssa(nir_channels(b, texcoord,
(1 << tex->coord_components) - 1));
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &tex->instr);

View File

@@ -135,7 +135,9 @@ lower_color(lower_drawpixels_state *state, nir_intrinsic_instr *intr)
tex->texture_index = state->options->drawpix_sampler;
tex->dest_type = nir_type_float;
tex->src[0].src_type = nir_tex_src_coord;
tex->src[0].src = nir_src_for_ssa(texcoord);
tex->src[0].src =
nir_src_for_ssa(nir_channels(b, texcoord,
(1 << tex->coord_components) - 1));
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
nir_builder_instr_insert(b, &tex->instr);

View File

@@ -244,9 +244,9 @@ convert_yuv_to_rgb(nir_builder *b, nir_tex_instr *tex,
nir_ssa_def *yuv =
nir_vec4(b,
nir_fmul(b, nir_imm_float(b, 1.16438356f),
nir_fadd(b, y, nir_imm_float(b, -0.0625f))),
nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -0.5f)), 0),
nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -0.5f)), 0),
nir_fadd(b, y, nir_imm_float(b, -16.0f / 255.0f))),
nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -128.0f / 255.0f)), 0),
nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -128.0f / 255.0f)), 0),
nir_imm_float(b, 0.0));
nir_ssa_def *red = nir_fdot4(b, yuv, nir_build_imm(b, 4, 32, m[0]));

View File

@@ -47,7 +47,6 @@ dri2_backend_FILES =
dri3_backend_FILES =
if HAVE_PLATFORM_X11
AM_CFLAGS += -DHAVE_X11_PLATFORM
AM_CFLAGS += $(XCB_DRI2_CFLAGS)
libEGL_common_la_LIBADD += $(XCB_DRI2_LIBS)
dri2_backend_FILES += drivers/dri2/platform_x11.c
@@ -62,7 +61,6 @@ endif
endif
if HAVE_PLATFORM_WAYLAND
AM_CFLAGS += -DHAVE_WAYLAND_PLATFORM
AM_CFLAGS += $(WAYLAND_CFLAGS)
libEGL_common_la_LIBADD += $(WAYLAND_LIBS)
libEGL_common_la_LIBADD += $(LIBDRM_LIBS)
@@ -70,19 +68,16 @@ libEGL_common_la_LIBADD += $(top_builddir)/src/egl/wayland/wayland-drm/libwaylan
dri2_backend_FILES += drivers/dri2/platform_wayland.c
endif
if HAVE_EGL_PLATFORM_DRM
AM_CFLAGS += -DHAVE_DRM_PLATFORM
if HAVE_PLATFORM_DRM
libEGL_common_la_LIBADD += $(top_builddir)/src/gbm/libgbm.la
dri2_backend_FILES += drivers/dri2/platform_drm.c
endif
if HAVE_EGL_PLATFORM_SURFACELESS
AM_CFLAGS += -DHAVE_SURFACELESS_PLATFORM
if HAVE_PLATFORM_SURFACELESS
dri2_backend_FILES += drivers/dri2/platform_surfaceless.c
endif
if HAVE_EGL_PLATFORM_ANDROID
AM_CFLAGS += -DHAVE_ANDROID_PLATFORM
if HAVE_PLATFORM_ANDROID
AM_CFLAGS += $(ANDROID_CFLAGS)
libEGL_common_la_LIBADD += $(ANDROID_LIBS)
dri2_backend_FILES += drivers/dri2/platform_android.c
@@ -138,7 +133,8 @@ libEGL_mesa_la_SOURCES = \
main/eglglvnd.c \
main/egldispatchstubs.h \
main/egldispatchstubs.c \
g_egldispatchstubs.c
g_egldispatchstubs.c \
g_egldispatchstubs.h
libEGL_mesa_la_LIBADD = libEGL_common.la
libEGL_mesa_la_LDFLAGS = \
-no-undefined \

View File

@@ -257,6 +257,10 @@ struct dri2_egl_surface
struct wl_egl_window *wl_win;
int dx;
int dy;
struct wl_event_queue *wl_queue;
struct wl_surface *wl_surface_wrapper;
struct wl_display *wl_dpy_wrapper;
struct wl_drm *wl_drm_wrapper;
struct wl_callback *throttle_callback;
int format;
#endif

View File

@@ -264,10 +264,15 @@ droid_window_enqueue_buffer(_EGLDisplay *disp, struct dri2_egl_surface *dri2_sur
}
static void
droid_window_cancel_buffer(_EGLDisplay *disp, struct dri2_egl_surface *dri2_surf)
droid_window_cancel_buffer(struct dri2_egl_surface *dri2_surf)
{
/* no cancel buffer? */
droid_window_enqueue_buffer(disp, dri2_surf);
int ret;
ret = dri2_surf->window->cancelBuffer(dri2_surf->window, dri2_surf->buffer, -1);
if (ret < 0) {
_eglLog(_EGL_WARNING, "ANativeWindow::cancelBuffer failed");
dri2_surf->base.Lost = EGL_TRUE;
}
}
static __DRIbuffer *
@@ -399,7 +404,7 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
if (dri2_surf->base.Type == EGL_WINDOW_BIT) {
if (dri2_surf->buffer)
droid_window_cancel_buffer(disp, dri2_surf);
droid_window_cancel_buffer(dri2_surf);
dri2_surf->window->common.decRef(&dri2_surf->window->common);
}
@@ -426,12 +431,16 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
static int
update_buffers(struct dri2_egl_surface *dri2_surf)
{
if (dri2_surf->base.Lost)
return -1;
if (dri2_surf->base.Type != EGL_WINDOW_BIT)
return 0;
/* try to dequeue the next back buffer */
if (!dri2_surf->buffer && !droid_window_dequeue_buffer(dri2_surf)) {
_eglLog(_EGL_WARNING, "Could not dequeue buffer from native window");
dri2_surf->base.Lost = EGL_TRUE;
return -1;
}
@@ -600,10 +609,10 @@ droid_query_buffer_age(_EGLDriver *drv,
if (update_buffers(dri2_surf) < 0) {
_eglError(EGL_BAD_ALLOC, "droid_query_buffer_age");
return 0;
return -1;
}
return dri2_surf->back->age;
return dri2_surf->back ? dri2_surf->back->age : 0;
}
static EGLBoolean
@@ -620,17 +629,20 @@ droid_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *draw)
dri2_surf->color_buffers[i].age++;
}
/* Make sure we have a back buffer in case we're swapping without
* ever rendering. */
if (get_back_bo(dri2_surf, 0) < 0) {
_eglError(EGL_BAD_ALLOC, "dri2_swap_buffers");
return EGL_FALSE;
}
dri2_surf->back->age = 1;
/* "XXX: we don't use get_back_bo() since it causes regressions in
* several dEQP tests.
*/
if (dri2_surf->back)
dri2_surf->back->age = 1;
dri2_flush_drawable_for_swapbuffers(disp, draw);
/* dri2_surf->buffer can be null even when no error has occured. For
* example, if the user has called no GL rendering commands since the
* previous eglSwapBuffers, then the driver may have not triggered
* a callback to ANativeWindow::dequeueBuffer, in which case
* dri2_surf->buffer remains null.
*/
if (dri2_surf->buffer)
droid_window_enqueue_buffer(disp, dri2_surf);

View File

@@ -463,7 +463,7 @@ dri2_drm_query_buffer_age(_EGLDriver *drv,
if (get_back_bo(dri2_surf) < 0) {
_eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
return 0;
return -1;
}
return dri2_surf->back->age;
@@ -689,12 +689,12 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
fd = loader_open_device(buf);
if (fd < 0)
fd = loader_open_device("/dev/dri/card0");
dri2_dpy->own_device = 1;
gbm = gbm_create_device(fd);
if (gbm == NULL) {
err = "DRI2: failed to create gbm device";
goto cleanup;
}
dri2_dpy->own_device = 1;
} else {
fd = fcntl(gbm_device_get_fd(gbm), F_DUPFD_CLOEXEC, 3);
if (fd < 0) {

View File

@@ -55,34 +55,10 @@ static EGLBoolean
dri2_wl_swap_interval(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf,
EGLint interval);
static void
sync_callback(void *data, struct wl_callback *callback, uint32_t serial)
{
int *done = data;
*done = 1;
wl_callback_destroy(callback);
}
static const struct wl_callback_listener sync_listener = {
.done = sync_callback
};
static int
roundtrip(struct dri2_egl_display *dri2_dpy)
{
struct wl_callback *callback;
int done = 0, ret = 0;
callback = wl_display_sync(dri2_dpy->wl_dpy_wrapper);
wl_callback_add_listener(callback, &sync_listener, &done);
while (ret != -1 && !done)
ret = wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
if (!done)
wl_callback_destroy(callback);
return ret;
return wl_display_roundtrip_queue(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
}
static void
@@ -148,7 +124,7 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
if (!_eglInitSurface(&dri2_surf->base, disp, EGL_WINDOW_BIT, conf, attrib_list))
goto cleanup_surf;
if (dri2_dpy->dri2) {
if (dri2_dpy->wl_drm) {
if (conf->RedSize == 5)
dri2_surf->format = WL_DRM_FORMAT_RGB565;
else if (conf->AlphaSize == 0)
@@ -156,6 +132,7 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
else
dri2_surf->format = WL_DRM_FORMAT_ARGB8888;
} else {
assert(dri2_dpy->wl_shm);
if (conf->RedSize == 5)
dri2_surf->format = WL_SHM_FORMAT_RGB565;
else if (conf->AlphaSize == 0)
@@ -170,6 +147,37 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
}
dri2_surf->wl_win = window;
dri2_surf->wl_queue = wl_display_create_queue(dri2_dpy->wl_dpy);
if (!dri2_surf->wl_queue) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_surf;
}
if (dri2_dpy->wl_drm) {
dri2_surf->wl_drm_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_drm);
if (!dri2_surf->wl_drm_wrapper) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_queue;
}
wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_drm_wrapper,
dri2_surf->wl_queue);
}
dri2_surf->wl_dpy_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_dpy);
if (!dri2_surf->wl_dpy_wrapper) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_drm;
}
wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_dpy_wrapper,
dri2_surf->wl_queue);
dri2_surf->wl_surface_wrapper = wl_proxy_create_wrapper(window->surface);
if (!dri2_surf->wl_surface_wrapper) {
_eglError(EGL_BAD_ALLOC, "dri2_create_surface");
goto cleanup_drm;
}
wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_surface_wrapper,
dri2_surf->wl_queue);
dri2_surf->wl_win->private = dri2_surf;
dri2_surf->wl_win->destroy_window_callback = destroy_window_callback;
@@ -200,6 +208,11 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
return &dri2_surf->base;
cleanup_drm:
if (dri2_surf->wl_drm_wrapper)
wl_proxy_wrapper_destroy(dri2_surf->wl_drm_wrapper);
cleanup_queue:
wl_event_queue_destroy(dri2_surf->wl_queue);
cleanup_surf:
free(dri2_surf);
@@ -265,6 +278,12 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
dri2_surf->wl_win->destroy_window_callback = NULL;
}
if (dri2_surf->wl_drm_wrapper)
wl_proxy_wrapper_destroy(dri2_surf->wl_drm_wrapper);
wl_proxy_wrapper_destroy(dri2_surf->wl_surface_wrapper);
wl_proxy_wrapper_destroy(dri2_surf->wl_dpy_wrapper);
wl_event_queue_destroy(dri2_surf->wl_queue);
free(surf);
return EGL_TRUE;
@@ -333,9 +352,9 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
}
/* There might be a buffer release already queued that wasn't processed */
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue);
if (dri2_surf->back == NULL) {
while (dri2_surf->back == NULL) {
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
/* Get an unlocked buffer, preferrably one with a dri_buffer
* already allocated. */
@@ -346,6 +365,14 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
else if (dri2_surf->back->dri_image == NULL)
dri2_surf->back = &dri2_surf->color_buffers[i];
}
if (dri2_surf->back)
break;
/* If we don't have a buffer, then block on the server to release one for
* us, and try again. */
if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_surf->wl_queue) < 0)
return -1;
}
if (dri2_surf->back == NULL)
@@ -634,7 +661,7 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &stride);
dri2_surf->current->wl_buffer =
wl_drm_create_prime_buffer(dri2_dpy->wl_drm,
wl_drm_create_prime_buffer(dri2_surf->wl_drm_wrapper,
fd,
dri2_surf->base.Width,
dri2_surf->base.Height,
@@ -648,7 +675,7 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &stride);
dri2_surf->current->wl_buffer =
wl_drm_create_buffer(dri2_dpy->wl_drm,
wl_drm_create_buffer(dri2_surf->wl_drm_wrapper,
name,
dri2_surf->base.Width,
dri2_surf->base.Height,
@@ -656,8 +683,6 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
dri2_surf->format);
}
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->current->wl_buffer,
dri2_dpy->wl_queue);
wl_buffer_add_listener(dri2_surf->current->wl_buffer,
&wl_buffer_listener, dri2_surf);
}
@@ -669,14 +694,14 @@ try_damage_buffer(struct dri2_egl_surface *dri2_surf,
{
int i;
if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_win->surface)
if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_surface_wrapper)
< WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION)
return EGL_FALSE;
for (i = 0; i < n_rects; i++) {
const int *rect = &rects[i * 4];
wl_surface_damage_buffer(dri2_surf->wl_win->surface,
wl_surface_damage_buffer(dri2_surf->wl_surface_wrapper,
rect[0],
dri2_surf->base.Height - rect[1] - rect[3],
rect[2], rect[3]);
@@ -699,7 +724,7 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
while (dri2_surf->throttle_callback != NULL)
if (wl_display_dispatch_queue(dri2_dpy->wl_dpy,
dri2_dpy->wl_queue) == -1)
dri2_surf->wl_queue) == -1)
return -1;
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
@@ -715,11 +740,9 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
if (draw->SwapInterval > 0) {
dri2_surf->throttle_callback =
wl_surface_frame(dri2_surf->wl_win->surface);
wl_surface_frame(dri2_surf->wl_surface_wrapper);
wl_callback_add_listener(dri2_surf->throttle_callback,
&throttle_listener, dri2_surf);
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback,
dri2_dpy->wl_queue);
}
dri2_surf->back->age = 1;
@@ -728,7 +751,7 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
create_wl_buffer(dri2_surf);
wl_surface_attach(dri2_surf->wl_win->surface,
wl_surface_attach(dri2_surf->wl_surface_wrapper,
dri2_surf->current->wl_buffer,
dri2_surf->dx, dri2_surf->dy);
@@ -742,7 +765,7 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
* ignore the damage region and post maximum damage, due to
* https://bugs.freedesktop.org/78190 */
if (!n_rects || !try_damage_buffer(dri2_surf, rects, n_rects))
wl_surface_damage(dri2_surf->wl_win->surface,
wl_surface_damage(dri2_surf->wl_surface_wrapper,
0, 0, INT32_MAX, INT32_MAX);
if (dri2_dpy->is_different_gpu) {
@@ -760,14 +783,14 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
dri2_flush_drawable_for_swapbuffers(disp, draw);
dri2_dpy->flush->invalidate(dri2_surf->dri_drawable);
wl_surface_commit(dri2_surf->wl_win->surface);
wl_surface_commit(dri2_surf->wl_surface_wrapper);
/* If we're not waiting for a frame callback then we'll at least throttle
* to a sync callback so that we always give a chance for the compositor to
* handle the commit and send a release event before checking for a free
* buffer */
if (dri2_surf->throttle_callback == NULL) {
dri2_surf->throttle_callback = wl_display_sync(dri2_dpy->wl_dpy_wrapper);
dri2_surf->throttle_callback = wl_display_sync(dri2_surf->wl_dpy_wrapper);
wl_callback_add_listener(dri2_surf->throttle_callback,
&throttle_listener, dri2_surf);
}
@@ -785,7 +808,7 @@ dri2_wl_query_buffer_age(_EGLDriver *drv,
if (get_back_bo(dri2_surf) < 0) {
_eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
return 0;
return -1;
}
return dri2_surf->back->age;
@@ -1410,11 +1433,13 @@ os_create_anonymous_file(off_t size)
static EGLBoolean
dri2_wl_swrast_allocate_buffer(struct dri2_egl_display *dri2_dpy,
dri2_wl_swrast_allocate_buffer(struct dri2_egl_surface *dri2_surf,
int format, int w, int h,
void **data, int *size,
struct wl_buffer **buffer)
{
struct dri2_egl_display *dri2_dpy =
dri2_egl_display(dri2_surf->base.Resource.Display);
struct wl_shm_pool *pool;
int fd, stride, size_map;
void *data_map;
@@ -1435,6 +1460,7 @@ dri2_wl_swrast_allocate_buffer(struct dri2_egl_display *dri2_dpy,
/* Share it in a wl_buffer */
pool = wl_shm_create_pool(dri2_dpy->wl_shm, fd, size_map);
wl_proxy_set_queue((struct wl_proxy *)pool, dri2_surf->wl_queue);
*buffer = wl_shm_pool_create_buffer(pool, 0, w, h, stride, format);
wl_shm_pool_destroy(pool);
close(fd);
@@ -1470,7 +1496,7 @@ swrast_update_buffers(struct dri2_egl_surface *dri2_surf)
/* find back buffer */
/* There might be a buffer release already queued that wasn't processed */
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue);
/* try get free buffer already created */
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
@@ -1486,7 +1512,7 @@ swrast_update_buffers(struct dri2_egl_surface *dri2_surf)
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
if (!dri2_surf->color_buffers[i].locked) {
dri2_surf->back = &dri2_surf->color_buffers[i];
if (!dri2_wl_swrast_allocate_buffer(dri2_dpy,
if (!dri2_wl_swrast_allocate_buffer(dri2_surf,
dri2_surf->format,
dri2_surf->base.Width,
dri2_surf->base.Height,
@@ -1496,8 +1522,6 @@ swrast_update_buffers(struct dri2_egl_surface *dri2_surf)
_eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
return -1;
}
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->back->wl_buffer,
dri2_dpy->wl_queue);
wl_buffer_add_listener(dri2_surf->back->wl_buffer,
&wl_buffer_listener, dri2_surf);
break;
@@ -1553,22 +1577,20 @@ dri2_wl_swrast_commit_backbuffer(struct dri2_egl_surface *dri2_surf)
while (dri2_surf->throttle_callback != NULL)
if (wl_display_dispatch_queue(dri2_dpy->wl_dpy,
dri2_dpy->wl_queue) == -1)
dri2_surf->wl_queue) == -1)
return;
if (dri2_surf->base.SwapInterval > 0) {
dri2_surf->throttle_callback =
wl_surface_frame(dri2_surf->wl_win->surface);
wl_surface_frame(dri2_surf->wl_surface_wrapper);
wl_callback_add_listener(dri2_surf->throttle_callback,
&throttle_listener, dri2_surf);
wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback,
dri2_dpy->wl_queue);
}
dri2_surf->current = dri2_surf->back;
dri2_surf->back = NULL;
wl_surface_attach(dri2_surf->wl_win->surface,
wl_surface_attach(dri2_surf->wl_surface_wrapper,
dri2_surf->current->wl_buffer,
dri2_surf->dx, dri2_surf->dy);
@@ -1578,9 +1600,9 @@ dri2_wl_swrast_commit_backbuffer(struct dri2_egl_surface *dri2_surf)
dri2_surf->dx = 0;
dri2_surf->dy = 0;
wl_surface_damage(dri2_surf->wl_win->surface,
wl_surface_damage(dri2_surf->wl_surface_wrapper,
0, 0, INT32_MAX, INT32_MAX);
wl_surface_commit(dri2_surf->wl_win->surface);
wl_surface_commit(dri2_surf->wl_surface_wrapper);
/* If we're not waiting for a frame callback then we'll at least throttle
* to a sync callback so that we always give a chance for the compositor to

View File

@@ -828,6 +828,14 @@ eglMakeCurrent(EGLDisplay dpy, EGLSurface draw, EGLSurface read,
RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_FALSE);
}
/* If a native window underlying either draw or read is no longer valid,
* an EGL_BAD_NATIVE_WINDOW error is generated.
*/
if (draw_surf && draw_surf->Lost)
RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
if (read_surf && read_surf->Lost)
RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
ret = drv->API.MakeCurrent(drv, disp, draw_surf, read_surf, context);
RETURN_EGL_EVAL(disp, ret);
@@ -1215,6 +1223,15 @@ eglSwapBuffers(EGLDisplay dpy, EGLSurface surface)
RETURN_EGL_ERROR(disp, EGL_BAD_SURFACE, EGL_FALSE);
#endif
/* From the EGL 1.5 spec:
*
* If eglSwapBuffers is called and the native window associated with
* surface is no longer valid, an EGL_BAD_NATIVE_WINDOW error is
* generated.
*/
if (surf->Lost)
RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
ret = drv->API.SwapBuffers(drv, disp, surf);
RETURN_EGL_EVAL(disp, ret);

View File

@@ -61,7 +61,7 @@
/**
* Map --with-egl-platforms names to platform types.
* Map --with-platforms names to platform types.
*/
static const struct {
_EGLPlatformType platform;

View File

@@ -295,6 +295,7 @@ _eglInitSurface(_EGLSurface *surf, _EGLDisplay *dpy, EGLint type,
_eglInitResource(&surf->Resource, sizeof(*surf), dpy);
surf->Type = type;
surf->Config = conf;
surf->Lost = EGL_FALSE;
surf->Width = 0;
surf->Height = 0;
@@ -408,7 +409,11 @@ _eglQuerySurface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surface,
_eglError(EGL_BAD_ATTRIBUTE, "eglQuerySurface");
return EGL_FALSE;
}
*value = drv->API.QueryBufferAge(drv, dpy, surface);
EGLint result = drv->API.QueryBufferAge(drv, dpy, surface);
/* error happened */
if (result < 0)
return EGL_FALSE;
*value = result;
break;
default:
_eglError(EGL_BAD_ATTRIBUTE, "eglQuerySurface");

View File

@@ -56,6 +56,11 @@ struct _egl_surface
EGLint Type; /* one of EGL_WINDOW_BIT, EGL_PIXMAP_BIT or EGL_PBUFFER_BIT */
/* The native surface is lost. The EGL spec requires certain functions
* to generate EGL_BAD_NATIVE_WINDOW when given this surface.
*/
EGLBoolean Lost;
/* attributes set by attribute list */
EGLint Width, Height;
EGLenum TextureFormat;

View File

@@ -72,6 +72,7 @@ if NEED_GALLIUM_VL
COMMON_VL_CFLAGS = \
$(AM_CFLAGS) \
$(VL_CFLAGS) \
$(XCB_DRI3_CFLAGS) \
$(DRI2PROTO_CFLAGS) \
$(LIBDRM_CFLAGS)
@@ -87,22 +88,23 @@ if NEED_GALLIUM_VL_WINSYS
noinst_LTLIBRARIES += libgalliumvlwinsys.la
libgalliumvlwinsys_la_CFLAGS = \
$(COMMON_VL_CFLAGS)
libgalliumvlwinsys_la_CFLAGS = $(COMMON_VL_CFLAGS)
libgalliumvlwinsys_la_SOURCES = $(VL_WINSYS_SOURCES)
libgalliumvlwinsys_la_SOURCES = \
$(VL_WINSYS_SOURCES)
if HAVE_PLATFORM_X11
libgalliumvlwinsys_la_SOURCES += $(VL_WINSYS_DRI2_SOURCES)
if HAVE_DRI3
libgalliumvlwinsys_la_SOURCES += \
$(VL_WINSYS_DRI3_SOURCES)
libgalliumvlwinsys_la_SOURCES += $(VL_WINSYS_DRI3_SOURCES)
endif
endif
if HAVE_PLATFORM_DRM
libgalliumvlwinsys_la_SOURCES += $(VL_WINSYS_DRM_SOURCES)
endif
endif
endif # NEED_GALLIUM_VL_WINSYS
endif # NEED_GALLIUM_VL
EXTRA_DIST = \
SConscript \

View File

@@ -345,18 +345,22 @@ VL_SOURCES := \
vl/vl_video_buffer.c \
vl/vl_video_buffer.h \
vl/vl_vlc.h \
vl/vl_winsys.h \
vl/vl_zscan.c \
vl/vl_zscan.h
# XXX: Nuke this as our dri targets no longer depend on VL.
VL_WINSYS_SOURCES := \
vl/vl_winsys_dri.c \
vl/vl_winsys_drm.c
vl/vl_winsys.h
VL_WINSYS_DRI2_SOURCES := \
vl/vl_winsys_dri.c
VL_WINSYS_DRI3_SOURCES := \
vl/vl_winsys_dri3.c
VL_WINSYS_DRM_SOURCES := \
vl/vl_winsys_drm.c
VL_STUB_SOURCES := \
vl/vl_stubs.c

View File

@@ -125,19 +125,6 @@ create_pass_manager(struct gallivm_state *gallivm)
LLVMAddTargetData(gallivm->target, gallivm->passmgr);
#endif
/* Setting the module's DataLayout to an empty string will cause the
* ExecutionEngine to copy to the DataLayout string from its target
* machine to the module. As of LLVM 3.8 the module and the execution
* engine are required to have the same DataLayout.
*
* TODO: This is just a temporary work-around. The correct solution is
* for gallivm_init_state() to create a TargetMachine and pull the
* DataLayout from there. Currently, the TargetMachine used by llvmpipe
* is being implicitly created by the EngineBuilder in
* lp_build_create_jit_compiler_for_module()
*/
#if HAVE_LLVM < 0x0308
{
char *td_str;
// New ones from the Module.
@@ -145,9 +132,6 @@ create_pass_manager(struct gallivm_state *gallivm)
LLVMSetDataLayout(gallivm->module, td_str);
free(td_str);
}
#else
LLVMSetDataLayout(gallivm->module, "");
#endif
if ((gallivm_debug & GALLIVM_DEBUG_NO_OPT) == 0) {
/* These are the passes currently listed in llvm-c/Transforms/Scalar.h,
@@ -628,6 +612,24 @@ gallivm_compile_module(struct gallivm_state *gallivm)
}
if (use_mcjit) {
/* Setting the module's DataLayout to an empty string will cause the
* ExecutionEngine to copy to the DataLayout string from its target
* machine to the module. As of LLVM 3.8 the module and the execution
* engine are required to have the same DataLayout.
*
* We must make sure we do this after running the optimization passes,
* because those passes need a correct datalayout string. For example,
* if those optimization passes see an empty datalayout, they will assume
* this is a little endian target and will do optimizations that break big
* endian machines.
*
* TODO: This is just a temporary work-around. The correct solution is
* for gallivm_init_state() to create a TargetMachine and pull the
* DataLayout from there. Currently, the TargetMachine used by llvmpipe
* is being implicitly created by the EngineBuilder in
* lp_build_create_jit_compiler_for_module()
*/
LLVMSetDataLayout(gallivm->module, "");
assert(!gallivm->engine);
if (!init_gallivm_engine(gallivm)) {
assert(0);

View File

@@ -64,13 +64,13 @@ static const struct pipe_loader_ops pipe_loader_drm_ops;
#ifdef GALLIUM_STATIC_TARGETS
static const struct drm_conf_ret throttle_ret = {
DRM_CONF_INT,
{2},
.type = DRM_CONF_INT,
.val.val_int = 2,
};
static const struct drm_conf_ret share_fd_ret = {
DRM_CONF_BOOL,
{true},
.type = DRM_CONF_BOOL,
.val.val_bool = true,
};
static inline const struct drm_conf_ret *

View File

@@ -29,11 +29,11 @@
#include <errno.h>
#include <fcntl.h>
#include <stdio.h>
#include <sys/ioctl.h>
#include <xf86drm.h>
#include "state_tracker/drm_driver.h"
#include "pipe/p_screen.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
struct renderonly *
@@ -65,8 +65,16 @@ renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro)
}
void
renderonly_scanout_destroy(struct renderonly_scanout *scanout)
renderonly_scanout_destroy(struct renderonly_scanout *scanout,
struct renderonly *ro)
{
struct drm_mode_destroy_dumb destroy_dumb = { };
pipe_resource_reference(&scanout->prime, NULL);
if (ro->kms_fd != -1) {
destroy_dumb.handle = scanout->handle;
drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
}
FREE(scanout);
}
@@ -90,7 +98,7 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
return NULL;
/* create dumb buffer at scanout GPU */
err = ioctl(ro->kms_fd, DRM_IOCTL_MODE_CREATE_DUMB, &create_dumb);
err = drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_CREATE_DUMB, &create_dumb);
if (err < 0) {
fprintf(stderr, "DRM_IOCTL_MODE_CREATE_DUMB failed: %s\n",
strerror(errno));
@@ -109,6 +117,7 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
}
/* import dumb buffer */
memset(&handle, 0, sizeof(handle));
handle.type = DRM_API_HANDLE_TYPE_FD;
handle.handle = prime_fd;
handle.stride = create_dumb.pitch;
@@ -116,6 +125,8 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
scanout->prime = screen->resource_from_handle(screen, rsc,
&handle, PIPE_HANDLE_USAGE_READ_WRITE);
close(prime_fd);
if (!scanout->prime) {
fprintf(stderr, "failed to create resource_from_handle: %s\n", strerror(errno));
goto free_dumb;
@@ -125,7 +136,7 @@ renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc,
free_dumb:
destroy_dumb.handle = scanout->handle;
ioctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
free_scanout:
FREE(scanout);

View File

@@ -77,7 +77,8 @@ struct renderonly_scanout *
renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro);
void
renderonly_scanout_destroy(struct renderonly_scanout *scanout);
renderonly_scanout_destroy(struct renderonly_scanout *scanout,
struct renderonly *ro);
static inline boolean
renderonly_get_handle(struct renderonly_scanout *scanout,

View File

@@ -32,7 +32,9 @@
#ifndef vl_winsys_h
#define vl_winsys_h
#ifdef HAVE_X11_PLATFORM
#include <X11/Xlib.h>
#endif
#include "pipe/p_defines.h"
#include "pipe/p_format.h"
@@ -68,15 +70,28 @@ struct vl_screen
struct pipe_loader_device *dev;
};
#ifdef HAVE_X11_PLATFORM
struct vl_screen *
vl_dri2_screen_create(Display *display, int screen);
#else
static inline struct vl_screen *
vl_dri2_screen_create(void *display, int screen) { return NULL; };
#endif
struct vl_screen *
vl_drm_screen_create(int fd);
#if defined(HAVE_DRI3)
#if defined(HAVE_X11_PLATFORM) && defined(HAVE_DRI3)
struct vl_screen *
vl_dri3_screen_create(Display *display, int screen);
#else
static inline struct vl_screen *
vl_dri3_screen_create(void *display, int screen) { return NULL; };
#endif
#ifdef HAVE_DRM_PLATFORM
struct vl_screen *
vl_drm_screen_create(int fd);
#else
static inline struct vl_screen *
vl_drm_screen_create(int fd) { return NULL; };
#endif
#endif

View File

@@ -103,6 +103,8 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
_T(B4G4R4A4_UNORM, A4R4G4B4, A4R4G4B4),
_T(B4G4R4X4_UNORM, X4R4G4B4, X4R4G4B4),
_T(L8A8_UNORM, A8L8, NONE),
_T(Z16_UNORM, D16, A4R4G4B4),
_T(B5G6R5_UNORM, R5G6B5, R5G6B5),
_T(B5G5R5A1_UNORM, A1R5G5B5, A1R5G5B5),

View File

@@ -180,7 +180,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
&paddingY, &halign);
assert(paddingX && paddingY);
if (templat->bind != PIPE_BUFFER) {
if (templat->target != PIPE_BUFFER) {
unsigned min_paddingY = 4 * screen->specs.pixel_pipes;
if (paddingY < min_paddingY)
paddingY = min_paddingY;
@@ -308,7 +308,7 @@ etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
etna_bo_del(rsc->ts_bo);
if (rsc->scanout)
renderonly_scanout_destroy(rsc->scanout);
renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
list_delinit(&rsc->list);

View File

@@ -70,6 +70,9 @@ etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture)))
rsc = etna_resource(rsc->texture); /* switch to using the texture resource */
if (trans->rsc)
etna_bo_cpu_fini(etna_resource(trans->rsc)->bo);
if (ptrans->usage & PIPE_TRANSFER_WRITE) {
if (trans->rsc) {
/* We have a temporary resource due to either tile status or
@@ -105,15 +108,15 @@ etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
}
rsc->seqno++;
etna_bo_cpu_fini(rsc->bo);
if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) {
/* XXX do we need to flush the CPU cache too or start a write barrier
* to make sure the GPU sees it? */
ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
}
}
if (!trans->rsc)
etna_bo_cpu_fini(rsc->bo);
pipe_resource_reference(&trans->rsc, NULL);
pipe_resource_reference(&ptrans->resource, NULL);
slab_free(&ctx->transfer_pool, trans);

View File

@@ -416,6 +416,8 @@ translate_clear_color(enum pipe_format format,
switch (format) {
case PIPE_FORMAT_B8G8R8A8_UNORM:
case PIPE_FORMAT_B8G8R8X8_UNORM:
case PIPE_FORMAT_R8G8B8A8_UNORM:
case PIPE_FORMAT_R8G8B8X8_UNORM:
clear_value = etna_cfloat_to_uintN(color->f[2], 8) |
(etna_cfloat_to_uintN(color->f[1], 8) << 8) |
(etna_cfloat_to_uintN(color->f[0], 8) << 16) |

View File

@@ -149,6 +149,9 @@ use_hw_binning(struct fd_batch *batch)
if (gmem->minx || gmem->miny)
return false;
if ((gmem->maxpw * gmem->maxph) > 32)
return false;
return fd_binning_enabled && ((gmem->nbins_x * gmem->nbins_y) > 2);
}

View File

@@ -112,7 +112,7 @@ fd_context_destroy(struct pipe_context *pctx)
DBG("");
if (ctx->screen->reorder)
if (ctx->screen->reorder && util_queue_is_initialized(&ctx->flush_queue))
util_queue_destroy(&ctx->flush_queue);
fd_batch_reference(&ctx->batch, NULL); /* unref current batch */
@@ -278,13 +278,7 @@ fd_context_init(struct fd_context *ctx, struct pipe_screen *pscreen,
goto fail;
pctx->const_uploader = pctx->stream_uploader;
/* TODO what about compute? Ideally it creates it's own independent
* batches per compute job (since it isn't using tiling, so no point
* in getting involved with the re-ordering madness)..
*/
if (!screen->reorder) {
ctx->batch = fd_bc_alloc_batch(&screen->batch_cache, ctx);
}
ctx->batch = fd_bc_alloc_batch(&screen->batch_cache, ctx);
slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);

View File

@@ -219,6 +219,9 @@ calculate_tiles(struct fd_batch *batch)
div_round_up(nbins_x, tpp_x)) > 8)
tpp_x += 1;
gmem->maxpw = tpp_x;
gmem->maxph = tpp_y;
/* configure pipes: */
xoff = yoff = 0;
for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) {

View File

@@ -57,6 +57,7 @@ struct fd_gmem_stateobj {
uint16_t bin_w, nbins_x;
uint16_t minx, miny;
uint16_t width, height;
uint16_t maxpw, maxph; /* maximum pipe width/height */
};
struct fd_batch;

View File

@@ -642,6 +642,8 @@ NVC0LegalizePostRA::replaceZero(Instruction *i)
for (int s = 0; i->srcExists(s); ++s) {
if (s == 2 && i->op == OP_SUCLAMP)
continue;
if (s == 1 && i->op == OP_SHLADD)
continue;
ImmediateValue *imm = i->getSrc(s)->asImm();
if (imm) {
if (i->op == OP_SELP && s == 2) {

View File

@@ -90,11 +90,20 @@ nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
bindings &= ~(PIPE_BIND_LINEAR |
PIPE_BIND_SHARED);
if (bindings & PIPE_BIND_SHADER_IMAGE && sample_count > 1 &&
nouveau_screen(pscreen)->class_3d >= GM107_3D_CLASS) {
/* MS images are currently unsupported on Maxwell because they have to
* be handled explicitly. */
return false;
if (bindings & PIPE_BIND_SHADER_IMAGE) {
if (sample_count > 1 &&
nouveau_screen(pscreen)->class_3d >= GM107_3D_CLASS) {
/* MS images are currently unsupported on Maxwell because they have to
* be handled explicitly. */
return false;
}
if (format == PIPE_FORMAT_B8G8R8A8_UNORM &&
nouveau_screen(pscreen)->class_3d < NVE4_3D_CLASS) {
/* This should work on Fermi, but for currently unknown reasons it
* does not and results in breaking reads from pbos. */
return false;
}
}
return (( nvc0_format_table[format].usage |

View File

@@ -16,13 +16,11 @@ libradeon_la_SOURCES = \
if HAVE_GALLIUM_LLVM
AM_CFLAGS += \
$(LLVM_CFLAGS) \
$(LIBELF_CFLAGS)
$(LLVM_CFLAGS)
libradeon_la_LIBADD = \
$(CLOCK_LIB) \
$(LLVM_LIBS) \
$(LIBELF_LIBS)
$(LLVM_LIBS)
libradeon_la_LDFLAGS = \
$(LLVM_LDFLAGS)

View File

@@ -833,6 +833,7 @@ static const char* r600_get_chip_name(struct r600_common_screen *rscreen)
case CHIP_POLARIS12: return "AMD POLARIS12";
case CHIP_STONEY: return "AMD STONEY";
case CHIP_VEGA10: return "AMD VEGA10";
case CHIP_RAVEN: return "AMD RAVEN";
default: return "AMD unknown";
}
}
@@ -1006,6 +1007,7 @@ const char *r600_get_llvm_processor_name(enum radeon_family family)
case CHIP_POLARIS12: /* same as polaris11 */
return HAVE_LLVM >= 0x0309 ? "polaris11" : "carrizo";
case CHIP_VEGA10:
case CHIP_RAVEN:
return "gfx900";
default:
return "";

View File

@@ -2720,8 +2720,15 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
vi_dcc_clear_level(rctx, tex, 0, reset_value);
if (clear_words_needed)
tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
unsigned level_bit = 1 << fb->cbufs[i]->u.tex.level;
if (clear_words_needed) {
bool need_compressed_update = !tex->dirty_level_mask;
tex->dirty_level_mask |= level_bit;
if (need_compressed_update)
p_atomic_inc(&rctx->screen->compressed_colortex_counter);
}
tex->separate_dcc_dirty = true;
} else {
/* 128-bit formats are unusupported */
@@ -2744,7 +2751,12 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
tex->cmask.offset, tex->cmask.size, 0,
R600_COHERENCY_CB_META);
bool need_compressed_update = !tex->dirty_level_mask;
tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
if (need_compressed_update)
p_atomic_inc(&rctx->screen->compressed_colortex_counter);
}
/* We can change the micro tile mode before a full clear. */

View File

@@ -765,7 +765,7 @@ static void si_set_shader_image(struct si_context *ctx,
static const unsigned char swizzle[4] = { 0, 1, 2, 3 };
struct r600_texture *tex = (struct r600_texture *)res;
unsigned level = view->u.tex.level;
unsigned width, height, depth;
unsigned width, height, depth, hw_level;
bool uses_dcc = vi_dcc_enabled(tex, level);
assert(!tex->is_depth);
@@ -794,20 +794,31 @@ static void si_set_shader_image(struct si_context *ctx,
p_atomic_read(&tex->framebuffers_bound))
ctx->need_check_render_feedback = true;
/* Always force the base level to the selected level.
*
* This is required for 3D textures, where otherwise
* selecting a single slice for non-layered bindings
* fails. It doesn't hurt the other targets.
*/
width = u_minify(res->b.b.width0, level);
height = u_minify(res->b.b.height0, level);
depth = u_minify(res->b.b.depth0, level);
if (ctx->b.chip_class >= GFX9) {
/* Always set the base address. The swizzle modes don't
* allow setting mipmap level offsets as the base.
*/
width = res->b.b.width0;
height = res->b.b.height0;
depth = res->b.b.depth0;
hw_level = level;
} else {
/* Always force the base level to the selected level.
*
* This is required for 3D textures, where otherwise
* selecting a single slice for non-layered bindings
* fails. It doesn't hurt the other targets.
*/
width = u_minify(res->b.b.width0, level);
height = u_minify(res->b.b.height0, level);
depth = u_minify(res->b.b.depth0, level);
hw_level = 0;
}
si_make_texture_descriptor(screen, tex,
false, res->b.b.target,
view->format, swizzle,
0, 0,
hw_level, hw_level,
view->u.tex.first_layer,
view->u.tex.last_layer,
width, height, depth,

View File

@@ -33,9 +33,6 @@
#include "vl/vl_decoder.h"
#include "../ddebug/dd_util.h"
#define SI_LLVM_DEFAULT_FEATURES \
"+DumpCode,+vgpr-spilling,-fp32-denormals,-xnack"
/*
* pipe_context
*/
@@ -126,12 +123,16 @@ static LLVMTargetMachineRef
si_create_llvm_target_machine(struct si_screen *sscreen)
{
const char *triple = "amdgcn--";
char features[256];
snprintf(features, sizeof(features),
"+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals%s%s",
sscreen->b.chip_class >= GFX9 ? ",+xnack" : ",-xnack",
sscreen->b.debug_flags & DBG_SI_SCHED ? ",+si-scheduler" : "");
return LLVMCreateTargetMachine(si_llvm_get_amdgpu_target(triple), triple,
r600_get_llvm_processor_name(sscreen->b.family),
sscreen->b.debug_flags & DBG_SI_SCHED ?
SI_LLVM_DEFAULT_FEATURES ",+si-scheduler" :
SI_LLVM_DEFAULT_FEATURES,
features,
LLVMCodeGenLevelDefault,
LLVMRelocDefault,
LLVMCodeModelDefault);
@@ -759,6 +760,7 @@ static bool si_init_gs_info(struct si_screen *sscreen)
case CHIP_POLARIS11:
case CHIP_POLARIS12:
case CHIP_VEGA10:
case CHIP_RAVEN:
sscreen->gs_table_depth = 32;
return true;
default:
@@ -897,7 +899,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
sscreen->has_msaa_sample_loc_bug = (sscreen->b.family >= CHIP_POLARIS10 &&
sscreen->b.family <= CHIP_POLARIS12) ||
sscreen->b.family == CHIP_VEGA10;
sscreen->b.family == CHIP_VEGA10 ||
sscreen->b.family == CHIP_RAVEN;
sscreen->b.has_cp_dma = true;
sscreen->b.has_streamout = true;
@@ -911,7 +914,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
sscreen->b.rbplus_allowed =
!(sscreen->b.debug_flags & DBG_NO_RB_PLUS) &&
sscreen->b.family == CHIP_STONEY;
(sscreen->b.family == CHIP_STONEY ||
sscreen->b.family == CHIP_RAVEN);
}
(void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain);

View File

@@ -366,6 +366,7 @@ struct si_context {
struct si_shader_selector *last_tcs;
int last_num_tcs_input_cp;
int last_tes_sh_base;
bool last_tess_uses_primid;
unsigned last_num_patches;
/* Debug state. */

View File

@@ -2344,8 +2344,8 @@ handle_semantic:
shader->selector->info.writes_layer) {
pos_args[1].enabled_channels = shader->selector->info.writes_psize |
(shader->selector->info.writes_edgeflag << 1) |
(shader->selector->info.writes_layer << 2) |
(shader->selector->info.writes_viewport_index << 3);
(shader->selector->info.writes_layer << 2);
pos_args[1].valid_mask = 0; /* EXEC mask */
pos_args[1].done = 0; /* last export? */
pos_args[1].target = V_008DFC_SQ_EXP_POS + 1;
@@ -2374,11 +2374,34 @@ handle_semantic:
ctx->f32, "");
}
if (shader->selector->info.writes_layer)
pos_args[1].out[2] = layer_value;
if (ctx->screen->b.chip_class >= GFX9) {
/* GFX9 has the layer in out.z[10:0] and the viewport
* index in out.z[19:16].
*/
if (shader->selector->info.writes_layer)
pos_args[1].out[2] = layer_value;
if (shader->selector->info.writes_viewport_index)
pos_args[1].out[3] = viewport_index_value;
if (shader->selector->info.writes_viewport_index) {
LLVMValueRef v = viewport_index_value;
v = bitcast(bld_base, TGSI_TYPE_UNSIGNED, v);
v = LLVMBuildShl(ctx->gallivm.builder, v,
LLVMConstInt(ctx->i32, 16, 0), "");
v = LLVMBuildOr(ctx->gallivm.builder, v,
bitcast(bld_base, TGSI_TYPE_UNSIGNED,
pos_args[1].out[2]), "");
pos_args[1].out[2] = bitcast(bld_base, TGSI_TYPE_FLOAT, v);
pos_args[1].enabled_channels |= 1 << 2;
}
} else {
if (shader->selector->info.writes_layer)
pos_args[1].out[2] = layer_value;
if (shader->selector->info.writes_viewport_index) {
pos_args[1].out[3] = viewport_index_value;
pos_args[1].enabled_channels |= 1 << 3;
}
}
}
for (i = 0; i < 4; i++)
@@ -3400,7 +3423,7 @@ image_fetch_rsrc(
static LLVMValueRef image_fetch_coords(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_instruction *inst,
unsigned src)
unsigned src, LLVMValueRef desc)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = &ctx->gallivm;
@@ -3417,14 +3440,30 @@ static LLVMValueRef image_fetch_coords(
coords[chan] = tmp;
}
/* 1D textures are allocated and used as 2D on GFX9. */
if (ctx->screen->b.chip_class >= GFX9) {
/* 1D textures are allocated and used as 2D on GFX9. */
if (target == TGSI_TEXTURE_1D) {
coords[1] = ctx->i32_0;
num_coords++;
} else if (target == TGSI_TEXTURE_1D_ARRAY) {
coords[2] = coords[1];
coords[1] = ctx->i32_0;
num_coords++;
} else if (target == TGSI_TEXTURE_2D) {
/* The hw can't bind a slice of a 3D image as a 2D
* image, because it ignores BASE_ARRAY if the target
* is 3D. The workaround is to read BASE_ARRAY and set
* it as the 3rd address operand for all 2D images.
*/
LLVMValueRef first_layer, const5, mask;
const5 = LLVMConstInt(ctx->i32, 5, 0);
mask = LLVMConstInt(ctx->i32, S_008F24_BASE_ARRAY(~0), 0);
first_layer = LLVMBuildExtractElement(builder, desc, const5, "");
first_layer = LLVMBuildAnd(builder, first_layer, mask, "");
coords[2] = first_layer;
num_coords++;
}
}
@@ -3539,7 +3578,7 @@ static void load_fetch_args(
LLVMValueRef coords;
image_fetch_rsrc(bld_base, &inst->Src[0], false, target, &rsrc);
coords = image_fetch_coords(bld_base, inst, 1);
coords = image_fetch_coords(bld_base, inst, 1, rsrc);
if (target == TGSI_TEXTURE_BUFFER) {
buffer_append_args(ctx, emit_data, rsrc, coords,
@@ -3814,16 +3853,15 @@ static void store_fetch_args(
*/
bool force_glc = ctx->screen->b.chip_class == SI;
coords = image_fetch_coords(bld_base, inst, 0);
image_fetch_rsrc(bld_base, &memory, true, target, &rsrc);
coords = image_fetch_coords(bld_base, inst, 0, rsrc);
if (target == TGSI_TEXTURE_BUFFER) {
image_fetch_rsrc(bld_base, &memory, true, target, &rsrc);
buffer_append_args(ctx, emit_data, rsrc, coords,
ctx->i32_0, false, force_glc);
} else {
emit_data->args[1] = coords;
image_fetch_rsrc(bld_base, &memory, true, target,
&emit_data->args[2]);
emit_data->args[2] = rsrc;
emit_data->args[3] = LLVMConstInt(ctx->i32, 15, 0); /* dmask */
emit_data->arg_count = 4;
@@ -4027,7 +4065,7 @@ static void atomic_fetch_args(
LLVMValueRef coords;
image_fetch_rsrc(bld_base, &inst->Src[0], true, target, &rsrc);
coords = image_fetch_coords(bld_base, inst, 1);
coords = image_fetch_coords(bld_base, inst, 1, rsrc);
if (target == TGSI_TEXTURE_BUFFER) {
buffer_append_args(ctx, emit_data, rsrc, coords,

View File

@@ -2976,7 +2976,40 @@ si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf,
num_records = size / stride;
num_records = MIN2(num_records, (buf->b.b.width0 - offset) / stride);
if (screen->b.chip_class == VI)
/* The NUM_RECORDS field has a different meaning depending on the chip,
* instruction type, STRIDE, and SWIZZLE_ENABLE.
*
* SI-CIK:
* - If STRIDE == 0, it's in byte units.
* - If STRIDE != 0, it's in units of STRIDE, used with inst.IDXEN.
*
* VI:
* - For SMEM and STRIDE == 0, it's in byte units.
* - For SMEM and STRIDE != 0, it's in units of STRIDE.
* - For VMEM and STRIDE == 0 or SWIZZLE_ENABLE == 0, it's in byte units.
* - For VMEM and STRIDE != 0 and SWIZZLE_ENABLE == 1, it's in units of STRIDE.
* NOTE: There is incompatibility between VMEM and SMEM opcodes due to SWIZZLE_-
* ENABLE. The workaround is to set STRIDE = 0 if SWIZZLE_ENABLE == 0 when
* using SMEM. This can be done in the shader by clearing STRIDE with s_and.
* That way the same descriptor can be used by both SMEM and VMEM.
*
* GFX9:
* - For SMEM and STRIDE == 0, it's in byte units.
* - For SMEM and STRIDE != 0, it's in units of STRIDE.
* - For VMEM and inst.IDXEN == 0 or STRIDE == 0, it's in byte units.
* - For VMEM and inst.IDXEN == 1 and STRIDE != 0, it's in units of STRIDE.
*/
if (screen->b.chip_class >= GFX9)
/* When vindex == 0, LLVM sets IDXEN = 0, thus changing units
* from STRIDE to bytes. This works around it by setting
* NUM_RECORDS to at least the size of one element, so that
* the first element is readable when IDXEN == 0.
*
* TODO: Fix this in LLVM, but do we need a new intrinsic where
* IDXEN is enforced?
*/
num_records = num_records ? MAX2(num_records, stride) : 0;
else if (screen->b.chip_class == VI)
num_records *= stride;
state[4] = 0;
@@ -3156,7 +3189,8 @@ si_make_texture_descriptor(struct si_screen *screen,
if (!sampler &&
(res->target == PIPE_TEXTURE_CUBE ||
res->target == PIPE_TEXTURE_CUBE_ARRAY ||
res->target == PIPE_TEXTURE_3D)) {
(screen->b.chip_class <= VI &&
res->target == PIPE_TEXTURE_3D))) {
/* For the purpose of shader images, treat cube maps and 3D
* textures as 2D arrays. For 3D textures, the address
* calculations for mipmaps are different, so we rely on the
@@ -4527,15 +4561,33 @@ static void si_init_config(struct si_context *sctx)
RADEON_PRIO_BORDER_COLORS);
if (sctx->b.chip_class >= GFX9) {
si_pm4_set_reg(pm4, R_028060_DB_DFSM_CONTROL, 0);
unsigned num_se = sscreen->b.info.max_se;
unsigned pc_lines = 0;
switch (sctx->b.family) {
case CHIP_VEGA10:
pc_lines = 4096;
break;
case CHIP_RAVEN:
pc_lines = 1024;
break;
default:
assert(0);
}
si_pm4_set_reg(pm4, R_028060_DB_DFSM_CONTROL,
S_028060_PUNCHOUT_MODE(V_028060_FORCE_OFF));
si_pm4_set_reg(pm4, R_028064_DB_RENDER_FILTER, 0);
/* TODO: We can use this to disable RBs for rendering to GART: */
si_pm4_set_reg(pm4, R_02835C_PA_SC_TILE_STEERING_OVERRIDE, 0);
si_pm4_set_reg(pm4, R_02883C_PA_SU_OVER_RASTERIZATION_CNTL, 0);
/* TODO: Enable the binner: */
si_pm4_set_reg(pm4, R_028C44_PA_SC_BINNER_CNTL_0,
S_028C44_BINNING_MODE(V_028C44_DISABLE_BINNING_USE_LEGACY_SC));
si_pm4_set_reg(pm4, R_028C48_PA_SC_BINNER_CNTL_1, 0);
S_028C44_BINNING_MODE(V_028C44_DISABLE_BINNING_USE_LEGACY_SC) |
S_028C44_DISABLE_START_OF_PRIM(1));
si_pm4_set_reg(pm4, R_028C48_PA_SC_BINNER_CNTL_1,
S_028C48_MAX_ALLOC_COUNT(MIN2(128, pc_lines / (4 * num_se))) |
S_028C48_MAX_PRIM_PER_BATCH(1023));
si_pm4_set_reg(pm4, R_028C4C_PA_SC_CONSERVATIVE_RASTERIZATION_CNTL,
S_028C4C_NULL_SQUAD_AA_MASK_ENABLE(1));
si_pm4_set_reg(pm4, R_030968_VGT_INSTANCE_BASE_ID, 0);

View File

@@ -101,6 +101,9 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
* It would be wrong to think that TCS = TES. */
struct si_shader_selector *tcs =
sctx->tcs_shader.cso ? sctx->tcs_shader.cso : sctx->tes_shader.cso;
unsigned tess_uses_primid = sctx->ia_multi_vgt_param_key.u.tcs_tes_uses_prim_id;
bool has_primid_instancing_bug = sctx->b.chip_class == SI &&
sctx->b.screen->info.max_se == 1;
unsigned tes_sh_base = sctx->shader_userdata.sh_base[PIPE_SHADER_TESS_EVAL];
unsigned num_tcs_input_cp = info->vertices_per_patch;
unsigned num_tcs_output_cp, num_tcs_inputs, num_tcs_outputs;
@@ -114,7 +117,9 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
if (sctx->last_ls == ls->current &&
sctx->last_tcs == tcs &&
sctx->last_tes_sh_base == tes_sh_base &&
sctx->last_num_tcs_input_cp == num_tcs_input_cp) {
sctx->last_num_tcs_input_cp == num_tcs_input_cp &&
(!has_primid_instancing_bug ||
(sctx->last_tess_uses_primid == tess_uses_primid))) {
*num_patches = sctx->last_num_patches;
return;
}
@@ -123,6 +128,7 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
sctx->last_tcs = tcs;
sctx->last_tes_sh_base = tes_sh_base;
sctx->last_num_tcs_input_cp = num_tcs_input_cp;
sctx->last_tess_uses_primid = tess_uses_primid;
/* This calculates how shader inputs and outputs among VS, TCS, and TES
* are laid out in LDS. */
@@ -155,8 +161,12 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
/* Make sure that the data fits in LDS. This assumes the shaders only
* use LDS for the inputs and outputs.
*
* While CIK can use 64K per threadgroup, there is a hang on Stoney
* with 2 CUs if we use more than 32K. The closed Vulkan driver also
* uses 32K at most on all GCN chips.
*/
hardware_lds_size = sctx->b.chip_class >= CIK ? 65536 : 32768;
hardware_lds_size = 32768;
*num_patches = MIN2(*num_patches, hardware_lds_size / (input_patch_size +
output_patch_size));
@@ -176,6 +186,19 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
*num_patches = MIN2(*num_patches, one_wave);
}
/* The VGT HS block increments the patch ID unconditionally
* within a single threadgroup. This results in incorrect
* patch IDs when instanced draws are used.
*
* The intended solution is to restrict threadgroups to
* a single instance by setting SWITCH_ON_EOI, which
* should cause IA to split instances up. However, this
* doesn't work correctly on SI when there is no other
* SE to switch to.
*/
if (has_primid_instancing_bug)
*num_patches = 1;
sctx->last_num_patches = *num_patches;
output_patch0_offset = input_patch_size * *num_patches;
@@ -291,13 +314,15 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen,
/* Needed for 028B6C_DISTRIBUTION_MODE != 0 */
if (sscreen->has_distributed_tess) {
if (key->u.uses_gs) {
partial_es_wave = true;
if (sscreen->b.chip_class <= VI)
partial_es_wave = true;
/* GPU hang workaround. */
if (sscreen->b.family == CHIP_TONGA ||
sscreen->b.family == CHIP_FIJI ||
sscreen->b.family == CHIP_POLARIS10 ||
sscreen->b.family == CHIP_POLARIS11)
sscreen->b.family == CHIP_POLARIS11 ||
sscreen->b.family == CHIP_POLARIS12)
partial_vs_wave = true;
} else {
partial_vs_wave = true;
@@ -371,7 +396,7 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen,
}
/* If SWITCH_ON_EOI is set, PARTIAL_ES_WAVE must be set too. */
if (ia_switch_on_eoi)
if (sscreen->b.chip_class <= VI && ia_switch_on_eoi)
partial_es_wave = true;
return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
@@ -379,7 +404,8 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen,
S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) |
S_028AA8_PARTIAL_ES_WAVE_ON(partial_es_wave) |
S_028AA8_WD_SWITCH_ON_EOP(sscreen->b.chip_class >= CIK ? wd_switch_on_eop : 0) |
S_028AA8_MAX_PRIMGRP_IN_WAVE(sscreen->b.chip_class >= VI ?
/* The following field was moved to VGT_SHADER_STAGES_EN in GFX9. */
S_028AA8_MAX_PRIMGRP_IN_WAVE(sscreen->b.chip_class == VI ?
max_primgroup_in_wave : 0) |
S_030960_EN_INST_OPT_BASIC(sscreen->b.chip_class >= GFX9) |
S_030960_EN_INST_OPT_ADV(sscreen->b.chip_class >= GFX9);

View File

@@ -655,8 +655,17 @@ static void si_shader_vs(struct si_screen *sscreen, struct si_shader *shader,
* not sent again.
*/
if (!gs) {
si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE,
S_028A40_MODE(enable_prim_id ? V_028A40_GS_SCENARIO_A : 0));
unsigned mode = 0;
/* PrimID needs GS scenario A.
* GFX9 also needs it when ViewportIndex is enabled.
*/
if (enable_prim_id ||
(sscreen->b.chip_class >= GFX9 &&
shader->selector->info.writes_viewport_index))
mode = V_028A40_GS_SCENARIO_A;
si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, S_028A40_MODE(mode));
si_pm4_set_reg(pm4, R_028A84_VGT_PRIMITIVEID_EN, enable_prim_id);
} else {
si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, si_vgt_gs_mode(gs));
@@ -1804,6 +1813,19 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx));
}
static void si_update_tcs_tes_uses_prim_id(struct si_context *sctx)
{
sctx->ia_multi_vgt_param_key.u.tcs_tes_uses_prim_id =
(sctx->tes_shader.cso &&
sctx->tes_shader.cso->info.uses_primid) ||
(sctx->tcs_shader.cso &&
sctx->tcs_shader.cso->info.uses_primid) ||
(sctx->gs_shader.cso &&
sctx->gs_shader.cso->info.uses_primid) ||
(sctx->ps_shader.cso && !sctx->gs_shader.cso &&
sctx->ps_shader.cso->info.uses_primid);
}
static void si_bind_gs_shader(struct pipe_context *ctx, void *state)
{
struct si_context *sctx = (struct si_context *)ctx;
@@ -1820,20 +1842,14 @@ static void si_bind_gs_shader(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->clip_regs);
sctx->last_rast_prim = -1; /* reset this so that it gets updated */
if (enable_changed)
if (enable_changed) {
si_shader_change_notify(sctx);
if (sctx->ia_multi_vgt_param_key.u.uses_tess)
si_update_tcs_tes_uses_prim_id(sctx);
}
r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx));
}
static void si_update_tcs_tes_uses_prim_id(struct si_context *sctx)
{
sctx->ia_multi_vgt_param_key.u.tcs_tes_uses_prim_id =
(sctx->tes_shader.cso &&
sctx->tes_shader.cso->info.uses_primid) ||
(sctx->tcs_shader.cso &&
sctx->tcs_shader.cso->info.uses_primid);
}
static void si_bind_tcs_shader(struct pipe_context *ctx, void *state)
{
struct si_context *sctx = (struct si_context *)ctx;
@@ -1888,6 +1904,8 @@ static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
sctx->ps_shader.cso = sel;
sctx->ps_shader.current = sel ? sel->first_variant : NULL;
sctx->do_update_shaders = true;
if (sel && sctx->ia_multi_vgt_param_key.u.uses_tess)
si_update_tcs_tes_uses_prim_id(sctx);
si_mark_atom_dirty(sctx, &sctx->cb_render_state);
}
@@ -2115,7 +2133,10 @@ static bool si_update_gs_ring_buffers(struct si_context *sctx)
unsigned num_se = sctx->screen->b.info.max_se;
unsigned wave_size = 64;
unsigned max_gs_waves = 32 * num_se; /* max 32 per SE on GCN */
unsigned gs_vertex_reuse = 16 * num_se; /* GS_VERTEX_REUSE register (per SE) */
/* On SI-CI, the value comes from VGT_GS_VERTEX_REUSE = 16.
* On VI+, the value comes from VGT_VERTEX_REUSE_BLOCK_CNTL = 30 (+2).
*/
unsigned gs_vertex_reuse = (sctx->b.chip_class >= VI ? 32 : 16) * num_se;
unsigned alignment = 256 * num_se;
/* The maximum size is 63.999 MB per SE. */
unsigned max_size = ((unsigned)(63.999 * 1024 * 1024) & ~255) * num_se;
@@ -2542,6 +2563,9 @@ static void si_update_vgt_shader_config(struct si_context *sctx)
S_028B54_VS_EN(V_028B54_VS_STAGE_COPY_SHADER);
}
if (sctx->b.chip_class >= GFX9)
stages |= S_028B54_MAX_PRIMGRP_IN_WAVE(2);
si_pm4_set_reg(*pm4, R_028B54_VGT_SHADER_STAGES_EN, stages);
}
si_pm4_bind_state(sctx, vgt_shader_config, *pm4);

View File

@@ -22,7 +22,7 @@
include Makefile.sources
include $(top_srcdir)/src/gallium/Automake.inc
AM_CXXFLAGS = $(GALLIUM_DRIVER_CFLAGS) $(SWR_CXX14_CXXFLAGS)
AM_CXXFLAGS = $(GALLIUM_DRIVER_CFLAGS) $(SWR_CXX11_CXXFLAGS)
noinst_LTLIBRARIES = libmesaswr.la
@@ -32,7 +32,7 @@ COMMON_CXXFLAGS = \
-fno-strict-aliasing \
$(GALLIUM_DRIVER_CFLAGS) \
$(LLVM_CXXFLAGS) \
$(SWR_CXX14_CXXFLAGS) \
$(SWR_CXX11_CXXFLAGS) \
-I$(builddir)/rasterizer/codegen \
-I$(builddir)/rasterizer/jitter \
-I$(builddir)/rasterizer/archrast \
@@ -56,6 +56,7 @@ BUILT_SOURCES = \
rasterizer/codegen/gen_knobs.cpp \
rasterizer/codegen/gen_knobs.h \
rasterizer/jitter/gen_state_llvm.h \
rasterizer/jitter/gen_builder.hpp \
rasterizer/jitter/gen_builder_x86.hpp \
rasterizer/archrast/gen_ar_event.hpp \
rasterizer/archrast/gen_ar_event.cpp \
@@ -168,20 +169,6 @@ COMMON_LDFLAGS = \
$(LLVM_LDFLAGS)
# XXX: As we cannot use BUILT_SOURCES (the files will end up in the dist
# tarball) just annotate the dependency directly.
# As the single direct user of gen_builder.hpp is a header (builder.h) trace all
# the translusive users (one that use the latter header).
rasterizer/jitter/blend_jit.cpp: rasterizer/jitter/gen_builder.hpp
rasterizer/jitter/builder.cpp: rasterizer/jitter/gen_builder.hpp
rasterizer/jitter/builder_misc.cpp: rasterizer/jitter/gen_builder.hpp
rasterizer/jitter/fetch_jit.cpp: rasterizer/jitter/gen_builder.hpp
rasterizer/jitter/streamout_jit.cpp: rasterizer/jitter/gen_builder.hpp
swr_shader.cpp: rasterizer/jitter/gen_builder.hpp
CLEANFILES = \
rasterizer/jitter/gen_builder.hpp
lib_LTLIBRARIES = libswrAVX.la libswrAVX2.la
libswrAVX_la_CXXFLAGS = \
@@ -192,14 +179,6 @@ libswrAVX_la_CXXFLAGS = \
libswrAVX_la_SOURCES = \
$(COMMON_SOURCES)
# XXX: Don't ship these generated sources for now, since they are specific
# to the LLVM version they are generated from. Thus a release tarball
# containing the said files, generated against eg. LLVM 3.8 will fail to build
# on systems with other versions of LLVM eg. 3.7 or 3.6.
# Move these back to BUILT_SOURCES once that is resolved.
nodist_libswrAVX_la_SOURCES = \
rasterizer/jitter/gen_builder.hpp
libswrAVX_la_LIBADD = \
$(COMMON_LIBADD)
@@ -214,14 +193,6 @@ libswrAVX2_la_CXXFLAGS = \
libswrAVX2_la_SOURCES = \
$(COMMON_SOURCES)
# XXX: Don't ship these generated sources for now, since they are specific
# to the LLVM version they are generated from. Thus a release tarball
# containing the said files, generated against eg. LLVM 3.8 will fail to build
# on systems with other versions of LLVM eg. 3.7 or 3.6.
# Move these back to BUILT_SOURCES once that is resolved.
nodist_libswrAVX2_la_SOURCES = \
rasterizer/jitter/gen_builder.hpp
libswrAVX2_la_LIBADD = \
$(COMMON_LIBADD)
@@ -230,6 +201,16 @@ libswrAVX2_la_LDFLAGS = \
include $(top_srcdir)/install-gallium-links.mk
# Generated gen_builder.hpp is not backwards compatible. So ship only one
# created with the oldest supported version of LLVM.
dist-hook:
if SWR_INVALID_LLVM_VERSION
@echo "*******************************************************"
@echo "LLVM 3.9.0 or LLVM 3.9.1 required to create the tarball"
@echo "*******************************************************"
@test
endif
EXTRA_DIST = \
SConscript \
rasterizer/archrast/events.proto \

View File

@@ -38,7 +38,7 @@ loadersource = env.ParseSourceList('Makefile.sources', [
if not env['msvc'] :
env.Append(CCFLAGS = [
'-std=c++14',
'-std=c++11',
])
swrroot = '#src/gallium/drivers/swr/'

View File

@@ -953,26 +953,27 @@ public:
private:
template <typename MaskT>
INLINE __m128i expandThenBlend4(uint32_t* min, uint32_t* max) // @llvm_func_start
{
__m128i vMin = _mm_set1_epi32(*min);
__m128i vMax = _mm_set1_epi32(*max);
return _simd_blend4_epi32<MaskT::value>(vMin, vMax);
} // @llvm_func_end
INLINE void CalcTileSampleOffsets(int numSamples) // @llvm_func_start
{
auto expandThenBlend4 = [](uint32_t* min, uint32_t* max, auto mask)
{
__m128i vMin = _mm_set1_epi32(*min);
__m128i vMax = _mm_set1_epi32(*max);
return _simd_blend4_epi32<decltype(mask)::value>(vMin, vMax);
};
{
auto minXi = std::min_element(std::begin(_xi), &_xi[numSamples]);
auto maxXi = std::max_element(std::begin(_xi), &_xi[numSamples]);
std::integral_constant<int, 0xA> xMask;
using xMask = std::integral_constant<int, 0xA>;
// BR(max), BL(min), UR(max), UL(min)
tileSampleOffsetsX = expandThenBlend4(minXi, maxXi, xMask);
tileSampleOffsetsX = expandThenBlend4<xMask>(minXi, maxXi);
auto minYi = std::min_element(std::begin(_yi), &_yi[numSamples]);
auto maxYi = std::max_element(std::begin(_yi), &_yi[numSamples]);
std::integral_constant<int, 0xC> yMask;
using yMask = std::integral_constant<int, 0xC>;
// BR(max), BL(min), UR(max), UL(min)
tileSampleOffsetsY = expandThenBlend4(minYi, maxYi, yMask);
tileSampleOffsetsY = expandThenBlend4<yMask>(minYi, maxYi);
}; // @llvm_func_end
// scalar sample values
uint32_t _xi[SWR_MAX_NUM_MULTISAMPLES];

View File

@@ -1133,6 +1133,64 @@ struct StoreRasterTile
}
}
}
//////////////////////////////////////////////////////////////////////////
/// @brief Resolves an 8x8 raster tile to the resolve destination surface.
/// @param pSrc - Pointer to raster tile.
/// @param pDstSurface - Destination surface state
/// @param x, y - Coordinates to raster tile.
/// @param sampleOffset - Offset between adjacent multisamples
INLINE static void Resolve(
uint8_t *pSrc,
SWR_SURFACE_STATE* pDstSurface,
uint32_t x, uint32_t y, uint32_t sampleOffset, uint32_t renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile.
{
uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U);
uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U);
float oneOverNumSamples = 1.0f / pDstSurface->numSamples;
// For each raster tile pixel (rx, ry)
for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry)
{
for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx)
{
// Perform bounds checking.
if (((x + rx) < lodWidth) &&
((y + ry) < lodHeight))
{
// Sum across samples
float resolveColor[4] = {0};
for (uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++)
{
float sampleColor[4] = {0};
uint8_t *pSampleSrc = pSrc + sampleOffset * sampleNum;
GetSwizzledSrcColor(pSampleSrc, rx, ry, sampleColor);
resolveColor[0] += sampleColor[0];
resolveColor[1] += sampleColor[1];
resolveColor[2] += sampleColor[2];
resolveColor[3] += sampleColor[3];
}
// Divide by numSamples to average
resolveColor[0] *= oneOverNumSamples;
resolveColor[1] *= oneOverNumSamples;
resolveColor[2] *= oneOverNumSamples;
resolveColor[3] *= oneOverNumSamples;
// Use the resolve surface state
SWR_SURFACE_STATE* pResolveSurface = (SWR_SURFACE_STATE*)pDstSurface->pAuxBaseAddress;
uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress<false, false>((x + rx), (y + ry),
pResolveSurface->arrayIndex + renderTargetArrayIndex, pResolveSurface->arrayIndex + renderTargetArrayIndex,
0, pResolveSurface->lod, pResolveSurface);
{
ConvertPixelFromFloat<DstFormat>(pDst, resolveColor);
}
}
}
}
}
};
template<typename TTraits, SWR_FORMAT SrcFormat, SWR_FORMAT DstFormat>
@@ -2316,6 +2374,9 @@ struct StoreMacroTile
pfnStore[sampleNum] = (bForceGeneric || KNOB_USE_GENERIC_STORETILE) ? StoreRasterTile<TTraits, SrcFormat, DstFormat>::Store : OptStoreRasterTile<TTraits, SrcFormat, DstFormat>::Store;
}
// Save original for pSrcHotTile resolve.
uint8_t *pResolveSrcHotTile = pSrcHotTile;
// Store each raster tile from the hot tile to the destination surface.
for(uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM)
{
@@ -2328,6 +2389,20 @@ struct StoreMacroTile
}
}
}
if (pDstSurface->pAuxBaseAddress)
{
uint32_t sampleOffset = KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits<SrcFormat>::bpp / 8);
// Store each raster tile from the hot tile to the destination surface.
for(uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM)
{
for(uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM)
{
StoreRasterTile<TTraits, SrcFormat, DstFormat>::Resolve(pResolveSrcHotTile, pDstSurface, (x + col), (y + row), sampleOffset, renderTargetArrayIndex);
pResolveSrcHotTile += sampleOffset * pDstSurface->numSamples;
}
}
}
}
};

View File

@@ -267,65 +267,6 @@ swr_resource_copy(struct pipe_context *pipe,
}
/* XXX: This resolve is incomplete and suboptimal. It will be removed once the
* pipelined resolve blit works. */
void
swr_do_msaa_resolve(struct pipe_resource *src_resource,
struct pipe_resource *dst_resource)
{
/* This is a pretty dumb inline resolve. It only supports 8-bit formats
* (ex RGBA8/BGRA8) - which are most common display formats anyway.
*/
/* quick check for 8-bit and number of components */
uint8_t bits_per_component =
util_format_get_component_bits(src_resource->format,
UTIL_FORMAT_COLORSPACE_RGB, 0);
/* Unsupported resolve format */
assert(src_resource->format == dst_resource->format);
assert(bits_per_component == 8);
if ((src_resource->format != dst_resource->format) ||
(bits_per_component != 8)) {
return;
}
uint8_t src_num_comps = util_format_get_nr_components(src_resource->format);
SWR_SURFACE_STATE *src_surface = &swr_resource(src_resource)->swr;
SWR_SURFACE_STATE *dst_surface = &swr_resource(dst_resource)->swr;
uint32_t *src, *dst, offset;
uint32_t num_samples = src_surface->numSamples;
float recip_num_samples = 1.0f / num_samples;
for (uint32_t y = 0; y < src_surface->height; y++) {
for (uint32_t x = 0; x < src_surface->width; x++) {
float r = 0.0f;
float g = 0.0f;
float b = 0.0f;
float a = 0.0f;
for (uint32_t sampleNum = 0; sampleNum < num_samples; sampleNum++) {
offset = ComputeSurfaceOffset<false>(x, y, 0, 0, sampleNum, 0, src_surface);
src = (uint32_t *) src_surface->pBaseAddress + offset/src_num_comps;
const uint32_t sample = *src;
r += (float)((sample >> 24) & 0xff) / 255.0f * recip_num_samples;
g += (float)((sample >> 16) & 0xff) / 255.0f * recip_num_samples;
b += (float)((sample >> 8) & 0xff) / 255.0f * recip_num_samples;
a += (float)((sample ) & 0xff) / 255.0f * recip_num_samples;
}
uint32_t result = 0;
result = ((uint8_t)(r * 255.0f) & 0xff) << 24;
result |= ((uint8_t)(g * 255.0f) & 0xff) << 16;
result |= ((uint8_t)(b * 255.0f) & 0xff) << 8;
result |= ((uint8_t)(a * 255.0f) & 0xff);
offset = ComputeSurfaceOffset<false>(x, y, 0, 0, 0, 0, src_surface);
dst = (uint32_t *) dst_surface->pBaseAddress + offset/src_num_comps;
*dst = result;
}
}
}
static void
swr_blit(struct pipe_context *pipe, const struct pipe_blit_info *blit_info)
{
@@ -342,28 +283,14 @@ swr_blit(struct pipe_context *pipe, const struct pipe_blit_info *blit_info)
debug_printf("swr_blit: color resolve : %d -> %d\n",
info.src.resource->nr_samples, info.dst.resource->nr_samples);
/* Because the resolve is being done inline (not pipelined),
* resources need to be stored out of hottiles and the pipeline empty.
*
* Resources are marked unused following fence finish because all
* pipeline operations are complete. Validation of the blit will mark
* them are read/write again.
*/
/* Resolve is done as part of the surface store. */
swr_store_dirty_resource(pipe, info.src.resource, SWR_TILE_RESOLVED);
swr_store_dirty_resource(pipe, info.dst.resource, SWR_TILE_RESOLVED);
swr_fence_finish(pipe->screen, NULL, swr_screen(pipe->screen)->flush_fence, 0);
swr_resource_unused(info.src.resource);
swr_resource_unused(info.dst.resource);
struct pipe_resource *src_resource = info.src.resource;
struct pipe_resource *resolve_target =
swr_resource(src_resource)->resolve_target;
/* Inline resolve samples into resolve target resource, then continue
* the blit. */
swr_do_msaa_resolve(src_resource, resolve_target);
/* The resolve target becomes the new source for the blit. */
/* The resolve target becomes the new source for the blit. */
info.src.resource = resolve_target;
}

View File

@@ -891,6 +891,10 @@ swr_create_resolve_resource(struct pipe_screen *_screen,
/* Attach it to the multisample resource */
msaa_res->resolve_target = alt;
/* Hang resolve surface state off the multisample surface state to so
* StoreTiles knows where to resolve the surface. */
msaa_res->swr.pAuxBaseAddress = (uint8_t *)&swr_resource(alt)->swr;
}
return true; /* success */
@@ -1009,14 +1013,10 @@ swr_flush_frontbuffer(struct pipe_screen *p_screen,
SwrEndFrame(swr_context(pipe)->swrContext);
}
/* Multisample surfaces need to be resolved before present */
/* Multisample resolved into resolve_target at flush with store_resource */
if (pipe && spr->swr.numSamples > 1) {
struct pipe_resource *resolve_target = spr->resolve_target;
/* Do an inline surface resolve into the resolve target resource
* XXX: This works, just not optimal. Work on using a pipelined blit. */
swr_do_msaa_resolve(resource, resolve_target);
/* Once resolved, copy into display target */
SWR_SURFACE_STATE *resolve = &swr_resource(resolve_target)->swr;

View File

@@ -165,7 +165,8 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
prsc->width0 == box->width &&
prsc->height0 == box->height &&
prsc->depth0 == box->depth &&
prsc->array_size == 1) {
prsc->array_size == 1 &&
rsc->bo->private) {
usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
}

View File

@@ -61,7 +61,7 @@ static void
vc4_load_utile(void *cpu, void *gpu, uint32_t cpu_stride, uint32_t cpp)
{
uint32_t gpu_stride = vc4_utile_stride(cpp);
#if defined(VC4_BUILD_NEON) && defined(__ARM_ARCH)
#if defined(VC4_BUILD_NEON) && defined(PIPE_ARCH_ARM)
if (gpu_stride == 8) {
__asm__ volatile (
/* Load from the GPU in one shot, no interleave, to
@@ -118,7 +118,7 @@ vc4_store_utile(void *gpu, void *cpu, uint32_t cpu_stride, uint32_t cpp)
{
uint32_t gpu_stride = vc4_utile_stride(cpp);
#if defined(VC4_BUILD_NEON) && defined(__ARM_ARCH)
#if defined(VC4_BUILD_NEON) && defined(PIPE_ARCH_ARM)
if (gpu_stride == 8) {
__asm__ volatile (
/* Load each 8-byte line from cpu-side source,

View File

@@ -49,7 +49,7 @@ namespace clover {
build_module_library(const ::llvm::Module &mod,
enum module::section::type section_type);
std::unique_ptr<::llvm::Module>
std::unique_ptr< ::llvm::Module>
parse_module_library(const module &m, ::llvm::LLVMContext &ctx,
std::string &r_log);

View File

@@ -94,7 +94,7 @@ clover::llvm::build_module_library(const ::llvm::Module &mod,
return m;
}
std::unique_ptr<::llvm::Module>
std::unique_ptr< ::llvm::Module>
clover::llvm::parse_module_library(const module &m, ::llvm::LLVMContext &ctx,
std::string &r_log) {
auto mod = ::llvm::parseBitcodeFile(::llvm::MemoryBufferRef(
@@ -104,5 +104,5 @@ clover::llvm::parse_module_library(const module &m, ::llvm::LLVMContext &ctx,
fail(r_log, error(CL_INVALID_PROGRAM), s);
});
return std::unique_ptr<::llvm::Module>(std::move(*mod));
return std::unique_ptr< ::llvm::Module>(std::move(*mod));
}

View File

@@ -121,12 +121,12 @@ namespace {
} else {
// Other types.
const auto actual_type =
isa<::llvm::PointerType>(arg_type) && arg.hasByValAttr() ?
cast<::llvm::PointerType>(arg_type)->getElementType() : arg_type;
isa< ::llvm::PointerType>(arg_type) && arg.hasByValAttr() ?
cast< ::llvm::PointerType>(arg_type)->getElementType() : arg_type;
if (actual_type->isPointerTy()) {
const unsigned address_space =
cast<::llvm::PointerType>(actual_type)->getAddressSpace();
cast< ::llvm::PointerType>(actual_type)->getAddressSpace();
if (address_space == address_spaces[clang::LangAS::opencl_local
- compat::lang_as_offset]) {

View File

@@ -156,7 +156,7 @@ clover::llvm::print_module_native(const ::llvm::Module &mod,
const target &target) {
std::string log;
try {
std::unique_ptr<::llvm::Module> cmod { CloneModule(&mod) };
std::unique_ptr< ::llvm::Module> cmod { CloneModule(&mod) };
return as_string(emit_code(*cmod, target,
TargetMachine::CGFT_AssemblyFile, log));
} catch (...) {

View File

@@ -132,18 +132,18 @@ namespace clover {
#endif
}
inline std::unique_ptr<::llvm::Linker>
inline std::unique_ptr< ::llvm::Linker>
create_linker(::llvm::Module &mod) {
#if HAVE_LLVM >= 0x0308
return std::unique_ptr<::llvm::Linker>(new ::llvm::Linker(mod));
return std::unique_ptr< ::llvm::Linker>(new ::llvm::Linker(mod));
#else
return std::unique_ptr<::llvm::Linker>(new ::llvm::Linker(&mod));
return std::unique_ptr< ::llvm::Linker>(new ::llvm::Linker(&mod));
#endif
}
inline bool
link_in_module(::llvm::Linker &linker,
std::unique_ptr<::llvm::Module> mod) {
std::unique_ptr< ::llvm::Module> mod) {
#if HAVE_LLVM >= 0x0308
return linker.linkInModule(std::move(mod));
#else

View File

@@ -51,7 +51,7 @@ namespace clover {
is_kernel_node_for(const ::llvm::Function &f) {
return [&](const ::llvm::MDNode *n) {
using ::llvm::mdconst::dyn_extract;
return &f == dyn_extract<::llvm::Function>(n->getOperand(0));
return &f == dyn_extract< ::llvm::Function>(n->getOperand(0));
};
}
@@ -65,7 +65,7 @@ namespace clover {
#endif
}
inline iterator_range<::llvm::MDNode::op_iterator>
inline iterator_range< ::llvm::MDNode::op_iterator>
get_kernel_metadata_operands(const ::llvm::Function &f,
const std::string &name) {
#if HAVE_LLVM >= 0x0309
@@ -79,11 +79,11 @@ namespace clover {
const auto kernel_node = find(is_kernel_node_for(f),
get_kernel_nodes(*f.getParent()));
const auto data_node = cast<::llvm::MDNode>(
const auto data_node = cast< ::llvm::MDNode>(
find([&](const ::llvm::MDOperand &op) {
if (auto m = dyn_cast<::llvm::MDNode>(op))
if (auto m = dyn_cast< ::llvm::MDNode>(op))
if (m->getNumOperands())
if (auto m_name = dyn_cast<::llvm::MDString>(
if (auto m_name = dyn_cast< ::llvm::MDString>(
m->getOperand(0).get()))
return m_name->getString() == name;
@@ -106,7 +106,7 @@ namespace clover {
get_argument_metadata(const ::llvm::Function &f,
const ::llvm::Argument &arg,
const std::string &name) {
return ::llvm::cast<::llvm::MDString>(
return ::llvm::cast< ::llvm::MDString>(
detail::get_kernel_metadata_operands(f, name)[arg.getArgNo()])
->getString();
}

View File

@@ -27,6 +27,7 @@ AM_CFLAGS = \
$(GALLIUM_CFLAGS) \
$(VISIBILITY_CFLAGS) \
$(VL_CFLAGS) \
$(XCB_DRI3_CFLAGS) \
$(OMX_CFLAGS)
noinst_LTLIBRARIES = libomxtracker.la

View File

@@ -35,7 +35,13 @@
#include <string.h>
#include <stdbool.h>
#if defined(HAVE_X11_PLATFORM)
#include <X11/Xlib.h>
#else
#define XOpenDisplay(x) NULL
#define XCloseDisplay(x)
#define Display void
#endif
#include "os/os_thread.h"
#include "util/u_memory.h"

View File

@@ -34,8 +34,6 @@
#ifndef OMX_VID_DEC_H
#define OMX_VID_DEC_H
#include <X11/Xlib.h>
#include <string.h>
#include <OMX_Types.h>

View File

@@ -27,6 +27,7 @@ AM_CFLAGS = \
$(GALLIUM_CFLAGS) \
$(VISIBILITY_CFLAGS) \
$(VL_CFLAGS) \
$(XCB_DRI3_CFLAGS) \
$(VA_CFLAGS) \
-DVA_DRIVER_INIT_FUNC="__vaDriverInit_$(VA_MAJOR)_$(VA_MINOR)"

View File

@@ -118,9 +118,7 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx)
return VA_STATUS_ERROR_UNIMPLEMENTED;
case VA_DISPLAY_GLX:
case VA_DISPLAY_X11:
#if defined(HAVE_DRI3)
drv->vscreen = vl_dri3_screen_create(ctx->native_dpy, ctx->x11_screen);
#endif
if (!drv->vscreen)
drv->vscreen = vl_dri2_screen_create(ctx->native_dpy, ctx->x11_screen);
if (!drv->vscreen)
@@ -139,8 +137,8 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx)
drv->vscreen = vl_drm_screen_create(drm_info->fd);
if (!drv->vscreen)
goto error_screen;
}
break;
}
default:
FREE(drv);
return VA_STATUS_ERROR_INVALID_DISPLAY;

View File

@@ -30,6 +30,7 @@ AM_CFLAGS = \
$(GALLIUM_CFLAGS) \
$(VISIBILITY_CFLAGS) \
$(VL_CFLAGS) \
$(XCB_DRI3_CFLAGS) \
$(VDPAU_CFLAGS)
AM_CPPFLAGS = \
-I$(top_srcdir)/include \

View File

@@ -63,9 +63,7 @@ vdp_imp_device_create_x11(Display *display, int screen, VdpDevice *device,
pipe_reference_init(&dev->reference, 1);
#if defined(HAVE_DRI3)
dev->vscreen = vl_dri3_screen_create(display, screen);
#endif
if (!dev->vscreen)
dev->vscreen = vl_dri2_screen_create(display, screen);
if (!dev->vscreen) {

View File

@@ -27,6 +27,7 @@ AM_CFLAGS = \
$(GALLIUM_CFLAGS) \
$(VISIBILITY_CFLAGS) \
$(VL_CFLAGS) \
$(XCB_DRI3_CFLAGS) \
$(XVMC_CFLAGS)
noinst_LTLIBRARIES = libxvmctracker.la
@@ -45,7 +46,7 @@ noinst_PROGRAMS = \
noinst_HEADERS = tests/testlib.h
TEST_LIBS = $(XVMC_LIBS) -lXvMCW $(VL_LIBS)
TEST_LIBS = $(XVMC_LIBS) -lXvMCW $(VL_LIBS) $(XCB_DRI3_LIBS)
tests_test_context_SOURCES = tests/test_context.c tests/testlib.c
tests_test_context_LDADD = $(TEST_LIBS)
tests_test_surface_SOURCES = tests/test_surface.c tests/testlib.c

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