Commit Graph

204305 Commits

Author SHA1 Message Date
Mike Blumenkrantz
6b6cb825e9 meson: deprecate gallium-nine
this is not maintained and will be removed in a future version

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34216>
2025-04-09 23:16:41 +00:00
Paulo Zanoni
fdbdfaed01 anv: add ANV_SYS_MEM_LIMIT for debugging system memory restrictions
If you suspect a workload is failing because it needs more memory, you
can set ANV_SYS_MEM_LIMIT=100 to give it all the memory available.
This could make, for example, certain games start working (it really
depends on how much RAM you have and how much the game wants).

If you suspect a workload is too resource hungry, you can try to limit
it with ANV_SYS_MEM_LIMIT=30 (or some other value) to see if it can
deal with the more restricted environment and behave accordingly.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28513>
2025-04-09 22:48:18 +00:00
Paulo Zanoni
ec4b2ce664 anv: restore the old behavior of up to 75% of RAM for the system heap
"We paid for sixteen gigs of RAM, so we gonna use the whole damn
   sixteen gigs of RAM!"
     - My Mom

First, some history:

The Anv 50%-or-75% rule was originally added in 2017 by 060a6434ec
("anv: Advertise larger heap sizes"). When i915.ko started reporting
memory sizes in its ioctls, it didn't impose any restrictions: 100% of
SRAM was reported as available, so the restriction was in Mesa. When
xe.ko was introduced, it only reported 50% of the SRAM as available
through its ioctls, so commit b571ae6e7a ("intel: Make memory heaps
consistent between KMDs") adapted the code to not take an extra 25% of
the 50% that was already cut, and restricted i915.ko to 50% instead of
the 50%-or-75%. In Kernel commit d2d5f6d57884 ("drm/xe: Increase the
XE_PL_TT watermark"), xe.ko changed to reporting 100% of SRAM through
its ioctls, so we adapted Mesa to do the right thing depending on
which Kernel version was running.

While this was all happening, we were discussing about which behavior
was actually the best: restrict everything to 50% in order to avoid
issues when many things are running in parallel, or keep the
restriction only at 75% in order to allow high demanding workloads to
make full use of the hardware.

The way I see, if parallel applications are causing the system to run
out of resources, the user always has the option to kill applications
and use one thing at a time. On the other hand, if a single
application needs more than 50% of the SRAM and we don't allow it in
our heaps, the application will never work (unless, of course, the
user patches Mesa). So in this commit we go back to allowing
high-demanding applications to work by restoring the 50%-or-75% rule.

This commit is especially useful in systems with integrated graphics,
like LNL, where the option to upgrade RAM is not present.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28513>
2025-04-09 22:48:18 +00:00
Paulo Zanoni
02e896bc49 anv/xe: detect the newer xe.ko memory reporting model and act accordingly
Kernel commit d2d5f6d57884 ("drm/xe: Increase the XE_PL_TT watermark")
changed how xe.ko reportes memory: its ioctls now report 100% of the
system RAM as available. Since our policy is to report 50% of the SRAM
as available for the heaps, add some code to check the amount reported
by xe.ko against the amount reported by the system, then act
accordingly.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28513>
2025-04-09 22:48:18 +00:00
Paulo Zanoni
3db8931d4a intel/i915: restrict the RAM size restrictions to Anv
Before commit b571ae6e7a ("intel: Make memory heaps consistent
between KMDs"), we had the following policy for reporting Sytem RAM
memory sizes:

- For OpenGL, we reported the total available RAM.
- For Vulkan, we reported the total available RAM as:
  - 50% of the total RAM if the total RAM was <= 4GB,
  - 75% otherwise
  - In addition, the Memory Budget (for VK_EXT_memory_budget) is 90%
    of the "free" memory, which can be an extra 10% off of the 50% or
    75%.

When xe.ko was added, one key difference was noted: while i915.ko
reported the "real" RAM memory sizes in its ioctls, xe.ko reported
only 50% of the system RAM as available. Because of that (and other
reasons, see this discussion on MR 28513), commit b571ae6e7a decided
to unify the behavior by changing the Anv i915.ko rule to "always 50%"
instead of "50% or 75%". This also changed the Iris rule to 50%
instead of 100%.

In my research, I couldn't find any reason why this restriction should
also apply to Iris, so here we revert back to handling these size
restrictions on Anv only.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28513>
2025-04-09 22:48:18 +00:00
Ian Romanick
cb69d019cf brw/nir: Use offset() for all uses of offs in emit_pixel_interpolater_alu_at_offset
This is necessary to appropriately uniformize the first component
access of a convergent vector. Without this, this is produced:

    load_payload(16) %18:D, 0d, 0d NoMask group0
    add(32) %21:F, %18+0.0:F, 0.5f
    add(32) %22:F, %18+2.0<0>:F, 0.5f

This is the correct code:

    load_payload(16) %18:D, 0d, 0d NoMask group0
    add(32) %21:F, %18+0.0<0>:F, 0.5f
    add(32) %22:F, %18+2.0<0>:F, 0.5f

Without 38b58e286f, the code generated was more incorrect, but happened
to work for this test case:

    load_payload(16) %18:D, 0d, 0d NoMask group0
    add(32) %21:F, %18+0.0<0>:F, 0.5f
    add(32) %22:F, %18+0.4<0>:F, 0.5f

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 38b58e286f ("brw/nir: Fix source handling of nir_intrinsic_load_barycentric_at_offset")
Closes: #12969
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34427>
2025-04-09 22:21:18 +00:00
Dave Airlie
b5d1b0d7e3 nvk: update nvidia class header files.
This adds Ada/Hopper compute headers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34440>
2025-04-09 22:03:18 +00:00
Caleb Callaway
64b5ee3001 intel/tools: fix 32b build for EU stall tool
Fixes: 610ad8d3 ("intel/tools: create intel_monitor for sampling eu stalls")

Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34439>
2025-04-09 21:40:46 +00:00
Benjamin Lee
fdf43f9152 panfrost: add core mask driconf options
These options are equivalent to the corresponding panvk options.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34374>
2025-04-09 21:09:20 +00:00
Benjamin Lee
e8cc44f4bd panvk: add core mask driconf options
These can be used to pin an application to specific cores. A tiler mask
option is not included because there is no current hardware that
includes more than one tiler.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34374>
2025-04-09 21:09:20 +00:00
Benjamin Lee
d46e76be02 driconf: add uint64 type
This is needed for panvk, where we want to expose uint64 core masks. The
previous int parsing logic was technically UB rather than guaranteed
truncate-on-overflow, but was likely compiled to truncate in practice.
It is very unlikely that anyone was relying on this.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34374>
2025-04-09 21:09:20 +00:00
Alyssa Rosenzweig
141f0ef4e4 asahi: fix i/a queries with tess
fixes new CTS additions to KHR-GL46.pipeline_statistics_query_tests_ARB.functional_tess_queries

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984>
2025-04-09 20:25:50 +00:00
Alyssa Rosenzweig
27d2bd5925 gallium: wire up asahi driver
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984>
2025-04-09 20:25:50 +00:00
Alyssa Rosenzweig
1a76310fb7 asahi: remove unstable uapi header
now unused.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984>
2025-04-09 20:25:50 +00:00
Alyssa Rosenzweig
c64a2bbff5 asahi: port to stable uAPI
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984>
2025-04-09 20:25:49 +00:00
Alyssa Rosenzweig
3e110005a6 asahi: disable virtio gpu for upstream
until the wire protocol is stable.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984>
2025-04-09 20:25:49 +00:00
Alyssa Rosenzweig
2db1ae16f3 drm-uapi: add asahi uapi
from drm-misc-next:
https://cgit.freedesktop.org/drm-misc/commit/?id=12a2bf6765c2a61eb7f20870452bb915eb28fdcc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984>
2025-04-09 20:25:49 +00:00
Caio Oliveira
7457c4ecfd brw: Make brw_range use half-open ranges
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira
6509f8139d brw: Use brw_range::last() to explicit get the last valid IP
This is a preparation to change what is stored in brw_range::end.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira
596bbb2c95 brw: Use brw_range to store Vars ranges
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira
0b4a3c0ff6 brw: Use brw_range to store VGRF ranges
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira
e644b42e59 brw: Use brw_range when operating with live ranges
Makes the intention of some comparisons clearer by using the named
helper functions.  Add commentary when the straightforward range is not
the one used, e.g. VGRF interference.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira
f56a5cf1eb brw: Use brw_range in IP ranges analysis
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira
fb50461220 brw: Add brw_range struct
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:48 +00:00
Caio Oliveira
8d9155e34d brw: Clean up saturate propagation after non-defs version removal
Remove now unused analysis and no need to walk blocks in reverse
after the non-defs version of the pass was removed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:48 +00:00
Caio Oliveira
cfc4067b0e brw: Add a few basic tests for register coalesce
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:48 +00:00
Patrick Lerda
22c399320b i915: fix i915_set_vertex_buffers() related refcnt imbalance and remove redundancies
Indeed, this resource was assigned twice and was not properly freed.

For instance, this issue is triggered with:
"piglit/bin/glsl-fs-pointcoord -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 0278d1fa32 ("gallium: add unbind_num_trailing_slots to set_vertex_buffers")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27572>
2025-04-09 18:47:33 +00:00
Bo Hu
0d3355e41b gfxstream: update code generator for simplified dep graph
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Serdar Kocdemir
6cd7b4953c gfxstream: Wrap vkEnumerateInstanceExtensionProperties for host
Due to AMD driver issues on linux, we need to serialize
multithreaded calls.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Serdar Kocdemir
c46e8ca4e6 gfxstream: Add dispatcher validity checks
Add conditioning before making driver calls to be
able to workaround some of the fatal errors, such
as unboxing issues during or after snapshot load.
This enables invalidating a host dispatcher based
on the application state. A default error will be
returned for vulkan calls.

Builtin expectation function is used to reduce
performance cost of the checks.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Jeongik Cha
284a1d5cb6 gfxstream: Add AHARDWAREBUFFER_FORMAT_B8G8R8A8_UNORM in android_format_is_yuv
To avoid warning message, I added that.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Jason Macnak
11bec23bba gfxstream: Remove extra dispatch variable
... to addresss variable shadowing warnings and handle the 2 global
commands that do not require a dispatch.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Jason Macnak
e458641516 gfxstream: Update variable names to avoid -Wshadow error
... as vkCmdUpdateBuffer() uses these param names.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Serdar Kocdemir
425fe5edf8 gfxstream: wrap semaphore functions on the host
Codegen changes to be able to alter the behavior of vkSignalSemaphores
and vkWaitSemaphores calls on the host side.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Serdar Kocdemir
af8b08281b gfxstream: track pipeline layouts on decoder
Track pipeline layout creation and destroy calls
to cleanup them correctly on device teardown.

Pipeline layouts require delayed delete operations for
VulkanQueueSubmitWithCommands feature which modifies order
of commands and they need to stay valid during recording.

Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34418>
2025-04-09 18:29:57 +00:00
Caio Oliveira
b148f57dad spirv: Take a separate data_type when creating a new vtn_variable
This will be useful for untyped pointers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34436>
2025-04-09 16:33:03 +00:00
Faith Ekstrand
18b2bef45a nak: Add a NAK_DEBUG=panic option
This tells it to actually panic instead of unwinding and returning NULL.
I find myself commenting out the unwind code pretty frequently so I can
get GDB to break at the panic.  This should help avoid that extra debug
step.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34435>
2025-04-09 16:14:00 +00:00
Tapani Pälli
0750c4c5f1 intel/dev: update mesa_defs.json from internal database
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34430>
2025-04-09 15:44:22 +00:00
Faith Ekstrand
4d1399629b nak: Allow predicates in nir_intrinsic_as_uniform
As of 76e542e92a ("nak: Add nak_nir_mark_lcssa_invariants"), we can
now get predicates as inputs to as_uniform.  We can't assume the result
will always be a UGPR.

Fixes: 76e542e92a ("nak: Add nak_nir_mark_lcssa_invariants")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12970
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34434>
2025-04-09 15:26:35 +00:00
Natalie Vock
916d7277c0 radv/ci: Test FP16 for GFX8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34114>
2025-04-09 14:21:37 +00:00
Natalie Vock
f0f4ae1713 radv: Add radv_enable_float16_gfx8 drirc and enable for Indiana Jones TGC
This is a hard requirement from the game preventing it to start on GFX8.
Adding this allows playing it on GFX8.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34114>
2025-04-09 14:21:37 +00:00
Natalie Vock
e385cb1750 radv: Add radv_emulate_rt drirc and enable for Indiana Jones TGC
There have been various people successfully trying it out on GFX9-GFX10.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34114>
2025-04-09 14:21:37 +00:00
Natalie Vock
3d8db3cbbb aco: Make private_segment_buffer/scratch_offset per-resume
We need different Temps for each resume shader, because registers aren't
preserved across resume boundaries.

This was likely fine in practice because arg registers are the same for
each shader, but resulted in invalid IR and asserts.

Fixes crashes in Indiana Jones RT with assertions enabled on GFX8.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34114>
2025-04-09 14:21:37 +00:00
Lionel Landwerlin
76096d04bb anv: relax restriction on variable count descriptors
VUID-VkDescriptorSetAllocateInfo-pSetLayouts-09380 says that :

   "If pSetLayouts[i] was created with an element of pBindingFlags
   that includes VK_DESCRIPTOR_BINDING_VARIABLE_DESCRIPTOR_COUNT_BIT,
   and VkDescriptorSetVariableDescriptorCountAllocateInfo is included
   in the pNext chain, and
   VkDescriptorSetVariableDescriptorCountAllocateInfo::descriptorSetCount
   is not zero, then
   VkDescriptorSetVariableDescriptorCountAllocateInfo::pDescriptorCounts[i]
   must be less than or equal to
   VkDescriptorSetLayoutBinding::descriptorCount for the corresponding
   binding used to create pSetLayouts[i]"

But applications like are not following the spec. RADV doesn't apply
that limit and allocates if there is enough space in the pool. Let's
just do the same.

Note that this issue got resolved with a vkd3d-proton change :

a7ac1a7d2f

But since this change is deleting more code than it adds, might as
well go with it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12185
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32305>
2025-04-09 16:29:21 +03:00
K900
3d7bfcf984 meson: support building with system libgbm
This is the next step towards making libgbm just a loader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33890>
2025-04-09 12:15:33 +00:00
Natalie Vock
d1ff9e951a aco: Fix RT VGPR limit on Navi31/32, GFX11.5, GFX12
Since 128 is not a multiple of the VGPR allocation granule, we will
actually allocate 134 VGPRs. No reason not to use the extra 6.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34265>
2025-04-09 10:02:52 +00:00
Benjamin Lee
c0be0a845d panfrost/va: remove dead code for packing BRANCHZI.i16 lane mod
As of 839f15259a, we no longer use 'lane'
for BRANCHZI.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34416>
2025-04-09 07:39:23 +00:00
Alyssa Rosenzweig
3e82395306 bin: add rebase mode
when we need to apply trailers to a whole MR at once, it's convenient to
do something like `git rebase --exec "rb faith" origin/main`. This adds that
operation into the script itself, so that can be done with simply
`rb -r origin/main faith`.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34409>
2025-04-08 17:05:58 -04:00
Lionel Landwerlin
19e4dda9a2 brw: fix shuffle with scalar/uniform index
The fixes commit isn't actually the source of the bug but likely the
biggest enabler because it creates scalar values that more easily end
up in the shuffle operations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1b24612c57 ("brw/nir: Treat load_*_uniform_block_intel as convergent")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12927
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12688
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12570
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12905
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12734
Reviewed-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34393>
2025-04-08 20:14:11 +00:00
Felix DeGrood
610ad8d378 intel/tools: create intel_monitor for sampling eu stalls
Created stand alone tool for sampling gfx data on regular
intervals. Tool has inner loop that performs sampling every N
useconds. Press any key to end sampling. Results will be dumped
when intel_monitor exits.

First application of intel_monitor will be to collect eu stall
data. Perhaps more applications can be added at a later date.

How to use:
 0. Set sysctl dev.xe.observation_paranoid=0
 1. Clean shader cache and launch gfx INTEL_DEBUG=shaders-lineno.
    Redirect stderr to asm.txt.
 2. When gfx app ready to monitor, begin capturing eustall data by
    launching `intel_monitor -e > eustall.csv` in separate console.
 3  When done collected, close intel_monitor by pressing any key.
 4. Correlate eustall data in eustall.csv with shader instructions in
    asm.txt by matching instruction offsets. Use data to determine which
    instructions are stalling and why.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30142>
2025-04-08 19:39:53 +00:00