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Author SHA1 Message Date
Dylan Baker
f47f6d780a docs: Add sha256 sum for 23.2.1 2023-09-28 14:49:46 -07:00
Dylan Baker
0af5a5e428 docs: Update release calendar for 23.2.1 2023-09-28 14:49:46 -07:00
Dylan Baker
49a47f187e VERSION: update to 23.2.1 2023-09-28 14:11:25 -07:00
Dylan Baker
ddc41d4652 docs: add release notes for 23.2.1 2023-09-28 14:11:23 -07:00
Dylan Baker
844168b332 docs: truncate new_features.txt 2023-09-28 14:08:12 -07:00
Paulo Zanoni
0f28940fea iris: assert(bo->deps) after realloc()
Iris in general doesn't really like checking the return value of its
allocations, but in some places it does assert that those pointers are
non-NULL. We've recently investigated a bug that could have been
coming from a failed bo->deps realloc(), so add the assert() here to
help give us more confidence over things the next time we're debugging
issues.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
(cherry picked from commit 7c538b5ad8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25404>
2023-09-26 11:29:51 -04:00
Paulo Zanoni
2e4c04864a iris: avoid stack overflow in iris_bo_wait_syncobj()
Keep most cases using the stack as it's cheaper, but fall back to the
heap when the size gets too big.

This should fix a stack overflow reported by @rhezashan for a case
where we had lots of iris_screens.

Credits to Matt Turner and José Roberto de Souza for their work on
this issue, which led us to find its root cause.

Cc: mesa-stable
Reported-by: rheza shandikri (@rhezashan in gitlab)
Credits-to: José Roberto de Souza <jose.souza@intel.com>
Credits-to: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
(cherry picked from commit 3cec15dd14)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25404>
2023-09-26 11:29:36 -04:00
Paulo Zanoni
3a257694f6 iris: assert bufmgr->bo_deps_lock is held
This is the only place that touches bo->deps but does not explicitly
lock it and is not a setup/teardown function where locking won't help
anything.

I'm confident we won't hit this assertion, but I've recently had this
lock as the suspect of a bug and had to check the callers to see if we
could be calling from any unlocked place. Having the assert helps
increasing our confidence.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
(cherry picked from commit 762b9aad01)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25404>
2023-09-26 11:28:50 -04:00
Ian Romanick
3fd835f6fd intel/fs: Constant fold OR and AND
The path taken in fs_visitor::swizzle_nir_scratch_addr for DG2 generates
some AND and OR instructions before the SHL. This commit folds those so
the whold calculation becomes a constant (like on older platforms).

v2: Fix return type of src_as_uint. Noticed by Marcin.

shader-db results:

DG2
total instructions in shared programs: 23190475 -> 23179540 (-0.05%)
instructions in affected programs: 36026 -> 25091 (-30.35%)
helped: 7 / HURT: 0

total cycles in shared programs: 841196807 -> 841142563 (<.01%)
cycles in affected programs: 1660670 -> 1606426 (-3.27%)
helped: 7 / HURT: 0

No shader-db changes on any older Intel platforms.

fossil-db results:

DG2
Totals:
Instrs: 197780372 -> 197773966 (-0.00%)
Cycles: 14066410782 -> 14066399378 (-0.00%); split: -0.00%, +0.00%
Subgroup size: 8438104 -> 8438112 (+0.00%)
Send messages: 8049445 -> 8049446 (+0.00%)
Scratch Memory Size: 14263296 -> 14264320 (+0.01%)

Totals from 9 (0.00% of 668055) affected shaders:
Instrs: 24547 -> 18141 (-26.10%)
Cycles: 1984791 -> 1973387 (-0.57%); split: -0.98%, +0.40%
Subgroup size: 88 -> 96 (+9.09%)
Send messages: 867 -> 868 (+0.12%)
Scratch Memory Size: 69632 -> 70656 (+1.47%)

No fossil-db changes on any older Intel platforms.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit cb0de0a1d3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Ian Romanick
41fe60cf3e intel/fs: Constant fold SHL
This is a modified version of a commit originally in !7698. This version
add the changes to brw_fs_copy_propagation. If the address passed to
fs_visitor::swizzle_nir_scratch_addr is a constant, that function will
generate SHL with two constant sources.

DG2 uses a different path to generate those addresses, so the constant
folding can't occur there yet. That will be addressed in the next
commit.

What follows is the commit change history from that older MR.

v2: Previously this commit was after `intel/fs: Combine constants for
integer instructions too`.  However, this commit can create invalid
instructions that are only cleaned up by `intel/fs: Combine constants
for integer instructions too`.  That would potentially affect the
shader-db results of each commit, but I did not collect new data for
the reordering.

v3: Fix masking for W/UW and for Q/UQ types. Add an assertion for
!saturate. Both suggested by Ken. Also add an assertion that B/UB types
don't matically come back.

v4: Fix sources count. See also ed3c2f73db ("intel/fs: fixup sources
number from opt_algebraic").

v5: Fix typo in comment added in v3. Noticed by Marcin. Fix a typo in a
comment added when pulling this commit out of !7698. Noticed by Ken.

shader-db results:

DG2
No changes.

Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
total instructions in shared programs: 20655696 -> 20651648 (-0.02%)
instructions in affected programs: 23125 -> 19077 (-17.50%)
helped: 7 / HURT: 0

total cycles in shared programs: 858436639 -> 858407749 (<.01%)
cycles in affected programs: 8990532 -> 8961642 (-0.32%)
helped: 7 / HURT: 0

Broadwell and Haswell had similar results. (Broadwell shown)
total instructions in shared programs: 18500780 -> 18496630 (-0.02%)
instructions in affected programs: 24715 -> 20565 (-16.79%)
helped: 7 / HURT: 0

total cycles in shared programs: 946100660 -> 946087688 (<.01%)
cycles in affected programs: 5838252 -> 5825280 (-0.22%)
helped: 7 / HURT: 0

total spills in shared programs: 17588 -> 17572 (-0.09%)
spills in affected programs: 1206 -> 1190 (-1.33%)
helped: 2 / HURT: 0

total fills in shared programs: 25192 -> 25156 (-0.14%)
fills in affected programs: 156 -> 120 (-23.08%)
helped: 2 / HURT: 0

No shader-db changes on any older Intel platforms.

fossil-db results:

DG2
Totals:
Instrs: 197780415 -> 197780372 (-0.00%); split: -0.00%, +0.00%
Cycles: 14066412266 -> 14066410782 (-0.00%); split: -0.00%, +0.00%

Totals from 16 (0.00% of 668055) affected shaders:
Instrs: 16420 -> 16377 (-0.26%); split: -0.43%, +0.17%
Cycles: 220133 -> 218649 (-0.67%); split: -0.69%, +0.01%

Tiger Lake, Ice Lake and Skylake had similar results. (Ice Lake shown)
Totals:
Instrs: 153425977 -> 153423678 (-0.00%)
Cycles: 14747928947 -> 14747929547 (+0.00%); split: -0.00%, +0.00%
Subgroup size: 8535968 -> 8535976 (+0.00%)
Send messages: 7697606 -> 7697607 (+0.00%)
Scratch Memory Size: 4380672 -> 4381696 (+0.02%)

Totals from 6 (0.00% of 662749) affected shaders:
Instrs: 13893 -> 11594 (-16.55%)
Cycles: 5386074 -> 5386674 (+0.01%); split: -0.42%, +0.43%
Subgroup size: 80 -> 88 (+10.00%)
Send messages: 675 -> 676 (+0.15%)
Scratch Memory Size: 91136 -> 92160 (+1.12%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 61c786bad5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Ian Romanick
201782d0fa intel/fs: Always do opt_algebraic after opt_copy_propagation makes progress
opt_copy_propagation can create invalid instructions like

    shl(8) vgrf96:UD, 2d, 8u

These instructions will be cleaned up by opt_algebraic.  The irony is
opt_algebraic converts these to simple mov instructions that
opt_copy_propagation should clean up.  I don't think we want a loop like

   do {
      progress = false;
      if (OPT(opt_copy_propagation)) {
         OPT(opt_algebraic);
         OPT(dead_code_eliminate);
      }
   } while (progress);

But maybe we do?

Maybe this would be sufficient:

   while (OPT(opt_copy_propagation))
      OPT(opt_algebraic);
   OPT(dead_code_eliminate);

No shader-db or fossil-db changes (yet) on any Intel platform.  This is
expected.

v2: Do opt_algebraic immediately after every call to
opt_copy_propagation instead of being clever. Suggested by Lionel.

Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 56e6186dcf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Matt Turner
6395f22216 Revert "intel/fs: only avoid SIMD32 if strictly inferior in throughput"
This reverts commit 6b494745be.

The logic is not entirely correct: the comparison is between two
static-analysis estimates of a dynamic system with variables that aren't
captured by the shader source, so using ">" will always have greater potential
to cause regressions whenever the performance difference between the two builds
is something not captured by the static model, no matter how much the model is
improved.

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9262
(cherry picked from commit d142c845d0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Lionel Landwerlin
a2005ce2e3 iris: ensure stalling pipe control before fast clear
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 87149cc545 ("blorp: update and move fast clear PIPE_CONTROLs to drivers")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit aebe584586)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Lionel Landwerlin
4788aec2f3 blorp: update and move fast clear PIPE_CONTROLs to drivers
Before this patch, when updating the indirect clear color, BLORP only
invalidated the texture cache on gfx11. The hardware docs state that
the texture cache invalidation is also needed on gfx12 however. Add
this invalidation for gfx12 and move the fast-clear related cache
invalidations to the drivers for clarity and performance.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5850
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 87149cc545)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Lionel Landwerlin
efe981f50e blorp: switch blorp_update_clear_color to early return
Avoid even going to the function if we don't need to.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit c94bd56114)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25377>
2023-09-25 21:13:53 +00:00
Dylan Baker
42cef07fb0 zink/ci: mark unexpcted pass as expected 2023-09-25 12:59:24 -07:00
Rhys Perry
265a822e9d aco: reset prefetch in the correct block after removing the exit
fossil-db (navi31):
Totals from 279 (0.35% of 79332) affected shaders:
(no stat changes)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: c778803d67 ("aco/assembler: change prefetch mode on GFX10.3+ during loops if beneficial")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25312>
(cherry picked from commit 21db2e7017)
2023-09-25 11:27:12 -07:00
Lionel Landwerlin
94d14d477f intel: don't assume Linux minor dev node
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>
(cherry picked from commit a851dc5e3c)
2023-09-25 11:27:11 -07:00
Lionel Landwerlin
739d44b0fc anv: fix utrace timestamp buffer copies
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>
(cherry picked from commit e0f420c334)
2023-09-25 11:27:10 -07:00
David Rosca
8d5d8757e1 frontends/va: Set default rate control values once when creating encoder
Move setting the default values from getEncParamPresetH264/5 as this
function is called on each frame which would result in overwriting
values set by application.

This fixes setting HRD parameters and max_qp/min_qp when
PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL is not supported.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25355>
(cherry picked from commit dd2ef9a0e4)
2023-09-25 11:27:10 -07:00
David Rosca
136be4a64d frontends/va: Process VAEncSequenceParameterBufferType first in vaRenderPicture
The encoder is created in handleVAEncSequenceParameterBufferType and it
also sets some default parameters, so we need to make sure to handle
this buffer first because application may have already set those
parameters from earlier buffers.

This fixes setting HRD parameters with gstreamer vah264enc/vah265enc
when PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL is supported.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25355>
(cherry picked from commit c970a9b663)
2023-09-25 11:27:09 -07:00
Karmjit Mahil
52fbebd9d8 pvr: Fix dynamic desc offset storage
The index at which the dynamic descriptor offsets were being
stored was incorrect, leading to some offsets not being stored and
thus `0` being applied as the offset to the descriptors instead.

dEQP test fixed:
  dEQP-VK.binding_model.shader_access.{primary,secondary}_cmd_buf
    .uniform_buffer_dynamic
    .{vertex,fragment,compute,vertex_fragment}
    .multiple_discontiguous_descriptor_sets
    .*_descriptor.offset_view_{,non}zero_dynamic_nonzero

Fixes: aa791961a8 ("pvr: Add support for dynamic buffers descriptors")
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25320>
(cherry picked from commit feafb8a256)
2023-09-25 11:27:09 -07:00
Karmjit Mahil
14783f1d4f pvr: Fix for loop itarator usage
The `i` iteration variable was being used instead of `k` when
appending new mappings, and getting the current source rect.

dEQP test fixed:
  dEQP-VK.pipeline.monolithic.image.suballocation.sampling_type
    .combined.view_type.3d.format.*.count_1.
    .{3x3x3,5x5x5,...(odd dimensions)}

Fixes: 060c3db4ef ("pvr: Complete pvr_generate_custom_mapping()")

Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25321>
(cherry picked from commit bf17e4fe33)
2023-09-25 11:27:08 -07:00
Mike Blumenkrantz
ab94478a1f zink: always trace_screen_unwrap in acquire
it's possible for acquire to be called from the frontend, in which
case the screen will still be trace-wrapped

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25288>
(cherry picked from commit 207b37bfd9)
2023-09-25 11:27:08 -07:00
Mike Blumenkrantz
0e3f799bb9 zink: avoid UAF on wayland async present with to-be-retired swapchain
wayland surfaces are likely to become unlinked in WSI implementations upon
retiring a swapchain, requiring the pending present to complete
in order to avoid invalid access

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25288>
(cherry picked from commit aaabb5b0f2)
2023-09-25 11:27:07 -07:00
Mike Blumenkrantz
34ae85f587 zink: move swapchain fence to swapchain object
this is more accurate in terms of usage/ownership and avoids potential
illegal fence usage in the scenario where multiple async presents are
in flight

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25288>
(cherry picked from commit 2b7b1059e4)
2023-09-25 11:27:06 -07:00
Dylan Baker
e65fc1236c .pick_status.json: Update to f4fecdad72 2023-09-25 09:37:54 -07:00
Konstantin Seurer
99f8655d50 aco/spill: Make sure that offset stays in bounds
If a shader spills a lot, the offset can be above the HW limit.

cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24652>
(cherry picked from commit 24555cdbbd)
2023-09-25 09:31:04 -07:00
Pierre-Eric Pelloux-Prayer
20de808c32 radeonsi: emit framebuffer state after allocating cmask
tex->cmask_base_address_reg and tex->cb_color_info are used in
si_emit_framebuffer_state so we have to re-emit the state when
they're modified.

It's not done in si_alloc_separate_cmask because it cannot
update framebuffer.dirty_cbufs.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9830
Cc: mesa-stable
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25317>
(cherry picked from commit 60a7c9688c)
2023-09-25 09:31:03 -07:00
lorn10
3a6ddfd65e docs: Update Clover's env variable documentation
Fixes: 981bc603b4 ("clover: implement CLOVER_DEVICE_TYPE like RUSTICL_DEVICE_TYPE")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21657>
(cherry picked from commit 00aa8816a1)
2023-09-25 09:30:59 -07:00
Tapani Pälli
e4faebcc3e crocus: avoid issues with undefined clip distance
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25177>
(cherry picked from commit c773794943)
2023-09-25 09:30:59 -07:00
Tapani Pälli
f35d00a75a iris: avoid issues with undefined clip distance
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9797
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25177>
(cherry picked from commit d6d73aae4f)
2023-09-25 09:30:58 -07:00
Yiwei Zhang
32ff84911b vulkan/android: add missing AHARDWAREBUFFER_USAGE_GPU_DATA_BUFFER usage
An AHB backing a Vkbuffer requires AHARDWAREBUFFER_USAGE_GPU_DATA_BUFFER
usage bit, which is missed from the original ANV and RADV Android
frontends as well as the common VK Android refactor.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25263>
(cherry picked from commit cd0b86fce1)
2023-09-25 09:30:58 -07:00
Rhys Perry
28642b50e5 aco: remove unused p_logical_end check when optimizing branching sequence
I don't see why a p_logical_end is expected or required. It might not be
present in some situations, which causes an assertion failure:
 s2: %19646:s[0-1] = p_reload %19701:v[8], 11
 s2: %0:exec,  s1: %8817:scc = s_andn2_b64 %19646:s[0-1], %0:exec
 s2: %8818:s[20-21] = p_cbranch_z %0:exec BB1116, BB1114

No fossil-db changes (gfx1100).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25244>
(cherry picked from commit 6dd751b3b9)
2023-09-25 09:30:57 -07:00
Rhys Perry
d5a468dc36 aco: check logical_phi_info at p_logical_end when eliminating exec writes
This is when the copies actually happen, not at the branch.

fossil-db (gfx1100):
Totals from 1 (0.00% of 79332) affected shaders:
Instrs: 424 -> 423 (-0.24%)
CodeSize: 2172 -> 2168 (-0.18%)
Latency: 2899 -> 2896 (-0.10%)
Copies: 24 -> 23 (-4.17%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25244>
(cherry picked from commit 8d5bd3ca48)
2023-09-25 09:30:57 -07:00
Rhys Perry
17ad8d4298 aco/optimizer_postRA: check overwritten_subdword in is_overwritten_since()
Fixes crash for
dEQP-VK.mesh_shader.ext.in_out.with_f16.permutation_0.mesh_only and
similar tests on GFX11.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 3d29779a25 ("aco/optimizer_postRA: Distinguish overwritten untrackable and subdword.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25223>
(cherry picked from commit ac48334ecd)
2023-09-25 09:30:56 -07:00
Pierre-Eric Pelloux-Prayer
de15f2aeb3 st/mesa: check renderbuffer before using it
rb being NULL is only checked for in the caller if no-error isn't
used.

cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9747
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25209>
(cherry picked from commit 63a3a9b23b)
2023-09-25 09:30:55 -07:00
Samuel Holland
72ab9d28e9 Android.mk: Only link LLVM for radeonsi, not amd_vk
When building for Android, avoid the LLVM dependency if possible.

Cc: mesa-stable
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: Idda03f954b4b5326e23a848e541411b60fcef063
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24007>
(cherry picked from commit 497aecb210)
2023-09-25 09:30:55 -07:00
Samuel Holland
8f4f86a9b6 Android.mk: Explicitly enable/disable LLVM support
The AMD Vulkan driver uses LLVM by default, but it is possible to build
the driver without the LLVM dependency. In this case, we must explicitly
disable LLVM support, or else meson will die after failing to find LLVM.

The Android build system already knows when to link libLLVM, so forward
that information to meson.

Cc: mesa-stable
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: I7489d3811625b390aaaf2e84e666b4a8d98328b0
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24007>
(cherry picked from commit ec32619cb0)
2023-09-25 09:30:54 -07:00
Samuel Holland
35a67658e5 Android.mk: Allow building only Vulkan drivers
Android bundles ANGLE for implementing OpenGL ES and EGL on top of
Vulkan. When using ANGLE, mesa is only needed for its Vulkan drivers.

Cc: mesa-stable
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: I034a0af52f9216bc5f1322f584bc591c90222327
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24007>
(cherry picked from commit 599f47f11c)
2023-09-25 09:30:54 -07:00
Mike Blumenkrantz
ad008b8a31 zink: propagate rp_tc_info_updated across unordered blits
this otherwise breaks rp optimizing

Fixes: 3a9f7d7038 ("zink: implement unordered u_blitter calls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25121>
(cherry picked from commit 267b997abf)
2023-09-25 09:30:53 -07:00
Mike Blumenkrantz
80b09c3bec tu: handle unused color attachments without crashing
if the format is not set then this attachment must be ignored

Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25121>
(cherry picked from commit 047213fcba)
2023-09-25 09:30:52 -07:00
Connor Abbott
d86619a498 tu: Fix assert in FDM state emission
Making the sub_cs not writeable switches the BO we're emitting to, which
causes an assert failure in tu_cs_end_sub_stream() because it looks like
we have a mismatched start/end. Just make it not writeable later.

Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25225>
(cherry picked from commit 64ed357699)
2023-09-24 19:51:50 -07:00
Connor Abbott
8ddfe6b743 tu: Fix per-view viewport state propagation
We no longer use viewport::per_view_viewport, it's part of the program
state instead, but we forgot to delete it and rewrite all users.

Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25225>
(cherry picked from commit 749e1de9d3)
2023-09-24 19:51:49 -07:00
Sviatoslav Peleshko
9eb180b310 intel/fs: Check if the whole ubo load range is in the push const range
Before this, we were checking only the beginning of the ubo range, so
partially overlapping loads were trying to load undefined data.

Fixes: b2da1238 ("i965: Use pushed UBO data in the scalar backend.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9748
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25111>
(cherry picked from commit b1a63d5418)
2023-09-24 19:51:49 -07:00
Mike Blumenkrantz
1b1d78da21 lavapipe: clamp cache uuid size
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25232>
(cherry picked from commit dd6a7a8e61)
2023-09-24 19:51:48 -07:00
Mike Blumenkrantz
8c6638a4bc zink: flag db maps as unsynchronized
these otherwise can be created using the wrong slab

Fixes: 98c411a2a1 ("zink: add PERSISTENT for db buffer maps")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25227>
(cherry picked from commit b73ebc6bfc)
2023-09-24 19:51:47 -07:00
Mike Blumenkrantz
7932c7a090 aux/tc: don't use pipe_buffer_create_with_data() for rp-optimized subdata
this function doesn't use the correct tc map flags, which causes
drivers to (potentially) use the wrong slab for transfer allocation
and then crash

Fixes: 51ad269198 ("aux/tc: handle stride mismatch during rp-optimized subdata")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25227>
(cherry picked from commit a5be0385c7)
2023-09-24 19:51:47 -07:00
Mike Blumenkrantz
3fac6fa023 aux/tc: fix rp info handling around tc_sync calls
if a set_framebuffer_state call has occurred but no draws have been
triggered, the rp info must be preserved for the driver to (eventually)
use after the sync

Fixes: 07017aa137 ("util/tc: implement renderpass tracking")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25227>
(cherry picked from commit 81dd39de01)
2023-09-24 19:51:46 -07:00
Ruijing Dong
c617870e8f radeonsi/vcn: change max_poc to fixed value for hevc encoder.
problem: max_poc means the number of bits used in poc lsb
         in slice header, and it should not be related to GOP
	 size. When large GOP size used, it could generate
	 corrupted video, as the POC could not be correctly
	 decoded.

solution: use fixed value of max_poc (16) for now.

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25214>
(cherry picked from commit fb0f51bc64)
2023-09-24 19:51:43 -07:00
Daniel Schürmann
3e6c9dd71a aco/insert_exec_mask: set Exact mode after p_discard_if when necessary
Fixes: 5e9df85b1a ('aco: optimize discard_if when WQM is not needed afterwards')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
(cherry picked from commit 0907b53740)
2023-09-24 19:51:43 -07:00
Samuel Pitoiset
1b614a22f2 radv: set THREAD_TRACE_MARKER_ENABLE for mesh/task draws
PAL does that.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25144>
(cherry picked from commit 312103e0ff)
2023-09-24 19:51:40 -07:00
Dave Airlie
41cee21f62 radv/video: take db alignment into account when allocating images.
Make sure to take the db alignment into account when sizing the underlying
images.

Fixes a 360p sample from Lynne.

Cc: mesa-stable
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25168>
(cherry picked from commit 3740b6f599)
2023-09-24 19:51:30 -07:00
Mike Blumenkrantz
814b8bf593 aux/tc: fix renderpass tracking fb state clobber scenario
in a stream like:
* set fb state (A)
* flush
* set fb state (B)
* draw -> driver query
* flush

the "driver query" should return the tc info corresponding to the most
recent fb state (B). previously this would increment to C because
the flag for incrementing at the start of a batch was set

Fixes: 07017aa137 ("util/tc: implement renderpass tracking")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25206>
(cherry picked from commit 9399165bd4)
2023-09-24 19:51:29 -07:00
Sil Vilerino
dc504299b8 aux/tc: Add ASSERTED to unreferenced release build variable
Fixes MSVC build error src/gallium/auxiliary/util/u_threaded_context.c(3184): error C4189: 'size': local variable is initialized but not referenced

Fixes: 51ad269198 ("aux/tc: handle stride mismatch during rp-optimized subdata")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25203>
(cherry picked from commit d48f2469be)
2023-09-24 19:51:28 -07:00
Erik Faye-Lund
2bc31ef058 panfrost: delete stale editorconfig file
We no longer use 8-space indent in panfrost, so let's remove the
needless .editorconfig, and instead inherit the 3-space indent from the
toplevel .editorconfig.

Fixes: 0afd691f29 ("panfrost: clang-format the tree")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25147>
(cherry picked from commit 210f1e14d5)
2023-09-24 19:51:26 -07:00
Mike Blumenkrantz
62c008d231 glsl: check for xfb setting xfb info
this otherwise hits the default buffer=0 path, which is invalid
for drivers which don't support xfb

fixes #9763

cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25082>
(cherry picked from commit 06af083b93)
2023-09-24 19:51:26 -07:00
Dave Airlie
d3b688005c spirv: use a pointer sized int type for opencl event_t
llvm16 + opaque pointers uses a ptr to event for the opaque type,
llvm 17 fixes this properly, but the fix doesn't look too backportable.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25165>
(cherry picked from commit f423d91790)
2023-09-24 19:51:25 -07:00
Caio Oliveira
8ac453ea15 compiler/types: Use right hash for function types
No bug really materialized since function types
aren't currently being used.

Fixes: 26f456203c ("compiler/types: Use hash table pre-hashed functions for type caching")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25160>
(cherry picked from commit 247f940d37)
2023-09-24 19:51:24 -07:00
Dave Airlie
af91821579 radv: don't emit event code on video queues.
I don't know if these can be done properly, but for now just don't
emit the standard cp stuff since it hangs the GPU.

"Fixes" dEQP-VK.video.synchronizat*

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25170>
(cherry picked from commit 147c17c28c)
2023-09-24 19:51:24 -07:00
Hans-Kristian Arntzen
6c8285296d wsi/x11: Fix potential deadlock in present ID.
If we observe IDLE before COMPLETE, another queued image may have
presented with present ID 0 which would break the check fixed in this
commit. The original fix for present_id / signal_present_id split
forgot to take this into account.

Fixes: 32f7ff2c20 ("Fix present ID signal when IDLE comes before
COMPLETE").

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25178>
(cherry picked from commit 08fee190aa)
2023-09-24 19:51:23 -07:00
Yiwei Zhang
7ca144b9bf venus: fix a device memory report leak
Fixes: f70a08bc60 ("venus: handle device memory report requests")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25176>
(cherry picked from commit da16a76fe7)
2023-09-24 19:51:23 -07:00
Illia Polishchuk
684ce43507 nir: fix invalid sampler search by texture id
Sampler id cannot be mapped to a uniform object location

Fixes: 1a8dd84ec6 ("nir: Propagate the type sampler type change to the used variable.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9793

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25145>
(cherry picked from commit b8a54c50a6)
2023-09-24 19:51:22 -07:00
Illia Polishchuk
66e20bb824 zink: move find_sampler_var from zink to nir core
Avoid code duplication because it need to be used in following commits

Fixes: 1a8dd84ec6 ("nir: Propagate the type sampler type change to the used variable.")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25145>
(cherry picked from commit 5a7044d0bc)
2023-09-24 19:51:21 -07:00
Mike Blumenkrantz
3c20252635 aux/tc: fix address calc for segmented texture subdata
this fixes all dimension/array uses for the rp tracking path

Fixes: 51ad269198 ("aux/tc: handle stride mismatch during rp-optimized subdata")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25180>
(cherry picked from commit 5f73b8976b)
2023-09-24 13:55:58 -07:00
Mike Blumenkrantz
4d7b7927ff aux/tc: fix staging buffer sizing for texture_subdata
this is the size of the src data, not the dst data

Fixes: 51ad269198 ("aux/tc: handle stride mismatch during rp-optimized subdata")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25180>
(cherry picked from commit b6bc1f85f4)
2023-09-24 13:55:58 -07:00
Samuel Pitoiset
75b7526185 radv: fix capturing RGP on RDNA3 with more than one Shader Engine
PKT3_RESET_FILTER_CAM_S seems required on GFX11. Otherwise, capturing
with more than on SE can hang.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25156>
(cherry picked from commit 2cc981a0cd)
2023-09-24 13:55:57 -07:00
Samuel Pitoiset
1c36f3c4a0 radv: fix emitting SQTT userdata when CAM is needed
The third parameter of PKT3 is the predicate bit and this was wrong.
PAL sets the RESET_FILTER_CAM bit when emitting SQTT userdata.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25158>
(cherry picked from commit 6caae898dd)
2023-09-24 13:55:57 -07:00
Xaver Hugl
2537864f90 vulkan wsi: add support for PresentOptionAsyncMayTear
This commit adds tearing support for Xwayland

Signed-off-by: Xaver Hugl <xaver.hugl@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19125>
(cherry picked from commit 0a1ccd4a9a)
2023-09-24 13:55:56 -07:00
Erico Nunes
0a6043c632 lima: fix plbu block stride calculation
For some specific texture sizes, notably some texture sizes with width
4096, block stride calculation could end up calculating stride 256 which
is an invalid value.
In those specific cases, this could cause rendering artifacts or
application/driver crashes.

Cc: mesa-stable

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25084>
(cherry picked from commit cb1c88d41f)
2023-09-24 13:55:55 -07:00
Mike Blumenkrantz
6cfb05190d nir/inline_uniforms: fix oob access with nir_find_inlinable_uniforms
the array dimensionality needs to match nir_add_inlinable_uniforms even if
only the first member is used

Fixes: 0c0fb216dd ("nir/inline_uniforms: Allow possibility of more than one UBO")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25063>
(cherry picked from commit 39fca243bb)
2023-09-24 13:55:55 -07:00
Jordan Justen
8a6a489777 intel/dev: Update device string for MTL PCI ID 0x7d55
Ref: bspec 55420
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25073>
(cherry picked from commit ddc3c18e4a)
2023-09-24 13:55:54 -07:00
Mike Blumenkrantz
ad390aa585 zink: set is_xfb=false for all i/o variables
this can affect streamout generation, even though it so far hasn't

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24950>
(cherry picked from commit e87b24719f)
2023-09-24 13:55:54 -07:00
Konstantin Seurer
c5fab24c5c radv: Don't use the depth image view for depth bias emission
If the application records a secondary command buffer that inherits
a render pass without specifying a framebuffer, we should still be able
to emit the depth bias state properly.

Fixes: 266b2cf ("radv: implement VK_EXT_depth_bias_control")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9588
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25018>
(cherry picked from commit 28e1e33c32)
2023-09-24 13:55:53 -07:00
David Rosca
e1469b8aea frontends/va: Flush after unmapping VAImageBufferType
If application changed image data we need to flush on unmap to make the
changes visible. This will also flush if the mapping was used only for
reading, but we can't know that as vaMapBuffer doesn't have a parameter
to specify if read or write is requested.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9774

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25102>
(cherry picked from commit d6299ec258)
2023-09-24 13:55:52 -07:00
Georg Lehmann
864a206398 nir/opt_algebraic: remove broken fddx/fddy patterns
These patterns are broken in the following scenario:

%1 = f2fmp %0
%2 = fddx %1
%3 = ... // non quad uniform
if %3 {
   %4 = f2f32 %2
   ...
}

Which would turn into

%3 = ...
if %3 {
   %4 = fddx %0
   ...
}

Yet another example that shows why derivative instructions should be
be intrinsics, not alu.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25014>
(cherry picked from commit 136a698251)
2023-09-24 13:55:52 -07:00
Dave Airlie
01019b9577 llvmpipe: enable f16 paths on aarch64.
Karol noticed luxmark didn't work, and this seems to fix it.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25104>
(cherry picked from commit 109a99e691)
2023-09-24 13:55:51 -07:00
Mike Blumenkrantz
6bc350389e zink: always add a per-prog ref for gpl libs
previously non-separable progs had their libs owned exclusively by
the shaders, which meant it was possible for a background compile job
to crash while the context was being destroyed when accessing libs
which no longer had active shaders

fixes #9234

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25088>
(cherry picked from commit fd297ecf98)
2023-09-24 13:55:50 -07:00
Dylan Baker
47b531ce42 .pick_status.json: Mark fa6562b239 as denominated 2023-09-24 13:55:47 -07:00
Dylan Baker
1b59c4d7d7 docs: Update release calendar for 23.2.0-rc4 2023-09-24 13:49:46 -07:00
Dylan Baker
034928f6bc VERSION: update to 23.2.0-rc4 2023-09-24 13:29:21 -07:00
Dylan Baker
472679706a .pick_status.json: Updates notes for 68027bd38e 2023-09-24 11:29:51 -07:00
Mike Blumenkrantz
862b804cb5 aux/tc: handle stride mismatch during rp-optimized subdata
to avoid splitting renderpasses, this subdata optimization handles the usual
driver dance of staging buffer -> gpu copy

if the pbo stride doesn't match the image format's stride, however, then
a direct copy will yield broken pixels and the image will misrender. to avoid this,
detect stride mismatch and translate the single subdata call into a sequence
of non-overlapping subdata calls that the driver can magically figure out
while continuing to not split renderpasses

fixes #9589

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24849>
(cherry picked from commit 51ad269198)
2023-09-24 11:29:01 -07:00
Lionel Landwerlin
7fc8a05cd5 hasvk: add state cache invalidation back before fast clears
Prior to 87149cc545, blorp added a state cache invalidation prior to
fast clears. This got dropped on Hasvk.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 87149cc545 ("blorp: update and move fast clear PIPE_CONTROLs to drivers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24719>
(cherry picked from commit 9231f24be1)
2023-09-24 11:29:01 -07:00
Rohan Garg
97ea9e77f5 iris: migrate preemption streamwout wa to WA infra
Fixes: db6c374 ('iris: disable preemption for 3DPRIMITIVE during streamout')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25080>
(cherry picked from commit a57faf5037)
2023-09-24 11:29:01 -07:00
antonino
87a9412fef drirc: enable vk_wsi_force_swapchain_to_current_extent for "Serious Sam Fusion"
This game handles swapchain size incorrecly and can crash because of
it.

Enable this driconf as a workaround.

Fixes: 6139493ae3 ("vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24818>
(cherry picked from commit 1456cb9c0b)
2023-09-24 11:29:00 -07:00
antonino
e4354cfbec drirc: enable vk_wsi_force_swapchain_to_current_extent for "The Talos Principle"
This game handles swapchain size incorrecly and can crash because of
it.

Enable this driconf as a workaround.

Fixes: 6139493ae3 ("vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24818>
(cherry picked from commit 142e317024)
2023-09-24 11:29:00 -07:00
antonino
52a47521c0 vulkan/wsi: add vk_wsi_force_swapchain_to_current_extent driconf
Add a driconf to force the swapchain size to match
`VkSurfaceCapabilities2KHR::currentExtent` as a workaround for
misbehaved games

Fixes: 6139493ae3 ("vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24818>
(cherry picked from commit aa657247ce)
2023-09-24 11:29:00 -07:00
Connor Abbott
0b56095282 vk/graphics_state: Fix copying MS locations pipeline state
Copying the state below overwrote the ms.sample_locations we set,
so our new_sample_locations was never actually used and we were
accidentally doing a shallow copy. Turnip passes a stack-allocated
old_state, so this resulted in invalid stack pointers.

Fixes: f497cc9d56 ("vk/graphics_state: Add helpers for pre-baking state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25031>
(cherry picked from commit 1cef1f02b5)
2023-09-24 11:29:00 -07:00
Lionel Landwerlin
a032a14d3b intel/nir: rerun lower_tex if it lowers something
nir_lower_tex can lower tg4 coords into tg4 offset which on DG2+ we
also need to lower into constant offsets.

Unfortunately the nir_lower_tex pass is not able to lower the
instructions it itself generates, so the easy fix for when
nir_lower_tex lowers tg4 coords into tg4 offsets is to rerun the pass.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9735
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25015>
(cherry picked from commit 10e75aae1b)
2023-09-24 11:29:00 -07:00
Samuel Pitoiset
0935dd7270 radv/amdgpu: do not copy the original chain link for IBs
Otherwise, if a secondary CS is grown and then executed without IB2,
the INDIRECT_BUFFER packet would have been copied but it shouldn't.

This fixes a regression that introduced GPU hangs with
gl_vk_meshlet_cadscene on RDNA2.

Fixes: df0c742543 ("radv/amdgpu: rework growing a CS with the chained IB path slightly")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24891>
(cherry picked from commit e80fddf81f)
2023-09-24 11:29:00 -07:00
Samuel Pitoiset
2e9cda7e77 radv/amdgpu: fix executing secondaries without IB2
If a secondary cmdbuf has been grown and is executed without IB2
(eg. on compute queue or when it's not allowed), the ib size ptr
contains chaining info, which means the IB size was wrong.

This fixes CPU crashes when running gl_vk_meshlet_cadscene.

Fixes: 277b2afd70 ("radv/amdgpu: add support for executing DGC cmdbuf with RADV_DEBUG=noibs")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24891>
(cherry picked from commit 9206aeb077)
2023-09-24 11:29:00 -07:00
Mike Blumenkrantz
1763073c8a zink: fix linear modifier dmabuf imports
these are disguised as INVALID modifiers, but really they're LINEAR

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25002>
(cherry picked from commit ca162bc82d)
2023-09-24 11:29:00 -07:00
Mike Blumenkrantz
4c4ef5135f zink: be more precise about flagging rp changes around unordered u_blitter
failing to update rp attachments as needed after unordered blits results in
broken (depth) rendering

Fixes: 3a9f7d7038 ("zink: implement unordered u_blitter calls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24934>
(cherry picked from commit 98340dc8c4)
2023-09-24 11:29:00 -07:00
Leo Liu
610c09a2c2 radeonsi/vcn: fix the incorrect dt_size
Issue: For texture with multiple planes, the planes will point to the
same BO with the total size, so current vcn dt_size is incorrect.

(gdb) p/x *((struct si_resource *)(((struct vl_video_buffer *)out_surf)->resources[0]))
...
  buf = 0x5555558daa30,
  gpu_address = 0xffff800101000000,
  bo_size = 0xa2000,
...
}
(gdb) p/x *((struct si_resource *)(((struct vl_video_buffer *)out_surf)->resources[1]))
...
  buf = 0x5555558daa30,
  gpu_address = 0xffff800101000000,
  bo_size = 0xa2000,
...
}

This is because: in function static struct si_texture *si_texture_create_object(),
   if (plane0) {
      /* The buffer is shared with the first plane. */
      resource->bo_size = plane0->buffer.bo_size;
      ...
      radeon_bo_reference(sscreen->ws, &resource->buf, plane0->buffer.buf);
      resource->gpu_address = plane0->buffer.gpu_address;
   }

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9728
Cc: mesa-stable

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25013>
(cherry picked from commit 7876a2f685)
2023-09-24 11:29:00 -07:00
Rohan Garg
6b94bcfa2a blorp: drop undefined macro
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 97d6ceaf04 ("intel: Remove GEN_IS_HASWELL macro")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
(cherry picked from commit ca7ae1a53f)
2023-09-24 11:29:00 -07:00
Rohan Garg
cc191d96f6 crocus: fix GFX_VERx10 macro
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
(cherry picked from commit 99a88ca4a2)
2023-09-24 11:29:00 -07:00
Rohan Garg
e7e224b49c anv: use the lineage number for WA
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d0669f3ede ("intel/dev: switch defect identifiers to use lineage numbers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
(cherry picked from commit 86e8ba4d32)
2023-09-24 11:29:00 -07:00
Rohan Garg
c82046a2c4 iris: use the correct WA macros and lineage numbers
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0ce595a89a ("intel: use generated helpers for Wa_1508744258")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
(cherry picked from commit 50c2fe46fa)
2023-09-24 11:29:00 -07:00
Rohan Garg
b11e92d9da anv: drop dead ifdef
The GFX_VERX10 macro doesn't exist and we no longer use
SCRATCH_SURFACE_STATE_POOL_SIZE.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b3f6e5dc70 ('anv: remove incorrect ifdef')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
(cherry picked from commit cbc4916661)
2023-09-24 11:28:59 -07:00
Lionel Landwerlin
7b5bfa2469 anv: add missing ISL storage usage
ISL makes a bunch of decision on programming (MOCS,
RENDER_SURFACE_STATE values) based on this flag. It's important to set
it if we're going to use an image as storage.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
(cherry picked from commit 34d5db0583)
2023-09-24 11:28:59 -07:00
Karol Herbst
fa0689d2ba rusticl/memory: do not verify pitch for IMAGE1D_BUFFER
Devices might report an image_pitch_alignment of 0 leading to a division
by 0 trap.

Fixes: 06daa03c5c ("rusticl: Implement spec for cl_khr_image2d_from_buffer")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24993>
(cherry picked from commit 5263802618)
2023-09-24 11:28:59 -07:00
Karol Herbst
355e68efe1 rusticl/disk_cache: fix stack corruption
The length passed to mesa_bytes_to_hex is the one of the input, not output
data.

Fixes: fbe9a7ca3e ("rusticl/mesa: create proper build-id hash for the disk cache")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24967>
(cherry picked from commit 1a20ac7891)
2023-09-24 11:28:59 -07:00
Rhys Perry
2450274b71 aco/spill: add all live-in to merge block spill candidates
Previously, only already spilled live-in or phis were added to the spill
candidates. Because of branch definitions, this might not be enough.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9722
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24949>
(cherry picked from commit c7bb2f7bb9)
2023-09-24 11:28:59 -07:00
Corentin Noël
60beb571ce virgl: Do not expose EXT_texture_mirror_clamp when using a GLES host
The GL_MIRROR_CLAMP_EXT wrap parameter is never available in GLES.

This fixes the `spec@!opengl 1.1@texwrap 2d proj` piglit test when using a GLES
host.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24935>
(cherry picked from commit 9c39ea796c)
2023-09-24 11:28:59 -07:00
Dylan Baker
78e6765460 .pick_status.json: Updates notes for b8ea9724fa 2023-09-22 13:45:42 -07:00
Lionel Landwerlin
540b847302 intel/compiler: disable per-sample interpolation modes with non-per-sample dispatch
Fixes hangs in dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5644011f06 ("intel/compiler: Convert wm_prog_key::persample_interp to a tri-state")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24716>
(cherry picked from commit d74c301026)
2023-09-22 13:44:36 -07:00
Helen Koike
4ebe99bd81 ci/android: remove strace output from cuttlefish-runner.sh
strace output is only used for debug and its output takes too much
space. Remove it to save resources.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Fixes: 7b51a583ed ("ci/android: add android to the ci")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24913>
(cherry picked from commit e6625fa25a)
2023-09-22 13:44:36 -07:00
Eric Engestrom
6a48a14cce ci/farm-rules: fix missing valve-infra jobs in scheduled pipelines
Fixes: 79f7882fc6 ("ci: add quirk for GitLab assuming changes is always true for scheduled runs")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24897>
(cherry picked from commit f97e38f9cd)
2023-09-22 13:44:36 -07:00
Rhys Perry
29fd84a5ae aco/spill: skip p_branch in process_block
Fixes compilation of a Dead by Daylight shader.

fossil-db (gfx1100):
Totals from 58 (0.04% of 133461) affected shaders:
Instrs: 319824 -> 319421 (-0.13%); split: -0.13%, +0.00%
CodeSize: 1711260 -> 1708744 (-0.15%); split: -0.15%, +0.00%
SpillSGPRs: 2567 -> 2459 (-4.21%)
Latency: 3274930 -> 3274921 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 924106 -> 924105 (-0.00%); split: -0.00%, +0.00%
Copies: 41883 -> 41757 (-0.30%); split: -0.31%, +0.00%
Branches: 9144 -> 9146 (+0.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9599
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24896>
(cherry picked from commit cb096b85ff)
2023-09-22 13:44:36 -07:00
Timothy Arceri
296653f328 util: add radeonsi workaround for Nowhere Patrol
Cc: mesa-stable

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24919>
(cherry picked from commit ddac37a8b3)
2023-09-22 13:44:36 -07:00
Vinson Lee
cfed3fb89b vk/wsi/x11: Remove dead code
Fix defect reported by Coverity Scan.

Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement: return VK_ERROR_SURFACE_LOS....

Fixes: fb9f697fbb ("vk/wsi/x11: move surface alpha check from get_caps to creation")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24802>
(cherry picked from commit 71466eb863)
2023-09-22 11:08:46 -07:00
Paul Gofman
062d7e95cc driconf: add a workaround for Rainbow Six Extraction
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24784>
(cherry picked from commit 3e66eba59e)
2023-09-22 11:08:45 -07:00
Kenneth Graunke
77ff616b59 iris: Check prog[] instead of uncompiled[] for BLORP state skipping
Huge thanks to Tapani Pälli for debugging this issue, figuring out
what was going wrong, proposing fixes, and walking me through where
things were going off the rails.

BLORP always disables tessellation and geometry shaders.  Our handling
tried to look at ice->shaders.uncompiled[] to determine whether the next
draw needed those shaders.  If not, we can leave BLORP's residual state
that disabled those stages in place, and skip looking at it.

Unfortunately, predicting the future is a bit fraught, in part due to
the uncompiled[] and prog[] arrays being slightly out of sync at times.

Consider the following case:

1. Draw with tessellation shaders in place

   => uncompiled[TES] and prog[TES] will both point at valid shaders.

2. Gallium calls pipe->bind_tes_state(NULL).

   => This makes uncompiled[TES] point at NULL, and flags
      IRIS_STAGE_DIRTY_UNCOMPILED_TES.

      Because iris_update_compiled_shaders() hasn't happened yet,
      uncompiled[TES] is NULL but prog[TES] has the stale TES from
      the previous draw still.

3. BLORP operations happen

   => BLORP sees uncompiled[TES] == NULL and decides that tessellation
      is off for the upcoming draws.  So it skips flagging tess state.

4. Gallium calls pipe->bind_tes_state(shader from step #1).

   => uncompiled[TES] points at the original shader.
      IRIS_STAGE_DIRTY_UNCOMPILED_TES gets flagged again.

5. Draw again

   => This calls iris_update_compiled_shaders(), which sees that
      a TES is bound, and calls iris_update_compiled_tes().  But
      because the same shader was bound as before, the program it
      comes up with is identical to the one already bound at
      ice->shaders.prog[TES].  So, it thinks it doesn't have to
      flag any tessellation state dirty because it was already
      set up for the last draw.

This random unbind and rebind between draws leads to a situation
where, at step #3, BLORP thinks it can skip flagging tessellation
state (nothing is bound), and at step #5, normal state handling
thinks it can skip flagging tessellation state (nothing changed
since last time).  So nobody does, and things break.

This unbind appears to be happening when st_release_variants()
decides it wants to free some shaders.  Then a rebind happens to
put back the actual shader for the draw.  So, it's not theoretical.

To fix this, we change BLORP to look at ice->shaders.prog[] rather
than uncompiled[].  This is equivalent to thinking about the previous
draw, rather than the next.  If the last draw had tessellation off,
then BLORP's disabling was a no-op, and the GPU is still in the same
state as the previous draw.  This is more reliable than predicting
the future.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8308
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9678
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24880>
(cherry picked from commit d693027a00)
2023-09-22 11:08:44 -07:00
Konstantin Seurer
0ee3d2bed5 vulkan/wsi/x11: Implement capture hotkey using the keymap
This way, we can avoid opening another connection. The capture key is
changes to F1 because F12 has issues on Wayland. (After pressing F12,
all keys become unresponsive, refocussing the window fixes it)

Fixes: 291fa05  ("vulkan/wsi/x11: Capture traces using a hotkey")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9578
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24710>
(cherry picked from commit 8c98814874)
2023-09-22 11:08:43 -07:00
Dmitry Baryshkov
9f8a82f582 tu: Pass real size of prime buffers to allocator
The msm driver reserves the actual DMABUF size in the memory map, while
TU can request smaller memory chunk to be allocated. This potentially
can lead to a situation when next allocation IOVA will be in the middle
of the address space which is reserved for the DMABUF. Pass the
`real_size' to TU allocator instead, so that kernel and userspace have
the same picture of memory allocations.

Cc: mesa-stable
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24861>
(cherry picked from commit 2fdcc00b01)
2023-09-22 11:08:42 -07:00
Karol Herbst
a078c471d3 zink: fix global stores
We have to cast the value if the type doesn't match.

Fixes: ddc5c30489 ("zink: handle global and scratch vars")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24859>
(cherry picked from commit ac289b7268)
2023-09-22 11:08:41 -07:00
Karol Herbst
f81d8db0ac zink: fix source type in load/store scratch
Fixes: ddc5c30489 ("zink: handle global and scratch vars")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24859>
(cherry picked from commit ac1685bc6a)
2023-09-22 11:08:40 -07:00
Jordan Justen
7f2c09c686 intel/dev: Add more RPL PCI IDs
Ref: https://patchwork.freedesktop.org/patch/553646/?series=122712&rev=1
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24820>
(cherry picked from commit d65b0b0424)
2023-09-22 11:08:37 -07:00
Jordan Justen
deb24df23c intel/dev: Use RPL-U name on RPL-U devices
Ref: https://patchwork.freedesktop.org/patch/553646/?series=122712&rev=1
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24820>
(cherry picked from commit 27f6b4b1c6)
2023-09-22 11:08:36 -07:00
David Rosca
5fc0e24205 Revert "radeonsi/vcn: add an exception of field case for h264 decoding"
This change causes page faults when playing corrupted video from the
bugreport. The original issue have now been resolved in firmware.

This reverts commit bfce57c7a5.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9210

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24836>
(cherry picked from commit ee1132bd79)
2023-09-22 11:08:35 -07:00
Dylan Baker
871de43c01 .pick_status.json: Update to 1cdc4be14b 2023-09-22 11:08:16 -07:00
Daniel Stone
f2a94d1819 egl/wayland: Always initialise fd_display_gpu
Set it to an invalid value, rather than leaving it to be stdout or
something.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25319>
2023-09-22 17:31:12 +00:00
Matt Turner
882608de2c intel: Limit Intel Vulkan RT to x86_64
Note: passed CI repeatedly except for the timing out WHL jobs.

Fixes: 28c1053c07 ("intel: Allow using intel_clc from the system")
(cherry picked from commit c38b67f4d1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:20 +00:00
Matt Turner
d38b06ac14 intel: Allow using intel_clc from the system
With -Dintel-clc=system, the build system will search for an `intel_clc`
binary and use it instead of building `intel_clc` itself.

This allows Intel Vulkan ray tracing support to be built when cross
compiling without terrible hacks (that would otherwise be necessary due
to `intel_clc`'s dependence on SPIRV-LLVM-Translator, libclc, clang, and
LLVM).

(cherry picked from commit 28c1053c07)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:20 +00:00
Matt Turner
407d479271 intel: Only build perf if drivers or tools are enabled
(cherry picked from commit 01f5fd36c8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:20 +00:00
Matt Turner
b3f263d567 intel: Only build ds if drivers are enabled
(cherry picked from commit ce7d41bbc5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:20 +00:00
Matt Turner
1165dbc207 intel: Only build blorp if drivers are enabled
(cherry picked from commit 60d01cb1af)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:19 +00:00
Matt Turner
26d7e07a56 intel: Consider with_intel_clc in with_any_intel
This makes it possible to configure mesa to build only intel_clc.

(cherry picked from commit 4f89c1dafd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:19 +00:00
Matt Turner
e35f25f713 intel: Rearrange for next commit
(cherry picked from commit 37b88a72fb)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:19 +00:00
Karol Herbst
2f49a89060 clc: use CLANG_RESOURCE_DIR for clang's resource path
With certain build configuration that value can be a non empty string and
needs to be used.

This will also require distributions to rebuild mesa if and only if
CLANG_RESOURCE_DIR changes between clang rebuilds or updates.

Signed-off-by: Karol Herbst <git@karolherbst.de>
(cherry picked from commit e1c278ae82)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
2023-09-22 16:50:19 +00:00
Mike Blumenkrantz
29fc24d289 zink: disable validation
stable branch validation can't work since not all validation fixes
get backported

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25339>
2023-09-22 08:46:39 -07:00
Timur Kristóf
f066d9bcd7 ac/nir/ngg: Wait for attribute ring stores in mesh shaders.
Make sure that both per-vertex and per-primitive attribute
ring stores are finished before position or primitive export
instructions are executed.

This is necessary because we need to ensure that mesh shader
waves work correctly when they have either vertex-only or
primitive-only waves.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 93b4f200de)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-22 08:46:39 -07:00
Timur Kristóf
e78d9b00bf ac/nir/ngg: Refactor mesh shader primitive export.
Cleanup the code that generates the two channels of the
primitive export instruction, and move storing the built-in
per-primitive outputs out to match how vertex attributes work.

Prepares the mesh shader lowering for a workaround that
affect export instructions.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 0721784b78)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-22 08:46:39 -07:00
Timur Kristóf
93c501e273 ac/nir/ngg: Wait for attribute stores before VS/TES/GS pos0 export.
This is a HW bug workaround for some (all?) GFX11 chips.

On these chips, rasterization can start before the attribute ring
stores are finished, which can cause issues.
As a workaround, wait for attribute ring stores to finish
before doing the position export.

Mesh shaders will be taken care of in another commit.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit edd51655f0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-22 08:46:39 -07:00
Timur Kristóf
1f0ba8cdd8 ac/nir: Slightly refactor how pos0 exports are added when missing.
Prepares for a workaround. Makes it possible for this function
to not emit the pos0 export at all so that it can be emitted
by a subsequent call to the function later.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 9c096e4ace)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-22 08:46:39 -07:00
Timur Kristóf
156a26826e ac/nir: Add done arg to ac_nir_export_position.
This prepares for a workaround where we won't need to add
the done flag to the last export in this function, because
it will be added in a subsequent call to the same function.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
(cherry picked from commit 838d886d90)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
2023-09-22 08:46:39 -07:00
Iván Briano
9a012e05dc intel/fs: use ffsll so we don't explode on 32 bits
Fixes: b200e5765c ("anv: use a simpler MUE layout for fast linked libraries")

Tested-by: Mark Janes <markjanes@swizzler.org>
(cherry picked from commit f1bc58cb7b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Iván Briano
e3ce501d01 anv: enable VK_EXT_mesh_shader where supported
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 23f9e89fce)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Iván Briano
4a49ba59db intel/fs: handle URB setup for fast linked mesh pipelines
Up until now, the mesh pipeline assumed it would be always linked to the
fragment shader, and so the calculated MUE map would always be
available.
That is not the case for fast linked pipeline libraries, so the URB
setup needs to account for this. We do this by replicating what's done
for non-mesh pipelines, defining the URB based on the FS inputs, and
always assuming they will be laid out in order of varying number, except
that we also account for per-primitive attributes.

Fixes all GPL using tests under dEQP-VK.mesh_shader.ext.smoke.*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 4eddeea7bf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Iván Briano
bbdc325e59 intel/fs: read viewport and layer from the FS payload
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 17d7f7a292)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Iván Briano
c3a84ff48d anv: track what kind of pipeline a fragment shader may be used with
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit d36da7c5f8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Iván Briano
3932095156 anv: use a simpler MUE layout for fast linked libraries
The compaction introduced in a252123363 ("intel/compiler/mesh: compactify MUE layout")
is not suitable for the case where graphics pipeline libraries are fast
linked, as the fragment shader won't receive the mue_map to know where
to locate its inputs.
For that case, keep doing what we did before and lay things down in the
order varyings are defined, which is also how it works for the non-mesh
case.

Fixes dEQP-VK.fragment_shading_rate.*fast_linked_library*.ms

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit b200e5765c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Iván Briano
73ccbcab60 blorp: fix hangs with mesh enabled
Move mesh URB allocations together with the other stages.

This fixes a hang that started happening with mesh enabled after
419531c5d9 ("intel/blorp: add a new flag to communicate PSS sync need")

Bspec 45352 says:
  L3 Space allocation can only be changed when the GPU pipeline is
  completely flushed.

It's likely that the PIPE_CONTROL added in that commit was breaking that
assumption and the URB allocation happening afterwards at the end of the
pipeline emission would then hang. And before that, we were probably
just getting lucky.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit bcde58ea86)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Marcin Ślusarz
7f766cfb79 intel/compiler: load debug mesh compaction options once
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
(cherry picked from commit 48885c7fe3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Marcin Ślusarz
03fc9642fc intel/compiler,anv: put some vertex and primitive data in headers
Both per-primitive and per-vertex space is allocated in MUE in 8 dword
chunks and those 8-dword chunks (granularity of
3DSTATE_SBE_MESH.Per[Primitive|Vertex]URBEntryOutputReadLength)
are passed to fragment shaders as inputs (either non-interpolated
for per-primitive and flat vertex attributes or interpolated
for non-flat vertex attributes).

Some attributes have a special meaning and must be placed in separate
8/16-dword slot called Primitive Header or Vertex Header.

Primitive Header contains 4 such attributes (Cull Primitive,
ViewportIndex, RTAIndex, CPS), leaving 4 dwords (the rest of 8-dword
slot) potentially unused.

Vertex Header is similar - it starts with 3 unused dwords, 1 dword for
Point Size (but if we declare that shader doesn't produce Point Size
then we can reuse it), followed by 4 dwords for Position and optionally
8 dwords for clip distances.

This means we have an interesting optimization problem - we can put
some user attributes into holes in Primitive and Vertex Headers, which
may lead to smaller MUE size and potentially more mesh threads running
in parallel, but we have to be careful to use those holes only when
we need it, otherwise we could force HW to pass too much data to
fragment shader.

Example 1:
Let's assume that Primitive Header is enabled and user defined
12 dwords of per-primitive attributes.

Without packing we would consume 8 + ALIGN(12, 8) = 24 dwords of
MUE space and pass ALIGN(12, 8) = 16 dwords to fragment shader.

With packing, we'll consume 4 + 4 + ALIGN(12 - 4, 8) = 16 dwords of
MUE space and pass ALIGN(4, 8) + ALIGN(12 - 4, 8) = 16 dwords to
fragment shader.

16/16 is better than 24/16, so packing makes sense.

Example 2:
Now let's assume that Primitive Header is enabled and user defined
16 dwords of per-primitive attributes.

Without packing we would consume 8 + ALIGN(16, 8) = 24 dwords of
MUE space and pass ALIGN(16, 16) = 16 dwords to fragment shader.

With packing, we'll consume 4 + 4 + ALIGN(16 - 4, 8) = 24 dwords of
MUE space and pass ALIGN(4, 8) + ALIGN(16 - 4, 8) = 24 dwords to
fragment shader.

24/24 is worse than 24/16, so packing doesn't make sense.

This change doesn't affect vk_meshlet_cadscene in default configuration,
but it speeds it up by up to 25% with "-extraattributes N", where
N is some small value divisible by 2 (by default N == 1) and we
are bound by URB size.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
(cherry picked from commit c1685f08dd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Marcin Ślusarz
6b99242dbc intel/compiler/mesh: compactify MUE layout
Instead of using 4 dwords for each output slot, use only the amount
of memory actually needed by each variable.

There are some complications from this "obvious" idea:
- flat and non-flat variables can't be merged into the same vec4 slot,
  because flat inputs mask has vec4 stride
- multi-slot variables can have different layout:
   float[N] requires N 1-dword slots, but
   i64vec3 requires 1 fully occupied 4-dword slot followed by 2-dword slot
- some output variables occur both in single-channel/component split
  and combined variants
- crossing vec4 boundary requires generating more writes, so avoiding them
  if possible is beneficial

This patch fixes some issues with arrays in per-vertex and per-primitive data
(func.mesh.ext.outputs.*.indirect_array.q0 in crucible)
and by reduction in single MUE size it allows spawning more threads at
the same time.

Note: this patch doesn't improve vk_meshlet_cadscene performance because
default layout is already optimal enough.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
(cherry picked from commit a252123363)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
2023-09-22 08:46:39 -07:00
Rhys Perry
a02429d43f radv: fix 128bpp comp-to-single clears
We were clearing GB to A, instead of R.

This fixes some red tinting in Overwatch 2 when shadow quality is set to
"Ultra".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 7451eb1d61 ("radv: implement DCC fast clears with comp-to-single")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9446
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
(cherry picked from commit e2c7ce3719)
2023-09-22 08:46:39 -07:00
Dylan Baker
3cfc127448 .pick_status.json: Updates notes for 9865e5dff4 2023-09-22 08:46:39 -07:00
Dylan Baker
f3789c8c60 .pick_status.json: Updates notes for 7e246f7f2b 2023-09-22 08:46:39 -07:00
Tapani Pälli
365d3dbea1 mesa: fix some TexParameter and SamplerParameter cases
EXT extension was added without tests so these functions did
not work properly.

Fixes: 799710be88 ("mesa: Add EXT_texture_mirror_clamp_to_edge to extension table")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24845>
(cherry picked from commit d65fe6eff1)
2023-09-22 08:46:38 -07:00
Dylan Baker
d9eb323a39 .pick_status.json: Updates notes for 93b4f200de 2023-09-22 08:46:38 -07:00
Georg Lehmann
f49e1ecce1 aco: fix u2f16 with 32bit input
The vulkan spec says all conversions are correctly rounded, so if the input
is larger than the largest fp16 value, we need to return MAX_FLOAT/inf
instead of cutting off the msbs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24826>
(cherry picked from commit 6d949e18fd)
2023-09-22 08:46:38 -07:00
Rhys Perry
e350c85372 aco: fix p_bpermute_gfx6 with input at non-zero byte
Same as the other bpermute pseudo instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
(cherry picked from commit 85957dd6e5)
2023-09-22 08:46:38 -07:00
Mike Blumenkrantz
3276347026 zink: don't start multiple cache jobs for the same program
if there's already a cache job in flight then starting a second one
is illegal

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
(cherry picked from commit d5157356ce)
2023-09-22 08:46:38 -07:00
Sagar Ghuge
23f0ecc3a2 blorp: Drop unnecessary assertions in blorp_can_hiz_clear_depth
We already checks for the alignment and the multislice surface, we don't
need to add assertions around those two.

fixes: 37fcbb375c ("blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too")
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9684

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24837>
(cherry picked from commit 839b03cc06)
2023-09-22 08:46:38 -07:00
Friedrich Vock
ab3518257c nir/load_store_vectorize: Handle intrinsics with constant base
This includes nir_load_stack and nir_store_stack, which are vectorized
in nir_lower_shader_calls. If not adjusted, we end up loading from
the wrong base.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
(cherry picked from commit a28ff7f240)
2023-09-22 08:46:38 -07:00
Chia-I Wu
9ddd8fffe9 ac/surface: limit RADEON_SURF_NO_TEXTURE to color surfaces
For z surfaces, flags.texture should be based on
RADEON_SURF_TC_COMPATIBLE_HTILE alone.  Otherwise, addrlib could pick a
_X/_T swizzle mode for a MSAA depth texture, which is said to be broken:

  When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane
  equation from wrong address within memory range a tile covered and use the
  garbage data for compressed Z reading which finally leads to corruption.

Fixes: de0885cdb8 ("amd/surface: add RADEON_SURF_NO_TEXTURE flag")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24767>
(cherry picked from commit e74c3dbb70)
2023-09-22 08:46:38 -07:00
Mike Blumenkrantz
f36e5c8558 zink: wait on async fence during ctx program removal
removed=true implies that no async jobs are outstanding

fixes #9580

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24811>
(cherry picked from commit ca987c0dfb)
2023-09-22 08:46:38 -07:00
Tatsuyuki Ishi
c71b07bc0c radv/amdgpu: Do not pass in a BO handle when clearing PRT VA region.
This field is invalid to access for virtual BOs.

Fixes: a931d5a4a4 ("radv/winsys: clear the PRT VA range when destroying a virtual BO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24805>
(cherry picked from commit 6c5512568b)
2023-09-22 08:46:38 -07:00
Samuel Pitoiset
0041529843 Revert "radv/amdgpu: skip adding per VM BOs for sparse during CS BO list build"
This reverts commit 51caece74c.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
(cherry picked from commit e3fae01730)
2023-09-22 08:46:38 -07:00
Samuel Pitoiset
657c8abc0e Revert "radv/amdgpu: workaround a kernel bug when replacing sparse mappings"
This workaround was added temporarily but it can actually cause
stuttering in some games like Forza Horizon 5.

The kernel fix
(https://lists.freedesktop.org/archives/amd-gfx/2023-June/094648.html)
landed in some stable kernels (5.15.121+, 6.1.40+ and 6.4.5+). Sadly,
older stable kernels don't have it, so you might experiment random GPU
hangs in games that use sparse mapping. Please ensure your kernel is
up-to-date for the best experience.

This reverts commit 9b00867327.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9443
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
(cherry picked from commit f67eb9ce07)
2023-09-22 08:46:38 -07:00
Marek Olšák
8084345d6e Revert "ac: don't call ac_query_pci_bus_info from ac_query_gpu_info"
This reverts commit a48642400b.

Instead, add a new parameter require_pci_bus_info to control the behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
(cherry picked from commit 5d19a0a19b)
2023-09-22 08:46:38 -07:00
Eric Engestrom
cb95664d18 v3d/qpu: fix type of function argument
Fixes: 05c7d9715b ("broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit 953ac9da79)
2023-09-22 08:46:38 -07:00
Eric Engestrom
c8a08be886 v3dv: fix shader stage name in error message
Fixes: 60145629a2 ("v3dv: initial CreateGraphicsPipeline/DestroyPipeline implementation")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit 8a1f3d0d73)
2023-09-22 08:46:38 -07:00
Eric Engestrom
c68687e356 v3dv: fix copy/pasted type of sample
And use the type in functions instead of a generic `uint32_t` to make it
easier to notice the wrong type.

Fixes: 47e02a2ef1 ("v3dv: add a fast path for vkCmdClearAttachments")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit ae0cb0b998)
2023-09-22 08:46:38 -07:00
Eric Engestrom
4b3549b1a3 v3dv: fix VK_PIPELINE_ROBUSTNESS_{BUFFER,IMAGE}_BEHAVIOR_DEVICE_DEFAULT_EXT copy/paste typo
Fixes: 24d9a80247 ("v3dv: implement VK_EXT_pipeline_robustness")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
(cherry picked from commit 4dc0cb1ebe)
2023-09-22 08:46:38 -07:00
Alyssa Rosenzweig
6de9ef12a2 nir/passthrough_gs: Fix array size
Triangle strips with adjacency have 6 vertices input, so we need an array big
enough for all 6 vertices to avoid overflow. Fixes passthrough GS generated for
KHR-GLES31.core.draw_indirect.basic-mode-*-triangle*adj*.

Fixes: ea14579f3d ("nir: handle primitives with adjacency")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24780>
(cherry picked from commit 558e36f641)
2023-09-22 08:46:38 -07:00
Dylan Baker
4a6ece1a4b Revert "Revert "intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR""
This reverts commit dd98f98764.
2023-09-22 08:46:38 -07:00
Dylan Baker
fcbd25798e .pick_status.json: Updates notes for f8cb0d8a44 2023-09-22 08:46:38 -07:00
Alyssa Rosenzweig
65d3635f4d nir/lower_helper_writes: Consider bindless images
These need to be handled like other image ops.

Fixes KHR-GLES31.core.shader_image_load_store.basic-allTargets-atomicFS on Asahi
with bindless image access forced.

Fixes: 586da7b329 ("nir: Add nir_lower_helper_writes pass")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24778>
(cherry picked from commit 04ba4059b7)
2023-09-22 08:46:38 -07:00
Eric Engestrom
d28bae9c3e zink: fix format in zink_make_{image,texture}_handle_resident()
`ds->db.format` is a `pipe_format`, while `buffer_infos[handle].format` is
a `VkFormat`; the conversion from one to the other was missing.

Fixes: 99ba529fee ("zink: implement descriptor buffer handling of bindless texture")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24790>
(cherry picked from commit ab0f0d1563)
2023-09-22 08:46:38 -07:00
Eric Engestrom
055cdd28be vc4: drop duplicate .lower_ldexp
It's set 3 lines above already.

Fixes: 2a33ea95d6 ("glsl: Retire ldexp lowering in favor of the nir lowering flag.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24786>
(cherry picked from commit af28356de0)
2023-09-22 08:46:38 -07:00
Pavel Ondračka
ea6d27e4de r300: don't abort on flow control when using draw for vs
It can handle it just fine. Around 250 dEQPs go from Skip to Pass.

Fixes: 1021e2b946
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24769>
(cherry picked from commit 8657a09f9a)
2023-09-22 08:46:38 -07:00
Faith Ekstrand
8ed55a67b4 nir: Fix metadata in nir_lower_is_helper_invocation
It does not preserve everything.  It adds and removes instructions and
even adds a variable.

Fixes: f17b41ab4f ("nir: add lowering pass for helperInvocationEXT()")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
(cherry picked from commit 831085afa3)
2023-09-22 08:46:38 -07:00
Sviatoslav Peleshko
6ba010772d dri: Use RGB internal formats for RGBX formats
These formats do not contain alpha channel, so their internal formats
should reflect that.

Fixes: bf576772 ("dri_util: add driImageFormatToSizedInternalGLFormat function")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9429
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24580>
(cherry picked from commit e62f2c48a0)
2023-09-22 08:46:38 -07:00
Karol Herbst
fbfcab3ad8 nv50: limit max code uploads to 0x8000
I have no idea why a bigger size doesn't work, the hardware doesn't
complain, but it turns out that uploading big shaders still causes issues
with the old limit. *shrug*

Fixes: 7f63d2ebdb ("nv50: fix code uploads bigger than 0x10000 bytes")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24758>
(cherry picked from commit 3e0cd6dfb9)
2023-09-22 08:46:38 -07:00
Emma Anholt
a75c0b091c disk_cache: Disable the "List" test for RO disk cache.
It uses a poll function that waits for a second hoping for another thread
to catch up, which is not a reliable way to do synchronization.  The test
has been spuriously failing merges on a regular basis recently.

This is issue #9222, which I'm leaving open until the author can fix the test.

Fixes: 3b69b67545 ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24755>
(cherry picked from commit 4dfd306454)
2023-09-22 08:46:38 -07:00
Mike Blumenkrantz
fb774d1dd1 Revert "vk/wsi/x11: handle geometry updating more asynchronously"
This reverts commit 36d5b58317.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24742>
(cherry picked from commit 8f3499bafc)
2023-09-22 08:46:38 -07:00
Karol Herbst
356d59d73b nouveau: take glsl_type ref unconditionally
Calling into tgsi_to_nir requires it, which we are running into with vdpau
and potential other state-trackers still handing us TGSIs over.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9481
Fixes: 5889c13fcd ("nv50,nvc0: Use ttn for tgsi shaders by default")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24740>
(cherry picked from commit 91029b7e87)
2023-09-22 08:46:38 -07:00
Mike Blumenkrantz
fa023847c1 vk/graphics: fix CWE handling with DS3
VkPipelineColorBlendStateCreateInfo::attachmentCount cannot be used to
generate the CWE mask since it cannot be read if enough dynamic state is in use

instead just pass the max mask and let drivers figure it out

cc: mesa-stable

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24673>
(cherry picked from commit 0fb9064231)
2023-09-22 08:46:38 -07:00
Faith Ekstrand
3de51743e1 nir: Don't handle nir_op_mov in get_undef_mask in opt_undef
It's unnecessary because earlier parts of the pass will ensure that a
mov of undef is turned into an undef.  It's also wrong because
nir_op_mov has different semantics from nir_op_vecN when it comes to how
sources map to destination components.

Fixes: 5f26c21e62 ("nir: Expand opt_undef to handle undef channels in a store intrinsic")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
(cherry picked from commit 408929289a)
2023-09-22 08:46:38 -07:00
Faith Ekstrand
95301ca3e5 nir: Handle nir_op_mov properly in opt_shrink_vectors
If the opcode is a mov, it falls into the nir_alu_src_is_trivial_ssa
case, not the vec case.

Fixes: 94eff7ccd8 ("nir: shrink phi nodes in nir_opt_shrink_vectors")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
(cherry picked from commit f9a17c6fef)
2023-09-22 08:46:38 -07:00
Rhys Perry
854c11ca7d radv: disable 64-bit color attachments
These work in some circumstances (dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_float_16_to_64.scalar9_tessc),
but I'm not sure if they work in all, blending certainly doesn't work and
this probably wasn't intended in the first place.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 01bd012edd ("amd: fix 64-bit integer color image clears")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
(cherry picked from commit 405f3bf990)
2023-09-22 08:46:37 -07:00
Dylan Baker
6927627664 .pick_status.json: Updates notes for aebe584586 2023-09-22 08:46:37 -07:00
Dylan Baker
7270fe95b6 .pick_status.json: Update to 10e75aae1b 2023-09-22 08:46:37 -07:00
Dylan Baker
ad234040e5 docs: update calendar for 23.2.0-rc3 2023-09-05 10:11:11 -07:00
Dylan Baker
6fb68b6bd9 docs: Extend calendar entries for 23.2 by 2 releases. 2023-09-05 10:10:59 -07:00
Dylan Baker
97980ebf6c VERSION: update to 23.2.0-rc3 2023-09-05 09:48:17 -07:00
Dor Askayo
69f5c51b2d nouveau: add exported GEM handles to the global list
Adding GEM handles to the global list is necessary to allow
maintaining a single reference count for handles that are shared
between multiple buffer objects.

Since exported handles can end up being shared with other buffer
objects, as in the case that drmPrimeHandleToFD() and gbm_bo_import()
are called externally to Mesa, they too must be added to the global
list.

Unfortunately, doing this properly requires a new libdrm API. Use
the best possible option for now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9552

Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Acked-by: Karol Herbst <git@karolherbst.de>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24648>
(cherry picked from commit daa1f789b5)
2023-09-01 11:58:23 -07:00
Karol Herbst
fc9ecb5931 nv50: fix code uploads bigger than 0x10000 bytes
The hardware has a max limit on how much data we can upload in one go via
the 2D engine. Just split the uploads up.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9571
Acked-by: M Henning <drawoc@darkrefraction.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24706>
(cherry picked from commit 7f63d2ebdb)
2023-09-01 11:58:23 -07:00
Julia Tatz
f6149e7ff6 aux/trace: fix set_hw_atomic_buffers method name
Fixes: b2dc63ed8c ("aux/trace: Add pipe_context::set_hw_atomic_buffers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>
(cherry picked from commit 9d1da9ec20)
2023-09-01 11:58:23 -07:00
Julia Tatz
0f12f5dba6 gallium/dri: fix dri2_from_names
`createImageFromNames` uses fourcc, not dri_image_formats

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8547
Fixes: 433ca3127a ("st/dri: replace format conversion functions with single mapping table")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24597>
(cherry picked from commit c4133a110d)
2023-09-01 11:58:22 -07:00
Mike Blumenkrantz
8aca433f4a nir/zink: fix gs emulation xfb_info sizing
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>
(cherry picked from commit df238e8fc0)
2023-09-01 11:52:20 -07:00
Rhys Perry
9386fe103e aco: don't create sendmsg(dealloc_vgprs) if scratch is used
LLVM does something similar: https://reviews.llvm.org/D153295

fossil-db (gfx1100):
Totals from 21 (0.02% of 133461) affected shaders:
Instrs: 147428 -> 147396 (-0.02%)
CodeSize: 797188 -> 797060 (-0.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2930317cea ("aco/gfx11: deallocate VGPRs at the end of the shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24669>
(cherry picked from commit c9b177db0e)
2023-09-01 11:52:20 -07:00
Italo Nicola
7033e01692 egl: reenable partial redraw with a warning when using gallium hud
Partial revert of e516a0a94f ("egl: disable partial redraw when gallium
hud is active").

We shouldn't change the behavior of the application when the hud is
enabled, doing so could make it harder do diagnose issues. Instead, now
we warn and ask the user to manually disable the extension if he
considers it to be worth it.

Fixes: e516a0a94f ("egl: disable partial redraw when gallium hud is active")
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23456>
(cherry picked from commit 2edf222abd)
2023-09-01 11:52:19 -07:00
Paul Gofman
a45b1aecf5 driconf: add a workaround for Captain Lycop: Invasion of the Heters
CC: mesa-stable

Tested-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24639>
(cherry picked from commit 6a2a36d7dd)
2023-09-01 11:52:19 -07:00
Mike Blumenkrantz
e59fb5130a u/draw: skip zero-sized indirect draws
cc: mesa-stable

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24631>
(cherry picked from commit 581f6fb7c8)
2023-09-01 10:39:38 -07:00
Rhys Perry
34b2f00d9c aco: summarize register demand after handling branches
Fixes various dEQP-VK.ray_query.builtin.rayqueryterminate.* crashes.

fossil-db (gfx1100):
Totals from 196 (0.15% of 133461) affected shaders:
PreSGPRs: 8342 -> 8558 (+2.59%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 5a536eca9c ("aco: calculate correct register demand for branch instructions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24579>
(cherry picked from commit efb80c1715)
2023-09-01 10:39:37 -07:00
Mike Blumenkrantz
8dab73cab2 zink: fix crash in lower_pv_mode_gs_store
src->parent can be null

Fixes: 39770c6503 ("zink: fix store subsitution in `lower_pv_mode_gs_store`")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24642>
(cherry picked from commit 04dbb556c2)
2023-09-01 10:39:37 -07:00
Lionel Landwerlin
2febfbce39 anv: don't try to access dynamic buffers from surface states
Even with direct descriptors, our current implementation works by
doing A64 messages to read/write dynamic buffers. This is so that we
can apply the sliding range view of the descriptor while having
robustness support.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 06dfd216d3 ("anv: add direct descriptor support to apply_layout")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24256>
(cherry picked from commit 7ec12b537a)
2023-09-01 10:39:36 -07:00
David Rosca
a2204efb8f frontends/va: Ignore requested size when creating VAEncCodedBufferType
The buffer data is not directly accessible to application and it's
internally used to only store VACodedBufferSegment struct.
Ignore the size requested by application and instead allocate
sizeof(VACodedBufferSegment). Use calloc to zero out the struct.

This can save significant amount of memory, for example FFmpeg
will request up to tens of MB for single buffer.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6462

Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24410>
(cherry picked from commit 7bcbfae87c)
2023-09-01 10:39:35 -07:00
David Heidelberg
94f2aaca0c ci/deqp: really remove the uncompressed results.csv file
Arguments are parsed in order, so the `-c` here causes that first `--rm`
won't get applied and then it gets overriden by `-o` which writes the file.

Sadly zstd won't report this as a issue, but that's being reported in [1],
so maybe in future versions zstd will warn about it.

[1] https://github.com/facebook/zstd/issues/3719

Fixes: d110299d77 ("ci/deqp-runner: compress results.csv before uploading it to GitLab")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24651>
(cherry picked from commit 9bf104f934)
2023-09-01 10:39:35 -07:00
Samuel Pitoiset
6d080b3e82 vulkan: ignore VkPipelineColorWriteCreateInfoEXT if the state is dynamic
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24601>
(cherry picked from commit ce0c70fb0c)
2023-09-01 10:39:34 -07:00
Janne Grunau
dbb887f013 asahi,agx: Fix stack buffer overflow in agx_link_varyings_vs_fs
Discovered while running dEQP-EGL under address sanitizer.

Fixes: f3877f56ba ("asahi,agx: Rewrite varying linking")
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
(cherry picked from commit 3f8894b0f7)
2023-09-01 10:39:30 -07:00
Derek Foreman
65d0399ccb vulkan/wsi: Allow binding presentation_timing when software rendering
The presentation timing extension is used for doing WaitForPresent
properly, but we accidentally bind it after an early return intended to
stop us from binding dmabuf when software rendering.

Remove the early return.

cc: mesa-stable

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24588>
(cherry picked from commit 5ba5bcf2b6)
2023-08-31 23:41:23 -07:00
Eric Engestrom
8b5492aa31 panfrost: upcast uint8/uint16 before shifting them beyond their range
../src/panfrost/compiler/compiler.h:89:14: runtime error: left shift of 51966 by 16 places cannot be represented in type 'int'
        #0 0x55c72fd7dda4 in bi_apply_swizzle ../src/panfrost/compiler/compiler.h:89
        #1 0x55c72fd808d6 in bi_source_value ../src/panfrost/compiler/bi_opt_constant_fold.c:35
        #2 0x55c72fd80a83 in bi_fold_constant ../src/panfrost/compiler/bi_opt_constant_fold.c:52
        #3 0x55c72fb2080c in constant_fold_pred ../src/panfrost/compiler/test/test-constant-fold.cpp:48
        #4 0x55c72fb21a65 in ConstantFold_Swizzles_Test::TestBody() ../src/panfrost/compiler/test/test-constant-fold.cpp:103
        #5 0x55c73070cc97 in void testing::internal::HandleSehExceptionsInMethodIfSupported<testing::Test, void>(testing::Test*, void (testing::Test::*)(), char const*) ../src/gtest/src/gtest.cc:2621
        #6 0x55c7306f0df7 in void testing::internal::HandleExceptionsInMethodIfSupported<testing::Test, void>(testing::Test*, void (testing::Test::*)(), char const*) ../src/gtest/src/gtest.cc:2657
        #7 0x55c730694add in testing::Test::Run() ../src/gtest/src/gtest.cc:2696
        #8 0x55c73069798d in testing::TestInfo::Run() ../src/gtest/src/gtest.cc:2845
        #9 0x55c73069b684 in testing::TestSuite::Run() ../src/gtest/src/gtest.cc:3004
        #10 0x55c7306ccfcb in testing::internal::UnitTestImpl::RunAllTests() ../src/gtest/src/gtest.cc:5890
        #11 0x55c73071053c in bool testing::internal::HandleSehExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool>(testing::internal::UnitTestImpl*, bool (testing::internal::UnitTestImpl::*)(), char const*) ../src/gtest/src/gtest.cc:2621
        #12 0x55c7306f4ed3 in bool testing::internal::HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool>(testing::internal::UnitTestImpl*, bool (testing::internal::UnitTestImpl::*)(), char const*) ../src/gtest/src/gtest.cc:2657
        #13 0x55c7306c23fa in testing::UnitTest::Run() ../src/gtest/src/gtest.cc:5455
        #14 0x55c730748faf in RUN_ALL_TESTS() ../src/gtest/include/gtest/gtest.h:2314
        #15 0x55c730748ffa in main ../src/gtest/src/gtest_main.cc:63
        #16 0x7f8554bcc1c9 in __libc_start_call_main ../sysdeps/nptl/libc_start_call_main.h:58
        #17 0x7f8554bcc284 in __libc_start_main_impl ../csu/libc-start.c:360
        #18 0x55c72fb18be0 in _start (/builds/mesa/mesa/_build/src/panfrost/compiler/bifrost_tests+0xbd0be0)

Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24610>
(cherry picked from commit 54c7099087)
2023-08-31 23:41:22 -07:00
Friedrich Vock
5e903eeffa radv: Handle VK_SUBOPTIMAL_KHR in trace layers
vkQueuePresentKHR might return VK_SUBOPTIMAL_KHR which is not VK_SUCCESS
but presentation succeeded anyway. We should capture a trace even if
VK_SUBOPTIMAL_KHR is returned.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24052>
(cherry picked from commit b8edd19358)
2023-08-31 23:41:22 -07:00
Mike Blumenkrantz
3841203348 zink: fix big tcs output io
as in the producer case, big io needs to reserve the appropriate number
of slots

fixes:
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-float-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-float-index-wr-before-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec2-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec2-index-wr-before-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec3-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec3-index-wr-before-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec4-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec4-index-wr-before-barrier,Fail

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>
(cherry picked from commit ee6ba2bb57)
2023-08-31 23:41:18 -07:00
Mike Blumenkrantz
1287fbdb3a zink: explicitly set non-optimal last_vertex_stage shader key on ctx create
this otherwise results in generated gs not having the flag set, which breaks
various things

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>
(cherry picked from commit ccc195c3a3)
2023-08-31 23:41:16 -07:00
Mike Blumenkrantz
cd5e0498c5 lavapipe: block yuv formats from getting blit feature flags
this is illegal

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
(cherry picked from commit cee494aafd)
2023-08-31 23:41:16 -07:00
Mike Blumenkrantz
db50924867 lavapipe: fix resolves where src image has a layer offset
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
(cherry picked from commit 9e2f95eae3)
2023-08-31 23:41:15 -07:00
Mike Blumenkrantz
7f37c0d07d llvmpipe: fix early depth + alpha2coverage + occlusion query interaction
in this scenario, sample counting must happen before a2c, as a2c may eliminate
coverage if alpha is zero, leading to a sample count of zero

dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_4_maintenance5

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
(cherry picked from commit ce09458917)
2023-08-31 23:41:14 -07:00
Mike Blumenkrantz
865584a081 llvmpipe: block weird uses of subsampled formats in buffers
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24589>
(cherry picked from commit 632d4de214)
2023-08-31 23:41:13 -07:00
timmac-qmc
b69bf84d23 glsl: fix potential crash with DisableUniformArrayResize
We still need to gather information on uniform use when skipping
uniform array resize.

Fixes: ac5af6c0 ("util/driconf: add Dune: Spice Wars workaround")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24576>
(cherry picked from commit ae5a08de67)
2023-08-31 23:41:13 -07:00
Mike Blumenkrantz
da9cf451f5 zink: generated tcs is on the tes, not the vs
not sure how I screwed this up

Fixes: 4c47d83051 ("zink: use EXT_shader_object to implement generic separate shader precompile")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24581>
(cherry picked from commit 717ad8c5c8)
2023-08-31 23:41:11 -07:00
Lionel Landwerlin
6c71fd3e55 hasvk: fix null descriptor handling with A64 messages
This replicates the same fix we did for Anv and null descriptors with
A64 messages from commit efcda1c530 ("anv: fix null descriptor
handling with A64 messages").

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
(cherry picked from commit 0e5b4b1b43)
2023-08-31 23:41:08 -07:00
Mike Blumenkrantz
7cd58273cc aux/trace: fix winsys handle dumping
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24493>
(cherry picked from commit 8dd2691020)
2023-08-31 23:41:07 -07:00
Mike Blumenkrantz
b39929ed5c zink: add more locking for pipeline cache
this ensures the size remains constant for entry updates

fixes #9494

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24559>
(cherry picked from commit 1c1e09249c)
2023-08-31 23:41:06 -07:00
Mike Blumenkrantz
00ee04948b zink: set msrtss depth resolve mode when enabled
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
(cherry picked from commit cf8fe9baec)
2023-08-31 23:41:05 -07:00
Mike Blumenkrantz
622b4eee12 zink: don't append msrtss to dynamic render if not supported
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
(cherry picked from commit 2630a89b72)
2023-08-31 23:41:05 -07:00
Mike Blumenkrantz
98427a3dd5 zink: don't add VK_IMAGE_USAGE_ATTACHMENT_FEEDBACK_LOOP_BIT_EXT for transient images
this is illegal

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
(cherry picked from commit 751407a59a)
2023-08-31 23:41:04 -07:00
Mike Blumenkrantz
55e9c2d6ed zink: fix zs resolve attachment indexing
this has never been tested until now

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
(cherry picked from commit 300cbedc78)
2023-08-31 23:41:03 -07:00
Mike Blumenkrantz
9b18378a2c zink: add batch refs for transient images
ensure these don't get deleted while in use

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24309>
(cherry picked from commit 5ac2291c6b)
2023-08-31 23:41:02 -07:00
Samuel Pitoiset
633ec3e714 radv/rt: fix capture/replay support
When replaying a RT pipeline, RADEON_FLAG_REPLAYABLE should be set.

The idea is that for capture, RADEON_FLAG_REPLAYABLE should be passed
when allocating a BO (ie. replay_va would be 0), and then for replay
the VA would be non-zero but the flag is also required.

Fixes
dEQP-VK.ray_tracing_pipeline.pipeline_library.configurations.multithreaded_compilation.*.

Fixes: 744357477e ("radv: Add utilities to serialize and deserialize shader allocation info")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24543>
(cherry picked from commit 1b66ebf09a)
2023-08-31 23:40:59 -07:00
David Heidelberg
926e9547c1 ci: add perfetto into mesa git-cache
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8821

Fixes: 8aff228127 ("ci: Enable building the testing drivers with perfetto.")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23611>
(cherry picked from commit c4357c6c49)
2023-08-31 23:40:59 -07:00
Samuel Pitoiset
83428a9933 zink: fix setting VkShaderCreateInfoEXT::nextStage
nextStage has some restrictions depending on the current stage.

Fixes: cd6625c6eb ("zink: use EXT_shader_object to (re)implement separate shaders")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24558>
(cherry picked from commit 478a18aa3d)
2023-08-31 23:40:58 -07:00
Julian Hagemeister
982b3d8fc8 Gallium: Fix shared memory segment leak
Commit abe6d750e5 caused shared memory
segments to be leaked. We need to mark shared memory segments for
deletion upon construction.

Fixes: abe6d750e5 xlib: fix glXDestroyContext in Gallium frontends
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9425
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24556>
(cherry picked from commit 4c11fe8ae6)
2023-08-31 23:40:57 -07:00
Martin Stransky
d212fb6009 llvmpipe: fix UAF in lp_scene_is_resource_referenced.
reworked slightly by airlied

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24414>
(cherry picked from commit 87ec9456be)
2023-08-31 23:31:00 -07:00
Timothy Arceri
58e1cd7c68 glsl: fix spirv sso validation
The api validation calls will segfault without this as it will
try to fallback to string matching names which are NULL. This
would be incorrect behaviour even if the names weren't NULL so
here we correctly set the explicit location flag.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9483
Fixes: ffdb44d3a0 ("nir/linker: Add inputs/outputs to the program resource list")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24529>
(cherry picked from commit a7850f8cf3)
2023-08-31 23:30:46 -07:00
Dave Airlie
a60992ccea zink: turn off threaded cpu access if not visible.
This turns off the threaded cpu access it the resource isn't visible.

Fixes a bunch of crashes with current nvk.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24548>
(cherry picked from commit ae6be7a44a)
2023-08-31 23:30:46 -07:00
Mike Blumenkrantz
7ca1c73798 nir/linking_helpers: force type matching in does_varying_match
this otherwise breaks when i/o is scalarized in the producer but not
the consumer

cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24458>
(cherry picked from commit ac00f5a361)
2023-08-31 23:30:46 -07:00
Mike Blumenkrantz
11bbf33e31 nir/lower_io_to_scalar: fix 64bit io splitting
this was creating broken 64bit loads/stores using 32bit component
size

cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24458>
(cherry picked from commit 58ba2bcc8c)
2023-08-31 23:30:46 -07:00
Rob Clark
82db601297 tu/drm: Add missing error path cleanup
Fixes: bea6290ca0 ("turnip: device global bo list")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23533>
(cherry picked from commit 84524cfdfa)
2023-08-31 23:30:46 -07:00
Mike Blumenkrantz
d65ebabbb1 zink: unset line stipple ds3 state flags when stipple not available
Fixes: 7b4c1b3a42 ("zink: track and apply ds3 states only on change")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24478>
(cherry picked from commit 122ffb0c88)
2023-08-31 23:30:46 -07:00
Mike Blumenkrantz
575d50721e zink: use VK_WHOLE_SIZE when binding null db buffer descriptors
using range=0 is illegal

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24478>
(cherry picked from commit b2a9881475)
2023-08-31 23:30:46 -07:00
Luigi Santivetti
06c60e7936 pvr: do not claim support for ASTC texture compression
We don't support any ASTC formats yet, but the textureCompressionASTC_LDR
feature was incorrectly set to true. Fix this by setting it to false and
don't advertise ASTC support for texture compression.

Fixes dEQP-VK.api.info.format_properties.compressed_formats

Fixes: 8991e646 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24448>
(cherry picked from commit c5a6e88c4e)
2023-08-31 23:30:45 -07:00
Mike Blumenkrantz
6f9cd27721 zink: force image barriers after dmabuf import
if the image will be used, then it has to be on the right queue

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24492>
(cherry picked from commit 4f5bfc6691)
2023-08-31 23:30:45 -07:00
Mike Blumenkrantz
80f1e28d56 zink: better handle separate shader dsl creation when no bindings exist
this otherwise underflows the array and provides a (probably huge) garbage
value for the binding id, which then causes the driver to massively overallocate
both the layout and set/pool/buffer

the main result of this is that on radv any simple test that should be near-instant
takes 2-3 seconds to execute, which somehow nobody noticed

Fixes: e3b746e3a3 ("zink: use GPL to handle (simple) separate shader objects")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24501>
(cherry picked from commit 652e87bc5d)
2023-08-31 23:30:45 -07:00
Gert Wollny
b5330ce1d4 r600/sfn: Take source uses into account when switching channels
When we switch the channels by re-creating vec4 values we have to
take into account that the source values may be used in an ALU op,
and with that we have to take read-port limitations into account.

Fixes: 18a8d148d8
    r600/sfn: Cleanup copy-prop into vec4 source values

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24519>
(cherry picked from commit 807c0d6bb7)
2023-08-31 23:30:45 -07:00
Sylvain Munaut
77e4c75f8b egl/dri2: Add a couple of missing mutex release in error path
This is causing a hang in the intel compute runtime when
trying to cl/gl share an unsupported texture format.

Fixes: f1efe037df ("egl/dri2: Add display lock")

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24487>
(cherry picked from commit a0a5d0f02e)
2023-08-31 23:30:45 -07:00
Karol Herbst
3b87165497 n50/compute: submit initial compute state in nv50_screen_create
This fixes some CACHE_ERROR caused by proper multi-threading support. The
bug is a bit older though, just never triggered because there was only one
push buffer to begin with.

Without this change the compute initialization stayed unpushed in the
screen push buffer causing random issues.

Fixes: ff72440b40 ("nv50: implement a basic compute support")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24496>
(cherry picked from commit a9a30a7e09)
2023-08-31 23:30:45 -07:00
Faith Ekstrand
2cbed72bca Revert "compiler: Combine duplicated implementation of is_gl_identifier into glsl_types.h"
This reverts commit f9860a84b3.  It's a
bit annoying having this scattered around but it's 100% a GLSL thing and
there's no reason why it should go in glsl_types.h.  The fact that
glsl_print_type() even uses it is a bit sketchy.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24491>
(cherry picked from commit bf6d6a0934)
2023-08-31 23:30:45 -07:00
Faith Ekstrand
f3e44738a5 Revert "mesa, compiler: Move gl_texture_index to glsl_types.h"
This reverts commit 1b836a52ea.  This
patch, while claiming to decouple things, actually increases coupling
because it leaks two OpenGL state tracker limits and an OpenGL state
tracker fixed binding enum into the entire compiler.  Nothing wants to
know these outside the OpenGL state tracker and the GL-specific compiler
passes.  Put them back where they were.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24491>
(cherry picked from commit b89a48e00d)
2023-08-31 23:30:45 -07:00
David Heidelberg
aa93c7f27d ci/amd: fix timeouting radeonsi-raven-va-full job
LAVA needs to know that job will run more than default 30 minutes.

Fixes: ae9c67d773 ("ci/amd: add radeonsi-raven-va-full job to cover all VA-API tests")

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24469>
(cherry picked from commit 57b0db63e1)
2023-08-31 23:30:45 -07:00
David Rosca
bef65f3d02 frontends/va: Init view_resources array in vlVaPut/GetImage
Fixes crash when VA format num_planes > surface num_planes.

Fixes: 975a8ecc88 ("frontends/va: use resources instead of views")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9377

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24381>
(cherry picked from commit c545df7426)
2023-08-31 23:30:45 -07:00
Dave Airlie
35a3ad61eb llvmpipe: fix fragdata/lastfragdata heuristic a bit more.
This heuristic broke when zmike lowered fragcolor using NIR,

This fixes a regression in:
dEQP-GLES31.functional.shaders.framebuffer_fetch.basic.last_frag_data

Fixes: db1371cce1 ("llvmpipe: fix handling of unused color attachments")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24435>
(cherry picked from commit 773d77dc7e)
2023-08-31 23:30:45 -07:00
Gert Wollny
f5bf61309b r600/sfn: AR loads should depend on all previous non ALU instructions
These instructions could be re-ordered, so depending just on the last one
is not sufficient.

Fixes: d21054b4bc
   r600/sfn: Add pass to split address and index register loads

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24454>
(cherry picked from commit 4c3fc03d7f)
2023-08-31 23:30:45 -07:00
Gert Wollny
edc089f737 r600/sfn: Only switch to other CF if no AR uses are pending
Otherwise we end up with an incorrect array load (or an assertion failure).

Fixes: d617052db6
    r600/sfn: take address loads into account when scheduling

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24454>
(cherry picked from commit 5b75d86df9)
2023-08-31 23:30:45 -07:00
Mike Blumenkrantz
a94771b5eb lavapipe: don't check geometry for fb attachments
this is broken since surfaces always have minified geometry

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24339>
(cherry picked from commit 4de7e0034a)
2023-08-31 23:30:45 -07:00
Mike Blumenkrantz
5c49c20fe5 glsl: only explicitly check GS components in PSIZ injection with output variables
if no output variables exist then there's plenty of room for a psiz

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24182>
(cherry picked from commit b398036c73)
2023-08-31 23:30:45 -07:00
Georg Lehmann
cd539c327c aco: fix non constant 16bit bitnz/bitz
Fixes: 573e98f34a ("aco: implement nir_op_bitz/bitnz")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24420>
(cherry picked from commit 82920c99a5)
2023-08-31 23:30:45 -07:00
Karol Herbst
cfe298dcb6 rusticl/kernel: only handle function_temp memory before lowering printf
There was no need to handle the other variable modes. This also fixes
double accounting of shared memory.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9058
Fixes: 5795ee0e08 ("rusticl: translate spirv to nir and first steps to kernel arg handling")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24398>
(cherry picked from commit 01cb01a7ee)
2023-08-31 23:30:45 -07:00
Danylo Piliaiev
9584fbf7d3 radv: fix unused non-xfb shader outputs not being removed
It was not taken into account that without Offset decoration
the output is not written into XFB.

Aside from eliminating more outputs this change prevents gl_PerVertex
builtins generated by glslang from being kept alive in case when XFB
is enabled. Keeping such outputs alive may upset a driver.

VUID-StandaloneSpirv-Offset-04716:
    "Only variables or block members in the output interface decorated
    with Offset can be captured for transform feedback, and those
    variables or block members must also be decorated with XfbBuffer
    and XfbStride, or inherit XfbBuffer and XfbStride decorations from
    a block containing them"

Additional info about glslang behavior could be found at:
 https://github.com/KhronosGroup/glslang/issues/1526

Fixes: e95531e101
("radv: fix gathering XFB info if there is dead outputs")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24318>
(cherry picked from commit 81407797b9)
2023-08-31 23:30:45 -07:00
Rhys Perry
12164d05fc radv: correctly skip MRT output NaN fixup for meta shaders
radv_nir_compiler_options::enable_mrt_output_nan_fixup is only used for
epilogs, these days.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 290c3d360e ("aco,radv: lower outputs to exports when nir for monolithic ps")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9414
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24352>
(cherry picked from commit 76232d6724)
2023-08-31 16:08:05 -07:00
Rohan Garg
4ec17ca7df anv: partially revert 2e8b1f6d
set_image_compressed_bit checks for the image aux usage whereas
cmd_buffer_mark_image_written checks for the subresource's aux usage.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 2e8b1f6d ('anv: drop duplicate checks when setting the compressed bit')
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24363>
(cherry picked from commit 7f6e6eb8ec)
2023-08-31 16:08:04 -07:00
Lionel Landwerlin
de27a950cc anv: fix 3DSTATE_RASTER::APIMode field setting
The APIMode field is set in the dynamic part in gfx8_cmd_buffer.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 55951ac28e ("anv: fix emitting dynamic primitive topology")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24395>
(cherry picked from commit a0179c32b6)
2023-08-31 16:08:03 -07:00
Rhys Perry
b0df686feb radv: workaround WWZ exporting index=1 through location=1
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 290c3d360e ("aco,radv: lower outputs to exports when nir for monolithic ps")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9232
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24354>
(cherry picked from commit e88c077096)
2023-08-31 16:08:03 -07:00
Gert Wollny
cff883a5fd r600/sfn: Don't try to propagate to vec4 with more than one use
Otherwise we end up with weird dependencies that make the scheduler
choke.

Fixes: 18a8d148d8
    r600/sfn: Cleanup copy-prop into vec4 source values

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24393>
(cherry picked from commit 618fc13db7)
2023-08-31 16:08:02 -07:00
Karol Herbst
63968a36f8 nv50/ir/nir: Fix zero source handling of tex instructions.
For TXQ we know make sure that we at least add one source. If the nir
instruction however didn't had any sources, we inserted a fake 0 source
ending up with two 0s for TXQ.

It's unclear to me if we have other ops where this would be necessary.

Fixes: 85a31fa1fc ("nv50/ir/nir: fix txq emission on MS textures")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24373>
(cherry picked from commit 8d7f682bdb)
2023-08-31 16:08:02 -07:00
Mike Blumenkrantz
5073369d9c lavapipe: use the component offset directly for xfb
the mask is only indicative of the components being used, not the offset
from which they start

cc: mesa-stable

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>
(cherry picked from commit 330f728cc4)
2023-08-31 16:08:01 -07:00
Mike Blumenkrantz
4ce8ed7bbe nir: fix slot calculations for compact variables with location_frac
a variable with a component offset may span multiple slots, and this cannot
be inferred from its type alone (e.g., compacted clip+cull distances)

cc: mesa-stable

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163>
(cherry picked from commit 59396eefe6)
2023-08-31 16:08:01 -07:00
Eric Engestrom
6fd9633b57 bin/ci_run_n_monitor: get git sha from pipeline if specified, instead of requiring --rev to match
Fixes: 9ce717ab31 ("ci_run_n_monitor: add ability to specify the pipeline to use, instead of auto-detecting it")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24366>
(cherry picked from commit 42021b4d13)
2023-08-31 16:08:00 -07:00
Konstantin Seurer
ee1ab0a687 llvmpipe: Zero extend vectors in widen_to_simd_width
Extending using the first element vould extend the exec_mask (-1, 0, 0,
0) to (-1, 0, 0, 0, -1, -1, -1, -1).

Fixes: 573b8f2 ("gallivm: Implement vulkan textures")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9435
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24340>
(cherry picked from commit 0a07431e9a)
2023-08-31 16:07:59 -07:00
Alex Denes
7b4d0bdf37 virgl: link VA driver with build-id
Without a build-id the virgl VAAPI driver segfaults trying to access the
NULL returned by the build-id header retriever used for disk caches

Fixes: d6db4d2e08 ("virgl: Add simple disk cache")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19885>
(cherry picked from commit 16a66a67ef)
2023-08-31 16:07:59 -07:00
Benjamin Cheng
d44c08ce89 radv/video: use app provided hevc scaling list order
This partially reverts commit da54b578.

Vulkan spec defers the definition of these lists to the H265 ITU spec,
which defines the scaling lists to be in "up-right diagonal scan order"
already.

Fixes: da54b578 ("radv/video: fix hevc scaling lists.")
Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24356>
(cherry picked from commit 3629b43822)
2023-08-31 16:07:58 -07:00
Karol Herbst
68cf3ae3e1 nv50/ir/nir: fix txq emission on MS textures
In GL and a lot of Vulkan if we end up with either a lod or an ms index.

Sadly in Vulkan we can end up with both and have to choose properly. For
TXQ we have to emit a zero LOD. For TXF we have to emit the ms index.

Fixes: bb032d8b62 ("nv50/ir/nir: implement nir_instr_type_tex")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24343>
(cherry picked from commit 85a31fa1fc)
2023-08-31 14:36:23 -07:00
Zhang Ning
dd98f98764 Revert "intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR"
This reverts commit da4b5b4a47.

Signed-off-by: Zhang Ning <zhangn1985@outlook.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23815>
(cherry picked from commit 06db9bd3f6)
2023-08-31 14:36:22 -07:00
Mike Blumenkrantz
af25afc9d6 zink: don't clobber descriptor mode on multiple screen creation
the env var should only ever be read if the mode is unset

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>
(cherry picked from commit 626e3a6e34)
2023-08-31 14:36:21 -07:00
Mike Blumenkrantz
0c84f8d915 glxsw: check geometry of drawables on creation
this mimics the dri codepath and allows early rejection of invalid
drawables to avoid subsequent breakage

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>
(cherry picked from commit 7100ef4566)
2023-08-31 14:36:20 -07:00
Mike Blumenkrantz
4171bb1239 kopper: handle pixmap creation failure more gracefully
cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24075>
(cherry picked from commit 2b71e645bc)
2023-08-31 14:36:19 -07:00
Mike Blumenkrantz
82836d18d5 zink: fix the fix for separate shader program refcounting
the previous fix fixed the initial refcount but then left a dangling
ref when doing the optimized program replacement

Fixes: 4e38061643 ("zink: fix separate shader program refcounting")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24255>
(cherry picked from commit 318d0316dd)
2023-08-31 14:36:18 -07:00
Gert Wollny
42f5a922b4 r600/sfn: Fix use of multiple IDX with kcache
Currently we don't properly support using he two IDX registers in the
same ALU CF, so work around this by enforcing a new CF if both indices
are used.

Fixes: d21054b4bc
    r600/sfn: Add pass to split addess and index register loads

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
(cherry picked from commit 1d4dd664e0)
2023-08-31 14:36:17 -07:00
Konstantin Seurer
3b6dd8ff1c llvmpipe: Fix compiling with LP_USE_TEXTURE_CACHE
Fixes: 36eb75d ("llvmpipe: move to common sampler/image binding code")
Closes: #9359

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24243>
(cherry picked from commit 01266f8119)
2023-08-31 14:36:15 -07:00
Bas Nieuwenhuizen
f896a02a35 nir: Fix 16-component nir_replicate.
Fixes: f534c2c539 ("nir/builder: Add nir_replicate helper")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24286>
(cherry picked from commit c2e3986326)
2023-08-31 14:36:13 -07:00
Rhys Perry
7f6d610bb7 aco: insert s_nop before VGPR deallocation
A hazard requires this, apparently.

https://reviews.llvm.org/D155681

fossil-db (gfx1100):
Totals from 23175 (17.36% of 133461) affected shaders:
Instrs: 41240100 -> 41263275 (+0.06%)
CodeSize: 211858524 -> 211951224 (+0.04%)
Latency: 469738570 -> 469738576 (+0.00%)
InvThroughput: 58013998 -> 58013999 (+0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24320>
(cherry picked from commit 37fbfa655a)
2023-08-31 11:02:16 -07:00
Emma Anholt
db57b09df2 ci/tu: Drop some xfails for !24086
Fixes: 99e58460ef ("tu: Fix zombie VMAs array not initialized when first BOs may be freed")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24322>
(cherry picked from commit a3e3609590)
2023-08-31 11:02:15 -07:00
Alyssa Rosenzweig
1bc531b420 nir/lower_blend: Fix 32-bit logicops
nir_const_value_for_int asserts signed bounds on the input, but we pass in an
unsigned value that would be out-of-bounds for 32-bit channels, causing the
assert to fail for 32-bit channel formats.

Fixes dEQP-VK.pipeline.monolithic.logic_op.r32_uint.* on AGXV (and probably
PanVK).

Fixes: dbd0615e7a ("nir/lower_blend: Avoid useless iand with logic ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24252>
(cherry picked from commit 9c0740211d)
2023-08-31 11:02:14 -07:00
Alyssa Rosenzweig
406020bfaf nir/trivialize: Handle more RaW hazards
Consider the snippet of NIR:

   div 32    %447 = @load_reg (%442) (base=0, legacy_fabs=0, legacy_fneg=0)
   div 32    %463 = @load_reg (%442) (base=0, legacy_fabs=0, legacy_fneg=0)
   con 32    %409 = iadd %17 (0x3), %447
                    @store_output (%182 (0x601), %463) (base=0, wrmask=x, component=0, src_type=invalid...
                    @store_reg (%409, %442) (base=0, wrmask=x, legacy_fsat=0)

The load_reg's are trivial, so the %442 read will get folded into store_output.
But under the old definition, the store_reg is also trivial so it gets folded
into the iadd... causing a read-after-write hazard and invalid code generation.

The fix is to amend our definition of store_reg triviality to account for loads
getting folded in. It's not good enough that there's no intervening load_reg,
there can also be no intervening source that gets chased to a load_reg. Handle
that case as well.

Identified in dEQP-VK.geometry.input.basic_primitive.triangles_adjacency on
V3DV.

Fixes: d313eba94e ("nir: Add pass for trivializing register access")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24153>
(cherry picked from commit 0655bada4b)
2023-08-31 11:02:14 -07:00
Faith Ekstrand
ddad2d3af1 nir/trivialize: Trivialize cross-block loads
In order for a register load to be trivial, it cannot be used in any
block other than the one in which it is loaded.  We're not currently
explicitly doing anything to ensure this invariant holds.  It may be
that it holds regardless but I couldn't find any documented reason why
it should so let's explicitly handle that case.  Worst case, the newly
added code does nothing.

Fixes: d313eba94e ("nir: Add pass for trivializing register access")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24153>
(cherry picked from commit f8b69abbd4)
2023-08-31 11:02:13 -07:00
Faith Ekstrand
830ea32059 nir/trivialize: Maintain divergence information
Because this pass is intended to be run after out-of-SSA and directly
before injesting the NIR into the back-end, it may come after divergence
analysis and needs to preserve the divergence information. Fortunately,
since all we ever do is insert nir_op_mov, this is easy.

Fixes: d313eba94e ("nir: Add pass for trivializing register access")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24153>
(cherry picked from commit f1f05cc7cf)
2023-08-31 11:02:13 -07:00
Faith Ekstrand
ad9f1802c0 nir: Properly handle divergence for load_reg
This commit makes three changes:

 1. Default all newly created registers divergent because this is the
    safer default.

 2. Make divergence analysis do something sane with register divergence.
    It's not perfect because divergence analysis isn't able to prove
    registers divergent based on stores but at least if someone uses
    registers a bit they'll end up with safe defaults.  This matches
    what they'd get with nir_ssa_def_init().

 3. Make the load_reg() helper automatically propagate divergence from
    the register.  Because the defaults for both nir_ssa_def_init() and
    nir_decl_reg() are to mark everything divergent, this only means
    that nir_load_reg() of a uniform reg is now uniform.

Putting all these together, nir_from_ssa should now be producing
load_reg intrinsics with the proper uniform information.

Fixes: 7229bffcb1 ("nir: Add intrinsics for register access")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24153>
(cherry picked from commit 4fd257d20f)
2023-08-31 11:02:12 -07:00
Konstantin Seurer
7b17a992ba draw: Do not restart the primitive_id at 0
Otherwise the primitive_id will wrap around to 0 if more than 4096
patches are drawn.

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24295>
(cherry picked from commit 1280cf5b2a)
2023-08-31 11:02:11 -07:00
Nanley Chery
e5f932f7f4 intel/blorp: Ambiguate after CCS resolves on gfx7-8
ISL's state-machine of CCS_D describes full resolves as leaving the aux
buffer in the pass-through state. Hardware doesn't behave this way on
gfx8 however. On that platform, full resolves transition the aux buffer
to the resolved state. This was verified by dumping the CCS before and
after a full resolve on BDW (gfx7 is simply assumed to behave the same).
Ambiguate after resolving to match driver expectations.

Prevents iris from failing piglit's fcc-write-after-clear on BDW with a
future patch which relies on fast-clear encodings being removed after a
resolve. The avoided failure is:

   Testing implicit read of partial block UNORM -> SNORM
   Probe color at (0,1,0)
     Expected:  1.000000 1.000000 1.000000 1.000000
     Observed:  0.000000 0.000000 0.000000 0.000000

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23676>
(cherry picked from commit 1d12b29b3f)
2023-08-31 11:02:10 -07:00
Lionel Landwerlin
33c8fe16ac intel/fs: don't try to rebuild sequences of non ssa values
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 04777171e0 ("intel/fs: try to rematerialize surface computation code")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9378
Reviewed-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24228>
(cherry picked from commit 8cbf730145)
2023-08-31 11:02:10 -07:00
Caio Oliveira
20dbe71b13 meson: Ensure that LLVMSPIRVLib is not required for Clover
Fixes: cb588d5d6e ("compiler/clc: Move related NIR passes to the common mesa clc")
Closes: #9391
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24244>
(cherry picked from commit 2f3230a736)
2023-08-31 11:02:09 -07:00
Georg Lehmann
9d1efae314 aco/gfx11: fix get_gfx11_true16_mask with v_cmp_class_f16
The second operand is 16bit, so the we need to use VOP3 to address v128-v255.

Closes: #9413
Fixes: 6872f8d861 ("aco/gfx11: allow true 16-bit instructions to access v128+")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24294>
(cherry picked from commit 8fbebb6a2a)
2023-08-31 11:02:08 -07:00
Rhys Perry
e1f8eaadf4 nir/opt_dead_cf: remove nodes after a jump earlier
In the case of:
   halt
   // succs: b9
   if %618 {
       block b3:// preds:
       break
       // succs: b6
   } else {
       block b4:  // preds: , succs: b5
   }
   block b5:    // preds: b4
   32    %556 = iadd %617, %2 (0x1)
opt_constant_if() doesn't work because stitch_blocks() can't join blocks if the
before ends in a jump and the after isn't empty.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24235>
(cherry picked from commit 21f0aca948)
2023-08-31 11:02:07 -07:00
Danylo Piliaiev
25fb78c855 tu,freedreno: Forbid blit event for R8G8_SRGB due to gpu faults
Same cause as for other R8G8 formats - msaa resolve via
blit event causes gpu fault.

Fixes:
 dEQP-VK.api.image_clearing.*.clear_color_attachment.*.r8g8_srgb_*

Fixes: 029919f3c8
("tu: allow using resolve engine for SRGB MSAA resolves")

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24277>
(cherry picked from commit eeb1fd90fc)
2023-08-31 11:02:06 -07:00
Karol Herbst
ec40e504dc rusticl: fix warnings with newer rustc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24315>
(cherry picked from commit 2d902dbf02)
2023-08-31 10:51:22 -07:00
Dylan Baker
194c69ed73 .pick_status.json: Update to 088c2bbd51 2023-08-31 10:51:18 -07:00
Corentin Noël
be6a0e0619 ci: Add locked flag to bindgen-cli installation
Ensures that the bindgen-cli dependencies are not changing.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24936>
(cherry picked from commit 1c367933ba)
2023-08-30 10:07:06 -07:00
David Heidelberg
0ac42d3df0 ci: disable Material Testers.x86_64_2020.04.08_13.38_frame799.rdc trace
This change will be revert as soon, as Collabora proxy gets fixed.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24819>
(cherry picked from commit 6079c3ca49)
2023-08-30 10:04:12 -07:00
Dylan Baker
89aa4f72ce .pick_status.json: Update to 088c2bbd51 2023-08-30 10:02:06 -07:00
Bas Nieuwenhuizen
37ea011cc3 aco: Fix some constant patterns in 16-bit vec4 construction with s_pack.
Fixes: 04e3d7ad93 ("aco: improve nir_op_vec with constant operands")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24286>
(cherry picked from commit e536d31a46)
2023-08-09 10:00:42 -07:00
Bas Nieuwenhuizen
9d5a4e0e02 aco: fix nir_op_vec8/16 with 16-bit elements.
Fixes: 5718347c2b ("aco: implement vec2/3/4 with subdword operands")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24286>
(cherry picked from commit 2fcf7c7014)
2023-08-09 10:00:41 -07:00
Yiwei Zhang
6dc7de2441 venus: fix cmd state leak across implicit reset
Reset cmd states during vkBeginCommandBuffer regardless of the
VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT for simplicity.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24103>
(cherry picked from commit d13bf8f6b1)
2023-08-09 10:00:41 -07:00
Yiwei Zhang
33cdc6043d venus: fix a cmd builder render_pass state leak across reset
Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24103>
(cherry picked from commit a9f058d614)
2023-08-09 10:00:40 -07:00
Dave Airlie
97d2dff491 gallivm: fix atomic global temporary storage.
Fixes regression on llvm15 with
piglit tests/cl/program/execute/builtin/atomic/atomic_xchg-global.cl

Fixes: f281290005 ("gallivm: Fix atomic_global types")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24267>
(cherry picked from commit 2b03938f27)
2023-08-09 10:00:39 -07:00
Charmaine Lee
7315f3a866 svga: set clear_texture to NULL for vgpu9
With PIPE_CAP_CLEAR_TEXTURE removed, we need to set clear_texture to NULL
on svga vgpu9 device so it can use the fallback path.

Fixes: a1eabeff66 ("gallium: remove PIPE_CAP_CLEAR_TEXTURE")

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24264>
(cherry picked from commit 9c17d9df43)
2023-08-09 10:00:39 -07:00
Yiwei Zhang
3b388a6dcb lvp: avoid reading immutable sampler from desc write info
Lavapipe has switched to layer push descriptor support atop descriptor
updates internally since 12a7fc51c7, so
it must skip retrieving immutable samplers from the write info even if
the update call itself is blessed by the spec to not hit that case.

Fixes: 12a7fc51c7 ("lavapipe: Rework descriptor handling")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24263>
(cherry picked from commit 8cb7bab341)
2023-08-09 10:00:38 -07:00
Connor Abbott
c0eb1c601e tu: Fix vk2tu_*_stage flag type
New flags were silently getting dropped.

Fixes: 59259a0167 ("tu: Convert to sync2 entrypoints")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24162>
(cherry picked from commit ed02094235)
2023-08-09 10:00:37 -07:00
Rohan Garg
7fbf06e503 anv,iris: program the maximum number of threads on compute queue init
Fixes: 90a39cac87 ("intel/blorp: Emit compute program based on BLORP_BATCH_USE_COMPUTE")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23934>
(cherry picked from commit e7e7042093)
2023-08-09 10:00:37 -07:00
Dylan Baker
f874ebe024 .pick_status.json: Update to c5a6e88c4e 2023-08-08 10:44:48 -07:00
Samuel Pitoiset
389475115a zink/ci: update list of expected failures for NAVI10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24232>
(cherry picked from commit af38b1acd5)
2023-08-02 21:55:58 +01:00
Mike Blumenkrantz
5f6bdce7c6 zink: emit SpvCapabilitySampleMaskPostDepthCoverage with SpvExecutionModePostDepthCoverage
can't have one without the other

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24183>
(cherry picked from commit 88bf4b61af)
2023-07-31 05:31:29 -07:00
Mike Blumenkrantz
dcafca12d6 zink: be even dumber about buffer refs when replacing storage
these extra checks can cause issues when multiple contexts and transfer
ops are involved

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24141>
(cherry picked from commit d744bb5bfc)
2023-07-31 05:31:28 -07:00
Nanley Chery
a5a2cc6c2a anv: Don't support ASTC images with modifiers
Before this change, anv_get_image_format_features2 reported support for
ASTC formats with any modifier (even those not supported by anv). But,
we didn't intend to support that compressed image format with modifiers.

With this change, the format feature function reports no support for
modifiers on ASTC-formatted images.

This prevents the next patch from causing assertion failures due to
unsupported modifiers.

Fixes: 355f318843 ("anv: Allow transfer-only linear ASTC images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24120>
(cherry picked from commit e50af52e3d)
2023-07-31 05:31:27 -07:00
Rohan Garg
b1e6110c32 anv: use the correct GFX_VERx10 macro for WA
Fixes: 60b0d2c2cb ("add required invalidate/flush for Wa_14014427904")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23937>
(cherry picked from commit ba071ee81c)
2023-07-31 05:31:26 -07:00
Marek Olšák
443ca0a444 radeonsi: fix a CDNA regression breaking compute
reported internally

Fixes: 315231b5a5 - radeonsi: eliminate redundant compute SH register changes

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24169>
(cherry picked from commit 54f18b5000)
2023-07-31 05:31:25 -07:00
Yiwei Zhang
45f97bf08e turnip: flush cache for dstBuffer in vkCmdCopyQueryPoolResults
There can be other writes to the dstBuffer gated by proper barriers
beforehand.

TEST=dEQP-VK.pipeline.*.timestamp.* with Venus on Turnip

Fixes: 487aa807bd ("tu: Rewrite flushing to use barriers")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24245>
(cherry picked from commit a89752d630)
2023-07-31 05:31:25 -07:00
Alyssa Rosenzweig
9a85a37e70 panfrost: Fix transform feedback on v9 harder
We might need more push uniforms (FAU) than the currently bound program. Update
that too for correct results on v9.

Fixes: c282f80c98 ("panfrost: Fix transform feedback on v9")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24198>
(cherry picked from commit ac51cc12b1)
2023-07-31 05:31:24 -07:00
Alyssa Rosenzweig
c293347579 panfrost: Lower vertex_id for XFB
Even on Valhall, vertex_id is zero-based in a transform feedback program. Lower
that for transform feedback programs properly since it wouldn't happen
automatically on Valhall. Fixes assertion fails.

Fixes: 91ffd10351 ("pan/bi: Lower gl_VertexID in NIR")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24198>
(cherry picked from commit 64ff2b3ed6)
2023-07-31 05:31:24 -07:00
Lionel Landwerlin
5b96710f0b intel/fs: fix missing predicate on SEL instruction
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d8dfd153c5 ("intel/fs: Make per-sample and coarse dispatch tri-state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9381
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24236>
(cherry picked from commit 46958bcb74)
2023-07-31 05:31:23 -07:00
Mike Blumenkrantz
ad0a9aaadc zink: set pipeline dynamic state count after all dynamic states are set
Fixes: d17c081b7c ("zink: use dynamic state for feedback loops when available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23766>
(cherry picked from commit 7cbdb0b714)
2023-07-31 05:31:22 -07:00
Danylo Piliaiev
f71841922c ir3: Fix FS quad ops returning wrong values from helper invocations
Without SP_FS_CTRL_REG0.LODPIXMASK quad ops don't get values from
helper invocations, but from the current one.

Fixes:
 dEQP-VK.glsl.derivate.dfdxsubgroup.*
 dEQP-VK.glsl.derivate.dfdysubgroup.*

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24211>
(cherry picked from commit a0d426370d)
2023-07-31 05:31:22 -07:00
Danylo Piliaiev
deaa221849 freedreno/regs: Rename SP_FS_CTRL_REG0.DIFF_FINE into LODPIXMASK
That's the "real" name of the field.

It enables ALL helper invocations in a quad, which is necessary for
fine derivatives and quad subgroup ops.

While PIXLODENABLE by itself enables only 3 out 4 fragments in a quad.

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24211>
(cherry picked from commit 696f37f5c3)
2023-07-31 05:31:21 -07:00
Iván Briano
13eb1bd04b anv: implement Wa_14019750404
Cc: 23.2 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8931

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
(cherry picked from commit 4ad19c8310)
2023-07-31 05:31:20 -07:00
Dylan Baker
d019262cf4 .pick_status.json: Mark d3f26cbbe1 as denominated 2023-07-31 05:31:18 -07:00
Dylan Baker
a7c460f120 .pick_status.json: Update to e88c077096 2023-07-31 05:31:14 -07:00
Dylan Baker
08a0f8fe02 docs: Update release calendar for 23.2.0-rc2 2023-07-29 15:03:06 -07:00
Dylan Baker
71e6fe758c VERSION: update to 23.2.0-rc2 2023-07-29 14:43:25 -07:00
Dylan Baker
753854965c Revert incorrect 23.2.0 release
A bug in my script caused .0 to be released instead of -rc2.
2023-07-29 14:41:02 -07:00
Dylan Baker
3bf326ea68 docs: Add sha256 sum for 23.2.0 2023-07-29 03:26:01 -07:00
Dylan Baker
876f2c35ad docs: Update release calendar for 23.2.0 2023-07-29 03:26:00 -07:00
Dylan Baker
97c28e22e8 VERSION: update to 23.2.0 2023-07-29 03:05:19 -07:00
Dylan Baker
4c7e92d498 docs: add release notes for 23.2.0 2023-07-29 03:05:19 -07:00
Dylan Baker
be075d161f docs: truncate new_features.txt 2023-07-29 03:05:16 -07:00
Dylan Baker
629f2e937a ci: mark passing zink and lima tests as expected
Not going to argue with things passing
2023-07-28 11:33:03 -07:00
Gert Wollny
40d613fc51 r600/sfn: remove debug output leftovers
Fixes: ae7d904a73
    r600/sfn: Implement source mod optimization in backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24239>
(cherry picked from commit 59087003c4)
2023-07-28 10:46:34 -07:00
Robert Mader
6fea9af930 egl/wayland: wait for compositor to release shm buffers
Some Wayland compositors, notably Exo, do not always release buffers
fast enough, and not in sync with their frame callbacks, to guarantee
that a free buffer is available the next time a client calls
`eglSwapBuffers()`.

This currently leads to a crash in `dri2_wl_swrast_get_backbuffer_data()`
with the swrast backend. To avoid this, simply block until the
compositor releases a buffer eventually.

While arguably compositors should release buffers they don't need any
more for the next frame, this can be quite complex depending on
the architecture - notably multi-process/IPC in case of Exo.

cc: mesa-stable

Signed-off-by: Robert Mader <robert.mader@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24091>
(cherry picked from commit 74451ed3f0)
2023-07-28 10:46:34 -07:00
Karol Herbst
ddffe6e8a1 nvc0: initial Ada enablement
Cc: 23.2 <mesa-stable>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24226>
(cherry picked from commit a944a8eba9)
2023-07-28 10:46:34 -07:00
Philipp Zabel
4c5c6cf254 etnaviv: fix segfault after compile failure
Do not try to determine the shader stage from the compiled shader
variant, which may be NULL after compile failure. Instead, get it
from the NIR shader.

Fixes a segfault when trying to evaluate etna_shader_stage(NULL)
after compile failure.

Suggested-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Fixes: 3d49619071 ("etnaviv: add support for performance warnings")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24178>
(cherry picked from commit f626605cbf)
2023-07-28 10:46:34 -07:00
Timothy Arceri
f4083ba2a4 glsl: fix validation of ES vertex attribs
From OpenGL ES 3.0 spec, page 56:

    "Binding more than one attribute name to the same location
     is referred to as aliasing, and is not permitted in OpenGL
     ES Shading Language 3.00 vertex shaders. LinkProgram will
     fail when this condition exists. However, aliasing is
     possible in OpenGL ES Shading Language 1.00 vertex shaders.
     This will only work if only one of the aliased attributes
     is active in the executable program, or if no path through
     the shader consumes more than one attribute of a set of
     attributes aliased to the same location. A link error can
     occur if the linker determines that every path through the
     shader consumes multiple aliased attributes, but implemen-
     tations are not required to generate an error in this case."

So here we make sure to allow the optimisations before validation
for earlier ES shader versions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Fixes: 80c001013c ("glsl: do vs attribute validation in NIR linker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9342
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24205>
(cherry picked from commit c64ad299e4)
2023-07-28 10:46:34 -07:00
Kenneth Graunke
1683e8407f iris: Re-emit 3DSTATE_DS for each primitive (workaround 14019750404)
Some platforms require us to re-emit 3DSTATE_DS before every 3DPRIMITIVE
when tessellation is enabled.  See workaround 14019750404.

Cc: 23.2 <mesa-stable>

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
(cherry picked from commit 283e3acd3a)
2023-07-28 10:46:34 -07:00
Iván Briano
2d9d067bbd anv: ensure mesh is disabled on context init
It turns out the hardware doesn't save the whole state on a context
switch, as the kernel expects when it creates the golden context.
For some HW units, only the state that was explicitly programmed will be
part of it, so we need to make sure mesh shading is disabled on context
creation, or we risk being context switched with an application that
uses mesh, and when ours gets to run again, the mesh state won't be
reset, and submitting a legacy 3D pipeline while the HW thinks mesh is
enabled causes us to hang.

Cc: 23.2 <mesa-stable>

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
(cherry picked from commit 7b0ded0b23)
2023-07-28 10:46:34 -07:00
Iván Briano
c5bf8c9189 iris: ensure mesh is disabled on context init
It turns out the hardware doesn't save the whole state on a context
switch, as the kernel expects when it creates the golden context.
For some HW units, only the state that was explicitly programmed will be
part of it, so we need to make sure mesh shading is disabled on context
creation, or we risk being context switched with an application that
uses mesh, and when ours gets to run again, the mesh state won't be
reset, and submitting a legacy 3D pipeline while the HW thinks mesh is
enabled causes us to hang.

Cc: 23.2 <mesa-stable>

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
(cherry picked from commit 50d68f74b5)
2023-07-28 10:46:34 -07:00
Marek Olšák
10da9fd2cf util/u_queue: fix util_queue_finish deadlock by merging lock and finish_lock
and by disabling the on-demand thread creation, which breaks the finish logic.

Fixes: 3713dc6b2a - util/u_queue: add UTIL_QUEUE_INIT_SCALE_THREADS flag
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8363

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24173>
(cherry picked from commit bfdfe5aa82)
2023-07-28 10:46:34 -07:00
Alyssa Rosenzweig
18cfb0c4b4 panfrost: Fix transform feedback on v9
We were using a stale FAU buffer which meant we wrote to garbage addresses. I'm
guessing this was fallout from the big sysval rework but not 100% sure.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24199>
(cherry picked from commit c282f80c98)
2023-07-28 10:46:34 -07:00
Iván Briano
60e9da990c anv: ensure CFE_STATE is emitted for ray tracing pipelines
Fixes sporadic failures in dEQP-VK.robustness.robustness2.*.rgen

Fixes: ecb709c853 ("anv: only emit CFE_STATE when scratch space increases")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9382

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24206>
(cherry picked from commit 75990e5564)
2023-07-28 10:46:34 -07:00
David Heidelberg
1cb349d463 ci/microsoft: when re-enabling Windows Farm, always run the container
Otherwise, Marge queue has to wait for someone manually trigger it.

Fixes: d3b66356 ("ci/microsoft: partly revert rename from container-rules to manual-rules")

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24048>
(cherry picked from commit a6edac3764)
2023-07-28 10:46:34 -07:00
Dylan Baker
d3c0e34fe6 .pick_status.json: Update to 59087003c4 2023-07-28 10:46:34 -07:00
David Heidelberg
35610ab73c ci: add quirk for GitLab assuming changes is always true for scheduled runs
Sadly GitLab CI always evaluate `rules:changes` as true, when running
scheduled runs. So we have to add explicit condition to ignore it there.

Every line using `rules:changes` has to have following condition
ignoring "schedule" runes.

Cc: mesa-stable
Reported-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24051>
(cherry picked from commit 79f7882fc6)
2023-07-28 10:46:34 -07:00
Marek Olšák
0864841fc6 mesa: fix 38% decrease in display list performance of Viewperf2020/NX8_StudioAA
It happened because glCallList was restoring varying_vp_inputs, which
caused every glCallList to process the state change again.

This loosely reverts commit 3a294ff01f
"mesa: move the _mesa_set_varying_vp_inputs call to where the state changes".

Fixes: 3a294ff01f - "mesa: move the _mesa_set_varying_vp_inputs call to where the state changes"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24165>
(cherry picked from commit c97961a855)
2023-07-28 10:46:34 -07:00
Rhys Perry
df3879dfe6 nir/unsigned_upper_bound: fix phi(bcsel)
This was looking at the wrong sources. src0 is the condition.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Fixes: 72ac3f6026 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23990>
(cherry picked from commit 1139d870f3)
2023-07-28 10:46:33 -07:00
Rohan Garg
bde2bba37d intel/perf: add perf query support for Intel Raptorlake
Fixes: 4e0eca7dc3 ("intel/dev: Add device info for RPL")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24180>
(cherry picked from commit 36d4e83299)
2023-07-28 10:46:33 -07:00
Marek Olšák
eb64d60140 glthread: determine global locking once every 64 batches to fix get_time perf
This mitigates a large perf degradation when the clock source is HPET instead of TSC.
Just call get_time less frequently.

Fixes: 3ed141e9 - glthread: add a heuristic to stop locking global mutexes with multiple contexts
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8910

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24168>
(cherry picked from commit 6cda08416b)
2023-07-28 10:46:33 -07:00
Rhys Perry
62e3b18ddd ac/nir: always round cube array layers
It seems this is still necessary if conformant_trunc_coord=true.

Fixes various dEQP-VK.texture.shadow.cube_array.* and
dEQP-VK.glsl.texture_functions.texture*samplercubearray* failures with
conformant_trunc_coord.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Cc: 23.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24137>
(cherry picked from commit d4b211bf1b)
2023-07-28 10:46:33 -07:00
Rhys Perry
53b22433b9 radv: add conformant_trunc_coord to cache UUID
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24137>
(cherry picked from commit 436df35c17)
2023-07-28 10:46:33 -07:00
Rhys Perry
9b0da6c5ad ac/llvm: skip ballot zext for 32-bit dest with wave32-as-wave64
NGG lowering can ballots with a 32-bit destination even if the ballot bit
size is 64.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24140>
(cherry picked from commit 0cb26f31fe)
2023-07-28 10:46:33 -07:00
Rhys Perry
fae833ec0e ac/llvm: fix wave32 ac_build_mbcnt_add with 64-bit mask
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24140>
(cherry picked from commit 47c9dea6ac)
2023-07-28 10:46:33 -07:00
Rhys Perry
c29a182547 radv: fix radv_get_ballot_bit_size with CS
For wave64-as-wave32, this would return 32.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24140>
(cherry picked from commit 7a199a051e)
2023-07-28 10:46:33 -07:00
Rhys Perry
2619e53e9f ac/llvm: fix AC_TM_CHECK_IR
This was using the wrong pass.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: 3f272fd15e ("ac/llvm: fix build with LLVM 17")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24140>
(cherry picked from commit 85d1159a2a)
2023-07-28 10:46:33 -07:00
Rohan Garg
e4848037a4 iris: fix iris for WA 16013000631
iris needs to emit a PIPE_CONTROL_INSTRUCTION_INVALIDATE for the
aforementioned WA.

Fixes: 83716b08c ('iris: migrate WA 14013910100 to use the WA framework')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24171>
(cherry picked from commit 07a9585898)
2023-07-28 10:46:33 -07:00
Faith Ekstrand
506b1b801a nv50/ir: Support vector movs
nir_opt_mov and nir_op_vecN are only the same if the mov is only a
single component.  Otherwise the vec loop will try to access src[c]
where c > 0 which breaks for nir_op_mov.  It's uncommon but scalar
back-ends can see vector movs so we need to handle this correctly.

Fixes: 6513c675ad ("nv50/ir/nir: implement nir_alu_instr handling")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24167>
(cherry picked from commit 259ba104f7)
2023-07-17 14:45:13 -07:00
Semjon Kravtsenko
8f3f35b868 glx: Assign unique serial number to GLXBadFBConfig error
Fixes: e89e1f5049 ("glx: Fix error handling yet again in CreateContextAttribs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9171
Tested-by: yan12125
Co-authored-by: XRevan86
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23762>
(cherry picked from commit 3982445728)
2023-07-17 14:45:11 -07:00
Dylan Baker
37d0a9fdaf .pick_status.json: Update to 3a8aae9e6a 2023-07-17 14:45:09 -07:00
Rohan Garg
5d9318a0d2 iris: migrate WA 14016118574 to use the WA framework
Fixes: 58829d9f1 ("iris: implement Wa_14016118574")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24156>
(cherry picked from commit 8b93fa149b)
2023-07-14 15:30:41 -07:00
Rohan Garg
f9360a7184 iris: migrate WA 14013910100 to use the WA framework
Fixes: eeb3f4594d ("intel/xehp: Implement XeHP workaround Wa_14013910100.")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24156>
(cherry picked from commit 83716b08cf)
2023-07-14 15:30:41 -07:00
Marek Olšák
bcd8cbe9a5 Revert "ac/nir/ngg: Follow intrinsic sources when analyzing before culling."
This reverts commit 411f69b9c5.

It broke tessellation in Unigine Heaven with radeonsi.

Fixes: 411f69b9c5 - ac/nir/ngg: Follow intrinsic sources when analyzing before culling.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24160>
(cherry picked from commit 043dcfad04)
2023-07-14 15:30:40 -07:00
David Rosca
b691951239 radeonsi: Use DIV_ROUND_UP instead of ALIGN_POT
DIV_ROUND_UP is the correct replacement for ALIGN_TO.

Fixes: ba83c1e2
Signed-off-by: David Rosca <nowrep@gmail.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24127>
(cherry picked from commit d408ae88db)
2023-07-14 15:30:37 -07:00
Timur Kristóf
6e46d67a3c aco: Fix subgroup_id intrinsic on GFX10.3+.
Change this to match how it works in the LLVM backend.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005>
(cherry picked from commit dc3bbd351a)
2023-07-14 15:30:37 -07:00
Frank Binns
340d8511ac pvr: skip setting up SPM consts buffer when no const shared regs are used
This is a temporary measure until the zeroed shaders are replaced with the real
ones. This avoids a VK_ERROR_OUT_OF_DEVICE_MEMORY error due to a zero sized
allocation.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Fixes: 1dfd535124 ("pvr: Setup SPM background object")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24139>
(cherry picked from commit b470d931dc)
2023-07-14 15:30:36 -07:00
Dylan Baker
ec812aaae1 .pick_status.json: Update to 27d30fe3c0 2023-07-14 15:30:35 -07:00
Filip Gawin
f6b3c7d830 crocus: Avoid fast-clear with incompatible view
Port of code from iris.
Original author: Nanley Chery

Helps with fast_color_clear@fcc-write-after-clear

Cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24135>
(cherry picked from commit 6e87b277bd)
2023-07-13 08:43:02 -07:00
Pavel Ondračka
2089ce9ffc r300: update RV370 failures
This was missed in 0bf6dcb785
There is a loop which iterates over a temp array. NIR optimization
moves the real work out of the loop and what remains are just ALU ops
with undefs. So after converting undefs to zero, the ALU ops are
optimized out and DCE kills the loop. This is a good thing in
general and we don't fail the linking due to the loop presence.

However than we hit the shader constants and ALU limits later :-(
So from dEQP POW we go from NotSupported to Fail.

Fixes: 0bf6dcb785
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24134>
(cherry picked from commit 0a2a7bfd19)
2023-07-13 08:43:01 -07:00
Jordan Justen
38fb8dcbdf isl: Set MOCS to uncached for MTL stream-out
Without this change various OpenGL CTS tranform feedback tests were
failing.

Cc: 23.2 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23823>
(cherry picked from commit 39f547381c)
2023-07-13 08:43:01 -07:00
Jordan Justen
64da97504c isl/dev: Add uncached MOCS value
Rework:
 * Jordan: Add uncached for all platforms (Requested by Francisco)
 * Jordan: Use gen7 & gen8 values suggested by Francisco
 * Jordan: Fix IVB and CHV MOCS mistakes pointed out by Francisco

Cc: 23.2 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23823>
(cherry picked from commit fa47c82fbe)
2023-07-13 08:43:00 -07:00
Jordan Justen
151f3e9121 anv,iris,hasvk: Use ISL_SURF_USAGE_STREAM_OUT_BIT for setting stream-out MOCS
Cc: 23.2 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23823>
(cherry picked from commit 492b07625d)
2023-07-13 08:43:00 -07:00
Jordan Justen
5626212e30 isl: Add ISL_SURF_USAGE_STREAM_OUT_BIT
Cc: 23.2 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23823>
(cherry picked from commit 6b5082f5d5)
2023-07-13 08:43:00 -07:00
Yiwei Zhang
8ada1e6e4d venus: add a missing barrier before copying query feedback
The 1st sync scope of vkCmdCopyQueryPoolResults is not sufficient to
cover transfer writes against query feedback buffer. We must ensure
ordering against prior query reset cmd where the feedback buffer fill
gets injected.

Fixes: de4593faa1 ("venus: add query pool feedback cmds")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24130>
(cherry picked from commit ed79b30639)
2023-07-13 08:42:59 -07:00
Yiwei Zhang
6e8e1b8309 venus: ensure consistency of query overflow behavior
Fixes: e6cffa1f0e ("venus: use feedback for vkGetQueryPoolResults")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24123>
(cherry picked from commit 7b44880e3e)
2023-07-13 08:42:58 -07:00
Yiwei Zhang
6874eed028 venus: handle query feedback creation failure
Fixes: e6cffa1f0e ("venus: use feedback for vkGetQueryPoolResults")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24123>
(cherry picked from commit c55d43df04)
2023-07-13 08:42:56 -07:00
Eric Engestrom
e520c77063 ci: avoid running hardware jobs if lint fails - now on Windows too!
I missed this in !23774.

Fixes: a1c1cce9df ("ci: avoid running hardware jobs if there are already trivial issues")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24121>
(cherry picked from commit bdaee9e09d)
2023-07-13 08:42:55 -07:00
Eric Engestrom
4a08c40b48 ci: avoid running hardware jobs if lint fails - now on LAVA too!
I missed this in !23774.

Fixes: a1c1cce9df ("ci: avoid running hardware jobs if there are already trivial issues")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24121>
(cherry picked from commit fd35e59139)
2023-07-13 08:42:54 -07:00
Dylan Baker
3694762b76 .pick_status.json: Update to 6e87b277bd 2023-07-13 08:42:53 -07:00
Dylan Baker
28e0c0f52f docs: Update release calendar for 23.2.0-rc1 2023-07-12 16:03:53 -07:00
Dylan Baker
81c239cb85 VERSION: update to 23.2.0-rc1 2023-07-12 14:21:33 -07:00
Karol Herbst
2c48ce81a8 api/icd: drop static lifetime from get_ref return type
This was never correct as the object pointed to can be destroyed at any
moment.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24061>
2023-07-12 15:18:22 +00:00
Karol Herbst
d653eb8a9a rusticl/device: make it &'static
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24061>
2023-07-12 15:18:22 +00:00
Karol Herbst
afe95b613c rusticl: Replace &Arc<Device> with &Device
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24061>
2023-07-12 15:18:22 +00:00
Karol Herbst
5bd235189a rusticl/kernel: silence newer clippy warning
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24061>
2023-07-12 15:18:22 +00:00
Eric Engestrom
a1c1cce9df ci: avoid running hardware jobs if there are already trivial issues
Suggested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23774>
2023-07-12 14:08:42 +00:00
Danylo Piliaiev
feaa12c7c6 freedreno/regs: Document a7xx CP_BV_BR_COUNT_OPS
Fully tested on HW. Credits to Connor Abbott for finding out how
it works.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
271ba74766 freedreno/regs: Properly document a7xx CP_EVENT_WRITE, CP_WAIT_TIMESTAMP
Event write is changes so much in a7xx that it makes sense to
create a new event CP_EVENT_WRITE7.

All credits to Connor Abbott for finding out what different flags
in these commands are doing.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
aceb82b80e tu: Use reg usage tables for stale reg dbg option
Defining regs to stomp as ranges in a separate header is a mistake
from maintenance standpoint. Now we have this information at the
point where reg is defined.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
aecb732320 tu: Allow reg stomping of compute related registers
We don't use draw states for dispatches, so the bound pipeline
could be overwritten by reg stomping in a renderpass or blit.

The solution is to re-emit pipeline's IB on every dispatch if
reg stomping is used.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
dac8d371e1 freedreno/regs: Define usage for all a6xx/a7xx regs
Could be used for knowing which regs to stomp and to verify that
only appropriate regs are emitted.

Each register that is actually being used by driver should have "usage"
defined, currently there are following usages:
- "cmd" - the register is used outside of renderpass and blits,
		roughly corresponds to registers used in ib1 for Freedreno
- "rp_blit" - the register is used inside renderpass or blits
		(ib2 for Freedreno)

It is expected that register with "cmd" usage may be written into only at
the start of the command buffer (ib1), while "rp_blit" usage indicates that
register is either overwritten by renderpass/blit (ib2) or not used if not
overwritten by a particular renderpass/blit.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
c62b0cd4f8 freedreno/regs: Generate per-gen reg usage tables
"reg" and "array" now could have `usage="a,b,c"` attribute, for each
usage a separate array is generated.

Would be used for register stomping debug option.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
463db34258 freedreno/regs: Fix a7xx SP_FS_PREFETCH definition
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
6f3117fbce freedreno/regs: Add more a7xx regs and reg fields
Deduced from a740 cmdtraces from running CTS on prop driver.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
95354ab679 freedreno/regs: Add some new a7xx events
There are many more a7xx events but they are left for later.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
5928ac6b64 freedreno/regs: Add 2 new a7xx modes to CP_COND_REG_EXEC
Also reworked how CP_COND_REG_EXEC is defined to print
less irrelevant fields.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
27312eb386 freedreno/regs: a7xx has a new source type CP_REG_TEST
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
853d64ae55 freedreno/regs: Add a7xx pseudo-regs to CP_SET_PSEUDO_REG
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
1dc044764d freedreno/regs: Clarify polling on a7xx for CP_WAIT_REG_MEM/CP_COND_WRITE5
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:28 +00:00
Danylo Piliaiev
1f192e49b6 freedreno/regs: Document a7xx CP_MODIFY_TIMESTAMP
Clears, adds to local, or adds to global timestamp

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
ed6394fda7 freedreno/regs: Document CP_MEM_TO_SCRATCH_MEM
Best guess is that it is a faster way to fetch all the VSC_STATE registers
and keep them in a local scratch memory instead of fetching every time
when skipping IBs.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Connor Abbott
912bafbdd5 freedreno/regs: Document a7xx CP_FIXED_STRIDE_DRAW_TABLE
Executes an array of fixed-size command buffers where each
buffer is assumed to have one draw call, skipping buffers with
non-visible draw calls.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
8185fac66b freedreno/regs: More CP commands are the same on a7xx as on a6xx
These ones are seen to be used by blob in CTS, the rest a6xx commands
were not seen beeing used.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
11cc456117 freedreno/regs: Change a7xx regs to have open range for generation
Until proven otherwise regs stay the same between gens.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
3ba1d230ad freedreno/rnn: Take into account array's variant for regs
Otherwise even if array only exists in one generation the code for
its registers is generated for all gens.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
dfe650f3f9 freedreno/rnn: Make addvariant work for fields in the same reg
Previously if addvariant was processed after other fields in the reg
these fields would never get matched. Fix this by moving bitfields that
add variant to the beginning of the list.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
15db60fbbc freedreno/rnn: Fix addvariant being set effectively once
Each time addvariant was added it was added to the end of ctx->vars
list, without previous variant being removed. While the check for
variant tests only the first one that has expected enum name.

Fix this by updating `variant` instead of appending new one if variant
with such enum already exists.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Danylo Piliaiev
148f214dae freedreno/regs: Print xml validation error if validation fails
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>
2023-07-12 13:33:27 +00:00
Eric Engestrom
431bbea840 meson: clarify what "off-screen rendering" means
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24114>
2023-07-12 12:38:14 +00:00
Eric Engestrom
4ef16e34a8 meson: clarify description of opengl option
There was some confusion from users as to whether disabling this option
disables OpenGL ES as well, so let's remove the confusing "all versions"
note and specify this affects "desktop OpenGL" only.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24113>
2023-07-12 12:24:43 +00:00
Marcin Ślusarz
a762fa27db anv: limit stack usage for anv_surface_state
Each one is 136 bytes.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24109>
2023-07-12 12:00:10 +00:00
Marcin Ślusarz
deaf4f2d57 anv: pass anv_surface_state using a pointer
It's 136 bytes, so passing it by stack is wasteful.

CID: 1531860

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24109>
2023-07-12 12:00:09 +00:00
Marcin Ślusarz
fb070b1dfd anv: fix how NULL buffer_view is handled in anv_descriptor_set_write_buffer_view
CID: 1531855

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24109>
2023-07-12 12:00:09 +00:00
Timur Kristóf
127999989a aco: Add MESA_SHADER_KERNEL to instruction selection setup.
Treat it the same way as MESA_SHADER_COMPUTE.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24112>
2023-07-12 11:24:44 +00:00
Eric Engestrom
6934efc15d broadcom/ci: add the renderonly folder to things that can affect v3d & vc4
Also, move the v3d/vc4 lines together so it's clearer.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24105>
2023-07-12 10:51:31 +00:00
Christian Gmeiner
f831883af6 nir/lower_tex: optimize offset lowering for has_texture_scaling
Generates much better code and even helps to beat a blob driver.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24054>
2023-07-12 10:03:06 +00:00
Christian Gmeiner
9383009809 nir: rename has_txs to has_texture_scaling
Convert it to an opt-in for backends to prefer and use nir_load_texture_scale
instead of txs for nir lowerings.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24054>
2023-07-12 10:03:06 +00:00
Christian Gmeiner
9ddedf4554 nir: rename intrinsic to have a more generic nameing
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24054>
2023-07-12 10:03:06 +00:00
Eric Engestrom
dd81c03ab1 etnaviv/ci: drop duplicate line in etnaviv files list
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24106>
2023-07-12 09:29:56 +00:00
Karol Herbst
2c3b624300 nvc0: backport fp helper invocation fix to 2nd gen Maxwell+
Ben prefers that we use the firmware method where possible.

Cc: mesa-stable
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23802>
2023-07-12 08:45:13 +00:00
Hyunjun Ko
0c778ec3c8 anv: Adds a workaround for HEVC decoding on some old platforms.
HEVC support on Gfx9 is only available on VCS0. So limit the number of video queues
to the first VCS engine instance.

We should be able to query HEVC support from the kernel using the engine query uAPI,
but this appears to be broken : https://gitlab.freedesktop.org/drm/intel/-/issues/8832

When this bug is fixed we should be able to check HEVC support to determine the
correct number of queues.

Closes: mesa/mesa#9172, mesa/mesa#9314

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24065>
2023-07-12 15:34:28 +09:00
Dave Airlie
ad980dc699 ci: update fails for fixed tests due to llvmpipe linear changes.
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24066>
2023-07-12 02:17:26 +00:00
Dave Airlie
a07fa6516b llvmpipe/linear: add support for rgba color buffers.
This adds support to the linear rast for rgba outputs.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24066>
2023-07-12 02:17:26 +00:00
Dave Airlie
f96b6027a1 llvmpipe/linear: add support for sampling when cbuf order is different.
This rewrites bgra sampling when the output is rgba,
and vice-versa.

It allows to skip swaps if the sampling and cbuf match.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24066>
2023-07-12 02:17:26 +00:00
Dave Airlie
a3f586685d llvmpipe/linear: add sample routines for swapping r/b channels
This lets rgba textures be sampled in linear mode.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24066>
2023-07-12 02:17:26 +00:00
Dave Airlie
70f49c78cc llvmpipe/linear/tgsi: calculate num_texs properly for nir.
This is a bit hacky, but it does the right thing and counts the number
of textures instructions so the linear path can work for multiple textures.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24066>
2023-07-12 02:17:26 +00:00
Dave Airlie
e43804ba65 llvmpipe/linear: refactor linear samplers into templated code.
Before adding new copies of all of these for swapping start by
refactoring into macro templated code.

I avoided using inline functions because I want to test with
opts turned down, and this will kill perf.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24066>
2023-07-12 02:17:26 +00:00
Faith Ekstrand
0230179f8b freedreno/ci: Update pixmark piano checksums
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
69f8daca16 pan/mdg: Ingest new-style registers
Switch to register intrinsics, using the helpers. Since our backend copyprop
chokes on non-SSA moves, we get better coalescing with this approach, hence the
small improvements to instruction count / cycle count in shader-db. Changes to
register pressure seem to be noise from iteration order. I'm not too worried.

   total instructions in shared programs: 1508444 -> 1508193 (-0.02%)
   instructions in affected programs: 42581 -> 42330 (-0.59%)
   helped: 482
   HURT: 41
   Inconclusive result (value mean confidence interval includes 0).

   total bundles in shared programs: 643023 -> 643136 (0.02%)
   bundles in affected programs: 16318 -> 16431 (0.69%)
   helped: 230
   HURT: 85
   Inconclusive result (value mean confidence interval includes 0).

   total quadwords in shared programs: 1125992 -> 1125600 (-0.03%)
   quadwords in affected programs: 125366 -> 124974 (-0.31%)
   helped: 507
   HURT: 351
   Quadwords are helped.

   total registers in shared programs: 90632 -> 90554 (-0.09%)
   registers in affected programs: 669 -> 591 (-11.66%)
   helped: 114
   HURT: 31
   Registers are helped.

   total threads in shared programs: 55607 -> 55600 (-0.01%)
   threads in affected programs: 20 -> 13 (-35.00%)
   helped: 1
   HURT: 7
   Inconclusive result (value mean confidence interval includes 0).

   total spills in shared programs: 1371 -> 1437 (4.81%)
   spills in affected programs: 44 -> 110 (150.00%)
   helped: 0
   HURT: 2

   total fills in shared programs: 5133 -> 5273 (2.73%)
   fills in affected programs: 84 -> 224 (166.67%)
   helped: 0
   HURT: 2

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
35030fc79c gallivm: Switch to reg intrinsics
This is pretty straightforward, since we don't try to "coalesce" register access
the way a GPU backend would. In the old path, we generated register load/store
instructions internally when hitting register sources/destinations. In the new
path, we just translate the register load/store intrinsics to the LLVM
loads/stores and we're back where we started. It's a bit more code, but it's
more straightforward.

Notably, although this continues to use registers, this does NOT use the chasing
helpers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
fded7e7b66 nir: Remove nir_register-based unit tests
Non-SSA functionality will become obsolete after nir_register is removed, so
there's no need to keep the tests around, and they will interfere with the
nir_register de-clawing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
e96a9a1b71 nir: Remove nir_lower_regs_to_ssa
It is now unused, as all internal producers of registers have been switched over
to intrinsics and no drivers call it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
9eab1e7521 nir/lower_shader_calls: Convert to register intrinsics
Yet another internal use of nir_register that gets lowered back to SSA after the
pass. Easy enough to replace with intrinsic-based registers instead.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
002f8b657e mesa: Convert PTN to register intrinsics
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
b55836a74d mesa: Return SSA defs from PTN ALU helpers
Mostly a big simplifcation. Some noise on Haswell shader-db:

   total instructions in shared programs: 2978203 -> 2978161 (<.01%)
   instructions in affected programs: 9812 -> 9770 (-0.43%)
   helped: 61
   HURT: 39
   helped stats (abs) min: 1 max: 5 x̄: 1.44 x̃: 1
   helped stats (rel) min: 0.27% max: 7.69% x̄: 1.76% x̃: 1.18%
   HURT stats (abs)   min: 1 max: 4 x̄: 1.18 x̃: 1
   HURT stats (rel)   min: 0.55% max: 16.67% x̄: 4.49% x̃: 3.45%
   95% mean confidence interval for instructions value: -0.71 -0.13
   95% mean confidence interval for instructions %-change: -0.11% 1.46%
   Inconclusive result (%-change mean confidence interval includes 0).

   total cycles in shared programs: 45346214 -> 45346684 (<.01%)
   cycles in affected programs: 519970 -> 520440 (0.09%)
   helped: 157
   HURT: 157
   helped stats (abs) min: 2 max: 2970 x̄: 166.80 x̃: 6
   helped stats (rel) min: 0.05% max: 40.38% x̄: 5.01% x̃: 1.42%
   HURT stats (abs)   min: 2 max: 1922 x̄: 169.80 x̃: 10
   HURT stats (rel)   min: 0.04% max: 44.00% x̄: 6.28% x̃: 2.46%
   95% mean confidence interval for cycles value: -49.93 52.92
   95% mean confidence interval for cycles %-change: -0.49% 1.76%
   Inconclusive result (value mean confidence interval includes 0).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
5b835f1a08 mesa: Simplify ptn_log() a bit
Using fdiv lets us drop the fneg. nir_opt_algebraic will re-optimize
this if the driver implements fdiv using fmul and frcp.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
2198eedd04 gallium: Convert TTN to register intrinsics
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
a6d9f168ce gallium: Return SSA values from TTN ALU helpers
This is a lot simpler!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
61010e5255 nir: Add lower_vec_to_regs pass
This is a variant of nir_lower_vec_to_movs that produces register intrinsics
(store_reg with write masks) instead of masked moves.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
aea8a70200 nir: Add intrinsics version of locals_to_regs
This isn't so bad. I still duplicated the pass because it makes a lot easier to
have them coexist, switch users over one by one, and then garbage collect the
old when we're done.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Faith Ekstrand
ae0408be1b nir/from_ssa: Support register intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Faith Ekstrand
29b2ace184 nir/from_ssa: Make additional assumptions in coalescing
At this point, everything is SSA.  Also, NIR no longer allows different
numbers of components on the two sides of a phi so we can just assert
rather than trying to gracefully handle mismatches.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
36b29201fa nir: Produce intrinsics in lower_{phis,ssa_defs}_to_regs
A number of passes lower SSA partially to registers, do work that would be
invalid in SSA, and then go back into SSA with nir_lower_regs_to_ssa. As a step
towards replacing nir_register with intrinsics,
the nir_lower_{phis,ssa_defs}_to_regs passes are changed to produce intrinsics
instead of nir_registers, and their callers are updated to call
nir_lower_reg_intrinsics_to_ssa instead of nir_lower_regs_to_ssa to compensate.

Jointly authored with Faith.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Faith Ekstrand
73e191924c nir: Add a reg_intrinsics flag to nir_convert_from_ssa
It doesn't do anything yet. We leave that to the subsequent patches so we can
keep the tree-wide refactor as simple as possible.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
bcf3a622d1 nir: Add new version of lower_regs_to_ssa
in the sense of operating on register intrinsics instead of nir_registers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
2eb554af48 nir: Add legacy data structures & helpers
These are registerful versions of core nir_src/nir_dest which will become
SSA-only soon enough, and modifierful versions of nir_alu_src/nir_alu_dest.
The latter will let us remove modifiers from nir_alu_instr finally.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:26 +00:00
Alyssa Rosenzweig
d313eba94e nir: Add pass for trivializing register access
After running the pass, all register access intrinsics are guaranteed to be
"trivial" in the sense that the program is free of hazards preventing
propagating them away without inserting any copies.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:26 +00:00
Alyssa Rosenzweig
1d6c06e4b9 nir: Add helpers for walking register uses
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:26 +00:00
Alyssa Rosenzweig
7229bffcb1 nir: Add intrinsics for register access
Note the writemask handling is chosen for consistency with the rest of NIR. In
every other instance, writemask=w requires a vec4 source. This is hardcoded into
nir_validate and nir_print as what it means to have a writemask.

More importantly, consistency with how register writemasks currently work.
nir_print hides it, but r0.w = fneg ssa_1.x is actually a vec4 instruction with
source ssa_1.xxxx. As a silly example nir_dest_num_components(that) = 4 in the
old model. I realize this is quite strange coming from a scalar ISA, but it's
perfectly natural for the class of vec4 hardware for which this was designed. In
that hardware, conceptually all instructions are vec4`, so the sequence "fneg
ssa_1 and write to channel w" is implemented as "fneg a vec4 with ssa_1.x in the
last component and write that vec4 out but mask to write only the w channel".

Isn't this inefficient? It can be. To save power, Midgard has scalar ALUs in
addition to vec4 ALUs. Those details are confined to the backend VLIW scheduler;
the instruction selection is still done as vec4. This mechanism has little in
common with AMD's SALUs. Midgard has a wave size of 1, with special hacks for
derivatives.

As a result, all backends consuming register writemasks are expecting this
pattern of code. Changing the store to take a vec1 instead of a vec4 would
require changing every backend to reswizzle the sources to resurrect the vec4. I
started typing a branch to do this yesterday, but it made a mess of both Midgard
and nir-to-tgsi. Without any good reason to think it'd actually help
performance, I abandoned the idea. Getting all 15 backends converted to the
helpers is enough of a challenge without forcing 10 backends to reswizzle their
sources too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:26 +00:00
Eric Engestrom
80c10b2a4b ci: split farm rules out of test-source-dep.yml
That file has become a bit of the new `.gitlab-ci.yml` with just about
everything in there, but a lot of its content doesn't need to be in the
same file anymore now that `!reference` exists.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24090>
2023-07-12 00:50:23 +00:00
Dave Airlie
f9c1948a21 llvmpipe/linear: don't allow linear path for shader output with location frac
This has been broken for a while, but we weren't hitting the linear paths in CI

This fixes:
tests/spec/arb_enhanced_layouts/execution/component-layout/fs-output.shader_test.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24083>
2023-07-12 09:12:58 +10:00
Eric Engestrom
fb925c9260 ci: fix .valve-farm-manual-rules
28667995e4 ("ci: create manual farm rules") was clearly written before
9a8a7aaf1d ("ci: split valve farm in two") and landed after but missed
this change when rebasing.

Fixes: 28667995e4 ("ci: create manual farm rules")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24097>
2023-07-11 19:53:41 +01:00
Konstantin Seurer
f160f7c525 nir/opt_dead_cf: Clarify comment
Make it obvious that the comment is about the block stitching behavior
of nir_cf_node_remove.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22064>
2023-07-11 17:32:55 +00:00
Konstantin Seurer
4b5737b785 nir/opt_dead_cf: Run dead_cf_block while it makes progress
Previously, nir_opt_dead_cf could skip dead CF nodes because overwriting
cur after dead_cf_block is not enough to cover the whole CF list.
foreach_list_typed would select the next node, skipping the node that
previously made progress:

block 1
if (true) {}
block 2
if (true) {}
block 3
if (true) {}

Would turn into:

block 1, then, block 2
if (true) { }
block 3, then

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22064>
2023-07-11 17:32:55 +00:00
Konstantin Seurer
6532751e4d nir/lower_shader_calls: Remat derefs after shader calls
This avoids spilling deref instructions by wrapping shader calls inside
dummy blocks, rematerializing derefs in their use blocks and removing
the dummy blocks.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22064>
2023-07-11 17:32:55 +00:00
Rob Clark
e81a47cfa2 freedreno/drm/virtio: Trigger host side wait boost
Let the host know that we'll be waiting for a fence via an asynchronous
WAIT_FENCE command.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23955>
2023-07-11 16:59:20 +00:00
Lionel Landwerlin
a85b84ba1e anv: fix utrace signaling with Xe
utrace submits can either have a batch or not.

When there is a batch, the utrace vk_sync is signaled by the utrace
batch (because utrace does a timestamp buffer copy using its own
batch). When there is no batch, the utrace vk_sync should be signaled
by the application batch (no timestamp copy required, utrace can read
the timestamps when the application batch has completed).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fdea48df5e ("anv: Implement Xe version of anv_queue_exec_locked() and queue_exec_trace()")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24085>
2023-07-11 16:27:06 +00:00
Lucas Fryzek
6b2fa965c6 gallium: Remove PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND
Since the mesa state tracker can promote RGB texture formats
to RGBA texture formats (among other formats) without exposing
any of that information to a driver, it is more desirable to
have the behaviour of `PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND`
be the default. This avoids rendering bugs where an application
sets `DST_ALPHA` blending on a format where there is no alpha
channel, that has been promoted to a format that actually has an
alpha channel. The driver can instead rely on the common code
in the state tracker to convert the blending parameter to one
that reflects the limitations of the application requested format,
as long as `PIPE_CAP_INDEP_BLEND_FUNC` is supported.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24044>
2023-07-11 15:52:08 +00:00
Danylo Piliaiev
99e58460ef tu: Fix zombie VMAs array not initialized when first BOs may be freed
First BOs were allocated before zombie_vmas was initialized so on
failure their clean up paths used uninitialized zombie_vmas.

Fixes
 dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
 dEQP-VK.api.object_management.alloc_callback_fail.device_group

See https://gitlab.freedesktop.org/mesa/mesa/-/issues/9247

Fixes: 63904240f2
("tu: Re-enable bufferDeviceAddressCaptureReplay")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24086>
2023-07-11 15:31:59 +00:00
Eric Engestrom
8e383e6d9e ci: set priority:low tag only on non-Marge pipelines
This allows dynamically setting the priority to avoid starving Marge.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23976>
2023-07-11 13:50:38 +00:00
Eric Engestrom
c56528b450 ci: document workflow rules
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23976>
2023-07-11 13:50:38 +00:00
Marek Olšák
12c75922d5 radeonsi/gfx11: fix a regression with PAIRS packets due to shader changes
When the vertex shader switches from hw GS to hw HS and vice versa, we need
to re-emit all draw user SGPRs.

Fixes: 1753b321f8 - radeonsi/gfx11: use SET_SH_REG_PAIRS_PACKED for gfx by buffering reg writes

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24087>
2023-07-11 13:25:35 +00:00
Daniel Schürmann
7e4870e8e5 amd: Do shader binary alignment for prefetch at memory allocation time.
This makes it consistent between drivers and compilers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23799>
2023-07-11 12:01:45 +00:00
Daniel Schürmann
437bf4fccb amd: move end-of-code marker padding to ACO.
This makes it consistent between drivers and compilers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23799>
2023-07-11 12:01:45 +00:00
Marek Olšák
0ffcfdba9e radeonsi: fix gfx9 regression causing GPU hangs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

Fixes: 283be8ac3b - radeonsi: handle GE_CNTL and IA_MULTI_VGT_PARAM as a tracked register
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2651
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9249
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24082>
2023-07-11 11:35:44 +00:00
Christian Gmeiner
1c21f6c90d etnaviv: linker: clean up etna_link_shader(..)
There is no case that etna_link_shader(..) can fail now.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24030>
2023-07-11 11:15:32 +00:00
Christian Gmeiner
a11501e014 etnaviv: linker: handle scenario where there are FS inputs without matching VS output
If there is a FS input but no VS output the behavior is undefined
but okay. Use a register 0 (position) for such cases.

glsl-routing test triggers it with e.g. the following subtest.

Test: VS(C0 -- T0 -- T2 -- T4 T5)
      FS(C0 C1 T0 T1 T2 T3 T4 T5)

This will now end with following linker debug output:

link result:
  vs  -> fs  comps use     pa_attr
  t1  -> t1  xyzw  0,0,0,0 0x000002f1
  t2  -> t2  xyzw  0,0,0,0 0x000002f1
  t0  -> t3  xyzw  0,0,0,0 0x000002f1
  t3  -> t4  xyzw  0,0,0,0 0x000002f1
  t0  -> t5  xyzw  0,0,0,0 0x000002f1
  t4  -> t6  xyzw  0,0,0,0 0x000002f1
  t5  -> t7  xyzw  0,0,0,0 0x000002f1

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24030>
2023-07-11 11:15:31 +00:00
David Heidelberg
ba0ceb3be3 ci/freedreno: another batch of a530 flakes
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24081>
2023-07-11 10:40:24 +00:00
Karmjit Mahil
9b72ece4ec docs: Add inital PowerVR driver documentation
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8048
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23992>
2023-07-11 09:44:29 +00:00
Daniel Schürmann
e88c0bb945 radv: migrate radv_shader hash to BLAKE3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23974>
2023-07-11 09:02:43 +00:00
Daniel Schürmann
8740fb0026 radv/meta: disable disk cache for meta shaders
Meta shaders are already stored in a separate cache file,
inserting them into the disk cache is unnecessary.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23909>
2023-07-11 07:36:53 +00:00
Daniel Schürmann
2efa5ad0f6 vulkan/pipeline_cache: add 'skip_disk_cache' option
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23909>
2023-07-11 07:36:53 +00:00
Daniel Schürmann
c778803d67 aco/assembler: change prefetch mode on GFX10.3+ during loops if beneficial
Totals from 8864 (6.68% of 132726) affected shaders: GFX11

CodeSize: 90776128 -> 90923760 (+0.16%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23748>
2023-07-11 07:15:43 +00:00
Daniel Schürmann
b9c5b273b0 aco/assembler: align loops if it reduces the number of cache lines
This is especially beneficial on GFX6-9.

Totals from 11229 (8.46% of 132726) affected shaders: GFX11

CodeSize: 109608640 -> 109840916 (+0.21%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23748>
2023-07-11 07:15:43 +00:00
Daniel Schürmann
de8ecc127e aco/assembler: align resume shaders with cache lines
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23748>
2023-07-11 07:15:43 +00:00
Julia Tatz
f4ed778cc1 aux/trace: fix (u)int dump
The PRI* macros don't include the required introductory % character

Fixes: d29bb6467e ("aux/trace: use stdint.h types")
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24057>
2023-07-11 06:03:55 +00:00
Lionel Landwerlin
77b76074fc zink: drop linear D32_SFLOAT_S8_UINT requirement
Very likely a typo. Afaict radv/anv don't support this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24078>
2023-07-11 05:42:20 +00:00
Feng Jiang
5c2f6d3f8e virgl/video: Fix out-of-bounds access in fill_mpeg4_picture_desc()
An out-of-bounds access has occurred to array ref[2] and it needs
to be fixed.

Fixes: 6b5aecb195 ("virgl: add support for hardware video acceleration")
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23160>
2023-07-11 04:46:17 +00:00
Mike Blumenkrantz
3c520892b1 zink: fix batch disambiguation on first submit
submit_count is used to disambiguate a batch_id based on the generation
id of a given batch: this value is incremented once on submit and once on
reset such that the diff of the values is > 1 any time the batch does not
represent the fence it was last submitted with

in the case of a batch's first use, however, this value was being incorrectly
incremented such that the first submit would cause disambiguation checks
to erroneously determine that the batch had already completed, breaking synchronization

fixes #9313

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24016>
2023-07-11 02:33:40 +00:00
Lionel Landwerlin
9b572ce8eb zink: update profile vulkan version requirements
Pretty much all the profiles references Vulkan 1.2 or 1.3 only
structures but only say they need a 1.0.X version.

This fails parsing of the Vulkan Profile scripts for generating
implementation checks against a particular profile.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24072>
2023-07-10 21:56:16 +00:00
Feng Jiang
005a4ec9e8 radeonsi/vcn: Remove unnecessary type conversion
The types of both 'encrypted' and 'picture->protected_playback'
are bool, so there is no need. I guess this is a typo.

Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23202>
2023-07-10 21:31:52 +00:00
Feng Jiang
9790350e9d frontends/va: Fix memory leak of decrypt_key
pipe_picture_desc.decrypt_key was alloced in function
handleVAProtectedSliceDataBufferType(), but nowhere to
free it. Now, it will be freed as the vlVaContext is
destroyed.

Fixes: deb7dc82f6 ("frontends/va: handle protected slice data buffer")
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23202>
2023-07-10 21:31:52 +00:00
Dave Airlie
55d9ffc99e gallium/va: fix superres av1 decoding.
On a superres sample, vulkan was decoding fine, but vaapi failed,
fix the micols calculations.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23715>
2023-07-10 21:15:19 +00:00
Eric Engestrom
85ec6ecf82 ci/zink+radv: fix flake definition
Fixes: 741bfb52e6 ("zink/ci: add more tests to the flake list of vangogh")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24068>
2023-07-10 20:46:57 +00:00
David Heidelberg
e175358293 ci/traces: switch from xvfb to Weston XWayland
- Drop now unused RUN_CMD_WRAPPER.
 - Copy-paste Weston initiation code from init-stage2.sh with slightly adjustments.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24056>
2023-07-10 19:57:45 +00:00
David Heidelberg
69614e859e ci/container: we need to keep the wine inside
Needed for testing with wine apitrace.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24056>
2023-07-10 19:57:45 +00:00
David Heidelberg
a0ae98f345 ci/container: add weston into Vulkan container
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24056>
2023-07-10 19:57:45 +00:00
Yonggang Luo
97014036a9 nir: Remove nir_builder_init, it's not used anymore
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24038>
2023-07-10 19:20:18 +00:00
Yonggang Luo
bd27faf083 treewide: remove unused nir_builder
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24038>
2023-07-10 19:20:17 +00:00
Yonggang Luo
48a25ef700 treewide: Remove all usage of nir_builder_init with nir_builder_create and nir_builder_at
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24038>
2023-07-10 19:20:17 +00:00
Christian Gmeiner
df91080389 docs: update etnaviv extensions
I went through the list and updated the extensions that are supported
and passing (most) of the piglit's and deqp's.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24032>
2023-07-10 19:15:05 +00:00
Friedrich Vock
e034ba1c44 radv/rt: Miss rays that hit the triangle's v edge
The hardware seems to do this as well. Avoids invoking hit shaders twice
at shared edges.
Fixes the fails in watertightness tests on emulated RT.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24063>
2023-07-10 18:31:30 +00:00
Friedrich Vock
a096cf784f radv/rt: Enable exact on software intersection functions
These functions need exact output, otherwise watertightness can't be
guaranteed in some cases.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24063>
2023-07-10 18:31:30 +00:00
Sagar Ghuge
34ef0c15db iris: Drop depth cache flush requirement after depth clear/resolve
From Bspec 46959, a programming note applicable to Gfx12+:

   "Since HZ_OP has to be sent twice (first time set the clear/resolve
   state and 2nd time to clear the state), and HW internally flushes the
   depth cache on HZ_OP, there is no need to explicitly send a Depth
   Cache flush after Clear or Resolve."

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24027>
2023-07-10 18:03:39 +00:00
Sagar Ghuge
66a6f48747 anv: Drop depth cache flush requirement after depth clear/resolve
From Bspec 46959, a programming note applicable to Gfx12+:

   "Since HZ_OP has to be sent twice (first time set the clear/resolve
   state and 2nd time to clear the state), and HW internally flushes the
   depth cache on HZ_OP, there is no need to explicitly send a Depth
   Cache flush after Clear or Resolve."

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24027>
2023-07-10 18:03:39 +00:00
Italo Nicola
bcae312819 freedreno/ci: add KHR-GL46.buffer_storage.map_persistent_flush to flakes
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Suggested-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21219>
2023-07-10 16:29:13 +00:00
Italo Nicola
ec260cb7a2 mesa/main: add PIPE_FORMAT_VYUY and PIPE_FORMAT_B8R8_G8R8
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21219>
2023-07-10 16:29:13 +00:00
Italo Nicola
8c3c9c36f3 mesa/main: add PIPE_FORMAT_YVYU and PIPE_FORMAT_R8B8_R8G8
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21219>
2023-07-10 16:29:13 +00:00
Italo Nicola
26e3be513d gallium/st: add support for PIPE_FORMAT_NV21 and PIPE_FORMAT_G8_B8R8_420
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21219>
2023-07-10 16:29:13 +00:00
Italo Nicola
65d6f5aed2 nir: add options to lower y_vu, yv_yu, yx_xvxu and xy_vxux
`y_vu` will be used to convert NV21 to RGB.
`yv_yu` will be used to convert YVYU and VYUY to RGB when the
subsampling formats PIPE_FORMAT_R8B8_R8G8 and PIPE_FORMAT_B8R8_G8R8
are supported.
`yx_xvxu` and `xy_vxux` will be used to convert YVYU and VYUY to RGB
when those subsampling formats are not supported.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21219>
2023-07-10 16:29:13 +00:00
David Heidelberg
f495873866 ci/freedreno: add execution@varying-struct-copy-return-vs flake
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24069>
2023-07-10 15:57:12 +00:00
David Heidelberg
2dab9b37f8 ci/freedreno: add KHR-GL46.buffer_storage flakes
Both flakes occuring time to time on Adreno 6xx series.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24069>
2023-07-10 15:57:12 +00:00
Italo Nicola
7fba2b1fe1 d3d12/ci: add piglit arb_clear_texture-integer fail to CI expectations
Likely related to other ARB_texture_integer fails, instead of something
specific to ARB_clear_texture.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
40e3055efd lima/ci: add some ARB_clear_texture piglit tests to lima-fails.txt
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
a1eabeff66 gallium: remove PIPE_CAP_CLEAR_TEXTURE
ARB_clear_texture is now implemented in common code.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
491110f02e gallium: cleanup util_blitter_clear_render_target
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
3d9438ecd6 clover: use fallback path when pipe->clear_texture is not available
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
6c444ac12f rusticl: use fallback path when pipe->clear_texture is not available
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
29a64f677a mesa/st: use fallback path when pipe->clear_texture is not available
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
2594436c7a gallium: rename util_clear_texture to util_clear_texture_sw
This better explain what this function does, making it less likely that
people mistakenly use it instead of util_default_clear_texture.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
3a044b1681 gallium: use u_default_clear_texture where applicable
This removes some shared code between backends that implemented their
version of pipe->clear_texture without anything driver-specific code.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
28837ac970 gallium: implement u_default_clear_texture
util_clear_texture implements clear_texture through a memset.
This patch implements u_default_clear_texture, which tries to clear the
given texture using a surface plus clear_render_target or
clear_depth_stencil.

In case this path fails, either because the formats are non-renderable
or for some other reason, we fallback to `util_clear_texture`, which is
guaranteed to work.

This will allow us to make ARB_clear_texture available to every driver,
as well as provide HW acceleration for the clear_texture operation.

If some hardware doesn't want to use it, such as llvmpipe, it can always
just directly point to the software version using pipe->clear_texture.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
f4ab329411 d3d12: fix clear_depth_stencil texture deref
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
f326479acc vc4: implement clear_render_target and clear_depth_stencil
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
b094332303 v3d: implement clear_render_target and clear_depth_stencil
Also added some related piglit failures to broadcom-rpi4-fails.txt.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Italo Nicola
9a88064162 freedreno: implement clear_render_target and clear_depth_stencil
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735>
2023-07-10 15:23:06 +00:00
Erik Faye-Lund
b0bbd9c0d3 nir: do not needlessly rely on optimizations
We're going to do this rewrite once we get to nir_opt_algebraic anyway,
so let's save a little bit of needless work here.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24004>
2023-07-10 16:06:40 +02:00
Erik Faye-Lund
6d42711043 radv: do not rely on constant-folding
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24004>
2023-07-10 16:06:40 +02:00
Erik Faye-Lund
1f9a3ee011 nir: use nir_intrinsic_get_var
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24004>
2023-07-10 16:06:40 +02:00
Erik Faye-Lund
67a7b66b90 nir: constify intrin
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24004>
2023-07-10 16:06:40 +02:00
Corentin Noël
15b4670305 ci: Uprev virglrenderer
Enable the latest changes with vrend-video

Change the default branch of virglrenderer to main as upstream did

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24067>
2023-07-10 12:50:06 +00:00
Alyssa Rosenzweig
0695ead057 rogue: Remove commented convert_from_ssa call
Currently, the rogue compiler does not support control flow upstream.
Imagination's plan is to implement an SSA-based register allocation (I wish them
well in this endeavour). As such they won't be needing convert_from_ssa. remove
the commented call so nobody is tempted to put it back in. This takes care of
the rogue portion of #9051.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24015>
2023-07-10 08:07:12 -04:00
Julia Zhang
e51364241a virgl: remove check of VIRGL_CAP_V2_UNTYPED_RESOURCE
Remove check of VIRGL_CAP_V2_UNTYPED_RESOURCE flag in
virgl_resource_from_handle() so that guest can still call
into virglrenderer to import external vulkan resource via
OpenGL APIs even if egl is not initialized.

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23680>
2023-07-10 06:52:39 +00:00
Timothy Arceri
80c001013c glsl: do vs attribute validation in NIR linker
This allows us to tidy up the code and call the attribute location
code a single time rather than doing a "dry run".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24035>
2023-07-10 12:48:01 +10:00
Timothy Arceri
9cbdf5c9e5 glsl: remove dead varyings before assigning attr locations
The GLSL IR code used to clean these up. Some apps such as the Heaven
benchmark fail linking if we don't eliminate them before the linker
validation.

Fixes: a8534c7b4c ("glsl: drop the dce of global vars from GLSL IR linker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9319

Tested-by: Marcus Seyfarth <m.seyfarth@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24035>
2023-07-10 12:47:59 +10:00
Patrick Lerda
689f38b2b4 panfrost: fix refcnt imbalance related to blitter
This issue is mainly a consequence of a call to util_blitter_clear()
with unnecessary blitter states, these states are never freed.

This change is inspired from radeonsi and r600.

Note: PAN_SAVE_FRAGMENT_STATE is added and always enabled
at this stage.

For instance, this issue is triggered on Mali-T720 with
"piglit/bin/fcc-read-after-clear sample tex -auto -fbo", "piglit/bin/cubemap -auto"
and "piglit/bin/fbo-srgb -auto" or on Mali-T820 with "piglit/bin/longprim -auto -fbo"
and "piglit/bin/ext_render_snorm-render -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

cc: mesa-stable

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22522>
2023-07-10 00:26:01 +00:00
Marek Olšák
146a92dd9f radeonsi/gfx11: only use SET_*_PAIRS* packets on dGPUs
They are not available on APUs.

This adds a new template parameter HAS_PAIRS. into draw functions.
Other places add back the non-pairs code for gfx11.

Fixes: 22f3bcfb - radeonsi/gfx11: use SET_*_REG_PAIRS_PACKED packets for pm4 states
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9259

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24010>
2023-07-09 04:18:05 -04:00
Billy Laws
d3662ba461 wgl: Fix depth/stencil image support when using zink kopper
Kopper requires that any depth/stencil images are created through winsys which
was not taken into account by the WGL frontend causing it to hit an assert:
'Assertion failed: ctx->fb_state.zsbuf->texture->bind & PIPE_BIND_DISPLAY_TARGET'

fixes #9256
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24055>
2023-07-08 16:51:29 +00:00
Eric Engestrom
544c0b572e ci/zink+radv: document another flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/45129393

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24053>
2023-07-08 15:09:13 +00:00
Friedrich Vock
d92520e19c Revert "Revert "radv: Enable ray tracing pipelines by default""
This reverts commit 49b400423c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23978>
2023-07-08 10:10:15 +00:00
Friedrich Vock
816ed055ac Revert "radv/rt: Enable RT pipelines on GFX10_3+ excluding vangogh"
This reverts commit 7f3874981d.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23978>
2023-07-08 10:10:15 +00:00
Friedrich Vock
0804e150e4 radv/ci: Skip ray tracing tests on vangogh
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23978>
2023-07-08 10:10:15 +00:00
David Heidelberg
6934f66035 ci/freedreno: document number of a630 devices available
Acked-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24050>
2023-07-08 03:26:50 +02:00
David Heidelberg
15cddb7035 ci/freedreno: re-enable a530 as it's now stable with multiple skips
Extend a530 skips and flakes to make possible test again.

Acked-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24050>
2023-07-08 03:26:47 +02:00
David Heidelberg
69a14f3f7d ci/freedreno: switch a630_{piglit,skqp} and a618_gl to Weston
Slightly faster runtime.

Acked-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24050>
2023-07-08 03:26:43 +02:00
Eric Engestrom
591ce8f185 add initial .git-blame-ignore-revs
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24049>
2023-07-07 23:38:44 +00:00
Eric Engestrom
98ed583a6d clang-format: enforce formatting of egl
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
e85983d772 egl: re-format using clang-format
No manual changes here, this is simply running
$ ninja -C build/ clang-format

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
f30081e586 egl: prevent clang-format from reordering some headers
vulkan_xcb.h is missing an include of xcb.h, breaking the build if the headers are ordered alphabetically.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
f2300eeb67 egl: protect the formatting in a couple of places
These do no follow the normal rules, but it's done on purpose because
it's easier to read like this.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
659bace01a egl: add a few trailing commas
This prevents clang-format from collapsing the closing brace into the
previous line.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
35d8db96ed egl: change a couple of clang-format settings
This code was written with 80-char lines in mind; changing that to 100
with the common .clang-format unnecessarily reflows a lot of code that
looks fine like this.

`AlwaysBreakAfterReturnType: All` might be something that we want
everywhere, but for now only set it here, to match existing code.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
f5eec48799 clang-format: add wayland foreach macros
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:06 +00:00
Eric Engestrom
d4575d7fcb clang-format: add egl foreach macro
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23398>
2023-07-07 23:00:05 +00:00
David Heidelberg
66a01b9377 ci/amd: switch all possible jobs from X11 to Wayland
Saved time is around 3 - 4 minutes per job,
decreasing runtime from ~ 19 minutes to ~ 15 minutes.

Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23964>
2023-07-08 00:16:33 +02:00
Jesse Natalie
a6740ee7a4 d3d12: Fix indexing of local_reference_state
Instead of manually indexing a single-dimensional array as 2-dimensional
(and using the wrong stride for the outer array) just actually make it
a 2-dimensional array.

Fixes: 7edae456 ("d3d12: Track up to 16 contexts worth of batch references locally in bos")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24041>
2023-07-07 12:02:23 -07:00
Sagar Ghuge
8166c1f8c1 intel/genxml: Drop incorrect compute aux-inv register entry
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23958>
2023-07-07 18:05:47 +00:00
Sagar Ghuge
cc6c35518f intel/genxml: Fix typo in CCS cache flush enable
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23958>
2023-07-07 18:05:47 +00:00
Sagar Ghuge
a126ba0cbd iris: Use correct CCS0 aux-map register offset
According to Bspec, COMPCS0_CCS_AUX_INV register offset
is 042C8h and COMPCS0_AUX_TABLE_BASE_ADDR is defined to 042C0h.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23958>
2023-07-07 18:05:47 +00:00
Jordan Justen
c328638b3b anv: Use correct CCS0 aux-map register offset in pipe flush
According to Bspec, COMPCS0_CCS_AUX_INV register offset
is 042C8h and COMPCS0_AUX_TABLE_BASE_ADDR is defined to 042C0h.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23958>
2023-07-07 18:05:47 +00:00
Jordan Justen
1fb9460913 anv: Program compute aux-map base address during queue init
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23958>
2023-07-07 18:05:47 +00:00
Jordan Justen
b4ab4e8549 intel/genxml: Add COMPCS0 aux-table registers
Bspec 43904 defines COMPCS0_CCS_AUX_INV to 042C8h and Bspec 43882
defines COMPCS0_AUX_TABLE_BASE_ADDR to 042C4h.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23958>
2023-07-07 18:05:47 +00:00
Jesse Natalie
0908adf567 ci/windows: Re-enable Windows builds
Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24042>
2023-07-07 17:40:38 +00:00
Jesse Natalie
ea3c73b33c microsoft/clc: Fix usage of nir_builder_at
nir_builder_at requires a block to chase back to the function impl,
but for an empty function impl, the previous code produced a cursor
with a null pointer. It was also just extra complicated.

While I'm here, use the new foreach helper since this code needs an impl.

Fixes: 12a268ea ("microsoft: Use nir_builder_at")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24042>
2023-07-07 17:40:38 +00:00
Jesse Natalie
511116d630 radv: Fix label name
Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24042>
2023-07-07 17:40:38 +00:00
Eric Engestrom
158813816e virgl/ci: fix skips definition
Skips are regexes, not globs :)

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24026>
2023-07-07 17:17:00 +00:00
Eric Engestrom
5b2e672bb0 v3dv/ci: skip more tests that are timing out
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24018>
2023-07-07 15:54:45 +00:00
Eric Engestrom
fb7c974514 v3dv/ci: fix skipping of vk tests
This is a regex, not a glob, so `dEQP-VK.ssbo.phys.layout.3*` matched
all of `dEQP-VK.ssbo.phys.layout`.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24018>
2023-07-07 15:54:45 +00:00
Eric Engestrom
d5e01e67a4 vc4/ci: fix skipping of gles3 piglit tests
This is a regex, not a glob, so `spec@!opengl es 3*` matched all of
`spec@!opengl es `.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24018>
2023-07-07 15:54:45 +00:00
Ganesh Belgur Ramachandra
975a8ecc88 frontends/va: use resources instead of views
Avoids the generation of sampler views as they are unnecessary

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23159>
2023-07-07 15:10:14 +00:00
Ganesh Belgur Ramachandra
025dcbea66 d3d12: implementation for get_resources()
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23159>
2023-07-07 15:10:14 +00:00
Ganesh Belgur Ramachandra
e4389fe0ee nouveau: implementation for get_resources()
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23159>
2023-07-07 15:10:14 +00:00
Ganesh Belgur Ramachandra
8e147746c4 gallium/vl: implementation for get_resources()
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23159>
2023-07-07 15:10:14 +00:00
Ganesh Belgur Ramachandra
815e8cee7d gallium/pipe: Add get_resources() to pipe_video_buffer
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23159>
2023-07-07 15:10:14 +00:00
Guilherme Gallo
a5ccb4dafb ci/lava: Use an alpine image for SSH client container
Use a lightweight container for ping, ssh, curl and bash support.
Also use an image located at fd.o infrastructure, since we are having
some issues with Collabora's gitlab one lately.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23534>
2023-07-07 14:34:40 +00:00
Guilherme Gallo
db3b5370ec ci/lava: Add LAVA SSH client container
- To keep things organized, create a base hidden jobs for alpine images,
  as we have 2 now
- This image will have an SSH client ran by LAVA dispatchers
  (x86_64-only) who will serve as a bypass channel of output and dmesg
  and an alternative for UART.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23534>
2023-07-07 14:34:40 +00:00
Guilherme Gallo
d222502624 ci/lava: Increase Docker action failure_retry counter
Our LAVA farm is currently experiencing issues with running and pulling
docker. LAVA has been detecting (with a low rate) timeouts during these
commands, causing some jobs to fail with infrastructure errors.

Increasing the failure_retry will make the job retry run the container
when LAVA detects the failure without losing its place in the job queue.

We are currently investigating why docker times out. But, when LAVA
fails to detect it, we cancel the job on our side and resubmit it to the
job queue. For more information, please refer to following dashboard:
https://ci-stats-grafana.freedesktop.org/goto/VjZvaA_4z?orgId=1

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23534>
2023-07-07 14:34:40 +00:00
Yonggang Luo
ec819a16b9 iris: Convert to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24040>
2023-07-07 14:02:40 +00:00
Yonggang Luo
7471bc2574 intel/vulkan: Convert to use nir_foreach_function_impl when possible
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24040>
2023-07-07 14:02:40 +00:00
xurui
b6cfb9aa9d zink: The result should be assigned a value when returned
Signed-off-by: xurui <xurui@kylinos.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24034>
2023-07-07 13:32:34 +00:00
Konstantin Seurer
2ad2af19ce lavapipe: Always advertise formatless storage image OPs
The pipe cap isn't really accurate since shaders created by lavapipe take
a different codepath compared to GL. The format information is part of
the descriptor.

This allows vkd3d-proton to advertise typed UAV loads. (Whatever that
means)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24014>
2023-07-07 13:09:59 +00:00
Karol Herbst
d681cdf4a6 rusticl: support subgroups
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
0fd1b21db2 rusticl: deal with compute_param returning 0
Some drivers might return 0 indicating they haven't written any data. But
treating it as 0 for all current `COMPUTE_CAP`s is fine, so no need to
panic at runtime here.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
a8df5cfa3a gallium: change PIPE_COMPUTE_CAP_SUBGROUP_SIZE to a bitfield of sizes
This will be required for `cl_intel_required_subgroup_size`, but it
already helps implementing OpenCL subgroups as this allows us to check
with every subgroup size when implementing
`CL_KERNEL_LOCAL_SIZE_FOR_SUB_GROUP_COUNT`.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
13df23bd67 rusticl/device: rework subgroups to subgroup_sizes
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
af98c5c77c rusticl/util: add div_round_up
Same as DIV_ROUND_UP

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
8dbccadb71 rusticl/util: add an Iterator to iterate over set bits in an integer
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
b5f8ddee58 iris: implement get_compute_state_subgroup_size
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
f0b2944a0b gallium: add PIPE_COMPUTE_CAP_MAX_SUBGROUPS
This is required for enabling OpenCL subgroups.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
98d6edc6ad gallium: add get_compute_state_subgroup_size
This will be required by drivers supporting multiple subgroup sizes with
a given CSO to properly implement OpenCL subgroups.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
b72d950939 gallium: add simd_sizes to pipe_compute_state_object_info
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
5afed06615 llvmpipe: report the proper subgroup size
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
1e655b2f25 clc: rework optional subgroup feature
OpenCL 3.0 core requires __opencl_c_subgroups to be set, the OpenCL
cl_khr_subgroups extenions can only be enabled if and only if the driver
guarentees independent forward progress between subgroups.

See CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS for more information.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
17e749dc00 vtn: more CL subgroups
v2: handle ExecutionModes

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Karol Herbst
11cb1a7bd7 docs: add missing get_compute_state_info documentation
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22893>
2023-07-07 12:27:35 +00:00
Alyssa Rosenzweig
6562e89893 v3dv: Use vk_index_type_to_bytes
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24017>
2023-07-07 07:22:32 -04:00
Alyssa Rosenzweig
6d5979f1cd lavapipe: Use vk_index_type_to_bytes
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24017>
2023-07-07 07:22:26 -04:00
Alyssa Rosenzweig
b733fcb337 vulkan: Add vk_index_type_to_bytes helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24017>
2023-07-07 07:22:26 -04:00
Yonggang Luo
ce2252d265 etnaviv: Convert to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24037>
2023-07-07 10:30:56 +00:00
Friedrich Vock
1c268196b8 meson: Prefix Vulkan "Ray Tracing" summary with "Intel"
This only applies to Intel's ray tracing. With RADV also having
ray tracing support that is always compiled in, seeing
"Ray Tracing: NO" is a bit misleading.

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24008>
2023-07-07 09:39:11 +00:00
Lucas Stach
334bcb31a5 etnaviv: blt: fix multisampled blits
The BLT blit currently assumes that all blits with src samples > 1
are downsampling blits. This isn't correct, as we can also blit
between two multisampled resources with src and dst samples > 1.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23595>
2023-07-07 09:18:33 +00:00
Lucas Stach
7552f481dc etnaviv: rs: fix multisampled blits
When blitting between two multisampled resources, the blit region needs
to be scaled by the number of samples. Currently this is only done
correctly for downsampling blits where src samples > dst samples. Fix
it to also work as expected when src samples == dst samples.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23595>
2023-07-07 09:18:32 +00:00
Lucas Stach
12e4988e82 etnaviv: move resource level dimension members to make comments line up
Width and height of the resource level are stored in pixels, while
the padded dimensions are stored in samples. Move the members to
make them line up with the comments.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23595>
2023-07-07 09:18:32 +00:00
Gert Wollny
8f3e298a58 r600/sfn: Shorten array elements live range
If an array is accessed indirectly, add a buffer live range of
one cycle before (for write) or after (for read), instead of pinning
the array from the start.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24036>
2023-07-07 06:48:09 +00:00
Gert Wollny
409486aa57 r600/sfn: Be more conservative with AR re-use
If we try to re-use the AR register after a new CF was started
we will get into trouble, because it is no longer loaded, so
clear the AR register handle when we hit a non-ALU instruction
while scanning the shader to split AR loads. With that
dependencies will be set accodingly.

Fixes: d21054b4bc
    r600/sfn: Add pass to split address and index register loads

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24036>
2023-07-07 06:48:09 +00:00
Gert Wollny
91fa1970c9 r600: Pre-EG - Set wrap texture modes to repeat when seemless cube is used
On Pre-Evergreen hardware we have a flag
   "Force Clamp X,Y policy to wrap for CubeMaps"
but it doesn't seem to affect how border clamping is done. With
bf3027 this is set to PIPE_TEX_WRAP_CLAMP_TO_EDGE for cube maps,
and results in the regression reported in #9028.
Forcing repeat mode fixes the issue.

Fixes: bf3027c391
   mesa/st: Normalize wrap modes for seamless cubes

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9028

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23848>
2023-07-07 04:41:46 +00:00
Yiwei Zhang
75fd29036f venus: recheck valid bit after acquiring lock to init ahb mem type bits
Fixes: 432ffaf10a ("venus: refactor ahb buffer mem type bits cache to be lazy")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24033>
2023-07-07 00:03:35 +00:00
Emma Anholt
ee7e440743 ci/radv: Add testing of the GLES CTS using ANGLE on stoney.
We're interested in a Vulkan-only stack in Chrome OS, where Android's GLES
would be provided by ANGLE-over-Venus-over-RADV.  Let's get some testing
covering ANGLE-on-RADV first.

This is structured as a single partial job pre-merge to catch most
regressions, and 2 longer manual jobs to do full coverage for when you
need to update the xfails list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
Emma Anholt
8d7d2aeba2 ci/radv+radeonsi: Fix the combo rules to include core vulkan changes.
We were retesting on core GL changes, and radeonsi and radv driver
changes, but not core VK changes.  Affects amd-raven-skqp.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
Emma Anholt
2e3c445b68 ci/anv: Add testing of the GLES CTS using ANGLE on TGL.
We're interested in a Vulkan-only stack in Chrome OS, where Android's GLES
would be provided by ANGLE-over-Venus-over-ANV.  Let's get some testing
covering ANGLE-on-ANV first.

This is structured as a single partial job pre-merge to catch most
regressions, and a longer manual job to do full coverage for when you need
to update the xfails list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
David Heidelberg
ebec1e3677 ci/x86: Build ANGLE for testing layering on VK drivers.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
Emma Anholt
0811a51e9a ci/amd: Report flakes to #amd-ci on OFTC.
Until we get better tooling for crawling job logs, this is our best way of
tracking and updating flaky tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
Emma Anholt
6bf4b89fcb ci: Clean up .intel-rules definition.
The "!reference" syntax means we can just pull the two driver's rulesets
together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
Emma Anholt
cc7aaa2c54 ci/anv: Make anv-manual-rules actually manual on anv-only changes.
I guess that's why I've seen some zink-anv-tgl-full runs (the only
consumer) happen on people's MRs that I hadn't kicked off myself.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20163>
2023-07-06 23:12:30 +00:00
Yiwei Zhang
26d83ae255 venus: refactor query batch handling
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:48 +00:00
Yiwei Zhang
c3ad8c2f94 venus: cache query batches at cmd pool
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:48 +00:00
Yiwei Zhang
a74b606142 venus: refactor vn_cmd_add_query_feedback and miscs
There's no functional changes:
1. remove unused function arg and use snake case
2. do early return for direct recording (avoid dup feedback checks)
3. use vk_alloc instead of vk_zalloc if applicable
4. move local struct closer to usage, and use assignment
5. convert secondary cmd in_render_pass condition check to assert
6. avoid redundant list_del upon freeing up

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:48 +00:00
Yiwei Zhang
5889995fbd venus: cmd to reuse alloc copy from cmd pool
Directly use the alloc callback upon pool reset/destroy since the compat
is blessed by the spec.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:48 +00:00
Yiwei Zhang
81aa680b3c venus: track pool in cmd and track device in pool
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:48 +00:00
Yiwei Zhang
fe4cf26687 venus: fix leaks from tracked present src images
The cmd can be reset and freed during render pass recording as well.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:48 +00:00
Yiwei Zhang
ee3f17ca79 venus: fix a cmd tmp storage leak
When the pool is destroyed, cmds are implicitly freed. Cmd level allocs
have to be cleaned up to avoid leak.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24009>
2023-07-06 22:36:47 +00:00
Yiwei Zhang
87b99bf470 venus: extend VkBuffer cache to cover concurrent sharing
vkd3d-proton always use concurrent sharing when there exists multiple
queue families, and all queue families are used. This change adds the
exact simple case to the existing cache.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23916>
2023-07-06 21:29:32 +00:00
Yiwei Zhang
1e17234260 venus: refactor buffer cache related bits
Simplify returns and reorder inits.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23916>
2023-07-06 21:29:32 +00:00
Yiwei Zhang
432ffaf10a venus: refactor ahb buffer mem type bits cache to be lazy
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23916>
2023-07-06 21:29:31 +00:00
Christian Gmeiner
eaab20c58f ci/etnaviv: update ci expectation
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24029>
2023-07-06 20:34:28 +00:00
Lionel Landwerlin
5ebbb937af docs/features: add hasvk entries
Automatically generated using
https://github.com/djdeath/mesa-jhbuild/blob/master/update_features.py

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23986>
2023-07-06 20:26:27 +00:00
Lionel Landwerlin
1bed67dc3a docs/features: add more missing extensions
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23986>
2023-07-06 20:26:27 +00:00
Sil Vilerino
80731c4b43 frontend/va: Remove fence_server_sync for surface in vlVaHandleVAProcPipelineParameterBufferType
Fixes: fb1783616e ("frontend/va: Add video processing async fence support")

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24023>
2023-07-06 19:02:54 +00:00
Sil Vilerino
52647bd221 frontend/va: Fix vaSyncSurface and vaQuerySurface status for drivers not implementing get_processor_fence
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24023>
2023-07-06 19:02:54 +00:00
Eric Engestrom
bcc1e33966 docs/codingstyle: fix clang-format command
I should've copy/pasted it back into my terminal to double-check it.

The `-o` is incorrect (it splits each char that matches into its own
line) and there's a missing `^` to remove lines that start with a hash
even if they contain anything else.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24028>
2023-07-06 18:54:41 +00:00
Eric Engestrom
209a347a8c zink/ci: fix skips & flakes for zink+radv on vangogh & navi10
These are regexes, not globs.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24021>
2023-07-06 18:22:18 +00:00
Eric Engestrom
827e7182a5 etnaviv/ci: fix skips definition
Skips are regexes, not globs :)

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24025>
2023-07-06 18:02:43 +00:00
Eric Engestrom
703102d7cb intel/ci: fix skips definitions
Skips are regexes, not globs :)

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24024>
2023-07-06 17:18:15 +00:00
Eric Engestrom
42df7131ba panfrost/ci: drop invalid skips that are already marked as known flakes
Skips are regexes, which means the `*` would've needed to be escaped. As
is, they can't match any existing test.

Since these lines are also all in `-fails.txt` as `Crash`es, let's just
remove them from the skips.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24022>
2023-07-06 16:58:58 +00:00
Mike Blumenkrantz
6686a1e7ea zink: fix anv ci flakes (for real this time)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24020>
2023-07-06 12:23:13 -04:00
Mike Blumenkrantz
1c29200a15 vk/wsi: add error logging for syncfile import/export failures
these are otherwise pretty obscure

Acked-by: Daniel Stone <daniels@collabora.com>

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23835>
2023-07-06 14:17:02 +00:00
Mike Blumenkrantz
a69a4f393b vk/wsi: unify dmabuf exporting
Acked-by: Daniel Stone <daniels@collabora.com>

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23835>
2023-07-06 14:17:02 +00:00
Mike Blumenkrantz
2b885b233f vk/wsi/x11: stop roundtripping on presentation
there's no requirement to return SUBOPTIMAL based on processed events
at present time, nor is SURFACE_LOST required here vs as a result of
acquire, so allow both of these conditions to be reported there instead

improves presentation perf by ~60%

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23835>
2023-07-06 14:17:02 +00:00
Mike Blumenkrantz
36d5b58317 vk/wsi/x11: handle geometry updating more asynchronously
this uses geometry updates from events when possible in order to avoid
roundtripping during vkGetPhysicalDeviceSurfaceCapabilitiesKHR, which
significantly improves wsi performance in severely bottlenecked scenarios

now that roundtripping is completely eliminated from acquires in most scenarios,
this improves acquire perf by 10%+

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23835>
2023-07-06 14:17:02 +00:00
Mike Blumenkrantz
fb9f697fbb vk/wsi/x11: move surface alpha check from get_caps to creation
this makes get_caps a bit less heavy

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23835>
2023-07-06 14:17:02 +00:00
xurui
776f258ddb zink: Free the cdt when an error occurs
Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24012>
2023-07-06 13:50:48 +00:00
Lionel Landwerlin
0a6dd797ea nir/opt_shrink_vectors: enable sparse intrinsics shrinking
Image sparse loads can be stripped from their sparse component if
unused and turned into non sparse variants.

Texture sparse accesses can also be turned off if unused.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23995>
2023-07-06 13:16:13 +00:00
Lionel Landwerlin
c26c0a36d3 intel/fs: disable coarse pixel shader with interpolater messages at sample
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9292
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23962>
2023-07-06 12:48:52 +00:00
Antonio Gomes
30163c59f7 rusticl: Drop Program::kernel_count
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23999>
2023-07-06 12:32:34 +00:00
Antonio Gomes
3dde5c231e rusticl: Drop some Kernel data and have a NirKernelBuild ref instead
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23999>
2023-07-06 12:32:34 +00:00
Erik Faye-Lund
005b41fd39 tgsi: uint -> unsigned
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
a42dc4ef5e tgsi: uint -> uint32_t
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
dcbca3e3b3 tgsi: use enum for interpolate-mode
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
733ed06e94 tgsi: use enum for shader-type
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
e4b86e76cf tgsi: use enum for property-name
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
5ccf63dc9d tgsi: use enum for tgsi-file type
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
32f40b2e81 tgsi: use stdint.h types
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
a65da48b6c tgsi: use enum instead of defines
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
e8114fe9a7 aux/util: uint -> unsigned
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
284151262f aux/util: use stdint.h types
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
3f79b51dcd aux/util: use unsigned instead of uint
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
ae0df2a52f aux/util: use enum for primitive-type
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
70e153e8d0 aux/util: match type of pipe_draw_start_count_bias::start/count
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
0f98f750db aux/util: use enum for render-condition
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
647241a770 aux/pp: use unsigned instead of uint
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
872719d15c gallivm: use unsigned instead of uint
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:43 +00:00
Erik Faye-Lund
c3ec99bf9a pipebuffer: use unsigned instead of uint
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:42 +00:00
Erik Faye-Lund
d29bb6467e aux/trace: use stdint.h types
...as well as stdbool.h ;)

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24002>
2023-07-06 12:03:42 +00:00
Erik Faye-Lund
d941078129 math: drop MAT_[ST][XYZ] defines
These were used a single time each, and that argually made the code a
bit more confusing to read. Let's just drop these, and use the correct
indexes directly.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24003>
2023-07-06 09:42:44 +00:00
Erik Faye-Lund
4a00e4ff61 math: remove unused defines
Since libmesa_classic got removed, we no longer have the assembly
sources that used these defines, so let's get rid of them.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24003>
2023-07-06 09:42:44 +00:00
Erik Faye-Lund
386a365645 math: fix indentation in m_matrix.[ch]
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24003>
2023-07-06 09:42:44 +00:00
Zhang Ning
a4c5d0ebea lima: use u_pipe_screen_lookup_or_create in the renderonly path too
close #8739

Signed-off-by: Zhang Ning <zhangn1985@outlook.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23538>
2023-07-06 06:59:21 +00:00
QwertyChouskie
a57dc77482 docs/features.txt(fix): mark VK_EXT_pipeline_robustness as supported on radv
This was implemented in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24013>
2023-07-06 05:53:32 +00:00
Marek Olšák
7b10877078 vbo: correctly restore _VaryingInputs for display list fast path
Fixes: 3a294ff0 - mesa: move the _mesa_set_varying_vp_inputs call to where the state changes
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9007

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23796>
2023-07-06 04:01:50 +00:00
Timothy Arceri
5c1d91d5da st/glsl: merge st_glsl_to_ir.cpp with st_glsl_to_nir.cpp
There is no longer any other IR so lets finally merge these together
to make the code easier to follow.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
c6fe8b7cba st/glsl: merge st_link_glsl_to_nir() into st_link_nir()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
692c97c70a st/glsl: merge link_shader() into st_link_nir()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
ac2b3cf7ef glsl: remove glsl ir optimisation loop from linker
We no longer need to call this here and can depend on the glsl_to_nir
pass to call it and clean up anything it cannot handle. Everything
else can now depend on the nir optimisation passes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
ed3fe89562 glsl: move store_fragdepth_layout() to nir linker
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
e8c2c59372 glsl: drop link_invalidate_variable_locations()
All this code does is reinitialise the values to what the original
ir_variable() call already set them too. This code is very old dating
to the initial glsl compiler support, it has probably been unrequired
for a long time now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
ee68c633e9 glsl: set last_vert_prog in the nir linker
Another step to removing the GLSL IR linker

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:07 +00:00
Timothy Arceri
0d7b5f8b30 glsl: inline link_varyings()
Most code has already been moved to the NIR linker.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
bc66c2588a glsl: remove the always_active_io flag from GLSL IR
No longer used.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
06f3988c58 glsl: move disable_varying_optimizations_for_sso() to NIR linker
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
7cff8d85c0 nir/glsl: add nir_var_declared_implicitly enum
This will be used in the following patch.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
a8534c7b4c glsl: drop the dce of global vars from GLSL IR linker
All this does is compilcate things such as forcing us to set
var->data.always_active_io in the glsl linker. Just let NIR clean
these up for us instead.

A Zink test hits a new assert but this is not a regression it just
uncovers an existing mesa bug.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
a8c485efee glsl: remove unused system vars
System vars are added to the resource list as inputs so remove any
dead ones before building the list.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
cbff8f8c5c glsl: remove unused buffer objects with packed layout
These are currently removed by the GLSL IR DCE pass but we will
drop that in a following patch. Also there are scenarios where these
might not be detected as unused until the NIR optimisations have
been run so we really need to do it here too anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
fa56e911b8 glsl: call assign_attribute_or_color_locations() in NIR linker
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
f3c6718f73 glsl: port assign location code for VS inputs or FS outputs
Here we port the code to the NIR linker.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
6786a39940 glsl: move lowering linker code out of st
Move all these lowering calls into the linker where they belong. This
makes future changes to the linker more flexible and is needed to
allow some following patches as we need to call things in a specific
order.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
a513107424 glsl: move some compiler code out of st
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
ef58936876 mesa: add some new constants
These will be used by the compiler in a following patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Timothy Arceri
5f26c647fb glsl: add some more c wrappers for string_to_uint_map
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846>
2023-07-06 01:21:06 +00:00
Iago Toral Quiroga
be91133f87 broadcom/compiler: don't leak v3d_compile when finding a new best strategy
If we had selected a best strategy and find an even better one we need to
make sure we free the previous one.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24001>
2023-07-05 21:52:01 +00:00
Iago Toral Quiroga
dcc6288a13 broadcom/compiler: free defin and defout arrays if they already exist
Just like we do for everything else here, since we are going to realloc
them again right below. Notice this is not exactly a memory leak, since
all these arrays are allocated with ralloc using v3d_compile as context,
so all allocations will be eventually freed when the context is destroyed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24001>
2023-07-05 21:52:01 +00:00
Danylo Piliaiev
b9de7da421 tu: Add missing dbg reg stomping to tu_CmdBeginRendering
Also we shouldn't stomp PC_DRAW_INDX_BASE - we never use it and
stomping it together with some other reg leads to a fault.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23993>
2023-07-05 21:24:12 +00:00
Konstantin Seurer
39427352f6 llvmpipe,lavapipe: Relayout lp_descriptor
This is more robust in case of a descriptor type mismatch.

Fixes test_null_descriptor_mismatch_type (vkd3d-proton).

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23996>
2023-07-05 20:52:06 +00:00
Konstantin Seurer
7b1a1e2163 llvmpipe: Allocate more dummy sample functions for FORMAT_NONE
When a null texture is sampled with a non-null sampler, having only one
set of sample functions would lead to an OOB read.

Fixes test_null_srv (vkd3d-proton).

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23996>
2023-07-05 20:52:06 +00:00
Konstantin Seurer
91d090f0e7 llvmpipe: Allow comparison sampling for float formats
Fixes test_gather_c (vkd3d-proton).

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23996>
2023-07-05 20:52:06 +00:00
Konstantin Seurer
9caf625490 lavapipe: Set the descriptor count to what vkd3d-proton requires
vkd3d-proton tries to allocate a maximum size descriptor set. The
previous limits were to high for that to work reliably.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23996>
2023-07-05 20:52:06 +00:00
Konstantin Seurer
f281290005 gallivm: Fix atomic_global types
Passes LLVM validation on the test_mesh_shader_rendering vkd3d-proton
test.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23996>
2023-07-05 20:52:06 +00:00
Sviatoslav Peleshko
791785c2b4 glsl: Fix yylloc.source propagation in YYLLOC_DEFAULT
Currently, it's always initialized to 0, but we should take the value from
the grouping passed to the macro. This way parser will have the full
location info, and errors originating from it will show the correct
source file number.

Fixes: a0cfe8c4 ("glsl: Fix missing initialization of yylloc.source")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9229
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23966>
2023-07-05 20:22:27 +00:00
Patrick Lerda
80ccc3f822 radeonsi: fix refcnt imbalance related to util_blitter_save_fragment_constant_buffer_slot()
Indeed, util_blitter_clear() requires a call to
util_blitter_save_fragment_constant_buffer_slot(),
but most other blitter functions do not.

For instance, this issue is triggered with:
"piglit/bin/object-namespace-pollution glDrawPixels buffer -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 03bc7503d4 ("radeonsi: save the fs constant buffer to the util blitter context")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23856>
2023-07-05 20:01:09 +00:00
Dave Airlie
fb5ecbb4fe clc: llvm 17 requires opaque pointers.
You can't turn this off for llvm17+, this at least makes things
run against llvm git now instead of blowing up in clang.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24000>
2023-07-05 19:21:49 +00:00
Pavel Ondračka
b392d3ac27 r300: assert that every writer has a reader
Dead writes can lead to problems with regalloc, so add a safety assert
to catch such cases in the vertex shaders at least in the meantime.

Additionally we could think there are no readers due to some shortcoming
of out dataflow analysis or some other bug which we would also like to
know about.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23927>
2023-07-05 18:34:37 +00:00
Pavel Ondračka
5716700bbf r300: disable ntt regalloc for vertex shaders
We have much better regalloc in the backend, and additionally having
a close to ssa form means some optimizations can be more effective.

RV370:
total instructions in shared programs: 82500 -> 81645 (-1.04%)
instructions in affected programs: 32147 -> 31292 (-2.66%)
helped: 396
HURT: 1
total temps in shared programs: 12355 -> 12465 (0.89%)
temps in affected programs: 368 -> 478 (29.89%)
helped: 5
HURT: 96

GAINED: shaders/trine/vp-237.shader_test VS
GAINED: shaders/trine/vp-79.shader_test VS

RV530:
total instructions in shared programs: 130706 -> 129684 (-0.78%)
instructions in affected programs: 40902 -> 39880 (-2.50%)
helped: 428
HURT: 1
total temps in shared programs: 16811 -> 16920 (0.65%)
temps in affected programs: 421 -> 530 (25.89%)
helped: 7
HURT: 89

The instruction decrease is from the channel merging pass which can be
much more agressive when we have ssa-like form.

The temp regressions are cases where we merge something like
  3: MAD output[1].xy, const[8].xy__, input[1].ww__, temp[0].xy__;
 ....
 12: MOV output[1].zw, none.__00;

We always merge the first instruction into the second one, which means
the liverange for temp[0] will be unnecessarily extended here.
This can be fixed with the following draft MR
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19790
however if we ever get a VS pair scheduling support this will be solved
as well as a consequence, so let it be for now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7693
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23927>
2023-07-05 18:34:37 +00:00
Pavel Ondračka
7c291fca15 r300: remove most of backend contant folding
This is now done in NIR. The remaining one for ADD + 0 to MOV is kept
until we move some remaining part of FS lowering to NIR.

There single regressions is in one d3d->glsl shader from Wine.
Wine sets invariant for glPosition which translates to exact bit for all
calculations leading to it (or the TGSI PRECISE flag). r300 backend
ignores is completelly, so removing the backend optimizations should
even make us more correct in this regards.

RV530:
total instructions in shared programs: 130705 -> 130706 (<.01%)
instructions in affected programs: 16 -> 17 (6.25%)
helped: 0
HURT: 1

RV370: no change

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23927>
2023-07-05 18:34:37 +00:00
Pavel Ondračka
41f1dd89a3 r300: add some early safe bool lowering
This lowers some of the bool-producing comparisons and following bcsels
if the bool comparison results is only used in the bcsel.
This is a temporary solution before we can fork ntt and optimize
the pass sequence there. Right now if we have something like
bcsel(a,b,0.0) we lower it to flrp in nir_lower_bool_to_float. The
flrp goes to backend where it will be lowered to 2 MADs. However in this
case with one of the arguments being a constant one MAD is enough. The
backend can figure this out in the constant folding pass, however this
is actually one of the last things we need it for. So if we do early
translation of the bcsels, than the algebraic pass can clean it up and
we can remove more backend code in the next patch.

no significant change with RV370 shader-db:
total instructions in shared programs: 82497 -> 82496 (<.01%)
instructions in affected programs: 1029 -> 1028 (-0.10%)
helped: 4
HURT: 3
total temps in shared programs: 12351 -> 12355 (0.03%)
temps in affected programs: 10 -> 14 (40.00%)
helped: 0
HURT: 4

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23927>
2023-07-05 18:34:37 +00:00
Pavel Ondračka
0bf6dcb785 r300: lower undefs to zero
They will get translated to read from random register otherwise, which is
not problematic per se, but they will not be regalloced and if the
initial register index was too high, we can fail the shader compilation
because we think we run out of registers.

Almost no effect with shader-db on RV530:
total instructions in shared programs: 130707 -> 130705 (<.01%)
instructions in affected programs: 1012 -> 1010 (-0.20%)
helped: 2
HURT: 1

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23927>
2023-07-05 18:34:37 +00:00
Yonggang Luo
ba83c1e254 radeonsi: Use ALIGN_POT instead ALIGN_TO
ALIGN_POT would be a bit faster as it's have no divide arithmetic

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23987>
2023-07-05 18:04:27 +00:00
Friedrich Vock
4880c827d6 radv: Re-enable RT pipeline capture/replay handles
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
169583a4ad radv/rt: Rework radv_GetRayTracingCaptureReplayShaderGroupHandlesKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
fccf6fbeec radv/rt: Replay shader allocations according to capture/replay handle
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
3e9bd821f1 radv/rt: Associate capture/replay handles with stages
For stages where the capture/replay handle is only known after compiling
and uploading the shader, the shader needs to be relocated to the VA
corresponding to the capture/replay address.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
eee0068943 radv/rt: Only compare the non-recursive capture/replay handle
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
59d269c48e radv: Add radv_rt_capture_replay_handle
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
e3bd54d2a8 radv: Add support for creating capture/replay shaders
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
4f192b9af4 radv: Split up implementation of radv_shader_create
This will make it easy to re-use the split-up parts for creating
replayed shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
51f2fa1a5e radv: Break up radv_shader_nir_to_asm
radv_shader_nir_to_asm actually had 3 functions: compiling the NIR to
asm, uploading the shaders and generating debug info for them.
This reduces the functionality of radv_shader_nir_to_asm to only compile
NIR to asm. Uploading the shader and generating debug info is split into
separate functions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:25 +00:00
Friedrich Vock
878a731c77 radv: Add radv_shader_reupload
Used for relocating RT shaders with capture/replay.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:24 +00:00
Friedrich Vock
744357477e radv: Add utilities to serialize and deserialize shader allocation info
Can be used to capture/replay an arbitrary sequence of shader
allocations while preserving VAs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:24 +00:00
Friedrich Vock
d23e41de6c radv: Add option to allocate shaders in replayable VA range
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:24 +00:00
Friedrich Vock
ec9f5b7777 radv: Move shader arena allocation to a separate function
The arena size is also needed for capture/replay.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:24 +00:00
Friedrich Vock
91241014e8 radv: Add radv_shader_free_list
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
2023-07-05 15:58:24 +00:00
José Roberto de Souza
5cc9569b5b iris: Convert slab address to canonical
This was the only missing case of bo->address that could possibly not
formated as canonical.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23994>
2023-07-05 13:18:50 +00:00
Alyssa Rosenzweig
0e7e6f2a0d nir: Fix breaking in nir_foreach_phi(_safe)
When I reading through some of my older commits I noticed that `break` in
`nir_foreach_phi` is broken because I used the two-loop trick wrong. Rewrite the
macros to fix this, and also to generally be a lot cleaner.

Fixes: 7dc297cc14 ("nir: Add nir_foreach_phi(_safe) macro")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23957>
2023-07-05 08:42:23 -04:00
Michael Tretter
ee62f4629a kmsro: assert that scanout refcount is larger than 0
The dumb buffer backing the renderonly_scanout is only destroyed if the
refcount reaches zero. If a driver does not correctly initialize the
refcount, the refcount may be negative and the buffer will never be
freed.

Add an assert to ensure that drivers correctly initialize the refcount.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23743>
2023-07-05 12:10:18 +00:00
Michael Tretter
279d08a18a panfrost: remove BO from cache before closing GEM
If the GEM is closed before setting the BO in the sparse array to zero,
a newly allocated GEM may be associated with a stale BO that is left in
the cache reusing an old BO.

Zero the BO before closing the GEM to make sure that the BO is removed
from the cache and won't be associated with a different GEM.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23744>
2023-07-05 11:50:59 +00:00
Boris Brezillon
7a0033a1c9 winsys/panfrost: Make sure we reset scanout on error in create_kms_dumb_buffer_for_resource()
If an error occured, make sure we reset the scanout object before
leaving, otherwise the next user of this handle will hit the
refcnt == 0 assert.

Fixes: ad4d7ca833 ("kmsro: Fix renderonly_scanout BO aliasing")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23746>
2023-07-05 06:22:22 +00:00
Boris Brezillon
45a27adc3b renderonly: Make sure we reset scanout on error in create_kms_dumb_buffer_for_resource()
If an error occured, make sure we reset the scanout object before
leaving, otherwise the next user of this handle will hit the
refcnt == 0 assert.

Fixes: ad4d7ca833 ("kmsro: Fix renderonly_scanout BO aliasing")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23746>
2023-07-05 06:22:21 +00:00
Boris Brezillon
8568a46c1c renderonly: Fix potential NULL deref in the error path
scanout can be NULL.

Fixes: ad4d7ca833 ("kmsro: Fix renderonly_scanout BO aliasing")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23746>
2023-07-05 06:22:21 +00:00
Robert Beckett
8087f784e4 winsys/panfrost: Fix a scanout resource leak
Use ro->bo_map to alloc scanout and make sure we initialize the refcnt
to one.

This fixes leaking the scanout object and the underlying dumb-buffer.

Fixes: ad4d7ca833 ("kmsro: Fix renderonly_scanout BO aliasing")
Cc: mesa-stable
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23746>
2023-07-05 06:22:21 +00:00
Mike Blumenkrantz
46b488151f aux/trace: fix bindless texture dumping
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23971>
2023-07-05 05:32:21 +00:00
Alyssa Rosenzweig
a28f9738e1 asahi: Use txf_ms for MSAA background programs
Fixes regression in assorted dEQP tests including:

dEQP-EGL.functional.color_clears.multi_context.gles3.rgba8888_window

Fixes: d4424950ac ("asahi: Use txf for background program")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
02ac7305a0 agx: Don't leak ssa_to_reg_out
calloc'd in the RA, should be freed in the RA. Identified with valgrind.

Fixes: 6b13616cba2 ("agx: Implement vector live range splitting")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
2a334a9f4d asahi: Take ownership of compute shader NIR
Fixes massive leak of compute shader NIR. Identified with valgrind.

Yes, this requires casting away const *.

Yes, Gallium is dumb.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
a004d96874 asahi: Use ralloc harder
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
56461bc0a2 asahi: Fix scissor_culls_everything check
Account for the possibility that the scissor is outside the render area. Fixes
the usual assertion fail:

   glcts: ../src/gallium/drivers/asahi/agx_state.c:1015:
   agx_upload_viewport_scissor: Assertion `maxx > minx && maxy > miny' failed.

on the following dEQP tests with my conformance build:

  dEQP-GLES3.functional.fragment_ops.scissor.outside_render_line
  dEQP-GLES3.functional.fragment_ops.scissor.outside_render_point
  dEQP-GLES3.functional.fragment_ops.scissor.outside_render_tri

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
98de1b1b95 asahi: Assert we don't transition shared resources
This is an invariant maintained by all current callers and subtly required for
the BO swapping to work. Assert it to make it obvious.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
1140bdb783 asahi: Arrange VS varyings in the correct order
The GPU ABI requires varyings to be grouped as follows:

- Position
- Smooth shaded fp32
- Flat shaded fp32
- Linear shaded fp32
- Smooth shaded fp16
- Flat shaded fp16
- Linear shaded fp16
- Point size

Use the flat shaded mask info we now have in the vertex shader key to
sort things properly, and pass the counts to the hardware.
FP16 is still TODO.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
2055e03243 asahi: Add flat/linear shaded varyings mask to the VS shader key
We need this information in order to arrange varyings properly, which
means we need shader variants. Add this to the shader key, taking the
value from the FS input info.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
4a65b4bb14 asahi: Fix type confusion for fragment shader keys
We can't attempt to access the fs union member if this is not a FS.
That worked so far since there wasn't a VS shader key at all, but we're
about to introduce one.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
90834353a1 asahi: Gather flat/linear shaded input info from uncompiled FS
We need to propagate shading model metadata from the FS to the VS in
order to correctly lay out the uniforms in the right order. This means
we need VS variants depending on this data.

We could use the existing shader info structure, but that applies to
compiled shaders which would introduce a dependency from the VS compile
to the FS compile. This information does not change with FS variants, so
we can introduce an agx_uncompiled_shader_info structure and gather it
early at precompilation time.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
49994dc8cb asahi: Identify the separate varying count fields
Flat/goraud/linear and 32/16 need to be specified separately. This
change identifies the new fields but should be a functional no-op.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
d9bf52e00f agx: Assert that barriers are not used in the preamble
It is nonsensical and confuses the hardware.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
9bf7d14b2c agx: Use nir_opt_shrink_vectors
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
c81a14c754 agx: Use nir_opt_shrink_stores
This especially helps with image stores, where we otherwise insert a bunch of
pointless moves to collect a vector even when we know the format only has a
single channel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
45cbe12282 asahi: Remove ; in perf_debug_ctx
Otherwise `if(x) perf_debug_ctx(); else if (y) ...` doesn't work.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
b57faede71 asahi: Identify PBE::sRGB flag
Needed to write out sRGB images correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
6dc6991930 asahi: Rename 'Render Target' to 'PBE'
It's used for all PBE operations, including regular image writes, so use the
more general name. Compare the powervr driver.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
75b5bf8dbc asahi: Strip ? in GenXML
Sometimes it's nice to have boolean flags with ? in the name, allow this by
stripping ? when generating the sanitized C name.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
850380cbf5 asahi: match_soa: Treat offsets as signed
An offset may be negative, indexing backwards from the array base.
When we right shift an offset by the format shift, we need to use a
signed shift to ensure that the resulting offset is still negative.

Fixes Nautilus faults/pink crashes.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
a90b0743f3 agx: Smarten discard_agx -> sample_mask lowering
In 97a1bbeaf26 ("agx: Fix discards"), we made our discard lowering very simple,
since we had just discovered the underlying instruction behaviour and needed a
hotfix for misrendering in the wild. Now that we understand the behaviour, we
can do better. There are two potential performance issues with the lowering in
that commit:

1. It generates extra sample_mask instructions. For a shader that has a single
   discard_if at root level, it would generate two instructions

      sample_mask foo, 0
      sample_mask ~0, ~0

   rather than a single

      sample_mask ~0, ~foo

2. It runs depth/stencil testing/updates at the end of the shader, even when it
   could be run immediately after the discard. This might cause pipeline stalls.

The solution is to insert the "trigger testing" sample_mask instruction as soon
after the "discard" instruction as possible, fusing them if they would be next
to each other. There are two cases:

1. The last discard is executed unconditionally. In this case, we can test
   immediately after, unconditionally, and fuse together.

2. The last discard is executed conditionally. In this case, we test in the
   first unconditional block after the discard. Example shader:

   ...
   loop {
      if .. {
         loop {
            discard_if <-- discard here
            ...
         }
      ..
      }
   ...
   }
   <---- we test here
   ...
   store_output

Together this covers all the usual patterns for single-sampled discard. We could
still do better with multisampling, but whatever.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
5a4c9136cd agx: Add algebraic opt to help with discard lowering
When lowering discards, it will be convenient to generate the pattern:

   (cond ? 255 : 0) ^ 255

Add rules to optimize that to

   (cond ? 0 : 255)

This is not part of the main algebraic optimizer since this lowering happens
late.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Mike Blumenkrantz
54bd804ad3 zink: don't destroy swapchain on initial CreateSwapchainKHR fail
this used to be correct at some point but now it no longer is

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23970>
2023-07-05 04:22:23 +00:00
Dave Airlie
2fc2597fe5 gallivm: make block_size use discrete values.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:40:44 +10:00
Dave Airlie
c0123d792c gallivm: convert grid_size to discrete values.
No use in storing this in a vector

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:40:41 +10:00
Dave Airlie
e021973f5a gallivm: convert block_id to discrete values.
There is no reason to stick these in a vector

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:40:31 +10:00
Dave Airlie
bcb5dbf232 gallivm: store thread id in separate values.
There is no real advantage to putting this into a vector to take
it back out again.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:39:59 +10:00
Hyunjun Ko
d0e6809ee5 anv/video: fix to support HEVC 10bit on some of 9th gens.
From Broxton and Kabylake, it started supporting HEVC 10-bit decoding.

Fixes: 649e12c897 ("anv_video: reject decoding of unsupported profiles
and formats")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23985>
2023-07-05 00:20:18 +00:00
Joshua Ashton
59cf3702c4 radv: Remove unused pipeline param from radv_generate_pipeline_key
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:05:16 +01:00
Joshua Ashton
5ca8390e5f radv: Advertise VK_EXT_pipeline_robustness
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:05:09 +01:00
Joshua Ashton
c9ac960b6a radv: Implement VK_EXT_pipeline_robustness
Funnel the data from the pNext into the new pipeline key members for buffer robustness

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:38 +01:00
Joshua Ashton
3e269c7a4e radv: Rename radv_required_subgroup_info to radv_shader_stage_key
Additionally, prefix the members that are subgroup related with subgroup_

We will use this structure to store pipeline robustness information.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:34 +01:00
Joshua Ashton
2c6125c1c5 radv: Split and move buffer robustness to shader key
Will be used by pipeline robustness.

There is also loads of space in the first dword.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:30 +01:00
Joshua Ashton
3e36b47b96 radv: Rename radv_nir_compiler_options::robust_buffer_access to robust_buffer_access_llvm
This is only used by LLVM, make that clearer.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:21 +01:00
Joshua Ashton
f52ebc8b40 radv: Refactor buffer robustness to an enum
Will be taken advantage of with pipeline robustness.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:10 +01:00
José Roberto de Souza
59aa49494c anv: Drop unnecessary intel_canonical_address() calls around bo->offset
bo->offset is set as canonical address no need to do it over again.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
2023-07-04 15:24:04 +00:00
José Roberto de Souza
27e20c8726 anv: Drop unnecessary intel_canonical_address() call around anv_address_physical()
anv_address_physical() already returns a canonical address.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
2023-07-04 15:24:04 +00:00
José Roberto de Souza
2fa4fe2c85 anv: Fix some mismatches of canonical and regular addresses around anv_bo_vma_alloc_or_close()
anv_vma_alloc() returns a canonical address, but explicit_address is a
regular address. This mismatch can potentially cause issues.

So here making bo->offset as always canonical address by converting it
in the explicit case and fixing the only caller that was caling
anv_bo_vma_alloc_or_close() with a canonical address.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
2023-07-04 15:24:04 +00:00
Daniel Stone
f948393005 Revert "ci/fdno: Pause a660 testing"
The fastboot/USB/network issue has been resolved.

This reverts commit e207458ad509c6dc670bfdef9e1a3685aa4ee5f4.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23989>
2023-07-04 11:43:54 +00:00
Erico Nunes
a775b9cb64 ci: restore lima farm
The ISP network issues are now resolved.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23951>
2023-07-04 11:27:45 +00:00
Alejandro Piñeiro
bbdb615a86 v3dv/device: update conformanceVersion
The Vulkan CTS started generating the list of valid versions the
driver can report as conformant against based on the active branches,
and the branch we were reporting up to now is no longer valid.

Fixes dEQP-VK.api.driver_properties.conformance_version

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23980>
2023-07-04 11:09:55 +00:00
Yonggang Luo
8f8ea2dd68 broadcom: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23988>
2023-07-04 10:47:26 +00:00
Yonggang Luo
edb607ed9f v3d: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23988>
2023-07-04 10:47:26 +00:00
Yonggang Luo
9cfded7f1b vc4: Convert to use nir_foreach_function_impl when possible
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23988>
2023-07-04 10:47:26 +00:00
Marcin Ślusarz
7ed9ec70c0 intel/compiler: simplify reading of gl_NumWorkGroups in task/mesh
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
1ac1d5d62e anv,intel/compiler: enable shortcut in wg id to wg idx lowering on >= gfx12.5
This speeds up vk_meshlet_cadscene in "VK mesh ext" renderer by 1.4%

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
3d7513ee8e nir: add cheap shortcut for wg id to wg idx lowering
... for platforms where integer division is expensive

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
7ec1ef75d3 intel/compiler: pass num_workgroups from task to mesh shaders
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
e7ca9d70f5 nir: lower num_workgroups to constants
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
b9eeee8554 nir: use constant components of num_workgroups in wg id to wg idx lowering
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
7ebfbc97a8 nir: use wg id to wg idx shortcut if two dims of num_workgroups are 1
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:07 +00:00
Marcin Ślusarz
b5792c1a34 nir: extract try_lower_id_to_index_1d
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:07 +00:00
Iago Toral Quiroga
1f8ecd3ae0 broadcom: use nir info to keep track of implicit sample shading
It seems NIR is tracking this for us now so we can stop doing this
in the backend.

Also, new CTS tests seem to add the requirement where in the presence of
some builtin's like gl_SampleID in a shader, even if unused, sample shading
is expected to be enabled, which is something we can't track in the backend
since the variable may have been dropped by then.

Fixes 2 failures in:
dEQP-VK.draw.renderpass.implicit_sample_shading.sample*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23984>
2023-07-04 08:54:43 +00:00
Yonggang Luo
59e2760d8f pvr: Use alignas instead of ALIGN_ATTR and remove ALIGN_ATTR
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23982>
2023-07-04 08:35:14 +00:00
Christian Gmeiner
dadb7244bb etnaviv: support OES_texture_half_float_linear
Passes all related piglit and deqp tests.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23972>
2023-07-04 06:15:49 +00:00
Christian Gmeiner
3f726f4ca5 docs: mark OES_texture_half_float done on etnaviv
Supported by GPUs with HALF_FLOAT feature bit.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23972>
2023-07-04 06:15:49 +00:00
Janne Grunau
fd4d0e1cc2 st/mesa: Set gl_config.floatMode based on color_format
Sets the float color component type in st_visual_to_context_mode()
ensuring float color values are not clamped.
Fixes dEQP-EGL.functional.wide_color.window_fp16_default_colorspace on
asahi, iris and most likely every other driver having it marked as fail
or flake.

Closes: mesa/mesa#9276

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23914>
2023-07-04 00:23:40 +00:00
Lynne
649e12c897 anv_video: reject decoding of unsupported profiles and formats
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23954>
2023-07-03 23:48:48 +00:00
Dave Airlie
832c408b63 lavapipe: expose subgroups in mesh/task shaders.
These are just compute shaders under the hood.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23979>
2023-07-03 23:30:28 +00:00
José Roberto de Souza
c142736f52 anv: Fix compute maximum number of threads value
There is no mention in spec about subtract one of the number of
threads, also Iris and blorp code don't subtract.

Alchemist PRMs: Volume 2a: Command Reference: Instructions: CFE_STATE: Maximum Number of Threads:
	Normally set to the maximum number of threads: (# EUs) * (# threads/EU)

Cc: mesa-stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23973>
2023-07-03 22:53:49 +00:00
Caio Oliveira
608504c774 nir/print: Reformat the preds/succs block information
- Always print preds in same line as block name;
- Use a single line for empty blocks;
- Align preds/succs with the instructions.

```
if %29 {
    block b4:    // preds: b3
    32     %30 = load_const (0x00000000 = 0.000000)
    32x4   %31 = @vulkan_resource_index (%30 (0x0)) (desc_set=0, binding=0, desc_type=SSBO)
    32x4   %32 = @load_vulkan_descriptor (%31) (desc_type=SSBO)
    32x4   %33 = deref_cast (Storage *)%32 (ssbo Storage)  (ptr_stride=0, align_mul=4, align_offset=0)
    32x4   %34 = deref_struct &%33->fail (ssbo uint)  // &((Storage *)%32)->fail
    32     %36 = @deref_atomic (%34, %35 (0x1)) (access=1, atomic_op=iadd)
                 // succs: b6
} else {
    block b5:  // preds: b3, succs: b6
}
```

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:07 +00:00
Caio Oliveira
a188337972 nir/print: Print div/con annotation first
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:07 +00:00
Caio Oliveira
884debdee3 nir/print: Use 4-space indentation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
9215aad7da nir/print: Use // for comments
Makes it easier to copy snippets of shaders into code or
test comments without worrying about conflict with `/* */`.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
1c0038d5d5 nir/print: Don't use comment syntax for deref_cast properties
Follow the same syntax as the intrinsic indices, since they
are conceptually similar.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
88c411c638 nir/print: Rename print_tabs() to print_indentation() and use it more
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
761d90341f nir/print: Align instructions around =
- For SSA destination, padding is applied before `%`.
- For Reg destination, pad to the SSA size (to align div/con),
  then remaining padding is applied before `r`.
- For instructions without destination, padding is applied so
  they start right after the ` = ` of the cases above.

If the block doesn't have any destinations, there's no padding
is applied to the instructions without destinations in that
block.

For now registers with array access will be unaligned.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
58e3abc4a3 nir/print: Use BITSIZExELEMENTS for SSA sizes
Omits the `x1` part if its one element.

```
32x3   %3 = @load_deref (%0) (access=0)
32     %4 = mov %3.x
32     %5 = deref_var &gl_LocalInvocationID (system uvec3)
32x3   %8 = @load_deref (%5) (access=0)
32     %9 = mov %8.x
```

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
252a6140ea nir/print: Use bN instead of block_N for identifying basic blocks
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
ea44879d2d nir/print: Use symbols % for SSA and @ for intrinsic
The variable uniquifying now uses # instead of @.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Yonggang Luo
c4d3bc03c4 nir: Add nir_foreach_function_safe and use it
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23902>
2023-07-03 21:45:35 +00:00
Yonggang Luo
0fbec6dd79 radv: Use nir_remove_non_entrypoints in radv_shader.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23902>
2023-07-03 21:45:35 +00:00
Yonggang Luo
c545c39c7e glsl: Use nir_remove_non_entrypoints to simplify the code
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23902>
2023-07-03 21:45:35 +00:00
Yonggang Luo
1238a65251 nir: Update the comment to call nir_remove_non_entrypoints directly
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23902>
2023-07-03 21:45:35 +00:00
Yonggang Luo
823a1047e9 dxil: Use nir_remove_non_entrypoints
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23902>
2023-07-03 21:45:35 +00:00
Konstantin Seurer
20beebb041 amd: Move ac_hw_stage to its own file
Otherwise ACO has to include ac_shader_util.h which also includes NIR.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23906>
2023-07-03 21:12:45 +00:00
Konstantin Seurer
82aaf1893d nir/builder_opcodes: Do not generate empty intrinsic indices
Gets rid of all the

struct nir_*_indices {
   int _; /* exists to avoid empty initializers */
};

declarations. 14293 loc -> 12900 loc

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23906>
2023-07-03 21:12:45 +00:00
Konstantin Seurer
e379b9ad8c nir/opt_dead_cf: Handle if statements ending in a jump correctly
If a then/else block ends in a jump, the phi nodes do not necessarily
have to reference the always taken branch because they are dead code.
Avoid crashing in this case by only rewriting phis, if the block does
not end in a jump.

cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23150>
2023-07-03 20:36:51 +00:00
Connor Abbott
7be8d0f7f4 tu: Use common dirty tracking for PC_PRIMITIVE_CNTL_0
This improves the vkoverhead base draw call throughput by around 4%
which fixes a regression from the old code while making things simpler.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
97da0a7734 tu: Rewrite to use common Vulkan dynamic state
This drops a significant amount of code for tracking partial state that
is now handled by the common state tracking infrastructure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
56cd6a8b64 tu: Split pipeline struct into different types
The common state code expects you to use a different struct for state in
graphics pipelines and in pipeline libraries. This means we need to
copy the approach radv uses in order to be compatible. This also allows
us to shrink the structs a bit by moving compute-only things to the
compute pipeline and library-only things to the library pipeline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
db1ea9f749 freedreno/a6xx: Fix name of A6XX_PC_PRIMITIVE_CNTL_0::TESS_UPPER_LEFT_DOMAIN_ORIGIN
Document what it actually does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
5704d0ad27 tu: Don't use A6XX_PC_PRIMITIVE_CNTL_0::TESS_UPPER_LEFT_DOMAIN_ORIGIN
This field also affects triangle strip and triangle fan ordering, so we
would get the incorrect (D3D) order with tessellation and geometry
shaders both enabled. Instead flip clockwise/counterclockwise when
the domain origin is upper-left, as radv does.

Because the register is only emitted when tessellation is active which
forces sysmem, it shouldn't regress performance to emit it directly
instead of using a draw state. We're already very tight on draw states.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
df7be7323a vk/graphics_state: Don't track each vertex input field
It's unlikely that anyone will call vkCmdSetVertexInputEXT() twice with
the exact same arguments, so this wasn't really doing anything, and it
hurt performance in the common case as shown via "vkoverhead -test 21"
on turnip.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
2a8e627e3a vulkan: Fix renderpass flags with driver-specific renderpass
We need to use the driver's renderpass to get the flags if the driver
provides it.

Fixes: f3876db1ee ("vulkan: Plumb rendering flags through vk_graphics_pipeline_state")
Reviewed-by: Faith Ekstrand <faith.ekstrand@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
ea52d0d9e0 vk/graphics_state: Track attachment count as state
Even if this isn't dynamic state per-se because it always comes from the
pipeline, it's useful to be able to track it for the various dynamic
states that it affects, which may be either precompiled or not on
turnip.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
d322a80170 radv: Fix radv_pipeline_is_blend_enabled
This was relying on cb being NULL instead of just gracefully handling
it, and it will stop being NULL once we start tracking attachment count
as state. Moreover is was broken in the case where only the blend enable
is dynamic.

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
f497cc9d56 vk/graphics_state: Add helpers for pre-baking state
Previously, drivers have either not supported some dynamic state (like
vertex input or sample locations) at all or it's been always dynamic. In
order to be able to set dynamic state sometimes and other times leave it
up to driver-specific state packets, we need a few helpers.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
5405c9ed50 vk/graphics_state: Fix some assertions when copying state
On turnip we support dynamic vertex input, but static vertex input is
precompiled and so we will copy from a source without VI to a
destination with VI and it's valid in this case to do nothing. On the
other hand, it should never be valid if VI state is set but the pointer
isn't there, which the code previously silently skipped over. There's a
similar issue with sample locations.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
7da44ef671 vk/graphics_state: Add VI_BINDINGS_VALID state
This is a mirror of vi::bindings_valid, but we can track it and set it
properly even when vertex input state is precompiled, because it is also
needed on turnip for knowing the size of the vertex buffer and vertex
stride state packets even when vertex input state is precompiled.
Previously drivers that could pre-bake vertex input state were expected
to handle this themselves, but this would've been complicated for turnip
because we can handle both pre-baked and dynamic vertex input state. Now
we have the one field which is correctly set in all circumstances and we
never have to setup space for vertex input state in the pipeline.

Reviewed-by: Faith Ekstrand <faith.ekstrand@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
ea4257be32 vk/graphics_state: Add feedback_loop_input_only
On turnip, there are two cases for feedback loops:

- For feedback loops that involve input attachments, everything works as
  normal in GMEM mode but have to do a workaround in sysmem.
- For feedback loops that may involve any texture, GMEM mode is
  impossible and we have to disable it.

Currently we track this through a special flag on the pipeline, but this
won't be practical in the future. Add a flag to the common renderpass
state struct to patch this info through when using our own renderpass.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
1d5eeefd9b vk/graphics_state: Remove vk_subpass_info
It only has a subset of the renderpass state, whereas with turnip we
need to use pretty much all of it at one point or another. Just allow
the driver to pass in the entire vk_render_pass_state if it's using its
own renderpass implementation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:05 +00:00
Connor Abbott
282e73118d util/bitset: Add some extra functions
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
2023-07-03 19:51:04 +00:00
Yonggang Luo
5be8f98f5a compiler/clc: Switch to use nir_foreach_function_impl in function nir_lower_libclc
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23901>
2023-07-03 19:16:48 +00:00
Juan A. Suarez Romero
0dd0f35205 v3d/ci: add new flake
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23975>
2023-07-03 18:57:04 +00:00
Sil Vilerino
d2719c3177 d3d12: Video Decode - Refactor and style fixes
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:38 +00:00
Sil Vilerino
5a8d8dad9a d3d12: Video Process - Implement get_processor_fence and async queing
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:38 +00:00
Sil Vilerino
c875028b02 d3d12: Video Encode - GPU wait on input surface fence
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:38 +00:00
Sil Vilerino
9510c11c6f d3d12: Video Decode - Sync 3D context copy with decode work for texture array case
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:37 +00:00
Sil Vilerino
4b15eaeba8 d3d12: Apply style format to d3d12_video_dec.cpp
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:37 +00:00
Sil Vilerino
af0b4eacab d3d12: Video Decode - Implement get_decoder_fence and async queing
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:37 +00:00
Sil Vilerino
fb1783616e frontend/va: Add video processing async fence support
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:37 +00:00
Sil Vilerino
c78611c0ab frontend/va: Pass surf->fence in PIPE_VIDEO_ENTRYPOINT_ENCODE contexts for driver to wait on input surface pending work
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23969>
2023-07-03 18:28:37 +00:00
Tatsuyuki Ishi
6b09f8f453 zink/ci: Add ext_transform_feedback@api-errors to fail list.
These leaks pipelines due to a test bug.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23878>
2023-07-03 17:59:07 +00:00
Tatsuyuki Ishi
94b92718d9 radv: Enable weak reference cache for device->mem_cache.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23878>
2023-07-03 17:59:07 +00:00
Daniel Schürmann
3bd72eec1e radv: reference pipeline cache object in radv_pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23878>
2023-07-03 17:59:07 +00:00
Konstantin Seurer
05269047d3 intel: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:38 +00:00
Konstantin Seurer
ed08305549 panfrost: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
12a268ea81 microsoft: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
8b606d5347 lavapipe: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
47934ecf07 zink: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
b8486673a0 vc4: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
364edfefe4 radeonsi: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
977f385e65 r600: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
fba5c97bc1 etnaviv: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
7f9e790d42 crocus: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
2c413ed86f gallium,st: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
79a37ceda0 freedreno: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
be45d4fa6e spirv: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
574079e354 nir: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
c1b472c834 glsl: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
5c8c2ec85c v3d: Use nir_builder_at
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
8ce27e7ed2 asahi: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
1ea963c00b radv: Use nir_builder_at
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Konstantin Seurer
a7cd206937 nir: Add nir_builder_at
Creates and returns a nir_builder from a cursor. The nir_function_impl
is retrieved using said cursor. This should be fine as long as it is not
used on extracted control flow.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
2023-07-03 15:21:37 +00:00
Rob Clark
b774d5f9d5 freedreno/fdperf: Use common device info helpers
Manually constructing the chip-id will stop working with future devices.
And now that we get the generation from the device table, we can't be
sloppy about using a bogus dev_id.

Fixes: 00900b76e0 ("freedreno: Decouple GPU gen from gpu_id/chip_id")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23953>
2023-07-03 14:45:09 +00:00
Tatsuyuki Ishi
a9c6f7ffdf vulkan/pipeline_cache: Introduce weak reference mode.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23877>
2023-07-03 13:53:05 +00:00
Tatsuyuki Ishi
47c9fba322 vulkan/pipeline_cache: Move cache_object_unref out of header.
For future use where private functions are called from unref code.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23877>
2023-07-03 13:53:05 +00:00
Tatsuyuki Ishi
44bfeb77d9 vulkan/pipeline_cache: Move locking outside of remove_object.
To match a future use case better.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23877>
2023-07-03 13:53:04 +00:00
Tatsuyuki Ishi
64c959e46c vulkan/pipeline_cache: Do not consume object passed into remove_object.
Future use case will require removing an object with zero ref count, so
leave it up to the caller to call unref.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23877>
2023-07-03 13:53:04 +00:00
Lionel Landwerlin
3774c3232c docs/features: update anv entries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23967>
2023-07-03 13:11:03 +00:00
Sergi Blanch Torne
eb0610c401 Revert "ci: disable Collabora's LAVA lab for maintance"
This reverts commit 1cf56af7ca

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23760>
2023-07-03 12:03:04 +00:00
David Heidelberg
d3b6635663 ci/microsoft: partly revert rename from container-rules to manual-rules
We need to keep container job as a manual one, while others are always
disabled.

Fixes: c9de0d2977 ("ci/microsoft: rename manual rules according to rest introduced rules")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23968>
2023-07-03 11:31:33 +00:00
David Heidelberg
80a140953d ci: when touching farms, never run manual jobs
It's implied, that in moments of enabling farm manual jobs never run.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23968>
2023-07-03 11:31:33 +00:00
Shan-Min Chao
ece34ec127 tu/kgsl: Fix memory overwrite with vkFlushMappedMemoryRanges when more than 1 range
Fixes: 5a59410962 ("turnip: add cached and cached-coherent memory types")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23504>
2023-07-03 11:09:47 +00:00
Rhys Perry
ae48fae658 aco: remove 64-bit integer conversion opcodes
These are handled by nir_lower_int64 now.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
2023-07-03 10:38:28 +00:00
Rhys Perry
1194a3baa9 radeonsi: use nir_lower_conv64
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
2023-07-03 10:38:28 +00:00
Rhys Perry
b3b9b22c95 radv: call nir_lower_int64 later
I would rather this be after several of these complicated lowering passes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
2023-07-03 10:38:27 +00:00
Rhys Perry
38cff03e58 radv: use nir_lower_conv64
This has a more accurate i2f/u2f implementation.

fossil-db (navi21):
Totals from 342 (0.26% of 133461) affected shaders:
MaxWaves: 10480 -> 10472 (-0.08%)
Instrs: 273455 -> 274019 (+0.21%); split: -0.02%, +0.22%
CodeSize: 1545020 -> 1546852 (+0.12%); split: -0.11%, +0.23%
VGPRs: 9528 -> 9552 (+0.25%)
SpillSGPRs: 553 -> 592 (+7.05%); split: -2.71%, +9.76%
SpillVGPRs: 821 -> 811 (-1.22%); split: -1.71%, +0.49%
Latency: 3837590 -> 3822989 (-0.38%); split: -0.52%, +0.14%
InvThroughput: 1284512 -> 1277012 (-0.58%); split: -0.77%, +0.19%
VClause: 6480 -> 6486 (+0.09%); split: -0.15%, +0.25%
SClause: 6640 -> 6645 (+0.08%); split: -0.02%, +0.09%
Copies: 45858 -> 46160 (+0.66%); split: -0.10%, +0.76%
Branches: 8736 -> 8741 (+0.06%); split: -0.01%, +0.07%
PreSGPRs: 14320 -> 14323 (+0.02%)
PreVGPRs: 8545 -> 8551 (+0.07%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9275
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
2023-07-03 10:38:27 +00:00
Rhys Perry
3d0e997e99 nir: split nir_lower_mov64
ACO will want to lower the conversions, but preserve the bcsels.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
2023-07-03 10:38:27 +00:00
Timur Kristóf
bd43d9e3d9 radv: Enable required subgroup size on mesh/task.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23925>
2023-07-03 10:49:11 +02:00
Timur Kristóf
34ace6688a radv: Use required subgroup info for graphics shaders.
We plan to allow setting this on some graphics shader stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23925>
2023-07-03 10:49:00 +02:00
Timur Kristóf
8982bd6045 radv: Refactor required subgroup size in pipeline key.
This is to allow setting required subgroup size and
full subgroups on more than just the compute stage.

Use an enum (not the actual subgroup size integer)
so that we can have some bits reserved there for
future use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23925>
2023-07-03 10:47:39 +02:00
Christian Gmeiner
b8fbce045e etnaviv: nir: do a late nir_opt_cse run
This cleans up a lot and helps to generate much better code. There
are only benefits on GPUs without inline immediate support.

shader-db results on GC2000:

total instructions in shared programs: 237168 -> 235101 (-0.87%)
instructions in affected programs: 17297 -> 15230 (-11.95%)
helped: 758
HURT: 0
helped stats (abs) min: 1 max: 24 x̄: 2.73 x̃: 2
helped stats (rel) min: 7.14% max: 29.41% x̄: 14.47% x̃: 14.29%
95% mean confidence interval for instructions value: -2.94 -2.51
95% mean confidence interval for instructions %-change: -14.84% -14.09%
Instructions are helped.

total temps in shared programs: 85553 -> 84969 (-0.68%)
temps in affected programs: 2879 -> 2295 (-20.28%)
helped: 584
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 5.00% max: 25.00% x̄: 21.48% x̃: 20.00%
95% mean confidence interval for temps value: -1.00 -1.00
95% mean confidence interval for temps %-change: -21.76% -21.21%
Temps are helped.

total immediates in shared programs: 154800 -> 154800 (0.00%)
immediates in affected programs: 0 -> 0
helped: 0
HURT: 0

total loops in shared programs: 0 -> 0
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

LOST:   0
GAINED: 0

No changes on GC3000 and GC7000.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23947>
2023-07-03 07:19:01 +00:00
Sergi Blanch Torne
8d49f66ee9 ci: disable Collabora's LAVA lab for maintance
This is to inform you of some planned downtime in the LAVA lab as follows:

  * Start: 2023-07-03 07:00 UTC
  * End: 2023-07-03 11:00 UTC

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23759>
2023-07-03 07:22:42 +02:00
David Heidelberg
1fc98414b6 ci/traces: print version of apps used for replaying traces
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23268>
2023-07-03 00:37:24 +02:00
David Heidelberg
ae69494be0 ci/apitrace: include version with LTO enabled
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23268>
2023-07-03 00:37:24 +02:00
David Heidelberg
40c7262c40 ci/traces: guard DXVK and VK behind VK_DRIVER
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23268>
2023-07-03 00:37:24 +02:00
David Heidelberg
28667995e4 ci: create manual farm rules
When we enabling the farm again, we don't want to run all the manual
jobs again, since some of them may take more than 1 hour.

We just have to wait until the nightly run.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23846>
2023-07-02 21:53:24 +00:00
David Heidelberg
c9de0d2977 ci/microsoft: rename manual rules according to rest introduced rules
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23846>
2023-07-02 21:53:24 +00:00
David Heidelberg
4403797b71 ci/microsoft: uploading artifacts gets stuck currently (retried)
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23963>
2023-07-02 23:27:39 +02:00
Romain Failliot
ea9f8c26bc docs(fix): remove last ref to i965 in features.txt
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23849>
2023-07-01 13:41:05 -04:00
Yonggang Luo
ee69c56c8c sfn: indent fixes after switch to use nir_foreach_function_impl
This is done in separate commit is for easier to review

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:51 +08:00
Yonggang Luo
2b64f29f0f sfn: Convert to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:50 +08:00
Yonggang Luo
8410468d23 llvmpipe: Convert to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:50 +08:00
Yonggang Luo
0554eec493 mesa: Convert to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:50 +08:00
Yonggang Luo
d86bcc39d6 panfrost: Convert to use nir_foreach_function_impl when possible
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:50 +08:00
Yonggang Luo
9b6dbb2a2b panfrost: Convert to use nir_foreach_function_with_impl in function midgard_compile_shader_nir
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:50 +08:00
Yonggang Luo
21a0ca7ce5 nir: Strip the const modifier on nir_function * in nir_foreach_function_with_impl
The function iterator should be able to modified in this foreach loop
And the latter patches needs this

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23960>
2023-07-01 17:39:28 +08:00
Eric Engestrom
e32cb99dcb util/disk_cache: fix ~/.cache/ permissions
XDG Base Dir spec [1] says:
> If, when attempting to write a file, the destination directory is
> non-existent an attempt should be made to create it with permission
> `0700`. If the destination directory exists already the permissions
> should not be changed.

[1] https://specifications.freedesktop.org/basedir-spec/basedir-spec-latest.html

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4103
Fixes: 87ab26b2ab ("glsl: Add initial functions to implement an on-disk cache")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23952>
2023-07-01 08:55:32 +00:00
Dave Airlie
384c8677f5 draw/gs: handle extra shader outputs in geometry.
When geometry shader is used with unfilled lines and front face,
we don't handle the extra shader output.

Instead of taking the output from the gs, ask draw for the total
which should give the correct answer.

Fixes a test program attached to:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/8644

Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23943>
2023-06-30 22:59:01 +00:00
Alyssa Rosenzweig
7e42fdac6b nir: Rename nir_reg_{src,dest} -> nir_register_{src,dest}
This frees up the shorter names for the intrinsic-based versions that will
replace them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23956>
2023-06-30 18:20:48 -04:00
Alyssa Rosenzweig
bed2f3f8e6 nir: Rename load/store_reg -> load/store_register
This frees up the shorter names for the new register-based intrinsics.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23956>
2023-06-30 18:19:51 -04:00
Alyssa Rosenzweig
f9a0423a20 pan/mdg: Propagate modifiers in the backend
It really isn't that hard. This drops the roundmode optimization but otherwise
should be at parity to what there was before, and it's massively more competent
at it anyway.

   total instructions in shared programs: 1514477 -> 1508444 (-0.40%)
   instructions in affected programs: 645848 -> 639815 (-0.93%)
   helped: 2712
   HURT: 187
   Instructions are helped.

   total bundles in shared programs: 645069 -> 642999 (-0.32%)
   bundles in affected programs: 136233 -> 134163 (-1.52%)
   helped: 1242
   HURT: 319
   Bundles are helped.

   total quadwords in shared programs: 1130469 -> 1125969 (-0.40%)
   quadwords in affected programs: 379780 -> 375280 (-1.18%)
   helped: 1878
   HURT: 376
   Quadwords are helped.

   total registers in shared programs: 90577 -> 90633 (0.06%)
   registers in affected programs: 5627 -> 5683 (1.00%)
   helped: 309
   HURT: 294
   Inconclusive result (value mean confidence interval includes 0).

   total threads in shared programs: 55594 -> 55607 (0.02%)
   threads in affected programs: 118 -> 131 (11.02%)
   helped: 43
   HURT: 33
   Inconclusive result (value mean confidence interval includes 0).

   total spills in shared programs: 1399 -> 1371 (-2.00%)
   spills in affected programs: 345 -> 317 (-8.12%)
   helped: 10
   HURT: 4

   total fills in shared programs: 5273 -> 5133 (-2.66%)
   fills in affected programs: 1035 -> 895 (-13.53%)
   helped: 12
   HURT: 4

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
0e97dc25d7 pan/mdg: Copy-prop even with swizzle restrictions
Some instructions are not able to swizzle their sources, so we conservatively
refused to propagate moves into them to avoid needing a swizzle on the source.
This is too conservative: we only need to do this if the move swizzles. If there
is only an identity swizzle on the move, we can propagate it without issue. This
will mitigate some instruction count regression from the later modifier
propagation, which will leave lots of moves that need to be propagated.

   total instructions in shared programs: 1514834 -> 1514477 (-0.02%)
   instructions in affected programs: 132297 -> 131940 (-0.27%)
   helped: 349
   HURT: 3
   Instructions are helped.

   total bundles in shared programs: 645093 -> 645069 (<.01%)
   bundles in affected programs: 9650 -> 9626 (-0.25%)
   helped: 42
   HURT: 23
   Bundles are helped.

   total quadwords in shared programs: 1130751 -> 1130469 (-0.02%)
   quadwords in affected programs: 78790 -> 78508 (-0.36%)
   helped: 269
   HURT: 21
   Quadwords are helped.

   total registers in shared programs: 90563 -> 90577 (0.02%)
   registers in affected programs: 163 -> 177 (8.59%)
   helped: 4
   HURT: 16
   Registers are HURT.

   total spills in shared programs: 1400 -> 1399 (-0.07%)
   spills in affected programs: 2 -> 1 (-50.00%)
   helped: 1
   HURT: 0

   total fills in shared programs: 5276 -> 5273 (-0.06%)
   fills in affected programs: 151 -> 148 (-1.99%)
   helped: 1
   HURT: 3

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
d78c4c44c3 pan/mdg: Reset predicate.exclude while scheduling
If we need to insert a mov in order to schedule a branch, we do not schedule
anything writer to the source of that mov in the same bundle to avoid a
data race between the read and the write. That's too conservative, though: it is
legitimate to write in the first part of the ALU word (VMUL/SADD stages) and
then read from the second part (VADD/SMUL/VLUT stages). Reset the
predicate.exclude when going from scheduling the latter stages to the former, to
allow a sequence of code like:

   FCMP.vector 0.xyzw, ...
   branch 0.x

to be scheduled as

   vmul.FCMP.vector 0.xyzw
   smul r31.w, 0.x
   branch 0.x

rather than getting split up into two bundles.

This mitigates a cycle count regression from the copyprop change.

   total instructions in shared programs: 1514856 -> 1514834 (<.01%)
   instructions in affected programs: 3087 -> 3065 (-0.71%)
   helped: 5
   HURT: 1
   Inconclusive result (value mean confidence interval includes 0).

   total bundles in shared programs: 645327 -> 645093 (-0.04%)
   bundles in affected programs: 40498 -> 40264 (-0.58%)
   helped: 230
   HURT: 68
   Bundles are helped.

   total quadwords in shared programs: 1130554 -> 1130751 (0.02%)
   quadwords in affected programs: 75323 -> 75520 (0.26%)
   helped: 49
   HURT: 231
   Quadwords are HURT.

   total registers in shared programs: 90559 -> 90563 (<.01%)
   registers in affected programs: 119 -> 123 (3.36%)
   helped: 5
   HURT: 8
   Inconclusive result (value mean confidence interval includes 0).

   total threads in shared programs: 55590 -> 55594 (<.01%)
   threads in affected programs: 4 -> 8 (100.00%)
   helped: 4
   HURT: 0
   Threads are helped.

   total spills in shared programs: 1402 -> 1400 (-0.14%)
   spills in affected programs: 289 -> 287 (-0.69%)
   helped: 1
   HURT: 1

   total fills in shared programs: 5285 -> 5276 (-0.17%)
   fills in affected programs: 448 -> 439 (-2.01%)
   helped: 2
   HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
056e8ec8c3 pan/mdg: Lower special reads better
If we have multiple reads of the same SSA def in the same block, we don't need
to emit multiple copies for it, we can just reuse a copy (OR'ing in the mask,
knowing the source is already fully written since it's SSA). This will prevent
some regressions in moves from the copyprop patch.

There is a bit of a tradeoff here between increased pressure and reduced
instruction count but I'm not too worried. The affect on pressure seems all over
the place -- register use decreases overall, threads increase (great!) but a few
shaders that were *already spilling*, spill a bit worse. I'm not terribly
worried there.

   total instructions in shared programs: 1518289 -> 1514856 (-0.23%)
   instructions in affected programs: 292854 -> 289421 (-1.17%)
   helped: 1557
   HURT: 232
   Instructions are helped.

   total bundles in shared programs: 646903 -> 645327 (-0.24%)
   bundles in affected programs: 91872 -> 90296 (-1.72%)
   helped: 910
   HURT: 256
   Bundles are helped.

   total quadwords in shared programs: 1133728 -> 1130554 (-0.28%)
   quadwords in affected programs: 187170 -> 183996 (-1.70%)
   helped: 1399
   HURT: 44
   Quadwords are helped.

   total registers in shared programs: 90640 -> 90559 (-0.09%)
   registers in affected programs: 2676 -> 2595 (-3.03%)
   helped: 202
   HURT: 124
   Inconclusive result (%-change mean confidence interval includes 0).

   total threads in shared programs: 55561 -> 55590 (0.05%)
   threads in affected programs: 50 -> 79 (58.00%)
   helped: 23
   HURT: 6
   Threads are helped.

   total spills in shared programs: 1386 -> 1402 (1.15%)
   spills in affected programs: 231 -> 247 (6.93%)
   helped: 2
   HURT: 13

   total fills in shared programs: 5159 -> 5285 (2.44%)
   fills in affected programs: 1282 -> 1408 (9.83%)
   helped: 11
   HURT: 16

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
23010acc10 pan/mdg: Fix temp count calculation
1. Always calculate when asked. This is the sort of optimization that just
   introduces bugs. Like one I hit when shuffling register indices around with
   the register access changes.

2. Ask before using in RA.

3. Account for precoloured blend inputs.

Small shader-db hit, didn't investigate too much.

   total instructions in shared programs: 1518017 -> 1518168 (<.01%)
   instructions in affected programs: 2895 -> 3046 (5.22%)
   helped: 0
   HURT: 24
   Instructions are HURT.

   total bundles in shared programs: 646756 -> 646782 (<.01%)
   bundles in affected programs: 1119 -> 1145 (2.32%)
   helped: 1
   HURT: 19
   Bundles are HURT.

   total quadwords in shared programs: 1133694 -> 1133728 (<.01%)
   quadwords in affected programs: 1736 -> 1770 (1.96%)
   helped: 0
   HURT: 20
   Quadwords are HURT.

   total registers in shared programs: 90596 -> 90612 (0.02%)
   registers in affected programs: 108 -> 124 (14.81%)
   helped: 0
   HURT: 16
   Registers are HURT.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Cc: mesa-stable
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
7da1e4c326 pan/mdg: Fix 2-const CSEL at block beginning
mir_prev_op will point to the last instruction of the block in that case because
the block instruction list is circular. That would cause an invald
write-after-read relationship between the move we insert with the constants and
the CSEL reading them, which DCE "helpfully" optimizes out, leaving a read from
an undefined def. That ends up getting RA'd to an invalid register.

All in all, pretty bad.

Identified due to a new assert fail after the proper temp_count fix.

Affects dEQP-GLES31.functional.separate_shader.random.12.

No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
b66b122e03 pan/mdg: Fix IR from scheduling conditions
If we start with unscheduled IR:

   0 = comparison
   csel 1, 2, 0

the old code will schedule this as

   r31.w = comparison
   csel 1, 2, 0

leaving 0 as a dangling source, which can confuse the rest of the compiler.
Instead rewrite this to

   r31.w = comparison
   csel 1, 2, r31.w

Note the swizzle as already taken care of (i.e. turned to .x for scalar
conditions) by the time we get to scheduling so we can force to .w.

This keeps register allocation from doing stupid things.

total instructions in shared programs: 1518138 -> 1518017 (<.01%)
   instructions in affected programs: 37714 -> 37593 (-0.32%)
   helped: 48
   HURT: 42
   Instructions are helped.

   total bundles in shared programs: 646877 -> 646756 (-0.02%)
   bundles in affected programs: 17024 -> 16903 (-0.71%)
   helped: 48
   HURT: 42
   Bundles are helped.

   total registers in shared programs: 90624 -> 90596 (-0.03%)
   registers in affected programs: 361 -> 333 (-7.76%)
   helped: 31
   HURT: 5
   Registers are helped.

   total threads in shared programs: 55561 -> 55566 (<.01%)
   threads in affected programs: 5 -> 10 (100.00%)
   helped: 4
   HURT: 0
   Threads are helped.

   total spills in shared programs: 1386 -> 1383 (-0.22%)
   spills in affected programs: 19 -> 16 (-15.79%)
   helped: 3
   HURT: 0

   total fills in shared programs: 5159 -> 5077 (-1.59%)
   fills in affected programs: 1305 -> 1223 (-6.28%)
   helped: 20
   HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
080a1a4cc4 pan/mdg: Add is_ssa helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
50449167d5 pan/mdg: Constant fold after algebraic_late
Late algebraic lowering turns fsub(x, #y) into fadd(x, fneg(#y)), we should
constant fold that into fadd(x, #-y).

   total instructions in shared programs: 1518414 -> 1518138 (-0.02%)
   instructions in affected programs: 18363 -> 18087 (-1.50%)
   helped: 68
   HURT: 0
   Instructions are helped.

   total bundles in shared programs: 646938 -> 646877 (<.01%)
   bundles in affected programs: 8299 -> 8238 (-0.74%)
   helped: 56
   HURT: 17
   Bundles are helped.

   total quadwords in shared programs: 1134323 -> 1133694 (-0.06%)
   quadwords in affected programs: 77445 -> 76816 (-0.81%)
   helped: 450
   HURT: 8
   Quadwords are helped.

   total registers in shared programs: 90618 -> 90624 (<.01%)
   registers in affected programs: 129 -> 135 (4.65%)
   helped: 5
   HURT: 11
   Inconclusive result (value mean confidence interval includes 0).

   total threads in shared programs: 55563 -> 55561 (<.01%)
   threads in affected programs: 4 -> 2 (-50.00%)
   helped: 0
   HURT: 2

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
e8ffbc77b5 pan/mdg: Lower isub in common code
No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
074e5700cc pan/mdg: Type CSEL with a NIR pass
As an off-shoot of trying to delete modifiers (and nir_register) from NIR, I'd
like to get rid of some of the modifier NIR silliness that Midgard is doing.
The CSEL type selection heuristic at NIR->MIR time is peak backend silly, so
replace it with nir_gather_ssa_types.

Small win on shader-db. I didn't investigate much, but this matches my intution
for how this patch would perform: very small instruction/cycle count
improvements due to slightly better decisions around modifiers, more substantial
space savings due to more float constants getting inlined.

   total instructions in shared programs: 1518422 -> 1518414 (<.01%)
   instructions in affected programs: 1914 -> 1906 (-0.42%)
   helped: 8
   HURT: 0
   Instructions are helped.

   total bundles in shared programs: 646941 -> 646937 (<.01%)
   bundles in affected programs: 344 -> 340 (-1.16%)
   helped: 4
   HURT: 0
   Bundles are helped.

   total quadwords in shared programs: 1134727 -> 1134324 (-0.04%)
   quadwords in affected programs: 66752 -> 66349 (-0.60%)
   helped: 351
   HURT: 54
   Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
311bfd0623 pan/mdg: Optimize b32csel(inot) in NIR
This is a generic algebraic optimization. Use the generic algebraic optimizer.

The only reason we can't rely on nir_opt_algebraic to do this is because we
generate inot's late in order to optimize some comparisons. But we already have
a pass to clean that up (midgard_nir_clean_inot), it just needs to be extended
to handle more cases.

shader-db is noise:

total bundles in shared programs: 646941 -> 646942 (<.01%)
bundles in affected programs: 100 -> 101 (1.00%)
helped: 0
HURT: 1

total quadwords in shared programs: 1134727 -> 1134726 (<.01%)
quadwords in affected programs: 318 -> 317 (-0.31%)
helped: 2
HURT: 1

total registers in shared programs: 90619 -> 90618 (<.01%)
registers in affected programs: 12 -> 11 (-8.33%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Alyssa Rosenzweig
d1f6bcd1d0 nir: Add b32fcsel_mdg opcode for Midgard
Midgard has both int and float version of b32csel. The backend needs some way to
pick between the two, and it's a lot more convenient to choose in NIR before
going out-of-SSA than in the backend.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23769>
2023-06-30 16:29:35 -04:00
Rohan Garg
feea00a6c4 anv: retry batchbuffer submission with i915
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23950>
2023-06-30 19:51:33 +00:00
Juston Li
e6cffa1f0e venus: use feedback for vkGetQueryPoolResults
Create a feedback buffer for each query pool and retrieve the query
results from the buffer instead of a roundtrip call in
vkGetQueryPoolResults.

VK_QUERY_RESULT_WAIT_BIT queries will poll until the queries are
available in the feedback buffer.

Query results in the feedback buffer are always VK_QUERY_RESULT_64_BIT
and if needed converted to what the app requests at
vkGetQueryPoolResults time.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Juston Li
38b1c39b59 venus: batch query feedback and defer until after render pass
vkCmdCopyQueryPoolResults cannot be called within a render pass so batch
and defer the query feedback copies until after the render pass.

Secondary command buffers inside render passes also have their query
feedback copies batched when recorded. When the secondary command buffer
is recorded via vkCmdExecuteCommands, it's batch is merged into the
primary command buffer's batch and is defered until the render pass ends.

If multiview is enabled, vkCmdCopyQueryPoolResults needs to copy
additional queries matching the number of bits set in viewMask.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Juston Li
e96428d588 venus: track render pass
vkCmdCopyQueryPoolResults cannot be called within a render pass/or
while the render pass is suspended so track when commands are inside
a render pass. Also track whether a secondary command buffer is
considered to be entirely inside a render pass.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Juston Li
fb537262c2 venus: track viewMask
Per spec 1.3.255: "If queries are used while executing a render pass
instance that has multiview enabled, the query uses N consecutive query
indices in the query pool (starting at query) where N is the number of
bits set in the view mask in the subpass the query is used in."

track viewMask so query feedback can copy the correct amount of queries
when multiview is enabled.

viewMask is passed in for vkCmdBeginRendering but for legacy
vkCmdBeginRenderPass/2 they are set by vkCreateRenderPass for each
subpass.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Juston Li
de4593faa1 venus: add query pool feedback cmds
Add feedback commands to write query results into a coherent buffer to
optimize out roundtrip vkGetQueryPoolResults that poll until a result
is available.

Queries are available after vkCmdEndQuery or vkCmdWriteTimeStamp, so
append a vkCmdCopyQueryPoolResults to copy to query results to our
coherent buffer.

The coherent buffer also needs to be cleared after vkCmdResetQueryPool
so append vkCmdFillBuffer.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Juston Li
5d88a3db8b venus: expose vn_feedback_buffer_create()
For query pool feedback, which are variable in size depending on the
query type and being contiguous will allow for simpler copies/clears.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Juston Li
a26a51d1d4 venus: factor out flush barrier cmd
generic device->host flush that will be re-used by query feedback

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23348>
2023-06-30 18:50:52 +00:00
Dylan Baker
6788aade62 meson: Add back execmem option as a deprecated option
I've been betting support requests by people confused as to why their
builds broke because this option was removed. We can add the option back
with the deprecated flag set so that Meson will give a nice warning, but
builds will continue to work.

fixes: 1dd1147408

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23893>
2023-06-30 16:35:22 +00:00
Rhys Perry
25c49e491f aco,ac/llvm,ac/nir,vtn: unify cube opcodes
fossil-db (navi21):
Totals from 17068 (12.79% of 133461) affected shaders:
Instrs: 24743703 -> 24743572 (-0.00%); split: -0.00%, +0.00%
CodeSize: 132579952 -> 132580620 (+0.00%); split: -0.00%, +0.00%
VGPRs: 1227840 -> 1227984 (+0.01%)
Latency: 403180114 -> 403251188 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 75311302 -> 75320892 (+0.01%); split: -0.00%, +0.01%
VClause: 415400 -> 415402 (+0.00%); split: -0.00%, +0.00%
Copies: 1715404 -> 1715258 (-0.01%); split: -0.01%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com> (r600)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23930>
2023-06-30 15:35:03 +00:00
Mike Blumenkrantz
dd3f756204 docs: update lavapipe extensions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23948>
2023-06-30 14:56:03 +00:00
Mike Blumenkrantz
4e38061643 zink: fix separate shader program refcounting
this fixes the refcount for the separate shader program to not have a leaked ref
and then fixes the owned program to have the expected number of refs

this happened to work some of the time before because there was an arbitrary unref
in replace_separable_prog(), but this shouldn't have been necessary

Fixes: e3b746e3a3 ("zink: use GPL to handle (simple) separate shader objects")

fixes #9274

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23888>
2023-06-30 14:32:49 +00:00
Mike Blumenkrantz
84bb6078f4 zink: do initial program unref during program creation
this ensures that programs are never created with more than $num_shaders
refs, which is otherwise not necessarily a bug but can lead to bugs

Fixes: a0e69e7601 ("zink: split out first-time shader module creation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23888>
2023-06-30 14:32:49 +00:00
Konstantin Seurer
d5884d5bd5 llvmpipe/ci: Update expectations
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
9a0c9c3ce4 lavapipe/ci: Update CI expectations for new extensions
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
1eca25cacc venus/ci: Update fails
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
16151a597a zink/ci: Update lavapipe expectations
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
01357b4da7 zink: Increase ZINK_FBFETCH_DESCRIPTOR_SIZE to 280
Work around the lavapipe descriptor buffer implementation.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
8f003569dd lavapipe: Make shader compilation thread safe
Fixes random crashes because the LLVM context is not thread safe.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Mike Blumenkrantz
83a7a88d6b llvmpipe: flush/reference fs ubos on bind
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
b9c588b47b llvmpipe: Use lp_jit_buffer_from_pipe_const in setup
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Mike Blumenkrantz
63d09d2437 lavapipe: VK_EXT_mutable_descriptor_type
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
91eb0f5b08 lavapipe: EXT_descriptor_indexing
fails:
dEQP-VK.descriptor_indexing.storage_texel_buffer
dEQP-VK.descriptor_indexing.storage_texel_buffer_after_bind
dEQP-VK.descriptor_indexing.storage_texel_buffer_after_bind_in_loop
dEQP-VK.descriptor_indexing.storage_texel_buffer_in_loop
dEQP-VK.descriptor_indexing.storage_texel_buffer_minNonUniform

They seem to be vertex-shader related.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
ea848d3721 lavapipe: Lower non uniform access
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Mike Blumenkrantz
b9d774fe22 lavapipe: EXT_descriptor_buffer
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Mike Blumenkrantz
9d876505bc lavapipe: split out descriptor stage setting
no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Mike Blumenkrantz
180f0090e5 lavapipe: create a desc set for immutable sampler layouts
this is necessary in order to bind an all-immutable set as a buffer

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
12a7fc51c7 lavapipe: Rework descriptor handling
Instead of using gallium binding slots for binding descriptors,
descriptor sets have UBOs that contain the llvmpipe descriptors.
Descriptor sets are bound by binding their UBO to the corresponding
slot.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
9b12e0ec02 lavapipe: Make pipeline_lock generic for accessing the queue
Since we must not access the pipe_context concurrently, it makes sense
to add a lock for all kinds of quere related operations. This way, we
can safely create pipe resources inside Vulkan entry points that can be
used concurrently.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
001a3769a6 lavapipe: Lower more texture OPs
Tries to reduce the number of textures we need to pre-compile.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
a8adbaf965 lavapipe: Include llvmpipe
Will be used to initialize llvmpipe descriptors.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
d361a0be28 llvmpipe: Disable the linear path when running vulkan
It doesn't implement vulkan style resources.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
61d94f243c gallivm: Implement vulkan images
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
573b8f23c2 gallivm: Implement vulkan textures
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
eb140fa936 gallivm: Implement vulkan SSBOs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
3f5f807125 gallivm: Implement vulkan UBOs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:35 +00:00
Konstantin Seurer
62b4eb9d74 gallivm: Add a function for loading vulkan descriptors
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
f675e4ee82 llvmpipe: Pre compile sample functions
With vulkan, we can not know details about texture and sampler resources
so we pre compile all possible combinations.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
7d4135ac10 gallivm: Clamp the texel buffer size
Fixes arb_texture_buffer_object-texture-buffer-size-clamp.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
1448600171 gallivm: Propagate vulkan resources
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
9aa28ae09d gallivm: Expose lp_build_texel_type
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
7ee32d636a llvmpipe: Add LP_TOTAL_IMAGE_OP_COUNT
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
b7e85f838a gallivm: Expose LP_MAX_TEX_FUNC_ARGS
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
0814f54779 gallivm: Add LP_IMG_OP_COUNT
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
12bd6242e5 llvmpipe: Add lp_build_image_soa_dynamic_state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
4654a99497 llvmpipe: Add lp_build_sampler_soa_dynamic_state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
e1f603b092 gallivm: Expose lp_build_sample_soa_code
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
e11e8289dd gallivm: Add lp_descriptor struct
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
0ab04247dc gallivm: Add missing includes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Konstantin Seurer
c2e639e74b llvmpipe: Add BDA jit type helpers
lavapipe will use them to implement descriptor buffers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22828>
2023-06-30 12:56:34 +00:00
Timur Kristóf
d63549a642 ac/nir/ngg: Follow tex sources when analyzing before culling.
Helps find more possible reusable uniforms variables.
Also prepares the code for more improvements to the analysis.

Fossil DB stats on GFX10.3:

Totals from 6745 (5.00% of 134913) affected shaders:
VGPRs: 304824 -> 304632 (-0.06%)
SpillSGPRs: 228 -> 231 (+1.32%)
CodeSize: 24975152 -> 24863684 (-0.45%); split: -0.56%, +0.11%
Instrs: 4774357 -> 4760913 (-0.28%); split: -0.42%, +0.13%
Latency: 22381084 -> 22218421 (-0.73%); split: -0.88%, +0.15%
InvThroughput: 3984765 -> 3981677 (-0.08%); split: -0.10%, +0.02%
VClause: 110036 -> 110265 (+0.21%); split: -0.67%, +0.88%
SClause: 116296 -> 104576 (-10.08%); split: -10.89%, +0.81%
Copies: 366923 -> 377370 (+2.85%); split: -0.78%, +3.63%
Branches: 119882 -> 119891 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 314591 -> 350697 (+11.48%); split: -0.36%, +11.83%
PreVGPRs: 252279 -> 252267 (-0.00%); split: -0.02%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
2023-06-30 11:47:03 +00:00
Timur Kristóf
411f69b9c5 ac/nir/ngg: Follow intrinsic sources when analyzing before culling.
Helps find more possible reusable uniforms variables.
Also prepares the code for more improvements to the analysis.

Fossil DB stats on GFX10.3:

Totals from 54578 (40.45% of 134913) affected shaders:
VGPRs: 1950536 -> 1950328 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 483 -> 1324 (+174.12%); split: -8.90%, +183.02%
CodeSize: 148017620 -> 146549576 (-0.99%); split: -1.10%, +0.11%
MaxWaves: 1533710 -> 1533716 (+0.00%); split: +0.00%, -0.00%
Instrs: 28137479 -> 27909113 (-0.81%); split: -0.94%, +0.13%
Latency: 134454624 -> 130909188 (-2.64%); split: -2.72%, +0.09%
InvThroughput: 20664192 -> 20646525 (-0.09%); split: -0.15%, +0.06%
VClause: 540374 -> 540986 (+0.11%); split: -0.76%, +0.88%
SClause: 720823 -> 636209 (-11.74%); split: -12.46%, +0.72%
Copies: 2287330 -> 2326140 (+1.70%); split: -1.71%, +3.41%
Branches: 844769 -> 844848 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 1987505 -> 2416965 (+21.61%); split: -0.12%, +21.73%
PreVGPRs: 1582704 -> 1581579 (-0.07%); split: -0.07%, +0.00%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
2023-06-30 11:47:03 +00:00
Timur Kristóf
91b28fc621 ac/nir/ngg: Add upper limit to reusable uniforms.
This is a heuristic to try to reduce SGPR spilling.

While the stats changes on this commit are not impressive,
this is mainly meant to reduce the regressions from the
next few commits which will find more of these
reusable uniforms.

Fossil DB stats on GFX10.3:

Totals from 567 (0.42% of 134913) affected shaders:
VGPRs: 32528 -> 32608 (+0.25%)
SpillSGPRs: 291 -> 247 (-15.12%); split: -49.14%, +34.02%
CodeSize: 3956896 -> 4006552 (+1.25%); split: -0.07%, +1.33%
MaxWaves: 10508 -> 10486 (-0.21%)
Instrs: 756092 -> 764613 (+1.13%); split: -0.09%, +1.22%
Latency: 2533679 -> 2544752 (+0.44%); split: -0.09%, +0.52%
InvThroughput: 733729 -> 733690 (-0.01%); split: -0.06%, +0.06%
VClause: 4853 -> 4861 (+0.16%); split: -1.36%, +1.52%
SClause: 15627 -> 17485 (+11.89%); split: -0.01%, +11.90%
Copies: 62584 -> 65345 (+4.41%); split: -1.61%, +6.02%
Branches: 17356 -> 17405 (+0.28%); split: -0.10%, +0.39%
PreSGPRs: 46758 -> 43465 (-7.04%); split: -8.37%, +1.33%
PreVGPRs: 28944 -> 28931 (-0.04%); split: -0.08%, +0.04%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
2023-06-30 11:47:03 +00:00
Timur Kristóf
ddeabcc19b ac/nir/ngg: Call nir_convert_to_lcssa before divergence analysis.
I've recently learned that this is necessary to get
correct results from divergence analysis.

No Fossil DB stats changes on GFX10.3.

Note, when backporting this patch to stable, make sure
the call to nir_convert_to_lcssa is before nir_divergence_analysis,
which may be located in a different place in the stable branch.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
2023-06-30 11:47:03 +00:00
Gert Wollny
ac61162e2a r600/sfn: Fix filling FS output gaps
in `a << b` with gcc 13 the shift count c is masked by the
bit count, and a value larger than 32 will result in shifts
by (c & 0x1f), which will add empty instructions if all
color outputs are written and this will eventually
result in an OOM error.

Fixes: 201b46e487
   r600/sfn: on R600/R700 write a dummy pixel output if there is a gap

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23945>
2023-06-30 11:12:12 +00:00
Karol Herbst
48737626c8 docs/cl: timer sync is implemented
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23944>
2023-06-30 12:02:41 +02:00
Karol Herbst
2df3515625 docs/cl: move vec3 support under OpenCL C 1.1
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23944>
2023-06-30 12:02:40 +02:00
Karol Herbst
9784b52579 docs/cl: remove cl_khr_byte_addressable_store from extension list.
It's a CL core 1.1 feature.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23944>
2023-06-30 12:02:39 +02:00
Rohan Garg
c3110ef1e9 intel/compiler: reuse previously computed bitsize
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23933>
2023-06-30 09:19:57 +00:00
Rohan Garg
7f48c70bab intel/compiler: construct masks instead of using magic values
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23933>
2023-06-30 09:19:57 +00:00
Luigi Santivetti
0925b07f4f pvr: fixup transfer primary sub-command list
When we allocate a new primary sub-command of type
PVR_SUB_CMD_TYPE_TRANSFER we need to make sure the list backing
transfer sub-commands can be shared and managed by both the
secondary and primary sub-command. Do this by always using a
pointer to maintain the list.

Found with:
  dEQP-VK.memory.pipeline_barrier.host_write_transfer_src.8192

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reported-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23918>
2023-06-30 08:33:08 +00:00
Samuel Pitoiset
b544a6d6c3 radv: emit PA_SC_SCREEN_SCISSOR_BR with the actual fb extent
For some reasons, this register is needed for RGP to report actual
render/depth targets size instead of 0 for both width/height. It
doesn't seem to have any other effects.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9169
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23921>
2023-06-30 06:38:53 +00:00
Timothy Arceri
c881e4167e glsl: remove old lower_blend_equation_advanced() code
We now have a NIR based replacement.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22711>
2023-06-30 04:08:18 +00:00
Timothy Arceri
c02252950c glsl: call nir version of lower_blend_equation_advanced()
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22711>
2023-06-30 04:08:18 +00:00
Timothy Arceri
7f3f429308 glsl: port lower_blend_equation_advanced() to nir
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22711>
2023-06-30 04:08:18 +00:00
Yonggang Luo
34072923a9 util: Remove redundant #if !defined(XF86_LIBC_H) in u_string.h
This is added in 3b5ee3d6de but then dropped
in fe14868d96
So this is not needed anymore

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23897>
2023-06-30 03:33:11 +00:00
Yonggang Luo
2aafd9d7e2 util: Remove redundant defined(_WIN32) in u_string.h
This defined(_WIN32) is nested in an "#ifdef _WIN32",
so it's duplicated

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23897>
2023-06-30 03:33:10 +00:00
Dave Airlie
e385913c21 lavapipe: check sampler pointer before deref
This fixes the vulkan samples deferred demo from crashing in here.

Cc: mesa-stable
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23542>
2023-06-30 03:14:48 +00:00
Mike Blumenkrantz
d2a7ddf066 zink: get new bda when rebinding invalidated buffers
this otherwise yields a broken descriptor

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23803>
2023-06-30 00:48:07 +00:00
Mike Blumenkrantz
041591d972 zink: fix unbinding generated gs on real gs bind
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23803>
2023-06-30 00:48:07 +00:00
Mike Blumenkrantz
a30379488e zink: fix assert for inline uniform invalidation with generated gs bound
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23803>
2023-06-30 00:48:07 +00:00
Paulo Zanoni
eeb6515096 intel/isl: tile 64 calculations work with 1D surfaces
Depth/stencil surfaces cannot be linear but they can be 1D, so they
end up being tile64 when sparse (as we force every sparse resource to
be either tile64 or linear).

According to the "1D surfaces" page from BSpec, our driver treats 1D
surfaces as 2D surfaces with a height of 1 texel, since we don't
enable the corresponding bit from HAS_SLICE_CHICKEN7. And since we
support 2D surfaces, we should also support 1D.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22974>
2023-06-29 23:30:05 +00:00
Paulo Zanoni
7c43c2ac49 iris: also avoid isl_memcpy_linear_to_tiled for Tile64
Just like we avoid it for Tile4, avoid it for Tile64.

We can't easily notice this problem since Tile4 is preferred over
Tile64, but if we patch isl_surf_choose_tiling() to choose Tile64 over
Tile4, then we start getting more than 1600 failures in CI.

These are the two most common error messages:
   ../src/gallium/drivers/iris/iris_resource.c:2168: get_image_offset_el: Assertion `z0_el == 0 && a0_el == 0' failed.
   ../src/intel/isl/isl_tiled_memcpy.c:857: linear_to_tiled: Assertion `!"" "unsupported tiling"' failed.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22974>
2023-06-29 23:30:05 +00:00
Alyssa Rosenzweig
a64f860acb broadcom/compiler: Use nir_steal_tex_src
It's great for passes like these. Noticed while in the area.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23895>
2023-06-29 22:36:50 +00:00
Alyssa Rosenzweig
5623f6571b broadcom/compiler: Remove unused #define
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23895>
2023-06-29 22:36:50 +00:00
Alyssa Rosenzweig
4601517f54 broadcom/compiler: Remove v3d_nir_lower_robust_access
Now unused.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23895>
2023-06-29 22:36:50 +00:00
Alyssa Rosenzweig
596176a720 broadcom/compiler: Use nir_lower_robust_access
The common code version, instead of the vendor version.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23895>
2023-06-29 22:36:50 +00:00
Alyssa Rosenzweig
f0fb8d05e3 nir: Add nir_lower_robust_access pass
Add a pass for bounds checking UBOs, SSBOs, and images to implement robustness.
This pass is based on v3d_nir_lower_robust_access.c, with significant
modifications to be appropriate for common code. Notably:

* v3d-isms are removed.
* Stop generating invalid imageSize() instructions for cube maps, this
  blows up nir_validate with asahi's lowerings.
* Logic to wrap an intrinsic in an if-statement is extracted in anticipation of
  future robustness2 support that will reuse that code path for buffers.
* Misc cleanups to follow modern NIR best practice. This pass is noticeably
  shorter than the original v3d version.

For future support of robustness2, I envision the booleans turning into tristate
enums.

There's a few more knobs added for Asahi's benefit. Apple hardware can do
imageLoad and imageStore to non-buffer images (only).  There is no support for
image atomics. To handle, Asahi implements software lowering for buffer images
and for image atomics. While the hardware is robust, the software paths are not.
So we would like to use this pass to lower robustness for the software paths but
not the hardware paths.

Or maybe we want a filter callback?

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23895>
2023-06-29 22:36:50 +00:00
Iván Briano
bafbfc57ea anv: flush data cache before emitting availability
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23814>
2023-06-29 22:11:35 +00:00
Kenneth Graunke
6535b0c0ea intel/genxml: Update RENDER_SURFACE_STATE Fields
I went through the RENDER_SURFACE_STATE docs today and found a number
of fields that are simply gone, marked as "must be zero", or had their
enum meanings change.  Update those here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23684>
2023-06-29 21:45:14 +00:00
Kenneth Graunke
4affaced9d intel/genxml: Fix gen_sort_tags.py to handle mbz/mbo
mbz and mbo are base types and not a structure to find as a dependency.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23684>
2023-06-29 21:45:13 +00:00
Kenneth Graunke
12f93d06e9 isl: Don't set "Enable Unorm Path in Color Pipe" on Alchemist
This bit no longer exists and is marked MBZ.  I assume that the
optimization is just permanently enabled; this was always a basically
a chicken bit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23684>
2023-06-29 21:45:13 +00:00
Yonggang Luo
38935d9789 broadcom: replace redefined ALIGN() macro with common util functions
`cl_aligned_packet_length()` expand literals, so use ALIGN_POT to compute it
at compile time.

`v3dv_AllocateMemory()` uses a 64-bit `allocationSize`, so use `align64()`.

`v3d_lower_nir()` uses a 32-bit `shared_size`, so use `align()`.

Extracted out of https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23932
for easier review.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23938>
2023-06-29 21:12:07 +00:00
Eric Engestrom
9a8a7aaf1d ci: split valve farm in two
There are two physical locations, so it makes sense to manage them
separately.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23908>
2023-06-29 20:25:01 +00:00
Helen Koike
1ab22f788d ci: remove unused tag DEBIAN_X86_64_TEST_IMAGE_PATH
DEBIAN_X86_64_TEST_IMAGE_PATH is unused and
DEBIAN_X86_TEST_IMAGE_GL_PATH doesn't even exist, so remove it to avoid
confusion.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23939>
2023-06-29 19:49:24 +00:00
Christian Gmeiner
1faac35866 etnaviv: make use nir_shader_clear_pass_flags(..)
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23931>
2023-06-29 19:13:19 +00:00
Christian Gmeiner
36b0cff774 nir/lower_amul: make use nir_shader_clear_pass_flags(..)
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23931>
2023-06-29 19:13:19 +00:00
Christian Gmeiner
fada46cf99 nir: add helper to clear all pass_flags
Will be used in different places so lets move it to a common place.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23931>
2023-06-29 19:13:19 +00:00
Eric Engestrom
690549f1b6 amd/ci: add another dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.* flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/44643768

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23935>
2023-06-29 17:35:12 +00:00
Juston Li
33ee59af1d radv: fix incorrect size for primitives generated query
Primitives generated queries write 1 integer, the primitives-generated
count that is incremented every time a primitive emitted to that stream
reaches the transform feedback stage.

Fixes: 1ebf463a5a ("radv: implement VK_EXT_primitives_generated_query")
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23915>
2023-06-29 16:58:50 +00:00
Rohan Garg
4f3890dd87 anv: move WA 1607854226 to use the WA infrastructure
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23929>
2023-06-29 16:22:59 +00:00
Mike Blumenkrantz
2bd2c03b0e lavapipe: handle multiview queries
the availability info has to be available for N bits of multiview when active

Reviewed-by: Juston Li <justonli@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23913>
2023-06-29 14:54:54 +00:00
Alyssa Rosenzweig
e81b5b972e nir/validate: Assert txf(_ms) matches dimension
We can't txf_ms on non-MS images and we can't txf on MS images. This would have
caught a regression on Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23892>
2023-06-29 14:17:30 +00:00
Georg Lehmann
5099137612 aco/optimizer: delete s_bitcmp optimization
This is now done in NIR.
No Foz-DB changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
2023-06-29 13:39:30 +00:00
Georg Lehmann
130fbda71b radv: set has_bit_test for aco
Foz-DB Navi21:
Totals from 15285 (11.52% of 132657) affected shaders:
VGPRs: 1019136 -> 1019000 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 10889 -> 10909 (+0.18%)
SpillVGPRs: 901 -> 914 (+1.44%); split: -0.89%, +2.33%
CodeSize: 103578640 -> 103523220 (-0.05%); split: -0.08%, +0.03%
MaxWaves: 259782 -> 259820 (+0.01%)
Instrs: 19247383 -> 19223764 (-0.12%); split: -0.15%, +0.02%
Latency: 323877613 -> 323684655 (-0.06%); split: -0.10%, +0.04%
InvThroughput: 62505295 -> 62386541 (-0.19%); split: -0.21%, +0.02%
VClause: 366162 -> 366136 (-0.01%); split: -0.03%, +0.02%
SClause: 786505 -> 785527 (-0.12%); split: -0.22%, +0.10%
Copies: 1348920 -> 1349209 (+0.02%); split: -0.26%, +0.29%
Branches: 456331 -> 456324 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 849542 -> 849402 (-0.02%); split: -0.02%, +0.01%
PreVGPRs: 925300 -> 924678 (-0.07%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
2023-06-29 13:39:30 +00:00
Georg Lehmann
44d0b785cc nir/opt_algebraic: combine bitz/bitnz
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
2023-06-29 13:39:30 +00:00
Georg Lehmann
573e98f34a aco: implement nir_op_bitz/bitnz
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
2023-06-29 13:39:30 +00:00
Georg Lehmann
6585209cdd nir/lower_bit_size: mask bitz/bitnz src1 like shifts
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
2023-06-29 13:39:30 +00:00
Georg Lehmann
481a34e82e nir: add single bit test opcodes
These directly map to amd's SALU s_bitcmp0/1.
For VALU we can use v_cmp_class_f32 if the second source is constant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
2023-06-29 13:39:30 +00:00
Patrick Lerda
9ca1bb3cf8 util/blitter: revert util_blitter_clear_buffer()
The previous change was creating a regression.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9252
Fixes: 23c003b88c ("util/blitter: fix util_blitter_clear_buffer() refcnt imbalance")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23923>
2023-06-29 13:01:48 +00:00
Daniel Stone
625215dbe1 ci/fdno: Pause a660 testing
The a660 machines are having a bunch of fastboot issues today. Pause it
until we can fix it.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23922>
2023-06-29 12:22:26 +00:00
Yonggang Luo
68b8aa788d intel/compiler: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:54 +00:00
Yonggang Luo
46df42c4e8 crocus: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:54 +00:00
Yonggang Luo
e1bf96dd56 glsl: Remove the extra scope in gl_nir_link_uniforms.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:54 +00:00
Yonggang Luo
dcf9cfd297 glsl: Switch to use nir_foreach_function_impl from nir_foreach_function
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:54 +00:00
Yonggang Luo
4a8ec0db90 d3d12: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:54 +00:00
Yonggang Luo
99dce8407e asahi: Use nir_foreach_function_impl instead nir_foreach_function in function agx_nir_lower_zs_emit
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:54 +00:00
Yonggang Luo
a434217720 gallium/auxiliary: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23920>
2023-06-29 11:29:53 +00:00
Corentin Noël
a8d669b593 nir/split_64bit_vec3_and_vec4: Use the right number of components
Always make sure to correctly deref and store a 64bits variable
from the right number of components.

This fixes the `spec@arb_enhanced_layouts@matching_fp64_types_`
piglit tests for virgl.

Corrects this validation issue:
```
	decl_var  INTERP_MODE_FLAT dvec2[] var_7@2
	decl_var  INTERP_MODE_FLAT dvec2[] var_7@3
...
	vec1 32 ssa_302 = deref_var &var_7@2 (function_temp dvec2[])
	vec1 32 ssa_303 = deref_var &var_7@3 (function_temp dvec2[])
	vec1 32 ssa_304 = deref_array &(*ssa_302)[ssa_301] (function_temp dvec2) /* &var_7@2[ssa_301] */
	vec1 32 ssa_305 = deref_array &(*ssa_303)[ssa_301] (function_temp dvec2) /* &var_7@3[ssa_301] */
	vec1 64 ssa_306 = mov ssa_110.z
	intrinsic store_deref (ssa_305, ssa_306) (wrmask=x, access=0)
error: instr->num_components == glsl_get_vector_elements(dst->type) (../src/compiler/nir/nir_validate.c:632)

	vec4 64 ssa_111 = vec4 ssa_14, ssa_13, ssa_12, ssa_109
	vec1 32 ssa_307 = load_const (0x00000000 = 0.000000)
	vec1 32 ssa_308 = iadd ssa_307, ssa_61
	vec1 32 ssa_309 = deref_var &var_7@2 (function_temp dvec2[])
	vec1 32 ssa_310 = deref_var &var_7@3 (function_temp dvec2[])
	vec1 32 ssa_311 = deref_array &(*ssa_309)[ssa_308] (function_temp dvec2) /* &var_7@2[ssa_308] */
	vec1 32 ssa_312 = deref_array &(*ssa_310)[ssa_308] (function_temp dvec2) /* &var_7@3[ssa_308] */
	vec1 64 ssa_313 = mov ssa_111.w
	intrinsic store_deref (ssa_312, ssa_313) (wrmask=, access=0)
error: (nir_intrinsic_write_mask(instr) & ~component_mask) == 0 (../src/compiler/nir/nir_validate.c:803)
```

Fixes: 496fd59d71 (add pass to split 64 bit vec3/4 variable access)
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23880>
2023-06-29 10:59:57 +00:00
Lionel Landwerlin
d3003b0a41 Revert "isl: Set Depth to array len for 3D storage images"
This reverts commit 7e1b62ea5b.

This is now following the PRMs, RENDER_SURFACE_STATE Depth should be
programmed to the base level depth value.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23868>
2023-06-29 10:32:20 +00:00
Lionel Landwerlin
2e8c0a33e7 anv: implement storage image depth query using descriptor buffer read
The HW not returning the depth value we would like for
VK_EXT_sliced_view_of_3d, we can pull that value by reading the
RENDER_SURFACE_STATE struct directly.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23868>
2023-06-29 10:32:20 +00:00
Iago Toral Quiroga
a7ccba2dfd v3dv: fix blit path for compressed image to buffer copies
Here we were aliasing the full compressed image with an uncompressed
format that we would then use for sampling during the blit copy. This
had 2 issues:

1. Uncompressed image views would have smaller dimensions than the
compressed image, and thus, would also have less mip levels.

2. When sampling from smaller mip levels, the hw internally computes
the size of the mip level from the size of level 0, which then uses
to interpret the texture coordinates, but for some texture sizes
this size would not be an exact match for compressed and uncompressed
views.

To fix this, we modify the aliasing technique to only alias the
miplevel selected in the copy as a level 0 image and we ensure the
slice 0 for that image matches exactly the slice description of the
aliased mip level in the original image.

Fixes all test failures in
dEQP-VK.api.copy_and_blit.core.image_to_buffer.*
for compressed formats when we forcefully disable the TLB path.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23919>
2023-06-29 10:13:42 +00:00
Iago Toral Quiroga
599e76617d v3dv: use div_round_up for division by block size
We always want to round up when we divide by the block size.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23919>
2023-06-29 10:13:42 +00:00
Lionel Landwerlin
a1fda29bd1 anv: look into batch bo reloc list looking for BOs to decode
On DG2 I ran into a case where the surface state was not being decoded
with INTEL_DEBUG=bat. This is because the surface states are not part
of a state pool there anymore. Instead BO are allocate manually and
placed in vma heap.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 96c33fb027 ("anv: enable direct descriptors on platforms with extended bindless offset")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23891>
2023-06-29 09:24:07 +00:00
Yonggang Luo
5f7fb0a720 clang-format: Add nir_foreach_function_impl into src/.clang-format
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23903>
2023-06-29 08:36:03 +00:00
Yonggang Luo
62ce223245 treewide: Switch to use nir_foreach_function_with_impl when possible
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23903>
2023-06-29 08:36:03 +00:00
Yonggang Luo
b91bff3537 clang-format: Add nir_foreach_function_with_impl into src/.clang-format
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23903>
2023-06-29 08:36:03 +00:00
Yonggang Luo
fde6b51749 nir: Split macro nir_foreach_function_with_impl out of nir_foreach_function_impl
This macro nir_foreach_function_with_impl can be used when func and func->impl are both accessed in
foreach loop

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23903>
2023-06-29 08:36:03 +00:00
Erik Faye-Lund
afa79cd9b8 nir: use imm-helpers
We have to use 1ull instead of 1u because MSVC is stupid...

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
0d8c458e8f gallium: use imm-helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
2a7ab2f7bd etnaviv: use imm-helpers
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
a6da9d7147 amd: use imm-helpers
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
ee02893573 mesa/st: use imm-helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
33035ed216 hasvk: use imm-helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
6520b3e726 anv: use imm-helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
c4b6b0d949 intel: use imm-helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
0b57f76986 vc4: use imm-helpers
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
6537b8b40b radeonsi: use imm-helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
bd87f15ee9 d3d12: use imm-helpers
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
f2afe52a14 r600/sfn: use imm-helpers
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
1c524136c0 freedreno: use imm-helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Erik Faye-Lund
45e7e16222 pan: use imm-helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:18 +00:00
Erik Faye-Lund
80212172e4 v3dv: use imm-helpers
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:18 +00:00
Erik Faye-Lund
b3b3be55c4 broadcom/compiler: use imm-helpers
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:18 +00:00
Erik Faye-Lund
c69dc01796 vulkan: avoid needless constant-folding
While we're at it, also switch to the nir_f{add,mul}_imm helpers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:18 +00:00
Erik Faye-Lund
195399f857 mesa/st: use nir_ineg
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:18 +00:00
Erik Faye-Lund
b9d3736302 microsoft/compiler: use nir_imm_zero
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:18 +00:00
Yonggang Luo
30ab06bcf8 mapi: Remove dead struct _glapi_function in glapi/glapi_getproc.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23879>
2023-06-29 01:36:09 +00:00
Yonggang Luo
1ed7a1282c mapi: Merge get_static_proc_address into _glapi_get_proc_address
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23879>
2023-06-29 01:36:09 +00:00
Yonggang Luo
e3b93887eb mapi: Style fixes in glapi/glapi_getproc.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23879>
2023-06-29 01:36:09 +00:00
Yonggang Luo
a63b7a03a1 util: sizeof bucket are always 32bit width, use align instead align64
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23732>
2023-06-29 00:45:31 +00:00
Yonggang Luo
b7a0d34f89 util: Do not use align64 over unsigned int in register_allocate.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23732>
2023-06-29 00:45:31 +00:00
Yonggang Luo
4d7c969dd8 util: Replace the usage of redundant u_align_u32 with align and remove u_align_u32
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23732>
2023-06-29 00:45:30 +00:00
Yonggang Luo
7ac83b0961 util: Getting align and align64 consistence with ALIGN
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23732>
2023-06-29 00:45:30 +00:00
Yonggang Luo
b45fb614a4 util: use uint32_t instead of unsigned in bitscan.h
uint32_t is more exact than unsigned for these functions

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23732>
2023-06-29 00:45:30 +00:00
Yonggang Luo
3aa929ca46 util: Add function util_is_power_of_two_nonzero64 in bitscan.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23732>
2023-06-29 00:45:30 +00:00
Donald Robson
3fc727b346 pvr: Rename rogue_fw.xml -> rogue_kmd_stream.xml.
The UMD does not care if firmware is used, and the current name isn't
very informative either.

Signed-off-by: Donald Robson <donald.robson@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
2023-06-28 22:26:07 +00:00
Matt Coster
70f86b25a1 pvr: Rename transfer 3D heap to transfer frag heap
This better matches the naming throughout the rest of the driver.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
2023-06-28 22:26:07 +00:00
Sarah Walker
a76818e525 pvr: Merge main and extension command streams
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
2023-06-28 22:26:07 +00:00
Sarah Walker
8d3e8c3ad9 pvr: Rename heap reserved area to static data carveout
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
2023-06-28 22:26:07 +00:00
Sarah Walker
b0a45fc618 pvr: use pvr_csb_pack() to setup CR_FB_CDC_ZLS
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
2023-06-28 22:26:07 +00:00
Sarah Walker
e714b35301 pvr: Fragment register fb_cdc_zls is feature dependent
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
2023-06-28 22:26:07 +00:00
Prodea Alexandru-Liviu
5acbadddb4 microsoft/clc: Don't build compiler test if build-tests is false
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8161

Cc: mesa-stable

Reviewed-by: Eric Engestrom <eric@igalia.com>

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23890>
2023-06-28 22:09:13 +00:00
Sil Vilerino
1b7bf9a4f4 d3d12: Fix usage of D3D12_VIDEO_ENCODER_RATE_CONTROL_FLAG, was using D3D12_VIDEO_ENCODER_SUPPORT_FLAG wrongly instead
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23904>
2023-06-28 21:48:38 +00:00
Sil Vilerino
ed0087d75e d3d12: Only set reduced_tx_set when supported by D3D12 caps (no libva caps for reduced_tx_set to map to)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23904>
2023-06-28 21:48:38 +00:00
Sil Vilerino
6de9402fa8 d3d12: Correct tx_mode_support reporting as specified in libva spec
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23904>
2023-06-28 21:48:38 +00:00
Yonggang Luo
75ac852253 compiler: set alignment=1 by default for handling empty struct/interface in glsl_types.cpp
When there is no elements in struct/interface, the alignment of it should be 1 instead of 0.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23841>
2023-06-28 21:16:05 +00:00
Joshua Ashton
68b9ad0ba7 radv: Do not enable robustness for push constants with robustBufferAccess2
There is no spec text requiring this behaviour, it is only for buffers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23885>
2023-06-28 20:49:30 +00:00
Caio Oliveira
f4c2025e2c nir/print: Print more representations in load_const
In addition to the hexadecimal and float (when applicable), print the
signed and unsigned representations.  Representations may be omitted based
on information about the value:

- If gather types has unambiguous information, we use it;
- Float is omitted for 8 bit values;
- Signed decimal is omitted for positive values;
- Unsigned decimal is omitted for small values (representation is same as hex);

Note for now the "terse form" that appear in SSA uses is unchaged.

Based on a patch by Mike Blumenkrantz.

Examples:

```
// Just used as float. Omitted decimals.
vec4 32 ssa_81 = load_const (0x3f800000, 0x3f800000, 0x3e4ccccd, 0x3f800000) = (1.000000, 1.000000, 0.200000, 1.000000)
vec1 32 ssa_28 = load_const (0x3e4ccccd = 0.200000)

// Just a small integer. Omitted float and decimal.
vec1 32 ssa_45 = load_const (0x00000001)

// Larger positive integers. Omitted float.
vec1 32 ssa_39 = load_const (0x00002000 = 8192)
vec1 32 ssa_30 = load_const (0x000000ff = 255)
vec1 32 ssa_28 = load_const (0x00000010 = 16)

// Integers with negative values.
load_const (0xff = -1 = 255)
load_const (0xff80 = -128 = 65408)
load_const (0xffff = -1 = 65535)

// Same value, in the first case we know is used as an integer.
load_const (0xffffffe0 = -32 = 4294967264)
load_const (0xffffffe0 = -nan = -32 = 4294967264)
```

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
a185736a42 nir/print: Use src_type when printing consts in SSA uses
If the src_type is not available, untie by looking at the results from
nir_gather_ssa_types(). If that is ambiguous, just pick uint.

Now in print_const_from_load() when the type is invalid, print the full
constant form (with both padded hex and float); when the passed type
is valid, print the terse form based on it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
5d15f4ef28 nir: Extract logic to get dest and srcs types from intrinsic
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
7de530d3df nir: Make a const-friendly way to get the offset_src and arrayed_io_src from intrinsic
The existing helper returns a `nir_src *` so expects a non-const instr.

We plan to use this function in queries that don't modify the shader, so
create (and use internally) a variant that returns the index instead.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
8f64415af7 nir/print: Make NIR_DEBUG=print_consts behavior the default
Now there's a NIR_DEBUG=print_no_inline_consts to omit them.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
260a9167db nir/print: Improve NIR_PRINT=print_consts by using nir_gather_ssa_types()
The two representations are *always* used for `load_const`, but when
inlining the value as SSA source, use just a single terse
representation.

The choice between integer or float is based on the result of
nir_gather_ssa_types(), with a bias for integer when in doubt.

Also remove extra comment `/* */` syntax since the value is already
enclosed by parenthesis.

---

For illustration, here's some instructions from crucible test
func.shader.averageRounded.uint64_t with NIR_DEBUG=print_consts:

BEFORE:

```
vec1 32 con ssa_23 = load_const (0xfffffffc = -nan)
vec1 32 div ssa_24 = iand ssa_13, ssa_23 /*(0xfffffffc = -nan)*/
vec1 32 con ssa_25 = load_const (0x00000024 = 0.000000)
vec1 32 con ssa_26 = intrinsic load_ubo (ssa_1 /*(0x00000002 = 0.000000)*/, ssa_25 /*(0x00000024 = 0.000000)*/) (access=0, align_mul=1073741824, align_offset=36, range_base=0, range=-1)
vec1 32 con ssa_27 = load_const (0x00000008 = 0.000000)
vec1 32 con ssa_28 = load_const (0x00000007 = 0.000000)
vec1 32 con ssa_29 = iand ssa_4.y, ssa_1 /*(0x00000002 = 0.000000)*/
vec1 32 con ssa_30 = ishl ssa_29, ssa_28 /*(0x00000007 = 0.000000)*/
vec1 32 con ssa_31 = load_const (0x7b000808 = 664776890994587263929995856502063104.000000)
vec1 32 con ssa_32 = ior ssa_31 /*(0x7b000808 = 664776890994587263929995856502063104.000000)*/, ssa_30
```

AFTER:

```
vec1 32 con ssa_23 = load_const (0xfffffffc = -nan)
vec1 32 div ssa_24 = iand ssa_13, ssa_23 (0xfffffffc)
vec1 32 con ssa_25 = load_const (0x00000024 = 0.000000)
vec1 32 con ssa_26 = intrinsic load_ubo (ssa_1 (0x2), ssa_25 (0x24)) (access=0, align_mul=1073741824, align_offset=36, range_base=0, range=-1)
vec1 32 con ssa_27 = load_const (0x00000008 = 0.000000)
vec1 32 con ssa_28 = load_const (0x00000007 = 0.000000)
vec1 32 con ssa_29 = iand ssa_4.y, ssa_1 (0x2)
vec1 32 con ssa_30 = ishl ssa_29, ssa_28 (0x7)
vec1 32 con ssa_31 = load_const (0x7b000808 = 664776890994587263929995856502063104.000000)
vec1 32 con ssa_32 = ior ssa_31 (0x7b000808), ssa_30
```

and some instructions from crucible test func.gs.basic with NIR_DEBUG=print_consts,
now showing float representation being selected:

BEFORE:

```
vec4 32 ssa_10 = load_const (0x3e4ccccd, 0x3e4ccccd, 0x00000000, 0x00000000) = (0.200000, 0.200000, 0.000000, 0.000000)
vec4 32 ssa_9 = intrinsic load_deref (ssa_42) (access=0)
vec4 32 ssa_11 = fadd ssa_9, ssa_10 /*(0x3e4ccccd, 0x3e4ccccd, 0x00000000, 0x00000000) = (0.200000, 0.200000, 0.000000, 0.000000)*/
```

AFTER:

```
vec4 32 ssa_10 = load_const (0x3e4ccccd, 0x3e4ccccd, 0x00000000, 0x00000000) = (0.200000, 0.200000, 0.000000, 0.000000)
vec4 32 ssa_9 = intrinsic load_deref (ssa_42) (access=0)
vec4 32 ssa_11 = fadd ssa_9, ssa_10 (0.200000, 0.200000, 0.000000, 0.000000)
```

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
3cfdab8f92 nir: Allow nir_gather_ssa_types() to ignore regs instead of assert
If we infer a type for a reg, just ignore and keep going.  This will allow
to use this pass even when registers are present.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Konstantin Seurer
1e2f647fbb radv/rt: Hash stages using radv_hash_shaders
The hash also depends on the radv_pipeline_key as well as the flags. The
pipeline layout will also play a role when we implement inline
descriptor sets and push constants.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23747>
2023-06-28 19:45:25 +00:00
Konstantin Seurer
de1092e256 radv/rt: Fix caching non-recursive stages
The hash used for insertion is calculated in a different way than the
hash used for lookup.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23747>
2023-06-28 19:45:25 +00:00
Konstantin Seurer
c9a5cac4ff util: Do not include immintrin.h in half_float.h
The files included are extremely large and hurt compile time of
everything that inludes half_float.h directly or indirectly.

Compile time of a fresh RADV build:
before 32.477s 32.661s 32.625s
after  25.116s 24.928s 25.114s

v2: Include xmmintrin instead (Marek Olšák)
after  25.552s 25.811s 25.678s

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23871>
2023-06-28 18:56:20 +00:00
Eric Engestrom
189c7d6ff1 amd/ci: add another dEQP-VK.multiview.renderpass2.multisample.* flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/44557372

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23910>
2023-06-28 18:32:10 +00:00
Kiskae
e67337bebf vulkan/wsi: check for dri3 buffer initialization failure
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8427
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Lina Versace <linyaa@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23081>
2023-06-28 14:45:01 +00:00
Dmitry Baryshkov
0e51f2de88 freedreno/registers: add bitfield for DSI wide bus enablement
Add a bitfield controlling wide bus enablement for DPU<->DSI interface.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23829>
2023-06-28 14:17:06 +00:00
Erik Faye-Lund
bbcda63564 draw/i915: move hwfmt array to i915 specific struct
There's no point in bloating the vertex_info struct everywhere with
information that's only used by i915 in a single place. Let's explicitly
store the hwinfo when needed, instead of piggy-backing on vertex_info.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23851>
2023-06-28 13:42:44 +00:00
Samuel Pitoiset
3f7ea95bc9 radv: inline more values in radv_emit_fb_ds_state()
These are no longer adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23887>
2023-06-28 13:21:44 +00:00
Samuel Pitoiset
5010ab8fff radv: stop emitting TILE_SURFACE_ENABLE for the ZRANGE_PRECISION workaround
The only case that matters is when the fb is emitted, but HTILE is
already disabled there using DB_RENDER_CONTROL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23887>
2023-06-28 13:21:44 +00:00
Yonggang Luo
f8a2047387 d3d12: Fixes unused-variable compile error
The compile error message is:
../../src/gallium/drivers/d3d12/d3d12_video_screen.cpp:481:70: error: unused variable ‘sliceData’ [-Werror=unused-variable]
  481 |    D3D12_VIDEO_ENCODER_PICTURE_CONTROL_SUBREGIONS_LAYOUT_DATA_SLICES sliceData = { };
      |                                                                      ^~~~~~~~~
cc1plus: all warnings being treated as errors

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23900>
2023-06-28 12:04:56 +00:00
Karmjit Mahil
4096bd8d85 pvr: Setup ZLS depth and stencil load/store separately
Previously the code assumed that you could only have depth-stencil
attachments so no stencil only or depth only, for ZLS load/stores.
This isn't true as we can have stencil only attachments so the
ZLS depth and stencil store/load enable have to be set separately.

Other ZLSCTL setup has also been adjusted for separate depth-stencil.
E.g. the z{load,store}format, and {load,store}twiddled.

Co-Authored-By: Soroush Kashani <soroush.kashani@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23830>
2023-06-28 11:14:10 +00:00
Alejandro Piñeiro
59518b6dc6 v3dv: add a linear images to buffer copy codepath
Called copy_image_to_buffer_texel_buffer, that reuses
copy_image_linear_texel_buffer, by setting up a image destination from
the buffer destination.

This fixes new ycbcr tests added recently (1.3.6.0) like:
dEQP-VK.ycbcr.copy.*.*.*buffer*

that were failing due lack of a codepath handling them.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23864>
2023-06-28 12:55:16 +02:00
Alejandro Piñeiro
74fd2b9dd7 v3dv: refactor copy_image_to_buffer_blit
In order to have common code to create a image from a buffer, that we
plan to use later on a new codepath.

This refactor adds three new methods:
 * One that gathers all the info required to create the structures and
   implement the operation
 * One that creates the image from the buffer, based on that info
 * One that creates a BlitRegion from that info

This seems like too much splitting, but we needed to do it in this
way, because we can't ensure that future uses of this common code
would use a BlitRegion.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23864>
2023-06-28 12:54:57 +02:00
Samuel Pitoiset
7b8c6cedcf radv: allow NV_device_generated_commands with RADV_DEBUG=noibs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23791>
2023-06-28 06:34:20 +00:00
Samuel Pitoiset
277b2afd70 radv/amdgpu: add support for executing DGC cmdbuf with RADV_DEBUG=noibs
This contains some preliminary work to be able to execute DGC cmdbuf
on the compute queue because IB2 doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23791>
2023-06-28 06:34:20 +00:00
Samuel Pitoiset
82c60b41e9 radv/amdgpu: add more small helpers for managing CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23791>
2023-06-28 06:34:20 +00:00
Sil Vilerino
86785130d1 CI/windows: Update headers and Agility redist to 1.711.3-preview
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23811>
2023-06-27 23:16:37 +00:00
Sil Vilerino
64da736286 d3d12: AV1 Encode
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23811>
2023-06-27 23:16:37 +00:00
Sil Vilerino
314871d57b frontends/va: Extend AV1 Encode params
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23811>
2023-06-27 23:16:37 +00:00
Alyssa Rosenzweig
190b1fdc64 nir: Convert to nir_foreach_function_impl
Done by hand at each call site but going very quickly with funny Vim motions and
common regexes. This is a very common idiom in NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23807>
2023-06-27 22:44:04 +00:00
Alyssa Rosenzweig
19daa9283c nir: Add nir_foreach_function_impl helper
Most users of nir_foreach_function actually want the nir_function_impl, not the
nir_function, and want to skip empty functions (though some graphics-specific
passes sometimes fail to do that part). Add a nir_foreach_function_impl macro
to make that case more ergonomic.

   nir_foreach_function_impl(impl, shader) {
      ...
      foo(impl)
   }

is equivalent to:

   nir_foreach_function(func, shader) {
      if (func->impl) {
         ...
         foo(func->impl);
      }
   }

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23807>
2023-06-27 22:44:04 +00:00
Karol Herbst
a8044110bf docs/rusticl: add Enabling section
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23859>
2023-06-27 22:35:13 +00:00
Karol Herbst
e2263a645c docs/rusticl: mark building section as such
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23859>
2023-06-27 22:35:13 +00:00
Jordan Justen
7f0ed719aa intel/devinfo/i915: Set has_set_pat_uapi for MTL+
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
463bf13411 anv: Use set PAT extension on BO creation for MTL
Reworks:
 * Drop local pat_index var (suggested by José)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
45278d1988 iris: Use set PAT extension on BO creation for MTL
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
b66678fb2e drm-uapi/i915_drm.h: Update from drm-next (2023-06-09)
git://anongit.freedesktop.org/drm/drm 2222dcb0775d36de28992f56455ab3967b30d380

The motivation for this change in to get the uapi changes from:

commit 81b1b599dfd71c958418dad586fa72c8d30d1065
Author: Fei Yang <fei.yang@intel.com>
Date:   Tue Jun 6 12:00:42 2023 +0200

    drm/i915: Allow user to set cache at BO creation

Specifically, the I915_GEM_CREATE_EXT_SET_PAT extension.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Francisco Jerez
fce905f613 anv: Swap ordering of memory types on non-LLC platforms to work around application bugs.
The Vulkan specification indicates that if memory types have
properties which are a strict subset of another type's, then they
should appear before that memory type.  Otherwise the specification
does not require a specific ordering of memory types.

But, it appears that Aztec Ruins and the Vulkan CTS make an assumption
that the first host-accessible memory type is host-coherent and select
it when they expect data written by the CPU to become visible without
calling vkFlushMappedMemoryRanges(), even though flushing is required
by the spec, which leads to misrendering and hangs on MTL platforms.

We found that other drivers also put a host-coherent, but not cached
memory type as the first host-accessible memory type, so let's do the
same in order to match the expectations of such broken applications.

Host-coherent uncached memory types are currently implemented with a
WC CPU map on non-LLC platforms, so there shouldn't be a huge
performance penalty from this: If an application intends to do heavy
R/W CPU access on a memory range it's expected to loop over the
available memory types and select one marked as host-cached -- If an
application fails to do that and simply selects the first available
type it seems more robust to stay on the safe side and give them a
host-coherent type rather than a cached one.

Rework:
 * Jordan: Add initial explanation to body of commmit message.
 * Curro: Add additional comments to commit message.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
79c879d235 iris: Map aux-map with WC on MTL+ (has_set_pat_uapi)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
37fc25aa74 iris/bufmgr: Skip bucket allocation if not using writeback cache PAT index
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
5e697abc58 iris/bufmgr: Add iris_pat_index_for_bo_flags()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
b602c14fc5 intel/devinfo: Define PAT indices used on MTL
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Jordan Justen
e896b81322 intel/devinfo: Add has_set_pat_uapi
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Kenneth Graunke
758bf5f764 iris: Allocate coherent buffers for resources flagged as persistent/coherent
If the application requests a coherent resource, we should honor that.
We technically don't need to ensure coherency for persistent mappings,
but we would have to handle PIPE_BARRIER_MAPPED_BUFFER to ensure that
data became visible at the right times. Instead, we just opt for the
easy plan and mark them coherent too.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
2023-06-27 22:06:19 +00:00
Mark Janes
8b70754753 intel/dev: update mesa_defs.json from defect database
These modifications represent:

 * changes to defects made since May 24, 2023
 * changes to handling of defects which were manually cloned

Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23865>
2023-06-27 21:38:12 +00:00
Jesse Natalie
f0569cdba0 dzn: VK_EXT_external_memory_host
When ID3D12Device13 is available, we can support importing host memory.
Imported host memory can be used to back buffers and linear textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23886>
2023-06-27 21:21:53 +00:00
Jordan Justen
a831ee51ae anv: Flush untyped dataport cache DC flush is requested on compute
Although the following is based on this observations for OpenGL, we
probably need this for Vulkan as well.

KHR-GL46.texture_buffer.texture_buffer_operations_ssbo_writes writes
to an SSBO in a compute program, then issues a memory-barrier, which
causes us to add a DC-flush. Then a second compute program samples
from the SSBO written by the first compute program.

Although we expected the DC-flush to make the writes available to the
second compute program, on MTL this wasn't the case. Adding the
"Untyped Data-Port Cache Flush" fixes this.

The PRM indicates that compute programs must set "Untyped Data-Port
Cache Flush" to flush some LSC writes when flushing HDC. Although we
are setting DC-flush, and not HDC-flush, it does appear that the
following reference might also apply to DC-flush.

In the Intel(R) Arc(tm) A-Series Graphics and Intel Data Center GPU
Flex Series Open-Source Programmer's Reference Manual, Vol 2a: Command
Reference: Instructions, PIPE_CONTROL, HDC Pipeline Flush (DWord 0,
Bit 9), there is a programming note:

> When the "Pipeline Select" mode is set to "GPGPU", the LSC Untyped
> L1 cache flush is controlled by "Untyped Data-Port Cache Flush" bit
> in the PIPE_CONTROL command.

Ref: a8108f1d44 ("anv: Add missing untyped data port flush on PIPELINE_SELECT")
Ref: bd8e8d204d ("iris: Add missing untyped data port flush on PIPELINE_SELECT")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176>
2023-06-27 20:56:28 +00:00
Jordan Justen
215c6c6ce4 anv: Flush untyped dataport cache when HDC flush is requested on compute
In the Intel(R) Arc(tm) A-Series Graphics and Intel Data Center GPU
Flex Series Open-Source Programmer's Reference Manual, Vol 2a: Command
Reference: Instructions, PIPE_CONTROL, HDC Pipeline Flush (DWord 0,
Bit 9), there is a programming note:

> When the "Pipeline Select" mode is set to "GPGPU", the LSC Untyped
> L1 cache flush is controlled by "Untyped Data-Port Cache Flush" bit
> in the PIPE_CONTROL command.

Ref: a8108f1d44 ("anv: Add missing untyped data port flush on PIPELINE_SELECT")
Ref: bd8e8d204d ("iris: Add missing untyped data port flush on PIPELINE_SELECT")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176>
2023-06-27 20:56:28 +00:00
Jordan Justen
c5ca2bed51 anv: Clear untyped dataport cache flush bit if not in GPGPU mode
This should be equivalent, but refactoring the code will allow the
next two patches to use an else block for this check.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176>
2023-06-27 20:56:28 +00:00
Jordan Justen
1d1f5f1405 iris: Flush untyped dataport cache DC flush is requested on compute
KHR-GL46.texture_buffer.texture_buffer_operations_ssbo_writes writes
to an SSBO in a compute program, then issues a memory-barrier, which
causes us to add a DC-flush. Then a second compute program samples
from the SSBO written by the first compute program.

Although we expected the DC-flush to make the writes available to the
second compute program, on MTL this wasn't the case. Adding the
"Untyped Data-Port Cache Flush" fixes this.

The PRM indicates that compute programs must set "Untyped Data-Port
Cache Flush" to flush some LSC writes when flushing HDC. Although we
are setting DC-flush, and not HDC-flush, it does appear that the
following reference might also apply to DC-flush.

In the Intel(R) Arc(tm) A-Series Graphics and Intel Data Center GPU
Flex Series Open-Source Programmer's Reference Manual, Vol 2a: Command
Reference: Instructions, PIPE_CONTROL, HDC Pipeline Flush (DWord 0,
Bit 9), there is a programming note:

> When the "Pipeline Select" mode is set to "GPGPU", the LSC Untyped
> L1 cache flush is controlled by "Untyped Data-Port Cache Flush" bit
> in the PIPE_CONTROL command.

Ref: bd8e8d204d ("iris: Add missing untyped data port flush on PIPELINE_SELECT")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176>
2023-06-27 20:56:28 +00:00
Jordan Justen
46e1a2b31e iris: Flush untyped dataport cache when HDC flush is requested on compute
In the Intel(R) Arc(tm) A-Series Graphics and Intel Data Center GPU
Flex Series Open-Source Programmer's Reference Manual, Vol 2a: Command
Reference: Instructions, PIPE_CONTROL, HDC Pipeline Flush (DWord 0,
Bit 9), there is a programming note:

> When the "Pipeline Select" mode is set to "GPGPU", the LSC Untyped
> L1 cache flush is controlled by "Untyped Data-Port Cache Flush" bit
> in the PIPE_CONTROL command.

Ref: bd8e8d204d ("iris: Add missing untyped data port flush on PIPELINE_SELECT")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176>
2023-06-27 20:56:28 +00:00
Yonggang Luo
a4f1c92688 ci: Testing -D shared-glapi=disabled with debian-clang-release
Acked-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23409>
2023-06-27 20:25:09 +00:00
Yonggang Luo
d5a09bf594 mapi: Hide OpenGL functions to be exported when shared-glapi is disabled
Fixes the following test error:
135/154 mesa:gallium / osmesa-symbols-check                                                                       FAIL             0.07s   exit status 1

```
src/gallium/targets/osmesa/libOSMesa.so.8.0.0: unknown symbol exported: glAreTexturesResidentEXT
src/gallium/targets/osmesa/libOSMesa.so.8.0.0: unknown symbol exported: glDeleteTexturesEXT
src/gallium/targets/osmesa/libOSMesa.so.8.0.0: unknown symbol exported: glGenTexturesEXT
src/gallium/targets/osmesa/libOSMesa.so.8.0.0: unknown symbol exported: glIsTextureEXT
```
The build options is:
```
-D glx=xlib -D gles1=disabled -D gles2=disabled -D shared-glapi=disabled
```

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23409>
2023-06-27 20:25:09 +00:00
Lionel Landwerlin
a8b8324494 intel/aubinator_error_decode: add ccs support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23867>
2023-06-27 19:59:06 +00:00
Lionel Landwerlin
16c12a9c3b genxml: enable decoding on compute engine
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23867>
2023-06-27 19:59:06 +00:00
Rhys Perry
79d935ceaf radv: use nir_opt_intrinsics
No fossil-db changes (navi21).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
2023-06-27 18:53:50 +00:00
Rhys Perry
8649bde78f nir/opt_intrinsic: optimize quad vote
Optimizes a quadAll()/quadAny() pattern created by dxil-spirv:
7adc87d4de

dxil-spirv can't use clustered reductions because they are not guaranteed
to include helper invocations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
2023-06-27 18:53:50 +00:00
Rhys Perry
58f8e0e2a0 nir,aco: add INCLUDE_HELPERS index to reduce intrinsic
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
2023-06-27 18:53:50 +00:00
Rhys Perry
c5fc89019b aco: include helpers in emit_uniform_{reduce,scan}
Found by inspection.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
2023-06-27 18:53:49 +00:00
Rhys Perry
48674a1799 nir/peephole_select: allow some invocation broadcast intrinsics
fossil-db (navi21):
Totals from 3 (0.00% of 133428) affected shaders:
Instrs: 2074 -> 2083 (+0.43%)
CodeSize: 10596 -> 10692 (+0.91%)
Latency: 75754 -> 75946 (+0.25%)
InvThroughput: 16900 -> 16975 (+0.44%)
Copies: 312 -> 309 (-0.96%)
Branches: 150 -> 132 (-12.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
2023-06-27 18:53:49 +00:00
Alyssa Rosenzweig
069cca9d66 treewide: Remove unused builders
-Wunused-variables kicks in now that it can see through the init.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23860>
2023-06-27 18:13:02 +00:00
Alyssa Rosenzweig
173b9ee69a treewide: Use nir_builder_create more
perl -p0e 's/nir_builder_init\(&([^,]*), /\1 = nir_builder_create(/g' -i $(git grep -l nir_builder_init)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23860>
2023-06-27 18:13:02 +00:00
Alyssa Rosenzweig
815efcdf7e nir: Use nir_builder_create
perl -p0e 's/nir_builder ([^;]*);\s*nir_builder_init\(&\1, /nir_builder \1 = nir_builder_create(/g' -i $(git grep -l nir_builder_init)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23860>
2023-06-27 18:13:02 +00:00
Alyssa Rosenzweig
e5410f9b00 nir: Add nir_builder_create returning nir_builder
More ergonomic.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23860>
2023-06-27 18:13:02 +00:00
Konstantin Seurer
ddb7cf7a25 nir/builder_opcodes: Remove nir_build_ prefixed helpers
This patch decreases the size of nir_builder_opcodes.h from 14292 loc to
13763 loc.

nir_build_ versions are still needed if the nir_ is a custom helper.
Intrinsics which need such a helper have to be added to
build_prefixed_intrinsics.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Konstantin Seurer
400645a565 nir: Use nir_ instead of nir_build_ helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Konstantin Seurer
083f7dba5b vtn: Use nir_ instead of nir_build_ helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Konstantin Seurer
707f92f248 freedreno: Use nir_ instead of nir_build_ helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Konstantin Seurer
8f3db26d14 intel: Use nir_ instead of nir_build_ helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Konstantin Seurer
afd81d5ace microsoft: Use nir_ instead of nir_build_ helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Konstantin Seurer
17f3f5fa85 amd: Use nir_ instead of nir_build_ helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
2023-06-27 17:37:54 +00:00
Alyssa Rosenzweig
c24b753378 nir/lower_blend: Optimize masked out RTs
While debugging KHR-GLES31.core.draw_buffers_indexed.color_masks, the noise from
piles of store_output(load_output) instructions got in the way. Optimize it out.

This does not fix the test, but if this case ever happened in a real app it
would improve performance. This is only load bearing on Asahi (and PanVK?),
since Panfrost wouldn't call nir_lower_blend at all in this case.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836>
2023-06-27 14:38:21 +00:00
Alyssa Rosenzweig
d4424950ac asahi: Use txf for background program
More straightforward (txf instead of tex, with integer coords). No discrernible
performance difference.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836>
2023-06-27 14:38:21 +00:00
Alyssa Rosenzweig
05adeb850b agx: Use nir_lower_frag_coord_to_pixel_coord
Instead of open-coding the logic.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836>
2023-06-27 14:38:21 +00:00
Alyssa Rosenzweig
abe5b06a99 pan/bi: Use lower_frag_coord_to_pixel_coord
Instead of vendoring the logic. This has a side benefit of letting NIR
optimize the generated code a bit.

total instructions in shared programs: 2687284 -> 2687281 (<.01%)
instructions in affected programs: 532 -> 529 (-0.56%)
helped: 3
HURT: 1
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 140711.33 -> 140711.31 (<.01%)
cycles in affected programs: 2.53 -> 2.52 (-0.62%)
helped: 1
HURT: 0

total fma in shared programs: 22059.44 -> 22059.39 (<.01%)
fma in affected programs: 2.69 -> 2.64 (-1.74%)
helped: 3
HURT: 0

total cvt in shared programs: 14659.09 -> 14659.09 (0.00%)
cvt in affected programs: 1.56 -> 1.56 (0.00%)
helped: 1
HURT: 1

total quadwords in shared programs: 1455408 -> 1455416 (<.01%)
quadwords in affected programs: 128 -> 136 (6.25%)
helped: 0
HURT: 1

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836>
2023-06-27 14:38:21 +00:00
Alyssa Rosenzweig
f318cab4a1 nir: Add lower_frag_coord_to_pixel_coord pass
We've open coded this in a few backends.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836>
2023-06-27 14:38:21 +00:00
Alyssa Rosenzweig
c7067660b2 nir: Add pixel_coord, frag_coord_zw intrinsics
On some architectures, gl_FragCoord.xy is available as an integer but
gl_FragCoord.zw requires interpolation. Add dedicated intrinsics so we can
lower it all in NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23836>
2023-06-27 14:38:21 +00:00
Mike Blumenkrantz
137e8d1cc4 ci: add a test-dozen-deqp flake
this times out regularly

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23876>
2023-06-27 14:00:19 +00:00
Samuel Pitoiset
9b00867327 radv/amdgpu: workaround a kernel bug when replacing sparse mappings
AMDGPU has a bug when clearing mappings for BOs that are always valid
in VM with OP_REPLACE.

See https://lists.freedesktop.org/archives/amd-gfx/2023-June/094648.html

The current workaround is to re-use OP_MAP/OP_UNMAP until all stable
kernels have the fix.

This partially reverts "radv/winsys: update sparse mappings with
OP_REPLACE instead of OP_MAP/OP_UNMAP".

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23741>
2023-06-27 13:13:03 +00:00
Samuel Pitoiset
51caece74c radv/amdgpu: skip adding per VM BOs for sparse during CS BO list build
This should be similar but it will help for re-introducing
OP_MAP/ON_UNMAP instead of OP_REPLACE.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23741>
2023-06-27 13:13:03 +00:00
Yonggang Luo
035e55f5ac mapi: Now _glapi_get_dispatch_table_size always equal to sizeof(struct _glapi_table) / sizeof(void *)
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23822>
2023-06-27 11:38:59 +00:00
Yonggang Luo
e72a879de0 mapi: Fixes compile error with build option "-D shared-glapi=disabled"
Fixes: 398a8d43dc ("mapi: Delete dynamic stub generation.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9245

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23822>
2023-06-27 11:38:59 +00:00
Karmjit Mahil
d53c751328 pvr: Change winsys flag defines to bitfields
Makes it easier to see which flags are set while debugging, and
prevent errors where the `BITFIELD_BIT()` is missing or using the
wrong flag for something.

Some fields have also been renamed to better fit with the naming
scheme around the code base.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23765>
2023-06-27 11:11:03 +00:00
Karmjit Mahil
4e6444af0b pvr: Fix missing BITFIELD_BIT for winsys frag job flag
On submission SPMSCRATCHBUFFER was acting like GET_VIS_RESULT +
DEPTH_BUFFER_PRESENT. This was causing hardware resets on barrier
stores as the depth buffer isn't actually present so the
store would be carried out to a NULL address.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23765>
2023-06-27 11:11:03 +00:00
Yonggang Luo
739ba18c79 util: include "util/compiler.h" instead of "pipe/p_compiler.h"
And pipe/p_compiler.h are removed as it not used any more

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:30 +08:00
Yonggang Luo
0d82c0a026 util: Merge p_compiler.h into src/util/compiler.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:30 +08:00
Yonggang Luo
b7b4e53404 treewide: style fixes after replace the usage of ubyte/ushort with uint8_t/uint16_t
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:30 +08:00
Yonggang Luo
e53915828f treewide: Replace the usage of ubyte/ushort with uint8_t/uint16_t
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:29 +08:00
Yonggang Luo
05b840521a treewide: Replace the usage of TRUE/FALSE with true/false
this is a separate patch as it's won't affect the code style

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:28 +08:00
Yonggang Luo
49e84fdad2 treewide: style fixes after replace usage of boolean to bool
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:28 +08:00
Yonggang Luo
7b45a0bd66 treewide: replace usage of boolean to bool
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:27 +08:00
Yonggang Luo
b65e745168 llvmpipe: altivec.h inclusion in -std=c++98..11 causes bool to be redefined
So we carefully include altivec.h in lp_setup_tri.c

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:27 +08:00
Yonggang Luo
07cb3c0e31 gallium/draw: Replace the usage of ushort to uint16_t in files that can not found by tools
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:26 +08:00
Yonggang Luo
542f00b5f1 hud: Use bool/true/false to replace boolean/TRUE/FALSE in hud/hud_context.c
auto tools can not find and replace
```
#define HUD_DEFAULT_VISIBILITY TRUE
```
So did the of this line manually,

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:26 +08:00
Erik Faye-Lund
e5aec68ce7 aux/indices: use stdint.h types
These generated sources uses older, less portable types such as ubyte,
ushort and uint. But we have stdint.h everywhere now, so let's use those
types instead.

To stay consistent, let's talk about UINT8 etc instead of UBYTE for the
entirety of the u_indices infrastructure.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23853>
2023-06-27 09:46:33 +00:00
Christian Gmeiner
96c99bc2d9 etnaviv: linker: add fallback lookup to VARYING_SLOT_BFC[n]
There are valid NIR shaders pairs where the vertex shader has
a VARYING_SLOT_BFC0 shader_out and the corresponding framgent
shader has a VARYING_SLOT_COL0 shader_in.
So at link time if there is no matching VARYING_SLOT_BFC[n],
we must map VARYING_SLOT_BFC0[n] to VARYING_SLOT_COL[n].

Example shader pair from 'spec@!opengl 2.0@vertex-program-two-side back':

shader: MESA_SHADER_VERTEX
source_sha1: {0xf916f77d, 0xffa6ab5e, 0x160976a7, 0xb59fe59c, 0x92e8f3f6}
name: GLSL3
internal: false
stage: 0
next_stage: 4
inputs_read: 0
outputs_written: 0,13
subgroup_size: 1
bit_sizes_float: 0x20
bit_sizes_int: 0x20
first_ubo_is_default_ubo: true
flrp_lowered: true
inputs: 1
outputs: 2
uniforms: 0
decl_var shader_in INTERP_MODE_NONE vec4 gl_Vertex (VERT_ATTRIB_POS.xyzw, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_Position (VARYING_SLOT_POS.xyzw, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_BackColor (VARYING_SLOT_BFC0.xyzw, 1, 0)
decl_function main (0 params)

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = deref_var &gl_Vertex (shader_in vec4)
        vec4 32 ssa_1 = intrinsic load_deref (ssa_0) (access=0)
        vec4 32 ssa_2 = load_const (0x00000000, 0x00000000, 0x3f000000, 0x00000000) = (0.000000, 0.000000, 0.500000, 0.000000)
        vec1 32 ssa_5 = deref_var &gl_BackColor (shader_out vec4)
        vec4 32 ssa_11 = mov ssa_2
        vec4 32 ssa_13 = fsat ssa_11
        intrinsic store_deref (ssa_5, ssa_13) (wrmask=xyzw, access=0)
        vec1 32 ssa_7 = deref_var &gl_Position (shader_out vec4)
        vec4 32 ssa_12 = mov ssa_1
        intrinsic store_deref (ssa_7, ssa_12) (wrmask=xyzw, access=0)
        /* succs: block_1 */
        block block_1:
}

shader: MESA_SHADER_FRAGMENT
source_sha1: {0x5059da66, 0x00c609e5, 0x5329c39a, 0x13e2fc88, 0x8e68cb71}
name: GLSL3
internal: false
stage: 4
next_stage: 4
inputs_read: 1
outputs_written: 2
subgroup_size: 1
first_ubo_is_default_ubo: true
flrp_lowered: true
inputs: 1
outputs: 1
uniforms: 0
decl_var shader_in INTERP_MODE_NONE vec4 gl_Color (VARYING_SLOT_COL0.xyzw, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR.xyzw, 0, 0)
decl_function main (0 params)

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = deref_var &gl_Color (shader_in vec4)
        vec4 32 ssa_1 = intrinsic load_deref (ssa_0) (access=0)
        vec1 32 ssa_2 = deref_var &gl_FragColor (shader_out vec4)
        intrinsic store_deref (ssa_2, ssa_1) (wrmask=xyzw, access=0)
        /* succs: block_1 */
        block block_1:
}

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23850>
2023-06-27 09:26:40 +00:00
Christian Gmeiner
f9e6069959 etnaviv: nir: call nir_remove_dead_variables(..) before linking setup
There are cases where there is a chain to an unused nir variable that get removed
by nir_opt_dce. This breaks our current linker as the variable can still be accessed
via nir_foreach_shader_in_variable(..) macro.

So lets call nir_remove_dead_variables(..) just before we setup our linking.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23673>
2023-06-27 09:10:17 +00:00
Christian Gmeiner
5f9ac20116 ir3/analyze_ubo_ranges: Move IR3_DBG_NOUBOOPT check
There is no need to walk the hole nir shader if IR3_DBG_NOUBOOPT
is used.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23854>
2023-06-27 08:19:10 +00:00
Iago Toral Quiroga
03ad1d5ab6 v3dv: don't use the TLB path if we might be copying partial tiles
With TLB paths we are always storing full tiles, so we can't use it
if the regions we store are not a multiple of the tile size (or the
full image).

Unfortunately, at the point we call this we don't usually have the
tile size yet so for now we skip the path if we are not copying
full mip levels.

Fixes various CTS fails in:
dEQP-VK.ycbcr.copy.*.optimal*buffer_optimal*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23739>
2023-06-27 09:04:20 +02:00
Iago Toral Quiroga
cec030a233 v3dv: fix slice size for miplevels >= 2
We want to store the slice size in pixels not the level size
after padding to a power of 2 we use miplevels >= 2.

Fixes: 1cb2d2a5ee ('v3dv: store slice dimensions in pixels')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23739>
2023-06-27 09:04:20 +02:00
Konstantin Seurer
107d29765b docs: Update envvars used for tracing
Updates the environment variables reference to document the new common
tracing infrastructure.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
b0beca8c7a vulkan/rmv,radv: Use common trace trigger
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
e0641ed59f radv/rgp: Use common trace trigger
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
3e11640127 radv/rra: Use common trace trigger
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
291fa05545 vulkan/wsi/x11: Capture traces using a hotkey
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
15d6618a12 radv: Add radv_trace_mode
...and add the RADV specific trace modes to the VK instance.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
70489edce4 vulkan: Common trace capturing infrastructure
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
3b83a60c95 meson: Add a xcb-keysyms dependency
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20573>
2023-06-27 06:25:56 +00:00
Konstantin Seurer
7a7b1a4f71 radv: Call radv_pipeline_init_scratch per shader
Compute pipelines only have one shader, which was not handled correctly
in the case of ray tracing pipelines. Adding radv_shader as an argument
allows us to handle the ray tracing prolog. The original loop is inlined
into its only user (radv_pipeline_graphics.c).

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23812>
2023-06-27 06:04:18 +00:00
Sagar Ghuge
957d7644aa intel/ds: Track CCS cache flush bit
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 16:08:20 -07:00
Sagar Ghuge
5a272b5ed8 iris: implement recommended flush/wait of AUX-TT invalidation
This patch implements the recommended flush/wait of AUX-TT invalidation
according to per command streamer (engine).

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 16:08:15 -07:00
Sagar Ghuge
6be75d8aa2 iris: Fix AUX-TT invalidation
In order to make sure RCS engine is idle, we need to add
DC flush + CS stall + Render target Cache flush + Depth Cache
on Gfx 12 and additional CCS cache flush on Gfx12.5.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Sagar Ghuge
26a7e997fb iris: Add CCS cache flush bits
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Sagar Ghuge
e88eac5b6c anv: implement recommended flush/wait of AUX-TT invalidation on compute
This patch implements the recommended flush/wait of AUX-TT invalidation
for compute/render command streamer.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Sagar Ghuge
012ff791fb anv: Fix AUX-TT invalidation
In order to make sure RCS engine is idle, we need to add
DC flush + CS stall + Render target Cache flush + Depth Cache
on Gfx 12 and additional CCS cache flush on Gfx12.5.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Sagar Ghuge
0b42a6c3b5 anv: Add CCS cache flush bits to anv_pipe_bits
This will help us to flush the entries out of the CCS cache.

v2:
- Move enum value close to HW bits section (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Sagar Ghuge
f592727130 intel/genxml: Add Compute/Blitter CCS aux invalidation register
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Sagar Ghuge
55d9959e67 intel/genxml: Add CCS cache flush field to PIPE_CONTROL
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
2023-06-26 15:57:39 -07:00
Juan A. Suarez Romero
99502b42b4 vc4/v3d/ci: update expected results
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23862>
2023-06-26 18:44:16 +02:00
Vitaliy Triang3l Kuzmin
f9e6d35f65 radv: Enable VK_EXT_fragment_shader_interlock
ACO only currently - not available in LLVM.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
8a8f2edd50 zink/ci: Add broken fragment shader interlock test to RADV flakes
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
ec0778f59e radv: Disable VRS forcing with Primitive Ordered Pixel Shading
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
787a553262 radv: Apply the POPS missed overlap hardware bug workaround
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
647952c8e3 ac/gpu_info: Check whether the device has the POPS missed overlap bug
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
3831860b20 radv: Handle Primitive Ordered Pixel Shading in DB_SHADER_CONTROL
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
37e325fe15 radv: Enable the null export workaround with POPS
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
7eabc5d6fc radv: Enable POPS collision wave ID shader argument
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
50e680d05a radv: Declare POPS collision wave ID shader argument
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
1812819e66 radv: Ensure 1x1 shading rate on GFX10.3 with interlock execution mode
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
08c582ea69 radv: Detect the use of Primitive Ordered Pixel Shading
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
5449a2c988 radv: Remove unconditional POPS_DRAIN_PS_ON_OVERLAP setting
This hardware hang workaround (PAL waMiscPopsMissedOverlap) is needed only
on some Vega chips, and only for 8 or more samples per pixel. It has a
significant performance cost (around 1.5x-2x in
nvpro-samples/vk_order_independent_transparency), so it should be precisely
configured when setting up Primitive Ordered Pixel Shading.

It was added in 47b780be21, when POPS was not
used in Mesa, with the change being described as "this may not be needed
yet, but let's set it now".

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
266ad83acd radeonsi: Remove unconditional POPS_DRAIN_PS_ON_OVERLAP setting
This hardware hang workaround (PAL waMiscPopsMissedOverlap) is needed only
on some Vega chips, and only for 8 or more samples per pixel. It has a
significant performance cost (around 1.5x-2x in
nvpro-samples/vk_order_independent_transparency), so it should be precisely
configured when setting up Primitive Ordered Pixel Shading.

It was added in 47b780be21, when POPS was not
used in Mesa, with the change being described as "this may not be needed
yet, but let's set it now".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
dda425df09 aco: Implement fragment shader interlock intrinsics
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
e0f4b52559 aco: Add Primitive Ordered Pixel Shading waitcnt rules
When letting the overlapping waves enter their ordered sections, there must
be no memory accesses to resources which need primitive-ordered access that
are still pending, or there would be a race between the current wave and
the overlapping waves.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
a87628cd08 aco: Send MSG_ORDERED_PS_DONE where necessary
If the wave has set the Primitive Ordered Pixel Shading packer ID hardware
register, it must send MSG_ORDERED_PS_DONE once before the program ends.
It's also safe to send the message if the packer ID register hasn't been
set yet, therefore the message may be sent conservatively. For simplicity,
to ensure that it's sent on all execution paths after setting the packer ID
register, always sending it from a top-level block. This is required for
GFX9-10.3 POPS.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
2194e8bd82 aco: Add Primitive Ordered Pixel Shading scheduling rules
Implementing the acquire/release semantics of fragment shader interlock
ordered section in Vulkan, and preventing reordering of memory accesses
requiring primitive ordering out of the ordered section.

Also, the ordered section should be as short as possible, so not reordering
the instructions awaiting overlapped waves upwards, and the exit from the
ordered section downwards.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
6082e126eb aco: Skip waitcnt insertion in the discard early exit block
Waits are needed for early exits from inside a Primitive Ordered Pixel
Shading ordered section, but that code doesn't insert them reliably anyway
because it doesn't obtain the counters for the exact locations of the
jumps, which may be anywhere inside the predecessor blocks.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
f8e744f07f aco: Add Primitive Ordered Pixel Shading pseudo-instructions
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
94d2888da2 aco: Add s_wait_event argument bit definitions
A wait for export_ready (if the corresponding bit is not set in the
instruction) is done to enter the Primitive Ordered Pixel Shading ordered
section on GFX11.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
b892f31e4d ac: Define POPS collision wave ID argument SGPR
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:03 +00:00
Vitaliy Triang3l Kuzmin
308a5ea43a aco: Support pops_exiting_wave_id PhysReg usage
pops_exiting_wave_id is a volatile ALU source operand containing the ID of
the latest wave that hasn't exited yet, for comparing with the newest
overlapped wave ID in overlapping waves.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:03 +00:00
Vitaliy Triang3l Kuzmin
90c88f5933 ac/nir: Support Primitive Ordered Pixel Shading in lower_ps
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:03 +00:00
Vitaliy Triang3l Kuzmin
365d342ee6 docs/amd: Document Primitive Ordered Pixel Shading
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:03 +00:00
Alyssa Rosenzweig
fadcd8d371 gallivm: Use NIR_PASS macros
These run nir_validate in debug builds, which will avoid bugs slipping in. It's
not enough that llvmpipe doesn't mind illegal NIR, these passes are well within
their rights to fail spectacularly if the NIR wouldn't validate. So validate so
we catch issues early.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23804>
2023-06-26 08:22:42 -04:00
Alyssa Rosenzweig
6689c678fe nir/lower_locals_to_regs: Add bool bitsize knob
GLSL booleans (and hence bool derefs) may be translated either as 1-bit or
32-bit NIR registers, depending whether the backend uses nir_lower_bool_to_int32
or not. Add a knob for this and choose the right type for different backends.

Fixes nir_validate failure on
dEQP-VK.subgroups.ballot_broadcast.graphics.subgroupbroadcast_bvec3 run under
lavapipe. That test indexes into a bvec3 array, and gallivm first lowers bools
and then lowers derefs to registers, resulting in random 1-bit booleans mixed in
with 32-bit bools.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23804>
2023-06-26 08:22:06 -04:00
Alyssa Rosenzweig
5c8f21412f nir/lower_bool_to_int32: Fix progress reporting
If we only lower parameters, that's still progress. Technically.

Fixes: 6a29cb2654 ("nir/lower_bool_to_int32: add support for lowering functions.")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23804>
2023-06-26 08:22:03 -04:00
Dr. David Alan Gilbert
8887be6206 rusticl/api: Wire up CL_DEVICE_PROFILING_TIMER_RESOLUTION
Wire up the CL_DEVICE_PROFILING_TIMER_RESOLUTION from the PIPE_CAP.
While here, also set CL_PLATFORM_HOST_TIMER_RESOLUTION to 1;
that's bogus since we're using the same value as for device, but
at this point we don't have a device to ask.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23639>
2023-06-26 10:00:47 +00:00
Dr. David Alan Gilbert
1bb523111b rusticl/api: Implement get_{device_and_}host_timer
Use the get_timestamp as both the device_timestamp in
get_device_and_host_timer and host_timestamp in that
and get_host_timer.

Having eliminited most other clock sources, discussions
on previous versions have concluded it's best to use the
same timer as the 'host_timestamp' since the main requirements
are that it must be one that's a time seen by the device and
that it's very closely coupled.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23639>
2023-06-26 10:00:47 +00:00
Dr. David Alan Gilbert
2a41b1869f rusticl/device: Stash timestamp availability
Check if the device claims to have timestamps and a valid resolution
and stash it in the device.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23639>
2023-06-26 10:00:47 +00:00
Dr. David Alan Gilbert
748a1b357d rusticl/screen: Wrap get_timestamp
Add a wrapper on our screen type to call get_timestamp.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23639>
2023-06-26 10:00:47 +00:00
Erik Faye-Lund
9486b9e785 draw: use unsigned instead of uint
uint isn't a standard type, just something we accidentally get from some
other headers.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
65591a3b25 draw: match type of pipe_draw_start_count_bias::count
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
b108e47091 cso: use unsigned instead of uint
uint isn't a standard type, just something we accidentally get from some
other headers.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
fda6cad85e draw: use stdint.h types
Here, we want explicitly sized types, not just types that happen to be
of the right size.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
f4bd2d35cb draw: track vertices and vertex_ptr as byte-pointers
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
ed4bda8044 draw: use enum for primitive-type
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
1569507e26 draw: use uint32_t instead of uint
In these cases we actually want uint32_t, because we're doing 32-bit
things to them.

The hwinfo-bit is only being used by i915, and should probably be
moved to i915 instead. But it shoukd *also* be converted, so let's do
that now.

While we're at it, fixup the bit-setting as well.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
57abc7d037 draw: use enum for tgsi-semantic
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Erik Faye-Lund
4844809edb cso: use enum for render-conditions
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23833>
2023-06-26 09:30:22 +00:00
Samuel Pitoiset
82e2802b7d radv/amdgpu: add a helper to get a new IB
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:10 +00:00
Samuel Pitoiset
148f42be1d radv/amdgpu: rename old_ib_buffers to ib_buffers
No need to prefix with 'old' actually because this is just an array
of IB buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:10 +00:00
Samuel Pitoiset
d74de65069 radv/amdgpu: use cs_finalize() when growing a CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:10 +00:00
Samuel Pitoiset
437456b47c radv/amdgpu: use the array of IB buffers for the chained IB path
For executing IB on the compute queue (ie. IB2 isn't supported), we
will need to break chaining, this is a first step towards this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:10 +00:00
Samuel Pitoiset
81e308df72 radv/amdgpu: do not set the IB size when ending a CS with RADV_DEBUG=noibs
This was only necessary for preambles/postambles, let's clarify this
by determining the IB info from the first IB in the array instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:10 +00:00
Samuel Pitoiset
df0c742543 radv/amdgpu: rework growing a CS with the chained IB path slightly
This should allow us to use cs_finalize().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:09 +00:00
Samuel Pitoiset
c11a62a7b0 radv/amdgpu: use the correct IB size when growing a CS with RADV_DEBUG=noibs
The current IB size is copied when radv_amdgpu_cs_add_old_ib_buffer()
is called, which might not be the real IB size because we might still
pad the CS with NOP packets after.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:09 +00:00
Matt Coster
91143f45b8 pvr: Advance entry pointer in pvr_setup_vertex_buffers()
Fixes: dEQP-VK.robustness.robustness1_vertex_access
  .out_of_bounds_stride_0
  .out_of_bounds_stride_16_single_buffer
  .out_of_bounds_stride_30_middle_of_buffer
  .out_of_bounds_stride_8_middle_of_buffer_separate

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23834>
2023-06-26 08:40:13 +00:00
Corentin Noël
bc2828a436 compiler: Allow the explicit_stride of aoa types to be zero
The explicit stride doesn't have to be defined to aoa and therefore can be
zero in some cases, like in arrays of arrays of uniform blocks.

Resolves crash with spec@arb_gl_spirv@execution@ubo@aoa-2.shader_test piglit test for virgl.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23648>
2023-06-26 09:19:43 +02:00
Hyunjun Ko
9f4299d6b2 anv: fix to set predicted weight tables correctly.
Fixes: 8d519eb5f ("anv: add initial video decode support for h265")
Closes: mesa/mesa#9214

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23790>
2023-06-26 15:08:05 +09:00
Hyunjun Ko
b8dc7675f2 intel/genxml: changes the type for predicted weight to unsigned.
Turned out to be unsigned here after some experiments.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23790>
2023-06-26 15:08:00 +09:00
Hyunjun Ko
e2f95ad296 vulkan/video: keep delta weight and offsets of predicted weight tables in h265 slice parsing
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23790>
2023-06-26 15:07:53 +09:00
Caio Oliveira
c421ecea56 vulkan: Update XML and headers to 1.3.255
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23837>
2023-06-25 15:52:55 +00:00
Caio Oliveira
73af0475cb vulkan: Add NV suffix to VK_NV_cooperative_matrix feature names
In the new Vulkan Headers, VK_KHR_cooperative_matrix gets added and the feature
names are the same.

Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23837>
2023-06-25 15:52:55 +00:00
Karol Herbst
0759759658 rusticl/program: skip linking compiled binaries
Applications can do their own caching, but are in any case required to
properly "compiler" the binaries via clBuildProgram or clCompileProgram +
clLinkPrograms.

In any case, there is no point building something if we already have the
result.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23847>
2023-06-25 11:15:17 +02:00
Karol Herbst
18f1087a21 rusticl: bump bindgen requirement
Apparently on some ARM systems any older bindgen version crashes.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23840>
2023-06-24 15:37:18 +00:00
Yonggang Luo
5b29463746 nir: Add function nir_function_set_impl
This function is added for create strong relationship between
nir_function_impl and nir_function.

So that nir_function->impl->function == nir_function is always true when
(nir_function->impl != NULL && nir_function->impl != NIR_SERIALIZE_FUNC_HAS_IMPL)

And indeed this invariant is already done in functions validate_function and validate_function_impl
of nir_validate

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23820>
2023-06-24 14:48:47 +00:00
Yonggang Luo
9fa38cf142 vtn: Do not assign main_entry_point->impl twice
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23820>
2023-06-24 14:48:47 +00:00
Yonggang Luo
0d9f474381 draw: Update the comment and function name to match the type
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23845>
2023-06-24 20:52:56 +08:00
Yonggang Luo
e7f0dd2710 draw: Replace usage of ubyte/ushort/uint with uint8_t/uint16_t/uint32_t in draw_pt_vsplit.c
This can not be done with tools, so do it manually

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23845>
2023-06-24 20:52:53 +08:00
Yonggang Luo
f35ebd221f draw: Replace usage of boolean/TRUE/FALSE with bool/true/false in draw_pt_vsplit*
These change can not be done with tools, so do it manually

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23845>
2023-06-24 20:52:49 +08:00
Karol Herbst
fbe9a7ca3e rusticl/mesa: create proper build-id hash for the disk cache
Without generating a proper timestamp for the disk cache, we pull old
binaries out of the disk cache, potentially being buggy or simply
outdated.

Once meson 1.2 lands we can easily pull in LLVM functions.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21612>
2023-06-24 12:36:36 +00:00
Karol Herbst
29b932512a rusticl/meson: extract common bindgen rust args
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21612>
2023-06-24 12:36:36 +00:00
Karol Herbst
c896373889 rusticl: generate bindings for build-id stuff
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21612>
2023-06-24 12:36:36 +00:00
Karol Herbst
d14af00432 rusticl: structurize and reorder mesa binding args
It became quite a mess, I had enough 🙃

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21612>
2023-06-24 12:36:36 +00:00
Eric Engestrom
337908440e v3dv: replace boolean and uint with bool and size_t
There's no reason to use the gallium `p_compiler.h` types in vulkan code.

Inspired by https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577,
but using `size_t` for `ulist_data_size` because its two users are
`blob_read_bytes()` and `memcpy()`, both of which expect a `size_t`.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23795>
2023-06-24 12:21:09 +00:00
Eric Engestrom
fa8a232691 docs/coding-style: add pre-commit hook fallback for clang-format
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23722>
2023-06-24 12:04:15 +00:00
Eric Engestrom
270d898e75 docs/coding-style: add example emacs config for clang-format
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23722>
2023-06-24 12:04:14 +00:00
Eric Engestrom
342196f7b0 docs/coding-style: add example vim config for clang-format
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23722>
2023-06-24 12:04:14 +00:00
Pavel Ondračka
89873e5e5c r300: properly count maximum used register index
The problem is when we have DP2 or DP3 instruction that writes a w
channel like here:

DP3 temp[148].w, -temp[147].xyz_, temp[57].xyz_;

will get pair-converted to

src0.xyz = temp[147], src1.xyz = temp[57]
DP3, -src0.xyz, src1.xyz
DP3 temp[148].w, -src0._, src0._

where the alpha instruction is a basically just a replicate of the
result from the RGB sub intruction. However the destination register
index in the RBG slot is also 148. Now we pair-schedule and regalloc

src0.xyz = temp[13], src1.xyz = temp[3]
DP3, -src0.xyz, src1.xyz
DP3 temp[3].w, -src0._, src0._

We properly regalloc the alpha channel, but we obviously skip the rgb,
because the writemask is empty there. However when we emit the shader
later, we actually check the number of used regs based on the maximum
used register index and we don't consider the writemasks, so we would
think we use 149 temps. AFAIK the shader would be still completelly OK.
But we would think it hits the HW limits and used a dummy one instead.

Fix this by checking for empty writemasks when marking the registers as
used.

GAINED: shaders/glmark/1-22.shader_test FS

This is also needed to prevent another lost Trine shader from
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23838>
2023-06-24 11:30:47 +00:00
Matt Turner
561cce32f1 anv: Only expose video decode bits with KHR_video_decode_queue
This fixes dEQP-VK.api.info.format_properties.g8_b8r8_2plane_420_unorm
in combination with the CTS fix from
https://gerrit.khronos.org/c/vk-gl-cts/+/12191

Fixes: 9361481780 ("anv: add video format features for the one supported video output format")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8263
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23776>
2023-06-24 02:54:37 +00:00
Matt Turner
727335045d anv: Pipe anv_physical_device to anv_get_image_format_features2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23776>
2023-06-24 02:54:37 +00:00
Karol Herbst
02aaf58908 nv50/ir/nir: set numBarriers if we emit an OP_BAR
Even though the field is called `numBarriers` we set it to 1 just like
we do with TGSI. It's unknown on what's the proper behavior here is. But
without this set the GPU will complain to us loudly, so this silences at
least that.

Fixes: a2d7a4f978 ("nv50/ir: convert to scoped_barrier")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23749>
2023-06-24 02:12:14 +00:00
Karol Herbst
69c452781b nvc0: fix printing shaders
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23749>
2023-06-24 02:12:14 +00:00
Karol Herbst
45d86b419b rusticl/program: add debugging option to disable SPIR-V validation
This is useful for running applications known to pass in invalid SPIR-V.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23818>
2023-06-24 01:52:07 +00:00
Karol Herbst
2b2a513890 rusticl/program: add debugging for OpenCL C compilation
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23818>
2023-06-24 01:52:07 +00:00
Karol Herbst
2362fd502b docs: document CLC_DEBUG
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23818>
2023-06-24 01:52:07 +00:00
Kenneth Graunke
1b3669a1ed intel: Initialize FF_MODE2 on all Gfx12 platforms
On Alchemist, the FF_MODE2 documentation says that we must set the
FF_MODE2 timer values for GS and HS to 224.  The hardware performance
tuning guide also recommends setting the TDS timer to 4.

On Tigerlake, i915 applies workarounds to set the GS timer to 224
(failing to do so can cause HS/DS unit hangs), and the TDS timer to 4
(for performance).  It doesn't currently apply a HS timer there, and
I'm not sure if it's strictly necessary, but given that Alchemist
needed it, and the other two settings matched, let's assume that it
ought to match as well.

Unfortunately, there has been a bug in the i915 workarounds
infrastructure for non-masked context registers where writing one
field of the register zeroes out all the others.  So, I believe the
Tigerlake TDS timer value of 4 isn't being applied correctly there,
though the register is also not readable on that platform which
makes it hard to verify.  So, this may also speed up tessellation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9233
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23839>
2023-06-24 01:20:36 +00:00
Francisco Jerez
427fee3507 intel/gfx12.5: Enable L3 partial write merging for compressible surfaces among other cases.
This enables L3 partial write merging for a number of cases that seem
to be getting accidentally disabled by the kernel, which was causing a
serious performance bottleneck on DG2 and MTL platforms.  The
"Compressible Partial Write Merge Enable", "Coherent Partial Write
Merge Enable" and "Cross-Tile Partial Write Merge Enable" bits in
L3SQCREG5 were expected to be enabled by default (and confusingly,
they even read off as enabled if you ran 'intel_reg read 0xb158' on an
idle system), but they are getting clobbered during 3D context
initialization by an i915 workaround.

Enabling L3 partial write merging of compressible surfaces in
particular seems to increase rendering fillrate by over 3x in some
cases (e.g. the
"VulkanFillRate/FillRateGPU/resolution:1[0-3]/format:*/blend:0"
fillrate-bound microbenchmarks).  Significant improvements can also be
reproduced in most real-world workloads we've tested so far,
e.g. Counter Strike GO improves by ~11%, Shadow Of the Tomb Raider
improves by ~5.5%, and AztecRuins-VK improves by ~6.5% on DG2-512 --
Thanks a lot to Caleb Callaway for these figures.  No regressions have
been observed so far.

Even though this patch might strike as surprisingly simple for such a
large payoff, it's the result of Felix DeGrood and I trying to
root-cause the rendering performance gap of DG2 on Linux vs Windows on
and off during the last year, and some of the OA statistics captured
by Felix early this month were greatly helpful for me to connect the
last few dots, so Felix deserves a big chunk of the credit for this
work.

Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23783>
2023-06-23 21:24:27 +00:00
David Heidelberg
d7ec6f1724 ci/fastboot: use gzipped Image to avoid compressing on the runner
Faster download, one less step. Win-win.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23816>
2023-06-23 20:47:53 +00:00
Thong Thai
7d3c29dc60 frontends/va: fix some coverity scan reported issues
Added some checks for NULL pointer dereferencing and loop bounds.
v2: Use ARRAY_SIZE instead of magic numbers (@jenatali)

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23598>
2023-06-23 20:31:21 +00:00
Caio Oliveira
dc93f205c1 meson: Explicitly add "check : false" to a couple instances of run_command
In both cases there's code right after the execution to check the result and
give a proper message.

This gets rid of meson warning

```
WARNING: You should add the boolean check kwarg to the run_command call.
         It currently defaults to false,
         but it will default to true in future releases of meson.
         See also: https://github.com/mesonbuild/meson/issues/9300
```

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23821>
2023-06-23 18:57:31 +00:00
Rhys Perry
d3e5e04a75 amd/drm-shim: use fixed-width types
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9221
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23725>
2023-06-23 18:35:52 +00:00
Alyssa Rosenzweig
766535c867 agx: Implement vector live range splitting
The SSA killer feature is that, under an "optimal" allocator, the number of
registers used (register demand) is *equal* to the number of registers required
(register pressure, the maximum number of variables simultaneously live at any
point in the program). I put "optimal" in scare quotes, because we don't need to
use the exact minimum number of registers as long as we don't sacrifice thread
count or introduce spilling, and using a few extra registers when possible can
help coalesce moves. Details-shmetails.

The problem is that, prior to this commit, our register allocator was not
well-behaved in certain circumstances, and would require an arbitrarily large
number of registers. In particular, since different variables have different
sizes and require contiguous allocation, in large programs the register file may
become fragmented, causing the RA to use arbitrarily many registers despite
having lots of registers free.

The solution is vector live range splitting. First, we calculate the register
pressure (the minimum number of registers that it is theoretically possible to
allocate successfully), and round up to the maximum number of registers we will
actually use (to give some wiggle room to coalesce moves). Then, we will treat
this maximum as a *bound*, requiring that we don't use more registers than
chosen. In the event that register file fragmentation prevents us from finding a
contiguous sequence of registers to allocate a variable, rather than giving up
or using registers we don't have, we shuffle the register file around
(defragmenting it) to make room for the new variable. That lets us use a
few moves to avoid sacrificing thread count or introducing spilling, which is
usually a great choice.

Android GLES3.1 shader-db results are as expected: some noise / small
regressions for instruction count, but a bunch of shaders with improved thread
count. The massive increase in register demand may seem weird, but this is the
RA doing exactly what it's supposed to: using more registers if and only if they
would not hurt thread count. Notice that no programs whatsoever are hurt for
thread count, which is the salient part.

   total instructions in shared programs: 1781473 -> 1781574 (<.01%)
   instructions in affected programs: 276268 -> 276369 (0.04%)
   helped: 1074
   HURT: 463
   Inconclusive result (value mean confidence interval includes 0).

   total bytes in shared programs: 12196640 -> 12201670 (0.04%)
   bytes in affected programs: 1987322 -> 1992352 (0.25%)
   helped: 1060
   HURT: 513
   Bytes are HURT.

   total halfregs in shared programs: 488755 -> 529651 (8.37%)
   halfregs in affected programs: 295651 -> 336547 (13.83%)
   helped: 358
   HURT: 9737
   Halfregs are HURT.

   total threads in shared programs: 18875008 -> 18885440 (0.06%)
   threads in affected programs: 64576 -> 75008 (16.15%)
   helped: 82
   HURT: 0
   Threads are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
72e6b683f3 agx/lower_parallel_copy: Lower 64-bit copies
To 32-bit. This way we don't get into bad situations where we need to eg swap
unaligned 64-bit values or something funny like that.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
bfdaab6512 agx: Validate predecessor information
Including the new loop header? flag.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
923b966775 agx: Add loop header? flag
This is useful for deciding whether we need to fix up phis in RA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
a2dbe6b688 agx: Recollect stored vectors at their use
This is Timur's cheesy solution to split-hell.shader_test. Seems to work ok
here.

Before: 94 inst, 588 bytes, 165 halfregs, 1 threads, 0 loops, 0:0 spills:fills
After: 63 inst, 454 bytes, 129 halfregs, 1 threads, 0 loops, 0:0 spills:fills

On Android GLES3.1 shader-db, a few shaders are helped a lot:

   total instructions in shared programs: 1781706 -> 1781473 (-0.01%)
   instructions in affected programs: 4284 -> 4051 (-5.44%)
   helped: 16
   HURT: 2
   Instructions are helped.

   total bytes in shared programs: 12197854 -> 12196640 (<.01%)
   bytes in affected programs: 29526 -> 28312 (-4.11%)
   helped: 20
   HURT: 2
   Bytes are helped.

   total halfregs in shared programs: 489007 -> 488755 (-0.05%)
   halfregs in affected programs: 945 -> 693 (-26.67%)
   helped: 7
   HURT: 0
   Halfregs are helped.

   total threads in shared programs: 18873216 -> 18875008 (<.01%)
   threads in affected programs: 5376 -> 7168 (33.33%)
   helped: 7
   HURT: 0
   Threads are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
91d98975a6 agx: Extract coordinate register size calculation
It will be used for image writes too, not just reads.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Asahi Lina
eef7fff852 asahi: Pass through surface sample count
This makes PIPE_CAP_SURFACE_SAMPLE_COUNT do something, namely, explode
with lots of fireworks. We'll have to figure out what's wrong, but at
least now we aren't just not trying at all. Should not break anything as
long as PIPE_CAP_SURFACE_SAMPLE_COUNT is not flipped on.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Asahi Lina
87bbaf680a asahi: Disable PIPE_CAP_SURFACE_SAMPLE_COUNT
This never worked, disable it.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Asahi Lina
af895692b3 asahi: Revert "Advertise ARB_texture_barrier"
This reverts commit 9e67d3f237.

We do not, in fact, implement texture barriers. Texture barriers are
supposed to allow non-overlapping rendering feedback loops. We cannot
support that at non-tile boundaries when texture compression is enabled
without some kind of downgrade path or other special handling.

Fixes Emacs corruption on X/Glamor.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
b5fccfa197 agx: Fix discards
Switch our frontends from generating sample_mask_agx to discard_agx, and
switching from legalizing sample_mask_agx to lowering discard_agx to
sample_mask_agx. This is a much easier problem and is done here in a way that is
simple (and inefficient) but obviously correct.

This should fix corruption in Darwinia.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
baf67144bd agx: Update explanation of sample_mask behaviour
We discovered today that these (probably) trigger depth/stencil testing, which
has significant implications for the correct/performant use.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Alyssa Rosenzweig
942c206cd1 nir: Add discard_agx intrinsic
sample_mask_agx corresponds directly to the hardware's 2-source instruction, but
it's hard to use correctly and even harder to legalize after the fact, since
it's responsible for not only discard but also late depth/stencil testing. For
our various high-level lowering passes, it's easier to use a one-source discard
(where we don't have to worry about sample masks), which the compiler will
internally lower to the two-source instruction. Introduce such an instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23832>
2023-06-23 17:37:41 +00:00
Samuel Pitoiset
0f8864e047 radv: adjust alignment of the preprocess buffer with DGC
The preprocess buffer is the buffer used to generate the cmdbuf. It
was aligned to 256 bytes but the correct alignment is actually
ac_gpu_info::ib_alignment.

Otherwise, if a DGC IB is executed like a IB1, this hits an assertion
in radv_amdgpu_cs_submit() because the alignment is incorrect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23764>
2023-06-23 17:17:08 +00:00
Samuel Pitoiset
06cdf222a6 radv: only dirty the active push constant stages with DGC
It's unnecessary to dirty all stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23761>
2023-06-23 16:56:44 +00:00
Samuel Pitoiset
3b329e195e radv: only dirty the index type when necessary with DGC
This should only be needed for non-indexed draws and it's already
dirty if the DGC binds an index buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23761>
2023-06-23 16:56:44 +00:00
Samuel Pitoiset
2d97cc89fb radv/amdgpu: dump all cs with RADV_DEBUG=noibs
It was only dumping the oldest.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23646>
2023-06-23 16:35:22 +00:00
Samuel Pitoiset
8af705a856 radv/amdgpu: fix dumping cs with RADV_DEBUG=noibs
The ib_buffer is NULL now.

Fixes: 50e6b16855 ("radv/amdgpu: Use fallback submit for queues that can't use IBs.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23646>
2023-06-23 16:35:21 +00:00
Matt Coster
a1e2e01f62 pvr: Correctly read dynamic state setup during blend constant setup
Somewhat counterintuitively, dynamic_state.set contains the bits that
have been loaded from static state, i.e. those that are _not_ dynamic.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23590>
2023-06-23 15:38:43 +00:00
Boyuan Zhang
036d3dc066 radeonsi: disable H264HIGH10 profile
Issue: H.264 high 10 profile is currently not supported, but is shown as
supported in vainfo.

Reason: Kernel reported capabilities for video encoder/decode doesn't
consider the actual profile (only using reduced profile).

Solution: Use kernel reported capabilities only for basic H.264/HEVC
profiles. Other profiles (e.g. 10 bits) should be checked based on HW.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9242

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23824>
2023-06-23 14:11:33 +00:00
Samuel Pitoiset
ae7721d163 radv: reserve more space in CS for SQTT
Otherwise, it can hit an assertion.

Fixes: 7893040f80 ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23826>
2023-06-23 13:51:13 +00:00
Alyssa Rosenzweig
bbdbab15fc aco: Drop NIR parallel copy handling
Backends never see these instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23831>
2023-06-23 13:25:22 +00:00
Timur Kristóf
3b21c59fc3 aco: Remove unneeded stage related info fields.
Cleanup of various fields with redundant information.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:05 +00:00
Timur Kristóf
bc971ba2c7 aco: Use aco_shader_info::hw_stage instead of guessing.
With this change, ACO is going to rely on the caller to set
the HW stage and will no longer guess it from the input shaders.

This will help enable compiling merged shaders separately,
but that will need further changes in instruction selection.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:05 +00:00
Timur Kristóf
6028c146d5 radv: Set aco_shader_info::hw_stage
ACO will rely on this field instead of guessing
the stage internally.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:05 +00:00
Timur Kristóf
016370b4f9 radeonsi: Set aco_shader_info::hw_stage
ACO will rely on this field instead of guessing
the stage internally.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:04 +00:00
Timur Kristóf
0fef6b95ca aco: Add hw_stage field to aco_shader_info.
Unused in this commit, but this is going to replace the shader
stage selection inside ACO after the drivers set it correctly.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:04 +00:00
Timur Kristóf
05928f4200 aco: Use ac_hw_stage instead of aco-specific HWStage.
The new ac_hw_stage is going to be used by drivers as well.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:04 +00:00
Timur Kristóf
cc2307008a ac: Add ac_hw_stage enum.
This is going to be shared between RADV, RadeonSI and ACO.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:04 +00:00
Diederik de Haas
231fa269ea treewide: spelling fixes
Debian's lintian tool flagged some spelling issues:
assumtion -> assumption
unkown -> unknown
memeber -> member
sucess -> success
perfomance -> performance

Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23618>
2023-06-23 12:20:59 +00:00
Lionel Landwerlin
a13ac83f1b anv: fix utrace batch allocation
The introduction of a workaround adding lots of MI_NOOPs broke our
computation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b9aa66d5d0 ("anv: disable preemption for 3DPRIMITIVE during streamout")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23792>
2023-06-23 11:26:27 +00:00
Danylo Piliaiev
8e729a2f57 freedreno/decode: Correctly handle chip_id
gpu_id is not decodable from chip_id in general case,
so we should use chip_id to search for fd_dev_info and get
GPU generation from that.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23828>
2023-06-23 10:31:07 +00:00
Danylo Piliaiev
3111a70a55 freedreno,ir3: Don't call fd_dev_64b more than necessary
fd_dev_64b calls fd_dev_gen which after the last commit calls
fd_dev_info that may scan through all hw definitions.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23828>
2023-06-23 10:31:07 +00:00
Danylo Piliaiev
00900b76e0 freedreno: Decouple GPU gen from gpu_id/chip_id
gpu_id is obsolete, chip_id doesn't encode the GPU generation.
Thus we have to manually specify the GPU gen instead of inferring it.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23828>
2023-06-23 10:31:07 +00:00
Danylo Piliaiev
7a8d92e25f freedreno/perfcntrs: Link with libfreedreno_common
Header from freedreno/common is used without linking with its
implementation. It worked before because all called functions
were header only, which would change soon.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23828>
2023-06-23 10:31:07 +00:00
Gert Wollny
f18afc886a ci: Upref virglrenderer
Update expectation too.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23768>
2023-06-23 10:00:49 +00:00
Gert Wollny
90bc0ccf4a virgl/ci: Drop duplicate runs
CTS GL 3.2 includes all the tests of previous versions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23768>
2023-06-23 10:00:49 +00:00
Tatsuyuki Ishi
b69a1b4153 vulkan: Migrate shader module hash to BLAKE3.
Shaders are the largest thing we hash now, so they benefit from a faster
hash.

Change the field name from `sha1` to `hash` to avoid tying the definition
to a particular algorithm. This doubles down as a precaution against
callers still assuming a 20-byte hash (in which case the compilation will
error out).

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22571>
2023-06-23 09:28:04 +00:00
Tatsuyuki Ishi
e5173e62d7 util/blake3: Add blake3_hash typedef.
This is more ergonomic than unsigned char hash[BLAKE3_OUT_LEN].

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22571>
2023-06-23 09:28:04 +00:00
Marek Olšák
0823ab43c5 Revert "egl: return correct error for EGL_KHR_image_pixmap"
This reverts commit 5db031bf3e.

It crashes X after logging in on Ubuntu 20.04.

Fixes: 5db031bf3e - egl: return correct error for EGL_KHR_image_pixmap

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23740>
2023-06-23 06:50:08 +00:00
Gert Wollny
34163e19f7 r600/sfn: Don't clear clear group flag on vec4 that comes from TEX or FETCH
If we consider clearing the group flag of a vec4 register that is used as
source for some instruction we have to take into account that the parent
of the register element may also be part of a group in the parent instruction.
In this case we must not clear the group flag.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9118

Fixes:  f3415cb26a (r600/sfn: copy propagate register load chains)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23813>
2023-06-23 06:16:30 +00:00
Hyunjun Ko
23d4e21d83 anv/video: fix to set U/V offset correctly.
Fixes: 98c58a16ef ("anv: add initial video decode support for h264.")

Closes: mesa/mesa#9227

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23819>
2023-06-23 09:35:42 +09:00
Timothy Arceri
d336bc3926 glsl: call nir_opt_find_array_copies() when linking
shader-db results IRIS (BDW):

total instructions in shared programs: 17883388 -> 17859658 (-0.13%)
instructions in affected programs: 48100 -> 24370 (-49.33%)
helped: 6
HURT: 0
helped stats (abs) min: 1450 max: 7028 x̄: 3955.00 x̃: 3387
helped stats (rel) min: 40.31% max: 51.92% x̄: 47.07% x̃: 48.96%
95% mean confidence interval for instructions value: -6613.28 -1296.72
95% mean confidence interval for instructions %-change: -52.73% -41.40%
Instructions are helped.

total cycles in shared programs: 866961809 -> 863521521 (-0.40%)
cycles in affected programs: 9179396 -> 5739108 (-37.48%)
helped: 6
HURT: 0
helped stats (abs) min: 252584 max: 972430 x̄: 573381.33 x̃: 495130
helped stats (rel) min: 21.80% max: 48.65% x̄: 35.01% x̃: 34.58%
95% mean confidence interval for cycles value: -917157.00 -229605.67
95% mean confidence interval for cycles %-change: -47.61% -22.40%
Cycles are helped.

total spills in shared programs: 20417 -> 15521 (-23.98%)
spills in affected programs: 6966 -> 2070 (-70.28%)
helped: 6
HURT: 0

total fills in shared programs: 25151 -> 21005 (-16.48%)
fills in affected programs: 4374 -> 228 (-94.79%)
helped: 6
HURT: 0

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9055
Fixes: d75a36a9ee ("glsl: remove do_copy_propagation_elements() optimisation pass")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23737>
2023-06-23 09:10:15 +10:00
Karol Herbst
570c263ea3 nir/load_libclc: run some opt passes for everybody
Cuts down serialized size from 2850288 to 1377780 bytes.

Reduces clinfo with Rusticl time by 40% for debug builds.

(Old data, but the point stands)

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15996>
2023-06-22 21:02:57 +00:00
Karol Herbst
3a981acf55 rusticl/device: create helper context before loading libclc
Some drivers (llvmpipe) postpone some screen initialization until the
first context is created.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15996>
2023-06-22 21:02:57 +00:00
Lina Versace
98c8d7b7cf venus: Fix detection of push descriptor set
- Fix null deref. VkPipelineLayoutCreateInfo::pSetLayouts is allowed to
  contain VK_NULL_HANDLE.
- The loop 'break' was misplaced.

Fixes crash in
dEQP-VK.pipeline.pipeline_library.graphics_library.fast.0_00_11_11 after
VK_EXT_graphics_pipeline_library is enabled in a later patch.

Fixes: 91966f2eff ("venus: extend lifetime of push descriptor set layout")
Signed-off-by: Lina Versace <linyaa@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Dawn Han <dawnhan@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23810>
2023-06-22 20:37:01 +00:00
Faith Ekstrand
f278b30e94 nir/opt_if: Use block_ends_in_jump
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23782>
2023-06-22 19:55:49 +00:00
Alyssa Rosenzweig
7ddfc43fdf nir: Remove integer and 64-bit modifiers
Now that Intel and R600 both do their own modifier propagation, the only
backends that still lower modifiers in NIR are:

* nir-to-tgsi
* lima
* etnaviv
* a2xx

The latter 3 backends do not support integers, and certainly do not support
fp64. So they don't use these.

TGSI in theory supports integer negate modifiers but NTT doesn't use them, so
they're unused there too.

Since they're unused, we remove NIR support for integer and 64-bit modifiers,
leaving only 16/32-bit float modifiers. This will reduce the scope needed for a
replacement to NIR modifiers, being pursued in !23089.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23782>
2023-06-22 19:55:49 +00:00
Lina Versace
a2fc3213f8 venus: Advertise 1.3 in ICD file
It was still advertising 1.2.

Signed-off-by: Lina Versace <linyaa@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23808>
2023-06-22 19:02:40 +00:00
Yiwei Zhang
2f729ff6aa venus: suballocate feedback slot with feedback buffer alignment
Venus sync feedback design relies on concurrent host device resource
access. To avoid device flush overwriting host writes, we must
suballocate the slots with a minimum size of the buffer alignment.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23633>
2023-06-22 18:34:44 +00:00
Eric Engestrom
b2ed33fb4d docs: update calendar for 23.1.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23805>
2023-06-22 17:20:04 +00:00
Eric Engestrom
86f8e90deb docs/relnotes: add sha256sum for 23.1.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23805>
2023-06-22 17:20:04 +00:00
Eric Engestrom
7051d4e1d8 docs: add release notes for 23.1.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23805>
2023-06-22 17:20:04 +00:00
Lionel Landwerlin
8509ebb68a anv: align buffers to a cache line
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9217
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23794>
2023-06-22 16:53:14 +00:00
Pavel Ondračka
9db5da0f38 r300: add partial CMP support on R5xx
VE_COND_MUX_GTE4 is a nice match for the TGSI CMP opcode, however
there is a big limitation due to the general shortcoming of the
vertex shader engine that any instruction can read only two different
temporary registers. So we still have to lower in some cases.

Shader-db RV530:
total instructions in shared programs: 130872 -> 130333 (-0.41%)
instructions in affected programs: 29854 -> 29315 (-1.81%)
helped: 294
HURT: 83
total temps in shared programs: 16747 -> 16775 (0.17%)
temps in affected programs: 407 -> 435 (6.88%)
helped: 10
HURT: 38

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23691>
2023-06-22 14:34:39 +00:00
Mike Blumenkrantz
e15a4e6e1a radv: pre-init surface info
this is costly to do at render time, so avoid it when possible

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23770>
2023-06-22 13:36:13 +00:00
Christian Gmeiner
92dbf454f8 ci/etnaviv: update ci expectation
I have been running ci stress tests during the last few days
and nights and this is what I needed to get a pass rate > 80%.
There are still many flakes but I think this is a good starting
point to make better use of the ci.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23797>
2023-06-22 13:15:44 +00:00
Martin Roukala (né Peres)
3005c27a92 Revert "amd/ci: temporarily disable some manual jobs that take a long time to run"
This reverts commit 4031ed5c8a.

Signed-off-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23798>
2023-06-22 12:42:08 +00:00
Karol Herbst
33673bcc2a rusticl: stop linking with libgalliumvl
it's not needed.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23778>
2023-06-22 11:51:21 +00:00
Karol Herbst
92fdfea5af rusticl: specify which symbols to export
Drops release binary size from 31MB to 29MB

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23778>
2023-06-22 11:51:21 +00:00
Karol Herbst
72fe01a6be rusticl: add ld_args_gc_sections
This drops release file size from 33MB to 31MB on my system.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23778>
2023-06-22 11:51:21 +00:00
Yonggang Luo
ff29016753 meson: Guard the glsl tests that only working when OpenGL ES2 is enabled
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23793>
2023-06-22 11:08:11 +00:00
Yonggang Luo
0c298c1bb2 mapi: Fixes non-constant-expression cannot be narrowed from type 'unsigned long' to 'unsigned int' in initializer list with clang
error is:
../src/mapi/glapi/tests/check_table.cpp:563:19: error: non-constant-expression cannot be narrowed from type 'unsigned long' to 'unsigned int' in initializer list [-Wc++11-narrowing]
   { "glNewList", _O(NewList) },

This is just a test and only with clang, and can be disabled by compiler option, so there is no need to back ported

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23793>
2023-06-22 11:08:11 +00:00
Yonggang Luo
e44773b6d6 meson: Use consistence disabled/enabled comment for shared-glapi option
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23793>
2023-06-22 11:08:11 +00:00
Yonggang Luo
7af2c45947 mapi: Fixes check_table.cpp for DrawArraysInstancedARB and DrawElementsInstancedARB
The compile error when compiled with "-Dglx=xlib -D shared-glapi=disabled":
check_table.cpp:1133:37: error: ‘struct _glapi_table’ has no member named ‘DrawArraysInstancedARB’; did you mean ‘DrawArraysInstanced’?
 1133 |    { "glDrawArraysInstancedARB", _O(DrawArraysInstancedARB) },

Fixes: 5679ef99b8 ("glapi: remove EXT and ARB suffixes from Draw functions")

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23793>
2023-06-22 11:08:11 +00:00
Karol Herbst
29b4c1a09f rusticl: experimental support for cl_khr_fp16
Hidden behind `RUSTICL_ENABLE=fp16` for now as the OpenCL CTS doesn't have
enough fp16 tests at the moment. There has been a lot of work on it though,
so hopefully we can enable and verify it soon.

Additionally libclc also misses a bunch of fp16 functionality, so most of
the tests would also just crash.

However this flag is useful for development as it already wires up most of
the code needed.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23788>
2023-06-22 10:45:48 +00:00
Karol Herbst
6ae801c4d8 rusticl/device: rename doubles to fp64 and long to int64
They are obviously the better names.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23788>
2023-06-22 10:45:48 +00:00
David Heidelberg
0623e1784c ci/panfrost: switch panfrost-g52-piglit-gles2 from X to XWayland
Runtime reduced approx. by 3 minutes (~ 11 to 8 minutes).

 - Add spec@ext_image_dma_buf_import@ext_image_dma_buf_import-transcode-nv12-as-r8-gr88 crash
 - drop useless `.piglit-test` extend

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23785>
2023-06-22 10:27:38 +00:00
norablackcat
5c120173b3 zink/screen: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
79cd51d0e6 radeonsi/get: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
979f47a04d r600/pipe: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
6e1f873a0c iris/screen: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
d27040ed89 crocus/screen: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
6ec57403db sofpipe/screen: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
35f5bc0ad4 llvmpipe/screen: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
norablackcat
660f2eabe1 gallium: add PIPE_CAP_TIMER_RESOLUTION
Reviewed by Marek Olšák

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23703>
2023-06-22 09:08:33 +00:00
Marek Olšák
77f5b1cce0 radeonsi: clean up #includes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
56c787b36d radeonsi: declare compiler[] and nir_options as pointers to reduce #includes
so that we don't have to include the structure definitions.
(ac_llvm_compiler includes LLVM, and nir_options includes NIR)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
620ff256a2 radeonsi: clean up query functions, make them static, remove forward decls
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
69bc1180b7 radeonsi/gfx11: use SET_SH_REG_PAIRS_PACKED for compute by buffering reg writes
This is the compute portion of the work. It uses a separate buffer
for compute SH registers in si_context.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
1753b321f8 radeonsi/gfx11: use SET_SH_REG_PAIRS_PACKED for gfx by buffering reg writes
Instead of writing SH registers into the command buffer, push them into
an array in si_context. Before a draw, take all buffered register writes
and create a single SET_SH_REG_PAIRS_PACKED packet for them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
a6e6646d91 radeonsi: reorder compute code to prepare for packed SET_SH_REG packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
f71607c8d3 radeonsi/gfx11: enable register shadowing by default
required by SET_SH_REG_PAIRS_PACKED*

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
aafef61f6a radeonsi/gfx11: fix GLCTS with register shadowing by keeping the CS preamble
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
c7f4ffa401 radeonsi: remove uses_reg_shadowing parameter from si_init_gfx_preamble_state
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
913c6392f6 radeonsi: remove radeon_winsys::cs_set_preamble
It only does radeon_emit_array and it's not possible to do anything better.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
c4811edfa6 radeonsi: use si_pm4_create_sized for the shadowing preamble
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
fff585bdb8 radeonsi: don't do BREAK_BATCH for context regs with only 1 context per batch
because it has no effect

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:55 +00:00
Marek Olšák
835190dd9f radeonsi: keep pipeline statistics disabled when they are not used
so that we don't always disable/enable pipeline stats around blits
when there are no pipeline stat queries

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Marek Olšák
ccb856fbaa radeonsi: determine si_pm4_state::reg_va_low_idx automatically
The existing code doesn't work with the packed SET packets, so si_pm4_state
needs to find reg_va_low_idx after the whole packet is built.

Remove si_pm4_set_reg_va and do the same thing for SET_SH_REG.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Marek Olšák
22f3bcfb5a radeonsi/gfx11: use SET_*_REG_PAIRS_PACKED packets for pm4 states
It can generate all PACKED packets, but only SET_CONTEXT_REG_PAIRS_PACKED
is generated because register shadowing is required by
SET_SH_REG_PAIRS_PACKED*.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Marek Olšák
1aa99437d3 radeonsi: eliminate redundant TCS user data and RSRC2 register changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Marek Olšák
6959493f8c radeonsi: move the only tcs_out_lds_offsets field to vs_state_bits
This removes 1 user data SGPR.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Marek Olšák
5632d8d1a7 radeonsi: replace tcs_out_lds_layout with nearly identical tes_offchip_addr
tcs_out_lds_layout is basically renamed to tes_offchip_addr in TCS, using
the same variable as TES and also using the same bit layout. The only
difference in the bit layout was that TCS had to mask out the low bits,
which this also removes.

The enums are renamed to *_SGPR_TCS_OFFCHIP_ADDR so as not to conflict
with *_SGPR_TES_OFFCHIP_ADDR, which are in different user data SGPRs.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Marek Olšák
1b40ab2150 radeonsi: move TCS.gl_PatchVerticesIn into the tcs_offchip_layout SGPR
we'll be able to remove 1 TCS user data SGPR thanks to this

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
2023-06-22 08:35:54 +00:00
Martin Roukala (né Peres)
b4e2073f04 zink/ci: remove 3 tests from the fails list
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23789>
2023-06-22 08:10:06 +00:00
Martin Roukala (né Peres)
4031ed5c8a amd/ci: temporarily disable some manual jobs that take a long time to run
We are trying to re-enable the valve CI... but doing so runs all the
jobs, including the manual ones.

Since some can take over an hour to run, let's disable them, and
re-enable them in another MR by reverting this commit.

Sorry for the noise!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23789>
2023-06-22 08:10:06 +00:00
Martin Roukala (né Peres)
a4796a34b1 Revert "ci: mark the valve farm as down"
Fixed by rebooting the gateway. A post-mortem analysis will be
performed to figure out what happened!

This reverts commit 2089fc8188.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23789>
2023-06-22 08:10:06 +00:00
Pavel Ondračka
b4ca45911d nir_opt_algebraic: don't use i32csel without native integer support
Otherwise nir_lower_int_to_float (or specifically nir_gather_ssa_types)
will fail to recognize we already have float constants and converts them
again.

Example from spec/glsl-1.10/execution/vs-loop-array-index-unroll.shader_test
with r300 driver (after enabling has_fused_comp_and_csel).

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = load_const (0x00000000 = 0.000000)
        vec4 32 ssa_1 = intrinsic load_input (ssa_0) (base=0, component=0, dest_type=float32, io location=VERT_ATTRIB_POS slots=1)      /* gl_Vertex */
        vec3 32 ssa_2 = load_const (0x00000000, 0x3e800000, 0x3f800000) = (0.000000, 0.250000, 1.000000)
        vec3 32 ssa_3 = load_const (0x00000000, 0x3f000000, 0x3f800000) = (0.000000, 0.500000, 1.000000)
        vec3 32 ssa_4 = load_const (0x00000000, 0x3f400000, 0x3f800000) = (0.000000, 0.750000, 1.000000)
        vec2 32 ssa_5 = load_const (0x00000000, 0x3f800000) = (0.000000, 1.000000)
        vec1 32 ssa_6 = load_const (0x3f800000 = 1.000000)
        vec1 32 ssa_7 = intrinsic load_ubo_vec4 (ssa_0, ssa_0) (access=0, base=0, component=0)
        vec4 32 ssa_8 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
        vec4  1 ssa_9 = ilt ssa_8, ssa_7.xxxx
        vec3 32 ssa_10 = bcsel ssa_9.www, ssa_5.xyy, ssa_4
        vec3 32 ssa_11 = bcsel ssa_9.zzz, ssa_10, ssa_3
        vec3 32 ssa_12 = bcsel ssa_9.yyy, ssa_11, ssa_2
        vec3 32 ssa_15 = i32csel_gt ssa_7.xxx, ssa_12, ssa_6.xxx
        vec4 32 ssa_14 = fsat ssa_15.xyxz
        intrinsic store_output (ssa_14, ssa_0) (base=1, wrmask=xyzw, component=0, src_type=float32, io location=VARYING_SLOT_COL0 slots=1, xfb(), xfb2())       /* gl_FrontColor */
        intrinsic store_output (ssa_1, ssa_0) (base=0, wrmask=xyzw, component=0, src_type=float32, io location=VARYING_SLOT_POS slots=1, xfb(), xfb2()) /* gl_Position */
        /* succs: block_1 */
        block block_1:
}

and after nir_lower_int_to_float

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = load_const (0x00000000 = 0.000000)
        vec4 32 ssa_1 = intrinsic load_input (ssa_0) (base=0, component=0, dest_type=float32, io location=VERT_ATTRIB_POS slots=1)      /* gl_Vertex */
        vec3 32 ssa_2 = load_const (0x00000000, 0x4e7a0000, 0x4e7e0000) = (0.000000, 1048576000.000000, 1065353216.000000)
        vec3 32 ssa_3 = load_const (0x00000000, 0x4e7c0000, 0x4e7e0000) = (0.000000, 1056964608.000000, 1065353216.000000)
        vec3 32 ssa_4 = load_const (0x00000000, 0x4e7d0000, 0x4e7e0000) = (0.000000, 1061158912.000000, 1065353216.000000)
        vec2 32 ssa_5 = load_const (0x00000000, 0x4e7e0000) = (0.000000, 1065353216.000000)
        vec1 32 ssa_6 = load_const (0x4e7e0000 = 1065353216.000000)
        vec1 32 ssa_7 = intrinsic load_ubo_vec4 (ssa_0, ssa_0) (access=0, base=0, component=0)
        vec4 32 ssa_8 = load_const (0x00000000, 0x3f800000, 0x40000000, 0x40400000) = (0.000000, 1.000000, 2.000000, 3.000000)
        vec4  1 ssa_9 = flt ssa_8, ssa_7.xxxx
        vec3 32 ssa_10 = bcsel ssa_9.www, ssa_5.xyy, ssa_4
        vec3 32 ssa_11 = bcsel ssa_9.zzz, ssa_10, ssa_3
        vec3 32 ssa_12 = bcsel ssa_9.yyy, ssa_11, ssa_2
        vec3 32 ssa_13 = fcsel_gt ssa_7.xxx, ssa_12, ssa_6.xxx
        vec4 32 ssa_14 = fsat ssa_13.xyxz
        intrinsic store_output (ssa_14, ssa_0) (base=1, wrmask=xyzw, component=0, src_type=float32, io location=VARYING_SLOT_COL0 slots=1, xfb(), xfb2())       /* gl_FrontColor */
        intrinsic store_output (ssa_1, ssa_0) (base=0, wrmask=xyzw, component=0, src_type=float32, io location=VARYING_SLOT_POS slots=1, xfb(), xfb2()) /* gl_Position */
        /* succs: block_1 */
        block block_1:
}

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23704>
2023-06-22 07:25:44 +00:00
Eric Engestrom
f9a4b8e640 docs/ci: fix command to disable/re-enable farms
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23780>
2023-06-22 07:17:31 +00:00
Gert Wollny
e853332805 r600/sfn: Add source mod propagation also to fp64 ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23754>
2023-06-22 06:31:50 +00:00
Gert Wollny
255eee10ac r600/sfn: Implement fsat for 64 bit ops
Because a plain mov with the fsat modifier doesn't do a proper 64 bit fsat
we either have to propagate the op as modifier to the instruction that
creates the value, or we add a fake op that applies the fsat op, i.e. we
implement the mov as an add_64 with zero as the second value.

Fixes:  0ff3c4bef2
    r600/sfn: drop use of nir source mods

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23754>
2023-06-22 06:31:50 +00:00
Iván Briano
12d86e9822 anv: update conformanceVersion
The Vulkan CTS started generating the list of valid versions the driver
can report as conformant against based on the active branches, and the
1.3.0 branch we were reporting up to now is no longer valid.

Fixes dEQP-VK.api.driver_properties.conformance_version

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23784>
2023-06-22 01:28:32 +00:00
Jesse Natalie
ff52a00553 dzn: Align placed footprints used when copying linear <-> optimal for BC formats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23662>
2023-06-22 00:57:20 +00:00
Helen Koike
9dd106b113 ci: move .microsoft-farm-container-rules to test-source-dep.yml
farm rules are placed on test-source-dep.yml, so move it there.

This is also useful when trying to re-use the container/gitlab-ci.yml to
other workflows without running the jobs.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23731>
2023-06-22 00:01:18 +00:00
Mike Blumenkrantz
402ae3b132 nir/lower_tex: ignore saturate for txf ops
saturate is used for GL_CLAMP emulation, and GL_CLAMP cannot be used
with txf

ref #9226

cc: mesa-stable

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23750>
2023-06-21 23:13:50 +00:00
Mike Blumenkrantz
886b7aaa6b zink: add fastpaths for no-op sampler/view rebinds
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:48 +00:00
Mike Blumenkrantz
8125437acd zink: check sampler views pointer before loop
this doesn't need to be checked in every loop iteration

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:48 +00:00
Mike Blumenkrantz
58b82d231d zink: don't update tc info directly from cso binds
this somehow becomes expensive at extremely high fps, so defer
until rp begin to check layout change state

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:48 +00:00
Mike Blumenkrantz
7b4c1b3a42 zink: track and apply ds3 states only on change
drivers don't do their own state tracking, so ensure the calls are only
made when necessary

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:48 +00:00
Mike Blumenkrantz
5dc2d329cb zink: use local screen var in blend state bind
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:47 +00:00
Mike Blumenkrantz
2543fc15a1 zink: clean up rp update tracking on dsa bind
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:47 +00:00
Mike Blumenkrantz
b65efda508 zink: specialize invalidate_descriptor_state hook for compact mode
the constant flag check here has perf implications at high fps,
so avoid it when possible

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:47 +00:00
Mike Blumenkrantz
53542dd120 zink: make invalidate_descriptor_state a ctx hook
this will allow for specialization

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:47 +00:00
Mike Blumenkrantz
ad04bd81b9 zink: force inlining for a bunch of functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:47 +00:00
Mike Blumenkrantz
14bf10c1ad zink: no-op redundant samplemask changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23758>
2023-06-21 22:43:47 +00:00
Jesse Natalie
f759cbb675 dzn: Fix multisample counts in device limits
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23658>
2023-06-21 22:27:08 +00:00
Jesse Natalie
8b888ead2f dzn: Remove dynamic check for block-compressed support
None of this is optional in D3D

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23658>
2023-06-21 22:27:08 +00:00
Jesse Natalie
a3d14e4b05 dzn: Use common GetPhysicalDeviceFeatures2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23658>
2023-06-21 22:27:08 +00:00
Jesse Natalie
7a68617692 dzn: Inline D3D12 device creation in physical device creation
This was effectively happening *anyway* because WSI init was calling
functions that needed a D3D12 device around to be able to answer.
Just remove the whole song and dance of maybe not having a device.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23658>
2023-06-21 22:27:08 +00:00
Michel Zou
badb85edb8 util: reinstate ENUM_PACKED
gets rid of warning: 'gcc_struct' attribute ignored [-Wattributes] introduced by !23338

Fixes: 86532fa21d ("util: Use the gcc_struct attribute for packed structures in mingw")
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23478>
2023-06-21 21:51:59 +00:00
Alexander von Gluck IV
4b48d377ba egl/haiku: Fix potential crash if double buffering is disabled
* Don't assume the existence of the back buffer in swap_buffers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23556>
2023-06-21 21:18:28 +00:00
Eric Engestrom
2089fc8188 ci: mark the valve farm as down
docker daemon is down on mupuf-gfx10-vangogh-{1..3}

Signed-off-by: Eric Engestrom <eric@igalia.com>
2023-06-21 21:34:25 +01:00
Ian Romanick
ed5d346868 intel/fs: Add missing newline
Emacs will add a newline to the end of this file whether I've edited
that line or not. It was driving me up the wall, so... yeah.

Trivial.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23777>
2023-06-21 19:57:58 +00:00
Mike Blumenkrantz
df6749ed56 radv: inline radv_can_enable_dual_src()
this is unexpectedly heavy

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23601>
2023-06-21 18:59:07 +00:00
Mike Blumenkrantz
8b73109a93 radv: remove redundant intermediate variable in radv_is_mrt0_dual_src()
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23601>
2023-06-21 18:59:07 +00:00
Jesse Natalie
2a1d97e3fc dzn: Ignore export access parameters
D3D requires these to just be GENERIC_ALL. Fixes some sharing tests.

Fixes: c64f1b66 ("dzn: Hook up win32 semaphore import/export")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23772>
2023-06-21 18:31:28 +00:00
Eric Engestrom
63f44951ac asahi: drop unnecessary DRM_FORMAT_MOD_{LINEAR,INVALID} fallbacks
Since afe134a49c ("asahi: Drop macOS backend"), `drm_fourcc.h` is
unconditionally included, meaning these defines are now dead code.

Fixes: afe134a49c ("asahi: Drop macOS backend")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23773>
2023-06-21 18:17:56 +00:00
Rhys Perry
cfa7eec06c aco: don't set exec_hi for wave32 scan reductions
fossil-db (wave32):
Totals from 21 (0.02% of 133428) affected shaders:
Instrs: 10778 -> 10712 (-0.61%)
CodeSize: 56604 -> 56208 (-0.70%)
Latency: 168293 -> 168251 (-0.02%)
InvThroughput: 25256 -> 25253 (-0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23745>
2023-06-21 17:58:44 +00:00
Karmjit Mahil
5d03bbc91d pvr: Fix csb control stream extension
Previously we reserved space for a stream link and whenever we ran
out of space in the current bo, allocated a new one, and emitted a
link to it. This is problematic as stream links can only be emitted
at state update boundaries so the handling could have produced a
corrupted control stream.

That's fixed by using a `relocation_mark` set by the driver to
indicate where a state update was last started, so csb can relocate
the whole update into the new bo and link to it.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23520>
2023-06-21 17:44:53 +00:00
Ian Romanick
5336cbff3b intel/fs: Constant propagate into SHADER_OPCODE_SHUFFLE
Code already exists to convert SHADER_OPCODE_SHUFFLE into a simple MOV
when either source is constant. However... the constants have to
actually get into those sources!

On a shader that I'm working on that multiplies very large matrices using
lots of subgroup operations,

-SIMD8 shader: 1378 instructions. 3 loops. 793896 cycles. 0:0 spills:fills, 23 sends, scheduled with mode non-lifo. Promoted 0 constants. Compacted 22048 to 21664 bytes (2%)
+SIMD8 shader: 346 instructions. 3 loops. 61742 cycles. 0:0 spills:fills, 23 sends, scheduled with mode top-down. Promoted 0 constants. Compacted 5536 to 5216 bytes (6%)

No changes in shader-db or fossil-db on any Intel platform.

v2: Merge a bunch of identical cases. Suggested by Ken.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> [v1]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23609>
2023-06-21 17:16:57 +00:00
Karmjit Mahil
b902fb2e14 pvr: Fix dynamic offset patching
Previously the set of dynamic offsets were being reused per each
binding. That's now fixed, by using an offset to determine where
each binding's dynamic offsets reside.

Tests fixed:
  dEQP-VK.binding_model.descriptor_copy.{compute,graphics}
    .{uniform,storage}_buffer_dynamic_0

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Fixes: aa791961a8 ("pvr: Add support for dynamic buffers descriptors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23587>
2023-06-21 16:52:59 +00:00
SoroushIMG
4071b8e7f3 pvr: Fix barrier insertion on merged subpasses
The driver can merge subpasses within a render pass into a single
hw render. While doing so it makes the assumption that the subpasses
in an hw render will all be submitted in a single job.

On vkCmdPipelineBarrier() the driver was previously incorrectly
inserting an event sub-cmd on a merged subpass, breaking that
assumption leading to incorrect values for input attachments.

Signed-off-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Fixes: 6d672e0336 ("pvr: Add initial vkCmdPipelineBarrier skeleton.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23693>
2023-06-21 16:32:18 +00:00
Karmjit Mahil
822dc384b1 pvr: Fix seg fault on empty descriptor set
Vulkan allows empty descriptor sets to be created. When we setup
the descriptor set addresses table we fill in the address of the
`bo` for each valid/currently bound desc set. For empty desc sets
there is no `bo` which was causing a seg fault. Now skip them,
leaving their address set to `~0`.

Reported-by: Simon Perretta <simon.perretta@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Fixes: ce67f5ac94 ("pvr: Write descriptor set addrs table dev addr into shareds")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23692>
2023-06-21 16:09:20 +00:00
Vitaliy Triang3l Kuzmin
9d75795087 radv: Move most of DB_SHADER_CONTROL to PS, more precise GFX11 blend WA
Move most of the DB_SHADER_CONTROL fields from the pipeline to the pixel
shader for preparation for shader objects.

Also, the GFX11 export conflict bug workaround doesn't need to be enabled
for non-1x sample counts or if blending is not enabled, so make the
application of DB_SHADER_CONTROL consider the current sample count and
blending state even if they're dynamic.

Having access to the exact sample count in DB_SHADER_CONTROL setup is also
necessary for good performance in SampleInterlock execution modes of
fragment shader interlock, for configuration of POPS_OVERLAP_NUM_SAMPLES
(GFX9-10.3) or OVERRIDE_INTRINSIC_RATE (GFX11), as PixelInterlock is
massively slower with multisampling due to overlap between adjacent
polygons sharing covered pixels among the common edge.

The name of the dynamic state controlling DB_SHADER_CONTROL is now
unambiguous - previously line rasterization mode had effect on attachment
feedback loop state emission.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23474>
2023-06-21 14:16:24 +00:00
Lionel Landwerlin
b687cbe36c isl: add surface creation reporting mechanism
We have a number of users reporting surface creation issues with
modifiers etc...

This makes Anv & Iris printout the reason of the failure with
INTEL_DEBUG=isl Failure example in Iris :

MESA: debug: ISL surface failed: ../src/intel/isl/isl.c:1729: requested row pitch (42B) less than minimum alignment requirement (1024B) extent=160x160x1 dim=2d msaa=1x levels=1 rpitch=42 fmt=B8G8R8X8_UNORM usage=+rt+tex+disp

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14039>
2023-06-21 13:28:34 +00:00
Lionel Landwerlin
7507441430 isl: assert on gfx8 condition that should not be met
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14039>
2023-06-21 13:28:34 +00:00
Lionel Landwerlin
31cc7a1887 isl: assert on gfx7 condition that should not be met
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14039>
2023-06-21 13:28:34 +00:00
Lionel Landwerlin
4616aa2fac isl: assert on gfx6 condition that should not be met
Those 2 cases should have been handled earlier.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14039>
2023-06-21 13:28:34 +00:00
Mike Blumenkrantz
7cf7ea2500 zink: radv vangogh ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23729>
2023-06-21 07:57:38 -04:00
Mike Blumenkrantz
1ca87a300d zink: always clamp NUM_QUERIES to 500
this avoids ooming on some weaker GPUs with big query energy

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23729>
2023-06-21 11:20:01 +00:00
Mike Blumenkrantz
0e32de0aed zink: recache present semaphores
this otherwise depletes the entire cache

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23729>
2023-06-21 11:20:01 +00:00
Mike Blumenkrantz
6b204c6162 zink: acquire persistently bound swapchain descriptors before setting usage
if a swapchain image is bound as a sampler across batches then it needs
to be acquired again before it is used

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23729>
2023-06-21 11:20:01 +00:00
Mike Blumenkrantz
9803174942 zink: fix ubo array sizing in ntv
there are only 2 ubos that can be emitted, except the emitted ubos
can start at an offset based on the first-used ubo, which means this
has to support the full range of ubo indices

fixes oob access in game Beyond All Reason

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23729>
2023-06-21 11:20:01 +00:00
Hyunjun Ko
240b419c03 vulkan/video: consider removed bits when calculating the size of comsumed data.
Closes: mesa/mesa#9170

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23688>
2023-06-21 19:24:49 +09:00
Hyunjun Ko
a28994f73c util/rbsp: keep track of removed bits for the emulation
prevention three bytes.

This is needed for the next patch to fix a way to get how much data
is comsumed in rbsp by considering cases of removed bits for emulation
prevention three bytes.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23688>
2023-06-21 19:24:37 +09:00
Hyunjun Ko
6f2e260d2b vulkan/video: move parsing longterm rps in h265 slice parsing.
It was just by mistake.

Fixes: efdcacb230 ("vulkan/video: add to parse h265 slice.")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23688>
2023-06-21 19:24:08 +09:00
Hyunjun Ko
b10631865d vulkan/video: adds more conditions for setting loop_filter_across_slices_enable in h265 slice parsing.
Fixes: efdcacb230 ("vulkan/video: add to parse h265 slice.")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23688>
2023-06-21 19:20:59 +09:00
Konstantin Seurer
48b32124c6 radv/rt: Store the prolog outside the shaders array
Avoids including it in executable statistics queries.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
ebe4e337fd radv: Use _mesa_shader_stage_to_string for executable name
We can not use it for all stages because RADV has some special stages
and shader-db doesn't handle all stages.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
334a20ae28 radv: Implement executable properties for ray tracing stages
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
bf5b74c3ba radv: Use get_shader_from_executable_index for executable properties
This will make handling ray tracing pipelines easier.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
8a5c4b3ebf radv: Adjust the traversal shader description
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
eeae2fb5c4 radv: Move the shader type to radv_shader_info
Since the default value is 0, this removes some boilerplate.
Moving it to the shader info also makes it accessible using
radv_shader.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Tapani Pälli
12d7aaf2b8 intel/compiler: add more validation for acc register usage
This is described in Wa_14014617373 and a programming note has
been added to specification.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23682>
2023-06-21 08:15:59 +00:00
Samuel Pitoiset
836990b651 radv: enable NV_device_generated_commands on GFX6
Now that GFX6 supports IBs, DGC can also be enabled.
Pass all vkd3d-proton tests on Pitcairn.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23689>
2023-06-21 06:54:03 +00:00
Samuel Pitoiset
a9c8366261 radv: implement padding cmdbuffer for DGC on GFX6
GFX6 only supports PKT2_NOP_PAD.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23689>
2023-06-21 06:54:03 +00:00
Yonggang Luo
65249c6f0a util: Fixes prototype of threads_timespec_compare
using const struct timespec * is enough

Fixes: 45bd24708a ("c11: Improve mtx_timedlock to use timespec_get instead of time(NULL)")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9230

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23753>
2023-06-21 06:18:40 +00:00
Dave Airlie
146adbd2f4 radv/video: drop incorrect defines for uapi ones.
I missed there's an off by one, and found the kernel defined
the correct bits, so just use that.

Fixes: 9477f117f4 ("radv/video: add initial frameworking.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23757>
2023-06-21 05:28:01 +00:00
Ian Romanick
38f941c8a8 intel/stub_gpu: Don't run program again after using GDB
Fixes: c56dd678e4 ("intel/stub_gpu: add an option to launch valgrind")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23736>
2023-06-21 04:47:48 +00:00
Patrick Lerda
23c003b88c util/blitter: fix util_blitter_clear_buffer() refcnt imbalance
Indeed, the vertex state was restored using a specific
condition at the util_blitter_restore_vertex_states()
level. This change ensures that the condition is the
same when the vertex state is saved.

The function util_blitter_clear_buffer() is only called
by the r600 driver on pre-evergreen gpus.

This issue is triggered on a rv770 gpu with "piglit/bin/fbo-1d -auto -fbo"
or "piglit/bin/draw_buffers_gles2 -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 5f566faa46 ("radeonsi: don't save and restore vertex buffers and elements for u_blitter")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23721>
2023-06-21 03:36:35 +00:00
Mike Blumenkrantz
3d22bcb790 zink: only retry bo allocation after reclaim if reclaims actually happened
this should cut down on allocation error spam

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23073>
2023-06-21 01:19:23 +00:00
Mike Blumenkrantz
d4757ea67e aux/pipebuffer: add a return to pb_cache_release_all_buffers()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23073>
2023-06-21 01:19:23 +00:00
Mike Blumenkrantz
d065304367 aux/pipebuffer: add a return to pb_slabs_reclaim()
this lets drivers determine whether any reclaims have happened

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23073>
2023-06-21 01:19:22 +00:00
Caio Oliveira
fde8bf7b7f intel/compiler: Respect NIR_DEBUG_PRINT_INTERNAL flag
If flag is not set, don't print debugging
information for internal shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23756>
2023-06-21 00:01:10 +00:00
Caio Oliveira
af9be8c024 nir/print: Print whether the shader is internal or not
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23756>
2023-06-21 00:01:10 +00:00
norablackcat
880a8bb943 rusticl/memory: fix clippy errors
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23755>
2023-06-20 20:31:06 +00:00
Rhys Perry
f1f01aaef5 aco/gfx11: schedule for VMEM store clauses
fossil-db (gfx1100):
Totals from 49486 (37.09% of 133428) affected shaders:
Instrs: 18376819 -> 18480712 (+0.57%); split: -0.00%, +0.57%
CodeSize: 91810836 -> 92227292 (+0.45%); split: -0.00%, +0.45%
VGPRs: 2031824 -> 2047784 (+0.79%); split: -0.02%, +0.81%
Latency: 104259318 -> 103804792 (-0.44%); split: -0.44%, +0.00%
InvThroughput: 16388760 -> 16399819 (+0.07%); split: -0.13%, +0.19%
VClause: 568844 -> 432401 (-23.99%)
Copies: 1197942 -> 1231202 (+2.78%); split: -0.08%, +2.86%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23505>
2023-06-20 18:37:34 +00:00
Rhys Perry
f837fec213 aco/gfx11: use s_clause with stores
fossil-db (gfx1100):
Totals from 3535 (2.65% of 133428) affected shaders:
Instrs: 1963996 -> 1968979 (+0.25%)
CodeSize: 10077784 -> 10097716 (+0.20%)
Latency: 13264216 -> 13264741 (+0.00%)
InvThroughput: 2995676 -> 3004083 (+0.28%); split: -0.00%, +0.28%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23505>
2023-06-20 18:37:33 +00:00
Rhys Perry
0c0143a4c0 aco: don't try to form load+store clauses
fossil-db (gfx1100):
Totals from 79 (0.06% of 133428) affected shaders:
MaxWaves: 1484 -> 1408 (-5.12%)
Instrs: 216290 -> 216255 (-0.02%); split: -0.04%, +0.03%
CodeSize: 1149288 -> 1149148 (-0.01%); split: -0.03%, +0.02%
VGPRs: 7384 -> 7840 (+6.18%)
Latency: 3303521 -> 3305077 (+0.05%); split: -0.05%, +0.10%
InvThroughput: 2716621 -> 2719973 (+0.12%); split: -0.01%, +0.13%
VClause: 5605 -> 6170 (+10.08%)
SClause: 3005 -> 2983 (-0.73%); split: -0.77%, +0.03%
Copies: 33428 -> 33490 (+0.19%); split: -0.07%, +0.26%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23505>
2023-06-20 18:37:33 +00:00
Mike Blumenkrantz
414576aad5 zink: fix anv ci flake wildcarding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23751>
2023-06-20 18:11:04 +00:00
Mike Blumenkrantz
c15b2491ec zink: ZINK_HEAP_HOST_VISIBLE_CACHED -> ZINK_HEAP_HOST_VISIBLE_COHERENT_CACHED
all host-visible memory in zink is expected to be coherent, and this makes
that expectation more explicit

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23728>
2023-06-20 16:53:32 +00:00
Mike Blumenkrantz
7a169254c5 zink: add COHERENT requirement for CACHED memory
zink doesn't handle non-coherent cached memory correctly, so ensure
that scenario is never hit

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23728>
2023-06-20 16:53:31 +00:00
Caio Oliveira
59a72570b6 compiler: Move spirv into a module of its own
For historical reasons, nir and vtn were compiled together,
and a bunch of vtn specific targets were defined in
src/compiler/meson.build.

Now that we can, make src/compiler/spirv produce an internal
library that depends on NIR, and is used by the drivers/tools.
Also move the vtn specific targets into that directory's
meson.build.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23668>
2023-06-20 16:18:08 +00:00
Nanley Chery
2af68d157b isl: Add and use size and alignment calculators
Instead of interleaving the code for the size and alignment
calculations, split them out into their own functions.

This should make the code easier to follow and avoid some uninitialized
variable warnings.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23699>
2023-06-20 15:52:45 +00:00
Georg Lehmann
68f7c53814 aco/gfx10+: use v_cndmask with literal for reduction identity
Totals from 10 (0.01% of 132657) affected shaders:
CodeSize: 171576 -> 171288 (-0.17%)
Instrs: 32127 -> 32055 (-0.22%)
Latency: 219145 -> 219027 (-0.05%)
InvThroughput: 130287 -> 130041 (-0.19%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23695>
2023-06-20 14:48:18 +00:00
Georg Lehmann
71d30bcede aco: combine scalar mul+pk_add to pk_fma
Foz-DB Navi21:
Totals from 12 (0.01% of 134913) affected shaders:
CodeSize: 37860 -> 37668 (-0.51%)
Instrs: 6757 -> 6733 (-0.36%)
Latency: 25632 -> 25589 (-0.17%)
InvThroughput: 2637 -> 2622 (-0.57%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21819>
2023-06-20 14:29:24 +00:00
Georg Lehmann
6db61d0dc0 aco: use uses helpers for pk_fma opt
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21819>
2023-06-20 14:29:24 +00:00
Rhys Perry
532407094a radv: use wave32 for small workgroups
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23555>
2023-06-20 14:03:52 +00:00
Rhys Perry
b765a27d73 radv: refactor CS subgroup size determination
This is less convoluted.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23555>
2023-06-20 14:03:52 +00:00
SureshGuttula
41d8837e89 radeonsi/vcn: update luma and chroma size
This patch will adjust aligned_height to enc_alignment  which
is helping to address some corner cases like 4096x64/64x<>.

Actually less dpb size causing PROTECTION_FAULT. This change is
fixing the issue.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Boyuan Zhang Boyuan.Zhang@amd.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23448>
2023-06-20 13:40:16 +00:00
Samuel Pitoiset
1359e806f2 radv: advertise VK_EXT_depth_bias_control
Pass new CTS on RDNA2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>
2023-06-20 12:46:28 +00:00
Samuel Pitoiset
266b2cfe5b radv: implement VK_EXT_depth_bias_control
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>
2023-06-20 12:46:28 +00:00
Samuel Pitoiset
0432a748ee vulkan/runtime: call CmdSetDepthBias2EXT() from CmdSetDepthBias()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>
2023-06-20 12:46:28 +00:00
Gert Wollny
ae7d904a73 r600/sfn: Implement source mod optimization in backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23702>
2023-06-20 12:22:45 +00:00
Gert Wollny
da92733d5a r600/sfn: add source and dest mod info to opcode table
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23702>
2023-06-20 12:22:45 +00:00
Gert Wollny
2f6ded1098 r600/sfn: allow source mods for per source with multi-slot ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23702>
2023-06-20 12:22:45 +00:00
Gert Wollny
0ff3c4bef2 r600/sfn: drop use of nir source mods
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23702>
2023-06-20 12:22:45 +00:00
Gert Wollny
47152b6c09 r600/sfn: Fix typo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23702>
2023-06-20 12:22:45 +00:00
Gert Wollny
bd93d6b2fb virgl: don't allow vertex input arrays on GLES hosts
v2: - use new HOST_IS_GLES flag (Corentin)
    - drop stray fprintf (Emma)
    - reorder cases to avoid code replication

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15550>
2023-06-20 11:50:37 +00:00
Illia Polishchuk
a2d40c09b7 zink, drirc: Add Borderlands 2 workaround to fix spir-v 1.6 translated discard
The game expects HLSL discard behavour

But it fails only on Zink because GLSL discard translates to
nir_intrinsic_discard (BRW_PREDICATE_ALIGN1_ANY4H in native Intel asm)
but Zink replaces it with OpTerminateInvocation SPIR-V and it translates to
nir_intrinsic_terminate (BRW_PREDICATE_NORMAL in native Intel asm)

Bisected commit in ZINK: bd816084

On AMD it works because they enabled the
glsl_correct_derivatives_after_discard by default: !10522 (17861aff)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9205
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23694>
2023-06-20 08:48:02 +00:00
Christian Gmeiner
1dade03b1f etnaviv: remove not used tgsi includes
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23738>
2023-06-20 08:29:19 +00:00
Christian Gmeiner
c784a3db7f etnaviv: drop usage of tgsi_swizzle_names
Gets rid of extern usage.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23738>
2023-06-20 08:29:19 +00:00
Christian Gmeiner
c9ced5abde etnaviv: remove tgsi remains
tokens member was not used for a long time.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23738>
2023-06-20 08:29:19 +00:00
Juan A. Suarez Romero
ab6aa14f42 v3d: clear alpha-only as red-only
When clearing an alpha-only format, set the alpha channel into red
channel.

Fixes `spec@ext_texture_integer@multisample-fast-clear
gl_ext_texture_integer`.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23497>
2023-06-20 07:45:31 +00:00
Juan A. Suarez Romero
91c5602026 gallium/util: fix color clamp for alpha-only formats
Alpha format only contains one channel, but it is placed in the 4th
position, not 1st.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23497>
2023-06-20 07:45:31 +00:00
Tapani Pälli
e1d7861dd6 isl: handle DRM_FORMAT_MOD_INVALID in isl_drm_modifier_has_aux
This fixes crashes with piglit.spec.ext_external_objects.* tests on TGL
that started to trigger with commit 8bc7bcfa0c.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23718>
2023-06-20 06:43:07 +00:00
Yonggang Luo
b8f8146c6e gallium: Remove unused os_process.h in gallium/auxiliary
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23503>
2023-06-20 05:02:51 +00:00
Yonggang Luo
3851a65579 dd: Replace the usage of os_get_process_name with util_get_process_name in dd_draw.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23503>
2023-06-20 05:02:51 +00:00
Yonggang Luo
e287d39f4d zink: Replace the usage of os_get_process_name with util_get_process_name
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23503>
2023-06-20 05:02:51 +00:00
Mykola Piatykop
25fcf0adc3 mesa: Fix use after free.
Reset the pointer to the earlier free st_context.
Check the st_context pointer before st_glFlush.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8195

Signed-off-by: Mykola Piatykop <mykola.piatykop@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21656>
2023-06-20 04:13:43 +00:00
Caio Oliveira
cb588d5d6e compiler/clc: Move related NIR passes to the common mesa clc
These were historically in the spirv+nir combo, but the common mesa clc
is a better home for them.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Nora Allen <blackcatgames@protonmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23667>
2023-06-20 03:43:41 +00:00
Caio Oliveira
be3e4c8aaf compiler/clc: Rename the internal library from libclc to libmesaclc
There is an actual external libclc and we do use it, so rename the
internal common library to avoid confusion.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Nora Allen <blackcatgames@protonmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23667>
2023-06-20 03:43:41 +00:00
Caio Oliveira
0c387249e1 intel/compiler: Move brw_kernel.c to the intel_clc target
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23667>
2023-06-20 03:43:40 +00:00
Lionel Landwerlin
ba42012857 anv: add VK_EXT_depth_bias_control support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23716>
2023-06-20 03:05:01 +00:00
Lionel Landwerlin
f39fa39809 vulkan/runtime: add support for EXT_depth_bias_control
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23716>
2023-06-20 03:05:01 +00:00
Lionel Landwerlin
6249ff17ca vulkan: registry/headers bump to 1.3.254
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23716>
2023-06-20 03:05:01 +00:00
Lionel Landwerlin
1a6e45d32b anv: switch copy query results with shaders from semaphore waits to flushes
Since we expect the number of copies to be > 6, emitting fewer
commands makes more sense.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
2023-06-20 02:34:51 +00:00
Lionel Landwerlin
61496915c2 anv: tracking query buffer writes & query clears separately
Clears should be flushed only on :
  - vkCmdBeginQuery*
  - vkCmdWriteTimestamp*
  - vkCmdWriteAccelerationStructuresPropertiesKHR
  - vkCmdCopyQueryPoolResults

Buffer writes should be flush only on :
  - vkCmdCopyQueryPoolResults

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
2023-06-20 02:34:51 +00:00
Lionel Landwerlin
0339ec4240 anv: fix pending query bits for compute only command buffers
If we do the clear operations on a compute only command buffer, the
operations will not use render target writes but compute shader writes
instead.

Probably not an issue right now because this is not a feature we've
enabled.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
2023-06-20 02:34:51 +00:00
Lionel Landwerlin
8c548700b6 anv: change the way we clear pending query bits
Instead of having genX(emit_apply_pipe_flushes) doing the clearing,
ask genX(emit_apply_pipe_flushes) for the emitted bits and do the
clearing using a helper.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
2023-06-20 02:34:51 +00:00
Lionel Landwerlin
cab8495625 anv: track buffer writes from shaders for query results writes
In the following sequence :
   - write buffer B with a shader
   - barrier on buffer from shader-write to transfer
   - vkCmdCopyQueryPoolResults to buffer B

The barrier should take care of ordering things between the shader
writes and vkCmdCopyQueryPoolResults.

The problem is that vkCmdCopyQueryPoolResults runs on the command
streamer and that is not coherent or synchronized in the same way as
shaders.

This change marks the barrier has potentially containing pending
buffer writes for queries so that we can insert the necessary flush
for vkCmdCopyQueryPoolResults later.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9013
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
2023-06-20 02:34:51 +00:00
Lionel Landwerlin
1f72296f2c anv: add missing query clear flush for acceleration structure queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a787728906 ("anv: enable blorp query reset for performance queries")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
2023-06-20 02:34:50 +00:00
Karol Herbst
4431e5a222 compiler/types: fix size of padded OpenCL Structs
In C the size of a struct { uin32_t a; uint8_t b; } is 8, not 5, so we have
to account for the biggest alignment across all struct members.

Funny that the OpenCL CTS doesn't catch that.

Fixes: 44d32e62fb ("glsl: add cl_size and cl_alignment")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23701>
2023-06-20 01:55:38 +00:00
Yonggang Luo
8e452e385b c11: Implement os_time_get_nano with timespec_get(&ts, TIME_MONOTONIC)
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Yonggang Luo
45bd24708a c11: Improve mtx_timedlock to use timespec_get instead of time(NULL)
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Yonggang Luo
66a99f619f c11: Improve timespec_get to support TIME_MONOTONIC TIME_ACTIVE TIME_THREAD_ACTIVE TIME_MONOTONIC_RAW
As c11 already provided timespec_get, to avoid symbol conflict, use c23_timespec_get as the function name
and define timespec_get c23_timespec_get to achieve that

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Yonggang Luo
785ca13323 wsi: Fixes passing argument 1 of ‘mtx_unlock’ from incompatible pointer type
../../src/vulkan/wsi/wsi_common_display.c:2908:15: error: passing argument 1 of ‘mtx_unlock’ from incompatible pointer type [-Werror=incompatible-pointer-types]
 2908 |    mtx_unlock(&wsi->wait_mutex);
      |               ^~~~~~~~~~~~~~~~
      |               |
      |               pthread_mutex_t *

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Yonggang Luo
2e4f874fa5 freedreno: Fixes error: passing argument 1 of ‘pthread_mutex_unlock’ from incompatible pointer type in tu_pipeline.c
src/freedreno/vulkan/tu_pipeline.c:4723:25: error: passing argument 1 of ‘pthread_mutex_unlock’ from incompatible pointer type [-Werror=incompatible-pointer-types]
 4723 |    pthread_mutex_unlock(&dev->pipeline_mutex);
      |                         ^~~~~~~~~~~~~~~~~~~~
      |                         |
      |                         mtx_t *
In file included from ../../src/freedreno/vulkan/tu_common.h:14,
                 from ../../src/freedreno/vulkan/tu_pipeline.h:13,
                 from ../../src/freedreno/vulkan/tu_pipeline.c:10:
/usr/include/pthread.h:835:51: note: expected ‘pthread_mutex_t *’ but argument is of type ‘mtx_t *’
  835 | extern int pthread_mutex_unlock (pthread_mutex_t *__mutex)

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Caio Oliveira
1f3869ed4e nir/print: Use mesa_scope_name() function to print scopes
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Caio Oliveira
45bd6cfe28 compiler: Add mesa_scope_name() function
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Caio Oliveira
59cc77f0fa compiler: Move from nir_scope to mesa_scope
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Karol Herbst
4d26b38caf rusticl/program: pass our max param size along to the spirv validator
Fixes "api min_max_parameter_size" in spir-v mode

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23700>
2023-06-19 22:54:59 +00:00
Karol Herbst
99a480ba9b clc: allow passing custom validator options
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23700>
2023-06-19 22:54:59 +00:00
Karol Herbst
8f7da6f052 clc: fix SPIRVMessageConsumer for NULL src
This happens if we pass our own validator options. It's nothing we can
control, SPIRV-Tools just passes NULL instead of "input".

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23700>
2023-06-19 22:54:59 +00:00
Gert Wollny
e09754c658 r600/sfn: Clean up FS member initialization
All members that are initialized with predefined values should
be initialized with the declaration.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23717>
2023-06-19 22:40:44 +00:00
Gert Wollny
201b46e487 r600/sfn: on R600/R700 write a dummy pixel output if there is a gap
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9223

Fixes: 98d65120cb
  r600/sfn: Fix FS out handling

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23717>
2023-06-19 22:40:44 +00:00
Lionel Landwerlin
0e728ea7b0 anv: avoid private buffer allocations in vkGetDeviceImageMemoryRequirementsKHR
The whole point of vkGetDeviceImageMemoryRequirementsKHR is to avoid
creating an image so we should completely avoid any allocation like
the private binding.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4075dd16ab ("anv: implement vkGetDeviceImageMemoryRequirementsKHR")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23720>
2023-06-19 18:35:30 +03:00
Karol Herbst
714e11fe04 rusticl/format: enable all trivial to support optional image formats
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:07 +02:00
Karol Herbst
976ba09f57 rusticl/format: move format table generation into a macro
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:05 +02:00
Karol Herbst
9112aeb4a4 rusticl/format: document cl to pipe format mapping
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:03 +02:00
Karol Herbst
092abd8b9a rusticl/format: add required format table for CL2.0
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:01 +02:00
Karol Herbst
6a874d7615 rusticl/format: drop req_for_3d_image_write_ext
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:58 +02:00
Karol Herbst
d0ba3ab0b5 rusticl/format: extract required format checks into const functions
Also dropping the 3D image write special case, because there is nothing in
the spec treating it differently.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:56 +02:00
Karol Herbst
ceb1c292b5 rusticl/format: extract CL format to pipe format mapping into const function
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:54 +02:00
Karol Herbst
6a259c0b94 rusticl/format: pass order and type to rusticl_image_format directly
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:51 +02:00
Karol Herbst
4999f9995e rusticl/mem: fix validation of packed image formats
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:48 +02:00
Karol Herbst
73f86c9b9d rusticl/mem: cache the pipe_format
This moves the expensive to_pipe_format call to image creation time.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:45 +02:00
Karol Herbst
ff95349285 docs/cl: improve reporting of image features
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:44 +02:00
Eric Engestrom
d0dd0ad1c3 Revert "ci: remove clang-format testing"
This reverts commit d666a8d259.

Let's move past that tantrum and hope we can have an adult conversation
if one person wants to go against all the other developers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23719>
2023-06-19 11:19:42 +01:00
Eric Engestrom
ec8932fd63 radv: fix formatting
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23719>
2023-06-19 11:19:42 +01:00
Illia Abernikhin
45a0de8491 docs: remove i965 features from docs/features.txt
Upgrade docs/features.txt

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4990
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17251>
2023-06-19 12:02:39 +03:00
Illia Abernikhin
125700cf8b docs: add crocus features to docs/features.txt
Upgrade docs/features.txt with crocus extensions

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17251>
2023-06-19 12:02:39 +03:00
Illia Abernikhin
aa20ea7c5e docs: add iris features to docs/features.txt
Upgrade docs/features.txt with iris extensions

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17251>
2023-06-19 12:02:39 +03:00
Iago Toral Quiroga
5cdb2371fd v3dv: expose shaderImageGatherExtended
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
e31aff59d8 broadcom/compiler: handle textureGatherOffsets
There is a lowering in NIR for this so we just need to enable it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
0de89e10ba nir/lower_tex: handle lower_tg4_offsets with lower_tg4_broadcom_swizzle
This pass uses a safe iterator so it can't lower new instructions that are
injected as part of the lowering, which is exactly what lower_tg4_offsets
does, and if lower_tg4_broadcom_swizzle is also set then we need to lower
these new instructions. Handle this by running the pass twice when both
are set: the first pass will only handle lower_tg4_offsets and
the second pass (which will see the new tg4 instructions produced with
lower_tg4_offsets) will process the remaining options, including
lower_tg4_broadcom_swizzle.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
65353814a3 nir/lower_tex: copy missing fields when creating copy of tex instruction
This is missing both texture and sampler indices.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Samuel Pitoiset
3208844539 radv: use cs_execute_ib() for GFX, MBCP and DGC IBs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00
Samuel Pitoiset
afbe187715 radv/amdgpu: add cs_execute_ib() for executing IBs
This will be used to implement support for DGC with RADV_DEBUG=noibs,
DGC for secondaries and for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00
Samuel Pitoiset
0551954e80 radv/amdgpu: remove useless assert in radv_amdgpu_winsys_cs_submit_internal()
The zero CS submission path is used instead, and this assertion isn't
really useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
2023-06-19 07:33:35 +00:00
Samuel Pitoiset
8e1579a214 radv/amdgpu: fix a buffer overflow for submissions with RADV_DEBUG=noibs
With RADV_DEBUG=noibs (aka no chaining) the number of IBs to submit
depends on the number of old IB buffers of every CS.

This fixes a stack smashing error.

Fixes: 53b439d24f ("radv/amdgpu: Use STACK_ARRAY for IB array to reduce stack usage."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
2023-06-19 07:33:35 +00:00
Samuel Pitoiset
795bf984c6 radv: reserve space for shadowed regs
Tested on RDNA2, hopefully the space reservation is large enough for
other chips as well.

Fixes: 7893040f80 ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23672>
2023-06-19 07:07:37 +00:00
Samuel Pitoiset
a5cdc4840d radv: use IB for the GFX preamble on GFX6
GFX6 supports IBs without any issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
2023-06-19 06:48:21 +00:00
Samuel Pitoiset
e20a0f32f2 radv: do not use IB for the GFX preamble with RADV_DEBUG=noibs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
2023-06-19 06:48:21 +00:00
David Heidelberg
7e56f0389b ci/docs: fixup incorrect spacing around console block
Fixes: dcf5dfbbf8 ("ci: implement farms handling trough files inside .ci-farms")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23713>
2023-06-18 19:29:00 +00:00
Gert Wollny
e0ca73e96d r600/sfn: Don't deref unused group slots
Fixes: e57643cf5 (r600/sfn: Add handling for R600 indirect access alias handling)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9219

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23711>
2023-06-18 19:01:01 +00:00
Gert Wollny
3a569fbf9b r600: Split tex CF only if written component is read
There is no need to split the CF if only the register ID
in a previous write is the same, we should look at the actual
slots instead, ut we have also to take writes of 0 and 1 into
account.

Cc: mesa-stable

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23710>
2023-06-18 07:22:14 +00:00
Marek Olšák
da4b5b4a47 intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
d666a8d259 ci: remove clang-format testing
The way it's used is unacceptable. Here's the change it suggested:

    diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
    index 05b9cb0a3f1..e58abfa885f 100644
    --- a/src/amd/vulkan/radv_device.c
    +++ b/src/amd/vulkan/radv_device.c
    @@ -783,8 +783,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
        device->overallocation_disallowed = overallocation_disallowed;
        mtx_init(&device->overallocation_mutex, mtx_plain);

    -   if (physical_device->rad_info.register_shadowing_required ||
    -       device->instance->debug_flags & RADV_DEBUG_SHADOW_REGS)
    +   if (physical_device->rad_info.register_shadowing_required || device->instance->debug_flags & RADV_DEBUG_SHADOW_REGS)
           device->uses_shadow_regs = true;

        /* Create one context per queue priority. */

This is the dumbest reason to prevent merging a MR. I don't want to see this
in projects I work on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
845ed015dd radeonsi: remove gfx10 NGG streamout
Unused and unstable. Keep it only for gfx11.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
283be8ac3b radeonsi: handle GE_CNTL and IA_MULTI_VGT_PARAM as a tracked register
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
12b123fdb7 radeonsi: handle VGT_LS_HS_CONFIG like a tracker register
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
7065bbdc23 radeonsi: handle VGT_GS_OUT_PRIM_TYPE like a tracked register
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
315231b5a5 radeonsi: eliminate redundant compute SH register changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
35fa013545 radeonsi: handle demoted si_pm4_set_reg_idx3 as si_pm4_set_reg
to allow merging packets; otherwise no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
29e1d0ac4f radeonsi: set non-graphics uconfig registers first in the preamble
we want to keep all SH registers next to each other, so that we can use
only one SET_SH_REG_PAIRS_PACKED packet

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
52087d5772 radeonsi: remove sscreen parameter from si_pm4_set_reg_idx3
si_pm4_state now contains the screen.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
7d2a0bda77 radeonsi: add more variables into si_pm4_state and rework how it's created
to be used later

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
8c7e32fb33 radeonsi: don't needlessly invalidate L0/L1 caches at the beginning of IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c5a565d094 radeonsi: don't do PFP_SYNC_ME before CP DMA and compute blits
It's not needed before them, and we already set it after them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
76664c1677 radeonsi: shrink the last field of tcs_offchip_layout due to LDS limit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c89ca3b47f radeonsi: change si_emit_derived_tess_state into a state atom
This splits the state into an update function and an emit function
setting the registers, and only 2 functions update it: set_patch_vertices
and si_update_shaders.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
d891bd7c3a radeonsi: fix RB+ and gfx11 issues with framebuffer state
This fixes most gfx11 test failures.

Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
9fd5561d77 radeonsi/ci: add glx@glx-visuals-stencil to skips because it gets stuck often
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
229c3b7827 radeonsi: set register_shadowing_enabled if AMD_DEBUG=shadowregs is set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
f0eb548e7b amd: skip redundant INDEX_TYPE even with register shadowing
same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
2ce24402d6 amd: skip redundant PKT3_NUM_INSTANCES even with register shadowing
same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
6349d3f537 amd: update shadowed register tables for gfx11
The new table format is identical to the source to facilitate backporting.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c8efd2b2cf amd: add a new helper that prints all non-shadowed regs
for validating our tables against register definitions

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
f43d68d7ac amd: remove ac_check_shadowed_regs
not useful anymore

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
6e19b6d97f amd: remove non-shadowed register tables
not useful

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
93dbdde313 amd: fix GPU cache sizes retrieved from the kernel
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c33622d931 amd: don't set PA_RATE_CNTL because it has no effect
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
3e5aa9e717 amd: increase the attribute ring size on gfx1103_r1
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
9316258449 amd: rename mid_command_buffer_preemption_enabled -> register_shadowing_required
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
789a3b24c1 amd: improve the IB parser, parse more packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
95a85d1b37 amd: update SET_*_REG_PAIRS* documentation and remove radeon_info options
All released firmware supports the packets.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
9078301ff8 radeonsi: don't convert L8A8 to R8A8 when blitting via compute to fix gfx7
Fixes: 0482ff3158 - radeonsi: don't do image stores with RGBX, L, LA, I, and SRGB formats
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8707
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9176

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Karol Herbst
d9eedda917 rusticl: advertize cl_khr_spirv_no_integer_wrap_decoration
It's supported with all drivers already.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23708>
2023-06-18 01:21:40 +02:00
Karol Herbst
9985247e71 docs/cl: fix whitespace issues and add missing entries
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23708>
2023-06-18 01:21:25 +02:00
Karol Herbst
a9ddee677b rusticl: advertize cl_khr_extended_versioning
We already implemented the OpenCL 3.0 core bits, but the extension also
has a `CL_DEVICE_OPENCL_C_NUMERIC_VERSION_KHR` query.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23707>
2023-06-17 22:20:06 +00:00
Karol Herbst
f969e9a137 rusticl/version: use cl_version instead of cl_uint and provide a From impl
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23707>
2023-06-17 22:20:05 +00:00
Karol Herbst
dce0665705 rusticl/device: sort cl_device_info queries
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23707>
2023-06-17 22:20:05 +00:00
Karol Herbst
c7751c7f7d rusticl/device: add intel usm queries DPCPP cares about
We don't implement them and we don't advertise the extension, but DPCPP
queries them regardless. We ultimately plan to implement the intel USM
extension. However until we do, just return 0 for those queries.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23705>
2023-06-17 20:19:12 +00:00
Marek Olšák
2f1e62f831 gallium/hud: append results to files instead of overwriting them
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23706>
2023-06-17 13:59:05 -04:00
Iván Briano
6e5eb0afd3 anv: do not explode on 32 bit builds
Fixes: 930e862af7 ("anv: add shaders for copying query results")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9213

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23686>
2023-06-16 22:22:07 +00:00
David Heidelberg
dcf5dfbbf8 ci: implement farms handling trough files inside .ci-farms
- Disable farm with `git mv .ci-farm{,-disabled}/$farm_name`.
 - Re-enable farm with `git mv .ci-farm{-disabled,}/$farm_name`.

NEVER MIX FARM MAINTENANCE WITH ANY OTHER CHANGE IN THE SAME MERGE REQUEST!

Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23629>
2023-06-16 22:03:14 +00:00
David Heidelberg
2146e91e98 ci/crocus: depend on state of the Anholt farm
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23629>
2023-06-16 22:03:14 +00:00
David Heidelberg
da12b40a49 ci/amd: hide vaapi job dependent on Collabora farm when it's down
Fixes: ae9c67d773 ("ci/amd: add radeonsi-raven-va-full job to cover all VA-API tests")

Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23629>
2023-06-16 22:03:14 +00:00
David Heidelberg
fe844dd72b ci/etnaviv: if farm is down, we expect no manual jobs can be triggered
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23629>
2023-06-16 22:03:14 +00:00
David Heidelberg
7377bdd66b ci/windows: move microsoft farm rules
No functional changes intended, align with other farms.

Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23629>
2023-06-16 22:03:14 +00:00
Charmaine Lee
63c883ee00 svga: lower images before ntt
ntt requires lowered images, so call gl_nir_lower_images first before
passing the shader to ntt.

Fixes piglit failures spec@glsl-4.30@execution@built-in-functions@cs*

Fixes: 0ac9541804 ("gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR")

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23697>
2023-06-16 21:44:22 +00:00
Thomas H.P. Andersen
4f1a3955c4 tgsi: remove unused functions and structs
These are no longer used and can be removed

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23637>
2023-06-16 20:59:38 +00:00
Eric Engestrom
62b9e6e937 ci: enforce formatting for RADV & ACO
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Eric Engestrom
6b21653ab4 aco: reformat according to its .clang-format
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Eric Engestrom
8b319c6db8 radv: reformat according to its .clang-format
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Eric Engestrom
1725d9aa67 radv,aco: tweaks to get clang-format to print nicer code
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Eric Engestrom
3ac00f9db3 clang-format: add explanation for anyone reading .clang-format-include
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Eric Engestrom
5db031bf3e egl: return correct error for EGL_KHR_image_pixmap
EGL_KHR_image_pixmap says:
> If <target> is EGL_NATIVE_PIXMAP_KHR, and <ctx> is not EGL_NO_CONTEXT,
> the error EGL_BAD_PARAMETER is generated.

Reported-by: Rohan Garg <rohan@garg.io>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/166
Fixes: a1c4a8a3c8 "egl: Add support for EGL_KHR_image."
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/454>
2023-06-16 18:29:26 +00:00
Jianxun Zhang
84b47f0d26 iris: Support MTL modifier MC_CCS
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
f71c42bc2c intel/isl: Add MTL MC CCS modifier into modifier info
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
71b7355aae iris: Support I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC modifier
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
a45f5500dd intel/isl: Add MTL RC CCS CC modifier into modifier info
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
d9392d97c7 iris: Support I915_FORMAT_MOD_4_TILED_MTL_RC_CCS modifier
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
898c7252c1 intel/isl: Add MTL RC CCS modifier into modifier info
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
b2136dbe6f include/uapi: Update drm_fourcc.h from drm kernel
From:
ba57b9b11f78530146f02b776854b2b6b6d344a4
Merge: 959294e47953 24335848e543
Author: Dave Airlie <airlied@redhat.com>
Date:   Fri Jun 9 16:43:35 2023 +1000

    Merge tag 'drm-intel-gt-next-2023-06-08' of
    git://anongit.freedesktop.org/drm/drm-intel into drm-next

    UAPI Changes:

    - I915_GEM_CREATE_EXT_SET_PAT for Mesa on Meteorlake.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Jianxun Zhang
8bc7bcfa0c iris: Fix memory alignment when importing dmabuf (GFX12.5)
Fix the failure in modifier tests on MTL:

../src/intel/common/intel_aux_map.c:609: intel_aux_map_add_mapping:
Assertion `(address & get_page_mask(main_page_size)) == 0' failed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
2023-06-16 17:32:10 +00:00
Yonggang Luo
94d827332f dri: Replace usage of boolean/TRUE/FALSE with bool/true/false
First do the find/replace in src/gallium/frontends/dri/ folder,
then fixes the compiling errors manually:
Because of this, the prototype of functions in include/GL/internal/dri_interface.h
are changed

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23582>
2023-06-16 16:52:48 +00:00
Konstantin Seurer
7f3874981d radv/rt: Enable RT pipelines on GFX10_3+ excluding vangogh
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23677>
2023-06-16 16:13:34 +00:00
Konstantin Seurer
49b400423c Revert "radv: Enable ray tracing pipelines by default"
This partially reverts commit 374bd4e1be.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23677>
2023-06-16 16:13:34 +00:00
Friedrich Vock
b49afd6ce2 radv: Add the BOs of all shaders in a RT pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23681>
2023-06-16 14:47:03 +00:00
Georg Lehmann
99e44cc527 aco/opcodes: delete wrong comment copy pasted from NIR
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21882>
2023-06-16 13:45:38 +00:00
Georg Lehmann
fe3993447d aco: remove v_cvt_pkrtz_f16_f32_e64 when it's actually VOP2
More consistent with how we handle all the opcodes which were moved to VOP3.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21882>
2023-06-16 13:45:38 +00:00
Georg Lehmann
49bdc3a1c2 aco/opcodes: move v_cndmask_b32 back to the VOP2 list
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21882>
2023-06-16 13:45:38 +00:00
Tony Wasserka
89c86af39e aco/spill: Use arena allocator for spills
Gives a marginal speedup.

Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12000>
2023-06-16 12:46:01 +00:00
Tony Wasserka
73835f4b09 aco/spill: Use arena allocator for next use distances
Speedup of aco::spill(): ~50%

Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12000>
2023-06-16 12:46:01 +00:00
Karol Herbst
b3aae9c556 nouveau: eliminate busy waiting on fences
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19543>
2023-06-16 11:42:18 +00:00
Tapani Pälli
8f2680871d anv: convert most pc in genX_cmd_buffer to use pc helper
Some are left, batch_set_preemption does not have devinfo pointer
and IndirectStatePointersDisable does not have corresponding ANV bit.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
9f3b51255a anv: change most pipe controls in gfx8_cmd_buffer to use pc helper
One using a flag (PSDSyncEnable) that has no corresponding ANV bit.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
b3589a8899 anv: change pipe control in indirect draw gen to use pc helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
6a7dcd3e12 anv: change pipe controls in genX_gpu_memcpy to use pc helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
e70cf3ea98 anv: change pipe control in genX_pipeline to use pc helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
c232269db4 anv: change pipe controls in genX_state to use pc helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
6dc95685f3 anv: convert genX_query pipe controls to use pc helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
d8c76f8844 anv: implement invalidate part of emit_apply_pipe_flushes with helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
9f6f69e0f9 anv: implement flush part of emit_apply_pipe_flushes with helper
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tapani Pälli
c3658f5a5d anv: wrap pipe control emission to a set of helper functions
This makes it possible to have HW specific rules and WA's implemented
in a central place. Also all pipe controls will get anv_debug_dump_pc.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23583>
2023-06-16 08:04:20 +00:00
Tim Pambor
1ad79cb84f virgl: Fix stack overflow in virgl_bind_sampler_states
Triggered on hosts with more than 32 samplers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9207
Fixes: 63c4c559 ("virgl: obtain supported number of shader sampler views from host")
Signed-off-by: Tim Pambor <tp@osasysteme.de>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23678>
2023-06-16 07:34:41 +00:00
Samuel Pitoiset
0e726c63ff radv: add dgc_emit_index_buffer()
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_INDEX_BUFFER_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
a842f37dff radv: add dgc_emit_draw_indexed() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_DRAW_INDEXED_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
0551c54dff radv: add dgc_emit_draw() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_DRAW_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
bb24e17d44 radv: add dgc_emit_vertex_buffer() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_VERTEX_BUFFER_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
be05e0e7a4 radv: add dgc_emit_push_constant() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_PUSH_CONSTANT_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
cc3a9b90a9 radv: add dgc_emit_state() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_STATE_FLAGS_NV.
The scissor workaround for GFX9 is only needed if the state is emitted,
so move it there as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
1d0c18ba3b radv: remove unused radv_dgc_token struct
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Dave Airlie
562e890f2c ac/radeonsi: add av1 defaults header file from radeonsi
This just moves this header file so radv can use it.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23640>
2023-06-16 05:53:44 +00:00
Mike Blumenkrantz
b7f37265ac lavapipe: correctly update shader object per-stage push constant sizes
Fixes: 8b3022c918 ("lavapipe: implement EXT_shader_object")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>
2023-06-16 03:09:41 +00:00
Mike Blumenkrantz
6e4971b510 lavapipe: fix shader binary binding with mesh shaders
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>
2023-06-16 03:09:41 +00:00
Mike Blumenkrantz
cb03191e82 lavapipe: more fixes for sample shading
this fixes the case where a draw without sample shading precedes
a draw with sample shading without changes to the sample mask

Fixes: cc9e958053 ("lavapipe: fix DS3 min sample setting")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>
2023-06-16 03:09:41 +00:00
Mike Blumenkrantz
9aff38c7ca aux/trace: add methods for mesh shaders
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23663>
2023-06-16 03:09:41 +00:00
Karol Herbst
8f9514fc63 clc: static assert that clc_optional_features has no padding
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23685>
2023-06-15 23:31:27 +00:00
Matt Turner
ce467c6b33 meson: Remove reference to removed SWR driver
Fixes: e2de00876a ("gallium/swr: Remove common code and build options")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23679>
2023-06-15 22:55:51 +00:00
Dylan Baker
bea9111749 bin/pick-ui: use asyncio.new_event_loop
Instead of .get_event_loop, which is deprecated when there isn't a
running loop (like in our case).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>
2023-06-15 22:37:31 +00:00
Dylan Baker
0630a599fc bin/pick: Add support for adding notes on patches
This is pretty useful for keeping track of why a patch isn't landed, or
who I'm waiting on feedback from.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>
2023-06-15 22:37:31 +00:00
Dylan Baker
41394187aa bin/pick: use lineboxes to make the UI clearer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>
2023-06-15 22:37:31 +00:00
Dylan Baker
dd760f8846 bin/pick: fix issue where None for nomination_type could fail
We have an assumption it's never None, so use a special value in the
Enum instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23472>
2023-06-15 22:37:31 +00:00
Karol Herbst
3f48d84296 rusticl/spirv: Key optional clc features when caching.
Sadly I can't use serde yet, so I have to do this nonsense.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23532>
2023-06-15 19:30:36 +00:00
Karol Herbst
23cbe6b0d5 clc: add commment to clc_optional_features to ensure no padding exists
Hopefully this is good enough.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23532>
2023-06-15 19:30:36 +00:00
Erik Faye-Lund
0d5673d635 docs: upgrade bootstrap to 5.3.0
The release version of Bootstrap 5.3.0 is out, let's upgrade from the
alpha-version we were using.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23423>
2023-06-15 19:18:39 +00:00
Karol Herbst
c9a00d6676 nv50/ir: resolve -Woverloaded-virtual=1 warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23656>
2023-06-15 18:48:10 +00:00
Karol Herbst
6c73c6cec6 nv50/ir: use override
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23656>
2023-06-15 18:48:10 +00:00
Mike Blumenkrantz
a734dba415 zink: more anv ci flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23683>
2023-06-15 18:21:49 +00:00
Yiwei Zhang
c8d8961f33 anv: avoid requiring ordered memory planes for explicit import
The spec does not have such requirement, but anv requires it for
validating the offset. However, for DRM_FORMAT_YVU420, chroma channels
can be swapped upon import to match B/R channel order of
VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.

This fixes some sw codec path in Instagram when interop with gpu.

v2: fix image memory requirement for re-ordered explicit import

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net> (v1)
Reviewed-by: Matt Tuner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23643>
2023-06-15 17:53:10 +00:00
Alyssa Rosenzweig
0a6d919c53 asahi: Use bitfield_extract for texture lowering
This makes descriptor crawls a lot easier to read, which is good because more
are coming.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23351>
2023-06-15 13:08:44 -04:00
Alyssa Rosenzweig
1636037b66 agx: Implement bitfieldExtract natively
We have a bfeil instruction which mostly maps to the GLSL thing, so use it with
the appropriate lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23351>
2023-06-15 13:08:44 -04:00
Alyssa Rosenzweig
fc3bf53a65 nir/builder: Add ubitfield_extract_imm helper
We have a ubfe_imm helper that creates ubfe ops. Not all drivers support ubfe,
however, as it requires SM5 semantics. A few drivers support oly
ubitfield_extract. They should still get the convenience of an _imm helper, so
add a symmetric helper.

It might be nice to unify these helpers into a single helper that asserts its
inputs do not overflow (such that the two ops become equivalent) and emits
either ubfe or ubitfield_extract depending on the underlying driver. That is
left for future work as it's unclear exactly what naming/semantics we want.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23351>
2023-06-15 13:08:41 -04:00
SoroushIMG
7f8e172ecf pvr: add missing frag to geom dependency for jobs targetting same render target
Seen as a firmware assert when using a debug build of the firmware
and tested against:

dEQP-VK.pipeline.monolithic.render_to_image.core.1d_array.huge.width_layers.r8g8b8a8_unorm_d16_unorm

Signed-off-by: SoroushIMG <soroush.kashani@imgtec.com>
Acked-by: James Glanville <james.glanville@imgtec.com>
Reported-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23651>
2023-06-15 16:35:21 +00:00
Caio Oliveira
44ed3e7341 microsoft/clc: Add unreachable() to fix 'may be unitialized' warning
In function ‘lower_load_kernel_input’,
      inlined from ‘clc_nir_lower_kernel_input_loads’ at ../src/microsoft/clc/clc_nir.c:205:28:
  ../src/microsoft/clc/clc_nir.c:169:7: warning: ‘base_type’ may be used uninitialized [-Wmaybe-uninitialized]
    169 |       glsl_vector_type(base_type, nir_dest_num_components(intr->dest));
        |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  ../src/microsoft/clc/clc_nir.c: In function ‘clc_nir_lower_kernel_input_loads’:
  ../src/microsoft/clc/clc_nir.c:151:24: note: ‘base_type’ was declared here
    151 |    enum glsl_base_type base_type;
        |                        ^~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23666>
2023-06-15 16:17:13 +00:00
Pavel Ondračka
6007dcbb33 r300: remove unused opcodes from r300_tgsi_to_rc
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:26 +00:00
Pavel Ondračka
ffedd60901 r300: remove unused LIT lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:26 +00:00
Pavel Ondračka
69c9f4631e r300: remove unused ROUND lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Pavel Ondračka
d56edd8d18 r300: remove unused DST lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Pavel Ondračka
20bd7bb6fa r300: remove unused POW lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Pavel Ondračka
127941ef1b r300: remove unused FLR lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Pavel Ondračka
a181372022 r300: move CEIL lowering to NIR
Also remove unused backend CEIL lowering.

Single regressed gnome-shell shader due to fceil followed by f2i32
where before nir_lower_int_to_float would recognize that we already
have integer and emit mov instead of trunc for the f2i32. We can
clean this up easily once we move ntt to the backend.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Pavel Ondračka
e16894fb5a r300: remove unused SSG lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Pavel Ondračka
3a3b9b7a63 r300: remove unused SIN/COS lowering
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
2023-06-15 15:59:25 +00:00
Konstantin Seurer
daac72de3a radv/rt: Stop forcing wave32 by setting compute_subgroup_size
We end up reporting the wrong subgroup size this way.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23572>
2023-06-15 15:20:35 +00:00
Nanley Chery
397e728ef4 iris: Drop GPGPU Tex Invalidate restriction for TGL+
According to the HW docs, TGL+ no longer requires that a CS stall be
added to a texture cache invalidate done in the compute pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18725>
2023-06-15 14:57:18 +00:00
Nanley Chery
e3b794c184 iris: Drop the RT flush for PIPE_BARRIER_TEXTURE
The render target flush would have been needed if it was possible to:

1) pollute the render cache and write to the data port in one draw
   call.

2) perform a subsequent operation that assumed the render cache was
   up-to-date.

However, this is not possible for the two glMemoryBarrier barrier bits
that get translated to this pipe barrier:

* GL_TEXTURE_FETCH_BARRIER_BIT is only used for sampling operations.
  It's possible to pollute the render cache and data cache with writes
  to a texture in one draw call (1). However, the GL spec states that
  apps cannot assume that any existing render caches are up-to-date for
  sampling the written locations immediately afterwards. Apps are
  required to use glTextureBarrier before the sampling operation, so
  requirement #2 is not satisfied.

* GL_PIXEL_BUFFER_BARRIER_BIT could be used for a PBO upload (2), but
  it's not possible to pollute the render cache and data cache with a
  PBO access in one draw call. PBOs cannot be bound to framebuffers
  for rendering, so requirement #1 is not satisfied.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18725>
2023-06-15 14:57:18 +00:00
Nanley Chery
bb6d300b3a Revert "iris: Add missed tile flush flag"
This reverts commit 0523607ebb.

The issue that commit worked around seems to have been fixed as of
commit 1c8b4940eb ("iris: Emit flushes for push constant source
buffers"). I could no longer reproduce it from that point onward with
this revert applied.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18725>
2023-06-15 14:57:17 +00:00
Nanley Chery
f0b6b57c77 intel/blorp: Avoid 32bpc fast clear sampling issue
For 32bpc formats, the ICL+ sampler fetches the raw clear color dwords
used for rendering instead of the converted pixel dwords typically used
for sampling. The CLEAR_COLOR struct page documents this for 128bpp
formats, but not for 32bpp and 64bpp formats.

In blorp_copy, map R11G11B10_FLOAT to R8G8B8A8_UINT instead of R32_UINT.
This will cause the sampler to fetch the clear color pixel, allowing
drivers to keep clear color support enabled during copies.

If iris is forced to convert blits to copies, this patch fixes the
following test on gfx12:

  dEQP-GLES3.functional.fbo.color.repeated_clear.blit.rbo.r11f_g11f_b10f

At the moment, both iris and anv won't hit this issue outside of
blorp_copy. This is due to the read/write access restrictions they
currently place on texture views that reinterpret the surface format.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8964
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23604>
2023-06-15 14:17:49 +00:00
Erik Faye-Lund
a593de7cf3 nir: add missed nir_cmp_imm-helpers
Seems I missed these in my previous round, let's fix them up now!

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:49 +00:00
Erik Faye-Lund
3a64e3425f nir: add and use nir_imod_imm
Just a short-hand, really. Makes the code a bit easier to read.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:49 +00:00
Erik Faye-Lund
e1f4c79288 nir: add and use nir_fdiv_imm
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:49 +00:00
Erik Faye-Lund
590e191e77 nir: use nir_imm_{true,false}
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:48 +00:00
Erik Faye-Lund
9e5cd02fae nir: isub -> iadd_imm
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:48 +00:00
Erik Faye-Lund
8b03a54bcd nir: use more imm-helpers
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:48 +00:00
Erik Faye-Lund
2dd5f2cfb4 mesa/st: use nir_imm_vec4
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
2023-06-15 13:34:48 +00:00
Alyssa Rosenzweig
84856cabfc iris: Don't use STREAMING_LOAD without SSE
isl will assert out otherwise. Hit this with intel_stub_gpu on arm64, but it is
a legitimate bug since someone might plug a DG2 card into a workstation-grade
arm64 or ppc64 supporting PCIe (it exists).

This forward ports the logic from crocus, which checks for both SSE at a
compile-time level as well as in the CPU caps. This might be excessive since DG2
cards apparently wouldn't work properly on old non-SSE x86 boxes anyway? I just
crocus-and-pasted.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23608>
2023-06-15 13:14:28 +00:00
Mike Blumenkrantz
1e46ca673c dri3: only invalidate drawables on geometry change if geometry has changed
this is otherwise pointless

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23649>
2023-06-15 12:22:24 +00:00
Erik Faye-Lund
2a71e332aa nir: use new immediate comparison helpers
There's plenty of places we can use these new and shiny helpers, so
let's clean up the code a bit.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23460>
2023-06-15 13:33:58 +02:00
Erik Faye-Lund
f7bf0c774f nir: add nir_[fui]gt_imm and nir_[fui]le_imm helpers
These are similar to the nir_{cmp}_imm variants we already have, except
they negate the condition (apart from equality) and flip the arguments.
The reason we need this, is that we don't have all comparison directions
that would be required to always pass the immediate in the second
argument.

This allows us to create any comparison with an immediate without
having to manually create the immediate value.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23460>
2023-06-15 13:33:58 +02:00
Rhys Perry
4291cc5255 ac: fix PIPE_FORMAT_R11G11B10_FLOAT DST_SEL_W
Previously, the W component would be incorrect for attributes using this
format when loaded in RADV's vertex shader prologs.

Fixes dEQP-VK.pipeline.fast_linked_library.vertex_input.*b10g11r11*missing_components*

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6a2ada93b4 ("ac: add ac_vtx_format_info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23645>
2023-06-15 10:33:03 +00:00
Luigi Santivetti
5638b768e6 pvr: fix division by block size in blit
dEQP-VK.pipeline.monolithic.image.suballocation.\
 sampling_type.combined.view_type.2d.\
 format.etc2_r8g8b8_unorm_block.count_1.size.13x13

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23591>
2023-06-15 08:51:41 +00:00
Karmjit Mahil
4eb9d22b9e pvr: Remove outdated finishme
The color attachment load is being handled just below the finishme.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23619>
2023-06-15 08:33:09 +00:00
Karmjit Mahil
10c0c68f47 pvr: Dedup a check with pvr_is_render_area_tile_aligned()
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22657>
2023-06-15 09:15:09 +01:00
Gert Wollny
c57a49c234 r600/sfn: Downgrade some error message to warning
This doesn't seem to be an error, so just print a warning when
warnings are enabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23665>
2023-06-15 06:45:56 +00:00
Gert Wollny
2a4a93a848 r600/sfn: Silence warnings "overloaded-virtual"
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23665>
2023-06-15 06:45:56 +00:00
Samuel Pitoiset
71b6108f67 radv: reset some dynamic states when the fragment shader stage is unbound
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23494>
2023-06-15 06:23:33 +00:00
Samuel Pitoiset
80153a8666 radv: fix re-emitting early_z/late_z when the bound PS changes
This state depends on the fragment shader.

Fixes: d740e283e1 ("radv: implement VK_EXT_attachment_feedback_loop_dynamic_state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23494>
2023-06-15 06:23:33 +00:00
Samuel Pitoiset
00968f38ca radv: fix re-emitting some dynamic states when the previous FS is NULL
If the previous FS is NULL, some dynamic states still need to be
re-emitted.

Doesn't fix anything known.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23494>
2023-06-15 06:23:33 +00:00
Christian Gmeiner
e93d6abeb7 mesa/arbprog: fix compile errors
When DEBUG_FP is set I see the following compiler errors:

../../src/gitlab_mesa/src/mesa/program/arbprogparse.c: In function '_mesa_parse_arb_fragment_program':
../../src/gitlab_mesa/src/mesa/program/arbprogparse.c:133:4: error: implicit declaration of function '_mesa_print_program'; did you mean '_mesa_parse_arb_program'? [-Werror=implicit-function-declaration]
  133 |    _mesa_print_program(&program->Base);
      |    ^~~~~~~~~~~~~~~~~~~
      |    _mesa_parse_arb_program
../../src/gitlab_mesa/src/mesa/program/arbprogparse.c:133:32: error: 'struct gl_program' has no member named 'Base'
  133 |    _mesa_print_program(&program->Base);
      |                                ^~
cc1: some warnings being treated as errors

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23644>
2023-06-15 05:47:32 +00:00
Qiang Yu
c36e0e3f79 ac/nir/ngg: fix ngg_gs_clear_primflags crash
We get current_clear_primflag_idx_var==NULL when stream 0 output
number is known, so output_compile_time_known==true. But we also
need this variable when stream 1~3 output number is unknown or
vertex number is less than a primitive's needs.

Fixes: 60ac5dda82 ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23614>
2023-06-15 05:27:30 +00:00
Mike Blumenkrantz
ff1e667e45 zink: strip format list when disabling mutable during image creation
drivers shouldn't be getting a format list if it won't be used

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>
2023-06-15 05:02:37 +00:00
Mike Blumenkrantz
0c17eadac0 zink: drop dt checks for mutable format init
these are no longer applicable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>
2023-06-15 05:02:37 +00:00
Mike Blumenkrantz
9e83723a21 zink: add srgb mutable for all resources by default
this should enable compression on more intermediate fb attachments

it also means that VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT can now be set
on images where ZINK_BIND_MUTABLE is not set, so non-resource APIs need
to check ZINK_BIND_MUTABLE

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>
2023-06-15 05:02:37 +00:00
Mike Blumenkrantz
1859f191c3 zink: wrap format mismatch checks for blit/surface
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>
2023-06-15 05:02:37 +00:00
Mike Blumenkrantz
5511a08a1c zink: remove redundant conditional in set_sampler_views
it's redundant, but it checks a different flag so it consumes cycles

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23514>
2023-06-15 05:02:37 +00:00
Caio Oliveira
26f456203c compiler/types: Use hash table pre-hashed functions for type caching
Calculate the hash outside the critical region, then use that both
for search and insertion.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23280>
2023-06-15 04:16:22 +00:00
Caio Oliveira
40ba00238b compiler/types: Tidy up the asserts in get_*_instance functions
Use the local variable in the assertions, move them out the critical region.
No behavior change.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23279>
2023-06-15 03:43:46 +00:00
Caio Oliveira
efbbdeffc0 compiler/types: Be consistent when naming array element/size
The element type passed is different than the array type and it is not
a "base type" in the glsl_type sense, so pick a name that reflects that.
Also stick to a single name for the array_size.

Just renames, no behavior change.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23279>
2023-06-15 03:43:46 +00:00
Jesse Natalie
83f741124b nir_lower_returns: Mark assert-only var as ASSERTED
Fixes: 5d238c0c ("nir_lower_returns: Optimize phis before beginning the pass")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23634>
2023-06-15 03:09:29 +00:00
Dave Airlie
13df91d7d7 radv/video: restrict the number of IBs on video related queues.
The hardware gets given a session context from userspace in each
submission, but if the session context changes the hardware wants
a FENCE to be emitted to know it can give up the current session.

IF a test submits interleaved session ctx access and uses a single
vulkan submit the hardware crashes, unless each IB is submitted
in a separate submission so the fence can be sent.

In theory it could be possible to construct a single command buffer
to trigger this so I do think the hardware should be smarter here.

Should this be fixed in the kernel to always emit a fence between
IBs?

Fixes: dEQP-VK.video.decode.h264_interleaved

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23641>
2023-06-15 02:49:00 +00:00
LingMan
0535948535 rusticl: fix UB in CLProp machinery
Viewing structs as a collection of u8 is not generally sound. Any padding bytes might be
uninitialized and creating an integer from uninitialized memory constitutes producing an invalid
value, which is instant UB.

Since we only copy these bytes around, the fix is to simply work with MaybeUninit<u8>, which can handle uninitialized memory just fine, instead.

See: https://doc.rust-lang.org/reference/behavior-considered-undefined.html
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>
2023-06-15 02:31:19 +00:00
LingMan
fdcb86168d rusticl: drop cl_prop_for_type macro
There's no reason to differentiate between primitive types and structs here. `cl_prop_for_struct`
can handle primitive types just fine.
Drop `cl_prop_for_type` and rename the existing `cl_prop_for_struct` to `cl_prop_for_type`.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>
2023-06-15 02:31:19 +00:00
LingMan
cf43a74c79 rusticl: drop CLProp implementation for String
Route the data to the implementation for &str instead. It works just as fine.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>
2023-06-15 02:31:19 +00:00
LingMan
f1461c5a77 rusticl: core: stop using cl_prop from the api module
It's a layering violation and really the wrong tool for the job. Add a new fn to view a given slice
as a &[u8] instead of going though the clprop machinery which creates a new Vec.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23652>
2023-06-15 02:31:18 +00:00
Charmaine Lee
2755519142 svga: fix compute shader type after ntt
Reset compute shader type after ntt.

Fixes: 0ac9541804 ("gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR")

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23659>
2023-06-15 02:11:38 +00:00
Karol Herbst
095fee55f8 rusticl: enforce using unsafe blocks in unsafe functions
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23660>
2023-06-15 01:53:11 +00:00
Mike Blumenkrantz
4edbe8f5a0 zink: add mem debugging
modeled off turnip's debug infra, this adds debug printing for oom
scenarios

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23653>
2023-06-15 01:31:24 +00:00
Mike Blumenkrantz
65fad783c7 zink: break out vk flag unrolling into util function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23653>
2023-06-15 01:31:24 +00:00
Ian Romanick
de60b463d7 nir/algebraic: Simplify various trivial bfi
These are mostly just obvious patterns that somebody will eventually
want to add.

DG2, Tiger Lake, Ice Lake, Skylake, Broadwell, and Haswell had similar
results (Ice Lake shown)
total instructions in shared programs: 20570033 -> 20570026 (<.01%)
instructions in affected programs: 7363 -> 7356 (-0.10%)
helped: 6 / HURT: 0

total cycles in shared programs: 902118781 -> 902118854 (<.01%)
cycles in affected programs: 419132 -> 419205 (0.02%)
helped: 4 / HURT: 2

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
Totals:
Instrs: 152819500 -> 152819380 (-0.00%)
Cycles: 15014627187 -> 15014624437 (-0.00%)

Totals from 115 (0.02% of 662497) affected shaders:
Instrs: 28963 -> 28843 (-0.41%)
Cycles: 404582 -> 401832 (-0.68%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>
2023-06-14 18:49:53 +00:00
Ian Romanick
541e7eb389 nir/algebraic: Optimize some u2f of bfi
v2: Fix a copy-and-paste bug s/('find_lsb', a)/a/ in the patterns. See
piglit!819.

DG2, Tiger Lake, Ice Lake, Skylake, and Broadwell had similar results (Ice Lake shown)
total instructions in shared programs: 20570063 -> 20570033 (<.01%)
instructions in affected programs: 452 -> 422 (-6.64%)
helped: 30 / HURT: 0

total cycles in shared programs: 902118723 -> 902118781 (<.01%)
cycles in affected programs: 1762 -> 1820 (3.29%)
helped: 0 / HURT: 29

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
Totals:
Instrs: 152819969 -> 152819500 (-0.00%)
Cycles: 15014628652 -> 15014627187 (-0.00%); split: -0.00%, +0.00%

Totals from 469 (0.07% of 662497) affected shaders:
Instrs: 7644 -> 7175 (-6.14%)
Cycles: 31787 -> 30322 (-4.61%); split: -4.90%, +0.29%

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>
2023-06-14 18:49:53 +00:00
Ian Romanick
96cde9cc01 intel/fs: Emit better code for bfi(..., 0)
DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
total instructions in shared programs: 20570141 -> 20570063 (<.01%)
instructions in affected programs: 30679 -> 30601 (-0.25%)
helped: 77 / HURT: 0

total cycles in shared programs: 902113977 -> 902118723 (<.01%)
cycles in affected programs: 3255958 -> 3260704 (0.15%)
helped: 60 / HURT: 19

Broadwell
total instructions in shared programs: 18524633 -> 18524547 (<.01%)
instructions in affected programs: 34095 -> 34009 (-0.25%)
helped: 75 / HURT: 2

total cycles in shared programs: 949532394 -> 949543761 (<.01%)
cycles in affected programs: 3419107 -> 3430474 (0.33%)
helped: 57 / HURT: 24

total spills in shared programs: 22484 -> 22484 (0.00%)
spills in affected programs: 516 -> 516 (0.00%)
helped: 2 / HURT: 2

total fills in shared programs: 29346 -> 29338 (-0.03%)
fills in affected programs: 572 -> 564 (-1.40%)
helped: 4 / HURT: 0

Haswell
total instructions in shared programs: 17331356 -> 17331523 (<.01%)
instructions in affected programs: 27920 -> 28087 (0.60%)
helped: 41 / HURT: 4

total cycles in shared programs: 936603192 -> 936574664 (<.01%)
cycles in affected programs: 3417695 -> 3389167 (-0.83%)
helped: 28 / HURT: 21

total spills in shared programs: 19718 -> 19756 (0.19%)
spills in affected programs: 436 -> 474 (8.72%)
helped: 0 / HURT: 4

total fills in shared programs: 22547 -> 22607 (0.27%)
fills in affected programs: 444 -> 504 (13.51%)
helped: 0 / HURT: 4

Ivy Bridge
total cycles in shared programs: 463451277 -> 463451273 (<.01%)
cycles in affected programs: 95870 -> 95866 (<.01%)
helped: 3 / HURT: 2

DG2, Tiger Lake, Ice Lake, and Skylake had similar results (Ice Lake shown)
Totals:
Instrs: 152825278 -> 152819969 (-0.00%); split: -0.00%, +0.00%
Cycles: 15014075626 -> 15014628652 (+0.00%); split: -0.01%, +0.01%
Subgroup size: 8528536 -> 8528560 (+0.00%)
Send messages: 7711431 -> 7711464 (+0.00%)
Spill count: 99907 -> 99509 (-0.40%); split: -0.40%, +0.00%
Fill count: 202459 -> 201598 (-0.43%); split: -0.43%, +0.00%
Scratch Memory Size: 4376576 -> 4371456 (-0.12%)

Totals from 2915 (0.44% of 662497) affected shaders:
Instrs: 2288842 -> 2283533 (-0.23%); split: -0.24%, +0.01%
Cycles: 471633295 -> 472186321 (+0.12%); split: -0.27%, +0.39%
Subgroup size: 27488 -> 27512 (+0.09%)
Send messages: 151344 -> 151377 (+0.02%)
Spill count: 48091 -> 47693 (-0.83%); split: -0.83%, +0.00%
Fill count: 59053 -> 58192 (-1.46%); split: -1.46%, +0.00%
Scratch Memory Size: 1827840 -> 1822720 (-0.28%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>
2023-06-14 18:49:53 +00:00
Ian Romanick
6603948a7a nir/algebraic: Lower some bfi with two constant sources
All Haswell and newer Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 19907054 -> 19906882 (<.01%)
instructions in affected programs: 8103 -> 7931 (-2.12%)
helped: 52 / HURT: 0

total cycles in shared programs: 855779334 -> 855781791 (<.01%)
cycles in affected programs: 724201 -> 726658 (0.34%)
helped: 38 / HURT: 7

total sends in shared programs: 1039308 -> 1039302 (<.01%)
sends in affected programs: 162 -> 156 (-3.70%)
helped: 2 / HURT: 0

No shader-db changes on any older Intel platforms.

All Intel platforms had similar restuls. (Ice Lake shown)
Totals:
Instrs: 153117340 -> 152825222 (-0.19%); split: -0.19%, +0.00%
Cycles: 15011904351 -> 15014072944 (+0.01%); split: -0.04%, +0.05%
Send messages: 7711509 -> 7711421 (-0.00%)
Spill count: 100745 -> 99907 (-0.83%); split: -0.85%, +0.02%
Fill count: 203684 -> 202459 (-0.60%); split: -0.62%, +0.02%
Scratch Memory Size: 4403200 -> 4376576 (-0.60%)

Totals from 18603 (2.81% of 662496) affected shaders:
Instrs: 5258303 -> 4966185 (-5.56%); split: -5.56%, +0.00%
Cycles: 447391388 -> 449559981 (+0.48%); split: -1.29%, +1.77%
Send messages: 559231 -> 559143 (-0.02%)
Spill count: 5009 -> 4171 (-16.73%); split: -17.17%, +0.44%
Fill count: 8769 -> 7544 (-13.97%); split: -14.33%, +0.36%
Scratch Memory Size: 194560 -> 167936 (-13.68%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>
2023-06-14 18:49:53 +00:00
Ian Romanick
e419eefd34 intel/fs: Use nir_opt_reassociate_bfi
All Skylake and newer Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 19907072 -> 19907054 (<.01%)
instructions in affected programs: 8859 -> 8841 (-0.20%)
helped: 9 / HURT: 0

total cycles in shared programs: 855791238 -> 855779334 (<.01%)
cycles in affected programs: 3308294 -> 3296390 (-0.36%)
helped: 12 / HURT: 13

Broadwell
total instructions in shared programs: 17818231 -> 17817440 (<.01%)
instructions in affected programs: 9887 -> 9096 (-8.00%)
helped: 9 / HURT: 0

total cycles in shared programs: 902970035 -> 902941221 (<.01%)
cycles in affected programs: 2767243 -> 2738429 (-1.04%)
helped: 14 / HURT: 5

total spills in shared programs: 17784 -> 17718 (-0.37%)
spills in affected programs: 318 -> 252 (-20.75%)
helped: 1 / HURT: 0

total fills in shared programs: 25458 -> 24949 (-2.00%)
fills in affected programs: 1346 -> 837 (-37.82%)
helped: 1 / HURT: 0

Haswell
total instructions in shared programs: 16707799 -> 16707586 (<.01%)
instructions in affected programs: 24049 -> 23836 (-0.89%)
helped: 41 / HURT: 0

total cycles in shared programs: 882730648 -> 882723174 (<.01%)
cycles in affected programs: 5096737 -> 5089263 (-0.15%)
helped: 25 / HURT: 12

total spills in shared programs: 14937 -> 14909 (-0.19%)
spills in affected programs: 436 -> 408 (-6.42%)
helped: 4 / HURT: 0

total fills in shared programs: 17569 -> 17529 (-0.23%)
fills in affected programs: 444 -> 404 (-9.01%)
helped: 4 / HURT: 0

No shader-db changes on any older Intel platforms.

All Intel platforms had similar results. (Ice Lake shown)
Totals:
Instrs: 153118594 -> 153117340 (-0.00%); split: -0.00%, +0.00%
Cycles: 15011967556 -> 15011904351 (-0.00%); split: -0.00%, +0.00%
Fill count: 203692 -> 203684 (-0.00%)

Totals from 703 (0.11% of 662496) affected shaders:
Instrs: 192826 -> 191572 (-0.65%); split: -0.65%, +0.00%
Cycles: 29937640 -> 29874435 (-0.21%); split: -0.25%, +0.04%
Fill count: 4146 -> 4138 (-0.19%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>
2023-06-14 18:49:53 +00:00
Ian Romanick
83bd87c558 nir: Add optimization pass to reassociate some bfi instructions
The needs of this pass are ever so slightly more than what
nir_opt_algebraic can do. :( Specifically, it needs to be able to look
at the relationship of constant values used in an expression tree.

v2: Add nir_mov_alu to handle swizzles on the original sources.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19968>
2023-06-14 18:49:53 +00:00
Mike Blumenkrantz
a085fead0c zink: add some ci flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23654>
2023-06-14 18:18:41 +00:00
Daniel Stone
2760aeb13e CI: Re-enable freedreno CI
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>
2023-06-14 17:39:29 +00:00
Daniel Stone
6af691dfff ci: Extend a618_vk_full runtime
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>
2023-06-14 17:39:29 +00:00
Daniel Stone
c41d493f77 ci: Don't retry manual or scheduled jobs
Only retry when there's some kind of non-job failure, such as
runner-internal issues, or API/network issues, etc. If the job itself
fails or times out, then given the length of these jobs, there's no
point trying again and just tying up the job slots for even more hours.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>
2023-06-14 17:39:29 +00:00
Daniel Stone
47991a094e ci: Elaborate causes for job retries
Rather than always retrying, only retry jobs on a limited set of causes.
This notably excludes retries when a job is stuck due to lack of runners
to schedule it; if we can't get a slot on a runner in time, there's no
reason to try again, since our window of opportunity has gone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23108>
2023-06-14 17:39:29 +00:00
Emma Anholt
5ef4e1c4c0 ci: Drop some skips of GL CTS ArraysOfArrays tests.
My hope is that with my CTS fix, we can complete these all in time now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>
2023-06-14 16:45:23 +00:00
Emma Anholt
97744f11cf ci: Drop skips for some previously-invalid CTS tests.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>
2023-06-14 16:45:23 +00:00
Emma Anholt
8c35537351 ci: Update to vulkan-cts-1.3.5.2 (and pull in some more fixes).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>
2023-06-14 16:45:23 +00:00
Emma Anholt
e3b0a79b3a ci/zink: Update current xfails on tgl.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23610>
2023-06-14 16:45:23 +00:00
Emma Anholt
10b94772d2 intel: Reduce cost of resetting last_grf_write.
In zink-on-anv fs-mod-dvec3-dvec3.shader_test, we were memsetting 2MB of
last_grf_write 2400 times, multiple times through the scheduler.  Just
resetting for the processed instructions reduces runtime from 21s to 16s.
No change on steam shader-db runtime across several runs.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23635>
2023-06-14 16:16:56 +00:00
Emma Anholt
7d4769e802 intel: Allocate the last_grf_write once per scheduler.
No need to re-calloc it per block when we're going to use it again.  Also,
this fixes the vec4 backend to avoid allocating giant grf_count-sized
arrays on the stack.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23635>
2023-06-14 16:16:56 +00:00
Emma Anholt
2ad865b219 intel: Count reads_remaining across all blocks.
We were zeroing it out per block, but it doesn't actually help to count
per block, since the question is "will scheduling this instruction free
the reg?".  Saves some memsetting, which was showing up high in the
profile (but not from this source).

No change on iris SKL shader-db.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23635>
2023-06-14 16:16:55 +00:00
Mike Blumenkrantz
12a47b84b7 egl/dri2: trigger drawable invalidation from surface queries for zink
this mimics dri3 behavior and avoids scenarios where renderbuffers can
get out of sync with their resources

fixes #6744

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22858>
2023-06-14 15:38:21 +00:00
Mike Blumenkrantz
1563aea69f lavapipe: add version uuid to shader binary validation
this ensures compatible shader binaries across versions

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23636>
2023-06-14 14:32:36 +00:00
Gert Wollny
b79f6ec397 r600: Disable SB if we use the ariable length DOT
sb doesn't know about this instruction, so don't try to run the
optimizer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23647>
2023-06-14 13:14:19 +00:00
Gert Wollny
269895c674 600/sfn: Trigger use of ACK for some barriers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23647>
2023-06-14 13:14:19 +00:00
Gert Wollny
d6280a8eef r600/sfn: move kill handling to fully scheduling
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23647>
2023-06-14 13:14:19 +00:00
Gert Wollny
f7e6171f3a r600: fix handling of use_sb flag
The compiler will use the unsigned bit pattern of the check and combine this
with the 1 bit, which will always result in use_sb to be zero.

Fix this by making use_sb a bool

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23647>
2023-06-14 13:14:19 +00:00
Mike Blumenkrantz
4e87d81d20 zink: add a dgc debug mode for testing
this is useful for drivers trying to implement DGC since there is no cts

do not use.

it will not make anything faster.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23550>
2023-06-14 12:37:24 +00:00
Lionel Landwerlin
6b9f838d62 intel/fs: handle load_global_constant_uniform_block_intel
Again, load the data just once in GRF, share it across lanes.

Shader-db on dg2:

total instructions in shared programs: 23214555 -> 23215400 (<.01%)
instructions in affected programs: 199977 -> 200822 (0.42%)
helped: 3
HURT: 38
helped stats (abs) min: 5 max: 670 x̄: 283.67 x̃: 176
helped stats (rel) min: 1.34% max: 49.41% x̄: 22.15% x̃: 15.70%
HURT stats (abs)   min: 1 max: 185 x̄: 44.63 x̃: 32
HURT stats (rel)   min: 0.13% max: 42.86% x̄: 10.25% x̃: 9.30%
95% mean confidence interval for instructions value: -18.65 59.87
95% mean confidence interval for instructions %-change: 3.29% 12.47%
Inconclusive result (value mean confidence interval includes 0).

total loops in shared programs: 5928 -> 5928 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total cycles in shared programs: 851137495 -> 851152449 (<.01%)
cycles in affected programs: 16406137 -> 16421091 (0.09%)
helped: 9
HURT: 32
helped stats (abs) min: 10 max: 13498 x̄: 6443.22 x̃: 5581
helped stats (rel) min: 0.11% max: 4.75% x̄: 1.45% x̃: 0.34%
HURT stats (abs)   min: 3 max: 15056 x̄: 2279.47 x̃: 735
HURT stats (rel)   min: 0.10% max: 23.71% x̄: 4.58% x̃: 4.65%
95% mean confidence interval for cycles value: -1315.40 2044.87
95% mean confidence interval for cycles %-change: 1.71% 4.80%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 11856 -> 11825 (-0.26%)
spills in affected programs: 2368 -> 2337 (-1.31%)
helped: 4
HURT: 0

total fills in shared programs: 16258 -> 16207 (-0.31%)
fills in affected programs: 2930 -> 2879 (-1.74%)
helped: 4
HURT: 0

total sends in shared programs: 1038194 -> 1038185 (<.01%)
sends in affected programs: 40 -> 31 (-22.50%)
helped: 4
HURT: 0
helped stats (abs) min: 1 max: 4 x̄: 2.25 x̃: 2
helped stats (rel) min: 10.00% max: 33.33% x̄: 21.46% x̃: 21.25%
95% mean confidence interval for sends value: -4.64 0.14
95% mean confidence interval for sends %-change: -40.41% -2.51%
Inconclusive result (value mean confidence interval includes 0).

LOST:   0
GAINED: 0

Some VK/DX titles result (on DG2 only), it's mostly additional
instruction counts except for the unity spaceship demo where a CS
shader gets additional SIMDness. The reason for additional
instructions is that since we're doing block loads, we need to find
the live channels in control flow to select a single lane value that
is valid.

aztec_ruins_high:
Totals from 3 (1.12% of 269) affected shaders:
Instrs: 17732 -> 17896 (+0.92%)
Cycles: 796518 -> 819302 (+2.86%)

cyberpunk_2077:
Totals from 17 (0.17% of 10301) affected shaders:
Instrs: 10848 -> 11658 (+7.47%)
Cycles: 248243 -> 259168 (+4.40%); split: -0.57%, +4.97%

fallout_4_dxvk_g2:
Totals from 2 (0.12% of 1638) affected shaders:
Instrs: 3157 -> 3368 (+6.68%)
Cycles: 487807 -> 490426 (+0.54%); split: -0.26%, +0.79%
Max live registers: 139 -> 141 (+1.44%)

red_dead_redemption2:
Totals from 68 (1.14% of 5970) affected shaders:
Instrs: 34871 -> 36486 (+4.63%)
Cycles: 551430 -> 565211 (+2.50%)
Send messages: 2074 -> 2072 (-0.10%)
Max live registers: 5078 -> 5077 (-0.02%)

total_war_warhammer2:
Totals from 5 (1.05% of 478) affected shaders:
Instrs: 6905 -> 6971 (+0.96%); split: -0.16%, +1.12%
Cycles: 97035 -> 97989 (+0.98%); split: -0.07%, +1.05%

unity spaceship demo (instruction count going up due to a CS shader
                      bump from SIMD8->16):
Totals from 53 (9.71% of 546) affected shaders:
Instrs: 223748 -> 233223 (+4.23%); split: -0.01%, +4.25%
Cycles: 23134697 -> 25207080 (+8.96%); split: -0.17%, +9.13%
Subgroup size: 480 -> 488 (+1.67%)
Spill count: 2156 -> 2242 (+3.99%); split: -0.19%, +4.17%
Fill count: 4617 -> 4845 (+4.94%); split: -0.09%, +5.02%
Max live registers: 5991 -> 6050 (+0.98%); split: -0.40%, +1.39%
Max dispatch width: 480 -> 488 (+1.67%)

witcher_3_dxvk_g2:
Totals from 27 (2.51% of 1074) affected shaders:
Instrs: 57067 -> 57677 (+1.07%); split: -0.03%, +1.10%
Cycles: 1397871 -> 1436704 (+2.78%); split: -0.35%, +3.13%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23477>
2023-06-14 12:04:05 +00:00
Lionel Landwerlin
4ee1a8bb9c nir: add a load_global_constant uniform intel variant
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23477>
2023-06-14 12:04:05 +00:00
Lionel Landwerlin
5ae8a78d8c intel/fs: make use of load_ubo_uniform_block_intel
The principle is the same as the load_ssbo_uniform_block_intel.
Whenever we see a uniform offset, load the data only once in GRFs to
reduce register pressure.

Iris shader-db run on DG2 :

total instructions in shared programs: 23001325 -> 23094969 (0.41%)
instructions in affected programs: 1775989 -> 1869633 (5.27%)
helped: 764
HURT: 2097
helped stats (abs) min: 1 max: 102 x̄: 6.96 x̃: 2
helped stats (rel) min: 0.03% max: 16.91% x̄: 1.36% x̃: 0.63%
HURT stats (abs)   min: 1 max: 2461 x̄: 47.19 x̃: 7
HURT stats (rel)   min: <.01% max: 199.34% x̄: 5.91% x̃: 2.60%
95% mean confidence interval for instructions value: 25.43 40.03
95% mean confidence interval for instructions %-change: 3.60% 4.33%
Instructions are HURT.

total loops in shared programs: 5847 -> 5847 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total cycles in shared programs: 839329852 -> 845491482 (0.73%)
cycles in affected programs: 130229434 -> 136391064 (4.73%)
helped: 1098
HURT: 2228
helped stats (abs) min: 1 max: 130102 x̄: 1340.64 x̃: 22
helped stats (rel) min: <.01% max: 64.25% x̄: 4.03% x̃: 0.71%
HURT stats (abs)   min: 1 max: 185309 x̄: 3426.24 x̃: 87
HURT stats (rel)   min: <.01% max: 92.85% x̄: 8.12% x̃: 3.82%
95% mean confidence interval for cycles value: 1342.16 2362.97
95% mean confidence interval for cycles %-change: 3.70% 4.52%
Cycles are HURT.

total spills in shared programs: 10768 -> 11856 (10.10%)
spills in affected programs: 9717 -> 10805 (11.20%)
helped: 25
HURT: 28

total fills in shared programs: 13720 -> 16258 (18.50%)
fills in affected programs: 12016 -> 14554 (21.12%)
helped: 25
HURT: 28

total sends in shared programs: 1034790 -> 1031266 (-0.34%)
sends in affected programs: 33416 -> 29892 (-10.55%)
helped: 1005
HURT: 0
helped stats (abs) min: 1 max: 22 x̄: 3.51 x̃: 3
helped stats (rel) min: 1.69% max: 60.00% x̄: 15.20% x̃: 14.08%
95% mean confidence interval for sends value: -3.72 -3.29
95% mean confidence interval for sends %-change: -15.82% -14.57%
Sends are helped.

LOST:   26
GAINED: 183

shader-db on a number of VK/DX titles on DG2 :

 PERCENTAGE DELTAS  Shaders   Instrs    Cycles
 age_of_wonders_III 1928      +0.02%    -0.19%

 PERCENTAGE DELTAS       Shaders   Instrs    Cycles  Subgroup size Send messages Spill count Fill count Max live registers Max dispatch width
 assassins_creed_odyssey 2119      +1.12%    -0.42%      -0.03%        -0.29%       -9.10%     -4.26%         -0.64%             +0.65%

 PERCENTAGE DELTAS Shaders   Instrs    Cycles  Spill count Fill count Max live registers
 aztec_ruins_high  269       -0.05%    -0.45%     -0.29%     -7.27%         -0.33%

 PERCENTAGE DELTAS    Shaders   Instrs    Cycles  Max live registers Max dispatch width
 dark_souls_3_dxvk_g2 1420      +0.09%    +0.24%        +0.21%             +0.12%

(stats look bad, but it's just one shader affected)
 PERCENTAGE DELTAS Shaders   Instrs    Cycles  Spill count Fill count Scratch Memory Size Max live registers
 fallout_4_dxvk_g2 1638      +0.67%    +8.32%    +16.02%     +7.17%         +100.00%            +0.48%

 PERCENTAGE DELTAS    Shaders   Instrs    Cycles  Send messages Spill count Fill count Max live registers Max dispatch width
 red_dead_redemption2 5969      +0.16%    -0.04%      -0.04%       +0.01%     +0.05%         -0.20%             +0.04%

 PERCENTAGE DELTAS          Shaders   Instrs    Cycles  Send messages Max live registers Max dispatch width
 rise_of_the_tomb_raider_g2 12129     +2.19%    +1.36%      -1.23%          -0.36%             +2.04%

 PERCENTAGE DELTAS Shaders   Instrs    Cycles  Send messages Max live registers
 shooter-game      693       +0.07%    -0.89%      -0.09%          -0.09%

 PERCENTAGE DELTAS Shaders   Instrs    Cycles  Send messages Max live registers Max dispatch width
 talos_g2          1140      +0.37%    +3.80%      -0.86%          -0.67%             +0.19%

 PERCENTAGE DELTAS    Shaders   Instrs    Cycles  Max live registers Max dispatch width
 total_war_warhammer2 477       +0.25%    +0.66%        -0.17%             +0.10%

 PERCENTAGE DELTAS Shaders   Instrs    Cycles  Send messages Max live registers Max dispatch width
 witcher_3_dxvk_g2 1074      +0.75%   -10.45%      -0.15%          -0.16%             -0.16%

 PERCENTAGE DELTAS      Shaders   Instrs    Cycles  Send messages Max live registers
 wolfenstein_youngblood 1111      +0.52%    +0.66%      -0.59%          -0.03%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23477>
2023-06-14 12:04:05 +00:00
Lionel Landwerlin
4a23a5a904 nir: add a new ubo uniform loading intrinsic for intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23477>
2023-06-14 12:04:05 +00:00
Lionel Landwerlin
7eb1e2a690 intel/fs: avoid reusing the VGRF for uniform load_ubo
Only found 3 shaders affected in Red Dead Redemption :

Totals from 3 (0.05% of 5969) affected shaders:
Instrs: 2246 -> 2230 (-0.71%)
Cycles: 156506 -> 148402 (-5.18%); split: -5.23%, +0.05%

This will have a larger effect when we add the
load_ubo_uniform_block_intel intrinsic where we will have larger
blocks (vec8/vec16 vs vec4 only now).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23477>
2023-06-14 12:04:05 +00:00
Lionel Landwerlin
ff3494fce3 intel/fs: print identation for control flow
INTEL_DEBUG=optimizer output changes from :

{ 10}   40: cmp.nz.f0.0(8) null:F, vgrf3470:F, 0f
{ 10}   41: (+f0.0) if(8) (null):UD,
{ 11}   42: txf_logical(8) vgrf3473:UD, vgrf250:D(null):UD, 0d(null):UD(null):UD(null):UD(null):UD, 31u, 0u(null):UD(null):UD(null):UD, 3d, 0d
{ 12}   43: and(8) vgrf262:UD, vgrf3473:UD, 2u
{ 11}   44: cmp.nz.f0.0(8) null:D, vgrf262:D, 0d
{ 10}   45: (+f0.0) if(8) (null):UD,
{ 11}   46: mov(8) vgrf270:D, -1082130432d
{ 12}   47: mov(8) vgrf271:D, 1082130432d
{ 14}   48: mov(8) vgrf274+0.0:D, 0d
{ 14}   49: mov(8) vgrf274+1.0:D, 0d

to :

{ 10}   40: cmp.nz.f0.0(8) null:F, vgrf3470:F, 0f
{ 10}   41: (+f0.0) if(8) (null):UD,
{ 11}   42:   txf_logical(8) vgrf3473:UD, vgrf250:D(null):UD, 0d(null):UD(null):UD(null):UD(null):UD, 31u, 0u(null):UD(null):UD(null):UD, 3d, 0d
{ 12}   43:   and(8) vgrf262:UD, vgrf3473:UD, 2u
{ 11}   44:   cmp.nz.f0.0(8) null:D, vgrf262:D, 0d
{ 10}   45:   (+f0.0) if(8) (null):UD,
{ 11}   46:     mov(8) vgrf270:D, -1082130432d
{ 12}   47:     mov(8) vgrf271:D, 1082130432d
{ 14}   48:     mov(8) vgrf274+0.0:D, 0d
{ 14}   49:     mov(8) vgrf274+1.0:D, 0d

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23477>
2023-06-14 12:04:05 +00:00
Karol Herbst
5b3ff7e3f3 rusticl/queue: overhaul of the queue+event handling
This new approach handles things as follows:
1. Fences won't be attached to events anymore, applications only wait on
   the cv attached to the event.
2. Only the queue is allowed to update event status for non user events.
   This will eliminate all remaining status updating races between the
   queue and applications waiting on events.
3. Queue minimized flushing by bundling events
4. Increase cv wait timeout as there is really no point in waking up too
   often.

Reduces amount of emited fences on radeonsi in luxmark 3.1 luxball by 90%

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23612>
2023-06-14 11:14:46 +00:00
Iago Toral Quiroga
6114e66124 broadcom/compiler: only use last thread switch flag to detect final section
Since commit 'c98ddc778a3 broadcom/compiler: force a last thrsw for spilling'
we always ensure we signal the last thread section explicitly with a
last thread switch.

Relying on VPM stores to detect the last thread section is particularly bad,
because we can have VPM stores occurring quite early in a shader program,
which would disable TMU spilling almost entirely.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22461>
2023-06-14 09:27:50 +00:00
Alejandro Piñeiro
dfdbf5bf94 broadcom/compiler: clarify use of QFILE_VPM
This was only used for version < 40 (See commit 22a02f3e3).

Adding some extra explanations and asserts of places where it is used.

As we are here also move the definition of a register with QFILE_VPM,
to avoid defining it if not needed.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22984>
2023-06-14 09:03:35 +00:00
Lionel Landwerlin
0cd9f0c3d3 intel/fs: fix bindless/shared surface mistake
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 068bf1378d ("intel/fs: enable SSBO accesses through the bindless heap")
Tested-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23536>
2023-06-14 07:42:57 +00:00
Lionel Landwerlin
b3b12c2c27 anv: enable CmdCopyQueryPoolResults to use shader for copies
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:57 +03:00
Lionel Landwerlin
e86f3c7abb intel/ds: add query count in query tracepoints
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:57 +03:00
Lionel Landwerlin
930e862af7 anv: add shaders for copying query results
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:57 +03:00
Lionel Landwerlin
4cee8ce7a5 anv: generalize internal kernel concept
We'll add more of those kernels for other purposes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:57 +03:00
Lionel Landwerlin
7ca5c84804 anv: add support for simple internal compute shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:57 +03:00
Lionel Landwerlin
dbbcd5c32c anv: factor out generation kernel dispatch into helper
We would like to reuse this mechanism to dispatch different types of
internal shader. Those would replace some of the command streamer
commands we currently use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:57 +03:00
Lionel Landwerlin
455a13fb7f anv: limit ANV_PIPE_RENDER_TARGET_BUFFER_WRITES to blorp operations using 3D
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:56 +03:00
Lionel Landwerlin
d7c28e526b anv: fix incorrect batch for 3DSTATE_CONSTANT_ALL emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:56 +03:00
Lionel Landwerlin
0da39bf8ee anv: disable mesh/task for generated draws
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:56 +03:00
Lionel Landwerlin
e9c1eaa535 anv: only disable mesh when enabled at the VkDevice level
Saving ourselves some instructions since it's not going to get used.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
2023-06-14 09:43:56 +03:00
Samuel Pitoiset
d096a3f1a6 radv: fix smooth lines with graphics pipeline library
Need to be defensive here.

Fixes recent CTS
dEQP-VK.pipeline.fast_linked_library.extended_dynamic_state.*.line_raster_mode_smooth.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
2023-06-14 05:54:57 +00:00
Samuel Pitoiset
8f88cf3b42 radv: do not force VRS 1x1 when smooth lines are enabled
Otherwise this will break VRS with GPL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
2023-06-14 05:54:56 +00:00
Samuel Pitoiset
f6c01cd1dc radv: add a helper for forcing VRS 1x1 in some situations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
2023-06-14 05:54:56 +00:00
Samuel Pitoiset
642a0972f0 radv: gather info about load_poly_line_smooth_enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23200>
2023-06-14 05:54:56 +00:00
Lynne
5ce784e5c9 radv/video: reject unsupported hevc profiles and bit depths
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23625>
2023-06-14 03:59:40 +00:00
Lynne
d7d0ccdc51 radv/video: reject non-8bit H264
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23625>
2023-06-14 03:59:40 +00:00
Lynne
758e6a8f2f radv/video: reject general unsupported video formats
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23625>
2023-06-14 03:59:40 +00:00
Charmaine Lee
a6a687b197 svga: fix shader type after ntt
Set shader type to TGSI after ntt. Fixes assert in svga_create_shader.

Fixes: 0ac9541804 ("gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR")

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23638>
2023-06-14 03:43:27 +00:00
Mike Blumenkrantz
d19bb4bc57 zink: add some ntv asserts for ms txf
it's illegal to do ms txf without a ms image

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22900>
2023-06-14 02:01:59 +00:00
Mike Blumenkrantz
9b8adebfca zink: assert that ntv image creation isn't clobbering existing images
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22900>
2023-06-14 02:01:59 +00:00
Mike Blumenkrantz
d032de726a zink: massively shrink qbo size for timestamp queries
timestamp queries can only ever record a single value, so
the qbo only needs to be large enough for that single value

fixes #9092

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23631>
2023-06-14 01:22:44 +00:00
Dave Airlie
e816c10638 radv/video: program hevc max dec pic buffering correctly
This programs it like vaapi does.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23613>
2023-06-14 00:37:05 +00:00
Dave Airlie
ff4e9fa2d5 radv/video: program frame number correctly.
doesn't appear to fix anything, but is more correct.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23613>
2023-06-14 00:37:05 +00:00
Lionel Landwerlin
efd4a162d3 anv: always report all pipeline stats regardless of stages
Tools like the scripts in shader-db expect all the fields to be there,
as the stats are put into a CSV file. So just report 0 if a stage
doesn't support workgroup memory size.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23559>
2023-06-13 23:26:40 +00:00
Lionel Landwerlin
810da51e91 anv: report max simd width only once for fragment shaders
Reporting the value multiple times is confusing to shader-db scripts
because it believes multiple shaders are affected.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23559>
2023-06-13 23:26:40 +00:00
Lionel Landwerlin
a0a20164eb anv: deal with unsupported VkImageFormatListCreateInfo::pViewFormats
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 697ed61e7c ("anv: Improve image/view usage bits verification")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9190
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23606>
2023-06-13 20:16:46 +00:00
Friedrich Vock
374bd4e1be radv: Enable ray tracing pipelines by default
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23603>
2023-06-13 19:38:27 +00:00
Friedrich Vock
fa7c7791ee radv: Add RADV_DEBUG=nort
This makes vkCmdTraceRaysKHR and ray queries no-ops and is useful
for triaging GPU hangs with raytracing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23603>
2023-06-13 19:38:27 +00:00
Mike Blumenkrantz
c17d0cc488 lavapipe: use PACKAGE_VERSION for cache uuid in release builds
MESA_GIT_SHA1 is defined as "", which results in invalid access

fixes #7673

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20520>
2023-06-13 19:22:01 +00:00
Mike Blumenkrantz
68ded42a38 radv: directly use vk_format_map for vertex input
this is much faster than calling a non-inline function with
conditionals to index the same array

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23599>
2023-06-13 18:38:27 +00:00
Mike Blumenkrantz
6650d89d4c vk: make vk_format_map[] public
having to go through a function call for non-planar mappings can be
very slow

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23599>
2023-06-13 18:38:27 +00:00
Lucas Stach
30fb1bffd6 etnaviv: only emit sampler config for changed samplers
Currently SAMPLER_CONFIG0 is always emitted to either update the active
configuration or disable the sampler. With NTE this always emits 32 state
dwords, while there are a lot of cases that only use a small number of
samplers and never change the other samplers from their disabled state.

Track the active samplers from the last emit, so we can skip the state
emission when the sampler is already disabled. Only emit the full state
after a context flush where we don't know the previous sampler state of
the GPU.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23579>
2023-06-13 18:16:26 +00:00
Mike Blumenkrantz
8f56228ace zink: only try to create srgb mutable images if the vk format is supported
otherwise this is just a regular single-format image

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23626>
2023-06-13 17:45:38 +00:00
Mike Blumenkrantz
0d52acce1e radv: tweak gfx pipeline stage binding
iterating all the stages like this ends up unnecessarily calling
through to geometry stage binds when no shader was bound and no shader
is being bound by the power of optimization, so instead only do the unbind
part for the stages that are being unbound

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23600>
2023-06-13 17:27:05 +00:00
Alyssa Rosenzweig
12eb23530b nir: Remove non-scoped barriers
Nothing uses them anymore.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:11 +00:00
Alyssa Rosenzweig
d64f6f2f69 radeonsi: Scan for scoped barriers
Instead of control barriers, radeonsi doesn't see those anymore.

Fixes: 2d1859b01e ("radeonsi: always use scoped barrier")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:11 +00:00
Alyssa Rosenzweig
df51464cac nir: Remove handling for non-scoped barriers
Nothing generates them so this is all dead.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:11 +00:00
Alyssa Rosenzweig
c7232be537 nir/tests: Use scoped barriers internally
Test what drivers actually use.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
1d4a59448c treewide: Remove use_scoped_barrier
It is now set by all relevant drivers and not checked anywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
416d8ad384 ttn: Assume use_scoped_barrier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
7173cbccbf nir: Assume use_scoped_barrier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
5dfa8e4537 vtn: Assume use_scoped_barrier
True for all backends supporting barriers. This lets us collapse lots of code,
since scoped_barriers are based on the SPIR-V definition.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
c696fc4392 glsl: Assume use_scoped_barrier
True for all backends supporting barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
d8a45db591 ac/llvm: Drop memory_barrier_buffer impl
Both radeonsi and radv use scoped barriers, so this should not be possible to
hit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
749b4817ad ntt: Use scoped barriers
In addition to bringing us one backend closer to the scoped-only future, this
improves the generated code in cases like:

   memoryBarrierBuffer();
   memoryBarrierShared();
   controlBarrier();

With scoped_barriers + nir_opt_combine_barriers, we now emit only one MEMBAR
instruction (and a BARRIER) rather than two MEMBARs.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
d3aca1a758 ttn: Emit scoped barriers when needed
As we start converting more backends over.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
4368365fcf ir3: Drop reference to unsupported intrinsic
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Alyssa Rosenzweig
09b5e2a786 vtn: Handle atomic counter semantics
This can happen for GLSL-environment SPIR-V.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Suggested-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Erico Nunes
98fde58b3a ci: temporarily disable lima farm
The lab is currently experiencing network instability with the ISP.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23623>
2023-06-13 16:07:55 +00:00
Thomas H.P. Andersen
20e6c31ba6 r600: tgsi cleanup
337dc7d766 removed the usage of these
fields in struct r600_shader_ctx

Cleaning this up will let us drop tgsi_array_info in a later MR

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23535>
2023-06-13 15:51:54 +00:00
Karol Herbst
50085ccd11 docs: improve OpenCL features
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23622>
2023-06-13 15:47:02 +00:00
Timur Kristóf
d3d55f7747 radv: Leave primitive reset index at max on GFX8+.
GFX8+ only compares the bits according to the index type by default
(GFX9 can be changed by VGT_MULTI_PRIM_IB_RESET_EN.MATCH_ALL_BITS),
so we can always leave the programmed value at the maximum.

This reduces context rolls on GFX8+ when primitive restart is used.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23459>
2023-06-13 15:26:47 +00:00
Timur Kristóf
ce3b84cc62 radv: Remove primitive reset index from late scissor workaround.
Primitive reset has a corresponding dirty state which is already
included the used_states so it is not necessary to also check
the primitive reset index here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23459>
2023-06-13 15:26:47 +00:00
Christian Gmeiner
3d49619071 etnaviv: add support for performance warnings
These performance warnings should help to get a better understanding
where we doing non performance optimal things.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23615>
2023-06-13 14:48:05 +00:00
Tapani Pälli
00a91d8870 anv: use workaround framework for 1408224581, 14014097488
This makes sure we apply WA only when it is required, these issues
do not happen for later MTL steppings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
2023-06-13 13:27:30 +00:00
Tapani Pälli
c7c902cdbf iris: use workaround framework for 1408224581, 14014097488
This makes sure we apply WA only when it is required, these issues
do not happen for later MTL steppings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
2023-06-13 13:27:30 +00:00
Tapani Pälli
15433897b2 intel/dev: add parentheses around intel_needs_workaround macro
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
2023-06-13 13:27:30 +00:00
Pavel Ondračka
4c28c5b074 r300: be more agressive when merging A0 loads
Specifically we would bail out previously when encountering any
control flow, now we would optimize it even when the second ARL/ARR
is inside a lower level if/else branch.

shader-db

RV530:
total instructions in shared programs: 132020 -> 131924 (-0.07%)
instructions in affected programs: 3374 -> 3278 (-2.85%)
helped: 4
HURT: 0

RV370:
no change (no control flow there)

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
2023-06-13 11:52:48 +00:00
Pavel Ondračka
6de9152e3a r300: remove duplicate ARRs
We already do this for ARL, so just generalize the pass.

shader-db

RV530:
total instructions in shared programs: 132235 -> 132020 (-0.16%)
instructions in affected programs: 8492 -> 8277 (-2.53%)
helped: 41
HURT: 1
total temps in shared programs: 16900 -> 16887 (-0.08%)
temps in affected programs: 83 -> 70 (-15.66%)
helped: 13
HURT: 0

RV370:
total instructions in shared programs: 82395 -> 82320 (-0.09%)
instructions in affected programs: 4715 -> 4640 (-1.59%)
helped: 33
HURT: 1
total temps in shared programs: 12316 -> 12305 (-0.09%)
temps in affected programs: 75 -> 64 (-14.67%)
helped: 11
HURT: 0

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
2023-06-13 11:52:48 +00:00
Pavel Ondračka
a1a981f6c1 r300: optimize the load A0 pattern from wined3d
Shader-db

RV530:
total instructions in shared programs: 129701 -> 128733 (-0.75%)
instructions in affected programs: 7011 -> 6043 (-13.81%)
helped: 48
HURT: 0
total loops in shared programs: 15 -> 11 (-26.67%)
loops in affected programs: 4 -> 0
helped: 4
HURT: 0
total temps in shared programs: 16819 -> 16832 (0.08%)
temps in affected programs: 70 -> 83 (18.57%)
helped: 0
HURT: 13
total consts in shared programs: 90830 -> 90813 (-0.02%)
consts in affected programs: 4335 -> 4318 (-0.39%)
helped: 17
HURT: 0

RV370:
total instructions in shared programs: 82027 -> 81215 (-0.99%)
instructions in affected programs: 5456 -> 4644 (-14.88%)
helped: 39
HURT: 0
total temps in shared programs: 12262 -> 12273 (0.09%)
temps in affected programs: 64 -> 75 (17.19%)
helped: 0
HURT: 11
total consts in shared programs: 79119 -> 79104 (-0.02%)
consts in affected programs: 3825 -> 3810 (-0.39%)
helped: 15
HURT: 0
GAINED:5

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9157
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
2023-06-13 11:52:48 +00:00
Pavel Ondračka
886a6aa5be r300: move the ROUND+ARL->ARR fusing to main optimization loop
Its particularly important to have the copy-propagate pass run first.
So that when the round is vectorized, we don't have to follow the MOVs
to find out if it leads to ARL or not (we don't vectorize ARR/ARL at the
moment).

No shader-db change.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
2023-06-13 11:52:48 +00:00
Pavel Ondračka
f82574fb2c r300: move the ARL merging pass up in the opt loop
Specifically after the first copy propagate run but before the
second one. Removal of ARLs will enable the copy propagate to be more
aggresive, as it is very carefull in such cases.

shader-db

RV530:
total instructions in shared programs: 131861 -> 131503 (-0.27%)
instructions in affected programs: 23949 -> 23591 (-1.49%)
helped: 199
HURT: 15
total temps in shared programs: 16997 -> 16903 (-0.55%)
temps in affected programs: 767 -> 673 (-12.26%)
helped: 69
HURT: 9

RV370:
total instructions in shared programs: 82360 -> 82027 (-0.40%)
instructions in affected programs: 19516 -> 19183 (-1.71%)
helped: 183
HURT: 15
total temps in shared programs: 12370 -> 12262 (-0.87%)
temps in affected programs: 664 -> 556 (-16.27%)
helped: 73
HURT: 0

The hurt programs are due to some constant load being copy propagated
which leads to bad interaction with source conflict resolve pass later.

v2: add missing shader type initialized to the tests. Previously we were
checking for has_omod which also practically means we have a fragment
shader, however its less readable.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
2023-06-13 11:52:48 +00:00
Pavel Ondračka
453201fe74 r300: move nir stuff to r300_nir file
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23560>
2023-06-13 11:52:48 +00:00
Martin Roukala (né Peres)
6d60e38dd7 zink/ci: enable zink-radv-vangogh-valve for pre-merge testing
This should allow us to catch regressions without me having to bisect
them after they land :p

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8396
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21730>
2023-06-13 11:17:04 +00:00
Martin Roukala (né Peres)
741bfb52e6 zink/ci: add more tests to the flake list of vangogh
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21730>
2023-06-13 11:17:04 +00:00
Martin Roukala (né Peres)
e01f7323de ci/b2c: change the default first-console-activity timeout to 2 minutes
Having a high value for the first activity timeout made sense back in
the days when the machine may not be associated with salad early... but
this isn't the case anymore!

So let's go with a very conservative value of 2 minutes to boot :)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21730>
2023-06-13 11:17:04 +00:00
Juan A. Suarez Romero
acf6364068 broadcom/ci: update expected results
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23617>
2023-06-13 10:55:16 +00:00
Corentin Noël
3f71ed9e7e gallium: Rename dri_init_screen_helper into dri_init_screen
Makes it more obvious that this function is actually initializing the dri_screen
and not some helper.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:42 +00:00
Corentin Noël
ad0bcd75fd gallium: Use the common destroy function on screen initialization failure
Avoid leaking configuration options on initialization failure.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:41 +00:00
Corentin Noël
4d25ae350f gallium: Only call dri_init_options when the screen is actually created
Avoid calling this function on screen creation failure as we will discard its
result right after.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:41 +00:00
Corentin Noël
09f65f266e pipe-loader: Do not destroy the winsys on screen creation failure
The winsys is always destroyed on pipe_loader_device release.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9020
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:41 +00:00
Corentin Noël
6b4f80f7f0 pipe-loader: Document the behavior regarding screen creating failures
Avoid inconsistent behavior on screen creation failures which might lead
to double free issues.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:41 +00:00
Corentin Noël
744c849a08 gallium: Rename dri_destroy_screen_helper into dri_release_screen
This function is actually used before the use of dri_init_screen_helper so
it is not exactly releasing the memory allocated by the screen helper.

Also clear the base.screen variable after destroy to make this function
reentrant.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:41 +00:00
Corentin Noël
c2d90602ca gallium: Incorporate the device release in dri_destroy_screen_helper
The code to release the device was actually always used after the call
to this function.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23054>
2023-06-13 10:10:41 +00:00
Samuel Pitoiset
5b96a6cc2f radv/ci: update the list of expected failures on STONEY
Spurious changes but the failures are weird anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
2023-06-13 07:52:44 +02:00
Samuel Pitoiset
25d46958c5 radv: disable HTILE compression only when layouts are compressed
On RDNA2, VRS rates are part of the HTILE buffer but if we disable
HTILE completely for eg. GENERAL, VRS rates aren't read by the hw.

Fix this by disabling HTILE compression which should have the same
effect without VRS.

Fixes recent
dEQP-VK.fragment_shading_rate.renderpass2.monolithic.attachment_rate.misc.*

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
2023-06-13 07:52:44 +02:00
Samuel Pitoiset
9b141e2565 radv: emit DB_RENDER_CONTROL as part of the framebuffer
DB_RENDER_CONTROL controls whether depth/stencil rendering should be
compressed. Emitting this register as part of the framebuffer will
allow us to keep HTILE enabled for VRS rates, instead of disabling it
completely.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
2023-06-13 07:52:43 +02:00
Samuel Pitoiset
b9237bdc6b radv: reset more DB registers when emitting a null ds target
PAL does that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
2023-06-13 07:52:43 +02:00
Samuel Pitoiset
42dbfad01d radv: add a helper for emitting a null depth/stencil target
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23209>
2023-06-13 07:52:43 +02:00
Qiang Yu
b4403d8985 radeonsi: enable aco support for compute shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
2023-06-13 03:41:03 +00:00
Qiang Yu
df4f84f806 radeonsi: fix crash when AMD_DEBUG=cs,initnir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
2023-06-13 03:41:02 +00:00
Qiang Yu
5f52f8a6ba ac/llvm,radeonsi: lower nir_load_user_data_amd in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
2023-06-13 03:41:02 +00:00
Qiang Yu
0a7014328f radeonsi: add scratch_offset arg for aco cs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23540>
2023-06-13 03:41:02 +00:00
Timothy Arceri
a337a0c807 st/glsl: move linking code to the same st file
Since they call one another this makes it easier to see what is
going on without looking in multiple files.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23541>
2023-06-13 02:25:54 +00:00
Jesse Natalie
92dcaf7deb dxil: Remove custom SSBO lowering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:37 +00:00
Jesse Natalie
16aeaad73e microsoft/compiler: Don't over-align raw buffer load/store intrinsics
DXC doesn't generate these for raw loads/stores, only structured, and
old WARP had bugs with this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:37 +00:00
Jesse Natalie
38617dc726 microsoft/compiler: Don't lower bit sizes for movs
Otherwise we run into problems by putting this optimization loop
before I/O lowering, where there might still be 8-bit values that
haven't been lowered to 16 or 32. Once that's done, any remaining
movs or vec ops will have higher bit sizes already.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
ecfbc16f61 dxil: Delete load_ubo_dxil intrinsic
Instead of splitting unaligned UBO loads while still using derefs,
and then lowering load_ubo to load_ubo_dxil in lower_loads_stores_to_dxil,
use lower_mem_access_bit_sizes and lower_ubo_vec4 to handle load size and
alignment restrictions while converting to load_ubo_vec4 instead, which
has the same semantics as load_ubo_dxil.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3842
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
42877c8b63 dxil: Don't generate load_ubo_dxil directly
Just use load_ubo and let it get lowered appropriately later on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
6a5ed9e2e9 microsoft/compiler: Support load_ubo_vec4
Add support for 16-bit UBO loads, delete handling of byte-addressed
UBO loads (which I think was never used anyway) and add handling
for the component const index to optimize out unneeded extractResults.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
f960b37986 spirv2dxil: Don't lower shared/temp to explicit I/O
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
f121d8fe12 microsoft/compiler: Un-lower shared/scratch to derefs
Derefs have index-based access semantics, which means we don't need
custom intrinsics to encode an index instead of a byte offset.

Remove the "masked" store intrinsics and just emit the pair of atomics
directly. This massively reduces duplication between scratch, shared,
and constant, while also moving more things into nir so more optimizations
can be done.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
95bfee6a85 microsoft/compiler: Use mem_constant instead of shader_temp for consts
We still use shader_temp as a temporary variable mode to differentiate
which variables have simple deref patterns vs ones that need to be
lowered to ssbo, but then we put it back to mem_constant when we're
done to restore sanity.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
f9b0382faf microsoft/compiler: Emit const accesses as load_deref
There's a few changes in here that are very inter-related.

First, we stop lowering load_deref on shader_temp to load_ptr_dxil,
and just leave it as load_deref. In order for that to work, we need
the derefs to be in a shape that's acceptable to DXIL, so the only
current producer of shader_temp loads (the CLC frontend) needs to
run some lowering passes on them first.

The DXIL backend is augmented to just write out deref indices while
walking a deref chain, which will get combined in the load op into
a GEP instruction. For non-mesh/raytracing shaders, these are required
to be single-level scalar arrays, but the complexity here is preparation
for when we don't need to do that anymore.

Additionally, the const lookups are changed from using a hash table
to just putting an index on the variable.

All of this together is enough to enable the authored-forever-ago test
which uses indirect array access into a const packed struct. The
load_ptr_dxil handling didn't deal with packed structs / unaligned
accesses, but now that we're in a logical address space with derefs
instead of physical, there's no alignment to deal with anymore and
the fact that it's packed goes out the window.

This removes one custom DXIL intrinsic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
572e02a3b7 microsoft/compiler: Add some more lowering passes for derefs
DXIL requires GEP chains to point to a global variable that's a flat
array of primitive types. If we're converting deref chains to GEP
chains, we're effectively in a logical address space, which means
we can do things like change sizes of variables, since we know
they won't alias with anything else. If they could alias, we'd be
lowering them to an explicit I/O op instead. That means we can
start disabling some of the low-bit-size lowering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
d40c64c4c3 microsoft/compiler: Improvements to constant -> shader_temp pass used for CL
Now that we try harder for memcpys, we can use nir's complex usage helper.
We also can just mark the vars instead of using a hash map, since location
doesn't mean anything for constant vars.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
13e5d51f8e microsoft/compiler: Support vec/struct const vals
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
33ce7c4b90 microsoft/clc: Fix progress reporting for some lowering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
e9b2bb244b microsoft/clc: Try harder to optimize memcpys before lowering them
For the case of memset, the SPIR-V translator produces a copy from
a byte array of 0s. If we wait to lower memcpys until after types
are sized, we can potentially turn those 0s into SSA zeros and remove
the entire constant array.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
fba82797d7 nir: Optimize unpacking 16 bit values that were originally packed
I was seeing u2u64 still in my final shader after pack/unpack were
lowered, which sounds to me like some other optimizations are missing
for detecting the post-lowering pack/unpack patterns, but let's at
least add some patterns for the simple cases.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
663d957480 nir: Fix constant expression for unpack_64_4x16
Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
c70d94a889 nir_lower_mem_access_bit_sizes: Support unaligned stores via a pair of atomics
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8282
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
082eba6165 nir_lower_mem_access_bit_sizes: Move options into a struct
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
4217353e2d nir_lower_mem_access_bit_sizes: Add a bit_size input to the callback
We'd like to use this callback to adjust loads and stores from things
that are unsupported to things that are supported, but if the input
is already supported, we'd prefer not to change it. Rather than making
up a bit size that'd work and doing a bunch of pack/unpack bit math,
only return a different bit size if the input one doesn't work for us
(i.e. can't load enough memory or just an unsupported size entirely).

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
e77fe70b1e nir_lower_ubo_vec4: Delete an invalid assert
This pass handles 16-component 8-bit loads, 8-component 16-bit loads,
and 2-component 64-bit loads. The number of components for the fallback
case doesn't need to be 4.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
bb311ce370 nir: Allow atomics as non-complex uses for var-splitting passes
The var splitting pass can rearrange the variables as long as their
position in memory doesn't matter. For block-arranged variables,
or things like memcpys or casts, the layout matters, but atomics
don't imply anything about the layout of the overall variable, so
don't treat them as "complex" for this use case.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
cf9ea94958 nir_split_struct_vars: Support more modes and constant initializers
Idiomatic DXIL has constants contained within global variables rather
than a big blob of data. Doing this allows us to have 16-bit and 64-bit
data as well, where normally bitcasts would be disallowed on variable
GEP chains.

Unfortunately, DXIL validation requires SOA to be turned into AOS,
which means we need to split structs. We want to be able to run this
on nir_var_mem_constant variables which have constant initializers,
so add a bit of logic to handle that case, and relax the mode validation.
There's nothing special about the modes it was set up to handle.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
c0e41e9b3e vtn: Set is_null_constant
Note that pointers are not considered to be nir null constants, since
a null pointer value might not be 0s.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
4edfb67fd4 nir: Add is_null_constant to nir_constant
Indicates that the values contained within are 0s, regardless of
type. Enables some optimizations.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
009d2de88f nir_opt_constant_folding: Fix nir_deref_path leak
Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Dylan Baker
ce07aabab1 meson: Key whether to build batch decoder on expat
Instead of on Android. Which allows an end user to turn off expat
without breaking or disabling Intel support. I've additionally
refactored to separate expat and xmlconfig a bit more in the root
meson.build

This does make expat a hard dependency for building Intel tools, despite
the fact that only aubinator actually requires it. This simplifies the
build for the common case, and in the event that someone wants to build
the Intel tools and doesn't have libexpat, they can fall back to the
meson wrap for expat instead.

fixes: 75276deebc
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8791

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23605>
2023-06-12 23:07:00 +00:00
Jesse Natalie
b717a43826 dzn: Don't support VK R4G4B4A4_UNORM_PACK16 unless we have B4G4R4A4
Fixes: a4ce095bad ("dzn: Use A4B4G4R4 instead of B4G4R4A4 when available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23602>
2023-06-12 22:25:19 +00:00
Emma Anholt
1dd1147408 mapi: Delete execmem support code.
No longer used now that we don't dynamically generate dispatch stubs.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Emma Anholt
34808de737 mapi: Drop the unused_functions table.
Since we don't support loading an older driver with newer loader any more,
we don't need to bother tracking entrypoints that Mesa no longer supports.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Emma Anholt
a4b2825228 mesa: Drop the aliases from the remap table.
Mesa core doesn't need to have mapi sanity check that our aliases all map
to the same offset.  That's a build-time decision.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Emma Anholt
e0213a6953 mapi: Clean up mapi_stub struct.
We no longer use the address field, and the name is always a size_t offset
in the string pool (never a dynamic strduped name).

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Emma Anholt
29397f2e00 mesa: Drop the function parameter spec from the remap table.
Since we don't generate dynamic dispatch stubs any more, we don't need
this data.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Emma Anholt
398a8d43dc mapi: Delete dynamic stub generation.
Since Mesa drivers are now version-locked to the loader, that means that
we never need to support a newer hardware driver than the loader, and thus
don't need to generate dynamic dispatch stubs.  This is great news, given
that we don't test those paths, and it involved delightful features like
arrays of hex for code to be pasted into executable memory.

More code removal will follow, this is the first cut of "don't generate,
and DCE generation code".

Fixes: #9158

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Emma Anholt
3033252966 mapi: clang-format _glapi_add_dispatch().
The formatting was so broken I couldn't follow what was going on.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>
2023-06-12 21:37:37 +00:00
Alyssa Rosenzweig
5c1d614256 nir: Add interleave_agx instruction
While this is a generic bit twiddling ALU instruction, it's especially useful
for address calculations, since the architecture's tiled textures use Morton
coding within the tiles.

This will be used when lowering image_texel_address on AGX, as part of the image
atomics implementation. I don't know if there's any other neat uses I could
detect with opt_algebraic, this doesn't seem like an operation a shader would
open-code... Maybe useful for BVH building or something...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Alyssa Rosenzweig
176c3a2ab7 agx: Use common nir_steal_tex_src
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Alyssa Rosenzweig
d1b94a11bd nir/lower_tex: Use nir_steal_tex_src
The find-remove-use pattern is quite natural for texture lowering :)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Alyssa Rosenzweig
36e779e4a9 nir/builder: Add steal_tex_src helper
I have this in the AGX compiler but I want to use it in more places.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Georg Lehmann
bbda9f7390 aco: validate ir for prologs and after lower_to_hw_instr
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>
2023-06-12 19:43:17 +00:00
Georg Lehmann
2028df8757 aco: don't validate p_constaddr_addlo/p_resumeaddr_addlo operands
These can have two literals so validation would fail.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>
2023-06-12 19:43:17 +00:00
Georg Lehmann
b9854a9097 aco: move cfg validation to its own function
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>
2023-06-12 19:43:17 +00:00
Georg Lehmann
e5df6ee605 aco: make validation work without SSA temps
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>
2023-06-12 19:43:17 +00:00
Friedrich Vock
496ea57d41 radv: Add driconf to force wave64 for RT
...and enable it for Hellblade: Senua's Sacrifice.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23585>
2023-06-12 18:36:56 +00:00
Patrick Lerda
4284705733 r600: fix cayman_convert_border_color() swizzle behavior
This change fixes a buffer overflow by implementing the
special swizzles. This behavior is already available with
evergreen_convert_border_color().

For instance, this issue is triggered on a cayman gpu with
"piglit/bin/texwrap bordercolor -auto -fbo" or "piglit/bin/max-samplers -auto -fbo":
==5610==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x603000012d20 at pc 0x7fb798cb876f bp 0x7ffd78670460 sp 0x7ffd78670458
READ of size 4 at 0x603000012d20 thread T0
    #0 0x7fb798cb876e in cayman_convert_border_color ../src/gallium/drivers/r600/evergreen_state.c:2444
    #1 0x7fb798cb876e in evergreen_emit_sampler_states ../src/gallium/drivers/r600/evergreen_state.c:2539
    #2 0x7fb7989e6cb2 in r600_emit_atom ../src/gallium/drivers/r600/r600_pipe.h:655
    #3 0x7fb7989e6cb2 in r600_draw_vbo ../src/gallium/drivers/r600/r600_state_common.c:2333
    #4 0x7fb7985082c7 in u_vbuf_draw_vbo ../src/gallium/auxiliary/util/u_vbuf.c:1497
    #5 0x7fb796ef2eda in cso_draw_vbo ../src/gallium/auxiliary/cso_cache/cso_context.h:262
    #6 0x7fb796ef2eda in st_draw_gallium_multimode ../src/mesa/state_tracker/st_draw.c:170
    #7 0x7fb7970d9cfd in vbo_exec_vtx_flush ../src/mesa/vbo/vbo_exec_draw.c:341
    #8 0x7fb7970d32d7 in vbo_exec_FlushVertices_internal ../src/mesa/vbo/vbo_exec_api.c:693
    #9 0x7fb7970d32d7 in vbo_exec_FlushVertices ../src/mesa/vbo/vbo_exec_api.c:1193
    #10 0x7fb7975f237c in enable_texture ../src/mesa/main/enable.c:337

Fixes: 923d635357 ("r600: fix some border color swizzles on CAYMAN")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23435>
2023-06-12 18:15:56 +00:00
Emma Anholt
fa4e55c54f mesa/atifs: Rename the header guard.
Just a bit more cleanup as I grep around for "what TGSI is left in the GL
frontend?"

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:55 +00:00
Emma Anholt
377048700f mesa: Drop dead TGSI serialization prototypes.
Fixes: 7221cc7657 ("mesa/st: Remove now unused TGSI paths from disk cache.")

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:55 +00:00
Emma Anholt
248ac8921e mesa: Simplify st_get_nir_compiler_options().
Since b167203cfe ("mesa/st: Always generate NIR from GLSL, and use
nir_to_tgsi for TGSI drivers."), it's always set in the context.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:55 +00:00
Emma Anholt
c52d1acb42 mesa: Drop TGSI token handling
Nothing generates TGSI tokens in the frontend any more.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
0034a26a40 mesa: Always query our compute params against IR_NIR.
We only emit NIR IR, so no sense having this code for querying TGSI
instead.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
d4534eb5f4 svga: Stop asserting that compute params are queried against TGSI.
The GL frontend is about to start only querying against NIR, since it only
generates NIR.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
96bee21dc7 mesa/drawtex: Cut out the TGSI semantic translation.
Now that we don't have to generate TGSI, we can drop an indirection.
Fixing up the types here prompted a little fixup of
st_nir_make_passthrough_shader()'s types.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
0ac9541804 gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR.
Now everyone's saying NIR, and doing any NTT internally.  The only returns
of TGSI were in gallivm_get_shader_param() and
tgsi_exec_get_shader_param(), but the drivers were returning NIR instead
of calling down to them.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
de908b8d05 nine: Drop the nir_vs/nir_ps env vars.
Now that all drivers prefer NIR, there's no need for these.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
d9affb76ba svga: Switch to preferring NIR by default.
The flag has been here for a long time, it's time for SVGA to start
ingesting NIR like other drivers do.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
c3cbe610df nouveau: Delete the NV50_PROG_USE_TGSI env var.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
ae777b1836 r300: Drop RADEON_DEBUG=use_tgsi.
The NIR path is default, and well-trodden at this point.  By dropping
support for input as TGSI, we get rely on the NIR trig lowering.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
715dcf4053 r600: Drop docs for use_tgsi debug var.
Fixes: 337dc7d766 ("r600: remove TGSI code path")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
4340ec141d virgl: Drop the VIRGL_DEBUG=use_tgsi debug var.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
8dcf78d6d0 llvmpipe: Drop the LP_DEBUG=tgsi_ir debug option.
No need to support this, it's unused and untested.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
f71762f54e softpipe: Drop the use_tgsi debug flag.
We lower to TGSI inside the driver just fine, no need to ask the frontend
for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
96a0f886a7 mesa: Port the pbo.use_gs path to NIR and let it get used on NIR drivers.
Now that everyone but SVGA is requesting NIR, this path had been
effectively disabled.  I had done a partial port of the VS side in
9143c08125 ("st/nir: Fix the st->pbo.use_gs case.") for the sake of
nv50, but with it should be ready for all drivers.  Affects nv50, v3d,
d3d12, svga (I think).

Note that this GS code is slightly different from the TGSI: We put a 0 in
pos.z, rather than leaving the layer value there, because apparently v3d
didn't like those denorm Z values.

Also, it's nice to see that the NIR code is shorter than the TGSI code
was, we've made great progress on nir_builder.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
d361655aae mesa: Emit full output write in st_pbo_create_vs().
In most VS creation paths in the frontend, nir_lower_io_to_temporaries()
is called, which ensures that all outputs have a single write to them
(with a full writemask).  The builtins don't, however, and this VS was an
oddball that overwrote one channel of an output that it had already
written.  We can avoid surprises for backends (such as d3d12 and v3d) by
emitting a single write per output here.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Emma Anholt
0cffef54e5 v3d: Respect nir_intrinsic_store_output's write_mask.
Usually lower_io_to_temps sorts this out for us so you only get full
writes, but we should be able to handle it without that.  Avoids a
regression with the mesa/st PBO VS with layer output.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Konstantin Seurer
3aa1aed237 radv/ci: Test ray tracing on vkd3d-proton
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23283>
2023-06-12 16:40:29 +00:00
Xi Ruoyao
bbd4284016 Revert "glx: Remove pointless GLX_INTEL_swap_event paranoia"
This reverts commit 19c57ea3bf.

This commit is causing a reproducible crash of GNOME shell on Xorg
server.  Revert it for now and we may investigate it further in the
future.

Fixes #8542.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23589>
2023-06-12 15:35:45 +00:00
Patrick Lerda
1980934d0d nouveau: fix nouveau_heap_destroy() memory leak
Indeed, this function was not processing the linked
allocated list.

For instance, this issue is triggered with "piglit/bin/hiz-depth-read-fbo-d24-s0 -auto":
Indirect leak of 40 byte(s) in 1 object(s) allocated from:
    #0 0x7f6795638987 in calloc (/usr/lib64/libasan.so.6+0xb1987)
    #1 0x7f678bac13b9 in nouveau_heap_alloc ../src/gallium/drivers/nouveau/nouveau_heap.c:64
    #2 0x7f678bb6c7e4 in nv50_program_upload_code ../src/gallium/drivers/nouveau/nv50/nv50_program.c:490
    #3 0x7f678bb83b92 in nv50_vertprog_validate ../src/gallium/drivers/nouveau/nv50/nv50_shader_state.c:161
    #4 0x7f678bba3000 in nv50_state_validate ../src/gallium/drivers/nouveau/nv50/nv50_state_validate.c:552
    #5 0x7f678bba3c4d in nv50_state_validate_3d ../src/gallium/drivers/nouveau/nv50/nv50_state_validate.c:575
    #6 0x7f678b9e3e92 in nv50_blit_3d ../src/gallium/drivers/nouveau/nv50/nv50_surface.c:1444
    #7 0x7f678b9e3e92 in nv50_blit ../src/gallium/drivers/nouveau/nv50/nv50_surface.c:1832
    #8 0x7f678a0b378a in blit_to_staging ../src/mesa/state_tracker/st_cb_readpixels.c:337
    #9 0x7f678a0b7358 in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:516
    #10 0x7f6789f82005 in read_pixels ../src/mesa/main/readpix.c:1178
    #11 0x7f6789f82005 in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1195
    #12 0x7f6789f82ac0 in _mesa_ReadPixels ../src/mesa/main/readpix.c:1210
...
SUMMARY: AddressSanitizer: 80 byte(s) leaked in 2 allocation(s).

Fixes: 67635a0a71 ("nouveau: get rid of tabs")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23592>
2023-06-12 15:17:38 +00:00
Rohan Garg
d0e0ba897f anv: split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES for finer grained flushing
split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES into separate CS_STALL,
RT_FLUSH & TILE_FLUSH flags in order to have finer control over cache
coherency.

Tigerlake CS has it's own cache fetching directly from the memory controller,
so we need to do a tile flush to ensure the query data is visible.

This fixes test_resolve_non_issued_query_data in vkd3d on TGL.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 3c4c18341a ("anv: narrow flushing of the render target to buffer writes")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23500>
2023-06-12 14:46:44 +00:00
Lionel Landwerlin
06b436e51e anv: add query tracepoints
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23500>
2023-06-12 14:46:44 +00:00
Friedrich Vock
9de8134410 aco: Fix assert in insert_exec_mask
This assert would trigger on unconditional demotes, because the demotes
don't remove the mask_type_global flag from the exec mask.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23594>
2023-06-12 14:20:28 +00:00
Friedrich Vock
3ea01b86f0 aco: Fix live_var_analysis assert
Fixes: 3d4f6a00b ('aco/spill: allow for disconnected CFG')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23586>
2023-06-12 13:52:03 +00:00
Friedrich Vock
7f3cfcc96a aco: Reset scratch_rsrc on blocks without predecessors
Fixes hangs with raytracing in Hellblade: Senua's Sacrifice.

Fixes: 3d4f6a00b ('aco/spill: allow for disconnected CFG')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23586>
2023-06-12 13:52:03 +00:00
Timur Kristóf
67a0f2532f aco: Mark exec write used when it writes other registers.
When an exec write isn't used but writes other registers
besides exec, and also reads exec (such as s_and_saveexec),
we would mistakenly delete the previous instruction that
writes the exec value that this instruction uses.

No Fossil DB changes on Rembrandt (GFX10.3).

Fixes: 0211e66f65
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9036
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23576>
2023-06-12 15:07:55 +02:00
Karol Herbst
da4b27452b rusticl/event: ensure even status is updated in order
There was a race between the worker thread and flush, which could lead to
the last event flushed getting its status set to CL_SUCCESS before any
other event.

Just wait on all flushed events in order to solve this.

The current queue/event implementation isn't the best and we want to
rework it, so this is good enough for now.

Fixes: 47a80d7ff4 ("rusticl/event: proper eventing support")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23578>
2023-06-12 10:36:08 +00:00
Karol Herbst
e7d336bb85 rusticl/api: remove some repr(C)
The only part we strictly need repr(C) is in `CLObjectBase` and we already
didn't have it set for `Device` and it worked just fine.

We keep it on in `Platform` as this is a more hand rolled type and less
relevant.

With this we can make use of Rusts data layout which saves us some memory.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23573>
2023-06-12 09:32:16 +00:00
Karol Herbst
30559a399b rusticl/icd: fix ReferenceCountedAPIPointer::from_ptr for NULL pointers
If a NULL pointer is passed in, we have to return one as well.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23573>
2023-06-12 09:32:16 +00:00
Alan Previn
e358173fbf iris: Add GET_PARAM for protected context capability support
With MTL onwards, creating protected contexts too early
may block for a longer period. To prevent that, use the new
kernel GET_PARAM:I915_PARAM_PXP_STATUS interface to get the
status of PXP support immediately without blocking.

Using this same interface, we can also wait for platform
dependency readiness before attempting to create a protected
context. Use a longer timeout when user explicitly requests
for protected context as the kernel assures readiness will be
achieved.

Reference to kernel change: https://patchwork.freedesktop.org/patch/533241/?series=112647&rev=8

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23382>
2023-06-12 07:59:14 +00:00
Alan Previn
937325137e drm-uapi: bump headers (except AMD)
NOTE: skipped AMD header update due to build error.

From drm-next at the following commit:

commit 2e1492835e439fceba57a5b0f9b17da8e78ffa3d
Merge: 85d712f033d2 43049f17b526
Author: Dave Airlie <airlied@redhat.com>
Date:   Fri Jun 2 13:38:48 2023 +1000

Merge tag 'drm-misc-next-2023-06-01' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23382>
2023-06-12 07:59:14 +00:00
Tapani Pälli
a4bb6d7c72 anv: remove BDW specific WA for CS stall enable
This note is in BDW specs but not anymore in gfx9+ specs.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23543>
2023-06-12 05:58:44 +00:00
Martin Roukala (né Peres)
386c7a5158 radv/ci: use the low-priority runners for vangogh jobs
In order to prioritize the upcoming pre-merge jobs on VanGogh, we
limit all the post-merge jobs requiring VanGogh runners to the
low-priority pool of runners.

This will allow Marge to use any of the VanGogh runners we have (6),
while leaving 3 of them unused by post-merge jobs inside Mesa, or
DXVK-CI.

Suggested-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23548>
2023-06-12 05:29:01 +00:00
Martin Roukala (né Peres)
43d83cd0d8 ci/b2c: select the DUT to run on by name
When we have many DUTs with the same tags (or subset of tags), it is
possible for the gitlab runner name not to match the DUT picked by
valve-infra's executor.

This is needlessly confusing, and prevents specifically tagging some
runners with a low-priority tag but still have these runners execute
high-priority jobs... because a low priority job may get started by
gitlab but the corresponding DUT is being used by a high-priority
task.

To fix this, simply tell the executor which DUT we want, not just the
list of tags we want.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23548>
2023-06-12 05:29:01 +00:00
Vinson Lee
926e97d5df r600/sfn: Remove duplicate assignment
Fix defect reported by Coverity Scan.

Self assignment (NO_EFFECT)
self_assign: Assigning sh->info.fs.depth_layout to itself has no effect.

Fixes: bbd265b8e8 ("r600+sfn: Assign ps_conservative_z and switch to NIR defines")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23414>
2023-06-11 22:23:21 +00:00
Lucas Stach
12b816ce79 mesa/st: discard whole resource when mapping drawpixels texture
The texture resource has just been allocated for the whole purpose
of holding the drawpixels data. Make the drivers life a bit easier
by telling it that we aren't interested in any previous content
when mapping the resource.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23546>
2023-06-11 21:07:51 +00:00
Karol Herbst
1a975bc278 lp: align memory for long16 CL types
Fixes following OpenCL CTS test flakes:

basic kernel_memory_alignment_constant
basic kernel_memory_alignment_global
vectors vec_align_array
vectors vec_align_struct_arr

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23574>
2023-06-11 20:41:45 +00:00
Lucas Stach
8e7d434b8c etnaviv: query: optimize context flushes
Same as the transfer flushes, the flushes caused by waiting for
a query result don't need to realize context external visibility
of resource changes and can thus be a bit more lightweight.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
2023-06-11 18:41:32 +00:00
Lucas Stach
5ef6da21d9 etnaviv: query: correct max number of occlusion query samples
The real maximium for the occlusion query samples is much higher
than what the code currently claims to support as we always
allocate a full 4KB buffer to store the query results.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
2023-06-11 18:41:32 +00:00
Lucas Stach
3d98e9c2e0 etnaviv: query: correct max number of perfmon samples
The real maximium for the perfmon samples is much higher than
what the code currently claims to support as we always allocate
a full 4KB buffer to store the query results.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
2023-06-11 18:41:32 +00:00
Lucas Stach
f33a4fa602 etnaviv: query: remove incorrect comment
The allocated query buffer is always 4KB in size and can hold
a variable number of samples depending on the sample size.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
2023-06-11 18:41:32 +00:00
Lucas Stach
b6a4b988ab etnaviv: query: reset sample count on begin_query
ARB_occlusion_query specifies that the query is reset on BeginQueryARB,
not when the fetching the result of the query. This behavior also makes
a lot of sense for the perfmon queries.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
2023-06-11 18:41:31 +00:00
Lucas Stach
22d5d1bc40 etnaviv: query: move sample counter manipulation into query providers
Different query providers have different behavior on when they produce
samples: the perfmon provider provides a sample at the start and at the
end of the query, while the occlusion query provider only adds another
sample when the query is complete.

Move the sample count manipulation to the providers to be able to take
those differences into account. Removes a useless always-zero sample
for each OQ resume/suspend pair.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
2023-06-11 18:41:31 +00:00
Timur Kristóf
4452216a28 radv: Use RESET_FILTER_CAM for some mesh shading draws.
It's unclear why this is needed, but PAL uses RESET_FILTER_CAM
for some mesh shading draw packets:
- DISPATCH_MESH_INDIRECT_MULTI
- DISPATCH_TASKMESH_GFX

Let's do the same in radv.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23554>
2023-06-11 13:22:59 +00:00
Friedrich Vock
4181e144ef radv: Always flush before writing acceleration structure properties
Equivalent of 284e604872 but for acceleration structure queries.
If an app inserts a barrier between AS builds and writing AS properties,
we must respect it or things will blow up.

Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23568>
2023-06-11 08:52:03 +00:00
Karol Herbst
31fb75a08b ac/llvm: set +cumode for radeonsi
radeonsi switched over to CU wavefront execution mode, but didn't tell
LLVM. This can lead to shaders requiring too many VGPRs to be executed in
CU mode and so cause GPU resets.

Pass along +cumode to LLVM so it properly spills VGPRs.

Fixes: 9d7eab2ab1 ("radeonsi: don't enable WGP_MODE because of high cost of workgroup mem coherency")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23569>
2023-06-11 08:25:45 +00:00
Yonggang Luo
19196199a8 ac: Replace the usage of pipe_compare_func with compare_func
PIPE_FUNC_ -> COMPARE_FUNC_
pipe_compare_func -> compare_func

Now include "pipe/p_state.h" is not needed and remove it in ac_nir.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23422>
2023-06-11 06:27:05 +00:00
Martin Roukala (né Peres)
00765e7865 ci: bring back the valve farm
Valve infra is back online, sorry for the noise!

This is a partial revert of commit 628d21c521.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23571>
2023-06-11 08:53:11 +03:00
Sviatoslav Peleshko
08e95f8f8e nir/lower_shader_calls: Fix cursor if broken after nir_cf_extract() call
Fixes: e2dadda3 ("Revert "nir/lower_shader_calls: put inserted instructions into a dummy block")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8978
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22884>
2023-06-11 00:29:49 +00:00
Konrad Dybcio
ba0787f266 freedreno: Partially decode CP_PROTECT_CNTL
Give bogus but meaningful names to the bitfields that we understand.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23467>
2023-06-11 00:13:09 +00:00
David Heidelberg
628d21c521 ci: valve and freedreno farm is down
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23567>
2023-06-10 23:43:51 +00:00
norablackcat
91e5c4a82f docs: rusticl envvars list supported drivers
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23544>
2023-06-10 23:37:47 +00:00
Yonggang Luo
1555f41256 panfrost: Replace the usage of PIPE_BIND_* with PAN_BIND_*
PIPE_BIND_* belongs to gallium, do not use it in panvk

As pan_format.h also used ban panfrost gallium driver, so static_assert it equal

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23526>
2023-06-10 14:54:11 +00:00
Konstantin Seurer
51cd2965c7 aco/rt: Do not initialize the next shader addr
The uniform one is already set and the raygen shader isn't guarded
anymore.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>
2023-06-10 10:00:27 +00:00
Konstantin Seurer
4bf3d7d8cf radv/rt: Clear NIR metadata after lowering the ABI
radv_nir_lower_rt_abi inserts instructions and control flow.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>
2023-06-10 10:00:27 +00:00
Konstantin Seurer
b577f8b547 radv/rt: Do not guard the raygen shader
The condition will always evaluate to true because it's set this way by
the prolog.

Quake II RTX:

Totals from 7 (10.00% of 70) affected shaders:
Instrs: 30070 -> 30056 (-0.05%); split: -0.07%, +0.03%
CodeSize: 163476 -> 163420 (-0.03%); split: -0.06%, +0.03%
Latency: 80335 -> 83887 (+4.42%)
InvThroughput: 16870 -> 17603 (+4.34%)
Copies: 3191 -> 3215 (+0.75%)
Branches: 1273 -> 1266 (-0.55%)
PreSGPRs: 356 -> 354 (-0.56%)

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>
2023-06-10 10:00:27 +00:00
Karol Herbst
ed3f23029b ac/llvm: replace MESA_SHADER_COMPUTE checks with gl_shader_stage_is_compute
This will be required for OpenCL subgroup support on radeonsi, but also
fixes some regressions today as radeonsi started to use the subgroup id
for invocation_index calculation.

Fixes: 39da12b7c7 ("ac/llvm: clean up visit_load_local_invocation_index and visit_load_subgroup_id")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>
2023-06-10 09:33:19 +00:00
Karol Herbst
e65f561a75 ac/llvm: support vec2 on b2i16
Since radeonsi sets the alu_to_scalar callback, frontends like Rusticl
might end up generating vec2 b2i16. Support this just like it's done for
b2f16.

Fixes: d692d433f2 ("radeonsi: use nir_lower_alu_to_scalar correctly")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>
2023-06-10 09:33:19 +00:00
Chia-I Wu
5ae953b5e9 radv: disable calibrated timestamps on raven/raven2
amdgpu enables gfxoff by default and the feature resets the RLC clock
counter on idle on raven/raven2.  Querying AMDGPU_INFO_TIMESTAMP does
not work as expected on those platforms.

There was an attempt in amdgpu to read from the TSC register instead,
but it did not work without a firmware update[1].  Another possible
solution is to disable the clock counter reset by clearing
AMD_PG_SUPPORT_RLC_SMU_HS, but that causes a 0.2W increase of power
consumption on idle which is undesirable.

The clock counter reset affects vkCmdWriteTimestamp as well.  The spec
is vague on whether that is allowed or not.  The WG is aware of the
issue[2] but never really addresses it.

[1] https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html
[2] https://github.com/KhronosGroup/Vulkan-Docs/issues/216

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23481>
2023-06-10 07:02:08 +00:00
Vinson Lee
e1d948b6a2 frontends/va: Fix missing unlock
Fix defect reported by Coverity Scan.

Missing unlock (LOCK)
missing_unlock: Returning without unlocking drv->mutex.

Fixes: af695149e9 ("frontends/va: pass in film_grain_target as new output")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23488>
2023-06-10 06:01:59 +00:00
Martin Roukala (né Peres)
bb3cf3ff8e zink/ci: remove spec@nv_shader_atomic_int64@* from the fail lists
Fixes: 56eb831155 ("aco: run nir_lower_int64 after nir_opt_uniform_atomics")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23553>
2023-06-10 04:55:39 +00:00
Mark Janes
0ce595a89a intel: use generated helpers for Wa_1508744258
iris_disable_rhwo_optimization can only apply on gfxver 12.0, and has
a version check to that affect.  Add an assertion to warn us if the
workaround ever applies to another version.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21742>
2023-06-10 00:05:51 +00:00
David Heidelberg
256f64dc45 ci/android: remove the artifact file just as we unpack it
At this point is not needed anymore, remove it.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:17 +02:00
David Heidelberg
32007270b5 ci/lava: rename rest local MINIO_ variables to S3_
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:16 +02:00
David Heidelberg
78aaec836a ci: remove BUILD_PATH, always use S3_ARTIFACT_NAME
Since we use S3 artifacts for LAVA always, keep only one codepath.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:16 +02:00
David Heidelberg
2af371b3f3 ci: replace MINIO_RESULTS_UPLOAD with S3_RESULTS_UPLOAD
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:16 +02:00
David Heidelberg
deba02fddf ci: rename MINIO_HOST variable to S3_HOST
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:16 +02:00
David Heidelberg
7b6629a694 ci: rename MINIO to S3
We don't use MINIO for a long time. Rename variable accordingly.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:16 +02:00
David Heidelberg
e1737c46b9 ci: rename S3 artifacts according to scheme mesa-$arch-$config-$buildtype
Make the S3 (previously MINIO) artifacts clearly identifiable by glance.

Also now we fail before compilation, if the job doesn't define
the BUILDTYPE variable to prevent confusion.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:31:13 +02:00
David Heidelberg
d4670eea0f ci: explicitely state BUILDTYPE
Fail when a job gets introduced without build type.
It should be explicitly stated what job uses.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
2023-06-10 01:30:12 +02:00
Mykhailo Skorokhodov
40042ed25a nir: Rematerialize derefs after opt_dead_cf
Adding `nir_rematerialize_derefs_in_use_blocks_impl`
solves some cases when 'opt_dead_cf()' generates
a phi instruction for the first argument
of the `deref_store` intrinsic.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6742
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22983>
2023-06-09 21:35:21 +00:00
Filip Gawin
fb8c48f4fc anv: allow intel_clflush_range only on igpu
fixes: 521c216efc
closes: #9106

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23320>
2023-06-09 21:09:50 +00:00
Caio Oliveira
26f6ea5c30 intel/compiler: Remove unused functions and declarations
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23539>
2023-06-09 20:09:51 +00:00
Pavel Ondračka
8f4b9ed4d8 CODEOWNERS: add r300 driver
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23468>
2023-06-09 19:31:20 +00:00
Christian Gmeiner
62e0f6bf32 etnaviv: Add support for conditional rendering
The hardware doesn't support native conditional rendering, so it is
implemented by software.

Code borrowed from Freedreno and Panfrost.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23392>
2023-06-09 20:35:24 +02:00
Lucas Stach
a603413eb8 etnaviv: optimize transfer flushes
Context flushes that are triggered by a pending write to the resource
don't need to realize visibility of the resource changes outside of
the context. Skip implicit resource flushes in those cases.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23549>
2023-06-09 16:42:24 +00:00
Friedrich Vock
64fda091de aco: Lower divergent bool phis iteratively
Avoids stack overflows with really large programs.

No fossil-db changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8760
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8701

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23531>
2023-06-09 12:39:55 +00:00
Alyssa Rosenzweig
ba27071c8b agx: Fold addressing math into atomics
Like our loads and stores, our global atomics support indexing with a 64-bit
base plus a 32-bit element index, zero- or sign-extended and multiplied by the
word size. Unlike the loads and stores, they do not support additional shifting
(it's not too useful), so that needs an explicit lowering.

Switch to using AGX variants of the atomics, running our address pattern
matching on global atomics in order to delete some ALU.

This cleans up the image atomic lowering nicely, since we get to take full
advantage of the shift + zero-extend + add on the atomic... The shift comes from
multiplying by the bytes per pixel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
13535d3f9d agx: Refactor expressions in agx_nir_lower_address
So we can add more instructions without duplication.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
5a55ef2fd1 nir: Add AGX atomic intrinsics
This is a piece of cake with unified atomics :-) This will let us do our
addressing math tricks nice and easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
06f4608c5b ir2: Drop lower_locals_to_regs call
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
10fb9de9f6 lima: Drop lower_locals_to_regs call
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
03175f61fc pan/mdg: Drop lower_locals_to_regs call
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Martin Roukala (né Peres)
4f317d15d3 amd/ci: add another test to the vkcts-vega10 flake list
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>
2023-06-09 11:38:43 +00:00
Martin Roukala (né Peres)
b8c7665599 zink/ci: add more QBO-related fails on RADV
These seem to have been forgotten during the original filing, probably
because more than 25 failures were found, and so deqp-runner limited
itself to 25.

References: #9174
Fixes: dad91dc7c4 ("zink: update some radv qbo fails")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>
2023-06-09 11:38:43 +00:00
Rhys Perry
56eb831155 aco: run nir_lower_int64 after nir_opt_uniform_atomics
nir_opt_uniform_atomics can create 64-bit ALU instructions which need to
be lowered.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23502>
2023-06-09 11:18:33 +00:00
Karol Herbst
948970c1eb rusticl/icd: use new proc macros
This drops quite a lot of boilerplate code as this is now all generated
via our proc macros.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
2023-06-09 10:35:24 +00:00
Karol Herbst
e3bdc7cc23 rusticl/icd: make release return nothing
I don't even know why it was like that...

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
2023-06-09 10:35:23 +00:00
Karol Herbst
5875f2e803 rusticl: add proc macro module for generating API stubs
Most of the API stubs are very very trivial to generate as the sole
purpose of those are to deconstruct the returned `Result` object.

Sadly we can't use external crates yet, so "syn" and "qoute" can't be used
for this :'(

The code is kinda hacky, but we also don't expose this to other people, so
we can keep this as a big hack until we can use external crates.

I wish there was a better solution here.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
2023-06-09 10:35:23 +00:00
Lucas Stach
b1cd5780d6 etnaviv: rs: unconditionally flush color and depth cache before using RS
When the RS uses the pixel pipes it seems to destroy/invalidate any
content sitting in the color and depth caches from a previous draw.
Always flush the color and depth cache before using the RS to make
sure that any cache content written by the PE is properly flushed
to memory.

Fixes spec@!opengl 1.0@gl-1.0-drawpixels-depth-test and probably a
few others that are suffering from corruption of PE writes.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>
2023-06-09 10:17:42 +00:00
Lucas Stach
cfc1be9590 etnaviv: rs: flush TS cache before making configuration changes
Move the TS cache flush into the same conditional block where
the TS setup is changed. TS cache always needs to be flushed
before making any changes to the TS setup.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>
2023-06-09 10:17:42 +00:00
Hyunjun Ko
c39521a929 anv/video: move video requirements to outarray.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23519>
2023-06-09 10:07:18 +02:00
Martin Roukala (né Peres)
689b01c598 ci/b2c: update to mesa-trigger:2023-03-08.1
This should speed up job submission by 3 to 30 seconds depending on
the farm the machine is hosted in, and how busy it is.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23361>
2023-06-09 07:32:23 +00:00
Gert Wollny
7c78c346ff rusticl: compile r600 driver
To really use the driver it still needs to be enabled with

  export RUSTICL_ENABLE=r600

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
2023-06-09 08:49:49 +02:00
Gert Wollny
33d878eb58 r600/sfn: Handle load_global in 64 to vec2 lowering
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
2023-06-09 08:49:49 +02:00
Gert Wollny
687e41da61 r600/sfn: Handle store_global when lowering 64 bit ops to vec2
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
2023-06-09 08:49:49 +02:00
Gert Wollny
9dbe936fe4 r600/sfn: Add experimental support for load/store_global
This is needed for rusticl, but the results may be unexpected.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
2023-06-09 08:49:49 +02:00
Lionel Landwerlin
25de091753 intel/nir: switch ray query state tracking to local variables uint16_t
We should be able to use uint8_t but there appears to be a backend
bug.

Q2RTX shader compute shader improvement with ray queries :

Totals:
Instrs: 102221 -> 101499 (-0.71%); split: -0.82%, +0.12%
Cycles: 4451260 -> 4396025 (-1.24%)
Send messages: 3587 -> 3585 (-0.06%)
Spill count: 717 -> 658 (-8.23%)
Fill count: 1248 -> 1214 (-2.72%); split: -3.21%, +0.48%
Scratch Memory Size: 21504 -> 16384 (-23.81%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19982>
2023-06-09 08:29:43 +03:00
Dave Airlie
085f6ec6eb radv/video: fix hevc scaling list order.
pps takes priority.

Fixes: da54b57888 ("radv/video: fix hevc scaling lists.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>
2023-06-09 03:22:43 +00:00
Dave Airlie
4cc86e4ea9 radv/video: report bad profile operation if h264 profile isn't supported.
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>
2023-06-09 03:22:43 +00:00
Qiang Yu
5024d8c763 radeonsi: enable aco support for gs copy shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:49 +08:00
Qiang Yu
8b71935c14 radeonsi: enable aco for standalone gs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:45 +08:00
Qiang Yu
1e2d4b32b0 ac/llvm,radeonsi: lower nir_load_ring_gsvs_amd in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:41 +08:00
Qiang Yu
4e3da403cc radeonsi: add scratch_offset arg for aco gs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:37 +08:00
Qiang Yu
afa90c6a41 radeonsi: enable aco support for standalone tes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:33 +08:00
Qiang Yu
f8c830ab85 radeonsi: update lds size for tes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:28 +08:00
Qiang Yu
62c8edaa63 radeonsi: init tes aco shader info fields
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:24 +08:00
Qiang Yu
e8b3c9a13b radeonsi: add scratch_offset arg for aco tes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:18 +08:00
Qiang Yu
13ff818d56 radeonsi: enable aco support for mono standalone tcs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:13 +08:00
Qiang Yu
b4f3b7c340 ac/llvm,radeonsi: lower nir_load_ring_tess_offchip_amd in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:08 +08:00
Qiang Yu
415ed0567a radeonsi: lower nir_load_tess_rel_patch_id_amd in abi for aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:53:02 +08:00
Qiang Yu
497d563b5e radeonsi: add scratch_offset arg for aco tcs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
2023-06-09 10:52:34 +08:00
Qiang Yu
b44bbe7daa ac/nir,radv: add 1 dword to ES/GS item size
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
2023-06-09 02:05:20 +00:00
Qiang Yu
2e1092095a ac/nir,radv: add 1 dword to LS/HS vertex stride
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
2023-06-09 02:05:20 +00:00
Christian Gmeiner
c2251b8e13 ci/etnaviv: add asan run
Has more a PoC state that it works and needs some time get stable.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23493>
2023-06-08 22:30:30 +00:00
Christian Gmeiner
6d510fcdc5 ci: add debian-arm32-asan
I want to have the possibility to use asan in for etnaviv ci. As lot
devices in the my CI farm are arm32 based lets do some prep work.

I had to skip the mesa:util suite as there are some asan problems
on 32bit platform with the hash_map. Once they got sorted out we can
enable the suite again.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23493>
2023-06-08 22:30:30 +00:00
Caio Oliveira
2bb26cc01d intel/compiler: Refactor dump_instruction(s)
Delete unnecessary virtual functions, we need just two.  Refactor code
so the 'default behavior' logic (stderr and/or creating file) is not
duplicated.

Rename the virtuals so overrides don't hide the common convenience
functions.  Finally, provide a variant of dump_instructions() with
a `FILE *` parameter.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23457>
2023-06-08 22:00:21 +00:00
Caio Oliveira
4f9a23e339 spirv: Use vtn_translate_scope for OpReadClockKHR
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>
2023-06-08 21:21:47 +00:00
Caio Oliveira
089a0cf4ef spirv: Refactor and rename scope translation helper
This will make the change from nir_scope to mesa_scope
later less noisy.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>
2023-06-08 21:21:47 +00:00
Juston Li
7ff978b5de docs: venus: update extension support
Advertise support for the follow extensions:
- VK_EXT_non_seamless_cube_map
- VK_EXT_dynamic_rendering_unused_attachments
- VK_KHR_shader_clock
- VK_EXT_border_color_swizzle
- VK_EXT_fragment_shader_interlock
- VK_EXT_shader_subgroup_ballot
- VK_EXT_color_write_enable

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
106e97a43a venus: enable VK_EXT_color_write_enable
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
ca0b781132 venus: enable VK_EXT_shader_subgroup_ballot
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
5f2d38ac3c venus: enable VK_EXT_fragment_shader_interlock
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
6e4c93886d venus: enable VK_EXT_border_color_swizzle
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
e217b3093c venus: enable VK_KHR_shader_clock
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
7b31127ed2 venus: enable VK_EXT_dynamic_rendering_unused_attachments
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
7fe390c85b venus: enable VK_EXT_non_seamless_cube_map
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:13 +00:00
Juston Li
bd4cb328a3 venus: sync protocol for multiple extensions for zink
- VK_EXT_non_seamless_cube_map
- VK_EXT_dynamic_rendering_unused_attachments
- VK_KHR_shader_clock
- VK_EXT_border_color_swizzle
- VK_EXT_fragment_shader_interlock
- VK_EXT_shader_subgroup_ballot
- VK_EXT_color_write_enable

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:12 +00:00
Juston Li
f63ea8614a venus: sync to latest protocol header from v1.3.252
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>
2023-06-08 21:08:12 +00:00
Rhys Perry
7a4a2428c0 util/tests: add gc_alloc_size alignment tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23501>
2023-06-08 18:15:13 +00:00
Rhys Perry
928f31a24a util: fix gc_alloc_size alignment
This was only aligning the gc_block_header. The returned pointer could be
incorrectly aligned.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: 69a9b343e8 ("util: add freelist allocator with mark/sweep")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9166
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23501>
2023-06-08 18:15:13 +00:00
Karol Herbst
90b8666ff2 clc: relax spec constant validation
Multiple values can have multiple spec constants assigned and vtn handles
this just fine. So just drop that assert as we need it to run SyCL
kernels.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9037
Fixes: a699844ffb ("microsoft/clc: Parse SPIR-V specialization consts into metadata")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23512>
2023-06-08 17:22:47 +00:00
Karol Herbst
1bbc997bef rusticl: fix clippy errors on image_slice_pitch change to usize
That field got changed from `unsigned` to `uintptr_t` on the C side, so
now we can drop a bit of code dealing with conversions to `usize`.

Fixes: 68735f4e86 ("treewide: use uint64_t / (u)intptr_t in image address calculations")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23522>
2023-06-08 16:30:52 +00:00
Karol Herbst
d57303ace7 ci: add and use clippy for rusticl
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23522>
2023-06-08 16:30:52 +00:00
Eric Engestrom
5d551d14cc docs: update calendar for 23.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23525>
2023-06-08 16:19:06 +00:00
Eric Engestrom
df0c5d8455 docs/relnotes: add sha256sum for 23.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23525>
2023-06-08 16:19:06 +00:00
Eric Engestrom
0e428b6479 docs: add release notes for 23.1.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23525>
2023-06-08 16:19:06 +00:00
Marek Olšák
bac1c88ea3 mesa: fix glBitmap in display lists when width <= 0 || height <= 0
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8904
Fixes: bb860f63 - mesa: create glBitmap textures while creating display lists

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23335>
2023-06-08 15:30:33 +00:00
Timur Kristóf
206cdbc440 radv: Clarify gang submit terminology.
This is done to better match the terminology used by the kernel
and also because the follower may not always be ACE in the future.

- Gang:	a group of command streams that are submitted to
  more than one HW queue at the same time.
- Leader: the main command stream of a command buffer that works
  on the queue type of the command buffer.
- Follower: a command stream on a different HW queue that doesn't
  have a separate command buffer state and is submitted together
  with its leader.

During submission, a follower must always precede the leader in
the submitted command streams array.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23462>
2023-06-08 15:06:52 +00:00
Mike Blumenkrantz
dad91dc7c4 zink: update some radv qbo fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>
2023-06-08 14:30:39 +00:00
Mike Blumenkrantz
6aa9e95021 zink: stop swizzling conditional render during batch flush
conditional render is only supposed to be enabled during renderpasses,
and this ends up doing mismatched start/stop in and out of renderpasses

affects:
GTF-GL46.gtf30.GL3Tests.conditional_render*

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>
2023-06-08 14:30:39 +00:00
Mike Blumenkrantz
43a6f8b9f8 zink: remove assert for dt in zink_kopper_update
this is a valid (harmless) path that can be hit by in some cases

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>
2023-06-08 14:30:39 +00:00
Mike Blumenkrantz
81834a211d zink: check for cached mem correctly when mapping buffer
bo placement is the mem index, not the mem flags

Fixes: 52f27cda05 ("zink: allow direct memory mapping for any COHERENT+CACHED buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>
2023-06-08 14:30:39 +00:00
Mike Blumenkrantz
3e1431dee9 zink: don't check prog->shaders when creating gfx pipeline
these objects don't technically belong to the pipeline, and checking
them may lead to inconsistent results in some corner cases

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>
2023-06-08 14:30:39 +00:00
Mike Blumenkrantz
eca11febe2 zink: combine some rast state draw conditionals
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>
2023-06-08 14:30:39 +00:00
norablackcat
a1189f4b7f docs/features update opencl extensions add rusticl
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23055>
2023-06-08 13:00:58 +00:00
norablackcat
be673fdd78 rusticl: add cl_khr_create_command_queue
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23055>
2023-06-08 13:00:58 +00:00
Eric Engestrom
c41faeb323 docs/relnotes/23.1.1: clear "new features"
I should've done this after 23.1.0/before 23.1.1, but I forgot :]

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23521>
2023-06-08 11:16:15 +00:00
Rhys Perry
31c8c42f48 aco/tests: test that s_bfe bits is masked
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23464>
2023-06-08 11:54:45 +01:00
Rhys Perry
08064a5542 aco: mask bits source of s_bfe
The s_bfe instructions use 7 bits, not 5 like the NIR opcode requires.

No fossil-db changes (navi21).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9162
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23464>
2023-06-08 11:54:17 +01:00
Matt Coster
4a2e62844b pvr: Add support for sampler border colors
Currently only the six vulkan 1.0 pre-defined formats are supported,
but some basic infrastructure that will be useful for implementing
VK_EXT_custom_border_color (and vulkan 1.1) is included.

Only formats currently listed in the pvr_format_table in pvr_formats.c
are currently supported. Unlike most (all?) other drivers, the PowerVR
hardware requires each entry in the border color table to be encoded
for every hardware format (of which there are 128 available, plus 128
for compressed formats).

Also in this commit:
 - Two new constants in rogue_texstate.xml:
    - IMAGE_WORD0_TEXFORMAT_MAX_SIZE, and
    - SAMPLER_BORDERCOLOR_INDEX_MAX_SIZE; and
 - A new device feature (tpu_border_colour_enhanced)

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21555>
2023-06-08 10:33:46 +00:00
Matt Coster
b8a32e7694 pvr: Declare dependency on idep_mesautil
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21555>
2023-06-08 10:33:46 +00:00
Christian Gmeiner
ae828a33a7 etnaviv: make wider use of DBG_ENABLED(..)
Make the source code more consistent.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23495>
2023-06-08 10:09:14 +00:00
Andres Gomez
14782cf248 .mailmap: add an alias for Christian Gmeiner
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23498>
2023-06-08 09:16:25 +00:00
Karmjit Mahil
aae23fe68d pvr: HWRT creation simplifications.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20092>
2023-06-08 08:55:12 +00:00
Gert Wollny
9ace53f3cc r600/sfn: Don't rewrite TESS_EVAL inner tess level outputs
Fixes: 5cd3e3950 (r600/sfn: Make sure all components are usable when lowering TF inputs)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23518>
2023-06-08 08:32:16 +00:00
Gert Wollny
976d6de232 r600/sfn: add read instruction for unused but required LDS op results
DS_XCHG_RET and LDS_CMP_XCHG_RET don't have a version that doesn't return
a value in the LDS red queue. so we have to read the value from the queue
and discard it.

Fixes: 79ca456b (r600/sfn: rewrite NIR backend)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23518>
2023-06-08 08:32:16 +00:00
Luigi Santivetti
9396ba3be1 pvr: fixup assert in pvr_cmd_buffer_alloc_mem
Stop explicitly passing PVR_BO_ALLOC_FLAG_CPU_MAPPED to
pvr_cmd_buffer_alloc_mem(). This is redundant for sub-allocations,
as they are always unconditionally mapped to the CPU.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23463>
2023-06-08 08:14:04 +00:00
SoroushIMG
4dc82b4473 pvr: fix infinite recursion in pvr_cmd_buffer_{start,end}_sub_cmd
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23463>
2023-06-08 08:14:04 +00:00
Gert Wollny
cb41ef0d3f util/driconf: pin minImageCount to three for "Path of Exile"
"Path of Exile" will fail with an error "unsupported backbuffer image count"
when vkGetPhysicalDeviceSurfaceCapabilitiesKHR reports more than 3 as
minImageCount.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21547>
2023-06-08 07:41:53 +00:00
Caio Oliveira
75b63a5d3e r600/sfn: Fix warning about overloads hiding virtual functions
Fixes multiple warnings when building with g++ 13.1.1 that look like

```
./src/gallium/drivers/r600/sfn/sfn_scheduler.cpp:1111:9: warning: ‘virtual void r600::CheckArrayAccessVisitor::visit(const r600::InlineConstant&)’ was hidden [-Woverloaded-virtual=]
 1111 |    void visit(const InlineConstant& value) override {(void)value;}
      |         ^~~~~
../src/gallium/drivers/r600/sfn/sfn_scheduler.cpp:1125:9: note:   by ‘virtual void r600::UpdateArrayWrite::visit(const r600::LocalArrayValue&)’
 1125 |    void visit(const LocalArrayValue& value) override {
      |         ^~~~~
(...)
```

What's going on here is when mixing overloading and virtual functions,
compiler will warn when one of the variants is not overriden.  So tell
it to also use the base class definitions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23509>
2023-06-08 07:17:21 +00:00
Yonggang Luo
1eda220f18 compiler: use align instead glsl_align and remove glsl_align
#include "util/u_math.h" when necessary to call align function

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23421>
2023-06-08 06:41:21 +00:00
Yonggang Luo
4134f9ac09 util: Do not use align as variable name
Because align is also a function in u_math.h

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23421>
2023-06-08 06:41:21 +00:00
Yonggang Luo
586391720b util: use uint32_t as the parameter of align function
align on negative value doesn't make sense

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23421>
2023-06-08 06:41:21 +00:00
Yonggang Luo
9ce8ff9bb1 util: Remove redundant type cast in function align64
Fixes: 0a06cf7523 ("util: migrate alignment functions and macros to use ALIGN_POT")

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23421>
2023-06-08 06:41:20 +00:00
Konstantin Seurer
93f047b6ff gallivm: Zero initialize param structs
Zero all param structs using {0} because it's shorter than a memset and
there were some instances where the structs weren't zero initialized.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
a2159dfe8a gallivm: Handle invalid image format/op combinations
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
1841dd7549 gallivm: Add lp_img_op_from_intrinsic
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
6a0383e518 gallivm: Add lp_build_nir_sample_key
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
9d3dbc6400 llvmpipe: Add lp_storage_render_image_format_supported
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
cfb37e7383 llvmpipe: Add lp_storage_image_format_supported
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
fbe7c970f6 llvmpipe: refactor out the pipe->lp_jit structure fillers.
These are useful later for descriptor indexing, but refactor them
out now.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
c3c9e28131 gallivm: Cast read_first_invocation source to an int
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Konstantin Seurer
3101f900a0 gallivm: Fix anisotropic sampling with num_mips=1
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23515>
2023-06-08 06:07:37 +00:00
Dave Airlie
d99dca86ce lavapipe: ignore another yuv format.
Since these were added to generic translation, lavapipe has
been annoyed.

Cc: mesa-stable
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23486>
2023-06-08 05:54:06 +00:00
Dave Airlie
da54b57888 radv/video: fix hevc scaling lists.
These need some zscan conversion, that I've taken from vaapi.

v2: move to common code for it_ptr updates, add defines

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>
2023-06-08 05:34:06 +00:00
Dave Airlie
3f12103be9 radv/video: fix hevc st rps programming
These needs to be programmed to fix some video glitches.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>
2023-06-08 05:34:06 +00:00
Dave Airlie
f0597a1514 radv/video: rework h265 reference frame bindings.
This reworks the ref frame bindings and allows dropping the tier_2 workaround.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>
2023-06-08 05:34:06 +00:00
Dave Airlie
b8191cd603 radv/video: don't supply an 8-bit format for a 10-bit dpb.
The firmware can write an 8-bit output buffer, but still needs
a 10-bit dpb allocation.

This also puts the 8-bit format after the 10-bit format though
apps should be smart enough to pick the correct one.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>
2023-06-08 05:34:06 +00:00
Dave Airlie
b2e1e17ff6 radv/video: convert session memory requirements to outarray.
These are just standard	outarray so use	the common code.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>
2023-06-08 05:34:06 +00:00
Dave Airlie
28f2a6b281 radv/video: convert video format properties to an outarray
These are just standard outarray so use the common code.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>
2023-06-08 05:34:06 +00:00
Chia-I Wu
d0d7dda829 radv: fix non-square compressed image copy on gfx9
There is a typo in fixup_gfx9_cs_copy.

Fixed dEQP-VK.api.copy_and_blit.*.image_to_buffer.2d_images.mip_copies_bc*_64x192_* in deqp 1.3.6.0.

Fixes: 35f053ba8c ("radv: Fix corrupted mipmap copies on GFX9+")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23483>
2023-06-08 04:58:31 +00:00
Karol Herbst
8616c0a52c rusticl/event: flush queues from dependencies
We have to flush all event dependencies inside clWaitForEvents and
clFinish implicitly otherwise applications might wait forever.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9052
Fixes: ebfffa1dae ("rusticl/event: wrong but non crashing impl of clWaitForEvents")
Cc: mesa-stable
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23110>
2023-06-08 04:16:35 +00:00
Karol Herbst
86dd5dd853 rusticl: bump rust req to 1.60
We need this rustc bugfix:
6466f89fc5

Cc: mesa-stable
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23110>
2023-06-08 04:16:35 +00:00
Karol Herbst
e285a05c2a doc/rusticl: add Rust Update Policy
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23110>
2023-06-08 04:16:35 +00:00
Matt Turner
19092576ce u_format: Use memcpy to avoid unaligned accesses
These functions are used by gl[Get]TexImage, which imposes no
alignment restructions on the void *pixels parameter.

This fixes an unaligned access in GTK's "gtk:gdk / memorytexture" unit
test on SPARC, which causes the test to fail.

Fixes: 45ae4434b5 ("util: Use bitshift arithmetic to unpack pixels.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23482>
2023-06-08 03:42:39 +00:00
Pierre-Eric Pelloux-Prayer
96cf4531e1 Revert "gallium/u_threaded: buffer sharedness tracking"
This reverts commit 8f159a8576.

This commit is correct but it exposes an existing bug: DISCARD_RANGE doesn't
work well with shared buffers.
So for now revert this commit as it's causing hangs on some APUs (see
https://gitlab.freedesktop.org/drm/amd/-/issues/2447) and flickering in
Metro Last Light Redux.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9108
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23492>
2023-06-08 03:10:49 +00:00
Lionel Landwerlin
965503ae22 anv: allow binding tables allocations on compute only queues
COMPUTE_WALKER is using binding tables.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: eb2b309328 ("anv: defer binding table block allocation to when necessary")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23506>
2023-06-08 02:37:44 +00:00
Dave Airlie
b1faeae4fe draw: repack some members of context.
this just fills a hole in

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>
2023-06-08 02:10:54 +00:00
Dave Airlie
73f7948298 draw: add a max stage define and use it in a few places
This should decrease the size of some memory allocations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>
2023-06-08 02:10:54 +00:00
Dave Airlie
f922f1f902 draw: refactor resources to use arrays instead of explicit structs.
This should simplify the code and make it easier to refactor later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>
2023-06-08 02:10:54 +00:00
Dave Airlie
d1cdf0d91a gallium/tgsi/draw/softpipe: remodel shader const/buffer bindings.
This remodels things around a buffer object.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>
2023-06-08 02:10:54 +00:00
Dave Airlie
370cd08a5e draw/tess: drop unused tgsi bits.
tess isn't supported by tgsi

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>
2023-06-08 02:10:54 +00:00
Dave Airlie
f1b752f650 draw: rename jit to vs_jit in lots of places.
we should have done this when geom shaders got added,
do it now, will make it easier to consolidate some code in macros

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>
2023-06-08 02:10:54 +00:00
Dave Airlie
c20df7e22e gallivm/nir: fix shuffleup tests.
So the shuffleup tests did a shuffle up with const 5,
we'd use invocation id (0..8) shuffle it down by 5,
get (-5..3), then call llvmshufflevector with that
which is totally illegal.

There might be a nicer way to fix this, but I can't see
it straight away, just bail on the fast path.

Fixes:
dEQP-VK.subgroups.shuffle.compute.subgroupshuffleup*

Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23484>
2023-06-08 01:40:45 +00:00
Mike Blumenkrantz
976dd26004 lavapipe: NV_device_generated_commands
this adds sufficient handling to pass the vkd3d-proton tests as well
as running cts on zink, which is gonna have to be enough since there's
no vkcts

it works by dynamically generating a vk_cmd_queue list of commands just
like the regular cmd queue would generate, with the minor change that
the final link has a nulled next pointer to correctly handle buffer copies,
where the last link would otherwise have a next pointer pointing to the
original cmd list

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>
2023-06-08 01:22:01 +00:00
Mike Blumenkrantz
3209609535 lavapipe: handle index buffers with offsets for indirect draws
gallium has no mechanism for setting an offset to the index buffer,
so this requires a new buffer to be created+bound dynamically at
the specified offset in order to read the correct data

cc: mesa-stable

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>
2023-06-08 01:22:01 +00:00
Mike Blumenkrantz
1d64b185fe lavapipe: add a zeroed buffer that can be bound in place of an index buffer
technically this is illegal in vulkan semantics, but some extensions have
their own definition of "illegal" when it comes to binding index buffers

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>
2023-06-08 01:22:01 +00:00
Mike Blumenkrantz
ea9ded410a lavapipe: add a mapping for BDA
when passing around BDA, it's important to be able to link the pointer
back to the pipe_resource since BDA doesn't have an explicit lifetime

this mapping enables cmds to receive a BDA pointer and then map it back
to a pipe_resource in order to avoid gymnastics with dynamically creating
pipe_resource objects which may or may not be able to be freed

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>
2023-06-08 01:22:01 +00:00
Mike Blumenkrantz
2ac8ca7d72 lavapipe: pass list to cmdbuf exec, not cmdbuf
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>
2023-06-08 01:22:00 +00:00
Daniel Schürmann
e05e62c611 radv/rt: remove now dead code
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
60f9dbeb2b radv/rt: use priorities to select the next shader
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
f5428a4181 radv/debug: dump ray tracing shaders in case of a hang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
163c97e6a7 radv/rt: separate shader compilation
With this patch, we compile separately
 - general shaders (raygen, miss, callable)
 - closest-hit shaders
 - traversal shader (incl. all intersection / any-hit shaders)

Each shader uses the following scheme:

  if (shader_pc == shader_va) {
     <shader code>
  }
  next = select_next_shader(shader_va)
  jump next

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
defdcd2058 aco: adjust RT prolog for shader functions [disables RT]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
302649dda1 radv/rt: adjust lower_rt_instructions() for shader functions [disables RT]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
b33c01b00f radv/rt: set up RT shader args for separate compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Friedrich Vock
365f3346f8 radv: Disable capture/replay handles
They don't work with separate compilation. Fixing this involves some
refactoring work, which will come in future MRs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
6a5eaa25ef radv/rt: create compile_rt_prolog() function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
09e4535f20 radv/rt: don't write cache hit feedback per stage.
Too much boilerplate for no benefit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
7f2a569ec5 radv/rt: reference library shaders during radv_rt_fill_stage_info()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
772b5b3758 radv/rt: add and use specialized cache search/insert functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
62b4380acb radv/rt: pass radv_ray_tracing_pipeline to RT shader creation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
8fb7df92c0 radv/rt: replace pCreateInfo with VkPipelineCreateFlags in rt_variables
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
d506fe3397 radv/rt: change RT main shader to MESA_SHADER_INTERSECTION
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
81e48613b9 radv/rt: implement radv_rt_nir_to_asm()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
99466ca185 radv/rt: implement radv_nir_lower_rt_abi to lower RT shaders for separate compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
d4409769c7 radv/shader_info: add RT stages to radv_get_user_data_0()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
c75619b268 radv/rt: extend radv_pipeline_group_handle with shader VAs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
870e4d285e radv/rt: adjust shared_size when lowering hit_attribs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
393f3426b6 aco: implement select_program_rt()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
f66f274304 aco: implement nir_intrinsic_load_resume_shader_address_amd
Similar to p_constaddr but targeting BBs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
be9f4a80b8 nir: add nir_intrinsic_resume_shader_address_amd
This intrinsic returns a pointer to the end of the shader
and is intended for stitched binaries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
03c4b5b0cc nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs
This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
1be3a558f2 radv: add remaining RT shader args for separate compilation
Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Kenneth Graunke
be235ce938 intel/genxml: Drop Tiled Resource Mode fields
Neither RENDER_SURFACE_STATE nor VDENC_SURFACE_CONTROL_BITS have a
Tiled Resource Mode field anymore.  The RENDER_SURFACE_STATE field
was also overlapping with the L1 Cache Control settings field.

This also drops the assignment of that field in isl, because we were
just explicitly setting it to NONE (0) which is already the default
value genxml packing will give us.  That saves us some ifdefs.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23449>
2023-06-08 00:07:40 +00:00
Nanley Chery
e7c63fc51c iris: Assert against FCV_CCS_E for blitter writes
The FCV feature is documented to occur on regular render writes. Blitter
writes don't fall under that category. So, if the destination resource
of a blitter write had the FCV aux usage, we would have a good reason to
change the aux usage of the access to plain CCS_E.

We don't actually need to write code to handle this. iris doesn't use
any compression on blitter writes. Make that obvious with an assert.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
0f0e929655 iris: Avoid FCV_CCS_E for shader image accesses
The FCV feature is documented to occur on regular render writes. Images
are written to with the DC data port however.

By using plain CCS_E for image writes, we can avoid the COMPRESSED_CLEAR
aux state in more cases. Doing this can avoid full resolves or partial
resolves for future accesses.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
39ec3c180e iris: Avoid extra CCS_E flushes for aux mode changes
We're going to start toggling between FCV_CCS_E and CCS_E. When
switching aux modes, flush_previous_aux_mode would typically perform
cache flushes for good reason. In the case of switching between CCS_E
with FCV on vs off, we haven't found aux mode flushing to matter. Treat
both CCS_E variants as equivalent to avoid extra cache flushing.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
0c204277e7 intel: Rename the GFX12_CCS_E aux-usage to FCV_CCS_E
Rename the isl_aux_usage enum to clarify that it is optional on gfx125.

The new name comes from the Alchemist docs, where the feature is
referred to as "Fast Clear Optimization (FCV)".

The rename was done with this command:

   git grep -l "GFX12_CCS_E" | xargs sed -ie "s/GFX12_CCS_E/FCV_CCS_E/g"

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:39 +00:00
Nanley Chery
dcc1d1be19 iris: Drop a GFX12_CCS_E check in can_fast_clear_color
The 8 bpp restriction isn't specific to the automatic fast clear
behavior of GFX12_CCS_E. It is applicable to both GFX12_CCS_E and CCS_E.
Drop the aux usage check completely.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>
2023-06-07 23:39:38 +00:00
Caio Oliveira
0f54621564 compiler/types: Make key in subroutine_name more effective
Use the string itself as a key for searching -- and the internal
allocated name as a key when storing.

Because record_key_hash doesn't consider the name field, which is
the only used field for a SUBROUTINE type, the hash key was always
the same for all types.  Using the name fixes this.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23277>
2023-06-07 23:01:59 +00:00
Mark Janes
d57eedefa9 anv: convert Wa_14010455700 to use workaround mechanism
The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>
2023-06-07 22:30:34 +00:00
Mark Janes
7868c8698f iris: convert Wa_14010455700 to use workaround mechanism
The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>
2023-06-07 22:30:34 +00:00
Simon Ser
5b2d71ab88 Update OpenGL headers
Token from commit 91cdaf381d77b6e700654ecd78cb88a95c1fde1a of
OpenGL-Registry.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23144>
2023-06-07 20:47:03 +00:00
Marek Olšák
6dc1ae1759 amd: drop support for LLVM 14
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
ab5662dc61 amd: drop support for LLVM 13
We can remove the LLVM 13 Wave32 discard workaround and
SI_PROFILE_IGNORE_LLVM13_DISCARD_BUG that disabled the workaround.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
3a9f8730f5 amd: drop support for LLVM 12
The demote emulation can be removed, and FS_CORRECT_DERIVS_AFTER_KILL
can be removed because it's always enabled on LLVM >= 13.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
4c8cc26fd8 amd: drop support for LLVM 11
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Yogesh Mohan Marimuthu
7761e93c8c ac/gpu_info: rearrange if checks for dcc config
rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
2023-06-07 19:28:29 +00:00
Yogesh Mohan Marimuthu
6f968f46fe ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile
With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
2023-06-07 19:28:29 +00:00
Christian Gmeiner
add14d6cfb etnaviv: nir: do not call nir_lower_idiv(..) unconditionally
GPUs without native integers lower idiv in lower_int_to_float and
there is no need to call nir_lower_idiv(..) for such GPUs.

Fixes nir crashes I am seeing with gc2000_gles2 CI job.

Fixes: f532202f2d ("etnaviv: use nir_lower_idiv(..) before opt loop")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23450>
2023-06-07 19:02:36 +00:00
Iago Toral Quiroga
c5b6a65f81 v3d,v3dv: fix viewport offset for negative viewport center
If the viewport center is not positive we can't express it
through the fine coordinates, which are unsigned, and we
need to use the coarse coordinates too.

Fixes new crashes in Vulkan CTS 1.3.6.0:
dEQP-VK.draw.renderpass.offscreen_viewport.*negative*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:56 +00:00
Iago Toral Quiroga
78dc0bc589 broadcom/cle: fix up viewport offset packet definition for V3D 4.1+
These are split between fine and coarse coordinates. We have only been
using fine until now, so we kept the same naming convention we had
prior to V3D 4.1 for simplicity, but we will start using the coarse
coordinates soon too.

Also, the signedness was reversed: coarse coordinates are signed and
fine coordinates are unsigned.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:56 +00:00
Iago Toral Quiroga
84af2cb44a v3dv: simplify scissor setup for negative viewport height
KHR_maintenance1 allows clients to specify a negative
height, but not a negative width, so assert on that and
simplify the computations for the horizontal dimension.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:55 +00:00
Iago Toral Quiroga
226c62b745 v3dv: remove bogus viewport code
This is incorrectly undoing the code right above it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>
2023-06-07 18:40:55 +00:00
Mike Blumenkrantz
40433dea14 zink: add a ci flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Mike Blumenkrantz
02bf3e3c0a zink: enable EXT_shader_object globally with have_EXT_attachment_feedback_loop_dynamic_state
this leaves fbfetch as the lone case where it can't yet be used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Mike Blumenkrantz
d17c081b7c zink: use dynamic state for feedback loops when available
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Mike Blumenkrantz
88d42b6230 zink: hook up VK_EXT_attachment_feedback_loop_dynamic_state
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>
2023-06-07 18:14:58 +00:00
Karmjit Mahil
51db63538c pvr: Fix PDS temps allocation on fragment stage
Previously the USC temps count was incorrectly being used for the
PDS temps count.

It was causing:
  csbgen/pvr_packet_helpers.h:79:
    __pvr_uint: Assertion `v <= max' failed.

This fixes the assert being hit on:
  dEQP-VK.ubo.random.basic_arrays.2
  dEQP-VK.ubo.random.all_shared_buffer.3
  dEQP-VK.ubo.random.all_shared_buffer.48
  dEQP-VK.ubo.random.all_out_of_order_offsets.3

This does not fully fix the tests though.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>
2023-06-07 18:01:02 +00:00
Karmjit Mahil
8809758fbc pvr: Rename temps_count to pds_temps_count
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>
2023-06-07 18:01:02 +00:00
Karmjit Mahil
d070e31020 pvr: Fix draw indirect page faults due to missing index list buffer
Fixes:
  dEQP-VK.draw.renderpass.basic_draw.draw_indirect.*
  dEQP-VK.draw.renderpass.basic_draw.draw_indexed_indirect.*

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23491>
2023-06-07 17:38:54 +00:00
Marek Olšák
68735f4e86 treewide: use uint64_t / (u)intptr_t in image address calculations
16K * 16K * 16bpp = 4G, which overflows int32, so layer_stride needs to
have 64 bits. More generally, any "byte_stride * height" computation
can overflow int32.

Use (u)intptr_t in some gallium and st/mesa places where we do CPU access.
Use uint64_t otherwise.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23389>
2023-06-07 16:53:36 +00:00
Oskar Rundgren
d72d13bbb5 pvr: add block compressed formats blit support
Surface dimensions and rectangle mappings need to be adjusted for
block compressed formats.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23466>
2023-06-07 16:29:44 +00:00
Lucas Fryzek
811ac6e393 mailmap: Add Lucas Fryzek to mailmap
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23499>
2023-06-07 15:47:40 +00:00
Corentin Noël
dd1b927805 ci: uprev virglrenderer and crosvm
Update to their latest version on time

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23427>
2023-06-07 15:14:45 +00:00
Corentin Noël
e1cd887b78 ci: Bump base tag to rebuild piglit
This has been forgotten in latest piglit uprev

Fixes: d75973a142
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23427>
2023-06-07 15:14:45 +00:00
Samuel Pitoiset
9150513242 radv: advertise VK_KHR_fragment_shader_barycentric on GFX10.3+
It can't be supported on older hardware because it's impossible to
determine the provoking vertex ID without LOAD_PROVOKING_VTX which is
GFX10.3+ only.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6557
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:36 +00:00
Samuel Pitoiset
593fb2035d radv: gather info about nir_intrinsic_load_sample_positions_amd
nir_intrinsic_load_barycentric_coord_at_sample is lowered before the
radv_shader_info pass and load_sample_positions_amd might be needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:36 +00:00
Samuel Pitoiset
7ee8a12a62 radv: add a NIR pass that lower fragment shader barycentric intrinsics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
2b156c8258 radv: configure RSRC1.LOAD_PROVOKING_VTX for the fragment shader
This enables provoking vertex info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
b9b3560039 radv: set ROTATE_PC_PTR for custom interpolations
This seems needed for computing stable barycentric coordinates.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
50888ba390 radv: handle per_vertex variables when gathering FS inputs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
506705bdeb radv: add support for nir_intrinsic_load_rasterization_primitive_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
98bb7e10e7 nir: add nir_intrinsic_load_rasterization_primitive_amd
For VK_KHR_fragment_shader_barycentric, AMD needs to know the primitive
topology in the fragment shader but with fast-link GPL this is unknown
at compile time and it needs to be passed dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
116ee98106 radv: track if the rasterization primitive is known at compile time
For fast-linking with GPL, we might not know the pre-rasterization
stages at compile time (when only the FS is compiled) and we will need
to load the rasterization primitive through an user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
958cc87954 radv: add support for nir_intrinsic_load_provoking_vtx_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
0358a23012 nir: add nir_intrinsic_load_provoking_vtx_amd
Will be used to load provoking vertex info from the hardware to
determine the provoking vertex ID.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Andres Gomez
67cd3da63e .mailmap: add an alias for Clayton Craft
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Clayton Craft <clayton@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15260>
2023-06-07 14:38:41 +00:00
Andres Gomez
d76aaf1f4d .mailmap: add an alias for Miguel Casas-Sanchez
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15260>
2023-06-07 14:38:41 +00:00
Matt Coster
d13baacc8c pvr: Don't overwrite PDS vertex input flags
Fixes:
  dEQP-VK.draw.renderpass.simple_draw.simple_draw_triangle_list
  dEQP-VK.draw.renderpass.simple_draw.simple_draw_triangle_strip
  dEQP-VK.draw.renderpass.indexed_draw.draw_indexed_triangle_list
  dEQP-VK.draw.renderpass.indexed_draw.draw_indexed_triangle_strip

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23458>
2023-06-07 14:20:27 +00:00
Matt Coster
6b53ba341e pvr: Allow S8_UINT to be used as a stencil attachment format
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23431>
2023-06-07 14:04:04 +00:00
Matt Coster
52050a35c7 pvr: Refactor pvr_unwind_rects()
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23430>
2023-06-07 13:46:40 +00:00
Matt Coster
dc3538cdb5 pvr: Correct calculations in pvr_unwind_rects()
Fixes: 6d3d1f884c
       pvr: Fix rect splitting logic in pvr_unwind_rects()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23430>
2023-06-07 13:46:40 +00:00
Rhys Perry
b5c31f14a2 aco: remove memory_barrier_buffer implementation
This is no longer used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
2023-06-07 13:19:42 +00:00
Rhys Perry
62f023f6cf ac/nir: use scoped barriers to finish stores before exports
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
2023-06-07 13:19:41 +00:00
Rhys Perry
417990b19e aco: consider position/primitive exports around memory barriers
This is needed to create barriers which ensure stores finish before
position/primitive exports.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
2023-06-07 13:19:41 +00:00
Georg Lehmann
dfb6d3e443 aco: use v_fma_mix for f2f32 and f2f16 on gfx11 if wave64
v_fma_mix can be dual issued, trade some code size for throughput.

Foz-DB GFX1100:
Totals from 8204 (6.08% of 134864) affected shaders:
CodeSize: 89608584 -> 89693968 (+0.10%)
Latency: 160744811 -> 160699309 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 19737977 -> 19678308 (-0.30%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Georg Lehmann
177dba62a1 aco: use v_add_f{16,32} with clamp for fsat
v_add can be dual issued on gfx11, v_med3 cannot.
Don't use v_add directly to still optimize omod(fsat(x)).

Foz-DB GFX1100:
Totals from 32702 (24.24% of 134913) affected shaders:
Latency: 475008203 -> 474928037 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 59226198 -> 59140787 (-0.14%); split: -0.14%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Georg Lehmann
3a0bc8f007 aco/statistics: improve v_fma_mix dual issuing detection
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Georg Lehmann
0f023d90c0 aco/ir: return true in hasRegClass for Operand(reg, rc)
Makes isOfType() usable after lower_to_hw_instr.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Vinson Lee
a62a22c922 vulkan/wsi: Remove duplicate NULL check
Fix defect reported by Coverity Scan.

Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement: return NULL;.

Fixes: eadc64ab24 ("vulkan/wsi/display: do not dereference a NULL pointer")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23415>
2023-06-07 11:41:29 +00:00
Vinson Lee
46764815ac tu: Fix missing unlock
Fix defect reported by Coverity Scan.

Missing unlock (LOCK)
missing_unlock: Returning without unlocking dev->vma_mutex.

Fixes: c20139c292 ("tu: Enable bufferDeviceAddressCaptureReplay")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23490>
2023-06-07 11:04:19 +00:00
Christian Gmeiner
7bbef4002c etnaviv: move printing of final shader out of etna_link_shaders(..)
Printing the final shaders in etna_link_shaders(..) can be quite noisy and
does not work when using shader-db. Lets make it possible to stare at the
generaded shader code when using shader-db by moving the etna_dump_shader(..)
call into create_variant(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23396>
2023-06-07 10:19:14 +00:00
Christian Gmeiner
f40ab555f5 etnaviv: correct number of instructions in dump_shader_info(..)
code_size is overall size in uint32 words of the whole shader. As
Vivante GPUs have a fixed size ISA we simply need to divide code_size
by 4 to get the number if ISA instructions.

shader-db shows the correct numbers now.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23396>
2023-06-07 10:19:13 +00:00
Karol Herbst
a2d7a4f978 nv50/ir: convert to scoped_barrier
Contrary to how we implemented barriers the MEMBAR instruction actually
does not allow us to specify which memory to synchronize. We can only
specify the scope.

No regressions on TU102.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: M Henning <drawoc@darkrefraction.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23208>
2023-06-07 09:57:24 +00:00
Juan A. Suarez Romero
7a21b59df9 v3d: handle samplerExternalOES
Add handling for GLSL_SAMPLER_DIM_EXTERNAL.

Fixes `spec@oes_egl_image_external_essl3@oes_egl_image_external_essl3`.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23469>
2023-06-07 09:20:32 +00:00
Yonggang Luo
b687fa4ccb vulkan: move nir_convert_ycbcr into vulkan runtime
This only used by vulkan drivers and depends on vulkan util, so do the move to decouple
nir from vulkan utils

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23444>
2023-06-07 08:42:03 +00:00
Mike Blumenkrantz
476022cbe1 zink: also disable bg compile for compute with nobgc
forgot this one in the original MR

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22933>
2023-06-07 06:50:34 +00:00
Emma Anholt
b222b34e78 ci/etnaviv: Update some xfails common between the last 3 nightly runs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23446>
2023-06-07 06:34:35 +00:00
Emma Anholt
d93bdf2427 ci/crocus: Update trace hash for the neverball regression.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23446>
2023-06-07 06:34:35 +00:00
Mike Blumenkrantz
580a8a8b1e lavapipe: fix memory budget reporting
I put this on the wrong struct

Fixes: 1c42056ee1 ("lavapipe: EXT_memory_budget")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23395>
2023-06-07 05:59:49 +00:00
Dave Airlie
bfed41d322 lavapipe: don't remove queue family barriers.
This fixes the remaining barrier issues.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23453>
2023-06-07 04:21:09 +00:00
Dave Airlie
91e919f1bf llvmpipe: emit fences for barrier.
I tried emitting less here but I'm just gonna hit it with the big
seq_cst hammer.

Fixes:
dEQP-VK.memory_model.message_passing.*

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23453>
2023-06-07 04:21:09 +00:00
Yiwei Zhang
9fb0bbd7d4 docs: update venus VK_EXT_device_memory_report support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>
2023-06-07 04:00:40 +00:00
Yiwei Zhang
1bc4e71695 venus: enable VK_EXT_device_memory_report
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>
2023-06-07 04:00:40 +00:00
Yiwei Zhang
0960ceb071 venus: emit device memory report for device memory events
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>
2023-06-07 04:00:40 +00:00
Yiwei Zhang
f70a08bc60 venus: handle device memory report requests
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>
2023-06-07 04:00:40 +00:00
Yiwei Zhang
26567183d8 venus: refactor vn_device_memory to track VkMemoryType
The VkMemoryType::heapIndex will be used by device memory report.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>
2023-06-07 04:00:40 +00:00
Rob Clark
7b38799724 freedreno/a6xx: Use idalloc for samp/view seqno's
Samplers and views can be re-created dynamically or long-lasting,
resulting in the possibility of a tex cache collision.  So instead
of a simple counter, use idalloc.

Fixes: a3c73987ab ("freedreno/a6xx: Move rsc seqno out of tex cache key")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9111
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>
2023-06-07 03:38:57 +00:00
Rob Clark
3f00f4ac30 freedreno/a6xx: Directly invalidate on samp view update
Instead of incrementing the seqno, just directly invalidate any existing
tex cache entries when we update a sampler view.

No reason not to just directly clear stale entries, and avoiding to re-
assign the seqno will simplify the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>
2023-06-07 03:38:57 +00:00
Rob Clark
ca9dc7be34 freedreno/batch: Add driver-thread assert
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>
2023-06-07 03:38:57 +00:00
Rob Clark
e527bd7986 freedreno: Add extra assert
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>
2023-06-07 03:38:56 +00:00
Alyssa Rosenzweig
537994bb32 asahi: Remove stale comments
Trivial.

It is now later and I have confirmed with Piglit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Asahi Lina
d6ff4733a6 asahi: Do not leak meta shader NIR
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Asahi Lina
c6016486f4 asahi: Fix memory leak in agx_nir_lower_sysvals()
We need to free the dynarray.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Asahi Lina
bb27e3f69c asahi: Use os_dupfd_cloexec() instead of dup()
This fixes file descriptor leaks in konsole/etc.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
35d849025b asahi: Decompress with format reinterpretation
The internal layout used with compression partially depends on the pixel format.
Some limited reinterpretation is definitely allowed (linear vs sRGB views of the
same physical format are documented by Apple as allowed). Some reinterpretations
are definitely forbidden (R8G8B8A8 vs R32, I think). At some point we'll need to
work out the exact rule. I suspect the answer is that "you can reinterpret iff
the Channels field matches". Meaning that R8G8B8A8_UNORM and B8G8R8A8_SINT would
be compatible, but not R16G16_UNORM. But I haven't tested that.

Fixes all fails in:

   dEQP-GLES31.functional.image_load_store.*.format_reinterpret.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
d499bf10a3 asahi: Decompress writable images
We can't write to compressed images. Decompress on the fly if needed. mesa/st
doesn't bother to do this for us.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
531247cf31 asahi: Extract transition_resource helper
We'll reuse this logic for images. Extract it out and generalize it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
389c0fdc7c asahi: Add ASAHI_MESA_DEBUG=nowc flag
Add a debug flag to disable write-combining as a performance hack. This may help
diagnose slowness with glReadPixels() heavy workloads like screen capture.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
3a0d1f83d5 agx: Stop bit-inexact conversion propagation
Despite being mathematically equivalent, the following code sequences are not
bit-identical under IEEE 754 rules due to differing internal precision:

   fadd16 r0l, r2, 0.0              z = f2f16 x
   fadd16 r1h, r0l, r0h             w = fadd z, y

versus

   fadd32 r1h, r2, r0h              f2f16(w) = fadd x, f2f32(y)

This is probably fine under GL's relaxed floating point precision rules, but
it's definitely not ok with the more strict OpenCL or Vulkan. It also is a
potential problem with GL invariance rules, if we get different results for the
same shader depending whether we did a monolithic compile or a fast link. The
place for doing inexact transformations is NIR, when we have the information
available to do so correctly. By the time we get to the backend, everything we
do needs to be bit-exact to preserve sanity.

Fixes dEQP-GLES2.functional.shaders.algorithm.rgb_to_hsl_vertex. We believe that
this is a CTS bug, but it's a useful one since it uncovered a serious driver bug
that would bite us in the much less friendly Vulkan (or god forbid OpenCL) CTS
later. It also seems like a magnet for GL app bugs, the fp16 support we do now
is uncovering bad enough bugs as it is.

shader-db results are pretty abysmal, though :|

total instructions in shared programs: 1537964 -> 1571328 (2.17%)
instructions in affected programs: 670231 -> 703595 (4.98%)

total bytes in shared programs: 10533984 -> 10732316 (1.88%)
bytes in affected programs: 4662414 -> 4860746 (4.25%)

total halfregs in shared programs: 483448 -> 474541 (-1.84%)
halfregs in affected programs: 58867 -> 49960 (-15.13%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
be5004691c asahi: Advertise GL 3.1
We now have support for baseline MSAA, except for support for eMRT. But hey,
this gets us 99% of the way there, so it's worth flipping on at least in
agx/next.

We can also advertise dual-source blending again. It was reverted since Chromium
freaks out with dual-source blending on a GL 2.1 driver, but since we're
advertising GL 3.1 now, it's ok.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
8d019125a0 agx: Emit shader info late
So we can take into account program transformations for the final info. This
reports more accurate metadata.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
7b1d6204c8 asahi: Use nonempty tib for MSAA
Affects
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_depth_2d. This
needs tests, but whatever, 70% of the YouTube chat said to land the hack.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
HackHackHacked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: YouTube Viewers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
f3919bead6 asahi: Lower MSAA
Use the shiny new passes to lower fragment shaders. Monolithic only right now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
1dd513727d agx: Handle centroid and sample interpolation
Works great now that all the infrastructure is wired up.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
b7f130fbbc agx: Model interpolation for iter instructions
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
2548293e8b agx: Split iter and iterproj instructions
These are different (though related) instructions. I've split them in applegpu,
let's mirror that here. This simplifies the IR a bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
b9b71bcae6 asahi,agx: Call lower_discard_zs_emit in the driver
The driver needs to lower MSAA (because only it knows the sample count). MSAA
lowering depends on discards getting lowered (in order to get sample masks on the
discards for sample shading to work properly). Discard lowering depends on all
discards emitted. But the driver needs to lower clip planes which generates
discards. To break the circular dependency, we have the driver call the
discard lowering pass itself (in between lowering clip planes and lowering
MSAA). Technically, this is probably a layering violation but it's the least
gross solution I see.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
398851ca53 agx: Lower discard in NIR
We already lower discard in NIR when depth/stencil writes are used in the
shader. In this patch, we extend that lowering for when depth/stencil writes are
not used, in which case the discard is lowered to a sample_mask instruction.
This is a step towards multisampling, since the old lowering assumed
single-sample and there's no way to express a sample mask with a standard NIR
discard instructions so we need to lower in NIR anyway for sample shading (i.e.
if a discard_if diverges between samples in a pixel).

This changes the lowering for discard_if to be free of control flow (instead
executing a sample mask instruction unconditionally). This seems to be slightly
faster in SuperTuxKart and slightly slower in Dolphin, but I'm not too worried
right now.

To make this work, we do need some extra lowering to ensure we always execute a
sample_mask instruction, in case a discard_if is buried in other control flow
(as occurs with Dolphin's ubershaders). So that's added too. We need that for
MSAA anyway, so pardon the line count.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
989d6fd378 agx: Enable tag writes when sample mask written
Including indirectly via discard/demote.

Fixes graphical artefacts in Chromium when API sample masks are hooked up, which
will result in fragment programs that do not write colour/depth but do a lone
sample mask write. These need tag writes enabled (according to a trace from
Metal for a case constructed to test this scenario).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
f514d49ae2 agx: Handle sample_mask_agx
1:1 translation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
73bbf43bc0 agx: Plumb in nir_intrinsic_load_sample_mask_in
We have a special register for this, although this will need some lowering for
glSampleMask.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
6fd16dd7c9 agx: Model both sources of sample_mask
We need to control both sources to implement multisampling properly. The
semantic is something like:

   foreach sample in the first mask {
      if correspond bit in second bit set {
         make sample live
      } else {
         make sample dead
      }
   }

But I'm reticent to document more formally until the details are really
understood and properly tested.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
954e2eee29 asahi: Plumb ppp_multisamplectl into shaders
This lets us implement gl_SamplePositions in a cheap way with some ALU in the
shader preamble.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
17a05884b4 asahi: Plumb API sample mask into shaders
So we can lower glSampleMask() appropriately.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
bffbe099df asahi: Set uses_sample_shading for background program
If we read gl_SampleID we need the lowering, even though we don't call into
gather_info to set the bit for us. So set the bit manually.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Alyssa Rosenzweig
0b95d81150 agx: Assert that sample shading is lowered
Lest someone mess this up later and then try to "implement" these intrinsics in
the backend.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Alyssa Rosenzweig
46a5a99d24 asahi: Add alpha-to-coverage (and alpha-to-one) lowering
This should probably be shared code but meh.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Alyssa Rosenzweig
51e868f3a2 asahi: Add passes to lower sample intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Alyssa Rosenzweig
f28962e29a asahi: Add passes to lower MSAA
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Alyssa Rosenzweig
70b8babe3c agx: Use textures_used, not num_textures
The latter doesn't account for holes. Fixes regression in Neverball on Asahi.

Fixes: e607a89f ("mesa/main: ff-fragshader to nir")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Alyssa Rosenzweig
f1c2ea99e2 agx: Constant fold when optimizing int64
Otherwise we can get bcsel(false, ...) in the final optimized code, which isn't
great.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Alyssa Rosenzweig
9641fba9ba agx: Set support_16bit_alu
Allows some more optimizations.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:48 +00:00
Gert Wollny
8068264469 r600/sfn: Switch to scoped barriers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23272>
2023-06-07 02:37:22 +00:00
Gert Wollny
a12072868d r600/sfn: assert that group barrier is not emitted in divergent code flow
Also rename emit_barrier to emit_group_barrier

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23272>
2023-06-07 02:37:22 +00:00
Caio Oliveira
d0b7cf192b spirv: Add workaround for OpImageQueryLevels with Multi-sampled images
Warn and replace the query with the constant value 1.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9148
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23407>
2023-06-07 02:06:55 +00:00
Yonggang Luo
568209f57d compiler: Remove redundant struct glsl_type in nir_types.h
The struct glsl_type already declared in glsl_types.h

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
9e8135e936 compiler: Remove the need include "util/glheader.h" and "util/ralloc.h" in glsl_types.h
These includes can be moved into .cpp files and down-stream headers

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
1b836a52ea mesa, compiler: Move gl_texture_index to glsl_types.h
This move is done for decouple glsl_types.h from src/mesa/*

This is achieved by move gl_texture_index from src/mesa/main/menums.h to src/compiler/shader_enums.h
And move ATOMIC_COUNTER_SIZE,MAX_VERTEX_STREAMS from src/mesa/main/config.h to src/compiler/shader_enums.h

Move include main/[config|menums].h into glsl/glsl_parser_extras.h from glsl_types.h
As now glsl_types.h should not include headers from src/mesa/*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
ab73f717d9 compiler: Move can_implicitly_convert_to helper to glsl module from glsl_types.h
This move is done for decouple glsl_types from glsl_parser_extras

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
f9860a84b3 compiler: Combine duplicated implementation of is_gl_identifier into glsl_types.h
As glsl_types.cpp also called is_gl_identifier, so move it into glsl_types.h,
this will help the decouple glsl_types.h from src/compiler/glsl/*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Patrick Lerda
340311dac9 r600: fix r600_draw_vbo() buffer overflow
The previous implementation was copying the data using the
aligned length (size_dw). The aligned length could overflow
the original buffer size.

For instance, this issue is triggered with "piglit/bin/draw-batch -auto -fbo":
==5736==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7fff139c77e8 at pc 0x7f25b350a9a0 bp 0x7fff139c6cb0 sp 0x7fff139c6460
READ of size 8 at 0x7fff139c77e8 thread T0
    #0 0x7f25b350a99f in __interceptor_memcpy (/usr/lib64/libasan.so.6+0x3c99f)
    #1 0x7f25a8fcdf24 in radeon_emit_array ../src/gallium/include/winsys/radeon_winsys.h:760
    #2 0x7f25a8fcdf24 in r600_draw_vbo ../src/gallium/drivers/r600/r600_state_common.c:2448
    #3 0x7f25a8ae7ba1 in u_vbuf_draw_vbo ../src/gallium/auxiliary/util/u_vbuf.c:1791
    #4 0x7f25a7bc18ca in _mesa_validated_drawrangeelements ../src/mesa/main/draw.c:1696
    #5 0x7f25a7bc7e53 in _mesa_DrawElements ../src/mesa/main/draw.c:1824

Fixes: 0cf5d1f226 ("gallium: remove PIPE_CAP_INFO_START_WITH_USER_INDICES and fix all drivers")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23436>
2023-06-06 23:16:05 +00:00
Vinson Lee
ed759ad795 dzn: Fix qpool->queries_lock double lock
Fix defect reported by Coverity Scan.

Double lock (LOCK)
double_lock: mtx_lock locks qpool->queries_lock while it is locked.

Fixes: a012b21964 ("microsoft: Initial vulkan-on-12 driver")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23455>
2023-06-06 22:23:32 +00:00
Caio Oliveira
60664285a9 nir/print: Do not print raw values
In many cases the raw value is not really helpful,
since we only work with enums and the raw value is
already printed for indices without special printing.

If an index benefits from having special printing AND the
raw value, we can include the printing of the raw value
as part of its handler.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23375>
2023-06-06 21:50:34 +00:00
Mykhailo Skorokhodov
49c7fd7a7e iris: Fix memory size with disabled resizable bar
When the resizable bar feature is disabled,
then vram.mappable.size is only 256MB.
The second half of the total size is in the vram.unmappable.size variable.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23402>
2023-06-06 20:58:00 +00:00
Eric Engestrom
07207d12b0 ci/zink+radv: update expectations
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23465>
2023-06-06 20:24:25 +00:00
Eric Engestrom
9316ab74ef ci/radv: update expectations
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23465>
2023-06-06 20:24:24 +00:00
Alyssa Rosenzweig
99a00e2247 treewide: Use nir_trim_vector more
Via Coccinelle patches

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, (1 << c) - 1)
    +nir_trim_vector(b, a, c)

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, BITFIELD_MASK(c))
    +nir_trim_vector(b, a, c)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 3)
    +nir_trim_vector(b, a, 2)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 7)
    +nir_trim_vector(b, a, 3)

Plus a fixup for pointless trimming an immediate in RADV and radeonsi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:25 +00:00
Alyssa Rosenzweig
68eda9456f treewide: Use nir_tex_src_for_ssa
Via Coccinelle patch:

    @@
    expression a, b, c;
    @@

    -a.src = nir_src_for_ssa(b);
    -a.src_type = c;
    +a = nir_tex_src_for_ssa(c, b);

    @@
    expression a, b, c;
    @@

    -a.src_type = c;
    -a.src = nir_src_for_ssa(b);
    +a = nir_tex_src_for_ssa(c, b);

Plus manual fixups, including...

* a few identity swizzles changed to nir_trim_vector in TTN and prog-to-nir to
  fix the Coccinelle-botched formatting, and similarly a pointless nir_channels
* collapsing a now-pointless temp in vtn

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:25 +00:00
Alyssa Rosenzweig
3863280399 nir: Add and use nir_tex_src_ssa
This makes texture instructions a lot less annoying to construct, especially in
cases where the deref-based helpers don't work.

I only converted core NIR, not the drivers. Since it was by hand.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:24 +00:00
Marek Olšák
218c00319b amd: remove unused PKT0 definitions
We never use type 0 packets.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
dd5604b94d radeonsi: don't use SET_SH_REG_INDEX if the kernel doesn't use CU reservation
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
d98501f5c1 radeonsi: don't use SET_SH_REG_INDEX on gfx7-9
It was accidentally used with geometry shaders. It might have caused hangs.

Fixes: ccaaf8fe04 - amd: massively simplify how info->spi_cu_en is applied

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
0fecee53cf radeonsi: re-indent gfx10_create_sh_query_result_cs
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
acde68b282 radeonsi/ci: add gfx6 failures
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
c2b655d788 radeonsi: add a separate cdna_init_compute_preamble_state function
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
7baeb54c2a radeonsi: don't set registers set by CLEAR_STATE in the preamble for gfx10-11
CLEAR_STATE doesn't clear PA_SC_GENERIC_SCISSOR_* only on some older chips

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
5acff16ce4 radeonsi: add a separate gfx10_init_gfx_preamble_state function
and set the registers in an order sorted by the offset.

It's less of a mess now.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
c4d465a514 radeonsi: add helpers to create and clone a sized pm4 state
to simplify si_init_cs_preamble_state and it will be used in the following
commits

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
c23597970b radeonsi: don't program COMPUTE_MAX_WAVE_ID (GDS register) on gfx6
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
ead53b62c9 radeonsi: optimize no-op primitive restart index changes thanks to index masking
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
ade70712df radeonsi: rename the msaa_sample_locs state to sample locations
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d0e141ca73 radeonsi: merge si_emit_msaa_sample_locs with si_emit_sample_locations
Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
b8fef52f0c radeonsi: move PA_SU_SMALL_PRIM_FILTER_CNTL to the preamble when possible
PA_SU_SMALL_PRIM_FILTER_CNTL is set in the gfx preamble if the sample loc
bug isn't present. Else, it's set as part of sample locs state.

This is part 3 of simplifying si_emit_msaa_sample_locs.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
547fccaab9 radeonsi: adjust 16x EQAA sample locs to make PA_SU_PRIM_FILTER_CNTL immutable
and move PA_SU_PRIM_FILTER_CNTL to the gfx preamble.

If sample locations don't use the -8 coordinate, the EXCLUSION can always
be set to 1.

This is part 2 of simplifying si_emit_msaa_sample_locs.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
818381dfbd radeonsi: always set sample locations even for 1x MSAA for simplicity
This is part 1 of simplifying si_emit_msaa_sample_locs.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
f6d861a1c1 radeonsi: move PA_CL_NGG_CNTL emission into rasterizer state
It's a better place. Edge flags only have effect if polygon mode is
enabled. Changing shaders should no longer roll the context due to line
culling flipping EDGE_FLAG_ENA.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
941e214fe7 radeonsi: reorder and comment tracked registers
Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d7802b02c4 radeonsi: split tracked_regs masks into context registers and other registers
Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
9cf2e47833 radeonsi: increase SDMA gfx9+ limits
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
52f94e2b93 radeonsi: decompress DCC for SDMA if we're really going to use SDMA
change the order of operations

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d2e6c4d255 radeonsi: unduplicate si_translate_format_to_hw
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
5f2779f62a radeonsi: completely rewrite how VGT_SHADER_STAGES_EN is set
Use a state atom with an emit function instead of precomputing up to 256
pm4 states in si_context.

Some register fields are precomputed in si_shader for NGG. Others are set
in si_update_shaders.

Acked-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
cfc9352c25 radeonsi: remove RADEON_FLAG_MALL_NOALLOC due to no use
and we'll need to use that bit for something else in the future.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d3f716bdfc radeonsi: add a gfx11 version of si_decompress_textures, add assertions < GFX11
si_decompress_textures is renamed to gfx6_decompress_textures.
gfx11_decompress_textures is added.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
dc311f3f61 radeonsi: remove a useless depth texture function call in a fast color clear
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d692d433f2 radeonsi: use nir_lower_alu_to_scalar correctly
We should use the filter callback that's also used by st/mesa.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
5066623b79 radeonsi: print shader-db stats with AMD_DEBUG=vs,ps,stats
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
2bf839f0ae radeonsi/gfx11: extend DB_Z_INFO.NUM_SAMPLES programming to > GFX11
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
52ca879cdd radeonsi: export non-zero edgeflags for GS and tess
because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
b72a1883e2 radeonsi: remove gl_BackColor VS outputs on demand if color_two_side is disabled
We just need to set the ps_inputs_read_or_disabled mask correctly.

The VS outputs_written mask should set BFCn instead of COLn, which is why
this removes the is_varying parameter that forced COLn to be set for BFCn.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
a1d938d318 radeonsi: define si_shader_io_get_unique_index() values as SI_UNIQUE_SLOT_*
for later use

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
ed8250360f amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
192b2c7c31 ac/nir/ngg: always use load_initial_edgeflags_amd, choose the value in drivers
radeonsi will have a more complicated condition here

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d6e70334ff ac/surface: fix R32G3B32 image format regression for gfx6-8
This is a different fix from the one reviewed because that one broke gfx9.

Fixes: ea7c89d1f5 - ac/surface: move determing ADDR_FMT_* into a helper function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
David Heidelberg
15be2f554a ci: fix KVM module modprobe code
Fixes: 5941fc8ccd ("ci: enable shellcheck on whole .gitlab-ci")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23406>
2023-06-06 17:28:09 +00:00
David Heidelberg
fed5a50d0f ci: missed variable inside the big rename and split ARCH and DEBIAN_ARCH
Fixes: 5140ff1948 ("ci: rename x86 and amd64 to x86_64, armhf to arm32, and i386 to x86_32")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23406>
2023-06-06 17:28:09 +00:00
Rhys Perry
b9c1d74ff4 radv: correctly skip vertex loads with packed formats
This is supposed to check whether any channels of the element is used, but
skipped_start is always 0 for packed formats.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: a46acdbc3f ("radv: Lower non-dynamic VS inputs in NIR.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9062
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23370>
2023-06-06 16:59:16 +00:00
Rhys Perry
69e259dcff radv: initialize aco_compiler_options::is_opengl
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Fixes: 8d5cc23c18 ("aco: use gds reg when ordered xfb counter add")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23434>
2023-06-06 16:09:28 +00:00
Rhys Perry
53383fe8a5 aco: fix ds_sub_gs_reg_rtn validation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Fixes: 8d5cc23c18 ("aco: use gds reg when ordered xfb counter add")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23434>
2023-06-06 16:09:28 +00:00
Charmaine Lee
e2927dd5e7 mesa/main: fix distance attenuation calculation in ffvertex
The dist parameter to calculate_light_attenuation() is the
reciprocal of ||VP|| used in the distance attenuation formula (2.4).
So get its reciprocal first before applying it to the distance attenuation
formula.

This fixes a lighting issue in Knights of the Old Republic.

Fixes: c5b3d488f9 ("mesa/main: make ffvertex output nir")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collaborar.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23404>
2023-06-06 15:15:55 +00:00
Lionel Landwerlin
049c791a63 intel/fs: fix pull-constant-load prior to gfx7
In ad9bc1ffb5 ("intel/fs: enable UBO accesses through bindless heap")
we added a new source, we need to fixup the source index for the
generator.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ad9bc1ffb5 ("intel/fs: enable UBO accesses through bindless heap")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
2023-06-06 14:47:41 +00:00
Lionel Landwerlin
c56dd678e4 intel/stub_gpu: add an option to launch valgrind
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
2023-06-06 14:47:41 +00:00
Yonggang Luo
61a7eacf3e virgl: Replace the usage of os_get_process_name with util_get_process_name
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21034>
2023-06-06 13:28:19 +00:00
Yonggang Luo
b3feb48548 virgl: Array cmdline on stack should initialized to 0
Because strncpy may not append 0 if source string is longer than num(63)
Fixes: b3b82fe8ea ("virgl/vtest: add vtest driver")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21034>
2023-06-06 13:28:19 +00:00
Yonggang Luo
ae7a30d5db r300: Replace usage of os_get_process_name with util_get_process_name in r300_chipset.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21034>
2023-06-06 13:28:18 +00:00
Samuel Pitoiset
8a22f5c372 radv: initialize the device cache UUID even if on-disk cache is disabled
Otherwise the pipeline cache UUID isn't initialized as well, and the
RADV meta shaders cache can be corrupted.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9150
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23439>
2023-06-06 12:47:31 +00:00
Tapani Pälli
e6e320fc79 anv: make Wa_16013994831 to use intel_needs_workaround
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22560>
2023-06-06 12:06:22 +00:00
Tapani Pälli
58e2947cc9 iris: make Wa_16013994831 to use intel_needs_workaround
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22560>
2023-06-06 12:06:22 +00:00
Benjamin Lee
7e9b06f1c6 intel: Fix stack overflow in intel_dump_gpu
Previously, the call to ensure_device_info in the intercepted ioctl
would eventually result in another call to ioctl, recursing until stack
overflow:

 - ioctl (intercepted)
 - ensure_device_info
 - intel_get_device_info_from_fd
 - intel_device_info_i915_get_info_from_fd
 - getparam
 - intel_ioctl
 - ioctl (intercepted)

Signed-off-by: Benjamin Lee <benjamin@computer.surgery>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23418>
2023-06-06 11:17:06 +00:00
Qiang Yu
bd88c75d4c aco,radv: remove unused gs aco shader info
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23432>
2023-06-06 10:55:10 +00:00
Yiwei Zhang
75cd115ecf venus: temporarily disable VK_EXT_memory_budget
This has confused the apps. Back out for now until further investigation
is done.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23452>
2023-06-06 09:40:14 +00:00
Emma Anholt
0be83bf1c4 anv: Drop unused ALL_GRAPHICS_LIB_FLAGS.
copy and paste from radv.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22865>
2023-06-06 09:03:09 +00:00
Emma Anholt
b44d477489 tu: Ignore unused shader stages in pipeline library creation.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22865>
2023-06-06 09:03:08 +00:00
Ian Romanick
78dd15d8e8 intel/eu/validate: Add some validation of ADD3
v2: Remove spurious ALIGN_1 checks. Suggested by Matt.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
1c4c76032b intel/eu/validate: Add Gfx12.5
This required updating the expected results in a number of test. The
vast majority of these are cases where Gfx12.5 platforms don't allow
mixing F and HF sources.

In all honesty... I just updated the half_float_conversion expected
results until the test passed.

The next commit will add changes specific to Gfx12.5.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
a3cfec0690 intel/eu/validate: Use a single macro define half_float_conversion cases
This is what other tests do. The next commit will add a third set of
possible results (for Gfx12.5+), and the multiple macro method does not
scale.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
7ef45e661f intel/fs: Add constant propagation for ADD3
v2: Require that the constant value be representable as either uint16_t
or int16_t. Suggested by Matt.

v3: Remove redundant patterns. Noticed by Matt.

shader-db:

DG2
total instructions in shared programs: 23103767 -> 23103577 (<.01%)
instructions in affected programs: 51822 -> 51632 (-0.37%)
helped: 98 / HURT: 15

total cycles in shared programs: 842347714 -> 842380017 (<.01%)
cycles in affected programs: 1942595 -> 1974898 (1.66%)
helped: 97 / HURT: 32

Nearly all of the affected shaders (around 9,900) are shaders in
Cyberpunk 2077. It's about an even split between vertex and fragment
shaders. The majority of the remaining affected shaders (3,600) are
from Strange Brigade. This was also a nearly even split between
fragment and vertex.

All but two of the lost shaders are SIMD32 fragment shaders in
Cyberpunk 2077. The other two are SIMD32 fragment shaders in Dota2.

fossil-db:

DG2
Instructions in all programs: 196379107 -> 196248608 (-0.1%)
helped: 13467 / HURT: 1210

Cycles in all programs: 13931355281 -> 13929955971 (-0.0%)
helped: 11801 / HURT: 2922

Lost: 90

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
7b34808649 nir/algebraic: Fixup iadd3 related patterns
There should not be any isub at this point due to lowerings that happened
ages before getting to late algebraic.

shader-db:

DG2
total instructions in shared programs: 23103769 -> 23103767 (<.01%)
instructions in affected programs: 65 -> 63 (-3.08%)
helped: 1 / HURT: 0

total cycles in shared programs: 842348074 -> 842347714 (<.01%)
cycles in affected programs: 28572 -> 28212 (-1.26%)
helped: 3 / HURT: 0

One compute shader in Assassin's Creed Odyssey was affected.

fossil-db:

DG2
Instructions in all programs: 196400668 -> 196400676 (+0.0%)
helped: 8 / HURT: 5

Cycles in all programs: 13931740724 -> 13931758003 (+0.0%)
helped: 8 / HURT: 7

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
9a9a86013c intel/fs: Allow HF const in MAD on Gfx12.5 if all sources are HF
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
4f272bf001 intel/fs: Fix handling of W, UW, and HF constants in combine_constants
Sources that are already W, UW, or HF can be represented as those types
by definition. Pass them through. Previously an HF source on a MAD would
have been marked as !can_promote. I'm pretty sure this means it would
get moved out to a register, but I did not verify this.

For ADD3, a constant source could be D or UD. In this case, the value
must be tested to determine whether it can be represented as W or
UW. The patterns in opt_algebraic won't generate an ADD3 with constant
source, so this problem cannot occur yet.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
4cc3206218 intel/fs: Don't munge source order of 3-src instructions in opt_algebraic
This only impacts ADD3, so at this point it should not have any
affect. As soon as constants are propagated into ADD3 instructions, it
will be a problem.

The worst part is, the ADD3 instrutions that are broken by the old code
aren't even "progress" on this pass.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Caio Oliveira
60a00f246b nir/print: Print 0 when mem_modes or resource_intel have no values
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23376>
2023-06-06 01:23:18 +00:00
Dave Airlie
8bdd3e318b docs: update docs for lavapipe mesh shading
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23447>
2023-06-06 01:17:34 +00:00
David Heidelberg
bc3f2ab62b traces: update sir-f720 trace expectations for zink on anv and freedreno
Same changes on both driver, looks OK.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23445>
2023-06-05 20:49:13 +00:00
Dave Airlie
4909a216a5 lavapipe: enable task/mesh shaders.
This is the enable for the exts/features/properties.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
aa2c209260 lavapipe: add execution backends for mesh shader draw apis
This binds the mesh draw apis to the gallium backend ones.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
5c6c226f5a lavapipe: add support for task/mesh shader stages in various places
this bumps the LVP_SHADER_STAGES to allow task/mesh shaders to be used,
and adds them to various state binding and execution places.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
092b1daaf6 lavapipe: add mesh query support
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
ccb16259cb lavapipe: handle some mesh shader stage differences.
certain state info is no long required if you using mesh/task in the
pipeline.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
8f8c55fd38 llvmpipe: enable task/mesh shader support.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
450c95c7b4 llvmpipe: add mesh shader drawing.
This is the big execution one, it implement the draw mesh callback.

This executes task shaders and mesh shaders with no overlap.

When task shaders finish, the mesh shader is launched using the payload
data, unless no task shader is run, then the mesh shader is launched.

Once the mesh shader is finished the data is supplied to the draw
pipeline to convert to linear vertex data with no per-prim data,
then passed to draw for clipping and further processing.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
8fcb024047 llvmpipe/cs: add multiple stride indirect to fill_grid_info.
mesh shaders needs to iterate across multiple indirect draws

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
3994fb1e19 llvmpipe/cs: add task/mesh shader support to compute shader builder.
This allows generating task and mesh variants of compute shaders.

It adds:
- vertex and primitive outputs support - aos writing.
- payload support
- mesh iface for the output and count callbacks.
- draw_id
- multiple iteration support to the exec fn to allow launches
in multiple passes to reduce memory usage

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
51eb3cc563 gallivm/cs: add payload ptr to the cs thread data.
This fits best at a thread level beside shared.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
e4c5a9383d llvmpipe: bind task/mesh resources and dirty bits
This binds the task/mesh states to be updated on dirty changes

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
936db9f8f3 llvmpipe: add query support for task/mesh shaders
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
575cc620cd llvmpipe: add debug bit for mesh shaders
Reviewed-by: Roland Scheidegger <sroland@vmware.com>#
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
fcf653067e llvmpipe: add dirty bits for mesh and task shaders.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
24f4f35eac llvmpipe: bump dirty tracker to 64-bits.
We need a lot more dirty states for task/mesh

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
d9fae96618 llvmpipe: start adding task/mesh support.
This is just some infrastructure for creating shaders and contexts.

task/mesh shaders are based on compute shaders and share nearly all
their code with compute.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
b0b81b279c llvmpipe: resize arrays to handle mesh shaders.
This just bumps some limits.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
7f1151d90d gallivm/nir: add support for mesh shader outputs.
mesh shaders can have vertex and primitive outputs, and act a bit
like TCS shaders, add the callback to allow the driver to decide
how to store these.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
a1106fd8b8 gallivm/nir: call task shader lowering.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
a29ed5ba5d gallivm/nir: add a mesh interface and vert/prim count setting.
This adds a callback to the driver for a mesh interface to implement
the set_vertex_and_primitive_count intrinsic

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:47 +10:00
Dave Airlie
24fe5abbae gallivm/nir: add launch mesh workgroups
add support the launch mesh workgroups intrinsic for task shaders.

This writes the values out to the start of the payload.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
97a2d0aded gallivm: add support for payload access
mesh shading has a payload to pass between task and mesh shaders,
this acts like shared memory as well, so we use the standard memory
hooks to access it.

This current adds the payload after the 12-byte header which will
contain the x/y/z grid sizes.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
f3e6582f32 draw: add support for per primitive aos emission
This add support to the aos emit code so that mesh shaders
can use it for per prim outputs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
fe0e4bf863 draw: add mesh pipeline middle end.
This sets up the mesh pipeline to call the post vs clipping
and so emit for stats (not for so).

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
888fb3d360 draw: add a mesh primitive assembler.
This is assembles prims from mesh vertex and per-primitive outputs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
bb1be13bb8 draw: move draw_vertex_info and draw_prim_info to public header.
Need to use these in llvmpipe for mesh shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
03768014fa draw: add mesh shader infrastructure
This adds draw mesh shader infrastructure, as mesh shaders have
to be able to feed into the post vs stages like clipping, so
we have to wire informational things up.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
6123f8e245 lavapipe: fix indentation whitespace
these were indented too much.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Dave Airlie
cbb8632991 lavapipe: fix pipeline sanitizing.
This isn't needed for fragment shader.

Cc: mesa-stable
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
2023-06-06 05:01:46 +10:00
Jesse Natalie
954e56bb18 d3d12: Fully initialize UAV desc for null SSBOs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23440>
2023-06-05 16:27:08 +00:00
Samuel Pitoiset
df8b41b0b4 zink/ci: remove useless RADV_PERFTEST=gpl
This option has been removed a while ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23442>
2023-06-05 16:00:52 +00:00
Juan A. Suarez Romero
3fa3c23623 broadcom/ci: update expected results
Update failing/flake list.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23441>
2023-06-05 17:00:04 +02:00
Erik Faye-Lund
6d142078bc nir: use generated immediate comparison helpers
This makes the code a bit less verbose, so let's use the helpers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:08 +00:00
Erik Faye-Lund
82465f1418 nir: generate nir_{cmp}_imm variants
We have a couple of open-coded variants of these, but let's generate all
of them for completeness.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:07 +00:00
Erik Faye-Lund
28b1c5bca1 nir: use nir_i{ne,eq}_imm helpers
We already have these, so let's use them more.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:07 +00:00
Erik Faye-Lund
57260a836a d3d12, dozen: make sure we pass float to fge
This doesn't matter much in practice, because the integer an float
representations of zero are the same. But it's easier to understand
what's going on if the correct type is used, so let's clean this up.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:07 +00:00
Karmjit Mahil
817be4b860 pvr: Fix typo causing seg faults copying immutable samplers
Fixes seg faults in:
  dEQP-VK.binding_model.shader_access.primary_cmd_buf
    .sampler_immutable.no_access.single_descriptor.*
  dEQP-VK.binding_model.shader_access.primary_cmd_buf
    .sampler_immutable.no_access.multiple_contiguous_descriptors.*

It does not fix them. Now they just hit asserts in the compiler.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23357>
2023-06-05 13:06:57 +00:00
Pavel Ondračka
1021e2b946 r300: fail linking instead of using dummy shaders
We need to tell the apps about the hardware limtations, so that they
have a chance to take a fallback path. Fixes GTK misrendering, due to
use of the dummy shaders (now properly fallbacks to software).

Based on a MR by Filip Gawin.

Closes:https://gitlab.freedesktop.org/mesa/mesa/-/issues/7291

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22708>
2023-06-05 12:40:52 +00:00
Rhys Perry
9ae5c942da aco/tests: add discard export target tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23371>
2023-06-05 11:42:21 +00:00
Rhys Perry
21867b45c1 aco: fix has_color_exports=true for mrtz exports
V_008DFC_SQ_EXP_NULL is after V_008DFC_SQ_EXP_MRTZ.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Mikhail Gavrilov mikhail.v.gavrilov@gmail.com
Fixes: d3611af389 ("aco: support nir_export_amd with ps targets")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9135
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23371>
2023-06-05 11:42:21 +00:00
Sergi Blanch Torne
7447c15894 Revert "ci: disable Collabora's LAVA lab for maintance"
This reverts commit 7059aa2f84

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23429>
2023-06-05 10:48:21 +00:00
Pavel Ondračka
d4b8e8a481 r300: enable PIPE_CAP_TGSI_TEXCOORD
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23299>
2023-06-05 10:31:40 +00:00
Juan A. Suarez Romero
f34d76e93e v3d: Z/S blit require Z/S formats
Similar to checking that a z/s format can not be used for color
blit with tile-based blit path, color format can not be used for z/s
blit.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23390>
2023-06-05 10:15:05 +00:00
Pavel Ondračka
4c6a0f9cf1 r300: remove nir round lowering
We should only see round from lowered ARR and in that case we want
to reconstruct the ARR, not lower it.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23419>
2023-06-05 09:53:32 +00:00
Pavel Ondračka
5404c71e8a r300: fuse ROUND and ARL to ARR
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23419>
2023-06-05 09:53:32 +00:00
Vinson Lee
8bc7d71c23 pvr: Fix signed comparison
Fix defect reported by Coverity Scan.

Unsigned compared against 0 (NO_EFFECT)
unsigned_compare: This less-than-zero comparison of an unsigned value is never true. val < 0U.
unsigned_conversion: val is converted to an unsigned type because it's compared to an unsigned constant.

Fixes: 480bdff4b5 ("pvr: Add support to process transfer and blit cmds")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23416>
2023-06-05 09:21:34 +00:00
Collabora's Gfx CI Team
d75973a142 Uprev Piglit to 5036601c43fff63f7be5cd8ad7b319a5c1f6652c
d8c08d123f...5036601c43

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23245>
2023-06-05 08:52:38 +00:00
Dave Airlie
48745d58e2 lavapipe: when in doubt, swizzle the swizzle
instead of swizzling.

Fixes a bunch of broken depth/stencil swizzling tests in CTS
dEQP-VK.pipeline.monolithic.sampler.border_swizzle.s8_uint_stencil.argb.transparent_black.gather_0.no_swizzle_hint

v2: kusma had nicer ideas.

Fixes: 7826648e14 ("lavapipe: fix depth texturing swizzle")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23428>
2023-06-05 08:26:41 +00:00
Sergi Blanch Torne
7059aa2f84 ci: disable Collabora's LAVA lab for maintance
This is to inform you of some planned downtime in the LAVA lab as follows:
    Start: 2023-06-05 08:00 GMT
    End: 2023-06-05 12:00 GMT

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23426>
2023-06-05 09:28:56 +02:00
Yonggang Luo
137aa8b2dc util: Replace all usage of PIPE_TIMEOUT_INFINITE with OS_TIMEOUT_INFINITE
They are exactly the same, so it's safe to do the replace
Also gen OS_TIMEOUT_INFINITE var with rusticl_mesa_bindings_rs by OS_ prefix and
include "util/os_time.h" in rusticl/rusticl_mesa_bindings.h

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23401>
2023-06-05 05:12:02 +00:00
David Heidelberg
6d013d1f13 ci/fedora: re-enable ccache
Works well with Fedora 38, the offending bug was fixed.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23425>
2023-06-05 00:11:08 +02:00
David Heidelberg
bcc0947ed0 ci: use bash arrays in Fedora script + shebang change
We not passing very long string, but multiple separate packages, using
the array seems to be more logical and clear solution, without
shellcheck complaining about word spliting and risk making of accidental
mistakes (missed backslash etc.).

Shebang change, because let's have it same everywhere.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23425>
2023-06-05 00:11:06 +02:00
Vinson Lee
bfb092b955 nv50: Fix memory leak in error path
Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable memobj going out of scope leaks the storage it points to.

Fixes: a157133380 ("nvc0/nv50: support and enable EXT_memory_object*")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23417>
2023-06-03 17:42:58 -07:00
Friedrich Vock
87ac5d7d0a nir: Remove unnecessary assert in nir_before_src
This condition can occur in the wild (more specifically in RT shader
call lowering), and it is handled correctly.

Cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22536>
2023-06-03 10:26:02 +00:00
Friedrich Vock
ee2764d5e8 nir: Rematerialize derefs in use blocks before repairing SSA
nir_repair_ssa_impl may insert phi nodes for any deref, but if the deref mode is uniform, validation fails.
To fix this, rematerialize the derefs in the blocks they are used to avoid generating phi nodes for them.

Cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22536>
2023-06-03 10:26:01 +00:00
Eric Engestrom
cf323446e7 amd/ci: run gl(es) cts & piglit on radeonsi on vangogh
Manual/post-merge for now because radeonsi isn't a priority for the few
steamdecks that we have in CI and we need to keep them free for merging
MRs.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22990>
2023-06-03 04:40:02 +00:00
Yonggang Luo
070d02b04b docs: Update document about pipe_prim_type with mesa_prim
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-06-03 03:29:03 +00:00
Yonggang Luo
12256136e0 compiler: Rename shader_prim to mesa_prim and replace all usage of pipe_prim_type with mesa_prim
This is a prepare step to remove depends on p_defines.h in src/util/*

This is done by:
replace pipe_prim_type with mesa_prim
replace shader_prim with mesa_prim
replace PIPE_PRIM_MAX  with MESA_PRIM_COUNT
replace SHADER_PRIM_  with MESA_PRIM_
replace PIPE_PRIM_ with MESA_PRIM_

This patch only replace code only

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-06-03 03:29:03 +00:00
Yonggang Luo
5393156da4 compiler: Add SHADER_PRIM_COUNT to be SHADER_PRIM_MAX + 1
This is a prepare step for replace all usage of pipe_prim_type and shader_prim with mesa_prim
And the newly added MESA_PRIM_COUNT in latter patch will equal to SHADER_PRIM_COUNT

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-06-03 03:29:03 +00:00
Yonggang Luo
e4b6a0a824 compiler: Getting shader_prim to be PACKED that consistence with pipe_prim_type
This is a prepare step for replace all usage of pipe_prim_type and shader_prim with mesa_prim

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-06-03 03:29:03 +00:00
Yonggang Luo
fcef3f040b microsoft/compiler: Getting function impl to be consistence with decl in dxil_enums.*
This is a prepare step for add PACKED attribute on shader_prim

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-06-03 03:29:03 +00:00
Dylan Baker
9ca0bdba01 intel/tools/error2aub: Fix potential out of bounds read
Originally the engines size was set to I915_ENGINE_CLASS_VIDEO + 1,
where video was the largest value, and INVALID had a value of -1. Since
then a COMPUTE member was added to the enum, and the INTEL_ENGINE class
moved invalid to the last value.

CID: 1530425
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23384>
2023-06-02 23:21:05 +00:00
Iván Briano
39e057028c vulkan/wsi: fix double free on error condition
On error during wsi_wl_surface_create_swapchain(),
wsi_wl_swapchain_chain_free() is called, followed by vk_free() of the
recently freed chain.
Move the vk_free() to wsi_wl_swapchain_destroy() to avoid the double
free.

Fixes dEQP-VK.wsi.wayland.swapchain.simulate_oom.*

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23383>
2023-06-02 15:12:19 -07:00
José Roberto de Souza
d22a86c77c iris: Implement external object implicit syncronization for Xe kmd
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22544>
2023-06-02 20:46:48 +00:00
Paulo Zanoni
ba373a298d iris: Add iris_implicit_sync struct and functions to do implicit synchronization for Xe kmd
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22544>
2023-06-02 20:46:48 +00:00
Paulo Zanoni
f26467a343 iris: Extend iris_bo_wait_syncobj() to wait on external implicit syncobj
This way we can guarantee that external bos are also idle in other
process.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22544>
2023-06-02 20:46:48 +00:00
Paulo Zanoni
8971a878c7 iris: Add functions to import and export implicit sync state
Xe KMD is not going to support implicit synchronization, so we need to
use extra ioctls to import/export implicit synchronization state from
gem BOs from/to drm syncobjs.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22544>
2023-06-02 20:46:48 +00:00
José Roberto de Souza
d0a3a05543 iris: Attach a dma-buf to bo flink
Bo flink shares a bo in the same GPU between process, flink precedes
dma-buf so it lacks features like syncronization.
So to workaround that, here during iris_bo_flink() it is
attaching a dma-buf to the bo.

Then in imported process it tries to attach a dma-buf again but
as it was already create it is just ref counted.

From this point on importer and exporter can syncronize access like
any other dma-buf.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22544>
2023-06-02 20:46:48 +00:00
Paulo Zanoni
127bdefe50 iris: Store prime fd of external bos for Xe KMD
In the next patches this prime fd will be needed to do implict
synchronization in external bos for Xe KMD as it don't have implict
syncronization in KMD side.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22544>
2023-06-02 20:46:48 +00:00
Dmitry Osipenko
c1ac4ea13e hasvk: Use intel_ioctl() helper for GEM_SET_TILING
Replace opencoded ioctl() usage with a common intel_ioctl() helper.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23399>
2023-06-02 20:09:24 +00:00
Dmitry Osipenko
4a2655d084 anv: Use intel_ioctl() helper for GEM_SET_TILING
Replace opencoded ioctl() usage with a common intel_ioctl() helper.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23399>
2023-06-02 20:09:24 +00:00
Dmitry Osipenko
16cc0c0eda intel/dev: Use intel_ioctl() helper for GEM_SET_TILING
Replace opencoded ioctl() usage with a common intel_ioctl() helper.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23399>
2023-06-02 20:09:24 +00:00
Dmitry Osipenko
2d3c1707fa iris/bufmgr: Use intel_ioctl() helper for GEM_SET_TILING
Replace opencoded ioctl() usage with a common intel_ioctl() helper.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23399>
2023-06-02 20:09:24 +00:00
David Heidelberg
5140ff1948 ci: rename x86 and amd64 to x86_64, armhf to arm32, and i386 to x86_32
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8049

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23282>
2023-06-02 21:30:15 +02:00
Jesse Natalie
653a374126 dzn: Fix incremental binding of VBs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23403>
2023-06-02 18:22:24 +00:00
Jesse Natalie
fb722ca6ff dzn: Don't create D3D objects for secondary command buffers
We emulate secondary command buffers via record/replay, we don't
need actual D3D objects, and having them can cause debug layer errors
due to getting out of sync with the state of the Vulkan object.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23403>
2023-06-02 18:22:23 +00:00
Zhang, Jianxun
ec9efee907 anv: Remove alignment to aux ratio on size of main surface
The existing 4KB alignment is sufficient for both 1MB and
64KB alignment requirements of CCS buffer.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23002>
2023-06-02 16:50:32 +00:00
Zhang, Jianxun
d2b6f16145 anv: Support 1MB AUX mapping (MTL)
Replace the hardcoded 64KB granularity with a value
provided by AUX module that returns either 64KB(TGL)
or 1MB(MTL) of the running system.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23002>
2023-06-02 16:50:32 +00:00
Mark Janes
a98f246857 isl: use generated workaround helpers for Wa_1806565034
This workaround was enabled for gen12+, but only applies to gen12.0.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21912>
2023-06-02 16:17:34 +00:00
Karol Herbst
3a5a7203af rusticl/device: set preferred vector size of doubles if fp64 is enabled
Fixes: 400847a990 ("rusticl/device: improve advertisement of fp64 support")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23391>
2023-06-02 15:00:01 +00:00
Matt Coster
d1b17a5edc pvr: Implement ZLS subtile alignment
This is a workaround for the edge case where a depth buffer is smaller
than a single tile size.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
620e7d4cf2 pvr: Rename ds_{image,iview} in pvr_gfx_sub_cmd_job_init()
The added prefix makes it clear we're referencing the depth/stencil
attachment.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
fa8667b728 pvr: Publicise some static functions from pvr_blit.c
These will be used to implement ZLS subtile alignment. One function
that was already public has also had its declaration moved from
pvr_private.h to the newly created pvr_blit.h.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
c31998b7d3 pvr: Add pvr_image_view_get_image()
This replaces the pattern of vk_to_pvr_image(iview->vk.image).

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
675aa18d4d pvr: Cleanup in pvr_process_cmd_buffer()
Renaming all barrier structs allows the pvr_process_event_cmd_barrier()
calls to be placed on a single line.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
8dbf9932a9 pvr: Add wait_on_previous_transfer flag to graphics subcommand
This inserts a barrier before the fragment job to wait on the previous
transfer job.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
40ce383554 pvr: Use pvr_sub_cmd_event union members directly
This has the benefit of replacing some explicit asserts with static type
checking.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Matt Coster
f63f4fac0a pvr: Move pvr_get_isp_num_tiles_xy() to rogue_hw_utils.h
Rename s/pvr/rogue/ to match the other functions in that file.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23313>
2023-06-02 14:43:24 +00:00
Konstantin Seurer
46cd332c36 radv/rt: Fix pipeline libraries
This was completely broken, because radv_create_group_handles would
access OOB stages.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23128>
2023-06-02 14:19:37 +00:00
Matt Coster
b5ac476b98 pvr: Fix segfault in pvr_physical_device_init()
This was introduced (by me) in a previous commit. Part of pdevice->vk
was initialised before calling vk_physical_device_init() which then
overwrite our values.

Fixes: 4ba553ab9a ("pvr: Use common vkGetPhysicalDeviceFeatures2() implementation")

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23366>
2023-06-02 14:03:28 +00:00
Samuel Pitoiset
84f2d26509 nir: print locations for per-vertex fragment shader inputs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
2023-06-02 13:25:43 +00:00
Samuel Pitoiset
7b213254c9 nir/lower_io: add nir_intrinsic_load_input_vertex to is_input()
To add the const offset to the base index.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
2023-06-02 13:25:43 +00:00
Samuel Pitoiset
72955540cc spirv,nir: add support for SpvDecorationPerVertexKHR
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
2023-06-02 13:25:43 +00:00
Samuel Pitoiset
c2ec23ab84 spirv,nir: add support for BaryCoord{NoPersp}KHR builtins
This introduces new intrinsics nir_intrinsic_load_barycentric_coord_xxx
with 3-components instead of expanding the existing ones that are
supposed to interpolate input varyings, while BaryCoord is a sysval
on most hardware.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
2023-06-02 13:25:43 +00:00
Samuel Pitoiset
c49a052cbf spirv: add support for SpvCapabilityFragmentBarycentricKHR
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23254>
2023-06-02 13:25:43 +00:00
Erik Faye-Lund
adbd362421 zink: update profiles schema
The 0.8.1-251 release has shipped, which contains the latest bits we
need in order to be clean here. Let's bump the bumpbump-bump.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23342>
2023-06-02 13:01:23 +00:00
Mike Blumenkrantz
501f78b268 draw: add (disabled) vertex dumping for non-linear emit
matches linear path

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
2023-06-02 12:32:23 +00:00
Mike Blumenkrantz
b45594f4ff lavapipe: don't pass indirect info in streamout draws
this is otherwise broken for a sequence like draw_indirect -> draw_indirect_bc

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
2023-06-02 12:32:23 +00:00
Mike Blumenkrantz
13af5dda97 lavapipe: stop setting patch vertices constantly
this pollutes gallium traces and makes debugging more annoying

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
2023-06-02 12:32:23 +00:00
Mike Blumenkrantz
f75da8f2f0 lavapipe: bump max push constant size
this matches vkd3d-proton requirements

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
2023-06-02 12:32:23 +00:00
Mike Blumenkrantz
cc9e958053 lavapipe: fix DS3 min sample setting
if a DS3 pipeline enabling dynamic samples is not bound when samples
are set dynamically, then such a pipeline is later bound, min samples
would have been incorrectly set to 1

instead, flag the update for later and do it just before draw

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23368>
2023-06-02 12:32:23 +00:00
Tatsuyuki Ishi
5a85c4432c radv: Guard against misplaced RGP barrier markers.
RGP will crash if we emit a layout transition marker outside a barrier.
If this happens, trigger an assertion if its enabled or silently discard
the marker otherwise to avoid traces that cannot be opened.

Also, guard against attempts to start barrier markers recursively, since
this will corrupt the internal start/end matching.

Closes: <https://gitlab.freedesktop.org/mesa/mesa/-/issues/7971>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21033>
2023-06-02 11:55:03 +00:00
Tatsuyuki Ishi
7c48e886ec radv: Add RGP barrier markers for render pass transition and copy.
This allows them to be attributed to the correct event instead of being
blend to the previous barrier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21033>
2023-06-02 11:55:03 +00:00
Qiang Yu
f6c5133074 radeonsi: enable aco for mono standalone vs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:23 +08:00
Qiang Yu
8db2d6181b ac/llvm: remove unused barrier implementation
memory buffer barrier is still used when nir lowering, will
be removed later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:20 +08:00
Qiang Yu
2d1859b01e radeonsi: always use scoped barrier
aco has removed non-scoped barrier support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:16 +08:00
Qiang Yu
90b56e99f4 radeonsi: use nir_umul_high for fast udiv
nir has dedicated alu op for it. Also for removing int64
multiply which aco does not support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:13 +08:00
Qiang Yu
95ff215be2 radeonsi: calculate needed lds size when upload raw binary for vs
ELF do the same when upload binary. We can't do this when
compile, because it's know when draw time in radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:09 +08:00
Qiang Yu
142485ff64 radeonsi: fill aco shader info for mono standalone vs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:06 +08:00
Qiang Yu
5351209632 nir,ac/llvm,radeonsi: replace nir_buffer_atomic_add_amd with ssbo atomic
Now that radeonsi support pass desc to ssbo atomic ops,
we can use ssbo atomic instead. aco does not implement
nir_buffer_atomic_add either.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:51:02 +08:00
Qiang Yu
d39fd98a47 ac/llvm,radeonsi: lower nir_load_ring_esgs_amd in abi
It's not implemented by aco. So move the code from llvm
to nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:58 +08:00
Qiang Yu
b21098779d ac/llvm,radeonsi: lower nir_load_ordered_id_amd in abi
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:55 +08:00
Qiang Yu
19d9bca39e ac/llvm,radeonsi: lower nir_load_packed_passthrough_primitive_amd in abi
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:52 +08:00
Qiang Yu
bbcb02fac4 ac/llvm,radeonsi: lower nir_load_initial_edgeflags_amd in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:49 +08:00
Qiang Yu
dc07743106 ac/llvm,radeonsi: lower load_workgroup_num_input_(vertices|primitives) in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:46 +08:00
Qiang Yu
c8680f1f90 ac/llvm,radeonsi: lower nir_load_merged_wave_info_amd in abi
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:42 +08:00
Qiang Yu
327e35f667 ac/llvm,radeonsi: lower nir_load_gs_vertex_offset_amd in abi
aco does not implement this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:38 +08:00
Qiang Yu
a27058e8ea radeonsi: add scratch offset vs args explicitly for aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:34 +08:00
Qiang Yu
7445101fdd radeonsi: resolve lds ngg aco symbols
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
2023-06-02 17:50:22 +08:00
Qiang Yu
2d0e8e0258 aco: use ac_get_image_dim for array check when image intrinsic
This is to avoid missing array flag when <=GFX8 and 3D image
in which case is treated as 2D array image.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:59 +00:00
Qiang Yu
ed97cd92dc aco: implement nir_bindless_image_fragment_mask_load_amd
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Sigend-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:59 +00:00
Qiang Yu
50f9d644e8 aco: implement nir_xfb_counter_sub_amd
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:59 +00:00
Qiang Yu
8d5cc23c18 aco: use gds reg when ordered xfb counter add
This is currently only used by radeonsi.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:59 +00:00
Qiang Yu
438dcf6d0f aco/assembler: handle ds_(add|sub)_gs_reg_rtn encoding
They are different than normal DS instructions, only
use DATA[0], not use ADDR.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:59 +00:00
Qiang Yu
460b528c9e aco: implement load buffer with ACCESS_USES_FORMAT_AMD
This is used by radeonsi for vs input load and cdna
image load emulation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:59 +00:00
Qiang Yu
c5c98d2f20 ac/nir/ngg: don't use 8bit alu ops
aco doesn't support 8bit alu ops and radeonsi won't
call nir_lower_bit_size for most alu ops, so just
don't use 8bit alu ops (they will be lowered to 32bit
anyway if we do).

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:58 +00:00
Qiang Yu
12ee7eccf7 aco,radv: remove unused aco_shader_info fields
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:58 +00:00
Qiang Yu
89dab66561 aco: implement two load lds ngg intrininsic for radeonsi
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
2023-06-02 09:21:58 +00:00
Emma Anholt
2d02494d71 ci/turnip: Update full-run xfails.
The big pile of crashes were all either not covered by the fractional run
and a full run hadn't been run to update them, or unsupported where
Crash->Skip is not being reported as UnexpectedPass.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23385>
2023-06-02 04:33:40 +00:00
Daniel Stone
b3c6cd0886 ci: Respect $HTTP_PROXY for ci_run_n_monitor
We need to explicitly tell AIOHTTP that it's OK to take the HTTP proxy
from the environment.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23341>
2023-06-02 02:45:36 +00:00
Emma Anholt
200b55496a ci/crocus: Add a missing xfail.
Probably more fallout from debian 12 uprev.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23379>
2023-06-02 02:29:21 +00:00
Emma Anholt
7609b9f036 crocus: Fix regression from !20153
The MR fixed iris in 14dec0c147, but didn't
do the same fix for crocus.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23379>
2023-06-02 02:29:21 +00:00
Emma Anholt
900deea4cf Revert "ci: disable anholt's farm"
Things are back up.  This reverts commit
520c5091d7.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23381>
2023-06-02 00:45:24 +00:00
Emma Anholt
a6435e15eb ci/freedreno: Update minetest hash.
1 different pixel, undetectable change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
d8caa80cc5 mesa: Use shared NIR code for ARB_vp and FF VS position transformation.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
6855edcfb8 mesa/ffvs: Fix mvp_with_dp4 position transformation.
Copy and paste mistake, but didn't affect anybody since this knob is
disconnected at the moment.

Fixes: c5b3d488f9 ("mesa/main: make ffvertex output nir")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
6b529eabeb mesa: Use the NIR pass for fixed function fog.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
804647acfc mesa/ati_fs: Move prog->SamplersUsed/TexturesUsed setup to EndFragmentShader.
No need to have st_program.c come back into ATI_fs for this when it's a
property of program generation.  ARB programs set these up in their
translation, as well.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
6fde02816d mesa/ati_fs: Move NIR translation to ATI_fs compile time.
Now ati_fs takes the same basic path as prog_to_nir, and we don't have to
think about it so much.  Also, the ATI_fs frontend can skip shader info
setup since nir_shader_gather_info does it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
a652185696 mesa/ati_fs: Move sampler dim adjustment to a separate NIR pass.
This means that the main NIR translation for ATI_fs is now independent of
the fp key, and we could do it earlier in the compile pipeline.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
00f03a409c mesa: Move st_prog_to_nir_postprocess out of prog_to_nir.
We called it in the else branch, anyway.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
12c8499f31 mesa: Drop remaining unused ARB program instructions.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
7549f4f004 mesa: Drop unused control flow instructions for ARB programs.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
f0a8899ed1 mesa: Drop ARB program helper functions that are no longer used.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
279403d174 mesa: Move ARB_vp position invariant option handling to NIR.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
9301c08343 mesa/ARB_fp: Use the NIR pass for adding fog code instead of ARB instrs.
Tested with
https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/813

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
07c93cbdb0 mesa/ARB_fp: Drop an extra enum for fog mode.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
66951679f2 mesa: Move ATI_fragment_shader fog code emit to a NIR lowering pass.
Now it's implemented as a RMW of the FRAG_RESULT_COLOR output var (or
adjusting the store_output intrinsic's value for lowered i/o), which
should be reusable other places we might want to emit shader code for fog
(ARB_fp, fixed function fragment shaders).

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
b26a9efc5a nir,mesa: Add helpers for creating uniform state variables.
It's one of the weirder parts of our shader interface's interactions with
the GL API, so let's try to make it a little cleaner.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
95c3445258 nir: Use find_state_var in lower_atomics_to_ssbo.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Emma Anholt
1746413dd7 mesa: Use find_state_var in lower_builtin.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23111>
2023-06-01 23:57:32 +00:00
Jesse Natalie
5a914dcd6a d3d12: Support PIPE_CAP_VS_LAYER_VIEWPORT
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23377>
2023-06-01 23:39:41 +00:00
Jesse Natalie
f622b3072d microsoft/compiler: Viewport/layer as input to GS/HS needs to set feature bit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23377>
2023-06-01 23:39:41 +00:00
Jesse Natalie
764e39be36 microsoft/compiler: Fix usage of type var in semantic asserts
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23377>
2023-06-01 23:39:41 +00:00
Jesse Natalie
d100ddd8d7 microsoft/compiler: Fix the int->uint pass for arrayed I/O
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23377>
2023-06-01 23:39:41 +00:00
Jesse Natalie
0596304d62 dzn: Don't lower away mediump
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23344>
2023-06-01 23:01:04 +00:00
Jesse Natalie
3b0cc6e204 spirv2dxil: Enable mediump
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23344>
2023-06-01 23:01:04 +00:00
Jesse Natalie
ea68135ed1 microsoft/compiler: Handle mediump
Instead of treating all 16-bit values as "native 16-bit types,"
differentiate between concrete casts and mediump casts, where the
former requires native 16-bit types, and the latter only requires
DXIL min-precision. Additionally, UBO/SSBO loads/stores require
native 16-bit types.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23344>
2023-06-01 23:01:04 +00:00
Jesse Natalie
7371c9a2a8 microsoft/compiler: Always set support_16bit_alu
This just affects some nir opts. If we're lowering 16bit ops anyway,
the optimization doesn't matter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23344>
2023-06-01 23:01:04 +00:00
Jesse Natalie
2d3fbb44f4 nir: Add preserve_mediump as a shader compiler option
The DXIL backend would like to distinguish between casts to 16-bit
that must cast, vs those that may. If a shader only ever produces
16-bit types from mediump casts and ALU ops on those values, then
the resulting shader can be annotated with DXIL's min-precision
qualifier, basically telling the driver to use 16-bit precision if
it's faster for them. If it uses concrete 16-bit casts, or loads/
stores to externally-visible memory, then it must use the "native"
16-bit flag, which is not supported on all hardware.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23344>
2023-06-01 23:01:04 +00:00
Emma Anholt
cb965b207e zink: Use PIPE_CAP_FS_POINT_IS_SYSVAL.
This better matches up to how spirv treats the value.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22950>
2023-06-01 22:27:08 +00:00
Emma Anholt
bc773b795c nir/lower_texcoord_replace: Flag SYSTEM_VALUE_POINT_COORD read when we load it.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22950>
2023-06-01 22:27:08 +00:00
Emma Anholt
0e943bc3f2 glsl: Allow invariant flags on sysvals, such as gl_PointCoord.
When you set PIPE_CAP_FS_POINT_IS_SYSVAL, we'd fall out of
is_allowed_invariant(), despite it being allowed on special builtins.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22950>
2023-06-01 22:27:08 +00:00
Dave Airlie
c58518226b gallium/nir/tgsi: add various support for task/mesh bits
these translators are used by llvmpipe so need to be updated

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:57 +00:00
Dave Airlie
8fd1aad8f8 gallium/cso: add task/mesh shaders to the cso cache
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:57 +00:00
Dave Airlie
b02fba337f d3d12: don't report mesh/task limits
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:57 +00:00
Dave Airlie
ece1cb8c6b svga: don't report mesh/task shader limits
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:57 +00:00
Dave Airlie
31db515e03 radeonsi: don't report shader params for task/mesh
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
fd1ff352dd crocus: don't report mesh/task limits
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
7b547ccb9a iris: don't return shader params for task/mesh.
These should be reported as 0 for cso

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
2b3514966d gallium: add task/mesh shader entrypoints in context
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
2e8991733a freedreno: don't report task/mesh.
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
564094b3ce gallium: add a new PIPE_SHADER_MESH_TYPES
This adds a new limit, changing PIPE_SHADER_TYPES seems frought
with danger and very tricky. Currently only lava/llvmpipe plan to
offer task/mesh in GL land, so let's limit the fallout for now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
96b38883df gallium: expand pipe_grid_info to handle task/mesh.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Dave Airlie
0602108c38 gallium: add task/mesh shader query types to stats interface.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23291>
2023-06-01 21:50:56 +00:00
Karol Herbst
97c48edac0 rusticl/device: limit MAX_PARAMETER_SIZE to 32k
There is no good reason of having it too big and radeonsi returns an
absurd high value through PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE.

This speeds up the CTS testing this device limit.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23378>
2023-06-01 21:35:00 +00:00
Kenneth Graunke
2d9a3bb093 intel/compiler: Fix a fallthrough in components_read() for atomics
In commit 284f0c9a57 I refactored the
handling of the data source to just call a helper rather than special
casing opcodes with 0 or 2 sources.  Unfortunately, I also dropped the
"else return 1", creating a fallthrough for all sources other than
SURFACE_LOGICAL_SRC_ADDRESS and SURFACE_LOGICAL_SRC_DATA.

The case below happened to return the correct value for all cases except
SURFACE_LOGICAL_SRC_SURFACE, which has been returning 2 instead of 1
since that commit.

Restore the else case.  Thanks to Marcin Ślusarz for catching this.

Fixes: 284f0c9a57 ("intel/compiler: Add an lsc_op_num_data_values() helper")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23347>
2023-06-01 21:06:57 +00:00
Rob Clark
c5bac3164a freedreno/a6xx: Enable gl46
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
c32c5a7749 freedreno/a6xx: GL_ARB_pipeline_statistics_query
Handle the other pipeline stats counters in order to implement
GL_ARB_pipeline_statistics_query.  Note that this does away with
collecting *all* the counters if DEBUG_COUNTERS is enabled, other-
wise it was getting over-complicated.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
8192498530 freedreno: Handle compute queries
Compute stage can have queries too.  We need to handle that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
d52e9097e1 freedreno/a6xx: Handle nested pipeline stats queries
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
a475b7f66d freedreno/a6xx: Split primitives and pipeline-stats queries
They are really two completely different things.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
5fdd3a8d55 freedreno/a6xx: GL_ARB_transform_feedback_overflow_query
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
f8036c3b54 freedreno/a6xx: Remove primitives_relocw()
These days we don't track read vs write relocs, so it is the same thing
as primitives_reloc()

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:59 +00:00
Rob Clark
98c4b86694 freedreno/a6xx: Fix xfb stream configuration
Also, only emit PC_SO_STREAM_CNTL for tess shaders, to align with how
turnip does it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:58 +00:00
Rob Clark
973e1d4555 freedreno/a6xx: Add missing cap
Fixes wrong value reported for GL_MAX_VERTEX_STREAMS.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:58 +00:00
Rob Clark
ed7a1a5e5a freedreno/a6xx: Stop using fd_wfi()
This was originally intended for earlier gens where certain draw-time
state needed a WFI (because it wasn't banked, etc).  This isn't the case
on a6xx.  So just directly emit WFIs where they are needed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:58 +00:00
Rob Clark
d17610898d freedreno/a6xx: Clean up open coded flushes
Migrate more code to fd6_emit_flushes().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23301>
2023-06-01 20:37:58 +00:00
Georg Lehmann
79821d7afb aco: p_start_linear_vgpr doesn't always need exec mask
Foz-DB Navi21:
Totals from 1605 (1.21% of 132657) affected shaders:
CodeSize: 14023700 -> 14020320 (-0.02%)
Instrs: 2589881 -> 2589052 (-0.03%)
Latency: 22478420 -> 22473359 (-0.02%)
InvThroughput: 3851237 -> 3851092 (-0.00%)
Copies: 215316 -> 215438 (+0.06%); split: -0.39%, +0.44%

Allows more vcmpx usage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23302>
2023-06-01 20:18:23 +00:00
Lionel Landwerlin
018e306b8e intel/fs: fix a couple of descriptor mistakes
I found those issues while testing DOOM eternal and Ian also ran into
it with other shaders.

We write the desc register in SIMD1 exec_all, so all the data is in
the first component. We need to make sure to pass that component in
the lower SEND instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23354>
2023-06-01 19:53:41 +00:00
Rhys Perry
27047e11fb radv: allow wave32 for geometry shaders
Because is_ngg wasn't set early enough, radv_get_wave_size() would always
return 64.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23336>
2023-06-01 19:20:50 +00:00
Marek Olšák
7d066330e0 ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
2023-06-01 18:46:20 +00:00
Marek Olšák
3f7ddaf281 radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
2023-06-01 18:46:20 +00:00
Marek Olšák
4ffa45689f radeonsi: implement setting a custom pitch to any multiple of 256B on gfx10.3+
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
2023-06-01 18:46:20 +00:00
Marek Olšák
10c45fcc3f ac/nir: handle DEPTH as PITCH in ac_nir_lower_resinfo
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
2023-06-01 18:46:20 +00:00
Marek Olšák
d715631623 ac/surface: fix is_linear for stencil-only surfaces
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
2023-06-01 18:46:20 +00:00
Marek Olšák
4ce5f31877 amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23339>
2023-06-01 17:59:39 +00:00
Marek Olšák
9ddff6063f amd/addrlib: switch the license to the SPDX identifier MIT
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23339>
2023-06-01 17:59:39 +00:00
Eric Engestrom
539f2419ae ci/b2c: also detect non-soft GPU hangs with AMDGPU
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23358>
2023-06-01 16:12:44 +00:00
Mykhailo Skorokhodov
457f9ee191 mesa: Fallthrough GL_SRB_DECODE_ARB pname
GL_SRGB_DECODE_ARB should fall through into the (!query2) test.

Related-to: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21682
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23363>
2023-06-01 15:38:59 +00:00
Italo Nicola
f85c286f51 egl: fix comments alignment
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20387>
2023-06-01 14:48:27 +00:00
Italo Nicola
e516a0a94f egl: disable partial redraw when gallium hud is active
We draw the gallium hud directly to the rendered buffer, meaning that if
the buffer age is queried and then a partial redraw is done, we get a
ghosting effect from the hud drawn in previous frames.

Since we need to draw the hud with updated values every frame anyway,
there's no harm in disabling the buffer age and partial redraw.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Chris Healy <cphealy@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20387>
2023-06-01 14:48:27 +00:00
Corentin Noël
86532fa21d util: Use the gcc_struct attribute for packed structures in mingw
Actually set the packing behavior as the intended one when using this attribute,
even on mingw.

Otherwise, the default behavior is to use the ms_struct which makes the structures
use more space in some situations.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23338>
2023-06-01 14:05:55 +00:00
Eric Engestrom
b06be7c002 ci/zink+anv: fix flakes definition
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23364>
2023-06-01 13:01:31 +00:00
Eric Engestrom
88dc720d2d ci/crocus: fix flakes definition
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23364>
2023-06-01 13:01:31 +00:00
Eric Engestrom
67dd075fd3 ci/radv: fix flakes definition
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23364>
2023-06-01 13:01:31 +00:00
David Heidelberg
3db255a61a ci/ccache: recent ccache changed a output a bit, adapt script
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23359>
2023-06-01 13:13:31 +02:00
David Heidelberg
bc21c2863e ci: bump Alpine to 3.18
Update LLVM to 16.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23359>
2023-06-01 13:13:31 +02:00
Samuel Pitoiset
4265ab0095 radv: merge all FS user SGPRs into one using packed arguments
Much cleaner and this will allow us to add more arguments easily.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>
2023-06-01 10:04:53 +00:00
Samuel Pitoiset
8268b43e25 radv: regroup fragment shader user SGPRs emission
In preparation to use a packed user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>
2023-06-01 10:04:53 +00:00
Samuel Pitoiset
e8fe8ce4bc radv: introduce SHIFT/MASK for unpacking shader input args
Loosely based on RadeonSI, looks cleaner and safer to me. I will also
use that to pack fragment shader arguments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>
2023-06-01 10:04:53 +00:00
Samuel Pitoiset
a90d96bb22 radv/nir: use ac_nir_unpack_arg() for packed shader input user SGPRS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23333>
2023-06-01 10:04:53 +00:00
Samuel Pitoiset
c1b3646891 radv/ci: removed expected failures that are skipped now
These tests were failing because CTS wasn't checking a feature bit.
Now that CTS is fixed, these tests are skipped and can't fail at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23355>
2023-06-01 08:28:00 +00:00
Vinson Lee
7637fba452 freedreno/a6xx: Fix memory leak on error path.
Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable fd6_ctx going out of scope leaks the storage it points to.

Fixes: de3b34df97 ("freedreno: Add a6xx backend")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23289>
2023-06-01 05:51:05 +00:00
Alyssa Rosenzweig
5293a99ad1 panfrost: Use util_pipe_image_to_sampler_view
The common helper is based on what we had locally, with some more cases handled.
Let's use it instead of vendoring.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23273>
2023-06-01 02:36:05 +00:00
Alyssa Rosenzweig
07e477bb39 gallium: Add util_image_to_sampler_view helper
This helper is useful to implement images. This implementation is based on the
one in Panfrost and extended to handle all pipe_image_views (notably including
tex2d_from_buf which did not exist when the panfrost version was written). It
will be used in both Panfrost and Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23273>
2023-06-01 02:36:05 +00:00
Emma Anholt
d261c425ff drm-shim: Avoid assertion fail if someone does close(-1).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23116>
2023-06-01 01:50:41 +00:00
Mike Blumenkrantz
b9dd13e1b3 ci: uprev VVL to 1.3.251
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23343>
2023-06-01 01:18:29 +00:00
David Heidelberg
5682e395d1 gitlab: prefill MR template with first multiline commit message
Resolve situation for one commit MR, with description inside.

Acked-By: Mike Blumenkrantz <michae
l.blumenkrantz@gmail.com>

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23346>
2023-06-01 01:16:38 +00:00
Jesse Natalie
6c62eaf22d nir_opt_algebraic: Don't shrink 64-bit bitwise ops if pack_split is going to be lowered
Otherwise this can cause optimizations to fight resulting in infinite
optimization loops with opt_algebraic, constant_folding, and copy_prop.

Fixes: 368be872 ("nir/algebraic: shrink 64-bit bitwise operations with 0/-1 constant half")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23192>
2023-06-01 00:36:10 +00:00
Patrick Lerda
44b960a645 mesa/st: fix buffer overflow related to set_program_string()
For instance, this is triggered with "piglit/bin/ext_direct_state_access-named-program -auto -fbo":
==5695==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x606000050031 at pc 0x7f78dfca8d46 bp 0x7ffd9043b4a0 sp 0x7ffd9043ac50
READ of size 50 at 0x606000050031 thread T0
    #0 0x7f78dfca8d45  (/usr/lib64/libasan.so.6+0x3fd45)
    #1 0x7f78d450b18f in set_program_string ../src/mesa/main/arbprogram.c:385
    #2 0x7f78d3fdbd3e in execute_list ../src/mesa/main/dlist.c:13025
    #3 0x7f78d40c2564 in _mesa_CallList ../src/mesa/main/dlist.c:13451
    #4 0x7f78d42f380a in _mesa_unmarshal_CallList ../src/mesa/main/glthread_list.c:43
    #5 0x7f78d38e85c5 in glthread_unmarshal_batch ../src/mesa/main/glthread.c:122
    #6 0x7f78d38ea20d in _mesa_glthread_finish ../src/mesa/main/glthread.c:382
    #7 0x7f78d38ea20d in _mesa_glthread_finish ../src/mesa/main/glthread.c:347
    #8 0x7f78d3d73f69 in _mesa_marshal_IsProgramARB src/mapi/glapi/gen/marshal_generated2.c:4256

Fixes: 0b196b40a3 ("mesa: don't compute the same SHA1 twice in glShaderSource")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23295>
2023-05-31 23:01:05 +00:00
Erik Faye-Lund
1d6467b612 docs: increase contrast in dark-theme
The contrast-ratio between the foreground and background colors aren't
quite ideal in dark mode. This improves the situation a bit, by making
the body-text a bit brighter.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9043
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23236>
2023-05-31 22:54:57 +00:00
Juan A. Suarez Romero
80be49ada9 v3d/ci: update traces
Add new traces, remove old ones, and add more information for the
unsupported/crashes.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23319>
2023-05-31 22:37:18 +00:00
Caio Oliveira
60785d9de7 spirv: Assert sampler_dim is valid when building nir_tex_instr
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14244>
2023-05-31 21:39:07 +00:00
Caio Oliveira
ae36ee02bc spirv: Validate Dim of OpTypeSampledImage and OpSampledImage
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14244>
2023-05-31 21:39:07 +00:00
José Roberto de Souza
42f707e459 intel: Fix support of kernel versions without DRM_I915_QUERY_ENGINE_INFO
As Matt Turner pointed out, the commit here fixed breaks in Iris and
ANV in kernel versions without support for DRM_I915_QUERY_ENGINE_INFO.
As compute engines are only present in gfx12 and newer, and support
for DRM_I915_QUERY_ENGINE_INFO was added before any gfx12 platform,
we can check for gfx version before trying to get engine info.

For ANV, this is done by checking if engine_info is not NULL, like in
other places in the ANV source code.

Fixes: a364f23a6c ("intel: Make gen12 URB space reservation dependent on compute engine presence")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9099
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23257>
2023-05-31 21:12:10 +00:00
Blisto
34f9dd3491 driconf: set vk_x11_strict_image_count for Wolfenstein II
Prevents crash with vsync turned off on xwayland.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9070

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23326>
2023-05-31 20:27:49 +00:00
Rohan Garg
732db2b60c hasvk: enable single texel alignment
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23321>
2023-05-31 19:57:54 +00:00
Rohan Garg
ef2b763d9c anv: fix incorrect asserts when combining CPS and per sample interpolation
CPS is dynamically turned off when per sample interpolation is active.
Update the asserts to reflect this.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5644011f06 ("intel/compiler: Convert wm_prog_key::persample_interp to a tri-state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23103>
2023-05-31 19:26:59 +00:00
Patrick Lerda
dc07e0d3fe mesa/st: fix refcnt imbalance related to st_feedback_draw_vbo()
This issue is happening on radeonsi. The reference was allocated
via _mesa_get_bufferobj_reference() with setup_arrays().
The same reference was never freed.

For instance, this issue is triggered on radeonsi with
"piglit/bin/gl-1.0-rendermode-feedback -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: ff8c2a1748 ("mesa/bufferobj: rename bufferobj functions to be more consistent.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22921>
2023-05-31 18:56:19 +00:00
Jesse Natalie
8bbd049a92 ci/windows: Update WARP to 1.0.7.1
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23330>
2023-05-31 16:20:15 +00:00
Yonggang Luo
6e1203bd0d c11: Remove _MTX_INITIALIZER_NP as it's not used anymore
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
1a1a644d96 vdpau: Replace usage of mtx_t with simple_mtx_t in htab.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
3821a125b9 omx: Replace usage of mtx_t with simple_mtx_t in vid_omx_common.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
972ffcdd2b nine: Replace usage of mtx_t with simple_mtx_t in nine_lock.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
78e95e05e9 rtasm: Replace usage of mtx_t with simple_mtx_t in rtasm_execmem.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
b57109f614 rtasm: Trim trailing spaces and replace tab with 3 space
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
8690dc15d3 xlib: Replace usage of mtx_t with simple_mtx_t in xm_api.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
0a87dca434 hud: Replace usage of mtx_t with simple_mtx_t in hud_sensors_temp.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
33f10b32b6 hud: Replace usage of mtx_t with simple_mtx_t in hud_nic.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
8ec2d98847 hud: Replace usage of mtx_t with simple_mtx_t in hud_diskstat.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:51 +00:00
Yonggang Luo
a4c3d5d19f hud: Replace usage of mtx_t with simple_mtx_t in hud_cpufreq.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
9260f9c51a drm: Replace usage of mtx_t with simple_mtx_t in nouveau_drm_winsys.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
efeb33ab10 drm: Replace usage of mtx_t with simple_mtx_t in drm/radeon_drm_winsys.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
d4a6717680 drm: Replace usage of mtx_t with simple_mtx_t in virgl/drm/virgl_drm_winsys.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
d438a62840 drm-shim: Replace usage of mtx_t with simple_mtx_t in drm_shim.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
799bce87f2 vc4: Replace usage of mtx_t with simple_mtx_t in vc4/vc4_simulator.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
7378bb60a0 v3d: Replace usage of mtx_t with simple_mtx_t in v3d_simulator.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Yonggang Luo
1b91697f09 loader: Replace usage of mtx_t with simple_mtx_t in loader/loader_dri3_helper.c
This is a prepare for removing _MTX_INITIALIZER_NP.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21284>
2023-05-31 15:44:50 +00:00
Chia-I Wu
6cb5185916 radv: fix msaa feedback loop without tc-compat cmask
When in an msaa feedback loop and when the image does not have tc-compat
cmask, we have to decompress and expand fmask.  This can happen on gfx9
when sample count > 2 or when RADV_DEBUG=notccompatcmask is specified.

Fixes: a38de4c011 ("radv: disable tc_compatible_cmask on GFX9 in some cases")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23331>
2023-05-31 14:57:57 +00:00
Dor Askayo
7e8e7f0823 ci: Disable "opencl-external-clang-headers" when "microsoft-clc" is enabled
Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23255>
2023-05-31 14:21:25 +00:00
Dor Askayo
a28540a430 meson: add feature option for use of system Clang headers at runtime
Enabling or disabling the "microsoft-clc" option previously changed
shared logic for all compiler/clc users, which was surprising.

In addition, the option to avoid the use of system Clang headers at
runtime is useful outside the scope of Windows.

Separating the two concepts by making this a neutral feature option
addresses both matters.

Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23255>
2023-05-31 14:21:25 +00:00
Georg Lehmann
7836260af8 aco: cleanup v_cmp_class usage
It's not the best way to check for NaN.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23310>
2023-05-31 12:56:37 +00:00
Eric Engestrom
ed23e386dc ci/zink+radv: mark flakes as such
They failed again when I retried, but apparently they are actually
flakes, so mark them as such.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23332>
2023-05-31 13:19:01 +01:00
Matt Coster
4ba553ab9a pvr: Use common vkGetPhysicalDeviceFeatures2() implementation
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23311>
2023-05-31 11:55:06 +00:00
Matt Coster
6dab9ea50d pvr: Use correct pbe format for VK_FORMAT_A8B8G8R8_UNORM_PACK32
Fixes:
  - dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear
      .single_layer.a8b8g8r8_unorm_pack32_71x1
  - dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear
      .single_layer.a8b8g8r8_unorm_pack32_33x128

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23312>
2023-05-31 11:38:31 +00:00
Matt Coster
6d3d1f884c pvr: Fix rect splitting logic in pvr_unwind_rects()
Fixes:
  dEQP-VK.api.copy_and_blit.core.image_to_buffer.buffer_offset_relaxed
  dEQP-VK.api.image_clearing.core.clear_color_image.3d.optimal
    .single_layer.r8_unorm_200x180x16

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reported-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23309>
2023-05-31 12:23:58 +01:00
Lucas Stach
6611866246 etnaviv: don't flush implicit flush resources when forced
Resources only need to become visible when the application requested
the context flush, so we can safely skip the flushing when the flush
is forced internally by running out of commandstream space.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23329>
2023-05-31 09:54:39 +00:00
Lucas Stach
fbd37e6168 etnaviv: update derived state after forced commandstream flush
If we run out of space in the commandstream while emitting the
current state the drived states won't be recomputed for the
now fully dirty context as the state derivation is called before
any state emitted. Fix this by explicitly updating the derived
state after a forced flush.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8916
CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23329>
2023-05-31 09:54:39 +00:00
Christian Gmeiner
cb3ac95d03 etnaviv: nir: improve uniform usage for ALU opc
The current code in lower_alu(..) counts how many const values
are used by one ALU opc. If there are used more then one the
compiler tries to fix this issues by e.g. resolve with a single
combined const src.

We are doing this as some GPUs only allow one const src per
ISA instruction. But it is allowed to use the same const for
multiple srcs.

Lets have a closer look at a real world shader:

impl main {
        /* preds: */
        vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
        vec1 32 ssa_1 = load_const (0x00000000 = 0.000000)
        vec4 32 ssa_2 = intrinsic load_uniform (ssa_1) (base=0, range=1, dest_type=bool32 /*38*/)       /* u_var */
        vec1 32 ssa_4 = fmul ssa_2.x, ssa_2.y
        vec1 32 ssa_11 = load_const (0x00000000 = 0.000000)
        vec1 32 ssa_13 = seq ssa_2.w, ssa_11
        vec1 32 ssa_6 = fmul ssa_2.z, ssa_13
        vec1 32 ssa_7 = fmul ssa_4, ssa_6
        vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
        vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_0
        intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
        /* succs: block_1 */
        block block_1:
}

The current compiler transforms it to:

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
        vec4 32 ssa_14 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
        vec2 32 ssa_15 = load_const (0x00000000, 0x00000001) = (0.000000, 0.000000)
        vec1 32 ssa_4 = fmul ssa_15.x, ssa_15.y
        vec2 32 ssa_16 = load_const (0x00000003, 0x00000000) = (0.000000, 0.000000)
        vec1 32 ssa_13 = seq ssa_16.x, ssa_16.y
        vec1 32 ssa_6 = fmul ssa_14.z, ssa_13
        vec1 32 ssa_7 = fmul ssa_4, ssa_6
        vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
        vec1 32 ssa_17 = mov ssa_0
        vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_17
        intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
        /* succs: block_1 */
        block block_1:
}

There is no need to create ssa_15 as we can use ssa_14 for the first fmul.

With this change the compiler creates the following shader:

impl main {
        block block_0:
        /* preds: */
        vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
        vec4 32 ssa_14 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
        vec1 32 ssa_4 = fmul ssa_14.x, ssa_14.y
        vec2 32 ssa_15 = load_const (0x00000003, 0x00000000) = (0.000000, 0.000000)
        vec1 32 ssa_13 = seq ssa_15.x, ssa_15.y
        vec1 32 ssa_6 = fmul ssa_14.z, ssa_13
        vec1 32 ssa_7 = fmul ssa_4, ssa_6
        vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
        vec1 32 ssa_16 = mov ssa_0
        vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_16
        intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
        /* succs: block_1 */
        block block_1:
}

This change reduces immediate pressure and reduces spend CPU cycles.

No piglit or deqp regression seen.

shader-db results for GC2000:

total instructions in shared programs: 955128 -> 955128 (0.00%)
instructions in affected programs: 0 -> 0
helped: 0
HURT: 0

total temps in shared programs: 85689 -> 85689 (0.00%)
temps in affected programs: 0 -> 0
helped: 0
HURT: 0

total immediates in shared programs: 155428 -> 155240 (-0.12%)
immediates in affected programs: 1840 -> 1652 (-10.22%)
helped: 34
HURT: 1
helped stats (abs) min: 4 max: 16 x̄: 5.65 x̃: 4
helped stats (rel) min: 2.94% max: 33.33% x̄: 16.92% x̃: 16.67%
HURT stats (abs)   min: 4 max: 4 x̄: 4.00 x̃: 4
HURT stats (rel)   min: 14.29% max: 14.29% x̄: 14.29% x̃: 14.29%
95% mean confidence interval for immediates value: -6.57 -4.17
95% mean confidence interval for immediates %-change: -19.83% -12.23%
Immediates are helped.

total loops in shared programs: 0 -> 0
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

LOST:   0
GAINED: 0

Total CPU time (seconds): 102.55 -> 96.35 (-6.05%)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23323>
2023-05-31 09:19:29 +00:00
Hans-Kristian Arntzen
5266bb0211 Fix DGC bug where indirect count > maxSequencesCount.
Need to explicitly clamp the indirect count against maxSequencesCount,
or we risk writing bogus commands into spill region.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23252>
2023-05-31 07:49:54 +00:00
Samuel Pitoiset
1947500208 aco: remove nir_intrinsic_load_barycentric_at_sample occurences
This is lowered earlier and shouldn't get there.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23307>
2023-05-31 07:25:46 +00:00
Dave Airlie
54ceec8d9e radv/meta: fix uninitialised stack memory usage.
==10199== Conditional jump or move depends on uninitialised value(s)
==10199==    at 0xA107B13: radv_resume_queries (radv_meta.c:93)
==10199==    by 0xA108097: radv_meta_restore (radv_meta.c:225)
==10199==  Uninitialised value was created by a stack allocation
==10199==    at 0xA1145B2: fill_buffer_shader (radv_meta_buffer.c:171)

saved_state is never memset, so the value should be inited.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23327>
2023-05-31 06:52:46 +00:00
Vinson Lee
ed2d771931 r600/sfn: Initialize BlockScheduler member m_chip_family.
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member m_chip_family is not initialized
in this constructor nor in any functions that it calls.

Fixes: e57643cf54 ("r600/sfn: Add handling for R600 indirect access alias handling")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23290>
2023-05-31 06:18:47 +00:00
Lucas Fryzek
673acc3d01 v3dv: Update texture padding logic to match v3d changes
Piglit tests for v3d highlighted issues with the padding
computation when allocating memory for slices. This change
moves the fixes from v3d to v3dv.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23260>
2023-05-31 05:27:08 +00:00
Lucas Fryzek
10b4b3bf3f v3d: Add support for ASTC texture compression
Add proper support for ASTC texture compression in the v3d
gallium driver, instead of relying on the fallback software
conversion from gallium, as the hardware has native support
for ASTC compressed textures.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23260>
2023-05-31 05:27:08 +00:00
Mike Blumenkrantz
0a3ddcbe8b vulkan: use cmd size array for queued cmd allocations
minor simplification for consistency

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
2023-05-31 03:13:22 +00:00
Mike Blumenkrantz
fd45ab843f vulkan/cmd_queue: expose cmd sizes
now that cmds are more precisely allocated, it's necessary for drivers
to have some way to determine what the allocation size is

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
2023-05-31 03:13:22 +00:00
Mike Blumenkrantz
5759ab668e vulkan/cmd_queue: allocate cmds based on the size of the cmd
the base size of a vk_cmd_queue_entry is massive since there are a couple
union entries that have a trillion params. by allocating conditionally using
the union member size, memory can be reduced, which will affect some user-facing
api properties

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
2023-05-31 03:13:22 +00:00
Mike Blumenkrantz
96a404cf82 vulkan: reorder vk_cmd_queue_entry
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
2023-05-31 03:13:22 +00:00
Julia Tatz
223c0ecd1e zink/ci: update expected results
Remove the now passing arb_compute_variable_group_size tests

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23244>
2023-05-31 02:48:33 +00:00
Julia Tatz
2f3841339c zink: fix layout(local_size_variable) for vk1.3+
Use the correct exec-mode op for LocalSizeId
Corrected typo `gl_LocalGroupSize` -> `gl_LocalGroupSizeARB`

Fixes: 99bd1eaf ("zink: use spir-v 1.6 local-size when needed")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23244>
2023-05-31 02:48:33 +00:00
Yiwei Zhang
112e16b14d docs/venus: advertise VK_EXT_image_2d_view_of_3d
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
2023-05-30 22:52:12 +00:00
Yiwei Zhang
2db9536ade venus: enable VK_EXT_image_2d_view_of_3d
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
2023-05-30 22:52:12 +00:00
Yiwei Zhang
83018a7854 venus: sync protocol for VK_EXT_image_2d_view_of_3d
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
2023-05-30 22:52:11 +00:00
Yiwei Zhang
c18b7a2082 venus: sync to latest protocol from header v1.3.248
This is to make later protocol update CL to be easily backported to
older branches.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
2023-05-30 22:52:11 +00:00
Yiwei Zhang
2b551d100b venus: silence -Wuninitialized
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
2023-05-30 22:52:11 +00:00
Mark Janes
d0669f3ede intel/dev: switch defect identifiers to use lineage numbers
Update existing workarounds when necessary to match changed
identifiers.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23226>
2023-05-30 22:13:41 +00:00
Rob Clark
b94d35f74d freedreno: Reallocate on unshared export
If we need to export a handle on a resource which was not originally
allocated with PIPE_BIND_SHARED, then re-allocate with shared flag and
try again.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9110
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
2023-05-30 21:37:13 +00:00
Rob Clark
75193262fd freedreno: Add aux-context support
A global aux-context can be created on-demand for cases where we need to
(for example) blit a resource when we only have a screen ptr.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
2023-05-30 21:37:12 +00:00
Rob Clark
221a6986ba freedreno: Handle export error handling
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
2023-05-30 21:37:12 +00:00
Rob Clark
7cc8185ca3 freedreno/drm: Don't try to export suballoc bo
Suballoc BOs don't have a real handle, so attempting to dmabuf export
won't work.  Likewise for handle or flink-name export.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
2023-05-30 21:37:12 +00:00
Alyssa Rosenzweig
be705ce760 nir/print: Print locations for geometry shader inputs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
2023-05-30 16:25:07 -04:00
Alyssa Rosenzweig
065db2ddad intel/blorp: Use nir_trim_vector
With Coccinelle patch:

@@
expression b, V;
@@

-nir_vec2(b, nir_channel(b, V, 0), nir_channel(b, V, 1))
+nir_trim_vector(b, V, 2)

@@
expression b, V;
@@

-nir_vec3(b, nir_channel(b, V, 0), nir_channel(b, V, 1), nir_channel(b, V, 2))
+nir_trim_vector(b, V, 3)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
2023-05-30 16:24:21 -04:00
Alyssa Rosenzweig
4486009edb radv/query: Use nir_trim_vector
With Coccinelle patch:

@@
expression b, V;
@@

-nir_vec2(b, nir_channel(b, V, 0), nir_channel(b, V, 1))
+nir_trim_vector(b, V, 2)

@@
expression b, V;
@@

-nir_vec3(b, nir_channel(b, V, 0), nir_channel(b, V, 1), nir_channel(b, V, 2))
+nir_trim_vector(b, V, 3)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
2023-05-30 16:24:21 -04:00
Alyssa Rosenzweig
2b2685f551 pan/lower_framebuffer: Use nir_replicate
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
2023-05-30 16:24:21 -04:00
Alyssa Rosenzweig
ebf4eff7eb treewide: Use nir_replicate
Via coccinelle.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
2023-05-30 16:24:21 -04:00
Alyssa Rosenzweig
f534c2c539 nir/builder: Add nir_replicate helper
Splat a scalar to all components of a vector.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
2023-05-30 16:24:21 -04:00
Veerabadhran Gopalakrishnan
11c8b84c53 radeonsi: return kernel queried video capability for HEVC and JPEG
Query and return the values obtained from kernel for VCN_1 and above.
Earlier the HEVC and JPEG capabilities were returned based on
pre-defined values.

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23067>
2023-05-30 19:15:12 +00:00
Veerabadhran Gopalakrishnan
af8f04e9fe radeonsi: return kernel queried video capability for HEVC and JPEG
Query and return the values obtained from kernel for VCN_1 and above.
Earlier the HEVC and JPEG capabilities were returned based on
pre-defined values.

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23067>
2023-05-30 19:15:12 +00:00
Konstantin Seurer
a2ae6518c2 gallivm: Fix gather/scatter types for newer llvm
The types changed with opaque pointer support.

Fixes a bunch of lavapipe regressions.
Cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23293>
2023-05-30 18:25:49 +00:00
Eric Engestrom
74704cbb18 docs/calendar: add 23.2 branchpoint and release candidates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23205>
2023-05-30 18:20:20 +00:00
Dylan Baker
631109f8f7 docs: update calendar for 23.0.4
At this point I'm calling 23.0 done. Please use 23.1 for future updates

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23325>
2023-05-30 18:15:28 +00:00
Dylan Baker
cf2a9e2c15 docs: Add sha256 sum for 23.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23325>
2023-05-30 18:15:28 +00:00
Dylan Baker
d4f612b30d docs: add release notes for 23.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23325>
2023-05-30 18:15:28 +00:00
Jesse Natalie
84691dfc46 microsoft/compiler: Use image formats to determine texture types
Fixes some tests when bindless is disabled, where the image format is
R32, we do atomics on it, but we didn't set the "typed UAV load with
additional formats" feature bit because when we loaded from it, we
only loaded one component. Since the image format on the DXIL side
was declared as U32x4, the DXIL validator said that we should have.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
2023-05-30 17:54:18 +00:00
Jesse Natalie
431557e38e spirv2dxil: Assign formats to image vars before lowering to bindless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
2023-05-30 17:54:18 +00:00
Jesse Natalie
a66d1e4d1f microsoft/compiler: Add a pass to assign image formats based on number of components
For loads/stores without formats, let's guess one based on how it's used.
The actual format doesn't matter, we just want to use it for the number
of components it has.

Also copy image formats from variables to intrinsics, to ensure that
deref-based intrinsics have formats assigned and lowered intrinsics
are up to date.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
2023-05-30 17:54:18 +00:00
Jesse Natalie
0c8c77b1b0 microsoft/compiler: Enable emitting type info for textures with <4 comps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
2023-05-30 17:54:18 +00:00
Hans-Kristian Arntzen
a3507f9d87 radv/amdgpu: Report 48-bit VAs in bo logs.
More ergonomic when correlating with page fault addresses.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23256>
2023-05-30 17:17:58 +00:00
Chia-I Wu
063e2e8ed8 radv: fix gl_SampleMaskIn for sample shading
When sample shading, we need

  gl_SampleMaskIn = SampleCoverage & (PsIterMask << gl_SampleID);

Add a new shader arg, ps_iter_mask, to pass PsIterMask to ps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23265>
2023-05-30 16:35:31 +00:00
Chia-I Wu
0bba0eb0df ac, radeonsi: add and use ac_get_ps_iter_mask
It is more natural for ac_get_ps_iter_mask to take sample count.
Replace samplemask_log_ps_iter by ps_iter_smples in
ac_nir_lower_ps_options accordingly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23265>
2023-05-30 16:35:30 +00:00
Chia-I Wu
750d641ca6 aco: fix alignment check in emit_load
align_offset already takes const_offset into consideration.  Remove the
adjustment.

Fixes: 542733dbbf ("aco: add emit_load helper")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9097
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23242>
2023-05-30 16:02:34 +00:00
Lionel Landwerlin
25c1f325d0 anv: remove unused functions
I thought I removed those, it seems my rebase got screwed up :(

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 64f20cec28 ("anv: prepare image/buffer views for non indirect descriptors")
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23317>
2023-05-30 15:14:49 +00:00
Lionel Landwerlin
d17af98abc anv: add support for VK_EXT_dynamic_rendering_unused_attachments
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23294>
2023-05-30 14:45:49 +00:00
Erik Faye-Lund
b50c9ba692 zink: do not lower line-smooth for non-lines
We used to do this correctly, but it seems this accidentally got
dropped.

Fixes: d80a35a7f7 ("zink: unified `zink_set_primitive_emulation_keys` and `zink_create_primitive_emulation_gs`")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23316>
2023-05-30 14:24:25 +00:00
Erik Faye-Lund
ffc77d5262 zink: compute correct location for line-smooth gs
The GS and the FS needs to agree on the driver_location. But we just
used the num_outputs variable for the GS instead of matching the logic
from lower_aaline_instr in nir_draw_helpers.c.

This does that, but cleans up our copy slightly to avoid computing the
needless location, as well as using unsigned values.

This used to *mostly* work before, but only because we were lucky and
not too much crazy stuff went on with the inputs / outputs in
smooth-line cases.

Fixes: edecb66b01 ("nir: avoid generating conflicting output variables")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23316>
2023-05-30 14:24:25 +00:00
Erik Faye-Lund
955a6ffa6e zink: keep gl46_optimal extensions/features sorted
These are mostly sorted, which makes it easy to know where to insert new
stuff. Let's make them completely sorted.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23316>
2023-05-30 14:24:25 +00:00
Mike Blumenkrantz
c6ef6a39cc zink: explicitly avoid ci errors due to unrecognized extensions in VVL
lavapipe still had this from shader object, but this should always be in
place for all drivers so that old VVL doesn't block merges

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23315>
2023-05-30 14:00:36 +00:00
Erik Faye-Lund
bf97afa2ab zink: update profiles schema
We technically need the 251 version, but the schema for that version
is not released yet, so this is the best we can do.

See https://github.com/KhronosGroup/Vulkan-Profiles/issues/437

This gets rid of some JSON schema-validation warnings.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23308>
2023-05-30 13:34:44 +00:00
Georg Lehmann
76a82c3ac9 nir/opt_if: use nir_alu_instr_is_comparison directly
Since 2d6233d0 ("nir: Check all sizes in nir_alu_instr_is_comparison"),
nir_alu_instr_is_comparison already returns true for comparisons with 32bit
result.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23287>
2023-05-30 13:04:22 +00:00
Rhys Perry
94958e637d aco: improve printing of s_delay_alu
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
2023-05-30 12:42:00 +00:00
Rhys Perry
54c0088629 aco: insert s_delay_alu on the linear CFG
fossil-db (gfx1100):
Totals from 10498 (7.87% of 133428) affected shaders:
Instrs: 22274711 -> 22277717 (+0.01%); split: -0.01%, +0.03%
CodeSize: 114557040 -> 114569064 (+0.01%); split: -0.01%, +0.02%
Latency: 236505186 -> 236497338 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 33425052 -> 33423876 (-0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
2023-05-30 12:42:00 +00:00
Rhys Perry
d7f48a61ec aco: use pass_flags to recover s_delay_alu cycles
This is simpler and more accurate.

fossil-db (gfx1100):
Totals from 11678 (8.75% of 133428) affected shaders:
Instrs: 25448655 -> 25436028 (-0.05%)
CodeSize: 130364728 -> 130314220 (-0.04%)
Latency: 325247603 -> 325231064 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 45901166 -> 45900022 (-0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
2023-05-30 12:42:00 +00:00
Rhys Perry
d9cdb3524a aco: fix update_alu(clear=true) for exports
For:
   v_mov_b32_e32 v0, 1.0
   exp mrtz v0, off, off, off
we should completely remove the ALU entry before creating the EXP's WaR entry for v0.
Otherwise, the two will be combined into an entry which will wait for
expcnt(0) for later uses of v0.

gen_alu() should also be before gen(), since gen_alu() performs the clear
while gen() creates the WaR entry.

fossil-db (gfx1100):
Totals from 3589 (2.69% of 133428) affected shaders:
Instrs: 5591041 -> 5589047 (-0.04%); split: -0.04%, +0.00%
CodeSize: 28580840 -> 28572864 (-0.03%); split: -0.03%, +0.00%
Latency: 65427923 -> 65427543 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 11109079 -> 11109065 (-0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
2023-05-30 12:42:00 +00:00
Teng, Jin Chung
a63a38aeaf d3d12: HEVC Encode - Fix num_subregions_per_scanline rounding
num_subregions_per_scanline need to be round up

Signed-off-by: Teng, Jin Chung <jin.chung.teng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23247>
2023-05-30 12:08:11 +00:00
Matt Coster
3fc24c64e1 pvr: Fix page faults in occlusion query tests
This does not fix the tests completely, but does allow them to run to
completion and fail "properly".

Also contains a few trivial bugfixes in the same codepath.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23100>
2023-05-30 10:53:41 +00:00
Karmjit Mahil
43f0fef92f pvr: Handle barrier load and store flags.
This commit adds handling for {s,z}loaden and {s,z}storeen to
control loading from and storing to the stencil and depth buffer.

This commit also addressed the FIXMEs around barrier_{load,store}
which control the {s,z}{load,store}en.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20487>
2023-05-30 10:36:21 +00:00
Matt Coster
a04f244c0c pvr: Reorder execution in pvr_cmd_buffer_end_sub_cmd()
This allows sub_cmd->job.run_frag to be setup before calling
pvr_sub_cmd_gfx_requires_split_submit().

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
2023-05-30 10:00:37 +00:00
Matt Coster
173df8f15d pvr: Fix out of range stream errors for geometry-only jobs on pvrsrvkm
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
2023-05-30 10:00:37 +00:00
Matt Coster
dae68cf4aa pvr: Do not free deferred pvr_transfer_cmd instances
Deferred pvr_transfer_cmd instances are allocated from a dyn_array on
the owning pvr_cmd_buffer and must not be freed directly.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
2023-05-30 10:00:37 +00:00
Matt Coster
85fa24e061 pvr: Rename shadowing loop variable in pvr_add_deferred_rta_clear()
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
2023-05-30 10:00:37 +00:00
Matt Coster
6e6cd3eb3a pvr: Use correct surface for deferred RTA clear
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
2023-05-30 10:00:37 +00:00
Matt Coster
0be6f8b5c1 pvr: Correct error flow in pvr_compute_pipeline_compile()
Fixes:
  dEQP-VK.api.object_management.alloc_callback_fail.compute_pipeline

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
2023-05-30 10:43:09 +01:00
Matt Coster
a49a2f8765 pvr: Correct error flow in pvr_graphics_pipeline_compile()
Fixes:
  dEQP-VK.api.object_management.alloc_callback_fail.graphics_pipeline

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
2023-05-30 10:43:09 +01:00
Matt Coster
9bfd3997b4 pvr: Fix memory leaks on realloc failure in pvr_pipeline.c
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
2023-05-30 10:43:08 +01:00
Matt Coster
4af6a9507f pvr: Fix allocation scopes in vkCreateRenderPass2() code path
These previously COMMAND scoped allocations are stored on the
VkRenderPass and must therefore be OBJECT scoped.

Fixes: dEQP-VK.api.object_management.single_alloc_callbacks.render_pass

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
2023-05-30 10:43:06 +01:00
Iago Toral Quiroga
4c0541abb3 v3d: only warn about bining sync for indirect draw once
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23306>
2023-05-30 09:00:34 +00:00
Felix DeGrood
5731ebac40 anv: override vendorID for Cyberpunk 2077
A recent update to Cyberpunk 2077 enables XeSS code for Intel GPUs
which is causing the game to crash in the XeSS libraries.  As a
temporary work around, stop identifying as Intel for Cyberpunk so
XeSS falls back to the cross-vendor path.

References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8860
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23271>
2023-05-30 01:05:36 -07:00
Lionel Landwerlin
96c33fb027 anv: enable direct descriptors on platforms with extended bindless offset
Aka. DG2

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:39 +00:00
Lionel Landwerlin
26e2436823 anv: ensure descriptor addresses are used with bindless stages
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
0502a92199 anv: descriptor binding for direct descriptors
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
a8ef34bd31 anv: bring back the max number of sets to 8
Not sure we bumped it to 32 for the right reasons. This generates more
push constant data and because we're not tighly packing our push
constant data this can generate more register pressure.

We could tightly pack things at the cost of some CPU cycles but only
for some stages. RT stages would have to retain the current "sparse"
version of push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
06dfd216d3 anv: add direct descriptor support to apply_layout
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
1d24d0bdcc anv: track descriptor data size
descriptor_stride includes multiple plane size, this new field tracks
just the data of one plane.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
86a7cc8d8f anv: simplify ycbcr bti computations
To make BTI indexing simpler with ycbcr samplers, stop doing packing
calculations in the apply_layout. We'll insert NULL bindings for the
few ycbcr cases where it's needed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
739981e0ac anv: implement binding table emission for direct descriptors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
ce89410adb anv: factor out dynamic buffer bti emission
No functional change. Will reuse in the followup commit.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
5676d51c1c anv: handle null surface in the binding table with direct descriptors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
e846e68adf anv: add helpers to build pipeline bindings
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
688968e888 anv: add support for direct descriptor in allocation/writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
64f20cec28 anv: prepare image/buffer views for non indirect descriptors
When in direct descriptor mode, the descriptor pool buffers will hold
surface states directly. We won't allocate surface states in image &
buffer views.

Instead views will hold a packed RENDER_SURFACE_STATE ready to copied
into the descriptor buffers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
1c45cd217e anv: bound load descriptor mem better
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
6d1223a5c9 nir: expose a couple of address format add helpers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
02cecffe2b anv: add a pass to partially lower resource_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
77c0146747 anv: new structure to hold surface states
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
3f1ff326e0 anv: reduce push constant size for descriptor sets
Now that descriptor sets are located a in a 1Gb area, we can avoid
storing the whole address to the descriptor and add the base address
of the area to a 32bit offset.

Replay a bunch of fossils with this and changes not really significant
one way or another :

Totals:
Instrs: 9278246 -> 9277148 (-0.01%); split: -0.01%, +0.00%
Cycles: 3547598421 -> 3547579435 (-0.00%); split: -0.00%, +0.00%

Totals from 353 (1.14% of 31021) affected shaders:
Instrs: 581546 -> 580448 (-0.19%); split: -0.23%, +0.04%
Cycles: 25885422 -> 25866436 (-0.07%); split: -0.31%, +0.24%

No difference on send messages or spills/fills.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
d2c0147228 anv: create a pool for indirect descriptors
We'll use the fact that the pool is aligned to 4Gb to limit the amount
of address computations to build the address in the shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
6367691b58 anv: introduce a new descriptor set layout type
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:38 +00:00
Lionel Landwerlin
7b9d27e613 anv: add an option for using indirect descriptors
This is the default for now. It needs to be part the pipeline hashing
as we will allow this to be tweaked per application.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
b386952411 docs/anv: some binding table explanations
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
257bf9b6c3 anv: toggle extended bindless surface state on Gfx12.5+
We bump the max surfaces to ~16 million instead of ~1 million on
Gfx9-12. We could do more but that'll come later.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
7fa0fceaba anv: increase workaround BO so that we can hold a full 4Kb page of 0s
At the beginning of the buffer is located the driver identifier for
error states.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
1f8ede792e anv: move pipeline active_stages to common structure
And fill it out for all types of pipelines.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
7eb8e71182 anv: track pipeline in anv_cmd_pipeline_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
b2728f22c7 anv: bail flush_gfx_state when not gfx push constant is dirty
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
b3f6e5dc70 anv: remove incorrect ifdef
This is a leftover from a previous fix attempt. We don't need this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
efcda1c530 anv: fix null descriptor handling with A64 messages
global load/store (or A64 messages) need the NIR bound checking which
is enabled by "robust" behavior even when robust behavior is disabled.

Many thanks to Christopher Snowhill for pointing out the pushed
constant related issue with the initial version of this patch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
944004dc8a anv: remove unused define
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
04777171e0 intel/fs: try to rematerialize surface computation code
This helps a lot with accessing surface handles in control flow. Our
resource_intel intrinsic has a non_uniform flag, in which case we
cannot apply this optimization. But in uniform cases, this is just a
massive win. We drop all kind of pipeline stalls due to
find_live_channel. We also reduce register pressure by doing the
surface handle computation in a single GRF (instead of 2 or 4).

There are some regressions in max dispatch width but those I think are
only on SIMD32 and due to the current heuristic disabling it after
throughput comparison with SIMD16. We know this heuristic is not
perfect, it should probably be updated in another change.

Here are some stats (all titles seem to have similar gains) :

 PERCENTAGE DELTAS    Shaders   Instrs    Cycles  Subgroup size Send messages Spill count Fill count Scratch Memory Size Max live registers Max dispatch width
 red_dead_redemption2 5860     -36.80%    -5.67%      +0.77%        +0.06%      -81.26%     -79.16%        -70.62%             -8.63%             -6.93%
 ---------------------------------------------------------------------------------------------------------------------------------------------------------------
 All affected         4716     -37.29%    -5.67%      +0.95%        +0.07%      -81.26%     -79.16%        -70.62%             -9.15%             -8.47%
 ---------------------------------------------------------------------------------------------------------------------------------------------------------------
 Total                5860     -36.80%    -5.67%      +0.77%        +0.06%      -81.26%     -79.16%        -70.62%             -8.63%             -6.93%

 PERCENTAGE DELTAS          Shaders   Instrs    Cycles  Subgroup size Send messages Spill count Fill count Scratch Memory Size Max live registers Max dispatch width
 rise_of_the_tomb_raider_g2 12010    -37.19%   -22.12%      +0.01%        +0.00%      -99.01%     -99.14%        -98.65%             -7.62%             -4.96%
 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------
 All affected               11732    -37.27%   -22.14%      +0.01%        +0.00%      -99.01%     -99.14%        -98.65%             -7.67%             -5.11%
 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------
 Total                      12010    -37.19%   -22.12%      +0.01%        +0.00%      -99.01%     -99.14%        -98.65%             -7.62%             -4.96%

 PERCENTAGE DELTAS    Shaders   Instrs    Cycles  Spill count Fill count Scratch Memory Size Max live registers Max dispatch width
 total_war_warhammer2 462      -27.45%   -12.42%    -82.35%     -88.46%        -66.67%             -5.52%             -5.62%
 -----------------------------------------------------------------------------------------------------------------------------------
 All affected         335      -28.31%   -12.77%    -82.35%     -88.46%        -66.67%             -6.25%             -7.24%
 -----------------------------------------------------------------------------------------------------------------------------------
 Total                462      -27.45%   -12.42%    -82.35%     -88.46%        -66.67%             -5.52%             -5.62%

 PERCENTAGE DELTAS Shaders   Instrs    Cycles  Subgroup size Send messages Spill count Fill count Scratch Memory Size Max live registers Max dispatch width
 witcher_3_dxvk_g2 1049     -36.94%   -57.82%      +0.06%        +0.01%      -98.52%     -97.29%        -98.10%             -7.81%             -1.00%
 ------------------------------------------------------------------------------------------------------------------------------------------------------------
 All affected      693      -41.93%   -58.45%      +0.09%        +0.01%      -98.52%     -97.29%        -98.10%             -10.25%            -1.33%
 ------------------------------------------------------------------------------------------------------------------------------------------------------------
 Total             1049     -36.94%   -57.82%      +0.06%        +0.01%      -98.52%     -97.29%        -98.10%             -7.81%             -1.00%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
b28609a756 intel/fs: enable uniform block accesses through bindless heap
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
05089f305f intel/fs: enable bindless sampler state offsets
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
6d6877bf99 intel/fs: enable extended bindless surface offset
Gives use 4Gb of bindless surface state on Gfx12.5+ instead of 64Mb.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
01fc9a06bd intel/fs: enable get_buffer_size on bindless heap
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
ad9bc1ffb5 intel/fs: enable UBO accesses through bindless heap
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
068bf1378d intel/fs: enable SSBO accesses through the bindless heap
Using the information coming from surface_index_intel, we can tell
whether we should use the BTI or bindless heap for a particular SSBO
access.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
3d0cc3f63b intel/fs: keep track of new resource_intel information
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
86e9943b00 intel/fs: teach ubo range analysis pass about resource_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
12540dfb6b intel/fs: add a pass to move resource_intel closer to user
Non uniform lower can insert read_first_invocation on the result of
resource_intel. We want to keep that intrinsic directly in front of
the user (load_ubo/load_ssbo/load_image/etc...)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
3df3c38a65 nir/opt_gcm: allow resource_intel to be moved anywhere
The resouce_intel intrinsic doesn't not result in an actual
instruction, it's just a wrapper around another value, usually a
load_const.

Allowing this intrinsic to be moved anywhere means it's going to be
closer to the value it wraps, enabling opt_gcm to move a load_ubo
using this resource_intel.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
8a8382a78a nir: teach nir_chase_binding about resource_intel
It's needed to have opt_gcm work properly.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
54dfc08b89 nir: add a new intrinsic to describe resources accessed on intel
Intel HW has multiple ways to access resources like UBO/SSBO/images :

   - binding tables : a small ~240 heap of surfaces

   - bindless surfaces : a 64Mb heap of surfaces up to Gfx12+, 4Gb on Gfx12.5+

   - surfaces : a 4Gb heap on Gfx12.5+ (mostly unused at the moment,
     only available through the LSC)

For samplers, we have 2 options since Gfx11+ :

   - samplers indexed from the Dynamic State Heap (4Gb)

   - samplers indexed from the Bindless Sampler Heap (4Gb)

Additionally our whole push constant promotion mechanism is based
around binding table indices. This is problematic if you want to also
promote to push constants things that would be accessed through the
bindless heap.

To solve this issue, we introduce a new intrinsic that will cary a
block index that is not based off the binding table index nor the
bindless table offset.

We will also use this intrinsic to identify whether the buffer/surface
index in load_ubo/load_ssbo/store_ssbo/etc... is relative to the
binding table or the bindless heap.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:37 +00:00
Lionel Landwerlin
b8790e9808 nir/lower_shader_calls: add ability to force remat of instructions
Some instruction we would like to keep around because they carry
additional information in their indices.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:36 +00:00
Lionel Landwerlin
e09cfda0de intel/fs: lower get_buffer_size like other logical sends
This will also enable the use of the bindless heap.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:36 +00:00
Lionel Landwerlin
a66944dfbc intel/fs: reuse descriptor helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:36 +00:00
Lionel Landwerlin
e1ffa067d3 anv: fix push range for descriptor offsets
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 379b9bb7b0 ("anv: Support fetching descriptor addresses from push constants")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:36 +00:00
Lionel Landwerlin
b25adac077 anv: update internal address space to have 4Gb of dynamic state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
2023-05-30 06:36:36 +00:00
Dave Airlie
6674ac98a6 anv/video: move format properties to outarray.
This should be using the helper code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23304>
2023-05-30 15:58:23 +10:00
Dave Airlie
5deb476095 radv: align video images internal width/height inside the driver.
Due to how the decoders work, they will write garbage data into
the padding, and later using the image for sampling with linear
images will use the garbage to create broken results. Let the
user specify the image size and align it up in the driver, so
sampling of the image later has the correct w/h.

cc: mesa-stable

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
45a92f14b2 vk/video: add a common function to get block alignments for profiles
This is to be used by drivers for internal image alignments.

This just adds a common profile to alignment helper.

Cc: mesa-stable
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
b9d208bd1f radv/video: fix physical device format property count.
This was returning bad values

Fixes: db62c38091 ("radv: add vcn h265 decode.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
1a2a330483 radv/video: add debug flag to enable dpb image array on newer GPUs.
This is useful to test the paths on newer GPUs that work on older GPUs.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
04c28c9fba radv/video: fix some whitespace.
this just removes some TABs.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
e2fa6ec73b radv/video: rework stream handle generation.
This shouldn't change anything, except move some calcs to an
earlier spot to avoid redoing them

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
cf1bd0f364 radv/video: add missing offset to the dpb binding.
This doesn't affect anything I've seen yet.

Fixes: 3e2c768aa8 ("radv/vcn: enable dynamic dpb tier 2 for h264/h265 on navi21+")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Dave Airlie
b5963fc1f0 radv/video: fix h264/265 dpb usage.
This seems to be the best compromise I can come up with so far.

I can't figure out to get the tier2 programming to match between
264 and 265, maybe they are just programmed different here, good
old firmware.

Fixes: 1693c03a39 ("radv/video: add initial h264 decoder for VCN")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23227>
2023-05-30 02:53:32 +00:00
Patrick Lerda
84f465ec81 mesa: fix refcnt imbalance related to _mesa_delete_semaphore_object()
Indeed, the fence reference was not freed.

For instance, this issue is triggered with
"piglit/bin/ext_external_objects-vk-semaphores-2 -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 7b6cd912a5 ("mesa/st: get rid of ST_CALLOC_STRUCT use CALLOC_STRUCT")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23296>
2023-05-30 00:42:46 +00:00
Timothy Arceri
52d212aff2 util: add Jamestown+ workaround
Fixes crash on startup due to using API functionality removed in core
profile.

Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23246>
2023-05-29 23:37:21 +00:00
norablackcat
62817ce396 rusticl/screen: fix driver_uuid on non x86
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9116
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23284>
2023-05-29 22:29:40 +00:00
Konstantin Seurer
6439edd644 panfrost: Reformat using the new style
Now, that the foreach macro list is complete (I hope), let's reformat
drivers that enforce correct formatting in CI.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
13c9b490a7 asahi: Reformat using the new style
Now, that the foreach macro list is complete (I hope), let's reformat
drivers that enforce correct formatting in CI.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
7ee6627f66 venus: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
7e023df76f util/perf: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
74c7ef0e6d panfrost: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
7c79d7baed r600/sfn: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
bfac244f57 i915: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
61c391356e d3d12: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
b56b30b20d freedreno: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
e3773c4395 asahi: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
03a9715a68 amd: Use the Mesa base style
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
Konstantin Seurer
155eb72771 treewide: Add a .clang-format file
Add a Mesa base style instead of copying the same rules multiple times.
This is especially annoying with foreach macros, where every
.clang-format file maintains it's own incomplete list of the same
macros.

Adding a tree wide .clang-format allows other drivers to derive their
code style from whatever is considered default Mesa style.

Since clang-format doesn't allow us to derive ForEachMacros, driver
specific foreach macros have to be added to the common file.

Having a tree wide clang format should also help (new) contributers with
working oin parts of the tree that don't have their own .clang-format
file. (With regards to code formatting)

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-29 21:06:12 +00:00
David Heidelberg
7c142183ef ci/panfrost: add largest possible eglcreatepbuffersurface and then glclear flake
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23300>
2023-05-29 22:01:29 +02:00
David Heidelberg
c9288808db ci/amd: previously missed raven flake
Fixes: 1fa1c285fc ("ci/amd: add draw.dynamic_rendering flake")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23300>
2023-05-29 22:01:29 +02:00
David Heidelberg
bb48d29a0f ci/zink: add KHR-GL46.limits.max_fragment_interpolation_offset flake
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23300>
2023-05-29 22:01:26 +02:00
Juan A. Suarez Romero
71b5c58064 v3dv/vc4/ci: update expected results
Remove passing tests, and add new failures and timeouts.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23303>
2023-05-29 19:11:09 +00:00
Rohan Garg
8a33a1390a anv: limit non zero fast clear check to GFX12_CCS_E
TGL C0 and above can fast clear to non zero values

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>
2023-05-29 16:48:47 +00:00
Rohan Garg
3debf2af0c anv: set aux usage to GFX12_CCS_E if a platform needs WA 14010672564
Account for the aux usage in various places now that we set the aux
usage correctly.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>
2023-05-29 16:48:47 +00:00
Rohan Garg
963847735a isl: add helper to check if aux usage is CCS_E
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>
2023-05-29 16:48:47 +00:00
Rohan Garg
f6a83ec988 anv: enable single texel alignment
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23263>
2023-05-29 17:41:51 +02:00
Mike Blumenkrantz
58f97c7c05 zink: require EXT_dynamic_rendering_unused_attachments for dynamic rendering
this eliminates the pDepthAttachment-06181 and pStencilAttachment-06182 VUID errors
when enabled, and it should be trivial, so require it in the profile

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23297>
2023-05-29 14:21:21 +00:00
Mike Blumenkrantz
7474166b2a lavapipe: VK_EXT_dynamic_rendering_unused_attachments
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23297>
2023-05-29 14:21:21 +00:00
Samuel Pitoiset
3808aab239 radv: advertise VK_EXT_dynamic_rendering_unused_attachments
It's a no-op and it's passing CTS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23292>
2023-05-29 13:41:02 +00:00
Samuel Pitoiset
3e6b0f43dc vulkan: Update XML and headers to 1.3.251
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23292>
2023-05-29 13:41:02 +00:00
SureshGuttula
a698291f56 va/surface : Add Nv12 support for PRIME_2 imports
This patch will fix the resource allocation failed for NV12 buffer
format.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23175>
2023-05-29 13:05:39 +00:00
Eric Engestrom
b61c9cde91 docs: document clang-format and how to use it
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23269>
2023-05-29 11:57:08 +00:00
Eric Engestrom
3ea2c1cb32 ci: use meson to run clang-format
This will allow us to easily exclude vendored code when we enforce the
formatting of more components later on.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23269>
2023-05-29 11:57:08 +00:00
Eric Engestrom
2f78ec7d37 meson: enable the clang-format target
.clang-format needs to exist in the root of the project for the target
to be generated, but since we don't have a global config it's a dummy,
empty file.

.clang-format-include lists the files (files! not folders) that are to
be formatted.

.clang-format-ignore lists the files to exclude, even if they are in the
include list above. Useful for vendored code for instance.

See https://mesonbuild.com/Code-formatting.html

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23269>
2023-05-29 11:57:08 +00:00
Eric Engestrom
059ee4ff8d ci: color the diff for clang-format
Suggested-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23269>
2023-05-29 11:57:08 +00:00
Eric Engestrom
6364511837 ci/zink+radv: document recent regressions
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23274>
2023-05-29 09:30:49 +00:00
Eric Engestrom
14adc62ef2 ci/zink+radv: mark all spec@arb_copy_image@arb_copy_image-targets* as flaky after getting a bunch more of them
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23274>
2023-05-29 09:30:49 +00:00
Eric Engestrom
950cd75dda ci/zink+radv: fix flakes definition
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23274>
2023-05-29 09:30:49 +00:00
Juan A. Suarez Romero
75d59df41f v3d/v3dv/ci: adjust job fractions
So far we have 12 jobs for v3d-gl (OpenGL/ES and piglit), 1 job for
v3d-traces, and 10 jobs for v3dv-vulkan, but we only have 21 rpi4
devices for testing.

So let's reduce from 12 to 10 jobs in v3d-gl, so all jobs can run
simultaneously.

Also, as the ideal goal is that each job doesn't take more than 15
minutes, let's increase a little bit the fraction for v3dv, and include
a fraction for v3d-gl as well, so all jobs are ideally under the time
limit.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23285>
2023-05-29 09:11:27 +00:00
Samuel Pitoiset
efc807aac4 radv/ci: skip tests that timeout since Vulkan loader 1.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23261>
2023-05-29 08:46:04 +00:00
Samuel Pitoiset
bf9699a768 radv/ci: update list of expected failures since Vulkan loader 1.3
Updating Debian to 12 also updated Vulkan loader 1.3 and these are
fixed now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23261>
2023-05-29 08:46:04 +00:00
Juan A. Suarez Romero
ceb923bc2a vc4: add specific stencil blit path
This implementation reinterprets the stencil data as a RGBA8888 texture.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23136>
2023-05-29 08:21:39 +00:00
Juan A. Suarez Romero
2232320fe9 vc4: allow tile-based blit for Z/S
Besides blitting color-based buffer, we can use the tile buffers to blit
also depth and stencil buffers.

This also fixes several piglit tests.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23136>
2023-05-29 08:21:39 +00:00
Juan A. Suarez Romero
d13da7782c vc4: call blit paths in chain
Let each of the different blit paths to decide if they need to do the
blit operation based on the blit mask, and update the mask once the
operation is done.

This allows to call all the different versions without needing to check
if they success or not.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23136>
2023-05-29 08:21:39 +00:00
Juan A. Suarez Romero
5b3c61db65 vc4: set blit mask correctly
Drivers expect either color or stencil/depth blit to be done, but not
both at the same time.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23136>
2023-05-29 08:21:39 +00:00
Juan A. Suarez Romero
8fb16b8814 v3d: enable NIR compact arrays
Now that it is exposing GLSL 1.30, and we can read clipdistance arrays
in the fragment shader, let's enable this capability.

It fixes
`spec@glsl-1.30@execution@clipping@fs-clip-distance-interpolated,Crash`.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23232>
2023-05-29 07:52:11 +00:00
Samuel Pitoiset
55df7b6415 radv: rework configuring VGT_SHADER_STAGES_EN
For shader objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22991>
2023-05-29 07:27:11 +00:00
Tatsuyuki Ishi
978d80fbe2 radv: Make shader related destruction happen before hw_ctx.
radv_destroy_shader_upload_queue waits for a semaphore, which will in turn
call query_reset_status on hw_ctx that will fail due to being already
destroyed.

Fix radv/amdgpu: amdgpu_cs_query_reset_state2 failed. (-9) spam in the logs
with RADV_PERFTEST=dmashaders.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23276>
2023-05-29 06:53:05 +00:00
Samuel Pitoiset
01bd012edd amd: fix 64-bit integer color image clears
Fixes recent CTS dEQP-VK.api.image_clearing.*r64* since the Vulkan
specification has been clarified.

Only VK_FORMAT_R64_{UINT,SINT} are supported.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23250>
2023-05-29 07:54:38 +02:00
Víctor Manuel Jáquez Leal
0e886a93ce vulkan: complete the usage flags for video layouts
Otherwise Vulkan decoding with FFmpeg crashes on anv.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23184>
2023-05-29 02:59:05 +00:00
Francisco Jerez
9c26a6b3bb anv: Fix calculation of guardband clipping region.
The existing guardband region calculation was mixing up x/y_min with
x/y_max in cmd_buffer_emit_viewport(), causing the calculated viewport
area to always be an empty region.  Luckily intel_calculate_guardband_size()
returns a non-empty but bogus guardband region in that case, so this
doesn't seem to have led to conformance regressions, but the
off-center guardbands could potentially impact performance in
geometry-heavy rendering.

Fixes: 893fa30afe ("anv: Include scissors in viewport calculations")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23174>
2023-05-28 15:43:29 -07:00
David Heidelberg
744e9cb213 gitlab: add template for merge requests
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22078>
2023-05-28 15:26:53 +02:00
David Heidelberg
b3b883ca00 bin/ci: mention requirements.txt
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22078>
2023-05-28 15:19:42 +02:00
Christopher Snowhill
92a7cba4f2 intel: Sync xe_drm.h
My second attempt at a minimally invasive reshuffle of the uAPI,
this time only forcibly aligning structures to 32-bits or 64-bits
depending on the members which follow, so that 64-bit userspace
is identical to the current unmerged kernel module, and the 32-bit
compat userspace aligns with that, and functions rather than
crashing.

Should work just fine with the current drm-xe-next Git tree, which
is rebased on 6.3.0-1, with a few extra changes, as of this commit.

Based on commit 2cd469458fcc24c5f345ad39721a1aedaf70ec0f ("drm/xe: Add explicit padding to uAPI definition")

Signed-off-by: Christopher Snowhill <kode54@gmail.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22652>
2023-05-27 03:56:18 +00:00
Marek Olšák
264cf37348 radeonsi: re-enable fp16_rtz for compute blits to fix PBO tests on gfx11
Fixes: bcdde99675 - radeonsi: don't convert to fp16 in the compute blit if not testing

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
cc199c2baa radeonsi: update test results and flakes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
c5806422a5 radeonsi: reduce the supported compute grid size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
ebb784f268 radeonsi/gfx11: use DISABLE_FOR_AUTO_INDEX to disable non-indexed prim restart
DISABLE_FOR_AUTO_INDEX disables primitive restart for non-indexed draws.
We set it in the preamble first, so that non-indexed draws can completely
ignore the primitive restart state.

There is a little bit of duplication that's needed to enclose the primitive
restart code in "if (index_size)" for indexed draws.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
1f90a2be60 radeonsi: move emitting draws states out of si_emit_all_states
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
9d7eab2ab1 radeonsi: don't enable WGP_MODE because of high cost of workgroup mem coherency
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
038fb6573a radeonsi: remove the gl_SampleMask FS output if MSAA is disabled
It's better to remove the output than what the previous code did,
which only unset MASK_EXPORT_ENABLE.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
7b95be3575 radeonsi: cosmetic changes in si_shader.h
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
b914c2601c radeonsi: reorder code in si_texture_create_object as preparation for the future
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
dcbe4b89ea radeonsi/gfx11: fix alpha-to-coverage with blending
Bug: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8222

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
2f6665efc5 ac/llvm: use LLVM 0/1 constants from ac_llvm_context instead of LLVMConstInt
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
39da12b7c7 ac/llvm: clean up visit_load_local_invocation_index and visit_load_subgroup_id
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
1dd2fa01c7 ac/llvm: clean up translation of nir_intrinsic_load_invocation_id
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
ea7c89d1f5 ac/surface: move determing ADDR_FMT_* into a helper function
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:59 -04:00
Marek Olšák
78d5626d17 ac/surface: move CB format translation helpers here
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:27:50 -04:00
Marek Olšák
8642740aef ac/gpu_info: give has_msaa_sample_loc_bug a more accurate name
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
2023-05-26 23:17:40 -04:00
Jesse Natalie
587ad3430d ci/windows: Update WARP to 1.0.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23267>
2023-05-26 22:50:50 +00:00
Jesse Natalie
0373b02cf6 dxil: Don't run opt_remove_phis before lower_returns
nir_lower_returns will run nir_opt_remove_phis as part of its work

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22913>
2023-05-26 18:31:30 +00:00
Jesse Natalie
cc136cacfa radv: Don't run opt_remove_phis before lower_returns
nir_lower_returns will run nir_opt_remove_phis as part of its work

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22913>
2023-05-26 18:31:30 +00:00
Jesse Natalie
505b81b8c1 nir: Add undef phi srcs when adding successors
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22913>
2023-05-26 18:31:30 +00:00
Jesse Natalie
5d238c0c2c nir_lower_returns: Optimize phis before beginning the pass
This adds a little extra work, since now dominance is computed and
blocks that don't just have then-return or else-return are looked at.
However it means that nir_lower_returns can now keep phis up to date
by inserting undefs without causing some phis to become non-trivial.

This ends up obviating a couple of tests for lower_returns.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22913>
2023-05-26 18:31:30 +00:00
Eric Engestrom
a1b27c364f panfrost: rename *.cc files to *.cpp
This extension caused them to be missed by clang-format.

Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23264>
2023-05-26 18:07:38 +01:00
Eric Engestrom
63c3768cf3 panfrost: fix formatting of a couple of files that were missed
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23264>
2023-05-26 18:07:36 +01:00
Eric Engestrom
480204aeed ci: show diff when clang-format check fails
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23258>
2023-05-26 16:04:57 +00:00
Eric Engestrom
648b5f3070 ci: split clang-format list of folders for easier maintenance
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23258>
2023-05-26 16:04:57 +00:00
Mykhailo Skorokhodov
564562eb05 mesa: Implement GL_CLEAR_TEXTURE flag
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7455
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21682>
2023-05-26 15:13:54 +00:00
Eric Engestrom
d240a630e7 wsi/display: drop unused parameters from local functions
These are all local functions, so it's trivial to add back any parameter
should they become useful.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20566>
2023-05-26 14:34:17 +00:00
Gert Wollny
d55427f3d6 ci: uprev virglrenderer to include changes needed for GL 4.6 support
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23196>
2023-05-26 13:25:18 +00:00
Gert Wollny
fa03154077 features: Update virgl features
Depending on host features we now support OpenGL 4.6

Signed-of-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23196>
2023-05-26 13:25:18 +00:00
Gert Wollny
cc6b0b20d8 virgl: enable ARB_gl_spirv
This is handled in the guest and can just be enabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23196>
2023-05-26 13:25:18 +00:00
Gert Wollny
2428fce2e6 virgl: signal support for group vote and draw parameters
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23196>
2023-05-26 13:25:18 +00:00
Gert Wollny
9ce5fa758d virgl: Submit drawid_offset if is not zero
This is needed in the case of multi-draw to evaluate the right gl_DrawID
in the shader.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23196>
2023-05-26 13:25:18 +00:00
Gert Wollny
d4fc359748 virgl: Fix IB upload when a start >0 is given
We don't need to add an offset in the buffer, because we submit
the offset where the data was written to to the host. The
correction of this offset is also not needed and results in draw
errors.

Fixes: 0cf5d1f226
  gallium: remove PIPE_CAP_INFO_START_WITH_USER_INDICES and fix all drivers

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23196>
2023-05-26 13:25:18 +00:00
Lionel Landwerlin
8ebb9e2c13 anv: opportunistically align VMA to 2Mb
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
2023-05-26 12:58:13 +00:00
Lionel Landwerlin
28efc785d3 anv: further reduce pool alignments
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
2023-05-26 12:58:13 +00:00
Lionel Landwerlin
9c67dde401 intel: reduce minimum memory alignment on Gfx12.5
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
2023-05-26 12:58:13 +00:00
Lionel Landwerlin
6dbe165b2a anv: update aux-tt alignment requirements for MTL
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
2023-05-26 12:58:13 +00:00
Lionel Landwerlin
7ffd0f409e iris: add a comment about aux-tt alignment requirements
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
2023-05-26 12:58:13 +00:00
Lionel Landwerlin
195fbffac8 intel: add alignment helper for aux map
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
2023-05-26 12:58:13 +00:00
Mike Blumenkrantz
b772499a09 zink: don't propagate psiz in quads emulation gs
this is pointless

haha.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23240>
2023-05-26 12:16:05 +00:00
Mike Blumenkrantz
09678079c3 zink: don't remove psiz from linked shaders if the consumer reads it
it's valid for psiz to be piped through successive stages, so don't
delete it unnecessarily

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23240>
2023-05-26 12:16:04 +00:00
Eric Engestrom
c81b78041e meson: simplify another "any of" check
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22491>
2023-05-26 11:30:26 +00:00
Eric Engestrom
5feb6133d7 ci/intel: reuse iris_file_list instead of copying its definition
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22456>
2023-05-26 10:37:22 +00:00
Eric Engestrom
51482b2c6a bin/ci: fix mistakenly hardcoded repo name in get_gitlab_project()
It didn't matter so far because all callers always pass "mesa".

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23223>
2023-05-26 10:13:09 +00:00
Eric Engestrom
6801de5170 ci/amd: only define AMDGPU_GPU_ID for the duration of the call
This avoids the risk of accidentally forgetting to overwrite it again in
a later call.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23249>
2023-05-26 09:34:53 +00:00
Eric Engestrom
0a33701558 ci/amd: move AMD-specific LD_PRELOAD to AMD config
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23249>
2023-05-26 09:34:53 +00:00
Samuel Pitoiset
f76b121610 ci: uprev vkd3d-proton to 2.9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23162>
2023-05-26 09:01:09 +00:00
Samuel Pitoiset
d2d07a7262 radv: fix copying 2D to 3D images
CTS is testing 2D to 3D image copies but the checks are incomplete and
we used to only copy the first slice.

This should fix
dEQP-GLES31.functional.copy_image.non_compressed.*.texture2d_array_to_texture3d
with ANGLE.

Cc: mesa-stable
Suggested-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23231>
2023-05-26 08:41:31 +00:00
Samuel Pitoiset
395450c5b1 zink/ci: skip arb_texture_buffer_object@texture-buffer-size-clamp* with RADV
These tests can run OOM and might hang.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23248>
2023-05-26 08:13:45 +00:00
Sergi Blanch Torne
f466e8ea3c ci: Allow zink-radv jobs to be manual when uprev piglit
It is required for the automatic uprev of piglit in mesa to have the
"^zink-radv-.*-valve" jobs in the pipeline that checks an uprev candidate. So,
when there is a change in the file where the revision of piglit is set, those
jobs will be listed as manual.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21193>
2023-05-26 08:18:38 +02:00
Boyuan Zhang
0583c1f8d2 frontends/va: add default intra idr period
Use default value in case h264->intra_idr_period is not set by app.
Also to avoid dividing by 0 for later calculations in case it's not set.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22803>
2023-05-26 02:11:37 +00:00
Eric Engestrom
9ce717ab31 ci_run_n_monitor: add ability to specify the pipeline to use, instead of auto-detecting it
The auto-detection code currently looks for a repo called "mesa" in the
current user's fork (ie. the user providing the api token), which is great for
the common use case, but sometimes needs to be able to be overridden, such as
when running a pipeline in another fork than one's own, when working with
someone else in their fork.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23230>
2023-05-26 00:12:03 +00:00
Rohan Garg
0539dec10f util: move pot functions to use existing macros
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:45 +00:00
Rohan Garg
f4f133ab37 util: revert back to ALIGN since it moved to util
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:45 +00:00
Rohan Garg
0a06cf7523 util: migrate alignment functions and macros to use ALIGN_POT
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:45 +00:00
Rohan Garg
78e7a9740b util: fix ROUND_DOWN_TO alignment type
Alignments can only be unsigned. Cast alignment to uint64_t to keep MSVC
happy.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:45 +00:00
Rohan Garg
3bd5968b5c freedreno: set alignment to next POT
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:45 +00:00
Rohan Garg
c2d0662eb8 ac/surface: make sure alignment is a POT
Signed-off-by: Rohan Garg <rohan@garg.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:45 +00:00
Rohan Garg
14dec0c147 iris: correctly set alignment to next power of two for struct size
We're currently aligning the offset to the size of the data structure
itself when the upload manager actually expects a POT. Ideally this
would be the next POT that's greater than the size of the structure.

Fixes: c24a574e6c ("iris: Don't allocate a BO per query object")

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20153>
2023-05-25 21:24:44 +00:00
Eric Engestrom
c54201c196 docs/relnotes: add sha256sum for 23.1.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23241>
2023-05-25 21:19:01 +00:00
Eric Engestrom
05a0661ea6 docs: add release notes for 23.1.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23241>
2023-05-25 21:19:01 +00:00
Eric Engestrom
f7577ff4b7 docs: update calendar for 23.1.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23241>
2023-05-25 21:19:01 +00:00
Jesse Natalie
e965b5d291 wsi/win32: Handle acquiring an image while one is already acquired
In the case where the app is attempting to acquire both (since the
min/max num images is 2) swapchain images, we need to wait on the
fence for the next image in the chain.

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23222>
2023-05-25 20:43:32 +00:00
Eric Engestrom
3867e91da4 v3dv: fix align() computation for pixel formats with non-POT block sizes
Fixes hundreds of dEQP-VK.api.copy_and_blit.* tests when including the
assert that the alignment in align() is valid, as added in !20153.

Fixes: 3ba839bf73 ("v3dv: align compressed image regions to block size")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23224>
2023-05-25 20:25:04 +00:00
Konstantin Seurer
2fbf13085a radv: Stop using radv_get_int_debug_option
We can use debug_get_num_option instead. Bool options are changed to use
debug_get_bool_option.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23146>
2023-05-25 19:58:38 +00:00
Alyssa Rosenzweig
4cdd85517d nir: Add intrinsics for multisampling on AGX
sample_mask_agx maps to the AGX instruction used to write out a sample mask.

api_sample_mask_agx is a system value that returns the value of glSampleMask
(or its Vulkan equivalent), used to lower glSampleMask (etc).
This is distinct from sample_mask_in, which we map to the hardware thing and
AND with this as a lowering.

sample_positions_agx is a system value returning the sample positions in a
packed fixed-point format matching the hardware register, used to lower
gl_SamplePositions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23040>
2023-05-25 17:41:33 +00:00
Eric Engestrom
170e2fa11e ci/zink: document new zink-radv-navi10-valve failures
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23234>
2023-05-25 17:14:18 +00:00
Rhys Perry
c9cfe7bc80 aco/tests: add fix_derivs_in_divergent_cf tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
02b933981c aco/tests: improve performance of declaration parsing
Unlike \S, \w only matches characters which are valid in identifiers. This
seems to be much faster, especially for longer identifier names.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
859e059aa9 radv: use fix_derivs_in_divergent_cf
fossil-db (navi21):
Totals from 3256 (2.40% of 135636) affected shaders:
MaxWaves: 65430 -> 64366 (-1.63%)
Instrs: 3517336 -> 3517724 (+0.01%); split: -0.12%, +0.13%
CodeSize: 18963788 -> 18946904 (-0.09%); split: -0.14%, +0.05%
VGPRs: 172464 -> 175872 (+1.98%); split: -0.02%, +2.00%
Latency: 33643792 -> 33643179 (-0.00%); split: -0.12%, +0.12%
InvThroughput: 5912965 -> 5934404 (+0.36%); split: -0.09%, +0.46%
VClause: 60268 -> 60275 (+0.01%); split: -0.12%, +0.13%
SClause: 125227 -> 125241 (+0.01%); split: -0.09%, +0.10%
Copies: 253452 -> 254638 (+0.47%); split: -1.29%, +1.76%
Branches: 100951 -> 100953 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 186403 -> 185641 (-0.41%)
PreVGPRs: 153751 -> 156915 (+2.06%); split: -0.06%, +2.12%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
364ad2815b aco: implement texture samples with strict WQM coordinates
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
2447156b3c aco: implement strict_wqm_coord_amd
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
35c133a77b aco: add MIMG_instruction::strict_wqm
This lets us use linear VGPRs for part of the texture sample's address.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
1a6a57ac96 aco: let p_start_linear_vgpr take an operand
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
ab885a011a aco: remove unused RegType
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
0d26d9d9b6 ac/nir: add fix_derivs_in_divergent_cf
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
6bdf9dfd47 nir/lower_tex: remove lower_array_layer_round_even
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
09785e5e1b radv,radeonsi: use ac_nir_lower_tex
fossil-db (navi21):
Totals from 17279 (12.74% of 135636) affected shaders:
MaxWaves: 270015 -> 269991 (-0.01%)
Instrs: 24847385 -> 24843807 (-0.01%); split: -0.02%, +0.00%
CodeSize: 133215364 -> 133198744 (-0.01%); split: -0.02%, +0.01%
VGPRs: 1217632 -> 1217872 (+0.02%); split: -0.00%, +0.02%
Latency: 405347021 -> 404971784 (-0.09%); split: -0.09%, +0.00%
InvThroughput: 75386590 -> 75350344 (-0.05%); split: -0.07%, +0.03%
VClause: 426986 -> 426821 (-0.04%); split: -0.04%, +0.01%
SClause: 966751 -> 966971 (+0.02%); split: -0.01%, +0.03%
Copies: 1738510 -> 1737970 (-0.03%); split: -0.08%, +0.05%
PreSGPRs: 1169070 -> 1169120 (+0.00%); split: -0.00%, +0.00%
PreVGPRs: 1136102 -> 1136183 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
3efaaf130a ac/nir: round layer in ac_nir_lower_tex
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
1f86be7f8e ac/nir: add pass for lowering 1d/cube coordinates
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
1ba73621bc nir,vtn,aco,ac/llvm: make cube_face_coord_amd more direct
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Rhys Perry
1e00748a53 nir/fold_16bit_tex_image: skip tex instructions with backend1
This will be used for RADV/ACO in the future, and I don't want to and
don't have to deal with 16-bit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22636>
2023-05-25 16:29:16 +00:00
Georg Lehmann
12d5a2aa97 util: fix stack dynarray used by multiple tus
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23106>
2023-05-25 15:46:35 +00:00
Alyssa Rosenzweig
4af6b601e0 panfrost/ci: Skip hanging test
Reported as both slowest test (60s) and a flake in a deqp-runner double-whammy.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23235>
2023-05-25 15:24:34 +00:00
Alyssa Rosenzweig
4c03f9b055 panfrost/ci: Skip Piglit tests known to crash
A bunch of Piglits cause crashes, at least when run with PAN_MESA_DEBUG=sync.
For many, the crashes are due to faults. Although Piglits are nominally
process-isolated, faults can leak across processes to subpar recovery, meaning
these crashes are liable to cause robust passing tests to flakes.  So, skip any
tests known to crash to make sure the coverage is solid.

Given that we run piglit on panfrost in pre-merge CI, but there's nobody
actively working on fixing piglits for panfrost, I think this is the best
compromise. It means we get to keep the coverage (and ensure we don't regress
piglits that are currently passing) but we don't risk flaking CI. Currently
deqp-runner is eating massive numbers of piglit flakes. While it's really great
that the infrastructure is robust in that way, it'd be better to not have those
flakes in CI in the first place (for run time, if not robustness).

If someone starts hacking on Bifrost + desktop OpenGL again for some reason and
fixes these tests locally, they can reenable them then.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23235>
2023-05-25 15:24:34 +00:00
David Heidelberg
fe957400da ci/llvmpipe: document intel_shader_atomic_float_minmax@execution@ssbo-atomic*
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:54 +02:00
David Heidelberg
160f573b64 ci/lavapipe: zink failures
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:54 +02:00
David Heidelberg
8c12d5c89a ci/lavapipe: document subgroups.shuffle.compute.subgroupshuffleup_double_constant crash
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:53 +02:00
David Heidelberg
9c6321b006 ci: do not fail when SHA1 impl. produce stringop-overreads warning
When SHA1 gets purged from Mesa, drop the override.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:53 +02:00
David Heidelberg
d538944655 ci: disable bogus GCC warning with -Warray-bounds
Reported: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109744

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:53 +02:00
David Heidelberg
5941fc8ccd ci: enable shellcheck on whole .gitlab-ci
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:53 +02:00
David Heidelberg
a99b952a5d ci/zink: disable flaking anv traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:53 +02:00
David Heidelberg
a939af64d1 ci/virpipe: add flakes introduced with CI uprev to Debian 12
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:52 +02:00
David Heidelberg
5f4138fd04 ci/venus: add fail after CI uprev to the Debian 12
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:52 +02:00
David Heidelberg
06f0e7b1d2 ci/mingw: disable as it's broken
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:52 +02:00
Corentin Noël
7189236f52 build-crosvm: Use the pkg-config crate 0.3.27
The support of pkgconf is available since this version.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:52 +02:00
David Heidelberg
b88080aa2e ci: drop gallium-aux test on msan builds, renable freedreno
gallium-aux test cannot work properly without msan libc,
which we don't have available right now.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:52 +02:00
David Heidelberg
70917cd77a ci/skqp: skqp can't live with compiler named clang-15, provide symlink
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:52 +02:00
David Heidelberg
117df219c1 ci: add clang-15 and clang++-15 wrapper script
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:51 +02:00
David Heidelberg
7cbd8f3742 ci/crosvm: install libelogind0 and sysvinit-core for poweroff functionality
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:51 +02:00
David Heidelberg
cbe79beaff ci/apitrace: install win64 apitrace only on x86_64
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:51 +02:00
David Heidelberg
848f59deda ci: bump from Debian 11 (bullseye) to 12 (bookworm)
Already in hard-freeze, so we don't have to worry about breaking changes.

Significant changes:
 - LLVM 15 is used instead of 11 or 13
 - /dev/shm has to be manually mounted
 - Debian 12 uses libdrm 2.4.114
 - reworked creating of rootfs, from debootstrap to mmdebstrap
 - split `create-rootfs.sh` into `lava_build.sh`, `setup-rootfs.sh`, and `strip-rootfs.sh`
 - dropped winehq repository for now (Debian wine is up-to-date enough)
 - we use wine now, no need to call explicitly call wine64
 - bumped libasan from version 6 to 8

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:51 +02:00
David Heidelberg
335d3074fb ci: VVL uprev (temporary until new release will be published)
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:51 +02:00
David Heidelberg
c8615c8ad3 ci: libwayland from 1.18 to 1.21 and wayland protocols from 1.24 to 1.31
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:50 +02:00
David Heidelberg
8b8da551c1 ci: bump gfxreconstruct revision up to compatible version with Debian 12
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:50 +02:00
David Heidelberg
80b7787bab ci: install stock android-libext4-utils (available in 12, bookworm)
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:50 +02:00
David Heidelberg
993ed1f026 ci: bump libdrm from 2.4.110 to 2.4.114 present in Debian 12
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:50 +02:00
David Heidelberg
1966eff8a6 ci: use meson setup and meson install instead of meson and invoking ninja directly
Not primary scope of relevant MR, just some incremental changes.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:50 +02:00
David Heidelberg
bb54ae1d26 ci: move from pkg-config to pkgconf
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977>
2023-05-25 16:06:49 +02:00
Eric Engestrom
394d592525 docs: fix release date of 23.1.0
I forgot to generate this doc when I made the release, and this was the
date when I actually did generate them.

Fixes: 7fe482d4ce ("docs: add release notes for 23.1.0")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23237>
2023-05-25 14:05:20 +01:00
Iago Toral Quiroga
3530e3ffb2 broadcom/compiler: use scoped barriers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23228>
2023-05-25 14:28:30 +02:00
Iago Toral Quiroga
e99ab86f77 broadcom/compiler: flag use of control barriers
We have been relying on NIR's gather info pass for this
but it is not safe unless we are certain we are always
calling it after any other pass that may emit a control
barrier.

As it stands, nir_zero_initialize_shared_memory can emit a
control barrier and we don't call the gather info pass after
it, which is problematic. The only reason this is not really
a problem right now is because for non-scoped barriers (which
is what we currently use) it doesn't emit a scoped barrier, just
a regular memory barrier (which is probably a bug in the pass!),
but as soon as we move to scoped barriers, this is going
to be a problem, since we need to know when we emit a control
barrier to ensure supergroup calculations prevent deadlocks at
the barrier op.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23228>
2023-05-25 14:28:30 +02:00
Alyssa Rosenzweig
b6e40edae6 zink: Switch to scoped barriers
Rather than translate piles of discrete memory_barrier/control_barrier
instructions, translate the unified scoped_barrier which maps almost directly to
SPIR-V's barrier. Yes, this means I cheated off vtn for the implementation.

v2: Use existing scope translation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23186>
2023-05-25 11:43:39 +00:00
Erik Faye-Lund
ee62454fe3 docs: move obsolete extensions to their own list
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23029>
2023-05-25 10:36:18 +00:00
Erik Faye-Lund
e0fd96ffd5 docs: mark MESA_texture_array as obsolete
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23029>
2023-05-25 10:36:18 +00:00
Erik Faye-Lund
10cbc98162 docs: mark MESA_swap_frame_usage as obsolete
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23029>
2023-05-25 10:36:18 +00:00
Erik Faye-Lund
13feb7235b docs: mark MESA_shader_debug as obsolete
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23029>
2023-05-25 10:36:18 +00:00
Erik Faye-Lund
6c5c8a543d docs: mark MESA_multithread_makecurrent as obsolete
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23029>
2023-05-25 10:36:18 +00:00
Erik Faye-Lund
48899251d3 docs: explicitly mark extensions as obsolete
We explicitly mark the other extensions in the OLD-folder as obsolete,
so let's be consistent here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23029>
2023-05-25 10:36:18 +00:00
Samuel Pitoiset
8126e0287d vulkan/pipeline_cache: remove a bogus assert when inserting objects
If two threads deserialize the raw object at the same time, the
refcount could be more than 1 temporarily.

This can be reproduced with Granite during the multi-threaded pipeline
cache pre-warm on startup, and also with Dota2.

Fixes: cbab396f54 ("vulkan/pipeline_cache: replace raw data objects on cache insertion of real objects")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22853>
2023-05-25 10:07:35 +00:00
Erik Faye-Lund
d6deb977c8 radeonsi,radv: use nir_format_linear_to_srgb
There's little point in open-coding this, when we already have a helper
for it.

This adds an fsat to both code-paths. Not sure if that's good or bad, or
if it even matters at all.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23201>
2023-05-25 09:33:40 +00:00
Lionel Landwerlin
1d13f22174 iris: rework Wa_14017076903 to only apply with occlusion queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 415b824bc6 ("iris: implement occlusion query related Wa_14017076903")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22807>
2023-05-25 09:10:33 +00:00
Eric Engestrom
7ae6932d47 mailmap: update @mupuf's name
There were a number of variants in the git history:

    Martin Peres <martin.peres@linux.intel.com>
    Martin Peres <martin.peres@mupuf.org>
    Martin Roukala (néé Peres) <martin.roukala@mupuf.org>
    Martin Roukala (né Peres) <martin.roukala@mupuf.org>

Last one is the current one, so let's normalize the rest to that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23229>
2023-05-25 09:07:59 +00:00
Thomas H.P. Andersen
8038ecfbda st: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
16fb3995f3 lavapipe: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
1227d66dc1 zink: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
14a350fbf3 virgl: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
cbe1e2cec7 vc4: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
c959e302e8 v3d: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
3d4789d3be svga: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
ea136dd9e0 softpipe: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
f8663b4b40 radeonsi: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
23e78d719b r600: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
17207eef36 r300: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
5d345b3b05 nouveau: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
af57770df2 llvmpipe: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
472bc207cb i915: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
381b29f14e freedreno: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
3ea64b8a2d etnaviv: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
1a6ffb3e9d d3d12: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:32 +00:00
Thomas H.P. Andersen
531896b366 aux: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-25 08:20:31 +00:00
Thomas H.P. Andersen
e2d305ce45 tgsi: delete unused functions
None of these are in use

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22864>
2023-05-25 07:36:07 +00:00
Erik Faye-Lund
c87e491107 nir: use nir_fsub_imm
Now that we have nir_fsub_imm, let's use it to save some typing!

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
2023-05-25 06:59:25 +00:00
Erik Faye-Lund
0ef104b057 nir: add nir_fsub_imm
This is similar to nir_isub_imm, but for floats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
2023-05-25 06:59:25 +00:00
Erik Faye-Lund
4cfb8005f0 nir: use more nir_ffma_imm variants
nir_ffma_imm has several variants that allows specific arguments to be
immediates. Use them for simplicity.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
2023-05-25 06:59:25 +00:00
Erik Faye-Lund
c4d2ebd285 nir: fsub -> fadd_imm
When doing nir_fsub(b, x, imm), we can negate the immediate value, and
replace the fsub with nir_fadd_imm() and get the same result. This makes
the code a bit shorter and easier to read.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
2023-05-25 06:59:25 +00:00
Erik Faye-Lund
5382b4fc2e nir: use more nir_fadd_imm
This makes the code a bit easier to read.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
2023-05-25 06:59:24 +00:00
Erik Faye-Lund
20d619cd84 nir: use more nir_fmul_imm
This simplifies things a bit. Note that in some cases, the arguments are
swapped, because multiplications are commutative, and nir_fmul_imm only
allows the second operand to be an immediate.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
2023-05-25 06:59:24 +00:00
Dave Airlie
ea2eade57b radv/video: use correct h264 levels
This should be set to the enum, ffmpeg has it wrong so far, but the sample decoder has it right.

convert radv to the proper answer.

Fixes: 1693c03a39 ("radv/video: add initial h264 decoder for VCN")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23225>
2023-05-25 03:04:04 +00:00
Julia Tatz
81b0840caa zink: Implement PIPE_CAP_RESOURCE_FROM_USER_MEMORY
Needed for GL_AMD_pinned_memory & zero-copy support in opencl

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23199>
2023-05-25 02:41:23 +00:00
Marek Olšák
c5054b1dfd winsys/radeon: set more radeon_info fields
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23221>
2023-05-25 02:26:01 +00:00
Marek Olšák
474f9fbe86 winsys/radeon: fix the scratch buffer on gfx6-7
I'm sure this was broken.

Fixes: 1bf39b1f9d - ac,radeonsi: rework how scratch_waves is used and move it to ac_gpu_info.c

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23221>
2023-05-25 02:26:01 +00:00
Marek Olšák
fe03351bee winsys/radeon: set has_image_opcodes to unbreak gfx6-7
Fixes: 96913bbf3e - ac/surface: force linear image layout for chips not supporting image opcodes

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9073

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23221>
2023-05-25 02:26:01 +00:00
Jesse Natalie
6674f04fc2 dzn: Fix src/dest confusion for some non-bindless descriptor copies
Fixes: 5d2b4ee4 ("dzn: Allocate descriptor sets in buffers for bindless mode")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
2023-05-25 02:08:32 +00:00
Jesse Natalie
5a43a50319 dzn: Don't expose copy queues
Vulkan says you can do things like image resolves or blits on transfer
queues, but D3D only allows literal copies. We could try to emulate
a Vulkan transfer-only queue backed by multiple D3D queues, where we
use the copy queue when possible but fall back to compute when needed,
but let's wait until there's a good reason to do that...

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
2023-05-25 02:08:32 +00:00
Jesse Natalie
b4852c4efb dzn: Partial revert of 8887852d
Turns out there was a good reason for having both buffer count
and desc_count. They served different purposes.

Fixes: 8887852d ("dzn: Add some docs around descriptor sets and remove redundant/unused data")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
2023-05-25 02:08:32 +00:00
Jesse Natalie
c83d894be1 dzn: Fix inverted assert
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
2023-05-25 02:08:32 +00:00
Jesse Natalie
98589399a4 dzn: Add a no-bindless debug flag
Forcing bindless on is nice for apps that don't use EXT_descriptor_indexing,
but for the CTS, whenever EXT_descriptor_indexing is supported, it's used.
To be able to more thoroughly test the not-bindless path, add a debug flag
to turn it off.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
2023-05-25 02:08:31 +00:00
Frank Binns
9b7faa7d96 pvr: fix invalid read reported by valgrind
pvr_gpu_upload() can't be used in the case of pvr_gpu_upload_usc() as it expects
the source and destination buffers to be the same size. This isn't the case
because pvr_gpu_upload_usc() adds some padding bytes to the size passed in by
the caller.

Fixes: 547a10f870 ("pvr: switch pvr_cmd_buffer_alloc_mem to use pvr_bo_suballoc")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23185>
2023-05-25 01:51:36 +00:00
Caleb Cornett
a7beb9974e d3d12: Fix Xbox frame scheduling for interval != 1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23154>
2023-05-25 01:35:55 +00:00
Caleb Cornett
e9bc4a22bb wgl: Add BITMAPV5HEADER to stw_gdishim.h
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23154>
2023-05-25 01:35:55 +00:00
Caleb Cornett
2e0eeb3706 d3d12: Fix Xbox GDK build errors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23154>
2023-05-25 01:35:55 +00:00
Patrick Lerda
39a9ebde37 glthread: fix typo related to upload_vertices()
Fixes: 68a926a15b ("glthread: set GL_OUT_OF_MEMORY if we fail to upload vertices")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23166>
2023-05-24 22:17:26 +00:00
Marek Olšák
e18344dd24 ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT
excluding: aco, radv, addrlib

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23113>
2023-05-24 21:48:19 +00:00
Eric Engestrom
713078f662 ci/zink: add new zink-radv-navi10-valve flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23215>
2023-05-24 21:21:58 +00:00
David Heidelberg
862a3e3b9e ci/freedreno: rename piglit job to respresent the real testing it does
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23211>
2023-05-24 20:52:25 +00:00
David Heidelberg
3809807b3d ci/freedreno: disable 3 jobs to match our farm 3 devices down
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23211>
2023-05-24 20:52:25 +00:00
Marek Olšák
ce3edf51be mesa: fix a VBO buffer reference leak in _mesa_bind_vertex_buffer
Fixes: 03ba57c6c5 - mesa: extend _mesa_bind_vertex_buffer to take ownership of the buffer reference

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23112>
2023-05-24 19:56:33 +00:00
Samuel Pitoiset
2ae220f451 zink/ci: update VANGOGH expected list of failures
arb_pipeline_statistics_query-frag is passing now. VRS flat shading
was the culprit and since smooth lines, it's disabled because
gl_SampleMaskIn is read. Incredible.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23212>
2023-05-24 19:31:36 +00:00
Rhys Perry
fab911858c aco: consider how definitions fixed to operands can change register demand
Usually the register demand before an instruction would be considered part
of the previous instruction, since it's not greater than the register
demand for that previous instruction. Except, it can be greater in the
case of an definition fixed to a non-killed operand: the RA needs to
reserve space between the two instructions for the definition (containing
a copy of the operand).

fossil-db (navi21):
Totals from 5 (0.00% of 135636) affected shaders:
PreVGPRs: 35 -> 40 (+14.29%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8807
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22446>
2023-05-24 18:58:15 +00:00
Rhys Perry
446d0dd658 aco: add get_op_fixed_to_def() helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22446>
2023-05-24 18:58:15 +00:00
Lionel Landwerlin
e9fa840eed anv: implement EDS2.extendedDynamicState2PatchControlPoints
We make the compiler assume the worst possible case (it's not great
because we have to burn 32 GRFs of potential input data) and then we
push the actual value through push constants.

This enables VK_EXT_gpl usage on zink, which causes two traces to change
their results.  Raven is an imperceptible change, blender has missing
original pngs but looks plausible.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
2023-05-24 18:32:07 +00:00
Lionel Landwerlin
429ef02f83 intel/fs: make tcs input_vertices dynamic
We need to do 3 things to accomplish this :

   1. make all the register access consider the maximal case when
      unknown at compile time

   2. move the clamping of load_per_vertex_input prior to lowering
      nir_intrinsic_load_patch_vertices_in (in the dynamic cases, the
      clamping will use the nir_intrinsic_load_patch_vertices_in to
      clamp), meaning clamping using derefs rather than lowered
      nir_intrinsic_load_per_vertex_input

   3. in the known cases, lower nir_intrinsic_load_patch_vertices_in
      in NIR (so that the clamped elements still be vectorized to the
      smallest number of URB read messages)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
2023-05-24 18:32:07 +00:00
Mike Blumenkrantz
32b7659fff zink: use the per-context track_renderpasses flag in more places
this should fix some erroneous zsbuf invalidation

Fixes: 215beee16d ("zink: more explicitly track/check rp optimizing per-context")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23189>
2023-05-24 18:02:11 +00:00
Mike Blumenkrantz
f58594cdea zink: don't wait on queue thread if disabled
Fixes: 270f9c0b06 ("zink: add ZINK_DEBUG=flushsync")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23189>
2023-05-24 18:02:11 +00:00
Alyssa Rosenzweig
feeeb45639 nir: Drop stale comments
Follow-on clean up after 01e9ee79f7 ("nir: Drop unused name from
nir_ssa_dest_init"). The referenced argument no longer exists.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
2023-05-24 17:30:03 +00:00
Alyssa Rosenzweig
d6b8acbee9 agx: Use common combine_all_barriers callback
This contains a bugfix: execution scopes are now respected when combining
barriers. Otherwise control barriers can disappear during combining, which is
wrong.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
2023-05-24 17:30:03 +00:00
Alyssa Rosenzweig
2da3a6e1b9 nir/opt_barriers: Add a default callback
Absent any knowledge about the hardware, if the backend wants to combine
barriers we should try to combine all barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
2023-05-24 17:30:03 +00:00
Alyssa Rosenzweig
ecd295bb8b treewide: Avoid nir_lower_regs_to_ssa calls
nir_registers are only supposed to be used temporarily. They may be created by a
producer, but then must be immediately lowered prior to optimizing the produced
shader. They may be created internally by an optimization pass that doesn't want
to deal with phis, but that pass needs to lower them back to phis immediately.
Finally they may be created when going out-of-SSA if a backend chooses, but that
has to happen late.

Regardless, there should be no case where a backend sees a shader that comes in
with nir_registers needing to be lowered. The two frontend producers of
registers (tgsi_to_nir and mesa/st) both call nir_lower_regs_to_ssa to clean up
as they should. Some backend (like intel) already depend on this behaviour.
There's no need for other backends to call nir_lower_regs_to_ssa too.

Drop the pointless calls as a baby step towards replacing nir_register.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
2023-05-24 17:30:03 +00:00
José Roberto de Souza
6875f97618 iris: Replace aperture_bytes by sram size in iris_resource_create_for_image() for PIPE_USAGE_STAGING
All platforms supported by Iris will have aperture_bytes set as 4Gb.
Also this value is not the actual aperture in i915, it actualy is the
GGTT size.

So here replacing it by the sram size, something that will vary
depending in the amount of RAM available.

This fix some tests with Xe KMD, as it is not setting aperture_bytes.
And will not do that as there is no UAPI to fetch this information
and it is not planned to it to Xe UAPI.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Ack-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22969>
2023-05-24 16:18:10 +00:00
Alejandro Piñeiro
88ca89bea9 broadcom/compiler: disable tmu pipelining when needed
disable_tmu_pipelining has been recently set to false on two
strategies that should set it to true.

Fixes the following CTS test:
dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite

Fixes: c950098ab - broadcom/compiler: move buffer loads to lower register pressure

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23207>
2023-05-24 15:17:03 +00:00
Julia Tatz
8dbd9925d5 zink: Implement PIPE_CAP_OPENCL_INTEGER_FUNCTIONS and PIPE_CAP_INTEGER_MULTIPLY_32X16.
Enables GL_INTEL_shader_integer_functions2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23197>
2023-05-24 14:52:15 +00:00
Alejandro Piñeiro
b6d874ade2 v3d: assert if v3d_compile returns NULL
Ideally we would like to trigger a compilation error like we do on
v3dv (VK_ERROR_UNKNOWN). But with v3d we can't really do that, as this
could happen on a draw call. Let's at least assert so debug builds
stops at this point.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
2023-05-24 14:19:12 +00:00
Alejandro Piñeiro
470b8567a5 broadcom/compiler: return NULL if we fail to register allocate
Right now if we fail to register allocate, we return the qpu_insts
that we had at that point, even if the driver can't really use it.

Also v3dv_pipeline was already assuming that it would return NULL on
failure, returning VK_ERROR_UNKNOWN on that case.

This allows CTS tests with a lot of pressure, that regress now and
then to not being able to allocate, to finish with an error, instead
of blocking forever. For example:
dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
2023-05-24 14:19:12 +00:00
Patrick Lerda
83cd7d23a2 mesa: fix refcnt imbalance related to egl_image_target_texture()
Indeed, the locally allocated "stimg" reference was not freed
on a specific code path.

For instance, this issue is triggered on radeonsi or r600 with:
"piglit/bin/egl-ext_egl_image_storage -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 6a3f5c6512 ("mesa: simplify st_egl_image binding process for texture storage")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23165>
2023-05-24 13:28:42 +00:00
Eric Engestrom
c8fa8672e4 ci/amd: don't override the b2c timeout in the steamdeck config
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23206>
2023-05-24 12:43:50 +00:00
Eric Engestrom
bdebef9215 ci/b2c: increase timeout to 5 minutes
We've been trying to get podman to output its progress while it downloads
images so that we don't think it's stuck, but until we manage to do that,
a longer timeout means fewer inaccurate timeouts.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23206>
2023-05-24 12:43:50 +00:00
Iago Toral Quiroga
3ba839bf73 v3dv: align compressed image regions to block size
This fixes an assert crash in UE4 when forcing the blit path for
image copies, caused by an image copy of a small miplevel which
pixel size is smaller than a single compressed block, leading to
an empty blit region.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
2023-05-24 09:28:07 +00:00
Iago Toral Quiroga
74e797e6ba v3dv: allow TFU transfers for mip levels other than 0
We had a check to ensure we were copying full slices, but the
size check was done against the base mip level, so in practice
we were only using the TFU for mip 0.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
2023-05-24 09:28:07 +00:00
Iago Toral Quiroga
1cb2d2a5ee v3dv: store slice dimensions in pixels
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
2023-05-24 09:28:07 +00:00
Samuel Pitoiset
b439bd5a58 radv: do not enable VRS flat shading if the VRS builtin is read
When the fragment shader reads the VRS builtin, VRS flat shading
shouldn't be enabled, otherwise the value might not be what the FS
expects.

Fixes dEQP-VK.fragment_shading_rate.renderpass2.monolithic.multipass.*
on RDNA2 (VRS flat shading isn't yet enabled on RDNA3).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23187>
2023-05-24 09:02:31 +00:00
Corentin Noël
1a8dd84ec6 nir: Propagate the type sampler type change to the used variable.
Avoid keeping a mismatching type between the sampler declaration and its
use.

In the case of virgl, we were hitting sanity checks when running the
spec@arb_fragment_program_shadow@tex-shadow2dnotdepth piglit test.

Fixes: 0843d4cbc3

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23183>
2023-05-24 07:48:18 +00:00
Dave Airlie
f4aa99f0da radv/video: add missing space checks for video.
Fixes: 7893040f80 ("radv: Add stricter space checks.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23158>
2023-05-24 07:21:40 +00:00
Tapani Pälli
3a9e8a4d73 mesa: validate shader binary format in _mesa_spirv_shader_binary
Rework:
 * Jordan: Added ARB_gl_spirv text to comment.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23155>
2023-05-24 06:45:39 +00:00
Lionel Landwerlin
688f03e369 iris: use COMPUTE_WALKER post sync field to track compute work
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
2023-05-24 09:09:01 +03:00
Lionel Landwerlin
521c216efc anv: use COMPUTE_WALKER post sync field to track compute work
This is more accurate than PIPE_CONTROL as it won't introduce stalls
between the compute dispatches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
2023-05-24 09:09:01 +03:00
Lionel Landwerlin
ddc37cf430 anv: move timestamp vfunc initialization to genX code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
2023-05-24 09:09:01 +03:00
Gert Wollny
7f5613903c docs/features: fix empty line error
Fixes: cbb144c (virgl: Add support for ARB_pipeline_statistics)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23195>
2023-05-24 05:52:43 +00:00
Tapani Pälli
613eb64011 iris: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:

   STATE_BASE_ADDRESS
   3DSTATE_BTD
   CHROMA_KEY
   STATE_SIP
   STATE_COMPUTE_MODE

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
2023-05-24 04:42:59 +00:00
Tapani Pälli
60b0d2c2cb anv: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:

   STATE_BASE_ADDRESS
   3DSTATE_BTD
   CHROMA_KEY
   STATE_SIP
   STATE_COMPUTE_MODE

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
2023-05-24 04:42:59 +00:00
Tapani Pälli
abcef5a476 intel/dev: provide helper to check if devinfo is ATS-M
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
2023-05-24 04:42:59 +00:00
Rob Clark
b43e5aec0d freedreno/batch: Move submit bo tracking to batch
We already do _most_ of the tracking of rsc associated with a batch at
the batch level.  If we manually add the handful of BOs that aren't part
of the resource tracking, we can drop the duplicate drm level tracking.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
5d26070f08 freedreno/a6xx: Optimize max_indices calculation
Turn draw-time udiv into two shifts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
f4fc45d63d freedreno/a6xx: Template specialization for pipeline type
There are a bunch of extra steps for draws that involve GS and/or tess
stages.  But we can use template specialization to skip all that when
there is no GS/tess shader stage bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
778cdb156e freedreno/a6xx: Template specialization for draw type
Convert various run-time conditionals into a single draw type
determination, and use template specialization to generate unique
optimized code paths for each.  This also lets us fold the WFM needed
in some cases into normal barrier flushes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
15c66adc8a mesa: Skip update_gl_clamp() if samplers need clamp
update_gl_clamp() was ~12% of drawoverhead -test 40.. this turns it into
a no-op when no clamp lowering is needed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Lucas Fryzek
3e44b14af8 broadcom: Fix slice memory allocation logic for compressed textures
Compressed textures require their width and height padding to be
calculated based on the number of blocks in the image. This change ensures
that the number of blocks in the texture is a POT for mip levels > 1.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
2023-05-23 23:30:51 +00:00
Lucas Fryzek
fe973222a9 broadcom: Add support for VK_FORMAT_A2R10G10B10_UNORM_PACK32
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
2023-05-23 23:30:51 +00:00
Eric Engestrom
cb60ca3b1d docs: update calendar for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
2023-05-23 23:24:59 +00:00
Eric Engestrom
7fe482d4ce docs: add release notes for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
2023-05-23 23:24:59 +00:00
Alyssa Rosenzweig
622779e5cb dxil: Rely on scoped_barrier
We don't get non-scoped barriers. Don't handle them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23188>
2023-05-23 23:07:42 +00:00
Filip Gawin
e367617668 ac/nir: fix slots in clamping legacy colors
fixes: 7c41cdb81f

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23178>
2023-05-23 21:28:55 +00:00
Mike Blumenkrantz
dd0469e401 lavapipe: VK_EXT_pageable_device_local_memory
the memory guarantees of this extension should be implicit to linux systems

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
54c981e4a0 lavapipe: store memory allocation size onto lvp_device_memory
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
0c79c04f49 lavapipe: EXT_memory_priority
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
1c42056ee1 lavapipe: EXT_memory_budget
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
2111a3fcdb lavapipe: report full memory in heap for 64bit processes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
8ed34cbfeb lavapipe: bump memory allocation heap to 3GiB
this should still be a safe limit on all systems and archs

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Erik Faye-Lund
e44911827e util: mark externally-unused functions as static
These functions aren't used outside of sha1.c, so let's remove the
prototypes from the header-file, and mark the definitions as static.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23163>
2023-05-23 20:32:19 +00:00
Ruijing Dong
799665c9ba frontends/va: remove private member and update target buffer
use update_decoder_target to update the target buffer to
let decoder obtain correct reference frame.

remove the previous logic which failed to update reference
info in time.

fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8996
fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8387
Cc: mesa-stable

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
2023-05-23 19:56:24 +00:00
Ruijing Dong
a89f740e28 radeonsi/vcn: apply update_decoder_target logic
implement update_decoder_target and
remove corresponding obsolete logic.

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
2023-05-23 19:56:24 +00:00
Ruijing Dong
5b2544f868 gallium/pipe: add interface update_decoder_target
reason:
decoder uses the target buffer address in record
to indentify the reference frames. When target
buffer has changed outside of decoding process,
it has to be updated back to decoder, otherwise
the outdated reference will cause image corruption.

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
2023-05-23 19:56:24 +00:00
Dave Airlie
1f586f9409 ci: reenable lavapipe
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22806>
2023-05-23 19:39:59 +00:00
Ryan Houdek
a7f623e099 util: move check for AVX512
As a side effect solve:
```
[91/1401] Compiling C object src/util/libmesa_util.a.p/u_cpu_detect.c.o
../src/util/u_cpu_detect.c: In function '_util_cpu_detect_once':
../src/util/u_cpu_detect.c:889:11: warning: 'regs2[2]' may be used uninitialized [-Wmaybe-uninitialized]
  889 |       if (((regs2[2] >> 27) & 1) && // OSXSAVE
      |           ^~~~~~~~~~~~~~~~~~~~~~
../src/util/u_cpu_detect.c:823:16: note: 'regs2[2]' was declared here
  823 |       uint32_t regs2[4];
      |                ^~~~~
```

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23164>
2023-05-23 19:04:28 +00:00
Eric Engestrom
ca856143d4 util/bitset: ensure the sets compared have the same size at compile time
Instead of checking this at run time.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23171>
2023-05-23 17:31:17 +00:00
Eric Engestrom
348818fc6c ci: only execute capture-devcoredump.sh when it's present
Avoids this error:

    ./install/common/init-stage2.sh: line 130: /capture-devcoredump.sh: No such file or directory

One step closer to an error-free CI and being able to `set -e`.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22992>
2023-05-23 16:28:55 +00:00
Dave Airlie
aedbc35857 lvp: use stage iterator macros instead of explicit loops
This cleans up the compute checks

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
7bd41840a4 lvp: use stage mask
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
f52510efb3 gallivm/nir: refactor the local invocation index calc.
This is needed elsewhere for mesh shaders.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
1e49199364 gallivm: fix whitespace in get_deref_offset
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
2fbe256e82 lvp: explictly skip compute shader stage.
To add mesh/task later we have to loop over more stages the other side
of compute. So explicitly skip compute for now.

This has a couple of subtle bits to it, and I think there might be a bug
in pre rast

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
6046b6ea94 lavapipe: add lavapipe specific shader stages define.
This currently does nothing, but we need to increase this to add
task/mesh later.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
d45d3f0a81 llvmpipe/cs: support passing a csctx instead of using implicit one
This is just some refactoring to make adding mesh shaders easier

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
89c868a956 llvmpipe/cs: start making variant generator less compute specific
This is just some refactoring prior to task/mesh shaders

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
502cd6a2ca llvmpipe: convert a bunch of shader_type ifs to switches.
This makes it easier to add mesh shader support later

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
7c84ca2305 gallivm/draw: refactor vertex header jit type out
mesh shaders will want access to this as well so start moving it to
common code.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Gert Wollny
b2c604973b virgl/ci: uprev virglrenderer
Update DEBIAN_BASE_TAG and KERNEL_ROOTFS_TAG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
2023-05-23 14:01:43 +00:00
Gert Wollny
cbb144c8d4 virgl: Add support for ARB_pipeline_statistics
v2: make sure the PIPE enums map corretly to the VIRGL enums (Tintou)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
2023-05-23 14:01:43 +00:00
Gert Wollny
330a1db016 virgl: Make query result resource as dirty before requesting result
The query result resource will be written to by the host, so we have to
declare it as dirty if we want to see the change.

Fixes: 9279a28f0 (virgl: ARB_query_buffer_object support)

v2: Update expectations in CI

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
2023-05-23 14:01:43 +00:00
norablackcat
c07b8a54c5 rusticl/device: implement cl_khr_device_uuid
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23147>
2023-05-23 13:40:53 +00:00
norablackcat
536283555e rusticl/screen: implement uuid wrapper funcs
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23147>
2023-05-23 13:40:53 +00:00
Karol Herbst
c06a18ad9a rusticl/spirv: skip printing info messages
Those are quite spammy and add no value.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23091>
2023-05-23 13:02:40 +00:00
Lionel Landwerlin
21c7b55f6f intel/fs: fix size_read() for LOAD_PAYLOAD
With Anv/Zink, the piglit test :

  arb_shader_storage_buffer_object-max-ssbo-size -auto -fbo fsexceed

is failing validation after copy propagation :

load_payload(8) vgrf15:F, vgrf1+0.12<0>:F, vgrf1+0.0<0>:F, vgrf1+0.4<0>:F, vgrf1+0.8<0>:F, vgrf1+0.12<0>:F
../src/intel/compiler/brw_fs_validate.cpp:191: A <= B failed
  A = inst->src[i].offset / REG_SIZE + regs_read(inst, i) = 2
  B = alloc.sizes[inst->src[i].nr] = 1

In most cases it works because src[0] would be at offset 0 and so
reading a full reg passes validation, but Anv/Zink started emitting
slightly different code adding an offset maybe the size read 2 GRFs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23126>
2023-05-23 12:39:08 +00:00
Tatsuyuki Ishi
1546a9de99 nir: Fix serializing pointer initializers.
Found by manual inspection.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>

Fixes: 7acc81056f ("compiler/nir: Add support for variable initialization from a pointer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22355>
2023-05-23 11:40:48 +00:00
Eric Engestrom
520c5091d7 ci: disable anholt's farm
Its http cache proxy has been returning `curl: (52) Empty reply from
server` for a while and rebooting it didn't help, so turn it off for now.

Suggested-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Eric Engestrom <eric@igalia.com>
2023-05-23 12:35:35 +01:00
Alejandro Piñeiro
c6d0bc3918 v3d: remove v3d_get_internal_type_bpp_for_output_format
This is a one-line wrapper, so let's just use the v3d_X or v3dX macros
instead.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
2023-05-23 10:44:05 +00:00
Alejandro Piñeiro
b8f40fc4d4 v3d: remove v3d_tfu_supports_tex_format
This is a one-line wrapper, so let's just use the v3d_X or v3dX macros
instead.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
2023-05-23 10:44:05 +00:00
Alejandro Piñeiro
1a74a0b637 v3d: remove v3d_create_texture_shader_state_bo
This is a one-line wrapper, so let's just use the v3d_X or v3dX macros
instead.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
2023-05-23 10:44:05 +00:00
Alejandro Piñeiro
b7c35f5998 v3d: use more an auxiliar devinfo
Improve readability by using an auxiliar
        struct v3d_device_info *devinfo = &screen->devinfo;

this was triggered by the use of the v3d_X macro, where just having a
devinfo makes is more friendly. As we are here, we used it on other
places of the code.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23172>
2023-05-23 10:44:05 +00:00
Iago Toral Quiroga
a5c8be30d1 v3dv: simplify too small Z viewport scale workaround
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23167>
2023-05-23 09:22:56 +00:00
Alejandro Piñeiro
10daeac603 v3dv/pipeline: don't prepack up early-z configuration
False (so zero) is already the default value, so those prepacks are
basically superfluous.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23167>
2023-05-23 09:22:56 +00:00
Juan A. Suarez Romero
6dc22d996c v3d/ci: make traces test mandatory
Similar to other drivers, let's run always the traces tests.

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23135>
2023-05-23 07:50:49 +00:00
Juan A. Suarez Romero
496a7aedbb v3d/ci: run GPU piglit profile
Instead of running all the tests, run only the GPU related ones, which
should make the CI faster.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23135>
2023-05-23 07:50:49 +00:00
Samuel Pitoiset
d719e99f16 radv: apply a bug workaround for smoothing on GFX6
This fixes smooth lines on GFX6.

Fixes: 85cbdba355 ("radv: add support for smooth lines")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23168>
2023-05-23 06:52:22 +00:00
Mike Blumenkrantz
208c31b25f zink: infer types from load_const instrs to avoid more bitcasts
this walks to uses list for the ssa def to infer a type from one of the
uses to reduce the need to bitcast

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
9f6be8effb zink: store and use alu types for ntv defs
this adds indexing for ssa/reg defs with the accompanying current
type of a given def (inaccurate for objects but whatever), enabling
that type to be used directly in order to avoid bitcasts in some places

this upends the assumption that all stored srcs are uint type

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
096dcdbd01 zink: dynamically emit non-bool register values using local_vars spirv buffer
this will be useful in a future commit

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
871afadfe5 zink: write out register variables to a separate spirv buffer
this will enable registers to be written more dynamically with correct
type values to cut down on bitcasts

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
2a18d070cb zink: manually memcpy the spirv instruction buffer
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
5f4a2f6cfe zink: move get_alu_type() up in file
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
af76c23d74 zink: use void return for store_dest
not sure why this had returns, but it doesn't seem necessary

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
e4dacc382e zink: delete unnecessary bitcast in load_shared/scratch
if the mem is loaded as uint and stored as uint, then
the loaded and stored value must be uint, so a bitcast to uint
is as pointless as this commit message

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
5d8103b109 zink: also declare int size caps inline with signed int type usage
Fixes: 854fd242fa ("zink: declare int/float size caps inline with type usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22934>
2023-05-23 01:02:56 +00:00
Mike Blumenkrantz
80b8defaf3 zink: promote flushed clears to unordered cmdbuf when possible
this reuses the unordered_blitting codepath for fb clears

for #9016

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23056>
2023-05-23 00:18:29 +00:00
Mike Blumenkrantz
dfc01aea83 vk/graphics_state: handle null pipeline state structs in creation
when these members are null, the corresponding graphics states should be
initialized with sensible default values

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22236>
2023-05-22 23:51:22 +00:00
Mike Blumenkrantz
589fc441c3 anv: more correctly handle null pipeline states
it's not necessary to check whether dynamic states are set before
the null checks since any issues there would be VU errors

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22236>
2023-05-22 23:51:22 +00:00
Mike Blumenkrantz
fef493f745 lavapipe: more correctly handle null pipeline states
it's not necessary to check whether dynamic states are set before
the null checks since any issues there would be VU errors

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22236>
2023-05-22 23:51:21 +00:00
Mike Blumenkrantz
0f510040dc zink: flag 'has_work' on batch when promoting a cmd
has_work controls whether a flush can be deferred, i.e., when unset
a flush may be deferred

since a promoted cmd must still be flushed to take effect, ensure this
is always set when promoted cmds are pending

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
b0c02f5ce9 zink: explicitly disable promotion on images that are both unflushed and non-reorderable
until #9016 is resolved, be more cautious and consider any image with unflushed
access as un-promotable to avoid layout desync

affects:
KHR-GLES3.packed_pixels.varied_rectangle.rgb

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
3c010319bb zink: explicitly disable reordering after restricted swapchain readback blits
when needs_present_readback is set, reordering is disabled without hitting
the path that would normally disable promotion for the resource, so this
needs to be changed manually to avoid layout desync on the swapchain

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
ab3914a17b zink: disable unordered blits when swapchain images need aqcuire
this is consistent with other cmdbuf reordering for blits

Fixes: 3a9f7d7038 ("zink: implement unordered u_blitter calls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
db12b881c7 zink: track/check submit info on resource batch usage
resources use a private refcount to avoid overhead from atomics on
descriptor binds, but this has the side effect of evading batch usage,
meaning that the usage may not be properly removed once the batch state
is reset, which will cause issues with detecting whether usage exists
for a given resource

to fix this, the mechanism for tc fence disambiguation can be reused,
namely adding the batch state's submit count to the usage info and
then using that to add a second set of comparisons such that it becomes
possible to check both whether the batch usage for a resource matches
a given batch AND whether the batch usage is the current state of the
batch

affects:
KHR-GLES3.copy_tex_image_conversions.required.cubemap_posy_cubemap_negz

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
5e1943db7f zink: move batch usage to substruct on zink_bo objects
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
143da5f2e4 zink: move zink_batch_state::submit_count to zink_batch_usage
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
84bcdc521d zink: use batch usage function for a simple case
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:45 +00:00
Mike Blumenkrantz
9c8b6754b0 zink: add special-casing for (not) reordering certain image barriers
in a scenario where an ordered read op occurs for an image,
successive read-only barriers SHOULD be able to be promoted

...but they can't, because there isn't yet a mechanism for handling layout
transitions between the unordered cmdbuf and the ordered cmdbuf,
meaning that promoting e.g., a SHADER_READ_ONLY barrier after a TRANSFER_SRC
barrier will leave the image with the wrong layout for the transfer op:

TRANSFER_SRC(unordered) -> COPY(ordered) -> SHADER_READ_ONLY(unordered)

becomes

TRANSFER_SRC(unordered) -> SHADER_READ_ONLY(unordered) -> COPY(ordered)

ideally I'll get around to figuring this out at some point

affects:
dEQP-GLES31.functional.copy_image.non_compressed.viewclass_32_bits.r32i_r32i.texture2d_array_to_renderbuffer

Fixes: bf0af0f8ed ("zink: move all barrier-related functions to c++")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23035>
2023-05-22 23:26:44 +00:00
Nanley Chery
03b9a6fde1 iris: Use known formats for tex_cache_flush_hack
Instead of using ISL_FORMAT_UNSUPPORTED, use the known format to avoid
extra cache flushes.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23087>
2023-05-22 22:20:58 +00:00
Nanley Chery
803a569fdf intel/blorp: Add and use blorp_copy_get_formats
This is useful for iris to know what formats will be used for copy
operations.

The new function introduces a couple refactors. It makes use of the
ISL_GFX_VER() macro and it also makes more use of the
isl_surf_usage_is_depth() function.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23087>
2023-05-22 22:20:58 +00:00
Nanley Chery
f11a02c183 intel/blorp: Change condition for CCS_E copy formats
In blorp_copy, instead of checking if the surface's aux-usage is CCS_E,
check if its format supports CCS_E.

ISL won't report that a surface supports CCS_E if its format doesn't, so
this should strictly widen the scope of surfaces included in this path.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23087>
2023-05-22 22:20:58 +00:00
Nanley Chery
1ac1b17087 intel/blorp: Add depth usage check for copy format
We will soon update the CCS_E aux-usage check to a CCS_E format check.
Since depth formats support CCS_E on gfx12+, add another check for the
depth usage to prevent depth surfaces from falling into the CCS_E copy
format case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23087>
2023-05-22 22:20:58 +00:00
Nanley Chery
85142f3fce intel/blorp: Use the depth copy format more on BDW+
Sampling with HiZ is introduced on BDW+. For BLORP copies, instead of
using the depth format when the source uses HiZ, use it for all depth
sampling on BDW+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23087>
2023-05-22 22:20:58 +00:00
Chia-I Wu
57b85b6002 radv: do not use a pipe offset for aliased images
Fixes dEQP-VK.ycbcr.plane_view.memory_alias.* on raven2.

Fixes: 1c06565026 ("radv: expose disjoint image support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23143>
2023-05-22 20:14:22 +00:00
Chia-I Wu
4f1c43d38e ac/surface: print tile_swizzle as well
swizzle modes that are *_X or *_T depend on tile_swizzle.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23143>
2023-05-22 20:14:22 +00:00
Chia-I Wu
4f5edcd0ee amd/drm-shim: add raven2
It differs from raven in interesting ways (e.g., GB_ADDR_CONFIG).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23143>
2023-05-22 20:14:22 +00:00
Erik Faye-Lund
569d035a08 panfrost: expose PIPE_CAP_POLYGON_OFFSET_CLAMP
This gives us ARB_polygon_offset_clamp and EXT_polygon_offset_clamp, and
most of the actual state plumbing was already in place.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23169>
2023-05-22 20:00:18 +00:00
Alyssa Rosenzweig
8484fdf501 mesa/st: Set pipe_shader_image::single_layer_view
Pass it through from the API.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23142>
2023-05-22 16:41:10 +00:00
Alyssa Rosenzweig
a6a3a7a881 gallium: Add pipe_image_view::single_layer_view
OpenGL has a goofy feature that allows creating an image view of a single layer
of an array texture... in which case that image is treated as non-arrayed in
shader. If you have a 16x16x16 3D texture and bind the third layer, you get a
16x16 2D texture instead of a 16x16x1 3D texture. That distinction matters to
the hardware on AGX, since the texture dimension needs to match between the
shader and the pipe_image_view. If the shader is going to use image2D, we need
to know that the pipe_image_view should be treated as 2D (even though the
underlying resource is 3D).

"But, Alyssa, we already have first_layer and last_layer. Surely you can just
check if first_layer == last_layer?" you ask. The problem is that doesn't
distinguish a 16x16x1 3D texture (accessed as image3D in the shader) from a
16x16 slice (accessed as image2D in the shader) of a 16x16x16 3D texture. To
solve, we add a boolean flag indicating we want to create a view (with a lower
dimension than the underlying resource). This provides an unambiguous way to
communicate this case to drivers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23142>
2023-05-22 16:41:10 +00:00
Martin Roukala (né Peres)
17fd50b817 radv/ci: switch to b2c v0.9.10
This brings a fix for the steam decks which may boot too fast sometimes,
and have the network adapter not being enumerated by the time it tries
to connect to the gateway...

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23170>
2023-05-22 16:01:52 +00:00
Caio Oliveira
623bc176fb mesa/spirv: Provide more specific error message for glSpecializeShader()
Distinguish between the "entry point not found" and "parsing error"
cases in the error text.  For consistency, identify the unhandled
specialization index case as part of the verification function.

The verification function was renamed to make clearer its scope and
what module it belongs.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22976>
2023-05-22 15:26:40 +00:00
Alyssa Rosenzweig
eebb9377c4 pan/mdg: Use nir_lower_image_atomics_to_global
We were already lowering image atomics to lea_image + global atomic. It's a lot
nicer to make that lowering explicit in the NIR. This is much bigger win than in
the Bifrost compiler since here lea_image is used only for atomics, and here it
wasn't well abstracted in the compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23120>
2023-05-22 14:33:14 +00:00
Alyssa Rosenzweig
47f5cc6ba7 pan/bi: Use nir_lower_image_atomics_to_global
We were already lowering image atomics to lea_attr_tex + global atomic, might as
well make that lowering explicit in the NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23120>
2023-05-22 14:33:14 +00:00
Alyssa Rosenzweig
1ff7ec0c9e pan/bi: Fix atomic exchange on Valhall
Copypaste fail when switching to unified atomics, missed becuase I don't have
any Valhall hardware and Valhall isn't in CI. (Good news, that means it probably
didn't affect anyone in the mean time :-p)

Fixes crashes with lots of dEQP-GLES31 tests observed under drm-shim.

Fixes: e258083e07 ("pan/bi: Use unified atomics")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23120>
2023-05-22 14:33:13 +00:00
Alyssa Rosenzweig
de648020af nir: Add pass to lower image atomics
Hardware that lacks dedicated image atomics can still implement image atomics
with regular atomics on global memory, as long as there is a way to get the
address of a texel in memory. I've open-coded this lowering in my first 2
compilers, so before I add another crappy vendored version in my 3rd, let's add
a common NIR pass to do the lowering.

Thanks to unified atomics, the pass itself is fairly concise.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23120>
2023-05-22 14:33:13 +00:00
Alyssa Rosenzweig
66656822e3 nir: Add image_texel_address intrinsics
Some hardware has an instruction to load the address of a texel in a writeable
image, given the coordinates ("LEA_IMAGE"). This operation is defined only for
uncompressed images, but it is well-defined regardless of the underlying
twiddling. As such, it is not expected to be produced by APIs but is useful for
internal lowering when it is known that images will be uncompressed (e.g.
because image_store does not support compression on the hardware).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23120>
2023-05-22 14:33:13 +00:00
Alyssa Rosenzweig
c3ea2f8d20 nir: Document extra image source
I was scratching my head about this for a few minutes until I found the answer
in spirv_to_nir. Hopefully this saves someone else some head scratching in turn.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23120>
2023-05-22 14:33:13 +00:00
David Heidelberg
32b150344e docs: use meson instead invoking ninja directly
This approach is available since meson 0.47.0 which we depend on.

Reviewed-by: Sergi Blanch-Torné <sergi.blanch.torne@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23127>
2023-05-22 15:41:40 +02:00
Mike Blumenkrantz
62961b172f zink: try update fb resource refs when starting new renderpass
in the case where a draw is triggered after a flush, zink_update_descriptor_refs
will be called to set batch tracking for descriptors. this function also
handles refs for fb attachments, and everything is usually fine there

the problem with this approach is that tracking is no longer set on view
objects at renderpass begin, which makes them susceptible to early deletion
if a rp isn't started from a draw call

instead, apply batch tracking to fb attachment resources on renderpass
begin if the BATCH_CHANGED flag is set (need to rename this at some point)
in order to guarantee that the resource (object) lifetime will match the
cmdbuf runtime [since imageviews are now only freed upon batch completion]

fixes #9059

Fixes: f6bbd7875a ("zink: remove batch tracking/usage from view types"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23132>
2023-05-22 11:15:22 +00:00
Lionel Landwerlin
cab7ba00e2 anv: fix push descriptor deferred surface state packing
Yuzu is running into a segfault because it writes the push descriptor
twice with 2 different layouts, but without a draw/dispatch in
between.

First vkCmdPushDescriptorSetKHR() writes descriptor 0 & 1 with a
uniform buffer. We toggle the 2 first bits of
anv_descriptor_set::generate_surface_states.

Second vkCmdPushDescriptorSetKHR() writes descriptor 0 with uniform
buffer and descriptor 1 with an image view. The first bit of
anv_descriptor_set::generate_surface_states stays, but the second bit
was already set before and it should now be off.

When we finally flush the push descriptor, we try to generate a
surface state for descriptor 1, but there is no valid buffer view for
it, we access an invalid pointer and segfault.

This fix resets the anv_descriptor_set::generate_surface_states when
the descriptor layout changes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b49b18f0b7 ("anv: reduce BT emissions & surface state writes with push descriptors")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23156>
2023-05-22 10:50:26 +00:00
David Heidelberg
cc0cf1762d r300: workaround GCC 12+ warning, declare NULL value as unreachable
Solution recommended in the https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109716#c3

Suggested-by: Eric Engestrom <eric@engestrom.ch>

Acked-by: Filip Gawin <filip@gawin.net>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23148>
2023-05-22 12:32:42 +02:00
Iago Toral Quiroga
e401add741 broadcom/compiler: skip jumps in non-uniform if/then when block cost is small
We have an optimization for non-uniform if/else where if all channels meet the
jump condition we emit a branch to jump straight to the ELSE block. Similarly,
if at the end of the THEN block we don't have any channels that would execute
the ELSE block, we emit a branch to jump straight to the AFTER block.

This optimization has a cost though: we need to emit the condition for the
branch and a branch instruction (which also comes with a 3 delay slot), so for
very small blocks (just a couple of ALU for example) emitting the branch
instruction is typically worse. Futher, if the condition for the branch is not
met, we still pay the cost for no benefit at all.

Here is an example:

nop                           ; fmul.ifa rf26, 0x3e800000, rf54
xor.pushz -, rf52, 2          ; nop
bu.alla  32, r:unif (0x00000000 / 0.000000)
nop                           ; nop
nop                           ; nop
nop                           ; nop
xor.pushz -, rf52, 3          ; nop
nop                           ; mov.ifa rf52, 0
nop                           ; mov.pushz -, rf52
nop                           ; mov.ifa rf26, 0x3f800000

The bu instruction here is setup to jump over the following 4 instructions
(the last 4 instructions in there). To do this, we pay the price of the xor
to generate the condition, the bu instruction, and the 3 delay slots right
after it, so we end up paying 6 instructions to skip over 4 which we pay
always, even if the branch is not taken and we still have to execute those
4 instructions. With this change, we produce:

nop                           ; fmul.ifa rf56, 0x3e800000, rf28
xor.pushz -, rf9, 3           ; nop
nop                           ; mov.ifa rf9, 0
nop                           ; mov.pushz -, rf9
nop                           ; mov.ifa rf56, 0x3f800000

Now we don't try to skip the small block, ever. At worse, if all channels
would have met the branch condition, we only pay the cost of the 4
instructions instead of 6, at best, if any channel wouldn't take the
branch, we save ourselves 5 cycles for the branch condition, the branch
instruction and its 3 delay slots.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23161>
2023-05-22 09:23:41 +00:00
Yiwei Zhang
4c8be22c66 radv: fix radv_emit_userdata_vertex for vertex offset -1
-1 is a legit vertex offset upon vkCmdDrawIndexed and other cmds. This
change fixes to track last_vertex_offset with an additional valid bit.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23157>
2023-05-22 08:31:28 +00:00
Samuel Pitoiset
7cb4494039 radv: enable smoothLines
For Zink.

This marks one piglit test as expected failure because polygon
smoothing can't be implemented properly in Vulkan.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
85cbdba355 radv: add support for smooth lines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
8c5eaf2166 radv: lower nir_intrinsic_load_poly_line_smooth_enabled_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
9b2e59abc5 radv: declare a new user SGPR for the dynamic line rasterization mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
fcfdb1bb6c radv: determine if smooth lines can be used in the pipeline key
Really complicated to reduce the scope because everything can be
dynamic and with GPL you can't even know if the pipeline draws lines
when compiling the fragment shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
9612603aac radv: track if the smoothLines features is enabled in the device
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
3626c23e85 nir: lower smooth lines conditionally using the new intrinsic
RADV will enable/disable this based on a dynamic state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:34 +00:00
Samuel Pitoiset
759a57d902 radeonsi: lower nir_intrinsic_load_poly_line_smooth_enabled_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:34 +00:00
Samuel Pitoiset
f023ab01e9 nir: add nir_intrinsic_load_poly_line_smooth_enabled
To lower smooth lines conditionally in fragment shaders for RADV
because the line rasterization mode in Vulkan can be dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587>
2023-05-22 07:58:34 +00:00
Samuel Pitoiset
15bb9c4b96 radv: remove useless check about USAGE_STORAGE for TC-compat HTILE
This should never happen.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23122>
2023-05-22 07:37:15 +00:00
Samuel Pitoiset
dda7400c0b radv: disable IMAGE_USAGE_STORAGE with depth-only and stencil-only formats
This shouldn't have been enabled at all. Depth-stencil formats were
accidentally disabled but not depth-only or stencil-only formats.

This doesn't seem allowed by DX12 and both AMD/NVIDIA don't enable it.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23122>
2023-05-22 07:37:15 +00:00
Samuel Pitoiset
3adc9b6722 radv: bump the global VRS image size to maximum supported FB dimensions
Super sampling on a 4K screen could hit this. 16k seems pretty big
but this image is only created on RDNA2 and on-demand if VRS attachments
are used without depth-stencil attachments, which should be rare
enough to care.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23105>
2023-05-22 06:53:03 +00:00
Timothy Arceri
5be8acc1b5 util: add Pixel Game Maker MV workaround
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8918
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23095>
2023-05-22 00:45:45 +00:00
David Heidelberg
8e53b293f8 ci/v3dv: add often timeouting ssbo.layout.3_level_array.std140.column_major_mat4
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23153>
2023-05-21 01:37:23 +02:00
David Heidelberg
4a49892ba3 ci/radv: add another raven flake dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.linear_interpolation
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23152>
2023-05-21 00:51:03 +02:00
Timur Kristóf
b78cf192f0 radv: Clear query dirty flags when flushing them.
This is just to make their code consistent with other similar
functions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
59c2711800 radv: Move empty dynamic states check to caller.
Improves the CPU overhead of radv_emit_all_graphics_states.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
0d14f7a304 radv: Move indirect check from index buffer emission to caller.
This improves the CPU overhead of radv_emit_all_graphics_states.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
8436fe5af4 radv: Slight refactor to late_scissor_emission.
There is no need to set context_roll_without_scissor_emitted
when pipeline, rbplus state, or binning state changes,
because radv_need_late_scissor_emission already checks
their dirty flags.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
2249ab1daa radv: Set last_index_type in radv_before_draw.
This function is always inlined so checking info->indexed can be
constant folded by the compiler. So it is better to set this
in before_draw.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
e5c3479fae radv: Move ignore forced VRS code to more optimal place.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
4255bd63a4 radv: Compute tess info when emitting patch control points.
Some tess info needs to be calculated in the command buffer when
dynamic patch control points are enabled.

Move this calculation from radv_emit_all_graphics states to where
it actually matters.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Timur Kristóf
94465f3073 radv: Emit primitive reset index with primitive restart enable.
The VGT_MULTI_PRIM_IB_RESET_INDX register has no effect when
primitive restart is disabled, so we can move this out of the
hot path.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659>
2023-05-20 19:33:20 +00:00
Alyssa Rosenzweig
04bd1f2cda asahi: Drop Asahi-as-a-swrast hack
Now that we've dropped macOS support in the driver, this is all dead code and
gets garbage collected.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23138>
2023-05-20 16:59:16 +00:00
Alyssa Rosenzweig
c284a200b9 gallium: Drop Asahi-as-a-swrast hack
Now that we've dropped macOS support, these paths are deadcode.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23138>
2023-05-20 16:59:16 +00:00
David Heidelberg
a0b1aa6f00 docs: update crosvm networking options
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22892>
2023-05-20 10:33:48 +02:00
David Heidelberg
27c775d2f7 ci/crosvm: update cmdline options
```
[WARN  crosvm::crosvm::cmdline] `--host-ip`, `--netmask`, and `--mac` are deprecated;
```

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22892>
2023-05-20 10:33:43 +02:00
Kenneth Graunke
462ef200d8 nir: Assert that we don't shrink bit-sizes in nir_lower_bit_size()
The idea of this pass is to promote small bit-sizes to larger, supported
bit-sizes for certain operations.  It doesn't handle emulating large
bit-size operations on smaller bit-sizes; passes like nir_lower_int64
and nir_lower_doubles handle that.

So, assert that we aren't shrinking the bit-size, as this will almost
certainly produce incorrect results.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23123>
2023-05-19 22:44:37 +00:00
Kenneth Graunke
a2d384a5c0 intel/compiler: Fix 64-bit ufind_msb, find_lsb, and bit_count
We only support 32-bit versions of ufind_msb, find_lsb, and bit_count,
so we need to lower them via nir_lower_int64.

Previously, we were failing to do so on platforms older than Icelake
and let those operations fall through to nir_lower_bit_size, which
used a callback to determine it should lower them for bit_size != 32.
However, that pass only emulates small bit-size operations by promoting
them to supported, larger bit-sizes (i.e. 16-bit using 32-bit).  It
doesn't support emulating larger operations (i.e. 64-bit using 32-bit).

So nir_lower_bit_size would just u2u32 the 64-bit source, causing us to
flat ignore half of the bits.

Commit 78a195f252 (intel/compiler: Postpone most int64 lowering to
brw_postprocess_nir) provoked this bug on Icelake and later as well,
by moving the nir_lower_int64 handling for ufind_msb until late in
compilation, allowing it to reach nir_lower_bit_size which broke it.

To fix this, we always set int64 lowering for these opcodes, and also
correct the nir_lower_bit_size callback to ignore 64-bit operations.

Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23123>
2023-05-19 22:44:37 +00:00
Kenneth Graunke
9293d8e64b nir: Add find_lsb lowering to nir_lower_int64.
Some GPUs can only handle 32-bit find_lsb.

Cc: mesa-stable
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23123>
2023-05-19 22:44:37 +00:00
Jesse Natalie
25c7181f1b microsoft/compiler: Better and simpler bitcast reduction
Using nir_gather_ssa_types works much better. There's 2 differences
compared to what I was doing before:
1. Multiple passes to allow data to propagate forward and backward
   through the whole shader.
2. Allowing a value to have indeterminate types due to having both
   int and float usages.

So this deletes some code and gets better results. Wish I'd known
this existed last week.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23062>
2023-05-19 22:19:38 +00:00
José Roberto de Souza
50c8836bf0 iris: Fix return of xe_batch_submit() when exec fails
When intel_ioctl(DRM_IOCTL_XE_EXEC) fails it returns -1 sets errno
with the fail reason.
This fail reason is than is used to know if engine was banned in
context_or_engine_was_banned().

Not adding a fixes tag because Xe is not enabled by default.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23139>
2023-05-19 21:58:46 +00:00
José Roberto de Souza
fd99b671ff anv: Nuke ANV_BO_ALLOC_WRITE_COMBINE
In i915 if the device has local memory it can only mmap bo with
I915_MMAP_OFFSET_FIXED, so all this set of ANV_BO_ALLOC_WRITE_COMBINE
were useless.

In Xe KMD there is no way to change mmap mode for all GPUs types.

So we can nuke bo->map_wc, ANV_BO_ALLOC_WRITE_COMBINE and related
dead code.

No changes in behavior expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22483>
2023-05-19 21:34:35 +00:00
José Roberto de Souza
a6c5746b37 anv: Fix ANV_BO_ALLOC_NO_LOCAL_MEM flag
VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT is also set in all memory types of
integrated GPUs.
This flag means that memory will be allocated in the most efficient
place for the GPU to access, which is true in integrated GPUs.

However, this was causing ANV_BO_ALLOC_WRITE_COMBINE to be set in
integrated GPUs in the block right below when allocating in the non-cached memory type.
But the comment only talks about lmem, so to still keep the write
combine behavior for iGPUs it was used VkMemoryPropertyFlags in mmap_calc_flags().

Additionally, this was causing anv_bo.has_implicit_ccs to always be
set, which could change the expected behavior of
anv_BindImageMemory2() in MTL.

Fixes: fbd32a04da ("anv: add a third memory type for LLC configuration") added a new heap
Fixes: 582bf4d9f7 ("anv: flag BO for write combine when CPU visible and potentially in lmem")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22483>
2023-05-19 21:34:35 +00:00
Guilherme Gallo
a148e91edb ci/lava: Renable SSH sessions for panfrost jobs
The devices' IP dictionary for sun50i and vim3 are fixed now.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23137>
2023-05-19 20:48:04 +00:00
Konrad Dybcio
22fb6e3906 freedreno: Add some A6/7xx registers
Can be found in recent downstream kernels.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22901>
2023-05-19 20:05:05 +00:00
Lionel Landwerlin
8a1a49aae4 anv: assume context isolation support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7265
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23102>
2023-05-19 18:43:01 +00:00
Lionel Landwerlin
eb2b309328 anv: defer binding table block allocation to when necessary
There are cases where we never need a binding table block, for example
compute only command buffers.

This has also the nice effect of not having
dEQP-VK.api.object_management.* tests allocate 1Gb of binding tables
which are staying around forever after you run those tests.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8806
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23079>
2023-05-19 18:11:10 +00:00
norablackcat
29d324cc75 rusticl/types: fix clippy new() not returning Self
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23129>
2023-05-19 17:33:15 +00:00
norablackcat
3d73bd48c0 rusticl/program: fix clippy cast to the same type
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23129>
2023-05-19 17:33:15 +00:00
Alyssa Rosenzweig
2588aa8912 CODEOWNERS: Update panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23109>
2023-05-19 17:31:31 +00:00
Alyssa Rosenzweig
a15604e129 pan/decode: Use common hexdump
Deduplicate the one I took from asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23088>
2023-05-19 16:30:44 +00:00
Alyssa Rosenzweig
e5867b0dca asahi: Use common hexdump utility
We just moved it into common.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23088>
2023-05-19 16:30:44 +00:00
Alyssa Rosenzweig
016a04fcba util: Add common hex dump utility
Useful for debugging.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23088>
2023-05-19 16:30:44 +00:00
Guilherme Gallo
2f0677dd52 dzn: Skip a few deqp tests which are prone to timeout
Some dozen-deqp tests have timed out in a different pipeline. You can
find more information at
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/42064254.

It appears that the execution of gstreamer on the same Windows runners
simultaneously is causing those particular tests to exceed their
allotted time and fail.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
ebdf8a95b7 ci/lava: Force LAVA panfrost jobs to use UART
To ensure proper SSH functioning, the device IP should be added to the
LAVA device dictionary by setting device_ip. LAVA will then map the
value to lava-target-ip.

meson-g12b-a311d-khadas-vim3-cbg-4 has an IP in the dictionary, while
sun50i-h6-pine-h64-cbg-1 and meson-g12b-a311d-khadas-vim3-cbg-2 do not.

Since some devices are not yet properly configured, and device tag
fixing is not an option here, let's temporarily switch to a job
definition based on UART, until it gets fixed.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
80290bcddd ci/lava: Raise the post test metadata gathering retry count
In some devices, it takes a few dozens of seconds to LAVA post process
the job and give final metadata related to the job.
It is worth to wait a little more (up to 30 sec) to make structured log
data more accurate.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
3f5c9077c5 ci/lava: Tweak http-download timeout in SSH based jobs
Found a problem with a radv-raven job [1], which took too long to boot
due to a possibly network problem.
If we set a reasonable timeout in the file download related action and
enable LAVA retries in deploy action, we can retry the job if it times
out without the need of re-queuing it.

[1] https://gitlab.freedesktop.org/gallo/mesa/-/jobs/41942090#L227

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
4173e4b18f ci/lava: Hide JWT block during YAML dump
Make hide_sensitive_data work in a block fashion, not only hiding the
JWT line, since these tokens are huge, it may break the line when it
extrapolates the YAML dump width.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
703635f059 ci/lava: Only check for the first section marker
Some LAVA signals have similar log outputs and the regex associated with
the log section may conflict. Use the policy of the first regex as the
chosen one, otherwise one line may produce two Gitlab sections in a row.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
2cee21ffa5 ci/lava: Distinguish test suites in DUT vs Docker
Test suite in the dut is just running SSH server and waiting for the
docker container to start the SSH session. So it can take all the test
cases accumulated duration, not just the init-stage1.sh part anymore.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
8626a52637 ci/lava: Add bridge function for job definition
To use the supported job definition depending on some Mesa CI job
characteristics.

The strategy here, is to use LAVA with a containerized SSH session to
follow the job output, escaping from dumping data to the UART, which
proves to be error prone in some devices.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
02d07f3380 ci/lava: Add SSH job definition
Create a separate job definition that runs the job via SSH session.
The DUT test only sets up the SSH server via dropbear, and another
deployed docker runner in LAVA dispatcher access the DUT via SSH with
pseudo-terminal to propagate the logs in real time.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
eabd22e7ab ci/lava: Add SSH support in rootfs
We need SSH servers running inside the DUTs to establish a new channel
of communication between LAVA dispatcher and the DUT, to be able to
workaround UART hanging issue that are occurring in some chromeos
devices.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
25e84016d6 ci: Use absolute paths in init-stage2.sh
Add absolute path for:
- zramctl, maybe `/sbin/` is not in the PATH
- intel-gpu-freq.sh, as this script CWD may be run outside `/`

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
6bb7add829 ci/lava: Fix last section in job submitter
It only happens after the LogFollower cleanup (__exit__ method)

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:17 +00:00
Guilherme Gallo
3d4ceb2aee ci/lava: Bypass arg list to print_log function
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870>
2023-05-19 14:45:16 +00:00
Erik Faye-Lund
1fc40c081e mesa/program_cache: remove unused shader-cache functions
These are no longer in use, so let's get rid of them.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
a0683e243a mesa/main: compile ff_fragment_shader as c-code
The reason this used to be C++ code, was because it needed ir_builder.
We no longer need that, so let's move this to C-code instead. This makes
some details a bit more straight-forward.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
e607a89f22 mesa/main: ff-fragshader to nir
There's little point in emitting GLSL IR for the fixed-function fragment
shaders, when we can emit NIR directly instead.

This simplifies things a bit, and makes the fixed-function vertex and
fragment shaders look a lot more alike.

The reason the old code did the splats, was that TEXENV_SRC_ZERO and
TEXENV_SRC_ONE returned scalars. I decided to keep it vector, and let
the nir optimization passes clean this up instead when needed, as that
keeps the code a bit more straight forward.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
a37051304a compiler/nir: move find_state_var to common code
We're about to need this in another place, so let's move it to common
nir code, and clean up the name a bit.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
5e997beeb7 mesa/st: allow using nir for ff-fragment shaders
This is similar to what we do for ff-vertex shaders.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
793840937f mesa/st: refactor st_translate_fragment_program
This makes it look more like st_translate_vertex_program, which is doing
the same thing for vertex-shaders.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
30d9be1f9f mesa/main: clean up white-space in ff_fragment_shader.cpp
We're about to change this, so let's clean this up first!

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22755>
2023-05-19 13:51:19 +00:00
Erik Faye-Lund
185001a86f meson: remove needless c++17-overrides
C++17 is the project-wide default since f9057cea51 ("fix(FTBFS):
meson: raise C++ standard to C++17"), so let's drop these local
overrides.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23048>
2023-05-19 12:45:31 +00:00
Frank Binns
886ad3b4ec pvr: fix array overflow in pvr_device_tile_buffer_ensure_cap()
The function didn't properly handle the case where the requested capacity was
less than the existing capacity. This led to the loop limit being some huge
number and it writing past the end of the 'buffers' array.

Partially fixes:
  dEQP-VK.renderpass.suballocation.multisample_resolve.r16g16b16a16_unorm
    .max_attachments_8_samples_2

The test no longer hangs, but segfaults instead.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23104>
2023-05-19 10:44:27 +00:00
Samuel Pitoiset
b83ce03a7d radv: reserve cmdbuf space in radv_flush_gfx2ace_semaphore()
Fixes an assertion with test_amplification_shader in vkd3d-proton.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23057>
2023-05-19 07:52:25 +00:00
Samuel Pitoiset
a1b88c0664 ci: rework vkd3d-proton runner and fix detecting failures
The script returned 0 (aka succcess) for assertions or segmentation
faults. Found this after introducing a regression that caused a
segfault in vkd3d with vk-cts-image but not with Mesa CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23057>
2023-05-19 07:52:25 +00:00
Samuel Pitoiset
5a2a042ec7 ci: stop using the hang-detection tool for vkd3d-proton
It's no longer used for deqp-runner as well, and it's not really
useful for us because we can detect GPU hangs differently. It also
prevents returning the error code from vkd3d-proton.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23057>
2023-05-19 07:52:25 +00:00
Samuel Pitoiset
bec100f9b5 ci,radv: use drm-shim instead of the null winsys for radv-fossils
Only RADV uses fossilize-runner.sh, so hardcoding LD_PRELOAD is fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>
2023-05-19 06:59:31 +00:00
Samuel Pitoiset
66a33888f0 ci: build drm-shim in debian-testing
This will be needed by RADV for using AMDGPU drm-shim.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>
2023-05-19 06:59:31 +00:00
Samuel Pitoiset
9f9feda85f amd/drm-shim: update README about which file to modify
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>
2023-05-19 06:59:30 +00:00
Samuel Pitoiset
400434e5ea amd/drm-shim: add bonaire
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>
2023-05-19 06:59:30 +00:00
Samuel Pitoiset
9234558a60 amd/drm-shim: add pitcairn
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>
2023-05-19 06:59:30 +00:00
Samuel Pitoiset
714ae97669 amd/drm-shim: add navi21
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23072>
2023-05-19 06:59:30 +00:00
Hyunjun Ko
e5536173dc anv/ci: Add tests for video formats to the failing tests.
This should be removed once the issue is resolved.
(https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/4280)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
60f871dc9e anv: enable the video h265 decode extension.
Currently tested on CometLake(gen9) and AlderLake(gen12)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
a64ae20d0f anv: support HEVC 10-bit decoding
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
ad02e21ad2 anv/image: get width/height for each plane of a surface for video decoding.
This is especially for p010 format, which isn't supported for YCbCr
conversion yet.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
50374b1f9a anv: support P010 format for video 10-bit hevc decoding
Only for video 10-bit hevc decoding, so shouldn't enable such as YCbCr
conversion.

v1. Fix to avoid YCbCr CTS tests for this format.
( Lionel Landwerlin <lionel.g.landwerlin@intel.com> )

v2. Add a flag can_video so we could handle supported video formats
neatly.
( Lionel Landwerlin <lionel.g.landwerlin@intel.com> )

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
8d519eb5f5 anv: add initial video decode support for h265
Tested on CometLake(gen9) and AlderLake(gen12)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:02 +00:00
Hyunjun Ko
91235092ab anv/image: allow VK_IMAGE_CREATE_ALIAS_BIT with a private binding.
when the image is for video decoding.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
23c338af5d anv/image: allocate mv storage buffers for h265
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
b4b31828e0 anv/image: Add a surface usage bit for video decoding
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
b08614b96b vulkan/video: add h265 reference structures and relevant util functions.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
efdcacb230 vulkan/video: add to parse h265 slice.
Vulkan spec doesn't provide any interface for slice decoding while some
devices may require them. So we need to keep this inside.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
c78c5466e4 util/vl: initialize data/end pointers.
Since this util moved to public place it turned out it could cause
a build error on current CI like the following:

../src/util/vl_vlc.h:225:52: error: 'vlc.data' may be used uninitialized in this function [-Werror=maybe-uninitialized]
  225 |    assert(vl_vlc_valid_bits(vlc) >= num_bits || vlc->data >= vlc->end);
      |                                                    ^~
../src/util/vl_vlc.h:225:65: error: 'vlc.end' may be used uninitialized in this function [-Werror=maybe-uninitialized]
  225 |    assert(vl_vlc_valid_bits(vlc) >= num_bits || vlc->data >= vlc->end);
      |                                                                 ^~

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
d5f8265e05 intel/genxml: add a command VD_CONTROL_STATE to gen12/125
It's essentially needed to execute hevc decoding on gen12.

Note that we set HCP by default.
 - Command OpCode : VDENC(1), HCP(7), AVP(3)
 - SubOpcode      : HCP(10), VDENC(11)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
27dcd18210 intel/genxml: align some fields on gen9/11/12/125 with media driver.
Most of them are length of each instruction and the rest are
some corrections on specific gens.

v1. Added a default value to DWordLength of each instruction.
( Lionel Landwerlin <lionel.g.landwerlin@intel.com> )

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
b3a1a8c617 intel/genxml: conform some fields to each other gen.
There are same fields across gens but the existing xmls are not exactly same,
which needs to be fixed.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Hyunjun Ko
44bc651aba intel/genxml: fix num bits of some MOCS fields
Actually the first bit is a bit of protected mask (or reserved)
and the next 6 bits are for MOCS but they are being handled together
currently in isl_device_setup_mocs. So we need to fix some MOCS fields
defined as 6 bits to 7 bits.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
2023-05-19 06:15:01 +00:00
Marek Olšák
1a24f43d97 amd/registers: update pitch definitions in descriptors
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:49 +00:00
Marek Olšák
dbc1febb33 ac/surface: add ac_surf_config::is_array
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
78088ebaea ac/surface: fix overridden linear pitch for CPU access
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
3f5723a23f ac/surface: validate overridden pitch for all chips
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
f449ff426f ac/surface: define LINEAR_PITCH_ALIGNMENT
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
4705148c5e ac/surface: clean up and move the PIPE_CONFIG helper to ac_surface.c
This will be used by following commits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
ad0c490e38 radeonsi: fix image size calculation in fast clear
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
2f51ba5496 radeonsi: fix sparse image address calculation for large images by using uint64_t
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
df39962dc8 radeonsi: fix image address calculation for large images by using uint64_t
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
6d69aa38c1 radeonsi: fix SDMA image address calculation for large images by using uint64_t
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
4d9942d891 radv: fix SDMA image address calculation for large images by using uint64_t
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
c627bdc9b6 radv: fix sparse image address calculation for large images by using uint64_t
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Marek Olšák
cbc6bf8218 ac/surface: fix address calculation for large images by using uint64_t
also rename gfx9_surf_level -> gfx9_surf_meta_level

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23037>
2023-05-19 02:58:48 +00:00
Qiang Yu
ce161ce463 radeonsi: fix uses_instanceid for merged mono shader stage
prev_shader.info.uses_instanceid is set by si_nir_lower_vs_inputs()
when attribute divisor is used.

Fixes: 894d92995c ("radeonsi: monolithic VS emit prolog in nir directly")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9042
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23101>
2023-05-19 02:07:08 +00:00
norablackcat
b5ae645c16 rusticl/device: add cl_khr_integer_dot_product ext
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23011>
2023-05-18 23:59:53 +00:00
norablackcat
9c1051d7cf rusticl/kernel: remove nir_lower_pack pass
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23011>
2023-05-18 23:59:53 +00:00
norablackcat
75555d0660 rusticl/clc add integer_dot_prod feature macros
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23011>
2023-05-18 23:59:53 +00:00
norablackcat
40f1f25f56 rusticl/api: add integer_dot_product api
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23011>
2023-05-18 23:59:53 +00:00
norablackcat
8ca0a41f18 rusticl/types add ::new for cl_dev_idp_accel_props
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23011>
2023-05-18 23:59:53 +00:00
Rohan Garg
2e8b1f6d1c anv: drop duplicate checks when setting the compressed bit
We need compression tracking for full resolves and at the moment only
CCS_E has full resolves.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22737>
2023-05-18 23:20:49 +00:00
Georg Lehmann
a7cef01db1 aco/optimizer: allow DPP to use VOP3 on GFX11
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
476149f90d aco: use can_use_input_modifiers helper
Foz-DB GFX1100:
Totals from 80 (0.06% of 132657) affected shaders:
CodeSize: 504500 -> 503660 (-0.17%)
Instrs: 95033 -> 94824 (-0.22%)
Latency: 629695 -> 629235 (-0.07%)
InvThroughput: 97105 -> 97008 (-0.10%)
VClause: 1779 -> 1777 (-0.11%)
Copies: 3233 -> 3236 (+0.09%); split: -0.03%, +0.12%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
644c5e95a0 aco: use get_operand_size for dpp opt
This matters now that v_fma_mixlo_f16/v_fma_mixhi_f16 can use dpp.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
0ffc9bccfa aco: add helper function for can_use_input_modifiers
Some instructions have restrictions that can't be expressed with the bitfield.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
b4ff7e2567 aco/ra: use fmac with DPP/opsel on GFX11
Foz-DB GFX1100:
Totals from 2 (0.00% of 132657) affected shaders:
CodeSize: 8764 -> 8732 (-0.37%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
5b2b782940 aco/ra: use smaller operand stride for VOP3P with DPP
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
a3d6335742 aco: add withoutVOP3 helper
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:24 +00:00
Georg Lehmann
12b28d64ab aco/gfx11: use fmamk/fmaak with opsel
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:23 +00:00
Georg Lehmann
6a53af3fc8 aco: introduce helper to swap valu operands with modifiers
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23059>
2023-05-18 22:57:23 +00:00
Lionel Landwerlin
28e2031e3a gitlab-ci: add capture for i915 error state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23099>
2023-05-18 19:15:19 +00:00
David Heidelberg
978bb7b9d1 ci/venus: add missing flakes
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
9a58f21c7a ci/gtest-runner: fix results reporting
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
ae9c67d773 ci/amd: add radeonsi-raven-va-full job to cover all VA-API tests
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
0136c059db ci/amd: update VA-API expectations
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
0323f73656 ci/gtest: improve the runner script
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
73741631cf ci: update libva to 2.18.1
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
51e7b2605c ci/rules: radeonsi VAAPI rules should include also VA-API targets
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
David Heidelberg
c518178458 ci/amd: re-enable VA-API testing
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22888>
2023-05-18 18:32:06 +00:00
Alyssa Rosenzweig
63c723bfcd nir: Fix incorrect comment
We have 1-bit bools these days.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23107>
2023-05-18 16:19:20 +00:00
Alyssa Rosenzweig
40a056db51 nir: Remove stale TODOs
If nobody has added def-use lists for registers in all this time, it's probably
because we don't want them after all ;)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23107>
2023-05-18 16:19:20 +00:00
Matt Coster
c05dd04898 pvr: Return VkResult from winsys buffer_map operation
This allows VK_ERROR_MEMORY_MAP_FAILED to propagate correctly.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
a986aea7f7 pvr: Assorted cleanup
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
4643319f43 pvr: Use common physical device enumeration
The PowerVR IP does not contain display hardware - this means it is
always necessary to open two separate devices for render and display.
The try_create_for_drm callback is not suitable for this configuration,
so we use the enumerate callback instead.

The previous implementation did not check that the discovered display
device was compatible with the render device - this is corrected by
unifying the compatibility lists into pvr_drm_configs.

The pvr driver is not currently supported on systems which contain
multiple compatible render or display devices, so the enumerate callback
implementation returns the first discovered render device and its
compatible display device.

This change also removes the workaround for drmGetDevices2() required
after libdrm commit 8cb12a2528d795c45bba5f03b3486b4040fb0f45. The
upstream fix has been in releases of libdrm for over a year now, and
mesa requires reasonably a recent version which is new enough to
contain it.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
31e98d3783 pvr: Rename primary_{device,fd,path} to display_*
This makes it explicit that primary_fd is NOT just a handle to the
primary node on render_fd - rather it's a handle to the primary node
on a separate display device.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
157499bd05 pvr: Drop pdevice from pvr_physical_device_get_supported_extensions()
This parameter doesn't make a lot of sense - it's currently unused, but
it can never be valid anyway since the return of this function is used
in the early initialization of pvr_physical_device.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
9edac86572 pvr: Squeeze fd handling into winsys layer
This sets us up to make use of the common physical device initialization
code.

As well as lifting the fd handles out of the implementations, this
pushes creation and destruction of the fds into the winsys layer. In
order for this to make sense, the winsys object is now created *before*
each pvr_device or pvr_physical_device. If there's an error setting up
the winsys instance, there's no point in continuing to create either
one.

Also lifts alloc to the winsys layer since there's nothing special about
it in either implementation.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
7cb945b777 pvr: Fix incorrect error handling in pvr_render_ctx_switch_init()
Partially fixes: dEQP-VK.api.device_init
  .create_instance_device_intentional_alloc_fail.basic

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
0ae96a95ff pvr: Fix incorrect error return in pvr_ctx_sr_programs_setup()
Partially fixes: dEQP-VK.api.device_init
  .create_instance_device_intentional_alloc_fail.basic

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
c0b4359113 pvr: Propagate errors as VkResults from ioctls through winsys
Partially fixes: dEQP-VK.api.device_init
  .create_instance_device_intentional_alloc_fail.basic

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Matt Coster
438433e131 pvr: Return VkResult from pvr_winsys_create()
Previously this function simply returned NULL on any error, which
caused OOM errors to be suppressed as initialization failures.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23023>
2023-05-18 15:56:59 +00:00
Timur Kristóf
b6f623d387 radv: Use const keyword more.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23053>
2023-05-18 14:30:45 +00:00
Timur Kristóf
51d3e08bf9 ac: Use const keyword for some function arguments.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23053>
2023-05-18 14:30:45 +00:00
Rohan Garg
6b8fe32322 intel: infer scalar'ness locally for brw_vectorize_lower_mem_access
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
2023-05-18 15:46:06 +02:00
Rohan Garg
3a8f5c2783 intel: update comments about non-existent function parameter
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
2023-05-18 15:46:06 +02:00
Rohan Garg
a15cc833f9 intel: drop unused is_scalar function parameter in brw_nir_apply_key
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
2023-05-18 15:46:06 +02:00
Rohan Garg
212810ac8a intel: infer scalar'ness locally for brw_postprocess_nir
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
2023-05-18 15:46:06 +02:00
Oskar Rundgren
b214cf11b9 pvr: Fix transfer image clearing PBE packmodes
The PBE input format must match format in clear color registers.
Fixes image clearing for following formats:
  - B4G4R4A4_UNORM_PACK16
  - A8B8G8R8_UNORM_PACK32
  - R5G6B5_UNORM_PACK16
  - A1R5G5B5_UNORM_PACK16
  - R8G8B8A8_SNORM
  - R8G8_UNORM
  - R8G8_SNORM
  - R8_UNORM
  - R8_SNORM
  - A2B10G10R10_UINT_PACK32 - only packmode U32 supported

For some of the norm formats the clear color register format was
changed from integer (pvr_float_to_sfixed) to float (pvr_float_to_f16).
This change was done to match the default PBE emit Norm settings.
An alternative way to fix this would have been to change the PBE
Norm setting.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23082>
2023-05-18 12:25:07 +00:00
Karmjit Mahil
c0d6ce4a4b pvr: Use idalloc as the allocator for sync prims
Previously we allocated the sync prim at the end of the block and
also freed from the end. This is problematic if things are freed
out of order and some new ones allocated within the frees.

This commits uses the idalloc to keep track of the sync prim block
allocations.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23076>
2023-05-18 12:07:22 +00:00
Karmjit Mahil
fb85417433 pvr: Move pvrsrv sync prim code into new pvr_srv_sync_prim.{c,h}
Some setup for later on when we'll start keeping track of sync
prim allocation with a proper allocator.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23076>
2023-05-18 12:07:22 +00:00
Karmjit Mahil
d1e61d563d pvr: Add pvrsrvkm sync prim set bridge call
To reuse a sync prim we'll need to set it to 0 so adding the
bridge call for that.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23076>
2023-05-18 12:07:22 +00:00
Matt Coster
9938865705 pvr: Simplify descriptor set layout dump separators
There's no need for macros here, and they make clang-format unhappy.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23028>
2023-05-18 11:49:58 +00:00
Matt Coster
b793afc0ce pvr: Add PVR_DEBUG=vk_desc option to dump descriptor set layouts
Prints on every call to vkCreate{DescriptorSet,Pipeline}Layout().

Previously, this could not be turned on or off at runtime, and was
dependent on DEBUG.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23028>
2023-05-18 11:49:58 +00:00
Matt Coster
c5195a67b8 pvr: Remove bad assert in pvr_clear_attachments()
Fixes: dEQP-VK.renderpass.suballocation.formats.d16_unorm.input
  .dont_care.dont_care.clear
Fixes: dEQP-VK.renderpass.suballocation.formats.d32_sfloat.input
  .dont_care.dont_care.clear

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23024>
2023-05-18 11:31:40 +00:00
Matt Coster
ae64b47113 pvr: Return correct pbe_accum_format size for A2B10G10R10_UINT_PACK32
Fixes: dEQP-VK.renderpass.suballocation.formats.a2b10g10r10_uint_pack32
  .input.dont_care.dont_care.clear

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23024>
2023-05-18 11:31:40 +00:00
Matt Coster
741f51552f pvr: Set output_offset correctly in pvr_clear_color_attachment_static()
Fixes: dEQP-VK.renderpass.suballocation.formats.r16g16_sint.input
  .dont_care.dont_care.clear

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23024>
2023-05-18 11:31:39 +00:00
Kenneth Graunke
78a195f252 intel/compiler: Postpone most int64 lowering to brw_postprocess_nir
Float conversions continue to be lowered early at the same time as
nir_lower_doubles, which we run early so we don't have to run it for
every shader key variant.  However, all other int64 lowering is now
done late, after nir_opt_load_store_vectorize(), allowing it to
comprehend basic arithmetic on 64-bit addresses.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23064>
2023-05-18 10:48:50 +00:00
Kenneth Graunke
d764c03d5d nir: Add a variant of nir_lower_int64 for float conversions only
We'd like to postpone most int64 lowering until pretty late in the
process, because e.g. turning iadd@64 into (unpack + add-low + add-high
+ compare + b2i32 + repack) sequences makes it difficult for many
optimization passes to detect basic arithmetic patterns.  In particular,
nir_opt_load_store_vectorizer becomes unable to handle basic offset math
on 64-bit addresses.

We'd like to do double precision lowering earlier in the process,
however.  One snag is that nir_lower_int64's lower_2f and lower_f2 can
produce operations that may need lowering by nir_lower_doubles(), so
it's crucial to run those sets of lowering together.

To handle this, we make a new entrypoint that does nir_lower_int64
but skips everything except float conversions.  Note that the newly
produced instructions will still be lowered according to the full set
of int64 lowering options; this shouldn't be a huge deal.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23064>
2023-05-18 10:48:50 +00:00
Karmjit Mahil
0960ac2a24 pvr: Use the suballocator for queries
Fixes:
  dEQP-VK.api.object_management.max_concurrent.query_pool

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23071>
2023-05-18 10:26:14 +00:00
Karmjit Mahil
2dcbeb234e pvr: Fix vk_free() in vkCreateRenderPass2() error path
There was a missing vk_free() and one at the wrong place.

Fixes:
  dEQP-VK.api.object_management.alloc_callback_fail.render_pass

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23070>
2023-05-18 10:05:26 +00:00
Karmjit Mahil
792cf1caff pvr: Fix possible allocation of 0 size
Some tests had `input_count == 0` so the driver would attempt to
`vk_alloc()` a size of zero and error out. Add some checks to
prevent that.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23070>
2023-05-18 10:05:26 +00:00
Karmjit Mahil
5f60444b13 pvr: Fix missing invalidation of the command buffer
If the command buffer already had an error while recording, on
vkEndCommandBuffer() the command buffer wasn't being transitioned
to the invalid state.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23069>
2023-05-18 09:41:58 +00:00
Karmjit Mahil
7c382f4f6f pvr: Remove custom status in command buffer
Some code still used our custom `status` field within the command
buffer. This could lead to unreliable error handling since we're
using the common vk_command_buffer handling.

This commit removes the field and changes the error paths to use
the common code instead.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23069>
2023-05-18 09:41:58 +00:00
Samuel Pitoiset
9ba41ed70a radv: fix a sync issue with primitives generated query and NGG/legacy
On RDNA1&2, the driver needs to support both NGG and legacy for
primitives generated query because we can't know that before starting
queries.

To get the query pool results, we check the availability bit wrote by
the SAMPLE_STREAMOUTSTATS packet but the GDS copy was emitted after,
which means the availability bit might be TRUE before the GDS copy is
actually done.

Fix this by emitting the GDS copy before to ensure the availability is
TRUE for both results.

This fixes recent updates in
dEQP-VK.transform_feedback.primitives_generated_query.* because the
tests no longer wait for the fence.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23080>
2023-05-18 08:56:40 +00:00
Marek Olšák
177af45577 nir/lower_io: don't renumber VS inputs when not called from a linker
This fixes a Nine regression. The comment explains it.

The new varying linking code will set true here.

Fixes: d29dd333 - nir: assign IO bases in nir_lower_io_passes
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8935

Reviewed-by: Timothy Arceri <tarceri@yahoo.com.au>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22859>
2023-05-18 07:03:47 +00:00
Konstantin Kharlamov
275cf62e20 loader/dri3: temporarily work around a crash when front is NULL
Commit c65bde7b1e introduced a regression where under certain
circumstances `front` may be NULL, thus leading to a crash. It's not
currently known what exactly causes `front` to become NULL, nor we can
revert the offending commit, because there had been too many unrelated
changes that now depend on this commit.

So until someone comes up with a proper fix, let's add a workaround so
instead of crashing we just return from the function early.

This commit was tested with the bug `8982` and helps with the crash
with no other noticeable problems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8982
Fixes: c65bde7b1e ("frontend/dri: inline __DRIdrawable in dri_drawable, make __DRIdrawable opaque")
Cc: mesa-stable
Signed-off-by: Konstantin Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23093>
2023-05-18 06:25:46 +00:00
Gert Wollny
98d65120cb r600/sfn: use correct FS output location if not all outputs are used
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8973

Fixes 79ca456b48
    r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23058>
2023-05-18 06:09:50 +00:00
Gert Wollny
fe881bf097 r600/sfn: move kill handling fully to scheduling
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23058>
2023-05-18 06:09:50 +00:00
Gert Wollny
b401e718d2 r600/sfn: add dependencies for kill instructions
GDS and image instructions have side effects, so they can't be
reordered with kill instructions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23058>
2023-05-18 06:09:50 +00:00
Gert Wollny
ab5f0affc8 r600/sfn: move kill instruction test to alu instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23058>
2023-05-18 06:09:50 +00:00
Jesse Natalie
995c00dbea glsl: Delete dead intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23041>
2023-05-17 20:34:59 -07:00
Jordan Justen
8bb1ecaa02 mesa/main: Exit early when trying to create an unsupported context API
Fixes: adbe8b6c17 ("mesa: optimize out _mesa_is_desktop_gl*() and _mesa_is_gles*() calls when not built")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9038
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23068>
2023-05-18 01:25:29 +00:00
Mike Blumenkrantz
f9688f6378 vtn: add more info to bitcast bit size error message
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22932>
2023-05-18 00:37:46 +00:00
Mike Blumenkrantz
3511bb9eea vtn: print spirv ids for type mismatch in bcsel
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22932>
2023-05-18 00:37:46 +00:00
Mike Blumenkrantz
3aadc65fa8 vtn: print spirv id for type mismatch error
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22932>
2023-05-18 00:37:46 +00:00
Mike Blumenkrantz
684756e162 vtn: add spirv index to type mismatch error for debugging
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22932>
2023-05-18 00:37:46 +00:00
Alyssa Rosenzweig
c7861fe1f2 nir: Drop unused argument from nir_ssa_dest_init_for_type
Similar to nir_ssa_dest_init, but with fewer call sites to churn through.

This was done with the help of Coccinelle:

   @@
   expression A, B, C, D;
   @@

   -nir_ssa_dest_init_for_type(A, B, C, D);
   +nir_ssa_dest_init_for_type(A, B, C);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23078>
2023-05-17 23:46:16 +00:00
Alyssa Rosenzweig
01e9ee79f7 nir: Drop unused name from nir_ssa_dest_init
Since 624e799cc3 ("nir: Drop nir_ssa_def::name and nir_register::name"), SSA
defs don't have names, making the name argument unused. Drop it from the
signature and fix the call sites. This was done with the help of the following
Coccinelle semantic patch:

    @@
    expression A, B, C, D, E;
    @@

    -nir_ssa_dest_init(A, B, C, D, E);
    +nir_ssa_dest_init(A, B, C, D);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23078>
2023-05-17 23:46:16 +00:00
Caio Oliveira
7adf6c75ef spirv: Improve the 'ID is the wrong kind of value' error messages
Include the expected and actual values in the errors -- since
very frequently we care about them to diagnose issues.

Since these helpers are meant to be inlined, also pull the
failure code out of the way into a separate function (not meant to
be inlined).  This way, extra calls to to_string will not harm
the existing client code size.  Verified this with GCC release build.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22977>
2023-05-17 22:58:10 +00:00
Lionel Landwerlin
1a89b1a301 anv: mark images compressed for untracked layout/access
Most of the compressed writes are tracked by the driver, for
instances :
   - blorp writes
   - render target writes

But we don't have any tracking for storage images (which have gained
compression support on DG2+). So inspect the layout transition and
when we see a layout/access that can do writes outside of our driver
tracking, update the image state tracking.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8946
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22988>
2023-05-17 22:01:31 +00:00
David Heidelberg
e7ec410141 ci/v3d: add flaking opengl 1.1@depthstencil-default_fb-drawpixels-float-and-ushort
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23086>
2023-05-17 21:25:38 +00:00
Daniel Schürmann
8bfd18b8c5 vulkan/pipeline_cache: don't log warnings for client-invisible caches
Fixes: d3f06cf5ce ('vulkan/pipeline_cache: don't log warnings for internal caches')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22986>
2023-05-17 20:40:12 +00:00
norablackcat
1df30b01ff docs/rusticl: add Contributing section
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23051>
2023-05-17 20:25:01 +00:00
Caio Oliveira
1b31d528b9 spirv: Fix gl_spirv_validation when OpLine with strings is present
Fix issue by handling the OpString instructions when walking through
the preamble for validation.

The gl_spirv_validation() creates a vtn_builder() and walks the
instructions looking for a subset of the information.  However
our current way to walk the instructions will also perform tracking
of OpLine/OpNoLine, that may make references to OpString instructions
that were being previously ignored by gl_spirv_validation().
This would cause the parsing to fail.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9004
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22973>
2023-05-17 18:27:41 +00:00
Caio Oliveira
a32f97530a spirv: Extract vtn_handle_debug_text() helper
This will be later used by gl_spirv handling.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22973>
2023-05-17 18:27:41 +00:00
Yiwei Zhang
5039b59547 docs/venus: update vtest instructions
This is to reflect the latest steps after an issue with render server in
vtest has been fixed:
https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1115

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23083>
2023-05-17 18:20:57 +00:00
Sagar Ghuge
4f9314588f iris: Set CS stall bit during HIZ_CCS_WT surface fast clear
It make sense to enable CS stall so that it guarantees that the fast
clear will start after tile cache flush has completed.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23063>
2023-05-17 10:05:44 -07:00
Sagar Ghuge
688ee02864 anv: Set CS stall bit during HIZ_CCS_WT surface fast clear
It make sense to enable CS stall so that it guarantees that the fast
clear will start after tile cache flush has completed.

cc: mesa-stable
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9030

Fixes: e488773b ("anv: Fast clear depth/stencil surface in vkCmdClearAttachments"
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23063>
2023-05-17 10:05:34 -07:00
Collabora's Gfx CI Team
241741a77a Uprev Piglit to d8c08d123fadb986e9a8a7887b922ff63fcff52e
536975d94a...d8c08d123f

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23017>
2023-05-17 16:13:21 +00:00
Luca Bacci
098342ce53 Add checks for NULL dxil_validator
Fixes https://gitlab.freedesktop.org/mesa/mesa/-/issues/8718

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22141>
2023-05-17 15:33:17 +00:00
Lionel Landwerlin
7f7b2fc53a anv: put private binding BOs into execlists
Not doing so all the reads/writes go to the scratch page on i915.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f9fa09ec92 ("anv/image: Add ANV_IMAGE_MEMORY_BINDING_PRIVATE")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22957>
2023-05-17 14:59:14 +00:00
Jonathan Gray
af0f7b3475 intel/dev: remove dg2 0x5698 pci id
0x5698 is now reserved for future use

From Matt Roper in linux
3a38be31ec82 ("drm/i915/dg2: Drop one PCI ID")

Fixes: 65c9a810ee ("intel/pci_ids: Add dg2 0x5698 pci-id")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22985>
2023-05-17 14:08:24 +00:00
Rohan Garg
42ed0f0356 anv: drop duplicated nir_opt_dce passes
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23075>
2023-05-17 13:26:41 +00:00
Rohan Garg
b2e733a8ed anv: use the common vulkan runtime to do the heavy lifting
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23075>
2023-05-17 13:26:41 +00:00
Mike Blumenkrantz
08279f4b17 zink: add feedback loop usage for swapchains
affects:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_linear_filter_color_blit

cc: mesa-stable

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22959>
2023-05-17 11:16:00 +00:00
Mike Blumenkrantz
1effbccc5c vulkan/wsi: add feedback loop usage to swapchain caps if supported
this is needed by some apps

cc: mesa-stable

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22959>
2023-05-17 11:16:00 +00:00
James Glanville
4d188e005b pvr: Fix deferred_control_stream_flags
Signed-off-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
James Glanville
fbe975e738 pvr: Fix seg fault on unused ds attachment
Fixes:
  dEQP-VK.renderpass.suballocation.formats.r16g16_sint.input
    .dont_care.dont_care.self_dep_clear

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
2e5fb91090 pvr: Transfer image to buffer dest rect
In copy to buffer region, set dest rect to region size.
The rectangle must be block size adjusted in case of block compressed
format.

Fix test: dEQP-VK.api.copy_and_blit.core.image_to_buffer.regions

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
9e91e06d45 pvr: Transfer optimisation remove unused features from API
The transfer command "struct pvr_transfer_cmd" has support for
features not used by Vulkan: colour key, pattern, rop blit and
alpha blending

The whole "struct pvr_transfer_blit" can be removed. Also all code
related to transfer alpha blending can be removed.

This is an optimisation and doesn't fix any dEQP tests.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
f142eae05f pvr: Transfer check valid source address mask
The mask should be inverted.

Fixes tests in dEQP-VK.api.copy_and_blit.* using the texel unwind workaround.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
1f36901ad9 pvr: fix texel unwind workaround mappings
Fix the rectangle mappings used with texel unwind workaround (unaligned address).

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
9d7b35bf8e pvr: Transfer remove byte unwind workaround
The byte unwind workaround can be used when source texture virtual
address doesn't meet HW requirements (is unaligned) and the pixel
format can't be changed i.e. destination is compressed. If
destination texture is not compressed the simpler texel extend
workaround can be used.

Currently byte unwind workaround has bugs so removing the
workaround fixes tests in
dEQP-VK.api.copy_and_blit.core.blit_image.simple_tests.* when they
instead use texel extend workaround.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
7f5920ba98 pvr: Transfer support flipped rectangle mapping
The rectangles in "struct pvr_rect_mapping" are unsigned so a
flipped rectangle mapping isn't possible. Add new struct members
flip_x and flip_y to specify flipped mapping.

Add support for flipped rectangles in transfer copy blit path.
Support for flipped rectangles in the clip blit path is not done
in this change.

The new booleans are false by default because transfer command
"struct pvr_transfer_cmd" is zeroed on allocation in
pvr_transfer_cmd_alloc (pvr_blit.c).

Fixes:
  dEQP test case: dEQP-VK.api.copy_and_blit.core.blit_image.simple_tests
    .mirror_xy.nearest

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
41fbe9fe8e pvr: Transfer block compressed with 3d twiddled layout
Block compressed formats with 3d twiddled memory layout not supported.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:26 +00:00
Oskar Rundgren
59ba5cc2d1 pvr: Transfer ignore non zero stride for twiddled surface
Twiddled surfaces don't use stride but printing info about ignored
stride is not useful on debug driver.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:25 +00:00
Oskar Rundgren
0e3c828fc4 pvr: PBE fix mesa pipe swizzle conversion
The swizzle of pipe formats is described in
"struct util_format_description". The struct has array
"unsigned char swizzle[4];". The index of the array is the colour
channel  (in the order R, G, B and A). The value is what position
the colour channel is sourced from.

In PBE register settings (REG_SWIZ_CHAN[0-3]) the register index is
output channel position (and not colour). The colours are in the PBE
source channels - SWIZ_SOURCE_CHAN0 typically red.

The function pvr_get_pbe_hw_swizzle doesn't translate the swizzle
correctly. Remove function and replace with switch for each colour.
This could be done in a for loop, but there is just as much code
in the loop, it involves pointers and it's less readable for humans.
That's why I opted for this implementation.

Fixed test:
  dEQP-VK.api.copy_and_blit.core.image_to_image
    .all_formats.color.2d.r4g4b4a4_unorm_pack16.b4g4r4a4_unorm_pack16
and other with this pixel format.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
2023-05-17 08:18:25 +00:00
Samuel Pitoiset
f1e339dfd6 radv: fix resetting VRS if the graphics pipeline doesn't enable it
Otherwise the VRS state isn't reset and the graphics pipeline might
still use the previous VRS state. The VRS state will only be re-emitted
if it's different when the pipeline is bound.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9005
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23052>
2023-05-17 07:51:18 +00:00
Pierre-Eric Pelloux-Prayer
9ba416cdc6 llvmpipe: only include old Transform includes when needed
This fixes building with recent LLVM where these 2 .h files
were removed.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8671
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22980>
2023-05-17 09:12:32 +02:00
Samuel Pitoiset
518425d107 radv: fix emitting VRS state with a null fragment shader
Found this while debugging a VRS issue with Valhalla.

Fixes: 87245c6e8e ("radv: handle NULL fragment shaders when recording cmdbuf")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23050>
2023-05-17 06:12:19 +00:00
Dave Airlie
cc99fd42f6 llvmpipe/cs: refactor cs generator args to use an enum
This was horror I should have cleaned up before, clean it up before
mesh shaders make it worse.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
58e7867c67 draw: move to use common sampler/image binding code
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
36eb75d281 llvmpipe: move to common sampler/image binding code
This leaves the cache stuff in place, but we should consider trying
to consolidate that.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
f4c8a520c2 gallivm: add common code for sample/image tracking.
Now that the other code is consoldiated it makes sense to just
consolidate this binding code between the drivers and core

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
d565f67747 gallivm/draw/llvmpipe: consolidate the sampler/image dynamic state fns
These can all be the same now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
5f32b2ecf5 gallivm: refactor common resources out of contexts
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
90295bccc5 llvmpipe: refactor fs/cs jit structure members.
This lines them up just like the draw ones.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Dave Airlie
d4b7083ab3 draw: align common members in jit context structs.
this makes all the structs have the same baseline members for
resources and aniso_filter_table.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
2023-05-17 01:19:24 +00:00
Amber
f677f64e80 freedreno: implement GL_ARB_indirect_parameters
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21593>
2023-05-17 00:27:27 +00:00
Amber
7609f83c70 ir3, freedreno: implement GL_ARB_shader_draw_parameters
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21593>
2023-05-17 00:27:27 +00:00
Alyssa Rosenzweig
2cc77088b9 nir: Remove legacy atomics
The intrinsics are now totally dead and can be removed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig
af69d0b1d1 nir/opt_uniform_atomics: Drop legacy atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig
19593f1f40 nir/opt_load_store_vectorize: Reclaim ATOMIC
NEW_ATOMIC isn't so new anymore.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig
f00c464b5b nir/validate: Drop legacy atomics
We duplicated the validation for unified vs legacy atomics, so drop the unused
latter set.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig
c853ae660f nir/lower_task_shader: Drop legacy atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
44d89774e0 nir/lower_io: Drop legacy atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
59e73674c3 nir: Drop legacy atomics in simple cases
This commit drops legacy atomic support from core passes where we can simply
delete switch cases with no other changes. As such it's separated from the
more complex pass-specific commits for ease of review.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
9456e9880f ntt: Stop handling legacy atomics
Not seen.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
0a4c31003d nir: Drop nir_lower_legacy_atomics
No more users.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
c323762f9f treewide: Stop lowering legacy atomics
There are no more producers of legacy atomics so these calls are inert.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
ec0c9706f0 ac: Produce unified atomic
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
e7bb53467b intel: Produce unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
1823eca74d vtn: Produce unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
5f082f2512 mesa/st: Produce unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
a19660bfc7 nir/lower_printf: Produce unified atomic
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
6c8e220136 nir/lower_atomics_to_ssbo: Produce unified atomics
This could be simplified if we unified also atomic counters, but that's out of
scope for this series.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
b838a8746b glsl/nir: Produce unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
969a9fe7f2 lavapipe: Lower legacy atomics sooner
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
43b9dc3c53 v3dv: Lower legacy atomics earlier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
8088171369 tu: Lower legacy atomics earlier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
9b4ec86642 panvk: Lower legacy atomics earlier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
d4b2a7a26e pan/mdg: Lower legacy atomics earlier
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig
65469d6b23 agx: Lower legacy atomics sooner
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
2023-05-16 22:36:21 +00:00
Yiwei Zhang
6431ba087f venus: bump ring space to 128K
The absolute memory overhead is still trivial enough not worth a
driconfig.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23060>
2023-05-16 22:06:56 +00:00
Erik Faye-Lund
df1d1ccb37 aco: use c++17
std::map::try_emplace requires C++17, so we need to make sure we're
compiling with C++17 enabled.

Fixes: 8aff7152a0 ("aco: make IDSet sparse")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23047>
2023-05-16 21:41:16 +00:00
Thong Thai
04699cc3aa frontends/va/context: return error if context_id == 0
When destroying a context, check the context_id, preventing the
handle_table_get function from producing the following error:

handle_table_get: Assertion `handle' failed.

Cc: stable

Signed-off-by: Thong Thai <thong.thai@amd.com>
Tested-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22970>
2023-05-16 21:24:15 +00:00
Karol Herbst
63c501809e rusticl/platform: generate extension constants via macro
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23031>
2023-05-16 21:07:08 +00:00
Karol Herbst
508f81f913 rusticl: explicitly state supported SPIR-V extensions
We'll need to be explicit about supported extensions.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23031>
2023-05-16 21:07:08 +00:00
Karol Herbst
cdc2e2fece rusticl/device: split add_ext in fill_extensions
The initial hope was that we'd get extension and feature pairs more often.
Reality isn't as nice so just split it up.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23031>
2023-05-16 21:07:08 +00:00
Karol Herbst
2041c36e70 rusticl/platform: advertise byte_addressable_store
From the list of extensions we support on all devices it's the only one we
rely on for all devices.

There might be some devices not supporting atomics so keep them out there
for now.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23031>
2023-05-16 21:07:08 +00:00
Karol Herbst
7e65cff931 rusticl/device: use PLATFORM_EXTENSIONS as a template for filling extensions
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23031>
2023-05-16 21:07:08 +00:00
Karol Herbst
c3af8f3c11 Reviewed-by: Nora Allen <blackcatgames@protonmail.com>rusticl/platform: make the extension array a static
This way we can use it inside `Device::fill_extensions`

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23031>
2023-05-16 21:07:08 +00:00
Juan A. Suarez Romero
975a2c17a4 v3d: delay offset/counter values with primitive restart
Some values like the transform feedback offset or the number of output
vertices in VS can be obtained knowing how many vertices and primitive
type are used in the drawcall.

But when the primitive restart is enabled, doing this is quite more
complex, as we should parse the vertex buffer to know where is the
restart values, and so on.

In this case, delay this computation after the drawcall is executed, by
querying the GPU to know these values.

Similarly, this delay is also applied to compute the transform feedback
buffer offsets when there is a geometry shader, as we don't know
beforehand how many vertices it is going to output.

This fixes `spec@!opengl 3.1@primitive-restart-xfb flush` and
`spec@!opengl 3.1@primitive-restart-xfb generated`.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22716>
2023-05-16 20:39:43 +00:00
Georg Lehmann
b4c4d28263 aco: emit_wqm on MIMG dst, not operands
Now p_wqm always kills its operand, so no movs will be created for it.
Long term we want to remove p_wqm in favor of a Definition flag,
so this is also a step in that direction.

Foz-DB Navi21:
Totals from 45351 (33.63% of 134864) affected shaders:
VGPRs: 2099552 -> 2116192 (+0.79%); split: -0.14%, +0.93%
CodeSize: 179530772 -> 179072104 (-0.26%); split: -0.29%, +0.03%
MaxWaves: 1054740 -> 1052262 (-0.23%); split: +0.10%, -0.33%
Instrs: 33238535 -> 33188347 (-0.15%); split: -0.17%, +0.02%
Latency: 451000471 -> 450869384 (-0.03%); split: -0.11%, +0.08%
InvThroughput: 86026785 -> 86286288 (+0.30%); split: -0.11%, +0.41%
VClause: 633291 -> 623920 (-1.48%); split: -1.91%, +0.43%
SClause: 1436708 -> 1431395 (-0.37%); split: -0.60%, +0.23%
Copies: 2166563 -> 2122592 (-2.03%); split: -2.29%, +0.26%
Branches: 706846 -> 706838 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 1976162 -> 1976592 (+0.02%)
PreVGPRs: 1797409 -> 1794704 (-0.15%)

MaxWaves regressions in Detroit: Become Human MaxWaves seem to be due
to the scheduler choosing to schedule more aggressively.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22956>
2023-05-16 19:57:29 +00:00
Lionel Landwerlin
ec4619a5e9 intel/devinfo: call intel_device_info_init_was only once
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8958

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22862>
2023-05-16 19:32:41 +00:00
Lionel Landwerlin
9ebd553fc2 intel/devinfo: allow -p to take a pci-id in hexa
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22862>
2023-05-16 19:32:41 +00:00
Lionel Landwerlin
fce55ffb7d intel/devinfo: printout on stdout
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22862>
2023-05-16 19:32:41 +00:00
Emma Anholt
0f25bb8283 nir: Add helpers for lazy var creation.
This should make writing some lowering/meta code easier.  It also keeps
the num_inputs/outputs updated, when sometimes passes forgot to do so (for
example, nir_lower_input_attachments updated for one of the two vars it
creates).  The names of the variables change in many cases, but it's
probably nicer to see "VERT_ATTRIB_POS" than "in_0" or whatever.

I've only converted mesa core (compiler and GL), not all the driver meta
code.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22809>
2023-05-16 18:57:28 +00:00
Emma Anholt
e31b7a3f9e compiler: Update reference to name_for_stage func.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22809>
2023-05-16 18:57:28 +00:00
Konstantin Seurer
40653f0783 nir/lower_shader_calls: Remat derefs earlier
spill_ssa_defs_and_lower_shader_calls can insert phis as well which can
make nir_opt_shrink_stores crash.

Fixes: 200e551c ("nir/lower_shader_calls: Remat derefs before lowering resumes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9003
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23007>
2023-05-16 18:24:17 +00:00
Oskar Rundgren
c0a3954538 pvr: Transfer add s8_uint support
Replacing pvr_get_transfer_pbe_packmode with pvr_get_pbe_packmode
fixes many depth stencil deqp tests.

Replacing assert "Handle depth stencil format swizzle." with an
actual swizzle fixes tests using S8_UINT.

The swizzle for VK_FORMAT_S8_UINT returned from
pvr_get_format_swizzle (in pvr_image_state_set_codegen_defaults)
isn't correct. Modify the swizzle for format VK_FORMAT_S8_UINT.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
b5aff65560 pvr: Transfer add depth merge support for X8_D24
Add depth merge support for VK_FORMAT_X8_D24_UNORM_PACK32 as source.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
71ca441229 pvr: Add PBE packmode for depth stencil formats
Add PBE packmode for depth stencil formats

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
b106752782 pvr: Add back S8_UINT support
Revert "pvr: Don't advertise S8_UINT support"

Adding back support for S8_UINT format. It's used in many deqp tests.
Example:
  dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats
    .depth_stencil.2d.d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal

This reverts commit ff07610462d5100a1ade101c1960beb4a454e7ce.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
d8bd30d9b2 pvr: Transfer multiple emits clip rectangle
Adjust PBE clip rectangle for second emit.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
9bce479efc pvr: Transfer fix blit with multiple emits
The PBE state words for second emit are at wrong offset. Add new
define ROGUE_NUM_PBESTATE_REG_WORDS_FOR_TRANSFER to fix the offset.
The last word is always 0.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Karmjit Mahil
48bf9c736f pvr: Use original binding numbers instead of reassigning
Previously, in the descriptor set layout, if there were gaps
within the binding numbers, the code would remove the gap and
assign a sequential binding number to each.

This is causes problems when looking up the binding on a
vkUpdateDescriptorSets() as the user would still be providing the
original binding numbers. If gaps were removed and binding
number re-assigned, the binding could either not be found, or a
different binding was found instead of the desired one.

Let's not re-assign binding numbers and just use the original
ones.

This fixes the following assert being hit:
  `pvr_descriptor_set.c:1890: pvr_write_descriptor_set:
   Assertion `binding' failed.`
on dEQP tests such as:
  dEQP-VK.glsl.opaque_type_indexing.ubo.uniform_vertex
  dEQP-VK.glsl.opaque_type_indexing.ubo.uniform_fragment
  ...

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Karmjit Mahil
bac048e1df pvr: Add missing NULL checks in some vkDestroy...() functions
Seems like `dEQP-VK.api.null_handle.destroy_device` was already
passing but let's add the null check in case of future changes
which might not accept NULL.

Fixes:
  dEQP-VK.api.null_handle.destroy_descriptor_set_layout
  dEQP-VK.api.null_handle.destroy_pipeline_layout
  dEQP-VK.api.null_handle.destroy_query_pool

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
7cb77cb089 pvr: Transfer PBE gamma is unset
PBE gamma is set in pvr_pbe_get_src_format_and_gamma but later
always set to NONE. Should be enabled for SRGB formats.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
9fccc25bdf pvr: Transfer PBE source snorm format should be signed
Wrong shader was picked because snorm formats were treated as unsigned.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Oskar Rundgren
a495cdb09e pvr: Allow block compressed source blit
Allow blit from block compressed formats to unorm and float formats.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Karmjit Mahil
b59eb30e88 pvr: Fix cs corruption in pvr_pack_clear_vdm_state()
VDMCTRL_INDEX_LIST3 is packed conditionally which can cause the
generation of a corrupted control stream as the function mandated
the provided buffer to be of a fixed size always including the
possibly unpacked word. This would leave a gap in the control
stream when the caller ends up copying the buffer into the control
stream.

Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22918>
2023-05-16 18:09:03 +00:00
Alyssa Rosenzweig
27d5543617 tu: Use common GetPhysicalDeviceFeatures2
Delete the code. This isn't quite as nice as for the C drivers, because we can't
use a designated initializer in C++ without matching the order and this is an
autogenerated struct where it may not necessarily make sense to fix an order.
Not a big deal to workaround though.

Tested by diff'ing vulkaninfo output before/after the patch and confirming no
changes (other than the driverInfo git sha, the pipelineCacheUUID, the
driverUUID, and slight fluctuation in the memory budget).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23000>
2023-05-16 17:08:16 +00:00
Alyssa Rosenzweig
4aea3fb3dd lvp: Use common GetPhysicalDeviceFeatures2
This is a big delete-the-code win. Tested by diff'ing vulkaninfo output
before/after the patch and confirming no changes (other than the driverInfo git
sha and the pipelineCacheUUID).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23000>
2023-05-16 17:08:16 +00:00
Martin Roukala (né Peres)
1ec0976901 radv/ci: document more flakes for navi21
The following flakes were found in the latest stress run:

 * dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.2_cmdbuffers_resuming
 * dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.contents_secondary_primary_cmdbuffers_resuming

Rather than documenting them directly, let's use a broad regular
expression, to match the already-existing `dEQP-VK.dynamic_rendering.basic.*`.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23014>
2023-05-16 15:29:51 +00:00
MrRobbin
47f0801949 zink: Move the workaround before the EDS setting.
Then we can guarantee the settings correct, otherwise the  'screen->info.have_EXT_extended_dynamic_state3 = false' and 'screen->info.have_EXT_vertex_input_dynamic_state = false'
 will be enable, but actually we should disable it when 'have_EXT_extended_dynamic_state2 = false'.

Fixes: d5cf6f7d2f ("zink: disable dynamic state exts if the previous ones aren't present")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23046>
2023-05-16 14:04:54 +00:00
Patrick Lerda
6ee0bba3ae crocus: fix scratch_bos memory leak
This change is inspired from iris_destroy_context().

For instance, this issue is triggered with
"piglit/bin/glsl-1.50-gs-max-output -scan 1 20 -auto -fbo":
Direct leak of 320 byte(s) in 2 object(s) allocated from:
    #0 0x7f34fc769987 in calloc (/usr/lib64/libasan.so.6+0xb1987)
    #1 0x7f34f4fa168a in bo_calloc ../src/gallium/drivers/crocus/crocus_bufmgr.c:288
    #2 0x7f34f4fa168a in alloc_fresh_bo ../src/gallium/drivers/crocus/crocus_bufmgr.c:350
    #3 0x7f34f4fa168a in bo_alloc_internal ../src/gallium/drivers/crocus/crocus_bufmgr.c:419
    #4 0x7f34f4fe50a9 in crocus_get_scratch_space ../src/gallium/drivers/crocus/crocus_program.c:2678
    #5 0x7f34f55e8954 in crocus_upload_dirty_render_state ../src/gallium/drivers/crocus/crocus_state.c:6871
    #6 0x7f34f55e8954 in crocus_upload_render_state ../src/gallium/drivers/crocus/crocus_state.c:7812
    #7 0x7f34f5d9f680 in crocus_simple_draw_vbo ../src/gallium/drivers/crocus/crocus_draw.c:332
    #8 0x7f34f5d9f680 in crocus_draw_vbo ../src/gallium/drivers/crocus/crocus_draw.c:438
    #9 0x7f34f1d2eeba in tc_call_draw_single ../src/gallium/auxiliary/util/u_threaded_context.c:3735
    #10 0x7f34f1d12e03 in batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:394
    #11 0x7f34f1d12e03 in tc_batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:445
    #12 0x7f34f1d22c9a in _tc_sync ../src/gallium/auxiliary/util/u_threaded_context.c:680
    #13 0x7f34f1d238f8 in tc_texture_map ../src/gallium/auxiliary/util/u_threaded_context.c:2754
    #14 0x7f34f120b9d9 in pipe_texture_map_3d ../src/gallium/auxiliary/util/u_inlines.h:579
    #15 0x7f34f120b9d9 in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:530
    #16 0x7f34f10d7355 in read_pixels ../src/mesa/main/readpix.c:1178
    #17 0x7f34f10d7355 in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1195
    #18 0x7f34f10d7e10 in _mesa_ReadPixels ../src/mesa/main/readpix.c:1210

Fixes: f3630548f1 ("f3630548f1da crocus: initial gallium driver for Intel gfx 4-7")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23019>
2023-05-16 13:44:13 +00:00
Luigi Santivetti
e2e6adbe37 pvr: switch pvr_spm to use pvr_bo_suballoc
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
2023-05-16 11:53:09 +01:00
Luigi Santivetti
983f98d858 pvr: switch pvr_clear to use pvr_bo_suballoc
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
2023-05-16 11:53:09 +01:00
Luigi Santivetti
073bdbdea7 pvr: switch pvr_descriptor_set_create to use pvr_bo_suballoc
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
2023-05-16 11:53:09 +01:00
Luigi Santivetti
547a10f870 pvr: switch pvr_cmd_buffer_alloc_mem to use pvr_bo_suballoc
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
2023-05-16 11:53:09 +01:00
Luigi Santivetti
42d1011216 pvr: switch pvr_gpu_upload_* to use pvr_bo_suballoc
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
2023-05-16 11:53:08 +01:00
Luigi Santivetti
06c6cfc55b pvr: introduce suballocator for internal allocations
Add implementation for a simple sub-allocator in order to save
memory when doing internal driver allocations.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
2023-05-16 11:53:08 +01:00
George Ouzounoudis
882fd3c522 radv: small fix for VkDescriptorSetVariableDescriptorCountLayoutSupport
The VkDescriptorSetVariableDescriptorCountLayoutSupport structure should
be in the pNext chain of VkDescriptorSetLayoutSupport.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23009>
2023-05-16 06:20:31 +00:00
Tapani Pälli
cd406eae7d mesa: set a type for depth fallback texture
Otherwise we will later attempt to figure out format with type GL_NONE
which is not handled by _mesa_format_from_format_and_type.

Fixes: 0c6e56c391 ("mesa: (more) correctly handle incomplete depth textures")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9012
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23013>
2023-05-16 05:15:00 +00:00
Joshua Watt
e0c3324695 drm-shim: Use anonymous file for file override
Using a pipe might mean that either the read or write call can block,
most likely deadlocking the calling process. Instead, write the contents
in an anonymous file when the file is opened to be read back.

Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18341>
2023-05-16 04:31:22 +00:00
Joshua Watt
730834aa6b drm-shim: Set file type in readdir()
Some programs (in particular, older QEMU) will check the type of the
rendernode returned in readdir() to see if it is a character device
before opening it.

Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18341>
2023-05-16 04:31:22 +00:00
Qiang Yu
c1cb168888 ac/llvm: remove redundant nir_lower_legacy_atomics
Now both radeonsi and radv call it in driver.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23018>
2023-05-16 04:10:32 +00:00
Qiang Yu
4fb3133cdf radeonsi: fix aco compile for atomic ops
LLVM path will do this in ac_nir_translate(), ACO path
need driver to handle it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23018>
2023-05-16 04:10:31 +00:00
Qiang Yu
8cc7ad48d5 ac/llvm: remove the double frcp special handling
KHR-GL45.gpu_shader_fp64.builtin.mod_* relaxed precision
requirement.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23012>
2023-05-16 03:29:01 +00:00
David Heidelberg
f094c8acfe ci/freedreno: add recent a630 flake
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23044>
2023-05-16 02:52:06 +00:00
David Heidelberg
00a3b7b838 ci/venus: add recent flakes
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23043>
2023-05-16 02:33:42 +00:00
Iván Briano
a15bffe2b8 anv: enable the GPL feature based on whether the extension is supported
Instead of checking if the very same bit we want to enable is already
enabled, which obviously doesn't work.

Fixes: fbc0e74bda ("anv: enable graphics pipeline libraries by default")

Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23039>
2023-05-16 02:01:30 +00:00
Mike Blumenkrantz
47d9eaa0f1 zink: flag batch usage on swapchain images
while swapchains themselves are protected against early deletion
during presentation, there is nothing protecting them from
deletion while they are rendering if a swapchain updates
while rendering but before presentation

to address this, add batch usage to swapchains which can be
checked during pruning to ensure a rendering swapchain isn't
pruned

Fixes: dc8c9d2056 ("zink: prune old swapchains on present")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22962>
2023-05-16 00:54:46 +00:00
Mike Blumenkrantz
7ce82f1dec zink: set higher prio on dedicated memory allocations
this should guarantee that e.g., swapchain type images aren't paged
out

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22855>
2023-05-16 00:11:12 +00:00
Mike Blumenkrantz
5dd63a69da zink: hook up some memory extensions
enabling VK_EXT_pageable_device_local_memory guarantees that host memory
allocations will not consume device-local memory and enables overallocation
of device memory when paging can be done

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22855>
2023-05-16 00:11:12 +00:00
Mike Blumenkrantz
b88006fb9f zink: slightly simplify bda allocation chaining
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22855>
2023-05-16 00:11:12 +00:00
David Heidelberg
38fab8a1da ci/broadcom: skip timeouting ssbo.layout.3_level_array.std430.mat4 on RPi4
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23042>
2023-05-15 23:41:23 +00:00
Mike Blumenkrantz
cab466816f lavapipe: EXT_attachment_feedback_loop_layout_dynamic_state
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22964>
2023-05-15 23:15:23 +00:00
Mike Blumenkrantz
8d58fa5787 zink: only add feedback loop usage bit if extension is supported
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>
2023-05-15 22:52:57 +00:00
Mike Blumenkrantz
468554804c zink: ignore no-op image copies
rare, but it happens and is illegal

affects:
GTF-GL46.gtf30.GLCoverage.CoverageGL30

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>
2023-05-15 22:52:57 +00:00
Mike Blumenkrantz
864ccc7a92 zink: reorder some image copy code
no functional changes, just making other fixes easier to see

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>
2023-05-15 22:52:57 +00:00
Mike Blumenkrantz
7466c6fbf2 zink: reject blits where src/dst is 3D and dst/src z!=0
this is technically illegal even though it works everywhere,
though future spec changes may make it legal

affects KHR-GLES3.copy_tex_image_conversions.required.texture3d_cubemap_negz

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>
2023-05-15 22:52:57 +00:00
Mike Blumenkrantz
cc13c96b33 zink: reorder some native blit code
no functional changes, but this will make it more convenient to
reject certain blits

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22960>
2023-05-15 22:52:57 +00:00
Mike Blumenkrantz
58532057c5 zink: destroy current batch state after all other batch states
some resources may not be destroyed immediately and may instead be
queued for deletion onto the current batch state, so ensure that the
current state is the last one to be destroyed so that all deferred resources
are also destroyed

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23033>
2023-05-15 20:51:40 +00:00
Mike Blumenkrantz
cd0454646f zink: don't leak swapchain readback semaphores
these are considered usable after the queue goes idle, so add them
back into the cache

Fixes: e9f18f64b9 ("zink: also cache swapchain semaphores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23033>
2023-05-15 20:51:40 +00:00
Alyssa Rosenzweig
6c90fe189f r600: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23026>
2023-05-15 20:32:20 +00:00
Nanley Chery
a0e51fcc4e iris: Init CCS_E to COMPRESSED_NO_CLEAR for XeHP
Use COMPRESSED_NO_CLEAR for the initial CCS aux state instead of
COMPRESSED_CLEAR. This removes a dependency on the initial clear color,
meaning that some resolves related to clear color management are now
avoided.

In the Car Chase benchmark, this avoids all 50 CCS resolves. These only
happen during the warm-up phase of the benchmark, so I'm not sure there
is an impact on FPS. This was tested on a DG2 in small-BAR mode.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22857>
2023-05-15 19:54:02 +00:00
Nanley Chery
f220f3fdae intel/blorp: Assert an 8bpp fast clear restriction
We can't do fast clear operations on some LODs of 8bpp surfaces. Add an
assertion to BLORP to protect against drivers attempting to do this.

This assertion was successfully hit with some local modifications to
iris and with the piglit test case, "generatemipmap-base-change format".

Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7301
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22857>
2023-05-15 19:54:02 +00:00
Jesse Natalie
54c9fa6374 docs: Update list of extensions implemented by dzn
I hadn't been keeping this up-to-date as development was rapid but
now that we're starting to stabilize and new work is largely going
to be new extensions, it makes sense to start tracking this better.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23038>
2023-05-15 19:49:12 +00:00
David Heidelberg
bd09cbee52 venus: drop unused sem_feedback_count from vn_queue_bind_sparse_submit_batch
The values isn't used later.

Resolves gcc warning:
```
../src/virtio/vulkan/vn_queue.c:1006:13: error: variable 'sem_feedback_count' set but not used [-Werror,-Wunused-but-set-variable]
   uint32_t sem_feedback_count = 0;
```

Fixes: a55d26b566 ("venus: add back sparse binding support")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23034>
2023-05-15 19:26:59 +00:00
Zhang, Jianxun
7f84eee3c6 intel/isl: Fix map between sRGB and linear formats
Some SRGB formats don't get the expected linear counterparts in
isl_format_srgb_to_linear() in the generated isl_format_layout.c.

The replace() of string in python returns the unchanged input
string when no replacement occurred, so the first rule
('_SRGB', '') returns the original SRGB format name that passes
the following check unintendedly.

Another quirk is needed for a pair of formats not following
the patterns of other formats.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22247>
2023-05-15 18:49:13 +00:00
norablackcat
1404c180e9 rusticl: implement cl_khr_pci_bus_info
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23022>
2023-05-15 18:34:41 +00:00
Lionel Landwerlin
b031b28063 spirv: fix argument to ray query intrinsic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0cf22f9af3 ("nir: Make rq_load committed src an index")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23032>
2023-05-15 17:55:14 +00:00
Jesse Natalie
60ed4b92a0 dzn: Hook up fd semaphore import/export
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
c64f1b6650 dzn: Hook up win32 semaphore import/export
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
cd5e372f1c dzn: External Fd memory extension
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
ed25ea1bc9 dzn: External Win32 memory extension
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
fb61340790 dzn: Dedicated resource cleanup
Vulkan's concept of dedicated resources is dangerously close to
D3D12's concept of a "committed" resource, where the memory and
resource are inextricably tied. This is a minor optimization,
but will start to be more important going forward with external
memory.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
7cc59ad973 dzn: Finish implementing KHR_synchronization2
This was already mostly implemented.

Without this, the synchronization2 sharing tests will crash,
because there's a CTS bug that's missing a skip check for Windows.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
eec07cdde4 dzn: Don't zero an output struct that can have pNext
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Jesse Natalie
c9146794d4 vulkan: Win32 sync import/export support
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22879>
2023-05-15 17:14:20 +00:00
Lionel Landwerlin
952a523abb intel: switch over to unified atomics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23004>
2023-05-15 16:32:21 +00:00
Timur Kristóf
8e7df8ab37 radv: Move perf counter CS creation to where it's used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>
2023-05-15 15:06:25 +00:00
Timur Kristóf
53b439d24f radv/amdgpu: Use STACK_ARRAY for IB array to reduce stack usage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>
2023-05-15 15:06:25 +00:00
Timur Kristóf
984c0baa88 radv/amdgpu: Pass preambles to get_bo_list.
Instead of allocating an array for them.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>
2023-05-15 15:06:25 +00:00
Timur Kristóf
d61f1556b8 radv/amdgpu: Split radv_amdgpu_get_bo_list to smaller functions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>
2023-05-15 15:06:25 +00:00
Timur Kristóf
ae5e937f0b radv/amdgpu: Remove unused extra BO array.
Not needed anymore.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22668>
2023-05-15 15:06:25 +00:00
Erik Faye-Lund
cef751c86a zink: do not open-code memcpy
There's a lot of optimized memcpy implementations out there, let's use
them instead of manually copying.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23027>
2023-05-15 14:45:40 +00:00
Erik Faye-Lund
93682f9f4d zink: clean up tcs_vertices_out_word handling
At this point, we already have the index of the declaration itself in
the tcs_vertices_out_word variable, so we only need to add the offset
from the start of the exec_modes buffer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23027>
2023-05-15 14:45:40 +00:00
Erik Faye-Lund
e6edce2f2a zink: fix bad indent
This was indented too much

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23027>
2023-05-15 14:45:40 +00:00
Konstantin Seurer
7b52dcff52 nir/inline_uniforms: Handle num_components > 1
Vulkan UBO loads can have a buffer_index source with more than one component.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23016>
2023-05-15 14:15:02 +00:00
Konstantin Seurer
723922b6f1 gallium/nir: Handle unified atomics in nir_to_tgsi_info
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23016>
2023-05-15 14:15:02 +00:00
Alyssa Rosenzweig
508b7bba7a radv: Use common GetPhysicalDeviceFeatures2
This is a big delete-the-code win. Tested by diff'ing vulkaninfo output
before/after the patch and confirming no changes (other than the driverInfo git
sha and the pipelineCacheUUID).

Note: removes handling for VkDeviceMemoryOverallocationCreateInfoAMD. This was
surely added as a mistake.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22999>
2023-05-15 13:42:55 +00:00
Alyssa Rosenzweig
83bc32d55d radv: Constify radv_device_supports_etc
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22999>
2023-05-15 13:42:55 +00:00
Luigi Santivetti
a229f6cd2e pvr: fixup stack overflow in {start,end}_sub_cmd
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22955>
2023-05-15 12:42:52 +00:00
Mike Blumenkrantz
b563bfb4ee zink: add some ci flakes
roundup from recent ci jobs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23021>
2023-05-15 12:07:16 +00:00
Rhys Perry
811f3843d9 amd/drm-shim: add navi10
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>
2023-05-15 11:32:07 +00:00
Rhys Perry
3a04a38320 amd/drm-shim: add vega10
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>
2023-05-15 11:32:06 +00:00
Rhys Perry
0f2220fb22 amd/drm-shim: add polaris10
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>
2023-05-15 11:32:06 +00:00
Rhys Perry
9ed3e0db5d amd/drm-shim: move device list to external file
This is already pretty large.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22989>
2023-05-15 11:32:06 +00:00
antonino
71107b6dc8 zink: don't create invalid inputs in zink_create_quads_emulation_gs
The helper was creating input locations for some builtin bariables.

This caused validation errors in zink because those builtins can't be
used as input.

Fixes: e2220ee55e ("zink: filled quad emulation gs generation function")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
antonino
b5818e2e4f nir: make var arrays large enough in nir_create_passthrough_gs
Because each location has 4 possible different values for location_frac
the arrays need to br 4x the size.

Fixes: d0342e28 ("nir: Add helper to create passthrough GS shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
antonino
474d93719e zink: handle interface blocks in copy_vars
Fixes: edaf49160e ("zink: fix array copying in pv lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
antonino
8f22669f9b nir: handle interface blocks in copy_vars
Fixes: 99121c9b77 ("nir/gs: fix array type copying for passthrough gs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
antonino
a4113fd021 zink: don't replace non generated gs
Zink replaced the gs emulation shader when the primitive type changes,
however it didn't check whether the gs being replaced was generated.

Fixes: eedbf9046e ("zink: handle switching between primitives")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
antonino
83692bfe30 nir: don't create invalid inputs in nir_create_passthrough_gs
The helper was creating input locations for some builtin bariables.

This caused validation errors in zink because those builtins can't be
used as input.

Fixes: d0342e28b3 ("nir: Add helper to create passthrough GS shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
antonino
78d59ef4b1 nir: use nir_variable_clone in nir_create_passthrough_gs
Some stream out properties where not being copied causing problems in
zink.

Use the appropiate helper instead of copying fields by hand.

Fixes: d0342e28b3 ("nir: Add helper to create passthrough GS shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22871>
2023-05-15 11:04:41 +00:00
Matt Coster
59ec79a2b8 pvr: Remove unneeded assert in pvr_get_hw_clear_color()
Fixes: dEQP-VK.synchronization.op.single_queue.fence
  .write_draw_read_image_compute.image_128x128_r8_unorm

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>
2023-05-15 10:31:28 +00:00
Matt Coster
fa3b7ef943 pvr: Fix off-by-one in pvr_cmd_buffer_upload_desc_set_table() assert
Fixes: dEQP-VK.pipeline.monolithic.dynamic_offset.compute.multiset
  .uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1
  .numdynamicbindings_2.numnondynamicbindings_1

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>
2023-05-15 10:31:28 +00:00
Matt Coster
e90deac3d8 pvr: Correctly compile graphics pipelines without a fragment shader
Fixes: dEQP-VK.pipeline.monolithic.stencil.nocolor.format.s8_uint
  .states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>
2023-05-15 10:31:28 +00:00
Matt Coster
36db17dfa5 pvr: Initialize aspect_mask when creating buffer views
Fixes random aborts in CSB handling.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>
2023-05-15 10:31:28 +00:00
Matt Coster
5f8320bd04 pvr: Actually check for depth load when setting up load op constants
Fixes: Assorted tests in dEQP-VK.draw.renderpass.*

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22868>
2023-05-15 10:31:28 +00:00
Samuel Pitoiset
8939b80bf5 radv: stop using the pipeline for determining the null export workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22981>
2023-05-15 09:32:58 +00:00
Samuel Pitoiset
d73b6ce1c7 radv: remove unused pipeline param in radv_generate_ps_epilog_key()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22981>
2023-05-15 09:32:58 +00:00
Samuel Pitoiset
def2ac22b3 radv: reset the emitted PS epilog when a new fragment shader is bound
When a new fragment shader is bound, the PS epilog needs to be
re-emitted, and this allows us to avoid tracking if the pipeline is
dirty.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22981>
2023-05-15 09:32:58 +00:00
David Heidelberg
297859c56b panvk: drop path from panvk_physical_device struct
Unnecessary. Only produces warning:
```
../src/panfrost/vulkan/panvk_device.c:437:4: warning: 'strncpy' specified bound 20 equals destination size [-Wstringop-truncation]
  437 |    strncpy(device->path, path, ARRAY_SIZE(device->path));
      |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22880>
2023-05-15 09:15:59 +00:00
Konstantin Seurer
a94f089865 radv/ci: Test ray tracing pipelines
Since we expose them for a few games by default now, it would make sense
to have test coverage for them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21638>
2023-05-15 08:37:48 +00:00
Samuel Pitoiset
10d1073aa6 radv: advertise VK_EXT_tooling_info
This small extension just returns active tools running like RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22954>
2023-05-15 08:13:18 +00:00
Iago Toral Quiroga
66b3d34633 broadcom/compiler: use unified atomics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22939>
2023-05-15 07:43:09 +00:00
Samuel Pitoiset
9fa9782c17 radv: stop compiling a noop FS when the application doesn't provide a FS
This is unnecessary because the hardware doesn't execute a FS when it
has no effect and it's possible to execute pre-rasterization stages
without a FS.

This might improve depth-only pass performance very slightly because
the number of packets emitted is reduced a bit.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>
2023-05-15 07:09:56 +00:00
Samuel Pitoiset
7f47886cf1 radv: allow to determine NGG settings with a NULL fragment shader
This shouldn't change anything because a noop FS doesn't read any
inputs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>
2023-05-15 07:09:56 +00:00
Samuel Pitoiset
d91cb1bbfa radv: rework the checks for implicit exports with GPL
No logical changes but this allows us to distinguish between noop FS
and unknown FS with GPL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>
2023-05-15 07:09:56 +00:00
Samuel Pitoiset
333c8773a4 radv: handle NULL fragment shaders when creating graphics pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>
2023-05-15 07:09:55 +00:00
Samuel Pitoiset
87245c6e8e radv: handle NULL fragment shaders when recording cmdbuf
This will be useful for shader objects and also because creating and
emitting a noop FS is useless, the hardware doesn't execute it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22848>
2023-05-15 07:09:55 +00:00
Samuel Pitoiset
c51c68ba4b radv: implement dynamic sample locations enable
VK_EXT_sample_locations is only supported on < GFX10 due to some weird
issues on recent GPUs. extendedDynamicState3SampleLocationsEnable is
only enabled on GFX6-GFX9 for the same reason.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22947>
2023-05-15 08:14:31 +02:00
Filip Gawin
4a379f7637 glx: fix build with APPLEGL
fixes: 1eab7e69e2

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8885
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22621>
2023-05-15 03:50:30 +00:00
Qiang Yu
d1dd36a74e radeonsi: be able to use aco compiler for mono ps
Need to set AMD_DEBUG=useaco environment variable.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
288adae512 radeonsi: fixup sampler desc for tg4 in nir
For ACO which won't do this for us. But we still can't
remove the same code in llvm because non-uniform sampler
is keept as index in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
521cbcb588 ac/llvm,radeonsi: enable lower_array_layer_round_even
ACO need this to be done in nir. Remove the llvm round code
because both radv and radeonsi do this in nir for both aco
and llvm.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
38e064b674 radeonsi: clamp shadow texture reference in nir for aco
This is ported from the LLVM ac_shader_abi->clamp_shadow_reference
code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
b5409131ef radeonsi: pass use_aco to ac_nir_lower_ps
For dual source blend code emition in aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
7180b16afc radeonsi: adjust ps args for aco
aco need explicite args including PS arg compaction and
scratch_offset.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
474ddeffe6 radeonsi: resolve aco scratch addr symbols
Used for scratch buffer operation and reg spill when aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
7aac3508dc radeonsi: add symbols to si_shader_binary
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
6a360e4a71 radeonsi: add initial aco compile code
Only for monolithic PS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
91c91bb972 radeonsi: lower non uniform texture access when aco
aco need all resource have been lowered to descriptor.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:11 +00:00
Qiang Yu
f859436b55 radeonsi: add has_non_uniform_tex_access shader info
Can be used to skip nir_lower_non_uniform_access pass.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
563bdcc7fc radeonsi: lower vector const to scalar at last for aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
e252d87816 radeonsi: lower some 64bit ops aco does not support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
9bc1fb4c07 ac/llvm,radeonsi: lower nir_fpow for aco and llvm
aco does not implement fpow, need nir to lower it
first. llvm will do by itself in the same way, so
we always lower fpow in nir now.

Remove the llvm fpow implementation that has special
handling for the muliplication. It's not used any
more and does not match GLSL spec as fpow(0,0)=NaN
but here we get 0.

There's some pixel changes for gl-radeonsi-stoney:
  ror-default 2 (no tolerance), 0 (1% tol.)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
19a8626f86 ac/llvm,radeonsi: lower some pack/unpack ops not supported by aco
aco only support the split vertion of these instructions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
fb2d0fb4a2 ac/llvm,radeonsi: lower ineg in nir
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
3fae161ff2 ac/llvm,radeonsi: lower txf offset in nir
aco will complain if txf has offset. Not if other
texture ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
f13f9044db ac/llvm,radeonsi: lower fsin/fcos in nir
ACO only support nir_fsin/cos_amd.

There's some pixel changes for gl-radeonsi-stoney trace.
Different pixels:
  furmark  61 (no tolerance), 0 (1% tol.)
  gimark   93867 (no tolerance), 888 (1% tol.)
  tessmark 39 (no tolerance), 0 (1% tol.)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
f9d54b1d36 ac/llvm,radeonsi: lower idiv in nir
aco does not implement these idiv ops.

nir_lower_idiv is for idiv ops <= 32bit and ported from
llvm amdgpu, so llvm do the same.

nir_lower_divmod64 is for 64bit idiv ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
5fa06828b4 tgsi_to_nir: call nir_lower_int64 when required
Use case: radeonsi will generate internal tgsi shader
with 64bit udiv instruction, and we want all 64bit udiv
to be lowered in nir by lower_int64_options.

For GLSL shaders, this is done in glsl to nir, so we do
the same for tgsi here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
636f628206 radeonsi: remove ps vgpr index save when args init
They will be set by ac_get_fs_input_vgpr_cnt() later anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
1eddf5934b radeonsi: support print raw shader binary
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
ff29502df2 radeonsi: support raw shader binary upload
Only monolithic shader.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
4b90347595 ac/binary: pack prefech align code to a function
To be used by radeonsi raw shader binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
f3997a3ca7 radeonsi: add a raw shader binary type
It's the output of ACO compiler. To share the si_shader_binary
struct with ELF type:
  * add a type field to indicate RAW or ELF
  * rename elf_buffer/size to code_buffer/size

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
83a920dfb9 radeonsi: init spi ps input shader config when aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
f954aa1624 radeonsi: pack spi ps input fixup to a function
To be shared with ACO spi ps input construction.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
e752248b3b radeonsi: add shader info uses_sampleid
Used by ACO to set spi_ps_intput.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
14d2b12390 radeonsi: add shader info for frag coord and sample pos read
To construct spi_ps_input when ACO compilation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
326b027b25 radeonsi: add use_aco field for struct si_shader
We are going to use aco for monolithic ps first.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
ad33ff4de2 radeonsi: add aco debug option
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
Qiang Yu
5bc6c62486 meson: build radeonsi with aco
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
2023-05-15 02:01:10 +00:00
David Heidelberg
ad7ff4c25b ci/skqp: handle all warnings printed with clang >= 14
Useful for the https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21977

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22808>
2023-05-14 22:16:28 +00:00
Konstantin Seurer
1671b5fd1f radv: Stop running constant folding during ray query lowering
Now that committed is an intrinsic index, there is no need for constant
folding.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22963>
2023-05-14 17:28:40 +00:00
Konstantin Seurer
0cf22f9af3 nir: Make rq_load committed src an index
committed has to be a constant so there is no need to have a src and
depend on constant folding to remove the i2b.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22963>
2023-05-14 17:28:40 +00:00
David Heidelberg
626669bab3 gtest: Update to 1.13.0
Fix msan issue found with recent GCC on Debian 12.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8915

Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22814>
2023-05-14 11:09:02 +00:00
David Heidelberg
b289a9e16f util/tests: adjust for new gtest
GTest deprecated the GTEST_ARRAY_SIZE_ macro.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22814>
2023-05-14 11:09:01 +00:00
M Henning
be5b5fbe3d nv50: Fix return type of nv50_blit_is_array
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22997>
2023-05-13 19:36:24 +00:00
M Henning
504907a7d3 nvc0: Free blitter->vp
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22997>
2023-05-13 19:36:24 +00:00
M Henning
ae6ae84a75 nv50,nvc0: Free nir from blitter fp shader
Fixes: d11145e837 ("nv50,nvc0: Use nir in nv50_blitter_make_fp")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22997>
2023-05-13 19:36:24 +00:00
Jesse Natalie
4621a6db50 dxil: Use unified atomics
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22993>
2023-05-12 16:01:40 -07:00
Jesse Natalie
75e1407116 microsoft/compiler: Back-propagate type requirement information
For ALU ops where input types are known, we can store that info on
the input sources. This can be used to produce the correct overloads
of load instructions that don't immediately need to be followed by
bitcasts, or similarly to produce a constant value which can be directly
consumed by the relevant instruction without needing a bitcast.

Similarly for values that will be stored in an output, we know type
information. And using that info, we can use more-correct information
for phis instead of forcing all phi sources to be bitcast to int just
to be bitcast back to float on the other side for an alu or an output
store.

One missing piece is SSBO stores, where we can support int or float.
If the input is coming from a phi, we don't influence the phi's type,
so it'll be int, even though the incoming sources might've been float.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22972>
2023-05-12 22:23:48 +00:00
Jesse Natalie
d94e23d7bd microsoft/compiler: Duplicate some SSA values to simplify SSA typing
For each phi src, ensure that it's only used as a phi src.
This lets us give each phi their own unique types without worrying
about them stomping on each other. Also scalarize phis.

For each constant, ensure that it's only used once. The DXIL backend
will already dedupe these consts within the module, but this lets a
single load_const have multiple types depending on how it's used.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22972>
2023-05-12 22:23:48 +00:00
Jesse Natalie
049d340d8e microsoft/compiler: Remove alu type info from store_dest()
We pass in a *typed* value, we don't need to pass in additional
type info. That's just more opportunities to get it wrong.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22972>
2023-05-12 22:23:48 +00:00
Marek Olšák
f98871608c ac/llvm: rewrite and unify how GLC, DLC, SLC are set
Use ACCESS_* flags in call sites instead of GLC/DLC/SLC.

ACCESS_* flags are extended to describe other aspects of memory instructions
like load/store/atomic/smem.

Then add a function that converts the access flags to GLC, DLC, SLC.

The new functions are also usable by ACO.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22770>
2023-05-12 21:45:44 +00:00
Marek Olšák
968db0208d ac/llvm: don't treat ACCESS_NON_READABLE as ACCESS_COHERENT
... and expect it to behave like ACCESS_NON_TEMPORAL.
Handling ACCESS_NON_TEMPORAL is sufficient.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22770>
2023-05-12 21:45:44 +00:00
Marek Olšák
3a043b5739 aco: don't treat ACCESS_NON_READABLE as ACCESS_COHERENT
... and expect it to behave like ACCESS_NON_TEMPORAL.
Handling ACCESS_NON_TEMPORAL is sufficient.

This was copied from ac_nir_to_llvm.c.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22770>
2023-05-12 21:45:44 +00:00
Felix DeGrood
142c4f5abc intel: Secondary CB print primary CB's renderpass
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22723>
2023-05-12 21:15:09 +00:00
Felix DeGrood
07ec481cd8 intel: batch consecutive dispatches into implicit renderpasses
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22723>
2023-05-12 21:15:09 +00:00
Felix DeGrood
82f6a477f3 intel: refactor INTEL_MEASURE pointer dumping
Refactor framebuffer to renderpass to mirror previous INTEL_MEASURE
changes.

We dump hashes/pointers for shaders and framebuffer/renderpass.
Reduce from 64bit to 32bit pointers. We don't benefit from the
extra precision and reduced output size is convenient.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22723>
2023-05-12 21:15:09 +00:00
Felix DeGrood
e2dfab5c96 anv: re-enable RT data in INTEL_MEASURE
Per-RenderTarget analysis was removed from anv's INTEL_MEASURE
previously, probably after switching to dynamic rendering model.
Restore capability by tracking count of beginRenderPass calls.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22723>
2023-05-12 21:15:09 +00:00
Felix DeGrood
f783f581a8 anv: fix INTEL_MEASURE on MTL
Ensure counter buffer is coherent. Required for MTL which changes
coherence policy.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22723>
2023-05-12 21:15:09 +00:00
Alyssa Rosenzweig
fa1962681e nir/validate: Handle unified atomics
nir_validate checks that the format of an atomic (if specified) is compatible
with the atomic operation. For example, we can't fadd R64_UINT texels. The logic
can't be extended as-is to unified atomics because it's split across different
switch cases for different atomic-op intrinsics. So we add our own validation
case, porting over the logic from the separate existing cases below.

(The redundant logic will be deleted once we delete legacy atomics.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
55f7fd6d0d nir/opt_uniform_atomics: Handle unified atomics
This is the one place where using nir_atomic_op instead of nir_op directly is a
little annoying, since we need to translate between the two enums, but it's not
a big deal.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
b1fd8d27fc nir/lower_ssbo: Handle unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
66f1633ffd nir/lower_io: Handle unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
1609b41303 nir/lower_task_shader: Handle unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Jesse Natalie
ca5c869b6d nir: Load/store atomic op indices when lowering image intrinsics
They might not be stored in the same const index after lowering

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
97857731ce nir: Handle unified atomics in simple cases
Lots of passes can be made unified-atomics-aware simply by adding extra cases in
their switch statements. This commit fixes a bunch of passes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
ee6ddce636 ir3: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Karol Herbst
6ff97776b7 nv50/ir: Use unified atomics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
b98b7f4d85 zink: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
ce638eafe2 aco,radv: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
0241d8894e ac/llvm: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
1e9c01523a ac/llvm: Don't handle atomic derefs
Should not be seen, already would be stubbed out.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
d0d2292ac0 ntt: Use unified atomics
Nice deduplication of the NIR->TGSI enum translation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
bd0a2b1608 gallivm: Use unified atomics
This is a huge win because gallivm duplicated the translations in a zillion
places.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
3c823351c0 pan/mdg: Use unified atomics
This doesn't actually save anything, since Italo already introduced magic macros
for this, but it ticks off one more driver on the list to convert. It's also
more legible, so that's nice :-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
133af0d6c9 pan/mdg: Fix icky formatting
clang-format butchered this initializer pretty badly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
e258083e07 pan/bi: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
f5d73a9989 agx: Use unified atomics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
5c99507028 nir: Add pass to lower atomics to unified
In the future, we'd like to have all drivers only ingest unified atomics, and
all frontends only produce unified atomics, and garbage collect the existing
non-unified atomics. To get to that future, it's a lot nicer to convert drivers
one-by-one. Add a pass to translate old-style atomics to new-style atomics so
drivers can opt-in to the new form one-by-one. Once all drivers are converted,
we can convert producers one-by-one. Finally, we can just drop the calls to the
pass and garbage collect this pass and the old atomics. That's probably a while
out, though, so this will be out bridge to get there.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Alyssa Rosenzweig
d51bc95837 nir: Add unified atomics
Currently, we have an atomic intrinsic for each combination of memory type
(global, shared, image, etc) and atomic operation (add, sub, etc). So for m
types of memory supported by the driver and n atomic opcodes, the driver has to
handle O(mn) intrinsics. This makes a total mess in every single backend I've
looked at, without fail.

It would be a lot nicer to unify the intrinsics. There are two obvious ways:

1. Make the memory type a constant index, keep different intrinsics for
   different operations. The problem with this is that different memory types
   imply different intrinsic signatures (number of sources, etc).  As an
   example, it doesn't make sense to unify global_atomic_amd with
   global_atomic_2x32, as an example. The first takes 3 scalar sources, the
   second takes 1 vector and 1 scalar. Also, in any single backend, there are a
   lot more operations than there are memory types.

2. Make the opcode a constant index, keep different intrinsics for different
   operations. This works well, with one exception: compswap and fcompswap
   take an extra argument that other atomics don't, so there's an extra axis of
   variation for the intrinsic signatures.

So, the solution is to have 2 intrinsics for each memory type -- for atomics
taking 1 argument and atomics taking 2 respectively. Both of these intrinsics
take an nir_atomic_op enum to describe its operation. We don't use a nir_op for
this purpose, as there are some atomics (cmpxchg, inc_wrap, etc) that don't
cleanly map to any ALU op and it would be weird to force it.

The plan is to transition to these new opcodes gradually. This series adds a
lowering pass producing these opcodes from the existing opcodes, so that
backends can opt-in to the new forms one-by-one. Then we can convert backends
separately without any cross-tree flag day. Once everything is converted, we can
convert the producers and core NIR as a flag day, but we have far fewer
producers than backends so this should be fine. Finally we can drop the old
stuff.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22914>
2023-05-12 20:39:46 +00:00
Rhys Perry
88f6d7f4bd aco/gfx11: fix VMEM/DS->VALU WaW/RaW hazard
Previously, we could safely read/write unused lanes of VMEM/DS
destination VGPRs without waiting for the load to finish. That doesn't
seem to be the case on GFX11.

fossil-db (gfx1100):
Totals from 6698 (4.94% of 135636) affected shaders:
Instrs: 11184274 -> 11199420 (+0.14%); split: -0.00%, +0.14%
CodeSize: 57578344 -> 57638928 (+0.11%); split: -0.00%, +0.11%
Latency: 198348808 -> 198382472 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 24376324 -> 24378439 (+0.01%); split: -0.00%, +0.01%
VClause: 192420 -> 192559 (+0.07%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8722
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8239
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22965>
2023-05-12 20:19:21 +00:00
Dmitry Rogozhkin
8fc5dd935f meson/vaon12: fix driver file name for mingw build
This fixes vaon12 driver file name to be consistent with libva
expectation - vaon12_drv_video.dll - without lib prefix.

Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22995>
2023-05-12 19:31:26 +00:00
Yiwei Zhang
aa57e8ef18 lvp: avoid accessing member of NULL ptr for global entries
Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22979>
2023-05-12 19:05:23 +00:00
Yiwei Zhang
5b31039033 pipe-loader: avoid undefined memcpy behavior
If either dest or src is an invalid or null pointer, the behavior is
undefined, even if count is zero.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22979>
2023-05-12 19:05:23 +00:00
Mike Blumenkrantz
d5cf6f7d2f zink: disable dynamic state exts if the previous ones aren't present
this would be weird if a driver did it

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22996>
2023-05-12 17:53:02 +00:00
Mike Blumenkrantz
6debee51f3 zink: disable have_EXT_vertex_input_dynamic_state without EDS2
this is disabled already in the draw paths but not the pipeline paths

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22996>
2023-05-12 17:53:02 +00:00
Jesse Natalie
edcecfa817 nir_lower_system_values: Add ASSERTED to assert-only variable
Fixes: 1e0e4657 ("spirv/nir: wire ray interection triangle position fetch")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22994>
2023-05-12 17:09:29 +00:00
Eric Engestrom
ef831c137f ci: replace write + cat with tee
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22945>
2023-05-12 16:36:57 +00:00
Eric Engestrom
07a8fdb9bb ci: stop marking environment variable list as executable
We're only going to read it, not execute it.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22945>
2023-05-12 16:36:57 +00:00
Eric Engestrom
0a45f9c999 ci: drop GENERATE_ENV_SCRIPT
Added in 16b417b8d6 ("ci, valve: Add the dEQP runners for
Valve CI") but never used.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22945>
2023-05-12 16:36:56 +00:00
Alyssa Rosenzweig
7dfa98abc6 nir: Use nir_block_last_phi_instr more
We have a helper, don't open code it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22967>
2023-05-12 14:02:23 +00:00
Alyssa Rosenzweig
82430b91bb ac/llvm: Use nir_foreach_phi
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22967>
2023-05-12 14:02:23 +00:00
Alyssa Rosenzweig
5a0223a2d4 dxil: Use nir_foreach_phi_safe
This should be faster, since we're not iterating pointlessly over all the
non-phis after the phi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22967>
2023-05-12 14:02:23 +00:00
Alyssa Rosenzweig
aa6bdbd54a nir: Use nir_foreach_phi(_safe)
The pattern shows up all the time open-coded. Use the macro instead.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22967>
2023-05-12 14:02:23 +00:00
Alyssa Rosenzweig
7dc297cc14 nir: Add nir_foreach_phi(_safe) macro
Serious preprocessor voodoo here. There are two tricks here.

1. Iterating only phis. We know that phis come only at the beginning of a block,
   so all over the tree, we open-code iteration like:

      nir_foreach_instr(instr, block) {
         if (instr->type != phi)
            break;

         /* do stuff */
      }

   We can express this equivalently as

      nir_foreach_instr(instr, block)
         if (instr->type != phi)
            break;
         else {
            /* do stuff */
         }

   So, we can define a macro

      #define nir_foreach_phi(instr, block)
         if (instr->type != phi)
            break;
         else

   and then

      nir_foreach_phi(..)
         statement;

   and

      nir_foreach_phi(..) {
         ...
      }

   will expand to the right thing.

2. Automatically getting the phi as a phi. We want the instruction to go to some
   hidden variable, and then automatically insert nir_phi_instr *phi =
   nir_instr_as_phi(instr_internal); We can't do that directly, since we need to
   express the assignment implicitly in the control flow for the above trick to
   work. But we can do it indirectly with a loop initializer.

      for (nir_phi_instr *phi = nir_instr_as_phi(instr_internal); ...)

   That loop needs to break after exactly one iteration. We know that phi
   will always be non-null on its first iteration, since the original
   instruction is non-null, so we can use phi==NULL as a sentinel and express a
   one-iteration loop as for (phi = nonnull; phi != NULL; phi = NULL).

Putting these together gives the macros implemented used.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22967>
2023-05-12 14:02:23 +00:00
Georg Lehmann
04976beac7 aco: don't apply dpp if the alu instr uses the operand twice
CP77 has a ton of fma(dpp(a), dpp(a), b).

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:16 +00:00
Georg Lehmann
151bcc1e8b aco: use VOP3+DPP
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:16 +00:00
Georg Lehmann
41b0eafc4b aco/ra: convert VOPC_DPP instructions without vcc to VOP3
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:16 +00:00
Georg Lehmann
d32526caf2 aco: add assembler tests for VOP3(P) with DPP
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:15 +00:00
Georg Lehmann
984bdc0fb1 aco/builder: support VOP3(P) with dpp
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:15 +00:00
Georg Lehmann
2548f28ab3 aco/assembler: support VOP3P with DPP
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:15 +00:00
Georg Lehmann
d0e73cb313 aco/optimizer: copy pass flags for newly created valu instructions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:15 +00:00
Georg Lehmann
d27e03d719 aco/optimizer: don't use pass_flags for mad idx
fma can use DPP on GFX11+, so we want to keep the exec id in pass_flags

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:15 +00:00
Georg Lehmann
7c5e8dedab aco/vn: compare all valu modifers
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 9b4ea9ff90 ("aco/vn: hash opsel for VOP12C")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22698>
2023-05-12 13:31:15 +00:00
Mike Blumenkrantz
0f5a27ca8d zink: add back some anv qbo flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22987>
2023-05-12 09:10:04 -04:00
Alyssa Rosenzweig
86a053f7b9 docs: Include ALU opcode descriptions
If we have a description for an ALU opcode in NIR, include it with our generated
HTML documentation so people don't need to go to nir_opcodes.py anyway because
the documentation is missing the documentation ;-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Tested-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22929>
2023-05-12 12:11:38 +00:00
Alyssa Rosenzweig
bd466195b9 nir: Make ALU descriptions machine-readable
We already document a lot of ALU opcodes, let's make this machine-readable so we
can put the descriptions in our generated HTML documentation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22929>
2023-05-12 12:11:38 +00:00
Alyssa Rosenzweig
6b4f00a3ac nir: Allow adding descriptions to ALU opcodes
This will let us generate nicer documentation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22929>
2023-05-12 12:11:38 +00:00
Juan A. Suarez Romero
72a84ebbd6 vc4/ci: re-enable VC4 testing
But keeps piglit's quick_gl disabled, as it contains the test causing
the GPU resets.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22982>
2023-05-12 11:10:41 +02:00
Bas Nieuwenhuizen
0a87f1b7ed amd/drm-shim: Update docs for more devices.
We don't have to update the docs for every new entry.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22975>
2023-05-12 07:44:32 +00:00
Bas Nieuwenhuizen
b96aa6b9e2 amd/drm-shim: Add raphael&mendocino, polaris12 and gfx1100.
Decided to follow the chip names pretty much.This set happens to be
what is in my workstation currently.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22975>
2023-05-12 07:44:32 +00:00
Bas Nieuwenhuizen
d16cd4c758 amd/drm-shim: Add vangogh entry.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22975>
2023-05-12 07:44:32 +00:00
Tapani Pälli
b0b6811b9b anv: handle missing astc for gfx125 in CreateImageView
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22818>
2023-05-12 06:59:34 +00:00
Samuel Pitoiset
088e25216f radv: configure PA_CL_VRS_CNTL entirely from the cmd buffer
We already have all the information needed to configure it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22942>
2023-05-12 06:39:11 +00:00
Samuel Pitoiset
be0ba9a1c0 radv: re-emit fragment shading rate state when PA_CL_VRS_CNTL changes
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22942>
2023-05-12 06:39:11 +00:00
Samuel Pitoiset
041cf2d48e radv: dirty the dynamic vertex input state only when needed
This shouldn't be necessary when the VS doesn't have a prolog.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22944>
2023-05-12 06:20:02 +00:00
Samuel Pitoiset
8688e11013 radv: reset the emitted VS prolog when a new vertex shader is bound
When a new vertex shader is bound, the VS prolog needs to be
re-emitted, and this allows us to avoid tracking if the pipeline is
dirty.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22944>
2023-05-12 06:20:02 +00:00
Iván Briano
d41b83e1ca hasvk: avoid assert due to unsupported format
Fixes: 0a4c92b646 ("hasvk: Use the common vk_ycbcr_conversion object")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9011
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22978>
2023-05-11 19:48:39 -07:00
Nanley Chery
e930ad6017 anv: Enable MCS init with ISL_AUX_OP_AMBIGUATE
Up until now, we have been initializing MCS with fast clears. This is
mostly safe, but there's a corner case that can be an issue.

The issue is with a workaround for MCS that requires the sampler not see
any fast-cleared blocks for certain surfaces (14013111325). Even though
we have been initializing MCS with fast clears, we expect most
applications to be safe because we expect that they would only sample
the samples they've rendered to previously (and the render would've
removed the fast-cleared blocks). In other words we don't expect that
apps would transition from VK_IMAGE_LAYOUT_UNDEFINED to
VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL and start sampling immediately.

If an application took the unexpected path of sampling undefined
samples, it's possible they'd hit the issue described in the workaround.

Fix this corner case by using an ambiguate to initialize MCS.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
2023-05-11 23:41:16 +00:00
Nanley Chery
5b01a0ac47 anv: Drop the MCS initialization performance warning
The comment above the warning explains that not all bit patterns are
necessarily valid. While we're at it, fix a typo in that comment.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
2023-05-11 23:41:16 +00:00
Nanley Chery
f53638fa1a iris: Enable MCS init with ISL_AUX_OP_AMBIGUATE
Add support for using BLORP's ambiguate pass to initialize MCS instead
of mapping and memsetting it on the CPU. Note that this won't be used if
the first operation on the MSAA layer is a fast clear.

Since we're no longer mapping, this removes a blocker towards getting
MCS_CCS enabled in small-BAR mode.

This functionality is difficult to test because of the way iris is set
up. It always tries to compress writes. So, a test would only read the
ambiguated MCS element if it tries to read from undefined samples.

To test this, I locally disabled fast clears and rendering with MCS (via
iris_resource_render_aux_usage). I continued to allow sampling with MCS
in iris_resource_texture_aux_usage. So, writes go directly to the main
surface and reads go through the ambiguated MCS surface.

When I then ran the test group, dEQP-GLES3.functional.multisample.*, all
48/64 supported tests passed on my Ice Lake. If I slightly changed
BLORP's ambiguate pass, I observed several tests failing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
2023-05-11 23:41:16 +00:00
Nanley Chery
bba4d850c2 intel: Implement ISL_AUX_OP_AMBIGUATE for MCS
Implement the ambiguate operation for MCS. This clears MCS layers with a
sample-dependent "uncompressed" value that tells the sampler to go look
at the main surface.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
2023-05-11 23:41:16 +00:00
Nanley Chery
71d52a4d85 iris: Add a barrier to iris_mcs_partial_resolve
Partial resolves read from the MCS and write to the MSAA surface.
Add a texture barrier to prepare for the reads.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4179
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
2023-05-11 23:41:16 +00:00
Nanley Chery
a1ed41dec7 intel/isl: Bump the MCS halign value for BDW+
Select a horizontal alignment value that matches the main MSAA surface.

We need a valid horizontal alignment to perform MCS ambiguates. The
halign value doesn't actually affect test behavior, but it is validated
by isl_surf_fill_state. We currently have an invalid halign for gfx125.
This patch fixes that.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
2023-05-11 23:41:16 +00:00
Asahi Lina
0a398b0ef9 ail: Add MSAA tests
This tests the following matrix:
- Format: RGBA8Unorm, RGBA16Unorm, RGBA32Float
- Samples: 2 or 4
- Layers: 1 or 2
- Width: Interesting values 1..4097
- Height: Interesting values 1..4097

Compression is based on the dimensions (that is, everything that can be
compressed is). This test compares both the total texture size and the
compression metadata offset.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Alyssa Rosenzweig
e918509284 ail: Handle larger block sizes
We need to support up to 16 bytes/sample * 4 samples/pixel = 64 bytes/pixel for
multisampling to work with formats like RGBA32F.

Fixes dEQP-GLES3.functional.fbo.msaa.4_samples.rgba32f

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
f545a2b948 asahi: Use ail_can_compress() in agx_compression_allowed()
This moves the compression size threshold logic into ail, where
it belongs.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
59a6c5b357 ail: Implement multisampling for compression meta calculation
For multisampled textures, the decision about whether to compress or not
is based on the effective width and height in samples, not pixels.

Introduce ail_can_compress() to encode this logic in ail, so the driver
can use it to decide whether to compress or not before the full layout
is determined.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
94c9115aa0 asahi: Make bo->writer_syncobj atomic
BOs can be written from several contexts, so writing to this member is
racy. We only care about this for the purposes of exporting BOs after a
submission (and if the app is racing writers/submissions at that point
all bets are off), so just keeping track of the last written value is
sufficient.

Switch to atomic operations to eliminate the race, and drop the assert
in the batch cleanup path that no longer holds when the BO might have
been written to from another context.

Fixes: asahi/mesa#20

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
dc1a18b0ed asahi: Lazily initialize batch state on first draw
We track buffers written by batches, but this gets messy when we end up
with an empty batch that is never submitted, since then it might have
taken over writer state from a prior already submitted batch (for its
framebuffers).

Instead of trying to track two tiers of resource writers, let's just
defer initializing batch state until we know we have a draw (or compute
launch, or clear). This means that if a batch is marked as a writer for
a buffer, we know it will not be an empty batch.

This should be a small performance win for empty batches (no need to
emit initial VDM state or run the writer code), but more impontantly it
eliminates the empty batch writer state revert corner case.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
f8b055eb96 asahi: Partially identify some missing index list stuff
Still unclear what the extra 2 blocks do, but at least we know the
size/order now.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
64a595291e asahi: Add some more system registers
Core and opfifo stuff from the compute helper blob, vm_slot because it
was the only one changing when I poked around yesterday and it hit me
what it was ^^

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
9608e57524 asahi: Fix check for sprite coord mode in agx_bind_rasterizer_state
We need to set ctx->rast = so after comparing them.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:48 +00:00
Asahi Lina
e92ff4f809 asahi: Add missing stdbool include to lib/hexdump.h
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:47 +00:00
Asahi Lina
2e377190f5 asahi: Disable tilebuffer write masking optimization
This seems to flake some dEQPs due to some kind of race/UB (which
doesn't even always cause the dEQPs to fail due to leeway in the image
comparison, since the problem is usually just a few pixels, but it's
there).

I spent a bunch of time trying other flags/things, and almost everything
changed the bad pixel pattern randomly but nothing fixed it. Let's
revisit this one later, since it looks like a pretty deep rabbit hole.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:47 +00:00
Asahi Lina
6f57f952fc asahi: Make framebuffer texture barriers a no-op
Framebuffer fetch is coherent, so there is no need for barriers here.
This avoids pointless flushing if an app calls glBlendBarrier().

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:47 +00:00
Asahi Lina
69740fb82b asahi: Implement create_fence_fd and fence_server_sync
Apparently we were still missing some fence stuff, and it started
crashing Firefox in apitrace? I'm not sure why we never noticed this
before, but it's trivial enough. Cargo culted from Panfrost.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:47 +00:00
Asahi Lina
86d41cb7bd asahi: Implement memory_barrier
Cargo culted from panfrost.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22971>
2023-05-11 23:24:47 +00:00
Matt Turner
435a607909 intel: Disable shader cache when executing intel_clc during the build
With the shader cache enabled, intel_clc attempts to write to ~/.cache.
Many distributions' build systems limit file-system access, and will
kill the process thus causing the build to fail.

Fixes: 639665053f ("anv/grl: Build OpenCL kernels")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22968>
2023-05-11 23:00:01 +00:00
Chia-I Wu
6aee7848bb radv: improve externalMemoryFeatures for android ahb
VK_EXTERNAL_MEMORY_FEATURE_DEDICATED_ONLY_BIT should always be set, as
required by the spec.

VK_EXTERNAL_MEMORY_FEATURE_EXPORTABLE_BIT should be set when
radv_ahb_format_for_vk_format knowns the format.  That is,
radv_create_ahb_memory should at least know how to call
AHardwareBuffer_allocate.

VK_EXTERNAL_MEMORY_FEATURE_IMPORTABLE_BIT is always set.  We can't know
if gralloc can allocate the format/flags/usage combo or not (gralloc
might use a private format for the combo).

Fixed
dEQP-VK.api.external.memory.android_hardware_buffer.image_formats.*.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:03 +00:00
Chia-I Wu
eaf1776586 anv,hasvk: android ahb is not always exportable
anv_ahb_format_for_vk_format needs to know the format at least.  There
is no guarantee that AHardwareBuffer_allocate will succeed, but we are
reluctant to check with AHardwareBuffer_isSupported which may
test-allocate internally and is expensive.

v2: add anv_ahb_format_for_vk_format to anv_android_stubs.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:03 +00:00
Chia-I Wu
47b37651f8 vulkan: add vk_image_format_to_ahb_format
There should be no functional change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:03 +00:00
Chia-I Wu
380180516c anv,hasvk,radv: do not fall back to AHARDWAREBUFFER_FORMAT_BLOB
When allocating a VkDeviceMemory exportable as AHB, it seems incorrect
to fall back to AHARDWAREBUFFER_FORMAT_BLOB when the image has no known
AHB format.  We should fail the allocation instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:03 +00:00
Chia-I Wu
50e703f347 vulkan: add vk_ahb_format_to_image_format
There should be no functional change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
2bbe0462e8 vulkan: define inline stubs when android api level < 26
This allows us to reduce ANDROID #ifdef's.

v2: always include vk_android.h in radv_formats.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
f81dce9bcc vulkan: rename vk_image::ahardware_buffer_format
Rename it to ahb_format.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
5561abcb2c vulkan: make sure vk_image_view::format is never UNDEFINED
Remove redundant override in anv and hasvk as well.

Fixed
android.graphics.cts.BasicVulkanGpuTest#testBasicBufferImportAndRenderingExternalFormat
for radv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
df8ec99c81 vulkan: make sure vk_image::format is never UNDEFINED
vk_image::android_external_format is only used for sanity check and is
removed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
0a4c92b646 hasvk: Use the common vk_ycbcr_conversion object
Based on commit 30a91d333d ("anv: Use the common vk_ycbcr_conversion
object").

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
cb6d655f53 hasvk/android: Use VkFormat for externalFormat
Same as commit 18feb32df0 ("anv/android: Use VkFormat for
externalFormat"), but for hasvk.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Chia-I Wu
6039f2a22f hasvk: Refactor Android externalFormat handling in CreateYcbcrConversion
Same as commit 9fc046a87d ("anv: Refactor Android externalFormat
handling in CreateYcbcrConversion"), but for hasvk.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22619>
2023-05-11 22:18:02 +00:00
Jesse Natalie
bafa5efcfc dzn: Enable KHR_shader_integer_dot_product
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22952>
2023-05-11 21:56:31 +00:00
Jesse Natalie
a6ea08c542 microsoft/compiler: Enable packed dot product intrinsics for SM6.4+
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22952>
2023-05-11 21:56:31 +00:00
Jesse Natalie
217bbdc4fd microsoft/compiler: Take inputs from callers before providing nir options
The base nir options were assuming all bit sizes were supported at
shader model 6.2. Multiple callers were then changing properties
based on actual support.

Standardize behavior by providing the majority of things that can
impact nir options when getting them. Some callers (e.g. meta blit
shaders or libclc) don't bother, because they are known to have
contents that are unaffected by these options. Other callers might
munge more properties afterwards, but this minimizes that.

Note that lower_helper_invocation was incorrectly being turned off
for SM6.6+ by some callers, despite load_helper_invocation being
unimplemented by the backend.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22952>
2023-05-11 21:56:31 +00:00
Jesse Natalie
f2945409b3 dzn: Enable 64-bit ints and floats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22952>
2023-05-11 21:56:31 +00:00
Jesse Natalie
9dc009e7ae d3d12: Convert from D3D shader model to Mesa shader model earlier
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22952>
2023-05-11 21:56:31 +00:00
Jesse Natalie
7cdbf4f065 spirv2dxil: Support int64 and doubles
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22952>
2023-05-11 21:56:31 +00:00
Alyssa Rosenzweig
95d93b24f6 zink: Always set a blend state for shader-db
If we're compiling shaders in shader-db, with shader-db's ./run and
ZINK_DEBUG=shaderdb, we won't get much state set on the graphics pipeline, since
shader-db doesn't actually do any rendering. For a driver like RADV, that is
*almost* ok... Since we use dynamic vertex input, we don't need to make up any
state for vertex inputs; since we use dynamic rendering, we don't need to make
up any render attachments. All of that being said, we *do* need to make up a
blend state to ensure that the Vulkan driver doesn't optimize away all of
store_derefs in the fragment shader (and in turn, optimize the entire fragment
shader away, if there are no image/SSBO writes.) So set the obvious blend state,
fixing fragment shaders in shader-db with zink + radv.

I don't know why other people would want to use Zink with shader-db, but for me
it's an easy way to test ACO, at least until radeonsi gains aco support.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22948>
2023-05-11 21:29:47 +00:00
Caio Oliveira
d3bdddcf2a spirv: Use NIR_PASS for spirv2nir --optimize
This allows us to use NIR_DEBUG=print to see each step.
Also use an OPT macro to make code slightly more readable.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22764>
2023-05-11 19:53:17 +00:00
Caio Oliveira
f4c4832689 spirv: Do more on spirv2nir --optimize
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22764>
2023-05-11 19:53:16 +00:00
Lionel Landwerlin
c61eea2ff3 intel/mi_builder: fixup tests for newer kernel uAPI
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22966>
2023-05-11 19:15:06 +00:00
José Roberto de Souza
4d4b0dfdb8 anv: Set memory types supported by Xe KMD
Due the lack of APIs to set mmap modes, Xe KMD can't support the same
memory types as i915.
So here adding a i915 and Xe function to set memory types supported
by each KMD.

Iris function iris_xe_bo_flags_to_mmap_mode() has a table with all the
mmaps modes of each type of placement.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22906>
2023-05-11 18:28:11 +00:00
Leo Liu
ffbbf23ef8 radeonsi: Use vcn version instead of CHIP family for VCNs
Decouple it from CHIP family, based on HW query infomation.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22904>
2023-05-11 18:01:10 +00:00
Leo Liu
09e59553ec amd: Add vcn ip version info
And make it support for kernel w/wo ip_discovery.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22904>
2023-05-11 18:01:10 +00:00
Leo Liu
82a064020c radeonsi: Remove redundant vcn_decode from info
Use the number of queue instead.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22904>
2023-05-11 18:01:10 +00:00
MouriNaruto
90c3fd0c83 dzn: Fix segmentation fault when Direct3D 12 user mode
driver from at least one of GPUs is not available.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22961>
2023-05-11 15:58:51 +00:00
Alyssa Rosenzweig
5a80bf2eb0 agx: Optimize multiplies
We have an imad instruction and our iadd has a small immediate shift on the
second source. Together, these allow expressing lots of integer multiplies more
efficiently. Add some rules to optimize these now that the backend compiler can
ingest the optimized forms.

Half-register changes are from load_const scheduling changing in some vertex
shaders.

   total instructions in shared programs: 1539092 -> 1537949 (-0.07%)
   instructions in affected programs: 167896 -> 166753 (-0.68%)

   total bytes in shared programs: 10543012 -> 10533866 (-0.09%)
   bytes in affected programs: 1218068 -> 1208922 (-0.75%)

   total halfregs in shared programs: 483180 -> 483448 (0.06%)
   halfregs in affected programs: 1942 -> 2210 (13.80%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:23 -04:00
Alyssa Rosenzweig
c2793a304d agx: Fix packing of imsub instructions
The negate for imad is on the third source (a * b - c), not the second source.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:23 -04:00
Alyssa Rosenzweig
8289fa253b agx: Handle imadshl_agx, imsubshl_agx
Same hardware instructions as iadd/isub/imad/imsub, just with the extra input
represented in NIR as required.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:23 -04:00
Alyssa Rosenzweig
18e19882fa nir: Model AGX-specific multiply-shift-add
Models `(a * b) + (c << d)` in general, as implemented in various forms on AGX.
This will be fused with backend NIR opt algebraic rules, both for the literal
pattern as well as to strength reduce certain multiplications, e.g. replacing
a * 5 with `a + (a << 2)` expressed as imadshl_agx(a, 1, a, 2).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:09 -04:00
Alyssa Rosenzweig
3df4ae3334 agx: Use nir_alu_src_as_uint
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:04 -04:00
Alyssa Rosenzweig
445e2f1620 pan/bi: Use nir_alu_src_as_uint
Fixes some theoretical issues with swizzle handling. Unsure if this could cause
actual end-to-end miscompiles.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:04 -04:00
Alyssa Rosenzweig
0eb5f8e765 nir: Add nir_alu_src_as_uint helper
We have a few ALU instructions that take a constant source. Technically, they
have a swizzle so you can't just nir_src_as_uint them, even though a bunch of
backends do. To help backends do the right thing, add a helper that's just as
easy to use that will chase the swizzle properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22695>
2023-05-11 09:23:04 -04:00
Lionel Landwerlin
7381405095 anv: fixup workaround 16011411144
We're missing it for the memcpy with streamout

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5cc4075f95 ("anv, iris: Add Wa_16011411144 for DG2")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22930>
2023-05-11 15:24:03 +03:00
Tapani Pälli
5a7520d252 egl/loader: move crtc resource infrastructure as common helper
Patch moves (and renames) the infrastructure to fix compilation
failures when dri3 is not enabled in the build.

Fixes: 3170b63314 ("loader: Add infrastructure for tracking active CRTC resources");
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8476
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22897>
2023-05-11 10:51:11 +00:00
Georg Lehmann
2a1e6a140d aco: also reassign p_extract_vector post ra
Foz-DB Navi21:
Totals from 1223 (0.91% of 134864) affected shaders:
CodeSize: 6923888 -> 6913516 (-0.15%)
Instrs: 1293744 -> 1291151 (-0.20%)
Latency: 16928653 -> 16925035 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 2985304 -> 2984775 (-0.02%); split: -0.02%, +0.00%
VClause: 32260 -> 32319 (+0.18%)
SClause: 54952 -> 54949 (-0.01%)
Copies: 83968 -> 81377 (-3.09%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22821>
2023-05-11 10:26:24 +00:00
Georg Lehmann
c1cf40da8a aco: Assert that operands have the same byte offset when reassigning split vectors
This can not happen because the post-RA optimizer doesn't support sub dword
writes at the moment, but everytime I look at this I wonder if there might
be a bug here.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22821>
2023-05-11 10:26:24 +00:00
Daniel Schürmann
d3f06cf5ce vulkan/pipeline_cache: don't log warnings for internal caches
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22850>
2023-05-11 08:36:12 +00:00
Lionel Landwerlin
b4b17f8aaa Revert "intel/compiler: make uses_pos_offset a tri-state"
This reverts commit 5489033fa8.

The problem I was trying to address is that we were programming the
3DSTATE_PS::PositionXYOffsetSelect bit differently with GPL (CENTROID)
than without (NONE).

I failed to understand that this bit also impacts the thread payload
layout. GPL fragment shaders don't know ahead of time if pos_offset is
going to be used. It'll be choosen at runtime base on push constant
bits. So we need to program this bit different just to have a payload
matching the compiled shader code.

This fixes the freedoom replay with GPL FS shader in SIMD32.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22938>
2023-05-11 08:01:46 +00:00
Juan A. Suarez Romero
728e316864 v3d/ci: annotate failures
Annotate some of the failures with the root cause.

Remove also some tests that are actually skipped.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22953>
2023-05-11 09:30:19 +02:00
Chia-I Wu
df387306d6 amd/drm-shim: add amdgpu drm-shim
This is enough to run offscreen apps such as vulkaninfo or deqp-vk.

v2: remove unnecessary idep_amdgfxregs_h dependency

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21892>
2023-05-11 00:58:02 +00:00
Chia-I Wu
0b6283e2e6 drm-shim: apply file overrides for open
loader_get_pci_driver calls os_read_file on linux to get the pci id, and
os_read_file uses open instead of fopen.

This allows loader_get_pci_driver to work rather than falling back to
loader_get_kernel_driver_name.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22951>
2023-05-11 00:17:40 +00:00
Jesse Natalie
e169a402a8 microsoft/compiler: Do basic I/O analysis for dependency tables
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22949>
2023-05-10 21:42:34 +00:00
Jesse Natalie
8ff95b766d microsoft/compiler: Allocate space for I/O and viewID dependency tables before instruction processing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22949>
2023-05-10 21:42:34 +00:00
Danylo Piliaiev
63904240f2 tu: Re-enable bufferDeviceAddressCaptureReplay
We cannot immidiately free VMA range when BO is freed, we have to
wait until kernel stops considered BO as busy and frees its internal
VMA range. Otherwise userspace and kernel VMA will get desynchronized.

To fix this and re-enable replaying of BDA we place BO's information
into a queue. The queue is drained:
- On BO allocation;
- When we cannot allocate an iova passed from the client.

For more information about this see:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/7106

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18254>
2023-05-10 20:57:03 +00:00
Rob Clark
d2f9346d9d tu: Move queue deletion to last
For zombie vma tracking, we'll need access to the queue at bo deletion
time.  This simplest way to make that work is just move queue deletion
to late in device teardown.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18254>
2023-05-10 20:57:02 +00:00
Danylo Piliaiev
0df8532777 tu: Move VMA heap to the logical device
Since last commit drm fd is being created on per logical device
granularity, which means each logical device has its own
address space. So VMA heap could be moved to logical device.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18254>
2023-05-10 20:57:02 +00:00
Danylo Piliaiev
3a8fac0ccd tu: Create drm fd per logical device
The main reason is to simplify BO managment when
bufferDeviceAddressCaptureReplay would be enabled.

Having to track some BO information in physical device and some
info in logical device gets challenging when BOs are shared
between logical devices.

Other benefits:
- Isolation from hangs in other logical devices;
- Each logical device limited only by its own address space size.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18254>
2023-05-10 20:57:02 +00:00
Emma Anholt
0d9ceeee3f ci/zink+anv: Skip a couple more long tests pre-merge.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22866>
2023-05-10 19:01:40 +00:00
Emma Anholt
5546e57b90 ci: Re-enable some piglit tests that should be fast enough post-uprev.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22866>
2023-05-10 19:01:40 +00:00
Collabora's Gfx CI Team
9ab31d56b2 Uprev Piglit to 536975d94a40cf76a69fcfa786c2513eccd0c989
79a084c56b...536975d94a

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22866>
2023-05-10 19:01:40 +00:00
Emma Anholt
deb064d98d zink: Don't flag legacy_shadow_mask for RED-only reads in the shader.
It is very common in games to read just the .x channel of a vec4 shadow
result (since GL defaults to either LUMINANCE or RED depth mode depending
on context).  So, we can avoid shader recompiles to handle the other
components, in that case.

Fixes some recompiles in CS:GO.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22912>
2023-05-10 18:37:36 +00:00
Emma Anholt
dd42696412 zink: Fix silly void * type in rewrite_tex_dest.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22912>
2023-05-10 18:37:36 +00:00
Emma Anholt
e9ad9ab3d2 zink: Explain some of the current pathway for shadow sampling.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22912>
2023-05-10 18:37:36 +00:00
Emma Anholt
0b22b31190 mesa: Fix precompile of GLSL programs with shadow samplers.
Reduces fp variant recompiles on google's CS:GO trace on zink+anv from 115
to 31.

Fixes: 0843d4cbc3 ("nir: switch to a normal sampler for ARB program with not depth textures")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22928>
2023-05-10 17:55:09 +00:00
Emma Anholt
63f8964d5a mesa: Fix debug logging of fp compile compare func.
When we're doing COMPARE_FUNC_ALWAYS, that's not part of a shader
precompile miss.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22928>
2023-05-10 17:55:09 +00:00
Jiadong Zhu
3cfdcabc78 ac: enable SHADOW_GLOBAL_CONFIG for preemptible ib
SHADOW_GLOBAL_CONFIG is mandatory for mid command buffer preemmption.

Fixes: 69014d8c94 (radeonsi: implement CP register shadowing)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22916>
2023-05-10 17:11:19 +00:00
Konstantin Seurer
0e679e80a9 nir/lower_io: Emit less iadd(x, 0)
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22890>
2023-05-10 16:21:34 +00:00
Rob Clark
0b259e72bd freedreno/a5xx+a6xx: Don't allocate LRZ for z32
We don't do LRZ in this case, so no point in allocating the LRZ buffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
f46cb3c6c4 freedreno/a6xx: Actually use LRZ for ms
We know the z value after the fallback clear.  But we need to set
rsc->lrz_valid _after_ the fallback clear invalidates it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
b6e2afb223 freedreno/a6xx: Move LRZ clears to gmem
If we have multiple LRZ clears, emit them all at once.  This also avoids
redundant LRZ clears if app does multiple clears in sequence.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
c823460f2f freedreno/a6xx: New subpass on mid-frame clears
If we get a mid-frame clear, split out a new subpass rather than having
to fall-back to u_blitter clears.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
3738969710 freedreno/a6xx: Per-subpass LRZ
Allow the LRZ buffer to be re-allocated if a mid-frame depth clear
starts a new subpass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
a77406b72b freedreno/a6xx: Introduce batch subpasses
Just the scaffolding for now, nothing actually creates multiple sub-
passes yet.  For now, only planning to use this for a6xx, as other
gens are doing clears on 3d.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
c613bf1f14 freedreno/a6xx: Split tile loads and clears
This will give better visibility in perfetto, and prepares for the next
commit where we could have per-subpass clears.

While we are at it, start adopting vulkan terms for tile load/store.  No
need to be pointlessly different.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
10f625eb13 freedreno/a6xx: Switch to batch->cleared
batch->fast_cleared will be per-subpass.  But we can use the cleared
bitmask instead in the few places where we just need to know if there
was a clear in any subpass.  For the conditional-ib it is even
preferable since we know a clear touched the contents of the tile so
we know what the result of the conditional would be.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
f61766df22 freedreno/a6xx: Simplify per-tile conditional IBs
Handle the logic which decides between conditional or unconditional IB
in one place.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
1a7590a47a freedreno/a6xx: Add ctx->emit_sysmem()
Once we introduce subpass, it won't be just a single IB.  But per
subpass clears + IB.  So interoduce a sysmem counterpart for
emit_tile().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
df1e357de8 freedreno/a6xx: Move LRZ clear to blitter
This is where it belongs.  And will simplify moving LRZ clears to
fd6_gmem.cc

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Rob Clark
c29e9dc054 freedreno/batch: Add helper to set fb state
Stop open-coding and add a helper.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
2023-05-10 15:36:02 +00:00
Mike Blumenkrantz
9af6f25741 zink: disable always zs feedback loop on radv
this shouldn't have been enabled

Fixes: 56fb258064 ("zink: replace mixed_zs with zs feedback loops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22946>
2023-05-10 15:14:02 +00:00
Yiwei Zhang
b2d636b275 anv: apply ANV_BO_ALLOC_IMPLICIT_SYNC for external memory
This is necessary to make anv work with clients like VA-API which relies
on implicit fencing only. The bahavior matches iris i915_batch_submit.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22937>
2023-05-10 14:33:53 +00:00
Eric Engestrom
bcdd5b5e74 ci: bump bin/ci/ deps to support python 3.11
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22943>
2023-05-10 14:32:02 +00:00
Luigi Santivetti
4a1614eedd pvr: add GUARD_SIZE_DEFAULT for CDM and VDM control stream links 1 and 2
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22631>
2023-05-10 13:13:07 +00:00
Luigi Santivetti
5ea7a41607 pvr: use PVR_DW_TO_BYTES for stream_link_space calculation
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22631>
2023-05-10 13:13:07 +00:00
Timur Kristóf
dc676ed711 aco: Initialize vcmpx field in get_cmp_info.
Fixes: 578d0a1934
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22885>
2023-05-10 12:41:25 +00:00
Timur Kristóf
16a05f1903 aco: Don't allow any VALU instruction to write m0.
Fixes: d5398b62da
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22885>
2023-05-10 12:41:25 +00:00
Simon Ser
c140a456b7 vulkan/wsi/wayland: add 16-bit formats
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20234>
2023-05-10 11:58:19 +00:00
Iago Toral Quiroga
994ad351f7 broadcom/compiler: increase peephole limit to 24 instructions
This helps by reducing the number of branches with their corresponding
delay slots, at the expense of additional register pressure. It also helps
a lot with SFU stalls, probably because removing control-flow blocks
gives us more QPU scheduling flexibility to hide them.

Shader-db results below correspond to the "closed shaders" set, since the
full set is very dominated by the massive impact this change has on Skia's
shaders (for the better), so this is probably more representative of real
impact:

total instructions in shared programs: 11887255 -> 11854898 (-0.27%)
instructions in affected programs: 538170 -> 505813 (-6.01%)
helped: 1653
HURT: 43
Instructions are helped.

total threads in shared programs: 385924 -> 385872 (-0.01%)
threads in affected programs: 236 -> 184 (-22.03%)
helped: 22
HURT: 48
Inconclusive result (%-change mean confidence interval includes 0).

total uniforms in shared programs: 3552808 -> 3547894 (-0.14%)
uniforms in affected programs: 157486 -> 152572 (-3.12%)
helped: 1673
HURT: 35
Uniforms are helped.

total max-temps in shared programs: 2062403 -> 2064720 (0.11%)
max-temps in affected programs: 18209 -> 20526 (12.72%)
helped: 168
HURT: 369
Max-temps are HURT.

total spills in shared programs: 1937 -> 1994 (2.94%)
spills in affected programs: 79 -> 136 (72.15%)
helped: 0
HURT: 1

total fills in shared programs: 2652 -> 2717 (2.45%)
fills in affected programs: 115 -> 180 (56.52%)
helped: 0
HURT: 1

total sfu-stalls in shared programs: 19349 -> 18010 (-6.92%)
sfu-stalls in affected programs: 2321 -> 982 (-57.69%)
helped: 674
HURT: 74
Sfu-stalls are helped.

total inst-and-stalls in shared programs: 11906604 -> 11872908 (-0.28%)
inst-and-stalls in affected programs: 541339 -> 507643 (-6.22%)
helped: 1656
HURT: 43
Inst-and-stalls are helped.

total nops in shared programs: 245740 -> 238085 (-3.12%)
nops in affected programs: 19282 -> 11627 (-39.70%)
helped: 1335
HURT: 76
Nops are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22922>
2023-05-10 11:11:38 +00:00
Samuel Pitoiset
8d5003d91a radv/ci: stop setting MESA_SPIRV_LOG_LEVEL
Use the default VTN logging level which is warning.

Suggested-by: Emma Anholt <emma@anholt.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6263
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22917>
2023-05-10 10:32:47 +00:00
Samuel Pitoiset
4f7b27bccf spirv: ignore SpvDecorationInvariant warning on struct members
Similar to SpvDecorationRestrict, looks like it's also incorrectly
generated by glslang.

This will allow RADV/CI to leave MESA_SPIRV_LOG_LEVEL as default
(ie. only warnings).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22917>
2023-05-10 10:32:47 +00:00
Simon Ser
31e6d15801 radv: advertise LINEAR filter support for multiplanar/subsampled
It seems like radv supports this but doesn't advertise it.

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22875>
2023-05-10 10:02:27 +00:00
Kurt Kartaltepe
7accfbffd8 drirc: Set limit_trig_input_range option for Nier games
Resolves ambient occlusion rendering in Replicant
Resolves grass and ocean animations in Automata, and maybe more.

Both of these games have shaders that expect trig values to work across
large ranges with good precision.

Closes #7656

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22894>
2023-05-10 08:12:59 +00:00
Juan A. Suarez Romero
0e466efe41 v3d: apply proper clamping when setting up RT
Ensure the render target values are in the proper range.

This fixes `spec@!opengl 3.0@render-integer`.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22733>
2023-05-10 07:36:18 +00:00
Juan A. Suarez Romero
b5a458859f v3d: upgrade V3D 4.1 to 4.2 version
Some of the new features require at least V3D 4.2. And actually, 4.2 is
the version used by the Raspberry Pi 4 hardware.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22733>
2023-05-10 07:36:18 +00:00
Juan A. Suarez Romero
d95bff8e1c v3d: add per hw-version caller macro
Instead of hardcoding conditionals to know which hardwared-based version
of a function to call, just wrap them in a macro to use

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22733>
2023-05-10 07:36:18 +00:00
Daniel Schürmann
1e334e9818 radv/rt: store stack_sizes per stage instead of per group
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22503>
2023-05-10 07:02:13 +00:00
Daniel Schürmann
f50a5a62bf radv/rt: use vk_multialloc for radv_ray_tracing_pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22503>
2023-05-10 07:02:13 +00:00
Daniel Schürmann
dfa5fd480c radv/rt: refactor radv_rt_pipeline_compile()
This patch moves the NIR shader creation into radv_rt_pipeline_compile()
and simplifies radv_rt_pipeline_create().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22503>
2023-05-10 07:02:13 +00:00
Daniel Schürmann
b314c2aae2 radv/rt: unify radv_rt_pipeline_create() and radv_rt_pipeline_library_create()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22503>
2023-05-10 07:02:13 +00:00
Daniel Schürmann
1100f7dcd5 radv/rt: unify radv_ray_tracing_lib_pipeline and radv_ray_tracing_pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22503>
2023-05-10 07:02:13 +00:00
Daniel Schürmann
97721f32ca radv/rt: change base of radv_ray_tracing_lib_pipeline to radv_compute_pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22503>
2023-05-10 07:02:13 +00:00
Iván Briano
fbc0e74bda anv: enable graphics pipeline libraries by default
Since we are disabling mesh, which has issues with gpl, enable gpl by
default now, leaving the renamed environment variable as a way to
disable it for debug purposes.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22910>
2023-05-10 01:23:16 +00:00
Iván Briano
c97b1eb08a anv: put EXT_mesh_shader behind an environment variable
We are seeing frequent hangs in other workloads when something using
mesh shaders runs at the same time, so gate the feature behind an
environment variable until we figure out what's going on.

v2: (Sagar)
 - Give the mesh enabled variable a more descriptive name

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22910>
2023-05-10 01:23:16 +00:00
Mike Blumenkrantz
e9f18f64b9 zink: also cache swapchain semaphores
a semaphore is a semaphore, as they say

Fixes: 7399b2241f ("zink: move semaphore caching to zink_reset_batch_state()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22935>
2023-05-10 01:03:50 +00:00
Mike Blumenkrantz
c6fd588027 zink: block more flushes during unordered blits
Fixes: 89aa363593 ("zink: block oom flushes during unordered blits")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22931>
2023-05-09 19:29:56 -04:00
Mike Blumenkrantz
2df7ee528c zink: adjust bindless texel buffer handle before indexing
buffer handle ids are offset by ZINK_MAX_BINDLESS_HANDLES, but the actual
index is zero-based

Fixes: 99ba529fee ("zink: implement descriptor buffer handling of bindless texture")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22931>
2023-05-09 19:29:50 -04:00
Mike Blumenkrantz
8ef098a600 zink: compare desc set to detect bindless vars in separate shaders
the bindless flag here isn't set, so this check did nothing

Fixes: e3b746e3a3 ("zink: use GPL to handle (simple) separate shader objects")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22931>
2023-05-09 19:29:50 -04:00
Mike Blumenkrantz
2991a7c11f zink: bind bindless db set when updating separate shader db sets
this otherwise doesn't bind a bindless set and hangs

Fixes: e3b746e3a3 ("zink: use GPL to handle (simple) separate shader objects")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22931>
2023-05-09 19:29:50 -04:00
Mike Blumenkrantz
7428b41618 zink: set debug callback on context
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22899>
2023-05-09 22:16:22 +00:00
Mike Blumenkrantz
391cda41ac zink: add perf_debug for "interesting" shader compiles
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22899>
2023-05-09 22:16:22 +00:00
Mike Blumenkrantz
443e098f7a zink: make mesa_logw separate from perf_debug
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22899>
2023-05-09 22:16:22 +00:00
Mike Blumenkrantz
6098c3f9c0 zink: add ZINK_DEBUG=nobgc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22899>
2023-05-09 22:16:21 +00:00
Mike Blumenkrantz
0fb5f81ab6 zink: add ZINK_DEBUG=noopt
it's often useful to disable optimized pipeline compiles for debugging

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22899>
2023-05-09 22:16:21 +00:00
Juan A. Suarez Romero
4d39ff6751 vc4/ci: disable VC4 jobs
Some test is causing a GPU reset, which blocks merge requests.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22927>
2023-05-09 20:01:24 +00:00
Jesse Natalie
6d52f08a76 dzn/ci: Remove 'exclude' for graphicsfuzz cases
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22926>
2023-05-09 18:44:37 +00:00
Jesse Natalie
cd91387cad dzn: Run nir_opt_remove_phis before nir_lower_returns
Otherwise nir_lower_returns can produce invalid NIR by not updating
a phi in a non-trivial if.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22926>
2023-05-09 18:44:37 +00:00
Thong Thai
ca5bb27641 frontends/va/config: check for QVBR support when creating
Fixes: 30a6363c8f ("frontend/va: Support QVBR rate control mode")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22905>
2023-05-09 18:26:02 +00:00
Thong Thai
fcdd3cf0ad frontends/va/context: check min supported resolution when creating
Fixes: c987eed9cd ("frontends/va: report min width and min height values if available")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8981
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22905>
2023-05-09 18:26:02 +00:00
Thong Thai
55d2973bce frontends/va/config: add disable packed headers as valid config
Fixes: 306c6e12a5 ("frontends/va: define va av1 encoding caps")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22905>
2023-05-09 18:26:02 +00:00
Patrick Lerda
acdd6a2a6c radeonsi: set proper drm_amdgpu_cs_chunk_fence alignment
The 'struct drm_amdgpu_cs_chunk_fence' is processed as
'struct drm_amdgpu_cs_chunk_data' which is a union.
This change ensures the proper alignment for this structure
to be processed as 'struct drm_amdgpu_cs_chunk_data'.

The presence of __u64 as one member of
'struct drm_amdgpu_cs_chunk_data' makes the
whole structure expected to be 64-bit aligned.

This is a minor issue detected by the gcc sanitizer (ubsan), for instance at the libdrm library:
../amdgpu/amdgpu_cs.c:937:26: runtime error: member access within misaligned address 0x63100001484c for type 'struct drm_amdgpu_cs_chunk_data', which requires 8 byte alignment
0x63100001484c: note: pointer points here
  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00
                ^

Fixes: ae7e4d7619 ("amd: rename ring_type --> amd_ip_type and match the kernel enum values")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22920>
2023-05-09 16:43:07 +00:00
José Roberto de Souza
e1ab322372 iris: Add function to return mmap mode for aux map
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22240>
2023-05-09 15:42:18 +00:00
José Roberto de Souza
743bf9597c iris: Add function to return mmap mode for userptr bos
Similar to what was done to alloc buffer but now for userptr bos.
There is no changes in i915 modes but Xe may different values in
future.

While at it, also setting bo->real.heap to IRIS_HEAP_SYSTEM_MEMORY
as it was already implicit set as IRIS_HEAP_SYSTEM_MEMORY is the
value 0 of the enum.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22240>
2023-05-09 15:42:18 +00:00
José Roberto de Souza
9ad8466a45 iris: Add a function to return allocated bo mmap mode
i915 and Xe kmd can have different mmaps modes, so here extracting
the code to handle it to function.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22240>
2023-05-09 15:42:17 +00:00
Matthieu Bouron
57afa7c0b1 lavapipe: honor dst base array layer when resolving color attachments
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22924>
2023-05-09 14:31:39 +00:00
Martin Roukala (né Peres)
c84aee779b zink/ci: document new flakes on RADV
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22923>
2023-05-09 14:10:56 +00:00
Martin Roukala (né Peres)
dab817c4d8 zink/ci: document recent fixes on RADV
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22923>
2023-05-09 14:10:56 +00:00
Samuel Pitoiset
d115228327 radv: advertise VK_EXT_attachment_feedback_loop_dynamic_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22849>
2023-05-09 13:29:34 +00:00
Samuel Pitoiset
d740e283e1 radv: implement VK_EXT_attachment_feedback_loop_dynamic_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22849>
2023-05-09 13:29:34 +00:00
Mike Blumenkrantz
ae4692db49 vulkan/runtime: add VK_DYNAMIC_STATE_ATTACHMENT_FEEDBACK_LOOP_ENABLE_EXT
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22849>
2023-05-09 13:29:34 +00:00
Samuel Pitoiset
14162c0904 vulkan: Update XML and headers to 1.3.250
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22849>
2023-05-09 13:29:34 +00:00
Mike Blumenkrantz
ccbfcf3933 glsl/lower_samplers_as_deref: apply bindings for unused samplers
if a sampler is never used (no derefs) then its binding will never be
applied here, leaving it with binding=0. this will clobber the real binding=0
sampler in driver backends, leading to errors, so try to iterate using
the same criteria as above and apply bindings in the same way

fixes #8974

cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22902>
2023-05-09 12:44:27 +00:00
Juan A. Suarez Romero
3277d6965b vc4/ci: skip unsupported test versions
Skip all OpenGL[ES] and GLSL tests that are not supported.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22919>
2023-05-09 12:20:04 +00:00
Samuel Pitoiset
787ae18a37 ac/spm: switch to SPM version 2.0
Found this while glancing in PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22817>
2023-05-09 11:25:18 +00:00
Juan A. Suarez Romero
a51f8787d5 v3d/ci: update neverball-v2 trace reference
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22915>
2023-05-09 09:29:14 +00:00
Rohan Garg
99c1f58b0a iris: use the workaround framework for WA 14013111325
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22830>
2023-05-09 10:22:13 +02:00
Rohan Garg
27b019d94e hasvk: drop dead code
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22830>
2023-05-09 10:22:10 +02:00
Rohan Garg
1896b48f4e anv: use the workaround framework for WA 14013111325
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22830>
2023-05-09 10:22:02 +02:00
Kenneth Graunke
f00143acc3 intel/compiler: Fold constants after distributing source modifiers
This can generate things like fneg! of load_const, which is silly.
Fold those away into an actual constant.  Only do so on the scalar
backend because there's a comment above that the vec4 backend doesn't
want any new constants this late, and I'm inclined to believe it.

fossil-db stats show a very minor improvement:

   Totals:
   Instrs: 203091223 -> 203091099 (-0.00%); split: -0.00%, +0.00%
   Cycles: 14410638075 -> 14410577067 (-0.00%); split: -0.00%, +0.00%

   Totals from 20 (0.00% of 665070) affected shaders:
   Instrs: 27067 -> 26943 (-0.46%); split: -0.47%, +0.01%
   Cycles: 2687958 -> 2626950 (-2.27%); split: -2.27%, +0.00%

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22881>
2023-05-09 00:16:40 -07:00
Juston Li
0c64ff6c2a venus: enable sparse binding properties
signed-off-by: Juston Li <justonli@google.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22616>
2023-05-09 04:35:16 +00:00
Juston Li
0c05418fd7 venus: enable sparse binding features
Enable sparse binding now that vkQueueBindSparse works with feedback.

If a device only has queue families with exclusive sparse binding
support then disable sparse binding.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22616>
2023-05-09 04:35:16 +00:00
Juston Li
a55d26b566 venus: add back sparse binding support
Add back support for vkQueueBindSparse that works with fence and timeline
semaphore feedback.

For each vkQueueBindSparse batch, if it contains feedback then move the
signal operations to a subsequent vkQueueSubmit with feedback cmds.

This requires queue families that support vkQueueSubmit alongside sparse
binding support so any queue familes that exclusively support sparse
binding will be filtered out.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22616>
2023-05-09 04:35:16 +00:00
Juston Li
c3e1140c20 venus: add helper function support for VkBindSparseInfo
add getter/setters for VkBindSparseInfo so we can at least share
vn_queue_submission_prepare() to handle external semaphores and
check for fence/semaphore feedback

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22616>
2023-05-09 04:35:16 +00:00
Juston Li
6ec54465d4 venus: filter out queue familes with exclusive sparse binding support
We require the queue to have additional support to be able to send
feedback commands.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22616>
2023-05-09 04:35:16 +00:00
Qiang Yu
1ba2460e61 ac/nir/cull: fix line position w culling
Fixes: db0e9d3cab ("ac/nir/ngg: support line culling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8950
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22867>
2023-05-09 02:30:41 +00:00
Mike Blumenkrantz
24350064ca zink: fix uncached memory readback
the inner conditional here didn't include uncached readback, meaning
that many (most?) buffers allocated with uncached memory (i.e., BAR) were
being read back directly instead of using staging resources to be faster

at some point this inner conditional should be reevaluated to determine
whether it still does anything, but this is not that time

fixes, among other things, loading in DOOM2016 on some GPUs

Fixes: 52f27cda05 ("zink: allow direct memory mapping for any COHERENT+CACHED buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
6452849b11 zink: block batching of unordered barriers if previous usage was write
in the case where a cmdbuf was submitted with write access and the subsequent
batch promotes an op to unordered, it's important for associated barriers
to happen-before those ops to guarantee synchronization

the fixes tag is wrong on this, but it's all in the same release

Fixes: bf0af0f8ed ("zink: move all barrier-related functions to c++")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
9b4b0911ee zink: disable batched unordered barries with ZINK_DEBUG=noreorder
another improvement for debugging

Fixes: bf0af0f8ed ("zink: move all barrier-related functions to c++")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
4b7245284d zink: flush INDIRECT_BUFFER mem barrier for compute
this is usable in gfx and compute, so don't desync

Fixes: 3674839d11 ("zink: batch mem barrier hooks")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
5149b2a938 zink: unbind the ssbo slot being iterated, not the index of the buffer
this otherwise breaks ssbo binding

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
2f0749f8fd zink: use an intermediate variable for binding ssbo slots
this makes the bug more obvious

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
ecb4e6af21 zink: delete unnecessary pipeline stage flags from inference
I added these for completeness, but zink will never use them

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
98c411a2a1 zink: add PERSISTENT for db buffer maps
Fixes: 13c6ad0038 ("zink: use a single descriptor buffer for all non-bindless types")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Mike Blumenkrantz
8e75378a2d zink: delete persistent map tracking
this was never needed and never did anything: zink only uses COHERENT
memory, which is always available on queue submission, so it was all
just pointless code

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22907>
2023-05-09 00:56:19 +00:00
Jesse Natalie
ebe3b91ca0 microsoft/compiler: Avoid integer divides by 0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22787>
2023-05-09 00:33:59 +00:00
Jesse Natalie
a6ac1f5fbd spirv2dxil: Lower large temps to scratch
WARP has a temp register limit, and the control flow needed to convert
indirect to direct accesses on large temps ends up bloating shaders massively.
We can just go ahead and spill these large temps to scratch, which maps
to an alloca in DXIL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22787>
2023-05-09 00:33:59 +00:00
Jesse Natalie
a4ce095bad dzn: Use A4B4G4R4 instead of B4G4R4A4 when available
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22911>
2023-05-09 00:17:16 +00:00
Mike Blumenkrantz
95df5f2e8c zink: stringify unsupported prim restart log error
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22760>
2023-05-08 23:34:27 +00:00
Mike Blumenkrantz
e205a4839b zink: allow vk 1.2 timelineSemaphore feature if extension isn't supported
this is a weird case but whatever

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22760>
2023-05-08 23:34:27 +00:00
Jesse Natalie
421546c60d ci/windows: Pick up WARP 1.0.6 NuGet with lots of dzn fixes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22908>
2023-05-08 22:58:58 +00:00
Axel Davy
17fe6d1252 frontend/nine: Add debug driconf var force_features_emulation
This is useful to debug drivers to be able to
disable all specific d3d9 features and always trigger
the emulated path.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:21 +00:00
Axel Davy
824fad18b3 frontend/nine: Fix shader cap test for POSITIONT
This feature is almost never used in programmable
shaders so no issue was ever reported.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:21 +00:00
Axel Davy
2c8eb27e2c frontend/nine: Implement backup support for clip planes
Implement backup support for clip planes.
Driver support is still preferred, as the driver
can reuse the compilation of the core of the shader
to generate variants.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:21 +00:00
Mike Blumenkrantz
7a3b2f9485 tgsi_to_nir: handle PIPE_CAP_NIR_COMPACT_ARRAYS for clipdistance
drivers that set this cap require clipdistance to be passed as an
array of floats, so convert the existing stores during finalize

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:21 +00:00
Axel Davy
f0e9c225d8 docs/gallium: Clarify PIPE_CAP_CLIP_PLANES
Drivers with PIPE_CAP_CLIP_PLANES set to 0,
such as zink, ignore clip_plane_enable.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:21 +00:00
Axel Davy
3d5f3c5178 frontend/nine: initialize force_color_in_centroid
The first version of the shader didn't have proper
force_color_in_centroid field set.

That won't make much a difference (centroid is very
similar to no centroid) but it is still better.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:21 +00:00
Axel Davy
2f5f388a2c frontend/nine: Get rid of INTERPOLATE_COLOR
Some drivers don't handle it, and those who do replace it anyway
depending on the rasterizer setting. Keep the rasterizer setting
but replace the interpolation flag accordingly.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Axel Davy
33bb1e0410 frontend/nine: Enforce legacy pow behaviour
Gallium drivers used to implement the legacy behaviour.
It's not the case of all recent drivers, so implement
the legacy behaviour in nine.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Axel Davy
77c0230006 frontend/nine: Print warning incomplete position_t support
What would be missing for position_t to work in
vs programmable shaders when VS_WINDOW_SPACE_POSITION
is unavailable is to apply the inverse viewport transformation
similarly to what is done for ff vs.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Axel Davy
372c4549f4 frontend/nine: Improve VS_WINDOW_SPACE_POSITION fallback
Previously we would implement position_t by
applying the inverse of the viewport, and
advertising clipping was going to occur with
the cap CLIPTLVERTS.

However when the cap is advertised, clipping
is supposed to be disabled via sw emulation
when D3DRS_CLIPPING is set to FALSE.

Since we don't support that either, instead take the
approach of disabling at least depth clipping, and
not advertising the cap.

Ideally, clipping should be totally disabled.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Axel Davy
98a51b7794 frontend/nine: Implement backup support for pointsize
Improve support for drivers that don't support the
pointsize states.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Axel Davy
87fd0f29fc frontend/nine: Implement alpha test backup support
Implement alpha test emulation for drivers without support.

Driver support is still a preferred option, as driver
can reuse the compilation of the main core of the shader
to generate shader variants.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8315

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Axel Davy
31fe84f2bc frontend/nine: Drop max_ps_const_f
Replace max_ps_const_f with a constant.
In practice it already was always the
same value no matter the hw.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22644>
2023-05-08 21:41:20 +00:00
Mike Blumenkrantz
b4ea6adda5 zink: don't init mutable for swapchain src during blit
fixes #8993

cc: 23.1 <mesa-stable>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22876>
2023-05-08 21:17:17 +00:00
Mike Blumenkrantz
d2c63624c1 zink: don't init mutable resource bit for swapchain images
these are either already mutable (for srgb) or invalid usage

fixes #8970

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22876>
2023-05-08 21:17:17 +00:00
Lionel Landwerlin
cb8a878b53 intel: enable protected context creation along with engines
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22898>
2023-05-08 20:40:20 +00:00
Connor Abbott
cbc1c6a16f tu: Expose VK_EXT_fragment_density_map
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
761a1e9863 tu: Don't allow importing/exporting subsampled images with modifiers
Right now subsampled images are the same as non-subsampled images, this
will change when we actually implement them which will be an ABI break.
Disallow importing/exporting them with modifiers until that's stabilized
to force users to match the driver UUID.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
cc33082d00 tu/autotune: Always prefer GMEM with fragment density maps
If we encounter an app doing bad things where we want sysmem, we can fix
that later, but this seems like the right thing to do initially.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
6f2be52487 tu, ir3: Handle FDM shader builtins
Also, add the necessary transform to fixup gl_FragCoord.xy.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
b474ed1f3a nir, ir3: Add option to use unscaled FragCoord for input attachments
When rendering a scaled tile, we need to use the original, hardware
FragCoord when accessing input attachments that are on-tile (i.e. were
rendered to in a previous subpass) because they are also scaled in the
same way that FragCoord is scaled. For input attachments that aren't
already on-tile, however, we need to use the fixed gl_FragCoord. Add a
new intrinsic and a bitfield of input attachments which should use it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
715327ff85 tu: Implement FDM scaled loads/stores
In addition to scaling the rendering itself, we need to scale
loads/stores except when using subsampling, but subsampling isn't
implemented yet.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
fec372dfa5 tu: Implement FDM viewport patching
We scale the actual rendering by patching the viewport state. This is
helped by a HW bit to make the viewport index equal to the view index,
so that we can have a different scaling per-view.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
17c732f531 ir3: Record whether a shader writes gl_ViewportIndex
This will be needed by turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
05f96dd00f tu: Add core FDM patchpoint infrastructure
FDM is implemented pretty much entirely inside the driver, by patching
various structures for each bin. This adds the core infrastructure to
sample the density map, compute the scaled bin sizes we will use, create
patchpoints, and apply them at the start of each bin before executing
the IB2.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
ebb8e104a5 tu/cs: Add support for CS patching
In order to patch the command stream on the gpu, we need two features:

1. The ability to use a read-write BO instead of a read-only one, when
   patching might be performed.
2. The ability to get the iova of the current position after reserving
   some number of dwords, even with externally-allocated command
   streams.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
2aa3dc3bd0 tu: Implement sampling the fragment density map
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
64daede1c3 tu: Parse fragment density map attachment info
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:26 +00:00
Connor Abbott
ab75e0a126 freedreno/a6xx: Document per-view viewport in GRAS_SU_CNTL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
768dcc7a27 tu: Make dynamic viewport and scissor count more accurate
Because we delay emitting them until we know the pipeline, we can track
the actual count instead of taking the max.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
0f33d0392a tu: Merge RB_DEPTH_CNTL and RB_STENCIL_CONTROL drawstates
We're again running out of draw states, and this matches what gallium
does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
7673fcf206 tu: Precompute maximum views across all subpasses
We'll need this to know how many viewports to create.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
2668ba0ecd tu: Use dirty bit for scissor state
This will make patching it on-demand easier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
f3ffd963f5 tu: Add 3D GMEM load path
This is similar to old gens which couldn't support loading from GMEM
automatically. It will be needed for loads with a fragment density map,
because we need to scale the image when loading to GMEM.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
a294a6cfe6 freedreno/fdl: Expose view offset
Will be used by CPU sampling.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
31a9ac7f4e freedreno/fdl: Don't pre-shift image view pitch
We'll need the unshifted pitch for doing CPU reads.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
012e8f5c61 tu: Don't pre-shift depth and stencil pitch
Different uses in various registers and the texture descriptor have
different shifts, and we already had a few ugly workarounds to handle
this. Remove the foot-gun by specifying it in bytes and letting users
handle the shift themselves using the correct macro.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
Connor Abbott
f6902bf425 tu: Don't override depth for GMEM
Otherwise accesses to non-0 views of input attachments may be considered
out-of-bounds and return 0. This should've been removed when enabling
multiview for GMEM, not sure how it was missed.

Fixes: def56b531c ("tu: Support GMEM with layered rendering and multiview")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20304>
2023-05-08 19:59:25 +00:00
M Henning
cabbbbf0af nouveau/nir: Set isSigned on all atomic_imax/imin
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22889>
2023-05-08 18:57:14 +00:00
Mike Blumenkrantz
00627b4f8d aux/draw: add guardband clipping for lines
to comply with ES2+ line clipping rules, guardband clipping should be
used so that the rasterizer will clip lines without using clip planes

fixes (llvmpipe):
dEQP-GLES*.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES*.functional.clipping.line.wide_line_clip_viewport_corner

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17284>
2023-05-08 16:55:50 +00:00
Erik Faye-Lund
5fa9436617 aux/draw: check for lines when setting clipping-mode
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17284>
2023-05-08 16:55:50 +00:00
Mike Blumenkrantz
43802ea3b5 aux/draw: guard_band_points_xy -> guard_band_points_lines_xy
just a rename, no functional changes

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17284>
2023-05-08 16:55:50 +00:00
Mike Blumenkrantz
ea98df2a65 gallium: pipe_rasterizer_state::point_tri_clip -> point_line_tri_clip
this is just a rename, no functional changes

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17284>
2023-05-08 16:55:49 +00:00
Yiwei Zhang
04b3369921 ci: uprev virglrenderer to drop venus release patches
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22896>
2023-05-08 14:58:51 +00:00
Vitaliy Triang3l Kuzmin
4ed2616ac3 radv: Fix vk_instance_init vk_error instance use-after-free
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22887>
2023-05-08 14:09:49 +00:00
Vitaliy Triang3l Kuzmin
bb91bc9fd2 lavapipe: Fix vk_instance_init vk_error instance use-after-free
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22887>
2023-05-08 14:09:49 +00:00
Gert Wollny
dbc4c088fc r600/sfn: Fix iterator use
Reported by Coverity 1529462

Fixes:  e57643cf54
    r600/sfn: Add handling for R600 indirect access alias

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22903>
2023-05-08 13:45:40 +00:00
Marek Olšák
d90fc82569 radeonsi: do AMD_DEBUG=nodisplaydcc differently to also remove modifiers
Only modifiers with DCC retiling are removed for now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22771>
2023-05-08 13:08:01 +00:00
Marek Olšák
8c8b5a8fbd radeon: add radeon_info parameter into radeon_winsys::surface_init
to allow radeonsi to change radeon_info. The next commit will rely on it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22771>
2023-05-08 13:08:01 +00:00
Marek Olšák
ae6b928495 ac/gpu_info: disable display DCC on Raphael and Mendocino to improve power usage
Below is the summary from the power validation.. "it looks like the only
workload where I see savings from DCC is PLT and it is only about 65mW
which is just run to run variation. For Idle I am seeing ~280mW increase
in power, ~200mW increase for power_VideoCall, and ~80mW increase for VP"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22771>
2023-05-08 13:08:00 +00:00
Marek Olšák
e4c8ac5aae ac/surface: don't expose modifiers with DCC retiling if radeon_info forbids it
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22771>
2023-05-08 13:08:00 +00:00
Samuel Pitoiset
ce64300676 radv: remove ac_surf_info from radv_image
Introduce a helper to convert vk_image info to ac_surf_info instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22816>
2023-05-08 09:17:12 +00:00
Samuel Pitoiset
9e846ab1dc radv: use vk_image::extent instead of radv_image::info::{width,height,depth}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22816>
2023-05-08 09:17:12 +00:00
Samuel Pitoiset
cb721d5de5 radv: use vk_image::samples instead of radv_image::info::samples
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22816>
2023-05-08 09:17:12 +00:00
Samuel Pitoiset
d37b020428 radv: use vk_image::samples instead of radv_image::info::storage_samples
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22816>
2023-05-08 09:17:12 +00:00
Samuel Pitoiset
8e62bb0dfe radv: use vk_image::array_layers instead of radv_image::info::array_size
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22816>
2023-05-08 09:17:12 +00:00
Samuel Pitoiset
b7b9657a70 radv: use vk_image::mip_levels instead of radv_image::info::levels
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22816>
2023-05-08 09:17:12 +00:00
Samuel Pitoiset
87d31cadad radv: disable RB+ blend optimizations on GFX11 when a2c is enabled
Closes: #8222
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21313>
2023-05-08 07:22:21 +00:00
Christopher Snowhill
a6d4139e59 Corrects log print to produce hexadecimal base output
Matching the original %016lx, and the "0x" prefix which is still
in the format string.

Fixes: 53b77a8102 ("anv: remove 48bit address space checks")

Signed-off-by: Christopher Snowhill <kode54@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22882>
2023-05-07 21:33:18 +00:00
Lionel Landwerlin
fb13360546 intel/fs: reduce register usage for relocated constants
Commit bb8e31b7ed ("anv: avoid hardcoding instruction VA constant in
shaders") had a slight negative impact on shaders (Red Dead Redemption
2 in particular). Dropping a few shaders from SIMD32 to SIMD16.

With this change, it brings back all the dropped SIMD32 shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22872>
2023-05-07 19:38:04 +00:00
Asahi Lina
1aaf4bf40a asahi: Fix batch writer_syncobj cleanup
When an ACTIVE batch takes over the active writer role from a SUBMITTED
batch, the written BO has the syncobj from the latter even though the
writer is the former. This is correct and an intended state, but it
means that then we can't gate the syncobj cleanup in agx_batch_cleanup
on being the active writer, since the SUBMITTED batch won't be.

Fixes: asahi/mesa#18

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Asahi Lina
3f55eff0e5 asahi: Assert that freed BOs have no pending writers
This is just a sanity check, I haven't actually hit this case but if we
ever do something is very broken (e.g. BO refcounting bug).

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Alyssa Rosenzweig
d7d098679b asahi: Fix depth load/store flags
If depth_writemask is set, we need to write depth regardless of whether we run
the depth test, to write out the fixed-function fragment depth. This will matter
when we start honouring these flags.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Asahi Lina
d49e8f4d76 asahi: Clear batch->resolve on agx_batch_init
This has been broken forever, but it was only noticed with the ZS
load/store optimizations in the subsequent commits.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Alyssa Rosenzweig
d72e1418ce asahi: Implement transform feedback
This code was originally based on the Panfrost implementation, but has been
improved in a number of ways.

1. Transform feedback programs are dispatched generically with Gallium calls,
   rather than emitting something hardware-specific. This is cleaner and
   portable to future GPUs.

2. Transform feedback with indexed draws is now fixed, by lowering to an index
   buffer pull.

3. Transform feedback with buffer overflows is now fixed, by correctly
   bounds checking in transform feedback programs.

4. Transform feedback with strips/fans/loops are fixed, by correctly
   tessellating to the underlying primitives as required by OpenGL.

5. Transform feedback with QUADS is fixed, by tessellating to triangles as
   required by OpenGL.

That said, the code is still not in its final form.

1. It still does not support indirect draws. This will require a substantial
   overhaul to do tracking on the GPU instead of the CPU. Currently we force
   unroll indirect draws (slow but kosher in GL, treif in Vulkan). This isn't
   hard to solve but I'm not going to duplicate the code until the algorithms
   are otherwise complete because it's a lot easier to hack on the CPU versions
   than the GPU versions.

2. It still does not support primitive restart. This has especially nasty
   interactions with transform feedback. Again we force unroll to non-primitive
   restart forms, again slow but kosher in GL but treif in Vulkan. This is a lot
   harder to deal with. I sketched out something really nasty in my notebook
   (hinging on efficient GPU prefix sums) but I'm not in a hurry to type this
   out.

3. There will be interactions with geometry and tessellation shaders and I don't
   think I can get the core code here future-proofed without actually bringing
   up the new shader stages.

As such, this is a hard fork of the panfrost code for now, I'm not trying to
share the code (although it *would* clear out almost all of panfrost's transform
feedback related piglit failures).

Passes dEQP-GLES3.functional.transform_feedback.* and most of the relevant
piglits.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Alyssa Rosenzweig
25646c7772 asahi: Bump MAX_PUSH_RANGES to the worst-case
This shortcuts all headaches about how big this should be. It does increase
memory usage a bit if there are lots of shader variants compiled, but this
should be tolerable, and can be optimized later if so required. Thanks to the
previous commit, the disk cache size should be unaffected.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Alyssa Rosenzweig
c2f366ce64 asahi: Shrink disk cache size of push ranges
Only store the push ranges we actually need, not all of them. This should save
some disk space, while insulating us to MAX_PUSH_RANGES changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:37 -04:00
Alyssa Rosenzweig
e79e743674 agx: Lower I/O to scalar later
This lets us preserve vectorized stores for transform feedback shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:36 -04:00
Alyssa Rosenzweig
a561a6c468 agx: Validate that collect sources are the same size
RA asserts this, but by then if you've messed it up, the failure is inscrutable.
Let's check it in the validator for more pleasant debugging.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:36 -04:00
Alyssa Rosenzweig
9337f6a865 agx: Rework z/s emit
We were being sloppy with the sizes before. It mostly worked out, but there were
some corner cases where we would end up with mixed sized collects and that won't
end well for us. Let's rework the logic to make all the sizes explicit in NIR --
32-bit for depth and 16-bit stencil -- and then do the needed promotions to make
it happen in the AGX IR side.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:36 -04:00
Alyssa Rosenzweig
f4f9269b66 agx: Ensure load_frag_coord has the right sizes
In case .x isn't read, it'll be null which has the wrong size and will fail
the validation added later in this series. We fix this by padding with sized
undefs (something that exists of defined size but undefined value) rather than
nothingness (of undefined size).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:36 -04:00
Alyssa Rosenzweig
7f71e1bc2d agx/lower_address: Match multiplies, not only shifts
Sometimes a shader might index with a non-power-of-two stride. For example, if
it's indexing into an array of structures where the structure size is not a
power of two, we'll get a multiply with a constant as opposed to a shift. We
want to handle these cases, too. To do so, we generalize our pattern matching to
look for any kind of multiply (with our new helper), rather than hardcoding
logic for ishl. This eliminates right-shifts in a pile of compute shaders, which
makes me happy from a "I read lots of shader assembly when debugging"
perspective.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:36 -04:00
Alyssa Rosenzweig
032d7bd302 agx/lower_address: Add helper to match multiplies
Currently, we hardcode logic in the addressing chasing code to look for ishl
instructions that shift by constants. We can generalize this to looking for
integer multiplies by constants to optimize more addressing patterns. Add a
helper to do so.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:10:36 -04:00
Alyssa Rosenzweig
c837156e99 asahi: Bind staging resources as RENDER_TARGET
This doesn't matter in practice (at least with mesa/st), but it's more correct
technically.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:07:42 -04:00
Alyssa Rosenzweig
31c805d0aa agx: Don't wait at the end of the shader
This is totally pointless. This saves some waits at the ends of compute kernels
(waiting for stores to complete before terminating the thread). I don't know
how much this would matter for performance, since the hardware may have to do
these waits internally, but it makes the generated code less silly which is
always nice.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:39 -04:00
Alyssa Rosenzweig
3d138f4460 asahi: Copy resources if needed to shadow
This lets us shadow textures updated in the middle of rendering in Quake3.
They're big memcpys, but as long as the texture memory is cached it's ok. We use
a heuristic to avoid too many memcpys from uncached memory, which would cause
slideshow performance in quake.

We need to be careful to avoid shadowing shared resources, though, that's
invalid and would break WSI pretty hard.

It would be better to blit on the GPU for large shadowing, but that's more
involved and left for future work.

Reduces stuttering in Quake3.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:39 -04:00
Alyssa Rosenzweig
87e57eae09 asahi: Rename no colour output to tag write disable
Comparison with PowerVR's XML shows that this is the actual name... And it needs
to be set a bit more carefully than "no colour output" in order to get correct
behaviour for depth-only passes that use sample mask / discard. Fix the name
first, the extra conditions will come when they're needed for multisampling.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:39 -04:00
Alyssa Rosenzweig
e13f9caa25 agx: Fix packing for iadd with shift
Wrong bit pattern was packed, oops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:39 -04:00
Alyssa Rosenzweig
cd7e016961 asahi: Use device_load shift for VBO loads
When possible. Only occassionally possible because the loads are pretty limited
in the addressing arithmetic. This probably doesn't matter for performance but
it saves some noise in dEQP tests which makes for nicer debugging, plenty of
optimizations end up worth it for that alone.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:39 -04:00
Alyssa Rosenzweig
bd9c33e16a agx: Defeature fsub
All has_fsub does is fuse fsubs (they're unfused otherwise), no point doing that
if we're going to just going to lower.

shader-db is mostly noise.

total instructions in shared programs: 1487217 -> 1487035 (-0.01%)
instructions in affected programs: 22658 -> 22476 (-0.80%)
helped: 85
HURT: 2
helped stats (abs) min: 1.0 max: 12.0 x̄: 2.19 x̃: 1
helped stats (rel) min: 0.38% max: 2.46% x̄: 0.87% x̃: 0.65%
HURT stats (abs)   min: 1.0 max: 3.0 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.58% max: 1.08% x̄: 0.83% x̃: 0.83%
95% mean confidence interval for instructions value: -2.51 -1.67
95% mean confidence interval for instructions %-change: -0.97% -0.70%
Instructions are helped.

total bytes in shared programs: 10189996 -> 10189288 (<.01%)
bytes in affected programs: 158132 -> 157424 (-0.45%)
helped: 85
HURT: 2
helped stats (abs) min: 4.0 max: 48.0 x̄: 8.75 x̃: 4
helped stats (rel) min: 0.22% max: 1.44% x̄: 0.51% x̃: 0.38%
HURT stats (abs)   min: 6.0 max: 30.0 x̄: 18.00 x̃: 18
HURT stats (rel)   min: 0.90% max: 0.91% x̄: 0.91% x̃: 0.91%
95% mean confidence interval for bytes value: -9.98 -6.30
95% mean confidence interval for bytes %-change: -0.56% -0.39%
Bytes are helped.

total halfregs in shared programs: 462536 -> 462556 (<.01%)
halfregs in affected programs: 131 -> 151 (15.27%)
helped: 1
HURT: 4
helped stats (abs) min: 2.0 max: 2.0 x̄: 2.00 x̃: 2
helped stats (rel) min: 28.57% max: 28.57% x̄: 28.57% x̃: 28.57%
HURT stats (abs)   min: 4.0 max: 8.0 x̄: 5.50 x̃: 5
HURT stats (rel)   min: 12.77% max: 36.36% x̄: 25.01% x̃: 25.45%
95% mean confidence interval for halfregs value: -0.65 8.65
95% mean confidence interval for halfregs %-change: -18.64% 47.23%
Inconclusive result (value mean confidence interval includes 0).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:39 -04:00
Alyssa Rosenzweig
a33a813fe2 asahi: Use u_default_get_sample_position
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:05:36 -04:00
Alyssa Rosenzweig
1185ac931f agx: Remove bogus assert
I->mask isn't even valid for iter instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:59 -04:00
Alyssa Rosenzweig
7090b34ca5 asahi: Compress more texture targets
They should already work, we just need it enabled. The comment here claimed
(incorrectly) that there is no hardware support for linear 2D arrays. In fact,
there is support, it's just not advertised in the public Metal API. With some
awful tricks, I managed to reverse-engineer the hardware interface and hooked it
up, so we can take advantage of it now.

In fact, we can stop checking the target explicitly at all. The only case where
we can't compress is 1D/buffer textures, which are necessarily less than 16
height so will be dropped in the next check.

When I originally wrote this cuhange, dolphin's MeltyMoltenGalaxy trace with
specialized shaders at 4K was helped from 28fps to 43fps, which is massive :-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:59 -04:00
Alyssa Rosenzweig
9f39bbdee9 asahi: Use 2D array staging resources for cube/3D
Staging resources need to be linear for efficient CPU side mapping. This is a
problem for access to 3D and cube textures, since we don't have linear 3D
textures or linear cube textures. But we do have linear 2D array textures, which
can be reshaped to the same effect. So use a 2D array staging resource even for
3D textures and cube maps.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:59 -04:00
Alyssa Rosenzweig
c11c40eaf4 asahi: Explicitly ban MSAA, compression with linear
These get asserted later. It doesn't really matter but this makes our queries
more accurate. This came up when experimenting a debug option that forces linear
textures to be used as much as possible.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:59 -04:00
Alyssa Rosenzweig
fc88876329 agx: Handle linear 2D array textureSize()
We handle linear 2D arrays internally for blit shaders, so we need textureSize
to work for these. That requires some special casing, because there's a line
stride where the layer count would otherwise be. But it's not too bad.

Fixes
dEQP-GLES3.functional.shaders.texture_functions.texturesize.sampler2darray_*
when forcing linear textures.

Since we clamp array access to the maximum layer, we need textureSize() to work
for even the most basic array texturing. So this should fix blits from linear 2D
arrays as well, which finally unlocks support for compressed arrays/cubes/3D
textures.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:59 -04:00
Alyssa Rosenzweig
21d7049925 agx/lower_zs_emit: Fix progress returning
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:56 -04:00
Alyssa Rosenzweig
c8e331bf72 agx: Fix abs/neg propagation into fcmpsel
The first two sources are floats, the latter two sources and destination (and
hence the opcode) are not. Reflect that when packing and optimizing. Noticed
while debugging a silly dEQP test.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:56 -04:00
Alyssa Rosenzweig
632014ece0 agx: Handle splits of uniforms
This is straightforward, and can happen with certain u2u16 patterns.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:56 -04:00
Alyssa Rosenzweig
221b329a98 asahi: Track write to separate stencil
From the commit message of 94f7c011d6 ("v3d: Track write reference to the
separate stencil buffer."), anholt says:

   Otherwise, a blit from separate stencil may fail to flush the job that
   initialized it, or new drawing could fail to flush a blit reading from
   stencil.

Fixes
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8_stencil_only

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:56 -04:00
Alyssa Rosenzweig
2f907dd827 asahi: Identify XML for barycentric coordinates
Reading them from a fragment shader, not interpolating at custom ones.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:53 -04:00
Alyssa Rosenzweig
6f8cd310e4 asahi: Don't use depth/stencil staging blits
Our staging resources need to be LINEAR, however we don't support LINEAR with
DEPTH_STENCIL. The APIs don't actually require this, we just need to make sure
we don't generate internal staging blits to linear depth/stencil resources. For
uploading to compressed depth/stencil textures, we could use a depth/stencil
staging (since we can read from linear depth/stencil). However, for downloading
from compressed depth/stencil, we can't use a depth/stencil staging (since we
can't write linear depth/stencil). So, to handle both cases in a unified way,
just use colour blits for depth/stencil resources, using a compatible colour
format. This wouldn't be ok for an application to do itself, but within the
driver we know that it's safe, since there's no difference in memory between
depth/stencil and colour on AGX. In particular, Z16 is compressed exactly the
same as R16, Z8 as R8, and so on.

Fixes depth/stencil compression.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:53 -04:00
Alyssa Rosenzweig
a2546b71ed asahi: Minify width/height in create_surface
Otherwise framebuffer->width ends up being wrong with u_blitter, this is what
other drivers do. If we needed to render to depth/stencil with u_blitter, this
would cause us trouble.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:40 -04:00
Alyssa Rosenzweig
e9b471d1b3 asahi: Fix disk cache disable with AGX_MESA_DEBUG
We go to initialize the disk cache before we've compiled any shaders so
agx_compiler_debug is 0 at this point. Don't try to read it, instead go through
sa safe getter that will do the right thing.

Fixes: 5e9538c12e ("agx: isolate compiler debug flags")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:40 -04:00
Asahi Lina
fdec9f9c6b asahi: Fix batch writer tracking for null batches
When an empty batch is submitted, nothing happens. However, this batch
may have taken over writer status for some BOs which still have a
pending submitted batch that hasn't finished yet. If we drop writer
status at this point, two bad things happen:

- We spuriously clear bo->writer_syncobj, which breaks syncing on
  post-facto BO exports
- We break agx_sync_writer(), since we no longer know about the old
  writer to properly block on it.

To fix this (hopefully rare) case, take advantage of bo->writer_syncobj
to find the currently submitted writer batch again, and revert the
writer to it. If this turns out to be common and a performance issue
iterating through submitted batches for each written BO, we could
implement it with two writer batch arrays instead, one for active
writers and one for submitted writers... but hopefully that isn't
necessary.

This splits the cleanup path in agx_batch_cleanup() depending on whether
the cleanup is for a reset or proper completion. Since this is only used
within agx_batch.c, drop the public prototype while we're at it.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 09:00:06 -04:00
Asahi Lina
ae2b312ecb asahi: Add batch state debugging
I've had to reimplement this more than once, let's just make a flag for
it.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 08:59:41 -04:00
Janne Grunau
be3a1e2e88 asahi: Free low VA BOs correctly
These need the shader_base added to them. Fixes GEM_BIND errors after
usc_head provides VA without the VM_SHADER_START offset from returned
low VA.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 08:59:41 -04:00
Janne Grunau
222d6b45fa asahi: Fix typo in debug/error message helper macro
The typo is in the !__GLIBC__ case and was observed while building on
Alpine.

Fixes: 0a132b0640 ("asahi: Add a helper macro for debug/error messages")
Reported-by: mps
Tested-by: mps
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 08:59:41 -04:00
Asahi Lina
fba5a6b7e2 asahi: Enable 2xMSAA (for deqp)
This also just works, let's enable it (still gated on deqp).

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 08:58:42 -04:00
Asahi Lina
da60a34fa9 asahi: Broadcast Z for all components on texture fetch
Gallium expects this.

Related commit: 6cac9c748e

Co-authored-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 08:58:23 -04:00
Asahi Lina
6bbf10f3f2 asahi: Identify ZS resolve bits (tentative)
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
2023-05-07 08:58:23 -04:00
Konstantin Seurer
5503a08583 nir/lower_fp16_casts: Fix SSA dominance
Fixes: 01dfd65 ("nir: port fp16 casting code from dxil")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22804>
2023-05-07 09:57:29 +00:00
David Heidelberg
dabc52899b ci: uprev kernel to 6.3.1 with fixed patch for Adreno SMMU
Going from release candidate to stable kernel hopefully also improve
overall stability.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22873>
2023-05-06 20:20:50 +02:00
Rob Clark
6dc8afc19b freedreno/a6xx+: Use template to handle a6xx vs a7xx differences
This doesn't enable support for a7xx yet, but uses the new register pack
builders for registers that differ between a7xx and a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22837>
2023-05-06 15:52:57 +00:00
Rob Clark
526831ee2e freedreno/a6xx: Rework set_bin_size()
The open-coded flag param for "all the other bits" won't work once we
have register variants in play.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22837>
2023-05-06 15:52:57 +00:00
Gert Wollny
1ae09f3eff r600/sfn: fix cube to array lowering for LOD
Makes piglits related to texturequerylod and samplercubearray pass.

Fixes: 79ca456b48 ("r600/sfn: rewrite NIR backend")
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22883>
2023-05-06 09:35:09 +02:00
Gert Wollny
05a3eba094 r600/sfn: Ass support for image_samples
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8971

Fixes: 79ca456b48 ("r600/sfn: rewrite NIR backend")
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22883>
2023-05-06 09:20:55 +02:00
Erik Faye-Lund
19961f8195 docs/tgsi: use \ll and \gg for left and right shift
This renders a bit cleaner.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:35 +02:00
Erik Faye-Lund
abcd3423e9 docs/tgsi: fixup latex for TEX and TEX2
We need to excape the underscores for shadow_ref, as well as escape
non-math symbols.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:31 +02:00
Erik Faye-Lund
b7327296d5 docs/tgsi: do not use math-block for non-latex
This block isn't valid latex, so let's just use a pseudocode-block like
we do elsewhere here.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:27 +02:00
Erik Faye-Lund
f94c95ab5a docs/tgsi: use math-notations for conditionals
These are math-blocks, which is supposed to use math-notation for
conditionals. So let's change it to math notation.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:23 +02:00
Erik Faye-Lund
02908b26bb docs/tgsi: wrap overly long lines
While we're at it, use some alignment so the equations still reads
reasonably.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:17 +02:00
Erik Faye-Lund
d22ee93f97 docs/tgsi: fixup bad latex
It's better to split these two equations in two than to try to write
extra text that needs lots of escaping. This fixes the LaTeX rendering
to be somewhat readable.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:10 +02:00
Erik Faye-Lund
d8871ac2ed docs/tgsi: fix bad latex
We need empty spaces here, otherwise LaTeX thinks it's one equation, and
puts it all back onto one line.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:40:04 +02:00
Erik Faye-Lund
f84d1033c1 docs/tgsi: fix up indent
There's a mixture of indent styles here, with either two or three
spaces. We have standardized on three spaces for .rst-files in the
editorconfig, so let's apply that.

While we're at it, make sure math-blocks are indented into their
opcode-block. While the result might look the same most of the time,
this matters when we have textual explaination following math-blocks,
like we have in a few caess. If we don't indent the math there, we
end up with having to unindent the text following the math-block for it
not to count as a part of the math block, which looks very confusing
when reading the source code.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21893>
2023-05-05 21:39:57 +02:00
Eric Engestrom
cb4e4fc5de dzn: fix pointer type mismatch
../src/microsoft/vulkan/dzn_image.c: In function ‘dzn_GetImageMemoryRequirements2’:
    ../src/microsoft/vulkan/dzn_image.c:918:91: error: passing argument 6 of ‘dzn_ID3D12Device12_GetResourceAllocationInfo3’ from incompatible pointer type [-Werror=incompatible-pointer-types]
      918 |                                                            &image->castable_format_count, &image->castable_formats,
          |                                                                                           ^~~~~~~~~~~~~~~~~~~~~~~~
          |                                                                                           |
          |                                                                                           DXGI_FORMAT **
    In file included from ../src/microsoft/vulkan/dzn_private.h:67,
                     from ../src/microsoft/vulkan/dzn_image.c:24:
    ../src/microsoft/vulkan/dzn_abi_helper.h:64:107: note: expected ‘const DXGI_FORMAT * const*’ but argument is of type ‘DXGI_FORMAT **’
       64 |                                               const UINT *num_castable_formats, const DXGI_FORMAT *const *castable_formats,
          |                                                                                 ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~
    cc1: some warnings being treated as errors
    ninja: build stopped: subcommand failed.

Fixes: 71dbb3120a ("dzn: Use GetResourceAllocationInfo3 for castable formats")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22877>
2023-05-05 17:52:29 +01:00
Emma Anholt
191fa52d0c ci/turnip: Drop the IUB bug fallout flakes.
They haven't been seen since my fix landed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22863>
2023-05-05 15:27:37 +00:00
Emma Anholt
12c10f2fe9 ci/turnip: Drop an xfail from the full run for a recent fix.
Fixes: 2cbc24b9da ("turnip: fix buffer markers using wrong addresses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22863>
2023-05-05 15:27:37 +00:00
Emma Anholt
80b541513d ci/radv: Disable flaky heaven d3d9 trace.
10 flakes this month, starting with the noted job.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22863>
2023-05-05 15:27:37 +00:00
Emma Anholt
a8af504041 ci/radeonsi: Mark glx-make-current as flaky.
It no longer 100% crashes, but instead sometimes fails.

Fixes: 91b06ea8b2 ("Uprev Piglit to 2391a83d1639a7ab7bbea02853b922878687b0e5")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22863>
2023-05-05 15:27:37 +00:00
Marcin Ślusarz
d6ece34418 intel/tools: decode ACTHD printed by newer kernels
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22874>
2023-05-05 14:55:41 +00:00
Ruijing Dong
499f332a3a radeonsi/vcn: fix decoding bs buffer alignement issue.
reason:
  in some cases, bs buffer size could cause assertion,
  and some bitstreams of certain resolutions could
  not be decoded.

solution:
  to align the bs buffer to 128.

fixes: 4f1646d73f

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22844>
2023-05-05 14:20:21 +00:00
Mike Blumenkrantz
6d84b34359 zink: add ZINK_DEBUG=optimal_keys
it's otherwise very annoying to figure out why this may or may not be
available

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22854>
2023-05-05 12:32:40 +00:00
Mike Blumenkrantz
dcf3adbde7 zink: disable EXT_shader_object if !optimal_keys
this has the same requirements as GPL and then some

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22854>
2023-05-05 12:32:40 +00:00
Mike Blumenkrantz
4cb900609f zink: break out optimal key handling into separate function
this is growing to be much larger than the original conditional

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22854>
2023-05-05 12:32:40 +00:00
Mike Blumenkrantz
13f98c8101 zink: move EXT_shader_object check to another place
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22854>
2023-05-05 12:32:40 +00:00
Lionel Landwerlin
e64f5f261e anv: increase instruction heap to 2Gb
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8917
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
2023-05-05 14:48:15 +03:00
Lionel Landwerlin
c60e94d61f anv: make internal address space allocation more dynamic
We're about to manipulate these pools and dealing with the fix address
ranges is painful.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
2023-05-05 14:48:15 +03:00
Lionel Landwerlin
843afd4c63 anv: link anv_bo to its VMA heap
We want to add more heaps in the future and so not having to do
address checks to find out in what heap to release a BO is convinient.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
2023-05-05 14:48:15 +03:00
Lionel Landwerlin
bb8e31b7ed anv: avoid hardcoding instruction VA constant in shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
2023-05-05 14:48:15 +03:00
Lionel Landwerlin
53b77a8102 anv: remove 48bit address space checks
All the supported platforms should have 36+ bits of virtual address
space.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
2023-05-05 14:48:15 +03:00
Tapani Pälli
c35d430460 isl: fix layout for comparing surf and view properties
These asserts were checking isl_format_layout against itself, change
to compare surface format layout against view format layout.

Fixes: 628bfaf1c6 ("intel/isl: Add some sanity checks for compressed surfaces")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22790>
2023-05-05 08:48:53 +00:00
Lionel Landwerlin
9471ffa70a intel/fs: fix scheduling of HALT instructions
With the following test :

dEQP-VK.spirv_assembly.instruction.terminate_invocation.terminate.no_out_of_bounds_load

There is a :

shader_start:
   ...                                 <- no control flow
   g0 = some_alu
   g1 = fbl
   g2 = broadcast g3, g1
   g4 = get_buffer_size g2
   ...                                 <- no control flow
   halt                                <- on some lanes
   g5 = send <surface>, g4

eliminate_find_live_channel will remove the fbl/broadcast because it
assumes lane0 is active at get_buffer_size :

shader_start:
   ...                                 <- no control flow
   g0 = some_alu
   g4 = get_buffer_size g0
   ...                                 <- no control flow
   halt                                <- on some lanes
   g5 = send <surface>, g4

But then the instruction scheduler will move the get_buffer_size after
the halt :

shader_start:
   ...                                 <- no control flow
   halt                                <- on some lanes
   g0 = some_alu
   g4 = get_buffer_size g0
   g5 = send <surface>, g4

get_buffer_size pulls the surface index from lane0 in g0 which could
have been turned off by the halt and we end up accessing an invalid
surface handle.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20765>
2023-05-05 00:43:25 +03:00
Timur Kristóf
9b6945bb65 amd: Cleanup old GS intrinsics code.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:59 +00:00
Timur Kristóf
5bb04dc528 ac/nir/ngg: Use sendmsg in NGG lowering.
There is no need to use alloc_vertices_and_primitives anymore,
because it will be compiled to sendmsg anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:59 +00:00
Timur Kristóf
025c1f5174 ac/nir: Emit legacy GS DONE signal in NIR.
Legacy GS needs to emit a DONE signal at the end. Do this in NIR
instead of in the backends.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:59 +00:00
Timur Kristóf
fffb2b33af ac/nir: Use sendmsg in legacy GS lowering.
Remove the GS intrinsics completely and emit the sendmsg here
instead of in the backend. This is done to simplify backend code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Timur Kristóf
009f0623ff ac/llvm: Clarify arguments of ac_build_sendmsg.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Timur Kristóf
28d740fc0b amd: Move sendmsg defines to ac_shader_util.
Will be used by ac/nir legacy and NGG lowerings.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Timur Kristóf
f66281c7fb amd: Add and implement gs_wave_id sysval.
Contains a global wave ID of legacy GS waves.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Timur Kristóf
c1591bfc28 amd: Add and implement sendmsg_amd intrinsic.
This intrinsic is going to be used for simplifying GS code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Timur Kristóf
38447b3f63 aco: Disallow constant propagation on SOPP and fixed operands.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Rhys Perry
d5398b62da aco/ra: create M0-affinities for s_sendmsg
v2 by Timur Kristóf:
Do not add the affinity for instructions that can't write m0
reliably, such as readlane-like instructions on GFX8.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22690>
2023-05-04 19:08:58 +00:00
Kenneth Graunke
9dd6fcd9ec intel/compiler: UNDEF SubgroupInvocation's register
This value takes a few instructions to create, involving expanding
V-immediates, adding 8 for SIMD16, and so on.  We can mark it UNDEF
so that it's clear that although these are partial writes, we are
actually defining the entire value.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22835>
2023-05-04 18:17:26 +00:00
Kenneth Graunke
4913f54a1f intel/compiler: UNDEF comparisons with smaller than 32-bit
Comparisons which produce 32-bit boolean results (0 or 0xFFFFFFFF)
but operate on 16-bit types would first generate a CMP instruction
with W or HF types, before expanding it out.  This CMP is a partial
write, which leads us to think the register may contain some prior
contents still.  When placed in a loop, this causes its live range
to extend beyond its real life time.

Mark the register with UNDEF first so that we know that no prior
contents exist and need to be preserved.

This affects:
flt32, fge32, feq32, fneu32, ilt32, ult32, ige32, uge32, ieq32, ine32

On one of Cyberpunk 2077's most complex compute shaders, this reduces
the maximum live registers from 696 to 537 (22.8%).  Together with the
next patch, Cyberpunk's spills and fills are cut by 10.23% and 9.19%,
respectively.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22835>
2023-05-04 18:17:26 +00:00
Faith Ekstrand
fcdf28ad94 vulkan: Document vk_physical_device::supported_features
While we're here, move it to after supported extensions to stay
consistent with the vk_physical_device_init parameters.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22845>
2023-05-04 17:38:30 +00:00
antonino
96cd034e3c zink: take location_frac into account in pv emulation
The pv mode emulation code was not taking into account the location_frac
of variables, they where beeing stored in a 1D array leading to
collisions.

Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22856>
2023-05-04 16:28:44 +00:00
Illia Polishchuk
0843d4cbc3 nir: switch to a normal sampler for ARB program with not depth textures
It is undefined behavior when an ARB assembly or shadow2d GLSL func
uses SHADOW2D target with a texture in not depth format.
In this case AMD and NVIDIA automatically replaces SHADOW sampler
with a normal sampler and some games like Penumbra Overture which abuses
this UB works fine but breaks with mesa.

Replace the shadow sampler with a normal one here by recompiling
the ARB program variant

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8425
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22147>
2023-05-04 15:43:51 +00:00
Illia Polishchuk
f698d47571 drirc: add allow_sampled_tex_copy option
From OpenGL spec 8.6
"An INVALID_OPERATION error is generated if the object bound to
READ_FRAMEBUFFER_BINDING is framebuffer complete and its effective
value of SAMPLE_BUFFERS (see section 9.2.3.1) is one"

But some games might do this

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8425
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22147>
2023-05-04 15:43:51 +00:00
Collabora's Gfx CI Team
9e764eb8f8 Uprev Piglit to 79a084c56b6dd79f7c3a97b57a72963121ebb1e6
355ad6bcb2...79a084c56b

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22548>
2023-05-04 13:45:30 +00:00
Donald Robson
5edbf17e90 pvr: Move heap initialisation out of pvr_winsys_helper.
This code will not be used by the new KMD, so it is being moved out of
this shared code area.

Signed-off-by: Donald Robson <donald.robson@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22826>
2023-05-04 13:18:48 +00:00
David Heidelberg
2b4ce498ee panvk: clear dangling pointers
Fixes:
```
[829/1646] Compiling C object src/panfrost/vulkan/libpanvk_v6.a.p/panvk_vX_meta_clear.c.o
In function 'panvk_meta_clear_zs_img',
    inlined from 'panvk_v6_CmdClearDepthStencilImage' at ../src/panfrost/vulkan/panvk_vX_meta_clear.c:457:7:
../src/panfrost/vulkan/panvk_vX_meta_clear.c:415:26: warning: storing the address of local variable 'view' in '((struct pan_fb_info *)((char *)commandBuffer + 144))[23].zs.view.zs' [-Wdangling-pointer=]
  415 |       fbinfo->zs.view.zs = &view;
      |       ~~~~~~~~~~~~~~~~~~~^~~~~~~
../src/panfrost/vulkan/panvk_vX_meta_clear.c: In function 'panvk_v6_CmdClearDepthStencilImage':
../src/panfrost/vulkan/panvk_vX_meta_clear.c:393:26: note: 'view' declared here
  393 |    struct pan_image_view view = {
      |                          ^~~~
../src/panfrost/vulkan/panvk_vX_meta_clear.c:393:26: note: 'commandBuffer' declared here
[844/1646] Compiling C object src/panfrost/vulkan/libpanvk_v7.a.p/panvk_vX_meta_clear.c.o
In function 'panvk_meta_clear_zs_img',
    inlined from 'panvk_v7_CmdClearDepthStencilImage' at ../src/panfrost/vulkan/panvk_vX_meta_clear.c:457:7:
../src/panfrost/vulkan/panvk_vX_meta_clear.c:415:26: warning: storing the address of local variable 'view' in '((struct pan_fb_info *)((char *)commandBuffer + 144))[23].zs.view.zs' [-Wdangling-pointer=]
  415 |       fbinfo->zs.view.zs = &view;
      |       ~~~~~~~~~~~~~~~~~~~^~~~~~~
../src/panfrost/vulkan/panvk_vX_meta_clear.c: In function 'panvk_v7_CmdClearDepthStencilImage':
../src/panfrost/vulkan/panvk_vX_meta_clear.c:393:26: note: 'view' declared here
  393 |    struct pan_image_view view = {
      |                          ^~~~
../src/panfrost/vulkan/panvk_vX_meta_clear.c:393:26: note: 'commandBuffer' declared here
```

Cc: mesa-stable

Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22829>
2023-05-04 15:02:44 +02:00
Lionel Landwerlin
f3d648d20d anv: implement VK_KHR_ray_tracing_position_fetch
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <f{merge_request.web_url}>
2023-05-04 11:25:41 +00:00
Lionel Landwerlin
5cdcc22736 intel/nir/rt: wire position fetch intrinsic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <f{merge_request.web_url}>
2023-05-04 11:25:41 +00:00
Lionel Landwerlin
03f0f70adf intel/nir/rt: use a single load for instance leaf loading
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <f{merge_request.web_url}>
2023-05-04 11:25:41 +00:00
Lionel Landwerlin
1e0e4657f9 spirv/nir: wire ray interection triangle position fetch
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <f{merge_request.web_url}>
2023-05-04 11:25:41 +00:00
Lionel Landwerlin
dcdf008d6f spirv: update to latest headers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <f{merge_request.web_url}>
2023-05-04 11:25:41 +00:00
Lionel Landwerlin
3e726435cc vulkan: bump headers to 1.3.249
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <f{merge_request.web_url}>
2023-05-04 11:25:41 +00:00
Jarred Davies
eb233576d8 pvr: Reduce free list initial size when multiple devices are created
Will hopefully reduce the memory load when running dEQP.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22330>
2023-05-04 11:06:57 +00:00
Jarred Davies
6005d28249 pvr: Use vk_device's enabled features struct
Avoids duplicating the struct in pvr_device and fixes uninitialized
accesses when ppEnabledFeatures was NULL.

Noticed when running valgrind over dEQP.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22331>
2023-05-04 10:51:11 +00:00
Jarred Davies
0164425b38 pvr: Don't ralloc build context from compiler
rogue_compiler is allocated for each VkPhysicalDevice which means it can
be used from multiple threads when compiling. Allocating the build context
from this will lead to race conditions as ralloc is not thread safe.

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22332>
2023-05-04 10:35:30 +00:00
nihui
2cc0b4a813 panvk: port panvk_logi to vk_logi
Signed-off-by: Hui Ni <shuizhuyuanluo@126.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22772>
2023-05-04 10:15:35 +00:00
James Glanville
ba118bb3bc pvr: Adjust clear's region clip words
Co-Authored-By: : Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22822>
2023-05-04 08:42:31 +00:00
James Glanville
beffefbf21 pvr: Fix incorrect PBE packmode for S8_UINT
Fixes:
dEQP-VK.pipeline.monolithic.stencil.format.d24_unorm_s8_uint.states
  .fail_keep.pass_keep.dfail_keep.comp_always

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22822>
2023-05-04 08:42:31 +00:00
Karmjit Mahil
0aafa22a1c pvr: Don't advertise S8_UINT support
S8_UINT is not a requirement for Vulkan 1.0.

Revert "pvr: Add initial support for VK_FORMAT_S8_UINT".

This reverts commit 220356e083.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22822>
2023-05-04 08:42:31 +00:00
SoroushIMG
57d6cb2f1e pvr: fix sync waiting while using pvrsrvkm
pvrsrvkm type sync objects can have a pending state where,
the fence is unsignaled but does not have a valid sync file
due to not yet being submitted to kernel.

The wait function therefore needs to handle these types of syncs
through a spin loop.

This was seen as crashes in dEQP-VK.synchronization.timeline_semaphore.*

Signed-off-by: SoroushIMG <soroush.kashani@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22822>
2023-05-04 08:42:31 +00:00
Erik Faye-Lund
9e75abb61b docs: fixup About Mesa3D.org link
This link is supposed to point to www.mesa3d.org, not docs.mesa3d.org.
Let's fix it up!

Fixes: 7da0482636 ("docs: add custom html theme")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22825>
2023-05-04 07:22:56 +00:00
Erik Faye-Lund
360feea99c llvmpipe: fixup refactor copypasta
I accidentally set this state based on the wrong state when refactoring,
whoops!

Fixes: a1846e3926 ("llvmpipe: merge all rasterizer-bind functions")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22832>
2023-05-04 06:47:03 +00:00
Erik Faye-Lund
6ea7bdb152 mesa/main: drop use_legacy_math_rules
Seems the only thing that really needs this is fpow(0, 0), which should
return NaN, but then gets multiplied with zero. Let's fix that by doing
a bcsel instead of fmul to select the result here. While we're at it,
get rid of the fabs for stop, which isn't needed.

This fixes a piglits failure for most (if not all?) drivers that doesn't
support legacy math rules.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22789>
2023-05-04 06:11:44 +00:00
Thomas H.P. Andersen
0a9473b32d r600: remove unused code
With the cleanup in 337dc7d766 this code
became unused.

Fixes: 337dc7d766 ("r600: remove TGSI code path")
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22743>
2023-05-04 05:04:53 +00:00
David Heidelberg
1c1855cc00 nir/lower_io_to_vector: initialize base
Prevent GCC warning:
```
[230/1401] Compiling C object src/compiler/nir/libnir.a.p/nir_lower_io_to_vector.c.o
In function 'get_flat_type',
    inlined from 'create_new_io_vars' at ../src/compiler/nir/nir_lower_io_to_vector.c:300:10:
../src/compiler/nir/nir_lower_io_to_vector.c:208:14: warning: 'base' may be used uninitialized [-Wmaybe-uninitialized]
  208 |       return glsl_array_type(glsl_vector_type(base, 4), slots, 0);
      |              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/compiler/nir/nir_lower_io_to_vector.c: In function 'create_new_io_vars':
../src/compiler/nir/nir_lower_io_to_vector.c:163:24: note: 'base' was declared here
  163 |    enum glsl_base_type base;
      |                        ^~~~
```

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8957

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22840>
2023-05-04 03:44:00 +00:00
Jesse Natalie
be34257197 dzn: Delete queue-level event waits
These are unneeded. Events can't be used to indefinitely stall work
like you can with a semaphore or timeline semaphore. The signals
still need to happen so that execution will modify the state that
can be polled from the CPU though.

Fixes dEQP-VK.synchronization.basic.event.single_submit_multi_command_buffer

Fixes: 04fa6c71 ("dzn: Batch command lists together")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22842>
2023-05-04 03:27:39 +00:00
Jesse Natalie
7d34fe04e4 dzn: Support separate depth/stencil resolves via blits
In theory, ResolveSubresourceRegion should be able to resolve just
the depth or just the stencil. In practice, WARP had bugs, which
means that was never tested, so just do it via blits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22836>
2023-05-04 03:10:56 +00:00
Jesse Natalie
dfc88a536b dzn: Support all available depth/stencil resolve modes
Fixes dEQP-VK.imageless_framebuffer.depth_stencil_resolve and
dEQP-VK.renderpass2.depth_stencil_resolve.misc.properties

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22836>
2023-05-04 03:10:56 +00:00
Jesse Natalie
3f641538d3 dzn: Augment blit resolve to support min/max/sample-zero modes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22836>
2023-05-04 03:10:56 +00:00
Dave Airlie
fa938dd975 vulkan: write beta extensions into generator scripts.
Updated by: Hyunjun Ko <zzoon@igalia.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21806>
2023-05-04 02:40:06 +00:00
Dave Airlie
54113f5a60 vulkan/cmd_queue: handle beta extensions.
Since this was moved to vulkan_core.h, we have to add the beta header
ourselves when required.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21806>
2023-05-04 02:40:06 +00:00
Marek Olšák
eb0307107d nir: add/update comments for gl_access_qualifier
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22769>
2023-05-04 01:55:22 +00:00
Marek Olšák
820c50ada3 nir: rename ACCESS_STREAM_CACHE_POLICY -> ACCESS_NON_TEMPORAL and document
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22769>
2023-05-04 01:55:22 +00:00
Luna Nova
c38bf95a06 device_select_layer: log selectable devices if MESA_VK_DEVICE_SELECT_DEBUG or DRI_PRIME_DEBUG are set
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19101>
2023-05-03 20:55:51 -04:00
Luna Nova
208e1824f1 device_select_layer: add MESA_VK_DEVICE_SELECT_DEBUG which logs why default selection was made
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19101>
2023-05-03 20:55:51 -04:00
Luna Nova
571ce2e481 device_select_layer: pick a default device before applying DRI_PRIME
This ensures DRI_PRIME works if there are multiple CPU devices available

Suggested by @pepp

Fixes: afa1fba1 ("vulkan/device_select: don't pick a cpu driver as the default")

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19101>
2023-05-03 20:55:51 -04:00
Luna Nova
f958a45a71 device_select_layer: apply DRI_PRIME even if default device is > 1 to match opengl behavior
This fixes DRI_PRIME=1 doing nothing if the GPU order is [dGPU, dGPU,
iGPU, cpu] (or more GPUs than that) and the iGPU is the default GPU.

Fixes: afa1fba1 ("vulkan/device_select: don't pick a cpu driver as the default")

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19101>
2023-05-03 20:55:51 -04:00
Luna Nova
7fcda2b4e3 device_select_layer: fix inverted strcmp in device_select_find_dri_prime_tag_default (v1)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7498
Fixes: 9bc5b2d169 ("vulkan: add initial device selection layer. (v6.1)")

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19101>
2023-05-03 20:55:51 -04:00
Mike Blumenkrantz
ed212b8cce svga: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
6cb3c6c768 llvmpipe: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
f05caed02e vc4: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
8f690c4f78 v3d: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
4809274c18 softpipe: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
7a3deb05a6 iris: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
b1449e3e67 i915: use util_unreference_framebuffer_state to unref fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
b86f0280d7 i915: use util_copy_framebuffer_state to set fb state
Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Mike Blumenkrantz
c686c98a79 cso: unbind fb state when unbinding the context
this avoids leaking/ballooning references

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03 23:45:36 +00:00
Yiwei Zhang
cb865ac721 ci: carry venus-protocol 1.0 release patches in virglrenderer
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22547>
2023-05-03 22:42:30 +00:00
Yiwei Zhang
bdc82f52d7 docs: update Virtio-GPU Venus driver page
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22547>
2023-05-03 22:42:30 +00:00
Yiwei Zhang
7d76038712 meson/ci: promote virtio-experimental to virtio
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22547>
2023-05-03 22:42:30 +00:00
Yiwei Zhang
e9c26e6920 venus: adopt venus protocol release
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22547>
2023-05-03 22:42:30 +00:00
Yiwei Zhang
234ae64c92 venus: stop query experimental features
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22547>
2023-05-03 22:42:29 +00:00
Emma Anholt
ac1dff603e ci/zink+anv: Test piglit quick_gl pre-merge, dropping a few KHR-GL46 tests.
piglit provides way more important coverage than these bits of GL46, and
has been regressing regularly.  Thanks to dropping the long KHR-GL46
tests, this is now completing faster than it was before, and things will
get even better with
https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/804.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22811>
2023-05-03 21:45:17 +00:00
Emma Anholt
fee8520937 ci/zink: Update more xfails for tgl piglit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22811>
2023-05-03 21:45:17 +00:00
Emma Anholt
c213bedd11 Revert "ci/zink: Try to update TGL results for new MSAA behavior."
This reverts commit 74a8f118a2.

This should have been in !22753.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22811>
2023-05-03 21:45:17 +00:00
Juston Li
f79aba46da venus: use pipelineCacheUUID for shader cache id
Use the host driver pipelineCacheUUID as the shader cache id. This is
just used as an identifier for fossilize replay since venus utilizes
the host side shader cache anyways.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22634>
2023-05-03 21:29:31 +00:00
Mike Blumenkrantz
2e3ce614b9 zink: sync queries at the end of cmdbufs
with tc, query results can be fetched async, and it's impossible to
sync tc in this scenario. to avoid needing to sync when a sync is not
possible, sync ahead of time in all cases

Fixes: 7c96e98975 ("zink: always start/stop/resume queries inside renderpasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22827>
2023-05-03 20:08:07 +00:00
Mike Blumenkrantz
738c2eacf3 zink: null some descriptor buffer pointers during destruction
this shouldn't actually be needed? and yet...

Fixes: 13c6ad0038 ("zink: use a single descriptor buffer for all non-bindless types")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22827>
2023-05-03 20:08:07 +00:00
Mike Blumenkrantz
d5ceb4770b zink: set depth dynamic state values unconditionally
spec requires the state values to be set if the dynamic state is
enabled regardless of whether they will take effect

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22827>
2023-05-03 20:08:07 +00:00
Faith Ekstrand
d1e565a8eb nouveau/nir: image_samples/size don't have coordinates
Without this, it treats the src[1] as a coordinate (it's actually LOD)
and may try to read more than one component.  I don't think this usually
hurts anything as the coordinate should get ignored later but it can
result in OOB memory reads while translating NIR.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22834>
2023-05-03 19:52:09 +00:00
Mike Blumenkrantz
f4be2e3437 zink: disable a630 traces
I can't even run a fair number of these locally without a gpu hang,
and there are no validation errors, so just disable the whole thing
until at least #8874 can be resolved

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22831>
2023-05-03 19:32:05 +00:00
M Henning
d7e37389bc nv50/codegen: Set lower_uniforms_to_ubo
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22815>
2023-05-03 19:18:08 +00:00
Boris Brezillon
e6bcbd57e3 panfrost: Check blend enabled state in pan_allow_forward_pixel_to_kill()
The shader can write to a specific RT, but the blend descriptor gets
to decide if the RT is really updated. We need to take that into
account when initializing the rt_written local variable in
pan_allow_forward_pixel_to_kill() otherwise we might get inconsistent
results.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22465>
2023-05-03 19:02:21 +00:00
Daniel Stone
300327ba19 ci/zink: Disable Freedoom trace on ANV
Apparently it's flaky.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22819>
2023-05-03 18:28:55 +00:00
Martin Roukala (né Peres)
36bb5f1f70 radv/ci: document a series of recent regressions
No time to bisect all the regressions, so I am just including the
GOOD/BAD commits if anyone is interested to bisect.

One thing is for sure, !22753 is responsible for at least tens of
these issues.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22820>
2023-05-03 17:41:30 +00:00
Hans-Kristian Arntzen
11a853e912 wsi/wayland: Do not assert that all present IDs have been waited on.
EXT_swapchain_maintenance1 allows destruction when the swapchain fence
is complete. That may signal before we have dispatched all present
waits. Just discard those presentation feedbacks.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22682>
2023-05-03 16:09:10 +00:00
Hans-Kristian Arntzen
577b3c7bb2 wsi/wayland: Simplify wait logic for present wait.
CLOCK_REALTIME is generally problematic due to NTP.
Use normal MONOTONIC waits for condition variable,
and remove the timedlock. The lock is never held in a blocking fashion,
so there is little need for a timed lock here.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22682>
2023-05-03 16:09:10 +00:00
Daniel Stone
43f868d175 wsi/wayland: Support VK_KHR_present_wait
Use the wp_presentation extension to detect when a given presentation
has taken effect.

Since this protocol is not guaranteed to be supported,
it must be enabled through driconf (vk_khr_present_wait=true) for the time being.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Co-authored-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22682>
2023-05-03 16:09:10 +00:00
Simon Ser
47cd010931 wayland: generalize wayland-protocols code generation
Make it easy to add a new protocol to the list without duplicating
logic.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22682>
2023-05-03 16:09:09 +00:00
Friedrich Vock
0b251d4362 radv: Add driconf to always drain waves before writing timestamps
UE4's Vulkan backend uses vkCmdWriteTimestamp with TOP_OF_PIPE
to measure how long a workload took in the GPU Benchmark. This is wrong
and writes the timestamp before the workload is actually finished,
making it seem like the GPU is much faster than it actually is.
This caused subsequent benchmark passes to contain way too big workloads,
which caused soft hangs on slower GPUs.

Fixes GPU hangs with Splitgate during automatic settings configuration.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22823>
2023-05-03 15:24:00 +00:00
Friedrich Vock
284e604872 radv: Always call si_emit_cache_flush before writing timestamps
In case of barriers with TOP_OF_PIPE as dst stage, writing timestamps
immediately would be invalid.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22823>
2023-05-03 15:24:00 +00:00
Samuel Pitoiset
b59935e2e7 radv/meta: rename dest to dst
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22794>
2023-05-03 13:45:38 +00:00
Samuel Pitoiset
63b5b93dd3 radv: replace radv_get_levelCount() by vk_image_subresource_level_count()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22794>
2023-05-03 13:45:38 +00:00
Samuel Pitoiset
963f51158d radv: replace radv_get_layerCount by vk_image_subresource_layer_count()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22794>
2023-05-03 13:45:38 +00:00
Samuel Pitoiset
a77c88f1e8 radv: fix fast-clearing images with VK_REMAINING_{ARRAY_LAYERS,MIP_LEVELS}
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22794>
2023-05-03 13:45:38 +00:00
Samuel Pitoiset
de61eddc02 radv: fix invalid type for usage in radv_get_buffer_memory_requirements()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22794>
2023-05-03 13:45:38 +00:00
Iago Toral Quiroga
c950098abb broadcom/compiler: move buffer loads to lower register pressure
If we are trying to lower register pressure this can make a big
difference in some cases. To avoid adding even more strategies,
merge this with disabling ubo load sorting, since they are basically
trying to do the same.

total instructions in shared programs: 12848024 -> 12844510 (-0.03%)
instructions in affected programs: 236537 -> 233023 (-1.49%)
helped: 195
HURT: 87
Instructions are helped.

total uniforms in shared programs: 3815601 -> 3814932 (-0.02%)
uniforms in affected programs: 31773 -> 31104 (-2.11%)
helped: 67
HURT: 115
Inconclusive result (value mean confidence interval includes 0).

total max-temps in shared programs: 2210803 -> 2210622 (<.01%)
max-temps in affected programs: 9362 -> 9181 (-1.93%)
helped: 114
HURT: 34
Max-temps are helped.

total spills in shared programs: 2556 -> 2330 (-8.84%)
spills in affected programs: 1391 -> 1165 (-16.25%)
helped: 39
HURT: 9

total fills in shared programs: 3840 -> 3317 (-13.62%)
fills in affected programs: 2379 -> 1856 (-21.98%)
helped: 39
HURT: 23

total sfu-stalls in shared programs: 21965 -> 21978 (0.06%)
sfu-stalls in affected programs: 2618 -> 2631 (0.50%)
helped: 45
HURT: 81
Inconclusive result (value mean confidence interval includes 0).

total inst-and-stalls in shared programs: 12869989 -> 12866488 (-0.03%)
inst-and-stalls in affected programs: 238771 -> 235270 (-1.47%)
helped: 193
HURT: 87
Inst-and-stalls are helped.

total nops in shared programs: 303501 -> 303274 (-0.07%)
nops in affected programs: 4159 -> 3932 (-5.46%)
helped: 87
HURT: 105
Inconclusive result (value mean confidence interval includes 0).

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22824>
2023-05-03 13:01:58 +00:00
Erik Faye-Lund
efc94390f7 docs: fix edit-links
When making a custom-theme, I accidentally hard-coded the edit-URL to
point to the index-file in the mesa3d.org repo instead of pointing to
the correct file in our docs. This fixes that, so the "Edit this
page"-links in the footer works the same way as the old "Edit on
GitLab"-links did.

Fixes: 7da0482636 ("docs: add custom html theme")
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22791>
2023-05-03 12:56:59 +00:00
Amber
2cbc24b9da turnip: fix buffer markers using wrong addresses
Fixes failures in dEQP-VK.api.buffer_marker.*

Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22792>
2023-05-03 11:58:49 +00:00
Bas Nieuwenhuizen
df08ed7d1c radv: Move all the dirty flags from TES binding to TCS binding.
With merged shaders we might not have an explicit TES.

Fixes: 879ddf9720 ("radv: rework binding shaders to cmdbuf by introducing new helpers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8939
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22784>
2023-05-03 11:24:16 +00:00
Georg Lehmann
f572344901 radv: use lower_ballot_bit_count_to_mbcnt_amd
Foz-DB Navi21:
Totals from 62 (0.05% of 134864) affected shaders:
VGPRs: 2464 -> 2440 (-0.97%)
CodeSize: 332408 -> 324276 (-2.45%)
MaxWaves: 1690 -> 1692 (+0.12%)
Instrs: 62356 -> 60828 (-2.45%)
Latency: 595723 -> 592554 (-0.53%)
InvThroughput: 126106 -> 124241 (-1.48%)
SClause: 2163 -> 2162 (-0.05%)
Copies: 6392 -> 6226 (-2.60%); split: -2.94%, +0.34%
Branches: 2295 -> 2298 (+0.13%)
PreSGPRs: 2390 -> 2389 (-0.04%)
PreVGPRs: 2139 -> 2117 (-1.03%); split: -1.08%, +0.05%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22783>
2023-05-03 10:39:20 +00:00
Georg Lehmann
b93c92eba3 nir: lower ballot_bit_count_exclusive/inclusive to mbcnt_amd
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22783>
2023-05-03 10:39:20 +00:00
Lionel Landwerlin
5489033fa8 intel/compiler: make uses_pos_offset a tri-state
This value depends on the per-sample value which can be unknown at
compile time with graphics pipeline libraries. So we need to have this
dynamic has well and pick the right value when generating the
3DSTATE_PS/3DSTATE_WM packet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d8dfd153c5 ("intel/fs: Make per-sample and coarse dispatch tri-state")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22728>
2023-05-03 10:03:57 +00:00
David Heidelberg
ef01a9cf3b mesa/main: drop unused variable
Fixes: c5b3d488f9 ("mesa/main: make ffvertex output nir")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22812>
2023-05-03 11:03:14 +02:00
Iago Toral Quiroga
9f522ac0c6 broadcom/compiler: don't allocate undef to rf0
rf0 is affected by restrictions in some scenarios so we rather use
a register that does not cause conflicts for scheduling.

total instructions in shared programs: 12850958 -> 12848024 (-0.02%)
instructions in affected programs: 331974 -> 329040 (-0.88%)
helped: 2559
HURT: 201
Instructions are helped.

total max-temps in shared programs: 2210893 -> 2210803 (<.01%)
max-temps in affected programs: 1486 -> 1396 (-6.06%)
helped: 96
HURT: 7
Max-temps are helped.

total sfu-stalls in shared programs: 21975 -> 21965 (-0.05%)
sfu-stalls in affected programs: 32 -> 22 (-31.25%)
helped: 16
HURT: 6
Sfu-stalls are helped.

total inst-and-stalls in shared programs: 12872933 -> 12869989 (-0.02%)
inst-and-stalls in affected programs: 332036 -> 329092 (-0.89%)
helped: 2560
HURT: 189
Inst-and-stalls are helped.

total nops in shared programs: 305911 -> 303501 (-0.79%)
nops in affected programs: 11215 -> 8805 (-21.49%)
helped: 2131
HURT: 3
Nops are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22797>
2023-05-03 05:39:35 +00:00
Patrick Lerda
4ca8be82d5 r600: fix refcnt imbalance related to atomic_buffer_state
Indeed, these references are not freed.

For instance, this issue is triggered on an evergreen card with
"piglit/bin/shader_runner tests/spec/arb_shader_atomic_counter_ops/execution/all_touch_test.shader_test -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 06993e4ee3 ("r600: add support for hw atomic counters. (v3)")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22798>
2023-05-03 04:55:01 +00:00
Constantine Shablya
0937a02d96 vulkan: rename vk_physical_device_features.py to vk_physical_device_features_gen.py
In-line with other files that generate source code

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablya
9cf1cdfaa8 vulkan: put TEMPLATE_H before TEMPLATE_C
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablya
005cfc63fc vulkan: put interesting code before boring code
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablya
64f4b277ea vulkan: inline vk_get_physical_device_features into vk_common_GetPhysicalDeviceFeatures2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablia
528d430ca1 v3dv: use common vkGetPhysicalDeviceFeatures2
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablia
99bc68f042 panvk: use common vkGetPhysicalDeviceFeatures2
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablia
a252a9dc24 anv: move get_features after get_device_extensions (ugly diff)
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablya
430abb971a anv: switch to using the common vkGetPhysicalDeviceFeatures2
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablya
61413d70a0 vulkan: introduce supported_features parameter to vk_physical_device_init
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Constantine Shablya
cc02214304 vulkan: add common implementation of vkGetPhysicalDeviceFeatures2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22333>
2023-05-03 03:27:54 +00:00
Emma Anholt
c93b179d76 vulkan: Actually increment the count of objects in GetPipelineCacheData.
Otherwise a load of the cache won't load any of the objects in it!

Fixes: 591da98779 ("vulkan: Add a common VkPipelineCache implementation")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22700>
2023-05-03 00:27:49 +00:00
Emma Anholt
bc257928d7 vulkan: Handle alignment failure in the pipeline cache.
On malloc failure, or more likely a passed in pDataSize < pipeline cache
data size, we should return incomplete.  Otherwise,
vk_pipeline_cache_object_serialize will assertion fail about the start not
being aligned.

Closes: #8868
Fixes: 591da98779 ("vulkan: Add a common VkPipelineCache implementation")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22700>
2023-05-03 00:27:49 +00:00
Jesse Natalie
888bfa7f04 dzn: Ensure bindless is factored into pipeline/nir hash
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>
2023-05-02 16:39:51 -07:00
Jesse Natalie
aa43b03086 dzn: Ensure subgroup size control is factored into pipeline hash
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>
2023-05-02 16:39:34 -07:00
Jesse Natalie
dacc3cc597 dzn: Use the nir hash as an input to the dxil hash
Instead of re-computing all the same bits we already computed,
just use the nir hash. Helps prevent missing a bit between the two.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>
2023-05-02 16:39:34 -07:00
Jesse Natalie
c9a34e6de0 dzn: Ensure sample-rate shading is factored into nir hash
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>
2023-05-02 16:39:31 -07:00
Jesse Natalie
cc8cdbb0ef dzn: Hook up subgroup size to compute shader compilation
Previously this was only in the graphics path... where it does nothing,
since D3D only supports wave size control for compute. Whoops.

Fixes: db083070 ("dzn: Implement subgroup size control extension")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>
2023-05-02 16:39:10 -07:00
Patrick Lerda
d615dfca40 crocus: fix refcnt imbalance related to crocus_create_surface()
Indeed, the objects are not freed when the function returns NULL.

"psurf->texture = tex;" is redundant with
"pipe_resource_reference(&psurf->texture, tex);".

For instance, this issue is triggered with
"piglit/bin/ext_texture_array-compressed teximage pbo -fbo -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22799>
2023-05-02 22:18:49 +00:00
Ryan Neph
551e92d8a6 virgl: check a debug option again at context creation
Android apps commonly use HWUI (a GLES-based UI framework provided by
the system), that generally performs eglInitialize() before the app can
do the same for its custom rendering needs.

If an app is going to set VIRGL_DEBUG to enable case-by-case driver
behaviors (e.g. experimental shader_sync option), it should be checked
again during context creation.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22744>
2023-05-02 21:43:37 +00:00
Jesse Natalie
73952bfbfd dzn: Fix UBO descriptors pointing to the end of the buffer
UBO descriptors can re-use the default descriptor when their upper
bound is 64KiB, not the end of the buffer.

Fixes dEQP-VK.memory.pipeline_barrier.host_write_uniform_buffer.1048576

Fixes: d34ac0a70b ("dzn: Re-design custom buffer descriptors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22805>
2023-05-02 21:14:09 +00:00
Mike Blumenkrantz
905f7f8365 Revert "zink: don't create separate shader dsls if there are no bindings"
This reverts commit 83a1b74240.

this is creating the pipeline layout, which is always required, not the dsl

Fixes: 83a1b74240 ("zink: don't create separate shader dsls if there are no bindings")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22801>
2023-05-02 20:08:32 +00:00
Mike Blumenkrantz
27d6a98638 zink: only unset a generated tcs if the bound tcs is the generated one
this could otherwise unbind a non-generated tcs if the tes had at some
point generated a tcs

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22801>
2023-05-02 20:08:32 +00:00
Daniel Schürmann
cf13a1d791 radv/rt: Fix and improve VkPipelineCreationFeedback
Due to a copy-paste error, we asserted pipelineStageCreationFeedbackCount == 1
and wrote the stage feedback of the combined shader into the feedback of the first
stage. This is fixed.
Instead, we now write the precompilation feedback for each stage. This not ideal,
but definitely an improvement.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
7070c4e5ff radv/rt: remove merged VkPipelineShaderStageCreateInfo
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
4408395a30 radv/rt: refactor compute_rt_stack_size() to use radv_ray_tracing_stage information
instead of pStages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
8ec81a43cb radv/rt: use precompiled stages to create RT shader
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
7836e32778 radv/rt: retain parsed NIR shaders in radv_ray_tracing_lib_pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
284ab601a5 radv/rt: introduce struct radv_ray_tracing_stage
The purpose of this struct is to bundle per-stage information
for ray-tracing pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
a5b0b150df radv/rt: expose radv_parse_rt_stage()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
8665506cbd radv/pipeline_cache: add NIR caching capabilities
This patch adds functions to radv_pipeline_cache in order to cache
serialized NIR shaders as opaque cache objects.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Daniel Schürmann
9afb52a122 vulkan/pipeline_cache: expose vk_raw_data_cache_object
together with vk_raw_data_cache_object_ops and vk_raw_data_cache_object_create().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>
2023-05-02 19:15:10 +00:00
Karol Herbst
37c6c5c624 nvc0: do not randomly emit fences.
We track fences in a global list and have a per context "current" fence
which we randomly attach things to. If we take such a fence and emit it
without also creating a new fence for future tasks we can get out of sync
leading to random failures.

Some of our queries could trigger such cases and even though this issues
appears to be triggered by the MT rework, I'm convinced that this was only
made more visible by those fixes and we had this bug lurking for quite a
while.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7429
Fixes: df0a4d02f2 ("nvc0: make state handling race free")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22722>
2023-05-02 18:54:04 +00:00
Corentin Noël
a86e8969c7 ci: Uprev crosvm and virglrenderer
Update crosvm, virglrenderer and bindgen-cli to their latest version on time.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22712>
2023-05-02 18:12:45 +00:00
Lionel Landwerlin
53605f226b nir/lower_non_uniform_access: add get_ssbo_size handling
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22793>
2023-05-02 16:27:15 +00:00
Karol Herbst
8c1bc1b964 rusticl/nir: finish blob after serializing
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22776>
2023-05-02 15:28:38 +00:00
Karol Herbst
fb7e9b1c36 clc: free kernel args in clc_free_kernels_info
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22776>
2023-05-02 15:28:38 +00:00
Daniel Schürmann
7fc259e4e7 radv: add padding to radv_shader_binary_legacy
This fixes an alignment mismatch in radv_shader_serialize()

Fixes: 577d76f60f ('radv: add radv_shader_serialize() and radv_shader_deserialize() functions')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22735>
2023-05-02 14:33:56 +00:00
Daniel Schürmann
df262d80da vulkan/pipeline_cache: use vk_pipeline_cache_insert_object() to replace raw data objects
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22735>
2023-05-02 14:33:56 +00:00
Daniel Schürmann
cbab396f54 vulkan/pipeline_cache: replace raw data objects on cache insertion of real objects
It might happen that a raw data object (from pipeline cache creation)
was never looked up, and thus never deserialized, before it gets
inserted again into the cache. In this case, the deserialized object
got replaced by the raw data object.
Instead, replace the raw data object with the real object in the cache.

Fixes: 8b13ee75ba ('vulkan: Fall back to raw data objects when deserializing if ops == NULL')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22735>
2023-05-02 14:33:56 +00:00
Christian Gmeiner
edfc9d9d96 etnaviv: Add util_blitter_save_so_targets(..) call
We do not support stream outputs yet so be better at faking it.
Fixes the following assertion when running deqp-gles3:
 u_blitter.c:635: blitter_check_saved_vertex_states: Assertion `!ctx->has_stream_out || ctx->base.saved_num_so_targets != ~0u' failed

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22754>
2023-05-02 13:12:36 +00:00
Matt Coster
db6f94f2c4 pvr: Correctly validate PBE accum format
Fixes: dEQP-VK.pipeline.monolithic.blend.format.e5b9g9r9_ufloat_pack32
  .states
  .color_sas_1mda_add_alpha_1msa_sas_rsub
    -color_1mda_cc_min_alpha_cc_cc_min
    -color_1mcc_1mca_rsub_alpha_1mca_1mda_min
    -color_sc_1mda_sub_alpha_sa_cc_min

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22795>
2023-05-02 12:48:44 +00:00
Rhys Perry
7cda715ad6 radv: fix bc optimization with POS_W_FLOAT_ENA(1)
0286CC_PERSP_CENTER_ENA is also set if:
- No barycentrics are used
- POS_W_FLOAT is enabled

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: a4b60295a7 ("aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8928
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22782>
2023-05-02 12:18:50 +00:00
Matt Coster
11b1a37553 pvr: Unmap mapped memory on free
From the Vulkan spec (§11.2.13. Freeing Device Memory):
  If a memory object is mapped at the time it is freed, it is implicitly
  unmapped.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22762>
2023-05-02 09:36:11 +00:00
Karmjit Mahil
926ddc319c pvr: Fix unaligned VDMCTRL_PDS_STATE1 data address
For indirect draw commands the data segment's address was being
calculated with an unaligned code size which could potentially
send an unaligned address to the hw causing problems.

Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22746>
2023-05-02 09:20:18 +00:00
James Glanville
78df1977fe pvr: Fix image to buffer copies
The code to increment the destination buffer address was wrong. Instead of
incrementing an address on every iteration, the buffer slice size was added
as a static offset to all blits.

Seen in dEQP-VK.draw.renderpass.depth_clamp.d16_unorm, though issues remain.

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22747>
2023-05-02 09:04:44 +00:00
James Glanville
71980739a1 pvr: Fix vtxin special var allocation count
When pvr_graphics_pipeline_alloc_vertex_special_vars() was
allocating vtxin regs for special vars, it wasn't returning back
the updated amount of allocated regs so when the PDS was filling
them in, it would try to write out of bounds.

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22750>
2023-05-02 08:51:42 +00:00
James Glanville
ddd3c66f53 pvr: Improve support for image clears
Depth/stencil surfaces are not PBE renderable, so a compatible format must
be used instead. The code to calculate this compatible format was not called
when configuring the PBE, and it was missing formats.

Also the code to calculate PBE swizzles was throwing an error in unhandled
cases, rather than using the pre-calculated defaults which was the correct
behaviour.

Fixes blits in dEQP-VK.draw.renderpass.depth_clamp.d32_sfloat

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22748>
2023-05-02 08:33:26 +00:00
Erik Faye-Lund
955797d015 nir: fix constant-folding of 64-bit fpow
We need to do full pow if 64-bit, and we can do fpow() otherwise. Not
the other way around.

Fixes: 9076c4e289 ("nir: update opcode definitions for different bit sizes")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22774>
2023-05-02 07:53:51 +00:00
Samuel Pitoiset
e25e4c81de radv: fix dynamic depth clamp enable support
The Vulkan spec says:

"If the depth clamping state is changed dynamically, and the pipeline
was not created with VK_DYNAMIC_STATE_DEPTH_CLIP_ENABLE_EXT enabled,
then depth clipping is enabled when depth clamping is disabled and
vice versa"

Fixes: e48c0fbd8f ("radv: add support for dynamic depth clamp enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22777>
2023-05-02 07:00:59 +00:00
Jesse Natalie
cc66d546dd microsoft/compiler: Unroll loops in opt passes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22786>
2023-05-01 21:12:43 +00:00
Jesse Natalie
bb65d36c5c spirv2dxil: Mark SSBO reads for bindless as CAN_REORDER
This makes it so that they can be CSE'd, which helps prevent redundant
reads of the same data.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22786>
2023-05-01 21:12:43 +00:00
Yiwei Zhang
34cc37910f radv: respect VK_QUERY_RESULT_WAIT_BIT in GetQueryPoolResults
The flag was ignored for VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT and
VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT.

Cc: mesa-stable

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22781>
2023-05-01 18:07:24 +00:00
Rob Clark
cdf01be131 Revert "ci: disable all a306/a530/a630 jobs"
This reverts commit af214c233b.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22780>
2023-05-01 14:55:14 +00:00
Michel Dänzer
98bb47ee45 ci: Enable rusticl in the fedora-release job
v2:
* Drop superfluous -D rust_std=2021 (Eric Engestrom)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
96dd394787 ci: Upgrade fedora-release job to Fedora 38
Need to add -Wno-error=dangling-reference -Wno-error=overloaded-virtual
for C++ for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
5c6b07246d ci: Drop -Wno-error=array-bounds from fedora-release job
No warnings left.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
dce97f090a clover/llvm: Use std::nullopt already with LLVM 16
llvm::None is already deprecated and defined as std::nullopt in LLVM 16.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
4ee1572008 clover/llvm: Use llvm::DataLayout::getABITypeAlign with LLVM >= 16
llvm::DataLayout::getABITypeAlignment is deprecated:

../src/gallium/frontends/clover/llvm/codegen/common.cpp: In function ‘std::vector<clover::binary::argument> {anonymous}::make_kernel_args(const llvm::Module&, const std::string&, const clang::CompilerInstance&)’:
../src/gallium/frontends/clover/llvm/codegen/common.cpp:211:62: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  211 |          const unsigned target_align = dl.getABITypeAlignment(arg_type);
      |                                        ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~
In file included from /usr/include/llvm/IR/Module.h:24,
                 from ../src/gallium/frontends/clover/llvm/codegen.hpp:35,
                 from ../src/gallium/frontends/clover/llvm/codegen/common.cpp:36:
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:232:53: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  232 |                               dl.getABITypeAlignment(size_type),
      |                               ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:240:53: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  240 |                               dl.getABITypeAlignment(size_type),
      |                               ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:262:92: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  262 |                                     (pointee_type->isVoidTy()) ? 8 : dl.getABITypeAlignment(pointee_type),
      |                                                                      ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:304:47: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  304 |                         dl.getABITypeAlignment(size_type),
      |                         ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:310:47: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  310 |                         dl.getABITypeAlignment(size_type),
      |                         ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~

v2:
* Use compat helper function (Karol Herbst)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
6bab67f5a6 svga: Make declaration of emit_input_declaration match definition
Pointed out by GCC 13:

../src/gallium/drivers/svga/svga_tgsi_vgpu10.c:3786:1: warning: conflicting types for ‘emit_input_declaration’ due to enum/integer mismatch; have ‘void(struct svga_shader_emitter_v10 *, VGPU10_OPCODE_TYPE,  VGPU10_OPERAND_TYPE,  VGPU10_OPERAND_INDEX_DIMENSION,  unsigned int,  unsigned int,  VGPU10_SYSTEM_NAME,  VGPU10_OPERAND_NUM_COMPONENTS,  VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE,  unsigned int,  VGPU10_INTERPOLATION_MODE,  boolean,  SVGA3dDXSignatureSemanticName)’ {aka ‘void(struct svga_shader_emitter_v10 *, VGPU10_OPCODE_TYPE,  VGPU10_OPERAND_TYPE,  VGPU10_OPERAND_INDEX_DIMENSION,  unsigned int,  unsigned int,  VGPU10_SYSTEM_NAME,  VGPU10_OPERAND_NUM_COMPONENTS,  VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE,  unsigned int,  VGPU10_INTERPOLATION_MODE,  unsigned char,  unsigned int)’} [-Wenum-int-mismatch]
 3786 | emit_input_declaration(struct svga_shader_emitter_v10 *emit,
      | ^~~~~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/svga/svga_tgsi_vgpu10.c:516:1: note: previous declaration of ‘emit_input_declaration’ with type ‘void(struct svga_shader_emitter_v10 *, unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  boolean,  SVGA3dDXSignatureSemanticName)’ {aka ‘void(struct svga_shader_emitter_v10 *, unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned char,  unsigned int)’}
  516 | emit_input_declaration(struct svga_shader_emitter_v10 *emit,
      | ^~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
ee8b572b40 svga: Make vmw_svga_winsys_buffer_map definition match declaration
Pointed out by GCC 13:

../src/gallium/winsys/svga/drm/vmw_buffer.c:355:1: warning: conflicting types for ‘vmw_svga_winsys_buffer_map’ due to enum/integer mismatch; have ‘void *(struct svga_winsys_screen *, struct svga_winsys_buffer *, enum pipe_map_flags)’ [-Wenum-int-mismatch]
  355 | vmw_svga_winsys_buffer_map(struct svga_winsys_screen *sws,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/gallium/winsys/svga/drm/vmw_buffer.c:52:
../src/gallium/winsys/svga/drm/vmw_buffer.h:82:1: note: previous declaration of ‘vmw_svga_winsys_buffer_map’ with type ‘void *(struct svga_winsys_screen *, struct svga_winsys_buffer *, unsigned int)’
   82 | vmw_svga_winsys_buffer_map(struct svga_winsys_screen *sws,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Michel Dänzer
6c7400f4e8 vulkan: Fix GetPhysicalDeviceSparseImageFormatProperties definitions
To match the declarations (and the corresponding definition in Vulkan
headers).

Pointed out by GCC 13, e.g.:

../src/intel/vulkan_hasvk/anv_formats.c:1589:6: error: conflicting types for 'anv_GetPhysicalDeviceSparseImageFormatProperties' due to enum/integer mismatch; have 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  uint32_t,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)' {aka 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  unsigned int,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)'} [-Werror=enum-int-mismatch]
 1589 | void anv_GetPhysicalDeviceSparseImageFormatProperties(
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/intel/vulkan_hasvk/anv_private.h:113,
                 from ../src/intel/vulkan_hasvk/anv_formats.c:24:
src/intel/vulkan_hasvk/anv_entrypoints.h:120:30: note: previous declaration of 'anv_GetPhysicalDeviceSparseImageFormatProperties' with type 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)' {aka 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)'}
  120 |   VKAPI_ATTR void VKAPI_CALL anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
      |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>
2023-05-01 14:15:15 +00:00
Samuel Pitoiset
dbab98d9d6 radv: enable RADV_THREAD_TRACE_CACHE_COUNTERS by default
It should work but if not enabled by default, I think most people
forget about it.

If you have any issues with it, you can disable by using
RADV_THREAD_TRACE_CACHE_COUNTERS=false and please report!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22763>
2023-05-01 13:38:53 +00:00
Gert Wollny
f092f548cb r600/sfn: assign window_space_position in shader state
This fixes a few tests out of the nin-tests test suite.

Fixes: 79ca456b48 ("r600/sfn: rewrite NIR backend")

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22778>
2023-05-01 14:37:19 +02:00
Gert Wollny
bbd265b8e8 r600+sfn: Assign ps_conservative_z and switch to NIR defines
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22778>
2023-05-01 14:37:19 +02:00
Juan A. Suarez Romero
c815189112 v3d: apply 1D texture miplevel alignment in arrays
1D texture miplevels are aligned to 64b, but this should include also
texture arrays.

Fixes
`spec@glsl-1.30@execution@texelfetchoffset@vs-texelfetch-usampler1darray`
and several other piglit tests.

CC: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22775>
2023-05-01 08:35:16 +00:00
Bas Nieuwenhuizen
040aeb5a23 radv: Add asserts in radeon_emit{,_array}.
Also add an unsafe helper for some winsys stuff that can't really
use the reservation mechanism (e.g. chaining between cmdbuffers).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>
2023-04-30 22:33:52 +02:00
Bas Nieuwenhuizen
7893040f80 radv: Add stricter space checks.
The check for max_dw means that none of checks triggered reliably
when we had an issue. Use a stricter reserved dw measure to increase
the probability of catching issues.

Adds a radeon_check_space to some places after cs_create as they
previously relied on the min. cs size, but that would still trigger
the checks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>
2023-04-30 22:33:52 +02:00
Bas Nieuwenhuizen
4c204db0a7 radv: Reserve space in the ACE pre/postambles.
Since we check reservations now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>
2023-04-30 22:33:52 +02:00
Bas Nieuwenhuizen
17a7c55ea7 radv: Reserve space for indirect descriptor set address writes.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>
2023-04-30 22:33:52 +02:00
Pavel Ondračka
775e42e6b8 r300: remove simple duplicate ARL instructions
Removes duplicate ARL reads from the same source when the original ADDR
register is still live. This is the remaining low-hanging fruit from #7723
Should account for most of the potential improvements and is also
trivial as no source or destination rewrite is needed.

RV530:
total instructions in shared programs: 132447 -> 131488 (-0.72%)
instructions in affected programs: 33396 -> 32437 (-2.87%)
helped: 331
HURT: 0
total temps in shared programs: 17035 -> 17015 (-0.12%)
temps in affected programs: 361 -> 341 (-5.54%)
helped: 30
HURT: 10

RV370:
total instructions in shared programs: 83555 -> 82659 (-1.07%)
instructions in affected programs: 28310 -> 27414 (-3.16%)
helped: 312
HURT: 0
total temps in shared programs: 12418 -> 12426 (0.06%)
temps in affected programs: 302 -> 310 (2.65%)
helped: 21
HURT: 29

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22752>
2023-04-29 18:10:11 +00:00
Erik Faye-Lund
c5b3d488f9 mesa/main: make ffvertex output nir
There's little point in going from fixed-function to ARB progs just to
convert it to NIR in the end. So let's emit NIR code directly here
instead.

This all made sense back when we had DRI drivers that didn't use NIR at
all in the tree, but these days we unconditionally call prog_to_nir.

Since we're no longer generating something that resembles ARM asm
shaders, we also no longer pass is_arb_asm as true to NewProgram. But
we still require legacy math rules, so we set use_legacy_math_rules in
the shader_info instead. This should do the same thing, but
communicates exactly what we actually need rather than having a half-
truth about the source of the shader.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>
2023-04-29 12:39:18 +00:00
Erik Faye-Lund
7610747e94 mesa/main: allow passing nir-shaders to st_program_string_notify
This will enable us to emit NIR directly for fixed-function vertex
shaders.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>
2023-04-29 12:39:18 +00:00
Erik Faye-Lund
fdd20b9469 mesa/main: drop disasm-code from ffvertex_prog.c
We're about to rewrite this code to emit NIR directly, so let's drop
this needless logic.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>
2023-04-29 12:39:18 +00:00
Erik Faye-Lund
972c923592 mesa/main: clean up white-space in ffvertex_prog.c
We're about to change this file, so let's clean up the whitespace a bit
first.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>
2023-04-29 12:39:17 +00:00
David Heidelberg
02493aeffc ci/skqp: update to the Android CTS 12.1_r5 version
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22710>
2023-04-29 07:07:27 +00:00
David Heidelberg
a3ae424e0c ci/skqp: replace license with SPDX and extract the used branch
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22710>
2023-04-29 07:07:27 +00:00
Jesse Natalie
5c1a8d3b77 meson: Don't use masm with VS backend
Fixes: 77826e83 ("util: Add a copy of BLAKE3 hash library.")
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22740>
2023-04-29 05:23:15 +00:00
antonino
b7f815117e Revert "zink: add single_sample to fs key"
This reverts commit 420f2c0878.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>
2023-04-29 04:59:11 +00:00
antonino
e7b03fa3dc Revert "zink: add to multisample field to zink_gfx_pipeline_state"
This reverts commit 14d5892609.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>
2023-04-29 04:59:11 +00:00
antonino
8cbd6acf12 Revert "zink: don't render with multisampling when it is disabled"
This reverts commit a004825266.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>
2023-04-29 04:59:11 +00:00
antonino
6b9f1a540d Revert "zink/ci: remove xt_framebuffer_multisample-interpolation fail"
This reverts commit 177c92fe7c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>
2023-04-29 04:59:11 +00:00
antonino
9a8a397294 Revert "zink: set when pipeline dirty flag when multisample changes"
This reverts commit 5969541123.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>
2023-04-29 04:59:11 +00:00
Mike Blumenkrantz
0b64c73779 zink: add extendedDynamicState3DepthClipNegativeOneToOne to profile
Fixes: 3017d01c9d ("zink: check for extendedDynamicState3DepthClipNegativeOneToOne for ds3 support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22765>
2023-04-29 04:39:20 +00:00
Mike Blumenkrantz
8e664816fc zink: update amdpro fails
how is this driver still so broken

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22761>
2023-04-29 04:19:33 +00:00
Mike Blumenkrantz
e9864d7f39 llvmpipe: fix native vector width init
this otherwise causes infinite loops in subgroup tests
and kills ci

Fixes: 4a056807bc ("gallivm: break out native vector width calc for reuse")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22767>
2023-04-29 03:36:19 +00:00
Dave Airlie
78ea6220a7 gallivm: reorder some texture/image members.
This just aligns texture/image a bit more, shouldn't have much
affect, but might make things easier going forward.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
2023-04-29 02:57:19 +00:00
Dave Airlie
d32aa2686c gallium: consolidate jit image types between draw/llvmpipe
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
2023-04-29 02:57:19 +00:00
Dave Airlie
d3ed01d5eb gallivm: consolidate llvmpipe/draw sampler types.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
2023-04-29 02:57:19 +00:00
Dave Airlie
fd2902a1cf gallivm: consolidate draw/lp texture type.
This just makes the type creation, struct and fields the same.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
2023-04-29 02:57:19 +00:00
Dave Airlie
5f22f35590 lp_jit: use pipe max for the lp_jit texture levels.
Align this with draw, so we the structs can be shared.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
2023-04-29 02:57:19 +00:00
Mike Blumenkrantz
af214c233b ci: disable all a306/a530/a630 jobs
these have been dead and timing out all day

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22768>
2023-04-28 22:27:04 -04:00
David Heidelberg
4f1716ebca ci/dzn: add flaking test
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22766>
2023-04-28 22:35:21 +02:00
Ruijing Dong
b07f575a91 radeonsi/vcn: correct cropping for hevc case
reason:

corect cropping calculation error.

If no cropping from the external, then it will
need to calculate cropping size internally, the
padding size on left and top should be zero.

Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7171
Reviewed-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22758>
2023-04-28 18:07:42 +00:00
Samuel Pitoiset
faf27fa0a2 ac/nir: fix 8-bit/10-bit PS exports clamping
This broke many tests on GFX6 (Pitcairn).

Fixes: c182154456 ("ac/nir: add ac_nir_lower_ps")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22756>
2023-04-28 17:38:06 +00:00
Samuel Pitoiset
559d3b0f9a ac,radv,radeonsi: rename thread_trace to sqtt everywhere
SQTT stands for SQ Thread Trace but it's shorter.
Note that environment variables aren't renamed because this might
break external applications.

This renames:
- ac_thread_trace_data to ac_sqtt (this is the main struct)
- ac_thread_trace_info to ac_sqtt_data_info
- ac_thread_trace_se to ac_sqtt_data_se
- ac_thread_trace to ac_sqtt_trace (this contains trace only)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
2023-04-28 16:55:13 +00:00
Samuel Pitoiset
c2d312c401 ac/rgp: remove ac_thread_trace_data from ac_thread_trace
We only need the RGP objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
2023-04-28 16:55:13 +00:00
Samuel Pitoiset
3a19c36618 radv: do not abort when the SQTT buffer resize failed
This seems to much. While we are at it, update the error msg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
2023-04-28 16:55:12 +00:00
Samuel Pitoiset
1202d8b0f9 ac/sqtt: add ac_sqtt_get_trace() helper
It can be shared between RADV and RadeonSI. The only difference is
that RadeonSI can't auto-resize the SQTT BO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
2023-04-28 16:55:12 +00:00
Samuel Pitoiset
d0a11c5b9e ac/sqtt: add ac_sqtt_se_is_disabled() helper
It can be shared between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
2023-04-28 16:55:12 +00:00
Matt Coster
a031bfdb9d pvr: Fixup format features
Fixes: dEQP-VK.api.info.format_features.*

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22749>
2023-04-28 15:37:59 +00:00
Matt Coster
37f202a54a pvr: Remove false assumption from pvr_write_draw_indirect_vdm_stream()
Partially reverts: bd51305943
  pvr: Minor cleanup around pvr_emit_vdm_index_list()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22751>
2023-04-28 15:21:08 +00:00
Eric Engestrom
5d11e50367 v3d: fix various minor issues in gen_pack_header.py
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22742>
2023-04-28 14:53:10 +00:00
José Roberto de Souza
ec6d520eb9 iris: Allow shared scanout buffer to be placed in smem as well
i915 and Xe kmd allows scanout to display of prime buffers placed
in smem.

Allowing shared and scanout bos to be placed in smem and lmem allows
the dma buf to work in some cases that only lmem is not enough.

Fixes: c10ff19704 ("iris: Place scanout buffers only into lmem for discrete GPUs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8867
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8766
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22665>
2023-04-28 14:29:14 +00:00
Gert Wollny
8b52c9bab7 r600/sfn: Tie in address load splitting
Add R600_NIR_DEBUG flag "noaddrsplit" to disable the behaviour and use the
old code path.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
4beefbe074 r600/sfn: prepare for emitting AR loads
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
5da9f08657 r600/sfn: factor out index loading for non-alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
9f39531743 r600/sfn: Can't use an indirect array access as source to AR load
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
ae55668f77 r600/sfn: print failing block when scheduling fails
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
fdec18640a r600/sfn: Add more tests and update to use address splits
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
7fdb056277 r600/sfn: scheduled instructions are always ready
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
5d6b80bf5b r600/sfn: Fix copy-prop with array access
We will have to check whether there is access to an array between the
instructions involved with the copy prop, so for now do not allow it.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
062188de16 r600/sfn: Override Array access handling in backend assembler
Since we do thi sin the scheduler, there is no need to do this in the
backend again.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
e57643cf54 r600/sfn: Add handling for R600 indirect access alias handling
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
d955633319 r600/sfn: Add chip family to shader class
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
4d5859a524 r600/sfn: Start a new ALU CF on index use, not on index emission
With that we can use the two IDX registers in parallel any might
save some CF instructions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
557dc14944 r600/sfn: set CF force flag always when starting a new block
There is no reason not to do this, because we only start a new
block if a new CF block must be started.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
e9e1806a2e r600/sfn: Add test for multiple index load
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
669aba02b0 r600/sfn: Don't copy-propagate indirect access into LDS instr
Propagating array elements has the problem that we would have to
check whether the last load is not overwritten by an indirect store.

Indirect kcache buffer loads require starting a new CF, and we would
have to make sure that we don't split the LDS fetch/read group with
that, so don't do this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
f4816d2a72 r600/sfn: Add more tests and update to use address splits
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
d617052db6 r600/sfn: take address loads into account when scheduling
Also change a bit the instruction priority handling

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
8e1cf2d439 r600/sfn: Add function to check whether a group loads a index register
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
d21054b4bc r600/sfn: Add pass to split addess and index register loads
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
aca80216c1 r600/sfn: Add interface to count AR uses in ALU op
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
6e5327fef6 r600/sfn: Add a RW get function of IF predicate access
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
a7611bc093 r600/sfn: AR and IDX don't need the write flag, but haev a parent
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
cb8f12ded5 r600/sfn: Be able to track expected AR uses
Because AR emission and AR use must be in the same CF we have to
be able to track whether all AR ready are emitted.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
af3d496253 r600/sfn: Update resource based instruction index mode check
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
e7b497fe87 r600/sfn: Add function to insert op in block
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
f464fc28d4 r600/sfn: add method to update indirect address to all instrution types
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
c3f60f77d6 r600/sfn: handle AR and IDX register in shader from string
This is needed for testing

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
9a29301567 r600/sfn: Prepare uniforms and local arrays for better address handling
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:55 +00:00
Gert Wollny
fac4760c7d r600: Allow both index registers for all CF types
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
db0752a809 r600/sfn: don't allow more than one AR per instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
886a3e5286 r600/sfn: Rework query for indirect access in alu instr and opt
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
5579263368 r600/sfn: Add address and index registers creation to ValueFactory
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
a40c1c9d5c r600/sfn/tests: Cleanup and move some code around
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
c5ea9182b4 r600/sfn: Handle MOVA_INT in sfn assembler
To properly emit ALU clauses we have to make sure the backend doesn't
add instructions for the address emission.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
077f7d25df r600/sfn: don't track address registers in live ranges
There is only one address register, and for the index registers we
don't do a special register allocation, so no need to track these
either.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Gert Wollny
bd9b653dbb r600/sfn: Add a type for address registers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
2023-04-28 13:13:54 +00:00
Matt Coster
1c00dec60d pvr: Fully declare support for VK_EXT_private_data
Fixes: dEQP-VK.api.info.get_physical_device_properties2.features
  .private_data_features

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22738>
2023-04-28 10:52:22 +00:00
Karmjit Mahil
2de6bdd449 pvr: Fix static assert check
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22595>
2023-04-28 10:35:23 +00:00
Karmjit Mahil
a8f841dad9 pvr: Change push_constants_shader_stages to type pvr_stage_allocation
Previously the code was saving the mask as a VkShaderStageFlags
but when allocating shareds it checked against pvr_stage_allocation.
This causes problems as only the vertex bit matches the
VkShaderStageFlagBits so the push constants utilized in fragment
shaders weren't picked up properly.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22731>
2023-04-28 09:16:02 +00:00
Karmjit Mahil
c38da3dcd2 pvr: Fix pvr_csb_bake() list return.
The list logic checks for list->next->next (+ some other checks)
to point to the list itself to determine that there is just one
single element.

 ┌───────────────────────┐
 └< { HEAD } >─< { E0 } >┘

When the list_head is copied as was being done previously, the
list element's next pointer still points at the old head so
the `list_is_singular()` check fails.

Fixes pvr_cmd_buffer.c:605:`list_is_singular(&bo_list)` assertion
dEQP-VK.api.image_g.core.clear_color_attachment.cube_layers.b8g8r8a8_unorm

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22730>
2023-04-28 08:54:19 +00:00
Felix DeGrood
b22e5fab8c docs: Add INTEL_DEBUG_BATCH_FRAME_START/_STOP
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22564>
2023-04-28 04:37:05 +00:00
Felix DeGrood
543c554ed6 iris: Enable INTEL_DEBUG_BATCH_FRAME_START/_STOP
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22564>
2023-04-28 04:37:05 +00:00
Felix DeGrood
61c209095c anv: Enable INTEL_DEBUG_BATCH_FRAME_START/_STOP
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22564>
2023-04-28 04:37:05 +00:00
Felix DeGrood
015eecde47 intel/debug: Control start/stop frame of batch debug
When using INTEL_DEBUG=bat, INTEL_DEBUG_BATCH_FRAME_START and
INTEL_DEBUG_BATCH_FRAME_STOP can limit dumping of batches for
particular frame ranges. Batch dumps are huge. Smart filtering
allows debugging of single frames during game play. Initial
commit to debug infrastructure.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22564>
2023-04-28 04:37:05 +00:00
Qiang Yu
65c3d1869d aco: allow no export instruction for gfx10+ fs
radeonsi will generate no export instruction when no
discard and no output.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22727>
2023-04-28 11:33:28 +08:00
Qiang Yu
3c59df7318 aco: get scratch addr from symbol for radeonsi
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22727>
2023-04-28 11:33:28 +08:00
Qiang Yu
360176b671 aco,radv: support symbol relocation in aco
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22727>
2023-04-28 11:33:28 +08:00
Jesse Natalie
3fc4ddd628 dzn: Expose core VK1.2 extensions that aren't optional
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22745>
2023-04-28 00:03:17 +00:00
Jesse Natalie
0b8a39498d dzn: Expose core VK1.1 extensions that aren't optional
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22745>
2023-04-28 00:03:17 +00:00
Lone_Wolf
a1b46b5e66 clc: Add clang frontendhlsl module to fix build of microsoft-clc with llvm 16+
Cc: mesa-stable

Reviewed-by: Jesse Natalie  <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22741>
2023-04-27 23:06:42 +00:00
Lone_Wolf
d09a7132d8 clc: Add clangASTMatchers to fix static llvm build of microsoft-clc with LLVM 16+
Cc: mesa-stable

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22741>
2023-04-27 23:06:42 +00:00
Lone_Wolf
f53e5efad7 compiler/clc: Fix embedded clang headers (microsoft-clc) for LLVM 16+
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7742

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22741>
2023-04-27 23:06:42 +00:00
Eric Engestrom
6a08dc7cab v3d: fix tfu_supports_tex_format() param type, and document why
tex_format should be `enum V3DX(Texture_Data_Formats)`, but using that enum
type in the header requires including `v3dx_pack.h`, which triggers circular
include dependencies issues, so use a `uint32_t` for now.

"fix" the one place that was using the correct enum, because doing so
triggers `-Wenum-int-mismatch` in GCC 13 as the function declaration
doesn't match the function definition.

Reported-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22739>
2023-04-27 22:17:48 +00:00
Danylo Piliaiev
4dd15177d0 ir3: documents (ss) flag for cat7 instructions
Blob produces "lock" instructions with (ss), so our past guess that
cat7 supports (ss) is true.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Mark Collins
85c6c9068a ir3/a7xx: Add definitions for (last) src GPR attribute
A new attribute on source GPRs reflecting if a certain usage of a
value is the last usage of it was added in A7xx. This is seemingly
a performance hint and doesn't affect anything when not applied.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
1613d767c1 ir3/a7xx: Document "alias" instruction
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
b909eda0b3 ir3: Document that stc has higher DST upper bound than we defined
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
11b2c54a9a ir3/a7xx: Add STSC definition
STore Shared Const - loads SIZE dwords from HLSQ_SHARED_CONSTS_IMM
starting from HLSQ_SHARED_CONSTS_IMM[SRC] and writing them to c[DST]

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:47 +00:00
Danylo Piliaiev
80f878b103 ir3/a7xx: Add new form of stg.a/ldg.a addressing
The new stg.a/ldg.a addressing form supersedes the a6xx's one.

The new form is:
 ldg.a.f32 r4.y, g[c0.z+r4.y+2], 4

There are no shift comparing to the a6xx:
 ldg.a.f32 r4.y, g[r0.z+(r4.y)<<2], 4

Also on a7xx the first src is allowed to be both const and gpr.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Danylo Piliaiev
3b0daf29e5 ir3/a7xx: Add new lock/unlock CS instructions
Seen at the end of every compuite shader:

 %shader_assmebly%
 lock
 unlock
 end

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Danylo Piliaiev
52ee3943eb ir3/a7xx: NOPs may have some no-op bits set
[00000001x_00000000x] nop	; dontcare bits in nop: 0000000100000000
[00000002x_00000000x] nop	; dontcare bits in nop: 0000000200000000

Doesn't seem to make them different from ordinary nops.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Danylo Piliaiev
569ed0f238 freedreno: Early exit in device matching if id doesn't have chip_id
Assert was wrong and caused issues when there are devices defined
after devices that are matched by chip_id.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
2023-04-27 21:06:46 +00:00
Lionel Landwerlin
7ddc31c672 intel/fs: fix per vertex input clamping
Only apply the clamp in multi patch mode (where the input vertices
vary between [1, 32]).

The clamp NIR pass operates on lowered intrinsics so we need to call
it after the inputs have been lowered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e25e17dd0c ("intel/fs: clamp per vertex input accesses to patchControlPoints")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8912
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22701>
2023-04-27 20:29:16 +00:00
Mike Blumenkrantz
79b3828e82 draw: fix robust ubo size calc
if the size of the constant buffer + stride overflows UINT32_MAX,
DIV_ROUND_UP will return 0, which is, in some sense, extremely robust,
but for general functionality it's not actually very robust

cc: mesa-stable

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22720>
2023-04-27 19:48:48 +00:00
Rob Clark
08ffa8e0d2 dri/android: Fix MSAA resolve
Commit f9a074dd55 ("dri2/android: Bypass throttling") dropped
unnecessary throtting in the SwapBuffers() path for android.  But
unfortunately MSAA resolve got tangled up in the throttle reason
flag.  So add a new flag that indicates "no throttingling, but yes
please do MSAA resolve".

Fixes: f9a074dd55 ("dri2/android: Bypass throttling")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22719>
2023-04-27 19:05:44 +00:00
antonino
5969541123 zink: set when pipeline dirty flag when multisample changes
Sets `gfx_pipeline_state.dirty` appropriately when
`gfx_pipeline_state.multisample` changes

Fixes: 14d5892609 ("zink: add to multisample field to `zink_gfx_pipeline_state`")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22736>
2023-04-27 16:24:51 +00:00
Thong Thai
9c4e3c9020 tgsi: use locale independent float and double parsing
The atof and strtod functions use the locale of the user when
determining if a decimal is a comma, ',' or a period, '.'. Thanks to
@fzwoch for helping find the cause of a shader-related issue.

Cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5760
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Thong Thai
27eafdcbd5 util: check and initialize locale before using it
Cc: mesa-stable

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Thong Thai
7373f25c09 mesa/main: rework locale setup/teardown
Cc: mesa-stable

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22699>
2023-04-27 15:43:33 +00:00
Ruijing Dong
306c6e12a5 frontends/va: define va av1 encoding caps
by having va av1 caps enabled, av1 vaapi encoding
is enabled.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
03c9a81959 radeonsi/vcn: use PIPE_ENC_FEATURE enum
Merge PIPE_H265_ENC_FEATURE into PIPE_ENC_FEATURE enum
because those are common flags, and it will be
used in AV1 encoder as well.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
5edbecb856 frontends/va: adding va av1 encoding functions
supported features:
- 8/10 bit encoding
- multi-layer (up to 4) encoding
- vbr/cbr rate control mode

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
35c2150988 radeonsi/vcn: add av1 encoding ib packages and get_info
add av1 encoding ib packages and enable the
get_info functions.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
4697b71c4e radeonsi/vcn: add some av1 encoding function
preparation for enabling av1 encoding in radeonsi,
adding the entropy related functioin.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
8b3295b9ed radeonsi/vcn: add av1 enc data structure
add av1 encoding related data structure.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
0b31c5a00c gallium/pipe: add av1 encoding data structure in pipe
add pipe av1 encoding data structure

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
f33f26e9ff radeonsi/vcn: add av1 dpb variables and cdf table
add av1 dpb variables and cdf table.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
b13f87031f radeonsi/vcn: remove extra zero bytes from bitstream
reason:
   extra bytes are not needed and not necessary
   in h264/h265 bitstreams, because they are in
   between NALs, the only problem is they consumed
   extra bits. And for av1 streams, that could be
   explained to something else, especially in
   multi-layer cases, that can cause syntax errors.

   ptr[6] represents the bitstream size,
   ptr[8] represents the extra zero bytes.

   The total number of bytes of the output
   should be ptr[6] - ptr[8]

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
bb08f061d9 radeonsi/vcn: merge get_output_format_param function
reason:
so far, the output_format_param function can be shared
by different encoders, and just for h264 encoder, there
is no 10bit encoding supported. This is to reduce
the repeated code before having av1 encoder.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
a4f96446fb radeonsi/vcn: enable swizzle mode in encoding ref frames.
swizzle mode in ref frames could potentially
improve encoding performance, the main reason
is just because linear mapping is the worst mode
for reference frames comparing to block level
mapping.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
0a11d5f598 radeonsi/vcn: enable 2 pass search center map
2 pass search map is a feature supported by VCN,
the main purpose is to enlarge motion search
range that in pre-encoding path the center global
motion vectors could be obtained and used in the
final path as a block center base. When 2pass is
used, this feature will be automatically enabled.

2 pass feature can be enabled by ffmpeg command
line "-compression_level 1"

and also correct some typos and move quality
package from vcn3.0 to vcn2.0 since it is availabe
in vcn2.0 and vcn3.0 can use it directly. Correct
vcn3.0 hevc spec misc IB package.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Ruijing Dong
869c34c1ca radeonsi/vcn: add macros used in av1 encoding
add macros used in av1 encoding.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22585>
2023-04-27 15:11:35 +00:00
Rhys Perry
d0caa50dcd aco: don't move exec writes around exec writes
Not sure if this is possible, but we should avoid it anyway.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22714>
2023-04-27 14:33:53 +00:00
José Roberto de Souza
65265d3e32 anv: Take into consideration physical device max heap size to set maxStorageBufferRange
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22721>
2023-04-27 14:05:42 +00:00
David Heidelberg
7508f4b4b6 pvr: drop unused variable
Fixes: 71fe789d35 ("pvr: Support ipf_creq_pf in pvr_isp_ctrl_stream()")

Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22709>
2023-04-27 12:45:52 +00:00
Pierre-Eric Pelloux-Prayer
49cc6edf84 mesa: remove unused bools
ShareGroupReset and DisjointOperation where only set in the code
removed in the previous commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
71c5db5e11 mesa: don't share reset status across contexts
If Driver.GetGraphicsResetStatus exists for one context, other contexts
will be able to use it; so there's no need to inherit reset status from
the other contexts.

This also prevented implementing the spec correctly: we're supposed to
report GL_NO_ERROR when the reset is completed (after reporting GL_*_RESET
at least once):

    If a reset status other than NO_ERROR is returned and subsequent
    calls return NO_ERROR, the context reset was encountered and
    completed. If a reset status is repeatedly returned, the context may
    be in the process of resetting.

With the existing code, the contexts will report INNOCENT_CONTEXT_RESET
forever.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
b4a2cb1e16 winsys/amdgpu: use the no-op helper to detect if reset completion
On older kernel the completion of the reset isn't signalled to userspace,
yet we need it to implement the EXT_robustness extension correctly.

In this situation, try to create a new context and submit a no-op job. If
the reset isn't done the kernel will reject the submission (-ECANCELED);
otherwise the submission will go through and we'll know that the reset is
done.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
45cd75cdad winsys/amdgpu: add a helper function to submit a no-op job
This will be used in the next commit.

Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
e528823400 radeonsi: stop reporting reset to app once gpu recovery is done
This way apps know they can recreate their contexts when
the status go back to NO_ERROR.

This depends on new UAPI in the kernel; for older kernel, radeonsi
will stop reporting a reset after 3 seconds. Apps will be able to
create new contexts but they'll have to handle not being able to
submit tasks.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7460
Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Pierre-Eric Pelloux-Prayer
5022531120 amd: update amdgpu_drm.h
Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290>
2023-04-27 12:06:08 +00:00
Samuel Pitoiset
e996599ed0 ac/rgp: update SQTT_FILE_CHUNK_TYPE_ASIC_INFO to minor version 5
To match PAL. I don't know what the active_pixel_packer_mask field
is used for.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
dd91faaddc ac/rgp: update SQTT_FILE_CHUNK_TYPE_API_INFO to minor version 2
To match PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
4cbb0f7ec3 ac/sqtt: add missing EventUnknown to rgp_sqtt_marker_event_type
To match XGL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
637a6813db ac/sqtt: add new bits to rgp_sqtt_marker_barrier_end
To match XGL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22677>
2023-04-27 11:31:49 +00:00
Samuel Pitoiset
930e77e903 radv/sqtt: add support for queue info
RGP uses that to report the various queue timings info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
84a0ef7a33 radv/sqtt: sample CPU/GPU clocks before starting the trace
RGP seems to use that to calibrate timestamps. This also introduces
a new helper to reset thread data between captures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
ee93864117 ac/sqtt: initialize clock calibration/queue info/queue event records
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
94ce6540d8 ac/sqtt: add helpers for initializing ac_thread_trace_data
This is common between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Samuel Pitoiset
23f3aa3491 ac/sqtt: add a helper for adding clock calibration records
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22594>
2023-04-27 10:55:55 +00:00
Jose Fonseca
16f3e9cd76 wgl: Remove needless if (1) { ... }.
Noticed by Craig Scott on https://gitlab.freedesktop.org/mesa/mesa/-/issues/4427#note_857876

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22706>
2023-04-27 09:58:39 +00:00
Jose Fonseca
9105e771af wgl: Fix unintentional assignment on assert.
Spotted by Nanley Chery.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4427
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22706>
2023-04-27 09:58:39 +00:00
Lionel Landwerlin
5f43f866a2 anv: enable shaderUniformBufferArrayNonUniformIndexing
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22624>
2023-04-27 09:08:03 +00:00
Lionel Landwerlin
9fb9ae5ac6 anv: fix anv_nir_lower_ubo_loads pass
In order to use load_global_const_block_intel we need to ensure the
64bit address in src[0] is uniform. This is not the case in the
vkd3d-proton test_bindless_cbv tests for example.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22624>
2023-04-27 09:08:03 +00:00
Lionel Landwerlin
d6e9479d4b nir/divergence: add missing load_global_constant_* intrinsics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22624>
2023-04-27 09:08:03 +00:00
Iago Toral Quiroga
0468ce3791 broadcom/compiler: try harder to merge thread switch earlier
We have been stopping as soon as we find a conflict but that doesn't
mean we can't merge it in an earlier slot, so keep going. Going by
shader-db, this sometimes allows us to merge the final thrsw a bit
earlier and avoid emitting NOP instructions at the program end to
make up for its delay slots. I have not observed cases where this
helps with regular thrsw though, but it doesn't hurt to try with
those too.

total instructions in shared programs: 11526876 -> 11526354 (<.01%)
instructions in affected programs: 10760 -> 10238 (-4.85%)
helped: 236
HURT: 0
Instructions are helped.

total max-temps in shared programs: 2231705 -> 2231677 (<.01%)
max-temps in affected programs: 276 -> 248 (-10.14%)
helped: 27
HURT: 0
Max-temps are helped.

total inst-and-stalls in shared programs: 11545177 -> 11544655 (<.01%)
inst-and-stalls in affected programs: 10777 -> 10255 (-4.84%)
helped: 236
HURT: 0
Inst-and-stalls are helped.

total nops in shared programs: 321624 -> 321152 (-0.15%)
nops in affected programs: 751 -> 279 (-62.85%)
helped: 236
HURT: 0
Nops are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22679>
2023-04-27 08:43:29 +00:00
Gregory Mitrano
13f258fae3 radv/sqtt: Add RGP Markers for Mesh Shaders
This change updates the sqtt layer to add mesh shader specific RGP
instrumentation logic. This should allow RGP to correctly identify GPU
work derived from vkCmdDrawMeshTasksEXT, vkCmdDrawMeshTasksIndirectEXT,
and vkCmdDrawMeshTasksIndirectCountEXT API calls.

This change also updates the mesa-to-RGP shader stage translation logic
to handle the mesh & task stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21917>
2023-04-27 07:58:58 +00:00
Gregory Mitrano
01b7371bb4 ac/sqtt: Add RGP Definitions for Mesh Shaders
This commit adds RGP marker definitions for the following mesh shader
functions:

- vkCmdDrawMeshTasksEXT
- vkCmdDrawMeshTasksIndirectCountEXT
- vkCmdDrawMeshTasksIndirectEXT

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21917>
2023-04-27 07:58:58 +00:00
Samuel Pitoiset
f2d5b7cd1c ac/spm: rename ac_spm_trace_data to ac_spm
This is shorter and it's the main struct that controls SPM, while
ac_spm_trace contains the generated data only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22707>
2023-04-27 07:24:54 +00:00
Samuel Pitoiset
0d4fa8e5c6 ac/spm: introduce ac_spm_trace and ac_spm_get_trace()
For more code isolation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22707>
2023-04-27 07:24:54 +00:00
Samuel Pitoiset
44a2e5ba38 radv: only enable extendedDynamicState3ConservativeRasterizationMode on GFX9+
If extendedDynamicState3ConservativeRasterizationMode is enabled,
VK_EXT_conservative_rasterization is mandatory.

Fixes recent updates in dEQP-VK.info.device_mandatory_features.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22681>
2023-04-27 06:15:16 +00:00
Erik Faye-Lund
0a718c9354 nir: clean up white-space in deref-printing
Without this, we get some trailing spaces in some cases, and some
double space in some other cases. Let's clean that up a bit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22550>
2023-04-27 05:39:57 +00:00
Dave Airlie
d8f3060bd9 radv/video: start adding gfx11 vcn decoder
On gfx11 the vcn decoder moved into the vcn encoder ring,
now known as the unified vcn ring.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
89df5976f8 radv/video: fix dpb surface programming
This just programs the dpb fields directly from the image surface.

Makes things happier on navi33

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
6b75c365a8 radv/video: add a video addr gfx mode
This will be different on gfx11+ so add a settable field for it

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
ca7a2e508d radv/winsys: handle encoder queue padding/submits.
The encoder queue doesn't like padding at all, don't pad in the sysmem
paths for encoder queue.

The encoder queue will be using on gfx11 for decoding.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
2fdf75dadf radv: set a video decode ip block in physical device.
This makes it easier to add navi 3x

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
d8262e26a2 radv/video: add missing gfx family
This is compatible with rdna2 but was just missing.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
e895c7ba56 radeonsi/ac: move some vcn defines to common
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Mike Blumenkrantz
dfd39d1d9d zink: enable EXT_shader_object for generic precompiles
this should match the functionality of GPL, but it should also (theoretically)
have significantly less CPU overhead, so I've enabled this to be the new
default when available

currently I'm not changing any of the requirements for shader object enablement,
so this is probably only be usable on desktops

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
29a62dd2ae zink: make zink_shader_spirv_compile public
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
0b4e8fcd39 zink: use zink_shader_object for pipeline compiles from zink_gfx_program
this matches up the rest of the codebase using zink_shader_object

zink_gfx_program::objects is left in place for shader binding so that
the entire array can always be bound in one call

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
8a397b7649 zink: add a union to zink_gfx_pipeline_cache_entry for gpl
just code motion for now

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
a0df43f3ee zink: avoid accessing zink_gfx_program::modules during pipeline compile
this allows a different array of modules to be passed in

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
76fbc85220 zink: allow zink_shader_module to be either a shobj or a mod using a bool
this allows shader modules to more accurately represent the contents of
the zink_shader_object for which they are containers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
36b014b28d zink: store spirv onto zink_shader_object structs
this makes it convenient for reuse

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
a3730531af zink: use zink_destroy_shader_module() for compute to deduplicate code
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
6ae2c62b7c zink: use zink_shader_object for zink_shader_module
this streamlines a bit more code, though nothing changes functionally

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
e0c58688c5 zink: delete redundant conditional
this is checked literally 2 lines above

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
5922c2efa9 zink: deduplicate separable program replacement handling
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
9d112791a5 zink: use local screen var in zink_gfx_program_update_optimal()
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
1c3bd0f218 zink: add zink_program::uses_shobj for managing shader object binds
this is going to be more flexible than just checking for separable+EXT

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
db4017cf36 zink: explicitly block sample shading in the GPL precompile path
this can't be precompiled, so don't bother trying

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
96eeff5660 zink: rename 'separate' param in shader compilation to 'can_shobj'
this will better reflect the usage of the param

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
492a1cf49e zink: add ZINK_DEBUG=noshobj to disable EXT_shader_object
for debugging/testing

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:17 +00:00
Mike Blumenkrantz
8650aa0560 zink: don't run update_so_info if shader has no outputs
this probably means all outputs were eliminated by the linker,
but in any case it's not going to do anything

fixes spec@glsl-1.50@execution@interface-blocks-api-access-members

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:16 +00:00
Mike Blumenkrantz
bf746b5921 zink: add a workaround for a nir_assign_io_var_locations bug
drivers that use nir_assign_io_var_locations() with EXT_shader_object all
have the same bug with a shader interface that looks like this:

shader output block:
* PSIZ
* VAR0
* VAR8

shader input block:
* VAR0
* VAR8

in this case, output driver locations will be assigned like:
* PSIZ=0
* VAR0=1
* VAR8=2

and input driver locations will be:
* VAR0=0
* VAR8=1

which breaks the shaders even though this is a totally legitimate thing
to do

thus, a second set of shaders have to be created without PSIZ to work around
the bug since I've already spent 18+ hours trying to fix it and have only succeeded
in breaking every driver that uses it

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22725>
2023-04-27 01:33:16 +00:00
Sviatoslav Peleshko
697ed61e7c anv: Improve image/view usage bits verification
This change makes usage bits verification closer to the Vulkan spec.
i.e. VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT does not always require all formats
to support all the requested usage bits.
Also, VK_IMAGE_CREATE_EXTENDED_USAGE_BIT, when combined with
VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT can relax the requirements for the
usage supported by the original image format.

v2: Removed strict verification of the format_list_info formats usage
    per chadversary's suggestion. Other minor style/comments tweaks.

v3: Added checking of all compatible formats when
    VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT and VK_IMAGE_CREATE_EXTENDED_USAGE_BIT
    are specified, but no list of possible formats was given.

v4: Add VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT handling.

Cc: 22.2 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6031
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17182>
2023-04-27 01:04:44 +00:00
Sviatoslav Peleshko
9899151361 anv: Handle UNDEFINED format in image format list
It's not invalid to have this value in the list, but the only case it
is actually valid as format in the creation of an image or image view
is with Android Hardware Buffers which have their format specified
externally.

So we can just ignore all entries with VK_FORMAT_UNDEFINED.

Cc: 22.2 <mesa-stable>
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17182>
2023-04-27 01:04:44 +00:00
Sviatoslav Peleshko
0ed8a48ce9 isl: Check all channels in isl_formats_have_same_bits_per_channel
Cc: 22.2 <mesa-stable>
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17182>
2023-04-27 01:04:44 +00:00
Gert Wollny
337dc7d766 r600: remove TGSI code path
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7780
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7342

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21521>
2023-04-27 00:44:39 +00:00
Harri Nieminen
608ed04cc1 glx: fix typos
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22663>
2023-04-26 23:52:21 +00:00
Harri Nieminen
523dffe6cd egl: fix typos
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22663>
2023-04-26 23:52:21 +00:00
Erik Faye-Lund
9aefd97cfd docs: use custom html theme
This uses the new custom HTML theme for Sphinx, so our documentation
looks similar to our website.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8399>
2023-04-26 22:45:41 +00:00
Erik Faye-Lund
3b6f549e96 docs: remove support for old sphinx-versions
We're not using them, so no point in keeping support around.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8399>
2023-04-26 22:45:41 +00:00
Erik Faye-Lund
e64dae9441 docs: translate admonitions into bootstrap alerts
Sphinx and Bootstraps disagree on what these are called. Let's try to
bridge that gap, by rewriting things a bit.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8399>
2023-04-26 22:45:41 +00:00
Erik Faye-Lund
f72033bb70 docs: add bootstrap extension
To get Sphinx and Bootstrap to work well together, we need to massage
the output from Sphinx a bit. This adds an extension to do such changes,
based on work from here:

https://github.com/pydata/pydata-sphinx-theme

...However, because we don't ship as an external theme, we can't just do
things as a part of __init__.py, so instead we register an extension
that does the heavy lifting for us.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8399>
2023-04-26 22:45:41 +00:00
Erik Faye-Lund
7da0482636 docs: add custom html theme
This custom theme will make the docs look more like the main website,
which makes it slightly less confusing to navigate around when crossing
between the two.

The icon link.svg is from Feathericons:
https://feathericons.com/?query=link

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8399>
2023-04-26 22:45:41 +00:00
Erik Faye-Lund
3e612aa86e docs: sort extensions
It's easier to keep this sorted if we have each element on a separate
line. Let's do that for long-term ease of maintainability.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8399>
2023-04-26 22:45:41 +00:00
Axel Davy
ad1e64551d frontend/nine: Fix num_textures count
util_last_bit already included the +1

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11865?commit_id=9205a45da50ebc6159169ba42b02d8475b09bfd7
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8894

cc: mesa-stable

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22645>
2023-04-26 21:45:02 +00:00
Mike Blumenkrantz
13eaa7cdd0 zink: reapply VkImageViewUsageCreateInfo when rebinding a surface
attachment bits must always be removed if they are not supported

fixes (ANV):
KHR-GL46.texture_view.view_classes

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22713>
2023-04-26 21:22:43 +00:00
Mike Blumenkrantz
792c2956ac zink: break out VkImageViewUsageCreateInfo applying for reuse
no functional changes

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22713>
2023-04-26 21:22:43 +00:00
Patrick Lerda
c39a2d67ea crocus: fix refcnt imbalance related to framebuffer
Indeed, the hardcoded framebuffer cleanup doesn't handle "resolve".

For instance, this issue is triggered with "piglit/bin/glx-copy-sub-buffer -samples=2 -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: f5bde99cbd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22554>
2023-04-26 21:07:44 +00:00
Karol Herbst
3af2ab02f3 rusticl/program: use if let to get rid of an unwrap in build
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22434>
2023-04-26 20:49:42 +00:00
Karol Herbst
f745a07b36 rusticl/program: rework dynamic Program state
We had a lot of implicit locks going on even though there was strictly no
need in doing so. This makes the compilation APIs more atomic while also
providing a cleaner interface.

Not in the mood of splitting it up without deadlocking in the middle. So
it's one big commit sadly.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22434>
2023-04-26 20:49:42 +00:00
Antonio Gomes
2b01934bc8 rusticl: Move nir compilation to Program
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22434>
2023-04-26 20:49:42 +00:00
Mike Blumenkrantz
feb4103272 zink: prune some validation errors from ci
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22715>
2023-04-26 19:37:58 +00:00
Alyssa Rosenzweig
1ede7c053b pan/bi: Don't set has_fsub
All this option controls is fusing fadd(x, fneg(y)) into a single instruction,
but our modifier propagation can already do that without the special cases.

shader-db changes are mostly noise.

total instructions in shared programs: 2698039 -> 2697812 (<.01%)
instructions in affected programs: 156742 -> 156515 (-0.14%)
helped: 280
HURT: 109
helped stats (abs) min: 1.0 max: 12.0 x̄: 1.69 x̃: 1
helped stats (rel) min: 0.08% max: 10.71% x̄: 0.65% x̃: 0.32%
HURT stats (abs)   min: 1.0 max: 8.0 x̄: 2.26 x̃: 2
HURT stats (rel)   min: 0.15% max: 5.77% x̄: 2.08% x̃: 2.22%
95% mean confidence interval for instructions value: -0.80 -0.36
95% mean confidence interval for instructions %-change: -0.05% 0.28%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 143679.94 -> 143676.33 (<.01%)
cycles in affected programs: 617.98 -> 614.38 (-0.58%)
helped: 148
HURT: 3
helped stats (abs) min: 0.015625 max: 0.1875 x̄: 0.02 x̃: 0
helped stats (rel) min: 0.17% max: 3.33% x̄: 0.71% x̃: 0.57%
HURT stats (abs)   min: 0.015625 max: 0.046875 x̄: 0.03 x̃: 0
HURT stats (rel)   min: 0.66% max: 2.27% x̄: 1.46% x̃: 1.45%
95% mean confidence interval for cycles value: -0.03 -0.02
95% mean confidence interval for cycles %-change: -0.77% -0.56%
Cycles are helped.

total fma in shared programs: 22102.44 -> 22098.33 (-0.02%)
fma in affected programs: 395.98 -> 391.88 (-1.04%)
helped: 123
HURT: 3
helped stats (abs) min: 0.015625 max: 0.1875 x̄: 0.03 x̃: 0
helped stats (rel) min: 0.43% max: 18.75% x̄: 1.81% x̃: 0.89%
HURT stats (abs)   min: 0.015625 max: 0.046875 x̄: 0.03 x̃: 0
HURT stats (rel)   min: 0.66% max: 4.17% x̄: 2.09% x̃: 1.45%
95% mean confidence interval for fma value: -0.04 -0.03
95% mean confidence interval for fma %-change: -2.17% -1.27%
Fma are helped.

total cvt in shared programs: 14735.23 -> 14735.80 (<.01%)
cvt in affected programs: 969.64 -> 970.20 (0.06%)
helped: 179
HURT: 121
helped stats (abs) min: 0.015625 max: 0.09375 x̄: 0.02 x̃: 0
helped stats (rel) min: 0.17% max: 46.15% x̄: 1.13% x̃: 0.31%
HURT stats (abs)   min: 0.015625 max: 0.125 x̄: 0.03 x̃: 0
HURT stats (rel)   min: 0.42% max: 28.57% x̄: 6.62% x̃: 6.25%
95% mean confidence interval for cvt value: -0.00 0.01
95% mean confidence interval for cvt %-change: 1.32% 2.68%
Inconclusive result (value mean confidence interval includes 0).

total quadwords in shared programs: 1460952 -> 1460680 (-0.02%)
quadwords in affected programs: 10216 -> 9944 (-2.66%)
helped: 39
HURT: 5
helped stats (abs) min: 8.0 max: 8.0 x̄: 8.00 x̃: 8
helped stats (rel) min: 0.97% max: 11.11% x̄: 4.53% x̃: 3.45%
HURT stats (abs)   min: 8.0 max: 8.0 x̄: 8.00 x̃: 8
HURT stats (rel)   min: 12.50% max: 25.00% x̄: 15.71% x̃: 14.29%
95% mean confidence interval for quadwords value: -7.74 -4.62
95% mean confidence interval for quadwords %-change: -4.43% -0.04%
Quadwords are helped.

total threads in shared programs: 53538 -> 53537 (<.01%)
threads in affected programs: 2 -> 1 (-50.00%)
helped: 0
HURT: 1

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22687>
2023-04-26 17:23:27 +00:00
Samuel Pitoiset
5e6c716173 docs: add missing ACO_DEBUG=force-waitdeps
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22688>
2023-04-26 16:40:27 +00:00
Samuel Pitoiset
b0b55dc602 docs: rename ACO_DEBUG=noscheduling to ACO_DEBUG=nosched
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22688>
2023-04-26 16:40:27 +00:00
Adam Jackson
218aa77941 egl: Clear EGL_WINDOW_BIT for non-double-buffered EGLConfigs
EGL windows are not required to support single-buffered rendering,
and it's awful, so let's not.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22685>
2023-04-26 15:44:31 +00:00
Samuel Pitoiset
3f14fd8578 radv: reserve command buffer index for SQTT
These indexes are used to match command buffers with queue events.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22670>
2023-04-26 13:57:39 +00:00
Samuel Pitoiset
9c33c4dcbe ac/sqtt: add a helper to get cmdbuf IDs per queue
These will be used by RADV to implement queue event timings.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22670>
2023-04-26 13:57:39 +00:00
Samuel Pitoiset
a7b4573c11 ac/sqtt: add rgp_sqtt_marker_cb_id definition
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22670>
2023-04-26 13:57:39 +00:00
Rhys Perry
5e20fbd424 aco: don't move exec reads around exec writes
Fixes flickering and blocky plants in Jedi: Fallen Order.

Also fixes flickering squares in The Last of Us Part 1.

fossil-db (navi21):
Totals from 92 (0.07% of 135636) affected shaders:
Instrs: 35324 -> 35354 (+0.08%); split: -0.03%, +0.11%
CodeSize: 189568 -> 189668 (+0.05%); split: -0.03%, +0.08%
Latency: 345305 -> 346529 (+0.35%); split: -0.02%, +0.37%
InvThroughput: 78632 -> 78625 (-0.01%)
SClause: 1955 -> 1972 (+0.87%); split: -0.61%, +1.48%
Copies: 1311 -> 1304 (-0.53%); split: -0.69%, +0.15%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8883
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8878
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22696>
2023-04-26 13:16:00 +00:00
Mike Blumenkrantz
2c77344048 bump VVL to 1.3.248
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22672>
2023-04-26 11:45:28 +00:00
Lionel Landwerlin
5c214117ad intel/tools: add ability to dump out raw kernels data
Useful for debug.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22703>
2023-04-26 10:00:54 +00:00
Pavel Ondračka
ca634459c7 r300: add CI list of known rv370 dEQP failures
We don't have CI, but its still convenient for local testing.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22705>
2023-04-26 09:42:38 +00:00
Pavel Ondračka
db6c3cd13d r300: fix unconditional KIL on R300/R400
0: KIL -none.1111

Negate is not allowed for texturing opcodes, so the incorrect swizzle
was detected, however later optimization, where we try to rewrite incorrect
swizzles from constant (immediate) registers by adding a new ones with
correct order was interfering and not handling this correctly, so we
ended with

CONST[0] = {    -1.0000    -1.0000    -1.0000    -1.0000 }
  0: KIL const[0].xyz-w;

Even if it would get the swizzle right, texturing opcodes can't read from
constant registers, so just skip it and let this be handled by a later
part which inserts an extra mov instead.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Fixes: a8e1e5b5c2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22704>
2023-04-26 09:25:13 +00:00
Martin Roukala (né Peres)
7d4eb78e1b radv/ci: document another vkcts flake on vega10
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22702>
2023-04-26 08:32:56 +00:00
Erik Faye-Lund
c5ad3d3bc9 docs: correct spelling of "frame"
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
2234a7f86f docs: correct spelling of "tagged"
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
870871c6a7 docs: correct spelling of "source"
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
c3400a787b docs: toplevel -> top-level
This is how we spell it elsewhere.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
690a05579b docs: vlan -> VLAN
VLAN is an abbreviation, so let's spell it in all-caps for clarity.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
1a42e8ac44 docs: use correct tick for "doesn't"
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
9f410bcb96 docs: perfetto -> Perfetto
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
c1ebded76e docs: Anv -> ANV
We're usually spelling ANV in allcaps, so let's do that here as well.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
1c35ad0d63 docs: cma -> CMA
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
ebffd3afed docs: did't -> didn't
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
9b1a99c89e docs: codepath -> code-path
This is consistent with how we spell this elsewhere in the docs.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
dc788aaa6f docs: backfacing -> back-facing
This is consistent with how the OpenGL spec spells it.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
6d945b4e11 docs: statechanges -> state changes
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
57c87d4661 docs: renderpass -> render pass
The Vulkan spec spells render pass in two words, so let's do the same.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22286>
2023-04-26 08:09:37 +00:00
Erik Faye-Lund
b9ba2c272a glsl: remove ir_state_slot::swizzle
Same story as with the NIR counterpart in the previous commit.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22620>
2023-04-26 05:51:39 +00:00
Erik Faye-Lund
4e8b532db3 nir: remove nir_state_slot::swizzle
This is only ever written to, never read from. Let's just get rid of it!

This also saves us a few needless includes.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22620>
2023-04-26 05:51:39 +00:00
Mike Blumenkrantz
4c47d83051 zink: use EXT_shader_object to implement generic separate shader precompile
this adds precompile for all separate shader stages (+tcs,tes,geom)
using separate shaders, which should eliminate stuttering for games
using it (e.g., Tomb Raider)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
234f9953a2 zink: fix longstanding TODO for generated tcs
with dynamic pcp this doesn't matter, and this should only be reached
in async mode if dynamic pcp is available

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
d5a3e2db89 zink: handle all stages in fixup_io_locations()
this makes the handling a bit more complex, as both input and output
need to be handled for most stages, and also the per-component handling
gets trickier

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
7a83d6289e zink: move separate shader creation to shader CSO creation
this is a more logical place for it and also enables u_blitter
shaders to be fast-linked

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
0d448d441c zink: use a more standardized loop for initing separate shader program descriptors
this should be identical to previous behavior

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
01694e5bf3 zink: assign separate shader prog stages from ctx->shader_stages
this is functionally equivalent given the checks above which already
restrict which stages can be passed

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
7415627853 zink: move some shader CSO functions around
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
fe095fcdcd zink: switch to a regular loop to wait on precompile shader fences
even if these aren't done yet, it'll still be faster to wait than
to start compiling new pipelines now

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
ab8499fe00 zink: streamline separate shader descriptor update
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
991d9d9924 zink: simplify separate shader prog init a little
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
38d149ffc7 zink: use intermediate variable for separate shader db resize check
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Mike Blumenkrantz
f46e5f2c0c zink: use intermediate variable for separate shader descriptor update loop
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22671>
2023-04-26 05:12:25 +00:00
Qiang Yu
5c287290d8 aco,radv: remove unused aco compile options
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
a4b60295a7 aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv
The side effect is removing the aco/llvm backend bc optimization code
and linear/persp_centroid variable.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
df74919bc2 ac/nir/ps: remove used nir_variable if created
RADV won't do this, so remove them at last.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
bfcf03872e radv: implement nir_load_barycentric_optimize_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
33d683bf09 ac/llvm: remove output variable declaration for radv ps
radv ps does not support epilog when llvm, so outputs will always
be lowered to exports in nir.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
290c3d360e aco,radv: lower outputs to exports when nir for monolithic ps
Remove the compiler backend code for outputs to exports.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
d3611af389 aco: support nir_export_amd with ps targets
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
471418077a ac/nir/ps: add no_color_export option
For radv which always do ps lower but may use epilog or not.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
c877d26454 ac/nir/ps: use nir_export_dual_src_blend_amd when aco
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
9763b6e0da aco: implement nir_export_dual_src_blend_amd
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
583402a332 aco: move create_fs_dual_src_export_gfx11 above
Will be used in visit_intrinsic(), content is not changed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
eb1fe8c32f nir: add nir_export_dual_src_blend_amd intrinsic
For GFX11 export dual source blend outputs when ACO.
ACO need a pseudo instruction to emit a block of
code which can't be done in nir currently.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Rhys Perry
01f4addc18 ac/nir/ps: fix null export write mask miss set to 0xf
Fixes: c182154456 ("ac/nir: add ac_nir_lower_ps")
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Daniel Schürmann
1080ff3971 radv/rt: remove merged VkRayTracingShaderGroupCreateInfoKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
b72c50a885 radv/rt: replace uses of pGroups with radv_ray_tracing_group
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Friedrich Vock
c809c05f4f radv: Hash pipeline libraries separately
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
a98b44cd34 radv/rt: add shader stage indices to radv_ray_tracing_group
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
1a0ae06091 radv/rt: rename radv_ray_tracing_module -> radv_ray_tracing_group
This name better reflects the purpose and content of this struct.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Charmaine Lee
c661f38342 svga: set PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY for VGPU10 device
Instead of forcing vertex buffer stride to be 4 byte aligned only,
DX10 actually allows the stride to be non 4-byte aligned but the
alignment of an element must be the nearest power of 2 greater or equal to the
width of the element's format, or 4, whichever is less.  So the requirement is
better met with PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY which if set to
TRUE, the sum of vertex element offset + vertex buffer offset + vertex buffer
stride must be aligned to the vertex attributes component size.
Note: PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY cannot be set
with other alignment-requiring CAPs, so we have to return 0 for all the
other alignement CAPs.

This avoids some unnecessary software vertex translate fallback.

cc: mesa-stable

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22689>
2023-04-26 02:29:34 +00:00
Mark Janes
acb2a7d2ec intel/dev: report stepping for TGL systems
Workaround 14010672564 requires a check for the TGL B0 stepping.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22458>
2023-04-26 02:00:17 +00:00
Mark Janes
47ac056d0f intel/dev: update mesa_defs.json from defect database
These modifications represent:

 * changes to defects made since Feb 16, 2023
 * changes to automated processing of defect state

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22458>
2023-04-26 02:00:17 +00:00
Illia Polishchuk
45ea17d244 glx: add fail check for current context in another thread
The GLX spec for glXMakeCurrent (3.3):
"If ctx is current to some other thread, then glXMakeCurrent will generate
a BadAccess error"

The GLX spec for glXCopyContext (3.3):
"If the destination context is current for some thread then a BadAccess
error is generated"

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7961
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22546>
2023-04-26 00:20:08 +00:00
Daniel Schürmann
2795cf7422 radv/rt: properly destroy radv_ray_tracing_lib_pipeline on error
Also return the correct error code.

Fixes: 4dafb69d61 ('radv/rt: defer library_pipeline allocation')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22684>
2023-04-25 23:52:49 +00:00
Emma Anholt
74a8f118a2 ci/zink: Try to update TGL results for new MSAA behavior.
A few fixes, but mostly tons of new GPU hangs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22691>
2023-04-25 22:36:15 +00:00
Emma Anholt
0e9036c55e ci/crocus: Note a recent regression.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22691>
2023-04-25 22:36:15 +00:00
Emma Anholt
72520e5a7b ci/lima: Skip ppgtt_memory_alignment that flaked a job with the oomkiller.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22691>
2023-04-25 22:36:15 +00:00
Emma Anholt
35157270c8 ci/panfrost: Drop tex3d-maxsize on g52.
Implicated in 3 job-level flakes where Xorg got killed yesterday.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22691>
2023-04-25 22:36:15 +00:00
David Heidelberg
2bd17f832c ci: add a660 firmware into rootfs
Until we bump to Debian 12 (bookworm).

Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22604>
2023-04-25 20:41:50 +00:00
David Heidelberg
cc6f2589ec ci/lava: add support for HDK 888 firmware
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22604>
2023-04-25 20:41:50 +00:00
David Heidelberg
5dd68b6ba6 ci/lava: implement fastboot support
Based on work from Tomeu Vizoso.

Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22604>
2023-04-25 20:41:50 +00:00
David Heidelberg
3f553c6adb ci: add Adreno 660 on sm8350 chipset (HDK 888)
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22604>
2023-04-25 20:41:50 +00:00
Patrick Lerda
6a8e6716ac aux/draw: fix memory leak related to ureg_get_tokens()
Indeed, the function nir_to_tgsi() returns an ureg_get_tokens() allocated
object which is assigned locally. The ureg_get_tokens() allocated object
should be freed.

For instance, this issue is triggered with a llvm enabled lima,
"piglit/bin/gl-1.0-rendermode-feedback -auto -fbo":
Direct leak of 512 byte(s) in 1 object(s) allocated from:
    #0 0x7faeaa4500 in __interceptor_realloc (/usr/lib64/libasan.so.6+0xa4500)
    #1 0x7fa4a88f1c in tokens_expand ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:239
    #2 0x7fa4a88f1c in get_tokens ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:262
    #3 0x7fa4a900f4 in copy_instructions ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2079
    #4 0x7fa4a900f4 in ureg_finalize ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2129
    #5 0x7fa4a91dfc in ureg_get_tokens ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:2206
    #6 0x7fa4b20a2c in nir_to_tgsi_options ../src/gallium/auxiliary/nir/nir_to_tgsi.c:4011
    #7 0x7fa4a0c914 in draw_create_vertex_shader ../src/gallium/auxiliary/draw/draw_vs.c:77

Fixes: b5e782f5f4 ("aux/draw: use nir_to_tgsi for draw shader in llvm path")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21924>
2023-04-25 20:04:43 +00:00
Friedrich Vock
b73e2df47a radv: Don't leak the RT prolog binary
Fixes: 063d0c90 ("radv: Combine all the parts together with a main loop for an RT pipeline.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22535>
2023-04-25 19:32:42 +00:00
Friedrich Vock
23c2dbd6ba radv/rt: Plug some memory leaks during shader creation
nir_inline_function actually clones instructions instead of moving them.
Free the shaders explicitly after inserting them instead.

Fixes: 207ce6d658 ("radv: Add helper to inline shaders into the main shader.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22535>
2023-04-25 19:32:42 +00:00
Mike Blumenkrantz
32dddb90ad zink: print the type of shader when dumping
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22692>
2023-04-25 19:04:39 +00:00
M Henning
d49c7b9582 nouveau/codegen: Check nir_dest_num_components
instead of reaching into a union and pulling out garbage when
the dest is a reg

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8863
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22674>
2023-04-25 18:17:41 +00:00
Rob Clark
4a00e79486 freedreno/a6xx: Change a618 tile_align_h back to 32
Commit 60bc7c0e22 ("freedreno: Specify GMEM tile alignment per GPU")
changed the tile_align_h from 32 to 16 (which _should_ be the correct
value).  But this is causing failure in android 9 skqp dstreadshuffle.
(But not, seemingly, with the android 11 version of skia+skqp, which
picks the same tile size.  So this is likely papering something over.)

For now, to unblock things, revert back to the previous tile_align_h.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22683>
2023-04-25 17:41:25 +00:00
Rob Clark
d437e389e0 freedreno: Fix resource tracking vs rebind/invalidate
We can now no longer rely on certain dirty bits to re-trigger draw time
resource tracking.  We need to use the new fd_dirty*_resource() APIs.

Fixes `org.skia.skqp.SkQPRunner#gles_recordopts` on android 9.

Fixes: 0a62a874fc ("freedreno: Re-work dirty-resource tracking")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22683>
2023-04-25 17:41:25 +00:00
Friedrich Vock
7cad28571b radv/rmv: Fix import memory
For some import memory, it is valid to specify zero size.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22532>
2023-04-25 16:07:00 +00:00
Friedrich Vock
fd389ade5c radv/rmv: Fix creating RT pipelines
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22532>
2023-04-25 16:06:59 +00:00
Jesse Natalie
bc8f7c53af ci/dzn: Run almost the full CTS
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22639>
2023-04-25 15:36:01 +00:00
Jesse Natalie
d34ac0a70b dzn: Re-design custom buffer descriptors
Previously, custom buffer descriptors were owned by a descriptor set. Now,
custom buffer descriptors are owned by the buffer. Additionally, we respect
the app-provided sizes when they're smaller than the buffer size, even if
robustness is not enabled, so that size queries work correctly.

This new design fixes several issues:
* Descriptor set copies were broken when they involved custom descriptors,
  because the original descriptor set owned the lifetime of the custom
  descriptor, the new one was just borrowing it. If those lifetimes didn't
  line up, problems would arise.
* A single buffer with the same sub-view placed in multiplel descriptor sets
  would allocate multiple slots, when it only really needed one.
* Custom buffer descriptors now lower the base offset to 0 to allow merging
  multiple overlapping (ending at the same upper bound) descriptors. Since
  the shader is already doing an offset add, making it nonzero is free.
* Dynamic buffer descriptors were incorrect before. The size passed into the
  descriptor set is supposed to be the size from the *dynamic* offset, not the
  size from the static offset. By allocating/populating the descriptor when
  placed into the set, it prevented larger offsets from working correctly. This
  buffer-owned design prevents cmdbufs from having to own lifetime of custom
  descriptors.

Fixes dEQP-VK.ssbo.unsized_array_length.float_offset_explicit_size

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22639>
2023-04-25 15:36:01 +00:00
Jesse Natalie
a12a15a9ea dzn: Handle depth bias for point fill mode emulation
Fixes dEQP-VK.draw.renderpass.depth_bias.depth_bias_triangle_list_point

This is not complete, there's no slope scale or clamp handling, but it
does handle static or dynamic (though dynamic is untested).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22639>
2023-04-25 15:36:01 +00:00
Jesse Natalie
542febcf59 dzn: Handle opaque BC1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22639>
2023-04-25 15:36:01 +00:00
Jesse Natalie
11cad58125 dzn: Use unrestricted copy alignments when available
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22639>
2023-04-25 15:36:00 +00:00
Jesse Natalie
71f36568cb ci/windows: Update Agility SDK to 1.610.2
Otherwise non-normalized sampling coords are unintentionally disabled

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22639>
2023-04-25 15:36:00 +00:00
antonino
39770c6503 zink: fix store subsitution in lower_pv_mode_gs_store
Previously it was assumed that between the and the variable there was
only one deref.

To handle all cases a new function is introduced that recreates a chain
of derefs.

Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22678>
2023-04-25 15:00:48 +00:00
antonino
a0645e3383 nir/zink: use sysvals in nir_create_passthrough_gs
Previously the passthrough gs shader loaded some values with uniform
loads using sevaral hardcoded values.

This was not flexible for other drivers and started becoming too
unflexible for zink itself.

Use system values instead and use a lowering pass in zink.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22667>
2023-04-25 13:11:59 +00:00
Karmjit Mahil
cfd525d097 pvr: Add PVR_DW_TO_BYTES()
We use dwords (32 bit) quite a bit around the code base. Previously
we used '* 4', '<< 2', or '* sizeof(uint32_t)' to go from dwords to
bytes. The conversion isn't always clear when other operations
happen in the same line, which can leave one wondering where the
multiplication came from.
PVR_DW_TO_BYTES() should make the code more obvious as well as
making the conversion more consistent.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22658>
2023-04-25 12:55:43 +00:00
Tapani Pälli
e501b31e15 anv: implement state cache invalidate for Wa_16013063087
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22651>
2023-04-25 10:45:55 +00:00
Tapani Pälli
72fc56aa37 anv: cleanup bitmask construction for PIPELINE_SELECT
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22651>
2023-04-25 10:45:55 +00:00
Tapani Pälli
5e5ca30785 iris: implement state cache invalidate for Wa_16013063087
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22651>
2023-04-25 10:45:55 +00:00
Iago Toral Quiroga
c2003535b9 broadcom/compiler: return early for SFU op latency calculation
Since we are returning a fixed latency for these check for them
earlier and return early if they match.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22675>
2023-04-25 11:15:34 +02:00
Iago Toral Quiroga
148473eae4 broadcom/compiler: fix incorrect ALU checks
We had a bunch of cases where we would check ALU parameters without
first checking if the ALU op was valid.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22675>
2023-04-25 11:15:26 +02:00
Pierre-Eric Pelloux-Prayer
65b40d0b7e radeonsi: implement fw based mcbp
Some chips support firmware based mcbp. If supported this means
radeonsi needs to allocate 3 buffers and pass them to the firmware.

From there, the firmware will handle mcbp and register shadowing
on its own so we don't need to insert LOAD packet in the preamble.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21986>
2023-04-25 06:47:11 +00:00
Pierre-Eric Pelloux-Prayer
8fe39e9997 amd: determine info->has_fw_based_shadowing
The shadow_size value will be 0 if unsupported.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21986>
2023-04-25 06:47:11 +00:00
Pierre-Eric Pelloux-Prayer
dc5a9e176c amd: update amdgpu_drm.h
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21986>
2023-04-25 06:47:11 +00:00
Marek Olšák
171d316402 venus: fix the RHEL8 build by using syscall for gettid
src/virtio/vulkan/vn_common.c: In function ‘vn_ring_monitor_acquire’:
src/virtio/vulkan/vn_common.c:129:16: error: implicit declaration of function ‘gettid’; did you mean ‘getgid’? [-Werror=implicit-function-declaration]
  129 |    pid_t tid = gettid();

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22489>
2023-04-25 05:16:33 +00:00
Emma Anholt
2c5a2f1a05 ci/valve: Add a workaround for finding libdrm on navi21s.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22495>
2023-04-25 04:43:10 +00:00
Emma Anholt
6986cf1d89 ci/zink: Drop anv/lvp validation exceptions that should be fixed in the CTS.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22495>
2023-04-25 04:43:10 +00:00
Emma Anholt
71fda36e7d ci/deqp: Update to 1.3.5.1 and pull in additional bugfixes from main.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22495>
2023-04-25 04:43:10 +00:00
Emma Anholt
8dc0015448 ci: Move some timeout xfails to skips.
We generally don't want to wait around for a minute for things to fail.
Note that some of these were already in their skips.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22495>
2023-04-25 04:43:09 +00:00
Karol Herbst
cc0de56a0e rusticl/device: allow enablement of fp64 via RUSTICL_FEATURES
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22649>
2023-04-25 04:27:57 +00:00
Karol Herbst
b90d1cfbfe rusticl/platform: add RUSTICL_FEATURES boilerplate
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22649>
2023-04-25 04:27:57 +00:00
Karol Herbst
389a199993 rusticl/platform: extract env variable parsing from Platform::init
In our platform initialization code we might want to access the parsed env
variables already. So do this in separate steps.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22649>
2023-04-25 04:27:57 +00:00
Karol Herbst
2283e9d155 rusticl/platform: make the initialization more explicit
It's not a lazy loaded type so doing the Once::call_once in every
Platform::get gives us a pointless atomic, which might be slow on some
platforms.

Every application has to call clGetPlatformIDs so we only need to do it
there.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22649>
2023-04-25 04:27:57 +00:00
Karol Herbst
400847a990 rusticl/device: improve advertisement of fp64 support
Enabling fp64 support makes rarely sense, but in case we do claim it, we
should also tell if it's a pure software implementation.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22649>
2023-04-25 04:27:57 +00:00
M Henning
b82004d960 gallium: Add pipe_shader_state_from_nir
and use it in nouveau

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22537>
2023-04-25 03:46:34 +00:00
M Henning
5889c13fcd nv50,nvc0: Use ttn for tgsi shaders by default
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22537>
2023-04-25 03:46:34 +00:00
M Henning
44db89b937 nv50,nvc0: Stop advertising TGSI by default
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22537>
2023-04-25 03:46:34 +00:00
M Henning
d11145e837 nv50,nvc0: Use nir in nv50_blitter_make_fp
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22537>
2023-04-25 03:46:34 +00:00
M Henning
a019d15668 nvc0: Use nir in nvc0_blitter_make_vp
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22537>
2023-04-25 03:46:34 +00:00
M Henning
8928d8d3ad nvc0: Use nir in nvc0_program_init_tcp_empty
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22537>
2023-04-25 03:46:34 +00:00
Brian Paul
35fa7937db lavapipe: asst. clean-ups in lvp_execute.c
Move loop var decls into loops.
Use designated initializers.
Replace some questionable memcpy/memset() calls with assignments.
Line-wrap, whitespace fixes.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22467>
2023-04-25 02:09:26 +00:00
Brian Paul
9b1addbf75 lavapipe: clean-ups in lvp_physical_device_get_format_properties()
Use new pscreen local var to shorten the code.
Line-wrap and align code for easier reading.
Consolidate |= assignments.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22467>
2023-04-25 02:09:26 +00:00
Brian Paul
625a9d4c03 lavapipe: clean-ups in lvp_GetQueryPoolResults()
Simplify the code which puts query results into the destination
buffer:
* Use a uint64 or uint32 pointer instead of uint8 to write the results
  to the buffer for less casting and simplifient pointer incrementing.
* Use MIN2() macro to be more concise.
And fix some indentation.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22467>
2023-04-25 02:09:26 +00:00
David Heidelberg
128e578c04 ci/mold: bump to 1.11.0
Fixes LTO issue.

Release notes: https://github.com/rui314/mold/releases/tag/v1.11.0

Acked-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22642>
2023-04-25 00:28:21 +00:00
Mike Blumenkrantz
6d5462658a llvmpipe: do late init for llvm builder
this avoids doing any llvm work during lavapipe enumeration which
might otherwise explode if lavapipe is not the actual driver that
gets used

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22600>
2023-04-25 00:04:08 +00:00
Mike Blumenkrantz
4a056807bc gallivm: break out native vector width calc for reuse
breaks dependency on lp_build_init()

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22600>
2023-04-25 00:04:08 +00:00
Juan A. Suarez Romero
78e448f4f9 v3d/ci: enable glsl 1.30 and 1.40 piglit tests
Now that we are exposing OpenGL 3.1, let's enable the proper supported
GLSL versions.

Acked-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22660>
2023-04-24 23:34:46 +00:00
Rob Clark
712daef3a8 freedreno: Add more tracepoint fields
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
dc4add8cdd freedreno/a6xx: Pass ring to __ONE_REG()
This happened to work before because the arg to OUT_REG() was also
called 'ring' (or there was a suitable local var in scope!!)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
daaa2917aa freedreno: Add dirty state logging
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
6ea7d8e223 freedreno/perfetto: Add shader_id for compute stages
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
f136f89487 mesa/nir: Add some perfetto traces
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
15499250f2 freedreno/ir3: More perfetto tracing
Some useful trace points that I had laying around.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
d36643bef5 util/log: Add missing "const"
Fixes warning:

  warning: ISO C++11 does not allow conversion from string literal to 'char *' [-Wwritable-strings]

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
09f19672a0 freedreno/registers: C++ struct casting
Using C style `(struct foo){ ..args..}` at least confuses eclipse, so
for C++ code use `{ ..args.. }` instead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:04 +00:00
Rob Clark
827363f886 freedreno: Extra casting to make C++ happy
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22646>
2023-04-24 22:42:03 +00:00
Emma Anholt
7f99cbf25e util/log: Fix log messages over 1024 characters.
The first attempt at the sprintf would have consumed part of va, so if
we're going to recurse on overflow to try again in a new allocation then
we have to do our work on a copy.

This was a common failure mode for MESA_GLSL=source, where it would just print:

  Mesa: info: GLSL source for fragment shader 1:
  Mesa: info: (null)

Fixes: 7a18a1712a ("util/log: improve logger_file newline handling")
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22618>
2023-04-24 21:56:05 +00:00
Iván Briano
4cfb4f7d12 anv: support fast color clears on vkCmdClearAttachments
As long as some conditions are met.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Iván Briano
5faf75dd74 anv: expose some helper functions
v2: (Rohan Garg)
- Make set_fast_clear_state take an image and format instead of an iview

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Iván Briano
9046319cc9 anv: factor out code for ccs_op and mcs_op
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Iván Briano
2a67a1f0c2 anv: make anv_can_fast_clear_color_view more generally available
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Iván Briano
a2e02c4ba4 anv: Remove dead parameters from copy_fast_clear_dwords
There's only one caller of this function and always passes false.

v2: (Nanley Chery)
- Also remove the aspect parameter

v3: (Nanley Chery)
- Rename the function so it's more clear in which direction it works

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Sagar Ghuge
e488773b29 anv: Fast clear depth/stencil surface in vkCmdClearAttachments
Instead of doing a slow depth clear, we can do depth fast clear in
vkClearAttachments.

Sascha Willems occlusionquery demo shows more than 2% perf boost with
this series.

On Felix's Tigerlake with the GPU at fixed frequency, this patch
improves performance of RoTR by +0.5%.

v2: (Nanley Chery)
- Clear stencil surface along with depth.
- Check for multilayer resources.
- Lookout for state.attachments.
- Fallback on slow clear for BDW and CHV if conditional rendering
  enabled.
- Keep flush in same function.

v3: (Nanley Chery)
- Return immediately after fast clearing.
- Remove unnecessary comment.

v4: (Nanley Chery)
- Add assertion for BLORP_BATCH_NO_EMIT_DEPTH_STENCIL.
- Remove unnecessary local variable.
- Add 3DSTATE_WM_HZ_OP comment.

v5: (Nanley Chery)
- Fix comments.
- Don't take fast depth clear path if BLORP_BATCH_PREDICATE_ENABLE set.
- Refactor code in can_hiz_clear_att.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Sagar Ghuge
ee03b30e45 anv: Move and make anv_can_hiz_clear_ds_view non-static
v2:
- Pass const image view param. (Nanley)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:49 +00:00
Sagar Ghuge
e04a414206 anv: Factor out code from anv_image_hiz_clear
Refactoring code from anv_image_hiz_clear which helps in future patches
to support fast depth clear in vkCmdClearAttachments.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
2023-04-24 21:33:48 +00:00
Emma Anholt
ae2784b832 blob: Don't valgrind assert for defined memory if we aren't writing.
The VK pipeline cache passes a NULL bytes with a nonzero size to a
NULL-data blob to set up the size of the blob.  In this case, we don't
actually execute the memcpy, so the non-existent "bytes" doesn't need to
have defined contents.  Avoids a valgrind warning:

==972858== Unaddressable byte(s) found during client check request
==972858==    at 0x147F4166: blob_write_bytes (blob.c:165)
==972858==    by 0x147F4166: blob_write_bytes (blob.c:158)
==972858==    by 0x14695FFF: vk_pipeline_cache_object_serialize (vk_pipeline_cache.c:240)
[...]
==972858==  Address 0x0 is not stack'd, malloc'd or (recently) free'd

Fixes: 591da98779 ("vulkan: Add a common VkPipelineCache implementation")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22617>
2023-04-24 20:48:33 +00:00
Emma Anholt
c060b649c5 ci/zink: Enable the validation layer on the TGL GL46 run.
We recently had an issue where an anv merge failed due to a bug in zink,
which validation would have caught.  Get some coverage by default on the
main branch.

This increases runtime from 9:30 to 12:10.  I don't feel good about this,
but I've got https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/4398 in
flight to try to knock the time back down.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22459>
2023-04-24 19:21:50 +00:00
Emma Anholt
75a08b04d7 ci: Move zink's validation layer setup to deqp-runner.sh.
I want the path to be always set in case someone wants some
ZINK_DEBUG=validation, rather than having to do it per test job.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22459>
2023-04-24 19:21:50 +00:00
Emma Anholt
5ae6a9bd70 ci/zink: Re-enable traces now that !20319 has landed.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22459>
2023-04-24 19:21:50 +00:00
Emma Anholt
c0f5f852ab ci: Add the Vulkan validation layer to amd64 rootfs builds.
We're going to want this for zink testing on actual HW drivers.  I haven't
sorted out the arm64 build yet, so no tu coverage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22459>
2023-04-24 19:21:50 +00:00
Emma Anholt
e38ca40082 ci: Make a variable for the repeated rootfs directory name.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22459>
2023-04-24 19:21:50 +00:00
Sathishkumar S
5307f6d03f frontends/va: return matching drm format for yuyv pipe format
return the matching drm format for YUYV pipe format in pipe_format_to_drm_format(), else
vlVaExportSurfaceHandle() fails to export a surface handle for YUYV surface.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22497>
2023-04-24 19:06:30 +00:00
Mike Blumenkrantz
edaf49160e zink: fix array copying in pv lowering
Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")

Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22669>
2023-04-24 18:00:20 +00:00
Mike Blumenkrantz
99121c9b77 nir/gs: fix array type copying for passthrough gs
same mechanics as in zink passes

Fixes: d0342e28b3 ("nir: Add helper to create passthrough GS shader")

Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22669>
2023-04-24 18:00:20 +00:00
Jesse Natalie
796109cb08 dzn: Align-up heap sizes when allocating memory
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8895
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22666>
2023-04-24 17:40:47 +00:00
Samuel Pitoiset
bdc4e3a5a6 radv: do not overallocate the CS array during submissions
Preambles/postambles are no longer added to the CS array.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22653>
2023-04-24 17:09:28 +00:00
André Almeida
41a3656149 radv: Search for guilty contexts at radv_check_status
When a GPU hung happens, all contexts are notified. They will receive
INNOCENT_CONTEXT if they are not the context that triggered the reset,
or GUILTY_CONTEXT otherwise.

At radv_check_status(), we return on the first context that was notified
as [GUILTY, INNOCENT]_CONTEXT, without further checks. This can make an
app think that it's innocent if the guilty context is not the first one
on the list of hw_ctx to be checked.

Check every context for a guilty one before returning CONTEXT_INNOCENT.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: André Almeida <andrealmeid@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22648>
2023-04-24 16:45:40 +00:00
Luca Weiss
dc6f704566 freedreno: Enable A506
Enable the Adreno 506 that is found in SoCs such as Snapdragon 450,
Snapdragon 625 or Snapdragon 632 (msm8953 family).

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22647>
2023-04-24 16:01:24 +00:00
Mike Blumenkrantz
905264f27d zink: add a driver workaround to disable background compiles
it's stupid to do optimized background compiles if the driver is going
to create the exact same pipeline, so add a workaround to disable
this behavior

should improve ci runtimes on lavapipe by some amount

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22613>
2023-04-24 15:37:30 +00:00
Juan A. Suarez Romero
b346c019d5 v3d: add support for ARB_texture_cube_map_array
This implements support for texture cubemap arrays.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22482>
2023-04-24 15:07:32 +00:00
Mike Blumenkrantz
1bc9efc10c zink: add z32s8 as mandatory GL3.0 profile attachment format
fixes #8616

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22608>
2023-04-24 14:33:58 +00:00
Mike Blumenkrantz
e4c4fca16e zink: don't pin flush queue threads if no threads exist
Fixes: 270f9c0b06 ("zink: add ZINK_DEBUG=flushsync")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22611>
2023-04-24 14:10:45 +00:00
Karol Herbst
a9cce40dab rusticl: don't set size_t-is-usize for >=bindgen-0.65
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8827
Fixes: 20c90fed5a ("rusticl: added")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22484>
2023-04-24 12:59:41 +00:00
Martin Roukala (né Peres)
62dd0370be zink/ci: mark 77 multisample-related tests as fixed
Reference: #6302
Fixes: a004825266 ("zink: don't render with multisampling when it is disabled")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22650>
2023-04-24 12:15:52 +00:00
Karol Herbst
9d7ba38013 ac/llvm: support shifts on 16 bit vec2
In OpenCL we can actually end up with those.

Fixes `basic astype` and those `integer_ops` OpenCL CTS tests:
integer_hadd
integer_rhadd
integer_upsample
quick_short_shift
quick_ushort_shift

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22597>
2023-04-24 13:17:05 +02:00
Karol Herbst
037b56bf0f radeonsi: lower mul_high
Fixes `integer_mad_hi` and `integer_mul_hi` `integer_ops` tests

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22597>
2023-04-24 13:17:00 +02:00
Sergi Blanch Torne
d8253efe99 Revert "ci: disable Collabora's LAVA lab for maintance"
This reverts commit def1d097c9

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22182>
2023-04-24 10:27:41 +00:00
Eric Engestrom
8b791c24ea v3d: document that V3D_DEBUG=shaderdb is *not* for shader-db
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22659>
2023-04-24 10:01:00 +00:00
Iago Toral Quiroga
18a3a0d915 broadcom/compiler: fix incorrect check for SFU op
Before testing the waddr for SFU we should first validate this
is indeed a valid (not NOP) magic write. Use the helper we have for
this which gets this right.

total instructions in shared programs: 12898957 -> 12850958 (-0.37%)
instructions in affected programs: 4328937 -> 4280938 (-1.11%)
helped: 19974
HURT: 439
Instructions are helped.

total max-temps in shared programs: 2211503 -> 2210893 (-0.03%)
max-temps in affected programs: 12924 -> 12314 (-4.72%)
helped: 509
HURT: 20
Max-temps are helped.

total sfu-stalls in shared programs: 22233 -> 21975 (-1.16%)
sfu-stalls in affected programs: 722 -> 464 (-35.73%)
helped: 297
HURT: 54
Sfu-stalls are helped.

total inst-and-stalls in shared programs: 12921190 -> 12872933 (-0.37%)
inst-and-stalls in affected programs: 4337977 -> 4289720 (-1.11%)
helped: 20015
HURT: 404
Inst-and-stalls are helped.

total nops in shared programs: 333743 -> 305911 (-8.34%)
nops in affected programs: 86902 -> 59070 (-32.03%)
helped: 14545
HURT: 76
Nops are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22593>
2023-04-24 09:34:20 +00:00
Iago Toral Quiroga
b3ac456eb1 broadcom/compiler: add a v3d_qpu_instr_is_legacy_sfu helper
This checks for the deprecated, old-style SFU instructions triggered by
magic writes.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22593>
2023-04-24 09:34:20 +00:00
Iago Toral Quiroga
4a3be610d5 broadcom/compiler: fix v3d_qpu_uses_sfu
We should check that the alu op is valid before testing the
write address.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22593>
2023-04-24 09:34:20 +00:00
antonino
ee4e7b9d4d zink: fix line strip offsets in pv mode emulation
Offsets for line strips don't need to alternate like they do for
triangle strips.

Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22599>
2023-04-24 08:59:20 +00:00
antonino
bdb3daab7c zink: fix exit condition on pv emulation loop
The exit condition was not correct causing the pv emulation lowering
pass to emit garbage for incomplete primitives.

Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22599>
2023-04-24 08:59:20 +00:00
antonino
89077b866c zink: use ring buffer to preserve last element
Previously, whenever a vertex was emitted immediately after emitting a
primitive, that vertex would not use the attributes that where assigned
last because the position variable got set.

Now the temporary attributes array is treated as a ring buffer and
whenever the position is set to 0 it's previous value is used as an
offset when accessing it. This way when a new primitive is created the
attributes at index 0 correspond to the last attributes written.

Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22599>
2023-04-24 08:59:19 +00:00
antonino
436dacf754 zink: fix pv mode lowring index calculation
The provoking vertex mode pass was calculating an offset and then using
it directly instead of adding it to the base index.

Fixes: 5a4083349f ("zink: add provoking vertex mode lowering")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22599>
2023-04-24 08:59:19 +00:00
Marcin Ślusarz
aa45b13398 anv: move nir_shader_gather_info to anv_pipeline_nir_preprocess
Fixes dEQP-VK.mesh_shader.ext.misc.custom_attributes*.

Fixes: 16c7c37718 ("anv: move preprocessing of NIR right before compilation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22629>
2023-04-24 08:43:51 +00:00
SoroushIMG
3291050cc1 zink: refcount the correct query pool
otherwise the pool is freed before the query and zink will
give the vulkan driver NULL query pool which can make it crash.

this was seen when running the following cases with
primitivesGeneratedQueryWithRasterizerDiscard and color write
features disabled:
dEQP-GL45.functional.tessellation.invariance.outer_triangle_set.triangles_fractional_odd_spacing
dEQP-GL45.functional.tessellation.invariance.outer_triangle_set.triangles_fractional_even_spacing
dEQP-GL45.functional.tessellation.invariance.outer_triangle_set.quads_equal_spacing
dEQP-GL45.functional.tessellation.invariance.outer_triangle_set.quads_fractional_odd_spacing
dEQP-GL45.functional.tessellation.invariance.outer_triangle_set.quads_fractional_even_spacing
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_equal_spacing_ccw
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_equal_spacing_ccw_point_mode
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_equal_spacing_cw
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_equal_spacing_cw_point_mode
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_ccw
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_ccw_point_mode
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_cw
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_cw_point_mode
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_even_spacing_ccw
dEQP-GL45.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_even_spacing_ccw_point_mode

Fixes: e5d517f362 ("zink: rework query pool overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22575>
2023-04-24 08:28:25 +00:00
SoroushIMG
f6b5e128c1 zink: fix incorrect line mode check for bresenham
the line requirement check logic was assuming mode index 0
is bresenhamLines, but it is actually rectangularLines.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22575>
2023-04-24 08:28:25 +00:00
SoroushIMG
8ca13afe15 zink: take location_frac into account in lower_line_smooth_gs
blender-demo-cube_diorama trace in traces-db hits this.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22575>
2023-04-24 08:28:25 +00:00
SoroushIMG
657fc39b09 zink: do not emit line stipple dynamic state when emulating
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22575>
2023-04-24 08:28:25 +00:00
Samuel Pitoiset
16d0b868c6 radv: add the perf counters BO to the preambles BO list
If the submission isn't chained for any reasons, we might end by
submitting the performance counter preambles without a command
buffer that added this BO to its list.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22627>
2023-04-24 06:45:23 +00:00
Sergi Blanch Torne
ea5535090a ci: disable Collabora's LAVA lab for maintance
This is to inform you of some planned downtime in the LAVA lab as follows:

    Start: 2023-04-24 08:00 GMT
    End: 2023-04-24 12:00 GMT

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22181>
2023-04-24 06:01:28 +00:00
Mike Blumenkrantz
483639d738 zink: add validation exceptions for shader object extension enable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
cd6625c6eb zink: use EXT_shader_object to (re)implement separate shaders
this reimplements the same functionality that exists already, but
using shader object instead of GPL

it must be disabled by default, as this extension is not (currently)
compatible with feedback loops

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
3baa9ed6d8 zink: remove redundant compute program batch ref
this is already handled in the function above

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
a76bdcd34c zink: run bo lowering passes for separate shader compile with uniform inlining
this is otherwise unable to pass ntv

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
3e5e5e58af zink: add a 'separate' flag to shader module compile to indicate separate shaders
not used yet

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
82abbe19c9 zink: move separate shader dsl creation to compiler function
no functional changes, just reordering

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
7f7b229c89 zink: minor whitespace cleanup
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:19 +00:00
Mike Blumenkrantz
535a8f0e96 zink: use zink_shader_object for precompiled separate shaders
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
d733e24648 zink: more zink_shader_object conversion
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
76f477e8d5 zink: make zink_shader_spirv_compile static
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
a1c994d60d zink: wrap return of compile_module()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
aa2cf4d7f3 zink: wrap zink_shader_compile_separate() return
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
5383bb4315 zink: hook up EXT_shader_object
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
9c0497275f zink: use tes to generate tcs
this makes more sense considering the tcs will be stored onto the tes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22612>
2023-04-24 02:49:18 +00:00
Mike Blumenkrantz
bba644ce82 draw: fix viewmask iterating
the frontend has to be flushed and setup again if only
the viewmask has changed since the last draw

Fixes: 03cbb7b104 ("draw: add view_mask rendering support")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22628>
2023-04-24 02:20:05 +00:00
Thomas H.P. Andersen
a18a51a708 nir/nir_lower_vec3_to_vec4: Use the nir_shader_instructions_pass() helper
Extracts some per-impl code to nir_lower_vec3_to_vec4 and then
converts to use the nir_shader_instructions_pass helper.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:37 +00:00
Thomas H.P. Andersen
e86c28a78b nir/nir_lower_to_source_mods: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:37 +00:00
Thomas H.P. Andersen
0ddf98e85d nir/nir_lower_two_sided_color: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:37 +00:00
Thomas H.P. Andersen
7e5dde11ef nir/nir_lower_uniforms_to_ubo: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:37 +00:00
Thomas H.P. Andersen
d0fdc8ec6a nir/nir_lower_var_copies: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:37 +00:00
Thomas H.P. Andersen
087b082f3d nir/nir_lower_viewport_transform: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:36 +00:00
Thomas H.P. Andersen
ab7138e283 nir/nir_lower_wpos_ytransform: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:36 +00:00
Thomas H.P. Andersen
ecab220c50 nir/nir_lower_wpos_center: Use the nir_shader_instructions_pass() helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11683>
2023-04-22 23:35:36 +00:00
Axel Davy
133e7ba571 frontend/nine: fix wfog
When wfog support is advertised, unless an orthogonal
projection matrix is detected, w is supposed to be used
instead of z for the fog equation when done in the pixel
shader.

Due to the spec being ambiguous, and tests being incomplete,
it seems we had got things wrong.
New tests confirm the behaviour.

For the explanation we will denote z_vs and w_vs the position
output's z and w channels in the vertex shader, and
z_ps, w_ps the position input z and w channels in the pixel shader.
w_ps = 1/w_vs
z_ps = z_vs/w_vs

In the programmable pixel shader, we used z_ps/w_ps, thus z_vs.
As basically z_vs and w_vs are usually in the same range, we didn't
notice an obvious difference with the correct behaviour.

In the ff pixel shader, we used z_ps for zfog and w_vs else.
z_ps was always used if a programmable vertex shader was detected.
This latter behaviour led to issue
https://gitlab.freedesktop.org/mesa/mesa/-/issues/8341

While using z_ps/w_ps like for programmable ps fixes the issue visually
for the same reason as it did for programmable ps, it breaks
wine tests using XYZRHW. These tests show that when passing
pre-transformed vertices and an orthogonal projection matrix,
z_vs is used, and due to the XYZRHW property, this is not
recovered by the z_ps/w_ps computation (instead z_ps=z_vs).
For the game affected by the issue, the projection matrix set
is not orthogonal.

The direct3D spec indicates that the projection matrix must be
set correctly for fog to work properly, even if we do not use the
transformation pipeline (could be related to xyzrhw, or programmable vs
or both). Previous tests had shown that the projection matrix
has the last two values of the last column tested against 0 and 1,
in order to activate zfog or wfog.
The R500 spec indicates that either z or 1/1/w can be used as source
for the fog computation, but it is not clear whether this is z_vs or
z_ps.

Tests confirmed the intuition that the correct behaviour
is to use z_ps (zfog) when an orthogonal projection matrix is set
(the spec spirit being that in that case z_ps=z_vs),
and 1/w_ps (wfog) else (even if programmable shaders are used).

This patch introduces this behaviour.
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8341

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22583>
2023-04-22 21:09:07 +00:00
Axel Davy
80d1da14f0 frontend/nine: fix fog key overflow
FOGTABLEMODE is 2 bits. It could thus
overwrite the part of the ps key reserved
for centroid interpolation.

Fix the size of FOGTABLEMODE and the key

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22583>
2023-04-22 21:09:07 +00:00
Axel Davy
9923a31945 frontend/nine: Apply writemask to pointsize
Seen when working on the code.
It seems like a sane thing to do, but it
might be wrong.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22583>
2023-04-22 21:09:07 +00:00
Axel Davy
02ce3abd8a frontend/nine: Fix missing clamping of pointsize for ff
Seen while working on this code.
It seems to be a sane thing to do.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22583>
2023-04-22 21:09:06 +00:00
Juan A. Suarez Romero
7edae7baa6 v3dv/ci: rename waiver test
Apparently dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_deltazero was
renamed to dEQP-VK.draw.renderpass.inverted_depth_ranges.nodepthclamp_deltazero.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22641>
2023-04-22 19:43:11 +02:00
Gert Wollny
6a78af1dbb r600/sfn: make sure f2u32 is lowered late and correctly for 64 bit floats
With the latest changes in opt_algebraic we got f2u32 in the final code
that should be lowered before conversion to assembly.

Fixes: b3685f3ba7
    nir/algebraic: insert patterns inside optimizations list

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22640>
2023-04-22 15:46:16 +02:00
Tatsuyuki Ishi
068738eea9 util: Add mesa_blake3 wrappers.
The wrappers mirrors the mesa_sha1 API to ease migration.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22387>
2023-04-22 01:28:38 +00:00
Tatsuyuki Ishi
0e30076d83 util/blake3: Patch with hidden visibility for asm symbols.
For Unix platforms, the symbol visibility needs to be hidden to avoid
exposing them in driver shared objects.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22387>
2023-04-22 01:28:38 +00:00
Tatsuyuki Ishi
77826e8352 util: Add a copy of BLAKE3 hash library.
The files are copied from upstream repo, with a few modifications to fix
build errors, as described in the README.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22387>
2023-04-22 01:28:38 +00:00
Dylan Baker
a01d9ac330 docs: update calendar for 23.0.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:08 +00:00
Dylan Baker
404e8991ca docs: update calendar for 23.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
328e832750 docs: update calendar for 23.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
d6821080cd docs: Add sha256 sum for 23.0.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
48e753d4c8 docs: add release notes for 23.0.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
63ad833dd0 docs: Add sha256 sum for 23.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
10a5ca13b5 docs: add release notes for 23.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
6a5a7e791f docs: Add sha256 sum for 23.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Dylan Baker
ef3e17bfb0 docs: add release notes for 23.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22635>
2023-04-21 20:26:07 +00:00
Rob Clark
37622b33c4 freedreno: Inline single-caller helpers
Now that we don't have the batch_reset() path, we can inline
batch_init() and batch_fini().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22602>
2023-04-21 20:04:59 +00:00
Rob Clark
d4e42d31c0 freedreno: Remove unused fd_batch_reset()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22602>
2023-04-21 20:04:59 +00:00
Gert Wollny
e3e077c9d4 r600/sfn: Lower tess levels to vectors in TCS
Thanks @anholt for pointing me in the right direction

Fixes: 84006587 glsl: Delete the lower_tess_level
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8884

v2: replace direct call to lowering pass with nir compiler option

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22622>
2023-04-21 19:50:46 +00:00
Hans-Kristian Arntzen
32f7ff2c20 wsi/x11: Fix present ID signal when IDLE comes before COMPLETE.
It appears to be possible that IDLE is observed before COMPLETE.
In this case, an application may access present_id in subsequent
QueuePresentKHR and race against the fence worker reading present_id.

Solve this by adding a separate signal_present_id that is used when
completing to avoid the race.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22633>
2023-04-21 19:15:06 +00:00
Samuel Pitoiset
0b1cd7eb07 Revert "ci/radv: Demote navi21 to manual until recent flakiness resolves."
This reverts commit 2a9b990fa3.

This should be fixed now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22625>
2023-04-21 18:47:14 +00:00
Samuel Pitoiset
84d8ea6e2b radv/amdgpu: fix adding continue preambles and postambles BOs to the list
Previously, continue preambles and postambles were added directly to
the CS array which means all BOs were correctly added to the BO list,
and this has been broken recently. IB BOs need to be added to the list.

When a BO isn't added to the list as part of a submission, it might
randomly VM faults.

This fixes VM faults and random GPU hangs on NAVI21 in Mesa CI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8849
Fixes: 41a9bced31 ("radv: Fill continue preambles and postambles properly.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22625>
2023-04-21 18:47:14 +00:00
Harri Nieminen
c3c63cb1d8 broadcom: fix typos
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22591>
2023-04-21 17:19:46 +00:00
antonino
177c92fe7c zink/ci: remove xt_framebuffer_multisample-interpolation fail
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22626>
2023-04-21 14:22:18 +00:00
antonino
a004825266 zink: don't render with multisampling when it is disabled
Previously zink ignored whether multisampling was enabled and rendered
with mulisampling whenever the target buffer had multiple samples.

This change now will only render with multisampling when it is enabled
and will use a lowering pass to make sure this case is handled correcly.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22626>
2023-04-21 14:22:18 +00:00
antonino
14d5892609 zink: add to multisample field to zink_gfx_pipeline_state
This field will store whether multisample is enabled, this is needed to
manage the case where a multisampling buffer is used with multisampling
disabled.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22626>
2023-04-21 14:22:18 +00:00
antonino
420f2c0878 zink: add single_sample to fs key
This key will be 1 when a multisampled buffer is used without
multisampling enabled. This requires a lowering pass.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22626>
2023-04-21 14:22:18 +00:00
Mike Blumenkrantz
d2ccdc3e8d mesa: fix ms fallback texture creation
when a ms fallback texture is created, it has to actually be a ms texture
in order to be consistent with driver expectations for a given sampler in
a shader

this adds sample querying to both ends of the fallback creation to ensure
that a sample count is passed to the driver

affects:
KHR-GL46.sample_variables.position.fixed.samples_0

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22492>
2023-04-21 13:21:46 +00:00
Mike Blumenkrantz
c29359a008 mesa/st: try to block multisampled texsubimage from doing cpu writes
this is only hit when populating multisampled fallback textures, so
don't assert if it fails since some drivers are able to handle it

d3d12 can't, however, and this should be enough to work around that issue

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22492>
2023-04-21 13:21:46 +00:00
Lionel Landwerlin
56840e4c89 anv: rework Wa_14017076903 to only apply with occlusion queries
Fixes KHR-GL46.transform_feedback.* tests with zink+anv on DG2

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c34916f841 ("anv: implement occlusion query related Wa_14017076903")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22586>
2023-04-21 12:48:52 +00:00
Samuel Pitoiset
8f23a5dd96 radv/ci: remove one expected test failure on PITCAIRN
After a bunch of runs, this one seems to always pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22623>
2023-04-21 13:03:40 +02:00
Patrick Lerda
e45fa939b0 r600/sfn: fix memory leak related to sh_info->arrays
For instance, with "piglit/bin/shader_runner tests/spec/glsl-1.10/execution/glsl-vs-arrays-2.shader_test -auto -fbo":
Direct leak of 12 byte(s) in 1 object(s) allocated from:
    #0 0x7f33c3f3d097 in operator new[](unsigned long) (/usr/lib64/libasan.so.6+0xb3097)
    #1 0x7f33b9af1e5b in r600::ValueFactory::get_shader_info(r600_shader*) ../src/gallium/drivers/r600/sfn/sfn_valuefactory.cpp:1056
    #2 0x7f33b9a96860 in r600::Shader::get_shader_info(r600_shader*) ../src/gallium/drivers/r600/sfn/sfn_shader.cpp:1445
    #3 0x7f33b99ddd07 in r600_shader_from_nir ../src/gallium/drivers/r600/sfn/sfn_nir.cpp:1032
    #4 0x7f33b9c3e701 in r600_pipe_shader_create ../src/gallium/drivers/r600/r600_shader.c:231

Fixes: 79ca456b48 ("r600/sfn: rewrite NIR backend")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22262>
2023-04-21 10:40:46 +00:00
Martin Roukala (né Peres)
bfabd2dec7 zink/ci: document that some tests no longer fail
This is likely to have been fixed by 6a39d35df0 ("aco: fix nir_f2u64
translation") (thanks @DadSchoorse!).

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22596>
2023-04-21 09:45:18 +00:00
Martin Roukala (né Peres)
7af6616030 radv/ci: only reboot on hangs for vkcts-navi10-valve
vkcts-navi10-valve has the nasty habit on hanging the GPU, so we
introduced an auto-retry... but for every radv job. Let's stop doing
that, and instead limit the auto-retry to vkcts-navi10-valve only.

Additionally, let's increase the number of attempts to 3 (2 retries),
as sometimes, it may still fail and we don't want to flag it as a
fail in nightly runs.

Let's hope we'll get to the bottom of this hang sooner rather than
later, so that we can remove this hack!

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22596>
2023-04-21 09:45:18 +00:00
Martin Roukala (né Peres)
a65fe883f4 ci/b2c: allow not specifying a reboot condition
This will allow us to only enable this feature where we need it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22596>
2023-04-21 09:45:18 +00:00
Martin Roukala (né Peres)
64822bc35f radv/ci: document all the flakes we hit while I was away
Closes: 8817
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22596>
2023-04-21 09:45:18 +00:00
Martin Roukala (né Peres)
ad508e50bf radv/ci: disable the vkcts-navi21-llvm-valve job
It is badly-broken and until someone actually fixes it, it provides
no additional value to other developers.

We'll keep the job around, as a courtesy to the developer that will
be trying to fix it.

Closes: #8799
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22596>
2023-04-21 09:45:18 +00:00
Juan A. Suarez Romero
a4d99aee91 v3d/ci: annotate failure
The test requires a fix already submitted to piglit.

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22607>
2023-04-21 08:38:22 +00:00
Juan A. Suarez Romero
a86d18a8c4 v3d: use primitive type to get stream output offset
So far we were only considering the number of vertices to draw to
compute the offset in a stream output buffer.

But this is not correct, as it depends on the primitive type too. For
instance, with 4 vertices, if we use a triangle strip primitive, then 2
triangles are generated from those 4 vertices, so 6 vertices will be
captured.

This fixes spec@!opengl es
3.0@gles-3.0-transform-feedback-uniform-buffer-object.

CC: 23.1
Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22607>
2023-04-21 08:38:22 +00:00
Sergi Blanch Torne
0e88c04ed0 ci: Move Vulkan CTS patches to their own directory
VulkanCTS can receive patches from a reference to an upstream commit or by a
file stored in Mesa. Those locally stored patches for VulkanCTS should be
stored in the specific directory for patches with a prefix like skqp does.

The schema of how both sources apply patches has received a slight
modification to resemble each other.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22463>
2023-04-21 08:41:25 +02:00
xurui
9a6b70da0b zink: Add some printfs when initialization fails
Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22592>
2023-04-21 01:45:11 +00:00
Michel Zou
a1098a1e45 mesa/draw: fix -Wformat warning
fixes: 5791826b
cc @pepp @mareko

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22605>
2023-04-20 22:55:38 +00:00
Rob Clark
b83af7e5b8 freedreno/a6xx: Fix valid_format_cast logic for newer a6xx
Fixes a pile of
dEQP-GLES31.functional.copy_image.non_compressed.viewclass_32_bits.*
on a6xx gen2 and later.

Fixes: 87978c3933 ("freedreno/a6xx: Allow z24s8 format casts")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22610>
2023-04-20 21:55:17 +00:00
Jesse Natalie
31ced4c5ad dzn: Support aniso-with-point-mip samplers
Also rework the sampler translation logic to take advantage of the
fact that the D3D12 filter types are bitfields. No need to loop over
a sparse enum space like we were doing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
2023-04-20 21:02:15 +00:00
Jesse Natalie
4e2c5ba100 dzn: Use narrow quadrilateral lines when supported
This lets us follow the Vulkan spec requirements for MSAA line
rasterization, using a width of 1.0 instead of D3D's proscribed
width of 1.4. There's no reason to predicate this on MSAA being
enabled, since quadrilateral lines with a width of 1.0 are actually
the most desired type of line rasterization for Vulkan.

Follow-ups:
- We can probably turn on 'strict lines' when this is supported.
- We should enable the line rasterization mode extension.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
2023-04-20 21:02:15 +00:00
Jesse Natalie
0b3f2a3c7d dzn: Support dynamic depth bias via command list instead of PSO
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
2023-04-20 21:02:15 +00:00
Jesse Natalie
c6bc4459e5 dzn: Add physical device arg to format lookup
A followup change will switch format mappings based on this

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
2023-04-20 21:02:15 +00:00
Jesse Natalie
1e11645a30 dzn: Remove driconf for quad ops in vertex stages
These actually work now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
2023-04-20 21:02:15 +00:00
Jesse Natalie
fe128dca28 spirv2dxil: Lower quad ops in non-fragment/compute stages
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
2023-04-20 21:02:15 +00:00
Eric Engestrom
3c64f3dcbc ci: rework vulkan validation layer build script
Initially this was just adding a missing popd, but actually there's no
reason to pushd into the build dir, so let's just pass the build dir as
arguments to cmake & ninja instead.

`--arch x64` was also dropped as it only applies to Windows builds,
which this script doesn't support anyway.

Fixes: 512f1c160a ("ci/zink: Add coverage using the vulkan validation layer on lvp.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22488>
2023-04-20 20:22:14 +00:00
Jordan Justen
fcb72ffd0c intel/compiler/gfx12.5+: Lower 64-bit cluster_broadcast with 32-bit ops
For MTL (verx10 == 125), float64 is supported, but int64 is not.
Therefore we need to lower cluster broadcast using 32-bit int ops.

For gfx12.5+ platforms that support int64, the register regions
used by cluster broadcast aren't supported by the 64-bit pipeline.

On MTL, dEQP-VK.subgroups.clustered.*_double* and
dEQP-VK.subgroups.clustered.*_dvec* were failing to validate the
compiled shader in debug mode, and reportedly gpu-hanging in release
mode.

With this change dEQP-VK.subgroups.clustered.*_double* passed all 48
tests and dEQP-VK.subgroups.clustered.*_dvec* passed all 140 tests on
MTL.

Rework:
 * Move from generator to brw_fs_lower_regioning.cpp. (Suggested by
   Francisco)
 * Apply to verx10 >= 125.. (Suggested by Francisco)

Cc: 23.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com> (v1)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22569>
2023-04-20 11:41:10 -07:00
Samuel Pitoiset
74ab940156 radv: update binning settings to work around GPU hangs
Ported from RadeonSI, but it seems PAL always use 1 for both
parameters as well.

This should fix random GPU hangs with small chips (eg. NAVI24, GFX1103),
though all chips might have been affected.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8046
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8597
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8683
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22528>
2023-04-20 18:12:52 +00:00
André Almeida
d99211b22c radv: debug: Update decode ring umr command
The old ring decoder command is deprecated since umr release 1.0.4 and
was effectively removed at 1.0.7. Update the command to use the new
decode flag.

Signed-off-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22576>
2023-04-20 17:26:43 +00:00
Michel Zou
cb282b6a81 vk/entry_points:: fix mingw build
MinGW does not play well either with weak symbols and crashes at runtime without a trace
fixes: 7e833713d8

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22474>
2023-04-20 16:51:58 +00:00
Samuel Pitoiset
6bc2dce228 radv: use gfx_level in radv_flush_occlusion_query_state()
Cleanup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
fbab8df43f radv: emit PIXEL_PIPE_STAT_CONTROL in the gfx preamble for GFX11
This is more optimal than emitting for every BeginOcclusionQuery().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
c1d32880f7 radv: track DB_COUNT_CONTROL changes to avoid context rolls
This can be really noticeable for the BeginQuery/Draw/EndQuery pattern.
It seems to improve a depth-only pass by +35% in one upcoming game
because this removes a bunch of context rolls.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
02443d752e radv: delay enabling/disabling occlusion queries at draw time
Most applications have a sequence like BeginQuery/Draw/EndQuery which
can be optimized by delaying DB_COUNT_CONTROL at draw time instead of
enabling/disabling for every draw.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Mike Blumenkrantz
3017d01c9d zink: check for extendedDynamicState3DepthClipNegativeOneToOne for ds3 support
somehow this was forgotten

Fixes: c7f46d2ad6 ("zink: use dynamic state3 rasterization states when available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22603>
2023-04-20 15:19:04 +00:00
Leo Liu
e6701f7231 radeonsi/vcn: AV1 skip the redundant bs resize
For AV1, the begin bitstream buffer have included all the tile data,
and extra bitstream buffer is useless and causing the bad performance
by bs buffer resize/map/copy.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22557>
2023-04-20 14:43:55 +00:00
Samuel Pitoiset
d44651bfc3 radv: wait for occlusion queries in the resolve query shader
This is really noticeable for games that resolve a bunch of occlusion
queries (in this case 4096) because it seems that emitting 4096
WAIT_REG_MEM packets can stall more than expected. Fixes this by
waiting for queries in the resolve query shader.

This improves performance of an unreleased game by +~10% (71->78 FPS).
RADV should now be really close to Windows performance for that title.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22579>
2023-04-20 14:11:26 +00:00
Mike Blumenkrantz
1e6e3427f0 drisw: don't leak the winsys
if a winsys is allocated by the frontend, it should be freed by the frontend
rather than the driver to ensure it doesn't leak if it doesn't reach
the driver

cc: mesa-stable

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22396>
2023-04-20 13:34:15 +00:00
Frank Binns
2d6527c9f1 pvr: fix typo in pvr_rt_get_region_headers_stride_size()
This function was returning the size of a single region header as the stride
when it was supposed to be returning the total size of the region headers for a
single render target. This went unnoticed due to the fact this function had two
variables with basically identical names. To avoid any future confusion, rename
rgn_header_size to single_rgn_header_size throughout the code.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22574>
2023-04-20 13:17:01 +00:00
Mike Blumenkrantz
83a1b74240 zink: don't create separate shader dsls if there are no bindings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
329473c242 zink: add a util function for printing shaders
now that these are serialized, nir_print_shader is slightly less convenient

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
f2f6012f4a zink: call zink_shader_free for compute shaders
ensure everything is deallocated consistently

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
ee8c1a44c1 zink: always wait on precompile fence at start of zink_gfx_shader_free()
this shouldn't affect anything at present, but that will change in the future

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
b2ecafd1ac zink: split out generic shader destruction for reuse
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
9f6eec03e0 zink: zink_shader_free -> zink_gfx_shader_free
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
9bf4db8ebb zink: don't bitcast bool deref loads/stores
a bool can only be a bool, and OpBitCast requires the src type to be
different than the dst type, so this is illegal

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
82add9f2e9 zink: avoid recursion during msrtss blits from flushing clears
if an attachment other than the msrtss blit attachment has clears pending,
unbinding the other attachment will trigger a clear flush, which will then
recurse into the msrtss blit that's being triggered

instead, save/restore these clears around the msrtss blit since they
can be executed during the normal renderpass

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
8ea506e94b zink: skip msrtss replicate if the attachment will be full-cleared
this should be unnecessary and avoids a perf hit

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
1e7cb4642e zink: handle 'blitting' flag better in msrtss replication
barriers are illegal while 'blitting' is set, so unset it temporarily
for the replication barriers and then also re-set the layouts after

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Mike Blumenkrantz
ec0860b401 zink: manually re-set framebuffer after msrtss replicate blit
with the new zsbuf elimination handling, the fb state calculated in
u_blitter's fb restore may be incorrect if the zsbuf has indeed been
eliminated, so ensure the right fb is stored to be reapplied so that
misrenders will be avoided

fixes some crashes/misrenders in webgl

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22577>
2023-04-20 12:58:12 +00:00
Samuel Pitoiset
72a522fb36 radv: fix usage flag for 3D compressed 128 bpp images on GFX9
VK_FORMAT_FEATURE_2_COLOR_ATTACHMENT_BIT is equal to
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT but we want COLOR_ATTACHMENT_BIT.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22540>
2023-04-20 08:20:50 +00:00
Samuel Pitoiset
8a2fab66de radv: do not allow 1D block-compressed images with (extended) storage on GFX6
For some reasons this seems broken only on GFX6. Note that PAL doesn't
allowed block-compressed with 1D on all GPUs.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22540>
2023-04-20 08:20:50 +00:00
Caio Oliveira
aeec9071b5 spirv: Rework structured control flow handling
The new code splits the work into a few passes instead of trying to do
everything with a single pass.  This helps to apply the new clarified
rules for structured control flow in the SPIR-V specification, in
particular the "exit construct" rules.

First find an appropriate ordering for the blocks, based on the
approach taken by Tint (WebGPU compiler).  Then, with those blocks
in order, identify the SPIR-V constructs start and end positions.

Finally, walk the blocks again to emit NIR for each of them, "opening"
and "closing" the necessary NIR constructs as we reach the start and
end positions of the SPIR-V constructs.

There are a couple of interesting choices when mapping the constructs
to NIR:

- NIR doesn't have something like a switch, so like the previous code,
  we lower the switch construct to a series of conditionals for each
  case.

- And, unlike the previous code, when there's a need to perform a
  break from a construct that NIR doesn't directly support (e.g. inside
  a case construct, conditionally breaking early from the switch), we
  now use a combination of a NIR loop and an NIR if.  Extra code is
  added to ensure that loop_break and loop_continues are propagated
  to the right loop.

This should fix various issues with valid SPIR-V that previously
resulted in "Invalid back or cross-edge in the CFG" errors.

Thanks to Alan Baker and David Neto for their explanations of
ordering the blocks, in the Tint code and in presentations to
the SPIR-V WG.

Thanks to Jack Clark for providing a lot of valuable tests used to
validate this MR.

Closes: #5973, #6369
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17922>
2023-04-20 07:02:42 +00:00
Qiang Yu
6a39d35df0 aco: fix nir_f2u64 translation
mantissa needs to be at the lower part for shift left.
This fixes large integer value conversion.

Cc: mesa-stable
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22570>
2023-04-20 06:32:15 +00:00
Dmitry Baryshkov
22b07b10c4 freedreno/registers: updte HDMI registers to include CEC details
Based on patchset by Arnaud Vrac update the hdmi.xml register
decscription.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22588>
2023-04-20 06:03:53 +00:00
Michel Zou
d5871d21a5 vulkan/wsi: fix -Wnarrowing warning
else I get this output:

[11/600] Compiling C++ object src/vulkan/wsi/libvulkan_wsi.a.p/wsi_common_win32.cpp.obj
../src/vulkan/wsi/wsi_common_win32.cpp: In function 'VkResult wsi_win32_surface_create_swapchain_dxgi(wsi_win32_surface*, VkDevice, wsi_win32*, const VkSwapchainCreateInfoKHR*, wsi_win32_swapchain*)':
../src/vulkan/wsi/wsi_common_win32.cpp:757:65: warning: narrowing conversion of '((((int)chain->wsi_win32_swapchain::base.wsi_swapchain::present_mode) == ((int)VK_PRESENT_MODE_IMMEDIATE_KHR)) ? ((int)DXGI_SWAP_CHAIN_FLAG_ALLOW_TEARING) : 0)' from 'int' to 'UINT' {aka 'unsigned int'} [-Wnarrowing]
  757 |       chain->base.present_mode == VK_PRESENT_MODE_IMMEDIATE_KHR ?
      |       ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^
  758 |          DXGI_SWAP_CHAIN_FLAG_ALLOW_TEARING : 0
      |          ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

fixes: d7730fcf22

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22475>
2023-04-20 03:33:51 +00:00
Mike Blumenkrantz
a6c8d74cd7 util/debug: move null checks out of debug message macro
this otherwise causes tons of compiler warnings

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22196>
2023-04-20 02:52:16 +00:00
Mike Blumenkrantz
3909471288 zink: use a perf_debug() macro for debug message logging of copy box warning
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22196>
2023-04-20 02:52:16 +00:00
Mike Blumenkrantz
3d467c466a zink: hook up debug callback
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22196>
2023-04-20 02:52:16 +00:00
Mike Blumenkrantz
366b79fa10 zink: only print copy box warning once per resource
this otherwise gets spammy

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22196>
2023-04-20 02:52:16 +00:00
Emma Anholt
f7758bd379 ci/freedreno: Demote a530 to manual again.
6 job-level flakes detected yesterday across a530_gl {2,3,5}/6.  It's
still not ready to gate MRs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:41 +00:00
Emma Anholt
7d17713723 ci: Crank up the yamllint line length limit.
I hated that CI errors out because I pasted useful information in the
yaml.  You shouldn't have to manually line-wrap pastes from dmesg.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:41 +00:00
Emma Anholt
392266ad6a ci/radv: Add known flakes for #8817
Should greatly increase Marge reliability.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:41 +00:00
Emma Anholt
bcf38ff950 ci/freedreno: Drop portal-2-v2 trace.
It's intermittently segfaulting.  CI daily says 4 flakes this month.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:41 +00:00
Emma Anholt
a75371b68a ci/zink+tu: Drop some intermittently failing a630 traces.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:40 +00:00
Emma Anholt
2a9b990fa3 ci/radv: Demote navi21 to manual until recent flakiness resolves.
22 detected job flakes yesterday.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:40 +00:00
Emma Anholt
53cbe352ad ci/lvp: Update sanctuary trace hash.
Changed a few days ago, still looks good.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22562>
2023-04-20 02:22:40 +00:00
Timur Kristóf
b32556b058 radv: Fix dword alignment in SDMA buffer copy.
Also add a comment that explains the dword aligned mode.

Note that the SDMA shader uploads are always dword aligned
so this commit doesn't fix any issues but just prepares this
function for more general use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22551>
2023-04-20 00:46:01 +00:00
Caio Oliveira
cf181fef68 spirv: Add --optimize flag to spirv2nir tool
Apply some basic NIR optimizations to clean up the result.  Useful in some
situations when comparing the parsing code from different mesa branches.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22180>
2023-04-20 00:15:23 +00:00
Caio Oliveira
6e3207a191 spirv: Output spirv2nir tool result to stdout
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22180>
2023-04-20 00:15:23 +00:00
Sil Vilerino
a71f79fb45 d3d12: Clean unused code for parsing slices
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22541>
2023-04-19 23:38:18 +00:00
Sil Vilerino
244af0523c d3d12: Use frontend H264 decode slice offsets and sizes instead of parsing buffer
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22541>
2023-04-19 23:38:18 +00:00
Sil Vilerino
114c35cb0c frontend/va: Add H264 decode slice data
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22541>
2023-04-19 23:38:18 +00:00
Mike Blumenkrantz
6ddfc5087c zink: emit demote cap when using demote
VUID-VkShaderModuleCreateInfo-pCode-01377(ERROR / SPEC): msgNum: 1478567243 - Validation Error: [ VUID-VkShaderModuleCreateInfo-pCode-01377 ] Object 0: handle = 0x55f304e851c0, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x5821254b | SPIR-V module not valid: Opcode DemoteToHelperInvocation requires one of these capabilities: DemoteToHelperInvocation

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22582>
2023-04-19 23:08:56 +00:00
Filip Gawin
421d3e3c8e nine: add fallback for D3DFMT_D16 in d3d9_to_pipe_format_checked
Helps with avoing crash in winetests on crocus.

Cc: mesa-stable

Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20121>
2023-04-19 22:54:26 +00:00
Mike Blumenkrantz
8f3c3d2fc0 glthread: add newline to env override
Fixes: 8c42c353b6 ("driconf: rework glthread enablement")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22581>
2023-04-19 22:21:46 +00:00
Mike Blumenkrantz
972082d051 util/blitter: fix line wrapping on error to avoid giving wrong line number
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22581>
2023-04-19 22:21:46 +00:00
Marek Olšák
4681fd3882 nir: set uses_wide_subgroup_intrinsics for all shader stages
nir_opt_varyings will use it in VS, TES, GS.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
e6e406b483 nir: add next_stage parameter to nir_remove_varying
so that e.g. the POS output is removed if the next stage is not FS.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
42822413cf nir: add next_stage parameter to nir_slot_is_sysval_output to return better info
If we know the next stage, we can tell whether an output is a sysval,
such as POS.

For example, POS is not a sysval output if the next stage is not FS.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
c60002ea27 nir: remove an obsolete comment from nir_gather_xfb_info_from_intrinsics
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
ea9156edc3 nir: return a status from nir_remove_varying whether it removed the instruction
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
9d78fec684 nir: rework nir_lower_color_inputs to work with lowered IO intrinsics
also only call it from radeonsi and remove the option

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
28374b466c nir: don't remove dead IO variables in nir_lower_io_passes for st_link_nir
We need to keep variables in the IR because a few places use them,
like nir_build_program_resource_list. This will allow us to lower IO
in the linker.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
f11118a36b nir: handle all varying slots in gl_varying_slot_name_for_stage
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
988545002e nir: handle more opcodes in nir_lower_io_to_scalar
It just works.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
10a362f582 nir: extend nir_opt_fragdepth to handle lowered IO
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Mihai Preda
2a9ef6b1f8 nir: update nir->num_inputs, num_outputs in nir_recompute_io_bases()
Since nir_recompute_io_bases is going to be used instead of
nir_assign_io_var_locations, we need to update num_inputs, num_outputs.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
45d41bd043 nir: skip nir_lower_io_passes for compute shaders
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
d29dd3333b nir: assign IO bases in nir_lower_io_passes
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
bd9ea4b5bc nir: lower load_barycentric_at_offset in lower_wpos_ytransform
so that we can run this pass on lowered IO.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Marek Olšák
ace8a7068e nir: fix 2 bugs in nir_create_passthrough_tcs
- VAR31 was ignored.
- Only a half of the 16-bit slot was passed through, though I'm not sure
  if nir_lower_io handles vec8. The slots are only for GLES and I don't
  think a passthrough TCS is possible with GLES.

Fixes: a8e84f50bc - nir: Add helper to create passthrough TCS shader

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21861>
2023-04-19 21:42:11 +00:00
Charmaine Lee
13e885842a translate: do not clamp element index in generic_run
The buffer max_index value in translate_generic struct is relevant for
indexed draw only. So do not clamp the element index in generic_run() as it
is called for non-indexed draw only.
This patch passes index_size to the common generic_run_one function
so index clamping is only performed when a non-zero index_size is specified.

This fixes a text selection bug with kitty terminal emulator running on ARM
when it falls back to the generic translate path for unsigned byte vertex
array.

cc: mesa-stable

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22568>
2023-04-19 20:53:27 +00:00
Guilherme Gallo
5075e9f7c7 ci/freedreno: Fix a618-traces-performance rules
Change the order of job `extends`, as .freedreno-rules-performance has
all the necessary rules for this performance job.

Closes: #8866

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22565>
2023-04-19 20:18:10 +00:00
Rhys Perry
5db64fcc8c aco: use apply_nuw_to_ssa() with load_smem_amd
fossil-db (navi21):
Totals from 107 (0.08% of 135636) affected shaders:
Instrs: 389667 -> 389425 (-0.06%); split: -0.06%, +0.00%
CodeSize: 2050380 -> 2049440 (-0.05%); split: -0.05%, +0.00%
Latency: 3738053 -> 3737313 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 599889 -> 599790 (-0.02%); split: -0.02%, +0.00%
SClause: 16120 -> 15920 (-1.24%)
Copies: 29823 -> 29809 (-0.05%); split: -0.07%, +0.02%
PreSGPRs: 6856 -> 6849 (-0.10%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22553>
2023-04-19 19:29:48 +00:00
Rhys Perry
1a6095b36e aco: remove SMEM_instruction::prevent_overflow
This doesn't seem useful anymore, and it seems we forgot to set it in a
few places.

This commit changes the behaviour of the optimizer so that
prevent_overflow is always true.

fossil-db (navi21):
Totals from 7421 (5.47% of 135636) affected shaders:
Instrs: 5402823 -> 5440126 (+0.69%); split: -0.00%, +0.69%
CodeSize: 28731300 -> 28974152 (+0.85%); split: -0.00%, +0.85%
VGPRs: 317528 -> 317552 (+0.01%)
SpillSGPRs: 419 -> 415 (-0.95%)
Latency: 40712478 -> 40783115 (+0.17%); split: -0.01%, +0.19%
InvThroughput: 7612708 -> 7616751 (+0.05%); split: -0.00%, +0.06%
VClause: 123824 -> 123848 (+0.02%); split: -0.09%, +0.11%
SClause: 161915 -> 172741 (+6.69%); split: -0.03%, +6.71%
Copies: 393015 -> 394429 (+0.36%); split: -0.20%, +0.56%
PreSGPRs: 288658 -> 289603 (+0.33%); split: -0.04%, +0.36%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8864
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22553>
2023-04-19 19:29:48 +00:00
Karmjit Mahil
957009978e pvr: Handle special built-in variable loading in vertex shader
For now always allocate space for the special built-in variables
that need filling in for the vertex shader. Ideally we should get
the compiler to analyze the shader and tell the driver if they are
used so that we don't reserve and fill them needlessly.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21590>
2023-04-19 17:26:22 +00:00
Guilherme Gallo
d6b30d42b0 ci/lava: Skip regression test if LAVA log file is not present
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
a893b06691 ci/lava: Use f-strings in job definition
f-strings are little more concise than str.format() approach.
It makes the code a little more readable as well.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
11a97b644c ci/lava: Refactor LAVAJobSubmitter and add tests
Some refactoring was needed to make LAVAJobSubmitter class testable via
pytest.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
710b568dcd ci/lava: Force use of UTC timezones
LAVA farm is giving datetime in UTC timezone, let's standardize it
locally for the script run, so datetimes coming from LAVA proxy calls
will be at the same timezone as the ones we use in structural logging
and traces.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
5c5aec15b1 ci/lava: Integrate StructuralLogger with AutoSaveDict
Let's use the AutoSaveDict as structural logger abstraction to enable
real-time monitoring of LAVA jobs. Mainly used for local runs and
debugging of Mesa CI LAVA jobs.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
eb1945c3d9 bin/ci: Add StructuredLogger to improve log handling
This commit introduces the StructuredLogger module, which provides a
robust and flexible logging utility supporting multiple data formats
(CSV, JSON, and YAML). By incorporating this module into our CI system,
we enhance our log management capabilities, making it easier to:

1. Monitor and analyze logs: The StructuredLogger is a dict-like data
   abstraction which autosaves into a structured data file, whenever it
   is updated. With this file, one can easily know specifics of the job
   execution without having to grep it in the traces logs or exploring
   the job artifacts. The autosave feature makes it useful even when the
   CI job fails unexpectedly, since the partial dict is always written
   back to the disk.
2. Maintain data integrity: The module includes context managers for
   file locking and editing log data, ensuring data integrity and
   preventing race conditions.
3. Support multiple formats: With built-in support for CSV, JSON, and
   YAML formats, this module caters to a wide range of use cases and
   user preferences.
4. Increase maintainability: The modular design of the StructuredLogger
   and its corresponding strategies simplifies maintenance and allows
   for seamless integration of additional formats in the future.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
0ac3824922 ci/lava: Add a simple Structural Logger into submitter
Refactor some pieces of the submitter to improve the clarity of the
functions and create a simple dictionary with aggregated data from the
submitter execution which will be dumped to a file when the script
exits.

Add support for the AutoSaveDict based structured logger as well, which
will come in a follow-up commit.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
41f29c5333 ci/lava: Update LogFollower for better section handling and history
Update the LogFollower class to improve section handling and provide a
history of sections encountered during log processing:

1. Add section_history attribute to store the history of encountered
   GitlabSections.
2. Make LAVA job submitter use the section history feature to improve
   structural logging.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
cfe644a9e5 ci/lava: Use python-fire in job submitter
Cleanup argparse to use dataclasses+python-fire to give easier
maintenance to job submitter.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
c03f7233ca ci/lava: Extract LAVA proxy and LAVAJob abstractions
Let's make lava_job_submitter.py cleaner with only parsing and retry
mechanism capabilities.

Moved out from the submitter script:

1. proxy functions
  - moved to lava.utils.lava_proxy.py
2. LAVAJob class definition
  - moved to lava.utils.lava_job.py
  - added structural logging capabilities into LAVAJob
  - Implemented properties for job_id, is_finished, and status, with
    corresponding setter methods that update the log dictionary.
  - Added new methods show, get_lava_time, and refresh_log for improved
    log handling and data retrieval.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Guilherme Gallo
6f6b892dca ci/lava: Move job definition stuff to another file
The LAVA job submitter is too big, let's reorganize it a little.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22500>
2023-04-19 14:36:37 +00:00
Eric Engestrom
3fbe699a43 egl: inline driver.GetProcAddress() as it's always _glapi_get_proc_address()
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21399>
2023-04-19 13:57:59 +00:00
xurui
8b366b6bc0 zink: Use malloc to allocate libs
ralloc is less performant most of the time when the object doesn't have sets/hashtables attached
Use malloc instead of ralloc in zink_program.c

Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22326>
2023-04-19 13:35:12 +00:00
xurui
f89c85e5d0 zink: Use malloc instead of ralloc
ralloc is less performant most of the time when the object doesn't have sets/hashtables attached
Use malloc instead of ralloc in zink_descriptors.c

Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22326>
2023-04-19 13:35:12 +00:00
Karmjit Mahil
c91fa697e9 pvr: Add handling for missing entries in pvr_setup_vertex_buffers()
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21589>
2023-04-19 13:22:20 +00:00
Karmjit Mahil
f0659728e4 pvr: Fix typo in PDS function name
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21589>
2023-04-19 13:22:20 +00:00
Daniel Schürmann
b288ec803c radv/rt: fix total stack size computation
Fixes: 2649a1f272 ('radv/rt: introduce and set rt_pipeline->stack_size ')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22526>
2023-04-19 12:26:53 +00:00
Simon Perretta
efc629389a pvr: Use driver vertex input data in the compiler
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21588>
2023-04-19 12:08:31 +00:00
Karmjit Mahil
361f58f0ee pvr: Fix a comment in the PDS code
The comment was incorrectly showing which DDMAD param corresponed
to which DDMAD field.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21588>
2023-04-19 12:08:31 +00:00
Karmjit Mahil
ddda8b88c6 pvr: Collect vertex input data and fill info struct.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21588>
2023-04-19 12:08:31 +00:00
Karmjit Mahil
da0739b4e4 pvr: Finish pvr_perform_start_of_render_attachment_clear().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:07 +00:00
Karmjit Mahil
95820584d0 pvr: Add deferred RTA clears for cores without gs_rta_support.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:07 +00:00
Sarah Walker
060c3db4ef pvr: Complete pvr_generate_custom_mapping()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:07 +00:00
Sarah Walker
9930cafbf2 pvr: Support multiple sources per pass in TQ job submission
This is required to implement a number of workarounds.

Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:07 +00:00
Sarah Walker
f7ff71aec9 pvr: Complete pvr_3d_validate_addr()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
71fe789d35 pvr: Support ipf_creq_pf in pvr_isp_ctrl_stream()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
86ad868142 pvr: Implement pvr_reroute_to_clip()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
35d2b51c11 pvr: Implement pvr_isp_scan_direction()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
8bcc40ed22 pvr: Complete pvr_double_stride()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
9cfe3b5283 pvr: Complete pvr_unwind_rects()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
8a0a357b65 pvr: Complete pvr_modify_command()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
240bac1e85 pvr: Implement pvr_pbe_setup_modify_defaults()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Matt Coster
0a8334e054 pvr: Complete pvr_isp_ctrl_stream()
This also adds pvr_pbe_src_format_ds(), the equivalent to
pvr_pbe_src_format_normal() for depth/stencil formats.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
5ac3c8d0df pvr: Support single core transfer queue commands on multicore GPUs
Co-authored-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Karmjit Mahil
c3e7060ba1 pvr: Implement simple internal format v2 transfer paths.
This commit fixes the triangle demo on the AM62 by implementing
the paths that were left unimplemented due to the Chromebook not
having the simple internal format v2 feature.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
838132c0a9 pvr: Implement vkCmdClearDepthStencilImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
c468cf29a8 pvr: Implement vkCmdResolveImage2KHR API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
de9c53e3bb pvr: Implement vkCmdFillBuffer API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
ed243eca90 pvr: Implement vkCmdCopyImageToBuffer2 API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
29e120c092 pvr: Implement vkCmdClearColorImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
5827f0098c pvr: Implement vkCmdBlitImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
4c31121329 pvr: Implement vkCmdCopyImage2KHR API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
dc260f6fc3 pvr: Implement vkCmdCopyBufferToImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Karmjit Mahil
96b6b69d8a pvr: Implement vkCmdUpdateBuffer().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Rajnesh Kanwal
480bdff4b5 pvr: Add support to process transfer and blit cmds
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-authored-by: Matt Coster <matt.coster@imgtec.com>
Co-authored-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Frank Binns
1cdd0ccb37 pvr: replace transfer EOT binary shaders with run-time compiled shaders
Take the opportunity to tweak the naming of pvr_transfer_ctx_setup_shaders and
pvr_transfer_ctx_fini_shaders to make them fit in with the rest of the naming in
the driver.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
11dea16dee pvr: Add support for generating transfer EOT programs
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
f0b47cfd65 pvr: Add support for generating transfer fragment programs
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-authored-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
eeac8336ef pvr: Use movc for reading special registers
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
e8cd78b319 pvr: Amend validation when checking multiple supported types
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Karmjit Mahil
4dc86e1148 pvr: Add missing includes in pvr_common.h
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Frank Binns
6b27b76432 pvr: use util_dynarray_begin() in more places
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Frank Binns
16a1752d34 pvr: add missing explicit check against VK_SUCCESS
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Viktoriia Palianytsia
c4e8b1cddb iris,crocus: Add proper way of assigning num_levels value
Changes miptree_level_range_length function
to use correct macro and
num_levels value assignment.

Closes: mesa/mesa#8256

Signed-off-by: Viktoriia Palianytsia <v.palianytsia@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22067>
2023-04-19 10:25:55 +00:00
Timur Kristóf
acce5c3fe1 radv: Enable IB2 workaround on all indirect draws.
IB2 packets hang GFX6 when they contain any indirect draws,
not just the MULTI versions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Timur Kristóf
46a14390d8 radv: Remove IB2 workaround from mesh shader draws.
The GPUs which need the workaround do not support mesh shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Timur Kristóf
d16d9ef345 radv: Simplify IB2 workaround.
Move compute IB2 check to the winsys, because IB2 only works on
GFX queues and not any other queue types.

Then, simplify the workaround condition in the cmd buffer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Qiang Yu
fbe7aec446 aco: skip scratch buffer init when its arg is not used
radeonsi does not pass scratch buffer address by arg,
but dynamical relocation symbol when upload. Just skip
this part to enable radeonsi use aco, but it will fail
when spill.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
9cd3aa173a aco: implement nir_bindless_image_atomic_inc/dec_wrap
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
b54f07870e nir: add missing image atomic_inc/dec_wrap intrinsic
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
31bfad83ec aco: support 32bit address in nir_load_smem_amd
radeonsi uses 32bit address.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
3ff9153a3b ac,radv: move ps arg compation to common place
To be shared with radeonsi when aco is used.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Ryan Neph
48062f91c7 virgl: add debug flag to force synchronous GL shader compilation
This does two things:
1. Flush the command buffer and associate a fence with each
   glLinkProgram().
2. Force the application calling glLinkProgram() to wait on the
   associated fence, matching the semantics of native drivers.

This important for some workloads and some environments. For example, on
ChromeOS devices supporting VM-based android (ARCVM), an app's HWUI thread
may be configured to use skiagl, while the app may create its own GLES
context for custom rendering. Virgl+virtio_gpu supports a single fencing
timeline, so all guest GL/GLES contexts are serialized by submission
order to the guest kernel.

If the app's submits multiple heavy shaders for compliation+linking
(glCompileShader + glLinkProgram()), these are batched into a single
virtgpu execbuffer (with one fence). Then rendering performed by the
HWUI thread is blocked until the unrelated heavy host-side work is
finished. To the user, the app appears completely frozen until finished.

With this change, the app is throttled in its calls to glLinkProgram(),
and the HWUI work can fill in the gaps between each while hitting most
display update deadlines. To the user, the UI may render at reduced
framerate, but remains mostly responsive to interaction.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22341>
2023-04-19 06:35:35 +00:00
Lionel Landwerlin
2e2491b76c anv: enable shaderStorageImageReadWithoutFormat on Gfx12.5+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22552>
2023-04-19 06:04:52 +00:00
Tatsuyuki Ishi
3678c28d3d util: Call mesa_bytes_to_hex directly instead of disk_cache_format_hex_id.
The formatting is nothing specific about the disk cache.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
2023-04-19 04:19:51 +00:00
Tatsuyuki Ishi
681d8cd9ea util: Add dedicated hex conversion functions and use it.
This deduplicate two identical bytes_to_hex implementation into one.

The intention is to ease the introduction of a new hash algorithm, which
will also have its formatting helper (to ensure seamless transition from
sha1).

Note that the new functions always take the size of the binary buffer,
unlike the old disk_cache_format_hex_id which took `binary * 2` which was
inconsistent (binary size is `binary` and string size is `binary * 2 + 1`).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
2023-04-19 04:19:50 +00:00
Mike Blumenkrantz
96a0b1e988 zink: fix non-db bindless texture buffers
the db members are only populated in db mode

fixes Dawn of War 3 crash on launch

Fixes: 99ba529fee ("zink: implement descriptor buffer handling of bindless texture")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22566>
2023-04-19 03:25:36 +00:00
Qiang Yu
feeae0f18f ac/llvm,radeonsi: lower nir_load_point_coord_maybe_flipped in nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Qiang Yu
f7f0d31fcc nir,ac/llvm,radeonsi: replace nir_load_smem_buffer_amd with nir_load_ubo
They use same instruction. Just because when the time
nir_load_smem_buffer_amd was introduced, radeonsi didn't support
pass buffer descriptor to nir_load_ubo directly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Qiang Yu
75b75c6c0a ac/llvm,radeonsi: use texture non-uniform flag as waterfall switch
Also for calling nir_lower_non_uniform_access() when ACO.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Qiang Yu
ba5eb2f5c1 radeonsi: add si_mark_divergent_texture_non_uniform
For handle divergent index problem later for both
llvm and aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Mike Blumenkrantz
24555f5462 nir/lower_alpha_test: rzalloc state slots
this otherwise leads to uninitialized memory

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22558>
2023-04-18 22:40:16 +00:00
Ikshwaku Chauhan
12706fab60 radeonsi/gfx11: updated vertex format changes
GFX11 format table is different than GFX10

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22466>
2023-04-18 21:34:02 +00:00
Ikshwaku Chauhan
da3b8c1e6b radeonsi/gfx11: updated si_is_format_supported
GFX11 format table is different than GFX10, the change is
required to pass below deqp tests for gfx11:
dEQP-GLES3.functional.texture.specification.teximage2d_pbo*,
texsubimage2d_pbo*, teximage3d_pbo*, texsubimage3d_pbo*.

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22466>
2023-04-18 21:34:02 +00:00
Mike Blumenkrantz
543b6ca7c4 iris: use util_framebuffer_get_num_samples when setting ps dispatch samples
pipe_framebuffer_state::samples may be zero, which is why this helper exists

cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22563>
2023-04-18 21:01:23 +00:00
Mike Blumenkrantz
cbac02b7d3 zink: avoid zero-sized memcmp for descriptor layouts
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22559>
2023-04-18 19:33:05 +00:00
Aleksey Komarov
f2e7482202 pan/va: fix typo in IADD_IMM.i32 description
`IADD.f32` replaced with `IADD.i32`

Signed-off-by: Signed-off-by: Aleksey Komarov <q4arus@ya.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20467>
2023-04-18 19:44:48 +03:00
Aleksey Komarov
82ccde0957 pan/va: Fix MUX.v2i16 and MUX.v4i8 description
For MUX.v2i16 should be:
`MUX.v2i16.bit A, B, mask` calculates `(A &amp; mask) | (B &amp; ~mask)`
For MUX.v4i8 should be:
`MUX.v4i8.bit A, B, mask` calculates `(A &amp; mask) | (B &amp; ~mask)`

Signed-off-by: Signed-off-by: Aleksey Komarov <q4arus@ya.ru>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20467>
2023-04-18 19:31:57 +03:00
David Heidelberg
135039f526 ci: do not retry on forks to get the upstream kernel and rootfs
This commit introduces multiple changes:
  1. Now we check for mainline artifacts only when NOT running on
     the mainline branch
  2. if we run on the fork and get 404-like error, it doesn't retry.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22386>
2023-04-18 14:49:10 +00:00
Eric Engestrom
2dcd6bed6a util: enforce unreachable()'s argument being a literal string
This prevents the bugs fixed in the previous commits.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
2023-04-18 13:59:55 +00:00
Eric Engestrom
5863bafbdc vk/util: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
2023-04-18 13:59:55 +00:00
Eric Engestrom
2f9520a5d0 pvr: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
2023-04-18 13:59:54 +00:00
Eric Engestrom
f5ed1c79ae compiler: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
2023-04-18 13:59:54 +00:00
Eric Engestrom
0a0e485421 amd: fix buggy usage of unreachable()
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22529>
2023-04-18 13:59:54 +00:00
Rhys Perry
d291f368a0 ac/llvm: support implicit LOD for nir_texop_tg4
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
2023-04-18 10:42:07 +00:00
Rhys Perry
25b1974e1b aco: support implicit LOD for nir_texop_tg4
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
2023-04-18 10:42:07 +00:00
Rhys Perry
dbb9f3a8a9 vtn: set is_gather_implicit_lod
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
2023-04-18 10:42:07 +00:00
Rhys Perry
48158636bf nir: add is_gather_implicit_lod
Needed for SPV_AMD_texture_gather_bias_lod.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22315>
2023-04-18 10:42:07 +00:00
Michel Dänzer
73e9cf6062 anv/format: Fix GetPhysicalDeviceSparseImageFormatProperties definition
To match its declaration (and the corresponding definition in Vulkan
headers).

Pointed out by GCC 13:

../src/intel/vulkan/anv_formats.c:1597:6: warning: conflicting types for ‘anv_GetPhysicalDeviceSparseImageFormatProperties’ due to enum/integer mismatch; have ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  uint32_t,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  unsigned int,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)’} [-Wenum-int-mismatch]
 1597 | void anv_GetPhysicalDeviceSparseImageFormatProperties(
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/intel/vulkan/anv_private.h:123,
                 from ../src/intel/vulkan/anv_formats.c:24:
src/intel/vulkan/anv_entrypoints.h:122:30: note: previous declaration of ‘anv_GetPhysicalDeviceSparseImageFormatProperties’ with type ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)’}
  122 |   VKAPI_ATTR void VKAPI_CALL anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
      |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
2023-04-18 09:49:44 +00:00
Michel Dänzer
4ec052187a vulkan: Fix GetPhysicalDeviceSparseImageFormatProperties definition
To match its declaration (and the corresponding definition in Vulkan
headers).

Pointed out by GCC 13:

../src/vulkan/runtime/vk_physical_device.c:230:1: warning: conflicting types for ‘vk_common_GetPhysicalDeviceSparseImageFormatProperties’ due to enum/integer mismatch; have ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  uint32_t,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  unsigned int,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)’} [-Wenum-int-mismatch]
  230 | vk_common_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/vulkan/runtime/vk_physical_device.c:26:
src/vulkan/runtime/vk_common_entrypoints.h:116:30: note: previous declaration of ‘vk_common_GetPhysicalDeviceSparseImageFormatProperties’ with type ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)’ {aka ‘void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)’}
  116 |   VKAPI_ATTR void VKAPI_CALL vk_common_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
      |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
2023-04-18 09:49:44 +00:00
Michel Dänzer
0f7d01cdbe mesa/st: Make st_convert_image(_from_unit) declaration match definition
Pointed out by GCC 13:

../src/mesa/state_tracker/st_atom_image.c:51:1: warning: conflicting types for ‘st_convert_image’ due to enum/integer mismatch; have ‘void(const struct st_context *, const struct gl_image_unit *, struct pipe_image_view *, enum gl_access_qualifier)’ [-Wenum-int-mismatch]
   51 | st_convert_image(const struct st_context *st, const struct gl_image_unit *u,
      | ^~~~~~~~~~~~~~~~
In file included from ../src/mesa/state_tracker/st_atom_image.c:41:
../src/mesa/state_tracker/st_texture.h:242:1: note: previous declaration of ‘st_convert_image’ with type ‘void(const struct st_context *, const struct gl_image_unit *, struct pipe_image_view *, unsigned int)’
  242 | st_convert_image(const struct st_context *st, const struct gl_image_unit *u,
      | ^~~~~~~~~~~~~~~~
../src/mesa/state_tracker/st_atom_image.c:134:1: warning: conflicting types for ‘st_convert_image_from_unit’ due to enum/integer mismatch; have ‘void(const struct st_context *, struct pipe_image_view *, GLuint,  enum gl_access_qualifier)’ {aka ‘void(const struct st_context *, struct pipe_image_view *, unsigned int,  enum gl_access_qualifier)’} [-Wenum-int-mismatch]
  134 | st_convert_image_from_unit(const struct st_context *st,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~
../src/mesa/state_tracker/st_texture.h:246:1: note: previous declaration of ‘st_convert_image_from_unit’ with type ‘void(const struct st_context *, struct pipe_image_view *, GLuint,  unsigned int)’ {aka ‘void(const struct st_context *, struct pipe_image_view *, unsigned int,  unsigned int)’}
  246 | st_convert_image_from_unit(const struct st_context *st,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
2023-04-18 09:49:44 +00:00
Michel Dänzer
92a47ba1ae llvmpipe: Make lp_build_interp_soa declaration match its definition
Pointed out by GCC 13:

../src/gallium/drivers/llvmpipe/lp_bld_interp.c:545:1: warning: conflicting types for ‘lp_build_interp_soa’ due to enum/integer mismatch; have ‘struct LLVMOpaqueValue *(struct lp_build_interp_soa_context *, struct gallivm_state *, struct LLVMOpaqueValue *, struct LLVMOpaqueType *, struct LLVMOpaqueValue *, unsigned int,  unsigned int,  enum tgsi_interpolate_loc,  struct LLVMOpaqueValue *, struct LLVMOpaqueValue **)’ [-Wenum-int-mismatch]
  545 | lp_build_interp_soa(struct lp_build_interp_soa_context *bld,
      | ^~~~~~~~~~~~~~~~~~~
In file included from ../src/gallium/drivers/llvmpipe/lp_bld_interp.c:50:
../src/gallium/drivers/llvmpipe/lp_bld_interp.h:154:1: note: previous declaration of ‘lp_build_interp_soa’ with type ‘struct LLVMOpaqueValue *(struct lp_build_interp_soa_context *, struct gallivm_state *, struct LLVMOpaqueValue *, struct LLVMOpaqueType *, struct LLVMOpaqueValue *, unsigned int,  unsigned int,  unsigned int,  struct LLVMOpaqueValue *, struct LLVMOpaqueValue **)’
  154 | lp_build_interp_soa(struct lp_build_interp_soa_context *bld,
      | ^~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
2023-04-18 09:49:44 +00:00
Michel Dänzer
2420b190b8 tgsi: Make ureg_DECL_output_masked definition match its declaration
Pointed out by GCC 13:

../src/gallium/auxiliary/tgsi/tgsi_ureg.c:483:1: warning: conflicting types for ‘ureg_DECL_output_masked’ due to enum/integer mismatch; have ‘struct ureg_dst(struct ureg_program *, unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int)’ [-Wenum-int-mismatch]
  483 | ureg_DECL_output_masked(struct ureg_program *ureg,
      | ^~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/gallium/auxiliary/tgsi/tgsi_ureg.c:32:
../src/gallium/auxiliary/tgsi/tgsi_ureg.h:245:1: note: previous declaration of ‘ureg_DECL_output_masked’ with type ‘struct ureg_dst(struct ureg_program *, enum tgsi_semantic,  unsigned int,  unsigned int,  unsigned int,  unsigned int)’
  245 | ureg_DECL_output_masked(struct ureg_program *,
      | ^~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22517>
2023-04-18 09:49:44 +00:00
Lionel Landwerlin
3beaaa9ae8 anv: drop lowered storage images code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
2023-04-18 08:38:55 +00:00
Lionel Landwerlin
d04d701cc6 intel/nir: add options to storage image lowering
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
2023-04-18 08:38:55 +00:00
Lionel Landwerlin
d4f498a583 isl: fix a number of errors on storage format support on Gfx9/12.5
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
2023-04-18 08:38:55 +00:00
Samuel Pitoiset
c221bfbd85 radv/amdgpu: remove legacy code for querying context status
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
2023-04-18 06:55:03 +00:00
Samuel Pitoiset
767a9324b9 radv/amdgpu: remove legacy code path for creating the BO list
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
2023-04-18 06:55:03 +00:00
Samuel Pitoiset
c920d676c0 radv: require DRM 3.27
Linux kernel 4.20+ is now required to use RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
2023-04-18 06:55:03 +00:00
Tapani Pälli
d561bac6bb isl: disable mcs (and mcs+ccs) for color msaa on gfxver 125
Same/similar issues are seen on MTL platform as DG2 so disable for both.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22435>
2023-04-18 07:08:18 +03:00
Karol Herbst
f6fb189cbd rusticl/mem: more region and origin validation
Fixes piglit's api@clenqueuefillimage test

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22506>
2023-04-18 02:24:08 +00:00
Karol Herbst
1c1fb288fd rusticl: add create_pipe_box to better deal with pipe_box restrictions
This puts the CL -> pipe_box logic in one place and also make sure the
pipe_box is filled in correctly so we neither read out of bounds nor do
nothing at all.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22506>
2023-04-18 02:24:08 +00:00
Weibin Wu
74c43834e7 winsys/gdi: GDI B5G6R5 display target support
Added RGB_565 support to GDI display target.

This is to fix the color corruption issue when showing 16-bit B5G6R5 framebuffer through GDI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7637

Reviewed-by: Jesse Natalie jenatali@microsoft.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22507>
2023-04-17 23:57:16 +00:00
Jesse Natalie
d75e631e76 d3d12: Support blit texture uploads
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22542>
2023-04-17 23:25:16 +00:00
Jesse Natalie
81595cc823 d3d12: Respect buffer offsets for sampler views
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22542>
2023-04-17 23:25:16 +00:00
Lionel Landwerlin
2d4fbb3025 anv: Work around the spec question about pipeline feedback vs GPL.
This gives anv the same behavior as turnip in not asserting, and just not
filling out feedback for those stages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:38 +00:00
Emma Anholt
e433925789 anv: Refactor repeated pipeline creation feedback output code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Emma Anholt
647ca81654 anv: Only enable GPL if ANV_GPL=true, or if zink or DXVK are the engine.
Since there are concerns that the VK_EXT_GPL implementation may have
issues with mesh shading, disable it by default but give users a knob to
turn it on to experiment.

This doesn't automatically enable GPL use in zink, because we lack
extendedDynamicState2PatchControlPoints, but it means that you only need
to set ZINK_DEBUG=gpl and not both env vars.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
3d49cdb71e anv: implement VK_EXT_graphics_pipeline_library
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
0b8a2de2a1 anv: add dynamic buffer offsets support with independent sets
With independent sets, we're not able to compute immediate values for
the index at which to read anv_push_constants::dynamic_offsets to get
the offset of a dynamic buffer. This is because the pipeline layout
may not have all the descriptor set layouts when we compile the
shader.

To solve that issue, we insert a layer of indirection.

This reworks the dynamic buffer offset storage with a 2D array in
anv_cmd_pipeline_state :

   dynamic_offsets[MAX_SETS][MAX_DYN_BUFFERS]

When the pipeline or the dynamic buffer offsets are updated, we
flatten that array into the
anv_push_constants::dynamic_offsets[MAX_DYN_BUFFERS] array.

For shaders compiled with independent sets, the bottom 6 bits of
element X in anv_push_constants::desc_sets[] is used to specify the
base offsets into the anv_push_constants::dynamic_offsets[] for the
set X.

The computation in the shader is now something like :

  base_dyn_buffer_set_idx = anv_push_constants::desc_sets[set_idx] & 0x3f
  dyn_buffer_offset = anv_push_constants::dynamic_offsets[base_dyn_buffer_set_idx + dynamic_buffer_idx]

It was suggested by Faith to use a different push constant buffer with
dynamic_offsets prepared for each stage when using independent sets
instead, but it feels easier to understand this way. And there is some
room for optimization if you are set X and that you know all the sets in
the range [0, X], then you can still avoid the indirection. Separate
push constant allocations per stage do have a CPU cost.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
16c7c37718 anv: move preprocessing of NIR right before compilation
For graphics pipelines, we'll need to load NIR for retained shaders.
We want to avoid as much processing as possible while doing that when
we're able to load ISA from cache.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
17e7fe9d97 anv: make input attachments available through bindless
With independent sets, we cannot bake into the shader the binding
table entry of input attachments anymore because that final location
is affected by multiple sets.

We can still access them by looking into the descriptor buffer. This
change enables the image handle to be stored in the descriptor buffer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
e82b05dc64 anv: move force shading rate writes checks
With variable fragment shading rate, the last pre-rasterization stage
is responsible to write the shading rate value.

The current checks is as follow :

   If the fragment shader can be dispatched at variable shading rate,
   look for the last pre-raster stage to force the write.

We change this to :

   If we're the last pre-raster stage, force the write.

That way this works for pre-rasterization shaders compiled without a
fragment shader.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
b2d3d818d5 anv: introduce a base graphics pipeline object
Pipeline libraries and linked pipelines will inherit from this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Lionel Landwerlin
3ca1fdc8b5 isl: don't set inconsistent fields for depth when using stencil only
Since Gfx12+ 3DSTATE_STENCIL_BUFFER gained its own
Width/Depth/Format/etc... fields. So don't set those fields but leave
the address/pitch to 0.

Issue found on simulation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15637>
2023-04-17 22:43:37 +00:00
Sil Vilerino
f7bd375e39 frontend/va: Add VAProfileH264High10
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22539>
2023-04-17 22:26:20 +00:00
Sil Vilerino
407bd51b71 d3d12: Support PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL
Only return we support 1 quality level. The point of returning this
cap is that vlVaEndPicture will check for it and otherwise overwrite
some rate control parameters with defaults

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
99f96eb81b d3d12: Support PIPE_VIDEO_CAP_MIN_WIDTH/HEIGHT caps
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
956c582d04 d3d12: Support QPMin/QPMax app params
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
b40aacc0c2 d3d12: Support rate control HRD and MaxFrameSize app params
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
358fea01a6 d3d12: Support QVBR rate control mode
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
9c4969a249 frontend/va: Allow distinction for Min/MaxQP params sent from app and frontend defaults
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
44c53786a0 frontend/va: Allow distinction for HRD params sent from app and frontend defaults
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Sil Vilerino
30a6363c8f frontend/va: Support QVBR rate control mode
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
2023-04-17 21:58:35 +00:00
Patrick Lerda
035b84f308 lima: fix refcnt imbalance related to framebuffer
Indeed, the current framebuffer hardcoded cleanup
is not sufficient.

For instance, this issue is triggered with:
"piglit/bin/fbo-depthstencil clear default_fb -samples=2 -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

cc: mesa-stable

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22234>
2023-04-17 21:44:15 +00:00
José Roberto de Souza
3c47627871 build: Add Iris and ANV to ARM's auto-generated drivers
Xe KMD supports ARM CPUs, so we are now able to have Intel discrete
GPUs with ARM CPUs working.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
2023-04-17 20:08:34 +00:00
José Roberto de Souza
a5c57b9af7 iris: Fix vm bind of imported bos from other GPUs
The imported buffer may be created in a device with different
memory alignment and this can cause vm bind to fail because bo
size is smaller than vm bind range aligned.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
2023-04-17 20:08:34 +00:00
José Roberto de Souza
41f1e6c84b iris: Implement batch_submit() in Xe kmd backend
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
2023-04-17 20:08:34 +00:00
Nanley Chery
b2d7386631 iris/bufmgr: Handle flat_ccs for BO_ALLOC_ZEROED
We can't map the CCS memory region. So, rely on the kernel's zeroing of
new allocations. This is helpful when creating dmabufs that use
compression.

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
2023-04-17 19:16:59 +00:00
Nanley Chery
215fbbb604 iris/bufmgr: Add and use zero_bo
This simplifies the next patch.

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
2023-04-17 19:16:59 +00:00
Nanley Chery
5e5faa1194 iris: Allocate ZEROED BOs for shared resources
A port of cbee2d1102 ("i965/screen: Allocate ZEROED BOs for images").

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
2023-04-17 19:16:59 +00:00
Erico Nunes
be2619766b lima/ci: temporarily disable deqp-egl tests due to timeouts
A regression causing these tests to become unstable was introduced while
lima CI was disabled in the last days. It seems to be caused by the
latest kernel bump, but still needs more investigation.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22531>
2023-04-17 18:01:33 +00:00
Sil Vilerino
d0d6d90ccf d3d12: Do not fail d3d12_screen creation if D3D12_FEATURE_D3D12_OPTIONS14 not available
Fixes: 52ee566bc5 ("d3d12: Query device for D3D12_FEATURE_D3D12_OPTIONS14")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22534>
2023-04-17 15:44:46 +00:00
Leo Liu
ec896048bb radeonsi: create a new context for transcode with multiple video engines
For CHIP_GFX1100, there are 2 VCN instances but using unified queue i.e.
decode and encode will go to HW via same ring type. With AMDGPU kernel
scheduler, since the trancode is sharing the same pipe context, so that
the gpu scheduler assign the decode and encode into the same VCN engine.
In order to use both engines with transcode case, the new pipe context will
be created when the case being detected, with that the transcode can be
load balanced with multiple VCN engines.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22471>
2023-04-17 15:10:01 +00:00
José Roberto de Souza
1563210a41 intel/common: Add gt_id to intel_engine_class
MTL and newer platforms on Xe kmd will have engines with gt_id != 0.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22477>
2023-04-17 14:43:06 +00:00
José Roberto de Souza
670d4a2f71 iris: Fix close of exported bos
On commit 910e659e31 ("iris: Add function to close gem bos") I used
iris_bo_close() to close exported bos with the wrong drm_fd.
Causing piglit ext_image_dma_buf_import.ext_image_dma_buf_import*
tests to crash during tear-down.

So here adding iris_bufmgr_bo_close() that will close bos that belongs
to bufmgr->fd and changing the parameters of iris_bo_close() to close
the bo of given fd.

Fixes: 910e659e31 ("iris: Add function to close gem bos")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8836
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22501>
2023-04-17 14:02:53 +00:00
Lionel Landwerlin
b30a75a195 vulkan/overlay: deal with unknown pNext structures
To implement some of the features of the layer, we need to enable some
of the feature bits at device/command_buffer creation. To do so, we
need to edit some of the structures coming from the application. Most
of those are const so we need to clone them before edition.

This change disables some of the layer features if we run into a
situation where one of the structure we need to clone is unknown such
that we can't make a copy of it (since we don't know its size).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7677
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19897>
2023-04-17 15:41:58 +03:00
Erico Nunes
1eb2359bbd lima: fix stringop-overflow warning
New versions of gcc output a warning about this code, apparently
because of the mix of signed and unsigned operations in the loop
condition. Rework the types to fix the warning.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22129>
2023-04-17 10:15:25 +00:00
Patrick Lerda
4f42d3b843 r600: fix refcnt imbalance related to evergreen_set_shader_images()
Indeed, the reference was overwritten.

For instance, this issue is triggered with:
"piglit/bin/shader_runner tests/spec/arb_shader_image_load_store/execution/write-to-rendered-image.shader_test -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: a6b3792843 ("r600: add core pieces of image support.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22394>
2023-04-17 10:01:03 +00:00
Andres Calderon Jaramillo
4405e8a9e1 r600: Report multi-plane formats as unsupported
This is the analogous of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9490 but for
r600.

Discoloration of NV12 video frames was observed in Chrome/ChromeOS and
the problem was tracked down to the fact that Mesa was following the
PIPE_FORMAT_R8_G8B8_420_UNORM/lower_yuv_external() path. The symptom is
that (for an unknown reason) the YUV-to-RGB conversion is using the
value of Y as the value of Y, U, and V. So, for example, if the input
value is YUV = (50, 120, 130), then what actually gets converted to RGB
is YUV = (50, 50, 50).

Considering that PIPE_FORMAT_R8_G8B8_420_UNORM was introduced for
freedreno
(https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6693) and it
is already being reported as unsupported for radeonsi, it's reasonable
to assume that GPUs targeted by r600 don't support this path either.

Note: I tested this patch with an AMD Palm device which follows the
evergreen_is_format_supported() path. I did not have access to a device
to test the r600_is_format_supported() path.

v2: Changed >= 2 to > 1.

Fixes: 826a10255f ("st/mesa: Add NV12 lowering to PIPE_FORMAT_R8_G8B8_420_UNORM")
Tested-by: Andres Calderon Jaramillo <andrescj@chromium.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22511>
2023-04-17 09:43:14 +00:00
David Redondo
eb7e906886 egl/wayland: fix oob buffer access during buffer_fds clean up
After iterating through the number of planes in the above for
loop i is more than the number of planes which corresponds to
the size of the buffer_fds array.

Fixes: 967b9ad084 ("egl/wayland: for prime, allocate linear_copy from display GPU VRAM")
Signed-off-by: David Redondo <kde@david-redondo.de>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22496>
2023-04-17 09:02:53 +00:00
Samuel Pitoiset
0d7912d239 radv: disable fast-clears with CMASK for 128-bit formats
This isn't supported according to RadeonSI.

This fixes a piglit test with Zink that uses a R32G32B32A32_SINT format
with MSAA 8x. This is because DCC fast-clears with MSAA require to
clear CMASK too.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7313
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22462>
2023-04-17 06:19:34 +00:00
Qiang Yu
134abe8344 radeonsi: remove separate_prolog parameter
si_get_ps_prolog_key is only called by part mode shader now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
51d9946448 radeonsi: restructure mono merged shader build
No function change, just refine to share more code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
dcfe3eed80 radeonsi: monolithic ps emit prolog in nir directly
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
fbedbad0dd radeonsi: handle lowered ps in scan_io_usage
si_update_shader_binary_info() will call into this function
to collect memory usage info after shader has been lowered
finally. To avoid assertion failure in nir_instr_as_intrinsic()
we have to check instruction type first.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
b8bd186788 radeonsi: add si_nir_emit_polygon_stipple
Ported from si_llvm_emit_polygon_stipple().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
223878fbe2 radeonsi: add si_nir_lower_ps_color_input
For lowering legacy color inputs in PS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
cc891e871e ac/llvm,radeonsi: lower ps color load in nir
Remove the color0/1 in ac_shader_abi which is used by
radeonsi only.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
35d5c7c251 ac/nir/ps: lower sample mask input when needed
Ported from si_llvm_build_ps_prolog().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:56 +00:00
Qiang Yu
1103d4ed74 ac/nir/ps: add force lower barycentric load options
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:55 +00:00
Qiang Yu
0e4ac0c1d6 ac/nir/ps: lower barycentric load when bc_optimize
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:55 +00:00
Qiang Yu
d6c5596c37 radeonsi: implement nir_load_barycentric_optimize_amd
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:55 +00:00
Qiang Yu
7fcc5aa9c0 nir: add nir_load_barycentric_optimize_amd intrinsic
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
2023-04-17 02:11:55 +00:00
Mike Blumenkrantz
31a0de9921 zink: make general bo allocation more robust by iterating
previously there was a fallback path here (broken by f6d3a5755f)
which would attempt to demote BAR allocations to other heaps on failure
to avoid oom

this was great, but it's not the most robust solution, which is to iterate
all the memory types matching the given heap and try them in addition to having
a demotion fallback

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
2023-04-16 23:55:30 +00:00
Mike Blumenkrantz
9d923b14f9 zink: restore BAR allocation failure demotion
this restores the fallback used when BAR allocation fails due to oom
by re-selecting memoryTypeIndex after the heap demotion

Fixes: f6d3a5755f ("zink: zink_heap isn't 1-to-1 with memoryTypeIndex")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
2023-04-16 23:55:30 +00:00
Mike Blumenkrantz
561b64cf55 zink: slightly rework memoryTypeIndex selection to pre-determine heap
should be no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
2023-04-16 23:55:30 +00:00
Mike Blumenkrantz
085c9efbf3 zink: move memoryTypeIndex selection down in general bo allocation
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
2023-04-16 23:55:30 +00:00
Erico Nunes
fdf746cb2b Revert "ci: disable lima farm, currently out-of-space, needs to be fixed"
This reverts commit 78644c9bb0.

Fixes: 78644c9bb0 ("ci: disable lima farm, currently out-of-space, needs to be fixed")

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22513>
2023-04-16 23:03:47 +00:00
Eric Engestrom
8ebc5cbe2b v3dv/ci: drop fixed failure from fails.txt
Fixes: 8976d8280f ("wsi: remove get_sorted_vk_formats duplication")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22514>
2023-04-16 20:49:05 +01:00
David Heidelberg
74525f8576 ci: uninstall libdrm from the GL and VK containers
Occasionally causing troubles on -valve jobs.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
74e4235916 ci: polish deqp-runner a bit
Plus cosmetics adjustments to pass more of shellcheck.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
2933976e78 ci/freedreno: fix the a530_piglit job and switch to Weston
If we count devices which running a530 with mainline kernel and Mesa,
it's probably mostly phones and tablets running on Wayland. Adapt to it.

Fixes: 83c2b26acf ("ci/freedreno: Switch the piglit job to using a deqp-runner suite.")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
f84aee451d ci/freedreno: update a530 flakes, fails and skips
Add multiple skips for the:
 - KHR-GLES31.core.pixelstoragemodes.teximage2d
 - KHR-GLES31.core.pixelstoragemodes.teximage3d

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8837

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
2092f95975 ci/freedreno: a530 behaves stable in 6.3
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
1fcfcaf008 ci: drop overriding new a530 firmware due to preemption issues with older kernel
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8825

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
cad794594b ci/freedreno: do not restrict to 2 cpus on a530
Not needed for modern kernels (6.3+ for sure).

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
David Heidelberg
a925c59f83 ci: bump kernel to the 6.3, support HDK 888 based on sm8350
- uprev to kernel 6.3-rc6
 - add sm8350 support (needed for HDK 888)
 - add missing patch for Asurada functionality
 - enable CONFIG_ARM_SMMU_QCOM, since we dropped specific patch
   worarounding need for it

Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
2023-04-16 17:28:52 +00:00
Emma Anholt
f3e8aeb2e9 tu/perfetto: s/MRTs/attachment_count/ in traces.
MRTs usually means >1 color buffers, so seeing "2" is surprising when
you're expecing just color and depth.  Makes the output look more Vulkan.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22278>
2023-04-16 15:50:49 +00:00
Emma Anholt
947f5d4d7a tu/perfetto: Drop unused arg to send_descriptors().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22278>
2023-04-16 15:50:49 +00:00
Emma Anholt
020baed66e tu/perfetto: Use tu_CmdBeginDebugUtilsLabelEXT as a stage event in perfetto.
This lets zink mark points of interest (particularly its barriers and
blits) with some useful data, for presenting in perfetto traces.

Closes: #8487
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22278>
2023-04-16 15:50:49 +00:00
Emma Anholt
69bff073ca tu/perfetto: Clean up an extra token paste to just use the arg being passed.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22278>
2023-04-16 15:50:49 +00:00
Emma Anholt
b4b18e4165 tu/perfetto: Refactor code out of the macro, to stage_end.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22278>
2023-04-16 15:50:49 +00:00
Karol Herbst
60cfe15d79 rusticl/event: drop work item before updating status
This fixes some CTS compiler tests where they relied on the cl_kernel
object to be released in time so it can recompile a program without
throwing CL_INVALID_OPERATION due to still having active kernel objects.

Fixes: 47a80d7ff4 ("rusticl/event: proper eventing support")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22510>
2023-04-15 21:07:01 +00:00
Emma Anholt
00b9685d96 symbol_table: Prehash the key on insert, and reuse the entry on shadowing.
Mostly saves computing the hash twice, but while we're here there's no
need for shadowing to walk the table again.

Release Mesa build runtime of
KHR-Single-GL46.arrays_of_arrays_gl.SizedDeclarationsPrimitive -4.19869%
+/- 3.20231%

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22451>
2023-04-15 18:33:25 +00:00
Emma Anholt
46498abbac symbol_table: Don't bother resetting the key on popping scope.
If you made a same-name symbol, then its name was just the name from the
parent scope anyway.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22451>
2023-04-15 18:33:25 +00:00
Emma Anholt
0a400f933f symbol_table: Don't maintain the HT as we're destroying the table.
Release Mesa build runtime of
KHR-Single-GL46.arrays_of_arrays_gl.SizedDeclarationsPrimitive -5.05801%
+/- 3.41206% (n=12)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22451>
2023-04-15 18:33:25 +00:00
Emma Anholt
6db7d72b4b symbol_table: Store the symbol name in the same allocation as the symbol entry.
Saves an extra malloc.  Release Mesa build runtime of
KHR-Single-GL46.arrays_of_arrays_gl.SizedDeclarationsPrimitive (which is a
lot of GLSL 4.60 builtin vars symbol table setup) -5.15821% +/- 3.19636%
(n=13).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22451>
2023-04-15 18:33:25 +00:00
David Heidelberg
c690644842 ci/amd: update checksums after DXVK 2.1 update
Heaven got fixed with DXVK 2.1.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22447>
2023-04-15 10:57:06 +00:00
David Heidelberg
5cf3b92661 ci/dxvk: uprev to 2.1
Major uprev, requires VK 1.3 now.

Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22447>
2023-04-15 10:57:06 +00:00
David Heidelberg
0dcb3994a5 ci/amd: 4/5 runners TPad-C13 runners are online, restore most of the tests
Partial revert of 590959057c ("ci/amd: raven is currently downgraded
to 2 machines only, adapt")

Test which remains disabled: radeonsi-raven-va:amd64 (VAAPI testing).

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22447>
2023-04-15 10:57:06 +00:00
Lionel Landwerlin
a787728906 anv: enable blorp query reset for performance queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22480>
2023-04-15 12:25:57 +03:00
Michel Dänzer
20c330e95d ci: Drop executable permissions from backend compiler wrapper script
Not needed anymore, since the frontend scripts just source the backend
script now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22438>
2023-04-15 01:55:12 +00:00
Michel Dänzer
1ec3c16c54 ci: Remove shebang from backend compiler wrapper script
Not needed anymore, since the frontend scripts just source the backend
script now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22438>
2023-04-15 01:55:12 +00:00
Michel Dänzer
21b190bf44 ci: Use set -e in frontend compiler wrapper scripts.
I doubt the shebang line in the backend script has any effect now,
since the frontend scripts just source it directly.

v2:
* Use "set -e" instead of adding -e to shebang (Eric Engestrom)

v3:
* Apply to the clang wrapper scripts as well (Eric Engestrom)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22438>
2023-04-15 01:55:12 +00:00
Michel Dänzer
1915185648 ci: Explicitly test for meson feature checks in compiler wrapper
The previous indirect method was more complicated and still error prone.

v2:
* Use "grep -E" (Eric Engestrom)
* Exclude spaces and slashes in the grep pattern, to avoid accidentally
  matching across unrelated compiler arguments.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22438>
2023-04-15 01:55:12 +00:00
Jesse Natalie
2fbedd442a util: Delete Offset() macro from u_memory.h
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22494>
2023-04-15 00:54:16 +00:00
Caio Oliveira
7706d1cc33 spirv/tests: Add test for single-block loop
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22509>
2023-04-15 00:17:15 +00:00
Jesse Natalie
5672b6cb02 dzn: Remove #if D3D12_SDK_VERSION blocks now that 610 is required
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22504>
2023-04-14 23:59:33 +00:00
Jesse Natalie
290bb7a706 microsoft/clc: Remove #if D3D12_SDK_VERSION blocks now that 610 is required
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22504>
2023-04-14 23:59:33 +00:00
Jesse Natalie
27c304be2e d3d12: Remove #if D3D12_SDK_VERSION blocks now that 610 is required
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22504>
2023-04-14 23:59:33 +00:00
Luc Ma
b5a9021708 meson: keep Mako version checking in accord with build msg
Fixes: 52194ae4df ("meson: Ensure that mako is >= 0.8.0")
Signed-off-by: Luc Ma <luc@sietium.com>
Reported-by: Terry Zhang <terry@sietium.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22499>
2023-04-14 23:16:01 +00:00
Sathishkumar S
8f0da0851f radeonsi/vcn: engage all jpeg engines on gfx940 for mjpeg decode
engage all available jpeg engines to decode mjpeg video frames

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22388>
2023-04-14 22:30:44 +00:00
Sathishkumar S
87a44c44b4 radeonsi/vcn: enable RGBP format on gfx940 jpeg
decode output format conversion to RGBP is supported on gfx940 jpeg.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22388>
2023-04-14 22:30:44 +00:00
Sathishkumar S
bdb7f36aa8 frontends/va: add support for RGBP rt_format
check and enable RGBP rt_format and support VaImage creation for the RGBP/ARGB.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22388>
2023-04-14 22:30:44 +00:00
Sathishkumar S
23580b09a3 util/format: add planar3 r8_g8_b8_unorm pipe format
add pipe format to represent three plane 8bit RGB format

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22388>
2023-04-14 22:30:44 +00:00
Felix DeGrood
33886e5ef2 docs: add INTEL_MEASURE=cpu
Update documentation about INTEL_MEASURE=cpu

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:50 +00:00
Felix DeGrood
b661149921 iris: Enable INTEL_MEASURE=cpu
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:50 +00:00
Felix DeGrood
0417cfd7a0 anv: Enable INTEL_MEASURE=cpu
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:50 +00:00
Felix DeGrood
55ba4575be intel: INTEL_MEASURE cpu mode
INTEL_MEASURE normally measures timing of GPU events. However, it
is sometimes useful to instead measure when these gfx API calls
were requested of the driver. INTEL_MEASURE cpu can be used in
in conjunction with other driver debug capabilities, like
INTEL_DEBUG=pc for analyzing stalls/flushes or when debugger is
attached, to track which frame you're currently on or where in
the frame you're at.

Initial commit, without plumbing into anv/iris.

"INTEL_MEASURE=cpu" will collect a cpu timestamp for each
INTEL_MEASURE event instead of GPU timestamps.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:50 +00:00
Felix DeGrood
c45dee34aa anv: split INTEL_MEASURE multi events
Measure performance of each draw separately in multi_draw event.
Previously, we measured duration of the sum of all draws launched
per multi_draw. This should provide more detailed data for
multi_draws.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:49 +00:00
Felix DeGrood
50bda45d15 anv: Add flush reason to NEEDS_END_OF_PIPE_SYNC
cs_stall gets inserted if both flushes and invalidates are required.
This cs_stall reason was not called out explicitly, until now.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:49 +00:00
Felix DeGrood
bdeb849e25 anv: Add flush reasons to raytracing flushes
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:49 +00:00
Felix DeGrood
9a30493ccb anv: Add END_OF_PIPE_SYNC reporting to INTEL_DEBUG=pc
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21505>
2023-04-14 21:57:49 +00:00
David (Ming Qiang) Wu
bfce57c7a5 radeonsi/vcn: add an exception of field case for h264 decoding
This is an error case where the I field has no reference, however
the reference list contains some reference, which resulting in
not be able to find its reference, and it is a correct behavior,
should not enter the correction code. Just add this exception to
prevent such a case, if more exceptions found, they will
be treated indiviually in the future.

Cc: mesa-stable
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8740

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22485>
2023-04-14 21:03:43 +00:00
Roland Scheidegger
f23d54cfaa llvmpipe: fix some corner cases with line rendering
Some comparisons were wrong depending on swapped endpoints and
the bottom_edge_rule (if the endpoint was exactly touching
pixel center), hence the code assuming a line endpoint which
should be drawn according to diamond exit rules would already be
drawn (so not adjusting the endpoint) when in reality it was not,
in which case the line would end up one pixel too short.

Note that this is still not fully correct - the logic as such
should be correct now, however these comparisons can give wrong
results due to float math vs. fixed point planes (an endpoint very
close to a pixel center might be exactly at pixel center in fixed
point), but this should do for now. (Also, the logic is still
completely wrong for state trackers not using half_pixel_center
setting, but this is only really a concern for dx9 state tracker.)

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22481>
2023-04-14 20:41:09 +00:00
Roland Scheidegger
9b6abe4206 llvmpipe: minor cleanups in line rendering code
Use float constants, some code deduplication, no functional change.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22481>
2023-04-14 20:41:09 +00:00
Juan A. Suarez Romero
82c2258019 v3d: set depth compare function correctly
Depth compare function must be set to the configured one only when
compare mode is enabled; otherwise it must be configured to never.

v2 (Eric):
- Handle V3D < 4.0 case

CC: mesa-stable
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22470>
2023-04-14 20:20:43 +00:00
antonino
c84989c4cf zink: use correct primitives for passthrough gs with tess
When tessellation is used the geometry shader needs to take the
tessellator output primitive as input.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: 90a8525d70 ("zink: handle edgeflags")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22498>
2023-04-14 19:22:48 +00:00
antonino
7e6191f605 zink: don't emulate edgeflags for patches
Patches are used for tessellation, edgeflags don't work with
tessellation.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: 90a8525d70 ("zink: handle edgeflags")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22498>
2023-04-14 19:22:48 +00:00
Samuel Pitoiset
3ad751f043 radv: tidy up dirtying RBPLUS state in radv_bind_dynamic_state()
To dirty driver specific states at the same place.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22472>
2023-04-14 17:49:23 +00:00
Samuel Pitoiset
ba71b142f8 radv: re-emit the guardband state when related PSO are bound
If one of the related states is static, the guardband state needs to be
re-emitted when a graphics pipeline is bound.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8828
Fixes: 40d8df7280 ("radv: emit the guardband state separately from the scissor state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22472>
2023-04-14 17:49:23 +00:00
Patrick Lerda
28cb33fada r600: fix refcnt imbalance related to r600_set_vertex_buffers()
For instance, this issue is triggered with: "piglit/bin/useprogram-flushverts-2 -auto -fbo" or
"piglit/bin/primitive-restart-draw-mode line_loop -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 27dcb46629 ("gallium: add take_ownership param into set_vertex_buffers to eliminate atomics")

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22395>
2023-04-14 16:48:09 +00:00
James Knight
cd861b7f38 meson: ensure i915 Gallium driver includes Intel sources
Ensure builds flag the use of Intel sources when the i915 Gallium driver
is configured (`-Dgallium-drivers=i915`). Otherwise, a build may fail if
other Intel-based configuration options are not enabled:

    ./src/gallium/winsys/i915/drm/meson.build:21:0: ERROR: Unknown variable "libintel_common".

Signed-off-by: James Knight <james.d.knight@live.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22490>
2023-04-14 16:13:48 +00:00
Marcin Ślusarz
cf90be90ad intel: split URB space between task and mesh proportionally to entry sizes
Improves performance by 0.5-2.5% in vk_meshlet_cadscene
depending on the model.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22445>
2023-04-14 15:43:50 +00:00
Samuel Pitoiset
f11a4a09b0 radv: try to keep HTILE compressed for READ_ONLY_OPTIMAL layout
It should be handled like DEPTH_STENCIL_READ_ONLY_OPTIMAL.

This fixes an issue with VRS attachment because HTILE was considered
disabled for READ_ONLY_OPTIMAL but there is no reasons to disable it
as long as the image is only used as a depth/stencil attachment.

Otherwise, when HTILE is disabled, VRS rates are ignored.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8675
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22468>
2023-04-14 13:48:04 +00:00
Eric Engestrom
3e22c3a8bc broadcom/ci: deduplicate script definition
It's always going to be the same for all the jobs in our farm.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Juan A. Suarez <igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22457>
2023-04-14 13:13:00 +00:00
Samuel Pitoiset
bdb03ecdd9 vulkan: ignore rasterizationSamples when the state is dynamic
Fixes: 1deb83fb86 ("vulkan: Add more dynamic multisample states")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22444>
2023-04-14 12:26:53 +00:00
Eric Engestrom
6af78baa23 ci: update shebang to make it more portable
Doesn't matter for now, but it doesn't cost anything to make it portable :)

Suggested-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22450>
2023-04-14 11:28:21 +00:00
Eric Engestrom
9120f17b27 ci: bump tags
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22450>
2023-04-14 11:28:21 +00:00
Eric Engestrom
8eb5de3126 ci: start documenting which image tags need to be bumped
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22450>
2023-04-14 11:28:21 +00:00
Eric Engestrom
9a45d3ee13 ci: move deqp-egl instead of copying it
To make sure we can't accidentally run a random leftover platform.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22450>
2023-04-14 11:28:21 +00:00
Eric Engestrom
efd2067a8f ci: add -android suffix for android build of deqp-egl
Makes it clearer which platform is being run.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22450>
2023-04-14 11:28:21 +00:00
Eric Engestrom
e876a018e9 ci: stop removing -x11 suffix for x11 build of deqp-egl
Makes it clearer which platform is being run.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22450>
2023-04-14 11:28:21 +00:00
Lionel Landwerlin
08cf224c4a intel/vec4: force exec_all on float control instruction
Applying the same rule as the fs backend so that generation code
doesn't assert.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: daa8003e45 ("intel/fs: use nomask for setting cr0 for float controls")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22473>
2023-04-14 10:54:01 +00:00
Mike Blumenkrantz
df784c03fb glthread: disable by default with fewer than 4 (big) CPUs
with a low CPU count or low count of "big" CPUs, glthread hurts perf
much more than it helps, so it should be disabled

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21926>
2023-04-14 10:16:49 +00:00
Mike Blumenkrantz
8c42c353b6 driconf: rework glthread enablement
this splits out glthread enablement into 3 settings:
- driver
- app
- user

which can then be modified with more granularity

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21926>
2023-04-14 10:16:49 +00:00
Mike Blumenkrantz
0cc93a4603 util/cpu: add big.LITTLE cpu detection
it's useful for drivers to be able to detect big.LITTLE topology in
order to make decisions about how to handle workloads (specifically as
it relates to threading)

Reviewed-by: Rob Clark <robdclark@chromium.org>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21926>
2023-04-14 10:16:49 +00:00
i509VCB
54d01db8a8 docs/asahi: Add hardware glossary
Explains some of hardware units referenced throughout the driver.

Signed-off-by: i509VCB <git@i509.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22200>
2023-04-14 09:09:12 +00:00
Karol Herbst
44fb5ceb36 nouveau: nouveau_copy_buffer can deal with user_ptrs just fine
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
47e0c6764b nouveau: allow to enable SVM without having to enable CL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
7cfb8cb1a5 nv50/ir: ignore CL system values
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
bfee3a8563 rusticl: add support for fine-grained system SVM
At the moment it's an all or nothing. A driver supporting fine-grained
system SVM can enable it in order to get full SVM support.

Lower levels could be emulated by userptrs and placing the bo at the same
locations in the GPU's VM as well, but that would require reworking quite
a bit on the drivers side.

For now supporting mmu_notifiers on the kernel side is the only way of
getting SVM support with Rusticl.

The only driver having the gallium bits wired up atm is Nouveau, but I
suspect it shouldn't be all to hard for iris and radeonsi as well.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
bfcd914825 rusticl/mem: add get_parent helper
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
816bab4c23 rusticl/memory: Rework mapping of memory located in system RAM
The old code didn't consider a few cases where we could just map resources
located in system RAM.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
2ee082ef8a rusticl/context: add helper to get the max mem alloc size for all devices
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Karol Herbst
50097ffae0 gallium: correctly name the flags of svm_migrate
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19712>
2023-04-14 07:41:54 +00:00
Mike Blumenkrantz
e5654cb3ee zink: remove screen param from zink_prune_query()
no longer used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
2023-04-14 07:22:58 +00:00
Mike Blumenkrantz
7119a344f3 zink: always defer query pool deletion
this feels dumb, but I can't think of a simpler way to do it that
would more accurately handle deletion while also guaranteeing
pool longevity

Fixes: 7da78ffb69 ("zink: create/use query pools dynamically")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
2023-04-14 07:22:57 +00:00
Mike Blumenkrantz
50e3974e25 zink: pass ctx through query destroy paths
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
2023-04-14 07:22:57 +00:00
Mike Blumenkrantz
cb83606279 zink: remove atomics from zink_query
this is never accessed from threads anymore and
hasn't been for a long time

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
2023-04-14 07:22:57 +00:00
Thong Thai
c987eed9cd frontends/va: report min width and min height values if available
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8756
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22422>
2023-04-14 06:27:56 +00:00
Thong Thai
413235d164 radeonsi: return min width and min height video cap values
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22422>
2023-04-14 06:27:56 +00:00
Thong Thai
7bce60f8af gallium/pipe: add min width and min height video cap enums
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22422>
2023-04-14 06:27:56 +00:00
Eric Engestrom
5b376664e7 v3d: add flake spec@ext_framebuffer_blit@fbo-sys-sub-blit
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/39905522

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22486>
2023-04-14 05:56:25 +00:00
Giancarlo Devich
440459645b d3d12: Support separate front/back stencils
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3833
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>
2023-04-14 03:19:22 +00:00
Giancarlo Devich
36990eca48 d3d12: Add ID3D12GraphicsCommandList8 to the context
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>
2023-04-14 03:19:22 +00:00
Giancarlo Devich
4f9cd76369 d3d12: Update PSO creation to use CreatePipelineState
This uses CD3DX12_PIPELINE_STATE_STREAM3 from
d3dx12_pipeline_state_stream.h and gives us access to newer D3D12
features.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>
2023-04-14 03:19:22 +00:00
Giancarlo Devich
52ee566bc5 d3d12: Query device for D3D12_FEATURE_D3D12_OPTIONS14
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>
2023-04-14 03:19:22 +00:00
Giancarlo Devich
cc6d87b462 d3d12: Update and require DirectX-Headers 1.610.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22454>
2023-04-14 03:19:22 +00:00
Lionel Landwerlin
5dc4212cc1 vulkan/runtime: discard unused graphics stages in libraries
Anv is trying to rely on the stages put into the library graphics
state.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22460>
2023-04-14 02:44:04 +00:00
Mike Blumenkrantz
a86c710ce5 mesa/st/program: don't init xfb info if there are no outputs
this is almost certainly a failure case, but drivers still shouldn't
get xfb info if there are no outputs

affects:
spec@glsl-1.50@execution@interface-blocks-api-access-members

cc: mesa-stable

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22448>
2023-04-14 01:12:08 +00:00
Brian Paul
9f4ec94c20 llvmpipe: code clean-ups in llvmpipe_get_query_result_resource()
Replace 'unsignalled' with 'ready' to simplify logic.
Remove needless !! in !!(a > b) expressions.
Remove some casting.  Use MIN2() macro.  Add const qualifiers.
Declare loop vars in loops.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22464>
2023-04-14 00:53:03 +00:00
Brian Paul
f0bd574223 llvmpipe: remove lp_setup_alloc_triangle()'s unneeded tri_size param
This returned size was never used by the callers.

Signed-off-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22464>
2023-04-14 00:53:02 +00:00
Lionel Landwerlin
267dcdca8a docs: add missing MESA_VK_WSI_HEADLESS_SWAPCHAIN variable
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22478>
2023-04-14 00:45:25 +00:00
Timur Kristóf
948a122f30 amd: Rename INDIRECT_BUFFER_CIK to just INDIRECT_BUFFER.
This packet is supported on GFX6 too, its name should relect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:48 +00:00
Timur Kristóf
7ddac41f3f radv: Chain command buffers on GFX6 in radv_queue.
Also don't check whether chaining is enabled in radv_queue, the
winsys will take care of that anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:48 +00:00
Timur Kristóf
d6518fd357 radv: Use IB BOs (chaining) by default on GFX6.
GFX6 supports IB chaining since the PFP firmware version 20.
Note that the very first amdgpu firmware for GFX6 already had
version 29, so we can assume that all GPUs supported by RADV
have this feature.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Timur Kristóf
0e7244ce18 radv: Disallow IB2 on GFX6 when using draw_indirect_multi.
GFX6 has the same problem as GFX7 here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Timur Kristóf
add3b34c17 radv/amdgpu: Remove unnecessary assertions from chaining.
These used to guard against chaining on GFX6 and on HW IP types
that don't support chaining, but these things are now guarded
elsewhere and these assertions are no longer necessary.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Harri Nieminen
5bb8d513cc r600/sfn: fix typos in code
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
298f555572 r600/sfn: fix typos
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
7eaab5dec0 r600/sb: fix typo
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
45e09d5bb9 r600: fix typos
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
7851b6fd48 radeonsi: fix typos
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
701b6520f5 r300: fix typos
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
f85f511a38 amd: fix typos in code
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Harri Nieminen
aea48a4ff1 amd: fix typos
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
2023-04-13 23:08:22 +00:00
Karol Herbst
1aab6820fb rusticl/mem: replace buffer_offset_size with CLVec::calc_offset_size
buffer_offset_size was almost correct, but didn't calculate the size
correctly.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>
2023-04-13 20:23:44 +00:00
Karol Herbst
68df8cc79d rusticl/mem: fix Mem::copy_rect
The old code was kinda bogus as we mapped at (0, 0, 0), but then didn't
take the origin into account when specifiying the size of the access.

Just offset properly instead.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>
2023-04-13 20:23:44 +00:00
Karol Herbst
3e118e8910 rusticl: rework CLVec helper function to calculate bounds
We kinda need three things:
1. offset of a point in linear memory
2. size of access for a region
3. a mix of both

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22449>
2023-04-13 20:23:44 +00:00
Felix DeGrood
0a52002a1c anv: disable reset query pools using blorp opt on MTL
This optimization causes some MTL tests to run forever. Not
yet sure why. Disabling optimization until we have a fix.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22373>
2023-04-13 19:35:34 +00:00
Emma Anholt
6405a38aeb ci/crocus: Update checksum for STK.
Rendering is still fine, stable checksum for the last 3 runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22348>
2023-04-13 19:16:23 +00:00
Emma Anholt
e5008acf13 zink: Avoid infinite loop finding no var in update_so_info.
Fixes timeouts in CI for
spec@glsl-1.50@execution@interface-blocks-api-access-members where we've
got a GS with SO outputs and no vars declared, by asserting that something
has gone horribly wrong instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22348>
2023-04-13 19:16:23 +00:00
Alyssa Rosenzweig
efaffcfbd4 nir: Add more system values for lowering XFB
Add more system values for XFB. This should be good enough for lowering GL3.1 +
transform_feedback2 + transform_feedback3. More will probably be needed for
geom/tess but that will be easier to work with when I'm actually bringing up
geom/tess. At any rate, we're splitting out XFB from the rasterization pipeline
and since XFB happens only in the last shader pre-rasterization stage, VS+XFB is
an orthogonal problem from e.g. VS+GS+XFB. Yeah, the combinatorics suck.

These will be used by Asahi, and hopefully eventually Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22123>
2023-04-13 18:04:25 +00:00
Alyssa Rosenzweig
947a7590c7 d3d12: Use u_default_get_sample_position
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>
2023-04-13 15:40:54 +00:00
Alyssa Rosenzweig
07e83f5819 freedreno: Use u_default_get_sample_position
Verified by hand to produce the same results.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>
2023-04-13 15:40:54 +00:00
Alyssa Rosenzweig
71cfe8fb60 panfrost: Use u_default_get_sample_position
The Mali sample positions are the standard sample positions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>
2023-04-13 15:40:54 +00:00
Alyssa Rosenzweig
43f9903d0c zink: Use u_default_get_sample_position
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>
2023-04-13 15:40:54 +00:00
Alyssa Rosenzweig
6b211e9b43 gallium: Add u_default_get_sample_position
ctx->get_sample_position doesn't change what it returns based on the programmed
positions, it's just supposed to return the defaults. For most (all?) hardware,
those are the Vulkan standard sample positions. In bf9a1e0a4b ("zink: add a
pipe_context::get_sample_position hook"), Mike wondered why there wasn't a
common implementation. So here's one to fix that :~)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22383>
2023-04-13 15:40:54 +00:00
José Roberto de Souza
6124f8f371 iris: Set priority to Xe engines
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>
2023-04-13 14:58:55 +00:00
José Roberto de Souza
a564baf6e7 iris: Implement batch_check_for_reset() in Xe kmd backend
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>
2023-04-13 14:58:55 +00:00
José Roberto de Souza
17c7eb1d4f iris: Create, destroy and replace Xe engines
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>
2023-04-13 14:58:55 +00:00
José Roberto de Souza
35d6e830c7 iris: Move iris_batch i915 specific variables to union
Saves some bytes when Xe kmd fields are added and makes easier to
spot places that are misusing i915 variables.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>
2023-04-13 14:58:55 +00:00
José Roberto de Souza
b6cf4001d3 iris: Initialize batch screen in iris_init_batch()
The comment to initialize screen earlier not valid anymore so we can
initialize it with the rest of batch fields.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>
2023-04-13 14:58:55 +00:00
José Roberto de Souza
35a547430e iris: Move i915 batch destroy logic to iris_i915_destroy_batch()
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22172>
2023-04-13 14:58:55 +00:00
xurui
f66e6b671c zink: Some return values of malloc should be checked
Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22328>
2023-04-13 13:40:22 +00:00
Samuel Pitoiset
0b4e7491f3 radv: fix detecting FMASK_DECOMPRESS/DCC_DECOMPRESS meta pipelines
With the on_demand shaders feature, meta pipelines are only created
when they are used, otherwise they are NULL. Though, inside secondary
cmdbuffers, the graphics pipeline might be also NULL. In this specific
case, radv_is_{dcc,fmask}_decompress_pipeline() would return
TRUE because these pipelines are NULL too...

This fixes flakes with tests that use secondary cmdbuffers with
TC-compat images.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22440>
2023-04-13 09:00:38 +00:00
Eric Engestrom
8f024cdd4d docs: reset new_features.txt
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22455>
2023-04-13 08:45:17 +00:00
Eric Engestrom
4aab6bd456 VERSION: bump to 23.2
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22455>
2023-04-13 08:45:17 +00:00
3392 changed files with 288952 additions and 142076 deletions

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@@ -0,0 +1,2 @@
# Vendored code
src/amd/vulkan/radix_sort/*

8
.clang-format-include Normal file
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@@ -0,0 +1,8 @@
# The following files are opted into `ninja clang-format` and
# enforcement in the CI.
src/**/asahi/**/*
src/**/panfrost/**/*
src/amd/vulkan/**/*
src/amd/compiler/**/*
src/egl/**/*

47
.git-blame-ignore-revs Normal file
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@@ -0,0 +1,47 @@
# List of commits to ignore when using `git blame`.
#
# Per git-blame(1):
# Ignore revisions listed in the file, one unabbreviated object name
# per line, in git-blame. Whitespace and comments beginning with # are
# ignored.
#
# Please keep these in chronological order :)
#
# You can add a new commit with the following command:
# git log -1 --pretty=format:'%n# %s%n%H%n' >> .git-blame-ignore-revs $COMMIT
# pvr: Fix clang-format error.
0ad5b0a74ef73f5fcbe1406ad9d57fe5dc00a5b1
# panfrost: Fix up some formatting for clang-format
a4705afe63412498d13ded73cba969c66be67907
# asahi: clang-format the world again
26c51bb8d8a33098b1990425a391f56ffba5728c
# perfetto: Add a .clang-format for the directory.
da78d5d729b1800136dd713b68492cb339993f4a
# panfrost/winsys: Clang-format
c90f036516a5376002be6550a917e8bad6a8a3b8
# panfrost: Re-run clang-format
4ccf174009af6732cbffa5d8ebb4687da7517505
# panvk: Clang-format
c7bf3b69ebc8f2252dbf724a4de638e6bb2ac402
# pan/mdg: Fix icky formatting
133af0d6c945d3aaca8989edd15283a2b7dcc6c7
# mapi: clang-format _glapi_add_dispatch()
30332529663268a6406e910848e906e725e6fda7
# radv: reformat according to its .clang-format
8b319c6db8bd93603b18bd783eb75225fcfd51b7
# aco: reformat according to its .clang-format
6b21653ab4d3a67e711fe10e3d403128b6d26eb2
# egl: re-format using clang-format
2f670d89db038d5a29f6b72732fd7ad63dfaf4c6

View File

@@ -1,14 +1,20 @@
workflow:
rules:
# merge pipeline
- if: $GITLAB_USER_LOGIN == "marge-bot" && $CI_COMMIT_BRANCH == null
variables:
MESA_CI_PERFORMANCE_ENABLED: 1
VALVE_INFRA_VANGOGH_JOB_PRIORITY: "" # Empty tags are ignored by gitlab
# post-merge pipeline
- if: $GITLAB_USER_LOGIN == "marge-bot" && $CI_COMMIT_BRANCH
variables:
LAVA_JOB_PRIORITY: 40
VALVE_INFRA_VANGOGH_JOB_PRIORITY: priority:low
# any other pipeline
- if: $GITLAB_USER_LOGIN != "marge-bot"
variables:
LAVA_JOB_PRIORITY: 50
VALVE_INFRA_VANGOGH_JOB_PRIORITY: priority:low
- when: always
variables:
@@ -21,30 +27,23 @@ variables:
rm download-git-cache.sh
set +o xtrace
CI_JOB_JWT_FILE: /minio_jwt
MINIO_HOST: s3.freedesktop.org
S3_HOST: s3.freedesktop.org
# per-pipeline artifact storage on MinIO
PIPELINE_ARTIFACTS_BASE: ${MINIO_HOST}/artifacts/${CI_PROJECT_PATH}/${CI_PIPELINE_ID}
PIPELINE_ARTIFACTS_BASE: ${S3_HOST}/artifacts/${CI_PROJECT_PATH}/${CI_PIPELINE_ID}
# per-job artifact storage on MinIO
JOB_ARTIFACTS_BASE: ${PIPELINE_ARTIFACTS_BASE}/${CI_JOB_ID}
# reference images stored for traces
PIGLIT_REPLAY_REFERENCE_IMAGES_BASE: "${MINIO_HOST}/mesa-tracie-results/$FDO_UPSTREAM_REPO"
# Individual CI farm status, set to "offline" to disable jobs
# running on a particular CI farm (ie. for outages, etc):
FD_FARM: "online"
COLLABORA_FARM: "online"
MICROSOFT_FARM: "online"
LIMA_FARM: "offline"
IGALIA_FARM: "online"
ANHOLT_FARM: "online"
VALVE_FARM: "online"
AUSTRIANCODER_FARM: "online" # only etnaviv GPUs
PIGLIT_REPLAY_REFERENCE_IMAGES_BASE: "${S3_HOST}/mesa-tracie-results/$FDO_UPSTREAM_REPO"
# For individual CI farm status see .ci-farms folder
# Disable farm with `git mv .ci-farms{,-disabled}/$farm_name`
# Re-enable farm with `git mv .ci-farms{-disabled,}/$farm_name`
# NEVER MIX FARM MAINTENANCE WITH ANY OTHER CHANGE IN THE SAME MERGE REQUEST!
default:
before_script:
- >
export SCRIPTS_DIR=$(mktemp -d) &&
curl -L -s --retry 4 -f --retry-all-errors --retry-delay 60 -O --output-dir "${SCRIPTS_DIR}" "${CI_PROJECT_URL}/-/raw/${CI_COMMIT_SHA}/.gitlab-ci/setup-test-env.sh" &&
chmod +x ${SCRIPTS_DIR}/setup-test-env.sh &&
. ${SCRIPTS_DIR}/setup-test-env.sh &&
echo -n "${CI_JOB_JWT}" > "${CI_JOB_JWT_FILE}" &&
unset CI_JOB_JWT # Unsetting vulnerable env variables
@@ -61,6 +60,16 @@ default:
# https://gitlab.freedesktop.org/mesa/mesa/-/issues/?sort=created_date&state=opened&label_name%5B%5D=CI%20daily
retry:
max: 1
# Ignore runner_unsupported, stale_schedule, archived_failure, or
# unmet_prerequisites
when:
- api_failure
- runner_system_failure
- script_failure
- job_execution_timeout
- scheduler_failure
- data_integrity_failure
- unknown_failure
include:
- project: 'freedesktop/ci-templates'
@@ -78,6 +87,7 @@ include:
- local: '.gitlab-ci/container/gitlab-ci.yml'
- local: '.gitlab-ci/build/gitlab-ci.yml'
- local: '.gitlab-ci/test/gitlab-ci.yml'
- local: '.gitlab-ci/farm-rules.yml'
- local: '.gitlab-ci/test-source-dep.yml'
- local: 'docs/gitlab-ci.yml'
- local: 'src/amd/ci/gitlab-ci.yml'
@@ -156,6 +166,7 @@ stages:
# Source code
- include/**/*
- src/**/*
- .ci-farms/*
when: on_success
# Otherwise, build/test jobs won't run because no rule matched.
@@ -214,10 +225,12 @@ make git archive:
script:
# Compactify the .git directory
- git gc --aggressive
# Download & cache the perfetto subproject as well.
- rm -rf subprojects/perfetto ; mkdir -p subprojects/perfetto && curl https://android.googlesource.com/platform/external/perfetto/+archive/$(grep 'revision =' subprojects/perfetto.wrap | cut -d ' ' -f3).tar.gz | tar zxf - -C subprojects/perfetto
# compress the current folder
- tar -cvzf ../$CI_PROJECT_NAME.tar.gz .
- ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" ../$CI_PROJECT_NAME.tar.gz https://$MINIO_HOST/git-cache/$CI_PROJECT_NAMESPACE/$CI_PROJECT_NAME/$CI_PROJECT_NAME.tar.gz
- ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" ../$CI_PROJECT_NAME.tar.gz https://$S3_HOST/git-cache/$CI_PROJECT_NAMESPACE/$CI_PROJECT_NAME/$CI_PROJECT_NAME.tar.gz
# Sanity checks of MR settings and commit logs
@@ -238,3 +251,12 @@ sanity:
when: on_failure
reports:
junit: check-*.xml
# Jobs that need to pass before spending hardware resources on further testing
.required-for-hardware-jobs:
needs:
- job: clang-format
optional: true
- job: rustfmt
optional: true

View File

@@ -28,9 +28,11 @@ console_patterns:
session_end:
regex: >-
{{ session_end_regex }}
{% if session_reboot_regex %}
session_reboot:
regex: >-
{{ session_reboot_regex }}
{% endif %}
job_success:
regex: >-
{{ job_success_regex }}

View File

@@ -1,4 +1,5 @@
#!/bin/bash
# shellcheck disable=SC2086 # we want word splitting
if [ -z "$BM_POE_INTERFACE" ]; then
echo "Must supply the PoE Interface to power down"
@@ -11,7 +12,6 @@ if [ -z "$BM_POE_ADDRESS" ]; then
fi
SNMP_KEY="1.3.6.1.4.1.9.9.402.1.2.1.1.1.$BM_POE_INTERFACE"
SNMP_ON="i 1"
SNMP_OFF="i 4"
snmpset -v2c -r 3 -t 30 -cmesaci $BM_POE_ADDRESS $SNMP_KEY $SNMP_OFF
snmpset -v2c -r 3 -t 30 -cmesaci "$BM_POE_ADDRESS" "$SNMP_KEY" $SNMP_OFF

View File

@@ -1,4 +1,5 @@
#!/bin/bash
# shellcheck disable=SC2086 # we want word splitting
if [ -z "$BM_POE_INTERFACE" ]; then
echo "Must supply the PoE Interface to power up"
@@ -16,6 +17,6 @@ SNMP_KEY="1.3.6.1.4.1.9.9.402.1.2.1.1.1.$BM_POE_INTERFACE"
SNMP_ON="i 1"
SNMP_OFF="i 4"
snmpset -v2c -r 3 -t 10 -cmesaci $BM_POE_ADDRESS $SNMP_KEY $SNMP_OFF
snmpset -v2c -r 3 -t 10 -cmesaci "$BM_POE_ADDRESS" "$SNMP_KEY" $SNMP_OFF
sleep 3s
snmpset -v2c -r 3 -t 10 -cmesaci $BM_POE_ADDRESS $SNMP_KEY $SNMP_ON
snmpset -v2c -r 3 -t 10 -cmesaci "$BM_POE_ADDRESS" "$SNMP_KEY" $SNMP_ON

View File

@@ -1,4 +1,7 @@
#!/bin/bash
# shellcheck disable=SC1091 # The relative paths in this file only become valid at runtime.
# shellcheck disable=SC2034
# shellcheck disable=SC2086 # we want word splitting
# Boot script for Chrome OS devices attached to a servo debug connector, using
# NFS and TFTP to boot.

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@@ -7,4 +7,4 @@ if [ -z "$relay" ]; then
exit 1
fi
$CI_PROJECT_DIR/install/bare-metal/eth008-power-relay.py $ETH_HOST $ETH_PORT off $relay
"$CI_PROJECT_DIR"/install/bare-metal/eth008-power-relay.py "$ETH_HOST" "$ETH_PORT" off "$relay"

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@@ -7,6 +7,6 @@ if [ -z "$relay" ]; then
exit 1
fi
$CI_PROJECT_DIR/install/bare-metal/eth008-power-relay.py $ETH_HOST $ETH_PORT off $relay
"$CI_PROJECT_DIR"/install/bare-metal/eth008-power-relay.py "$ETH_HOST" "$ETH_PORT" off "$relay"
sleep 5
$CI_PROJECT_DIR/install/bare-metal/eth008-power-relay.py $ETH_HOST $ETH_PORT on $relay
"$CI_PROJECT_DIR"/install/bare-metal/eth008-power-relay.py "$ETH_HOST" "$ETH_PORT" on "$relay"

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@@ -5,26 +5,27 @@ set -e
STRINGS=$(mktemp)
ERRORS=$(mktemp)
trap "rm $STRINGS; rm $ERRORS;" EXIT
trap 'rm $STRINGS; rm $ERRORS;' EXIT
FILE=$1
shift 1
while getopts "f:e:" opt; do
case $opt in
f) echo "$OPTARG" >> $STRINGS;;
e) echo "$OPTARG" >> $STRINGS ; echo "$OPTARG" >> $ERRORS;;
f) echo "$OPTARG" >> "$STRINGS";;
e) echo "$OPTARG" >> "$STRINGS" ; echo "$OPTARG" >> "$ERRORS";;
*) exit
esac
done
shift $((OPTIND -1))
echo "Waiting for $FILE to say one of following strings"
cat $STRINGS
cat "$STRINGS"
while ! egrep -wf $STRINGS $FILE; do
while ! grep -E -wf "$STRINGS" "$FILE"; do
sleep 2
done
if egrep -wf $ERRORS $FILE; then
if grep -E -wf "$ERRORS" "$FILE"; then
exit 1
fi

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@@ -1,11 +1,14 @@
#!/bin/bash
# shellcheck disable=SC1091 # The relative paths in this file only become valid at runtime.
# shellcheck disable=SC2034
# shellcheck disable=SC2086 # we want word splitting
. "$SCRIPTS_DIR"/setup-test-env.sh
BM=$CI_PROJECT_DIR/install/bare-metal
CI_COMMON=$CI_PROJECT_DIR/install/common
if [ -z "$BM_SERIAL" -a -z "$BM_SERIAL_SCRIPT" ]; then
if [ -z "$BM_SERIAL" ] && [ -z "$BM_SERIAL_SCRIPT" ]; then
echo "Must set BM_SERIAL OR BM_SERIAL_SCRIPT in your gitlab-runner config.toml [[runners]] environment"
echo "BM_SERIAL:"
echo " This is the serial device to talk to for waiting for fastboot to be ready and logging from the kernel."
@@ -84,10 +87,10 @@ else
fi
pushd rootfs
find -H | \
egrep -v "external/(openglcts|vulkancts|amber|glslang|spirv-tools)" |
egrep -v "traces-db|apitrace|renderdoc" | \
egrep -v $EXCLUDE_FILTER | \
find -H . | \
grep -E -v "external/(openglcts|vulkancts|amber|glslang|spirv-tools)" |
grep -E -v "traces-db|apitrace|renderdoc" | \
grep -E -v $EXCLUDE_FILTER | \
cpio -H newc -o | \
xz --check=crc32 -T4 - > $CI_PROJECT_DIR/rootfs.cpio.gz
popd

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@@ -7,4 +7,4 @@ if [ -z "$relay" ]; then
exit 1
fi
$CI_PROJECT_DIR/install/bare-metal/google-power-relay.py off $relay
"$CI_PROJECT_DIR"/install/bare-metal/google-power-relay.py off "$relay"

View File

@@ -7,6 +7,6 @@ if [ -z "$relay" ]; then
exit 1
fi
$CI_PROJECT_DIR/install/bare-metal/google-power-relay.py off $relay
"$CI_PROJECT_DIR"/install/bare-metal/google-power-relay.py off "$relay"
sleep 5
$CI_PROJECT_DIR/install/bare-metal/google-power-relay.py on $relay
"$CI_PROJECT_DIR"/install/bare-metal/google-power-relay.py on "$relay"

View File

@@ -10,8 +10,7 @@ if [ -z "$BM_POE_ADDRESS" ]; then
exit 1
fi
SNMP_KEY="SNMPv2-SMI::mib-2.105.1.1.1.3.1.`expr 48 + $BM_POE_INTERFACE`"
SNMP_ON="i 1"
SNMP_KEY="SNMPv2-SMI::mib-2.105.1.1.1.3.1.$((48 + BM_POE_INTERFACE))"
SNMP_OFF="i 2"
flock /var/run/poe.lock -c "snmpset -v2c -r 3 -t 30 -cmesaci $BM_POE_ADDRESS $SNMP_KEY $SNMP_OFF"

View File

@@ -10,7 +10,7 @@ if [ -z "$BM_POE_ADDRESS" ]; then
exit 1
fi
SNMP_KEY="SNMPv2-SMI::mib-2.105.1.1.1.3.1.`expr 48 + $BM_POE_INTERFACE`"
SNMP_KEY="SNMPv2-SMI::mib-2.105.1.1.1.3.1.$((48 + BM_POE_INTERFACE))"
SNMP_ON="i 1"
SNMP_OFF="i 2"

View File

@@ -1,4 +1,8 @@
#!/bin/bash
# shellcheck disable=SC1091
# shellcheck disable=SC2034
# shellcheck disable=SC2059
# shellcheck disable=SC2086 # we want word splitting
. "$SCRIPTS_DIR"/setup-test-env.sh

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@@ -1,4 +1,5 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
rootfs_dst=$1
@@ -23,10 +24,8 @@ cp "$SCRIPTS_DIR/setup-test-env.sh" "$rootfs_dst/"
set +x
# Pass through relevant env vars from the gitlab job to the baremetal init script
"$CI_COMMON"/generate-env.sh > $rootfs_dst/set-job-env-vars.sh
chmod +x $rootfs_dst/set-job-env-vars.sh
echo "Variables passed through:"
cat $rootfs_dst/set-job-env-vars.sh
"$CI_COMMON"/generate-env.sh | tee $rootfs_dst/set-job-env-vars.sh
set -x

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@@ -0,0 +1,7 @@
#!/bin/sh
# shellcheck disable=SC1091
set -e
_COMPILER=clang++-15
. compiler-wrapper.sh

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@@ -1,3 +1,7 @@
#!/bin/sh
# shellcheck disable=SC1091
set -e
_COMPILER=clang++
. compiler-wrapper.sh

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@@ -0,0 +1,7 @@
#!/bin/sh
# shellcheck disable=SC1091
set -e
_COMPILER=clang-15
. compiler-wrapper.sh

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@@ -1,3 +1,7 @@
#!/bin/sh
# shellcheck disable=SC1091
set -e
_COMPILER=clang
. compiler-wrapper.sh

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@@ -1,3 +1,7 @@
#!/bin/sh
# shellcheck disable=SC1091
set -e
_COMPILER=g++
. compiler-wrapper.sh

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@@ -1,3 +1,7 @@
#!/bin/sh
# shellcheck disable=SC1091
set -e
_COMPILER=gcc
. compiler-wrapper.sh

8
.gitlab-ci/build/compiler-wrapper.sh Executable file → Normal file
View File

@@ -1,13 +1,13 @@
#!/bin/sh -e
# shellcheck disable=SC1091
# shellcheck disable=SC2086 # we want word splitting
if command -V ccache >/dev/null 2>/dev/null; then
CCACHE=ccache
else
CCACHE=
fi
if [ "$(ps -p $(ps -p $PPID -o ppid --no-headers) -o comm --no-headers)" != ninja ]; then
# Not invoked by ninja (e.g. for a meson feature check)
if echo "$@" | grep -E 'meson-private/tmp[^ /]*/testfile.c' >/dev/null; then
# Invoked for meson feature check
exec $CCACHE $_COMPILER "$@"
fi

View File

@@ -31,7 +31,7 @@
section_end ccache_before
fi
after_script:
- if test -x /usr/bin/ccache; then ccache --show-stats | grep "cache hit rate"; fi
- if test -x /usr/bin/ccache; then ccache --show-stats | grep "Hits:"; fi
- !reference [default, after_script]
.build-windows:
@@ -49,17 +49,17 @@
.meson-build:
extends:
- .build-linux
- .use-debian/x86_build
- .use-debian/x86_64_build
stage: build-x86_64
variables:
LLVM_VERSION: 11
LLVM_VERSION: 15
script:
- .gitlab-ci/meson/build.sh
.meson-build_mingw:
extends:
- .build-linux
- .use-debian/x86_build_mingw
- .use-debian/x86_64_build_mingw
- .use-wine
stage: build-x86_64
script:
@@ -80,14 +80,15 @@ debian-testing:
-D dri3=enabled
-D gallium-va=enabled
GALLIUM_DRIVERS: "swrast,virgl,radeonsi,zink,crocus,iris,i915"
VULKAN_DRIVERS: "swrast,amd,intel,intel_hasvk,virtio-experimental"
VULKAN_DRIVERS: "swrast,amd,intel,intel_hasvk,virtio"
BUILDTYPE: "debugoptimized"
EXTRA_OPTION: >
-D spirv-to-dxil=true
-D valgrind=disabled
-D perfetto=true
MINIO_ARTIFACT_NAME: mesa-amd64
LLVM_VERSION: "13"
-D tools=drm-shim
S3_ARTIFACT_NAME: mesa-x86_64-default-${BUILDTYPE}
LLVM_VERSION: 15
script:
- .gitlab-ci/meson/build.sh
- .gitlab-ci/prepare-artifacts.sh
@@ -105,10 +106,12 @@ debian-testing-asan:
-D b_sanitize=address
-D valgrind=disabled
-D tools=dlclose-skip
MINIO_ARTIFACT_NAME: ""
S3_ARTIFACT_NAME: ""
ARTIFACTS_DEBUG_SYMBOLS: 1
debian-testing-msan:
# https://github.com/google/sanitizers/wiki/MemorySanitizerLibcxxHowTo
# msan cannot fully work until it's used together with msan libc
extends:
- debian-clang
variables:
@@ -116,22 +119,21 @@ debian-testing-msan:
EXTRA_OPTION:
-D b_sanitize=memory
-D b_lundef=false
MINIO_ARTIFACT_NAME: ""
S3_ARTIFACT_NAME: ""
ARTIFACTS_DEBUG_SYMBOLS: 1
# Don't run all the tests yet:
# GLSL has some issues in sexpression reading.
# gtest has issues in its test initialization.
MESON_TEST_ARGS: "--suite glcpp --suite gallium --suite format"
# Freedreno dropped because freedreno tools fail at msan.
GALLIUM_DRIVERS: "iris,nouveau,kmsro,r300,r600,swrast,svga,v3d,vc4,virgl,etnaviv,panfrost,lima,zink,radeonsi,tegra,d3d12,crocus"
VULKAN_DRIVERS: intel,amd,broadcom,virtio-experimental
MESON_TEST_ARGS: "--suite glcpp --suite format"
GALLIUM_DRIVERS: "freedreno,iris,nouveau,kmsro,r300,r600,swrast,svga,v3d,vc4,virgl,etnaviv,panfrost,lima,zink,radeonsi,tegra,d3d12,crocus"
VULKAN_DRIVERS: intel,amd,broadcom,virtio
.debian-cl-testing:
extends:
- .meson-build
- .ci-deqp-artifacts
variables:
LLVM_VERSION: "13"
LLVM_VERSION: 15
UNWIND: "enabled"
DRI_LOADERS: >
-D glx=disabled
@@ -165,6 +167,7 @@ debian-rusticl-testing:
debian-build-testing:
extends: .meson-build
variables:
BUILDTYPE: debug
UNWIND: "enabled"
DRI_LOADERS: >
-D glx=dri
@@ -188,7 +191,7 @@ debian-build-testing:
-D osmesa=true
-D tools=drm-shim,etnaviv,freedreno,glsl,intel,intel-ui,nir,nouveau,lima,panfrost,asahi
-D b_lto=true
LLVM_VERSION: 13
LLVM_VERSION: 15
script: |
section_start lava-pytest "lava-pytest"
.gitlab-ci/lava/lava-pytest.sh
@@ -205,8 +208,10 @@ debian-build-testing:
debian-release:
extends: .meson-build
variables:
LLVM_VERSION: "13"
LLVM_VERSION: 15
UNWIND: "enabled"
C_ARGS: >
-Wno-error=stringop-overread
DRI_LOADERS: >
-D glx=dri
-D gbm=enabled
@@ -232,7 +237,7 @@ debian-release:
-D intel-clc=enabled
-D imagination-srv=true
BUILDTYPE: "release"
MINIO_ARTIFACT_NAME: "mesa-amd64-${BUILDTYPE}"
S3_ARTIFACT_NAME: "mesa-x86_64-default-${BUILDTYPE}"
script:
- .gitlab-ci/meson/build.sh
- 'if [ -n "$MESA_CI_PERFORMANCE_ENABLED" ]; then .gitlab-ci/prepare-artifacts.sh; fi'
@@ -240,7 +245,7 @@ debian-release:
alpine-build-testing:
extends:
- .meson-build
- .use-alpine/x86_build
- .use-alpine/x86_64_build
stage: build-x86_64
variables:
BUILDTYPE: "release"
@@ -278,15 +283,16 @@ alpine-build-testing:
fedora-release:
extends:
- .meson-build
- .use-fedora/x86_build
- .use-fedora/x86_64_build
variables:
BUILDTYPE: "release"
C_LINK_ARGS: >
-Wno-error=array-bounds
-Wno-error=stringop-overflow
-Wno-error=stringop-overread
CPP_ARGS: >
-Wno-error=dangling-reference
-Wno-error=overloaded-virtual
CPP_LINK_ARGS: >
-Wno-error=array-bounds
-Wno-error=stringop-overflow
-Wno-error=stringop-overread
DRI_LOADERS: >
@@ -313,7 +319,7 @@ fedora-release:
-D gallium-xa=enabled
-D gallium-nine=false
-D gallium-opencl=icd
-D gallium-rusticl=false
-D gallium-rusticl=true
-D gles1=disabled
-D gles2=enabled
-D llvm=enabled
@@ -331,6 +337,7 @@ debian-android:
- .use-debian/android_build
- .ci-deqp-artifacts
variables:
BUILDTYPE: debug
UNWIND: "disabled"
C_ARGS: >
-Wno-error=asm-operand-widths
@@ -367,9 +374,9 @@ debian-android:
LLVM_VERSION: ""
PKG_CONFIG_LIBDIR: "/disable/non/android/system/pc/files"
ARTIFACTS_DEBUG_SYMBOLS: 1
MINIO_ARTIFACT_NAME: mesa-x86_64-android
S3_ARTIFACT_NAME: mesa-x86_64-android-${BUILDTYPE}
script:
- CROSS=aarch64-linux-android GALLIUM_DRIVERS=etnaviv,freedreno,lima,panfrost,vc4,v3d VULKAN_DRIVERS=freedreno,broadcom,virtio-experimental .gitlab-ci/meson/build.sh
- CROSS=aarch64-linux-android GALLIUM_DRIVERS=etnaviv,freedreno,lima,panfrost,vc4,v3d VULKAN_DRIVERS=freedreno,broadcom,virtio .gitlab-ci/meson/build.sh
# x86_64 build:
# Can't do Intel because gen_decoder.c currently requires libexpat, which
# is not a dependency that AOSP wants to accept. Can't do Radeon Gallium
@@ -401,9 +408,9 @@ debian-android:
.meson-arm:
extends:
- .meson-cross
- .use-debian/arm_build
- .use-debian/arm64_build
needs:
- debian/arm_build
- debian/arm64_build
variables:
VULKAN_DRIVERS: freedreno,broadcom
GALLIUM_DRIVERS: "etnaviv,freedreno,kmsro,lima,nouveau,panfrost,swrast,tegra,v3d,vc4,zink"
@@ -411,7 +418,7 @@ debian-android:
tags:
- aarch64
debian-armhf:
debian-arm32:
extends:
- .meson-arm
- .ci-deqp-artifacts
@@ -420,7 +427,7 @@ debian-armhf:
EXTRA_OPTION: >
-D llvm=disabled
-D valgrind=disabled
MINIO_ARTIFACT_NAME: mesa-armhf
S3_ARTIFACT_NAME: mesa-arm32-default-${BUILDTYPE}
# The strip command segfaults, failing to strip the binary and leaving
# tempfiles in our artifacts.
ARTIFACTS_DEBUG_SYMBOLS: 1
@@ -428,18 +435,34 @@ debian-armhf:
- .gitlab-ci/meson/build.sh
- .gitlab-ci/prepare-artifacts.sh
debian-arm32-asan:
extends:
- debian-arm32
variables:
EXTRA_OPTION: >
-D llvm=disabled
-D b_sanitize=address
-D valgrind=disabled
-D tools=dlclose-skip
ARTIFACTS_DEBUG_SYMBOLS: 1
S3_ARTIFACT_NAME: mesa-arm32-asan-${BUILDTYPE}
MESON_TEST_ARGS: "--no-suite mesa:compiler --no-suite mesa:util"
debian-arm64:
extends:
- .meson-arm
- .ci-deqp-artifacts
variables:
C_ARGS: >
-Wno-error=array-bounds
-Wno-error=stringop-truncation
VULKAN_DRIVERS: "freedreno,broadcom,panfrost,imagination-experimental"
EXTRA_OPTION: >
-D llvm=disabled
-D valgrind=disabled
-D imagination-srv=true
-D perfetto=true
MINIO_ARTIFACT_NAME: mesa-arm64
S3_ARTIFACT_NAME: mesa-arm64-default-${BUILDTYPE}
script:
- .gitlab-ci/meson/build.sh
- .gitlab-ci/prepare-artifacts.sh
@@ -454,7 +477,7 @@ debian-arm64-asan:
-D valgrind=disabled
-D tools=dlclose-skip
ARTIFACTS_DEBUG_SYMBOLS: 1
MINIO_ARTIFACT_NAME: mesa-arm64-asan
S3_ARTIFACT_NAME: mesa-arm64-asan-${BUILDTYPE}
MESON_TEST_ARGS: "--no-suite mesa:compiler"
debian-arm64-build-test:
@@ -473,9 +496,11 @@ debian-arm64-release:
- debian-arm64
variables:
BUILDTYPE: release
MINIO_ARTIFACT_NAME: mesa-arm64-${BUILDTYPE}
S3_ARTIFACT_NAME: mesa-arm64-default-${BUILDTYPE}
C_ARGS: >
-Wno-error=array-bounds
-Wno-error=stringop-truncation
-Wno-error=stringop-overread
script:
- .gitlab-ci/meson/build.sh
- 'if [ -n "$MESA_CI_PERFORMANCE_ENABLED" ]; then .gitlab-ci/prepare-artifacts.sh; fi'
@@ -483,7 +508,8 @@ debian-arm64-release:
debian-clang:
extends: .meson-build
variables:
LLVM_VERSION: "13"
BUILDTYPE: debug
LLVM_VERSION: 15
UNWIND: "enabled"
GALLIUM_DUMP_CPU: "true"
C_ARGS: >
@@ -516,11 +542,12 @@ debian-clang:
-D gles1=enabled
-D gles2=enabled
-D llvm=enabled
-D microsoft-clc=enabled
-D microsoft-clc=disabled
-D shared-llvm=enabled
-D opencl-spirv=true
-D shared-glapi=enabled
GALLIUM_DRIVERS: "iris,nouveau,kmsro,r300,r600,freedreno,swrast,svga,v3d,vc4,virgl,etnaviv,panfrost,lima,zink,radeonsi,tegra,d3d12,crocus,i915,asahi"
VULKAN_DRIVERS: intel,amd,freedreno,broadcom,virtio-experimental,swrast,panfrost,imagination-experimental,microsoft-experimental
VULKAN_DRIVERS: intel,amd,freedreno,broadcom,virtio,swrast,panfrost,imagination-experimental,microsoft-experimental
EXTRA_OPTION:
-D spirv-to-dxil=true
-D osmesa=true
@@ -530,8 +557,8 @@ debian-clang:
-D build-aco-tests=true
-D intel-clc=enabled
-D imagination-srv=true
CC: clang
CXX: clang++
CC: clang-${LLVM_VERSION}
CXX: clang++-${LLVM_VERSION}
debian-clang-release:
extends: debian-clang
@@ -540,6 +567,22 @@ debian-clang-release:
DRI_LOADERS: >
-D glx=xlib
-D platforms=x11,wayland
GALLIUM_ST: >
-D dri3=enabled
-D gallium-extra-hud=true
-D gallium-vdpau=enabled
-D gallium-omx=bellagio
-D gallium-va=enabled
-D gallium-xa=enabled
-D gallium-nine=true
-D gallium-opencl=icd
-D gles1=disabled
-D gles2=disabled
-D llvm=enabled
-D microsoft-clc=disabled
-D shared-llvm=enabled
-D opencl-spirv=true
-D shared-glapi=disabled
windows-vs2019:
extends:
@@ -557,7 +600,7 @@ windows-vs2019:
.debian-cl:
extends: .meson-build
variables:
LLVM_VERSION: "13"
LLVM_VERSION: 15
UNWIND: "enabled"
DRI_LOADERS: >
-D glx=disabled
@@ -584,6 +627,7 @@ windows-vs2019:
debian-rusticl:
extends: .debian-cl
variables:
BUILDTYPE: debug
GALLIUM_DRIVERS: "iris,swrast"
GALLIUM_ST: >
-D dri3=disabled
@@ -594,11 +638,13 @@ debian-rusticl:
-D gallium-nine=false
-D gallium-opencl=disabled
-D gallium-rusticl=true
RUSTC: clippy-driver
debian-vulkan:
extends: .meson-build
variables:
LLVM_VERSION: "13"
BUILDTYPE: debug
LLVM_VERSION: 15
UNWIND: "disabled"
DRI_LOADERS: >
-D glx=disabled
@@ -619,22 +665,23 @@ debian-vulkan:
-D c_args=-fno-sanitize-recover=all
-D cpp_args=-fno-sanitize-recover=all
UBSAN_OPTIONS: "print_stacktrace=1"
VULKAN_DRIVERS: intel,amd,freedreno,broadcom,virtio-experimental,imagination-experimental,microsoft-experimental
VULKAN_DRIVERS: intel,amd,freedreno,broadcom,virtio,imagination-experimental,microsoft-experimental
EXTRA_OPTION: >
-D vulkan-layers=device-select,overlay
-D build-aco-tests=true
-D intel-clc=disabled
-D imagination-srv=true
debian-i386:
debian-x86_32:
extends:
- .meson-cross
- .use-debian/i386_build
- .use-debian/x86_32_build
variables:
BUILDTYPE: debug
CROSS: i386
VULKAN_DRIVERS: intel,amd,swrast,virtio-experimental
VULKAN_DRIVERS: intel,amd,swrast,virtio
GALLIUM_DRIVERS: "iris,nouveau,r300,r600,radeonsi,swrast,virgl,zink,crocus"
LLVM_VERSION: 13
LLVM_VERSION: 15
EXTRA_OPTION: >
-D vulkan-layers=device-select,overlay
@@ -648,7 +695,7 @@ debian-s390x:
variables:
CROSS: s390x
GALLIUM_DRIVERS: "swrast,zink"
LLVM_VERSION: 13
LLVM_VERSION: 15
VULKAN_DRIVERS: "swrast"
debian-ppc64el:
@@ -657,6 +704,7 @@ debian-ppc64el:
- .use-debian/ppc64el_build
- .ppc64el-rules
variables:
BUILDTYPE: debug
CROSS: ppc64el
GALLIUM_DRIVERS: "nouveau,radeonsi,swrast,virgl,zink"
VULKAN_DRIVERS: "amd,swrast"
@@ -684,6 +732,7 @@ debian-ppc64el:
-D opencl-spirv=true
-D microsoft-clc=enabled
-D static-libclc=all
-D opencl-external-clang-headers=disabled
-D llvm=enabled
-D gallium-va=enabled
-D video-codecs=h264dec,h264enc,h265dec,h265enc,vc1dec

View File

@@ -1,7 +1,10 @@
#!/bin/sh
#!/usr/bin/env bash
# shellcheck disable=SC2035
# shellcheck disable=SC2061
# shellcheck disable=SC2086 # we want word splitting
while true; do
devcds=`find /sys/devices/virtual/devcoredump/ -name data 2>/dev/null`
devcds=$(find /sys/devices/virtual/devcoredump/ -name data 2>/dev/null)
for i in $devcds; do
echo "Found a devcoredump at $i."
if cp $i /results/first.devcore; then
@@ -10,5 +13,23 @@ while true; do
exit 0
fi
done
i915_error_states=$(find /sys/devices/ -path */drm/card*/error)
for i in $i915_error_states; do
tmpfile=$(mktemp)
cp "$i" "$tmpfile"
filesize=$(stat --printf="%s" "$tmpfile")
# Does the file contain "No error state collected" ?
if [ "$filesize" = 25 ]; then
rm "$tmpfile"
else
echo "Found an i915 error state at $i size=$filesize."
if cp "$tmpfile" /results/first.i915_error_state; then
rm "$tmpfile"
echo 1 > "$i"
echo "Saved to the job artifacts at /first.i915_error_state"
exit 0
fi
fi
done
sleep 10
done

View File

@@ -85,9 +85,8 @@ for var in \
MESA_LOADER_DRIVER_OVERRIDE \
MESA_TEMPLATES_COMMIT \
MESA_VK_IGNORE_CONFORMANCE_WARNING \
MESA_SPIRV_LOG_LEVEL \
MINIO_HOST \
MINIO_RESULTS_UPLOAD \
S3_HOST \
S3_RESULTS_UPLOAD \
NIR_DEBUG \
PAN_I_WANT_A_BROKEN_VULKAN_DRIVER \
PAN_MESA_DEBUG \
@@ -111,13 +110,16 @@ for var in \
SKQP_ASSETS_DIR \
SKQP_BACKENDS \
TU_DEBUG \
USE_ANGLE \
VIRGL_HOST_API \
WAFFLE_PLATFORM \
VK_CPU \
VK_DRIVER \
VK_ICD_FILENAMES \
VKD3D_PROTON_RESULTS \
VKD3D_CONFIG \
ZINK_DESCRIPTORS \
ZINK_DEBUG \
LVP_POISON_MEMORY \
; do
if [ -n "${!var+x}" ]; then

View File

@@ -13,6 +13,8 @@ mount -t debugfs none /sys/kernel/debug
mount -t devtmpfs none /dev || echo possibly already mounted
mkdir -p /dev/pts
mount -t devpts devpts /dev/pts
mkdir /dev/shm
mount -t tmpfs -o noexec,nodev,nosuid tmpfs /dev/shm
mount -t tmpfs tmpfs /tmp
echo "nameserver 8.8.8.8" > /etc/resolv.conf
@@ -20,4 +22,4 @@ echo "nameserver 8.8.8.8" > /etc/resolv.conf
# Set the time so we can validate certificates before we fetch anything;
# however as not all DUTs have network, make this non-fatal.
for i in 1 2 3; do sntp -sS pool.ntp.org && break || sleep 2; done || true
for _ in 1 2 3; do sntp -sS pool.ntp.org && break || sleep 2; done || true

View File

@@ -1,4 +1,11 @@
#!/bin/bash
# shellcheck disable=SC1090
# shellcheck disable=SC1091
# shellcheck disable=SC2086 # we want word splitting
# shellcheck disable=SC2155
# Second-stage init, used to set up devices and our job environment before
# running tests.
# Make sure to kill itself and all the children process from this script on
# exiting, since any console output may interfere with LAVA signals handling,
@@ -33,10 +40,7 @@ trap cleanup INT TERM EXIT
BACKGROUND_PIDS=
# Second-stage init, used to set up devices and our job environment before
# running tests.
for path in '/set-job-env-vars.sh' './set-job-env-vars.sh'; do
for path in '/dut-env-vars.sh' '/set-job-env-vars.sh' './set-job-env-vars.sh'; do
[ -f "$path" ] && source "$path"
done
. "$SCRIPTS_DIR"/setup-test-env.sh
@@ -50,7 +54,7 @@ set -ex
# Set up ZRAM
HWCI_ZRAM_SIZE=2G
if zramctl --find --size $HWCI_ZRAM_SIZE -a zstd; then
if /sbin/zramctl --find --size $HWCI_ZRAM_SIZE -a zstd; then
mkswap /dev/zram0
swapon /dev/zram0
echo "zram: $HWCI_ZRAM_SIZE activated"
@@ -67,12 +71,16 @@ fi
#
if [ "$HWCI_KVM" = "true" ]; then
unset KVM_KERNEL_MODULE
grep -qs '\bvmx\b' /proc/cpuinfo && KVM_KERNEL_MODULE=kvm_intel || {
grep -qs '\bsvm\b' /proc/cpuinfo && KVM_KERNEL_MODULE=kvm_amd
{
grep -qs '\bvmx\b' /proc/cpuinfo && KVM_KERNEL_MODULE=kvm_intel
} || {
grep -qs '\bsvm\b' /proc/cpuinfo && KVM_KERNEL_MODULE=kvm_amd
}
[ -z "${KVM_KERNEL_MODULE}" ] && \
echo "WARNING: Failed to detect CPU virtualization extensions" || \
{
[ -z "${KVM_KERNEL_MODULE}" ] && \
echo "WARNING: Failed to detect CPU virtualization extensions"
} || \
modprobe ${KVM_KERNEL_MODULE}
mkdir -p /lava-files
@@ -87,6 +95,11 @@ ln -sf $CI_PROJECT_DIR/install /install
export LD_LIBRARY_PATH=/install/lib
export LIBGL_DRIVERS_PATH=/install/lib/dri
# https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22495#note_1876691
# The navi21 boards seem to have trouble with ld.so.cache, so try explicitly
# telling it to look in /usr/local/lib.
export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/local/lib
# Store Mesa's disk cache under /tmp, rather than sending it out over NFS.
export XDG_CACHE_HOME=/tmp
@@ -98,20 +111,20 @@ if [ "$HWCI_FREQ_MAX" = "true" ]; then
head -0 /dev/dri/renderD128
# Disable GPU frequency scaling
DEVFREQ_GOVERNOR=`find /sys/devices -name governor | grep gpu || true`
DEVFREQ_GOVERNOR=$(find /sys/devices -name governor | grep gpu || true)
test -z "$DEVFREQ_GOVERNOR" || echo performance > $DEVFREQ_GOVERNOR || true
# Disable CPU frequency scaling
echo performance | tee -a /sys/devices/system/cpu/cpufreq/policy*/scaling_governor || true
# Disable GPU runtime power management
GPU_AUTOSUSPEND=`find /sys/devices -name autosuspend_delay_ms | grep gpu | head -1`
GPU_AUTOSUSPEND=$(find /sys/devices -name autosuspend_delay_ms | grep gpu | head -1)
test -z "$GPU_AUTOSUSPEND" || echo -1 > $GPU_AUTOSUSPEND || true
# Lock Intel GPU frequency to 70% of the maximum allowed by hardware
# and enable throttling detection & reporting.
# Additionally, set the upper limit for CPU scaling frequency to 65% of the
# maximum permitted, as an additional measure to mitigate thermal throttling.
./intel-gpu-freq.sh -s 70% --cpu-set-max 65% -g all -d
/intel-gpu-freq.sh -s 70% --cpu-set-max 65% -g all -d
fi
# Increase freedreno hangcheck timer because it's right at the edge of the
@@ -122,8 +135,10 @@ fi
# Start a little daemon to capture the first devcoredump we encounter. (They
# expire after 5 minutes, so we poll for them).
/capture-devcoredump.sh &
BACKGROUND_PIDS="$! $BACKGROUND_PIDS"
if [ -x /capture-devcoredump.sh ]; then
/capture-devcoredump.sh &
BACKGROUND_PIDS="$! $BACKGROUND_PIDS"
fi
# If we want Xorg to be running for the test, then we start it up before the
# HWCI_TEST_SCRIPT because we need to use xinit to start X (otherwise
@@ -132,12 +147,12 @@ BACKGROUND_PIDS="$! $BACKGROUND_PIDS"
if [ -n "$HWCI_START_XORG" ]; then
echo "touch /xorg-started; sleep 100000" > /xorg-script
env \
VK_ICD_FILENAMES=/install/share/vulkan/icd.d/${VK_DRIVER}_icd.`uname -m`.json \
VK_ICD_FILENAMES="/install/share/vulkan/icd.d/${VK_DRIVER}_icd.$(uname -m).json" \
xinit /bin/sh /xorg-script -- /usr/bin/Xorg -noreset -s 0 -dpms -logfile /Xorg.0.log &
BACKGROUND_PIDS="$! $BACKGROUND_PIDS"
# Wait for xorg to be ready for connections.
for i in 1 2 3 4 5; do
for _ in 1 2 3 4 5; do
if [ -e /xorg-started ]; then
break
fi
@@ -182,9 +197,9 @@ mv -f ${CI_PROJECT_DIR}/results ./ 2>/dev/null || true
cleanup
# upload artifacts
if [ -n "$MINIO_RESULTS_UPLOAD" ]; then
if [ -n "$S3_RESULTS_UPLOAD" ]; then
tar --zstd -cf results.tar.zst results/;
ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" results.tar.zst https://"$MINIO_RESULTS_UPLOAD"/results.tar.zst;
ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" results.tar.zst https://"$S3_RESULTS_UPLOAD"/results.tar.zst;
fi
# We still need to echo the hwci: mesa message, as some scripts rely on it, such

View File

@@ -1,4 +1,14 @@
#!/bin/sh
#!/usr/bin/env bash
# shellcheck disable=SC2013
# shellcheck disable=SC2015
# shellcheck disable=SC2034
# shellcheck disable=SC2046
# shellcheck disable=SC2059
# shellcheck disable=SC2086 # we want word splitting
# shellcheck disable=SC2154
# shellcheck disable=SC2155
# shellcheck disable=SC2162
# shellcheck disable=SC2229
#
# This is an utility script to manage Intel GPU frequencies.
# It can be used for debugging performance problems or trying to obtain a stable
@@ -193,7 +203,7 @@ compute_freq_set() {
val=${FREQ_RPn}
;;
*%)
val=$((${1%?} * ${FREQ_RP0} / 100))
val=$((${1%?} * FREQ_RP0 / 100))
# Adjust freq to comply with 50 MHz increments
val=$((val / 50 * 50))
;;
@@ -242,12 +252,12 @@ set_freq_max() {
[ -z "${DRY_RUN}" ] || return 0
printf "%s" ${SET_MAX_FREQ} | tee $(print_freq_sysfs_path max) \
$(print_freq_sysfs_path boost) > /dev/null
[ $? -eq 0 ] || {
if ! printf "%s" ${SET_MAX_FREQ} | tee $(print_freq_sysfs_path max) \
$(print_freq_sysfs_path boost) > /dev/null;
then
log ERROR "Failed to set GPU max frequency"
return 1
}
fi
}
#
@@ -272,11 +282,11 @@ set_freq_min() {
[ -z "${DRY_RUN}" ] || return 0
printf "%s" ${SET_MIN_FREQ} > $(print_freq_sysfs_path min)
[ $? -eq 0 ] || {
if ! printf "%s" ${SET_MIN_FREQ} > $(print_freq_sysfs_path min);
then
log ERROR "Failed to set GPU min frequency"
return 1
}
fi
}
#
@@ -495,7 +505,7 @@ compute_cpu_freq_set() {
val=${CPU_FREQ_cpuinfo_min}
;;
*%)
val=$((${1%?} * ${CPU_FREQ_cpuinfo_max} / 100))
val=$((${1%?} * CPU_FREQ_cpuinfo_max / 100))
;;
*[!0-9]*)
log ERROR "Cannot set CPU freq to invalid value: %s" "$1"
@@ -538,11 +548,11 @@ set_cpu_freq_max() {
local pstate_info=$(printf "${CPU_PSTATE_SYSFS_PATTERN}" max_perf_pct)
[ -e "${pstate_info}" ] && {
log INFO "Setting intel_pstate max perf to %s" "${target_freq}%"
printf "%s" "${target_freq}" > "${pstate_info}"
[ $? -eq 0 ] || {
if ! printf "%s" "${target_freq}" > "${pstate_info}";
then
log ERROR "Failed to set intel_pstate max perf"
res=1
}
fi
}
local cpu_index
@@ -555,11 +565,11 @@ set_cpu_freq_max() {
log INFO "Setting CPU%s max scaling freq to %s Hz" ${cpu_index} "${target_freq}"
[ -n "${DRY_RUN}" ] && continue
printf "%s" ${target_freq} > $(print_cpu_freq_sysfs_path scaling_max ${cpu_index})
[ $? -eq 0 ] || {
if ! printf "%s" ${target_freq} > $(print_cpu_freq_sysfs_path scaling_max ${cpu_index});
then
res=1
log ERROR "Failed to set CPU%s max scaling frequency" ${cpu_index}
}
fi
done
return ${res}

View File

@@ -13,7 +13,7 @@ fi
xinit /bin/sh "${_XORG_SCRIPT}" -- /usr/bin/Xorg vt45 -noreset -s 0 -dpms -logfile /Xorg.0.log &
# Wait for xorg to be ready for connections.
for i in 1 2 3 4 5; do
for _ in 1 2 3 4 5; do
if [ -e "${_FLAG_FILE}" ]; then
break
fi

View File

@@ -1,161 +0,0 @@
From 6d99990e93869e361035b7c06c05183041dec8b4 Mon Sep 17 00:00:00 2001
From: Ricardo Garcia <rgarcia@igalia.com>
Date: Mon, 20 Feb 2023 13:57:53 +0100
Subject: [PATCH] Fix build for the surfaceless and null-WS target platforms
Both platforms should not be considered for building Vulkan Video, which
is only available in the normal Linux and Win32 targets, and their
createLibrary platform methods do not take a library type argument.
No test results should be affected by these changes.
Components: Framework
VK-GL-CTS issue: 4295
Change-Id: I4de5b42685899099a9cfcf7da64fe299fef61ffc
---
external/vulkancts/framework/vulkan/vkPlatform.hpp | 2 +-
.../vulkancts/modules/vulkan/api/vktApiVersionCheck.cpp | 2 +-
external/vulkancts/modules/vulkan/video/CMakeLists.txt | 2 +-
.../modules/vulkan/video/vktVideoSessionNvUtils.cpp | 2 +-
external/vulkancts/modules/vulkan/vktTestPackage.cpp | 2 +-
external/vulkancts/vkscpc/vkscpc.cpp | 2 +-
external/vulkancts/vkscserver/vksServices.cpp | 2 +-
framework/delibs/debase/deDefs.h | 6 ++++++
framework/platform/CMakeLists.txt | 1 +
targets/nullws/nullws.cmake | 1 +
10 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/external/vulkancts/framework/vulkan/vkPlatform.hpp b/external/vulkancts/framework/vulkan/vkPlatform.hpp
index bec39d326..7574166b9 100644
--- a/external/vulkancts/framework/vulkan/vkPlatform.hpp
+++ b/external/vulkancts/framework/vulkan/vkPlatform.hpp
@@ -399,7 +399,7 @@ public:
Platform (void) {}
~Platform (void) {}
-#if (DE_OS == DE_OS_WIN32) || (DE_OS == DE_OS_UNIX)
+#ifdef DE_PLATFORM_USE_LIBRARY_TYPE
virtual Library* createLibrary (LibraryType libraryType = LIBRARY_TYPE_VULKAN, const char* libraryPath = DE_NULL) const = 0;
#else
virtual Library* createLibrary (const char* libraryPath = DE_NULL) const = 0;
diff --git a/external/vulkancts/modules/vulkan/api/vktApiVersionCheck.cpp b/external/vulkancts/modules/vulkan/api/vktApiVersionCheck.cpp
index 5f6d884f4..af6bf6938 100644
--- a/external/vulkancts/modules/vulkan/api/vktApiVersionCheck.cpp
+++ b/external/vulkancts/modules/vulkan/api/vktApiVersionCheck.cpp
@@ -133,7 +133,7 @@ public:
tcu::TestLog& log = m_context.getTestContext().getLog();
const deUint32 apiVersion = m_context.getUsedApiVersion();
const vk::Platform& platform = m_context.getTestContext().getPlatform().getVulkanPlatform();
-#if (DE_OS == DE_OS_WIN32) || (DE_OS == DE_OS_UNIX)
+#ifdef DE_PLATFORM_USE_LIBRARY_TYPE
de::MovePtr<vk::Library> vkLibrary = de::MovePtr<vk::Library>(platform.createLibrary(vk::Platform::LibraryType::LIBRARY_TYPE_VULKAN, m_context.getTestContext().getCommandLine().getVkLibraryPath()));
#else
de::MovePtr<vk::Library> vkLibrary = de::MovePtr<vk::Library>(platform.createLibrary(m_context.getTestContext().getCommandLine().getVkLibraryPath()));
diff --git a/external/vulkancts/modules/vulkan/video/CMakeLists.txt b/external/vulkancts/modules/vulkan/video/CMakeLists.txt
index 464adb1e2..f9a2044e7 100644
--- a/external/vulkancts/modules/vulkan/video/CMakeLists.txt
+++ b/external/vulkancts/modules/vulkan/video/CMakeLists.txt
@@ -1,5 +1,5 @@
include_directories(..)
-if (DE_OS_IS_WIN32 OR DE_OS_IS_UNIX)
+if ((DE_OS_IS_WIN32 OR DE_OS_IS_UNIX) AND NOT DEQP_USE_SURFACELESS AND NOT DEQP_USE_NULLWS)
include_directories(${FFMPEG_INCLUDE_PATH})
add_compile_definitions(DE_BUILD_VIDEO)
endif()
diff --git a/external/vulkancts/modules/vulkan/video/vktVideoSessionNvUtils.cpp b/external/vulkancts/modules/vulkan/video/vktVideoSessionNvUtils.cpp
index 00491930c..9323278be 100644
--- a/external/vulkancts/modules/vulkan/video/vktVideoSessionNvUtils.cpp
+++ b/external/vulkancts/modules/vulkan/video/vktVideoSessionNvUtils.cpp
@@ -148,7 +148,7 @@ private:
};
NvFunctions::NvFunctions (const vk::Platform& platform)
-#ifdef DE_BUILD_VIDEO
+#ifdef DE_PLATFORM_USE_LIBRARY_TYPE
: m_library (de::MovePtr<vk::Library>(platform.createLibrary(vk::Platform::LIBRARY_TYPE_VULKAN_VIDEO_DECODE_PARSER, DE_NULL)))
#else
: m_library (de::MovePtr<vk::Library>(platform.createLibrary()))
diff --git a/external/vulkancts/modules/vulkan/vktTestPackage.cpp b/external/vulkancts/modules/vulkan/vktTestPackage.cpp
index 959a9d368..cac454c71 100644
--- a/external/vulkancts/modules/vulkan/vktTestPackage.cpp
+++ b/external/vulkancts/modules/vulkan/vktTestPackage.cpp
@@ -204,7 +204,7 @@ static void restoreStandardOutput () { qpRedirectOut(openWrite, open
static MovePtr<vk::Library> createLibrary (tcu::TestContext& testCtx)
{
-#if (DE_OS == DE_OS_WIN32) || (DE_OS == DE_OS_UNIX)
+#ifdef DE_PLATFORM_USE_LIBRARY_TYPE
return MovePtr<vk::Library>(testCtx.getPlatform().getVulkanPlatform().createLibrary(vk::Platform::LIBRARY_TYPE_VULKAN, testCtx.getCommandLine().getVkLibraryPath()));
#else
return MovePtr<vk::Library>(testCtx.getPlatform().getVulkanPlatform().createLibrary(testCtx.getCommandLine().getVkLibraryPath()));
diff --git a/external/vulkancts/vkscpc/vkscpc.cpp b/external/vulkancts/vkscpc/vkscpc.cpp
index 55b5665c8..91725633a 100644
--- a/external/vulkancts/vkscpc/vkscpc.cpp
+++ b/external/vulkancts/vkscpc/vkscpc.cpp
@@ -288,7 +288,7 @@ int main (int argc, char** argv)
tcu::DirArchive archive {""};
tcu::TestLog log { cmdLine.getOption<opt::LogFile>().c_str() }; log.supressLogging(true);
de::SharedPtr<tcu::Platform> platform {createPlatform()};
-#if (DE_OS == DE_OS_WIN32) || (DE_OS == DE_OS_UNIX)
+#ifdef DE_PLATFORM_USE_LIBRARY_TYPE
de::SharedPtr<vk::Library> library {platform->getVulkanPlatform().createLibrary(vk::Platform::LIBRARY_TYPE_VULKAN, DE_NULL)};
#else
de::SharedPtr<vk::Library> library {platform->getVulkanPlatform().createLibrary(DE_NULL)};
diff --git a/external/vulkancts/vkscserver/vksServices.cpp b/external/vulkancts/vkscserver/vksServices.cpp
index 461c7a349..fe1160edc 100644
--- a/external/vulkancts/vkscserver/vksServices.cpp
+++ b/external/vulkancts/vkscserver/vksServices.cpp
@@ -163,7 +163,7 @@ VkscServer* createServerVKSC(const std::string& logFile)
tcu::DirArchive archive {""};
tcu::TestLog log { logFile.c_str() }; log.supressLogging(true);
tcu::Platform* platform {createPlatform()};
-#if (DE_OS == DE_OS_WIN32) || (DE_OS == DE_OS_UNIX)
+#ifdef DE_PLATFORM_USE_LIBRARY_TYPE
vk::Library* library {platform->getVulkanPlatform().createLibrary(vk::Platform::LIBRARY_TYPE_VULKAN, DE_NULL)};
#else
vk::Library* library {platform->getVulkanPlatform().createLibrary(DE_NULL)};
diff --git a/framework/delibs/debase/deDefs.h b/framework/delibs/debase/deDefs.h
index 39cd65d0b..2885fe5c5 100644
--- a/framework/delibs/debase/deDefs.h
+++ b/framework/delibs/debase/deDefs.h
@@ -101,6 +101,12 @@
# error Unknown operating system.
#endif
+#if ((DE_OS == DE_OS_WIN32) || (DE_OS == DE_OS_UNIX)) && !defined(DEQP_SURFACELESS) && !defined(NULLWS)
+# define DE_PLATFORM_USE_LIBRARY_TYPE 1
+#else
+# undef DE_PLATFORM_USE_LIBRARY_TYPE
+#endif
+
/* CPUs */
#define DE_CPU_VANILLA 0
#define DE_CPU_X86 1
diff --git a/framework/platform/CMakeLists.txt b/framework/platform/CMakeLists.txt
index 00c53e3c9..b2a1d57b6 100644
--- a/framework/platform/CMakeLists.txt
+++ b/framework/platform/CMakeLists.txt
@@ -113,6 +113,7 @@ if (NOT DEFINED TCUTIL_PLATFORM_SRCS)
endif()
elseif (DE_OS_IS_UNIX AND DEQP_USE_SURFACELESS)
+ add_definitions(-DDEQP_SURFACELESS=1)
set(TCUTIL_PLATFORM_SRCS
surfaceless/tcuSurfacelessPlatform.hpp
surfaceless/tcuSurfacelessPlatform.cpp
diff --git a/targets/nullws/nullws.cmake b/targets/nullws/nullws.cmake
index 81a7f9ea2..5f6f9b773 100644
--- a/targets/nullws/nullws.cmake
+++ b/targets/nullws/nullws.cmake
@@ -1,6 +1,7 @@
message("*** Using nullws target")
set(DEQP_TARGET_NAME "nullws")
+set(DEQP_USE_NULLWS ON)
add_definitions(-DNULLWS)
find_library(GLES2_LIBRARY NAMES libGLESv2 GLESv2)
--
2.39.1

View File

@@ -0,0 +1,69 @@
#!/usr/bin/env bash
# shellcheck disable=SC1091
set -e
set -o xtrace
EPHEMERAL=(
autoconf
automake
bzip2
libtool
libepoxy-dev
libtbb-dev
make
openssl-dev
unzip
)
DEPS=(
bash
bison
ccache
cmake
clang-dev
coreutils
curl
flex
gcc
g++
git
gettext
glslang
linux-headers
llvm16-dev
meson
expat-dev
elfutils-dev
libdrm-dev
libselinux-dev
libva-dev
libpciaccess-dev
zlib-dev
python3-dev
py3-mako
py3-ply
vulkan-headers
spirv-tools-dev
util-macros
wayland-dev
wayland-protocols
)
apk add "${DEPS[@]}" "${EPHEMERAL[@]}"
. .gitlab-ci/container/container_pre_build.sh
pushd /usr/local
git clone https://gitlab.freedesktop.org/mesa/shader-db.git --depth 1
rm -rf shader-db/.git
cd shader-db
make
popd
############### Uninstall the build software
apk del "${EPHEMERAL[@]}"
. .gitlab-ci/container/container_post_build.sh

View File

@@ -0,0 +1,29 @@
#!/usr/bin/env bash
# This is a ci-templates build script to generate a container for LAVA SSH client.
# shellcheck disable=SC1091
set -e
set -o xtrace
EPHEMERAL=(
)
# We only need these very basic packages to run the tests.
DEPS=(
openssh-client # for ssh
iputils # for ping
bash
curl
)
apk add "${DEPS[@]}" "${EPHEMERAL[@]}"
. .gitlab-ci/container/container_pre_build.sh
############### Uninstall the build software
apk del "${EPHEMERAL[@]}"
. .gitlab-ci/container/container_post_build.sh

View File

@@ -1,72 +0,0 @@
#!/bin/bash
# shellcheck disable=SC2086 # we want word splitting
set -e
set -o xtrace
EPHEMERAL="
autoconf
automake
bzip2
cmake
git
libtool
libepoxy-dev
libtbb-dev
make
openssl-dev
unzip
xz
zstd-dev
"
apk add \
bash \
bison \
ccache \
clang-dev \
coreutils \
curl \
flex \
gcc \
g++ \
gettext \
glslang \
linux-headers \
llvm15-dev \
meson \
expat-dev \
elfutils-dev \
libselinux-dev \
libva-dev \
libpciaccess-dev \
zlib-dev \
python3-dev \
py3-mako \
py3-ply \
vulkan-headers \
spirv-tools-dev \
util-macros \
$EPHEMERAL
. .gitlab-ci/container/container_pre_build.sh
. .gitlab-ci/container/build-libdrm.sh
. .gitlab-ci/container/build-wayland.sh
pushd /usr/local
git clone https://gitlab.freedesktop.org/mesa/shader-db.git --depth 1
rm -rf shader-db/.git
cd shader-db
make
popd
############### Uninstall the build software
apk del $EPHEMERAL
. .gitlab-ci/container/container_post_build.sh

View File

@@ -43,6 +43,7 @@ CONFIG_TYPEC_TCPM=y
# For CONFIG_QCOM_LMH
CONFIG_OF=y
CONFIG_ARM_SMMU_QCOM=y
CONFIG_QCOM_COMMAND_DB=y
CONFIG_QCOM_RPMHPD=y
CONFIG_QCOM_RPMPD=y
@@ -72,12 +73,20 @@ CONFIG_INTERCONNECT_QCOM_SDM845=y
CONFIG_INTERCONNECT_QCOM_MSM8916=y
CONFIG_INTERCONNECT_QCOM_OSM_L3=y
CONFIG_INTERCONNECT_QCOM_SC7180=y
CONFIG_INTERCONNECT_QCOM_SM8350=y
CONFIG_CRYPTO_DEV_QCOM_RNG=y
CONFIG_SC_DISPCC_7180=y
CONFIG_SC_GPUCC_7180=y
CONFIG_SM_GPUCC_8350=y
CONFIG_QCOM_SPMI_ADC5=y
CONFIG_DRM_PARADE_PS8640=y
CONFIG_DRM_LONTIUM_LT9611UXC=y
CONFIG_PHY_QCOM_USB_HS=y
CONFIG_QCOM_GPI_DMA=y
CONFIG_USB_ONBOARD_HUB=y
CONFIG_NVMEM_QCOM_QFPROM=y
CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y
# db410c ethernet
CONFIG_USB_RTL8152=y
@@ -85,6 +94,8 @@ CONFIG_USB_RTL8152=y
CONFIG_ATL1C=y
# Chromebooks ethernet
CONFIG_USB_ONBOARD_HUB=y
# 888 HDK ethernet
CONFIG_USB_LAN78XX=y
CONFIG_ARCH_ALPINE=n
CONFIG_ARCH_BCM2835=n

View File

@@ -1,9 +1,9 @@
#!/bin/bash
#!/usr/bin/env bash
set -e
set -o xtrace
# Fetch the arm-built rootfs image and unpack it in our x86 container (saves
# Fetch the arm-built rootfs image and unpack it in our x86_64 container (saves
# network transfer, disk usage, and runtime on test jobs)
# shellcheck disable=SC2154 # arch is assigned in previous scripts

View File

@@ -0,0 +1,58 @@
#!/usr/bin/env bash
set -ex
ANGLE_REV="82f1cee01a9ea24960e8f23b24d348fccbe0aae0"
# DEPOT tools
git clone --depth 1 https://chromium.googlesource.com/chromium/tools/depot_tools.git
PWD=$(pwd)
export PATH=$PWD/depot_tools:$PATH
export DEPOT_TOOLS_UPDATE=0
mkdir /angle-build
pushd /angle-build
git init
git remote add origin https://chromium.googlesource.com/angle/angle.git
git fetch --depth 1 origin "$ANGLE_REV"
git checkout FETCH_HEAD
# source preparation
python3 scripts/bootstrap.py
mkdir -p build/config
gclient sync
sed -i "/catapult/d" testing/BUILD.gn
mkdir -p out/Release
echo '
is_debug = false
angle_enable_swiftshader = false
angle_enable_null = false
angle_enable_gl = false
angle_enable_vulkan = true
angle_has_histograms = false
build_angle_trace_perf_tests = false
build_angle_deqp_tests = false
angle_use_custom_libvulkan = false
dcheck_always_on=true
' > out/Release/args.gn
if [[ "$DEBIAN_ARCH" = "arm64" ]]; then
build/linux/sysroot_scripts/install-sysroot.py --arch=arm64
fi
gn gen out/Release
# depot_tools overrides ninja with a version that doesn't work. We want
# ninja with FDO_CI_CONCURRENT anyway.
/usr/local/bin/ninja -C out/Release/
mkdir /angle
cp out/Release/lib*GL*.so /angle/
ln -s libEGL.so /angle/libEGL.so.1
ln -s libGLESv2.so /angle/libGLESv2.so.2
rm -rf out
popd
rm -rf ./depot_tools

View File

@@ -1,9 +1,15 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# DEBIAN_X86_64_TEST_GL_TAG
# DEBIAN_X86_64_TEST_VK_TAG
# KERNEL_ROOTFS_TAG
set -ex
APITRACE_VERSION="790380e05854d5c9d315555444ffcc7acb8f4037"
APITRACE_VERSION="0a6506433e1f9f7b69757b4e5730326970c4321a"
git clone https://github.com/apitrace/apitrace.git --single-branch --no-checkout /apitrace
pushd /apitrace

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -ex
@@ -6,29 +6,32 @@ set -ex
git config --global user.email "mesa@example.com"
git config --global user.name "Mesa CI"
CROSVM_VERSION=00af43e1b565e1ae0047ba84b970da5e089e4f48
CROSVM_VERSION=d0cbf0b23eb4bd2355b011184025c7c5d8749376
git clone --single-branch -b main --no-checkout https://chromium.googlesource.com/crosvm/crosvm /platform/crosvm
pushd /platform/crosvm
git checkout "$CROSVM_VERSION"
git submodule update --init
VIRGLRENDERER_VERSION=fc2ad36998f8af8ea3cc68fb9c747dfec9cb4635
VIRGLRENDERER_VERSION=45bb2449b81336b88c267b1c1735f3b4946c7b3a
rm -rf third_party/virglrenderer
git clone --single-branch -b master --no-checkout https://gitlab.freedesktop.org/virgl/virglrenderer.git third_party/virglrenderer
git clone --single-branch -b main --no-checkout https://gitlab.freedesktop.org/virgl/virglrenderer.git third_party/virglrenderer
pushd third_party/virglrenderer
git checkout "$VIRGLRENDERER_VERSION"
meson build/ -Drender-server-worker=process -Dvenus-experimental=true $EXTRA_MESON_ARGS
ninja -C build install
meson setup build/ -D libdir=lib -D render-server-worker=process -D venus=true $EXTRA_MESON_ARGS
meson install -C build
popd
cargo update -p pkg-config@0.3.26 --precise 0.3.27
RUSTFLAGS='-L native=/usr/local/lib' cargo install \
bindgen-cli \
--locked \
-j ${FDO_CI_CONCURRENT:-4} \
--root /usr/local \
--version 0.63.0 \
--version 0.65.1 \
$EXTRA_CARGO_ARGS
RUSTFLAGS='-L native=/usr/local/lib' cargo install \
CROSVM_USE_SYSTEM_VIRGLRENDERER=1 RUSTFLAGS='-L native=/usr/local/lib' cargo install \
-j ${FDO_CI_CONCURRENT:-4} \
--locked \
--features 'default-no-sandbox gpu x virgl_renderer virgl_renderer_next' \

View File

@@ -1,31 +1,92 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# DEBIAN_X86_64_TEST_ANDROID_TAG
# DEBIAN_X86_64_TEST_GL_TAG
# DEBIAN_X86_64_TEST_VK_TAG
# KERNEL_ROOTFS_TAG
set -ex
git config --global user.email "mesa@example.com"
git config --global user.name "Mesa CI"
git clone \
https://github.com/KhronosGroup/VK-GL-CTS.git \
-b vulkan-cts-1.3.5.0 \
-b vulkan-cts-1.3.5.2 \
--depth 1 \
/VK-GL-CTS
pushd /VK-GL-CTS
cts_commits_to_backport=()
# Patches to VulkanCTS may come from commits in their repo (listed in
# cts_commits_to_backport) or patch files stored in our repo (in the patch
# directory `$OLDPWD/.gitlab-ci/container/patches/` listed in cts_patch_files).
# Both list variables would have comments explaining the reasons behind the
# patches.
cts_commits_to_backport=(
# sync fix for SSBO writes
44f1be32fe6bd2a7de7b9169fc71cc44e0b26124
# sync fix for KHR-GL46.multi_bind.dispatch_bind_image_textures
db6c9e295ab38054ace425cb75ff966719ccc609
# VK robustness barriers fix
6052f21c4d6077438d644f525c10cc58dcdf25bf
# correctness fixes for zink validation fails
1923cbc89ed3969a3afe7c6926124b51157902e1
af3a979c49dc65f8809c27660405ae3a76c7da4a
# GL/GLES vertex_attrib_binding.advanced-largeStrideAndOffsetsNewAndLegacyAPI fix
bdb456dcf85e34fced872ebdaf06f6b73451f99c
# KHR-GLES31.core.compute_shader.max fix
7aa3ebb49d07982f5c44edd4799edb5a894567e9
# GL arrays_of_arrays perf fix
b481dada59734e8e34050fe884ba6d627d9e5c54
# GL shadow samplers require depth compares fix
a8bc242ec234bf8d7df8b4eec1eeccab4e401288
# GL PolygonOffsetClamp fix
1f2feb2388da88b4e46eba55547d50856467cc20
# KHR-GL46.texture_view.view_sampling fix
aca29fb9553ebe28094513ce18bb46bad138cf46
# video validation fails
4cc3980a86ba5b7fe6e76b559cc1a9cb5fd1b253
a7a2ce442db51ca058ce051de7e09d62db44ae81
# Check for robustness before testing it
ee7138d8adf5ed3c4845e5ac2553c4f9697be9d8
# dEQP-VK.wsi.acquire_drm_display.*invalid_fd
98ad9402e7d94030d1689fd59135da7a2f52384c
)
for commit in "${cts_commits_to_backport[@]}"
do
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
"https://github.com/KhronosGroup/VK-GL-CTS/commit/$commit.patch" | git am -
PATCH_URL="https://github.com/KhronosGroup/VK-GL-CTS/commit/$commit.patch"
echo "Apply patch to VK-GL-CTS from $PATCH_URL"
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 $PATCH_URL | \
git am -
done
# Fix surfaceless build.
git am < $OLDPWD/.gitlab-ci/container/0001-Fix-build-for-the-surfaceless-and-null-WS-target-pla.patch
cts_patch_files=(
# Android specific patches.
build-deqp_Allow-running-on-Android-from-the-command-line.patch
build-deqp_Android-prints-to-stdout-instead-of-logcat.patch
)
# Android specific patches.
git am < $OLDPWD/.gitlab-ci/container/0001-Allow-running-on-Android-from-the-command-line.patch
git am < $OLDPWD/.gitlab-ci/container/0002-Android-prints-to-stdout-instead-of-logcat.patch
for patch in "${cts_patch_files[@]}"
do
echo "Apply patch to VK-GL-CTS from $patch"
git am < $OLDPWD/.gitlab-ci/container/patches/$patch
done
# --insecure is due to SSL cert failures hitting sourceforge for zlib and
# libpng (sigh). The archives get their checksums checked anyway, and git
@@ -48,14 +109,14 @@ if [ "${DEQP_TARGET}" != 'android' ]; then
-DCMAKE_BUILD_TYPE=Release \
$EXTRA_CMAKE_ARGS
ninja modules/egl/deqp-egl
cp /deqp/modules/egl/deqp-egl /deqp/modules/egl/deqp-egl-x11
mv /deqp/modules/egl/deqp-egl /deqp/modules/egl/deqp-egl-x11
cmake -S /VK-GL-CTS -B . -G Ninja \
-DDEQP_TARGET=wayland \
-DCMAKE_BUILD_TYPE=Release \
$EXTRA_CMAKE_ARGS
ninja modules/egl/deqp-egl
cp /deqp/modules/egl/deqp-egl /deqp/modules/egl/deqp-egl-wayland
mv /deqp/modules/egl/deqp-egl /deqp/modules/egl/deqp-egl-wayland
fi
cmake -S /VK-GL-CTS -B . -G Ninja \
@@ -64,8 +125,8 @@ cmake -S /VK-GL-CTS -B . -G Ninja \
$EXTRA_CMAKE_ARGS
ninja
if [ "${DEQP_TARGET}" != 'android' ]; then
mv /deqp/modules/egl/deqp-egl-x11 /deqp/modules/egl/deqp-egl
if [ "${DEQP_TARGET}" = 'android' ]; then
mv /deqp/modules/egl/deqp-egl /deqp/modules/egl/deqp-egl-android
fi
# Copy out the mustpass lists we want.

View File

@@ -1,8 +1,8 @@
#!/bin/bash
#!/usr/bin/env bash
set -ex
GFXRECONSTRUCT_VERSION=5ed3caeecc46e976c4df31e263df8451ae176c26
GFXRECONSTRUCT_VERSION=761837794a1e57f918a85af7000b12e531b178ae
git clone https://github.com/LunarG/gfxreconstruct.git \
--single-branch \

View File

@@ -1,8 +1,9 @@
#!/bin/bash
#!/usr/bin/env bash
set -ex
export LLVM_CONFIG="llvm-config-11"
export LLVM_CONFIG="llvm-config-${LLVM_VERSION:?"llvm unset!"}"
LLVM_TAG="llvmorg-15.0.7"
$LLVM_CONFIG --version
@@ -11,12 +12,12 @@ git config --global user.name "Mesa CI"
git clone \
https://github.com/llvm/llvm-project \
--depth 1 \
-b llvmorg-12.0.0-rc3 \
-b "${LLVM_TAG}" \
/llvm-project
mkdir /libclc
pushd /libclc
cmake -S /llvm-project/libclc -B . -G Ninja -DLLVM_CONFIG=$LLVM_CONFIG -DLIBCLC_TARGETS_TO_BUILD="spirv-mesa3d-;spirv64-mesa3d-" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DLLVM_SPIRV=/usr/bin/llvm-spirv
cmake -S /llvm-project/libclc -B . -G Ninja -DLLVM_CONFIG="$LLVM_CONFIG" -DLIBCLC_TARGETS_TO_BUILD="spirv-mesa3d-;spirv64-mesa3d-" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DLLVM_SPIRV=/usr/bin/llvm-spirv
ninja
ninja install
popd

View File

@@ -1,15 +1,15 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -ex
export LIBDRM_VERSION=libdrm-2.4.110
export LIBDRM_VERSION=libdrm-2.4.114
curl -L -O --retry 4 -f --retry-all-errors --retry-delay 60 \
https://dri.freedesktop.org/libdrm/"$LIBDRM_VERSION".tar.xz
tar -xvf "$LIBDRM_VERSION".tar.xz && rm "$LIBDRM_VERSION".tar.xz
cd "$LIBDRM_VERSION"
meson build -D vc4=false -D freedreno=false -D etnaviv=false $EXTRA_MESON_ARGS
ninja -C build install
meson setup build -D vc4=disabled -D freedreno=disabled -D etnaviv=disabled $EXTRA_MESON_ARGS
meson install -C build
cd ..
rm -rf "$LIBDRM_VERSION"

View File

@@ -1,8 +1,8 @@
#!/bin/bash
#!/usr/bin/env bash
set -ex
VER="13.0.0"
VER="${LLVM_VERSION:?llvm not set}.0.0"
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
-O "https://github.com/KhronosGroup/SPIRV-LLVM-Translator/archive/refs/tags/v${VER}.tar.gz"

View File

@@ -2,12 +2,14 @@
set -ex
MOLD_VERSION="1.10.0"
MOLD_VERSION="1.11.0"
git clone -b v"$MOLD_VERSION" --single-branch --depth 1 https://github.com/rui314/mold.git
pushd mold
cmake -DCMAKE_BUILD_TYPE=Release -D BUILD_TESTING=OFF -D MOLD_LTO=ON
cmake --build . --parallel
cmake --install .
popd
rm -rf mold

View File

@@ -3,7 +3,7 @@
set -ex
REV="355ad6bcb2cb3d9e030b7c6eef2b076b0dfb4d63"
REV="5036601c43fff63f7be5cd8ad7b319a5c1f6652c"
git clone https://gitlab.freedesktop.org/mesa/piglit.git --single-branch --no-checkout /piglit
pushd /piglit

View File

@@ -11,11 +11,11 @@ set -ex
mkdir -p "$HOME"/.cargo
ln -s /usr/local/bin "$HOME"/.cargo/bin
# Rusticl requires at least Rust 1.59.0
# Rusticl requires at least Rust 1.60.0
#
# Also, oick a specific snapshot from rustup so the compiler doesn't drift on
# Also, pick a specific snapshot from rustup so the compiler doesn't drift on
# us.
RUST_VERSION=1.59.0-2022-02-24
RUST_VERSION=1.60.0-2022-04-07
# For rust in Mesa, we use rustup to install. This lets us pick an arbitrary
# version of the compiler, rather than whatever the container's Debian comes
@@ -26,7 +26,7 @@ curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
--profile minimal \
-y
rustup component add rustfmt
rustup component add clippy rustfmt
# Set up a config script for cross compiling -- cargo needs your system cc for
# linking in cross builds, but doesn't know what you want to use for system cc.

View File

@@ -1,27 +1,20 @@
#!/bin/bash
#!/usr/bin/env bash
# SPDX-License-Identifier: MIT
#
# Copyright (C) 2022 Collabora Limited
# Copyright © 2022 Collabora Limited
# Author: Guilherme Gallo <guilherme.gallo@collabora.com>
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# KERNEL_ROOTFS_TAG
SKQP_BRANCH=android-cts-12.1_r5
# hack for skqp see the clang
pushd /usr/bin/
ln -s ../lib/llvm-15/bin/clang clang
ln -s ../lib/llvm-15/bin/clang++ clang++
popd
create_gn_args() {
# gn can be configured to cross-compile skia and its tools
@@ -41,7 +34,6 @@ download_skia_source() {
# Skia cloned from https://android.googlesource.com/platform/external/skqp
# has all needed assets tracked on git-fs
SKQP_REPO=https://android.googlesource.com/platform/external/skqp
SKQP_BRANCH=android-cts-11.0_r7
git clone --branch "${SKQP_BRANCH}" --depth 1 "${SKQP_REPO}" "${SKIA_DIR}"
}

View File

@@ -1,7 +1,12 @@
cc = "clang"
cxx = "clang++"
extra_cflags = [ "-DSK_ENABLE_DUMP_GPU", "-DSK_BUILD_FOR_SKQP" ]
extra_cflags = [
"-Wno-error",
"-DSK_ENABLE_DUMP_GPU",
"-DSK_BUILD_FOR_SKQP"
]
extra_cflags_cc = [
"-Wno-error",
@@ -22,6 +27,13 @@ extra_cflags_cc = [
"-Wno-suggest-destructor-override",
"-Wno-return-std-move-in-c++11",
"-Wno-extra-semi-stmt",
"-Wno-reserved-identifier",
"-Wno-bitwise-instead-of-logical",
"-Wno-reserved-identifier",
"-Wno-psabi",
"-Wno-unused-but-set-variable",
"-Wno-sizeof-array-div",
"-Wno-string-concatenation",
]
cc_wrapper = "ccache"

View File

@@ -1,18 +1,25 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# KERNEL_ROOTFS_TAG
set -ex
git config --global user.email "mesa@example.com"
git config --global user.name "Mesa CI"
git clone \
https://github.com/intel/libva-utils.git \
-b 2.13.0 \
-b 2.18.1 \
--depth 1 \
/va-utils
pushd /va-utils
meson build -D tests=true -Dprefix=/va $EXTRA_MESON_ARGS
ninja -C build install
# Too old libva in Debian 11. TODO: when this PR gets in, refer to the patch.
curl -L https://github.com/intel/libva-utils/pull/329.patch | git am
meson setup build -D tests=true -Dprefix=/va $EXTRA_MESON_ARGS
meson install -C build
popd
rm -rf /va-utils

View File

@@ -1,8 +1,12 @@
#!/bin/bash
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# DEBIAN_X86_64_TEST_VK_TAG
# KERNEL_ROOTFS_TAG
set -ex
VKD3D_PROTON_COMMIT="507cb3195bae32395c69763afec2b1ac078d509a"
VKD3D_PROTON_COMMIT="6365efeba253807beecaed0eaa963295522c6b70"
VKD3D_PROTON_DST_DIR="/vkd3d-proton-tests"
VKD3D_PROTON_SRC_DIR="/vkd3d-proton-src"

View File

@@ -1,15 +1,18 @@
#!/usr/bin/env bash
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# DEBIAN_X86_64_TEST_GL_TAG
# KERNEL_ROOTFS_TAG:
set -ex
VALIDATION_TAG="v1.3.238"
VALIDATION_TAG="v1.3.251"
git clone -b "$VALIDATION_TAG" --single-branch --depth 1 https://github.com/KhronosGroup/Vulkan-ValidationLayers.git
pushd Vulkan-ValidationLayers
mkdir build
pushd build
python3 ../scripts/update_deps.py --dir ../external --arch x64 --config debug
cmake -G Ninja -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DBUILD_TESTS=OFF -DBUILD_WERROR=OFF -C ../external/helper.cmake ..
ninja install
python3 scripts/update_deps.py --dir external --config debug
cmake -G Ninja -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr -DBUILD_TESTS=OFF -DBUILD_WERROR=OFF -C external/helper.cmake -S . -B build
ninja -C build install
popd
rm -rf Vulkan-ValidationLayers

View File

@@ -1,23 +1,23 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -ex
export LIBWAYLAND_VERSION="1.18.0"
export WAYLAND_PROTOCOLS_VERSION="1.24"
export LIBWAYLAND_VERSION="1.21.0"
export WAYLAND_PROTOCOLS_VERSION="1.31"
git clone https://gitlab.freedesktop.org/wayland/wayland
cd wayland
git checkout "$LIBWAYLAND_VERSION"
meson -Ddocumentation=false -Ddtd_validation=false -Dlibraries=true _build $EXTRA_MESON_ARGS
ninja -C _build install
meson setup -Ddocumentation=false -Ddtd_validation=false -Dlibraries=true _build $EXTRA_MESON_ARGS
meson install -C _build
cd ..
rm -rf wayland
git clone https://gitlab.freedesktop.org/wayland/wayland-protocols
cd wayland-protocols
git checkout "$WAYLAND_PROTOCOLS_VERSION"
meson _build $EXTRA_MESON_ARGS
ninja -C _build install
meson setup _build $EXTRA_MESON_ARGS
meson install -C _build
cd ..
rm -rf wayland-protocols

View File

@@ -22,7 +22,7 @@ cpp = ['ccache', '$ndk/toolchains/llvm/prebuilt/linux-x86_64/bin/${arch2}${sdk_v
c_ld = 'lld'
cpp_ld = 'lld'
strip = '$ndk/toolchains/llvm/prebuilt/linux-x86_64/bin/llvm-strip'
pkgconfig = ['/usr/bin/pkg-config']
pkgconfig = ['/usr/bin/pkgconf']
[host_machine]
system = 'android'

View File

@@ -47,7 +47,8 @@ if [[ -n "$GCC_ARCH" ]]; then
echo "set(CMAKE_SYSTEM_PROCESSOR arm)";
echo "set(CMAKE_C_COMPILER /usr/lib/ccache/$GCC_ARCH-gcc)";
echo "set(CMAKE_CXX_COMPILER /usr/lib/ccache/$GCC_ARCH-g++)";
echo "set(ENV{PKG_CONFIG} \"/usr/bin/$GCC_ARCH-pkg-config\")";
echo "set(CMAKE_CXX_FLAGS_INIT \"-Wno-psabi\")"; # makes ABI warnings quiet for ARMv7
echo "set(ENV{PKG_CONFIG} \"/usr/bin/$GCC_ARCH-pkgconf\")";
echo "set(DE_CPU $DE_CPU)";
} > "$toolchain_file"
fi

View File

@@ -1,325 +0,0 @@
#!/bin/bash
# shellcheck disable=SC2140 # ugly array, remove later
# shellcheck disable=SC2288 # ugly array, remove later
# shellcheck disable=SC2086 # we want word splitting
set -ex
if [ $DEBIAN_ARCH = arm64 ]; then
ARCH_PACKAGES="firmware-qcom-media
firmware-linux-nonfree
libfontconfig1
libgl1
libglu1-mesa
libvulkan-dev
"
elif [ $DEBIAN_ARCH = amd64 ]; then
# Add llvm 13 to the build image
apt-get -y install --no-install-recommends curl gnupg2 software-properties-common
apt-key add /llvm-snapshot.gpg.key
add-apt-repository "deb https://apt.llvm.org/bullseye/ llvm-toolchain-bullseye-13 main"
# Debian bullseye has older wine 5.0, we want >= 7.0 for traces.
apt-key add /winehq.gpg.key
apt-add-repository https://dl.winehq.org/wine-builds/debian/
ARCH_PACKAGES="firmware-amd-graphics
inetutils-syslogd
iptables
libcap2
libfontconfig1
libelf1
libfdt1
libgl1
libglu1-mesa
libllvm13
libllvm11
libva2
libva-drm2
libvulkan-dev
socat
spirv-tools
sysvinit-core
"
elif [ $DEBIAN_ARCH = armhf ]; then
ARCH_PACKAGES="firmware-misc-nonfree
"
fi
INSTALL_CI_FAIRY_PACKAGES="git
python3-dev
python3-pip
python3-setuptools
python3-wheel
"
apt-get update
apt-get -y install --no-install-recommends \
$ARCH_PACKAGES \
$INSTALL_CI_FAIRY_PACKAGES \
$EXTRA_LOCAL_PACKAGES \
bash \
ca-certificates \
curl \
firmware-realtek \
initramfs-tools \
jq \
libasan6 \
libexpat1 \
libpng16-16 \
libpython3.9 \
libsensors5 \
libvulkan1 \
libwaffle-1-0 \
libx11-6 \
libx11-xcb1 \
libxcb-dri2-0 \
libxcb-dri3-0 \
libxcb-glx0 \
libxcb-present0 \
libxcb-randr0 \
libxcb-shm0 \
libxcb-sync1 \
libxcb-xfixes0 \
libxdamage1 \
libxext6 \
libxfixes3 \
libxkbcommon0 \
libxrender1 \
libxshmfence1 \
libxxf86vm1 \
netcat-openbsd \
python3 \
python3-lxml \
python3-mako \
python3-numpy \
python3-packaging \
python3-pil \
python3-renderdoc \
python3-requests \
python3-simplejson \
python3-yaml \
sntp \
strace \
waffle-utils \
weston \
xinit \
xserver-xorg-core \
xwayland \
zstd
if [ "$DEBIAN_ARCH" = "amd64" ]; then
# workaround wine needing 32-bit
# https://bugs.winehq.org/show_bug.cgi?id=53393
apt-get install -y --no-remove wine-stable-amd64 # a requirement for wine-stable
WINE_PKG="wine-stable"
WINE_PKG_DROP="wine-stable-i386"
apt download "${WINE_PKG}"
dpkg --ignore-depends="${WINE_PKG_DROP}" -i "${WINE_PKG}"*.deb
rm "${WINE_PKG}"*.deb
sed -i "/${WINE_PKG_DROP}/d" /var/lib/dpkg/status
apt-get install -y --no-remove winehq-stable # symlinks-only, depends on wine-stable
fi
# Needed for ci-fairy, this revision is able to upload files to
# MinIO and doesn't depend on git
pip3 install git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
# Needed for manipulation with traces yaml files.
pip3 install yq
apt-get purge -y \
$INSTALL_CI_FAIRY_PACKAGES
passwd root -d
chsh -s /bin/sh
cat > /init <<EOF
#!/bin/sh
export PS1=lava-shell:
exec sh
EOF
chmod +x /init
#######################################################################
# Strip the image to a small minimal system without removing the debian
# toolchain.
# Copy timezone file and remove tzdata package
rm -rf /etc/localtime
cp /usr/share/zoneinfo/Etc/UTC /etc/localtime
UNNEEDED_PACKAGES="
libfdisk1
"
export DEBIAN_FRONTEND=noninteractive
# Removing unused packages
for PACKAGE in ${UNNEEDED_PACKAGES}
do
echo ${PACKAGE}
if ! apt-get remove --purge --yes "${PACKAGE}"
then
echo "WARNING: ${PACKAGE} isn't installed"
fi
done
apt-get autoremove --yes || true
# Dropping logs
rm -rf /var/log/*
# Dropping documentation, localization, i18n files, etc
rm -rf /usr/share/doc/*
rm -rf /usr/share/locale/*
rm -rf /usr/share/X11/locale/*
rm -rf /usr/share/man
rm -rf /usr/share/i18n/*
rm -rf /usr/share/info/*
rm -rf /usr/share/lintian/*
rm -rf /usr/share/common-licenses/*
rm -rf /usr/share/mime/*
# Dropping reportbug scripts
rm -rf /usr/share/bug
# Drop udev hwdb not required on a stripped system
rm -rf /lib/udev/hwdb.bin /lib/udev/hwdb.d/*
# Drop all gconv conversions && binaries
rm -rf usr/bin/iconv
rm -rf usr/sbin/iconvconfig
rm -rf usr/lib/*/gconv/
# Remove libusb database
rm -rf usr/sbin/update-usbids
rm -rf var/lib/usbutils/usb.ids
rm -rf usr/share/misc/usb.ids
rm -rf /root/.pip
#######################################################################
# Crush into a minimal production image to be deployed via some type of image
# updating system.
# IMPORTANT: The Debian system is not longer functional at this point,
# for example, apt and dpkg will stop working
UNNEEDED_PACKAGES="apt libapt-pkg6.0 "\
"ncurses-bin ncurses-base libncursesw6 libncurses6 "\
"perl-base "\
"debconf libdebconfclient0 "\
"e2fsprogs e2fslibs libfdisk1 "\
"insserv "\
"udev "\
"init-system-helpers "\
"cpio "\
"passwd "\
"libsemanage1 libsemanage-common "\
"libsepol1 "\
"gpgv "\
"hostname "\
"adduser "\
"debian-archive-keyring "\
"libegl1-mesa-dev "\
"libegl-mesa0 "\
"libgl1-mesa-dev "\
"libgl1-mesa-dri "\
"libglapi-mesa "\
"libgles2-mesa-dev "\
"libglx-mesa0 "\
"mesa-common-dev "\
"gnupg2 "\
"software-properties-common " \
# Removing unneeded packages
for PACKAGE in ${UNNEEDED_PACKAGES}
do
echo "Forcing removal of ${PACKAGE}"
if ! dpkg --purge --force-remove-essential --force-depends "${PACKAGE}"
then
echo "WARNING: ${PACKAGE} isn't installed"
fi
done
# Show what's left package-wise before dropping dpkg itself
COLUMNS=300 dpkg-query -W --showformat='${Installed-Size;10}\t${Package}\n' | sort -k1,1n
# Drop dpkg
dpkg --purge --force-remove-essential --force-depends dpkg
# No apt or dpkg, no need for its configuration archives
rm -rf etc/apt
rm -rf etc/dpkg
# Drop directories not part of ostree
# Note that /var needs to exist as ostree bind mounts the deployment /var over
# it
rm -rf var/* srv share
# ca-certificates are in /etc drop the source
rm -rf usr/share/ca-certificates
# No need for completions
rm -rf usr/share/bash-completion
# No zsh, no need for comletions
rm -rf usr/share/zsh/vendor-completions
# drop gcc python helpers
rm -rf usr/share/gcc
# Drop sysvinit leftovers
rm -rf etc/init.d
rm -rf etc/rc[0-6S].d
# Drop upstart helpers
rm -rf etc/init
# Various xtables helpers
rm -rf usr/lib/xtables
# Drop all locales
# TODO: only remaining locale is actually "C". Should we really remove it?
rm -rf usr/lib/locale/*
# partition helpers
rm -rf usr/sbin/*fdisk
# local compiler
rm -rf usr/bin/localedef
# Systemd dns resolver
find usr etc -name '*systemd-resolve*' -prune -exec rm -r {} \;
# Systemd network configuration
find usr etc -name '*networkd*' -prune -exec rm -r {} \;
# systemd ntp client
find usr etc -name '*timesyncd*' -prune -exec rm -r {} \;
# systemd hw database manager
find usr etc -name '*systemd-hwdb*' -prune -exec rm -r {} \;
# No need for fuse
find usr etc -name '*fuse*' -prune -exec rm -r {} \;
# lsb init function leftovers
rm -rf usr/lib/lsb
# Only needed when adding libraries
rm -rf usr/sbin/ldconfig*
# Games, unused
rmdir usr/games
# Remove pam module to authenticate against a DB
# plus libdb-5.3.so that is only used by this pam module
rm -rf usr/lib/*/security/pam_userdb.so
rm -rf usr/lib/*/libdb-5.3.so
# remove NSS support for nis, nisplus and hesiod
rm -rf usr/lib/*/libnss_hesiod*
rm -rf usr/lib/*/libnss_nis*

View File

@@ -1,10 +1,11 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
export LLVM_VERSION="${LLVM_VERSION:=15}"
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
@@ -15,8 +16,10 @@ apt-get update
apt-get install -y --no-remove \
$STABLE_EPHEMERAL \
curl \
crossbuild-essential-$arch \
pkgconf:$arch \
libasan8:$arch \
libdrm-dev:$arch \
libelf-dev:$arch \
libexpat1-dev:$arch \
libffi-dev:$arch \
@@ -40,27 +43,20 @@ apt-get install -y --no-remove \
libwayland-dev:$arch
if [[ $arch != "armhf" ]]; then
# See the list of available architectures in https://apt.llvm.org/bullseye/dists/llvm-toolchain-bullseye-13/main/
if [[ $arch == "s390x" ]] || [[ $arch == "i386" ]] || [[ $arch == "arm64" ]]; then
LLVM=13
else
LLVM=11
fi
# We don't need clang-format for the crossbuilds, but the installed amd64
# package will conflict with libclang. Uninstall clang-format (and its
# problematic dependency) to fix.
apt-get remove -y clang-format-13 libclang-cpp13
apt-get remove -y clang-format-${LLVM_VERSION} libclang-cpp${LLVM_VERSION}
# llvm-*-tools:$arch conflicts with python3:amd64. Install dependencies only
# with apt-get, then force-install llvm-*-{dev,tools}:$arch with dpkg to get
# around this.
apt-get install -y --no-remove --no-install-recommends \
libclang-cpp${LLVM}:$arch \
libclang-cpp${LLVM_VERSION}:$arch \
libgcc-s1:$arch \
libtinfo-dev:$arch \
libz3-dev:$arch \
llvm-${LLVM}:$arch \
llvm-${LLVM_VERSION}:$arch \
zlib1g
fi
@@ -83,7 +79,7 @@ apt-get purge -y \
# This needs to be done after container_post_build.sh, or apt-get breaks in there
if [[ $arch != "armhf" ]]; then
apt-get download llvm-${LLVM}-{dev,tools}:$arch
dpkg -i --force-depends llvm-${LLVM}-*_${arch}.deb
rm llvm-${LLVM}-*_${arch}.deb
apt-get download llvm-${LLVM_VERSION}-{dev,tools}:$arch
dpkg -i --force-depends llvm-${LLVM_VERSION}-*_${arch}.deb
rm llvm-${LLVM_VERSION}-*_${arch}.deb
fi

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -ex
@@ -32,7 +32,7 @@ sh .gitlab-ci/container/create-android-cross-file.sh /$ndk arm-linux-androideabi
# Not using build-libdrm.sh because we don't want its cleanup after building
# each arch. Fetch and extract now.
export LIBDRM_VERSION=libdrm-2.4.110
export LIBDRM_VERSION=libdrm-2.4.114
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
-O https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.xz
tar -xf $LIBDRM_VERSION.tar.xz && rm $LIBDRM_VERSION.tar.xz
@@ -45,18 +45,17 @@ for arch in \
cd $LIBDRM_VERSION
rm -rf build-$arch
meson build-$arch \
meson setup build-$arch \
--cross-file=/cross_file-$arch.txt \
--libdir=lib/$arch \
-Dlibkms=false \
-Dnouveau=false \
-Dvc4=false \
-Detnaviv=false \
-Dfreedreno=false \
-Dintel=false \
-Dcairo-tests=false \
-Dvalgrind=false
ninja -C build-$arch install
-Dnouveau=disabled \
-Dvc4=disabled \
-Detnaviv=disabled \
-Dfreedreno=disabled \
-Dintel=disabled \
-Dcairo-tests=disabled \
-Dvalgrind=disabled
meson install -C build-$arch
cd ..
done

View File

@@ -1,12 +1,13 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -e
set -o xtrace
export LLVM_VERSION="${LLVM_VERSION:=15}"
apt-get -y install ca-certificates
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster main' >/etc/apt/sources.list.d/buster.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list.d/*
apt-get update
# Ephemeral packages (installed for this script and removed again at
@@ -16,8 +17,9 @@ STABLE_EPHEMERAL=" \
"
apt-get -y install \
${EXTRA_LOCAL_PACKAGES} \
${STABLE_EPHEMERAL} \
apt-utils \
android-libext4-utils \
autoconf \
automake \
bc \
@@ -32,7 +34,7 @@ apt-get -y install \
git \
glslang-tools \
kmod \
libasan6 \
libasan8 \
libdrm-dev \
libelf-dev \
libexpat1-dev \
@@ -52,9 +54,12 @@ apt-get -y install \
libxshmfence-dev \
libxxf86vm-dev \
libwayland-dev \
llvm-11-dev \
libwayland-egl-backend-dev \
llvm-${LLVM_VERSION}-dev \
ninja-build \
pkg-config \
meson \
openssh-server \
pkgconf \
python3-mako \
python3-pil \
python3-pip \
@@ -65,14 +70,7 @@ apt-get -y install \
zlib1g-dev \
zstd
# Not available anymore in bullseye
apt-get install -y --no-remove -t buster \
android-sdk-ext4-utils
pip3 install git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
# We need at least 0.61.4 for proper Rust; 0.62 for modern meson env2mfile
pip3 install meson==0.63.3
pip3 install --break-system-packages git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
arch=armhf
. .gitlab-ci/container/cross_build.sh
@@ -81,10 +79,6 @@ arch=armhf
. .gitlab-ci/container/build-mold.sh
# dependencies where we want a specific version
EXTRA_MESON_ARGS=
. .gitlab-ci/container/build-libdrm.sh
. .gitlab-ci/container/build-wayland.sh
apt-get purge -y $STABLE_EPHEMERAL

View File

@@ -1,19 +1,24 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2154 # arch is assigned in previous scripts
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# DEBIAN_BASE_TAG
# KERNEL_ROOTFS_TAG
set -e
set -o xtrace
############### Install packages for baremetal testing
apt-get install -y ca-certificates
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list.d/*
apt-get update
apt-get install -y --no-remove \
cpio \
curl \
fastboot \
netcat \
netcat-openbsd \
openssh-server \
procps \
python3-distutils \
python3-minimal \
@@ -29,13 +34,6 @@ curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
. .gitlab-ci/container/baremetal_build.sh
if [[ "$arch" == "arm64" ]]; then
# This firmware file from Debian bullseye causes hangs
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
"https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/qcom/a530_pfp.fw?id=d5f9eea5a251d43412b07f5295d03e97b89ac4a5" \
-o /rootfs-arm64/lib/firmware/qcom/a530_pfp.fw
fi
mkdir -p /baremetal-files/jetson-nano/boot/
ln -s \
/baremetal-files/Image \

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
set -e
set -o xtrace
@@ -12,5 +12,4 @@ apt-get install -y --no-remove \
xvfb
# Used to initialize the Wine environment to reduce build time
wine64 whoami.exe
wine wineboot.exe --init

View File

@@ -5,30 +5,25 @@ set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
export LLVM_VERSION="${LLVM_VERSION:=15}"
apt-get install -y ca-certificates gnupg2 software-properties-common
# Add llvm 13 to the build image
apt-key add .gitlab-ci/container/debian/llvm-snapshot.gpg.key
add-apt-repository "deb https://apt.llvm.org/bullseye/ llvm-toolchain-bullseye-13 main"
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
apt-get install -y ca-certificates
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list.d/*
# Ephemeral packages (installed for this script and removed again at
# the end)
STABLE_EPHEMERAL=" \
python3-pip \
python3-setuptools \
"
apt-get update
apt-get install -y --no-remove \
$STABLE_EPHEMERAL \
apt-utils \
bison \
ccache \
curl \
clang-format-13 \
curl \
clang-format-${LLVM_VERSION} \
dpkg-cross \
findutils \
flex \
@@ -38,14 +33,14 @@ apt-get install -y --no-remove \
git \
glslang-tools \
kmod \
libclang-13-dev \
libclang-11-dev \
libclang-${LLVM_VERSION}-dev \
libclang-cpp${LLVM_VERSION}-dev \
libclang-common-${LLVM_VERSION}-dev \
libelf-dev \
libepoxy-dev \
libexpat1-dev \
libgtk-3-dev \
libllvm13 \
libllvm11 \
libllvm${LLVM_VERSION} \
libomxil-bellagio-dev \
libpciaccess-dev \
libunwind-dev \
@@ -60,13 +55,18 @@ apt-get install -y --no-remove \
libxrender-dev \
libxshmfence-dev \
libxxf86vm-dev \
libwayland-egl-backend-dev \
make \
meson \
ninja-build \
pkg-config \
openssh-server \
pkgconf \
python3-mako \
python3-pil \
python3-pip \
python3-ply \
python3-requests \
python3-setuptools \
qemu-user \
valgrind \
x11proto-dri2-dev \
@@ -74,17 +74,14 @@ apt-get install -y --no-remove \
x11proto-randr-dev \
xz-utils \
zlib1g-dev \
zstd
zstd
# Needed for ci-fairy, this revision is able to upload files to MinIO
pip3 install git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
# We need at least 1.0.0 for proper Rust; 0.62 for modern meson env2mfile
pip3 install meson==1.0.0
# Needed for ci-fairy, this revision is able to upload files to S3
pip3 install --break-system-packages git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
. .gitlab-ci/container/build-rust.sh
. .gitlab-ci/container/debian/x86_build-base-wine.sh
. .gitlab-ci/container/debian/x86_64_build-base-wine.sh
############### Uninstall ephemeral packages

View File

@@ -64,10 +64,10 @@ ninja install
popd
# Building LLVM
git clone -b release/14.x --depth=1 \
git clone -b release/15.x --depth=1 \
https://github.com/llvm/llvm-project llvm-project
git clone -b v14.0.0 --depth=1 \
git clone -b v15.0.0 --depth=1 \
https://github.com/KhronosGroup/SPIRV-LLVM-Translator llvm-project/llvm/projects/SPIRV-LLVM-Translator
mkdir llvm-project/build

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
set -e
set -o xtrace
@@ -9,5 +9,5 @@ apt-get install -y --no-remove \
g++-mingw-w64-i686 \
g++-mingw-w64-x86-64
. .gitlab-ci/container/debian/x86_build-mingw-patch.sh
. .gitlab-ci/container/debian/x86_build-mingw-source-deps.sh
. .gitlab-ci/container/debian/x86_64_build-mingw-patch.sh
. .gitlab-ci/container/debian/x86_64_build-mingw-source-deps.sh

View File

@@ -1,10 +1,11 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
export LLVM_VERSION="${LLVM_VERSION:=15}"
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
@@ -21,11 +22,11 @@ apt-get update
apt-get install -y --no-remove \
$STABLE_EPHEMERAL \
check \
clang \
libasan6 \
clang-${LLVM_VERSION} \
libasan8 \
libarchive-dev \
libclang-cpp13-dev \
libclang-cpp11-dev \
libdrm-dev \
libclang-cpp${LLVM_VERSION}-dev \
libgbm-dev \
libglvnd-dev \
liblua5.3-dev \
@@ -39,8 +40,7 @@ apt-get install -y --no-remove \
libxcb-xfixes0-dev \
libxcb1-dev \
libxml2-dev \
llvm-13-dev \
llvm-11-dev \
llvm-${LLVM_VERSION}-dev \
ocl-icd-opencl-dev \
python3-pip \
python3-venv \
@@ -72,8 +72,6 @@ rm -rf $XORGMACROS_VERSION
. .gitlab-ci/container/build-libclc.sh
. .gitlab-ci/container/build-libdrm.sh
. .gitlab-ci/container/build-wayland.sh
pushd /usr/local
@@ -83,20 +81,18 @@ cd shader-db
make
popd
git clone https://github.com/microsoft/DirectX-Headers -b v1.606.4 --depth 1
mkdir -p DirectX-Headers/build
pushd DirectX-Headers/build
meson .. --backend=ninja --buildtype=release -Dbuild-test=false
ninja
ninja install
git clone https://github.com/microsoft/DirectX-Headers -b v1.711.3-preview --depth 1
pushd DirectX-Headers
meson setup build --backend=ninja --buildtype=release -Dbuild-test=false
meson install -C build
popd
rm -rf DirectX-Headers
python3 -m pip install -r .gitlab-ci/lava/requirements.txt
python3 -m pip install --break-system-packages -r .gitlab-ci/lava/requirements.txt
# install bindgen
RUSTFLAGS='-L native=/usr/local/lib' cargo install \
bindgen --version 0.59.2 \
bindgen-cli --version 0.62.0 \
-j ${FDO_CI_CONCURRENT:-4} \
--root /usr/local

View File

@@ -2,7 +2,7 @@ set(CMAKE_SYSTEM_NAME Windows)
set(CMAKE_SYSTEM_PROCESSOR x86_64)
set(CMAKE_SYSROOT /usr/x86_64-w64-mingw32/)
set(ENV{PKG_CONFIG} /usr/x86_64-w64-mingw32/bin/pkg-config)
set(ENV{PKG_CONFIG} /usr/x86_64-w64-mingw32/bin/pkgconf)
set(CMAKE_C_COMPILER x86_64-w64-mingw32-gcc-posix)
set(CMAKE_CXX_COMPILER x86_64-w64-mingw32-g++-posix)

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -e
@@ -8,7 +8,9 @@ export DEBIAN_FRONTEND=noninteractive
apt-get install -y ca-certificates gnupg2 software-properties-common
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list.d/*
export LLVM_VERSION="${LLVM_VERSION:=15}"
# Ephemeral packages (installed for this script and removed again at
# the end)
@@ -20,13 +22,14 @@ STABLE_EPHEMERAL=" \
bzip2 \
ccache \
cmake \
clang-11 \
clang-${LLVM_VERSION} \
flex \
glslang-tools \
g++ \
libasound2-dev \
libcap-dev \
libclang-cpp11-dev \
libclang-cpp${LLVM_VERSION}-dev \
libdrm-dev \
libegl-dev \
libelf-dev \
libepoxy-dev \
@@ -36,12 +39,12 @@ STABLE_EPHEMERAL=" \
libwayland-dev \
libx11-xcb-dev \
libxext-dev \
llvm-13-dev \
llvm-11-dev \
llvm-${LLVM_VERSION}-dev \
make \
meson \
openssh-server \
patch \
pkg-config \
pkgconf \
protobuf-compiler \
python3-dev \
python3-pip \
@@ -52,30 +55,27 @@ STABLE_EPHEMERAL=" \
xz-utils \
"
# Add llvm 13 to the build image
apt-key add .gitlab-ci/container/debian/llvm-snapshot.gpg.key
add-apt-repository "deb https://apt.llvm.org/bullseye/ llvm-toolchain-bullseye-13 main"
apt-get update
apt-get dist-upgrade -y
apt-get install -y \
sysvinit-core
apt-get install --purge -y \
sysvinit-core libelogind0
apt-get install -y --no-remove \
apt-utils \
curl \
git \
git-lfs \
inetutils-syslogd \
iptables \
jq \
libasan6 \
libasan8 \
libdrm2 \
libexpat1 \
libllvm13 \
libllvm11 \
libllvm${LLVM_VERSION} \
liblz4-1 \
libpng16-16 \
libpython3.9 \
libpython3.11 \
libvulkan1 \
libwayland-client0 \
libwayland-server0 \
@@ -118,13 +118,10 @@ mkdir -p /lava-files/
# Needed for ci-fairy, this revision is able to upload files to MinIO
# and doesn't depend on git
pip3 install git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
pip3 install --break-system-packages git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
# Needed for manipulation with traces yaml files.
pip3 install yq
# Needed for crosvm compilation.
update-alternatives --install /usr/bin/clang clang /usr/bin/clang-11 100
pip3 install --break-system-packages yq
############### Build LLVM-SPIRV translator
@@ -134,10 +131,6 @@ update-alternatives --install /usr/bin/clang clang /usr/bin/clang-11 100
. .gitlab-ci/container/build-libclc.sh
############### Build libdrm
. .gitlab-ci/container/build-libdrm.sh
############### Build Wayland
. .gitlab-ci/container/build-wayland.sh

View File

@@ -1,24 +1,26 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
export LLVM_VERSION="${LLVM_VERSION:=15}"
apt-get install -y libelogind0 # this interfere with systemd deps, install separately
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
bzip2 \
ccache \
clang-13 \
clang-11 \
clang-${LLVM_VERSION} \
cmake \
g++ \
glslang-tools \
libasound2-dev \
libcap-dev \
libclang-cpp13-dev \
libclang-cpp11-dev \
libclang-cpp${LLVM_VERSION}-dev \
libdrm-dev \
libgles2-mesa-dev \
libpciaccess-dev \
libpng-dev \
@@ -31,13 +33,12 @@ STABLE_EPHEMERAL=" \
libxkbcommon-dev \
libxrandr-dev \
libxrender-dev \
llvm-13-dev \
llvm-11-dev \
llvm-${LLVM_VERSION}-dev \
make \
meson \
ocl-icd-opencl-dev \
patch \
pkg-config \
pkgconf \
python3-distutils \
xz-utils \
"
@@ -48,10 +49,8 @@ apt-get install -y --no-remove \
$STABLE_EPHEMERAL \
clinfo \
iptables \
libclang-common-13-dev \
libclang-common-11-dev \
libclang-cpp13 \
libclang-cpp11 \
libclang-common-${LLVM_VERSION}-dev \
libclang-cpp${LLVM_VERSION} \
libcap2 \
libegl1 \
libepoxy0 \
@@ -62,6 +61,7 @@ apt-get install -y --no-remove \
python3-renderdoc \
python3-simplejson \
spirv-tools \
sysvinit-core \
weston

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
# The relative paths in this file only become valid at runtime.
# shellcheck disable=SC1091
# shellcheck disable=SC2086 # we want word splitting
@@ -8,6 +8,8 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y libelogind0 # this interfere with systemd deps, install separately
# Ephemeral packages (installed for this script and removed again at the end)
STABLE_EPHEMERAL=" \
ccache \
@@ -18,6 +20,7 @@ STABLE_EPHEMERAL=" \
glslang-tools \
libexpat1-dev \
gnupg2 \
libdrm-dev \
libgbm-dev \
libgles2-mesa-dev \
liblz4-dev \
@@ -38,7 +41,7 @@ STABLE_EPHEMERAL=" \
mingw-w64-x86-64-dev \
p7zip \
patch \
pkg-config \
pkgconf \
python3-dev \
python3-distutils \
python3-pip \
@@ -57,26 +60,17 @@ apt-get install -y --no-remove --no-install-recommends \
pciutils \
python3-lxml \
python3-simplejson \
sysvinit-core \
weston \
xwayland \
wine \
wine64 \
xinit \
xserver-xorg-video-amdgpu \
xserver-xorg-video-ati
# Install a more recent version of Wine than exists in Debian.
apt-key add .gitlab-ci/container/debian/winehq.gpg.key
apt-add-repository https://dl.winehq.org/wine-builds/debian/
apt-get update -q
# workaround wine needing 32-bit
# https://bugs.winehq.org/show_bug.cgi?id=53393
apt-get install -y --no-remove wine-stable-amd64 # a requirement for wine-stable
WINE_PKG="wine-stable"
WINE_PKG_DROP="wine-stable-i386"
apt-get download "${WINE_PKG}"
dpkg --ignore-depends="${WINE_PKG_DROP}" -i "${WINE_PKG}"*.deb
rm "${WINE_PKG}"*.deb
sed -i "/${WINE_PKG_DROP}/d" /var/lib/dpkg/status
apt-get install -y --no-remove winehq-stable # symlinks-only, depends on wine-stable
############### Install DXVK
. .gitlab-ci/container/setup-wine.sh "/dxvk-wine64"
@@ -86,7 +80,7 @@ apt-get install -y --no-remove winehq-stable # symlinks-only, depends on wine-s
. .gitlab-ci/container/install-wine-apitrace.sh
# Add the apitrace path to the registry
wine64 \
wine \
reg add "HKEY_LOCAL_MACHINE\System\CurrentControlSet\Control\Session Manager\Environment" \
/v Path \
/t REG_EXPAND_SZ \
@@ -135,3 +129,5 @@ apt-get purge -y \
$STABLE_EPHEMERAL
apt-get autoremove -y --purge
#dpkg -r --force-depends "mesa-vulkan-drivers" "mesa-vdpau-drivers" "mesa-va-drivers" "libgl1-mesa-dri" "libglx-mesa0" "vdpau-driver-all" "va-driver-all" "libglx0" "libgl1" "libvdpau-va-gl1" "libglu1-mesa" "libegl-mesa0" "libgl1-mesa-dri" "libglapi-mesa" "libosmesa6"

View File

@@ -0,0 +1,111 @@
#!/usr/bin/env bash
# shellcheck disable=SC1091
set -e
set -o xtrace
EPHEMERAL=(
autoconf
automake
bzip2
cmake
git
libtool
"pkgconfig(epoxy)"
"pkgconfig(gbm)"
"pkgconfig(openssl)"
unzip
xz
)
DEPS=(
bindgen
bison
ccache
clang-devel
flex
gcc
gcc-c++
gettext
glslang
kernel-headers
llvm-devel
meson
"pkgconfig(LLVMSPIRVLib)"
"pkgconfig(SPIRV-Tools)"
"pkgconfig(dri2proto)"
"pkgconfig(expat)"
"pkgconfig(glproto)"
"pkgconfig(libclc)"
"pkgconfig(libelf)"
"pkgconfig(libglvnd)"
"pkgconfig(libomxil-bellagio)"
"pkgconfig(libselinux)"
"pkgconfig(libva)"
"pkgconfig(pciaccess)"
"pkgconfig(vdpau)"
"pkgconfig(vulkan)"
"pkgconfig(x11)"
"pkgconfig(x11-xcb)"
"pkgconfig(xcb)"
"pkgconfig(xcb-dri2)"
"pkgconfig(xcb-dri3)"
"pkgconfig(xcb-glx)"
"pkgconfig(xcb-present)"
"pkgconfig(xcb-randr)"
"pkgconfig(xcb-sync)"
"pkgconfig(xcb-xfixes)"
"pkgconfig(xdamage)"
"pkgconfig(xext)"
"pkgconfig(xfixes)"
"pkgconfig(xrandr)"
"pkgconfig(xshmfence)"
"pkgconfig(xxf86vm)"
"pkgconfig(zlib)"
procps-ng
python-unversioned-command
python3-devel
python3-mako
python3-ply
rust-packaging
vulkan-headers
spirv-tools-devel
spirv-llvm-translator-devel
)
dnf install -y --setopt=install_weak_deps=False "${DEPS[@]}" "${EPHEMERAL[@]}"
. .gitlab-ci/container/container_pre_build.sh
# dependencies where we want a specific version
export XORG_RELEASES=https://xorg.freedesktop.org/releases/individual
export XORGMACROS_VERSION=util-macros-1.19.0
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
-O $XORG_RELEASES/util/$XORGMACROS_VERSION.tar.bz2
tar -xvf $XORGMACROS_VERSION.tar.bz2 && rm $XORGMACROS_VERSION.tar.bz2
cd $XORGMACROS_VERSION; ./configure; make install; cd ..
rm -rf $XORGMACROS_VERSION
. .gitlab-ci/container/build-mold.sh
. .gitlab-ci/container/build-libdrm.sh
. .gitlab-ci/container/build-wayland.sh
pushd /usr/local
git clone https://gitlab.freedesktop.org/mesa/shader-db.git --depth 1
rm -rf shader-db/.git
cd shader-db
make
popd
############### Uninstall the build software
dnf remove -y "${EPHEMERAL[@]}"
. .gitlab-ci/container/container_post_build.sh

View File

@@ -1,105 +0,0 @@
#!/bin/bash
# shellcheck disable=SC2086 # we want word splitting
set -e
set -o xtrace
EPHEMERAL="
autoconf
automake
bzip2
cmake
git
libtool
pkgconfig(epoxy)
pkgconfig(gbm)
pkgconfig(openssl)
unzip
xz
"
dnf install -y --setopt=install_weak_deps=False \
bison \
clang-devel \
flex \
gcc \
gcc-c++ \
gettext \
glslang \
kernel-headers \
llvm-devel \
meson \
"pkgconfig(dri2proto)" \
"pkgconfig(expat)" \
"pkgconfig(glproto)" \
"pkgconfig(libclc)" \
"pkgconfig(libelf)" \
"pkgconfig(libglvnd)" \
"pkgconfig(libomxil-bellagio)" \
"pkgconfig(libselinux)" \
"pkgconfig(libva)" \
"pkgconfig(pciaccess)" \
"pkgconfig(vdpau)" \
"pkgconfig(vulkan)" \
"pkgconfig(x11)" \
"pkgconfig(x11-xcb)" \
"pkgconfig(xcb)" \
"pkgconfig(xcb-dri2)" \
"pkgconfig(xcb-dri3)" \
"pkgconfig(xcb-glx)" \
"pkgconfig(xcb-present)" \
"pkgconfig(xcb-randr)" \
"pkgconfig(xcb-sync)" \
"pkgconfig(xcb-xfixes)" \
"pkgconfig(xdamage)" \
"pkgconfig(xext)" \
"pkgconfig(xfixes)" \
"pkgconfig(xrandr)" \
"pkgconfig(xshmfence)" \
"pkgconfig(xxf86vm)" \
"pkgconfig(zlib)" \
procps-ng \
python-unversioned-command \
python3-devel \
python3-mako \
python3-ply \
vulkan-headers \
spirv-tools-devel \
spirv-llvm-translator-devel \
$EPHEMERAL
. .gitlab-ci/container/container_pre_build.sh
# dependencies where we want a specific version
export XORG_RELEASES=https://xorg.freedesktop.org/releases/individual
export XORGMACROS_VERSION=util-macros-1.19.0
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
-O $XORG_RELEASES/util/$XORGMACROS_VERSION.tar.bz2
tar -xvf $XORGMACROS_VERSION.tar.bz2 && rm $XORGMACROS_VERSION.tar.bz2
cd $XORGMACROS_VERSION; ./configure; make install; cd ..
rm -rf $XORGMACROS_VERSION
. .gitlab-ci/container/build-mold.sh
. .gitlab-ci/container/build-libdrm.sh
. .gitlab-ci/container/build-wayland.sh
pushd /usr/local
git clone https://gitlab.freedesktop.org/mesa/shader-db.git --depth 1
rm -rf shader-db/.git
cd shader-db
make
popd
############### Uninstall the build software
dnf remove -y $EPHEMERAL
. .gitlab-ci/container/container_post_build.sh

View File

@@ -51,7 +51,7 @@
- .incorporate-templates-commit
- .use-wine
variables:
FDO_DISTRIBUTION_VERSION: bullseye-slim
FDO_DISTRIBUTION_VERSION: bookworm-slim
FDO_REPO_SUFFIX: $CI_JOB_NAME
FDO_DISTRIBUTION_EXEC: 'bash .gitlab-ci/container/${CI_JOB_NAME}.sh'
# no need to pull the whole repo to build the container image
@@ -64,80 +64,81 @@
# Don't want the .container rules
- .build-rules
# Debian 11 based x86 build image base
debian/x86_build-base:
# Debian based x86_64 build image base
debian/x86_64_build-base:
extends:
- .fdo.container-build@debian
- .container
variables:
MESA_IMAGE_TAG: &debian-x86_build-base ${DEBIAN_BASE_TAG}
MESA_IMAGE_TAG: &debian-x86_64_build-base ${DEBIAN_BASE_TAG}
.use-debian/x86_build-base:
.use-debian/x86_64_build-base:
extends:
- .fdo.container-build@debian
- .use-base-image
variables:
MESA_BASE_IMAGE: ${DEBIAN_X86_BUILD_BASE_IMAGE}
MESA_BASE_TAG: *debian-x86_build-base
MESA_ARTIFACTS_BASE_TAG: *debian-x86_build-base
MESA_BASE_IMAGE: ${DEBIAN_X86_64_BUILD_BASE_IMAGE}
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_ARTIFACTS_BASE_TAG: *debian-x86_64_build-base
needs:
- debian/x86_build-base
- debian/x86_64_build-base
# Debian 11 based x86 main build image
debian/x86_build:
# Debian based x86_64 main build image
debian/x86_64_build:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
variables:
MESA_IMAGE_TAG: &debian-x86_build ${DEBIAN_BUILD_TAG}
MESA_IMAGE_TAG: &debian-x86_64_build ${DEBIAN_BUILD_TAG}
.use-debian/x86_build:
.use-debian/x86_64_build:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_build-base
MESA_IMAGE_PATH: ${DEBIAN_X86_BUILD_IMAGE_PATH}
MESA_IMAGE_TAG: *debian-x86_build
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_IMAGE_PATH: ${DEBIAN_X86_64_BUILD_IMAGE_PATH}
MESA_IMAGE_TAG: *debian-x86_64_build
needs:
- debian/x86_build
- debian/x86_64_build
# Debian 11 based i386 cross-build image
debian/i386_build:
# Debian based x86_32 cross-build image
debian/x86_32_build:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
variables:
MESA_IMAGE_TAG: &debian-i386_build ${DEBIAN_BUILD_TAG}
MESA_IMAGE_TAG: &debian-x86_32_build ${DEBIAN_BUILD_TAG}
.use-debian/i386_build:
.use-debian/x86_32_build:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_build-base
MESA_IMAGE_PATH: "debian/i386_build"
MESA_IMAGE_TAG: *debian-i386_build
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_IMAGE_PATH: "debian/x86_32_build"
MESA_IMAGE_TAG: *debian-x86_32_build
needs:
- debian/i386_build
- debian/x86_32_build
# Debian 11 based x86-mingw cross main build image
debian/x86_build-mingw:
# Debian based x86_64-mingw cross main build image
# FIXME: Until gets fixed on Debian 12, disabled.
.debian/x86_64_build-mingw:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
variables:
MESA_IMAGE_TAG: &debian-x86_build_mingw ${DEBIAN_BUILD_MINGW_TAG}
MESA_IMAGE_TAG: &debian-x86_64_build_mingw ${DEBIAN_BUILD_MINGW_TAG}
.use-debian/x86_build_mingw:
.use-debian/x86_64_build_mingw:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_build-base
MESA_IMAGE_PATH: ${DEBIAN_X86_BUILD_MINGW_IMAGE_PATH}
MESA_IMAGE_TAG: *debian-x86_build_mingw
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_IMAGE_PATH: ${DEBIAN_X86_64_BUILD_MINGW_IMAGE_PATH}
MESA_IMAGE_TAG: *debian-x86_64_build_mingw
needs:
- debian/x86_build-mingw
- .debian/x86_64_build-mingw
# Debian 11 based ppc64el cross-build image
# Debian based ppc64el cross-build image
debian/ppc64el_build:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
variables:
MESA_IMAGE_TAG: &debian-ppc64el_build ${DEBIAN_BUILD_TAG}
@@ -145,16 +146,16 @@ debian/ppc64el_build:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_build-base
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_IMAGE_PATH: "debian/ppc64el_build"
MESA_IMAGE_TAG: *debian-ppc64el_build
needs:
- debian/ppc64el_build
# Debian 11 based s390x cross-build image
# Debian based s390x cross-build image
debian/s390x_build:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
variables:
MESA_IMAGE_TAG: &debian-s390x_build ${DEBIAN_BUILD_TAG}
@@ -162,7 +163,7 @@ debian/s390x_build:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_build-base
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_IMAGE_PATH: "debian/s390x_build"
MESA_IMAGE_TAG: *debian-s390x_build
needs:
@@ -171,7 +172,7 @@ debian/s390x_build:
# Android NDK cross-build image
debian/android_build:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
variables:
MESA_IMAGE_TAG: &debian-android_build ${DEBIAN_BUILD_TAG}
ANDROID_SDK_VERSION: 33
@@ -181,134 +182,147 @@ debian/android_build:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_build-base
MESA_BASE_TAG: *debian-x86_64_build-base
MESA_IMAGE_PATH: "debian/android_build"
MESA_IMAGE_TAG: *debian-android_build
needs:
- debian/android_build
# Debian 11 based x86 test image base
debian/x86_test-base:
extends: debian/x86_build-base
# Debian based x86_64 test image base
debian/x86_64_test-base:
extends: debian/x86_64_build-base
variables:
KERNEL_URL: &kernel-rootfs-url "https://gitlab.freedesktop.org/gfx-ci/linux/-/archive/v6.1-for-mesa-ci-439f86d0051b/linux-v6.1-for-mesa-ci-439f86d0051b.tar.bz2"
MESA_IMAGE_TAG: &debian-x86_test-base ${DEBIAN_BASE_TAG}
KERNEL_URL: &kernel-rootfs-url "https://gitlab.freedesktop.org/gfx-ci/linux/-/archive/v6.3-for-mesa-ci-43c973a8ff91/linux-v6.3-for-mesa-ci-6fc749a2a59a.tar.bz2"
MESA_IMAGE_TAG: &debian-x86_64_test-base ${DEBIAN_BASE_TAG}
.use-debian/x86_test-base:
.use-debian/x86_64_test-base:
extends:
- .fdo.container-build@debian
- .use-base-image
variables:
MESA_BASE_IMAGE: ${DEBIAN_X86_TEST_BASE_IMAGE}
MESA_BASE_TAG: *debian-x86_test-base
MESA_BASE_IMAGE: ${DEBIAN_X86_64_TEST_BASE_IMAGE}
MESA_BASE_TAG: *debian-x86_64_test-base
needs:
- debian/x86_test-base
- debian/x86_64_test-base
# Debian 11 based x86 test image for GL
debian/x86_test-gl:
extends: .use-debian/x86_test-base
# Debian based x86_64 test image for GL
debian/x86_64_test-gl:
extends: .use-debian/x86_64_test-base
variables:
MESA_IMAGE_TAG: &debian-x86_test-gl ${DEBIAN_X86_TEST_GL_TAG}
MESA_IMAGE_TAG: &debian-x86_64_test-gl ${DEBIAN_X86_64_TEST_GL_TAG}
.use-debian/x86_test-gl:
.use-debian/x86_64_test-gl:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_test-base
MESA_IMAGE_PATH: ${DEBIAN_X86_TEST_IMAGE_GL_PATH}
MESA_IMAGE_TAG: *debian-x86_test-gl
MESA_BASE_TAG: *debian-x86_64_test-base
MESA_IMAGE_PATH: ${DEBIAN_X86_64_TEST_IMAGE_GL_PATH}
MESA_IMAGE_TAG: *debian-x86_64_test-gl
needs:
- debian/x86_test-gl
- debian/x86_64_test-gl
# Debian 11 based x86 test image for VK
debian/x86_test-vk:
extends: .use-debian/x86_test-base
# Debian based x86_64 test image for VK
debian/x86_64_test-vk:
extends: .use-debian/x86_64_test-base
variables:
MESA_IMAGE_TAG: &debian-x86_test-vk ${DEBIAN_X86_TEST_VK_TAG}
MESA_IMAGE_TAG: &debian-x86_64_test-vk ${DEBIAN_X86_64_TEST_VK_TAG}
.use-debian/x86_test-vk:
.use-debian/x86_64_test-vk:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_test-base
MESA_IMAGE_PATH: ${DEBIAN_X86_TEST_IMAGE_VK_PATH}
MESA_IMAGE_TAG: *debian-x86_test-vk
MESA_BASE_TAG: *debian-x86_64_test-base
MESA_IMAGE_PATH: ${DEBIAN_X86_64_TEST_IMAGE_VK_PATH}
MESA_IMAGE_TAG: *debian-x86_64_test-vk
needs:
- debian/x86_test-vk
- debian/x86_64_test-vk
# Debian 11 based x86 test image for Android
debian/x86_test-android:
extends: .use-debian/x86_test-base
# Debian based x86_64 test image for Android
debian/x86_64_test-android:
extends: .use-debian/x86_64_test-base
variables:
MESA_IMAGE_TAG: &debian-x86_test-android ${DEBIAN_X86_TEST_ANDROID_TAG}
MESA_IMAGE_TAG: &debian-x86_64_test-android ${DEBIAN_X86_64_TEST_ANDROID_TAG}
ANDROID_NDK: android-ndk-r25b
.use-debian/x86_test-android:
.use-debian/x86_64_test-android:
extends:
- .set-image-base-tag
variables:
MESA_BASE_TAG: *debian-x86_test-base
MESA_IMAGE_PATH: ${DEBIAN_X86_TEST_ANDROID_IMAGE_PATH}
MESA_IMAGE_TAG: *debian-x86_test-android
MESA_BASE_TAG: *debian-x86_64_test-base
MESA_IMAGE_PATH: ${DEBIAN_X86_64_TEST_ANDROID_IMAGE_PATH}
MESA_IMAGE_TAG: *debian-x86_64_test-android
needs:
- debian/x86_test-android
- debian/x86_64_test-android
# Debian 11 based ARM build image
debian/arm_build:
# Debian based ARM build image
debian/arm64_build:
extends:
- .fdo.container-build@debian
- .container
tags:
- aarch64
variables:
MESA_IMAGE_TAG: &debian-arm_build ${DEBIAN_BASE_TAG}
MESA_IMAGE_TAG: &debian-arm64_build ${DEBIAN_BASE_TAG}
.use-debian/arm_build:
.use-debian/arm64_build:
extends:
- .set-image
variables:
MESA_IMAGE_PATH: "debian/arm_build"
MESA_IMAGE_TAG: *debian-arm_build
MESA_ARTIFACTS_TAG: *debian-arm_build
MESA_IMAGE_PATH: "debian/arm64_build"
MESA_IMAGE_TAG: *debian-arm64_build
MESA_ARTIFACTS_TAG: *debian-arm64_build
needs:
- debian/arm_build
- debian/arm64_build
# Alpine based x86 build image
alpine/x86_build:
# Alpine based x86_64 build image
.alpine/x86_64_build-base:
extends:
- .fdo.container-build@alpine
- .container
variables:
FDO_DISTRIBUTION_VERSION: "3.17"
MESA_IMAGE_TAG: &alpine-x86_build ${ALPINE_X86_BUILD_TAG}
FDO_DISTRIBUTION_VERSION: "3.18"
.use-alpine/x86_build:
# Alpine based x86_64 build image
alpine/x86_64_build:
extends:
- .alpine/x86_64_build-base
variables:
MESA_IMAGE_TAG: &alpine-x86_64_build ${ALPINE_X86_64_BUILD_TAG}
.use-alpine/x86_64_build:
extends:
- .set-image
variables:
MESA_IMAGE_PATH: "alpine/x86_build"
MESA_IMAGE_TAG: *alpine-x86_build
MESA_IMAGE_PATH: "alpine/x86_64_build"
MESA_IMAGE_TAG: *alpine-x86_64_build
needs:
- alpine/x86_build
- alpine/x86_64_build
# Fedora 36 based x86 build image
fedora/x86_build:
# Alpine based x86_64 image for LAVA SSH dockerized client
alpine/x86_64_lava_ssh_client:
extends:
- .alpine/x86_64_build-base
variables:
MESA_IMAGE_TAG: &alpine-x86_64_lava_ssh_client ${ALPINE_X86_64_LAVA_SSH_TAG}
# Fedora based x86_64 build image
fedora/x86_64_build:
extends:
- .fdo.container-build@fedora
- .container
variables:
FDO_DISTRIBUTION_VERSION: 36
MESA_IMAGE_TAG: &fedora-x86_build ${FEDORA_X86_BUILD_TAG}
FDO_DISTRIBUTION_VERSION: 38
MESA_IMAGE_TAG: &fedora-x86_64_build ${FEDORA_X86_64_BUILD_TAG}
.use-fedora/x86_build:
.use-fedora/x86_64_build:
extends:
- .set-image
variables:
MESA_IMAGE_PATH: "fedora/x86_build"
MESA_IMAGE_TAG: *fedora-x86_build
MESA_IMAGE_PATH: "fedora/x86_64_build"
MESA_IMAGE_TAG: *fedora-x86_64_build
needs:
- fedora/x86_build
- fedora/x86_64_build
.kernel+rootfs:
@@ -323,25 +337,25 @@ fedora/x86_build:
script:
- .gitlab-ci/container/lava_build.sh
kernel+rootfs_amd64:
kernel+rootfs_x86_64:
extends:
- .use-debian/x86_build-base
- .use-debian/x86_64_build-base
- .kernel+rootfs
image: "$FDO_BASE_IMAGE"
variables:
DEBIAN_ARCH: "amd64"
DISTRIBUTION_TAG: &distribution-tag-amd64 "${MESA_ROOTFS_TAG}--${MESA_ARTIFACTS_BASE_TAG}--${MESA_TEMPLATES_COMMIT}"
DISTRIBUTION_TAG: &distribution-tag-x86_64 "${MESA_ROOTFS_TAG}--${MESA_ARTIFACTS_BASE_TAG}--${MESA_TEMPLATES_COMMIT}"
kernel+rootfs_arm64:
extends:
- .use-debian/arm_build
- .use-debian/arm64_build
- .kernel+rootfs
tags:
- aarch64
variables:
DEBIAN_ARCH: "arm64"
kernel+rootfs_armhf:
kernel+rootfs_arm32:
extends:
- kernel+rootfs_arm64
variables:
@@ -353,12 +367,12 @@ kernel+rootfs_armhf:
DISTRIBUTION_TAG: *distribution-tag-arm
MESA_ROOTFS_TAG: *kernel-rootfs
.use-kernel+rootfs-amd64:
.use-kernel+rootfs-x86_64:
variables:
DISTRIBUTION_TAG: *distribution-tag-amd64
DISTRIBUTION_TAG: *distribution-tag-x86_64
MESA_ROOTFS_TAG: *kernel-rootfs
# x86 image with ARM64 & armhf kernel & rootfs for baremetal testing
# x86_64 image with ARM64 & ARM32 kernel & rootfs for baremetal testing
.debian/arm_test:
extends:
- .fdo.container-build@debian
@@ -367,18 +381,18 @@ kernel+rootfs_armhf:
- .build-rules
variables:
FDO_DISTRIBUTION_TAG: "${MESA_IMAGE_TAG}--${MESA_ROOTFS_TAG}--${MESA_TEMPLATES_COMMIT}"
ARTIFACTS_PREFIX: "https://${MINIO_HOST}/mesa-lava"
ARTIFACTS_PREFIX: "https://${S3_HOST}/mesa-lava"
ARTIFACTS_SUFFIX: "${MESA_ROOTFS_TAG}--${MESA_ARTIFACTS_TAG}--${MESA_TEMPLATES_COMMIT}"
MESA_ARTIFACTS_TAG: *debian-arm_build
MESA_ARTIFACTS_TAG: *debian-arm64_build
MESA_ROOTFS_TAG: *kernel-rootfs
debian/armhf_test:
debian/arm32_test:
extends:
- .debian/arm_test
needs:
- kernel+rootfs_armhf
- kernel+rootfs_arm32
variables:
MESA_IMAGE_TAG: &debian-armhf_test ${DEBIAN_BASE_TAG}
MESA_IMAGE_TAG: &debian-arm32_test ${DEBIAN_BASE_TAG}
debian/arm64_test:
extends:
@@ -392,13 +406,13 @@ debian/arm64_test:
variables:
MESA_ROOTFS_TAG: *kernel-rootfs
.use-debian/armhf_test:
.use-debian/arm32_test:
image: "$CI_REGISTRY_IMAGE/${MESA_IMAGE_PATH}:${MESA_IMAGE_TAG}--${MESA_ROOTFS_TAG}--${MESA_TEMPLATES_COMMIT}"
extends:
- .use-debian/arm_test
variables:
MESA_IMAGE_PATH: "debian/armhf_test"
MESA_IMAGE_TAG: *debian-armhf_test
MESA_IMAGE_PATH: "debian/arm32_test"
MESA_IMAGE_TAG: *debian-arm32_test
needs:
- debian/arm_test
@@ -436,8 +450,7 @@ debian/arm64_test:
- .container
- .windows-docker-vs2019
rules:
- if: '$MICROSOFT_FARM == "offline"'
when: never
- !reference [.microsoft-farm-container-rules, rules]
- !reference [.container-rules, rules]
variables:
GIT_STRATEGY: fetch # we do actually need the full repository though
@@ -467,8 +480,7 @@ windows_build_vs2019:
extends:
- .windows_container_build
rules:
- if: '$MICROSOFT_FARM == "offline"'
when: never
- !reference [.microsoft-farm-rules, rules]
- !reference [.build-rules, rules]
variables:
MESA_IMAGE_PATH: &windows_build_image_path ${WINDOWS_X64_BUILD_PATH}
@@ -487,8 +499,7 @@ windows_test_vs2019:
extends:
- .windows_container_build
rules:
- if: '$MICROSOFT_FARM == "offline"'
when: never
- !reference [.microsoft-farm-rules, rules]
- !reference [.build-rules, rules]
variables:
MESA_IMAGE_PATH: &windows_test_image_path ${WINDOWS_X64_TEST_PATH}

View File

@@ -1,40 +1,27 @@
#!/bin/bash
#!/usr/bin/env bash
set -e
overrideDll() {
if ! wine reg add 'HKEY_CURRENT_USER\Software\Wine\DllOverrides' /v "$1" /d native /f; then
echo -e "Failed to add override for $1"
exit 1
fi
}
dxvk_install_release() {
local DXVK_VERSION=${1:-"1.10.3"}
local DXVK_VERSION=${1:?}
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 \
-O "https://github.com/doitsujin/dxvk/releases/download/v${DXVK_VERSION}/dxvk-${DXVK_VERSION}.tar.gz"
tar xzpf dxvk-"${DXVK_VERSION}".tar.gz
# https://github.com/doitsujin/dxvk/issues/2921
sed -i 's/wine="wine"/wine="wine32"/' "dxvk-${DXVK_VERSION}"/setup_dxvk.sh
"dxvk-${DXVK_VERSION}"/setup_dxvk.sh install
cp "dxvk-${DXVK_VERSION}"/x64/*.dll "$WINEPREFIX/drive_c/windows/system32/"
overrideDll d3d9
overrideDll d3d10core
overrideDll d3d11
overrideDll dxgi
rm -rf "dxvk-${DXVK_VERSION}"
rm dxvk-"${DXVK_VERSION}".tar.gz
}
# Install from a Github PR number
dxvk_install_pr() {
local __prnum=$1
# NOTE: Clone all the ensite history of the repo so as not to think
# harder about cloning just enough for 'git describe' to work. 'git
# describe' is used by the dxvk build system to generate a
# dxvk_version Meson variable, which is nice-to-have.
git clone https://github.com/doitsujin/dxvk
pushd dxvk
git fetch origin pull/"$__prnum"/head:pr
git checkout pr
./package-release.sh pr ../dxvk-build --no-package
popd
pushd ./dxvk-build/dxvk-pr
./setup_dxvk.sh install
popd
rm -rf ./dxvk-build ./dxvk
}
dxvk_install_release "1.10.1"
#dxvk_install_pr 2359
dxvk_install_release "2.1"

View File

@@ -1,23 +1,27 @@
#!/bin/bash
#!/usr/bin/env bash
# shellcheck disable=SC1091 # The relative paths in this file only become valid at runtime.
# shellcheck disable=SC2034 # Variables are used in scripts called from here
# shellcheck disable=SC2086 # we want word splitting
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# KERNEL_ROOTFS_TAG
set -e
set -o xtrace
export DEBIAN_FRONTEND=noninteractive
export LLVM_VERSION="${LLVM_VERSION:=15}"
check_minio()
{
MINIO_PATH="${MINIO_HOST}/mesa-lava/$1/${DISTRIBUTION_TAG}/${DEBIAN_ARCH}"
if curl -L --retry 4 -f --retry-all-errors --retry-delay 60 -s -X HEAD \
"https://${MINIO_PATH}/done"; then
S3_PATH="${S3_HOST}/mesa-lava/$1/${DISTRIBUTION_TAG}/${DEBIAN_ARCH}"
if curl -L --retry 4 -f --retry-delay 60 -s -X HEAD \
"https://${S3_PATH}/done"; then
echo "Remote files are up-to-date, skip rebuilding them."
exit
fi
}
# If remote files are up-to-date, skip rebuilding them
check_minio "${FDO_UPSTREAM_REPO}"
check_minio "${CI_PROJECT_PATH}"
@@ -32,18 +36,19 @@ if [[ "$DEBIAN_ARCH" = "arm64" ]]; then
SKQP_ARCH="arm64"
DEFCONFIG="arch/arm64/configs/defconfig"
DEVICE_TREES="arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/apq8016-sbc.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/apq8096-db820c.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown-r1.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/apq8016-sbc.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/apq8096-db820c.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-limozeen-nots-r5.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown-r1.dtb"
DEVICE_TREES+=" arch/arm64/boot/dts/qcom/sm8350-hdk.dtb"
KERNEL_IMAGE_NAME="Image"
elif [[ "$DEBIAN_ARCH" = "armhf" ]]; then
@@ -90,10 +95,10 @@ apt-get install -y --no-remove \
${ARCH_PACKAGES} \
automake \
bc \
clang \
clang-${LLVM_VERSION} \
cmake \
curl \
debootstrap \
mmdebstrap \
git \
glslang-tools \
libdrm-dev \
@@ -116,6 +121,7 @@ apt-get install -y --no-remove \
libxkbcommon-dev \
libwayland-dev \
ninja-build \
openssh-server \
patch \
protobuf-compiler \
python-is-python3 \
@@ -142,76 +148,148 @@ if [[ "$DEBIAN_ARCH" = "armhf" ]]; then
libxkbcommon-dev:armhf
fi
mkdir -p "/lava-files/rootfs-${DEBIAN_ARCH}"
ROOTFS=/lava-files/rootfs-${DEBIAN_ARCH}
mkdir -p "$ROOTFS"
# rootfs packages
PKG_BASE=(
tzdata mount
)
PKG_CI=(
firmware-realtek
bash ca-certificates curl
initramfs-tools jq netcat-openbsd dropbear openssh-server
libasan8
git
python3-dev python3-pip python3-setuptools python3-wheel
weston # Wayland
xinit xserver-xorg-core xwayland # X11
)
PKG_MESA_DEP=(
libdrm2 libsensors5 libexpat1 # common
libvulkan1 # vulkan
libx11-6 libx11-xcb1 libxcb-dri2-0 libxcb-dri3-0 libxcb-glx0 libxcb-present0 libxcb-randr0 libxcb-shm0 libxcb-sync1 libxcb-xfixes0 libxdamage1 libxext6 libxfixes3 libxkbcommon0 libxrender1 libxshmfence1 libxxf86vm1 # X11
)
PKG_DEP=(
libpng16-16
libwaffle-1-0
libpython3.11 python3 python3-lxml python3-mako python3-numpy python3-packaging python3-pil python3-renderdoc python3-requests python3-simplejson python3-yaml # Python
sntp
strace
waffle-utils
zstd
)
# arch dependent rootfs packages
[ "$DEBIAN_ARCH" = "arm64" ] && PKG_ARCH=(
libgl1 libglu1-mesa
libvulkan-dev
firmware-linux-nonfree firmware-qcom-media
libfontconfig1
)
[ "$DEBIAN_ARCH" = "amd64" ] && PKG_ARCH=(
firmware-amd-graphics
libgl1 libglu1-mesa
inetutils-syslogd iptables libcap2
libfontconfig1
spirv-tools
libelf1 libfdt1 "libllvm${LLVM_VERSION}"
libva2 libva-drm2
libvulkan-dev
socat
sysvinit-core
wine
)
[ "$DEBIAN_ARCH" = "armhf" ] && PKG_ARCH=(
firmware-misc-nonfree
)
mmdebstrap \
--variant=apt \
--arch="${DEBIAN_ARCH}" \
--components main,contrib,non-free-firmware \
--include "${PKG_BASE[*]} ${PKG_CI[*]} ${PKG_DEP[*]} ${PKG_MESA_DEP[*]} ${PKG_ARCH[*]}" \
bookworm \
"$ROOTFS/" \
"http://deb.debian.org/debian"
############### Setuping
if [ "$DEBIAN_ARCH" = "amd64" ]; then
. .gitlab-ci/container/setup-wine.sh "/dxvk-wine64"
. .gitlab-ci/container/install-wine-dxvk.sh
mv /dxvk-wine64 "/lava-files/rootfs-${DEBIAN_ARCH}/"
mv /dxvk-wine64 $ROOTFS
fi
############### Installing
. .gitlab-ci/container/install-wine-apitrace.sh
mkdir -p "/lava-files/rootfs-${DEBIAN_ARCH}/apitrace-msvc-win64"
mv /apitrace-msvc-win64/bin "/lava-files/rootfs-${DEBIAN_ARCH}/apitrace-msvc-win64"
rm -rf /apitrace-msvc-win64
if [ "$DEBIAN_ARCH" = "amd64" ]; then
. .gitlab-ci/container/install-wine-apitrace.sh
mkdir -p "$ROOTFS/apitrace-msvc-win64"
mv /apitrace-msvc-win64/bin "$ROOTFS/apitrace-msvc-win64"
rm -rf /apitrace-msvc-win64
fi
############### Building
STRIP_CMD="${GCC_ARCH}-strip"
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/usr/lib/$GCC_ARCH
mkdir -p $ROOTFS/usr/lib/$GCC_ARCH
############### Build Vulkan validation layer (for zink)
if [ "$DEBIAN_ARCH" = "amd64" ]; then
. .gitlab-ci/container/build-vulkan-validation.sh
mv /usr/lib/x86_64-linux-gnu/libVkLayer_khronos_validation.so $ROOTFS/usr/lib/x86_64-linux-gnu/
mkdir -p $ROOTFS/usr/share/vulkan/explicit_layer.d
mv /usr/share/vulkan/explicit_layer.d/* $ROOTFS/usr/share/vulkan/explicit_layer.d/
fi
############### Build apitrace
. .gitlab-ci/container/build-apitrace.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/apitrace
mv /apitrace/build /lava-files/rootfs-${DEBIAN_ARCH}/apitrace
mkdir -p $ROOTFS/apitrace
mv /apitrace/build $ROOTFS/apitrace
rm -rf /apitrace
############### Build ANGLE
if [[ "$DEBIAN_ARCH" = "amd64" ]]; then
. .gitlab-ci/container/build-angle.sh
mv /angle /lava-files/rootfs-${DEBIAN_ARCH}/.
rm -rf /angle
fi
############### Build dEQP runner
. .gitlab-ci/container/build-deqp-runner.sh
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin
mv /usr/local/bin/*-runner /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin/.
mkdir -p $ROOTFS/usr/bin
mv /usr/local/bin/*-runner $ROOTFS/usr/bin/.
############### Build dEQP
DEQP_TARGET=surfaceless . .gitlab-ci/container/build-deqp.sh
mv /deqp /lava-files/rootfs-${DEBIAN_ARCH}/.
mv /deqp $ROOTFS/.
############### Build SKQP
if [[ "$DEBIAN_ARCH" = "arm64" ]] \
|| [[ "$DEBIAN_ARCH" = "amd64" ]]; then
. .gitlab-ci/container/build-skqp.sh
mv /skqp /lava-files/rootfs-${DEBIAN_ARCH}/.
mv /skqp $ROOTFS/.
fi
############### Build piglit
PIGLIT_OPTS="-DPIGLIT_BUILD_DMA_BUF_TESTS=ON -DPIGLIT_BUILD_GLX_TESTS=ON" . .gitlab-ci/container/build-piglit.sh
mv /piglit /lava-files/rootfs-${DEBIAN_ARCH}/.
mv /piglit $ROOTFS/.
############### Build libva tests
if [[ "$DEBIAN_ARCH" = "amd64" ]]; then
. .gitlab-ci/container/build-va-tools.sh
mv /va/bin/* /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin/
mv /va/bin/* $ROOTFS/usr/bin/
fi
############### Build Crosvm
if [[ ${DEBIAN_ARCH} = "amd64" ]]; then
. .gitlab-ci/container/build-crosvm.sh
mv /usr/local/bin/crosvm /lava-files/rootfs-${DEBIAN_ARCH}/usr/bin/
mv /usr/local/lib/$GCC_ARCH/libvirglrenderer.* /lava-files/rootfs-${DEBIAN_ARCH}/usr/lib/$GCC_ARCH/
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/usr/local/libexec/
mv /usr/local/libexec/virgl* /lava-files/rootfs-${DEBIAN_ARCH}/usr/local/libexec/
mv /usr/local/bin/crosvm $ROOTFS/usr/bin/
mv /usr/local/lib/libvirglrenderer.* $ROOTFS/usr/lib/$GCC_ARCH/
mkdir -p $ROOTFS/usr/local/libexec/
mv /usr/local/libexec/virgl* $ROOTFS/usr/local/libexec/
fi
############### Build libdrm
EXTRA_MESON_ARGS+=" -D prefix=/libdrm"
. .gitlab-ci/container/build-libdrm.sh
############### Build local stuff for use by igt and kernel testing, which
############### will reuse most of our container build process from a specific
############### hash of the Mesa tree.
@@ -227,48 +305,26 @@ fi
rm -rf /root/.cargo
rm -rf /root/.rustup
############### Create rootfs
set +e
if ! debootstrap \
--variant=minbase \
--arch=${DEBIAN_ARCH} \
--components main,contrib,non-free \
bullseye \
/lava-files/rootfs-${DEBIAN_ARCH}/ \
http://deb.debian.org/debian; then
cat /lava-files/rootfs-${DEBIAN_ARCH}/debootstrap/debootstrap.log
exit 1
fi
set -e
############### Fill rootfs
cp .gitlab-ci/container/setup-rootfs.sh $ROOTFS/.
cp .gitlab-ci/container/strip-rootfs.sh $ROOTFS/.
cp .gitlab-ci/container/debian/llvm-snapshot.gpg.key $ROOTFS/.
cp .gitlab-ci/container/debian/winehq.gpg.key $ROOTFS/.
chroot $ROOTFS bash /setup-rootfs.sh
rm $ROOTFS/{llvm-snapshot,winehq}.gpg.key
rm "$ROOTFS/setup-rootfs.sh"
rm "$ROOTFS/strip-rootfs.sh"
cp /etc/wgetrc $ROOTFS/etc/.
cp .gitlab-ci/container/create-rootfs.sh /lava-files/rootfs-${DEBIAN_ARCH}/.
cp .gitlab-ci/container/debian/llvm-snapshot.gpg.key /lava-files/rootfs-${DEBIAN_ARCH}/.
cp .gitlab-ci/container/debian/winehq.gpg.key /lava-files/rootfs-${DEBIAN_ARCH}/.
chroot /lava-files/rootfs-${DEBIAN_ARCH} sh /create-rootfs.sh
rm /lava-files/rootfs-${DEBIAN_ARCH}/{llvm-snapshot,winehq}.gpg.key
rm /lava-files/rootfs-${DEBIAN_ARCH}/create-rootfs.sh
cp /etc/wgetrc /lava-files/rootfs-${DEBIAN_ARCH}/etc/.
############### Install the built libdrm
# Dependencies pulled during the creation of the rootfs may overwrite
# the built libdrm. Hence, we add it after the rootfs has been already
# created.
find /libdrm/ -name lib\*\.so\* \
-exec cp -t /lava-files/rootfs-${DEBIAN_ARCH}/usr/lib/$GCC_ARCH/. {} \;
mkdir -p /lava-files/rootfs-${DEBIAN_ARCH}/libdrm/
cp -Rp /libdrm/share /lava-files/rootfs-${DEBIAN_ARCH}/libdrm/share
rm -rf /libdrm
if [ ${DEBIAN_ARCH} = arm64 ]; then
if [ "${DEBIAN_ARCH}" = "arm64" ]; then
mkdir -p /lava-files/rootfs-arm64/lib/firmware/qcom/sm8350/ # for firmware imported later
# Make a gzipped copy of the Image for db410c.
gzip -k /lava-files/Image
KERNEL_IMAGE_NAME+=" Image.gz"
fi
du -ah /lava-files/rootfs-${DEBIAN_ARCH} | sort -h | tail -100
pushd /lava-files/rootfs-${DEBIAN_ARCH}
du -ah "$ROOTFS" | sort -h | tail -100
pushd $ROOTFS
tar --zstd -cf /lava-files/lava-rootfs.tar.zst .
popd
@@ -284,8 +340,8 @@ fi
for f in $FILES_TO_UPLOAD; do
ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" /lava-files/$f \
https://${MINIO_PATH}/$f
https://${S3_PATH}/$f
done
touch /lava-files/done
ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" /lava-files/done https://${MINIO_PATH}/done
ci-fairy s3cp --token-file "${CI_JOB_JWT_FILE}" /lava-files/done https://${S3_PATH}/done

View File

@@ -0,0 +1,31 @@
#!/usr/bin/env bash
# shellcheck disable=SC1091 # The relative paths in this file only become valid at runtime.
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# KERNEL_ROOTFS_TAG
set -ex
export DEBIAN_FRONTEND=noninteractive
# Needed for ci-fairy, this revision is able to upload files to
# MinIO and doesn't depend on git
pip3 install --break-system-packages git+http://gitlab.freedesktop.org/freedesktop/ci-templates@ffe4d1b10aab7534489f0c4bbc4c5899df17d3f2
# Needed for manipulation with traces yaml files.
pip3 install --break-system-packages yq
passwd root -d
chsh -s /bin/sh
cat > /init <<EOF
#!/bin/sh
export PS1=lava-shell:
exec sh
EOF
chmod +x /init
# Copy timezone file and remove tzdata package
rm -rf /etc/localtime
cp /usr/share/zoneinfo/Etc/UTC /etc/localtime
. strip-rootfs.sh

View File

@@ -1,4 +1,4 @@
#!/bin/bash
#!/usr/bin/env bash
export WINEPREFIX="$1"
export WINEDEBUG="-all"
@@ -13,7 +13,7 @@ Windows Registry Editor Version 5.00
EOF
# Set the wine prefix and disable the crash dialog
wine64 regedit crashdialog.reg
wine regedit crashdialog.reg
rm crashdialog.reg
# An immediate wine command may fail with: "${WINEPREFIX}: Not a

View File

@@ -0,0 +1,133 @@
#!/usr/bin/env bash
# Strip the image to a small minimal system.
# When changing this file, you need to bump the following
# .gitlab-ci/image-tags.yml tags:
# KERNEL_ROOTFS_TAG
set -ex
export DEBIAN_FRONTEND=noninteractive
UNNEEDED_PACKAGES=(
libfdisk1 git
python3-dev python3-pip python3-setuptools python3-wheel
)
# Removing unused packages
for PACKAGE in "${UNNEEDED_PACKAGES[@]}"
do
if ! apt-get remove --purge --yes "${PACKAGE}"
then
echo "WARNING: ${PACKAGE} isn't installed"
fi
done
apt-get autoremove --yes || true
UNNEEDED_PACKAGES=(
apt libapt-pkg6.0
ncurses-bin ncurses-base libncursesw6 libncurses6
perl-base
debconf libdebconfclient0
e2fsprogs e2fslibs libfdisk1
insserv
udev
init-system-helpers
cpio
passwd
libsemanage1 libsemanage-common
libsepol1
gpgv
hostname
adduser
debian-archive-keyring
libegl1-mesa-dev # mesa group
libegl-mesa0
libgl1-mesa-dev
libgl1-mesa-dri
libglapi-mesa
libgles2-mesa-dev
libglx-mesa0
mesa-common-dev
gnupg2
software-properties-common
)
# Removing unneeded packages
for PACKAGE in "${UNNEEDED_PACKAGES[@]}"
do
if ! dpkg --purge --force-remove-essential --force-depends "${PACKAGE}"
then
echo "WARNING: ${PACKAGE} isn't installed"
fi
done
# Show what's left package-wise before dropping dpkg itself
COLUMNS=300 dpkg-query -W --showformat='${Installed-Size;10}\t${Package}\n' | sort -k1,1n
# Drop dpkg
dpkg --purge --force-remove-essential --force-depends dpkg
# directories for a removal
directories=(
/var/log/* # logs
/usr/share/doc/* # docs, i18n, etc.
/usr/share/locale/*
/usr/share/X11/locale/*
/usr/share/man
/usr/share/i18n/*
/usr/share/info/*
/usr/share/lintian/*
/usr/share/common-licenses/*
/usr/share/mime/*
/usr/share/bug
/lib/udev/hwdb.bin # udev hwdb not required on a stripped system
/lib/udev/hwdb.d/*
/usr/bin/iconv # gconv conversions && binaries
/usr/sbin/iconvconfig
/usr/lib/*/gconv/
/usr/sbin/update-usbids # libusb db
/usr/share/misc/usb.ids
/var/lib/usbutils/usb.ids
/root/.pip # pip cache
/root/.cache
/etc/apt # configuration archives of apt and dpkg
/etc/dpkg
/var/* # drop non-ostree directories
/srv
/share
/usr/share/ca-certificates # certificates are in /etc
/usr/share/bash-completion # completions
/usr/share/zsh/vendor-completions
/usr/share/gcc # gcc python helpers
/etc/inid.d # sysvinit leftovers
/etc/rc[0-6S].d
/etc/init
/usr/lib/lsb
/usr/lib/xtables # xtrables helpers
/usr/lib/locale/* # should we keep C locale?
/usr/sbin/*fdisk # partitioning
/usr/bin/localedef # local compiler
/usr/sbin/ldconfig* # only needed when adding libs
/usr/games
/usr/lib/*/security/pam_userdb.so # Remove pam module to authenticate against a DB
/usr/lib/*/libdb-5.3.so # libdb-5.3.so that is only used by this pam module ^
/usr/lib/*/libnss_hesiod* # remove NSS support for nis, nisplus and hesiod
/usr/lib/*/libnss_nis*
)
for directory in "${directories[@]}"; do
rm -rf "$directory" || echo "Failed to remove $directory! Update scripts!"
done
files=(
'*systemd-resolve*' # systemd dns resolver
'*networkd*' # systemd network configuration
'*timesyncd*' # systemd ntp
'systemd-hwdb*' # systemd hw database
'*fuse*' # FUSE
)
for files in "${files[@]}"; do
find /usr /etc -name "$files" -prune -exec rm -r {} \;
done

View File

@@ -1,5 +1,6 @@
#!/usr/bin/env bash
# shellcheck disable=SC1091 # The relative paths in this file only become valid at runtime.
# shellcheck disable=SC2086 # we want word splitting
set -e
VSOCK_STDOUT=$1
@@ -10,6 +11,8 @@ mount -t proc none /proc
mount -t sysfs none /sys
mkdir -p /dev/pts
mount -t devpts devpts /dev/pts
mkdir /dev/shm
mount -t tmpfs -o noexec,nodev,nosuid tmpfs /dev/shm
mount -t tmpfs tmpfs /tmp
. ${VM_TEMP_DIR}/crosvm-env.sh

View File

@@ -1,5 +1,5 @@
#!/bin/sh
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
set -e
# If run outside of a deqp-runner invoction (e.g. piglit trace replay), then act
@@ -35,7 +35,7 @@ set_vsock_context() {
rm -rf $VM_TEMP_DIR
mkdir $VM_TEMP_DIR || return 1
VSOCK_CID=$(((CI_JOB_ID & 0x1ffffff) | ((${THREAD} & 0x7f) << 25)))
VSOCK_CID=$(((CI_JOB_ID & 0x1ffffff) | ((THREAD & 0x7f) << 25)))
VSOCK_STDOUT=5001
VSOCK_STDERR=5002
@@ -66,7 +66,7 @@ set_vsock_context || { echo "Could not generate crosvm vsock CID" >&2; exit 1; }
echo "Variables passed through:"
SCRIPT_DIR=$(readlink -en "${0%/*}")
${SCRIPT_DIR}/common/generate-env.sh | tee ${VM_TEMP_DIR}/crosvm-env.sh
cp ${SCRIPTS_DIR}/setup-test-env.sh ${VM_TEMP_DIR}/setup-test-env.sh
cp ${SCRIPT_DIR}/setup-test-env.sh ${VM_TEMP_DIR}/setup-test-env.sh
# Set the crosvm-script as the arguments of the current script
echo ". ${VM_TEMP_DIR}/setup-test-env.sh" > ${VM_TEMP_DIR}/crosvm-script.sh
@@ -101,7 +101,7 @@ crosvm --no-syslog run \
--gpu "${CROSVM_GPU_ARGS}" --gpu-render-server "path=/usr/local/libexec/virgl_render_server" \
-m "${CROSVM_MEMORY:-4096}" -c "${CROSVM_CPU:-2}" --disable-sandbox \
--shared-dir /:my_root:type=fs:writeback=true:timeout=60:cache=always \
--host-ip "192.168.30.1" --netmask "255.255.255.0" --mac "AA:BB:CC:00:00:12" \
--net "host-ip=192.168.30.1,netmask=255.255.255.0,mac=AA:BB:CC:00:00:12" \
-s $VM_SOCKET \
--cid ${VSOCK_CID} -p "${CROSVM_KERN_ARGS}" \
/lava-files/${KERNEL_IMAGE_NAME:-bzImage} > ${VM_TEMP_DIR}/crosvm 2>&1

View File

@@ -1,4 +1,6 @@
#!/usr/bin/env bash
# shellcheck disable=SC2086 # we want word splitting
section_start cuttlefish_setup "cuttlefish: setup"
set -xe
@@ -26,6 +28,7 @@ ADB="adb -s vsock:3:5555"
$ADB root
sleep 1
$ADB shell echo Hi from Android
# shellcheck disable=SC2035
$ADB logcat dEQP:D *:S &
# overlay vendor
@@ -44,15 +47,15 @@ $ADB shell setenforce 0
# deqp
$ADB push /deqp/modules/egl/deqp-egl /data/.
$ADB push /deqp/modules/egl/deqp-egl-android /data/.
$ADB push /deqp/assets/gl_cts/data/mustpass/egl/aosp_mustpass/3.2.6.x/egl-master.txt /data/.
$ADB push /deqp-runner/deqp-runner /data/.
# download mesa-x86_64-android.tar.zst
MESA_ANDROID_ARTIFACT_URL=https://${PIPELINE_ARTIFACTS_BASE}/${MINIO_ARTIFACT_NAME}.tar.zst
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 -o ${MINIO_ARTIFACT_NAME}.tar.zst ${MESA_ANDROID_ARTIFACT_URL}
tar -xvf ${MINIO_ARTIFACT_NAME}.tar.zst
# download Android Mesa from S3
MESA_ANDROID_ARTIFACT_URL=https://${PIPELINE_ARTIFACTS_BASE}/${S3_ARTIFACT_NAME}.tar.zst
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 -o ${S3_ARTIFACT_NAME}.tar.zst ${MESA_ANDROID_ARTIFACT_URL}
tar -xvf ${S3_ARTIFACT_NAME}.tar.zst
rm "${S3_ARTIFACT_NAME}.tar.zst" &
$ADB push install/all-skips.txt /data/.
$ADB push install/$GPU_VERSION-flakes.txt /data/.
@@ -89,7 +92,7 @@ RESULTS=/data/results
uncollapsed_section_switch cuttlefish_test "cuttlefish: testing"
set +e
$ADB shell "mkdir /data/results; cd /data; strace -o /data/results/out.strace -f -s 1000 ./deqp-runner \
$ADB shell "mkdir /data/results; cd /data; ./deqp-runner \
suite \
--suite /data/deqp-$DEQP_SUITE.toml \
--output $RESULTS \
@@ -97,7 +100,7 @@ $ADB shell "mkdir /data/results; cd /data; strace -o /data/results/out.strace -f
--flakes /data/$GPU_VERSION-flakes.txt \
--testlog-to-xml /deqp/executor/testlog-to-xml \
--fraction-start $CI_NODE_INDEX \
--fraction `expr $CI_NODE_TOTAL \* ${DEQP_FRACTION:-1}` \
--fraction $(( CI_NODE_TOTAL * ${DEQP_FRACTION:-1})) \
--jobs ${FDO_CI_CONCURRENT:-4} \
$DEQP_RUNNER_OPTIONS"

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