Add release notes for the 10.4.2 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Update version to 10.4.2
2015-01-12 10:30:28 +00:00 · 2015-01-12 10:24:59 +00:00 · 2015-01-07 17:39:52 +00:00 · 2015-01-07 17:35:39 +00:00 · 2015-01-07 17:31:12 +00:00 · 2015-01-07 17:29:01 +00:00
288 changed files with 2220 additions and 8795 deletions
--- a/2
+++ b/2
@@ -1 +1 @@
-10.5.0-devel
+10.4.2
--- a/bin/.cherry-ignore
+++ b/bin/.cherry-ignore
@@ -0,0 +1,2 @@
+# No whitespace commits in stable.
+a10bf5c10caf27232d4df8da74d5c35c23eb883d
--- a/configure.ac
+++ b/configure.ac
@@ -252,8 +252,16 @@ AC_SUBST([VISIBILITY_CXXFLAGS])
 dnl
 dnl Optional flags, check for compiler support
 dnl
+SSE41_CFLAGS="-msse4.1"
+dnl Code compiled by GCC with -msse* assumes a 16 byte aligned
+dnl stack, but on x86-32 such alignment is not guaranteed.
+case "$target_cpu" in
+i?86)
+    SSE41_CFLAGS="$SSE41_CFLAGS -mstackrealign"
+    ;;
+esac
 save_CFLAGS="$CFLAGS"
-CFLAGS="-msse4.1 $CFLAGS"
+CFLAGS="$SSE41_CFLAGS $CFLAGS"
 AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
 #include <smmintrin.h>
 int main () {
@@ -266,6 +274,7 @@ if test "x$SSE41_SUPPORTED" = x1; then
    DEFINES="$DEFINES -DUSE_SSE41"
 fi
 AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1])
+AC_SUBST([SSE41_CFLAGS], $SSE41_CFLAGS)

 dnl Can't have static and shared libraries, default to static if user
 dnl explicitly requested. If both disabled, set to static since shared
@@ -2085,6 +2094,8 @@ AM_CONDITIONAL(HAVE_SPARC_ASM, test "x$asm_arch" = xsparc)

 AC_SUBST([NINE_MAJOR], 1)
 AC_SUBST([NINE_MINOR], 0)
+AC_SUBST([NINE_TINY], 0)
+AC_SUBST([NINE_VERSION], "$NINE_MAJOR.$NINE_MINOR.$NINE_TINY")

 AC_SUBST([VDPAU_MAJOR], 1)
 AC_SUBST([VDPAU_MINOR], 0)
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -191,7 +191,7 @@ GL 4.5, GLSL 4.50:
  GL_ARB_conditional_render_inverted                   DONE (i965, nv50, nvc0, llvmpipe, softpipe)
  GL_ARB_cull_distance                                 not started
  GL_ARB_derivative_control                            DONE (i965, nv50, nvc0, r600)
-  GL_ARB_direct_state_access                           started (Laura Ekstrand)
+  GL_ARB_direct_state_access                           not started
  GL_ARB_get_texture_sub_image                         started (Brian Paul)
  GL_ARB_shader_texture_image_samples                  not started
  GL_ARB_texture_barrier                               DONE (nv50, nvc0, r300, r600, radeonsi)
--- a/docs/index.html
+++ b/docs/index.html
@@ -16,10 +16,11 @@

 <h1>News</h1>

-<h2>November 21, 2014</h2>
+<h2>December 14, 2014</h2>
 <p>
-<a href="relnotes/10.3.4.html">Mesa 10.3.4</a> is released.
-This is a bug-fix release.
+<a href="relnotes/10.4.html">Mesa 10.4</a> is released.  This is a new
+development release.  See the release notes for more information about
+the release.
 </p>

 <h2>November 8, 2014</h2>
--- a/docs/relnotes.html
+++ b/docs/relnotes.html
@@ -21,7 +21,7 @@ The release notes summarize what's new or changed in each Mesa release.
 </p>

 <ul>
-<li><a href="relnotes/10.3.4.html">10.3.4 release notes</a>
+<li><a href="relnotes/10.4.html">10.4 release notes</a>
 <li><a href="relnotes/10.3.3.html">10.3.3 release notes</a>
 <li><a href="relnotes/10.3.2.html">10.3.2 release notes</a>
 <li><a href="relnotes/10.3.1.html">10.3.1 release notes</a>
--- a/docs/relnotes/10.2.html
+++ b/docs/relnotes/10.2.html
@@ -88,6 +88,8 @@ following options during configure, if you would like support for svga driver
 Note: The files are installed in $(libdir)/gallium-pipe/ and the interface
 between them and libxatracker.so is <strong>not</strong> stable.
 </p>
+
+<li>The environment variable GALLIUM_MSAA that forced a multisample GLX visual was removed.</li>
 </ul>

 </div>
--- a/docs/relnotes/10.3.4.html
+++ b/docs/relnotes/10.3.4.html
@@ -1,106 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 10.3.4 Release Notes / November 21, 2014</h1>
-
-<p>
-Mesa 10.3.4 is a bug fix release which fixes bugs found since the 10.3.3 release.
-</p>
-<p>
-Mesa 10.3.4 implements the OpenGL 3.3 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
-3.3 is <strong>only</strong> available if requested at context creation
-because compatibility contexts are not supported.
-</p>
-
-<h2>SHA256 checksums</h2>
-<pre>
-26482495ef6177f889dbd87c7edcccfedd995598785bbbd7e3e066352574c8e0  MesaLib-10.3.4.tar.gz
-e6373913142338d10515daf619d659433bfd2989988198930c13b0945a15e98a  MesaLib-10.3.4.tar.bz2
-8c3ebbb6535daf3414305860ebca6ac67dbb6e3d35058c7a6ce18b84b5945b7f  MesaLib-10.3.4.zip
-</pre>
-
-<h2>New features</h2>
-<p>None</p>
-
-<h2>Bug fixes</h2>
-
-<p>This list is likely incomplete.</p>
-
-<ul>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76252">Bug 76252</a> - Dynamic loading/unloading of opengl32.dll results in a deadlock</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78770">Bug 78770</a> - [SNB bisected]Webglc conformance/textures/texture-size-limit.html fails</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83500">Bug 83500</a> - si_dma_copy_tile causes GPU hangs</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85647">Bug 85647</a> - Random radeonsi crashes with mesa 10.3.x</li>
-
-</ul>
-
-<h2>Changes</h2>
-<p>Brian Paul (1):</p>
-<ul>
-  <li>st/mesa: copy sampler_array_size field when copying instructions</li>
-</ul>
-
-<p>Chad Versace (1):</p>
-<ul>
-  <li>i965: Fix segfault in WebGL Conformance on Ivybridge</li>
-</ul>
-
-<p>Dave Airlie (5):</p>
-<ul>
-  <li>r600g/cayman: fix integer multiplication output overwrite (v2)</li>
-  <li>r600g/cayman: fix texture gather tests</li>
-  <li>r600g/cayman: handle empty vertex shaders</li>
-  <li>r600g: geom shaders: always load texture src regs from inputs</li>
-  <li>r600g: limit texture offset application to specific types (v2)</li>
-</ul>
-
-<p>Emil Velikov (3):</p>
-<ul>
-  <li>docs: Add sha256 sums for the 10.3.3 release</li>
-  <li>configure.ac: roll up a program for the sse4.1 check</li>
-  <li>get-pick-list.sh: Require explicit "10.3" for nominating stable patches</li>
-</ul>
-
-<p>Ilia Mirkin (1):</p>
-<ul>
-  <li>st/mesa: add a fallback for clear_with_quad when no vs_layer</li>
-</ul>
-
-<p>José Fonseca (1):</p>
-<ul>
-  <li>llvmpipe: Avoid deadlock when unloading opengl32.dll</li>
-</ul>
-
-<p>Kenneth Graunke (1):</p>
-<ul>
-  <li>i915g: we also have more than 0 viewports!</li>
-</ul>
-
-<p>Michel Dänzer (1):</p>
-<ul>
-  <li>radeonsi: Disable asynchronous DMA except for PIPE_BUFFER</li>
-</ul>
-
-</div>
-</body>
-</html>
--- a/docs/relnotes/10.3.html
+++ b/docs/relnotes/10.3.html
@@ -327,6 +327,7 @@ DRM drivers that don't have a full-fledged GEM (such as qxl or simpledrm)</li>
 <li>Removed support for the GL_ATI_envmap_bumpmap extension</li>
 <li>The hacky --enable-32/64-bit is no longer available in configure. To build
 32/64 bit mesa refer to the default method recommended by your distribution</li>
+</li>The environment variable GALLIUM_MSAA that forced a multisample GLX visual was removed.</li>
 </ul>

 </div>
--- a/docs/relnotes/10.4.1.html
+++ b/docs/relnotes/10.4.1.html
@@ -0,0 +1,97 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.1 Release Notes / December 29, 2014</h1>
+
+<p>
+Mesa 10.4.1 is a bug fix release which fixes bugs found since the 10.4.0 release.
+</p>
+<p>
+Mesa 10.4.1 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+5311285e791a6bfaa468ad002bd1e1164acb3eaa040b5a1bf958bdb7c27e0a9d  MesaLib-10.4.1.tar.gz
+91e8b71c8aff4cb92022a09a872b1c5d1ae5bfec8c6c84dbc4221333da5bf1ca  MesaLib-10.4.1.tar.bz2
+e09c8135f5a86ecb21182c6f8959aafd39ae2f98858fdf7c0e25df65b5abcdb8  MesaLib-10.4.1.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82585">Bug 82585</a> - geometry shader with optional out variable segfaults</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82991">Bug 82991</a> - Inverted bumpmap in webgl applications</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83908">Bug 83908</a> - [i965] Incorrect icon colors in Steam Big Picture</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Andres Gomez (1):</p>
+<ul>
+  <li>i965/brw_reg: struct constructor now needs explicit negate and abs values.</li>
+</ul>
+
+<p>Cody Northrop (1):</p>
+<ul>
+  <li>i965: Require pixel alignment for GPU copy blit</li>
+</ul>
+
+<p>Emil Velikov (3):</p>
+<ul>
+  <li>docs: Add 10.4 sha256 sums, news item and link release notes</li>
+  <li>Revert "glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)"</li>
+  <li>Update version to 10.4.1</li>
+</ul>
+
+<p>Ian Romanick (2):</p>
+<ul>
+  <li>linker: Wrap access of producer_var with a NULL check</li>
+  <li>linker: Assign varying locations geometry shader inputs for SSO</li>
+</ul>
+
+<p>Mario Kleiner (4):</p>
+<ul>
+  <li>glx/dri3: Fix glXWaitForSbcOML() to handle targetSBC==0 correctly. (v2)</li>
+  <li>glx/dri3: Track separate (ust, msc) for PresentPixmap vs. PresentNotifyMsc (v2)</li>
+  <li>glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)</li>
+  <li>glx/dri3: Don't fail on glXSwapBuffersMscOML(dpy, window, 0, 0, 0) (v2)</li>
+</ul>
+
+<p>Maxence Le Doré (1):</p>
+<ul>
+  <li>glsl: Add gl_MaxViewports to available builtin constants</li>
+</ul>
+
+
+</div>
+</body>
+</html>
--- a/docs/relnotes/10.4.2.html
+++ b/docs/relnotes/10.4.2.html
@@ -0,0 +1,125 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.2 Release Notes / January 12, 2015</h1>
+
+<p>
+Mesa 10.4.2 is a bug fix release which fixes bugs found since the 10.4.1 release.
+</p>
+<p>
+Mesa 10.4.2 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85529">Bug 85529</a> - Surfaces not drawn in Unvanquished</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87619">Bug 87619</a> - Changes to state such as render targets change fragment shader without marking it dirty.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87658">Bug 87658</a> - [llvmpipe] SEGV in sse2_has_daz on ancient Pentium4-M</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87913">Bug 87913</a> - CPU cacheline size of 0 can be returned by CPUID leaf 0x80000006 in some virtual machines</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Chad Versace (2):</p>
+<ul>
+  <li>i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()</li>
+  <li>i965: Use safer pointer arithmetic in gather_oa_results()</li>
+</ul>
+
+<p>Dave Airlie (3):</p>
+<ul>
+  <li>Revert "r600g/sb: fix issues cause by GLSL switching to loops for switch"</li>
+  <li>r600g: fix regression since UCMP change</li>
+  <li>r600g/sb: implement r600 gpr index workaround. (v3.1)</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.1 release</li>
+  <li>Update version to 10.4.2</li>
+</ul>
+
+<p>Ilia Mirkin (2):</p>
+<ul>
+  <li>nv50,nvc0: set vertex id base to index_bias</li>
+  <li>nv50/ir: fix texture offsets in release builds</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+  <li>i965: Add missing BRW_NEW_*_PROG_DATA to texture/renderbuffer atoms.</li>
+  <li>i965: Fix start/base_vertex_location for &gt;1 prims but !BRW_NEW_VERTICES.</li>
+</ul>
+
+<p>Leonid Shatz (1):</p>
+<ul>
+  <li>gallium/util: make sure cache line size is not zero</li>
+</ul>
+
+<p>Marek Olšák (4):</p>
+<ul>
+  <li>glsl_to_tgsi: fix a bug in copy propagation</li>
+  <li>vbo: ignore primitive restart if FixedIndex is enabled in DrawArrays</li>
+  <li>st/mesa: fix GL_PRIMITIVE_RESTART_FIXED_INDEX</li>
+  <li>radeonsi: fix VertexID for OpenGL</li>
+</ul>
+
+<p>Michel Dänzer (1):</p>
+<ul>
+  <li>radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+  <li>gallium/util: fix crash with daz detection on x86</li>
+</ul>
+
+<p>Tiziano Bacocco (1):</p>
+<ul>
+  <li>nv50,nvc0: implement half_pixel_center</li>
+</ul>
+
+<p>Vadim Girlin (1):</p>
+<ul>
+  <li>r600g/sb: fix issues with loops created for switch</li>
+</ul>
+
+
+</div>
+</body>
+</html>
--- a/docs/relnotes/10.4.html
+++ b/docs/relnotes/10.4.html
@@ -14,7 +14,7 @@
 <iframe src="../contents.html"></iframe>
 <div class="content">

-<h1>Mesa 10.4 Release Notes / TBD</h1>
+<h1>Mesa 10.4 Release Notes / December 14, 2014</h1>

 <p>
 Mesa 10.4 is a new development release.
@@ -31,9 +31,11 @@ because compatibility contexts are not supported.
 </p>


-<h2>MD5 checksums</h2>
+<h2>SHA256 checksums</h2>
 <pre>
-TBD.
+abfbfd2d91ce81491c5bb6923ae649212ad5f82d0bee277de8704cc948dc221e  MesaLib-10.4.0.tar.gz
+98a7dff3a1a6708c79789de8b9a05d8042e867067f70e8f30387c15026233219  MesaLib-10.4.0.tar.bz2
+443a6d46d0691b5ac811d8d30091b1716c365689b16d49c57cf273c2b76086fe  MesaLib-10.4.0.zip
 </pre>


@@ -54,11 +56,202 @@ Note: some of the new features are only available with certain drivers.

 <h2>Bug fixes</h2>

-TBD.
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79963">Bug 79963</a> - [ILK Bisected]some piglit and ogles2conform cases fail </li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=29661">Bug 29661</a> - MSVC built u_format_test fails on Windows</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=38873">Bug 38873</a> - [855gm] gnome-shell misrendered</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=54372">Bug 54372</a> - GLX_INTEL_swap_event crashes driver when swapping window buffers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60879">Bug 60879</a> - [radeonsi] X11 can't start with acceleration enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61415">Bug 61415</a> - Clover ignores --with-opencl-libdir path</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64471">Bug 64471</a> - Radeon HD6570 lockup in Brütal Legend with HyperZ</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66184">Bug 66184</a> - src/mesa/state_tracker/st_glsl_to_tgsi.cpp:3216:simplify_cmp: Assertion `inst-&gt;dst.index &lt; 4096' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67672">Bug 67672</a> - [llvmpipe] lp_test_arit fails on old CPUs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69200">Bug 69200</a> - [Bisected]Piglit glx/glx-multithread-shader-compile aborted</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70410">Bug 70410</a> - egl-static/Makefile: linking fails with llvm &gt;= 3.4</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72685">Bug 72685</a> - [radeonsi hyperz] Artifacts in Unigine Sanctuary</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72819">Bug 72819</a> - [855GM] Incorrect drop shadow color on windows and strange white rectangle when showing/hiding GLX-dock...</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74563">Bug 74563</a> - Surfaceless contexts are not properly released by DRI drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74863">Bug 74863</a> - [r600g] HyperZ broken on RV770 and CYPRESS (Left 4 Dead 2 trees corruption) bisected!</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=75011">Bug 75011</a> - [hyperz] Performance drop since git-01e6371 (disable hyperz by default) with radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=75112">Bug 75112</a> - Meta Bug for HyperZ issues on r600g and radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76252">Bug 76252</a> - Dynamic loading/unloading of opengl32.dll results in a deadlock</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76861">Bug 76861</a> - mid3 generates slow code for constant arguments</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=77957">Bug 77957</a> - Variably-indexed constant arrays result in terrible shader code</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78468">Bug 78468</a> - Compiling of shader gets stuck in infinite loop</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78770">Bug 78770</a> - [SNB bisected]Webglc conformance/textures/texture-size-limit.html fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79155">Bug 79155</a> - [Tesseract Game] Global Illumination: Medium Causes Color Distortion</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79462">Bug 79462</a> - [NVC0/Codegen] Shader compilation falis in spill logic</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80011">Bug 80011</a> - [softpipe] tgsi/tgsi_exec.c:2023:exec_txf: Assertion `0' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80012">Bug 80012</a> - [softpipe] draw/draw_gs.c:113:tgsi_fetch_gs_outputs: Assertion `!util_is_inf_or_nan(output[slot][0])' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80050">Bug 80050</a> - [855GM] Incorrect drop shadow color under windows in Cinnamon persists with MESA 10.1.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80247">Bug 80247</a> - Khronos conformance test  ES3-CTS.gtf.GL3Tests.transform_feedback.transform_feedback_vertex_id  fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80561">Bug 80561</a> - Incorrect implementation of some VDPAU APIs.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80615">Bug 80615</a> - Files in bellagio directory [omx tracker] don't respect installation folder</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80848">Bug 80848</a> - [dri3] Building mesa fails with dri3 enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81680">Bug 81680</a> - [r600g] Firefox crashes with hardware acceleration turned on</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82255">Bug 82255</a> - [VP2] Chroma planes are vertically stretched during VDPAU playback</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82472">Bug 82472</a> - piglit 16385-consecutive-chars regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82537">Bug 82537</a> - Stunt Rally GLSL compiler assertion failure</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82538">Bug 82538</a> - Super Maryo Chronicles fails with st/mesa assertion failure</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82539">Bug 82539</a> - vmw_screen_dri.lo In file included from vmw_screen_dri.c:41: vmwgfx_drm.h:32:17: error: drm.h: No such file or directory</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82796">Bug 82796</a> - [IVB/BYT-M/HSW/BDW Bisected]Synmark2_v6.0_OglTerrainFlyInst/OglTerrainPanInst cannot run as image validation failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82804">Bug 82804</a> - unreal engine 4 rendering errors</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82828">Bug 82828</a> - Regression: Crash in 3Dmark2001</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82846">Bug 82846</a> - [BDW Bisected] Gpu hang when running Lightsmark v2008/Warsow v1.0/Xonotic v0.7/unigine-demos</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82881">Bug 82881</a> - test_vec4_register_coalesce regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82882">Bug 82882</a> - [swrast] piglit glsl-fs-uniform-bool-1 regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82921">Bug 82921</a> - layout(location=0) emits error &gt;= MAX_UNIFORM_LOCATIONS due to integer underflow</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82929">Bug 82929</a> - [BDW Bisected]glxgears causes X hang</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82932">Bug 82932</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.shaders.indexing.vector_subscript.vec3_static_loop_subscript_write_direct_read_vertex fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83079">Bug 83079</a> - [NVC0] Dota 2 (Linux native and Wine) crash with Nouveau Drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83080">Bug 83080</a> - [SNB+ Bisected]ES3-CTS.shaders.loops.do_while_constant_iterations.mixed_break_continue_fragment fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83081">Bug 83081</a> - [BDW Bisected]Piglit spec_ARB_sample_shading_builtin-gl-sample-mask_2 is core dumped</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83127">Bug 83127</a> - [ILK Bisected]Piglit glean_texCombine fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83148">Bug 83148</a> - Unity invisible under Ubuntu 14.04 and 14.10</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83355">Bug 83355</a> - FTBFS: src/mesa/program/program_lexer.l:122:64: error: unknown type name 'YYSTYPE'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83380">Bug 83380</a> - Linking fails when not writing gl_Position.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83418">Bug 83418</a> - EU IV is incorrectly rendered after git1409011930.d571f2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83432">Bug 83432</a> - r600_query.c:269:r600_emit_query_end: Assertion `ctx-&gt;num_pipelinestat_queries &gt; 0' failed [Gallium HUD]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83463">Bug 83463</a> - [swrast] piglit glsl-vs-clamp-1 regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83468">Bug 83468</a> - [UBO] Using bool from UBO as if-statement condition asserts</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83500">Bug 83500</a> - si_dma_copy_tile causes GPU hangs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83506">Bug 83506</a> - [UBO] row_major layout ignored inside structures</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83533">Bug 83533</a> - [UBO] nested structures don't get appropriate padding</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83573">Bug 83573</a> - [swrast] piglit fs-op-not-bool-using-if regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83574">Bug 83574</a> - [llvmpipe] [softpipe] piglit arb_explicit_uniform_location-use-of-unused-loc regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83741">Bug 83741</a> - [UBO] row_major layout partially ignored for arrays of structures</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83777">Bug 83777</a> - [regression] ilo fails to build</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83934">Bug 83934</a> - Structures must have same name to be considered same type.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84140">Bug 84140</a> - mplayer crashes playing some files using vdpau output</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84145">Bug 84145</a> - UE4: Realistic Rendering Demo render blue</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84178">Bug 84178</a> - Big glamor regression in Xorg server 1.6.99.1 GIT: x11perf 1.5 Test: PutImage XY 500x500 Square</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84355">Bug 84355</a> - texture2DProjLod and textureCubeLod are not supported when using GLES.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84529">Bug 84529</a> - [IVB bisected] glean fragProg1 CMP test failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84538">Bug 84538</a> - lp_test_format.c:226:4: error: too few arguments to function ‘gallivm_create’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84539">Bug 84539</a> - brw_fs_register_coalesce.cpp:183: bool fs_visitor::register_coalesce(): Assertion `src_size &lt;= 11' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84557">Bug 84557</a> - [HSW] &quot;Emit ELSE/ENDIF JIP with type D on Gen 7&quot; causes Atomic Afterlife and GPU hangs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84651">Bug 84651</a> - Distorted graphics or black window when running Battle.net app on Intel hardware via wine</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84662">Bug 84662</a> - Long pauses with Unreal demo Elemental on R9270X since : Always flush the HDP cache before submitting a CS to the GPU</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84777">Bug 84777</a> - [BSW]Piglit spec_glsl-1.50_execution_geometry-basic fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84807">Bug 84807</a> - Build issue starting between bf4aecfb2acc8d0dc815105d2f36eccbc97c284b and a3e9582f09249ad27716ba82c7dfcee685b65d51</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85189">Bug 85189</a> - llvm/invocation.cpp: In function 'void {anonymous}::optimize(llvm::Module*, unsigned int, const std::vector&lt;llvm::Function*&gt;&amp;)': llvm/invocation.cpp:324:18: error: expected type-specifier</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85267">Bug 85267</a> - vlc crashes with vdpau (Radeon 3850HD) [r600]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85377">Bug 85377</a> - lp_test_format failure with llvm-3.6</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85425">Bug 85425</a> - [bisected] Compiler error in clip control operations in meta</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85429">Bug 85429</a> - indirect.c:296: multiple definition of `__indirect_glNewList'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85454">Bug 85454</a> - Unigine Sanctuary with Wine crashes on Mesa Git</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85647">Bug 85647</a> - Random radeonsi crashes with mesa 10.3.x</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85683">Bug 85683</a> - [i965 Bisected]Piglit shaders_glsl-vs-raytrace-bug26691 segfault</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85691">Bug 85691</a> - 'glsl: Drop constant 0.0 components from dot products.' broke piglit shaders/glsl-gnome-shell-dim-window and a few others with Gallium</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86025">Bug 86025</a> - src\glsl\list.h(535) : error C2143: syntax error : missing ';' before 'type'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86089">Bug 86089</a> - [r600g][mesa 10.4.0-dev] shader failure - r600_sb::bc_finalizer::cf_peephole() when starting Second Life</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86145">Bug 86145</a> - Pipeline statistic counter values for VF always 0</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86618">Bug 86618</a> - [NV96] neg modifiers not working in MIN and MAX operations</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86760">Bug 86760</a> - mesa doesn't build: recipe for target 'r600_llvm.lo' failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86764">Bug 86764</a> - [SNB+ Bisected]Piglit glean/pointSprite fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86788">Bug 86788</a> - (bisected) 32bit UrbanTerror 4.1 timedemo sse4.1 segfault...</li>
+
+</ul>

 <h2>Changes</h2>

 <ul>
+<li>The environment variable GALLIUM_MSAA that forced a multisample GLX visual was removed.</li>
 </ul>

 </div>
--- a/src/gallium/Makefile.am
+++ b/src/gallium/Makefile.am
@@ -175,7 +175,6 @@ endif
 ##

 EXTRA_DIST += \
-	include \
 	state_trackers/README \
 	state_trackers/wgl targets/libgl-gdi \
 	targets/graw-gdi targets/graw-null  targets/graw-xlib \
--- a/src/gallium/auxiliary/Makefile.am
+++ b/src/gallium/auxiliary/Makefile.am
@@ -30,7 +30,8 @@ AM_CXXFLAGS += \
 	$(LLVM_CXXFLAGS)

 libgallium_la_SOURCES += \
-	$(GALLIVM_SOURCES)
+	$(GALLIVM_SOURCES) \
+	$(GALLIVM_CPP_SOURCES)

 endif

@@ -45,16 +46,3 @@ indices/u_unfilled_gen.c: $(srcdir)/indices/u_unfilled_gen.py
 util/u_format_table.c: $(srcdir)/util/u_format_table.py $(srcdir)/util/u_format_pack.py $(srcdir)/util/u_format_parse.py $(srcdir)/util/u_format.csv
 	$(AM_V_at)$(MKDIR_P) util
 	$(AM_V_GEN) $(PYTHON2) $(srcdir)/util/u_format_table.py $(srcdir)/util/u_format.csv > $@
-
-EXTRA_DIST = \
-	Android.mk SConscript \
-	indices/u_indices.c \
-	indices/u_unfilled_indices.c \
-	indices/u_indices_gen.py \
-	indices/u_unfilled_gen.py \
-	target-helpers \
-	util/u_format.csv \
-	util/u_format_pack.py \
-	util/u_format_parse.py \
-	util/u_format_table.py \
-	vl/vl_winsys_dri.c
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -1,23 +1,13 @@
 C_SOURCES := \
 	cso_cache/cso_cache.c \
-	cso_cache/cso_cache.h \
 	cso_cache/cso_context.c \
-	cso_cache/cso_context.h \
 	cso_cache/cso_hash.c \
-	cso_cache/cso_hash.h \
-	draw/draw_cliptest_tmp.h \
 	draw/draw_context.c \
-	draw/draw_context.h \
-	draw/draw_decompose_tmp.h \
 	draw/draw_fs.c \
-	draw/draw_fs.h \
 	draw/draw_gs.c \
-	draw/draw_gs.h \
-	draw/draw_gs_tmp.h \
+	draw/draw_pipe.c \
 	draw/draw_pipe_aaline.c \
 	draw/draw_pipe_aapoint.c \
-	draw/draw_pipe.c \
-	draw/draw_pipe.h \
 	draw/draw_pipe_clip.c \
 	draw/draw_pipe_cull.c \
 	draw/draw_pipe_flatshade.c \
@@ -32,309 +22,142 @@ C_SOURCES := \
 	draw/draw_pipe_wide_line.c \
 	draw/draw_pipe_wide_point.c \
 	draw/draw_prim_assembler.c \
-	draw/draw_prim_assembler.h \
-	draw/draw_prim_assembler_tmp.h \
-	draw/draw_private.h \
 	draw/draw_pt.c \
-	draw/draw_pt_decompose.h \
 	draw/draw_pt_emit.c \
 	draw/draw_pt_fetch.c \
 	draw/draw_pt_fetch_emit.c \
 	draw/draw_pt_fetch_shade_emit.c \
 	draw/draw_pt_fetch_shade_pipeline.c \
-	draw/draw_pt.h \
 	draw/draw_pt_post_vs.c \
 	draw/draw_pt_so_emit.c \
 	draw/draw_pt_util.c \
 	draw/draw_pt_vsplit.c \
-	draw/draw_pt_vsplit_tmp.h \
-	draw/draw_so_emit_tmp.h \
-	draw/draw_split_tmp.h \
-	draw/draw_vbuf.h \
 	draw/draw_vertex.c \
-	draw/draw_vertex.h \
 	draw/draw_vs.c \
 	draw/draw_vs_exec.c \
-	draw/draw_vs.h \
 	draw/draw_vs_variant.c \
 	hud/font.c \
-	hud/font.h \
 	hud/hud_context.c \
-	hud/hud_context.h \
 	hud/hud_cpu.c \
-	hud/hud_driver_query.c \
 	hud/hud_fps.c \
-	hud/hud_private.h \
-	indices/u_indices.h \
-	indices/u_indices_priv.h \
+        hud/hud_driver_query.c \
 	indices/u_primconvert.c \
-	indices/u_primconvert.h \
-	os/os_memory_aligned.h \
-	os/os_memory_debug.h \
-	os/os_memory_stdc.h \
-	os/os_memory.h \
 	os/os_misc.c \
-	os/os_misc.h \
-	os/os_mman.h \
 	os/os_process.c \
-	os/os_process.h \
-	os/os_thread.h \
 	os/os_time.c \
-	os/os_time.h \
 	pipebuffer/pb_buffer_fenced.c \
-	pipebuffer/pb_buffer_fenced.h \
-	pipebuffer/pb_buffer.h \
 	pipebuffer/pb_buffer_malloc.c \
 	pipebuffer/pb_bufmgr_alt.c \
 	pipebuffer/pb_bufmgr_cache.c \
 	pipebuffer/pb_bufmgr_debug.c \
-	pipebuffer/pb_bufmgr.h \
 	pipebuffer/pb_bufmgr_mm.c \
 	pipebuffer/pb_bufmgr_ondemand.c \
 	pipebuffer/pb_bufmgr_pool.c \
 	pipebuffer/pb_bufmgr_slab.c \
 	pipebuffer/pb_validate.c \
-	pipebuffer/pb_validate.h \
-	postprocess/filters.h \
-	postprocess/postprocess.h \
 	postprocess/pp_celshade.c \
-	postprocess/pp_celshade.h \
 	postprocess/pp_colors.c \
-	postprocess/pp_colors.h \
-	postprocess/pp_filters.h \
 	postprocess/pp_init.c \
-	postprocess/pp_mlaa_areamap.h \
 	postprocess/pp_mlaa.c \
-	postprocess/pp_mlaa.h \
-	postprocess/pp_private.h \
-	postprocess/pp_program.c \
 	postprocess/pp_run.c \
+	postprocess/pp_program.c \
 	rbug/rbug_connection.c \
-	rbug/rbug_connection.h \
 	rbug/rbug_context.c \
-	rbug/rbug_context.h \
 	rbug/rbug_core.c \
-	rbug/rbug_core.h \
 	rbug/rbug_demarshal.c \
-	rbug/rbug.h \
-	rbug/rbug_internal.h \
-	rbug/rbug_proto.h \
-	rbug/rbug_shader.c \
-	rbug/rbug_shader.h \
 	rbug/rbug_texture.c \
-	rbug/rbug_texture.h \
+	rbug/rbug_shader.c \
 	rtasm/rtasm_cpu.c \
-	rtasm/rtasm_cpu.h \
 	rtasm/rtasm_execmem.c \
-	rtasm/rtasm_execmem.h \
 	rtasm/rtasm_x86sse.c \
-	rtasm/rtasm_x86sse.h \
 	tgsi/tgsi_build.c \
-	tgsi/tgsi_build.h \
 	tgsi/tgsi_dump.c \
-	tgsi/tgsi_dump.h \
 	tgsi/tgsi_exec.c \
-	tgsi/tgsi_exec.h \
 	tgsi/tgsi_info.c \
-	tgsi/tgsi_info.h \
 	tgsi/tgsi_iterate.c \
-	tgsi/tgsi_iterate.h \
 	tgsi/tgsi_lowering.c \
-	tgsi/tgsi_lowering.h \
-	tgsi/tgsi_opcode_tmp.h \
 	tgsi/tgsi_parse.c \
-	tgsi/tgsi_parse.h \
 	tgsi/tgsi_sanity.c \
-	tgsi/tgsi_sanity.h \
 	tgsi/tgsi_scan.c \
-	tgsi/tgsi_scan.h \
 	tgsi/tgsi_strings.c \
-	tgsi/tgsi_strings.h \
 	tgsi/tgsi_text.c \
-	tgsi/tgsi_text.h \
 	tgsi/tgsi_transform.c \
-	tgsi/tgsi_transform.h \
 	tgsi/tgsi_ureg.c \
-	tgsi/tgsi_ureg.h \
 	tgsi/tgsi_util.c \
-	tgsi/tgsi_util.h \
 	translate/translate.c \
-	translate/translate.h \
 	translate/translate_cache.c \
-	translate/translate_cache.h \
 	translate/translate_generic.c \
 	translate/translate_sse.c \
-	util/dbghelp.h \
-	util/u_atomic.h \
-	util/u_bitmask.c \
-	util/u_bitmask.h \
-	util/u_blit.c \
-	util/u_blit.h \
-	util/u_blitter.c \
-	util/u_blitter.h \
-	util/u_box.h \
-	util/u_cache.c \
-	util/u_cache.h \
-	util/u_caps.c \
-	util/u_caps.h \
-	util/u_clear.h \
-	util/u_cpu_detect.c \
-	util/u_cpu_detect.h \
 	util/u_debug.c \
 	util/u_debug_describe.c \
-	util/u_debug_describe.h \
 	util/u_debug_flush.c \
-	util/u_debug_flush.h \
-	util/u_debug.h \
 	util/u_debug_memory.c \
 	util/u_debug_refcnt.c \
-	util/u_debug_refcnt.h \
 	util/u_debug_stack.c \
-	util/u_debug_stack.h \
 	util/u_debug_symbol.c \
-	util/u_debug_symbol.h \
-	util/u_dirty_flags.h \
-	util/u_dirty_surfaces.h \
-	util/u_dl.c \
-	util/u_dl.h \
-	util/u_double_list.h \
-	util/u_draw.c \
-	util/u_draw.h \
-	util/u_draw_quad.c \
-	util/u_draw_quad.h \
-	util/u_dual_blend.h \
 	util/u_dump_defines.c \
-	util/u_dump.h \
 	util/u_dump_state.c \
-	util/u_dynarray.h \
-	util/u_fifo.h \
-	util/u_format_bptc.c \
-	util/u_format_bptc.h \
+	util/u_bitmask.c \
+	util/u_blit.c \
+	util/u_blitter.c \
+	util/u_cache.c \
+	util/u_caps.c \
+	util/u_cpu_detect.c \
+	util/u_dl.c \
+	util/u_draw.c \
+	util/u_draw_quad.c \
 	util/u_format.c \
-	util/u_format_etc.c \
-	util/u_format_etc.h \
-	util/u_format.h \
-	util/u_format_latc.c \
-	util/u_format_latc.h \
 	util/u_format_other.c \
-	util/u_format_other.h \
-	util/u_format_r11g11b10f.h \
-	util/u_format_rgb9e5.h \
-	util/u_format_rgtc.c \
-	util/u_format_rgtc.h \
+	util/u_format_latc.c \
 	util/u_format_s3tc.c \
-	util/u_format_s3tc.h \
+	util/u_format_rgtc.c \
+	util/u_format_etc.c \
+	util/u_format_bptc.c \
 	util/u_format_tests.c \
-	util/u_format_tests.h \
 	util/u_format_yuv.c \
-	util/u_format_yuv.h \
 	util/u_format_zs.c \
-	util/u_format_zs.h \
 	util/u_framebuffer.c \
-	util/u_framebuffer.h \
 	util/u_gen_mipmap.c \
-	util/u_gen_mipmap.h \
-	util/u_half.h \
 	util/u_handle_table.c \
-	util/u_handle_table.h \
 	util/u_hash.c \
-	util/u_hash.h \
 	util/u_hash_table.c \
-	util/u_hash_table.h \
 	util/u_helpers.c \
-	util/u_helpers.h \
 	util/u_index_modify.c \
-	util/u_index_modify.h \
-	util/u_init.h \
-	util/u_inlines.h \
 	util/u_keymap.c \
-	util/u_keymap.h \
 	util/u_linear.c \
-	util/u_linear.h \
 	util/u_linkage.c \
-	util/u_linkage.h \
-	util/u_math.c \
-	util/u_math.h \
-	util/u_memory.h \
-	util/u_mm.c \
-	util/u_mm.h \
 	util/u_network.c \
-	util/u_network.h \
-	util/u_pack_color.h \
-	util/u_pointer.h \
-	util/u_prim.h \
+	util/u_math.c \
+	util/u_mm.c \
 	util/u_pstipple.c \
-	util/u_pstipple.h \
-	util/u_range.h \
-	util/u_rect.h \
-	util/u_resource.c \
-	util/u_resource.h \
 	util/u_ringbuffer.c \
-	util/u_ringbuffer.h \
 	util/u_sampler.c \
-	util/u_sampler.h \
-	util/u_simple_list.h \
 	util/u_simple_shaders.c \
-	util/u_simple_shaders.h \
 	util/u_slab.c \
-	util/u_slab.h \
 	util/u_snprintf.c \
-	util/u_split_prim.h \
-	util/u_sse.h \
 	util/u_staging.c \
-	util/u_staging.h \
-	util/u_string.h \
 	util/u_suballoc.c \
-	util/u_suballoc.h \
 	util/u_surface.c \
-	util/u_surface.h \
 	util/u_surfaces.c \
-	util/u_surfaces.h \
-	util/u_tests.c \
-	util/u_tests.h \
 	util/u_texture.c \
-	util/u_texture.h \
 	util/u_tile.c \
-	util/u_tile.h \
-	util/u_time.h \
 	util/u_transfer.c \
-	util/u_transfer.h \
+	util/u_resource.c \
 	util/u_upload_mgr.c \
-	util/u_upload_mgr.h \
 	util/u_vbuf.c \
-	util/u_vbuf.h \
-	util/u_video.h \
-	vl/vl_compositor.c \
-	vl/vl_compositor.h \
 	vl/vl_csc.c \
-	vl/vl_csc.h \
-	vl/vl_decoder.c \
-	vl/vl_decoder.h \
-	vl/vl_defines.h \
-	vl/vl_deint_filter.c \
-	vl/vl_deint_filter.h \
-	vl/vl_idct.c \
-	vl/vl_idct.h \
+	vl/vl_compositor.c \
 	vl/vl_matrix_filter.c \
-	vl/vl_matrix_filter.h \
-	vl/vl_mc.c \
-	vl/vl_mc.h \
 	vl/vl_median_filter.c \
-	vl/vl_median_filter.h \
-	vl/vl_mpeg12_bitstream.c \
-	vl/vl_mpeg12_bitstream.h \
+	vl/vl_decoder.c \
 	vl/vl_mpeg12_decoder.c \
-	vl/vl_mpeg12_decoder.h \
-	vl/vl_rbsp.h \
-	vl/vl_types.h \
-	vl/vl_vertex_buffers.c \
-	vl/vl_vertex_buffers.h \
-	vl/vl_video_buffer.c \
-	vl/vl_video_buffer.h \
-	vl/vl_vlc.h \
-	vl/vl_winsys.h \
+	vl/vl_mpeg12_bitstream.c \
 	vl/vl_zscan.c \
-	vl/vl_zscan.h
+        vl/vl_idct.c \
+	vl/vl_mc.c \
+        vl/vl_vertex_buffers.c \
+        vl/vl_video_buffer.c \
+	vl/vl_deint_filter.c

 GENERATED_SOURCES := \
 	indices/u_indices_gen.c \
@@ -342,67 +165,42 @@ GENERATED_SOURCES := \
 	util/u_format_table.c

 GALLIVM_SOURCES := \
-	gallivm/lp_bld_arit.c \
-	gallivm/lp_bld_arit.h \
-	gallivm/lp_bld_arit_overflow.c \
-	gallivm/lp_bld_arit_overflow.h \
-	gallivm/lp_bld_assert.c \
-	gallivm/lp_bld_assert.h \
-	gallivm/lp_bld_bitarit.c \
-	gallivm/lp_bld_bitarit.h \
-	gallivm/lp_bld_const.c \
-	gallivm/lp_bld_const.h \
-	gallivm/lp_bld_conv.c \
-	gallivm/lp_bld_conv.h \
-	gallivm/lp_bld_debug.cpp \
-	gallivm/lp_bld_debug.h \
-	gallivm/lp_bld_flow.c \
-	gallivm/lp_bld_flow.h \
-	gallivm/lp_bld_format_aos_array.c \
-	gallivm/lp_bld_format_aos.c \
+        gallivm/lp_bld_arit.c \
+        gallivm/lp_bld_arit_overflow.c \
+        gallivm/lp_bld_assert.c \
+        gallivm/lp_bld_bitarit.c \
+        gallivm/lp_bld_const.c \
+        gallivm/lp_bld_conv.c \
+        gallivm/lp_bld_flow.c \
+        gallivm/lp_bld_format_aos.c \
+        gallivm/lp_bld_format_aos_array.c \
 	gallivm/lp_bld_format_float.c \
-	gallivm/lp_bld_format.h \
-	gallivm/lp_bld_format_soa.c \
-	gallivm/lp_bld_format_srgb.c \
-	gallivm/lp_bld_format_yuv.c \
-	gallivm/lp_bld_gather.c \
-	gallivm/lp_bld_gather.h \
-	gallivm/lp_bld.h \
-	gallivm/lp_bld_init.c \
-	gallivm/lp_bld_init.h \
-	gallivm/lp_bld_intr.c \
-	gallivm/lp_bld_intr.h \
-	gallivm/lp_bld_limits.h \
-	gallivm/lp_bld_logic.c \
-	gallivm/lp_bld_logic.h \
-	gallivm/lp_bld_misc.cpp \
-	gallivm/lp_bld_misc.h \
-	gallivm/lp_bld_pack.c \
-	gallivm/lp_bld_pack.h \
-	gallivm/lp_bld_printf.c \
-	gallivm/lp_bld_printf.h \
-	gallivm/lp_bld_quad.c \
-	gallivm/lp_bld_quad.h \
-	gallivm/lp_bld_sample_aos.c \
-	gallivm/lp_bld_sample_aos.h \
-	gallivm/lp_bld_sample.c \
-	gallivm/lp_bld_sample.h \
-	gallivm/lp_bld_sample_soa.c \
-	gallivm/lp_bld_struct.c \
-	gallivm/lp_bld_struct.h \
-	gallivm/lp_bld_swizzle.c \
-	gallivm/lp_bld_swizzle.h \
-	gallivm/lp_bld_tgsi_action.c \
-	gallivm/lp_bld_tgsi_action.h \
-	gallivm/lp_bld_tgsi_aos.c \
-	gallivm/lp_bld_tgsi.c \
-	gallivm/lp_bld_tgsi.h \
-	gallivm/lp_bld_tgsi_info.c \
-	gallivm/lp_bld_tgsi_soa.c \
-	gallivm/lp_bld_type.c \
-	gallivm/lp_bld_type.h \
-	draw/draw_llvm.c \
-	draw/draw_llvm.h \
-	draw/draw_llvm_sample.c \
-	draw/draw_pt_fetch_shade_pipeline_llvm.c \
-	draw/draw_vs_llvm.c
+        gallivm/lp_bld_format_srgb.c \
+        gallivm/lp_bld_format_soa.c \
+        gallivm/lp_bld_format_yuv.c \
+        gallivm/lp_bld_gather.c \
+        gallivm/lp_bld_init.c \
+        gallivm/lp_bld_intr.c \
+        gallivm/lp_bld_logic.c \
+        gallivm/lp_bld_pack.c \
+        gallivm/lp_bld_printf.c \
+        gallivm/lp_bld_quad.c \
+        gallivm/lp_bld_sample.c \
+        gallivm/lp_bld_sample_aos.c \
+        gallivm/lp_bld_sample_soa.c \
+        gallivm/lp_bld_struct.c \
+        gallivm/lp_bld_swizzle.c \
+        gallivm/lp_bld_tgsi.c \
+        gallivm/lp_bld_tgsi_action.c \
+        gallivm/lp_bld_tgsi_aos.c \
+        gallivm/lp_bld_tgsi_info.c \
+        gallivm/lp_bld_tgsi_soa.c \
+        gallivm/lp_bld_type.c \
+        draw/draw_llvm.c \
+        draw/draw_llvm_sample.c \
+        draw/draw_vs_llvm.c \
+        draw/draw_pt_fetch_shade_pipeline_llvm.c
+
+GALLIVM_CPP_SOURCES := \
+	gallivm/lp_bld_debug.cpp \
+	gallivm/lp_bld_misc.cpp
--- a/src/gallium/auxiliary/SConscript
+++ b/src/gallium/auxiliary/SConscript
@@ -42,6 +42,7 @@ source = env.ParseSourceList('Makefile.sources', [
 if env['llvm']:
    source += env.ParseSourceList('Makefile.sources', [
        'GALLIVM_SOURCES',
+        'GALLIVM_CPP_SOURCES'
    ])

 gallium = env.ConvenienceLibrary(
--- a/src/gallium/auxiliary/draw/draw_context.c
+++ b/src/gallium/auxiliary/draw/draw_context.c
@@ -53,7 +53,20 @@
 boolean
 draw_get_option_use_llvm(void)
 {
-   return debug_get_bool_option("DRAW_USE_LLVM", TRUE);
+   static boolean first = TRUE;
+   static boolean value;
+   if (first) {
+      first = FALSE;
+      value = debug_get_bool_option("DRAW_USE_LLVM", TRUE);
+
+#ifdef PIPE_ARCH_X86
+      util_cpu_detect();
+      /* require SSE2 due to LLVM PR6960. XXX Might be fixed by now? */
+      if (!util_cpu_caps.has_sse2)
+         value = FALSE;
+#endif
+   }
+   return value;
 }
 #else
 boolean
@@ -360,9 +373,11 @@ void draw_set_viewport_states( struct draw_context *draw,
      (viewport->scale[0] == 1.0f &&
       viewport->scale[1] == 1.0f &&
       viewport->scale[2] == 1.0f &&
+       viewport->scale[3] == 1.0f &&
       viewport->translate[0] == 0.0f &&
       viewport->translate[1] == 0.0f &&
-       viewport->translate[2] == 0.0f);
+       viewport->translate[2] == 0.0f &&
+       viewport->translate[3] == 0.0f);
 }


@@ -793,7 +808,7 @@ draw_current_shader_viewport_index_output(const struct draw_context *draw)
 {
   if (draw->gs.geometry_shader)
      return draw->gs.geometry_shader->viewport_index_output;
-   return draw->vs.vertex_shader->viewport_index_output;
+   return 0;
 }

 /**
@@ -805,7 +820,7 @@ draw_current_shader_uses_viewport_index(const struct draw_context *draw)
 {
   if (draw->gs.geometry_shader)
      return draw->gs.geometry_shader->info.writes_viewport_index;
-   return draw->vs.vertex_shader->info.writes_viewport_index;
+   return FALSE;
 }


--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -225,7 +225,7 @@ create_jit_context_type(struct gallivm_state *gallivm,
                                 LP_MAX_TGSI_CONST_BUFFERS);
   elem_types[2] = LLVMPointerType(LLVMArrayType(LLVMArrayType(float_type, 4),
                                                 DRAW_TOTAL_CLIP_PLANES), 0);
-   elem_types[3] = LLVMPointerType(float_type, 0); /* viewports */
+   elem_types[3] = LLVMPointerType(float_type, 0); /* viewport */
   elem_types[4] = LLVMArrayType(texture_type,
                                 PIPE_MAX_SHADER_SAMPLER_VIEWS); /* textures */
   elem_types[5] = LLVMArrayType(sampler_type,
@@ -238,7 +238,7 @@ create_jit_context_type(struct gallivm_state *gallivm,
                          target, context_type, DRAW_JIT_CTX_NUM_CONSTANTS);
   LP_CHECK_MEMBER_OFFSET(struct draw_jit_context, planes,
                          target, context_type, DRAW_JIT_CTX_PLANES);
-   LP_CHECK_MEMBER_OFFSET(struct draw_jit_context, viewports,
+   LP_CHECK_MEMBER_OFFSET(struct draw_jit_context, viewport,
                          target, context_type, DRAW_JIT_CTX_VIEWPORT);
   LP_CHECK_MEMBER_OFFSET(struct draw_jit_context, textures,
                          target, context_type,
@@ -274,7 +274,7 @@ create_gs_jit_context_type(struct gallivm_state *gallivm,
                                 LP_MAX_TGSI_CONST_BUFFERS);
   elem_types[2] = LLVMPointerType(LLVMArrayType(LLVMArrayType(float_type, 4),
                                                 DRAW_TOTAL_CLIP_PLANES), 0);
-   elem_types[3] = LLVMPointerType(float_type, 0); /* viewports */
+   elem_types[3] = LLVMPointerType(float_type, 0); /* viewport */

   elem_types[4] = LLVMArrayType(texture_type,
                                 PIPE_MAX_SHADER_SAMPLER_VIEWS); /* textures */
@@ -296,7 +296,7 @@ create_gs_jit_context_type(struct gallivm_state *gallivm,
                          target, context_type, DRAW_GS_JIT_CTX_NUM_CONSTANTS);
   LP_CHECK_MEMBER_OFFSET(struct draw_gs_jit_context, planes,
                          target, context_type, DRAW_GS_JIT_CTX_PLANES);
-   LP_CHECK_MEMBER_OFFSET(struct draw_gs_jit_context, viewports,
+   LP_CHECK_MEMBER_OFFSET(struct draw_gs_jit_context, viewport,
                          target, context_type, DRAW_GS_JIT_CTX_VIEWPORT);
   LP_CHECK_MEMBER_OFFSET(struct draw_gs_jit_context, textures,
                          target, context_type,
@@ -742,7 +742,6 @@ generate_fetch(struct gallivm_state *gallivm,
      val = lp_build_fetch_rgba_aos(gallivm,
                                    format_desc,
                                    lp_float32_vec4_type(),
-                                    FALSE,
                                    map_ptr,
                                    zero, zero, zero);
      LLVMBuildStore(builder, val, temp_ptr);
@@ -1081,11 +1080,7 @@ generate_viewport(struct draw_llvm_variant *variant,
   LLVMTypeRef vs_type_llvm = lp_build_vec_type(gallivm, vs_type);
   LLVMValueRef out3 = LLVMBuildLoad(builder, outputs[pos][3], ""); /*w0 w1 .. wn*/
   LLVMValueRef const1 = lp_build_const_vec(gallivm, f32_type, 1.0);       /*1.0 1.0 1.0 1.0*/
-   LLVMValueRef vp_ptr = draw_jit_context_viewports(gallivm, context_ptr);
-
-   /* We treat pipe_viewport_state as a float array */
-   const int scale_index_offset = offsetof(struct pipe_viewport_state, scale) / sizeof(float);
-   const int trans_index_offset = offsetof(struct pipe_viewport_state, translate) / sizeof(float);
+   LLVMValueRef vp_ptr = draw_jit_context_viewport(gallivm, context_ptr);

   /* for 1/w convention*/
   out3 = LLVMBuildFDiv(builder, const1, out3, "");
@@ -1100,10 +1095,10 @@ generate_viewport(struct draw_llvm_variant *variant,
      LLVMValueRef trans_i;
      LLVMValueRef index;

-      index = lp_build_const_int32(gallivm, i + scale_index_offset);
+      index = lp_build_const_int32(gallivm, i);
      scale_i = LLVMBuildGEP(builder, vp_ptr, &index, 1, "");

-      index = lp_build_const_int32(gallivm, i + trans_index_offset);
+      index = lp_build_const_int32(gallivm, i+4);
      trans_i = LLVMBuildGEP(builder, vp_ptr, &index, 1, "");

      scale = lp_build_broadcast(gallivm, vs_type_llvm,
@@ -1522,12 +1517,8 @@ draw_llvm_generate(struct draw_llvm *llvm, struct draw_llvm_variant *variant,
   /* If geometry shader is present we need to skip both the viewport
    * transformation and clipping otherwise the inputs to the geometry
    * shader will be incorrect.
-    * The code can't handle vp transform when vs writes vp index neither
-    * (though this would be fixable here, but couldn't just broadcast
-    * the values).
    */
-   const boolean bypass_viewport = key->has_gs || key->bypass_viewport ||
-                                   llvm->draw->vs.vertex_shader->info.writes_viewport_index;
+   const boolean bypass_viewport = key->has_gs || key->bypass_viewport;
   const boolean enable_cliptest = !key->has_gs && (key->clip_xy ||
                                                    key->clip_z  ||
                                                    key->clip_user);
--- a/src/gallium/auxiliary/draw/draw_llvm.h
+++ b/src/gallium/auxiliary/draw/draw_llvm.h
@@ -125,7 +125,7 @@ struct draw_jit_context
   const float *vs_constants[LP_MAX_TGSI_CONST_BUFFERS];
   int num_vs_constants[LP_MAX_TGSI_CONST_BUFFERS];
   float (*planes) [DRAW_TOTAL_CLIP_PLANES][4];
-   struct pipe_viewport_state *viewports;
+   float *viewport;

   struct draw_jit_texture textures[PIPE_MAX_SHADER_SAMPLER_VIEWS];
   struct draw_jit_sampler samplers[PIPE_MAX_SAMPLERS];
@@ -150,8 +150,8 @@ enum {
 #define draw_jit_context_planes(_gallivm, _ptr) \
   lp_build_struct_get(_gallivm, _ptr, DRAW_JIT_CTX_PLANES, "planes")

-#define draw_jit_context_viewports(_gallivm, _ptr) \
-   lp_build_struct_get(_gallivm, _ptr, DRAW_JIT_CTX_VIEWPORT, "viewports")
+#define draw_jit_context_viewport(_gallivm, _ptr) \
+   lp_build_struct_get(_gallivm, _ptr, DRAW_JIT_CTX_VIEWPORT, "viewport")

 #define draw_jit_context_textures(_gallivm, _ptr) \
   lp_build_struct_get_ptr(_gallivm, _ptr, DRAW_JIT_CTX_TEXTURES, "textures")
@@ -207,7 +207,7 @@ struct draw_gs_jit_context
   const float *constants[LP_MAX_TGSI_CONST_BUFFERS];
   int num_constants[LP_MAX_TGSI_CONST_BUFFERS];
   float (*planes) [DRAW_TOTAL_CLIP_PLANES][4];
-   struct pipe_viewport_state *viewports;
+   float *viewport;

   /* There two need to be exactly at DRAW_JIT_CTX_TEXTURES and
    * DRAW_JIT_CTX_SAMPLERS positions in the struct */
@@ -245,8 +245,8 @@ enum {
 #define draw_gs_jit_context_planes(_gallivm, _ptr) \
   lp_build_struct_get(_gallivm, _ptr, DRAW_GS_JIT_CTX_PLANES, "planes")

-#define draw_gs_jit_context_viewports(_gallivm, _ptr) \
-   lp_build_struct_get(_gallivm, _ptr, DRAW_GS_JIT_CTX_VIEWPORT, "viewports")
+#define draw_gs_jit_context_viewport(_gallivm, _ptr) \
+   lp_build_struct_get(_gallivm, _ptr, DRAW_GS_JIT_CTX_VIEWPORT, "viewport")

 #define draw_gs_jit_context_textures(_gallivm, _ptr) \
   lp_build_struct_get_ptr(_gallivm, _ptr, DRAW_GS_JIT_CTX_TEXTURES, "textures")
--- a/src/gallium/auxiliary/draw/draw_private.h
+++ b/src/gallium/auxiliary/draw/draw_private.h
@@ -499,7 +499,7 @@ draw_clamp_viewport_idx(int idx)
 /**
 * Adds two unsigned integers and if the addition
 * overflows then it returns the value from
- * the overflow_value variable.
+ * from the overflow_value variable.
 */
 static INLINE unsigned
 draw_overflow_uadd(unsigned a, unsigned b,
--- a/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c
@@ -169,7 +169,8 @@ llvm_middle_end_prepare( struct draw_pt_middle_end *middle,
   draw_pt_so_emit_prepare( fpme->so_emit, gs == NULL );

   if (!(opt & PT_PIPELINE)) {
-      draw_pt_emit_prepare( fpme->emit, out_prim,
+      draw_pt_emit_prepare( fpme->emit,
+			    out_prim,
                            max_vertices );

      *max_vertices = MAX2( *max_vertices, 4096 );
@@ -293,8 +294,8 @@ llvm_middle_end_bind_parameters(struct draw_pt_middle_end *middle)
   fpme->llvm->gs_jit_context.planes =
      (float (*)[DRAW_TOTAL_CLIP_PLANES][4]) draw->pt.user.planes[0];

-   fpme->llvm->jit_context.viewports = draw->viewports;
-   fpme->llvm->gs_jit_context.viewports = draw->viewports;
+   fpme->llvm->jit_context.viewport = (float *) draw->viewports[0].scale;
+   fpme->llvm->gs_jit_context.viewport = (float *) draw->viewports[0].scale;
 }


@@ -441,8 +442,7 @@ llvm_pipeline_generic(struct draw_pt_middle_end *middle,
    * will try to access non-existent position output.
    */
   if (draw_current_shader_position_output(draw) != -1) {
-      if ((opt & PT_SHADE) && (gshader ||
-                               draw->vs.vertex_shader->info.writes_viewport_index)) {
+      if ((opt & PT_SHADE) && gshader) {
         clipped = draw_pt_post_vs_run( fpme->post_vs, vert_info, prim_info );
      }
      if (clipped) {
--- a/src/gallium/auxiliary/draw/draw_pt_post_vs.c
+++ b/src/gallium/auxiliary/draw/draw_pt_post_vs.c
@@ -117,7 +117,7 @@ dot4(const float *a, const float *b)


 boolean draw_pt_post_vs_run( struct pt_post_vs *pvs,
-                             struct draw_vertex_info *info,
+			     struct draw_vertex_info *info,
                             const struct draw_prim_info *prim_info )
 {
   return pvs->run( pvs, info, prim_info );
--- a/src/gallium/auxiliary/draw/draw_pt_vsplit.c
+++ b/src/gallium/auxiliary/draw/draw_pt_vsplit.c
@@ -91,7 +91,7 @@ vsplit_add_cache(struct vsplit_frontend *vsplit, unsigned fetch, unsigned ofbias

   hash = fetch % MAP_SIZE;

-   /* If the value isn't in the cache or it's an overflow due to the
+   /* If the value isn't in the cache of it's an overflow due to the
    * element bias */
   if (vsplit->cache.fetches[hash] != fetch || ofbias) {
      /* update cache */
--- a/src/gallium/auxiliary/draw/draw_vs.c
+++ b/src/gallium/auxiliary/draw/draw_vs.c
@@ -85,9 +85,7 @@ draw_create_vertex_shader(struct draw_context *draw,
                  vs->info.output_semantic_index[i] == 0) {
            found_clipvertex = TRUE;
            vs->clipvertex_output = i;
-         } else if (vs->info.output_semantic_name[i] == TGSI_SEMANTIC_VIEWPORT_INDEX)
-            vs->viewport_index_output = i;
-         else if (vs->info.output_semantic_name[i] == TGSI_SEMANTIC_CLIPDIST) {
+         } else if (vs->info.output_semantic_name[i] == TGSI_SEMANTIC_CLIPDIST) {
            debug_assert(vs->info.output_semantic_index[i] <
                         PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT);
            vs->clipdistance_output[vs->info.output_semantic_index[i]] = i;
--- a/src/gallium/auxiliary/draw/draw_vs.h
+++ b/src/gallium/auxiliary/draw/draw_vs.h
@@ -110,7 +110,6 @@ struct draw_vertex_shader {

   struct tgsi_shader_info info;
   unsigned position_output;
-   unsigned viewport_index_output;
   unsigned edgeflag_output;
   unsigned clipvertex_output;
   unsigned clipdistance_output[PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT];
--- a/src/gallium/auxiliary/gallivm/lp_bld_format.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format.h
@@ -62,7 +62,6 @@ LLVMValueRef
 lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,
                        const struct util_format_description *format_desc,
                        struct lp_type type,
-                        boolean aligned,
                        LLVMValueRef base_ptr,
                        LLVMValueRef offset,
                        LLVMValueRef i,
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c
@@ -356,7 +356,6 @@ lp_build_pack_rgba_aos(struct gallivm_state *gallivm,
 * Fetch a pixel into a 4 float AoS.
 *
 * \param format_desc  describes format of the image we're fetching from
- * \param aligned  whether the data is guaranteed to be aligned
 * \param ptr  address of the pixel block (or the texel if uncompressed)
 * \param i, j  the sub-block pixel coordinates.  For non-compressed formats
 *              these will always be (0, 0).
@@ -366,7 +365,6 @@ LLVMValueRef
 lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,
                        const struct util_format_description *format_desc,
                        struct lp_type type,
-                        boolean aligned,
                        LLVMValueRef base_ptr,
                        LLVMValueRef offset,
                        LLVMValueRef i,
@@ -402,7 +400,7 @@ lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,

      packed = lp_build_gather(gallivm, type.length/4,
                               format_desc->block.bits, type.width*4,
-                               aligned, base_ptr, offset, TRUE);
+                               base_ptr, offset, TRUE);

      assert(format_desc->block.bits <= vec_len);

@@ -439,7 +437,7 @@ lp_build_fetch_rgba_aos(struct gallivm_state *gallivm,
         LLVMValueRef packed;

         packed = lp_build_gather_elem(gallivm, num_pixels,
-                                       format_desc->block.bits, 32, aligned,
+                                       format_desc->block.bits, 32,
                                       base_ptr, offset, k, FALSE);

         tmps[k] = lp_build_unpack_arith_rgba_aos(gallivm,
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c
@@ -386,7 +386,6 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm,
                               type.length,
                               format_desc->block.bits,
                               type.width,
-                               TRUE,
                               base_ptr, offset, FALSE);

      /*
@@ -412,8 +411,8 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm,

      packed = lp_build_gather(gallivm, type.length,
                               format_desc->block.bits,
-                               type.width, TRUE,
-                               base_ptr, offset, FALSE);
+                               type.width, base_ptr, offset,
+                               FALSE);
      if (format_desc->format == PIPE_FORMAT_R11G11B10_FLOAT) {
         lp_build_r11g11b10_to_float(gallivm, packed, rgba_out);
      }
@@ -439,15 +438,15 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm,
         unsigned mask = (1 << 8) - 1;
         LLVMValueRef s_offset = lp_build_const_int_vec(gallivm, type, 4);
         offset = LLVMBuildAdd(builder, offset, s_offset, "");
-         packed = lp_build_gather(gallivm, type.length, 32, type.width,
-                                  TRUE, base_ptr, offset, FALSE);
+         packed = lp_build_gather(gallivm, type.length,
+                                  32, type.width, base_ptr, offset, FALSE);
         packed = LLVMBuildAnd(builder, packed,
                               lp_build_const_int_vec(gallivm, type, mask), "");
      }
      else {
         assert (format_desc->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
-         packed = lp_build_gather(gallivm, type.length, 32, type.width,
-                                  TRUE, base_ptr, offset, TRUE);
+         packed = lp_build_gather(gallivm, type.length,
+                                  32, type.width, base_ptr, offset, TRUE);
         packed = LLVMBuildBitCast(builder, packed,
                                   lp_build_vec_type(gallivm, type), "");
      }
@@ -473,7 +472,7 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm,
      tmp_type.norm = TRUE;

      tmp = lp_build_fetch_rgba_aos(gallivm, format_desc, tmp_type,
-                                    TRUE, base_ptr, offset, i, j);
+                                    base_ptr, offset, i, j);

      lp_build_rgba8_to_fi32_soa(gallivm,
                                type,
@@ -523,7 +522,7 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm,

         /* Get a single float[4]={R,G,B,A} pixel */
         tmp = lp_build_fetch_rgba_aos(gallivm, format_desc, tmp_type,
-                                       TRUE, base_ptr, offset_elem,
+                                       base_ptr, offset_elem,
                                       i_elem, j_elem);

         /*
--- a/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c
@@ -497,7 +497,7 @@ lp_build_fetch_subsampled_rgba_aos(struct gallivm_state *gallivm,
   assert(format_desc->block.width == 2);
   assert(format_desc->block.height == 1);

-   packed = lp_build_gather(gallivm, n, 32, 32, TRUE, base_ptr, offset, FALSE);
+   packed = lp_build_gather(gallivm, n, 32, 32, base_ptr, offset, FALSE);

   (void)j;

--- a/src/gallium/auxiliary/gallivm/lp_bld_gather.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_gather.c
@@ -76,7 +76,6 @@ lp_build_gather_elem(struct gallivm_state *gallivm,
                     unsigned length,
                     unsigned src_width,
                     unsigned dst_width,
-                     boolean aligned,
                     LLVMValueRef base_ptr,
                     LLVMValueRef offsets,
                     unsigned i,
@@ -94,27 +93,6 @@ lp_build_gather_elem(struct gallivm_state *gallivm,
   ptr = LLVMBuildBitCast(gallivm->builder, ptr, src_ptr_type, "");
   res = LLVMBuildLoad(gallivm->builder, ptr, "");

-   /* XXX
-    * On some archs we probably really want to avoid having to deal
-    * with alignments lower than 4 bytes (if fetch size is a power of
-    * two >= 32). On x86 it doesn't matter, however.
-    * We should be able to guarantee full alignment for any kind of texture
-    * fetch (except ARB_texture_buffer_range, oops), but not vertex fetch
-    * (there's PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY and friends
-    * but I don't think that's quite what we wanted).
-    * For ARB_texture_buffer_range, PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
-    * looks like a good fit, but it seems this cap bit (and OpenGL) aren't
-    * enforcing what we want (which is what d3d10 does, the offset needs to
-    * be aligned to element size, but GL has bytes regardless of element
-    * size which would only leave us with minimum alignment restriction of 16
-    * which doesn't make much sense if the type isn't 4x32bit). Due to
-    * translation of offsets to first_elem in sampler_views it actually seems
-    * gallium could not do anything else except 16 no matter what...
-    */
-  if (!aligned) {
-      lp_set_load_alignment(res, 1);
-   }
-
   assert(src_width <= dst_width);
   if (src_width > dst_width) {
      res = LLVMBuildTrunc(gallivm->builder, res, dst_elem_type, "");
@@ -148,7 +126,6 @@ lp_build_gather_elem(struct gallivm_state *gallivm,
 * @param length length of the offsets
 * @param src_width src element width in bits
 * @param dst_width result element width in bits (src will be expanded to fit)
- * @param aligned whether the data is guaranteed to be aligned (to src_width)
 * @param base_ptr base pointer, should be a i8 pointer type.
 * @param offsets vector with offsets
 * @param vector_justify select vector rather than integer justification
@@ -158,7 +135,6 @@ lp_build_gather(struct gallivm_state *gallivm,
                unsigned length,
                unsigned src_width,
                unsigned dst_width,
-                boolean aligned,
                LLVMValueRef base_ptr,
                LLVMValueRef offsets,
                boolean vector_justify)
@@ -168,7 +144,7 @@ lp_build_gather(struct gallivm_state *gallivm,
   if (length == 1) {
      /* Scalar */
      return lp_build_gather_elem(gallivm, length,
-                                  src_width, dst_width, aligned,
+                                  src_width, dst_width,
                                  base_ptr, offsets, 0, vector_justify);
   } else {
      /* Vector */
@@ -182,7 +158,7 @@ lp_build_gather(struct gallivm_state *gallivm,
         LLVMValueRef index = lp_build_const_int32(gallivm, i);
         LLVMValueRef elem;
         elem = lp_build_gather_elem(gallivm, length,
-                                     src_width, dst_width, aligned,
+                                     src_width, dst_width,
                                     base_ptr, offsets, i, vector_justify);
         res = LLVMBuildInsertElement(gallivm->builder, res, elem, index, "");
      }
--- a/src/gallium/auxiliary/gallivm/lp_bld_gather.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_gather.h
@@ -45,7 +45,6 @@ lp_build_gather_elem(struct gallivm_state *gallivm,
                     unsigned length,
                     unsigned src_width,
                     unsigned dst_width,
-                     boolean aligned,
                     LLVMValueRef base_ptr,
                     LLVMValueRef offsets,
                     unsigned i,
@@ -56,7 +55,6 @@ lp_build_gather(struct gallivm_state *gallivm,
                unsigned length,
                unsigned src_width,
                unsigned dst_width,
-                boolean aligned,
                LLVMValueRef base_ptr,
                LLVMValueRef offsets,
                boolean vector_justify);
--- a/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c
@@ -581,7 +581,6 @@ lp_build_sample_fetch_image_nearest(struct lp_build_sample_context *bld,
                              bld->texel_type.length,
                              bld->format_desc->block.bits,
                              bld->texel_type.width,
-                              TRUE,
                              data_ptr, offset, TRUE);

      rgba8 = LLVMBuildBitCast(builder, rgba8, u8n_vec_type, "");
@@ -590,7 +589,6 @@ lp_build_sample_fetch_image_nearest(struct lp_build_sample_context *bld,
      rgba8 = lp_build_fetch_rgba_aos(bld->gallivm,
                                      bld->format_desc,
                                      u8n.type,
-                                      TRUE,
                                      data_ptr, offset,
                                      x_subcoord,
                                      y_subcoord);
@@ -921,7 +919,6 @@ lp_build_sample_fetch_image_linear(struct lp_build_sample_context *bld,
                                       bld->texel_type.length,
                                       bld->format_desc->block.bits,
                                       bld->texel_type.width,
-                                       TRUE,
                                       data_ptr, offset[k][j][i], TRUE);

               rgba8 = LLVMBuildBitCast(builder, rgba8, u8n_vec_type, "");
@@ -930,7 +927,6 @@ lp_build_sample_fetch_image_linear(struct lp_build_sample_context *bld,
               rgba8 = lp_build_fetch_rgba_aos(bld->gallivm,
                                               bld->format_desc,
                                               u8n.type,
-                                               TRUE,
                                               data_ptr, offset[k][j][i],
                                               x_subcoord[i],
                                               y_subcoord[j]);
--- a/src/gallium/auxiliary/hud/hud_context.c
+++ b/src/gallium/auxiliary/hud/hud_context.c
@@ -444,9 +444,11 @@ hud_draw(struct hud_context *hud, struct pipe_resource *tex)
   viewport.scale[0] = 0.5f * hud->fb_width;
   viewport.scale[1] = 0.5f * hud->fb_height;
   viewport.scale[2] = 1.0f;
+   viewport.scale[3] = 1.0f;
   viewport.translate[0] = 0.5f * hud->fb_width;
   viewport.translate[1] = 0.5f * hud->fb_height;
   viewport.translate[2] = 0.0f;
+   viewport.translate[3] = 0.0f;

   cso_set_framebuffer(cso, &fb);
   cso_set_sample_mask(cso, ~0);
--- a/src/gallium/auxiliary/indices/u_primconvert.c
+++ b/src/gallium/auxiliary/indices/u_primconvert.c
@@ -124,6 +124,9 @@ util_primconvert_draw_vbo(struct primconvert_context *pc,
   new_info.indexed = true;
   new_info.min_index = info->min_index;
   new_info.max_index = info->max_index;
+   new_info.index_bias = info->index_bias;
+   new_info.start_instance = info->start_instance;
+   new_info.instance_count = info->instance_count;

   if (info->indexed) {
      u_index_translator(pc->primtypes_mask,
@@ -136,6 +139,7 @@ util_primconvert_draw_vbo(struct primconvert_context *pc,
         src = pipe_buffer_map(pc->pipe, ib->buffer,
                               PIPE_TRANSFER_READ, &src_transfer);
      }
+      src = (const uint8_t *)src + ib->offset;
   }
   else {
      u_index_generator(pc->primtypes_mask,
--- a/src/gallium/auxiliary/pipe-loader/Makefile.am
+++ b/src/gallium/auxiliary/pipe-loader/Makefile.am
@@ -1,4 +1,4 @@
-include Makefile.sources
+AUTOMAKE_OPTIONS = subdir-objects

 AM_CPPFLAGS = $(DEFINES) \
 	$(VISIBILITY_CFLAGS) \
@@ -11,10 +11,16 @@ AM_CPPFLAGS = $(DEFINES) \
 noinst_LTLIBRARIES = libpipe_loader.la
 noinst_LTLIBRARIES += libpipe_loader_client.la

+COMMON_SOURCES = \
+	pipe_loader.h \
+	pipe_loader_priv.h \
+	pipe_loader.c \
+	pipe_loader_sw.c
+
 if HAVE_DRM_LOADER_GALLIUM
 AM_CFLAGS = $(LIBDRM_CFLAGS)

-COMMON_SOURCES += $(DRM_SOURCES)
+COMMON_SOURCES += pipe_loader_drm.c

 COMMON_LIBADD = \
 	$(top_builddir)/src/loader/libloader.la
--- a/src/gallium/auxiliary/pipe-loader/Makefile.sources
+++ b/src/gallium/auxiliary/pipe-loader/Makefile.sources
@@ -1,8 +0,0 @@
-COMMON_SOURCES := \
-	pipe_loader.c \
-	pipe_loader.h \
-	pipe_loader_priv.h \
-	pipe_loader_sw.c
-
-DRM_SOURCES := \
-	pipe_loader_drm.c
--- a/src/gallium/auxiliary/postprocess/pp_init.c
+++ b/src/gallium/auxiliary/postprocess/pp_init.c
@@ -324,6 +324,8 @@ pp_init_fbos(struct pp_queue_t *ppq, unsigned int w,

   p->viewport.scale[0] = p->viewport.translate[0] = (float) w / 2.0f;
   p->viewport.scale[1] = p->viewport.translate[1] = (float) h / 2.0f;
+   p->viewport.scale[3] = 1.0f;
+   p->viewport.translate[3] = 0.0f;

   ppq->fbos_init = true;

--- a/src/gallium/auxiliary/postprocess/pp_program.c
+++ b/src/gallium/auxiliary/postprocess/pp_program.c
@@ -131,7 +131,7 @@ pp_init_prog(struct pp_queue_t *ppq, struct pipe_context *pipe,
      const uint semantic_indexes[] = { 0, 0 };
      p->passvs = util_make_vertex_passthrough_shader(p->pipe, 2,
                                                      semantic_names,
-                                                      semantic_indexes, FALSE);
+                                                      semantic_indexes);
   }

   p->framebuffer.nr_cbufs = 1;
--- a/src/gallium/auxiliary/rtasm/rtasm_x86sse.c
+++ b/src/gallium/auxiliary/rtasm/rtasm_x86sse.c
@@ -25,7 +25,7 @@
 #include "pipe/p_config.h"
 #include "util/u_cpu_detect.h"

-#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
+#if defined(PIPE_ARCH_X86) || (defined(PIPE_ARCH_X86_64) && !defined(__MINGW32__))

 #include "pipe/p_compiler.h"
 #include "util/u_debug.h"
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -232,12 +232,6 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
                        info->num_written_culldistance +=
                           util_bitcount(fulldecl->Declaration.UsageMask);
                     }
-                     else if (semName == TGSI_SEMANTIC_VIEWPORT_INDEX) {
-                        info->writes_viewport_index = TRUE;
-                     }
-                     else if (semName == TGSI_SEMANTIC_LAYER) {
-                        info->writes_layer = TRUE;
-                     }
                  }

                  if (procType == TGSI_PROCESSOR_FRAGMENT) {
@@ -254,6 +248,15 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
                        info->writes_edgeflag = TRUE;
                     }
                  }
+
+                  if (procType == TGSI_PROCESSOR_GEOMETRY) {
+                     if (semName == TGSI_SEMANTIC_VIEWPORT_INDEX) {
+                        info->writes_viewport_index = TRUE;
+                     }
+                     else if (semName == TGSI_SEMANTIC_LAYER) {
+                        info->writes_layer = TRUE;
+                     }
+                  }
               }
            }
         }
--- a/src/gallium/auxiliary/tgsi/tgsi_strings.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_strings.c
@@ -122,7 +122,7 @@ const char *tgsi_property_names[TGSI_PROPERTY_COUNT] =
   "FS_DEPTH_LAYOUT",
   "VS_PROHIBIT_UCPS",
   "GS_INVOCATIONS",
-   "VS_WINDOW_SPACE_POSITION"
+   "VS_POSITION_WINDOW_SPACE"
 };

 const char *tgsi_return_type_names[TGSI_RETURN_TYPE_COUNT] =
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -165,7 +165,15 @@ struct ureg_program
   struct const_decl const_decls;
   struct const_decl const_decls2D[PIPE_MAX_CONSTANT_BUFFERS];

-   unsigned properties[TGSI_PROPERTY_COUNT];
+   unsigned property_gs_input_prim;
+   unsigned property_gs_output_prim;
+   unsigned property_gs_max_vertices;
+   unsigned property_gs_invocations;
+   unsigned char property_fs_coord_origin; /* = TGSI_FS_COORD_ORIGIN_* */
+   unsigned char property_fs_coord_pixel_center; /* = TGSI_FS_COORD_PIXEL_CENTER_* */
+   unsigned char property_fs_color0_writes_all_cbufs; /* = TGSI_FS_COLOR0_WRITES_ALL_CBUFS * */
+   unsigned char property_fs_depth_layout; /* TGSI_FS_DEPTH_LAYOUT */
+   boolean property_vs_window_space_position; /* TGSI_VS_WINDOW_SPACE_POSITION */

   unsigned nr_addrs;
   unsigned nr_preds;
@@ -270,10 +278,65 @@ ureg_dst_register( unsigned file,


 void
-ureg_property(struct ureg_program *ureg, unsigned name, unsigned value)
+ureg_property_gs_input_prim(struct ureg_program *ureg,
+                            unsigned input_prim)
 {
-   assert(name < Elements(ureg->properties));
-   ureg->properties[name] = value;
+   ureg->property_gs_input_prim = input_prim;
+}
+
+void
+ureg_property_gs_output_prim(struct ureg_program *ureg,
+                             unsigned output_prim)
+{
+   ureg->property_gs_output_prim = output_prim;
+}
+
+void
+ureg_property_gs_max_vertices(struct ureg_program *ureg,
+                              unsigned max_vertices)
+{
+   ureg->property_gs_max_vertices = max_vertices;
+}
+void
+ureg_property_gs_invocations(struct ureg_program *ureg,
+                             unsigned invocations)
+{
+   ureg->property_gs_invocations = invocations;
+}
+
+void
+ureg_property_fs_coord_origin(struct ureg_program *ureg,
+                            unsigned fs_coord_origin)
+{
+   ureg->property_fs_coord_origin = fs_coord_origin;
+}
+
+void
+ureg_property_fs_coord_pixel_center(struct ureg_program *ureg,
+                            unsigned fs_coord_pixel_center)
+{
+   ureg->property_fs_coord_pixel_center = fs_coord_pixel_center;
+}
+
+void
+ureg_property_fs_color0_writes_all_cbufs(struct ureg_program *ureg,
+                            unsigned fs_color0_writes_all_cbufs)
+{
+   ureg->property_fs_color0_writes_all_cbufs = fs_color0_writes_all_cbufs;
+}
+
+void
+ureg_property_fs_depth_layout(struct ureg_program *ureg,
+                              unsigned fs_depth_layout)
+{
+   ureg->property_fs_depth_layout = fs_depth_layout;
+}
+
+void
+ureg_property_vs_window_space_position(struct ureg_program *ureg,
+                                       boolean vs_window_space_position)
+{
+   ureg->property_vs_window_space_position = vs_window_space_position;
 }

 struct ureg_src
@@ -1389,9 +1452,77 @@ static void emit_decls( struct ureg_program *ureg )
 {
   unsigned i;

-   for (i = 0; i < Elements(ureg->properties); i++)
-      if (ureg->properties[i] != ~0)
-         emit_property(ureg, i, ureg->properties[i]);
+   if (ureg->property_gs_input_prim != ~0) {
+      assert(ureg->processor == TGSI_PROCESSOR_GEOMETRY);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_GS_INPUT_PRIM,
+                    ureg->property_gs_input_prim);
+   }
+
+   if (ureg->property_gs_output_prim != ~0) {
+      assert(ureg->processor == TGSI_PROCESSOR_GEOMETRY);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_GS_OUTPUT_PRIM,
+                    ureg->property_gs_output_prim);
+   }
+
+   if (ureg->property_gs_max_vertices != ~0) {
+      assert(ureg->processor == TGSI_PROCESSOR_GEOMETRY);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES,
+                    ureg->property_gs_max_vertices);
+   }
+
+   if (ureg->property_gs_invocations != ~0) {
+      assert(ureg->processor == TGSI_PROCESSOR_GEOMETRY);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_GS_INVOCATIONS,
+                    ureg->property_gs_invocations);
+   }
+
+   if (ureg->property_fs_coord_origin) {
+      assert(ureg->processor == TGSI_PROCESSOR_FRAGMENT);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_FS_COORD_ORIGIN,
+                    ureg->property_fs_coord_origin);
+   }
+
+   if (ureg->property_fs_coord_pixel_center) {
+      assert(ureg->processor == TGSI_PROCESSOR_FRAGMENT);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
+                    ureg->property_fs_coord_pixel_center);
+   }
+
+   if (ureg->property_fs_color0_writes_all_cbufs) {
+      assert(ureg->processor == TGSI_PROCESSOR_FRAGMENT);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS,
+                    ureg->property_fs_color0_writes_all_cbufs);
+   }
+
+   if (ureg->property_fs_depth_layout) {
+      assert(ureg->processor == TGSI_PROCESSOR_FRAGMENT);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_FS_DEPTH_LAYOUT,
+                    ureg->property_fs_depth_layout);
+   }
+
+   if (ureg->property_vs_window_space_position) {
+      assert(ureg->processor == TGSI_PROCESSOR_VERTEX);
+
+      emit_property(ureg,
+                    TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION,
+                    ureg->property_vs_window_space_position);
+   }

   if (ureg->processor == TGSI_PROCESSOR_VERTEX) {
      for (i = 0; i < UREG_MAX_INPUT; i++) {
@@ -1642,15 +1773,15 @@ void ureg_free_tokens( const struct tgsi_token *tokens )

 struct ureg_program *ureg_create( unsigned processor )
 {
-   int i;
   struct ureg_program *ureg = CALLOC_STRUCT( ureg_program );
   if (ureg == NULL)
      goto no_ureg;

   ureg->processor = processor;
-
-   for (i = 0; i < Elements(ureg->properties); i++)
-      ureg->properties[i] = ~0;
+   ureg->property_gs_input_prim = ~0;
+   ureg->property_gs_output_prim = ~0;
+   ureg->property_gs_max_vertices = ~0;
+   ureg->property_gs_invocations = ~0;

   ureg->free_temps = util_bitmask_create();
   if (ureg->free_temps == NULL)
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
@@ -153,7 +153,40 @@ ureg_create_shader_and_destroy( struct ureg_program *p,
 */

 void
-ureg_property(struct ureg_program *ureg, unsigned name, unsigned value);
+ureg_property_gs_input_prim(struct ureg_program *ureg,
+                            unsigned input_prim);
+
+void
+ureg_property_gs_output_prim(struct ureg_program *ureg,
+                             unsigned output_prim);
+
+void
+ureg_property_gs_max_vertices(struct ureg_program *ureg,
+                              unsigned max_vertices);
+
+void
+ureg_property_gs_invocations(struct ureg_program *ureg,
+                             unsigned invocations);
+
+void
+ureg_property_fs_coord_origin(struct ureg_program *ureg,
+                            unsigned fs_coord_origin);
+
+void
+ureg_property_fs_coord_pixel_center(struct ureg_program *ureg,
+                            unsigned fs_coord_pixel_center);
+
+void
+ureg_property_fs_color0_writes_all_cbufs(struct ureg_program *ureg,
+                            unsigned fs_color0_writes_all_cbufs);
+
+void
+ureg_property_fs_depth_layout(struct ureg_program *ureg,
+                              unsigned fs_depth_layout);
+
+void
+ureg_property_vs_window_space_position(struct ureg_program *ureg,
+                                       boolean vs_window_space_position);


 /***********************************************************************
--- a/src/gallium/auxiliary/translate/translate_sse.c
+++ b/src/gallium/auxiliary/translate/translate_sse.c
@@ -35,7 +35,7 @@
 #include "translate.h"


-#if (defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)) && !defined(PIPE_SUBSYSTEM_EMBEDDED)
+#if (defined(PIPE_ARCH_X86) || (defined(PIPE_ARCH_X86_64) && !defined(__MINGW32__))) && !defined(PIPE_SUBSYSTEM_EMBEDDED)

 #include "rtasm/rtasm_cpu.h"
 #include "rtasm/rtasm_x86sse.h"
--- a/src/gallium/auxiliary/util/u_blit.c
+++ b/src/gallium/auxiliary/util/u_blit.c
@@ -188,7 +188,7 @@ set_vertex_shader(struct blit_state *ctx)
      const uint semantic_indexes[] = { 0, 0 };
      ctx->vs = util_make_vertex_passthrough_shader(ctx->pipe, 2,
                                                    semantic_names,
-                                                    semantic_indexes, FALSE);
+                                                    semantic_indexes);
   }

   cso_set_vertex_shader_handle(ctx->cso, ctx->vs);
@@ -559,9 +559,11 @@ util_blit_pixels_tex(struct blit_state *ctx,
   ctx->viewport.scale[0] = 0.5f * dst->width;
   ctx->viewport.scale[1] = 0.5f * dst->height;
   ctx->viewport.scale[2] = 0.5f;
+   ctx->viewport.scale[3] = 1.0f;
   ctx->viewport.translate[0] = 0.5f * dst->width;
   ctx->viewport.translate[1] = 0.5f * dst->height;
   ctx->viewport.translate[2] = 0.5f;
+   ctx->viewport.translate[3] = 0.0f;
   cso_set_viewport(ctx->cso, &ctx->viewport);

   /* texture */
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -319,8 +319,7 @@ static void bind_vs_pos_only(struct blitter_context_priv *ctx)

      ctx->vs_pos_only =
         util_make_vertex_passthrough_shader_with_so(pipe, 1, semantic_names,
-                                                     semantic_indices, FALSE,
-                                                     &so);
+                                                     semantic_indices, &so);
   }

   pipe->bind_vs_state(pipe, ctx->vs_pos_only);
@@ -336,7 +335,7 @@ static void bind_vs_passthrough(struct blitter_context_priv *ctx)
      const uint semantic_indices[] = { 0, 0 };
      ctx->vs =
         util_make_vertex_passthrough_shader(pipe, 2, semantic_names,
-                                             semantic_indices, FALSE);
+                                             semantic_indices);
   }

   pipe->bind_vs_state(pipe, ctx->vs);
@@ -683,9 +682,11 @@ static void blitter_set_rectangle(struct blitter_context_priv *ctx,
   ctx->viewport.scale[0] = 0.5f * ctx->dst_width;
   ctx->viewport.scale[1] = 0.5f * ctx->dst_height;
   ctx->viewport.scale[2] = 1.0f;
+   ctx->viewport.scale[3] = 1.0f;
   ctx->viewport.translate[0] = 0.5f * ctx->dst_width;
   ctx->viewport.translate[1] = 0.5f * ctx->dst_height;
   ctx->viewport.translate[2] = 0.0f;
+   ctx->viewport.translate[3] = 0.0f;
   ctx->base.pipe->set_viewport_states(ctx->base.pipe, 0, 1, &ctx->viewport);
 }

--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -272,7 +272,7 @@ static INLINE uint64_t xgetbv(void)


 #if defined(PIPE_ARCH_X86)
-static INLINE boolean sse2_has_daz(void)
+PIPE_ALIGN_STACK static INLINE boolean sse2_has_daz(void)
 {
   struct {
      uint32_t pad1[7];
@@ -409,8 +409,12 @@ util_cpu_detect(void)
      }

      if (regs[0] >= 0x80000006) {
+         /* should we really do this if the clflush size above worked? */
+         unsigned int cacheline;
         cpuid(0x80000006, regs2);
-         util_cpu_caps.cacheline = regs2[2] & 0xFF;
+         cacheline = regs2[2] & 0xFF;
+         if (cacheline > 0)
+            util_cpu_caps.cacheline = cacheline;
      }

      if (!util_cpu_caps.has_sse) {
--- a/src/gallium/auxiliary/util/u_simple_shaders.c
+++ b/src/gallium/auxiliary/util/u_simple_shaders.c
@@ -59,13 +59,11 @@ void *
 util_make_vertex_passthrough_shader(struct pipe_context *pipe,
                                    uint num_attribs,
                                    const uint *semantic_names,
-                                    const uint *semantic_indexes,
-                                    bool window_space)
+                                    const uint *semantic_indexes)
 {
   return util_make_vertex_passthrough_shader_with_so(pipe, num_attribs,
                                                      semantic_names,
-                                                      semantic_indexes,
-                                                      window_space, NULL);
+                                                      semantic_indexes, NULL);
 }

 void *
@@ -73,7 +71,6 @@ util_make_vertex_passthrough_shader_with_so(struct pipe_context *pipe,
                                    uint num_attribs,
                                    const uint *semantic_names,
                                    const uint *semantic_indexes,
-                                    bool window_space,
 				    const struct pipe_stream_output_info *so)
 {
   struct ureg_program *ureg;
@@ -83,9 +80,6 @@ util_make_vertex_passthrough_shader_with_so(struct pipe_context *pipe,
   if (ureg == NULL)
      return NULL;

-   if (window_space)
-      ureg_property(ureg, TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION, TRUE);
-
   for (i = 0; i < num_attribs; i++) {
      struct ureg_src src;
      struct ureg_dst dst;
--- a/src/gallium/auxiliary/util/u_simple_shaders.h
+++ b/src/gallium/auxiliary/util/u_simple_shaders.h
@@ -47,15 +47,13 @@ extern void *
 util_make_vertex_passthrough_shader(struct pipe_context *pipe,
                                    uint num_attribs,
                                    const uint *semantic_names,
-                                    const uint *semantic_indexes,
-                                    bool window_space);
+                                    const uint *semantic_indexes);

 extern void *
 util_make_vertex_passthrough_shader_with_so(struct pipe_context *pipe,
                                    uint num_attribs,
                                    const uint *semantic_names,
                                    const uint *semantic_indexes,
-                                    bool window_space,
                                    const struct pipe_stream_output_info *so);

 extern void *
--- a/src/gallium/auxiliary/util/u_snprintf.c
+++ b/src/gallium/auxiliary/util/u_snprintf.c
@@ -176,7 +176,7 @@
 #define HAVE_ASPRINTF 1 /* not needed */
 #define HAVE_STDARG_H 1
 #define HAVE_STDDEF_H 1
-#define HAVE_STDINT_H 0
+#define HAVE_STDINT_H 1
 #define HAVE_STDLIB_H 1
 #define HAVE_INTTYPES_H 0
 #define HAVE_LOCALE_H 0
--- a/src/gallium/auxiliary/util/u_tests.c
+++ b/src/gallium/auxiliary/util/u_tests.c
@@ -1,268 +0,0 @@
-/**************************************************************************
- *
- * Copyright 2014 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-
-#include "util/u_tests.h"
-
-#include "util/u_draw_quad.h"
-#include "util/u_format.h"
-#include "util/u_inlines.h"
-#include "util/u_simple_shaders.h"
-#include "util/u_surface.h"
-#include "util/u_tile.h"
-#include "cso_cache/cso_context.h"
-#include <stdio.h>
-
-#define TOLERANCE 0.01
-
-static struct pipe_resource *
-util_create_texture2d(struct pipe_screen *screen, unsigned width,
-                      unsigned height, enum pipe_format format)
-{
-   struct pipe_resource templ = {{0}};
-
-   templ.target = PIPE_TEXTURE_2D;
-   templ.width0 = width;
-   templ.height0 = height;
-   templ.depth0 = 1;
-   templ.array_size = 1;
-   templ.format = format;
-   templ.usage = PIPE_USAGE_DEFAULT;
-   templ.bind = PIPE_BIND_SAMPLER_VIEW |
-                (util_format_is_depth_or_stencil(format) ?
-                    PIPE_BIND_DEPTH_STENCIL : PIPE_BIND_RENDER_TARGET);
-
-   return screen->resource_create(screen, &templ);
-}
-
-static void
-util_set_framebuffer_cb0(struct cso_context *cso, struct pipe_context *ctx,
-			 struct pipe_resource *tex)
-{
-   struct pipe_surface templ = {{0}}, *surf;
-   struct pipe_framebuffer_state fb = {0};
-
-   templ.format = tex->format;
-   surf = ctx->create_surface(ctx, tex, &templ);
-
-   fb.width = tex->width0;
-   fb.height = tex->height0;
-   fb.cbufs[0] = surf;
-   fb.nr_cbufs = 1;
-
-   cso_set_framebuffer(cso, &fb);
-   pipe_surface_reference(&surf, NULL);
-}
-
-static void
-util_set_blend_normal(struct cso_context *cso)
-{
-   struct pipe_blend_state blend = {0};
-
-   blend.rt[0].colormask = PIPE_MASK_RGBA;
-   cso_set_blend(cso, &blend);
-}
-
-static void
-util_set_dsa_disable(struct cso_context *cso)
-{
-   struct pipe_depth_stencil_alpha_state dsa = {{0}};
-
-   cso_set_depth_stencil_alpha(cso, &dsa);
-}
-
-static void
-util_set_rasterizer_normal(struct cso_context *cso)
-{
-   struct pipe_rasterizer_state rs = {0};
-
-   rs.half_pixel_center = 1;
-   rs.bottom_edge_rule = 1;
-   rs.depth_clip = 1;
-
-   cso_set_rasterizer(cso, &rs);
-}
-
-static void
-util_set_max_viewport(struct cso_context *cso, struct pipe_resource *tex)
-{
-   struct pipe_viewport_state viewport;
-
-   viewport.scale[0] = 0.5f * tex->width0;
-   viewport.scale[1] = 0.5f * tex->height0;
-   viewport.scale[2] = 1.0f;
-   viewport.translate[0] = 0.5f * tex->width0;
-   viewport.translate[1] = 0.5f * tex->height0;
-   viewport.translate[2] = 0.0f;
-
-   cso_set_viewport(cso, &viewport);
-}
-
-static void
-util_set_interleaved_vertex_elements(struct cso_context *cso,
-                                     unsigned num_elements)
-{
-   int i;
-   struct pipe_vertex_element *velem =
-      calloc(1, num_elements * sizeof(struct pipe_vertex_element));
-
-   for (i = 0; i < num_elements; i++) {
-      velem[i].src_format = PIPE_FORMAT_R32G32B32A32_FLOAT;
-      velem[i].src_offset = i * 16;
-   }
-
-   cso_set_vertex_elements(cso, num_elements, velem);
-   free(velem);
-}
-
-static bool
-util_probe_rect_rgba(struct pipe_context *ctx, struct pipe_resource *tex,
-                     unsigned offx, unsigned offy, unsigned w, unsigned h,
-                     const float *expected)
-{
-   struct pipe_transfer *transfer;
-   void *map;
-   float *pixels = malloc(w * h * 4 * sizeof(float));
-   int x,y,c;
-   bool pass = true;
-
-   map = pipe_transfer_map(ctx, tex, 0, 0, PIPE_TRANSFER_READ,
-                           offx, offy, w, h, &transfer);
-   pipe_get_tile_rgba(transfer, map, 0, 0, w, h, pixels);
-   pipe_transfer_unmap(ctx, transfer);
-
-   for (y = 0; y < h; y++) {
-      for (x = 0; x < w; x++) {
-         float *probe = &pixels[(y*w + x)*4];
-
-         for (c = 0; c < 4; c++)
-            if (fabs(probe[c] - expected[c]) >= TOLERANCE) {
-               printf("Probe color at (%i,%i),  ", offx+x, offy+y);
-               printf("Expected: %.3f, %.3f, %.3f, %.3f,  ",
-                      expected[0], expected[1], expected[2], expected[3]);
-               printf("Got: %.3f, %.3f, %.3f, %.3f\n",
-                      probe[0], probe[1], probe[2], probe[2]);
-               pass = false;
-               goto done;
-            }
-      }
-   }
-done:
-
-   free(pixels);
-   return pass;
-}
-
-/**
- * Test TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION.
- *
- * The viewport state is set as usual, but it should have no effect.
- * Clipping should also be disabled.
- *
- * POSITION.xyz should already be multiplied by 1/w and POSITION.w should
- * contain 1/w. By setting w=0, we can test that POSITION.xyz isn't
- * multiplied by 1/w (otherwise nothing would be rendered).
- *
- * TODO: Whether the value of POSITION.w is correctly interpreted as 1/w
- *       during perspective interpolation is not tested.
- */
-static void
-tgsi_vs_window_space_position(struct pipe_context *ctx)
-{
-   struct cso_context *cso;
-   struct pipe_resource *cb;
-   void *fs, *vs;
-   bool pass = true;
-
-   static uint vs_attribs[] = {
-      TGSI_SEMANTIC_POSITION,
-      TGSI_SEMANTIC_GENERIC
-   };
-   static uint vs_indices[] = {0, 0};
-   static float vertices[] = {
-       0,   0, 0, 0,   1,  0, 0, 1,
-       0, 256, 0, 0,   1,  0, 0, 1,
-     256, 256, 0, 0,   1,  0, 0, 1,
-     256,   0, 0, 0,   1,  0, 0, 1,
-   };
-   static float red[] = {1, 0, 0, 1};
-   static float clear_color[] = {0.1, 0.1, 0.1, 0.1};
-
-   if (!ctx->screen->get_param(ctx->screen,
-                               PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION)) {
-      printf("Test(%s) = skip\n", __func__);
-      return;
-   }
-
-   cso = cso_create_context(ctx);
-   cb = util_create_texture2d(ctx->screen, 256, 256,
-                              PIPE_FORMAT_R8G8B8A8_UNORM);
-
-   /* Set states. */
-   util_set_framebuffer_cb0(cso, ctx, cb);
-   util_set_blend_normal(cso);
-   util_set_dsa_disable(cso);
-   util_set_rasterizer_normal(cso);
-   util_set_max_viewport(cso, cb);
-   util_set_interleaved_vertex_elements(cso, 2);
-
-   /* Fragment shader. */
-   fs = util_make_fragment_passthrough_shader(ctx, TGSI_SEMANTIC_GENERIC,
-                                       TGSI_INTERPOLATE_LINEAR, TRUE);
-   cso_set_fragment_shader_handle(cso, fs);
-
-   /* Vertex shader. */
-   vs = util_make_vertex_passthrough_shader(ctx, 2, vs_attribs, vs_indices,
-                                            TRUE);
-   cso_set_vertex_shader_handle(cso, vs);
-
-   /* Clear and draw. */
-   ctx->clear(ctx, PIPE_CLEAR_COLOR0, (void*)clear_color, 0, 0);
-   util_draw_user_vertex_buffer(cso, vertices, PIPE_PRIM_QUADS, 4, 2);
-
-   /* Probe pixels. */
-   pass = pass && util_probe_rect_rgba(ctx, cb, 0, 0,
-                                       cb->width0, cb->height0, red);
-
-   /* Cleanup. */
-   cso_release_all(cso);
-   cso_destroy_context(cso);
-   ctx->delete_vs_state(ctx, vs);
-   ctx->delete_fs_state(ctx, fs);
-   pipe_resource_reference(&cb, NULL);
-
-   printf("Test(%s) = %s\n", __func__, pass ? "pass" : "fail");
-}
-
-/**
- * Run all tests. This should be run with a clean context after
- * context_create.
- */
-void
-util_run_tests(struct pipe_context *ctx)
-{
-   tgsi_vs_window_space_position(ctx);
-}
--- a/src/gallium/auxiliary/util/u_tests.h
+++ b/src/gallium/auxiliary/util/u_tests.h
@@ -1,37 +0,0 @@
-/**************************************************************************
- *
- * Copyright 2014 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-
-#ifndef U_TESTS_H
-#define U_TESTS_H
-
-#include "pipe/p_compiler.h"
-
-struct pipe_context;
-
-void util_run_tests(struct pipe_context *ctx);
-
-#endif
--- a/src/gallium/auxiliary/vl/vl_compositor.c
+++ b/src/gallium/auxiliary/vl/vl_compositor.c
@@ -829,7 +829,9 @@ vl_compositor_clear_layers(struct vl_compositor_state *s)
      s->layers[i].blend = NULL;
      s->layers[i].fs = NULL;
      s->layers[i].viewport.scale[2] = 1;
+      s->layers[i].viewport.scale[3] = 1;
      s->layers[i].viewport.translate[2] = 0;
+      s->layers[i].viewport.translate[3] = 0;
      s->layers[i].rotate = VL_COMPOSITOR_ROTATE_0;

      for ( j = 0; j < 3; j++)
--- a/src/gallium/auxiliary/vl/vl_deint_filter.c
+++ b/src/gallium/auxiliary/vl/vl_deint_filter.c
@@ -443,6 +443,7 @@ vl_deint_filter_render(struct vl_deint_filter *filter,
   /* prepare viewport */
   memset(&viewport, 0, sizeof(viewport));
   viewport.scale[2] = 1;
+   viewport.scale[3] = 1;

   /* prepare framebuffer */
   memset(&fb_state, 0, sizeof(fb_state));
--- a/src/gallium/auxiliary/vl/vl_idct.c
+++ b/src/gallium/auxiliary/vl/vl_idct.c
@@ -609,6 +609,7 @@ init_source(struct vl_idct *idct, struct vl_idct_buffer *buffer)
   buffer->viewport_mismatch.scale[0] = tex->width0;
   buffer->viewport_mismatch.scale[1] = tex->height0;
   buffer->viewport_mismatch.scale[2] = 1;
+   buffer->viewport_mismatch.scale[3] = 1;

   return true;
 }
@@ -652,6 +653,7 @@ init_intermediate(struct vl_idct *idct, struct vl_idct_buffer *buffer)
   buffer->viewport.scale[0] = tex->width0;
   buffer->viewport.scale[1] = tex->height0;
   buffer->viewport.scale[2] = 1;
+   buffer->viewport.scale[3] = 1;

   return true;

--- a/src/gallium/auxiliary/vl/vl_matrix_filter.c
+++ b/src/gallium/auxiliary/vl/vl_matrix_filter.c
@@ -296,6 +296,7 @@ vl_matrix_filter_render(struct vl_matrix_filter *filter,
   viewport.scale[0] = dst->width;
   viewport.scale[1] = dst->height;
   viewport.scale[2] = 1;
+   viewport.scale[3] = 1;

   memset(&fb_state, 0, sizeof(fb_state));
   fb_state.width = dst->width;
--- a/src/gallium/auxiliary/vl/vl_mc.c
+++ b/src/gallium/auxiliary/vl/vl_mc.c
@@ -554,9 +554,11 @@ vl_mc_init_buffer(struct vl_mc *renderer, struct vl_mc_buffer *buffer)
   assert(renderer && buffer);

   buffer->viewport.scale[2] = 1;
+   buffer->viewport.scale[3] = 1;
   buffer->viewport.translate[0] = 0;
   buffer->viewport.translate[1] = 0;
   buffer->viewport.translate[2] = 0;
+   buffer->viewport.translate[3] = 0;

   buffer->fb_state.nr_cbufs = 1;
   buffer->fb_state.zsbuf = NULL;
--- a/src/gallium/auxiliary/vl/vl_median_filter.c
+++ b/src/gallium/auxiliary/vl/vl_median_filter.c
@@ -375,6 +375,7 @@ vl_median_filter_render(struct vl_median_filter *filter,
   viewport.scale[0] = dst->width;
   viewport.scale[1] = dst->height;
   viewport.scale[2] = 1;
+   viewport.scale[3] = 1;

   memset(&fb_state, 0, sizeof(fb_state));
   fb_state.width = dst->width;
--- a/src/gallium/auxiliary/vl/vl_zscan.c
+++ b/src/gallium/auxiliary/vl/vl_zscan.c
@@ -470,9 +470,11 @@ vl_zscan_init_buffer(struct vl_zscan *zscan, struct vl_zscan_buffer *buffer,
   buffer->viewport.scale[0] = dst->width;
   buffer->viewport.scale[1] = dst->height;
   buffer->viewport.scale[2] = 1;
+   buffer->viewport.scale[3] = 1;
   buffer->viewport.translate[0] = 0;
   buffer->viewport.translate[1] = 0;
   buffer->viewport.translate[2] = 0;
+   buffer->viewport.translate[3] = 0;

   buffer->fb_state.width = dst->width;
   buffer->fb_state.height = dst->height;
--- a/src/gallium/drivers/freedreno/Makefile.am
+++ b/src/gallium/drivers/freedreno/Makefile.am
@@ -15,7 +15,6 @@ libfreedreno_la_SOURCES = \
 	$(C_SOURCES) \
 	$(a2xx_SOURCES) \
 	$(a3xx_SOURCES) \
-	$(a4xx_SOURCES) \
 	$(ir3_SOURCES)

 noinst_PROGRAMS = ir3_compiler
--- a/src/gallium/drivers/freedreno/Makefile.sources
+++ b/src/gallium/drivers/freedreno/Makefile.sources
@@ -89,33 +89,6 @@ a3xx_SOURCES := \
 	a3xx/fd3_zsa.c \
 	a3xx/fd3_zsa.h

-a4xx_SOURCES := \
-	a4xx/a4xx.xml.h \
-	a4xx/fd4_blend.c \
-	a4xx/fd4_blend.h \
-	a4xx/fd4_context.c \
-	a4xx/fd4_context.h \
-	a4xx/fd4_draw.c \
-	a4xx/fd4_draw.h \
-	a4xx/fd4_emit.c \
-	a4xx/fd4_emit.h \
-	a4xx/fd4_gmem.c \
-	a4xx/fd4_gmem.h \
-	a4xx/fd4_program.c \
-	a4xx/fd4_program.h \
-	a4xx/fd4_query.c \
-	a4xx/fd4_query.h \
-	a4xx/fd4_rasterizer.c \
-	a4xx/fd4_rasterizer.h \
-	a4xx/fd4_screen.c \
-	a4xx/fd4_screen.h \
-	a4xx/fd4_texture.c \
-	a4xx/fd4_texture.h \
-	a4xx/fd4_util.c \
-	a4xx/fd4_util.h \
-	a4xx/fd4_zsa.c \
-	a4xx/fd4_zsa.h
-
 ir3_SOURCES := \
 	ir3/disasm-a3xx.c \
 	ir3/instr-a3xx.h \
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -11,10 +11,10 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    364 bytes, from 2013-11-30 14:47:15)
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2013-03-31 16:51:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15053 bytes, from 2014-11-09 15:45:47)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  63169 bytes, from 2014-11-13 22:44:18)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  49097 bytes, from 2014-11-14 15:38:00)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)

 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
@@ -926,11 +926,11 @@ static inline uint32_t A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size
 #define A2XX_VGT_DRAW_INITIATOR_NOT_EOP				0x00001000
 #define A2XX_VGT_DRAW_INITIATOR_SMALL_INDEX			0x00002000
 #define A2XX_VGT_DRAW_INITIATOR_PRE_DRAW_INITIATOR_ENABLE	0x00004000
-#define A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK		0xff000000
-#define A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT		24
-static inline uint32_t A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val)
+#define A2XX_VGT_DRAW_INITIATOR_NUM_INDICES__MASK		0xffff0000
+#define A2XX_VGT_DRAW_INITIATOR_NUM_INDICES__SHIFT		16
+static inline uint32_t A2XX_VGT_DRAW_INITIATOR_NUM_INDICES(uint32_t val)
 {
-	return ((val) << A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) & A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK;
+	return ((val) << A2XX_VGT_DRAW_INITIATOR_NUM_INDICES__SHIFT) & A2XX_VGT_DRAW_INITIATOR_NUM_INDICES__MASK;
 }

 #define REG_A2XX_VGT_IMMED_DATA					0x000021fd
--- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
+++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
@@ -11,10 +11,10 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    364 bytes, from 2013-11-30 14:47:15)
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2013-03-31 16:51:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15053 bytes, from 2014-11-09 15:45:47)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  63169 bytes, from 2014-11-13 22:44:18)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  49097 bytes, from 2014-11-14 15:38:00)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)

 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
@@ -122,7 +122,6 @@ enum a3xx_tex_fmt {
 	TFMT_NORM_USHORT_4444 = 7,
 	TFMT_NORM_USHORT_Z16 = 9,
 	TFMT_NORM_UINT_X8Z24 = 10,
-	TFMT_FLOAT_Z32 = 11,
 	TFMT_NORM_UINT_NV12_UV_TILED = 17,
 	TFMT_NORM_UINT_NV12_Y_TILED = 19,
 	TFMT_NORM_UINT_NV12_UV = 21,
@@ -131,38 +130,18 @@ enum a3xx_tex_fmt {
 	TFMT_NORM_UINT_I420_U = 26,
 	TFMT_NORM_UINT_I420_V = 27,
 	TFMT_NORM_UINT_2_10_10_10 = 41,
-	TFMT_FLOAT_9_9_9_E5 = 42,
-	TFMT_FLOAT_10_11_11 = 43,
 	TFMT_NORM_UINT_A8 = 44,
 	TFMT_NORM_UINT_L8_A8 = 47,
 	TFMT_NORM_UINT_8 = 48,
 	TFMT_NORM_UINT_8_8 = 49,
 	TFMT_NORM_UINT_8_8_8 = 50,
 	TFMT_NORM_UINT_8_8_8_8 = 51,
-	TFMT_NORM_SINT_8_8 = 53,
-	TFMT_NORM_SINT_8_8_8_8 = 55,
-	TFMT_UINT_8_8 = 57,
-	TFMT_UINT_8_8_8_8 = 59,
-	TFMT_SINT_8_8 = 61,
-	TFMT_SINT_8_8_8_8 = 63,
 	TFMT_FLOAT_16 = 64,
 	TFMT_FLOAT_16_16 = 65,
 	TFMT_FLOAT_16_16_16_16 = 67,
-	TFMT_UINT_16 = 68,
-	TFMT_UINT_16_16 = 69,
-	TFMT_UINT_16_16_16_16 = 71,
-	TFMT_SINT_16 = 72,
-	TFMT_SINT_16_16 = 73,
-	TFMT_SINT_16_16_16_16 = 75,
 	TFMT_FLOAT_32 = 84,
 	TFMT_FLOAT_32_32 = 85,
 	TFMT_FLOAT_32_32_32_32 = 87,
-	TFMT_UINT_32 = 88,
-	TFMT_UINT_32_32 = 89,
-	TFMT_UINT_32_32_32_32 = 91,
-	TFMT_SINT_32 = 92,
-	TFMT_SINT_32_32 = 93,
-	TFMT_SINT_32_32_32_32 = 95,
 };

 enum a3xx_tex_fetchsize {
@@ -175,34 +154,20 @@ enum a3xx_tex_fetchsize {
 };

 enum a3xx_color_fmt {
-	RB_R5G6B5_UNORM = 0,
-	RB_R5G5B5A1_UNORM = 1,
-	RB_R4G4B4A4_UNORM = 3,
 	RB_R8G8B8_UNORM = 4,
 	RB_R8G8B8A8_UNORM = 8,
-	RB_R8G8B8A8_UINT = 10,
-	RB_R8G8B8A8_SINT = 11,
-	RB_R8G8_UNORM = 12,
-	RB_R8_UINT = 14,
-	RB_R8_SINT = 15,
-	RB_R10G10B10A2_UNORM = 16,
+	RB_Z16_UNORM = 12,
 	RB_A8_UNORM = 20,
 	RB_R8_UNORM = 21,
 	RB_R16G16B16A16_FLOAT = 27,
-	RB_R11G11B10_FLOAT = 28,
-	RB_R16_SINT = 40,
-	RB_R16G16_SINT = 41,
-	RB_R16G16B16A16_SINT = 43,
-	RB_R16_UINT = 44,
-	RB_R16G16_UINT = 45,
-	RB_R16G16B16A16_UINT = 47,
 	RB_R32G32B32A32_FLOAT = 51,
-	RB_R32_SINT = 52,
-	RB_R32G32_SINT = 53,
-	RB_R32G32B32A32_SINT = 55,
-	RB_R32_UINT = 56,
-	RB_R32G32_UINT = 57,
-	RB_R32G32B32A32_UINT = 59,
+};
+
+enum a3xx_color_swap {
+	WZYX = 0,
+	WXYZ = 1,
+	ZYXW = 2,
+	XYZW = 3,
 };

 enum a3xx_sp_perfcounter_select {
@@ -586,10 +551,6 @@ enum a3xx_tex_type {

 #define REG_A3XX_CP_MEQ_DATA					0x000001db

-#define REG_A3XX_CP_WFI_PEND_CTR				0x000001f5
-
-#define REG_A3XX_RBBM_PM_OVERRIDE2				0x0000039d
-
 #define REG_A3XX_CP_PERFCOUNTER_SELECT				0x00000445

 #define REG_A3XX_CP_HW_FAULT					0x0000045c
@@ -604,12 +565,6 @@ static inline uint32_t REG_A3XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000460

 #define REG_A3XX_CP_AHB_FAULT					0x0000054d

-#define REG_A3XX_SQ_GPR_MANAGEMENT				0x00000d00
-
-#define REG_A3XX_SQ_INST_STORE_MANAGMENT			0x00000d02
-
-#define REG_A3XX_TP0_CHICKEN					0x00000e1e
-
 #define REG_A3XX_SP_GLOBAL_MEM_SIZE				0x00000e22

 #define REG_A3XX_SP_GLOBAL_MEM_ADDR				0x00000e23
@@ -923,7 +878,6 @@ static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)
 {
 	return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;
 }
-#define A3XX_RB_MRT_BUF_INFO_COLOR_SRGB				0x00004000
 #define A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK		0xfffe0000
 #define A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT		17
 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)
@@ -1062,7 +1016,6 @@ static inline uint32_t A3XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)
 {
 	return ((val) << A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK;
 }
-#define A3XX_RB_COPY_CONTROL_UNK12				0x00001000
 #define A3XX_RB_COPY_CONTROL_GMEM_BASE__MASK			0xffffc000
 #define A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT			14
 static inline uint32_t A3XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)
@@ -1141,7 +1094,7 @@ static inline uint32_t A3XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)
 #define REG_A3XX_RB_DEPTH_CLEAR					0x00002101

 #define REG_A3XX_RB_DEPTH_INFO					0x00002102
-#define A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK			0x00000003
+#define A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK			0x00000001
 #define A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT			0
 static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val)
 {
@@ -1552,8 +1505,6 @@ static inline uint32_t A3XX_VFD_CONTROL_1_REGID4INST(uint32_t val)

 #define REG_A3XX_VFD_INDEX_OFFSET				0x00002245

-#define REG_A3XX_VFD_INDEX_OFFSET				0x00002245
-
 static inline uint32_t REG_A3XX_VFD_FETCH(uint32_t i0) { return 0x00002246 + 0x2*i0; }

 static inline uint32_t REG_A3XX_VFD_FETCH_INSTR_0(uint32_t i0) { return 0x00002246 + 0x2*i0; }
@@ -2095,8 +2046,6 @@ static inline uint32_t A3XX_SP_FS_MRT_REG_REGID(uint32_t val)
 	return ((val) << A3XX_SP_FS_MRT_REG_REGID__SHIFT) & A3XX_SP_FS_MRT_REG_REGID__MASK;
 }
 #define A3XX_SP_FS_MRT_REG_HALF_PRECISION			0x00000100
-#define A3XX_SP_FS_MRT_REG_SINT					0x00000400
-#define A3XX_SP_FS_MRT_REG_UINT					0x00000800

 static inline uint32_t REG_A3XX_SP_FS_IMAGE_OUTPUT(uint32_t i0) { return 0x000022f4 + 0x1*i0; }

@@ -2116,8 +2065,6 @@ static inline uint32_t A3XX_SP_FS_LENGTH_REG_SHADERLENGTH(uint32_t val)
 	return ((val) << A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__SHIFT) & A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__MASK;
 }

-#define REG_A3XX_PA_SC_AA_CONFIG				0x00002301
-
 #define REG_A3XX_TPL1_TP_VS_TEX_OFFSET				0x00002340
 #define A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__MASK		0x000000ff
 #define A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__SHIFT		0
@@ -2468,11 +2415,11 @@ static inline uint32_t A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size
 #define A3XX_VGT_DRAW_INITIATOR_NOT_EOP				0x00001000
 #define A3XX_VGT_DRAW_INITIATOR_SMALL_INDEX			0x00002000
 #define A3XX_VGT_DRAW_INITIATOR_PRE_DRAW_INITIATOR_ENABLE	0x00004000
-#define A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK		0xff000000
-#define A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT		24
-static inline uint32_t A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val)
+#define A3XX_VGT_DRAW_INITIATOR_NUM_INDICES__MASK		0xffff0000
+#define A3XX_VGT_DRAW_INITIATOR_NUM_INDICES__SHIFT		16
+static inline uint32_t A3XX_VGT_DRAW_INITIATOR_NUM_INDICES(uint32_t val)
 {
-	return ((val) << A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) & A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__MASK;
+	return ((val) << A3XX_VGT_DRAW_INITIATOR_NUM_INDICES__SHIFT) & A3XX_VGT_DRAW_INITIATOR_NUM_INDICES__MASK;
 }

 #define REG_A3XX_VGT_IMMED_DATA					0x000021fd
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c
@@ -105,8 +105,7 @@ fd3_blend_state_create(struct pipe_context *pctx,
 				A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
 				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
 				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
-				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor)) |
-				A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE;
+				A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));

 		so->rb_mrt[i].control =
 				A3XX_RB_MRT_CONTROL_ROP_CODE(rop) |
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -566,16 +566,20 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 		}
 	}

-	if ((dirty & FD_DIRTY_BLEND) && ctx->blend) {
+	if ((dirty & (FD_DIRTY_BLEND | FD_DIRTY_FRAMEBUFFER)) && ctx->blend) {
 		struct fd3_blend_stateobj *blend = fd3_blend_stateobj(ctx->blend);
 		uint32_t i;

 		for (i = 0; i < ARRAY_SIZE(blend->rb_mrt); i++) {
+			bool is_float = util_format_is_float(
+					pipe_surface_format(ctx->framebuffer.cbufs[i]));
+
 			OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
 			OUT_RING(ring, blend->rb_mrt[i].control);

 			OUT_PKT0(ring, REG_A3XX_RB_MRT_BLEND_CONTROL(i), 1);
-			OUT_RING(ring, blend->rb_mrt[i].blend_control);
+			OUT_RING(ring, blend->rb_mrt[i].blend_control |
+					COND(!is_float, A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE));
 		}
 	}

--- a/src/gallium/drivers/freedreno/a3xx/fd3_util.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_util.c
@@ -341,7 +341,7 @@ fd3_pipe2color(enum pipe_format format)
 		return RB_R8G8B8A8_UNORM;

 	case PIPE_FORMAT_Z16_UNORM:
-		return RB_R8G8_UNORM;
+		return RB_Z16_UNORM;

 	case PIPE_FORMAT_Z24X8_UNORM:
 	case PIPE_FORMAT_Z24_UNORM_S8_UINT:
--- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
+++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
@@ -1,127 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-
-#include "fd4_blend.h"
-#include "fd4_context.h"
-#include "fd4_util.h"
-
-static enum a4xx_rb_blend_opcode
-blend_func(unsigned func)
-{
-	switch (func) {
-	case PIPE_BLEND_ADD:
-		return BLEND_DST_PLUS_SRC;
-	case PIPE_BLEND_MIN:
-		return BLEND_MIN_DST_SRC;
-	case PIPE_BLEND_MAX:
-		return BLEND_MAX_DST_SRC;
-	case PIPE_BLEND_SUBTRACT:
-		return BLEND_SRC_MINUS_DST;
-	case PIPE_BLEND_REVERSE_SUBTRACT:
-		return BLEND_DST_MINUS_SRC;
-	default:
-		DBG("invalid blend func: %x", func);
-		return 0;
-	}
-}
-
-void *
-fd4_blend_state_create(struct pipe_context *pctx,
-		const struct pipe_blend_state *cso)
-{
-	struct fd4_blend_stateobj *so;
-//	enum a3xx_rop_code rop = ROP_COPY;
-	bool reads_dest = false;
-	int i;
-
-	if (cso->logicop_enable) {
-//		rop = cso->logicop_func;  /* maps 1:1 */
-
-		switch (cso->logicop_func) {
-		case PIPE_LOGICOP_NOR:
-		case PIPE_LOGICOP_AND_INVERTED:
-		case PIPE_LOGICOP_AND_REVERSE:
-		case PIPE_LOGICOP_INVERT:
-		case PIPE_LOGICOP_XOR:
-		case PIPE_LOGICOP_NAND:
-		case PIPE_LOGICOP_AND:
-		case PIPE_LOGICOP_EQUIV:
-		case PIPE_LOGICOP_NOOP:
-		case PIPE_LOGICOP_OR_INVERTED:
-		case PIPE_LOGICOP_OR_REVERSE:
-		case PIPE_LOGICOP_OR:
-			reads_dest = true;
-			break;
-		}
-	}
-
-	if (cso->independent_blend_enable) {
-		DBG("Unsupported! independent blend state");
-		return NULL;
-	}
-
-	so = CALLOC_STRUCT(fd4_blend_stateobj);
-	if (!so)
-		return NULL;
-
-	so->base = *cso;
-
-	for (i = 0; i < ARRAY_SIZE(so->rb_mrt); i++) {
-		const struct pipe_rt_blend_state *rt = &cso->rt[i];
-
-		so->rb_mrt[i].blend_control =
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) |
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
-
-		so->rb_mrt[i].control =
-				0xc00 | /* XXX ROP_CODE ?? */
-				A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
-
-		if (rt->blend_enable)
-			so->rb_mrt[i].control |=
-					A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE |
-					A4XX_RB_MRT_CONTROL_BLEND |
-					A4XX_RB_MRT_CONTROL_BLEND2;
-
-		if (reads_dest)
-			so->rb_mrt[i].control |= A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
-
-		if (cso->dither)
-			so->rb_mrt[i].buf_info |= A4XX_RB_MRT_BUF_INFO_DITHER_MODE(DITHER_ALWAYS);
-	}
-
-	return so;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
@@ -1,53 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_BLEND_H_
-#define FD4_BLEND_H_
-
-#include "pipe/p_state.h"
-#include "pipe/p_context.h"
-
-struct fd4_blend_stateobj {
-	struct pipe_blend_state base;
-	struct {
-		uint32_t control;
-		uint32_t buf_info;
-		uint32_t blend_control;
-	} rb_mrt[8];
-};
-
-static INLINE struct fd4_blend_stateobj *
-fd4_blend_stateobj(struct pipe_blend_state *blend)
-{
-	return (struct fd4_blend_stateobj *)blend;
-}
-
-void * fd4_blend_state_create(struct pipe_context *pctx,
-		const struct pipe_blend_state *cso);
-
-#endif /* FD4_BLEND_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_context.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_context.c
@@ -1,172 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-
-#include "fd4_context.h"
-#include "fd4_blend.h"
-#include "fd4_draw.h"
-#include "fd4_emit.h"
-#include "fd4_gmem.h"
-#include "fd4_program.h"
-#include "fd4_query.h"
-#include "fd4_rasterizer.h"
-#include "fd4_texture.h"
-#include "fd4_zsa.h"
-
-static void
-fd4_context_destroy(struct pipe_context *pctx)
-{
-	struct fd4_context *fd4_ctx = fd4_context(fd_context(pctx));
-
-	util_dynarray_fini(&fd4_ctx->rbrc_patches);
-
-	fd_bo_del(fd4_ctx->vs_pvt_mem);
-	fd_bo_del(fd4_ctx->fs_pvt_mem);
-	fd_bo_del(fd4_ctx->vsc_size_mem);
-
-	pctx->delete_vertex_elements_state(pctx, fd4_ctx->solid_vbuf_state.vtx);
-	pctx->delete_vertex_elements_state(pctx, fd4_ctx->blit_vbuf_state.vtx);
-
-	pipe_resource_reference(&fd4_ctx->solid_vbuf, NULL);
-	pipe_resource_reference(&fd4_ctx->blit_texcoord_vbuf, NULL);
-
-	fd_context_destroy(pctx);
-}
-
-/* TODO we could combine a few of these small buffers (solid_vbuf,
- * blit_texcoord_vbuf, and vsc_size_mem, into a single buffer and
- * save a tiny bit of memory
- */
-
-static struct pipe_resource *
-create_solid_vertexbuf(struct pipe_context *pctx)
-{
-	static const float init_shader_const[] = {
-			-1.000000, +1.000000, +1.000000,
-			+1.000000, -1.000000, +1.000000,
-	};
-	struct pipe_resource *prsc = pipe_buffer_create(pctx->screen,
-			PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, sizeof(init_shader_const));
-	pipe_buffer_write(pctx, prsc, 0,
-			sizeof(init_shader_const), init_shader_const);
-	return prsc;
-}
-
-static struct pipe_resource *
-create_blit_texcoord_vertexbuf(struct pipe_context *pctx)
-{
-	struct pipe_resource *prsc = pipe_buffer_create(pctx->screen,
-			PIPE_BIND_CUSTOM, PIPE_USAGE_DYNAMIC, 16);
-	return prsc;
-}
-
-static const uint8_t primtypes[PIPE_PRIM_MAX] = {
-		[PIPE_PRIM_POINTS]         = DI_PT_POINTLIST_A3XX,
-		[PIPE_PRIM_LINES]          = DI_PT_LINELIST,
-		[PIPE_PRIM_LINE_STRIP]     = DI_PT_LINESTRIP,
-		[PIPE_PRIM_LINE_LOOP]      = DI_PT_LINELOOP,
-		[PIPE_PRIM_TRIANGLES]      = DI_PT_TRILIST,
-		[PIPE_PRIM_TRIANGLE_STRIP] = DI_PT_TRISTRIP,
-		[PIPE_PRIM_TRIANGLE_FAN]   = DI_PT_TRIFAN,
-};
-
-struct pipe_context *
-fd4_context_create(struct pipe_screen *pscreen, void *priv)
-{
-	struct fd_screen *screen = fd_screen(pscreen);
-	struct fd4_context *fd4_ctx = CALLOC_STRUCT(fd4_context);
-	struct pipe_context *pctx;
-
-	if (!fd4_ctx)
-		return NULL;
-
-	pctx = &fd4_ctx->base.base;
-
-	fd4_ctx->base.dev = fd_device_ref(screen->dev);
-	fd4_ctx->base.screen = fd_screen(pscreen);
-
-	pctx->destroy = fd4_context_destroy;
-	pctx->create_blend_state = fd4_blend_state_create;
-	pctx->create_rasterizer_state = fd4_rasterizer_state_create;
-	pctx->create_depth_stencil_alpha_state = fd4_zsa_state_create;
-
-	fd4_draw_init(pctx);
-	fd4_gmem_init(pctx);
-	fd4_texture_init(pctx);
-	fd4_prog_init(pctx);
-
-	pctx = fd_context_init(&fd4_ctx->base, pscreen, primtypes, priv);
-	if (!pctx)
-		return NULL;
-
-	util_dynarray_init(&fd4_ctx->rbrc_patches);
-
-	fd4_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000,
-			DRM_FREEDRENO_GEM_TYPE_KMEM);
-
-	fd4_ctx->fs_pvt_mem = fd_bo_new(screen->dev, 0x2000,
-			DRM_FREEDRENO_GEM_TYPE_KMEM);
-
-	fd4_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000,
-			DRM_FREEDRENO_GEM_TYPE_KMEM);
-
-	fd4_ctx->solid_vbuf = create_solid_vertexbuf(pctx);
-	fd4_ctx->blit_texcoord_vbuf = create_blit_texcoord_vertexbuf(pctx);
-
-	/* setup solid_vbuf_state: */
-	fd4_ctx->solid_vbuf_state.vtx = pctx->create_vertex_elements_state(
-			pctx, 1, (struct pipe_vertex_element[]){{
-				.vertex_buffer_index = 0,
-				.src_offset = 0,
-				.src_format = PIPE_FORMAT_R32G32B32_FLOAT,
-			}});
-	fd4_ctx->solid_vbuf_state.vertexbuf.count = 1;
-	fd4_ctx->solid_vbuf_state.vertexbuf.vb[0].stride = 12;
-	fd4_ctx->solid_vbuf_state.vertexbuf.vb[0].buffer = fd4_ctx->solid_vbuf;
-
-	/* setup blit_vbuf_state: */
-	fd4_ctx->blit_vbuf_state.vtx = pctx->create_vertex_elements_state(
-			pctx, 2, (struct pipe_vertex_element[]){{
-				.vertex_buffer_index = 0,
-				.src_offset = 0,
-				.src_format = PIPE_FORMAT_R32G32_FLOAT,
-			}, {
-				.vertex_buffer_index = 1,
-				.src_offset = 0,
-				.src_format = PIPE_FORMAT_R32G32B32_FLOAT,
-			}});
-	fd4_ctx->blit_vbuf_state.vertexbuf.count = 2;
-	fd4_ctx->blit_vbuf_state.vertexbuf.vb[0].stride = 8;
-	fd4_ctx->blit_vbuf_state.vertexbuf.vb[0].buffer = fd4_ctx->blit_texcoord_vbuf;
-	fd4_ctx->blit_vbuf_state.vertexbuf.vb[1].stride = 12;
-	fd4_ctx->blit_vbuf_state.vertexbuf.vb[1].buffer = fd4_ctx->solid_vbuf;
-
-	fd4_query_context_init(pctx);
-
-	return pctx;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_context.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_context.h
@@ -1,102 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_CONTEXT_H_
-#define FD4_CONTEXT_H_
-
-#include "freedreno_drmif.h"
-
-#include "freedreno_context.h"
-
-#include "ir3_shader.h"
-
-struct fd4_context {
-	struct fd_context base;
-
-	/* Keep track of writes to RB_RENDER_CONTROL which need to be patched
-	 * once we know whether or not to use GMEM, and GMEM tile pitch.
-	 */
-	struct util_dynarray rbrc_patches;
-
-	struct fd_bo *vs_pvt_mem, *fs_pvt_mem;
-
-	/* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes).  We
-	 * could combine it with another allocation.
-	 */
-	struct fd_bo *vsc_size_mem;
-
-	/* vertex buf used for clear/gmem->mem vertices, and mem->gmem
-	 * vertices:
-	 */
-	struct pipe_resource *solid_vbuf;
-
-	/* vertex buf used for mem->gmem tex coords:
-	 */
-	struct pipe_resource *blit_texcoord_vbuf;
-
-	/* vertex state for solid_vbuf:
-	 *    - solid_vbuf / 12 / R32G32B32_FLOAT
-	 */
-	struct fd_vertex_state solid_vbuf_state;
-
-	/* vertex state for blit_prog:
-	 *    - blit_texcoord_vbuf / 8 / R32G32_FLOAT
-	 *    - solid_vbuf / 12 / R32G32B32_FLOAT
-	 */
-	struct fd_vertex_state blit_vbuf_state;
-
-	/* if *any* of bits are set in {v,f}saturate_{s,t,r} */
-	bool vsaturate, fsaturate;
-
-	/* bitmask of sampler which needs coords clamped for vertex
-	 * shader:
-	 */
-	unsigned vsaturate_s, vsaturate_t, vsaturate_r;
-
-	/* bitmask of sampler which needs coords clamped for frag
-	 * shader:
-	 */
-	unsigned fsaturate_s, fsaturate_t, fsaturate_r;
-
-	/* some state changes require a different shader variant.  Keep
-	 * track of this so we know when we need to re-emit shader state
-	 * due to variant change.  See fixup_shader_state()
-	 */
-	struct ir3_shader_key last_key;
-};
-
-static INLINE struct fd4_context *
-fd4_context(struct fd_context *ctx)
-{
-	return (struct fd4_context *)ctx;
-}
-
-struct pipe_context *
-fd4_context_create(struct pipe_screen *pscreen, void *priv);
-
-#endif /* FD4_CONTEXT_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -1,326 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-#include "util/u_prim.h"
-
-#include "freedreno_state.h"
-#include "freedreno_resource.h"
-
-#include "fd4_draw.h"
-#include "fd4_context.h"
-#include "fd4_emit.h"
-#include "fd4_program.h"
-#include "fd4_util.h"
-#include "fd4_zsa.h"
-
-
-static void
-draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
-		struct fd4_emit *emit)
-{
-	const struct pipe_draw_info *info = emit->info;
-
-	fd4_emit_state(ctx, ring, emit);
-
-	if (emit->dirty & (FD_DIRTY_VTXBUF | FD_DIRTY_VTXSTATE))
-		fd4_emit_vertex_bufs(ring, emit);
-
-	OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2);
-	OUT_RING(ring, info->start);            /* VFD_INDEX_OFFSET */
-	OUT_RING(ring, info->start_instance);   /* ??? UNKNOWN_2209 */
-
-	OUT_PKT0(ring, REG_A4XX_PC_RESTART_INDEX, 1);
-	OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */
-			info->restart_index : 0xffffffff);
-
-	fd4_draw_emit(ctx, ring,
-			emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
-			info);
-}
-
-/* fixup dirty shader state in case some "unrelated" (from the state-
- * tracker's perspective) state change causes us to switch to a
- * different variant.
- */
-static void
-fixup_shader_state(struct fd_context *ctx, struct ir3_shader_key *key)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct ir3_shader_key *last_key = &fd4_ctx->last_key;
-
-	if (!ir3_shader_key_equal(last_key, key)) {
-		ctx->dirty |= FD_DIRTY_PROG;
-
-		if (last_key->has_per_samp || key->has_per_samp) {
-			if ((last_key->vsaturate_s != key->vsaturate_s) ||
-					(last_key->vsaturate_t != key->vsaturate_t) ||
-					(last_key->vsaturate_r != key->vsaturate_r))
-				ctx->prog.dirty |= FD_SHADER_DIRTY_VP;
-
-			if ((last_key->fsaturate_s != key->fsaturate_s) ||
-					(last_key->fsaturate_t != key->fsaturate_t) ||
-					(last_key->fsaturate_r != key->fsaturate_r))
-				ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
-		}
-
-		if (last_key->color_two_side != key->color_two_side)
-			ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
-
-		if (last_key->half_precision != key->half_precision)
-			ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
-
-		if (last_key->alpha != key->alpha)
-			ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
-
-		fd4_ctx->last_key = *key;
-	}
-}
-
-static void
-fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct fd4_emit emit = {
-		.vtx  = &ctx->vtx,
-		.prog = &ctx->prog,
-		.info = info,
-		.key = {
-			/* do binning pass first: */
-			.binning_pass = true,
-			.color_two_side = ctx->rasterizer ? ctx->rasterizer->light_twoside : false,
-			.alpha = util_format_is_alpha(pipe_surface_format(ctx->framebuffer.cbufs[0])),
-			// TODO set .half_precision based on render target format,
-			// ie. float16 and smaller use half, float32 use full..
-			.half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF),
-			.has_per_samp = fd4_ctx->fsaturate || fd4_ctx->vsaturate,
-			.vsaturate_s = fd4_ctx->vsaturate_s,
-			.vsaturate_t = fd4_ctx->vsaturate_t,
-			.vsaturate_r = fd4_ctx->vsaturate_r,
-			.fsaturate_s = fd4_ctx->fsaturate_s,
-			.fsaturate_t = fd4_ctx->fsaturate_t,
-			.fsaturate_r = fd4_ctx->fsaturate_r,
-		},
-		.rasterflat = ctx->rasterizer && ctx->rasterizer->flatshade,
-	};
-	unsigned dirty;
-
-	fixup_shader_state(ctx, &emit.key);
-
-	dirty = ctx->dirty;
-	emit.dirty = dirty & ~(FD_DIRTY_BLEND);
-	draw_impl(ctx, ctx->binning_ring, &emit);
-
-	/* and now regular (non-binning) pass: */
-	emit.key.binning_pass = false;
-	emit.dirty = dirty;
-	emit.vp = NULL;   /* we changed key so need to refetch vp */
-	draw_impl(ctx, ctx->ring, &emit);
-}
-
-/* clear operations ignore viewport state, so we need to reset it
- * based on framebuffer state:
- */
-static void
-reset_viewport(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb)
-{
-	float half_width = pfb->width * 0.5f;
-	float half_height = pfb->height * 0.5f;
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_XOFFSET_0, 4);
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0(half_width));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_XSCALE_0(half_width));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_YOFFSET_0(half_height));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_YSCALE_0(-half_height));
-}
-
-static void
-fd4_clear(struct fd_context *ctx, unsigned buffers,
-		const union pipe_color_union *color, double depth, unsigned stencil)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-	unsigned dirty = ctx->dirty;
-	unsigned ce, i;
-	struct fd4_emit emit = {
-		.vtx  = &fd4_ctx->solid_vbuf_state,
-		.prog = &ctx->solid_prog,
-		.key = {
-			.half_precision = true,
-		},
-	};
-	uint32_t colr = 0;
-
-	if ((buffers & PIPE_CLEAR_COLOR) && pfb->nr_cbufs)
-		colr  = pack_rgba(pfb->cbufs[0]->format, color->f);
-
-	dirty &= FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR;
-	dirty |= FD_DIRTY_PROG;
-	emit.dirty = dirty;
-
-	OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1);
-	OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST);
-
-	/* emit generic state now: */
-	fd4_emit_state(ctx, ring, &emit);
-	reset_viewport(ring, pfb);
-
-	if (buffers & PIPE_CLEAR_DEPTH) {
-		OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
-		OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE |
-				A4XX_RB_DEPTH_CONTROL_Z_ENABLE |
-				A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_ALWAYS));
-
-		fd_wfi(ctx, ring);
-		OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_ZOFFSET_0, 2);
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZOFFSET_0(0.0));
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(depth));
-		ctx->dirty |= FD_DIRTY_VIEWPORT;
-	} else {
-		OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
-		OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER));
-	}
-
-	if (buffers & PIPE_CLEAR_STENCIL) {
-		OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2);
-		OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(stencil) |
-				A4XX_RB_STENCILREFMASK_STENCILMASK(stencil) |
-				A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
-		OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(0) |
-				A4XX_RB_STENCILREFMASK_STENCILMASK(0) |
-				0xff000000 | // XXX ???
-				A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
-
-		OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2);
-		OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
-				A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_ALWAYS) |
-				A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_REPLACE) |
-				A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) |
-				A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
-		OUT_RING(ring, 0x00000000); /* RB_STENCIL_CONTROL2 */
-	} else {
-		OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2);
-		OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(0) |
-				A4XX_RB_STENCILREFMASK_STENCILMASK(0) |
-				A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0));
-		OUT_RING(ring, A4XX_RB_STENCILREFMASK_BF_STENCILREF(0) |
-				A4XX_RB_STENCILREFMASK_BF_STENCILMASK(0) |
-				A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0));
-
-		OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2);
-		OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) |
-				A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) |
-				A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) |
-				A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
-		OUT_RING(ring, 0x00000000); /* RB_STENCIL_CONTROL2 */
-	}
-
-	if (buffers & PIPE_CLEAR_COLOR) {
-		OUT_PKT0(ring, REG_A4XX_RB_ALPHA_CONTROL, 1);
-		OUT_RING(ring, A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(FUNC_NEVER));
-		ce = 0xf;
-	} else {
-		ce = 0x0;
-	}
-
-	for (i = 0; i < 8; i++) {
-		OUT_PKT0(ring, REG_A4XX_RB_MRT_CONTROL(i), 1);
-		OUT_RING(ring, A4XX_RB_MRT_CONTROL_FASTCLEAR |
-				A4XX_RB_MRT_CONTROL_B11 |
-				A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(ce));
-
-		OUT_PKT0(ring, REG_A4XX_RB_MRT_BLEND_CONTROL(i), 1);
-		OUT_RING(ring, A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(FACTOR_ONE) |
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(BLEND_DST_PLUS_SRC) |
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(FACTOR_ZERO) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(FACTOR_ONE) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(BLEND_DST_PLUS_SRC) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO));
-	}
-
-	fd4_emit_vertex_bufs(ring, &emit);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
-	OUT_RING(ring, 0x0);          /* XXX GRAS_ALPHA_CONTROL */
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CLEAR_CNTL, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_RB_CLEAR_COLOR_DW0, 4);
-	OUT_RING(ring, colr);         /* RB_CLEAR_COLOR_DW0 */
-	OUT_RING(ring, colr);         /* RB_CLEAR_COLOR_DW1 */
-	OUT_RING(ring, colr);         /* RB_CLEAR_COLOR_DW2 */
-	OUT_RING(ring, colr);         /* RB_CLEAR_COLOR_DW3 */
-
-	/* until fastclear works: */
-	fd4_emit_constant(ring, SB_FRAG_SHADER, 0, 0, 4, color->ui, NULL);
-
-	OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2);
-	OUT_RING(ring, 0);            /* VFD_INDEX_OFFSET */
-	OUT_RING(ring, 0);            /* ??? UNKNOWN_2209 */
-
-	OUT_PKT0(ring, REG_A4XX_PC_RESTART_INDEX, 1);
-	OUT_RING(ring, 0xffffffff);   /* PC_RESTART_INDEX */
-
-	OUT_PKT3(ring, CP_UNKNOWN_1A, 1);
-	OUT_RING(ring, 0x00000001);
-
-	fd4_draw(ctx, ring, DI_PT_RECTLIST, USE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
-
-	OUT_PKT3(ring, CP_UNKNOWN_1A, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CLEAR_CNTL, 1);
-	OUT_RING(ring, A4XX_GRAS_CLEAR_CNTL_NOT_FASTCLEAR);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
-			A4XX_GRAS_SC_CONTROL_MSAA_DISABLE |
-			A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) |
-			A4XX_GRAS_SC_CONTROL_RASTER_MODE(0));
-}
-
-void
-fd4_draw_init(struct pipe_context *pctx)
-{
-	struct fd_context *ctx = fd_context(pctx);
-	ctx->draw_vbo = fd4_draw_vbo;
-	ctx->clear = fd4_clear;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
@@ -1,122 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_DRAW_H_
-#define FD4_DRAW_H_
-
-#include "pipe/p_context.h"
-
-#include "freedreno_draw.h"
-
-void fd4_draw_init(struct pipe_context *pctx);
-
-/* draw packet changed on a4xx, so cannot reuse one from a2xx/a3xx.. */
-
-static inline uint32_t DRAW4(enum pc_di_primtype prim_type,
-		enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
-		enum pc_di_vis_cull_mode vis_cull_mode)
-{
-	return (prim_type         << 0) |
-			(source_select     << 6) |
-			((index_size & 1)  << 11) |
-			((index_size >> 1) << 13) |
-			(vis_cull_mode     << 8);
-}
-
-static inline void
-fd4_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
-		enum pc_di_primtype primtype,
-		enum pc_di_vis_cull_mode vismode,
-		enum pc_di_src_sel src_sel, uint32_t count,
-		enum pc_di_index_size idx_type,
-		uint32_t idx_size, uint32_t idx_offset,
-		struct fd_bo *idx_bo)
-{
-	/* for debug after a lock up, write a unique counter value
-	 * to scratch7 for each draw, to make it easier to match up
-	 * register dumps to cmdstream.  The combination of IB
-	 * (scratch6) and DRAW is enough to "triangulate" the
-	 * particular draw that caused lockup.
-	 */
-	emit_marker(ring, 7);
-
-	OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_bo ? 6 : 3);
-	if (vismode == USE_VISIBILITY) {
-		/* leave vis mode blank for now, it will be patched up when
-		 * we know if we are binning or not
-		 */
-		OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
-				&ctx->draw_patches);
-	} else {
-		OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
-	}
-	OUT_RING(ring, 0x1);               /* XXX */
-	OUT_RING(ring, count);             /* NumIndices */
-	if (idx_bo) {
-		OUT_RING(ring, 0x0);           /* XXX */
-		OUT_RELOC(ring, idx_bo, idx_offset, 0, 0);
-		OUT_RING (ring, idx_size);
-	}
-
-	emit_marker(ring, 7);
-
-	fd_reset_wfi(ctx);
-}
-
-static inline void
-fd4_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
-		enum pc_di_vis_cull_mode vismode,
-		const struct pipe_draw_info *info)
-{
-	struct pipe_index_buffer *idx = &ctx->indexbuf;
-	struct fd_bo *idx_bo = NULL;
-	enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
-	enum pc_di_src_sel src_sel;
-	uint32_t idx_size, idx_offset;
-
-	if (info->indexed) {
-		assert(!idx->user_buffer);
-
-		idx_bo = fd_resource(idx->buffer)->bo;
-		idx_type = size2indextype(idx->index_size);
-		idx_size = idx->index_size * info->count;
-		idx_offset = idx->offset + (info->start * idx->index_size);
-		src_sel = DI_SRC_SEL_DMA;
-	} else {
-		idx_bo = NULL;
-		idx_type = INDEX_SIZE_IGN;
-		idx_size = 0;
-		idx_offset = 0;
-		src_sel = DI_SRC_SEL_AUTO_INDEX;
-	}
-
-	fd4_draw(ctx, ring, ctx->primtypes[info->mode], vismode, src_sel,
-			info->count, idx_type, idx_size, idx_offset, idx_bo);
-}
-
-#endif /* FD4_DRAW_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -1,688 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-#include "util/u_helpers.h"
-#include "util/u_format.h"
-
-#include "freedreno_resource.h"
-
-#include "fd4_emit.h"
-#include "fd4_blend.h"
-#include "fd4_context.h"
-#include "fd4_program.h"
-#include "fd4_rasterizer.h"
-#include "fd4_texture.h"
-#include "fd4_util.h"
-#include "fd4_zsa.h"
-
-/* regid:          base const register
- * prsc or dwords: buffer containing constant values
- * sizedwords:     size of const value buffer
- */
-void
-fd4_emit_constant(struct fd_ringbuffer *ring,
-		enum adreno_state_block sb,
-		uint32_t regid, uint32_t offset, uint32_t sizedwords,
-		const uint32_t *dwords, struct pipe_resource *prsc)
-{
-	uint32_t i, sz;
-	enum adreno_state_src src;
-
-	if (prsc) {
-		sz = 0;
-		src = 0x2;  // TODO ??
-	} else {
-		sz = sizedwords;
-		src = SS_DIRECT;
-	}
-
-	OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz);
-	OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) |
-			CP_LOAD_STATE_0_STATE_SRC(src) |
-			CP_LOAD_STATE_0_STATE_BLOCK(sb) |
-			CP_LOAD_STATE_0_NUM_UNIT(sizedwords/4));
-	if (prsc) {
-		struct fd_bo *bo = fd_resource(prsc)->bo;
-		OUT_RELOC(ring, bo, offset,
-				CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS), 0);
-	} else {
-		OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) |
-				CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS));
-		dwords = (uint32_t *)&((uint8_t *)dwords)[offset];
-	}
-	for (i = 0; i < sz; i++) {
-		OUT_RING(ring, dwords[i]);
-	}
-}
-
-static void
-emit_constants(struct fd_ringbuffer *ring,
-		enum adreno_state_block sb,
-		struct fd_constbuf_stateobj *constbuf,
-		struct ir3_shader_variant *shader)
-{
-	uint32_t enabled_mask = constbuf->enabled_mask;
-	uint32_t first_immediate;
-	uint32_t base = 0;
-
-	// XXX TODO only emit dirty consts.. but we need to keep track if
-	// they are clobbered by a clear, gmem2mem, or mem2gmem..
-	constbuf->dirty_mask = enabled_mask;
-
-	/* in particular, with binning shader we may end up with unused
-	 * consts, ie. we could end up w/ constlen that is smaller
-	 * than first_immediate.  In that case truncate the user consts
-	 * early to avoid HLSQ lockup caused by writing too many consts
-	 */
-	first_immediate = MIN2(shader->first_immediate, shader->constlen);
-
-	/* emit user constants: */
-	while (enabled_mask) {
-		unsigned index = ffs(enabled_mask) - 1;
-		struct pipe_constant_buffer *cb = &constbuf->cb[index];
-		unsigned size = align(cb->buffer_size, 4) / 4; /* size in dwords */
-
-		// I expect that size should be a multiple of vec4's:
-		assert(size == align(size, 4));
-
-		/* gallium could leave const buffers bound above what the
-		 * current shader uses.. don't let that confuse us.
-		 */
-		if (base >= (4 * first_immediate))
-			break;
-
-		if (constbuf->dirty_mask & (1 << index)) {
-			/* and even if the start of the const buffer is before
-			 * first_immediate, the end may not be:
-			 */
-			size = MIN2(size, (4 * first_immediate) - base);
-			fd4_emit_constant(ring, sb, base,
-					cb->buffer_offset, size,
-					cb->user_buffer, cb->buffer);
-			constbuf->dirty_mask &= ~(1 << index);
-		}
-
-		base += size;
-		enabled_mask &= ~(1 << index);
-	}
-
-	/* emit shader immediates: */
-	if (shader) {
-		int size = shader->immediates_count;
-		base = shader->first_immediate;
-
-		/* truncate size to avoid writing constants that shader
-		 * does not use:
-		 */
-		size = MIN2(size + base, shader->constlen) - base;
-
-		/* convert out of vec4: */
-		base *= 4;
-		size *= 4;
-
-		if (size > 0) {
-			fd4_emit_constant(ring, sb, base,
-				0, size, shader->immediates[0].val, NULL);
-		}
-	}
-}
-
-static void
-emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
-		enum adreno_state_block sb, struct fd_texture_stateobj *tex)
-{
-	unsigned i;
-
-	if (tex->num_samplers > 0) {
-		/* output sampler state: */
-		OUT_PKT3(ring, CP_LOAD_STATE, 2 + 2 + (2 * tex->num_samplers));
-		OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) |
-				CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) |
-				CP_LOAD_STATE_0_STATE_BLOCK(sb) |
-				CP_LOAD_STATE_0_NUM_UNIT(tex->num_samplers));
-		OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER) |
-				CP_LOAD_STATE_1_EXT_SRC_ADDR(0));
-		for (i = 0; i < tex->num_samplers; i++) {
-			static const struct fd4_sampler_stateobj dummy_sampler = {};
-			const struct fd4_sampler_stateobj *sampler = tex->samplers[i] ?
-					fd4_sampler_stateobj(tex->samplers[i]) :
-					&dummy_sampler;
-			OUT_RING(ring, sampler->texsamp0);
-			OUT_RING(ring, sampler->texsamp1);
-		}
-		/* maybe an a420.0 (or a4xx.0) workaround?? or just driver bug? */
-		OUT_RING(ring, 0x00000000);
-		OUT_RING(ring, 0x00000000);
-	}
-
-	if (tex->num_textures > 0) {
-		/* emit texture state: */
-		OUT_PKT3(ring, CP_LOAD_STATE, 2 + (8 * tex->num_textures));
-		OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) |
-				CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) |
-				CP_LOAD_STATE_0_STATE_BLOCK(sb) |
-				CP_LOAD_STATE_0_NUM_UNIT(tex->num_textures));
-		OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS) |
-				CP_LOAD_STATE_1_EXT_SRC_ADDR(0));
-		for (i = 0; i < tex->num_textures; i++) {
-			static const struct fd4_pipe_sampler_view dummy_view = {};
-			const struct fd4_pipe_sampler_view *view = tex->textures[i] ?
-					fd4_pipe_sampler_view(tex->textures[i]) :
-					&dummy_view;
-			struct fd_resource *rsc = view->tex_resource;
-			struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
-			OUT_RING(ring, view->texconst0);
-			OUT_RING(ring, view->texconst1);
-			OUT_RING(ring, view->texconst2);
-			OUT_RING(ring, view->texconst3);
-			OUT_RELOC(ring, rsc->bo, slice->offset, 0, 0);
-			OUT_RING(ring, 0x00000000);
-			OUT_RING(ring, 0x00000000);
-			OUT_RING(ring, 0x00000000);
-		}
-	}
-}
-
-/* emit texture state for mem->gmem restore operation.. eventually it would
- * be good to get rid of this and use normal CSO/etc state for more of these
- * special cases..
- */
-void
-fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, struct pipe_surface *psurf)
-{
-	struct fd_resource *rsc = fd_resource(psurf->texture);
-	unsigned lvl = psurf->u.tex.level;
-	struct fd_resource_slice *slice = &rsc->slices[lvl];
-	uint32_t layer_offset = slice->size0 * psurf->u.tex.first_layer;
-	enum pipe_format format = fd4_gmem_restore_format(psurf->format);
-
-	debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
-
-	/* output sampler state: */
-	OUT_PKT3(ring, CP_LOAD_STATE, 4);
-	OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) |
-			CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) |
-			CP_LOAD_STATE_0_STATE_BLOCK(SB_FRAG_TEX) |
-			CP_LOAD_STATE_0_NUM_UNIT(1));
-	OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER) |
-			CP_LOAD_STATE_1_EXT_SRC_ADDR(0));
-	OUT_RING(ring, A4XX_TEX_SAMP_0_XY_MAG(A4XX_TEX_NEAREST) |
-			A4XX_TEX_SAMP_0_XY_MIN(A4XX_TEX_NEAREST) |
-			A4XX_TEX_SAMP_0_WRAP_S(A4XX_TEX_CLAMP_TO_EDGE) |
-			A4XX_TEX_SAMP_0_WRAP_T(A4XX_TEX_CLAMP_TO_EDGE) |
-			A4XX_TEX_SAMP_0_WRAP_R(A4XX_TEX_REPEAT));
-	OUT_RING(ring, 0x00000000);
-
-	/* emit texture state: */
-	OUT_PKT3(ring, CP_LOAD_STATE, 10);
-	OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) |
-			CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) |
-			CP_LOAD_STATE_0_STATE_BLOCK(SB_FRAG_TEX) |
-			CP_LOAD_STATE_0_NUM_UNIT(1));
-	OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS) |
-			CP_LOAD_STATE_1_EXT_SRC_ADDR(0));
-	OUT_RING(ring, A4XX_TEX_CONST_0_FMT(fd4_pipe2tex(format)) |
-			A4XX_TEX_CONST_0_TYPE(A4XX_TEX_2D) |
-			fd4_tex_swiz(format,  PIPE_SWIZZLE_RED, PIPE_SWIZZLE_GREEN,
-					PIPE_SWIZZLE_BLUE, PIPE_SWIZZLE_ALPHA));
-	OUT_RING(ring, A4XX_TEX_CONST_1_WIDTH(psurf->width) |
-			A4XX_TEX_CONST_1_HEIGHT(psurf->height));
-	OUT_RING(ring, A4XX_TEX_CONST_2_PITCH(slice->pitch * rsc->cpp));
-	OUT_RING(ring, 0x00000000);
-	OUT_RELOC(ring, rsc->bo, layer_offset, 0, 0);
-	OUT_RING(ring, 0x00000000);
-	OUT_RING(ring, 0x00000000);
-	OUT_RING(ring, 0x00000000);
-}
-
-void
-fd4_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd4_emit *emit)
-{
-	uint32_t i, j, last = 0;
-	uint32_t total_in = 0;
-	const struct fd_vertex_state *vtx = emit->vtx;
-	struct ir3_shader_variant *vp = fd4_emit_get_vp(emit);
-	unsigned n = MIN2(vtx->vtx->num_elements, vp->inputs_count);
-
-	/* hw doesn't like to be configured for zero vbo's, it seems: */
-	if (vtx->vtx->num_elements == 0)
-		return;
-
-	for (i = 0; i < n; i++)
-		if (vp->inputs[i].compmask)
-			last = i;
-
-	for (i = 0, j = 0; i <= last; i++) {
-		if (vp->inputs[i].compmask) {
-			struct pipe_vertex_element *elem = &vtx->vtx->pipe[i];
-			const struct pipe_vertex_buffer *vb =
-					&vtx->vertexbuf.vb[elem->vertex_buffer_index];
-			struct fd_resource *rsc = fd_resource(vb->buffer);
-			enum pipe_format pfmt = elem->src_format;
-			enum a4xx_vtx_fmt fmt = fd4_pipe2vtx(pfmt);
-			bool switchnext = (i != last);
-			uint32_t fs = util_format_get_blocksize(pfmt);
-			uint32_t off = vb->buffer_offset + elem->src_offset;
-			uint32_t size = fd_bo_size(rsc->bo) - off;
-			debug_assert(fmt != ~0);
-
-			OUT_PKT0(ring, REG_A4XX_VFD_FETCH(j), 4);
-			OUT_RING(ring, A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(fs - 1) |
-					A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(vb->stride) |
-					COND(switchnext, A4XX_VFD_FETCH_INSTR_0_SWITCHNEXT));
-			OUT_RELOC(ring, rsc->bo, off, 0, 0);
-			OUT_RING(ring, A4XX_VFD_FETCH_INSTR_2_SIZE(size));
-			OUT_RING(ring, 0x00000001);
-
-			OUT_PKT0(ring, REG_A4XX_VFD_DECODE_INSTR(j), 1);
-			OUT_RING(ring, A4XX_VFD_DECODE_INSTR_CONSTFILL |
-					A4XX_VFD_DECODE_INSTR_WRITEMASK(vp->inputs[i].compmask) |
-					A4XX_VFD_DECODE_INSTR_FORMAT(fmt) |
-					A4XX_VFD_DECODE_INSTR_SWAP(fd4_pipe2swap(pfmt)) |
-					A4XX_VFD_DECODE_INSTR_REGID(vp->inputs[i].regid) |
-					A4XX_VFD_DECODE_INSTR_SHIFTCNT(fs) |
-					A4XX_VFD_DECODE_INSTR_LASTCOMPVALID |
-					COND(switchnext, A4XX_VFD_DECODE_INSTR_SWITCHNEXT));
-
-			total_in += vp->inputs[i].ncomp;
-			j++;
-		}
-	}
-
-	OUT_PKT0(ring, REG_A4XX_VFD_CONTROL_0, 5);
-	OUT_RING(ring, A4XX_VFD_CONTROL_0_TOTALATTRTOVS(total_in) |
-			0xa0000 | /* XXX */
-			A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(j) |
-			A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(j));
-	OUT_RING(ring, A4XX_VFD_CONTROL_1_MAXSTORAGE(129) | // XXX
-			A4XX_VFD_CONTROL_1_REGID4VTX(regid(63,0)) |
-			A4XX_VFD_CONTROL_1_REGID4INST(regid(63,0)));
-	OUT_RING(ring, 0x00000000);   /* XXX VFD_CONTROL_2 */
-	OUT_RING(ring, 0x0000fc00);   /* XXX VFD_CONTROL_3 */
-	OUT_RING(ring, 0x00000000);   /* XXX VFD_CONTROL_4 */
-}
-
-void
-fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
-		struct fd4_emit *emit)
-{
-	struct ir3_shader_variant *vp = fd4_emit_get_vp(emit);
-	struct ir3_shader_variant *fp = fd4_emit_get_fp(emit);
-	uint32_t dirty = emit->dirty;
-
-	emit_marker(ring, 5);
-
-	if ((dirty & (FD_DIRTY_ZSA | FD_DIRTY_PROG)) && !emit->key.binning_pass) {
-		uint32_t val = fd4_zsa_stateobj(ctx->zsa)->rb_render_control;
-
-		/* I suppose if we needed to (which I don't *think* we need
-		 * to), we could emit this for binning pass too.  But we
-		 * would need to keep a different patch-list for binning
-		 * vs render pass.
-		 */
-
-		OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
-		OUT_RINGP(ring, val, &fd4_context(ctx)->rbrc_patches);
-	}
-
-	if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_STENCIL_REF)) {
-		struct fd4_zsa_stateobj *zsa = fd4_zsa_stateobj(ctx->zsa);
-		struct pipe_stencil_ref *sr = &ctx->stencil_ref;
-
-		OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
-		OUT_RING(ring, zsa->gras_alpha_control);
-
-		OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 1);
-		OUT_RING(ring, zsa->rb_stencil_control);
-
-		OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2);
-		OUT_RING(ring, zsa->rb_stencilrefmask |
-				A4XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[0]));
-		OUT_RING(ring, zsa->rb_stencilrefmask_bf |
-				A4XX_RB_STENCILREFMASK_BF_STENCILREF(sr->ref_value[1]));
-	}
-
-	if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_PROG)) {
-		uint32_t val = fd4_zsa_stateobj(ctx->zsa)->rb_depth_control;
-		if (fp->writes_pos) {
-			val |= A4XX_RB_DEPTH_CONTROL_FRAG_WRITES_Z;
-			val |= A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
-		}
-		if (fp->has_kill) {
-			val |= A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
-		}
-		OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
-		OUT_RING(ring, val);
-	}
-
-	if (dirty & FD_DIRTY_RASTERIZER) {
-		struct fd4_rasterizer_stateobj *rasterizer =
-				fd4_rasterizer_stateobj(ctx->rasterizer);
-
-		OUT_PKT0(ring, REG_A4XX_GRAS_SU_MODE_CONTROL, 1);
-		OUT_RING(ring, rasterizer->gras_su_mode_control |
-				A4XX_GRAS_SU_MODE_CONTROL_RENDERING_PASS);
-
-		OUT_PKT0(ring, REG_A4XX_GRAS_SU_POINT_MINMAX, 2);
-		OUT_RING(ring, rasterizer->gras_su_point_minmax);
-		OUT_RING(ring, rasterizer->gras_su_point_size);
-
-		OUT_PKT0(ring, REG_A4XX_GRAS_SU_POLY_OFFSET_SCALE, 2);
-		OUT_RING(ring, rasterizer->gras_su_poly_offset_scale);
-		OUT_RING(ring, rasterizer->gras_su_poly_offset_offset);
-	}
-
-	if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) {
-		uint32_t val = fd4_rasterizer_stateobj(ctx->rasterizer)
-				->gras_cl_clip_cntl;
-		OUT_PKT0(ring, REG_A4XX_GRAS_CL_CLIP_CNTL, 1);
-		OUT_RING(ring, val);
-	}
-
-	/* NOTE: since primitive_restart is not actually part of any
-	 * state object, we need to make sure that we always emit
-	 * PRIM_VTX_CNTL.. either that or be more clever and detect
-	 * when it changes.
-	 */
-	if (emit->info) {
-		uint32_t val = fd4_rasterizer_stateobj(ctx->rasterizer)
-				->pc_prim_vtx_cntl;
-
-		val |= COND(vp->writes_psize, A4XX_PC_PRIM_VTX_CNTL_PSIZE);
-		val |= COND(fp->total_in > 0, A4XX_PC_PRIM_VTX_CNTL_VAROUT);
-
-		OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 2);
-		OUT_RING(ring, val);
-		OUT_RING(ring, 0x12);     /* XXX UNKNOWN_21C5 */
-	}
-
-	if (dirty & FD_DIRTY_SCISSOR) {
-		struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
-
-		OUT_PKT0(ring, REG_A4XX_GRAS_SC_WINDOW_SCISSOR_BR, 2);
-		OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(scissor->maxx - 1) |
-				A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(scissor->maxy - 1));
-		OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(scissor->minx) |
-				A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(scissor->miny));
-
-		ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, scissor->minx);
-		ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, scissor->miny);
-		ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, scissor->maxx);
-		ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, scissor->maxy);
-	}
-
-	if (dirty & FD_DIRTY_VIEWPORT) {
-		fd_wfi(ctx, ring);
-		OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_XOFFSET_0, 6);
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0(ctx->viewport.translate[0]));
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_XSCALE_0(ctx->viewport.scale[0]));
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_YOFFSET_0(ctx->viewport.translate[1]));
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_YSCALE_0(ctx->viewport.scale[1]));
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZOFFSET_0(ctx->viewport.translate[2]));
-		OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(ctx->viewport.scale[2]));
-	}
-
-	if (dirty & FD_DIRTY_PROG)
-		fd4_program_emit(ring, emit);
-
-	if (dirty & (FD_DIRTY_PROG | FD_DIRTY_FRAMEBUFFER)) {
-		struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-		uint32_t color_regid = ir3_find_output_regid(fp,
-				ir3_semantic_name(TGSI_SEMANTIC_COLOR, 0));
-		enum a4xx_color_fmt format = 0;
-
-		if (pfb->cbufs[0])
-			format = fd4_pipe2color(pfb->cbufs[0]->format);
-
-		OUT_PKT0(ring, REG_A4XX_SP_FS_MRT_REG(0), 8);
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(color_regid) |
-				A4XX_SP_FS_MRT_REG_MRTFORMAT(format) |
-				COND(fp->key.half_precision, A4XX_SP_FS_MRT_REG_HALF_PRECISION));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-		OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	}
-
-	if ((dirty & (FD_DIRTY_PROG | FD_DIRTY_CONSTBUF)) &&
-			/* evil hack to deal sanely with clear path: */
-			(emit->prog == &ctx->prog)) {
-		fd_wfi(ctx, ring);
-		emit_constants(ring,  SB_VERT_SHADER,
-				&ctx->constbuf[PIPE_SHADER_VERTEX],
-				(emit->prog->dirty & FD_SHADER_DIRTY_VP) ? vp : NULL);
-		if (!emit->key.binning_pass) {
-			emit_constants(ring, SB_FRAG_SHADER,
-					&ctx->constbuf[PIPE_SHADER_FRAGMENT],
-					(emit->prog->dirty & FD_SHADER_DIRTY_FP) ? fp : NULL);
-		}
-	}
-
-	if ((dirty & FD_DIRTY_BLEND) && ctx->blend) {
-		struct fd4_blend_stateobj *blend = fd4_blend_stateobj(ctx->blend);
-		uint32_t i;
-
-		for (i = 0; i < 8; i++) {
-			OUT_PKT0(ring, REG_A4XX_RB_MRT_CONTROL(i), 1);
-			OUT_RING(ring, blend->rb_mrt[i].control);
-
-			OUT_PKT0(ring, REG_A4XX_RB_MRT_BLEND_CONTROL(i), 1);
-			OUT_RING(ring, blend->rb_mrt[i].blend_control);
-		}
-	}
-
-	if (dirty & FD_DIRTY_VERTTEX) {
-		if (vp->has_samp)
-			emit_textures(ctx, ring, SB_VERT_TEX, &ctx->verttex);
-		else
-			dirty &= ~FD_DIRTY_VERTTEX;
-	}
-
-	if (dirty & FD_DIRTY_FRAGTEX) {
-		if (fp->has_samp)
-			emit_textures(ctx, ring, SB_FRAG_TEX, &ctx->fragtex);
-		else
-			dirty &= ~FD_DIRTY_FRAGTEX;
-	}
-
-	ctx->dirty &= ~dirty;
-}
-
-/* emit setup at begin of new cmdstream buffer (don't rely on previous
- * state, there could have been a context switch between ioctls):
- */
-void
-fd4_emit_restore(struct fd_context *ctx)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct fd_ringbuffer *ring = ctx->ring;
-
-	OUT_PKT0(ring, REG_A4XX_RBBM_PERFCTR_CTL, 1);
-	OUT_RING(ring, 0x00000001);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_DEBUG_ECO_CONTROL, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0EC3, 1);
-	OUT_RING(ring, 0x00000006);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0F03, 1);
-	OUT_RING(ring, 0x0000003a);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0D01, 1);
-	OUT_RING(ring, 0x00000001);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0E42, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UCHE_CACHE_WAYS_VFD, 1);
-	OUT_RING(ring, 0x00000007);
-
-	OUT_PKT0(ring, REG_A4XX_UCHE_CACHE_MODE_CONTROL, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UCHE_INVALIDATE0, 2);
-	OUT_RING(ring, 0x00000000);
-	OUT_RING(ring, 0x00000012);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0E05, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0CC5, 1);
-	OUT_RING(ring, 0x00000006);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0CC6, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_0EC2, 1);
-	OUT_RING(ring, 0x00040000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2001, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
-	OUT_RING(ring, 0x00001000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20EF, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F0, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F1, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F2, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F3, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F4, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F5, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F6, 1);
-	OUT_RING(ring, 0x3c007fff);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_20F7, 1);
-	OUT_RING(ring, 0x3f800000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2152, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2153, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2154, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2155, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2156, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2157, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_21C3, 1);
-	OUT_RING(ring, 0x0000001d);
-
-	OUT_PKT0(ring, REG_A4XX_PC_GS_PARAM, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_21E6, 1);
-	OUT_RING(ring, 0x00000001);
-
-	OUT_PKT0(ring, REG_A4XX_PC_HS_PARAM, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_22D7, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_TPL1_TP_TEX_OFFSET, 1);
-	OUT_RING(ring, 0x00000000);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_2381, 1);
-	OUT_RING(ring, 0x00000010);
-
-	OUT_PKT0(ring, REG_A4XX_UNKNOWN_23A0, 1);
-	OUT_RING(ring, 0x00000010);
-
-	/* we don't use this yet.. probably best to disable.. */
-	OUT_PKT3(ring, CP_SET_DRAW_STATE, 2);
-	OUT_RING(ring, CP_SET_DRAW_STATE_0_COUNT(0) |
-			CP_SET_DRAW_STATE_0_DISABLE_ALL_GROUPS |
-			CP_SET_DRAW_STATE_0_GROUP_ID(0));
-	OUT_RING(ring, CP_SET_DRAW_STATE_1_ADDR(0));
-
-	OUT_PKT0(ring, REG_A4XX_SP_VS_PVT_MEM_PARAM, 2);
-	OUT_RING(ring, 0x08000001);                  /* SP_VS_PVT_MEM_PARAM */
-	OUT_RELOC(ring, fd4_ctx->vs_pvt_mem, 0,0,0); /* SP_VS_PVT_MEM_ADDR */
-
-	OUT_PKT0(ring, REG_A4XX_SP_FS_PVT_MEM_PARAM, 2);
-	OUT_RING(ring, 0x08000001);                  /* SP_FS_PVT_MEM_PARAM */
-	OUT_RELOC(ring, fd4_ctx->fs_pvt_mem, 0,0,0); /* SP_FS_PVT_MEM_ADDR */
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
-			A4XX_GRAS_SC_CONTROL_MSAA_DISABLE |
-			A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) |
-			A4XX_GRAS_SC_CONTROL_RASTER_MODE(0));
-
-	OUT_PKT0(ring, REG_A4XX_RB_MSAA_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_MSAA_CONTROL_DISABLE |
-			A4XX_RB_MSAA_CONTROL_SAMPLES(MSAA_ONE));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CL_GB_CLIP_ADJ, 1);
-	OUT_RING(ring, A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(0) |
-			A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(0));
-
-	OUT_PKT0(ring, REG_A4XX_RB_ALPHA_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(FUNC_ALWAYS));
-
-	OUT_PKT0(ring, REG_A4XX_RB_FS_OUTPUT, 1);
-	OUT_RING(ring, A4XX_RB_FS_OUTPUT_SAMPLE_MASK(0xffff));
-
-	OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL3, 1);
-	OUT_RING(ring, A4XX_RB_RENDER_CONTROL3_COMPONENT_ENABLE(0xf));
-
-	OUT_PKT0(ring, REG_A4XX_RB_FS_OUTPUT_REG, 1);
-	OUT_RING(ring, A4XX_RB_FS_OUTPUT_REG_COLOR_PIPE_ENABLE);
-
-	ctx->needs_rb_fbd = true;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.h
@@ -1,91 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_EMIT_H
-#define FD4_EMIT_H
-
-#include "pipe/p_context.h"
-
-#include "freedreno_context.h"
-#include "fd4_util.h"
-#include "fd4_program.h"
-#include "ir3_shader.h"
-
-struct fd_ringbuffer;
-enum adreno_state_block;
-
-void fd4_emit_constant(struct fd_ringbuffer *ring,
-		enum adreno_state_block sb,
-		uint32_t regid, uint32_t offset, uint32_t sizedwords,
-		const uint32_t *dwords, struct pipe_resource *prsc);
-
-void fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
-		struct pipe_surface *psurf);
-
-/* grouped together emit-state for prog/vertex/state emit: */
-struct fd4_emit {
-	const struct fd_vertex_state *vtx;
-	const struct fd_program_stateobj *prog;
-	const struct pipe_draw_info *info;
-	struct ir3_shader_key key;
-	uint32_t dirty;
-	bool rasterflat;
-
-	/* cached to avoid repeated lookups of same variants: */
-	struct ir3_shader_variant *vp, *fp;
-	/* TODO: other shader stages.. */
-};
-
-static inline struct ir3_shader_variant *
-fd4_emit_get_vp(struct fd4_emit *emit)
-{
-	if (!emit->vp) {
-		struct fd4_shader_stateobj *so = emit->prog->vp;
-		emit->vp = ir3_shader_variant(so->shader, emit->key);
-	}
-	return emit->vp;
-}
-
-static inline struct ir3_shader_variant *
-fd4_emit_get_fp(struct fd4_emit *emit)
-{
-	if (!emit->fp) {
-		struct fd4_shader_stateobj *so = emit->prog->fp;
-		emit->fp = ir3_shader_variant(so->shader, emit->key);
-	}
-	return emit->fp;
-}
-
-void fd4_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd4_emit *emit);
-
-void fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
-		struct fd4_emit *emit);
-
-void fd4_emit_restore(struct fd_context *ctx);
-
-#endif /* FD4_EMIT_H */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -1,570 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-#include "util/u_inlines.h"
-#include "util/u_format.h"
-
-#include "freedreno_draw.h"
-#include "freedreno_state.h"
-#include "freedreno_resource.h"
-
-#include "fd4_gmem.h"
-#include "fd4_context.h"
-#include "fd4_draw.h"
-#include "fd4_emit.h"
-#include "fd4_program.h"
-#include "fd4_util.h"
-#include "fd4_zsa.h"
-
-static const struct ir3_shader_key key = {
-		// XXX should set this based on render target format!  We don't
-		// want half_precision if float32 render target!!!
-		.half_precision = true,
-};
-
-static void
-emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
-		struct pipe_surface **bufs, uint32_t *bases, uint32_t bin_w)
-{
-	unsigned i;
-
-	for (i = 0; i < 8; i++) {
-		enum a4xx_color_fmt format = 0;
-		enum a3xx_color_swap swap = WZYX;
-		struct fd_resource *rsc = NULL;
-		struct fd_resource_slice *slice = NULL;
-		uint32_t stride = 0;
-		uint32_t base = 0;
-		uint32_t layer_offset = 0;
-
-		if ((i < nr_bufs) && bufs[i]) {
-			struct pipe_surface *psurf = bufs[i];
-
-			rsc = fd_resource(psurf->texture);
-			slice = &rsc->slices[psurf->u.tex.level];
-			format = fd4_pipe2color(psurf->format);
-			swap = fd4_pipe2swap(psurf->format);
-
-			debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
-
-			layer_offset = slice->size0 * psurf->u.tex.first_layer;
-
-			if (bin_w) {
-				stride = bin_w * rsc->cpp;
-
-				if (bases) {
-					base = bases[i];
-				}
-			} else {
-				stride = slice->pitch * rsc->cpp;
-			}
-		}
-
-		OUT_PKT0(ring, REG_A4XX_RB_MRT_BUF_INFO(i), 3);
-		OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
-				0x80 | /* XXX not on gmem2mem?? tile-mode? */
-				A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(stride) |
-				A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(swap));
-		if (bin_w || (i >= nr_bufs)) {
-			OUT_RING(ring, base);
-		} else {
-			OUT_RELOCW(ring, rsc->bo,
-					slice->offset + layer_offset, 0, -1);
-		}
-		OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride));
-	}
-}
-
-static uint32_t
-depth_base(struct fd_context *ctx)
-{
-	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-	uint32_t cpp = 4;
-	if (pfb->cbufs[0]) {
-		struct fd_resource *rsc =
-				fd_resource(pfb->cbufs[0]->texture);
-		cpp = rsc->cpp;
-	}
-	return align(gmem->bin_w * gmem->bin_h * cpp, 0x4000);
-}
-
-/* transfer from gmem to system memory (ie. normal RAM) */
-
-static void
-emit_gmem2mem_surf(struct fd_context *ctx,
-		uint32_t base, struct pipe_surface *psurf)
-{
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct fd_resource *rsc = fd_resource(psurf->texture);
-	struct fd_resource_slice *slice = &rsc->slices[psurf->u.tex.level];
-
-	OUT_PKT0(ring, REG_A4XX_RB_COPY_CONTROL, 4);
-	OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) |
-			A4XX_RB_COPY_CONTROL_MODE(RB_COPY_RESOLVE) |
-			A4XX_RB_COPY_CONTROL_GMEM_BASE(base));
-	OUT_RELOCW(ring, rsc->bo, slice->offset, 0, 0);   /* RB_COPY_DEST_BASE */
-	OUT_RING(ring, A4XX_RB_COPY_DEST_PITCH_PITCH(slice->pitch * rsc->cpp));
-	OUT_RING(ring, A4XX_RB_COPY_DEST_INFO_TILE(TILE4_LINEAR) |
-			A4XX_RB_COPY_DEST_INFO_FORMAT(fd4_pipe2color(psurf->format)) |
-			A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(0xf) |
-			A4XX_RB_COPY_DEST_INFO_ENDIAN(ENDIAN_NONE) |
-			A4XX_RB_COPY_DEST_INFO_SWAP(fd4_pipe2swap(psurf->format)));
-
-	fd4_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
-}
-
-static void
-fd4_emit_tile_gmem2mem(struct fd_context *ctx, struct fd_tile *tile)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-	struct fd4_emit emit = {
-			.vtx = &fd4_ctx->solid_vbuf_state,
-			.prog = &ctx->solid_prog,
-			.key = key,
-	};
-
-	OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER));
-
-	OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) |
-			A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) |
-			A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
-
-	OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2);
-	OUT_RING(ring, 0xff000000 |
-			A4XX_RB_STENCILREFMASK_STENCILREF(0) |
-			A4XX_RB_STENCILREFMASK_STENCILMASK(0) |
-			A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
-	OUT_RING(ring, 0xff000000 |
-			A4XX_RB_STENCILREFMASK_BF_STENCILREF(0) |
-			A4XX_RB_STENCILREFMASK_BF_STENCILMASK(0) |
-			A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0xff));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SU_MODE_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(0));
-
-	fd_wfi(ctx, ring);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CL_CLIP_CNTL, 1);
-	OUT_RING(ring, 0x80000);      /* GRAS_CL_CLIP_CNTL */
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_XOFFSET_0, 6);
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0((float)pfb->width/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_XSCALE_0((float)pfb->width/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_YOFFSET_0((float)pfb->height/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_YSCALE_0(-(float)pfb->height/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZOFFSET_0(0.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(1.0));
-
-	OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE |
-			0xa);       /* XXX */
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) |
-			A4XX_GRAS_SC_CONTROL_MSAA_DISABLE |
-			A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) |
-			A4XX_GRAS_SC_CONTROL_RASTER_MODE(1));
-
-	OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1);
-	OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
-	OUT_RING(ring, 0x00000002);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_WINDOW_SCISSOR_BR, 2);
-	OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(pfb->width - 1) |
-			A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(pfb->height - 1));
-	OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(0) |
-			A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(0));
-
-	OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2);
-	OUT_RING(ring, 0);            /* VFD_INDEX_OFFSET */
-	OUT_RING(ring, 0);            /* ??? UNKNOWN_2209 */
-
-	fd4_program_emit(ring, &emit);
-	fd4_emit_vertex_bufs(ring, &emit);
-
-	if (ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
-		uint32_t base = depth_base(ctx);
-		emit_gmem2mem_surf(ctx, base, pfb->zsbuf);
-	}
-
-	if (ctx->resolve & FD_BUFFER_COLOR) {
-		emit_gmem2mem_surf(ctx, 0, pfb->cbufs[0]);
-	}
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
-			A4XX_GRAS_SC_CONTROL_MSAA_DISABLE |
-			A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) |
-			A4XX_GRAS_SC_CONTROL_RASTER_MODE(0));
-}
-
-/* transfer from system memory to gmem */
-
-static void
-emit_mem2gmem_surf(struct fd_context *ctx, struct fd4_emit *emit,
-		uint32_t base, struct pipe_surface *psurf, uint32_t bin_w)
-{
-	struct ir3_shader_variant *fp = fd4_emit_get_fp(emit);
-	struct fd_ringbuffer *ring = ctx->ring;
-	uint32_t color_regid = ir3_find_output_regid(fp,
-			ir3_semantic_name(TGSI_SEMANTIC_COLOR, 0));
-
-	OUT_PKT0(ring, REG_A4XX_SP_FS_MRT_REG(0), 8);
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(color_regid) |
-			A4XX_SP_FS_MRT_REG_MRTFORMAT(fd4_pipe2color(psurf->format)) |
-			COND(fp->key.half_precision, A4XX_SP_FS_MRT_REG_HALF_PRECISION));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-	OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-
-	emit_mrt(ring, 1, &psurf, &base, bin_w);
-
-	fd4_emit_gmem_restore_tex(ring, psurf);
-
-	fd4_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-			DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
-}
-
-static void
-fd4_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-	struct fd4_emit emit = {
-			.vtx = &fd4_ctx->blit_vbuf_state,
-			.prog = &ctx->blit_prog,
-			.key = key,
-	};
-	float x0, y0, x1, y1;
-	unsigned bin_w = tile->bin_w;
-	unsigned bin_h = tile->bin_h;
-	unsigned i;
-
-	/* write texture coordinates to vertexbuf: */
-	x0 = ((float)tile->xoff) / ((float)pfb->width);
-	x1 = ((float)tile->xoff + bin_w) / ((float)pfb->width);
-	y0 = ((float)tile->yoff) / ((float)pfb->height);
-	y1 = ((float)tile->yoff + bin_h) / ((float)pfb->height);
-
-	OUT_PKT3(ring, CP_MEM_WRITE, 5);
-	OUT_RELOCW(ring, fd_resource(fd4_ctx->blit_texcoord_vbuf)->bo, 0, 0, 0);
-	OUT_RING(ring, fui(x0));
-	OUT_RING(ring, fui(y0));
-	OUT_RING(ring, fui(x1));
-	OUT_RING(ring, fui(y1));
-
-	for (i = 0; i < 8; i++) {
-		OUT_PKT0(ring, REG_A4XX_RB_MRT_CONTROL(i), 1);
-		OUT_RING(ring, A4XX_RB_MRT_CONTROL_FASTCLEAR |
-				A4XX_RB_MRT_CONTROL_B11 |
-				A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0xf));
-
-		OUT_PKT0(ring, REG_A4XX_RB_MRT_BLEND_CONTROL(i), 1);
-		OUT_RING(ring, A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(FACTOR_ONE) |
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(BLEND_DST_PLUS_SRC) |
-				A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(FACTOR_ZERO) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(FACTOR_ONE) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(BLEND_DST_PLUS_SRC) |
-				A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO));
-	}
-
-	OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
-	OUT_RING(ring, 0x8);          /* XXX RB_RENDER_CONTROL */
-
-	OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_LESS));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CL_CLIP_CNTL, 1);
-	OUT_RING(ring, 0x280000);     /* XXX GRAS_CL_CLIP_CNTL */
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SU_MODE_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(0) |
-			A4XX_GRAS_SU_MODE_CONTROL_RENDERING_PASS);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_XOFFSET_0, 6);
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0((float)bin_w/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_XSCALE_0((float)bin_w/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_YOFFSET_0((float)bin_h/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_YSCALE_0(-(float)bin_h/2.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZOFFSET_0(0.0));
-	OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(1.0));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_WINDOW_SCISSOR_BR, 2);
-	OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(bin_w - 1) |
-			A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(bin_h - 1));
-	OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(0) |
-			A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(0));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_SCREEN_SCISSOR_TL, 2);
-	OUT_RING(ring, A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(0) |
-			A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(0));
-	OUT_RING(ring, A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(bin_w - 1) |
-			A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(bin_h - 1));
-
-	OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) |
-			A4XX_RB_MODE_CONTROL_HEIGHT(gmem->bin_h));
-
-	OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_ALWAYS) |
-			A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_ALWAYS) |
-			A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) |
-			A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
-			A4XX_GRAS_SC_CONTROL_MSAA_DISABLE |
-			A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) |
-			A4XX_GRAS_SC_CONTROL_RASTER_MODE(1));
-
-	OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1);
-	OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST |
-			A4XX_PC_PRIM_VTX_CNTL_VAROUT);
-
-	OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2);
-	OUT_RING(ring, 0);            /* VFD_INDEX_OFFSET */
-	OUT_RING(ring, 0);            /* ??? UNKNOWN_2209 */
-
-	fd4_program_emit(ring, &emit);
-	fd4_emit_vertex_bufs(ring, &emit);
-
-	/* for gmem pitch/base calculations, we need to use the non-
-	 * truncated tile sizes:
-	 */
-	bin_w = gmem->bin_w;
-	bin_h = gmem->bin_h;
-
-	if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL))
-		emit_mem2gmem_surf(ctx, &emit, depth_base(ctx), pfb->zsbuf, bin_w);
-
-	if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_COLOR))
-		emit_mem2gmem_surf(ctx, &emit, 0, pfb->cbufs[0], bin_w);
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1);
-	OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
-			A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) |
-			A4XX_GRAS_SC_CONTROL_RASTER_MODE(0));
-
-	OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) |
-			A4XX_RB_MODE_CONTROL_HEIGHT(gmem->bin_h) |
-			0x00010000);  /* XXX */
-}
-
-static void
-patch_draws(struct fd_context *ctx, enum pc_di_vis_cull_mode vismode)
-{
-	unsigned i;
-	for (i = 0; i < fd_patch_num_elements(&ctx->draw_patches); i++) {
-		struct fd_cs_patch *patch = fd_patch_element(&ctx->draw_patches, i);
-		*patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
-	}
-	util_dynarray_resize(&ctx->draw_patches, 0);
-}
-
-static void
-patch_rbrc(struct fd_context *ctx, uint32_t val)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	unsigned i;
-	for (i = 0; i < fd_patch_num_elements(&fd4_ctx->rbrc_patches); i++) {
-		struct fd_cs_patch *patch = fd_patch_element(&fd4_ctx->rbrc_patches, i);
-		*patch->cs = patch->val | val;
-	}
-	util_dynarray_resize(&fd4_ctx->rbrc_patches, 0);
-}
-
-static void
-update_vsc_pipe(struct fd_context *ctx)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	struct fd_ringbuffer *ring = ctx->ring;
-	int i;
-
-	OUT_PKT0(ring, REG_A4XX_VSC_SIZE_ADDRESS, 1);
-	OUT_RELOCW(ring, fd4_ctx->vsc_size_mem, 0, 0, 0); /* VSC_SIZE_ADDRESS */
-
-	OUT_PKT0(ring, REG_A4XX_VSC_PIPE_CONFIG_REG(0), 8);
-	for (i = 0; i < 8; i++) {
-		struct fd_vsc_pipe *pipe = &ctx->pipe[i];
-		OUT_RING(ring, A4XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
-				A4XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
-				A4XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
-				A4XX_VSC_PIPE_CONFIG_REG_H(pipe->h));
-	}
-
-	OUT_PKT0(ring, REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG(0), 8);
-	for (i = 0; i < 8; i++) {
-		struct fd_vsc_pipe *pipe = &ctx->pipe[i];
-		if (!pipe->bo) {
-			pipe->bo = fd_bo_new(ctx->dev, 0x40000,
-					DRM_FREEDRENO_GEM_TYPE_KMEM);
-		}
-		OUT_RELOCW(ring, pipe->bo, 0, 0, 0);       /* VSC_PIPE_DATA_ADDRESS[i] */
-	}
-
-	OUT_PKT0(ring, REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(0), 8);
-	for (i = 0; i < 8; i++) {
-		struct fd_vsc_pipe *pipe = &ctx->pipe[i];
-		OUT_RING(ring, fd_bo_size(pipe->bo) - 32); /* VSC_PIPE_DATA_LENGTH[i] */
-	}
-}
-
-/* before first tile */
-static void
-fd4_emit_tile_init(struct fd_context *ctx)
-{
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	uint32_t rb_render_control;
-
-	fd4_emit_restore(ctx);
-
-	OUT_PKT0(ring, REG_A4XX_VSC_BIN_SIZE, 1);
-	OUT_RING(ring, A4XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) |
-			A4XX_VSC_BIN_SIZE_HEIGHT(gmem->bin_h));
-
-	OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1);
-	OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) |
-			A4XX_RB_MODE_CONTROL_HEIGHT(gmem->bin_h) |
-			0x00010000);  /* XXX */
-
-	update_vsc_pipe(ctx);
-	patch_draws(ctx, IGNORE_VISIBILITY);
-
-	rb_render_control = 0; // XXX or BINNING_PASS.. but maybe we can emit only from gmem
-	patch_rbrc(ctx, rb_render_control);
-}
-
-/* before mem2gmem */
-static void
-fd4_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile)
-{
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	uint32_t reg;
-
-	OUT_PKT0(ring, REG_A4XX_RB_DEPTH_INFO, 3);
-	reg = A4XX_RB_DEPTH_INFO_DEPTH_BASE(depth_base(ctx));
-	if (pfb->zsbuf) {
-		reg |= A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(fd_pipe2depth(pfb->zsbuf->format));
-	}
-	OUT_RING(ring, reg);
-	if (pfb->zsbuf) {
-		OUT_RING(ring, A4XX_RB_DEPTH_PITCH(gmem->bin_w));
-		OUT_RING(ring, A4XX_RB_DEPTH_PITCH2(gmem->bin_w));
-	} else {
-		OUT_RING(ring, 0x00000000);
-		OUT_RING(ring, 0x00000000);
-	}
-
-	if (pfb->zsbuf) {
-		OUT_PKT0(ring, REG_A4XX_GRAS_DEPTH_CONTROL, 1);
-		OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(
-				fd_pipe2depth(pfb->zsbuf->format)));
-	}
-
-	if (ctx->needs_rb_fbd) {
-		fd_wfi(ctx, ring);
-		OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
-		OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
-				A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
-		ctx->needs_rb_fbd = false;
-	}
-}
-
-/* before IB to rendering cmds: */
-static void
-fd4_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile)
-{
-	struct fd_ringbuffer *ring = ctx->ring;
-	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-
-	uint32_t x1 = tile->xoff;
-	uint32_t y1 = tile->yoff;
-	uint32_t x2 = tile->xoff + tile->bin_w - 1;
-	uint32_t y2 = tile->yoff + tile->bin_h - 1;
-
-	OUT_PKT3(ring, CP_SET_BIN, 3);
-	OUT_RING(ring, 0x00000000);
-	OUT_RING(ring, CP_SET_BIN_1_X1(x1) | CP_SET_BIN_1_Y1(y1));
-	OUT_RING(ring, CP_SET_BIN_2_X2(x2) | CP_SET_BIN_2_Y2(y2));
-
-	emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, NULL, gmem->bin_w);
-
-	/* setup scissor/offset for current tile: */
-	OUT_PKT0(ring, REG_A4XX_RB_BIN_OFFSET, 1);
-	OUT_RING(ring, A4XX_RB_BIN_OFFSET_X(tile->xoff) |
-			A4XX_RB_BIN_OFFSET_Y(tile->yoff));
-
-	OUT_PKT0(ring, REG_A4XX_GRAS_SC_SCREEN_SCISSOR_TL, 2);
-	OUT_RING(ring, A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(x1) |
-			A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(y1));
-	OUT_RING(ring, A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(x2) |
-			A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(y2));
-}
-
-void
-fd4_gmem_init(struct pipe_context *pctx)
-{
-	struct fd_context *ctx = fd_context(pctx);
-
-	ctx->emit_tile_init = fd4_emit_tile_init;
-	ctx->emit_tile_prep = fd4_emit_tile_prep;
-	ctx->emit_tile_mem2gmem = fd4_emit_tile_mem2gmem;
-	ctx->emit_tile_renderprep = fd4_emit_tile_renderprep;
-	ctx->emit_tile_gmem2mem = fd4_emit_tile_gmem2mem;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.h
@@ -1,36 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_GMEM_H_
-#define FD4_GMEM_H_
-
-#include "pipe/p_context.h"
-
-void fd4_gmem_init(struct pipe_context *pctx);
-
-#endif /* FD4_GMEM_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -1,466 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-#include "util/u_inlines.h"
-#include "util/u_format.h"
-#include "tgsi/tgsi_dump.h"
-#include "tgsi/tgsi_parse.h"
-
-#include "freedreno_program.h"
-
-#include "fd4_program.h"
-#include "fd4_emit.h"
-#include "fd4_texture.h"
-#include "fd4_util.h"
-
-static void
-delete_shader_stateobj(struct fd4_shader_stateobj *so)
-{
-	ir3_shader_destroy(so->shader);
-	free(so);
-}
-
-static struct fd4_shader_stateobj *
-create_shader_stateobj(struct pipe_context *pctx, const struct pipe_shader_state *cso,
-		enum shader_t type)
-{
-	struct fd4_shader_stateobj *so = CALLOC_STRUCT(fd4_shader_stateobj);
-	so->shader = ir3_shader_create(pctx, cso->tokens, type);
-	return so;
-}
-
-static void *
-fd4_fp_state_create(struct pipe_context *pctx,
-		const struct pipe_shader_state *cso)
-{
-	return create_shader_stateobj(pctx, cso, SHADER_FRAGMENT);
-}
-
-static void
-fd4_fp_state_delete(struct pipe_context *pctx, void *hwcso)
-{
-	struct fd4_shader_stateobj *so = hwcso;
-	delete_shader_stateobj(so);
-}
-
-static void *
-fd4_vp_state_create(struct pipe_context *pctx,
-		const struct pipe_shader_state *cso)
-{
-	return create_shader_stateobj(pctx, cso, SHADER_VERTEX);
-}
-
-static void
-fd4_vp_state_delete(struct pipe_context *pctx, void *hwcso)
-{
-	struct fd4_shader_stateobj *so = hwcso;
-	delete_shader_stateobj(so);
-}
-
-static void
-emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so)
-{
-	const struct ir3_info *si = &so->info;
-	enum adreno_state_block sb;
-	enum adreno_state_src src;
-	uint32_t i, sz, *bin;
-
-	if (so->type == SHADER_VERTEX) {
-		sb = SB_VERT_SHADER;
-	} else {
-		sb = SB_FRAG_SHADER;
-	}
-
-	if (fd_mesa_debug & FD_DBG_DIRECT) {
-		sz = si->sizedwords;
-		src = SS_DIRECT;
-		bin = fd_bo_map(so->bo);
-	} else {
-		sz = 0;
-		src = 2;  // enums different on a4xx..
-		bin = NULL;
-	}
-
-	OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz);
-	OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) |
-			CP_LOAD_STATE_0_STATE_SRC(src) |
-			CP_LOAD_STATE_0_STATE_BLOCK(sb) |
-			CP_LOAD_STATE_0_NUM_UNIT(so->instrlen));
-	if (bin) {
-		OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) |
-				CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER));
-	} else {
-		OUT_RELOC(ring, so->bo, 0,
-				CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER), 0);
-	}
-	for (i = 0; i < sz; i++) {
-		OUT_RING(ring, bin[i]);
-	}
-}
-
-struct stage {
-	const struct ir3_shader_variant *v;
-	const struct ir3_info *i;
-	/* const sizes are in units of 4 * vec4 */
-	uint8_t constoff;
-	uint8_t constlen;
-	/* instr sizes are in units of 16 instructions */
-	uint8_t instroff;
-	uint8_t instrlen;
-};
-
-enum {
-	VS = 0,
-	FS = 1,
-	HS = 2,
-	DS = 3,
-	GS = 4,
-	MAX_STAGES
-};
-
-static void
-setup_stages(struct fd4_emit *emit, struct stage *s)
-{
-	unsigned i;
-
-	s[VS].v = fd4_emit_get_vp(emit);
-
-	if (emit->key.binning_pass) {
-		/* use dummy stateobj to simplify binning vs non-binning: */
-		static const struct ir3_shader_variant binning_fp = {};
-		s[FS].v = &binning_fp;
-	} else {
-		s[FS].v = fd4_emit_get_fp(emit);
-	}
-
-	s[HS].v = s[DS].v = s[GS].v = NULL;  /* for now */
-
-	for (i = 0; i < MAX_STAGES; i++) {
-		if (s[i].v) {
-			s[i].i = &s[i].v->info;
-			/* constlen is in units of 4 * vec4: */
-			s[i].constlen = align(s[i].v->constlen, 4) / 4;
-			/* instrlen is already in units of 16 instr.. although
-			 * probably we should ditch that and not make the compiler
-			 * care about instruction group size of a3xx vs a4xx
-			 */
-			s[i].instrlen = s[i].v->instrlen;
-		} else {
-			s[i].i = NULL;
-			s[i].constlen = 0;
-			s[i].instrlen = 0;
-		}
-	}
-
-	/* NOTE: at least for gles2, blob partitions VS at bottom of const
-	 * space and FS taking entire remaining space.  We probably don't
-	 * need to do that the same way, but for now mimic what the blob
-	 * does to make it easier to diff against register values from blob
-	 */
-	s[VS].constlen = 66;
-	s[FS].constlen = 128 - s[VS].constlen;
-	s[VS].instroff = 0;
-	s[VS].constoff = 0;
-	s[FS].instroff = 64 - s[FS].instrlen;
-	s[FS].constoff = s[VS].constlen;
-	s[HS].instroff = s[DS].instroff = s[GS].instroff = s[FS].instroff;
-	s[HS].constoff = s[DS].constoff = s[GS].constoff = s[FS].constoff;
-}
-
-void
-fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit)
-{
-	struct stage s[MAX_STAGES];
-	uint32_t pos_regid, posz_regid, psize_regid, color_regid;
-	int constmode;
-	int i, j, k;
-
-	setup_stages(emit, s);
-
-	/* blob seems to always use constmode currently: */
-	constmode = 1;
-
-	pos_regid = ir3_find_output_regid(s[VS].v,
-		ir3_semantic_name(TGSI_SEMANTIC_POSITION, 0));
-	posz_regid = ir3_find_output_regid(s[FS].v,
-		ir3_semantic_name(TGSI_SEMANTIC_POSITION, 0));
-	psize_regid = ir3_find_output_regid(s[VS].v,
-		ir3_semantic_name(TGSI_SEMANTIC_PSIZE, 0));
-	color_regid = ir3_find_output_regid(s[FS].v,
-		ir3_semantic_name(TGSI_SEMANTIC_COLOR, 0));
-
-	/* we could probably divide this up into things that need to be
-	 * emitted if frag-prog is dirty vs if vert-prog is dirty..
-	 */
-
-	OUT_PKT0(ring, REG_A4XX_HLSQ_UPDATE_CONTROL, 1);
-	OUT_RING(ring, 0x00000003);
-
-	OUT_PKT0(ring, REG_A4XX_HLSQ_CONTROL_0_REG, 4);
-	OUT_RING(ring, A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) |
-			A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(constmode) |
-			A4XX_HLSQ_CONTROL_0_REG_FSSUPERTHREADENABLE |
-			/* NOTE:  I guess SHADERRESTART and CONSTFULLUPDATE maybe
-			 * flush some caches? I think we only need to set those
-			 * bits if we have updated const or shader..
-			 */
-			A4XX_HLSQ_CONTROL_0_REG_SPSHADERRESTART |
-			A4XX_HLSQ_CONTROL_0_REG_SPCONSTFULLUPDATE);
-	OUT_RING(ring, A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) |
-			0xfcfc0000 |          /* XXX */
-			A4XX_HLSQ_CONTROL_1_REG_VSSUPERTHREADENABLE |
-			COND(s[FS].v->frag_coord, A4XX_HLSQ_CONTROL_1_REG_ZWCOORD));
-	OUT_RING(ring, A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(31));
-	OUT_RING(ring, A4XX_HLSQ_CONTROL_3_REG_REGID(s[FS].v->pos_regid));
-
-	OUT_PKT0(ring, REG_A4XX_HLSQ_VS_CONTROL_REG, 5);
-	OUT_RING(ring, A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(s[VS].constlen) |
-			A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(s[VS].constoff) |
-			A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(s[VS].instrlen) |
-			A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(s[VS].instroff));
-	OUT_RING(ring, A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(s[FS].constlen) |
-			A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(s[FS].constoff) |
-			A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(s[FS].instrlen) |
-			A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(s[FS].instroff));
-	OUT_RING(ring, A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(s[HS].constlen) |
-			A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(s[HS].constoff) |
-			A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(s[HS].instrlen) |
-			A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(s[HS].instroff));
-	OUT_RING(ring, A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(s[DS].constlen) |
-			A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(s[DS].constoff) |
-			A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(s[DS].instrlen) |
-			A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(s[DS].instroff));
-	OUT_RING(ring, A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(s[GS].constlen) |
-			A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(s[GS].constoff) |
-			A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(s[GS].instrlen) |
-			A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(s[GS].instroff));
-
-	OUT_PKT0(ring, REG_A4XX_SP_SP_CTRL_REG, 1);
-	OUT_RING(ring, 0x140010 | /* XXX */
-			COND(emit->key.binning_pass, A4XX_SP_SP_CTRL_REG_BINNING_PASS));
-
-	OUT_PKT0(ring, REG_A4XX_SP_INSTR_CACHE_CTRL, 1);
-	OUT_RING(ring, 0x1c3);   /* XXX SP_INSTR_CACHE_CTRL */
-
-	OUT_PKT0(ring, REG_A4XX_SP_VS_LENGTH_REG, 1);
-	OUT_RING(ring, s[VS].v->instrlen);      /* SP_VS_LENGTH_REG */
-
-	OUT_PKT0(ring, REG_A4XX_SP_VS_CTRL_REG0, 3);
-	OUT_RING(ring, A4XX_SP_VS_CTRL_REG0_THREADMODE(MULTI) |
-			A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(s[VS].i->max_half_reg + 1) |
-			A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) |
-			A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(0) |
-			A4XX_SP_VS_CTRL_REG0_THREADSIZE(TWO_QUADS) |
-			A4XX_SP_VS_CTRL_REG0_SUPERTHREADMODE |
-			COND(s[VS].v->has_samp, A4XX_SP_VS_CTRL_REG0_PIXLODENABLE));
-	OUT_RING(ring, A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(s[VS].constlen) |
-			A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(s[VS].v->total_in));
-	OUT_RING(ring, A4XX_SP_VS_PARAM_REG_POSREGID(pos_regid) |
-			A4XX_SP_VS_PARAM_REG_PSIZEREGID(psize_regid) |
-			A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(align(s[FS].v->total_in, 4) / 4));
-
-	for (i = 0, j = -1; (i < 16) && (j < (int)s[FS].v->inputs_count); i++) {
-		uint32_t reg = 0;
-
-		OUT_PKT0(ring, REG_A4XX_SP_VS_OUT_REG(i), 1);
-
-		j = ir3_next_varying(s[FS].v, j);
-		if (j < s[FS].v->inputs_count) {
-			k = ir3_find_output(s[VS].v, s[FS].v->inputs[j].semantic);
-			reg |= A4XX_SP_VS_OUT_REG_A_REGID(s[VS].v->outputs[k].regid);
-			reg |= A4XX_SP_VS_OUT_REG_A_COMPMASK(s[FS].v->inputs[j].compmask);
-		}
-
-		j = ir3_next_varying(s[FS].v, j);
-		if (j < s[FS].v->inputs_count) {
-			k = ir3_find_output(s[VS].v, s[FS].v->inputs[j].semantic);
-			reg |= A4XX_SP_VS_OUT_REG_B_REGID(s[VS].v->outputs[k].regid);
-			reg |= A4XX_SP_VS_OUT_REG_B_COMPMASK(s[FS].v->inputs[j].compmask);
-		}
-
-		OUT_RING(ring, reg);
-	}
-
-	for (i = 0, j = -1; (i < 8) && (j < (int)s[FS].v->inputs_count); i++) {
-		uint32_t reg = 0;
-
-		OUT_PKT0(ring, REG_A4XX_SP_VS_VPC_DST_REG(i), 1);
-
-		j = ir3_next_varying(s[FS].v, j);
-		if (j < s[FS].v->inputs_count)
-			reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC0(s[FS].v->inputs[j].inloc);
-		j = ir3_next_varying(s[FS].v, j);
-		if (j < s[FS].v->inputs_count)
-			reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC1(s[FS].v->inputs[j].inloc);
-		j = ir3_next_varying(s[FS].v, j);
-		if (j < s[FS].v->inputs_count)
-			reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC2(s[FS].v->inputs[j].inloc);
-		j = ir3_next_varying(s[FS].v, j);
-		if (j < s[FS].v->inputs_count)
-			reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC3(s[FS].v->inputs[j].inloc);
-
-		OUT_RING(ring, reg);
-	}
-
-	OUT_PKT0(ring, REG_A4XX_SP_VS_OBJ_OFFSET_REG, 2);
-	OUT_RING(ring, A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(s[VS].constoff) |
-			A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(s[VS].instroff));
-	OUT_RELOC(ring, s[VS].v->bo, 0, 0, 0);  /* SP_VS_OBJ_START_REG */
-
-	OUT_PKT0(ring, REG_A4XX_SP_FS_LENGTH_REG, 1);
-	OUT_RING(ring, s[FS].v->instrlen);  /* SP_FS_LENGTH_REG */
-
-	OUT_PKT0(ring, REG_A4XX_SP_FS_CTRL_REG0, 2);
-	OUT_RING(ring, A4XX_SP_FS_CTRL_REG0_THREADMODE(MULTI) |
-			COND(s[FS].v->total_in > 0, A4XX_SP_FS_CTRL_REG0_VARYING) |
-			A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(s[FS].i->max_half_reg + 1) |
-			A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) |
-			A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(1) |
-			A4XX_SP_FS_CTRL_REG0_THREADSIZE(FOUR_QUADS) |
-			A4XX_SP_FS_CTRL_REG0_SUPERTHREADMODE |
-			COND(s[FS].v->has_samp, A4XX_SP_FS_CTRL_REG0_PIXLODENABLE));
-	OUT_RING(ring, A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(s[FS].constlen) |
-			0x80000000 |      /* XXX */
-			COND(s[FS].v->total_in > 0, A4XX_SP_FS_CTRL_REG1_VARYING));
-
-	OUT_PKT0(ring, REG_A4XX_SP_FS_OBJ_OFFSET_REG, 2);
-	OUT_RING(ring, A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(s[FS].constoff) |
-			A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(s[FS].instroff));
-	if (emit->key.binning_pass)
-		OUT_RING(ring, 0x00000000);
-	else
-		OUT_RELOC(ring, s[FS].v->bo, 0, 0, 0);  /* SP_FS_OBJ_START_REG */
-
-	OUT_PKT0(ring, REG_A4XX_SP_HS_OBJ_OFFSET_REG, 1);
-	OUT_RING(ring, A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(s[HS].constoff) |
-			A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(s[HS].instroff));
-
-	OUT_PKT0(ring, REG_A4XX_SP_DS_OBJ_OFFSET_REG, 1);
-	OUT_RING(ring, A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(s[DS].constoff) |
-			A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(s[DS].instroff));
-
-	OUT_PKT0(ring, REG_A4XX_SP_GS_OBJ_OFFSET_REG, 1);
-	OUT_RING(ring, A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(s[GS].constoff) |
-			A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(s[GS].instroff));
-
-	OUT_PKT0(ring, REG_A4XX_RB_MSAA_CONTROL2, 1);
-	OUT_RING(ring, A4XX_RB_MSAA_CONTROL2_MSAA_SAMPLES(0) |
-			COND(s[FS].v->total_in > 0, A4XX_RB_MSAA_CONTROL2_VARYING));
-
-	OUT_PKT0(ring, REG_A4XX_SP_FS_OUTPUT_REG, 1);
-	if (s[FS].v->writes_pos) {
-		OUT_RING(ring, A4XX_SP_FS_OUTPUT_REG_DEPTH_ENABLE |
-				A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(posz_regid));
-	} else {
-		OUT_RING(ring, 0x00000001);
-	}
-
-	if (emit->key.binning_pass) {
-		OUT_PKT0(ring, REG_A4XX_VPC_ATTR, 2);
-		OUT_RING(ring, A4XX_VPC_ATTR_THRDASSIGN(1) |
-				0x40000000 |      /* XXX */
-				COND(s[VS].v->writes_psize, A4XX_VPC_ATTR_PSIZE));
-		OUT_RING(ring, 0x00000000);
-	} else {
-		uint32_t vinterp[8] = {0}, flatshade[2] = {0};
-
-		/* figure out VARYING_INTERP / FLAT_SHAD register values: */
-		for (j = -1; (j = ir3_next_varying(s[FS].v, j)) < (int)s[FS].v->inputs_count; ) {
-			uint32_t interp = s[FS].v->inputs[j].interpolate;
-			if ((interp == TGSI_INTERPOLATE_CONSTANT) ||
-					((interp == TGSI_INTERPOLATE_COLOR) && emit->rasterflat)) {
-				/* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG
-				 * instead.. rather than -8 everywhere else..
-				 */
-				uint32_t loc = s[FS].v->inputs[j].inloc - 8;
-
-				/* currently assuming varyings aligned to 4 (not
-				 * packed):
-				 */
-				debug_assert((loc % 4) == 0);
-
-				for (i = 0; i < 4; i++, loc++) {
-					vinterp[loc / 16] |= 1 << ((loc % 16) * 2);
-					flatshade[loc / 32] |= 1 << (loc % 32);
-				}
-			}
-		}
-
-		OUT_PKT0(ring, REG_A4XX_VPC_ATTR, 2);
-		OUT_RING(ring, A4XX_VPC_ATTR_TOTALATTR(s[FS].v->total_in) |
-				A4XX_VPC_ATTR_THRDASSIGN(1) |
-				COND(s[FS].v->total_in > 0, A4XX_VPC_ATTR_ENABLE) |
-				0x40000000 |      /* XXX */
-				COND(s[VS].v->writes_psize, A4XX_VPC_ATTR_PSIZE));
-		OUT_RING(ring, A4XX_VPC_PACK_NUMFPNONPOSVAR(s[FS].v->total_in) |
-				A4XX_VPC_PACK_NUMNONPOSVSVAR(s[FS].v->total_in));
-
-		OUT_PKT0(ring, REG_A4XX_VPC_VARYING_INTERP_MODE(0), 8);
-		for (i = 0; i < 8; i++)
-			OUT_RING(ring, vinterp[i]);     /* VPC_VARYING_INTERP[i].MODE */
-
-		OUT_PKT0(ring, REG_A4XX_VPC_VARYING_PS_REPL_MODE(0), 8);
-		for (i = 0; i < 8; i++)
-			OUT_RING(ring, s[FS].v->shader->vpsrepl[i]);   /* VPC_VARYING_PS_REPL[i] */
-	}
-
-	emit_shader(ring, s[VS].v);
-
-	if (!emit->key.binning_pass)
-		emit_shader(ring, s[FS].v);
-}
-
-/* hack.. until we figure out how to deal w/ vpsrepl properly.. */
-static void
-fix_blit_fp(struct pipe_context *pctx)
-{
-	struct fd_context *ctx = fd_context(pctx);
-	struct fd4_shader_stateobj *so = ctx->blit_prog.fp;
-
-	so->shader->vpsrepl[0] = 0x99999999;
-	so->shader->vpsrepl[1] = 0x99999999;
-	so->shader->vpsrepl[2] = 0x99999999;
-	so->shader->vpsrepl[3] = 0x99999999;
-}
-
-void
-fd4_prog_init(struct pipe_context *pctx)
-{
-	pctx->create_fs_state = fd4_fp_state_create;
-	pctx->delete_fs_state = fd4_fp_state_delete;
-
-	pctx->create_vs_state = fd4_vp_state_create;
-	pctx->delete_vs_state = fd4_vp_state_delete;
-
-	fd_prog_init(pctx);
-
-	fix_blit_fp(pctx);
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.h
@@ -1,46 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_PROGRAM_H_
-#define FD4_PROGRAM_H_
-
-#include "pipe/p_context.h"
-#include "freedreno_context.h"
-#include "ir3_shader.h"
-
-struct fd4_shader_stateobj {
-	struct ir3_shader *shader;
-};
-
-struct fd4_emit;
-
-void fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit);
-
-void fd4_prog_init(struct pipe_context *pctx);
-
-#endif /* FD4_PROGRAM_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_query.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_query.c
@@ -1,39 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "freedreno_query_hw.h"
-#include "freedreno_context.h"
-#include "freedreno_util.h"
-
-#include "fd4_query.h"
-#include "fd4_util.h"
-
-void fd4_query_context_init(struct pipe_context *pctx)
-{
-	/* TODO */
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_query.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_query.h
@@ -1,36 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_QUERY_H_
-#define FD4_QUERY_H_
-
-#include "pipe/p_context.h"
-
-void fd4_query_context_init(struct pipe_context *pctx);
-
-#endif /* FD4_QUERY_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_rasterizer.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_rasterizer.c
@@ -1,94 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-
-#include "fd4_rasterizer.h"
-#include "fd4_context.h"
-#include "fd4_util.h"
-
-void *
-fd4_rasterizer_state_create(struct pipe_context *pctx,
-		const struct pipe_rasterizer_state *cso)
-{
-	struct fd4_rasterizer_stateobj *so;
-	float psize_min, psize_max;
-
-	so = CALLOC_STRUCT(fd4_rasterizer_stateobj);
-	if (!so)
-		return NULL;
-
-	so->base = *cso;
-
-	if (cso->point_size_per_vertex) {
-		psize_min = util_get_min_point_size(cso);
-		psize_max = 8192;
-	} else {
-		/* Force the point size to be as if the vertex output was disabled. */
-		psize_min = cso->point_size;
-		psize_max = cso->point_size;
-	}
-
-/*
-	if (cso->line_stipple_enable) {
-		??? TODO line stipple
-	}
-	TODO cso->half_pixel_center
-	if (cso->multisample)
-		TODO
-*/
-	so->gras_cl_clip_cntl = 0x80000; /* ??? */
-	so->gras_su_point_minmax =
-			A4XX_GRAS_SU_POINT_MINMAX_MIN(psize_min/2) |
-			A4XX_GRAS_SU_POINT_MINMAX_MAX(psize_max/2);
-	so->gras_su_point_size   = A4XX_GRAS_SU_POINT_SIZE(cso->point_size/2);
-	so->gras_su_poly_offset_scale =
-			A4XX_GRAS_SU_POLY_OFFSET_SCALE(cso->offset_scale);
-	so->gras_su_poly_offset_offset =
-			A4XX_GRAS_SU_POLY_OFFSET_OFFSET(cso->offset_units);
-
-	so->gras_su_mode_control =
-			A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(cso->line_width/2.0);
-
-	if (cso->cull_face & PIPE_FACE_FRONT)
-		so->gras_su_mode_control |= A4XX_GRAS_SU_MODE_CONTROL_CULL_FRONT;
-	if (cso->cull_face & PIPE_FACE_BACK)
-		so->gras_su_mode_control |= A4XX_GRAS_SU_MODE_CONTROL_CULL_BACK;
-	if (!cso->front_ccw)
-		so->gras_su_mode_control |= A4XX_GRAS_SU_MODE_CONTROL_FRONT_CW;
-	if (!cso->flatshade_first)
-		so->pc_prim_vtx_cntl |= A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST;
-
-	if (cso->offset_tri)
-		so->gras_su_mode_control |= A4XX_GRAS_SU_MODE_CONTROL_POLY_OFFSET;
-
-	return so;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_rasterizer.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_rasterizer.h
@@ -1,56 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_RASTERIZER_H_
-#define FD4_RASTERIZER_H_
-
-#include "pipe/p_state.h"
-#include "pipe/p_context.h"
-
-struct fd4_rasterizer_stateobj {
-	struct pipe_rasterizer_state base;
-	uint32_t gras_su_point_minmax;
-	uint32_t gras_su_point_size;
-	uint32_t gras_su_poly_offset_scale;
-	uint32_t gras_su_poly_offset_offset;
-
-	uint32_t gras_su_mode_control;
-	uint32_t gras_cl_clip_cntl;
-	uint32_t pc_prim_vtx_cntl;
-};
-
-static INLINE struct fd4_rasterizer_stateobj *
-fd4_rasterizer_stateobj(struct pipe_rasterizer_state *rast)
-{
-	return (struct fd4_rasterizer_stateobj *)rast;
-}
-
-void * fd4_rasterizer_state_create(struct pipe_context *pctx,
-		const struct pipe_rasterizer_state *cso);
-
-#endif /* FD4_RASTERIZER_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_screen.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_screen.c
@@ -1,105 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_screen.h"
-#include "util/u_format.h"
-
-#include "fd4_screen.h"
-#include "fd4_context.h"
-#include "fd4_util.h"
-
-static boolean
-fd4_screen_is_format_supported(struct pipe_screen *pscreen,
-		enum pipe_format format,
-		enum pipe_texture_target target,
-		unsigned sample_count,
-		unsigned usage)
-{
-	unsigned retval = 0;
-
-	if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
-			(sample_count > 1) || /* TODO add MSAA */
-			!util_format_is_supported(format, usage)) {
-		DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
-				util_format_name(format), target, sample_count, usage);
-		return FALSE;
-	}
-
-	if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
-			(fd4_pipe2vtx(format) != ~0)) {
-		retval |= PIPE_BIND_VERTEX_BUFFER;
-	}
-
-	if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
-			(fd4_pipe2tex(format) != ~0)) {
-		retval |= PIPE_BIND_SAMPLER_VIEW;
-	}
-
-	if ((usage & (PIPE_BIND_RENDER_TARGET |
-				PIPE_BIND_DISPLAY_TARGET |
-				PIPE_BIND_SCANOUT |
-				PIPE_BIND_SHARED)) &&
-			(fd4_pipe2color(format) != ~0) &&
-			(fd4_pipe2tex(format) != ~0)) {
-		retval |= usage & (PIPE_BIND_RENDER_TARGET |
-				PIPE_BIND_DISPLAY_TARGET |
-				PIPE_BIND_SCANOUT |
-				PIPE_BIND_SHARED);
-	}
-
-	if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
-			(fd_pipe2depth(format) != ~0) &&
-			(fd4_pipe2tex(format) != ~0)) {
-		retval |= PIPE_BIND_DEPTH_STENCIL;
-	}
-
-	if ((usage & PIPE_BIND_INDEX_BUFFER) &&
-			(fd_pipe2index(format) != ~0)) {
-		retval |= PIPE_BIND_INDEX_BUFFER;
-	}
-
-	if (usage & PIPE_BIND_TRANSFER_READ)
-		retval |= PIPE_BIND_TRANSFER_READ;
-	if (usage & PIPE_BIND_TRANSFER_WRITE)
-		retval |= PIPE_BIND_TRANSFER_WRITE;
-
-	if (retval != usage) {
-		DBG("not supported: format=%s, target=%d, sample_count=%d, "
-				"usage=%x, retval=%x", util_format_name(format),
-				target, sample_count, usage, retval);
-	}
-
-	return retval == usage;
-}
-
-void
-fd4_screen_init(struct pipe_screen *pscreen)
-{
-	pscreen->context_create = fd4_context_create;
-	pscreen->is_format_supported = fd4_screen_is_format_supported;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_screen.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_screen.h
@@ -1,36 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_SCREEN_H_
-#define FD4_SCREEN_H_
-
-#include "pipe/p_screen.h"
-
-void fd4_screen_init(struct pipe_screen *pscreen);
-
-#endif /* FD4_SCREEN_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
@@ -1,190 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-#include "util/u_inlines.h"
-#include "util/u_format.h"
-
-#include "fd4_texture.h"
-#include "fd4_util.h"
-
-/* TODO do we need to emulate clamp-to-edge like a3xx? */
-static enum a4xx_tex_clamp
-tex_clamp(unsigned wrap)
-{
-	/* hardware probably supports more, but we can't coax all the
-	 * wrap/clamp modes out of the GLESv2 blob driver.
-	 *
-	 * TODO once we have basics working, go back and just try
-	 * different values and see what happens
-	 */
-	switch (wrap) {
-	case PIPE_TEX_WRAP_REPEAT:
-		return A4XX_TEX_REPEAT;
-	case PIPE_TEX_WRAP_CLAMP:
-	case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
-		return A4XX_TEX_CLAMP_TO_EDGE;
-	case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
-// TODO
-//		return A4XX_TEX_CLAMP_TO_BORDER;
-	case PIPE_TEX_WRAP_MIRROR_CLAMP:
-	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
-	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
-// TODO
-//		return A4XX_TEX_MIRROR_CLAMP;
-	case PIPE_TEX_WRAP_MIRROR_REPEAT:
-		return A4XX_TEX_MIRROR_REPEAT;
-	default:
-		DBG("invalid wrap: %u", wrap);
-		return 0;
-	}
-}
-
-static enum a4xx_tex_filter
-tex_filter(unsigned filter)
-{
-	switch (filter) {
-	case PIPE_TEX_FILTER_NEAREST:
-		return A4XX_TEX_NEAREST;
-	case PIPE_TEX_FILTER_LINEAR:
-		return A4XX_TEX_LINEAR;
-	default:
-		DBG("invalid filter: %u", filter);
-		return 0;
-	}
-}
-
-static void *
-fd4_sampler_state_create(struct pipe_context *pctx,
-		const struct pipe_sampler_state *cso)
-{
-	struct fd4_sampler_stateobj *so = CALLOC_STRUCT(fd4_sampler_stateobj);
-
-	if (!so)
-		return NULL;
-
-	so->base = *cso;
-
-	so->texsamp0 =
-		A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter)) |
-		A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter)) |
-		A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s)) |
-		A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t)) |
-		A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r));
-
-	if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
-		so->texsamp1 =
-			A4XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
-			A4XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
-	} else {
-		so->texsamp1 = 0x00000000;
-	}
-
-	if (cso->compare_mode)
-		so->texsamp1 |= A4XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
-
-	return so;
-}
-
-static enum a4xx_tex_type
-tex_type(unsigned target)
-{
-	switch (target) {
-	default:
-		assert(0);
-	case PIPE_BUFFER:
-	case PIPE_TEXTURE_1D:
-	case PIPE_TEXTURE_1D_ARRAY:
-		return A4XX_TEX_1D;
-	case PIPE_TEXTURE_RECT:
-	case PIPE_TEXTURE_2D:
-	case PIPE_TEXTURE_2D_ARRAY:
-		return A4XX_TEX_2D;
-	case PIPE_TEXTURE_3D:
-		return A4XX_TEX_3D;
-	case PIPE_TEXTURE_CUBE:
-	case PIPE_TEXTURE_CUBE_ARRAY:
-		return A4XX_TEX_CUBE;
-	}
-}
-
-static struct pipe_sampler_view *
-fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
-		const struct pipe_sampler_view *cso)
-{
-	struct fd4_pipe_sampler_view *so = CALLOC_STRUCT(fd4_pipe_sampler_view);
-	struct fd_resource *rsc = fd_resource(prsc);
-	unsigned lvl = cso->u.tex.first_level;
-
-	if (!so)
-		return NULL;
-
-	so->base = *cso;
-	pipe_reference(NULL, &prsc->reference);
-	so->base.texture = prsc;
-	so->base.reference.count = 1;
-	so->base.context = pctx;
-
-	so->tex_resource =  rsc;
-
-	so->texconst0 =
-		A4XX_TEX_CONST_0_TYPE(tex_type(prsc->target)) |
-		A4XX_TEX_CONST_0_FMT(fd4_pipe2tex(cso->format)) |
-		fd4_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
-				cso->swizzle_b, cso->swizzle_a);
-
-	so->texconst1 =
-		A4XX_TEX_CONST_1_WIDTH(prsc->width0) |
-		A4XX_TEX_CONST_1_HEIGHT(prsc->height0);
-	so->texconst2 =
-		A4XX_TEX_CONST_2_PITCH(rsc->slices[lvl].pitch * rsc->cpp);
-
-	switch (prsc->target) {
-	case PIPE_TEXTURE_1D_ARRAY:
-	case PIPE_TEXTURE_2D_ARRAY:
-	case PIPE_TEXTURE_3D:
-		so->texconst3 =
-			A4XX_TEX_CONST_3_LAYERSZ(rsc->slices[0].size0);
-		break;
-	default:
-		so->texconst3 = 0x00000000;
-		break;
-	}
-
-	return &so->base;
-}
-
-void
-fd4_texture_init(struct pipe_context *pctx)
-{
-	pctx->create_sampler_state = fd4_sampler_state_create;
-	pctx->bind_sampler_states = fd_sampler_states_bind;
-	pctx->create_sampler_view = fd4_sampler_view_create;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.h
@@ -1,68 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_TEXTURE_H_
-#define FD4_TEXTURE_H_
-
-#include "pipe/p_context.h"
-
-#include "freedreno_texture.h"
-#include "freedreno_resource.h"
-
-#include "fd4_context.h"
-#include "fd4_util.h"
-
-struct fd4_sampler_stateobj {
-	struct pipe_sampler_state base;
-	uint32_t texsamp0, texsamp1;
-};
-
-static INLINE struct fd4_sampler_stateobj *
-fd4_sampler_stateobj(struct pipe_sampler_state *samp)
-{
-	return (struct fd4_sampler_stateobj *)samp;
-}
-
-struct fd4_pipe_sampler_view {
-	struct pipe_sampler_view base;
-	struct fd_resource *tex_resource;
-	uint32_t texconst0, texconst1, texconst2, texconst3;
-};
-
-static INLINE struct fd4_pipe_sampler_view *
-fd4_pipe_sampler_view(struct pipe_sampler_view *pview)
-{
-	return (struct fd4_pipe_sampler_view *)pview;
-}
-
-unsigned fd4_get_const_idx(struct fd_context *ctx,
-		struct fd_texture_stateobj *tex, unsigned samp_id);
-
-void fd4_texture_init(struct pipe_context *pctx);
-
-#endif /* FD4_TEXTURE_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_util.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_util.c
@@ -1,401 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#include "pipe/p_defines.h"
-#include "util/u_format.h"
-
-#include "fd4_util.h"
-
-/* convert pipe format to vertex buffer format: */
-enum a4xx_vtx_fmt
-fd4_pipe2vtx(enum pipe_format format)
-{
-	switch (format) {
-	/* 8-bit buffers. */
-	case PIPE_FORMAT_R8_UNORM:
-		return VFMT4_NORM_UBYTE_8;
-
-	case PIPE_FORMAT_R8_SNORM:
-		return VFMT4_NORM_BYTE_8;
-
-	case PIPE_FORMAT_R8_UINT:
-	case PIPE_FORMAT_R8_USCALED:
-		return VFMT4_UBYTE_8;
-
-	case PIPE_FORMAT_R8_SINT:
-	case PIPE_FORMAT_R8_SSCALED:
-		return VFMT4_BYTE_8;
-
-	/* 16-bit buffers. */
-	case PIPE_FORMAT_R16_UNORM:
-	case PIPE_FORMAT_Z16_UNORM:
-		return VFMT4_NORM_USHORT_16;
-
-	case PIPE_FORMAT_R16_SNORM:
-		return VFMT4_NORM_SHORT_16;
-
-	case PIPE_FORMAT_R16_UINT:
-	case PIPE_FORMAT_R16_USCALED:
-		return VFMT4_USHORT_16;
-
-	case PIPE_FORMAT_R16_SINT:
-	case PIPE_FORMAT_R16_SSCALED:
-		return VFMT4_SHORT_16;
-
-	case PIPE_FORMAT_R16_FLOAT:
-		return VFMT4_FLOAT_16;
-
-	case PIPE_FORMAT_R8G8_UNORM:
-		return VFMT4_NORM_UBYTE_8_8;
-
-	case PIPE_FORMAT_R8G8_SNORM:
-		return VFMT4_NORM_BYTE_8_8;
-
-	case PIPE_FORMAT_R8G8_UINT:
-	case PIPE_FORMAT_R8G8_USCALED:
-		return VFMT4_UBYTE_8_8;
-
-	case PIPE_FORMAT_R8G8_SINT:
-	case PIPE_FORMAT_R8G8_SSCALED:
-		return VFMT4_BYTE_8_8;
-
-	/* 24-bit buffers. */
-	case PIPE_FORMAT_R8G8B8_UNORM:
-		return VFMT4_NORM_UBYTE_8_8_8;
-
-	case PIPE_FORMAT_R8G8B8_SNORM:
-		return VFMT4_NORM_BYTE_8_8_8;
-
-	case PIPE_FORMAT_R8G8B8_UINT:
-	case PIPE_FORMAT_R8G8B8_USCALED:
-		return VFMT4_UBYTE_8_8_8;
-
-	case PIPE_FORMAT_R8G8B8_SINT:
-	case PIPE_FORMAT_R8G8B8_SSCALED:
-		return VFMT4_BYTE_8_8_8;
-
-	/* 32-bit buffers. */
-	case PIPE_FORMAT_A8B8G8R8_UNORM:
-	case PIPE_FORMAT_A8R8G8B8_UNORM:
-	case PIPE_FORMAT_B8G8R8A8_UNORM:
-	case PIPE_FORMAT_R8G8B8A8_UNORM:
-		return VFMT4_NORM_UBYTE_8_8_8_8;
-
-	case PIPE_FORMAT_R8G8B8A8_SNORM:
-		return VFMT4_NORM_BYTE_8_8_8_8;
-
-	case PIPE_FORMAT_R8G8B8A8_UINT:
-	case PIPE_FORMAT_R8G8B8A8_USCALED:
-		return VFMT4_UBYTE_8_8_8_8;
-
-	case PIPE_FORMAT_R8G8B8A8_SINT:
-	case PIPE_FORMAT_R8G8B8A8_SSCALED:
-		return VFMT4_BYTE_8_8_8_8;
-
-	case PIPE_FORMAT_R16G16_SSCALED:
-	case PIPE_FORMAT_R16G16_SINT:
-		return VFMT4_SHORT_16_16;
-
-	case PIPE_FORMAT_R16G16_FLOAT:
-		return VFMT4_FLOAT_16_16;
-
-	case PIPE_FORMAT_R16G16_UINT:
-	case PIPE_FORMAT_R16G16_USCALED:
-		return VFMT4_USHORT_16_16;
-
-	case PIPE_FORMAT_R16G16_UNORM:
-		return VFMT4_NORM_USHORT_16_16;
-
-	case PIPE_FORMAT_R16G16_SNORM:
-		return VFMT4_NORM_SHORT_16_16;
-
-	case PIPE_FORMAT_R10G10B10A2_UNORM:
-		return VFMT4_NORM_UINT_10_10_10_2;
-
-	case PIPE_FORMAT_R10G10B10A2_SNORM:
-		return VFMT4_NORM_INT_10_10_10_2;
-
-	case PIPE_FORMAT_R10G10B10A2_UINT:
-	case PIPE_FORMAT_R10G10B10A2_USCALED:
-		return VFMT4_UINT_10_10_10_2;
-
-	case PIPE_FORMAT_R10G10B10A2_SSCALED:
-		return VFMT4_INT_10_10_10_2;
-
-	/* 48-bit buffers. */
-	case PIPE_FORMAT_R16G16B16_FLOAT:
-		return VFMT4_FLOAT_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16_SINT:
-	case PIPE_FORMAT_R16G16B16_SSCALED:
-		return VFMT4_SHORT_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16_UINT:
-	case PIPE_FORMAT_R16G16B16_USCALED:
-		return VFMT4_USHORT_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16_SNORM:
-		return VFMT4_NORM_SHORT_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16_UNORM:
-		return VFMT4_NORM_USHORT_16_16_16;
-
-	case PIPE_FORMAT_R32_FLOAT:
-	case PIPE_FORMAT_Z32_FLOAT:
-		return VFMT4_FLOAT_32;
-
-	case PIPE_FORMAT_R32_FIXED:
-		return VFMT4_FIXED_32;
-
-	/* 64-bit buffers. */
-	case PIPE_FORMAT_R16G16B16A16_UNORM:
-		return VFMT4_NORM_USHORT_16_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16A16_SNORM:
-		return VFMT4_NORM_SHORT_16_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16A16_UINT:
-	case PIPE_FORMAT_R16G16B16A16_USCALED:
-		return VFMT4_USHORT_16_16_16_16;
-
-	case PIPE_FORMAT_R16G16B16A16_SINT:
-	case PIPE_FORMAT_R16G16B16A16_SSCALED:
-		return VFMT4_SHORT_16_16_16_16;
-
-	case PIPE_FORMAT_R32G32_FLOAT:
-		return VFMT4_FLOAT_32_32;
-
-	case PIPE_FORMAT_R32G32_FIXED:
-		return VFMT4_FIXED_32_32;
-
-	case PIPE_FORMAT_R16G16B16A16_FLOAT:
-		return VFMT4_FLOAT_16_16_16_16;
-
-	/* 96-bit buffers. */
-	case PIPE_FORMAT_R32G32B32_FLOAT:
-		return VFMT4_FLOAT_32_32_32;
-
-	case PIPE_FORMAT_R32G32B32_FIXED:
-		return VFMT4_FIXED_32_32_32;
-
-	/* 128-bit buffers. */
-	case PIPE_FORMAT_R32G32B32A32_FLOAT:
-		return VFMT4_FLOAT_32_32_32_32;
-
-	case PIPE_FORMAT_R32G32B32A32_FIXED:
-		return VFMT4_FIXED_32_32_32_32;
-
-/* TODO probably need gles3 blob drivers to find the 32bit int formats:
-	case PIPE_FORMAT_R32G32B32A32_SNORM:
-	case PIPE_FORMAT_R32G32B32A32_UNORM:
-	case PIPE_FORMAT_R32G32B32A32_SINT:
-	case PIPE_FORMAT_R32G32B32A32_UINT:
-
-	case PIPE_FORMAT_R32_UINT:
-	case PIPE_FORMAT_R32_SINT:
-	case PIPE_FORMAT_A32_UINT:
-	case PIPE_FORMAT_A32_SINT:
-	case PIPE_FORMAT_L32_UINT:
-	case PIPE_FORMAT_L32_SINT:
-	case PIPE_FORMAT_I32_UINT:
-	case PIPE_FORMAT_I32_SINT:
-
-	case PIPE_FORMAT_R32G32_SINT:
-	case PIPE_FORMAT_R32G32_UINT:
-	case PIPE_FORMAT_L32A32_UINT:
-	case PIPE_FORMAT_L32A32_SINT:
-*/
-
-	default:
-		return ~0;
-	}
-}
-
-/* convert pipe format to texture sampler format: */
-enum a4xx_tex_fmt
-fd4_pipe2tex(enum pipe_format format)
-{
-	switch (format) {
-	case PIPE_FORMAT_L8_UNORM:
-	case PIPE_FORMAT_A8_UNORM:
-	case PIPE_FORMAT_I8_UNORM:
-		return TFMT4_NORM_UINT_8;
-
-	case PIPE_FORMAT_B8G8R8A8_UNORM:
-	case PIPE_FORMAT_B8G8R8X8_UNORM:
-	case PIPE_FORMAT_R8G8B8A8_UNORM:
-	case PIPE_FORMAT_R8G8B8X8_UNORM:
-	case PIPE_FORMAT_B8G8R8A8_SRGB:
-	case PIPE_FORMAT_B8G8R8X8_SRGB:
-	case PIPE_FORMAT_R8G8B8A8_SRGB:
-	case PIPE_FORMAT_R8G8B8X8_SRGB:
-		return TFMT4_NORM_UINT_8_8_8_8;
-
-	case PIPE_FORMAT_Z24X8_UNORM:
-		return TFMT4_NORM_UINT_X8Z24;
-
-	case PIPE_FORMAT_Z24_UNORM_S8_UINT:
-		return TFMT4_NORM_UINT_8_8_8_8;
-
-//	case PIPE_FORMAT_Z16_UNORM:
-//		return TFMT4_NORM_UINT_8_8;
-//
-	case PIPE_FORMAT_R16G16B16A16_FLOAT:
-	case PIPE_FORMAT_R16G16B16X16_FLOAT:
-		return TFMT4_FLOAT_16_16_16_16;
-
-	case PIPE_FORMAT_R32G32B32A32_FLOAT:
-	case PIPE_FORMAT_R32G32B32X32_FLOAT:
-		return TFMT4_FLOAT_32_32_32_32;
-
-	// TODO add more..
-
-	default:
-		return ~0;
-	}
-}
-
-/* convert pipe format to MRT / copydest format used for render-target: */
-enum a4xx_color_fmt
-fd4_pipe2color(enum pipe_format format)
-{
-	switch (format) {
-	case PIPE_FORMAT_B8G8R8A8_UNORM:
-	case PIPE_FORMAT_B8G8R8X8_UNORM:
-	case PIPE_FORMAT_R8G8B8A8_UNORM:
-		return RB4_R8G8B8A8_UNORM;
-
-	case PIPE_FORMAT_Z16_UNORM:
-		return RB4_Z16_UNORM;
-
-	case PIPE_FORMAT_Z24X8_UNORM:
-	case PIPE_FORMAT_Z24_UNORM_S8_UINT:
-		/* for DEPTHX_24_8, blob driver also seems to use R8G8B8A8 fmt.. */
-		return RB4_R8G8B8A8_UNORM;
-
-	case PIPE_FORMAT_R8_UNORM:
-	case PIPE_FORMAT_L8_UNORM:
-	case PIPE_FORMAT_A8_UNORM:
-		return RB4_A8_UNORM;
-//
-//	case PIPE_FORMAT_R16G16B16A16_FLOAT:
-//	case PIPE_FORMAT_R16G16B16X16_FLOAT:
-//		return RB4_R16G16B16A16_FLOAT;
-//
-//	case PIPE_FORMAT_R32G32B32A32_FLOAT:
-//	case PIPE_FORMAT_R32G32B32X32_FLOAT:
-//		return RB4_R32G32B32A32_FLOAT;
-
-	// TODO add more..
-
-	default:
-		return ~0;
-	}
-}
-
-/* we need to special case a bit the depth/stencil restore, because we are
- * using the texture sampler to blit into the depth/stencil buffer, *not*
- * into a color buffer.  Otherwise fd4_tex_swiz() will do the wrong thing,
- * as it is assuming that you are sampling into normal render target..
- */
-enum pipe_format
-fd4_gmem_restore_format(enum pipe_format format)
-{
-	switch (format) {
-	case PIPE_FORMAT_Z24X8_UNORM:
-	case PIPE_FORMAT_Z24_UNORM_S8_UINT:
-	case PIPE_FORMAT_Z16_UNORM:
-		return PIPE_FORMAT_B8G8R8A8_UNORM;
-	default:
-		return format;
-	}
-}
-
-/* TODO share w/ a3xx?? */
-enum a3xx_color_swap
-fd4_pipe2swap(enum pipe_format format)
-{
-	switch (format) {
-	case PIPE_FORMAT_B8G8R8A8_UNORM:
-	case PIPE_FORMAT_B8G8R8X8_UNORM:
-	case PIPE_FORMAT_B8G8R8A8_SRGB:
-	case PIPE_FORMAT_B8G8R8X8_SRGB:
-		return WXYZ;
-
-	case PIPE_FORMAT_A8R8G8B8_UNORM:
-	case PIPE_FORMAT_X8R8G8B8_UNORM:
-	case PIPE_FORMAT_A8R8G8B8_SRGB:
-	case PIPE_FORMAT_X8R8G8B8_SRGB:
-		return ZYXW;
-
-	case PIPE_FORMAT_A8B8G8R8_UNORM:
-	case PIPE_FORMAT_X8B8G8R8_UNORM:
-	case PIPE_FORMAT_A8B8G8R8_SRGB:
-	case PIPE_FORMAT_X8B8G8R8_SRGB:
-		return XYZW;
-
-	case PIPE_FORMAT_R8G8B8A8_UNORM:
-	case PIPE_FORMAT_R8G8B8X8_UNORM:
-	case PIPE_FORMAT_Z24X8_UNORM:
-	case PIPE_FORMAT_Z24_UNORM_S8_UINT:
-	default:
-		return WZYX;
-	}
-}
-
-static inline enum a4xx_tex_swiz
-tex_swiz(unsigned swiz)
-{
-	switch (swiz) {
-	default:
-	case PIPE_SWIZZLE_RED:   return A4XX_TEX_X;
-	case PIPE_SWIZZLE_GREEN: return A4XX_TEX_Y;
-	case PIPE_SWIZZLE_BLUE:  return A4XX_TEX_Z;
-	case PIPE_SWIZZLE_ALPHA: return A4XX_TEX_W;
-	case PIPE_SWIZZLE_ZERO:  return A4XX_TEX_ZERO;
-	case PIPE_SWIZZLE_ONE:   return A4XX_TEX_ONE;
-	}
-}
-
-uint32_t
-fd4_tex_swiz(enum pipe_format format, unsigned swizzle_r, unsigned swizzle_g,
-		unsigned swizzle_b, unsigned swizzle_a)
-{
-	const struct util_format_description *desc =
-			util_format_description(format);
-	unsigned char swiz[4] = {
-			swizzle_r, swizzle_g, swizzle_b, swizzle_a,
-	}, rswiz[4];
-
-	util_format_compose_swizzles(desc->swizzle, swiz, rswiz);
-
-	return A4XX_TEX_CONST_0_SWIZ_X(tex_swiz(rswiz[0])) |
-			A4XX_TEX_CONST_0_SWIZ_Y(tex_swiz(rswiz[1])) |
-			A4XX_TEX_CONST_0_SWIZ_Z(tex_swiz(rswiz[2])) |
-			A4XX_TEX_CONST_0_SWIZ_W(tex_swiz(rswiz[3]));
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_util.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_util.h
@@ -1,45 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_UTIL_H_
-#define FD4_UTIL_H_
-
-#include "freedreno_util.h"
-
-#include "a4xx.xml.h"
-
-enum a4xx_vtx_fmt fd4_pipe2vtx(enum pipe_format format);
-enum a4xx_tex_fmt fd4_pipe2tex(enum pipe_format format);
-enum a4xx_color_fmt fd4_pipe2color(enum pipe_format format);
-enum pipe_format fd4_gmem_restore_format(enum pipe_format format);
-enum a3xx_color_swap fd4_pipe2swap(enum pipe_format format);
-
-uint32_t fd4_tex_swiz(enum pipe_format format, unsigned swizzle_r,
-		unsigned swizzle_g, unsigned swizzle_b, unsigned swizzle_a);
-
-#endif /* FD4_UTIL_H_ */
--- a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
@@ -1,105 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-
-#include "pipe/p_state.h"
-#include "util/u_string.h"
-#include "util/u_memory.h"
-
-#include "fd4_zsa.h"
-#include "fd4_context.h"
-#include "fd4_util.h"
-
-void *
-fd4_zsa_state_create(struct pipe_context *pctx,
-		const struct pipe_depth_stencil_alpha_state *cso)
-{
-	struct fd4_zsa_stateobj *so;
-
-	so = CALLOC_STRUCT(fd4_zsa_stateobj);
-	if (!so)
-		return NULL;
-
-	so->base = *cso;
-
-	so->rb_depth_control |=
-			A4XX_RB_DEPTH_CONTROL_ZFUNC(cso->depth.func); /* maps 1:1 */
-
-	if (cso->depth.enabled)
-		so->rb_depth_control |=
-			A4XX_RB_DEPTH_CONTROL_Z_ENABLE |
-			A4XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE;
-
-	if (cso->depth.writemask)
-		so->rb_depth_control |= A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE;
-
-	if (cso->stencil[0].enabled) {
-		const struct pipe_stencil_state *s = &cso->stencil[0];
-
-		so->rb_stencil_control |=
-			A4XX_RB_STENCIL_CONTROL_STENCIL_READ |
-			A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
-			A4XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */
-			A4XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) |
-			A4XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) |
-			A4XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op));
-		so->rb_stencilrefmask |=
-			0xff000000 | /* ??? */
-			A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) |
-			A4XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask);
-
-		if (cso->stencil[1].enabled) {
-			const struct pipe_stencil_state *bs = &cso->stencil[1];
-
-			so->rb_stencil_control |=
-				A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF |
-				A4XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
-				A4XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
-				A4XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
-				A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
-			so->rb_stencilrefmask_bf |=
-				0xff000000 | /* ??? */
-				A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
-				A4XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
-		}
-	}
-
-	if (cso->alpha.enabled) {
-		so->gras_alpha_control =
-			A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE;
-		so->rb_alpha_control =
-			A4XX_RB_ALPHA_CONTROL_ALPHA_TEST |
-			A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
-		so->rb_depth_control |=
-			A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
-	}
-
-	so->rb_render_control = 0x8;  /* XXX */
-
-	return so;
-}
--- a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.h
@@ -1,58 +0,0 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
-/*
- * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Authors:
- *    Rob Clark <robclark@freedesktop.org>
- */
-
-#ifndef FD4_ZSA_H_
-#define FD4_ZSA_H_
-
-
-#include "pipe/p_state.h"
-#include "pipe/p_context.h"
-
-#include "freedreno_util.h"
-
-struct fd4_zsa_stateobj {
-	struct pipe_depth_stencil_alpha_state base;
-	uint32_t gras_alpha_control;
-	uint32_t rb_alpha_control;
-	uint32_t rb_render_control;
-	uint32_t rb_depth_control;
-	uint32_t rb_stencil_control;
-	uint32_t rb_stencilrefmask;
-	uint32_t rb_stencilrefmask_bf;
-};
-
-static INLINE struct fd4_zsa_stateobj *
-fd4_zsa_stateobj(struct pipe_depth_stencil_alpha_state *zsa)
-{
-	return (struct fd4_zsa_stateobj *)zsa;
-}
-
-void * fd4_zsa_state_create(struct pipe_context *pctx,
-		const struct pipe_depth_stencil_alpha_state *cso);
-
-#endif /* FD4_ZSA_H_ */
--- a/src/gallium/drivers/freedreno/adreno_common.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_common.xml.h
@@ -11,10 +11,10 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    364 bytes, from 2013-11-30 14:47:15)
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2013-03-31 16:51:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15053 bytes, from 2014-11-09 15:45:47)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  63169 bytes, from 2014-11-13 22:44:18)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  49097 bytes, from 2014-11-14 15:38:00)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)

 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
@@ -105,7 +105,6 @@ enum adreno_rb_dither_mode {
 enum adreno_rb_depth_format {
 	DEPTHX_16 = 0,
 	DEPTHX_24_8 = 1,
-	DEPTHX_32 = 2,
 };

 enum adreno_rb_copy_control_mode {
@@ -142,13 +141,6 @@ enum a3xx_threadsize {
 	FOUR_QUADS = 1,
 };

-enum a3xx_color_swap {
-	WZYX = 0,
-	WXYZ = 1,
-	ZYXW = 2,
-	XYZW = 3,
-};
-
 #define REG_AXXX_CP_RB_BASE					0x000001c0

 #define REG_AXXX_CP_RB_CNTL					0x000001c1
--- a/src/gallium/drivers/freedreno/adreno_pm4.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
@@ -11,10 +11,10 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    364 bytes, from 2013-11-30 14:47:15)
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2013-03-31 16:51:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  15053 bytes, from 2014-11-09 15:45:47)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  63169 bytes, from 2014-11-13 22:44:18)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  49097 bytes, from 2014-11-14 15:38:00)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)

 Copyright (C) 2013-2014 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
@@ -157,7 +157,6 @@ enum adreno_pm4_type3_packets {
 	CP_IM_STORE = 44,
 	CP_SET_DRAW_INIT_FLAGS = 75,
 	CP_SET_PROTECTED_MODE = 95,
-	CP_BOOTSTRAP_UCODE = 111,
 	CP_LOAD_STATE = 48,
 	CP_COND_INDIRECT_BUFFER_PFE = 58,
 	CP_COND_INDIRECT_BUFFER_PFD = 50,
@@ -279,11 +278,11 @@ static inline uint32_t CP_DRAW_INDX_1_INDEX_SIZE(enum pc_di_index_size val)
 #define CP_DRAW_INDX_1_NOT_EOP					0x00001000
 #define CP_DRAW_INDX_1_SMALL_INDEX				0x00002000
 #define CP_DRAW_INDX_1_PRE_DRAW_INITIATOR_ENABLE		0x00004000
-#define CP_DRAW_INDX_1_NUM_INSTANCES__MASK			0xff000000
-#define CP_DRAW_INDX_1_NUM_INSTANCES__SHIFT			24
-static inline uint32_t CP_DRAW_INDX_1_NUM_INSTANCES(uint32_t val)
+#define CP_DRAW_INDX_1_NUM_INDICES__MASK			0xffff0000
+#define CP_DRAW_INDX_1_NUM_INDICES__SHIFT			16
+static inline uint32_t CP_DRAW_INDX_1_NUM_INDICES(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_1_NUM_INSTANCES__MASK;
+	return ((val) << CP_DRAW_INDX_1_NUM_INDICES__SHIFT) & CP_DRAW_INDX_1_NUM_INDICES__MASK;
 }

 #define REG_CP_DRAW_INDX_2					0x00000002
@@ -294,20 +293,20 @@ static inline uint32_t CP_DRAW_INDX_2_NUM_INDICES(uint32_t val)
 	return ((val) << CP_DRAW_INDX_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_2_NUM_INDICES__MASK;
 }

-#define REG_CP_DRAW_INDX_3					0x00000003
-#define CP_DRAW_INDX_3_INDX_BASE__MASK				0xffffffff
-#define CP_DRAW_INDX_3_INDX_BASE__SHIFT				0
-static inline uint32_t CP_DRAW_INDX_3_INDX_BASE(uint32_t val)
+#define REG_CP_DRAW_INDX_2					0x00000002
+#define CP_DRAW_INDX_2_INDX_BASE__MASK				0xffffffff
+#define CP_DRAW_INDX_2_INDX_BASE__SHIFT				0
+static inline uint32_t CP_DRAW_INDX_2_INDX_BASE(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_3_INDX_BASE__SHIFT) & CP_DRAW_INDX_3_INDX_BASE__MASK;
+	return ((val) << CP_DRAW_INDX_2_INDX_BASE__SHIFT) & CP_DRAW_INDX_2_INDX_BASE__MASK;
 }

-#define REG_CP_DRAW_INDX_4					0x00000004
-#define CP_DRAW_INDX_4_INDX_SIZE__MASK				0xffffffff
-#define CP_DRAW_INDX_4_INDX_SIZE__SHIFT				0
-static inline uint32_t CP_DRAW_INDX_4_INDX_SIZE(uint32_t val)
+#define REG_CP_DRAW_INDX_2					0x00000002
+#define CP_DRAW_INDX_2_INDX_SIZE__MASK				0xffffffff
+#define CP_DRAW_INDX_2_INDX_SIZE__SHIFT				0
+static inline uint32_t CP_DRAW_INDX_2_INDX_SIZE(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_4_INDX_SIZE__SHIFT) & CP_DRAW_INDX_4_INDX_SIZE__MASK;
+	return ((val) << CP_DRAW_INDX_2_INDX_SIZE__SHIFT) & CP_DRAW_INDX_2_INDX_SIZE__MASK;
 }

 #define REG_CP_DRAW_INDX_2_0					0x00000000
@@ -346,11 +345,11 @@ static inline uint32_t CP_DRAW_INDX_2_1_INDEX_SIZE(enum pc_di_index_size val)
 #define CP_DRAW_INDX_2_1_NOT_EOP				0x00001000
 #define CP_DRAW_INDX_2_1_SMALL_INDEX				0x00002000
 #define CP_DRAW_INDX_2_1_PRE_DRAW_INITIATOR_ENABLE		0x00004000
-#define CP_DRAW_INDX_2_1_NUM_INSTANCES__MASK			0xff000000
-#define CP_DRAW_INDX_2_1_NUM_INSTANCES__SHIFT			24
-static inline uint32_t CP_DRAW_INDX_2_1_NUM_INSTANCES(uint32_t val)
+#define CP_DRAW_INDX_2_1_NUM_INDICES__MASK			0xffff0000
+#define CP_DRAW_INDX_2_1_NUM_INDICES__SHIFT			16
+static inline uint32_t CP_DRAW_INDX_2_1_NUM_INDICES(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_2_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_2_1_NUM_INSTANCES__MASK;
+	return ((val) << CP_DRAW_INDX_2_1_NUM_INDICES__SHIFT) & CP_DRAW_INDX_2_1_NUM_INDICES__MASK;
 }

 #define REG_CP_DRAW_INDX_2_2					0x00000002
@@ -389,11 +388,11 @@ static inline uint32_t CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(enum pc_di_index_size va
 #define CP_DRAW_INDX_OFFSET_0_NOT_EOP				0x00001000
 #define CP_DRAW_INDX_OFFSET_0_SMALL_INDEX			0x00002000
 #define CP_DRAW_INDX_OFFSET_0_PRE_DRAW_INITIATOR_ENABLE		0x00004000
-#define CP_DRAW_INDX_OFFSET_0_NUM_INSTANCES__MASK		0xffff0000
-#define CP_DRAW_INDX_OFFSET_0_NUM_INSTANCES__SHIFT		16
-static inline uint32_t CP_DRAW_INDX_OFFSET_0_NUM_INSTANCES(uint32_t val)
+#define CP_DRAW_INDX_OFFSET_0_NUM_INDICES__MASK			0xffff0000
+#define CP_DRAW_INDX_OFFSET_0_NUM_INDICES__SHIFT		16
+static inline uint32_t CP_DRAW_INDX_OFFSET_0_NUM_INDICES(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_OFFSET_0_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_OFFSET_0_NUM_INSTANCES__MASK;
+	return ((val) << CP_DRAW_INDX_OFFSET_0_NUM_INDICES__SHIFT) & CP_DRAW_INDX_OFFSET_0_NUM_INDICES__MASK;
 }

 #define REG_CP_DRAW_INDX_OFFSET_1				0x00000001
@@ -406,22 +405,20 @@ static inline uint32_t CP_DRAW_INDX_OFFSET_2_NUM_INDICES(uint32_t val)
 	return ((val) << CP_DRAW_INDX_OFFSET_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_OFFSET_2_NUM_INDICES__MASK;
 }

-#define REG_CP_DRAW_INDX_OFFSET_3				0x00000003
-
-#define REG_CP_DRAW_INDX_OFFSET_4				0x00000004
-#define CP_DRAW_INDX_OFFSET_4_INDX_BASE__MASK			0xffffffff
-#define CP_DRAW_INDX_OFFSET_4_INDX_BASE__SHIFT			0
-static inline uint32_t CP_DRAW_INDX_OFFSET_4_INDX_BASE(uint32_t val)
+#define REG_CP_DRAW_INDX_OFFSET_2				0x00000002
+#define CP_DRAW_INDX_OFFSET_2_INDX_BASE__MASK			0xffffffff
+#define CP_DRAW_INDX_OFFSET_2_INDX_BASE__SHIFT			0
+static inline uint32_t CP_DRAW_INDX_OFFSET_2_INDX_BASE(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_OFFSET_4_INDX_BASE__SHIFT) & CP_DRAW_INDX_OFFSET_4_INDX_BASE__MASK;
+	return ((val) << CP_DRAW_INDX_OFFSET_2_INDX_BASE__SHIFT) & CP_DRAW_INDX_OFFSET_2_INDX_BASE__MASK;
 }

-#define REG_CP_DRAW_INDX_OFFSET_5				0x00000005
-#define CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK			0xffffffff
-#define CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT			0
-static inline uint32_t CP_DRAW_INDX_OFFSET_5_INDX_SIZE(uint32_t val)
+#define REG_CP_DRAW_INDX_OFFSET_2				0x00000002
+#define CP_DRAW_INDX_OFFSET_2_INDX_SIZE__MASK			0xffffffff
+#define CP_DRAW_INDX_OFFSET_2_INDX_SIZE__SHIFT			0
+static inline uint32_t CP_DRAW_INDX_OFFSET_2_INDX_SIZE(uint32_t val)
 {
-	return ((val) << CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK;
+	return ((val) << CP_DRAW_INDX_OFFSET_2_INDX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_2_INDX_SIZE__MASK;
 }

 #define REG_CP_SET_DRAW_STATE_0					0x00000000
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -52,7 +52,6 @@

 #include "a2xx/fd2_screen.h"
 #include "a3xx/fd3_screen.h"
-#include "a4xx/fd4_screen.h"

 /* XXX this should go away */
 #include "state_tracker/drm_driver.h"
@@ -515,7 +514,7 @@ fd_screen_create(struct fd_device *dev)
 	 * before enabling:
 	 *
 	 * If you have a different adreno version, feel free to add it to one
-	 * of the cases below and see what happens.  And if it works, please
+	 * of the two cases below and see what happens.  And if it works, please
 	 * send a patch ;-)
 	 */
 	switch (screen->gpu_id) {
@@ -526,9 +525,6 @@ fd_screen_create(struct fd_device *dev)
 	case 330:
 		fd3_screen_init(pscreen);
 		break;
-	case 420:
-		fd4_screen_init(pscreen);
-		break;
 	default:
 		debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
 		goto fail;
--- a/src/gallium/drivers/freedreno/ir3/ir3.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3.c
@@ -540,8 +540,7 @@ static int (*emit[])(struct ir3_instruction *instr, void *ptr,
 	emit_cat0, emit_cat1, emit_cat2, emit_cat3, emit_cat4, emit_cat5, emit_cat6,
 };

-void * ir3_assemble(struct ir3 *shader, struct ir3_info *info,
-		uint32_t gpu_id)
+void * ir3_assemble(struct ir3 *shader, struct ir3_info *info)
 {
 	uint32_t *ptr, *dwords;
 	uint32_t i;
@@ -551,15 +550,11 @@ void * ir3_assemble(struct ir3 *shader, struct ir3_info *info,
 	info->max_const     = -1;
 	info->instrs_count  = 0;

-	/* need a integer number of instruction "groups" (sets of 16
-	 * instructions on a4xx or sets of 4 instructions on a3xx),
-	 * so pad out w/ NOPs if needed: (NOTE each instruction is 64bits)
+	/* need a integer number of instruction "groups" (sets of four
+	 * instructions), so pad out w/ NOPs if needed:
+	 * (each instruction is 64bits)
 	 */
-	if (gpu_id >= 400) {
-		info->sizedwords = 2 * align(shader->instrs_count, 16);
-	} else {
-		info->sizedwords = 2 * align(shader->instrs_count, 4);
-	}
+	info->sizedwords = 2 * align(shader->instrs_count, 4);

 	ptr = dwords = calloc(4, info->sizedwords);

--- a/src/gallium/drivers/freedreno/ir3/ir3.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3.h
@@ -264,7 +264,7 @@ struct ir3_block {
 struct ir3 * ir3_create(void);
 void ir3_destroy(struct ir3 *shader);
 void * ir3_assemble(struct ir3 *shader,
-		struct ir3_info *info, uint32_t gpu_id);
+		struct ir3_info *info);
 void * ir3_alloc(struct ir3 *shader, int sz);

 struct ir3_block * ir3_block_create(struct ir3 *shader,
--- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
@@ -49,8 +49,7 @@ static void dump_info(struct ir3_shader_variant *so, const char *str)
 	const char *type = (so->type == SHADER_VERTEX) ? "VERT" : "FRAG";

 	// for debug, dump some before/after info:
-	// TODO make gpu_id configurable on cmdline
-	bin = ir3_assemble(so->ir, &info, 320);
+	bin = ir3_assemble(so->ir, &info);
 	if (fd_mesa_debug & FD_DBG_DISASM) {
 		struct ir3_block *block = so->ir->block;
 		struct ir3_register *reg;
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -2112,7 +2112,7 @@ trans_cov(const struct instr_translater *t,
 *  madsh.m16 tmp1, a, b, tmp0 (mul-add shift high mix, i.e. ah * bl << 16)
 *  madsh.m16 dst, b, a, tmp1 (i.e. al * bh << 16)
 *
- * For UMAD, replace first mull.u with mad.u16.
+ * For UMAD, add in the extra argument after mull.u.
 */
 static void
 trans_umul(const struct instr_translater *t,
@@ -2135,16 +2135,16 @@ trans_umul(const struct instr_translater *t,
 	if (is_rel_or_const(b))
 		b = get_unconst(ctx, b);

-	if (t->tgsi_opc == TGSI_OPCODE_UMUL) {
-		/* mull.u tmp0, a, b */
-		instr = instr_create(ctx, 2, OPC_MULL_U);
-		vectorize(ctx, instr, &tmp0_dst, 2, a, 0, b, 0);
-	} else {
+	/* mull.u tmp0, a, b */
+	instr = instr_create(ctx, 2, OPC_MULL_U);
+	vectorize(ctx, instr, &tmp0_dst, 2, a, 0, b, 0);
+
+	if (t->tgsi_opc == TGSI_OPCODE_UMAD) {
 		struct tgsi_src_register *c = &inst->Src[2].Register;

-		/* mad.u16 tmp0, a, b, c */
-		instr = instr_create(ctx, 3, OPC_MAD_U16);
-		vectorize(ctx, instr, &tmp0_dst, 3, a, 0, b, 0, c, 0);
+		/* add.u tmp0, tmp0, c */
+		instr = instr_create(ctx, 2, OPC_ADD_U);
+		vectorize(ctx, instr, &tmp0_dst, 2, tmp0_src, 0, c, 0);
 	}

 	/* madsh.m16 tmp1, a, b, tmp0 */
@@ -2350,6 +2350,9 @@ trans_idiv(const struct instr_translater *t,
 	if (t->tgsi_opc == TGSI_OPCODE_MOD || t->tgsi_opc == TGSI_OPCODE_UMOD) {
 		/* The division result will have ended up in q. */

+		if (is_rel_or_const(b))
+			b = get_unconst(ctx, b);
+
 		/* mull.u r, q, b */
 		instr = instr_create(ctx, 2, OPC_MULL_U);
 		vectorize(ctx, instr, &r_dst, 2, q_src, 0, b, 0);
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@ -56,7 +56,7 @@ assemble_variant(struct ir3_shader_variant *v)
 	struct fd_context *ctx = fd_context(v->shader->pctx);
 	uint32_t sz, *bin;

-	bin = ir3_assemble(v->ir, &v->info, ctx->screen->gpu_id);
+	bin = ir3_assemble(v->ir, &v->info);
 	sz = v->info.sizedwords * 4;

 	v->bo = fd_bo_new(ctx->dev, sz,
@@ -67,11 +67,7 @@ assemble_variant(struct ir3_shader_variant *v)

 	free(bin);

-	if (ctx->screen->gpu_id >= 400) {
-		v->instrlen = v->info.sizedwords / (2 * 16);
-	} else {
-		v->instrlen = v->info.sizedwords / (2 * 4);
-	}
+	v->instrlen = v->info.sizedwords / 8;

 	/* NOTE: if relative addressing is used, we set constlen in
 	 * the compiler (to worst-case value) since we don't know in
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -111,8 +111,7 @@ struct ir3_shader_variant {
 	struct ir3 *ir;

 	/* the instructions length is in units of instruction groups
-	 * (4 instructions for a3xx, 16 instructions for a4xx.. each
-	 * instruction is 2 dwords):
+	 * (4 instructions, 8 dwords):
 	 */
 	unsigned instrlen;

@@ -204,7 +203,7 @@ struct ir3_shader {
 	/* so far, only used for blit_prog shader.. values for
 	 * VPC_VARYING_PS_REPL[i].MODE
 	 */
-	uint32_t vpsrepl[8];
+	uint32_t vpsrepl[4];
 };


--- a/Show More
+++ b/Show More