!UPSTREAM: Make GL_STENCIL_INDEX exist again in ES2.

This lets gles2conform build since 88ec004.
2013-11-07 19:16:40 -08:00
125 changed files with 584 additions and 2900 deletions
--- a/Makefile.am
+++ b/Makefile.am
@@ -36,6 +36,7 @@ PACKAGE_NAME = MesaLib-$(PACKAGE_VERSION)
 EXTRA_FILES = \
 	aclocal.m4					\
 	configure					\
+	VERSION					\
 	bin/ar-lib					\
 	bin/compile					\
 	bin/config.sub					\
@@ -45,7 +46,6 @@ EXTRA_FILES = \
 	bin/ltmain.sh					\
 	bin/missing					\
 	bin/ylwrap					\
-        bin/test-driver					\
 	src/glsl/glsl_parser.cpp			\
 	src/glsl/glsl_parser.h				\
 	src/glsl/glsl_lexer.cpp				\
--- a/2
+++ b/2
@@ -1 +1 @@
-10.0.1
+10.0.0-devel
--- a/bin/.cherry-ignore
+++ b/bin/.cherry-ignore
@@ -1,13 +0,0 @@
-# Since we've disabled DRI3 completely in 10.0, this commit is no longer
-# necessary.
-f0f202e6b764be803470e27cba9102f14361ae22 glx: conditionaly build dri3 and present loader (v3)
-
-# This patch makes bug #71870 worse, so it won't be cherry picked until that
-# issue can be resolved.  See
-# http://lists.freedesktop.org/archives/mesa-dev/2013-November/048899.html
-068a073c1d4853b5c8f33efdeb481026f42e23a5 meta: fix meta clear of layered framebuffers
-
-# This patch isn't actually necessary because that bug that it fixes isn't in
-# the 10.0 branch.  See
-# http://lists.freedesktop.org/archives/mesa-stable/2013-December/000500.html
-a057b837ddd1c725a7504eedc53c6df05a012773 egl: add HAVE_LIBDRM define, fix EGL X11 platform
--- a/configure.ac
+++ b/configure.ac
@@ -29,11 +29,14 @@ AC_SUBST([OSMESA_VERSION])
 dnl Versions for external dependencies
 LIBDRM_REQUIRED=2.4.24
 LIBDRM_RADEON_REQUIRED=2.4.46
-LIBDRM_INTEL_REQUIRED=2.4.49
+LIBDRM_INTEL_REQUIRED=2.4.38
 LIBDRM_NVVIEUX_REQUIRED=2.4.33
 LIBDRM_NOUVEAU_REQUIRED="2.4.33 libdrm >= 2.4.41"
 LIBDRM_FREEDRENO_REQUIRED=2.4.39
 DRI2PROTO_REQUIRED=2.6
+DRI3PROTO_REQUIRED=1.0
+PRESENTPROTO_REQUIRED=1.0
+LIBUDEV_REQUIRED=151
 GLPROTO_REQUIRED=1.4.14

 dnl Check for progs
@@ -808,10 +811,13 @@ xyesno)
        fi
        PKG_CHECK_MODULES([DRI2PROTO], [dri2proto >= $DRI2PROTO_REQUIRED])
        GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV libdrm >= $LIBDRM_REQUIRED"
+        PKG_CHECK_MODULES([DRI3PROTO], [dri3proto >= $DRI3PROTO_REQUIRED])
+        PKG_CHECK_MODULES([PRESENTPROTO], [presentproto >= $PRESENTPROTO_REQUIRED])
+        PKG_CHECK_MODULES([LIBUDEV], [libudev >= $LIBUDEV_REQUIRED])
    fi

    # find the DRI deps for libGL
-    dri_modules="x11 xext xdamage xfixes x11-xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8"
+    dri_modules="x11 xext xdamage xfixes x11-xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8 xcb-dri3 xcb-present xcb-sync xshmfence"

    # add xf86vidmode if available
    PKG_CHECK_MODULES([XF86VIDMODE], [xxf86vm], HAVE_XF86VIDMODE=yes, HAVE_XF86VIDMODE=no)
@@ -821,8 +827,8 @@ xyesno)

    PKG_CHECK_MODULES([DRIGL], [$dri_modules])
    GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV $dri_modules"
-    X11_INCLUDES="$X11_INCLUDES $DRIGL_CFLAGS"
-    GL_LIB_DEPS="$DRIGL_LIBS"
+    X11_INCLUDES="$X11_INCLUDES $DRIGL_CFLAGS $LIBUDEV_CFLAGS"
+    GL_LIB_DEPS="$DRIGL_LIBS $LIBUDEV_LIBS"

    # need DRM libs, $PTHREAD_LIBS, etc.
    GL_LIB_DEPS="$GL_LIB_DEPS $LIBDRM_LIBS -lm $PTHREAD_LIBS $DLOPEN_LIBS"
@@ -1494,6 +1500,12 @@ AC_ARG_WITH([llvm-shared-libs],
        [link with LLVM shared libraries @<:@default=disabled@:>@])],
    [],
    [with_llvm_shared_libs=no])
+AS_IF([test x$enable_opencl = xyes],
+    [
+        if test "x$with_llvm_shared_libs" != xyes; then
+            AC_MSG_ERROR([OpenCL requires LLVM shared libraries])
+        fi
+    ])

 AC_ARG_WITH([llvm-prefix],
    [AS_HELP_STRING([--with-llvm-prefix],
--- a/docs/relnotes/10.0.1.html
+++ b/docs/relnotes/10.0.1.html
@@ -1,147 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<html lang="en">
-<head>
-  <meta http-equiv="content-type" content="text/html; charset=utf-8">
-  <title>Mesa Release Notes</title>
-  <link rel="stylesheet" type="text/css" href="../mesa.css">
-</head>
-<body>
-
-<div class="header">
-  <h1>The Mesa 3D Graphics Library</h1>
-</div>
-
-<iframe src="../contents.html"></iframe>
-<div class="content">
-
-<h1>Mesa 10.0.1 Release Notes / (December 12, 2013)</h1>
-
-<p>
-Mesa 10.0.1 is a bug fix release which fixes bugs found since the 10.0 release.
-</p>
-<p>
-Mesa 10.0.1 implements the OpenGL 3.3 API, but the version reported by
-glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
-glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
-Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
-3.3 is <strong>only</strong> available if requested at context creation
-because compatibility contexts not supported.
-</p>
-
-
-<h2>MD5 checksums</h2>
-<pre>
-</pre>
-
-
-<h2>New features</h2>
-<p>None</p>
-
-<h2>Bug fixes</h2>
-
-<p>This list is likely incomplete.</p>
-
-<ul>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64323">Bug 64323</a> - Severe misrendering in Left 4 Dead 2</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68838">Bug 68838</a> - GLSL: struct declarations produce a &quot;empty declaration warning&quot; in 9.2</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69155">Bug 69155</a> - [NV50 gallium] [piglit] bin/varying-packing-simple triggers memory corruption/failures</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70250">Bug 70250</a> - weston-terminal rendering corrupted with output transform 90 and 270</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70601">Bug 70601</a> - [SNB Bisected]Piglit spec/ARB_texture_float/multisample-formats 2 GL_ARB_texture_float fails</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72230">Bug 72230</a> - Unable to extract MesaLib-10.0.0.tar.{gz,bz2} with bsdtar</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72325">Bug 72325</a> - [swrast] piglit glean fbo regression</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72327">Bug 72327</a> - [swrast] piglit glean pointSprite regression</li>
-
-</ul>
-
-<h2>Changes</h2>
-
-<p>The full set of changes can be viewed by using the following git command:</p>
-
-<pre>
-  git log mesa-10.0..mesa-10.0.1
-</pre>
-
-<p>Axel Davy (2):</p>
-<ul>
-  <li>egl/wayland: Flush the wl_display at the end of SwapBuffers</li>
-  <li>Enable throttling in SwapBuffers</li>
-</ul>
-
-<p>Chad Versace (2):</p>
-<ul>
-  <li>i965/hsw: Apply non-msrt fast color clear w/a to all HSW GTs</li>
-  <li>i965: Add extra-alignment for non-msrt fast color clear for all hw (v2)</li>
-</ul>
-
-<p>Dave Airlie (1):</p>
-<ul>
-  <li>swrast: fix readback regression since inversion fix</li>
-</ul>
-
-<p>Emil Velikov (1):</p>
-<ul>
-  <li>automake: include only one copy VERSION in tarball</li>
-</ul>
-
-<p>Ian Romanick (3):</p>
-<ul>
-  <li>docs: Add 10.0 release md5sums</li>
-  <li>Remove a057b83 from the pick list</li>
-  <li>glsl: Don't emit empty declaration warning for a struct specifier</li>
-</ul>
-
-<p>Ilia Mirkin (8):</p>
-<ul>
-  <li>mesa: don't leak performance monitors on context destroy</li>
-  <li>nv50: Fix GPU_READING/WRITING bit removal</li>
-  <li>nouveau: avoid leaking fences while waiting</li>
-  <li>nv50: wait on the buf's fence before sticking it into pushbuf</li>
-  <li>nv50: enable h264 and mpeg4 for nv98+ (vp3, vp4.0)</li>
-  <li>nouveau/video: update h264 picparm field names based on usage</li>
-  <li>nouveau/video: update a few more h264 picparm field names</li>
-  <li>nv50: report 15 max inputs for fragment programs</li>
-</ul>
-
-<p>Jordan Justen (1):</p>
-<ul>
-  <li>dri megadriver_stub: add compatibility for older DRI loaders</li>
-</ul>
-
-<p>Kristian Høgsberg (2):</p>
-<ul>
-  <li>egl/wayland: Damage INT32_MAX x INT32_MAX region for eglSwapBuffers</li>
-  <li>egl/wayland: Send commit after flushing the driver context</li>
-</ul>
-
-<p>Maarten Lankhorst (1):</p>
-<ul>
-  <li>nouveau: Fix compiler warning regression</li>
-</ul>
-
-<p>Paul Berry (1):</p>
-<ul>
-  <li>i965/gen6: Fix multisample resolve blits for luminance/intensity 32F formats.</li>
-</ul>
-
-<p>Thomas Hellstrom (1):</p>
-<ul>
-  <li>st/xa: Bump major version number to 2</li>
-</ul>
-
-<p>Tom Stellard (2):</p>
-<ul>
-  <li>r300/compiler/tests: Fix segfault</li>
-  <li>r300/compiler/tests: Fix line length check in test parser</li>
-</ul>
-
-</div>
-</body>
-</html>
--- a/docs/relnotes/10.0.html
+++ b/docs/relnotes/10.0.html
@@ -14,7 +14,7 @@
 <iframe src="../contents.html"></iframe>
 <div class="content">

-<h1>Mesa 10.0 Release Notes / (November 30th, 2013)</h1>
+<h1>Mesa 10.0 Release Notes / TBD</h1>

 <p>
 Mesa 10.0 is a new development release.
@@ -33,9 +33,7 @@ because compatibility contexts are not supported.

 <h2>MD5 checksums</h2>
 <pre>
-b38626b96c664db67a534d7859682436  MesaLib-10.0.0.tar.gz
-f3fe55d9735bea158bbe97ed9a0da819  MesaLib-10.0.0.tar.bz2
-c6ee1ce51e3bf35947d2978b872daf51  MesaLib-10.0.0.zip
+TBD.
 </pre>


@@ -57,89 +55,16 @@ Note: some of the new features are only available with certain drivers.
 <li>GL_ARB_vertex_attrib_binding</li>
 <li>GL_ARB_vertex_type_10f_11f_11f_rev on i965 and r600g</li>
 <li>GL_KHR_debug</li>
-<li>GLX_MESA_query_renderer</li>
 </ul>


 <h2>Bug fixes</h2>

-<p>Attempts have been made to <b>not</b> include bugs fixed in previous 9.2
-releases or bugs that were regressions during 10.0 development. This list is
-likely incomplete.</p>
-
-<ul>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=47755">Bug 47755</a> - [glsl-compiler] no error checking when Interpolation qualifier for built-in variable is different in vertex and fragment shader</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=52171">Bug 52171</a> - [gallium/r600/clover] Simple benchmarks failed to run</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=53077">Bug 53077</a> - [IVB] Output error with msaa when both of framebuffer and source color's alpha are not 1</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=54867">Bug 54867</a> - bug in r300 compiler</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60929">Bug 60929</a> - [r600-llvm] mono games with opengl are blocking on start</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62142">Bug 62142</a> - Mesa/demo mipmap_limits upside down with running by SOFTWARE</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62698">Bug 62698</a> - [bisected] WebGL demo &quot;Consumed&quot;: texstate.c:628: update_texture_state: Assertion „__builtin_popcount(enabledTargets) == 1“ failed.</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64225">Bug 64225</a> - bfgminer --scyte generates Segmentation Fault on Northern Island</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64226">Bug 64226</a> - python-opencl package generate segmentation fault at pipe_r600.so</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64261">Bug 64261</a> - [SNB Bisected]Ogles3conform GL3Tests_color_buffer_float_color_buffer_float_clamp_fixed.test fail</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66213">Bug 66213</a> - Certain Mesa Demos Rendering Inverted (vertically)</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66806">Bug 66806</a> - [softpipe] glxgears floating point exception</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67921">Bug 67921</a> - [bisected commit 883987] crosscompiling fails with util/u_cpu_detect.c:247:4: error: 'asm' undeclared (first use in this function)</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68162">Bug 68162</a> - [radeonsi] texture rendering is broken in Source-Engine games</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68451">Bug 68451</a> - Texture flicker in native Dota2 in mesa 9.2.0rc1</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68503">Bug 68503</a> - Graphical glitches in Serious Sam 3 when SB is enabled</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68792">Bug 68792</a> - Problems during playback of h264 files using UVD and VLC on AMD E-350 CPU</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68845">Bug 68845</a> - VDPAU/UVD regression</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69078">Bug 69078</a> - Modern Warfare (1, 2 and 3) broken in Wine on SNB</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69321">Bug 69321</a> - starting openCL crashes/boots system</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70042">Bug 70042</a> - Major texture flickering in Dota 2 (r600g on HD 6950)</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70088">Bug 70088</a> - Glamor on r600g crashes Xserver</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70123">Bug 70123</a> - Freeze caused by 'winsys/radeon: remove cs_queue_empty' commit</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70327">Bug 70327</a> - Casting floating point variable to integer not working properly while constant gets converted properly</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70891">Bug 70891</a> - CL_INVALID_BUILD_OPTIONS results in CL_INVALID_DEVICE when asking for build log</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70913">Bug 70913</a> - [PIGLIT,radeonsi] crash in &quot;spec/EXT_framebuffer_multisample/sample-alpha-to-coverage 4 depth&quot; (buffer overflow)</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71022">Bug 71022</a> - configure: error: Expat required for DRI.</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71110">Bug 71110</a> - xorg_driver.c:1030:2: error: too many arguments to function ‘DamageUnregister’</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71172">Bug 71172</a> - Segfault when running glxinfo. NV25GL [Quadro4 900 XGL]</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71512">Bug 71512</a> - dlopen.h:54: undefined reference to `dlopen'</li>
-
-<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71870">Bug 71870</a> - Metro: Last Light rendering issues</li>
-
-</ul>
+TBD.

 <h2>Changes</h2>

-<ul>
-<li>Removed X.Org state tracker (unmaintained and broken)</li>
-<li>Removed the video-accel r300 targets</li>
-<li>Removed the video-accel softpipe targets</li>
-</ul>
+TBD.

 </div>
 </body>
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -782,6 +782,12 @@ typedef __DRIdrawable *
                              const __DRIconfig *config,
                              void *loaderPrivate);

+typedef __DRIcontext *
+(*__DRIcreateNewContextFunc)(__DRIscreen *screen,
+                             const __DRIconfig *config,
+                             __DRIcontext *shared,
+                             void *loaderPrivate);
+
 typedef __DRIcontext *
 (*__DRIcreateContextAttribsFunc)(__DRIscreen *screen,
                                 int api,
@@ -943,10 +949,7 @@ struct __DRIdri2ExtensionRec {
 				    void *loaderPrivate);

   __DRIcreateNewDrawableFunc   createNewDrawable;
-   __DRIcontext *(*createNewContext)(__DRIscreen *screen,
-                                     const __DRIconfig *config,
-                                     __DRIcontext *shared,
-                                     void *loaderPrivate);
+   __DRIcreateNewContextFunc    createNewContext;

   /* Since version 2 */
   __DRIgetAPIMaskFunc          getAPIMask;
@@ -1402,6 +1405,7 @@ struct __DRIimageDriverExtensionRec {
   /* Common DRI functions, shared with DRI2 */
   __DRIcreateNewScreen2Func            createNewScreen2;
   __DRIcreateNewDrawableFunc           createNewDrawable;
+   __DRIcreateNewContextFunc            createNewContext;
   __DRIcreateContextAttribsFunc        createContextAttribs;
   __DRIgetAPIMaskFunc                  getAPIMask;
 };
--- a/include/GLES2/gl2platform.h
+++ b/include/GLES2/gl2platform.h
@@ -27,4 +27,6 @@
 #define GL_APIENTRY KHRONOS_APIENTRY
 #endif

+#define GL_STENCIL_INDEX 0x1901
+
 #endif /* __gl2platform_h_ */
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -117,7 +117,7 @@ struct dri2_egl_display

   __DRIdri2LoaderExtension    dri2_loader_extension;
   __DRIswrastLoaderExtension  swrast_loader_extension;
-   const __DRIextension     *extensions[5];
+   const __DRIextension     *extensions[4];
   const __DRIextension    **driver_extensions;

 #ifdef HAVE_X11_PLATFORM
@@ -189,6 +189,7 @@ struct dri2_egl_surface
 #ifdef HAVE_WAYLAND_PLATFORM
      struct wl_buffer   *wl_buffer;
      __DRIimage         *dri_image;
+      int                 pitch, name;
 #endif
 #ifdef HAVE_DRM_PLATFORM
      struct gbm_bo       *bo;
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -175,12 +175,13 @@ dri2_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
 }

 static int
-get_back_bo(struct dri2_egl_surface *dri2_surf)
+get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
 {
   struct dri2_egl_display *dri2_dpy =
      dri2_egl_display(dri2_surf->base.Resource.Display);
+   struct gbm_dri_bo *bo;
   struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
-   int i;
+   int i, name, pitch;

   if (dri2_surf->back == NULL) {
      for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
@@ -200,17 +201,6 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
   if (dri2_surf->back->bo == NULL)
      return -1;

-   return 0;
-}
-
-static void
-back_bo_to_dri_buffer(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
-{
-   struct dri2_egl_display *dri2_dpy =
-      dri2_egl_display(dri2_surf->base.Resource.Display);
-   struct gbm_dri_bo *bo;
-   int name, pitch;
-
   bo = (struct gbm_dri_bo *) dri2_surf->back->bo;

   dri2_dpy->image->queryImage(bo->image, __DRI_IMAGE_ATTRIB_NAME, &name);
@@ -221,6 +211,8 @@ back_bo_to_dri_buffer(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
   buffer->pitch = pitch;
   buffer->cpp = 4;
   buffer->flags = 0;
+
+   return 0;
 }

 static int
@@ -262,11 +254,10 @@ dri2_get_buffers_with_format(__DRIdrawable *driDrawable,

      switch (attachments[i]) {
      case __DRI_BUFFER_BACK_LEFT:
-	 if (get_back_bo(dri2_surf) < 0) {
+	 if (get_back_bo(dri2_surf, &dri2_surf->buffers[j]) < 0) {
 	    _eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
 	    return NULL;
 	 }
-         back_bo_to_dri_buffer(dri2_surf, &dri2_surf->buffers[j]);
 	 break;
      default:
 	 if (get_aux_bo(dri2_surf, attachments[i], attachments[i + 1],
@@ -321,27 +312,6 @@ dri2_get_buffers(__DRIdrawable * driDrawable,
   return buffer;
 }

-static int
-dri_image_get_buffers(__DRIdrawable *driDrawable,
-                      unsigned int format,
-                      uint32_t *stamp,
-                      void *loaderPrivate,
-                      uint32_t buffer_mask,
-                      struct __DRIimageList *buffers)
-{
-   struct dri2_egl_surface *dri2_surf = loaderPrivate;
-   struct gbm_dri_bo *bo;
-
-   if (get_back_bo(dri2_surf) < 0)
-      return 0;
-
-   bo = (struct gbm_dri_bo *) dri2_surf->back->bo;
-   buffers->image_mask = __DRI_IMAGE_BUFFER_BACK;
-   buffers->back = bo->image;
-
-   return 1;
-}
-
 static void
 dri2_flush_front_buffer(__DRIdrawable * driDrawable, void *loaderPrivate)
 {
@@ -378,8 +348,9 @@ dri2_query_buffer_age(_EGLDriver *drv,
                      _EGLDisplay *disp, _EGLSurface *surface)
 {
   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surface);
+   __DRIbuffer buffer;

-   if (get_back_bo(dri2_surf) < 0) {
+   if (get_back_bo(dri2_surf, &buffer) < 0) {
      _eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
      return 0;
   }
@@ -498,7 +469,6 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
   dri2_dpy->gbm_dri->get_buffers = dri2_get_buffers;
   dri2_dpy->gbm_dri->flush_front_buffer = dri2_flush_front_buffer;
   dri2_dpy->gbm_dri->get_buffers_with_format = dri2_get_buffers_with_format;
-   dri2_dpy->gbm_dri->image_get_buffers = dri_image_get_buffers;

   dri2_dpy->gbm_dri->base.base.surface_lock_front_buffer = lock_front_buffer;
   dri2_dpy->gbm_dri->base.base.surface_release_buffer = release_buffer;
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -257,11 +257,12 @@ dri2_release_buffers(struct dri2_egl_surface *dri2_surf)
 }

 static int
-get_back_bo(struct dri2_egl_surface *dri2_surf)
+get_back_bo(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
 {
   struct dri2_egl_display *dri2_dpy =
      dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
+   __DRIimage *image;
+   int i, name, pitch;

   /* There might be a buffer release already queued that wasn't processed */
   wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_dpy->wl_queue);
@@ -294,30 +295,23 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
   if (dri2_surf->back->dri_image == NULL)
      return -1;

-   dri2_surf->back->locked = 1;
-
-   return 0;
-}
-
-
-static void
-back_bo_to_dri_buffer(struct dri2_egl_surface *dri2_surf, __DRIbuffer *buffer)
-{
-   struct dri2_egl_display *dri2_dpy =
-      dri2_egl_display(dri2_surf->base.Resource.Display);
-   __DRIimage *image;
-   int name, pitch;
-
   image = dri2_surf->back->dri_image;

   dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_NAME, &name);
   dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &pitch);

+   dri2_surf->back->name = name;
+   dri2_surf->back->pitch = pitch;
+
   buffer->attachment = __DRI_BUFFER_BACK_LEFT;
   buffer->name = name;
   buffer->pitch = pitch;
   buffer->cpp = 4;
   buffer->flags = 0;
+
+   dri2_surf->back->locked = 1;
+
+   return 0;
 }

 static int
@@ -343,12 +337,16 @@ get_aux_bo(struct dri2_egl_surface *dri2_surf,
   return 0;
 }

-static int
-update_buffers(struct dri2_egl_surface *dri2_surf)
+static __DRIbuffer *
+dri2_get_buffers_with_format(__DRIdrawable * driDrawable,
+			     int *width, int *height,
+			     unsigned int *attachments, int count,
+			     int *out_count, void *loaderPrivate)
 {
+   struct dri2_egl_surface *dri2_surf = loaderPrivate;
   struct dri2_egl_display *dri2_dpy =
      dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
+   int i, j;

   if (dri2_surf->base.Type == EGL_WINDOW_BIT &&
       (dri2_surf->base.Width != dri2_surf->wl_win->width || 
@@ -362,9 +360,22 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
      dri2_surf->dy = dri2_surf->wl_win->dy;
   }

-   if (get_back_bo(dri2_surf) < 0) {
-      _eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
-      return -1;
+   for (i = 0, j = 0; i < 2 * count; i += 2, j++) {
+      switch (attachments[i]) {
+      case __DRI_BUFFER_BACK_LEFT:
+	 if (get_back_bo(dri2_surf, &dri2_surf->buffers[j]) < 0) {
+	    _eglError(EGL_BAD_ALLOC, "failed to allocate color buffer");
+	    return NULL;
+	 }
+	 break;
+      default:
+	 if (get_aux_bo(dri2_surf, attachments[i], attachments[i + 1],
+			&dri2_surf->buffers[j]) < 0) {
+	    _eglError(EGL_BAD_ALLOC, "failed to allocate aux buffer");
+	    return NULL;
+	 }
+	 break;
+      }
   }

   /* If we have an extra unlocked buffer at this point, we had to do triple
@@ -380,36 +391,6 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
      }
   }

-   return 0;
-}
-
-static __DRIbuffer *
-dri2_get_buffers_with_format(__DRIdrawable * driDrawable,
-			     int *width, int *height,
-			     unsigned int *attachments, int count,
-			     int *out_count, void *loaderPrivate)
-{
-   struct dri2_egl_surface *dri2_surf = loaderPrivate;
-   int i, j;
-
-   if (update_buffers(dri2_surf) < 0)
-      return NULL;
-
-   for (i = 0, j = 0; i < 2 * count; i += 2, j++) {
-      switch (attachments[i]) {
-      case __DRI_BUFFER_BACK_LEFT:
-         back_bo_to_dri_buffer(dri2_surf, &dri2_surf->buffers[j]);
-	 break;
-      default:
-	 if (get_aux_bo(dri2_surf, attachments[i], attachments[i + 1],
-			&dri2_surf->buffers[j]) < 0) {
-	    _eglError(EGL_BAD_ALLOC, "failed to allocate aux buffer");
-	    return NULL;
-	 }
-	 break;
-      }
-   }
-
   *out_count = j;
   if (j == 0)
 	   return NULL;
@@ -453,25 +434,6 @@ dri2_get_buffers(__DRIdrawable * driDrawable,
   return buffer;
 }

-static int
-image_get_buffers(__DRIdrawable *driDrawable,
-                  unsigned int format,
-                  uint32_t *stamp,
-                  void *loaderPrivate,
-                  uint32_t buffer_mask,
-                  struct __DRIimageList *buffers)
-{
-   struct dri2_egl_surface *dri2_surf = loaderPrivate;
-
-   if (update_buffers(dri2_surf) < 0)
-      return 0;
-
-   buffers->image_mask = __DRI_IMAGE_BUFFER_BACK;
-   buffers->back = dri2_surf->back->dri_image;
-
-   return 1;
-}
-
 static void
 dri2_flush_front_buffer(__DRIdrawable * driDrawable, void *loaderPrivate)
 {
@@ -479,12 +441,6 @@ dri2_flush_front_buffer(__DRIdrawable * driDrawable, void *loaderPrivate)
   (void) loaderPrivate;
 }

-static const __DRIimageLoaderExtension image_loader_extension = {
-   { __DRI_IMAGE_LOADER, 1 },
-   image_get_buffers,
-   dri2_flush_front_buffer
-};
-
 static void
 wayland_frame_callback(void *data, struct wl_callback *callback, uint32_t time)
 {
@@ -503,7 +459,7 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
 {
   struct dri2_egl_display *dri2_dpy =
      dri2_egl_display(dri2_surf->base.Resource.Display);
-   int fd, stride, name;
+   int fd;

   if (dri2_surf->current->wl_buffer != NULL)
      return;
@@ -511,8 +467,6 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
   if (dri2_dpy->capabilities & WL_DRM_CAPABILITY_PRIME) {
      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
                                  __DRI_IMAGE_ATTRIB_FD, &fd);
-      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
-                                  __DRI_IMAGE_ATTRIB_STRIDE, &stride);

      dri2_surf->current->wl_buffer =
         wl_drm_create_prime_buffer(dri2_dpy->wl_drm,
@@ -520,22 +474,17 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
                                    dri2_surf->base.Width,
                                    dri2_surf->base.Height,
                                    dri2_surf->format,
-                                    0, stride,
+                                    0, dri2_surf->current->pitch,
                                    0, 0,
                                    0, 0);
      close(fd);
   } else {
-      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
-                                  __DRI_IMAGE_ATTRIB_NAME, &name);
-      dri2_dpy->image->queryImage(dri2_surf->current->dri_image,
-                                  __DRI_IMAGE_ATTRIB_STRIDE, &stride);
-
      dri2_surf->current->wl_buffer =
         wl_drm_create_buffer(dri2_dpy->wl_drm,
-                              name,
+                              dri2_surf->current->name,
                              dri2_surf->base.Width,
                              dri2_surf->base.Height,
-                              stride,
+                              dri2_surf->current->pitch,
                              dri2_surf->format);
   }

@@ -557,8 +506,7 @@ dri2_swap_buffers_with_damage(_EGLDriver *drv,
 {
   struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw);
-   struct dri2_egl_context *dri2_ctx;
-   _EGLContext *ctx;
+   __DRIbuffer buffer;
   int i, ret = 0;

   while (dri2_surf->frame_callback && ret != -1)
@@ -578,7 +526,7 @@ dri2_swap_buffers_with_damage(_EGLDriver *drv,

   /* Make sure we have a back buffer in case we're swapping without ever
    * rendering. */
-   if (get_back_bo(dri2_surf) < 0) {
+   if (get_back_bo(dri2_surf, &buffer) < 0) {
      _eglError(EGL_BAD_ALLOC, "dri2_swap_buffers");
      return EGL_FALSE;
   }
@@ -600,8 +548,8 @@ dri2_swap_buffers_with_damage(_EGLDriver *drv,
   dri2_surf->dy = 0;

   if (n_rects == 0) {
-      wl_surface_damage(dri2_surf->wl_win->surface,
-                        0, 0, INT32_MAX, INT32_MAX);
+      wl_surface_damage(dri2_surf->wl_win->surface, 0, 0,
+                        dri2_surf->base.Width, dri2_surf->base.Height);
   } else {
      for (i = 0; i < n_rects; i++) {
         const int *rect = &rects[i * 4];
@@ -612,21 +560,10 @@ dri2_swap_buffers_with_damage(_EGLDriver *drv,
      }
   }

-   if (dri2_dpy->flush->base.version >= 4) {
-      ctx = _eglGetCurrentContext();
-      dri2_ctx = dri2_egl_context(ctx);
-      (*dri2_dpy->flush->flush_with_flags)(dri2_ctx->dri_context,
-                                           dri2_surf->dri_drawable,
-                                           __DRI2_FLUSH_DRAWABLE,
-                                           __DRI2_THROTTLE_SWAPBUFFER);
-   } else {
-      (*dri2_dpy->flush->flush)(dri2_surf->dri_drawable);
-   }
-
-   (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable);
-
   wl_surface_commit(dri2_surf->wl_win->surface);
-   wl_display_flush(dri2_dpy->wl_dpy);
+
+   (*dri2_dpy->flush->flush)(dri2_surf->dri_drawable);
+   (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable);

   return EGL_TRUE;
 }
@@ -636,8 +573,9 @@ dri2_query_buffer_age(_EGLDriver *drv,
                      _EGLDisplay *disp, _EGLSurface *surface)
 {
   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surface);
+   __DRIbuffer buffer;

-   if (get_back_bo(dri2_surf) < 0) {
+   if (get_back_bo(dri2_surf, &buffer) < 0) {
      _eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
      return 0;
   }
@@ -861,12 +799,11 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp)
   dri2_dpy->dri2_loader_extension.flushFrontBuffer = dri2_flush_front_buffer;
   dri2_dpy->dri2_loader_extension.getBuffersWithFormat =
      dri2_get_buffers_with_format;
-
+      
   dri2_dpy->extensions[0] = &dri2_dpy->dri2_loader_extension.base;
-   dri2_dpy->extensions[1] = &image_loader_extension.base;
-   dri2_dpy->extensions[2] = &image_lookup_extension.base;
-   dri2_dpy->extensions[3] = &use_invalidate.base;
-   dri2_dpy->extensions[4] = NULL;
+   dri2_dpy->extensions[1] = &image_lookup_extension.base;
+   dri2_dpy->extensions[2] = &use_invalidate.base;
+   dri2_dpy->extensions[3] = NULL;

   if (!dri2_create_screen(disp))
      goto cleanup_driver;
--- a/src/gallium/auxiliary/os/os_thread.h
+++ b/src/gallium/auxiliary/os/os_thread.h
@@ -41,7 +41,7 @@
 #include "util/u_debug.h" /* for assert */


-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)

 #include <pthread.h> /* POSIX threads headers */
 #include <stdio.h> /* for perror() */
@@ -316,7 +316,7 @@ typedef int64_t pipe_condvar;
 * pipe_barrier
 */

-#if (defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_HURD)) && !defined(PIPE_OS_ANDROID)
+#if (defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS)) && !defined(PIPE_OS_ANDROID)

 typedef pthread_barrier_t pipe_barrier;

@@ -444,7 +444,7 @@ pipe_semaphore_wait(pipe_semaphore *sema)
 */

 typedef struct {
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
   pthread_key_t key;
 #elif defined(PIPE_SUBSYSTEM_WINDOWS_USER)
   DWORD key;
@@ -459,7 +459,7 @@ typedef struct {
 static INLINE void
 pipe_tsd_init(pipe_tsd *tsd)
 {
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
   if (pthread_key_create(&tsd->key, NULL/*free*/) != 0) {
      perror("pthread_key_create(): failed to allocate key for thread specific data");
      exit(-1);
@@ -476,7 +476,7 @@ pipe_tsd_get(pipe_tsd *tsd)
   if (tsd->initMagic != (int) PIPE_TSD_INIT_MAGIC) {
      pipe_tsd_init(tsd);
   }
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
   return pthread_getspecific(tsd->key);
 #elif defined(PIPE_SUBSYSTEM_WINDOWS_USER)
   assert(0);
@@ -493,7 +493,7 @@ pipe_tsd_set(pipe_tsd *tsd, void *value)
   if (tsd->initMagic != (int) PIPE_TSD_INIT_MAGIC) {
      pipe_tsd_init(tsd);
   }
-#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_HURD)
+#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS) || defined(PIPE_OS_APPLE) || defined(PIPE_OS_HAIKU) || defined(PIPE_OS_CYGWIN)
   if (pthread_setspecific(tsd->key, value) != 0) {
      perror("pthread_set_specific() failed");
      exit(-1);
--- a/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c
+++ b/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c
@@ -88,9 +88,6 @@ find_drm_pci_id(struct pipe_loader_drm_device *ddev)
              &ddev->base.u.pci.chip_id) != 2)
      goto fail;

-   udev_device_unref(device);
-   udev_unref(udev);
-
   return TRUE;

  fail:
--- a/src/gallium/drivers/nouveau/nouveau_buffer.c
+++ b/src/gallium/drivers/nouveau/nouveau_buffer.c
@@ -205,9 +205,6 @@ nouveau_transfer_write(struct nouveau_context *nv, struct nouveau_transfer *tx,
                  base, size / 4, (const uint32_t *)data);
   else
      nv->push_data(nv, buf->bo, buf->offset + base, buf->domain, size, data);
-
-   nouveau_fence_ref(nv->screen->fence.current, &buf->fence);
-   nouveau_fence_ref(nv->screen->fence.current, &buf->fence_wr);
 }


--- a/src/gallium/drivers/nouveau/nouveau_fence.c
+++ b/src/gallium/drivers/nouveau/nouveau_fence.c
@@ -189,15 +189,16 @@ nouveau_fence_wait(struct nouveau_fence *fence)
   /* wtf, someone is waiting on a fence in flush_notify handler? */
   assert(fence->state != NOUVEAU_FENCE_STATE_EMITTING);

-   if (fence->state < NOUVEAU_FENCE_STATE_EMITTED)
+   if (fence->state < NOUVEAU_FENCE_STATE_EMITTED) {
      nouveau_fence_emit(fence);

-   if (fence->state < NOUVEAU_FENCE_STATE_FLUSHED)
+      if (fence == screen->fence.current)
+         nouveau_fence_new(screen, &screen->fence.current, FALSE);
+   }
+   if (fence->state < NOUVEAU_FENCE_STATE_FLUSHED) {
      if (nouveau_pushbuf_kick(screen->pushbuf, screen->pushbuf->channel))
         return FALSE;
-
-   if (fence == screen->fence.current)
-      nouveau_fence_next(screen);
+   }

   do {
      nouveau_fence_update(screen, FALSE);
--- a/src/gallium/drivers/nouveau/nouveau_video.c
+++ b/src/gallium/drivers/nouveau/nouveau_video.c
@@ -519,7 +519,7 @@ nouveau_create_decoder(struct pipe_context *context,
      goto vl;
   if (screen->device->chipset >= 0x98 && screen->device->chipset != 0xa0)
      goto vl;
-   if (screen->device->chipset < 0x40)
+   if (screen->device->chipset < 0x31 || screen->device->chipset == 0x35)
      goto vl;

   dec = CALLOC_STRUCT(nouveau_decoder);
@@ -611,6 +611,7 @@ nouveau_create_decoder(struct pipe_context *context,
   BEGIN_NV04(push, NV31_MPEG(FORMAT), 2);
   PUSH_DATA (push, 0);
   switch (templ->entrypoint) {
+      case PIPE_VIDEO_ENTRYPOINT_BITSTREAM: PUSH_DATA (push, 0x100); break;
      case PIPE_VIDEO_ENTRYPOINT_IDCT: PUSH_DATA (push, 1); break;
      case PIPE_VIDEO_ENTRYPOINT_MC: PUSH_DATA (push, 0); break;
      default: assert(0);
@@ -781,7 +782,7 @@ nouveau_video_buffer_create(struct pipe_context *pipe,
    */
   if (templat->buffer_format != PIPE_FORMAT_NV12 || getenv("XVMC_VL") ||
       (screen->device->chipset >= 0x98 && screen->device->chipset != 0xa0) ||
-       screen->device->chipset < 0x40)
+       screen->device->chipset < 0x31 || screen->device->chipset == 0x35)
      return vl_video_buffer_create(pipe, templat);

   assert(templat->chroma_format == PIPE_VIDEO_CHROMA_FORMAT_420);
@@ -838,8 +839,7 @@ nouveau_screen_get_video_param(struct pipe_screen *pscreen,
 {
   switch (param) {
   case PIPE_VIDEO_CAP_SUPPORTED:
-      return entrypoint >= PIPE_VIDEO_ENTRYPOINT_IDCT &&
-         u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_MPEG12;
+      return vl_profile_supported(pscreen, profile, entrypoint);
   case PIPE_VIDEO_CAP_NPOT_TEXTURES:
      return 1;
   case PIPE_VIDEO_CAP_MAX_WIDTH:
--- a/src/gallium/drivers/nouveau/nouveau_vp3_video.c
+++ b/src/gallium/drivers/nouveau/nouveau_vp3_video.c
@@ -362,7 +362,12 @@ nouveau_vp3_screen_get_video_param(struct pipe_screen *pscreen,
   enum pipe_video_format codec = u_reduce_video_profile(profile);
   switch (param) {
   case PIPE_VIDEO_CAP_SUPPORTED:
-      /* VP3 does not support MPEG4, VP4+ do. */
+      /* For now, h264 and mpeg4 don't work on pre-nvc0. */
+      if (chipset < 0xc0)
+         return codec == PIPE_VIDEO_FORMAT_MPEG12 ||
+            codec == PIPE_VIDEO_FORMAT_VC1;
+      /* In the general case, this should work, once the pre-nvc0 problems are
+       * resolved. */
      return profile >= PIPE_VIDEO_PROFILE_MPEG1 && (
            !vp3 || codec != PIPE_VIDEO_FORMAT_MPEG4);
   case PIPE_VIDEO_CAP_NPOT_TEXTURES:
--- a/src/gallium/drivers/nouveau/nouveau_vp3_video_vp.c
+++ b/src/gallium/drivers/nouveau/nouveau_vp3_video_vp.c
@@ -114,21 +114,21 @@ struct h264_picparm_vp { // 700..a00
 	uint32_t stride1, stride2; // 04 08
 	uint32_t ofs[6]; // 0c..24 in-image offset

-	uint32_t tmp_stride;
+	uint32_t u24; // nfi ac8 ?
 	uint32_t bucket_size; // 28 bucket size
 	uint32_t inter_ring_data_size; // 2c

-	unsigned mb_adaptive_frame_field_flag : 1; // 0
-	unsigned direct_8x8_inference_flag : 1; // 1 0x02: into vuc ofs 56
+	unsigned f0 : 1; // 0 0x01: into 640 shifted by 3, 540 shifted by 5, half size something?
+	unsigned f1 : 1; // 1 0x02: into vuc ofs 56
 	unsigned weighted_pred_flag : 1; // 2 0x04
-	unsigned constrained_intra_pred_flag : 1; // 3 0x08: into vuc ofs 68
+	unsigned f3 : 1; // 3 0x08: into vuc ofs 68
 	unsigned is_reference : 1; // 4
 	unsigned interlace : 1; // 5 field_pic_flag
 	unsigned bottom_field_flag : 1; // 6
-	unsigned second_field : 1; // 7 0x80: nfi yet
+	unsigned f7 : 1; // 7 0x80: nfi yet

 	signed log2_max_frame_num_minus4 : 4; // 31 0..3
-	unsigned chroma_format_idc : 2; // 31 4..5
+	unsigned u31_45 : 2; // 31 4..5
 	unsigned pic_order_cnt_type : 2; // 31 6..7
 	signed pic_init_qp_minus26 : 6; // 32 0..5
 	signed chroma_qp_index_offset : 5; // 32 6..10
@@ -144,15 +144,17 @@ struct h264_picparm_vp { // 700..a00
 	uint32_t field_order_cnt[2]; // 38, 3c

 	struct { // 40
+		// 0x00223102
+		// nfi (needs: top_is_reference, bottom_is_reference, is_long_term, maybe some other state that was saved..
 		unsigned fifo_idx : 7; // 00 0..6
 		unsigned tmp_idx : 5; // 00 7..11
-		unsigned top_is_reference : 1; // 00 12
-		unsigned bottom_is_reference : 1; // 00 13
-		unsigned is_long_term : 1; // 00 14
+		unsigned unk12 : 1; // 00 12 not seen yet, but set, maybe top_is_reference
+		unsigned unk13 : 1; // 00 13 not seen yet, but set, maybe bottom_is_reference?
+		unsigned unk14 : 1; // 00 14 skipped?
 		unsigned notseenyet : 1; // 00 15 pad?
-		unsigned field_pic_flag : 1; // 00 16
-		unsigned top_field_marking : 4; // 00 17..20
-		unsigned bottom_field_marking : 4; // 00 21..24
+		unsigned unk16 : 1; // 00 16
+		unsigned unk17 : 4; // 00 17..20
+		unsigned unk21 : 4; // 00 21..24
 		unsigned pad : 7; // 00 d25..31

 		uint32_t field_order_cnt[2]; // 04,08
@@ -333,21 +335,21 @@ nouveau_vp3_fill_picparm_h264_vp(struct nouveau_vp3_decoder *dec,
   nouveau_vp3_ycbcr_offsets(dec, &h->ofs[1], &h->ofs[3], &h->ofs[4]);
   h->ofs[5] = h->ofs[3];
   h->ofs[0] = h->ofs[2] = 0;
-   h->tmp_stride = dec->tmp_stride >> 8;
-   assert(h->tmp_stride);
+   h->u24 = dec->tmp_stride >> 8;
+   assert(h->u24);
   nouveau_vp3_inter_sizes(dec, 1, &ring, &h->bucket_size, &h->inter_ring_data_size);

   h->u220 = 0;
-   h->mb_adaptive_frame_field_flag = d->pps->sps->mb_adaptive_frame_field_flag;
-   h->direct_8x8_inference_flag = d->pps->sps->direct_8x8_inference_flag;
+   h->f0 = d->pps->sps->mb_adaptive_frame_field_flag;
+   h->f1 = d->pps->sps->direct_8x8_inference_flag;
   h->weighted_pred_flag = d->pps->weighted_pred_flag;
-   h->constrained_intra_pred_flag = d->pps->constrained_intra_pred_flag;
+   h->f3 = d->pps->constrained_intra_pred_flag;
   h->is_reference = d->is_reference;
   h->interlace = d->field_pic_flag;
   h->bottom_field_flag = d->bottom_field_flag;
-   h->second_field = 0; // TODO: figure out when set..
+   h->f7 = 0; // TODO: figure out when set..
   h->log2_max_frame_num_minus4 = d->pps->sps->log2_max_frame_num_minus4;
-   h->chroma_format_idc = 1;
+   h->u31_45 = 1;

   h->pic_order_cnt_type = d->pps->sps->pic_order_cnt_type;
   h->pic_init_qp_minus26 = d->pps->pic_init_qp_minus26;
@@ -374,19 +376,18 @@ nouveau_vp3_fill_picparm_h264_vp(struct nouveau_vp3_decoder *dec,
      h->refs[j].field_order_cnt[1] = d->field_order_cnt_list[i][1];
      h->refs[j].frame_idx = d->frame_num_list[i];
      if (!dec->refs[refs[j]->valid_ref].field_pic_flag) {
-         h->refs[j].top_is_reference = d->top_is_reference[i];
-         h->refs[j].bottom_is_reference = d->bottom_is_reference[i];
+         h->refs[j].unk12 = d->top_is_reference[i];
+         h->refs[j].unk13 = d->bottom_is_reference[i];
      }
-      h->refs[j].is_long_term = d->is_long_term[i];
+      h->refs[j].unk14 = 0;
      h->refs[j].notseenyet = 0;
-      h->refs[j].field_pic_flag = dec->refs[refs[j]->valid_ref].field_pic_flag;
-      h->refs[j].top_field_marking =
-         dec->refs[refs[j]->valid_ref].decoded_top && d->top_is_reference[i] ?
-         1 + d->is_long_term[i] : 0;
-      h->refs[j].bottom_field_marking =
-         dec->refs[refs[j]->valid_ref].decoded_bottom && d->bottom_is_reference[i] ?
-         1 + d->is_long_term[i] : 0;
+      h->refs[j].unk16 = dec->refs[refs[j]->valid_ref].field_pic_flag;
+      h->refs[j].unk17 = dec->refs[refs[j]->valid_ref].decoded_top &&
+                         d->top_is_reference[i];
+      h->refs[j].unk21 = dec->refs[refs[j]->valid_ref].decoded_bottom &&
+                         d->bottom_is_reference[i];
      h->refs[j].pad = 0;
+      assert(!d->is_long_term[i]);
      j++;
   }
   for (; i < 16; ++i)
@@ -394,7 +395,7 @@ nouveau_vp3_fill_picparm_h264_vp(struct nouveau_vp3_decoder *dec,
   assert(d->num_ref_frames <= dec->base.max_references);

   for (; i < d->num_ref_frames; ++i)
-      h->refs[j].field_pic_flag = d->field_pic_flag;
+      h->refs[j].unk16 = d->field_pic_flag;
   *(struct h264_picparm_vp *)map = *h;

   return 0x1113;
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -224,7 +224,7 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
   case PIPE_SHADER_CAP_MAX_INPUTS:
      if (shader == PIPE_SHADER_VERTEX)
         return 32;
-      return 15;
+      return 0x300 / 16;
   case PIPE_SHADER_CAP_MAX_CONSTS:
      return 65536 / 16;
   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
--- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
@@ -61,7 +61,7 @@ nv50_validate_fb(struct nv50_context *nv50)
      if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
         nv50->state.rt_serialize = TRUE;
      mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
-      mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
+      mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING;

      /* only register for writing, otherwise we'd always serialize here */
      BCTX_REFN(nv50->bufctx_3d, FB, &mt->base, WR);
@@ -91,7 +91,7 @@ nv50_validate_fb(struct nv50_context *nv50)
      if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
         nv50->state.rt_serialize = TRUE;
      mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
-      mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
+      mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING;

      BCTX_REFN(nv50->bufctx_3d, FB, &mt->base, WR);
   } else {
--- a/src/gallium/drivers/nouveau/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
@@ -271,7 +271,7 @@ nv50_validate_tic(struct nv50_context *nv50, int s)

      nv50->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);

-      res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
+      res->status &= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
      res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;

      BCTX_REFN(nv50->bufctx_3d, TEXTURES, res, RD);
--- a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
@@ -597,15 +597,6 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten,

      assert(nouveau_resource_mapped_by_gpu(nv50->idxbuf.buffer));

-      /* This shouldn't have to be here. The going theory is that the buffer
-       * is being filled in by PGRAPH, and it's not done yet by the time it
-       * gets submitted to PFIFO, which in turn starts immediately prefetching
-       * the not-yet-written data. Ideally this wait would only happen on
-       * pushbuf submit, but it's probably not a big performance difference.
-       */
-      if (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr))
-         nouveau_fence_wait(buf->fence_wr);
-
      while (instance_count--) {
         BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
         PUSH_DATA (push, prim);
--- a/src/gallium/drivers/nouveau/nv50/nv98_video.c
+++ b/src/gallium/drivers/nouveau/nv50/nv98_video.c
@@ -64,6 +64,10 @@ nv98_create_decoder(struct pipe_context *context,
   struct nouveau_vp3_decoder *dec;
   struct nouveau_pushbuf **push;
   struct nv04_fifo nv04_data = {.vram = 0xbeef0201, .gart = 0xbeef0202};
+   union nouveau_bo_config cfg;
+
+   cfg.nv50.tile_mode = 0x20;
+   cfg.nv50.memtype = 0x70;

   int ret, i;
   uint32_t codec = 1, ppp_codec = 3;
@@ -196,7 +200,7 @@ nv98_create_decoder(struct pipe_context *context,
   dec->ref_stride = mb(templ->width)*16 * (mb_half(templ->height)*32 + nouveau_vp3_video_align(templ->height)/2);
   ret = nouveau_bo_new(screen->device, NOUVEAU_BO_VRAM, 0,
                        dec->ref_stride * (templ->max_references+2) + tmp_size,
-                        NULL, &dec->ref_bo);
+                        &cfg, &dec->ref_bo);
   if (ret)
      goto fail;

--- a/src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c
+++ b/src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c
@@ -79,13 +79,14 @@ static void test_runner_rc_regalloc(

 static void tex_1d_swizzle(struct test_result *result)
 {
-	struct r300_fragment_program_compiler c;
+	struct radeon_compiler c;

-	memset(&c, 0, sizeof(c));
-	init_compiler(&c.Base, RC_FRAGMENT_PROGRAM, 0, 0);
-	c.AllocateHwInputs = dummy_allocate_hw_inputs;
+	init_compiler(&c, RC_FRAGMENT_PROGRAM, 0, 0);
+	struct r300_fragment_program_compiler *cc =
+		(struct r300_fragment_program_compiler*)&c;
+	cc->AllocateHwInputs = dummy_allocate_hw_inputs;

-	test_runner_rc_regalloc(result, &c.Base, "regalloc_tex_1d_swizzle.test");
+	test_runner_rc_regalloc(result, &c, "regalloc_tex_1d_swizzle.test");
 }

 unsigned radeon_compiler_regalloc_run_tests()
--- a/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
+++ b/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
@@ -542,7 +542,6 @@ unsigned load_program(
 	char **string_store;
 	unsigned i = 0;

-	memset(line, 0, sizeof(line));
 	snprintf(path, MAX_PATH_LENGTH, "compiler/tests/%s", filename);
 	file = fopen(path, "r");
 	if (!file) {
@@ -553,8 +552,7 @@ unsigned load_program(
 	count = &test->num_input_lines;

 	while (fgets(line, MAX_LINE_LENGTH, file)){
-		char last_char = line[MAX_LINE_LENGTH - 1];
-		if (last_char && last_char != '\n') {
+		if (line[MAX_LINE_LENGTH - 2] == '\n') {
 			fprintf(stderr, "Error line cannot be longer than 100 "
 				"characters:\n%s\n", line);
 			return 0;
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -474,10 +474,6 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
 	r600_flush_emit(ctx);
 	ctx->b.flags = 0;

-	if (ctx->b.chip_class >= CAYMAN) {
-		ctx->skip_surface_sync_on_next_cs_flush = true;
-	}
-
 #if 0
 	COMPUTE_DBG(ctx->screen, "cdw: %i\n", cs->cdw);
 	for (i = 0; i < cs->cdw; i++) {
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -619,36 +619,6 @@ void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsig
 	}
 }

-/**
- * Global buffers are not really resources, they are are actually offsets
- * into a single global resource (r600_screen::global_pool).  The means
- * they don't have their own cs_buf handle, so they cannot be passed
- * to r600_copy_buffer() and must be handled separately.
- *
- * XXX: It should be possible to implement this function using
- * r600_copy_buffer() by passing the memory_pool resource as both src
- * and dst and updating dstx and src_box to point to the correct offsets.
- * This would likely perform better than the current implementation.
- */
-static void r600_copy_global_buffer(struct pipe_context *ctx,
-				    struct pipe_resource *dst, unsigned
-				    dstx, struct pipe_resource *src,
-				    const struct pipe_box *src_box)
-{
-	struct pipe_box dst_box; struct pipe_transfer *src_pxfer,
-	*dst_pxfer;
-
-	u_box_1d(dstx, src_box->width, &dst_box);
-	void *src_ptr = ctx->transfer_map(ctx, src, 0, PIPE_TRANSFER_READ,
-					  src_box, &src_pxfer);
-	void *dst_ptr = ctx->transfer_map(ctx, dst, 0, PIPE_TRANSFER_WRITE,
-					  &dst_box, &dst_pxfer);
-	memcpy(dst_ptr, src_ptr, src_box->width);
-
-	ctx->transfer_unmap(ctx, src_pxfer);
-	ctx->transfer_unmap(ctx, dst_pxfer);
-}
-
 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
 			      unsigned offset, unsigned size, unsigned value)
 {
@@ -701,12 +671,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx,

 	/* Handle buffers first. */
 	if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
-		if ((src->bind & PIPE_BIND_GLOBAL) ||
-					(dst->bind & PIPE_BIND_GLOBAL)) {
-			r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
-		} else {
-			r600_copy_buffer(ctx, dst, dstx, src, src_box);
-		}
+		r600_copy_buffer(ctx, dst, dstx, src, src_box);
 		return;
 	}

--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -293,7 +293,7 @@ void r600_flush_emit(struct r600_context *rctx)
 				S_0085F0_SMX_ACTION_ENA(1);
 	}

-	if (cp_coher_cntl && !rctx->skip_surface_sync_on_next_cs_flush) {
+	if (cp_coher_cntl) {
 		cs->buf[cs->cdw++] = PKT3(PKT3_SURFACE_SYNC, 3, 0);
 		cs->buf[cs->cdw++] = cp_coher_cntl;   /* CP_COHER_CNTL */
 		cs->buf[cs->cdw++] = 0xffffffff;      /* CP_COHER_SIZE */
@@ -354,8 +354,6 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags)

 	/* Flush the CS. */
 	ctx->b.ws->cs_flush(ctx->b.rings.gfx.cs, flags, ctx->screen->cs_count++);
-
-	ctx->skip_surface_sync_on_next_cs_flush = false;
 }

 void r600_begin_new_cs(struct r600_context *ctx)
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -712,7 +712,6 @@ unsigned r600_llvm_compile(
 	const char * gpu_family = r600_llvm_gpu_string(family);
 	unsigned i;

-	memset(&binary, 0, sizeof(struct radeon_llvm_binary));
 	r = radeon_llvm_compile(mod, &binary, gpu_family, dump);

 	assert(binary.code_size % 4 == 0);
@@ -745,9 +744,6 @@ unsigned r600_llvm_compile(
 		}
 	}

-	FREE(binary.code);
-	FREE(binary.config);
-
 	return r;
 }

--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -507,16 +507,6 @@ struct r600_context {

 	void				*sb_context;
 	struct r600_isa		*isa;
-
-	/* Work-around for flushing problems with compute shaders on Cayman:
-	 * Emitting a SURFACE_SYNC packet with any of the CB*_DEST_BASE_ENA
-	 * or DB_DEST_BASE_ENA bits set after dispatching a compute shader
-	 * hangs the GPU.
-	 *
-	 * Setting this to true will prevent r600_flush_emit() from emitting
-	 * a SURFACE_SYNC packet.  This field will be cleared by
-	 * by r600_context_flush() after flushing the command stream. */
-	boolean				skip_surface_sync_on_next_cs_flush;
 };

 static INLINE void r600_emit_command_buffer(struct radeon_winsys_cs *cs,
--- a/src/gallium/drivers/r600/sb/sb_bc.h
+++ b/src/gallium/drivers/r600/sb/sb_bc.h
@@ -614,10 +614,6 @@ public:
 	unsigned num_slots;
 	bool uses_mova_gpr;

-	bool stack_workaround_8xx;
-	bool stack_workaround_9xx;
-
-	unsigned wavefront_size;
 	unsigned stack_entry_size;

 	static unsigned dump_pass;
@@ -642,23 +638,6 @@ public:
 	bool is_cayman() {return hw_class == HW_CLASS_CAYMAN;}
 	bool is_egcm() {return hw_class >= HW_CLASS_EVERGREEN;}

-	bool needs_8xx_stack_workaround() {
-		if (!is_evergreen())
-			return false;
-
-		switch (hw_chip) {
-		case HW_CHIP_CYPRESS:
-		case HW_CHIP_JUNIPER:
-			return false;
-		default:
-			return true;
-		}
-	}
-
-	bool needs_9xx_stack_workaround() {
-		return is_cayman();
-	}
-
 	sb_hw_class_bits hw_class_bit() {
 		switch (hw_class) {
 		case HW_CLASS_R600:return HB_R6;
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -40,9 +40,8 @@ namespace r600_sb {

 int bc_finalizer::run() {

-	run_on(sh.root);
-
 	regions_vec &rv = sh.get_regions();
+
 	for (regions_vec::reverse_iterator I = rv.rbegin(), E = rv.rend(); I != E;
 			++I) {
 		region_node *r = *I;
@@ -59,6 +58,8 @@ int bc_finalizer::run() {
 		r->expand();
 	}

+	run_on(sh.root);
+
 	cf_peephole();

 	// workaround for some problems on r6xx/7xx
@@ -212,36 +213,18 @@ void bc_finalizer::run_on(container_node* c) {
 		if (n->is_alu_group()) {
 			finalize_alu_group(static_cast<alu_group_node*>(n));
 		} else {
-			if (n->is_alu_clause()) {
-				cf_node *c = static_cast<cf_node*>(n);
-
-				if (c->bc.op == CF_OP_ALU_PUSH_BEFORE && ctx.is_egcm()) {
-					if (ctx.stack_workaround_8xx) {
-						region_node *r = c->get_parent_region();
-						if (r) {
-							unsigned ifs, loops;
-							unsigned elems = get_stack_depth(r, loops, ifs);
-							unsigned dmod1 = elems % ctx.stack_entry_size;
-							unsigned dmod2 = (elems + 1) % ctx.stack_entry_size;
-
-							if (elems && (!dmod1 || !dmod2))
-								c->flags |= NF_ALU_STACK_WORKAROUND;
-						}
-					} else if (ctx.stack_workaround_9xx) {
-						region_node *r = c->get_parent_region();
-						if (r) {
-							unsigned ifs, loops;
-							get_stack_depth(r, loops, ifs);
-							if (loops >= 2)
-								c->flags |= NF_ALU_STACK_WORKAROUND;
-						}
-					}
-				}
-			} else if (n->is_fetch_inst()) {
+			if (n->is_fetch_inst()) {
 				finalize_fetch(static_cast<fetch_node*>(n));
 			} else if (n->is_cf_inst()) {
 				finalize_cf(static_cast<cf_node*>(n));
+			} else if (n->is_alu_clause()) {
+
+			} else if (n->is_fetch_clause()) {
+
+			} else {
+				assert(!"unexpected node");
 			}
+
 			if (n->is_container())
 				run_on(static_cast<container_node*>(n));
 		}
@@ -595,6 +578,10 @@ void bc_finalizer::finalize_cf(cf_node* c) {

 	unsigned flags = c->bc.op_ptr->flags;

+	if (flags & CF_CALL) {
+		update_nstack(c->get_parent_region(), ctx.is_cayman() ? 1 : 2);
+	}
+
 	c->bc.end_of_program = 0;
 	last_cf = c;

@@ -728,8 +715,17 @@ void bc_finalizer::finalize_cf(cf_node* c) {

 			c->bc.index_gpr = reg >= 0 ? reg : 0;
 		}
-	} else if (flags & CF_CALL) {
-		update_nstack(c->get_parent_region(), ctx.wavefront_size == 16 ? 2 : 1);
+
+
+
+	} else {
+
+#if 0
+		if ((flags & (CF_BRANCH | CF_LOOP)) && !sh.uses_gradients) {
+			c->bc.valid_pixel_mode = 1;
+		}
+#endif
+
 	}
 }

@@ -767,78 +763,37 @@ void bc_finalizer::update_ngpr(unsigned gpr) {
 		ngpr = gpr + 1;
 }

-unsigned bc_finalizer::get_stack_depth(node *n, unsigned &loops,
-                                           unsigned &ifs, unsigned add) {
-	unsigned stack_elements = add;
-	bool has_non_wqm_push_with_loops_on_stack = false;
-	bool has_non_wqm_push = (add != 0);
-	region_node *r = n->is_region() ?
-			static_cast<region_node*>(n) : n->get_parent_region();
-
-	loops = 0;
-	ifs = 0;
-
-	while (r) {
-		if (r->is_loop()) {
-			++loops;
-			if (has_non_wqm_push)
-				has_non_wqm_push_with_loops_on_stack = true;
-		} else {
-			++ifs;
-			has_non_wqm_push = true;
-		}
-		r = r->get_parent_region();
-	}
-	stack_elements += (loops * ctx.stack_entry_size) + ifs;
-
-	// reserve additional elements in some cases
-	switch (ctx.hw_class) {
-	case HW_CLASS_R600:
-	case HW_CLASS_R700:
-		if (has_non_wqm_push)
-			stack_elements += 2;
-		break;
-	case HW_CLASS_CAYMAN:
-		if (stack_elements)
-			stack_elements += 2;
-		break;
-	case HW_CLASS_EVERGREEN:
-		if (has_non_wqm_push_with_loops_on_stack)
-			++stack_elements;
-		break;
-	}
-	return stack_elements;
-}
-
 void bc_finalizer::update_nstack(region_node* r, unsigned add) {
 	unsigned loops = 0;
 	unsigned ifs = 0;
-	unsigned elems = r ? get_stack_depth(r, loops, ifs, add) : add;

-	// XXX all chips expect this value to be computed using 4 as entry size,
-	// not the real entry size
-	unsigned stack_entries = (elems + 3) >> 2;
+	while (r) {
+		if (r->is_loop())
+			++loops;
+		else
+			++ifs;
+
+		r = r->get_parent_region();
+	}
+
+	unsigned stack_elements = (loops * ctx.stack_entry_size) + ifs + add;
+
+	// FIXME calculate more precisely
+	if (ctx.is_evergreen()) {
+		++stack_elements;
+	} else {
+		stack_elements += 2;
+		if (ctx.is_cayman())
+			++stack_elements;
+	}
+
+	unsigned stack_entries = (stack_elements + 3) >> 2;

 	if (nstack < stack_entries)
 		nstack = stack_entries;
 }

 void bc_finalizer::cf_peephole() {
-	if (ctx.stack_workaround_8xx || ctx.stack_workaround_9xx) {
-		for (node_iterator N, I = sh.root->begin(), E = sh.root->end(); I != E;
-				I = N) {
-			N = I; ++N;
-			cf_node *c = static_cast<cf_node*>(*I);
-
-			if (c->bc.op == CF_OP_ALU_PUSH_BEFORE &&
-					(c->flags & NF_ALU_STACK_WORKAROUND)) {
-				cf_node *push = sh.create_cf(CF_OP_PUSH);
-				c->insert_before(push);
-				push->jump(c);
-				c->bc.set_op(CF_OP_ALU);
-			}
-		}
-	}

 	for (node_iterator N, I = sh.root->begin(), E = sh.root->end(); I != E;
 			I = N) {
--- a/src/gallium/drivers/r600/sb/sb_context.cpp
+++ b/src/gallium/drivers/r600/sb/sb_context.cpp
@@ -66,27 +66,20 @@ int sb_context::init(r600_isa *isa, sb_hw_chip chip, sb_hw_class cclass) {
 	case HW_CHIP_RS780:
 	case HW_CHIP_RV620:
 	case HW_CHIP_RS880:
-		wavefront_size = 16;
-		stack_entry_size = 8;
-		break;
+
 	case HW_CHIP_RV630:
 	case HW_CHIP_RV635:
 	case HW_CHIP_RV730:
 	case HW_CHIP_RV710:
 	case HW_CHIP_PALM:
 	case HW_CHIP_CEDAR:
-		wavefront_size = 32;
 		stack_entry_size = 8;
 		break;
 	default:
-		wavefront_size = 64;
 		stack_entry_size = 4;
 		break;
 	}

-	stack_workaround_8xx = needs_8xx_stack_workaround();
-	stack_workaround_9xx = needs_9xx_stack_workaround();
-
 	return 0;
 }

--- a/src/gallium/drivers/r600/sb/sb_ir.h
+++ b/src/gallium/drivers/r600/sb/sb_ir.h
@@ -700,10 +700,7 @@ enum node_flags {
 	NF_DONT_MOVE = (1 << 8),

 	// for KILLxx - we want to schedule them as early as possible
-	NF_SCHEDULE_EARLY = (1 << 9),
-
-	// for ALU_PUSH_BEFORE - when set, replace with PUSH + ALU
-	NF_ALU_STACK_WORKAROUND = (1 << 10)
+	NF_SCHEDULE_EARLY = (1 << 9)
 };

 inline node_flags operator |(node_flags l, node_flags r) {
--- a/src/gallium/drivers/r600/sb/sb_pass.h
+++ b/src/gallium/drivers/r600/sb/sb_pass.h
@@ -708,9 +708,6 @@ public:
 	void update_ngpr(unsigned gpr);
 	void update_nstack(region_node *r, unsigned add = 0);

-	unsigned get_stack_depth(node *n, unsigned &loops, unsigned &ifs,
-	                         unsigned add = 0);
-
 	void cf_peephole();

 };
--- a/src/gallium/drivers/radeon/radeon_llvm_emit.c
+++ b/src/gallium/drivers/radeon/radeon_llvm_emit.c
@@ -173,10 +173,6 @@ unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_llvm_binary *binary,
 		}
 	}

-	if (elf){
-		elf_end(elf);
-	}
-	FREE(elf_buffer);
 	LLVMDisposeMemoryBuffer(out_buffer);
 	LLVMDisposeTargetMachine(tm);
 	return 0;
--- a/src/gallium/drivers/radeon/radeon_llvm_util.c
+++ b/src/gallium/drivers/radeon/radeon_llvm_util.c
@@ -30,7 +30,6 @@
 #include <llvm-c/BitReader.h>
 #include <llvm-c/Core.h>
 #include <llvm-c/Target.h>
-#include <llvm-c/Transforms/IPO.h>
 #include <llvm-c/Transforms/PassManagerBuilder.h>

 LLVMModuleRef radeon_llvm_parse_bitcode(const unsigned char * bitcode,
@@ -43,7 +42,6 @@ LLVMModuleRef radeon_llvm_parse_bitcode(const unsigned char * bitcode,
 	buf = LLVMCreateMemoryBufferWithMemoryRangeCopy((const char*)bitcode,
 							bitcode_len, "radeon");
 	LLVMParseBitcodeInContext(ctx, buf, &module, NULL);
-	LLVMDisposeMemoryBuffer(buf);
 	return module;
 }

@@ -60,26 +58,9 @@ static void radeon_llvm_optimize(LLVMModuleRef mod)
 	LLVMTargetDataRef TD = LLVMCreateTargetData(data_layout);
 	LLVMPassManagerBuilderRef builder = LLVMPassManagerBuilderCreate();
 	LLVMPassManagerRef pass_manager = LLVMCreatePassManager();
-
-	/* Functions calls are not supported yet, so we need to inline
-	 * everything.  The most efficient way to do this is to add
-	 * the always_inline attribute to all non-kernel functions
-	 * and then run the Always Inline pass.  The Always Inline
-	 * pass will automaically inline functions with this attribute
-	 * and does not perform the expensive cost analysis that the normal
-	 * inliner does.
-	 */
-
-	LLVMValueRef fn;
-	for (fn = LLVMGetFirstFunction(mod); fn; fn = LLVMGetNextFunction(fn)) {
-		/* All the non-kernel functions have internal linkage */
-		if (LLVMGetLinkage(fn) == LLVMInternalLinkage) {
-			LLVMAddFunctionAttr(fn, LLVMAlwaysInlineAttribute);
-		}
-	}
-
 	LLVMAddTargetData(TD, pass_manager);
-	LLVMAddAlwaysInlinerPass(pass_manager);
+
+	LLVMPassManagerBuilderUseInlinerWithThreshold(builder, 1000000000);
 	LLVMPassManagerBuilderPopulateModulePassManager(builder, pass_manager);

 	LLVMRunPassManager(pass_manager, mod);
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -1379,7 +1379,7 @@ void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx)
 	LLVMAddAggressiveDCEPass(gallivm->passmgr);
 	LLVMAddCFGSimplificationPass(gallivm->passmgr);

-	/* Run the pass */
+	/* Run the passs */
 	LLVMRunFunctionPassManager(gallivm->passmgr, ctx->main_fn);

 	LLVMDisposeBuilder(gallivm->builder);
--- a/src/gallium/drivers/radeonsi/radeonsi_compute.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_compute.c
@@ -49,7 +49,6 @@ static void *radeonsi_create_compute_state(
 		LLVMModuleRef mod = radeon_llvm_get_kernel_module(i, code,
 							header->num_bytes);
 		si_compile_llvm(rctx, &program->kernels[i], mod);
-		LLVMDisposeModule(mod);
 	}

 	return program;
@@ -103,7 +102,6 @@ static void radeonsi_launch_grid(
 	unsigned arg_user_sgpr_count = 2;
 	unsigned i;
 	struct si_pipe_shader *shader = &program->kernels[pc];
-	unsigned lds_blocks;

 	pm4->compute_pkt = true;
 	si_cmd_context_control(pm4);
@@ -163,18 +161,9 @@ static void radeonsi_launch_grid(
 		si_pm4_add_bo(pm4, buffer, RADEON_USAGE_READWRITE);
 	}

-	/* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID
-	 * and is now per pipe, so it should be handled in the
-	 * kernel if we want to use something other than the default value,
-	 * which is now 0x22f.
-	 */
-	if (rctx->b.chip_class <= SI) {
-		/* XXX: This should be:
-		 * (number of compute units) * 4 * (waves per simd) - 1 */
-
-		si_pm4_set_reg(pm4, R_00B82C_COMPUTE_MAX_WAVE_ID,
-						0x190 /* Default value */);
-	}
+	/* XXX: This should be:
+	 * (number of compute units) * 4 * (waves per simd) - 1 */
+	si_pm4_set_reg(pm4, R_00B82C_COMPUTE_MAX_WAVE_ID, 0x190 /* Default value */);

 	shader_va = r600_resource_va(ctx->screen, (void *)shader->bo);
 	si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ);
@@ -195,20 +184,6 @@ static void radeonsi_launch_grid(
 		                        shader->num_sgprs)) - 1) / 8))
 		;

-	lds_blocks = shader->lds_size;
-	/* XXX: We are over allocating LDS.  For SI, the shader reports LDS in
-	 * blocks of 256 bytes, so if there are 4 bytes lds allocated in
-	 * the shader and 4 bytes allocated by the state tracker, then
-	 * we will set LDS_SIZE to 512 bytes rather than 256.
-	 */
-	if (rctx->b.chip_class <= SI) {
-		lds_blocks += align(program->local_size, 256) >> 8;
-	} else {
-		lds_blocks += align(program->local_size, 512) >> 9;
-	}
-
-	assert(lds_blocks <= 0xFF);
-
 	si_pm4_set_reg(pm4, R_00B84C_COMPUTE_PGM_RSRC2,
 		S_00B84C_SCRATCH_EN(0)
 		| S_00B84C_USER_SGPR(arg_user_sgpr_count)
@@ -217,7 +192,7 @@ static void radeonsi_launch_grid(
 		| S_00B84C_TGID_Z_EN(1)
 		| S_00B84C_TG_SIZE_EN(1)
 		| S_00B84C_TIDIG_COMP_CNT(2)
-		| S_00B84C_LDS_SIZE(lds_blocks)
+		| S_00B84C_LDS_SIZE(shader->lds_size)
 		| S_00B84C_EXCP_EN(0))
 		;
 	si_pm4_set_reg(pm4, R_00B854_COMPUTE_RESOURCE_LIMITS, 0);
@@ -261,21 +236,7 @@ static void radeonsi_launch_grid(
 }


-static void si_delete_compute_state(struct pipe_context *ctx, void* state){
-	struct si_pipe_compute *program = (struct si_pipe_compute *)state;
-
-	if (!state) {
-		return;
-	}
-
-	if (program->kernels) {
-		FREE(program->kernels);
-	}
-
-	//And then free the program itself.
-	FREE(program);
-}
-
+static void si_delete_compute_state(struct pipe_context *ctx, void* state){}
 static void si_set_compute_resources(struct pipe_context * ctx_,
 		unsigned start, unsigned count,
 		struct pipe_surface ** surfaces) { }
--- a/src/gallium/drivers/svga/svga_draw_elements.c
+++ b/src/gallium/drivers/svga/svga_draw_elements.c
@@ -24,7 +24,6 @@
 **********************************************************/

 #include "util/u_inlines.h"
-#include "util/u_prim.h"
 #include "indices/u_indices.h"

 #include "svga_cmd.h"
@@ -38,25 +37,17 @@

 static enum pipe_error
 translate_indices(struct svga_hwtnl *hwtnl, struct pipe_resource *src,
-                  unsigned offset, unsigned prim, unsigned nr,
-                  unsigned index_size,
+                  unsigned offset, unsigned nr, unsigned index_size,
                  u_translate_func translate, struct pipe_resource **out_buf)
 {
   struct pipe_context *pipe = &hwtnl->svga->pipe;
   struct pipe_transfer *src_transfer = NULL;
   struct pipe_transfer *dst_transfer = NULL;
-   unsigned size;
+   unsigned size = index_size * nr;
   const void *src_map = NULL;
   struct pipe_resource *dst = NULL;
   void *dst_map = NULL;

-   /* Need to trim vertex count to make sure we don't write too much data
-    * to the dst buffer in the translate() call.
-    */
-   u_trim_pipe_prim(prim, &nr);
-
-   size = index_size * nr;
-
   dst = pipe_buffer_create(pipe->screen,
                            PIPE_BIND_INDEX_BUFFER, PIPE_USAGE_STATIC, size);
   if (dst == NULL)
@@ -189,7 +180,7 @@ svga_hwtnl_draw_range_elements(struct svga_hwtnl *hwtnl,
      ret = translate_indices(hwtnl,
                              index_buffer,
                              start * index_size,
-                              gen_prim, gen_nr, gen_size, gen_func, &gen_buf);
+                              gen_nr, gen_size, gen_func, &gen_buf);
      if (ret != PIPE_OK)
         goto done;

--- a/src/gallium/drivers/svga/svga_pipe_blit.c
+++ b/src/gallium/drivers/svga/svga_pipe_blit.c
@@ -148,8 +148,6 @@ static void svga_surface_copy(struct pipe_context *pipe,

 #endif

-   /* Mark the destination image as being defined */
-   svga_define_texture_level(dtex, dst_face, dst_level);
 }


--- a/src/gallium/state_trackers/clover/api/context.cpp
+++ b/src/gallium/state_trackers/clover/api/context.cpp
@@ -61,24 +61,18 @@ clCreateContextFromType(const cl_context_properties *d_props,
                        void *user_data, cl_int *r_errcode) try {
   cl_platform_id d_platform;
   cl_uint num_platforms;
+   cl_device_id d_dev;
   cl_int ret;
-   std::vector<cl_device_id> devs;
-   cl_uint num_devices;

   ret = clGetPlatformIDs(1, &d_platform, &num_platforms);
   if (ret || !num_platforms)
      throw error(CL_INVALID_PLATFORM);

-   ret = clGetDeviceIDs(d_platform, type, 0, NULL, &num_devices);
-   if (ret)
-      throw error(CL_DEVICE_NOT_FOUND);
-   devs.resize(num_devices);
-   ret = clGetDeviceIDs(d_platform, type, num_devices, devs.data(), 0);
+   ret = clGetDeviceIDs(d_platform, type, 1, &d_dev, 0);
   if (ret)
      throw error(CL_DEVICE_NOT_FOUND);

-   return clCreateContext(d_props, num_devices, devs.data(), pfn_notify,
-                          user_data, r_errcode);
+   return clCreateContext(d_props, 1, &d_dev, pfn_notify, user_data, r_errcode);

 } catch (error &e) {
   ret_error(r_errcode, e);
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -173,15 +173,11 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
      break;

   case CL_PROGRAM_NUM_DEVICES:
-      buf.as_scalar<cl_uint>() = prog.devices().size() ?
-                                 prog.devices().size() :
-                                 prog.ctx.devs().size();
+      buf.as_scalar<cl_uint>() = prog.devices().size();
      break;

   case CL_PROGRAM_DEVICES:
-      buf.as_vector<cl_device_id>() = prog.devices().size() ?
-                                      descs(prog.devices()) :
-                                      descs(prog.ctx.devs());
+      buf.as_vector<cl_device_id>() = descs(prog.devices());
      break;

   case CL_PROGRAM_SOURCE:
--- a/src/gallium/state_trackers/clover/util/range.hpp
+++ b/src/gallium/state_trackers/clover/util/range.hpp
@@ -269,8 +269,7 @@ namespace clover {

      typename super::const_iterator
      end() const {
-         return { f, tuple::map(advances_by(size()),
-                                tuple::map(begins(), os)) };
+         return { f, tuple::map(ends(), os) };
      }

      typename super::size_type
--- a/src/gallium/state_trackers/dri/common/dri_context.h
+++ b/src/gallium/state_trackers/dri/common/dri_context.h
@@ -89,7 +89,6 @@ dri_create_context(gl_api api,
 		   unsigned major_version,
 		   unsigned minor_version,
 		   uint32_t flags,
-		   bool notify_reset,
 		   unsigned *error,
 		   void *sharedContextPrivate);

--- a/src/gallium/state_trackers/xa/xa_tracker.h
+++ b/src/gallium/state_trackers/xa/xa_tracker.h
@@ -36,7 +36,7 @@

 #include <stdint.h>

-#define XA_TRACKER_VERSION_MAJOR 2
+#define XA_TRACKER_VERSION_MAJOR 1
 #define XA_TRACKER_VERSION_MINOR 0
 #define XA_TRACKER_VERSION_PATCH 0

--- a/src/gallium/targets/egl-static/Makefile.am
+++ b/src/gallium/targets/egl-static/Makefile.am
@@ -30,8 +30,6 @@
 #
 include $(top_srcdir)/src/gallium/Automake.inc

-LDFLAGS += -Wl,--version-script=$(top_srcdir)/src/gallium/targets/egl-static/egl.link
-
 AM_CFLAGS = $(PTHREAD_CFLAGS)
 AM_CPPFLAGS = \
 	$(GALLIUM_CFLAGS) \
--- a/src/gallium/targets/egl-static/egl.link
+++ b/src/gallium/targets/egl-static/egl.link
@@ -1,3 +0,0 @@
-VERSION {
-	global: _eglMain; local: *;
-};
--- a/src/gallium/targets/pipe-loader/Makefile.am
+++ b/src/gallium/targets/pipe-loader/Makefile.am
@@ -22,8 +22,6 @@

 include $(top_srcdir)/src/gallium/Automake.inc

-LDFLAGS += -Wl,--version-script=$(top_srcdir)/src/gallium/targets/pipe-loader/pipe.link
-
 AM_CPPFLAGS = \
 	$(GALLIUM_CFLAGS) \
 	-I$(top_srcdir)/include \
--- a/src/gallium/targets/pipe-loader/pipe.link
+++ b/src/gallium/targets/pipe-loader/pipe.link
@@ -1,3 +0,0 @@
-VERSION {
-	global: driver_descriptor; local: *;
-};
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -104,24 +104,6 @@ dri_get_buffers_with_format(__DRIdrawable * driDrawable,
                                   count, out_count, surf->dri_private);
 }

-static int
-image_get_buffers(__DRIdrawable *driDrawable,
-                  unsigned int format,
-                  uint32_t *stamp,
-                  void *loaderPrivate,
-                  uint32_t buffer_mask,
-                  struct __DRIimageList *buffers)
-{
-   struct gbm_dri_surface *surf = loaderPrivate;
-   struct gbm_dri_device *dri = gbm_dri_device(surf->base.gbm);
-
-   if (dri->image_get_buffers == NULL)
-      return 0;
-
-   return dri->image_get_buffers(driDrawable, format, stamp,
-                                 surf->dri_private, buffer_mask, buffers);
-}
-
 static const __DRIuseInvalidateExtension use_invalidate = {
   { __DRI_USE_INVALIDATE, 1 }
 };
@@ -131,20 +113,13 @@ static const __DRIimageLookupExtension image_lookup_extension = {
   dri_lookup_egl_image
 };

-static const __DRIdri2LoaderExtension dri2_loader_extension = {
+const __DRIdri2LoaderExtension dri2_loader_extension = {
   { __DRI_DRI2_LOADER, 3 },
   dri_get_buffers,
   dri_flush_front_buffer,
   dri_get_buffers_with_format,
 };

-static const __DRIimageLoaderExtension image_loader_extension = {
-   { __DRI_IMAGE_LOADER, 1 },
-   image_get_buffers,
-   dri_flush_front_buffer,
-};
-
-
 struct dri_extension_match {
   const char *name;
   int version;
@@ -283,8 +258,7 @@ dri_screen_create(struct gbm_dri_device *dri)
   dri->extensions[0] = &image_lookup_extension.base;
   dri->extensions[1] = &use_invalidate.base;
   dri->extensions[2] = &dri2_loader_extension.base;
-   dri->extensions[3] = &image_loader_extension.base;
-   dri->extensions[4] = NULL;
+   dri->extensions[3] = NULL;

   if (dri->dri2 == NULL)
      return -1;
--- a/src/gbm/backends/dri/gbm_driint.h
+++ b/src/gbm/backends/dri/gbm_driint.h
@@ -52,7 +52,7 @@ struct gbm_dri_device {
   __DRIdri2LoaderExtension *loader;

   const __DRIconfig   **driver_configs;
-   const __DRIextension *extensions[5];
+   const __DRIextension *extensions[4];
   const __DRIextension **driver_extensions;

   __DRIimage *(*lookup_image)(__DRIscreen *screen, void *image, void *data);
@@ -67,12 +67,6 @@ struct gbm_dri_device {
 			     int *width, int *height,
 			     unsigned int *attachments, int count,
 			     int *out_count, void *data);
-   int (*image_get_buffers)(__DRIdrawable *driDrawable,
-                            unsigned int format,
-                            uint32_t *stamp,
-                            void *loaderPrivate,
-                            uint32_t buffer_mask,
-                            struct __DRIimageList *buffers);

   struct wl_drm *wl_drm;
 };
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2934,7 +2934,7 @@ ast_declarator_list::hir(exec_list *instructions,
                               precision_names[this->type->qualifier.precision],
                               type_name);
         }
-      } else if (this->type->specifier->structure == NULL) {
+      } else {
         _mesa_glsl_warning(&loc, state, "empty declaration");
      }
   }
@@ -3355,15 +3355,6 @@ ast_declarator_list::hir(exec_list *instructions,
      ir_variable *earlier =
         get_variable_being_redeclared(var, decl->get_location(), state,
                                       false /* allow_all_redeclarations */);
-      if (earlier != NULL) {
-         if (strncmp(var->name, "gl_", 3) == 0 &&
-             earlier->how_declared == ir_var_declared_in_block) {
-            _mesa_glsl_error(&loc, state,
-                             "`%s' has already been redeclared using "
-                             "gl_PerVertex", var->name);
-         }
-         earlier->how_declared = ir_var_declared_normally;
-      }

      if (decl->initializer != NULL) {
 	 result = process_initializer((earlier == NULL) ? var : earlier,
@@ -5057,7 +5048,6 @@ ast_interface_block::hir(exec_list *instructions,
            _mesa_glsl_error(&loc, state, "`%s' redeclared",
                             this->instance_name);
         }
-         earlier->how_declared = ir_var_declared_normally;
         earlier->type = var->type;
         earlier->reinit_interface_type(block_type);
         delete var;
@@ -5088,11 +5078,7 @@ ast_interface_block::hir(exec_list *instructions,
               _mesa_glsl_error(&loc, state,
                                "redeclaration of gl_PerVertex can only "
                                "include built-in variables");
-            } else if (earlier->how_declared == ir_var_declared_normally) {
-               _mesa_glsl_error(&loc, state,
-                                "`%s' has already been redeclared", var->name);
            } else {
-               earlier->how_declared = ir_var_declared_in_block;
               earlier->reinit_interface_type(block_type);
            }
            continue;
@@ -5139,12 +5125,6 @@ ast_interface_block::hir(exec_list *instructions,
            if (var != NULL &&
                var->get_interface_type() == earlier_per_vertex &&
                var->mode == var_mode) {
-               if (var->how_declared == ir_var_declared_normally) {
-                  _mesa_glsl_error(&loc, state,
-                                   "redeclaration of gl_PerVertex cannot "
-                                   "follow a redeclaration of `%s'",
-                                   var->name);
-               }
               state->symbols->disable_variable(var->name);
               var->remove();
            }
--- a/src/glsl/builtin_variables.cpp
+++ b/src/glsl/builtin_variables.cpp
@@ -434,7 +434,6 @@ builtin_variable_generator::add_variable(const char *name,
                                         enum ir_variable_mode mode, int slot)
 {
   ir_variable *var = new(symtab) ir_variable(type, name, mode);
-   var->how_declared = ir_var_declared_implicitly;

   switch (var->mode) {
   case ir_var_auto:
--- a/src/glsl/glsl_parser_extras.cpp
+++ b/src/glsl/glsl_parser_extras.cpp
@@ -191,8 +191,6 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *_ctx,
   this->gs_input_prim_type = GL_POINTS;
   this->gs_input_size = 0;
   this->out_qualifier = new(this) ast_type_qualifier();
-   memset(this->atomic_counter_offsets, 0,
-          sizeof(this->atomic_counter_offsets));
 }

 /**
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -1586,8 +1586,7 @@ ir_variable::ir_variable(const struct glsl_type *type, const char *name,
 			 ir_variable_mode mode)
   : max_array_access(0), max_ifc_array_access(NULL),
     read_only(false), centroid(false), invariant(false),
-     how_declared(ir_var_declared_normally), mode(mode),
-     interpolation(INTERP_QUALIFIER_NONE), atomic()
+        mode(mode), interpolation(INTERP_QUALIFIER_NONE), atomic()
 {
   this->ir_type = ir_type_variable;
   this->type = type;
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -283,34 +283,6 @@ enum ir_variable_mode {
   ir_var_mode_count	/**< Number of variable modes */
 };

-/**
- * Enum keeping track of how a variable was declared.  For error checking of
- * the gl_PerVertex redeclaration rules.
- */
-enum ir_var_declaration_type {
-   /**
-    * Normal declaration (for most variables, this means an explicit
-    * declaration.  Exception: temporaries are always implicitly declared, but
-    * they still use ir_var_declared_normally).
-    *
-    * Note: an ir_variable that represents a named interface block uses
-    * ir_var_declared_normally.
-    */
-   ir_var_declared_normally = 0,
-
-   /**
-    * Variable was explicitly declared (or re-declared) in an unnamed
-    * interface block.
-    */
-   ir_var_declared_in_block,
-
-   /**
-    * Variable is an implicitly declared built-in that has not been explicitly
-    * re-declared by the shader.
-    */
-   ir_var_declared_implicitly,
-};
-
 /**
 * \brief Layout qualifiers for gl_FragDepth.
 *
@@ -543,14 +515,6 @@ public:
    */
   unsigned assigned:1;

-   /**
-    * Enum indicating how the variable was declared.  See
-    * ir_var_declaration_type.
-    *
-    * This is used to detect certain kinds of illegal variable redeclarations.
-    */
-   unsigned how_declared:2;
-
   /**
    * Storage class of the variable.
    *
--- a/src/glsl/ir_clone.cpp
+++ b/src/glsl/ir_clone.cpp
@@ -68,7 +68,6 @@ ir_variable::clone(void *mem_ctx, struct hash_table *ht) const
   var->has_initializer = this->has_initializer;
   var->depth_layout = this->depth_layout;
   var->assigned = this->assigned;
-   var->how_declared = this->how_declared;
   var->used = this->used;

   var->num_state_slots = this->num_state_slots;
--- a/src/glsl/link_interface_blocks.cpp
+++ b/src/glsl/link_interface_blocks.cpp
@@ -30,230 +30,13 @@
 #include "glsl_symbol_table.h"
 #include "linker.h"
 #include "main/macros.h"
-#include "program/hash_table.h"
-
-
-namespace {
-
-/**
- * Information about a single interface block definition that we need to keep
- * track of in order to check linkage rules.
- *
- * Note: this class is expected to be short lived, so it doesn't make copies
- * of the strings it references; it simply borrows the pointers from the
- * ir_variable class.
- */
-struct interface_block_definition
-{
-   /**
-    * Extract an interface block definition from an ir_variable that
-    * represents either the interface instance (for named interfaces), or a
-    * member of the interface (for unnamed interfaces).
-    */
-   explicit interface_block_definition(const ir_variable *var)
-      : type(var->get_interface_type()),
-        instance_name(NULL),
-        array_size(-1)
-   {
-      if (var->is_interface_instance()) {
-         instance_name = var->name;
-         if (var->type->is_array())
-            array_size = var->type->length;
-      }
-      explicitly_declared = (var->how_declared != ir_var_declared_implicitly);
-   }
-
-   /**
-    * Interface block type
-    */
-   const glsl_type *type;
-
-   /**
-    * For a named interface block, the instance name.  Otherwise NULL.
-    */
-   const char *instance_name;
-
-   /**
-    * For an interface block array, the array size (or 0 if unsized).
-    * Otherwise -1.
-    */
-   int array_size;
-
-   /**
-    * True if this interface block was explicitly declared in the shader;
-    * false if it was an implicitly declared built-in interface block.
-    */
-   bool explicitly_declared;
-};
-
-
-/**
- * Check if two interfaces match, according to intrastage interface matching
- * rules.  If they do, and the first interface uses an unsized array, it will
- * be updated to reflect the array size declared in the second interface.
- */
-bool
-intrastage_match(interface_block_definition *a,
-                 const interface_block_definition *b,
-                 ir_variable_mode mode)
-{
-   /* Types must match. */
-   if (a->type != b->type) {
-      /* Exception: if both the interface blocks are implicitly declared,
-       * don't force their types to match.  They might mismatch due to the two
-       * shaders using different GLSL versions, and that's ok.
-       */
-      if (a->explicitly_declared || b->explicitly_declared)
-         return false;
-   }
-
-   /* Presence/absence of interface names must match. */
-   if ((a->instance_name == NULL) != (b->instance_name == NULL))
-      return false;
-
-   /* For uniforms, instance names need not match.  For shader ins/outs,
-    * it's not clear from the spec whether they need to match, but
-    * Mesa's implementation relies on them matching.
-    */
-   if (a->instance_name != NULL && mode != ir_var_uniform &&
-       strcmp(a->instance_name, b->instance_name) != 0) {
-      return false;
-   }
-
-   /* Array vs. nonarray must be consistent, and sizes must be
-    * consistent, with the exception that unsized arrays match sized
-    * arrays.
-    */
-   if ((a->array_size == -1) != (b->array_size == -1))
-      return false;
-   if (b->array_size != 0) {
-      if (a->array_size == 0)
-         a->array_size = b->array_size;
-      else if (a->array_size != b->array_size)
-         return false;
-   }
-
-   return true;
-}
-
-
-/**
- * Check if two interfaces match, according to interstage (in/out) interface
- * matching rules.
- *
- * If \c extra_array_level is true, then vertex-to-geometry shader matching
- * rules are enforced (i.e. a successful match requires the consumer interface
- * to be an array and the producer interface to be a non-array).
- */
-bool
-interstage_match(const interface_block_definition *producer,
-                 const interface_block_definition *consumer,
-                 bool extra_array_level)
-{
-   /* Unsized arrays should not occur during interstage linking.  They
-    * should have all been assigned a size by link_intrastage_shaders.
-    */
-   assert(consumer->array_size != 0);
-   assert(producer->array_size != 0);
-
-   /* Types must match. */
-   if (consumer->type != producer->type) {
-      /* Exception: if both the interface blocks are implicitly declared,
-       * don't force their types to match.  They might mismatch due to the two
-       * shaders using different GLSL versions, and that's ok.
-       */
-      if (consumer->explicitly_declared || producer->explicitly_declared)
-         return false;
-   }
-   if (extra_array_level) {
-      /* Consumer must be an array, and producer must not. */
-      if (consumer->array_size == -1)
-         return false;
-      if (producer->array_size != -1)
-         return false;
-   } else {
-      /* Array vs. nonarray must be consistent, and sizes must be consistent.
-       * Since unsized arrays have been ruled out, we can check this by just
-       * making sure the sizes are equal.
-       */
-      if (consumer->array_size != producer->array_size)
-         return false;
-   }
-   return true;
-}
-
-
-/**
- * This class keeps track of a mapping from an interface block name to the
- * necessary information about that interface block to determine whether to
- * generate a link error.
- *
- * Note: this class is expected to be short lived, so it doesn't make copies
- * of the strings it references; it simply borrows the pointers from the
- * ir_variable class.
- */
-class interface_block_definitions
-{
-public:
-   interface_block_definitions()
-      : mem_ctx(ralloc_context(NULL)),
-        ht(hash_table_ctor(0, hash_table_string_hash,
-                           hash_table_string_compare))
-   {
-   }
-
-   ~interface_block_definitions()
-   {
-      hash_table_dtor(ht);
-      ralloc_free(mem_ctx);
-   }
-
-   /**
-    * Lookup the interface definition having the given block name.  Return
-    * NULL if none is found.
-    */
-   interface_block_definition *lookup(const char *block_name)
-   {
-      return (interface_block_definition *) hash_table_find(ht, block_name);
-   }
-
-   /**
-    * Add a new interface definition.
-    */
-   void store(const interface_block_definition &def)
-   {
-      interface_block_definition *hash_entry =
-         rzalloc(mem_ctx, interface_block_definition);
-      *hash_entry = def;
-      hash_table_insert(ht, hash_entry, def.type->name);
-   }
-
-private:
-   /**
-    * Ralloc context for data structures allocated by this class.
-    */
-   void *mem_ctx;
-
-   /**
-    * Hash table mapping interface block name to an \c
-    * interface_block_definition struct.  interface_block_definition structs
-    * are allocated using \c mem_ctx.
-    */
-   hash_table *ht;
-};
-
-
-}; /* anonymous namespace */
-

 void
 validate_intrastage_interface_blocks(struct gl_shader_program *prog,
                                     const gl_shader **shader_list,
                                     unsigned num_shaders)
 {
-   interface_block_definitions in_interfaces;
-   interface_block_definitions out_interfaces;
-   interface_block_definitions uniform_interfaces;
+   glsl_symbol_table interfaces;

   for (unsigned int i = 0; i < num_shaders; i++) {
      if (shader_list[i] == NULL)
@@ -269,36 +52,17 @@ validate_intrastage_interface_blocks(struct gl_shader_program *prog,
         if (iface_type == NULL)
            continue;

-         interface_block_definitions *definitions;
-         switch (var->mode) {
-         case ir_var_shader_in:
-            definitions = &in_interfaces;
-            break;
-         case ir_var_shader_out:
-            definitions = &out_interfaces;
-            break;
-         case ir_var_uniform:
-            definitions = &uniform_interfaces;
-            break;
-         default:
-            /* Only in, out, and uniform interfaces are legal, so we should
-             * never get here.
-             */
-            assert(!"illegal interface type");
-            continue;
-         }
+         const glsl_type *old_iface_type =
+            interfaces.get_interface(iface_type->name,
+                                     (enum ir_variable_mode) var->mode);

-         const interface_block_definition def(var);
-         interface_block_definition *prev_def =
-            definitions->lookup(iface_type->name);
-
-         if (prev_def == NULL) {
+         if (old_iface_type == NULL) {
            /* This is the first time we've seen the interface, so save
-             * it into the appropriate data structure.
+             * it into our symbol table.
             */
-            definitions->store(def);
-         } else if (!intrastage_match(prev_def, &def,
-                                      (ir_variable_mode) var->mode)) {
+            interfaces.add_interface(iface_type->name, iface_type,
+                                     (enum ir_variable_mode) var->mode);
+         } else if (old_iface_type != iface_type) {
            linker_error(prog, "definitions of interface block `%s' do not"
                         " match\n", iface_type->name);
            return;
@@ -308,78 +72,43 @@ validate_intrastage_interface_blocks(struct gl_shader_program *prog,
 }

 void
-validate_interstage_inout_blocks(struct gl_shader_program *prog,
-                                 const gl_shader *producer,
-                                 const gl_shader *consumer)
+validate_interstage_interface_blocks(struct gl_shader_program *prog,
+                                     const gl_shader *producer,
+                                     const gl_shader *consumer)
 {
-   interface_block_definitions definitions;
-   const bool extra_array_level = consumer->Type == GL_GEOMETRY_SHADER;
+   glsl_symbol_table interfaces;

-   /* Add input interfaces from the consumer to the symbol table. */
+   /* Add non-output interfaces from the consumer to the symbol table. */
   foreach_list(node, consumer->ir) {
      ir_variable *var = ((ir_instruction *) node)->as_variable();
-      if (!var || !var->get_interface_type() || var->mode != ir_var_shader_in)
+      if (!var || !var->get_interface_type() || var->mode == ir_var_shader_out)
         continue;

-      definitions.store(interface_block_definition(var));
+      interfaces.add_interface(var->get_interface_type()->name,
+                               var->get_interface_type(),
+                               (enum ir_variable_mode) var->mode);
   }

-   /* Verify that the producer's output interfaces match. */
+   /* Verify that the producer's interfaces match. */
   foreach_list(node, producer->ir) {
      ir_variable *var = ((ir_instruction *) node)->as_variable();
-      if (!var || !var->get_interface_type() || var->mode != ir_var_shader_out)
+      if (!var || !var->get_interface_type() || var->mode == ir_var_shader_in)
         continue;

-      interface_block_definition *consumer_def =
-         definitions.lookup(var->get_interface_type()->name);
+      enum ir_variable_mode consumer_mode =
+         var->mode == ir_var_uniform ? ir_var_uniform : ir_var_shader_in;
+      const glsl_type *expected_type =
+         interfaces.get_interface(var->get_interface_type()->name,
+                                  consumer_mode);

      /* The consumer doesn't use this output block.  Ignore it. */
-      if (consumer_def == NULL)
+      if (expected_type == NULL)
         continue;

-      const interface_block_definition producer_def(var);
-
-      if (!interstage_match(&producer_def, consumer_def, extra_array_level)) {
+      if (var->get_interface_type() != expected_type) {
         linker_error(prog, "definitions of interface block `%s' do not "
                      "match\n", var->get_interface_type()->name);
         return;
      }
   }
 }
-
-
-void
-validate_interstage_uniform_blocks(struct gl_shader_program *prog,
-                                   gl_shader **stages, int num_stages)
-{
-   interface_block_definitions definitions;
-
-   for (int i = 0; i < num_stages; i++) {
-      if (stages[i] == NULL)
-         continue;
-
-      const gl_shader *stage = stages[i];
-      foreach_list(node, stage->ir) {
-         ir_variable *var = ((ir_instruction *) node)->as_variable();
-         if (!var || !var->get_interface_type() || var->mode != ir_var_uniform)
-            continue;
-
-         interface_block_definition *old_def =
-            definitions.lookup(var->get_interface_type()->name);
-         const interface_block_definition new_def(var);
-         if (old_def == NULL) {
-            definitions.store(new_def);
-         } else {
-            /* Interstage uniform matching rules are the same as intrastage
-             * uniform matchin rules (for uniforms, it is as though all
-             * shaders are in the same shader stage).
-             */
-            if (!intrastage_match(old_def, &new_def, ir_var_uniform)) {
-               linker_error(prog, "definitions of interface block `%s' do not "
-                            "match\n", var->get_interface_type()->name);
-               return;
-            }
-         }
-      }
-   }
-}
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -2154,8 +2154,8 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
      if (prog->_LinkedShaders[i] == NULL)
         continue;

-      validate_interstage_inout_blocks(prog, prog->_LinkedShaders[prev],
-                                       prog->_LinkedShaders[i]);
+      validate_interstage_interface_blocks(prog, prog->_LinkedShaders[prev],
+                                           prog->_LinkedShaders[i]);
      if (!prog->LinkStatus)
         goto done;

@@ -2168,11 +2168,6 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
      prev = i;
   }

-   /* Cross-validate uniform blocks between shader stages */
-   validate_interstage_uniform_blocks(prog, prog->_LinkedShaders,
-                                      MESA_SHADER_TYPES);
-   if (!prog->LinkStatus)
-      goto done;

   for (unsigned int i = 0; i < MESA_SHADER_TYPES; i++) {
      if (prog->_LinkedShaders[i] != NULL)
--- a/src/glsl/linker.h
+++ b/src/glsl/linker.h
@@ -65,13 +65,9 @@ validate_intrastage_interface_blocks(struct gl_shader_program *prog,
                                     unsigned num_shaders);

 void
-validate_interstage_inout_blocks(struct gl_shader_program *prog,
-                                 const gl_shader *producer,
-                                 const gl_shader *consumer);
-
-void
-validate_interstage_uniform_blocks(struct gl_shader_program *prog,
-                                   gl_shader **stages, int num_stages);
+validate_interstage_interface_blocks(struct gl_shader_program *prog,
+                                     const gl_shader *producer,
+                                     const gl_shader *consumer);

 extern void
 link_assign_atomic_counter_resources(struct gl_context *ctx,
--- a/src/glsl/lower_clip_distance.cpp
+++ b/src/glsl/lower_clip_distance.cpp
@@ -381,11 +381,6 @@ lower_clip_distance_visitor::fix_lhs(ir_assignment *ir)
 ir_visitor_status
 lower_clip_distance_visitor::visit_leave(ir_assignment *ir)
 {
-   /* First invoke the base class visitor.  This causes handle_rvalue() to be
-    * called on ir->rhs and ir->condition.
-    */
-   ir_rvalue_visitor::visit_leave(ir);
-
   if (this->is_clip_distance_vec8(ir->lhs) ||
       this->is_clip_distance_vec8(ir->rhs)) {
      /* LHS or RHS of the assignment is the entire 1D gl_ClipDistance array
--- a/src/glsl/opt_cse.cpp
+++ b/src/glsl/opt_cse.cpp
@@ -352,7 +352,6 @@ equals(ir_texture *a, ir_texture *b)
      if (!equals(a->lod_info.grad.dPdx, b->lod_info.grad.dPdx) ||
          !equals(a->lod_info.grad.dPdy, b->lod_info.grad.dPdy))
         return false;
-      break;
   case ir_txf_ms:
      if (!equals(a->lod_info.sample_index, b->lod_info.sample_index))
         return false;
@@ -360,7 +359,6 @@ equals(ir_texture *a, ir_texture *b)
   case ir_tg4:
      if (!equals(a->lod_info.component, b->lod_info.component))
         return false;
-      break;
   default:
      assert(!"Unrecognized texture op");
   }
--- a/src/glx/Makefile.am
+++ b/src/glx/Makefile.am
@@ -94,6 +94,8 @@ libglx_la_SOURCES = \
 	  dri2_glx.c \
 	  dri2.c \
 	  dri2_query_renderer.c \
+          dri3_glx.c \
+          dri3_common.c \
 	  applegl_glx.c

 GL_LIBS = \
--- a/src/glx/SConscript
+++ b/src/glx/SConscript
@@ -63,7 +63,6 @@ sources = [
    'indirect_vertex_program.c',
    'pixel.c',
    'pixelstore.c',
-    'query_renderer.c',
    'render2.c',
    'renderpix.c',
    'single2.c',
@@ -79,9 +78,6 @@ sources = [
    'glxhash.c',
    'dri2_glx.c',
    'dri2.c',
-    'dri2_query_renderer.c',
-    #'dri3_glx.c',
-    #'dri3_common.c',
    'applegl_glx.c',
 ]

--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -159,6 +159,51 @@ dri3_unbind_context(struct glx_context *context, struct glx_context *new)
   (*psc->core->unbindContext) (pcp->driContext);
 }

+static struct glx_context *
+dri3_create_context(struct glx_screen *base,
+                    struct glx_config *config_base,
+                    struct glx_context *shareList, int renderType)
+{
+   struct dri3_context *pcp, *pcp_shared;
+   struct dri3_screen *psc = (struct dri3_screen *) base;
+   __GLXDRIconfigPrivate *config = (__GLXDRIconfigPrivate *) config_base;
+   __DRIcontext *shared = NULL;
+
+   if (shareList) {
+      /* If the shareList context is not a DRI3 context, we cannot possibly
+       * create a DRI3 context that shares it.
+       */
+      if (shareList->vtable->destroy != dri3_destroy_context) {
+         return NULL;
+      }
+
+      pcp_shared = (struct dri3_context *) shareList;
+      shared = pcp_shared->driContext;
+   }
+
+   pcp = calloc(1, sizeof *pcp);
+   if (pcp == NULL)
+      return NULL;
+
+   if (!glx_context_init(&pcp->base, &psc->base, &config->base)) {
+      free(pcp);
+      return NULL;
+   }
+
+   pcp->driContext =
+      (*psc->image_driver->createNewContext) (psc->driScreen,
+                                              config->driConfig, shared, pcp);
+
+   if (pcp->driContext == NULL) {
+      free(pcp);
+      return NULL;
+   }
+
+   pcp->base.vtable = &dri3_context_vtable;
+
+   return &pcp->base;
+}
+
 static struct glx_context *
 dri3_create_context_attribs(struct glx_screen *base,
                            struct glx_config *config_base,
@@ -254,17 +299,6 @@ error_exit:
   return NULL;
 }

-static struct glx_context *
-dri3_create_context(struct glx_screen *base,
-                    struct glx_config *config_base,
-                    struct glx_context *shareList, int renderType)
-{
-   unsigned int error;
-
-   return dri3_create_context_attribs(base, config_base, shareList,
-                                      0, NULL, &error);
-}
-
 static void
 dri3_destroy_drawable(__GLXDRIdrawable *base)
 {
--- a/src/glx/glxclient.h
+++ b/src/glx/glxclient.h
@@ -477,7 +477,7 @@ struct glx_screen_vtable {
 						 unsigned *error);
   int (*query_renderer_integer)(struct glx_screen *psc,
                                 int attribute,
-                                 unsigned int *value);
+                                 int *value);
   int (*query_renderer_string)(struct glx_screen *psc,
                                int attribute,
                                const char **value);
--- a/src/glx/glxcmds.c
+++ b/src/glx/glxcmds.c
@@ -183,7 +183,7 @@ GetGLXPrivScreenConfig(Display * dpy, int scrn, struct glx_display ** ppriv,

   /* Check to see if the GL is supported on this screen */
   *ppsc = (*ppriv)->screens[scrn];
-   if ((*ppsc)->configs == NULL && (*ppsc)->visuals == NULL) {
+   if ((*ppsc)->configs == NULL) {
      /* No support for GL on this screen regardless of visual */
      return GLX_BAD_VISUAL;
   }
--- a/src/glx/glxext.c
+++ b/src/glx/glxext.c
@@ -865,6 +865,8 @@ __glXInitialize(Display * dpy)
    ** (e.g., those called in AllocAndFetchScreenConfigs).
    */
   if (glx_direct && glx_accel) {
+      if (!getenv("LIBGL_DRI3_DISABLE"))
+         dpyPriv->dri3Display = dri3_create_display(dpy);
      dpyPriv->dri2Display = dri2CreateDisplay(dpy);
      dpyPriv->driDisplay = driCreateDisplay(dpy);
   }
--- a/src/glx/query_renderer.c
+++ b/src/glx/query_renderer.c
@@ -30,7 +30,7 @@ __glXQueryRendererInteger(struct glx_screen *psc, int attribute,
                          unsigned int *value)
 {
   unsigned int values_for_query = 0;
-   unsigned int buffer[32];
+   int buffer[32];
   int err;

   /* This probably means the caller is trying to use an extension function
--- a/src/glx/tests/query_renderer_unittest.cpp
+++ b/src/glx/tests/query_renderer_unittest.cpp
@@ -56,8 +56,7 @@ static bool query_renderer_string_called = false;
 static bool query_renderer_integer_called = false;

 static int
-fake_query_renderer_integer(struct glx_screen *psc, int attribute,
-                            unsigned int *value)
+fake_query_renderer_integer(struct glx_screen *psc, int attribute, int *value)
 {
   (void) psc;
   (void) attribute;
--- a/src/mapi/shared-glapi/tests/Makefile.am
+++ b/src/mapi/shared-glapi/tests/Makefile.am
@@ -3,7 +3,6 @@ AM_CFLAGS = $(PTHREAD_CFLAGS)
 AM_CPPFLAGS = \
 	-I$(top_srcdir)/src/gtest/include \
 	-I$(top_srcdir)/src/mapi \
-	-I$(top_builddir)/src/mapi \
 	-I$(top_srcdir)/include

 TESTS = shared-glapi-test
--- a/src/mesa/drivers/SConscript
+++ b/src/mesa/drivers/SConscript
@@ -10,6 +10,3 @@ if env['dri']:

 if env['platform'] == 'windows':
    SConscript('windows/gdi/SConscript')
-
-if env['platform'] == 'haiku':
-    SConscript('haiku/swrast/SConscript')
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1515,9 +1515,6 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
                                   sizeof(struct vertex), OFFSET(x));
      _mesa_VertexAttribPointer(1, 2, GL_FLOAT, GL_FALSE,
                                   sizeof(struct vertex), OFFSET(s));
-
-      _mesa_EnableVertexAttribArray(0);
-      _mesa_EnableVertexAttribArray(1);
   }

   /* Generate a relevant fragment shader program for the texture target */
@@ -1594,6 +1591,8 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
   _mesa_DeleteObjectARB(vs);
   _mesa_BindAttribLocation(ShaderProg, 0, "position");
   _mesa_BindAttribLocation(ShaderProg, 1, "texcoords");
+   _mesa_EnableVertexAttribArray(0);
+   _mesa_EnableVertexAttribArray(1);
   link_program_with_debug(ctx, ShaderProg);
   ralloc_free(mem_ctx);
   if (texture_2d)
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -407,10 +407,8 @@ driCreateContextAttribs(__DRIscreen *screen, int api,
       mesa_api = API_OPENGL_CORE;
    }

-    const uint32_t allowed_flags = (__DRI_CTX_FLAG_DEBUG
-                                    | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
-                                    | __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS);
-    if (flags & ~allowed_flags) {
+    if ((flags & ~(__DRI_CTX_FLAG_DEBUG | __DRI_CTX_FLAG_FORWARD_COMPATIBLE))
+        != 0) {
 	*error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
 	return NULL;
    }
@@ -870,6 +868,7 @@ const __DRIimageDriverExtension driImageDriverExtension = {

    .createNewScreen2           = driCreateNewScreen2,
    .createNewDrawable          = driCreateNewDrawable,
+    .createNewContext           = driCreateNewContext,
    .getAPIMask                 = driGetAPIMask,
    .createContextAttribs       = driCreateContextAttribs,
 };
--- a/src/mesa/drivers/dri/common/megadriver_stub.c
+++ b/src/mesa/drivers/dri/common/megadriver_stub.c
@@ -23,132 +23,6 @@

 #include <stdio.h>
 #include "dri_util.h"
-#include <dlfcn.h>
-#include "main/macros.h"
-
-/* We need GNU extensions to dlfcn.h in order to provide backward
- * compatibility for the older DRI driver loader mechanism. (dladdr,
- * Dl_info, and RTLD_DEFAULT are only defined when _GNU_SOURCE is
- * defined.)
- */
-#ifdef _GNU_SOURCE
-
-#define MEGADRIVER_STUB_MAX_EXTENSIONS 10
-#define LIB_PATH_SUFFIX "_dri.so"
-#define LIB_PATH_SUFFIX_LENGTH (sizeof(LIB_PATH_SUFFIX)-1)
-
-/* This is the table of extensions that the loader will dlsym() for.
- *
- * Initially it is empty for the megadriver stub, but the library
- * constructor may initialize it based on the name of the library that
- * is being loaded.
- */
-PUBLIC const __DRIextension *
-__driDriverExtensions[MEGADRIVER_STUB_MAX_EXTENSIONS] = {
-   NULL
-};
-
-/**
- * This is a constructor function for the megadriver dynamic library.
- *
- * When the driver is dlopen'ed, this function will run. It will
- * search for the name of the foo_dri.so file that was opened using
- * the dladdr function.
- *
- * After finding foo's name, it will call __driDriverGetExtensions_foo
- * and use the return to update __driDriverExtensions to enable
- * compatibility with older DRI driver loaders.
- */
-__attribute__((constructor)) static void
-megadriver_stub_init(void)
-{
-   Dl_info info;
-   char *driver_name;
-   size_t name_len;
-   char *get_extensions_name;
-   const __DRIextension **(*get_extensions)(void);
-   const __DRIextension **extensions;
-   int i;
-
-   /* Call dladdr on __driDriverExtensions. We are really
-    * interested in the returned info.dli_fname so we can
-    * figure out the path name of the library being loaded.
-    */
-   i = dladdr((void*) __driDriverExtensions, &info);
-   if (i == 0)
-      return;
-
-   /* Search for the last '/' character in the path. */
-   driver_name = strrchr(info.dli_fname, '/');
-   if (driver_name != NULL) {
-      /* Skip '/' character */
-      driver_name++;
-   } else {
-      /* Try using the start of the path */
-      driver_name = (char*) info.dli_fname;
-   }
-
-   /* Make sure the path ends with _dri.so */
-   name_len = strlen(driver_name);
-   i = name_len - LIB_PATH_SUFFIX_LENGTH;
-   if (i < 0 || strcmp(driver_name + i, LIB_PATH_SUFFIX) != 0)
-      return;
-
-   /* Duplicate the string so we can modify it.
-    * So far we've been using info.dli_fname.
-    */
-   driver_name = strdup(driver_name);
-   if (!driver_name)
-      return;
-
-   /* The path ends with _dri.so. Chop this part of the
-    * string off. Then we'll have the driver's final name.
-    */
-   driver_name[i] = '\0';
-
-   i = asprintf(&get_extensions_name, "%s_%s",
-                __DRI_DRIVER_GET_EXTENSIONS, driver_name);
-   free(driver_name);
-   if (i == -1)
-      return;
-
-   /* dlsym to get the driver's get extensions function. We
-    * don't have the dlopen handle, so we have to use
-    * RTLD_DEFAULT. It seems unlikely that the symbol will
-    * be found in another library, but this isn't optimal.
-    */
-   get_extensions = dlsym(RTLD_DEFAULT, get_extensions_name);
-   free(get_extensions_name);
-   if (!get_extensions)
-      return;
-
-   /* Use the newer DRI loader entrypoint to find extensions.
-    * We will then expose these extensions via the older
-    * __driDriverExtensions symbol.
-    */
-   extensions = get_extensions();
-
-   /* Copy the extensions into the __driDriverExtensions array
-    * we declared.
-    */
-   for (i = 0; i < ARRAY_SIZE(__driDriverExtensions); i++) {
-      __driDriverExtensions[i] = extensions[i];
-      if (extensions[i] == NULL)
-         break;
-   }
-
-   /* If the driver had more extensions than we reserved, then
-    * bail out.
-    */
-   if (i == ARRAY_SIZE(__driDriverExtensions)) {
-      __driDriverExtensions[0] = NULL;
-      fprintf(stderr, "Megadriver stub did not reserve enough extension "
-              "slots.\n");
-      return;
-   }
-}
-
-#endif /* _GNU_SOURCE */

 static const
 __DRIconfig **stub_error_init_screen(__DRIscreen *psp)
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -494,7 +494,7 @@ driIndexConfigAttrib(const __DRIconfig *config, int index,
 * Zero if a recognized value of \c param is supplied, -1 otherwise.
 */
 int
-driQueryRendererIntegerCommon(__DRIscreen *psp, int param, unsigned int *value)
+driQueryRendererIntegerCommon(__DRIscreen *psp, int param, int *value)
 {
   switch (param) {
   case __DRI2_RENDERER_VERSION: {
--- a/src/mesa/drivers/dri/common/utils.h
+++ b/src/mesa/drivers/dri/common/utils.h
@@ -66,6 +66,6 @@ driIndexConfigAttrib(const __DRIconfig *config, int index,
 		     unsigned int *attrib, unsigned int *value);

 int
-driQueryRendererIntegerCommon(__DRIscreen *psp, int param, unsigned int *value);
+driQueryRendererIntegerCommon(__DRIscreen *psp, int param, int *value);

 #endif /* DRI_DEBUG_H */
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -246,8 +246,7 @@ intel_allocate_image(int dri_format, void *loaderPrivate)
    image->offset = 0;

    image->format = driImageFormatToGLFormat(dri_format);
-    if (dri_format != __DRI_IMAGE_FORMAT_NONE &&
-        image->format == MESA_FORMAT_NONE) {
+    if (image->format == 0) {
       free(image);
       return NULL;
    }
@@ -703,7 +702,7 @@ static struct __DRIimageExtensionRec intelImageExtension = {
 };

 static int
-i915_query_renderer_integer(__DRIscreen *psp, int param, unsigned int *value)
+i915_query_renderer_integer(__DRIscreen *psp, int param, int *value)
 {
   const struct intel_screen *const intelScreen =
      (struct intel_screen *) psp->driverPrivate;
@@ -723,13 +722,9 @@ i915_query_renderer_integer(__DRIscreen *psp, int param, unsigned int *value)
       * assume that there's some fragmentation, and we start doing extra
       * flushing, etc.  That's the big cliff apps will care about.
       */
-      size_t aper_size;
-      size_t mappable_size;
-
-      drm_intel_get_aperture_sizes(psp->fd, &mappable_size, &aper_size);
-
+      const unsigned long agp_bytes = drmAgpSize(psp->fd);
      const unsigned gpu_mappable_megabytes =
-         (aper_size / (1024 * 1024)) * 3 / 4;
+         (agp_bytes / (1024 * 1024)) * 3 / 4;

      const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
      const long system_page_size = sysconf(_SC_PAGE_SIZE);
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -46,8 +46,8 @@ TEST_LIBS = \
 	libi965_dri.la \
 	../common/libdricommon.la \
 	../common/libmegadriver_stub.la \
-        ../../../libmesa.la \
 	$(DRI_LIB_DEPS) \
+        ../../../libmesa.la \
        -lrt \
 	../common/libdri_test_stubs.la

--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -128,7 +128,7 @@ static void
 brw_gs_upload_binding_table(struct brw_context *brw)
 {
   /* If there's no GS, skip changing anything. */
-   if (brw->geometry_program == NULL)
+   if (!brw->gs.prog_data)
      return;

   brw_upload_binding_table(brw, BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -266,6 +266,7 @@ retry:
    */
   brw->state.dirty.brw = ~0;
   brw->state.dirty.cache = ~0;
+   brw->state_batch_count = 0;
   brw->batch.need_workaround_flush = true;
   brw->ib.type = -1;
   intel_batchbuffer_clear_cache(brw);
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -2102,21 +2102,6 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw,
      src.brw_surfaceformat = dst.brw_surfaceformat;
   }

-   /* When doing a multisample resolve of a GL_LUMINANCE32F or GL_INTENSITY32F
-    * texture, the above code configures the source format for L32_FLOAT or
-    * I32_FLOAT, and the destination format for R32_FLOAT.  On Sandy Bridge,
-    * the SAMPLE message appears to handle multisampled L32_FLOAT and
-    * I32_FLOAT textures incorrectly, resulting in blocky artifacts.  So work
-    * around the problem by using a source format of R32_FLOAT.  This
-    * shouldn't affect rendering correctness, since the destination format is
-    * R32_FLOAT, so only the contents of the red channel matters.
-    */
-   if (brw->gen == 6 && src.num_samples > 1 && dst.num_samples <= 1 &&
-       src_mt->format == dst_mt->format &&
-       dst.brw_surfaceformat == BRW_SURFACEFORMAT_R32_FLOAT) {
-      src.brw_surfaceformat = dst.brw_surfaceformat;
-   }
-
   use_wm_prog = true;
   memset(&wm_prog_key, 0, sizeof(wm_prog_key));

--- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
@@ -67,8 +67,7 @@ public:
                          struct gl_framebuffer *fb,
                          struct gl_renderbuffer *rb,
                          GLubyte *color_mask,
-                          bool partial_clear,
-                          unsigned layer);
+                          bool partial_clear);
 };


@@ -184,13 +183,12 @@ brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
                                               struct gl_framebuffer *fb,
                                               struct gl_renderbuffer *rb,
                                               GLubyte *color_mask,
-                                               bool partial_clear,
-                                               unsigned layer)
+                                               bool partial_clear)
 {
   struct gl_context *ctx = &brw->ctx;
   struct intel_renderbuffer *irb = intel_renderbuffer(rb);

-   dst.set(brw, irb->mt, irb->mt_level, layer, true);
+   dst.set(brw, irb->mt, irb->mt_level, irb->mt_layer, true);

   /* Override the surface format according to the context's sRGB rules. */
   gl_format format = _mesa_get_render_format(ctx, irb->mt->format);
@@ -265,17 +263,24 @@ brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
      x_align *= 16;
      y_align *= 32;

-      /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
-       * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
-       * Clear of Non-MultiSampled Render Target Restrictions":
-       *
-       *   Clear rectangle must be aligned to two times the number of pixels in
-       *   the table shown below due to 16x16 hashing across the slice.
-       */
-      x0 = ROUND_DOWN_TO(x0, 2 * x_align);
-      y0 = ROUND_DOWN_TO(y0, 2 * y_align);
-      x1 = ALIGN(x1, 2 * x_align);
-      y1 = ALIGN(y1, 2 * y_align);
+      if (brw->is_haswell && brw->gt == 3) {
+         /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
+          * Backend > MCS Buffer for Render Target(s) [DevIVB+]:
+          * [DevHSW:GT3]: Clear rectangle must be aligned to two times the
+          * number of pixels in the table shown below...
+          * x_align, y_align values computed above are the relevant entries
+          * in the referred table.
+          */
+         x0 = ROUND_DOWN_TO(x0, 2 * x_align);
+         y0 = ROUND_DOWN_TO(y0, 2 * y_align);
+         x1 = ALIGN(x1, 2 * x_align);
+         y1 = ALIGN(y1, 2 * y_align);
+      } else {
+         x0 = ROUND_DOWN_TO(x0,  x_align);
+         y0 = ROUND_DOWN_TO(y0, y_align);
+         x1 = ALIGN(x1, x_align);
+         y1 = ALIGN(y1, y_align);
+      }

      /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
       * Target(s)", beneath the "Fast Color Clear" bullet (p327):
@@ -434,75 +439,13 @@ brw_blorp_const_color_program::compile(struct brw_context *brw,
   return brw_get_program(&func, program_size);
 }

-
-bool
-do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
-                      struct gl_renderbuffer *rb, unsigned buf,
-                      bool partial_clear, unsigned layer)
-{
-   struct gl_context *ctx = &brw->ctx;
-   struct intel_renderbuffer *irb = intel_renderbuffer(rb);
-
-   brw_blorp_clear_params params(brw, fb, rb, ctx->Color.ColorMask[buf],
-                                 partial_clear, layer);
-
-   bool is_fast_clear =
-      (params.fast_clear_op == GEN7_FAST_CLEAR_OP_FAST_CLEAR);
-   if (is_fast_clear) {
-      /* Record the clear color in the miptree so that it will be
-       * programmed in SURFACE_STATE by later rendering and resolve
-       * operations.
-       */
-      uint32_t new_color_value =
-         compute_fast_clear_color_bits(&ctx->Color.ClearColor);
-      if (irb->mt->fast_clear_color_value != new_color_value) {
-         irb->mt->fast_clear_color_value = new_color_value;
-         brw->state.dirty.brw |= BRW_NEW_SURFACES;
-      }
-
-      /* If the buffer is already in INTEL_MCS_STATE_CLEAR, the clear is
-       * redundant and can be skipped.
-       */
-      if (irb->mt->mcs_state == INTEL_MCS_STATE_CLEAR)
-         return true;
-
-      /* If the MCS buffer hasn't been allocated yet, we need to allocate
-       * it now.
-       */
-      if (!irb->mt->mcs_mt) {
-         if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt)) {
-            /* MCS allocation failed--probably this will only happen in
-             * out-of-memory conditions.  But in any case, try to recover
-             * by falling back to a non-blorp clear technique.
-             */
-            return false;
-         }
-         brw->state.dirty.brw |= BRW_NEW_SURFACES;
-      }
-   }
-
-   DBG("%s to mt %p level %d layer %d\n", __FUNCTION__,
-       irb->mt, irb->mt_level, irb->mt_layer);
-
-   brw_blorp_exec(brw, &params);
-
-   if (is_fast_clear) {
-      /* Now that the fast clear has occurred, put the buffer in
-       * INTEL_MCS_STATE_CLEAR so that we won't waste time doing redundant
-       * clears.
-       */
-      irb->mt->mcs_state = INTEL_MCS_STATE_CLEAR;
-   }
-
-   return true;
-}
-
-
 extern "C" {
 bool
 brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
                      bool partial_clear)
 {
+   struct gl_context *ctx = &brw->ctx;
+
   /* The constant color clear code doesn't work for multisampled surfaces, so
    * we need to support falling back to other clear mechanisms.
    * Unfortunately, our clear code is based on a bitmask that doesn't
@@ -529,16 +472,55 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
      if (rb == NULL)
         continue;

-      if (fb->NumLayers > 0) {
-         assert(fb->NumLayers == irb->mt->level[irb->mt_level].depth);
-         for (unsigned layer = 0; layer < fb->NumLayers; layer++) {
-            if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, layer))
-               return false;
+      brw_blorp_clear_params params(brw, fb, rb, ctx->Color.ColorMask[buf],
+                                    partial_clear);
+
+      bool is_fast_clear =
+         (params.fast_clear_op == GEN7_FAST_CLEAR_OP_FAST_CLEAR);
+      if (is_fast_clear) {
+         /* Record the clear color in the miptree so that it will be
+          * programmed in SURFACE_STATE by later rendering and resolve
+          * operations.
+          */
+         uint32_t new_color_value =
+            compute_fast_clear_color_bits(&ctx->Color.ClearColor);
+         if (irb->mt->fast_clear_color_value != new_color_value) {
+            irb->mt->fast_clear_color_value = new_color_value;
+            brw->state.dirty.brw |= BRW_NEW_SURFACES;
         }
-      } else {
-         unsigned layer = irb->mt_layer;
-         if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, layer))
-            return false;
+
+         /* If the buffer is already in INTEL_MCS_STATE_CLEAR, the clear is
+          * redundant and can be skipped.
+          */
+         if (irb->mt->mcs_state == INTEL_MCS_STATE_CLEAR)
+            continue;
+
+         /* If the MCS buffer hasn't been allocated yet, we need to allocate
+          * it now.
+          */
+         if (!irb->mt->mcs_mt) {
+            if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt)) {
+               /* MCS allocation failed--probably this will only happen in
+                * out-of-memory conditions.  But in any case, try to recover
+                * by falling back to a non-blorp clear technique.
+                */
+               return false;
+            }
+            brw->state.dirty.brw |= BRW_NEW_SURFACES;
+         }
+      }
+
+      DBG("%s to mt %p level %d layer %d\n", __FUNCTION__,
+          irb->mt, irb->mt_level, irb->mt_layer);
+
+      brw_blorp_exec(brw, &params);
+
+      if (is_fast_clear) {
+         /* Now that the fast clear has occurred, put the buffer in
+          * INTEL_MCS_STATE_CLEAR so that we won't waste time doing redundant
+          * clears.
+          */
+         irb->mt->mcs_state = INTEL_MCS_STATE_CLEAR;
      }
   }

--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -181,16 +181,8 @@ brw_fast_clear_depth(struct gl_context *ctx)
    */
   intel_batchbuffer_emit_mi_flush(brw);

-   if (fb->NumLayers > 0) {
-      assert(fb->NumLayers == depth_irb->mt->level[depth_irb->mt_level].depth);
-      for (unsigned layer = 0; layer < fb->NumLayers; layer++) {
-         intel_hiz_exec(brw, mt, depth_irb->mt_level, layer,
-                        GEN6_HIZ_OP_DEPTH_CLEAR);
-      }
-   } else {
-      intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
-                     GEN6_HIZ_OP_DEPTH_CLEAR);
-   }
+   intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
+		  GEN6_HIZ_OP_DEPTH_CLEAR);

   if (brw->gen == 6) {
      /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -589,16 +589,9 @@ brwCreateContext(gl_api api,
   struct dd_function_table functions;
   struct gl_config visual;

-   /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel
-    * provides us with context reset notifications.
-    */
-   uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG
-      | __DRI_CTX_FLAG_FORWARD_COMPATIBLE;
-
-   if (screen->has_context_reset_notification)
-      allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS;
-
-   if (flags & ~allowed_flags) {
+   if (flags & ~(__DRI_CTX_FLAG_DEBUG
+                 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE
+                 | __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS)) {
      *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
      return false;
   }
@@ -720,6 +713,21 @@ brwCreateContext(gl_api api,
      }
   }

+   /* Notification of GPU resets requires hardware contexts and a kernel new
+    * enough to support DRM_IOCTL_I915_GET_RESET_STATS.
+    */
+   if (notify_reset &&
+       (brw->hw_ctx == NULL
+        || drm_intel_get_reset_stats(brw->hw_ctx, &brw->reset_count, NULL,
+                                     NULL))) {
+      /* This is the wrong error code, but the correct error code (one that
+       * will cause EGL to generate EGL_BAD_MATCH) doesn't seem to exist.
+       */
+      *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
+      intelDestroyContext(driContextPriv);
+      return false;
+   }
+
   brw_init_surface_formats(brw);

   if (brw->is_g4x || brw->gen >= 5) {
@@ -758,7 +766,6 @@ brwCreateContext(gl_api api,

   brw->prim_restart.in_progress = false;
   brw->prim_restart.enable_cut_index = false;
-   brw->gs.enabled = false;

   if (brw->gen < 6) {
      brw->curbe.last_buf = calloc(1, 4096);
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1300,12 +1300,6 @@ struct brw_context
   struct {
      struct brw_stage_state base;
      struct brw_gs_prog_data *prog_data;
-
-      /**
-       * True if the 3DSTATE_GS command most recently emitted to the 3D
-       * pipeline enabled the GS; false otherwise.
-       */
-      bool enabled;
   } gs;

   struct {
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3192,11 +3192,8 @@ fs_visitor::assign_binding_table_offsets()
 {
   uint32_t next_binding_table_offset = 0;

-   /* If there are no color regions, we still perform an FB write to a null
-    * renderbuffer, which we place at surface index 0.
-    */
   c->prog_data.binding_table.render_target_start = next_binding_table_offset;
-   next_binding_table_offset += MAX2(c->key.nr_color_regions, 1);
+   next_binding_table_offset += c->key.nr_color_regions;

   assign_common_binding_table_offsets(next_binding_table_offset);
 }
@@ -3284,33 +3281,20 @@ fs_visitor::run()
 	 progress = compute_to_mrf() || progress;
      } while (progress);

+      schedule_instructions(false);
+
      lower_uniform_pull_constant_loads();

      assign_curb_setup();
      assign_urb_setup();

-      schedule_instructions(SCHEDULE_PRE_NON_LIFO);
-
      if (0)
 	 assign_regs_trivial();
      else {
-         if (!assign_regs(false)) {
-            /* Try a non-spilling register allocation again with a different
-             * scheduling heuristic.
-             */
-            schedule_instructions(SCHEDULE_PRE_LIFO);
-            if (!assign_regs(false)) {
-               if (dispatch_width == 16) {
-                  fail("Failure to register allocate.  Reduce number of "
-                       "live scalar values to avoid this.");
-               } else {
-                  while (!assign_regs(true)) {
-                     if (failed)
-                        break;
-                  }
-               }
-            }
-         }
+	 while (!assign_regs()) {
+	    if (failed)
+	       break;
+	 }
      }
   }
   assert(force_uncompressed_stack == 0);
@@ -3325,7 +3309,7 @@ fs_visitor::run()
   if (failed)
      return false;

-   schedule_instructions(SCHEDULE_POST);
+   schedule_instructions(true);

   if (dispatch_width == 8) {
      c->prog_data.reg_blocks = brw_register_blocks(grf_used);
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -291,7 +291,7 @@ public:
   void assign_curb_setup();
   void calculate_urb_setup();
   void assign_urb_setup();
-   bool assign_regs(bool allow_spilling);
+   bool assign_regs();
   void assign_regs_trivial();
   void get_used_mrfs(bool *mrf_used);
   void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
@@ -322,7 +322,7 @@ public:
   bool remove_dead_constants();
   bool remove_duplicate_mrf_writes();
   bool virtual_grf_interferes(int a, int b);
-   void schedule_instructions(instruction_scheduler_mode mode);
+   void schedule_instructions(bool post_reg_alloc);
   void insert_gen4_send_dependency_workarounds();
   void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
   void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -129,8 +129,7 @@ fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb)
 	inst = (fs_inst *) inst->next) {

      /* Skip some cases. */
-      if (is_expression(inst) && !inst->is_partial_write() &&
-          (inst->dst.file != HW_REG || inst->dst.is_null()))
+      if (is_expression(inst) && !inst->is_partial_write())
      {
 	 bool found = false;

--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -757,7 +757,7 @@ fs_generator::generate_scratch_write(fs_inst *inst, struct brw_reg src)
 	   retype(brw_message_reg(inst->base_mrf + 1), BRW_REGISTER_TYPE_UD),
 	   retype(src, BRW_REGISTER_TYPE_UD));
   brw_oword_block_write_scratch(p, brw_message_reg(inst->base_mrf),
-                                 dispatch_width / 8, inst->offset);
+                                 inst->mlen, inst->offset);
 }

 void
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -417,7 +417,7 @@ fs_visitor::setup_mrf_hack_interference(struct ra_graph *g, int first_mrf_node)
 }

 bool
-fs_visitor::assign_regs(bool allow_spilling)
+fs_visitor::assign_regs()
 {
   /* Most of this allocation was written for a reg_width of 1
    * (dispatch_width == 8).  In extending to 16-wide, the code was
@@ -496,10 +496,14 @@ fs_visitor::assign_regs(bool allow_spilling)
      if (reg == -1) {
         fail("no register to spill:\n");
         dump_instructions();
-      } else if (allow_spilling) {
-         spill_reg(reg);
+      } else if (dispatch_width == 16) {
+	 fail("Failure to register allocate.  Reduce number of live scalar "
+              "values to avoid this.");
+      } else {
+	 spill_reg(reg);
      }

+
      ralloc_free(g);

      return false;
--- a/src/mesa/drivers/dri/i965/brw_lower_offset_array.cpp
+++ b/src/mesa/drivers/dri/i965/brw_lower_offset_array.cpp
@@ -34,31 +34,26 @@
 #include "glsl/glsl_types.h"
 #include "glsl/ir.h"
 #include "glsl/ir_builder.h"
-#include "glsl/ir_rvalue_visitor.h"

 using namespace ir_builder;

-class brw_lower_offset_array_visitor : public ir_rvalue_visitor {
+class brw_lower_offset_array_visitor : public ir_hierarchical_visitor {
 public:
   brw_lower_offset_array_visitor()
   {
      progress = false;
   }

-   void handle_rvalue(ir_rvalue **rv);
+   ir_visitor_status visit_leave(ir_texture *ir);

   bool progress;
 };

-void
-brw_lower_offset_array_visitor::handle_rvalue(ir_rvalue **rv)
+ir_visitor_status
+brw_lower_offset_array_visitor::visit_leave(ir_texture *ir)
 {
-   if (*rv == NULL || (*rv)->ir_type != ir_type_texture)
-      return;
-
-   ir_texture *ir = (ir_texture *) *rv;
   if (ir->op != ir_tg4 || !ir->offset || !ir->offset->type->is_array())
-      return;
+      return visit_continue;

   void *mem_ctx = ralloc_parent(ir);

@@ -73,9 +68,10 @@ brw_lower_offset_array_visitor::handle_rvalue(ir_rvalue **rv)
      base_ir->insert_before(assign(var, swizzle_w(tex), 1 << i));
   }

-   *rv = new (mem_ctx) ir_dereference_variable(var);
+   base_ir->replace_with(new (mem_ctx) ir_dereference_variable(var));

   progress = true;
+   return visit_continue;
 }

 extern "C" {
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -56,12 +56,29 @@ using namespace brw;

 static bool debug = false;

-class instruction_scheduler;
-
 class schedule_node : public exec_node
 {
 public:
-   schedule_node(backend_instruction *inst, instruction_scheduler *sched);
+   schedule_node(backend_instruction *inst, const struct brw_context *brw)
+   {
+      this->inst = inst;
+      this->child_array_size = 0;
+      this->children = NULL;
+      this->child_latency = NULL;
+      this->child_count = 0;
+      this->parent_count = 0;
+      this->unblocked_time = 0;
+      this->cand_generation = 0;
+
+      /* We can't measure Gen6 timings directly but expect them to be much
+       * closer to Gen7 than Gen4.
+       */
+      if (brw->gen >= 6)
+         set_latency_gen7(brw->is_haswell);
+      else
+         set_latency_gen4();
+   }
+
   void set_latency_gen4();
   void set_latency_gen7(bool is_haswell);

@@ -335,8 +352,6 @@ schedule_node::set_latency_gen7(bool is_haswell)
       * then around 140.  Presumably this is cache hit vs miss.
       */
      latency = 50;
-      break;
-
   case SHADER_OPCODE_UNTYPED_ATOMIC:
      /* Test code:
       *   mov(8)    g112<1>ud       0x00000000ud       { align1 WE_all 1Q };
@@ -393,24 +408,15 @@ schedule_node::set_latency_gen7(bool is_haswell)

 class instruction_scheduler {
 public:
-   instruction_scheduler(backend_visitor *v, int grf_count,
-                         instruction_scheduler_mode mode)
+   instruction_scheduler(backend_visitor *v, int grf_count, bool post_reg_alloc)
   {
      this->bv = v;
      this->mem_ctx = ralloc_context(NULL);
      this->grf_count = grf_count;
      this->instructions.make_empty();
      this->instructions_to_schedule = 0;
-      this->post_reg_alloc = (mode == SCHEDULE_POST);
-      this->mode = mode;
+      this->post_reg_alloc = post_reg_alloc;
      this->time = 0;
-      if (!post_reg_alloc) {
-         this->remaining_grf_uses = rzalloc_array(mem_ctx, int, grf_count);
-         this->grf_active = rzalloc_array(mem_ctx, bool, grf_count);
-      } else {
-         this->remaining_grf_uses = NULL;
-         this->grf_active = NULL;
-      }
   }

   ~instruction_scheduler()
@@ -436,10 +442,6 @@ public:
    */
   virtual int issue_time(backend_instruction *inst) = 0;

-   virtual void count_remaining_grf_uses(backend_instruction *inst) = 0;
-   virtual void update_register_pressure(backend_instruction *inst) = 0;
-   virtual int get_register_pressure_benefit(backend_instruction *inst) = 0;
-
   void schedule_instructions(backend_instruction *next_block_header);

   void *mem_ctx;
@@ -450,116 +452,27 @@ public:
   int time;
   exec_list instructions;
   backend_visitor *bv;
-
-   instruction_scheduler_mode mode;
-
-   /**
-    * Number of instructions left to schedule that reference each vgrf.
-    *
-    * Used so that we can prefer scheduling instructions that will end the
-    * live intervals of multiple variables, to reduce register pressure.
-    */
-   int *remaining_grf_uses;
-
-   /**
-    * Tracks whether each VGRF has had an instruction scheduled that uses it.
-    *
-    * This is used to estimate whether scheduling a new instruction will
-    * increase register pressure.
-    */
-   bool *grf_active;
 };

 class fs_instruction_scheduler : public instruction_scheduler
 {
 public:
-   fs_instruction_scheduler(fs_visitor *v, int grf_count,
-                            instruction_scheduler_mode mode);
+   fs_instruction_scheduler(fs_visitor *v, int grf_count, bool post_reg_alloc);
   void calculate_deps();
   bool is_compressed(fs_inst *inst);
   schedule_node *choose_instruction_to_schedule();
   int issue_time(backend_instruction *inst);
   fs_visitor *v;
-
-   void count_remaining_grf_uses(backend_instruction *inst);
-   void update_register_pressure(backend_instruction *inst);
-   int get_register_pressure_benefit(backend_instruction *inst);
 };

 fs_instruction_scheduler::fs_instruction_scheduler(fs_visitor *v,
                                                   int grf_count,
-                                                   instruction_scheduler_mode mode)
-   : instruction_scheduler(v, grf_count, mode),
+                                                   bool post_reg_alloc)
+   : instruction_scheduler(v, grf_count, post_reg_alloc),
     v(v)
 {
 }

-void
-fs_instruction_scheduler::count_remaining_grf_uses(backend_instruction *be)
-{
-   fs_inst *inst = (fs_inst *)be;
-
-   if (!remaining_grf_uses)
-      return;
-
-   if (inst->dst.file == GRF)
-      remaining_grf_uses[inst->dst.reg]++;
-
-   for (int i = 0; i < 3; i++) {
-      if (inst->src[i].file != GRF)
-         continue;
-
-      remaining_grf_uses[inst->src[i].reg]++;
-   }
-}
-
-void
-fs_instruction_scheduler::update_register_pressure(backend_instruction *be)
-{
-   fs_inst *inst = (fs_inst *)be;
-
-   if (!remaining_grf_uses)
-      return;
-
-   if (inst->dst.file == GRF) {
-      remaining_grf_uses[inst->dst.reg]--;
-      grf_active[inst->dst.reg] = true;
-   }
-
-   for (int i = 0; i < 3; i++) {
-      if (inst->src[i].file == GRF) {
-         remaining_grf_uses[inst->src[i].reg]--;
-         grf_active[inst->src[i].reg] = true;
-      }
-   }
-}
-
-int
-fs_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be)
-{
-   fs_inst *inst = (fs_inst *)be;
-   int benefit = 0;
-
-   if (inst->dst.file == GRF) {
-      if (remaining_grf_uses[inst->dst.reg] == 1)
-         benefit += v->virtual_grf_sizes[inst->dst.reg];
-      if (!grf_active[inst->dst.reg])
-         benefit -= v->virtual_grf_sizes[inst->dst.reg];
-   }
-
-   for (int i = 0; i < 3; i++) {
-      if (inst->src[i].file != GRF)
-         continue;
-
-      if (remaining_grf_uses[inst->src[i].reg] == 1)
-         benefit += v->virtual_grf_sizes[inst->src[i].reg];
-      if (!grf_active[inst->src[i].reg])
-         benefit -= v->virtual_grf_sizes[inst->src[i].reg];
-   }
-
-   return benefit;
-}
-
 class vec4_instruction_scheduler : public instruction_scheduler
 {
 public:
@@ -568,64 +481,19 @@ public:
   schedule_node *choose_instruction_to_schedule();
   int issue_time(backend_instruction *inst);
   vec4_visitor *v;
-
-   void count_remaining_grf_uses(backend_instruction *inst);
-   void update_register_pressure(backend_instruction *inst);
-   int get_register_pressure_benefit(backend_instruction *inst);
 };

 vec4_instruction_scheduler::vec4_instruction_scheduler(vec4_visitor *v,
                                                       int grf_count)
-   : instruction_scheduler(v, grf_count, SCHEDULE_POST),
+   : instruction_scheduler(v, grf_count, true),
     v(v)
 {
 }

-void
-vec4_instruction_scheduler::count_remaining_grf_uses(backend_instruction *be)
-{
-}
-
-void
-vec4_instruction_scheduler::update_register_pressure(backend_instruction *be)
-{
-}
-
-int
-vec4_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be)
-{
-   return 0;
-}
-
-schedule_node::schedule_node(backend_instruction *inst,
-                             instruction_scheduler *sched)
-{
-   struct brw_context *brw = sched->bv->brw;
-
-   this->inst = inst;
-   this->child_array_size = 0;
-   this->children = NULL;
-   this->child_latency = NULL;
-   this->child_count = 0;
-   this->parent_count = 0;
-   this->unblocked_time = 0;
-   this->cand_generation = 0;
-
-   /* We can't measure Gen6 timings directly but expect them to be much
-    * closer to Gen7 than Gen4.
-    */
-   if (!sched->post_reg_alloc)
-      this->latency = 1;
-   else if (brw->gen >= 6)
-      set_latency_gen7(brw->is_haswell);
-   else
-      set_latency_gen4();
-}
-
 void
 instruction_scheduler::add_inst(backend_instruction *inst)
 {
-   schedule_node *n = new(mem_ctx) schedule_node(inst, this);
+   schedule_node *n = new(mem_ctx) schedule_node(inst, bv->brw);

   assert(!inst->is_head_sentinel());
   assert(!inst->is_tail_sentinel());
@@ -1169,59 +1037,40 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
            continue;
         }

-         /* Most important: If we can definitely reduce register pressure, do
-          * so immediately.
+         /* Prefer instructions that recently became available for scheduling.
+          * These are the things that are most likely to (eventually) make a
+          * variable dead and reduce register pressure.  Typical register
+          * pressure estimates don't work for us because most of our pressure
+          * comes from texturing, where no single instruction to schedule will
+          * make a vec4 value dead.
          */
-         int register_pressure_benefit = get_register_pressure_benefit(n->inst);
-         int chosen_register_pressure_benefit =
-            get_register_pressure_benefit(chosen->inst);
-
-         if (register_pressure_benefit > 0 &&
-             register_pressure_benefit > chosen_register_pressure_benefit) {
+         if (n->cand_generation > chosen->cand_generation) {
            chosen = n;
            continue;
-         } else if (chosen_register_pressure_benefit > 0 &&
-                    (register_pressure_benefit <
-                     chosen_register_pressure_benefit)) {
+         } else if (n->cand_generation < chosen->cand_generation) {
            continue;
         }

-         if (mode == SCHEDULE_PRE_LIFO) {
-            /* Prefer instructions that recently became available for
-             * scheduling.  These are the things that are most likely to
-             * (eventually) make a variable dead and reduce register pressure.
-             * Typical register pressure estimates don't work for us because
-             * most of our pressure comes from texturing, where no single
-             * instruction to schedule will make a vec4 value dead.
+         /* On MRF-using chips, prefer non-SEND instructions.  If we don't do
+          * this, then because we prefer instructions that just became
+          * candidates, we'll end up in a pattern of scheduling a SEND, then
+          * the MRFs for the next SEND, then the next SEND, then the MRFs,
+          * etc., without ever consuming the results of a send.
+          */
+         if (v->brw->gen < 7) {
+            fs_inst *chosen_inst = (fs_inst *)chosen->inst;
+
+            /* We use regs_written > 1 as our test for the kind of send
+             * instruction to avoid -- only sends generate many regs, and a
+             * single-result send is probably actually reducing register
+             * pressure.
             */
-            if (n->cand_generation > chosen->cand_generation) {
+            if (inst->regs_written <= 1 && chosen_inst->regs_written > 1) {
               chosen = n;
               continue;
-            } else if (n->cand_generation < chosen->cand_generation) {
+            } else if (inst->regs_written > chosen_inst->regs_written) {
               continue;
            }
-
-            /* On MRF-using chips, prefer non-SEND instructions.  If we don't
-             * do this, then because we prefer instructions that just became
-             * candidates, we'll end up in a pattern of scheduling a SEND,
-             * then the MRFs for the next SEND, then the next SEND, then the
-             * MRFs, etc., without ever consuming the results of a send.
-             */
-            if (v->brw->gen < 7) {
-               fs_inst *chosen_inst = (fs_inst *)chosen->inst;
-
-               /* We use regs_written > 1 as our test for the kind of send
-                * instruction to avoid -- only sends generate many regs, and a
-                * single-result send is probably actually reducing register
-                * pressure.
-                */
-               if (inst->regs_written <= 1 && chosen_inst->regs_written > 1) {
-                  chosen = n;
-                  continue;
-               } else if (inst->regs_written > chosen_inst->regs_written) {
-                  continue;
-               }
-            }
         }

         /* For instructions pushed on the cands list at the same time, prefer
@@ -1304,7 +1153,6 @@ instruction_scheduler::schedule_instructions(backend_instruction *next_block_hea
      chosen->remove();
      next_block_header->insert_before(chosen->inst);
      instructions_to_schedule--;
-      update_register_pressure(chosen->inst);

      /* Update the clock for how soon an instruction could start after the
       * chosen one.
@@ -1380,15 +1228,6 @@ instruction_scheduler::run(exec_list *all_instructions)
      bv->dump_instructions();
   }

-   /* Populate the remaining GRF uses array to improve the pre-regalloc
-    * scheduling.
-    */
-   if (remaining_grf_uses) {
-      foreach_list(node, all_instructions) {
-         count_remaining_grf_uses((backend_instruction *)node);
-      }
-   }
-
   while (!next_block_header->is_tail_sentinel()) {
      /* Add things to be scheduled until we get to a new BB. */
      while (!next_block_header->is_tail_sentinel()) {
@@ -1416,18 +1255,18 @@ instruction_scheduler::run(exec_list *all_instructions)
 }

 void
-fs_visitor::schedule_instructions(instruction_scheduler_mode mode)
+fs_visitor::schedule_instructions(bool post_reg_alloc)
 {
   int grf_count;
-   if (mode == SCHEDULE_POST)
+   if (post_reg_alloc)
      grf_count = grf_used;
   else
      grf_count = virtual_grf_count;

-   fs_instruction_scheduler sched(this, grf_count, mode);
+   fs_instruction_scheduler sched(this, grf_count, post_reg_alloc);
   sched.run(&instructions);

-   if (unlikely(INTEL_DEBUG & DEBUG_WM) && mode == SCHEDULE_POST) {
+   if (unlikely(INTEL_DEBUG & DEBUG_WM) && post_reg_alloc) {
      printf("fs%d estimated execution time: %d cycles\n",
             dispatch_width, sched.time);
   }
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -59,12 +59,6 @@ public:
   bool predicate_inverse;
 };

-enum instruction_scheduler_mode {
-   SCHEDULE_PRE_NON_LIFO,
-   SCHEDULE_PRE_LIFO,
-   SCHEDULE_POST,
-};
-
 class backend_visitor : public ir_visitor {
 public:

--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -86,7 +86,7 @@ intel_horizontal_texture_alignment_unit(struct brw_context *brw,

 static unsigned int
 intel_vertical_texture_alignment_unit(struct brw_context *brw,
-                                      gl_format format, bool multisampled)
+                                     gl_format format)
 {
   /**
    * From the "Alignment Unit Size" section of various specs, namely:
@@ -110,6 +110,8 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
    *
    * On SNB+, non-special cases can be overridden by setting the SURFACE_STATE
    * "Surface Vertical Alignment" field to VALIGN_2 or VALIGN_4.
+    *
+    * We currently don't support multisampling.
    */
   if (_mesa_is_format_compressed(format))
      return 4;
@@ -117,9 +119,6 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
   if (format == MESA_FORMAT_S8)
      return brw->gen >= 7 ? 8 : 4;

-   if (multisampled)
-      return 4;
-
   GLenum base_format = _mesa_get_format_base_format(format);

   if (brw->gen >= 6 &&
@@ -277,10 +276,8 @@ brw_miptree_layout_texture_3d(struct brw_context *brw,
 void
 brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt)
 {
-   bool multisampled = mt->num_samples > 1;
   mt->align_w = intel_horizontal_texture_alignment_unit(brw, mt->format);
-   mt->align_h =
-      intel_vertical_texture_alignment_unit(brw, mt->format, multisampled);
+   mt->align_h = intel_vertical_texture_alignment_unit(brw, mt->format);

   switch (mt->target) {
   case GL_TEXTURE_CUBE_MAP:
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs.c
@@ -259,13 +259,6 @@ brw_upload_gs_prog(struct brw_context *brw)
         brw->vue_map_geom_out = brw->vue_map_vs;
         brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
      }
-
-      /* Other state atoms had better not try to access prog_data, since
-       * there's no GS program.
-       */
-      brw->gs.prog_data = NULL;
-      brw->gs.base.prog_data = NULL;
-
      return;
   }

--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -53,6 +53,7 @@ vec4_instruction::vec4_instruction(vec4_visitor *v,
   this->mlen = 0;
   this->base_mrf = 0;
   this->offset = 0;
+   this->ir = NULL;
   this->annotation = v->current_annotation;
 }

--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -701,7 +701,7 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw)
      for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) {
 	 if (intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[i])) {
 	    brw->vtbl.update_renderbuffer_surface(brw, ctx->DrawBuffer->_ColorDrawBuffers[i],
-                                                  ctx->DrawBuffer->NumLayers > 0, i);
+                                                  ctx->DrawBuffer->Layered, i);
 	 } else {
 	    brw->vtbl.update_null_renderbuffer_surface(brw, i);
 	 }
@@ -890,7 +890,7 @@ brw_upload_abo_surfaces(struct brw_context *brw,
      struct intel_buffer_object *intel_bo =
         intel_buffer_object(binding->BufferObject);
      drm_intel_bo *bo = intel_bufferobj_buffer(
-         brw, intel_bo, binding->Offset, intel_bo->Base.Size - binding->Offset);
+         brw, intel_bo, binding->Offset, bo->size - binding->Offset);

      brw->vtbl.create_raw_surface(brw, bo, binding->Offset,
                                   bo->size - binding->Offset,
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -121,7 +121,7 @@ upload_clip_state(struct brw_context *brw)
 	     dw2);
   OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
             U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
-             (fb->NumLayers > 0 ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX));
+             (fb->Layered ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX));
   ADVANCE_BATCH();
 }

--- a/Show More
+++ b/Show More