docs: Add sha256 sums for the 10.2.9 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Add release notes for the 10.2.9 release
2014-10-12 21:05:07 +01:00 · 2014-10-12 19:06:25 +01:00 · 2014-10-12 18:54:11 +01:00 · 2014-10-03 01:09:59 +01:00 · 2014-09-28 20:51:19 +01:00 · 2014-09-27 19:10:23 +01:00
15 changed files with 168 additions and 55 deletions
--- a/2
+++ b/2
@@ -1 +1 @@
-10.2.8
+10.2.9
--- a/configure.ac
+++ b/configure.ac
@@ -1631,11 +1631,10 @@ if test "x$enable_gallium_llvm" = xyes; then
        AC_COMPUTE_INT([LLVM_VERSION_MINOR], [LLVM_VERSION_MINOR],
            [#include "${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h"])
-        dnl In LLVM 3.4.1 patch level was defined in config.h and not
+        LLVM_VERSION_PATCH=`echo $LLVM_VERSION | cut -d. -f3 | egrep -o '^[[0-9]]+'`
-        dnl llvm-config.h
+        if test -z "$LLVM_VERSION_PATCH"; then
-        AC_COMPUTE_INT([LLVM_VERSION_PATCH], [LLVM_VERSION_PATCH],
+            LLVM_VERSION_PATCH=0
-            [#include "${LLVM_INCLUDEDIR}/llvm/Config/config.h"],
+        fi
            LLVM_VERSION_PATCH=0) dnl Default if LLVM_VERSION_PATCH not found
        if test -n "${LLVM_VERSION_MAJOR}"; then
            LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}"
--- a/docs/relnotes/10.2.8.html
+++ b/docs/relnotes/10.2.8.html
@@ -30,7 +30,9 @@ because compatibility contexts are not supported.
 <h2>SHA256 checksums</h2>
 <pre>
-TBD
+4c5a25ccaf1a9734bbd10d62a1420cc8fd35a1060ce679f2fc846769a25fbeec  MesaLib-10.2.8.tar.gz
 1ef9ad3f241788d454f2ff8c9d65b6849dfc31c8fe91f70fd2930b81c8af1398  MesaLib-10.2.8.tar.bz2
 d26218da3b44734b1d555267b4c63c48803c4c8b14d2bc53071be57014da37fa  MesaLib-10.2.8.zip
 </pre>
 <h2>New features</h2>
--- a/docs/relnotes/10.2.9.html
+++ b/docs/relnotes/10.2.9.html
@@ -0,0 +1,101 @@
 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
 <html lang="en">
 <head>
  <meta http-equiv="content-type" content="text/html; charset=utf-8">
  <title>Mesa Release Notes</title>
  <link rel="stylesheet" type="text/css" href="../mesa.css">
 </head>
 <body>
 <div class="header">
  <h1>The Mesa 3D Graphics Library</h1>
 </div>
 <iframe src="../contents.html"></iframe>
 <div class="content">
 <h1>Mesa 10.2.9 Release Notes / October 12, 2014</h1>
 <p>
 Mesa 10.2.9 is a bug fix release which fixes bugs found since the 10.2.8 release.
 This is the final planned release for the 10.2 branch.
 </p>
 <p>
 Mesa 10.2.9 implements the OpenGL 3.3 API, but the version reported by
 glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
 glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
 Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
 3.3 is <strong>only</strong> available if requested at context creation
 because compatibility contexts are not supported.
 </p>
 <h2>SHA256 checksums</h2>
 <pre>
 f8d62857eed8f604a57710c58a8ffcfb8dab2dc4977ec27c956c7c4fd14032f6  MesaLib-10.2.9.tar.gz
 f6031f8b7113a92325b60635c504c510490eebb2e707119bbff7bd86aa34657d  MesaLib-10.2.9.tar.bz2
 11c0ef4f3308fc29d9f15a77fd8f4842a946fce9e830250a1c95b171a446171a  MesaLib-10.2.9.zip
 </pre>
 <h2>New features</h2>
 <p>None</p>
 <h2>Bug fixes</h2>
 <p>This list is likely incomplete.</p>
 <ul>
 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79462">Bug 79462</a> - [NVC0/Codegen] Shader compilation falis in spill logic</li>
 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83570">Bug 83570</a> - Glyphy demo throws unhandled Integer division by zero exception</li>
 </ul>
 <h2>Changes</h2>
 <p>Andreas Pokorny (2):</p>
 <ul>
  <li>egl/drm: expose KHR_image_pixmap extension</li>
  <li>i915: Fix black buffers when importing prime fds</li>
 </ul>
 <p>Emil Velikov (2):</p>
 <ul>
  <li>docs: Add sha256 sums for the 10.2.8 release</li>
  <li>Update VERSION to 10.2.9</li>
 </ul>
 <p>Ilia Mirkin (1):</p>
 <ul>
  <li>nv50/ir: avoid deleting pseudo instructions too early</li>
 </ul>
 <p>Marek Olšák (3):</p>
 <ul>
  <li>radeonsi: release GS rings at context destruction</li>
  <li>radeonsi: properly destroy the GS copy shader and scratch_bo for compute</li>
  <li>st/dri: remove GALLIUM_MSAA and __GL_FSAA_MODE environment variables</li>
 </ul>
 <p>Roland Scheidegger (1):</p>
 <ul>
  <li>gallivm: fix idiv</li>
 </ul>
 <p>Thomas Hellstrom (1):</p>
 <ul>
  <li>st/xa: Fix regression in xa_yuv_planar_blit()</li>
 </ul>
 <p>Tom Stellard (1):</p>
 <ul>
  <li>configure.ac: Compute LLVM_VERSION_PATCH using llvm-config</li>
 </ul>
 <p>rconde (1):</p>
 <ul>
  <li>gallivm,tgsi: fix idiv by zero crash</li>
 </ul>
 </div>
 </body>
 </html>
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -572,6 +572,7 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
   }
   disp->Extensions.EXT_buffer_age = EGL_TRUE;
   disp->Extensions.KHR_image_pixmap = EGL_TRUE;
 #ifdef HAVE_WAYLAND_PLATFORM
   disp->Extensions.WL_bind_wayland_display = EGL_TRUE;
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
@@ -1248,8 +1248,24 @@ idiv_emit_cpu(
   struct lp_build_tgsi_context * bld_base,
   struct lp_build_emit_data * emit_data)
 {
-   emit_data->output[emit_data->chan] = lp_build_div(&bld_base->int_bld,
+   LLVMBuilderRef builder = bld_base->base.gallivm->builder;
-                                   emit_data->args[0], emit_data->args[1]);
+   LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint_bld,
                                        PIPE_FUNC_EQUAL, emit_data->args[1],
                                        bld_base->uint_bld.zero);
   /* We want to make sure that we never divide/mod by zero to not
    * generate sigfpe. We don't want to crash just because the
    * shader is doing something weird. */
   LLVMValueRef divisor = LLVMBuildOr(builder,
                                      div_mask,
                                      emit_data->args[1], "");
   LLVMValueRef result = lp_build_div(&bld_base->int_bld,
                                      emit_data->args[0], divisor);
   LLVMValueRef not_div_mask = LLVMBuildNot(builder,
                                            div_mask,"");
   /* idiv by zero doesn't have a guaranteed return value chose 0 for now. */
   emit_data->output[emit_data->chan] = LLVMBuildAnd(builder,
                                                     not_div_mask,
                                                     result, "");
 }
 /* TGSI_OPCODE_INEG (CPU Only) */
@@ -1675,15 +1691,15 @@ udiv_emit_cpu(
   LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint_bld,
                                        PIPE_FUNC_EQUAL, emit_data->args[1],
                                        bld_base->uint_bld.zero);
-   /* We want to make sure that we never divide/mod by zero to not 
+   /* We want to make sure that we never divide/mod by zero to not
-    * generate sigfpe. We don't want to crash just because the 
+    * generate sigfpe. We don't want to crash just because the
    * shader is doing something weird. */
   LLVMValueRef divisor = LLVMBuildOr(builder,
                                      div_mask,
                                      emit_data->args[1], "");
   LLVMValueRef result = lp_build_div(&bld_base->uint_bld,
                                      emit_data->args[0], divisor);
-   /* udiv by zero is guaranteed to return 0xffffffff */
+   /* udiv by zero is guaranteed to return 0xffffffff at least with d3d10 */
   emit_data->output[emit_data->chan] = LLVMBuildOr(builder,
                                                    div_mask,
                                                    result, "");
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -3332,10 +3332,10 @@ micro_idiv(union tgsi_exec_channel *dst,
           const union tgsi_exec_channel *src0,
           const union tgsi_exec_channel *src1)
 {
-   dst->i[0] = src0->i[0] / src1->i[0];
+   dst->i[0] = src1->i[0] ? src0->i[0] / src1->i[0] : 0;
-   dst->i[1] = src0->i[1] / src1->i[1];
+   dst->i[1] = src1->i[1] ? src0->i[1] / src1->i[1] : 0;
-   dst->i[2] = src0->i[2] / src1->i[2];
+   dst->i[2] = src1->i[2] ? src0->i[2] / src1->i[2] : 0;
-   dst->i[3] = src0->i[3] / src1->i[3];
+   dst->i[3] = src1->i[3] ? src0->i[3] / src1->i[3] : 0;
 }
 static void
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -25,6 +25,7 @@
 #include <stack>
 #include <limits>
 #include <tr1/unordered_set>
 namespace nv50_ir {
@@ -1544,6 +1545,11 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
      LValue *lval = it->first->asLValue();
      Symbol *mem = it->second ? it->second->asSym() : NULL;
      // Keep track of which instructions to delete later. Deleting them
      // inside the loop is unsafe since a single instruction may have
      // multiple destinations that all need to be spilled (like OP_SPLIT).
      std::tr1::unordered_set<Instruction *> to_del;
      for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
           ++d) {
         Value *slot = mem ?
@@ -1576,7 +1582,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
            d = lval->defs.erase(d);
            --d;
            if (slot->reg.file == FILE_MEMORY_LOCAL)
-               delete_Instruction(func->getProgram(), defi);
+               to_del.insert(defi);
            else
               defi->setDef(0, slot);
         } else {
@@ -1584,6 +1590,9 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
         }
      }
      for (std::tr1::unordered_set<Instruction *>::const_iterator it = to_del.begin();
           it != to_del.end(); ++it)
         delete_Instruction(func->getProgram(), *it);
   }
   // TODO: We're not trying to reuse old slots in a potential next iteration.
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -40,6 +40,8 @@ static void si_destroy_context(struct pipe_context *context)
 	si_release_all_descriptors(sctx);
 	pipe_resource_reference(&sctx->esgs_ring.buffer, NULL);
 	pipe_resource_reference(&sctx->gsvs_ring.buffer, NULL);
 	pipe_resource_reference(&sctx->null_const_buf.buffer, NULL);
 	r600_resource_reference(&sctx->border_color_table, NULL);
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2616,5 +2616,8 @@ out:
 void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader)
 {
 	if (shader->gs_copy_shader)
 		si_pipe_shader_destroy(ctx, shader->gs_copy_shader);
 	r600_resource_reference(&shader->bo, NULL);
 }
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2244,9 +2244,10 @@ static void si_delete_shader_selector(struct pipe_context *ctx,
 	while (p) {
 		c = p->next_variant;
-		if (sel->type == PIPE_SHADER_GEOMETRY)
+		if (sel->type == PIPE_SHADER_GEOMETRY) {
 			si_pm4_delete_state(sctx, gs, p->pm4);
-		else if (sel->type == PIPE_SHADER_FRAGMENT)
+			si_pm4_delete_state(sctx, vs, p->gs_copy_shader->pm4);
 		} else if (sel->type == PIPE_SHADER_FRAGMENT)
 			si_pm4_delete_state(sctx, ps, p->pm4);
 		else if (p->key.vs.as_es)
 			si_pm4_delete_state(sctx, es, p->pm4);
@@ -2259,7 +2260,7 @@ static void si_delete_shader_selector(struct pipe_context *ctx,
 	free(sel->tokens);
 	free(sel);
- }
+}
 static void si_delete_vs_shader(struct pipe_context *ctx, void *state)
 {
--- a/src/gallium/state_trackers/dri/common/dri_screen.c
+++ b/src/gallium/state_trackers/dri/common/dri_screen.c
@@ -205,37 +205,6 @@ dri_fill_in_modes(struct dri_screen *screen)
   return (const __DRIconfig **)configs;
 }
 /* The Gallium way to force MSAA. */
 DEBUG_GET_ONCE_NUM_OPTION(msaa, "GALLIUM_MSAA", 0);
 /* The NVIDIA way to force MSAA. The same variable is used by the NVIDIA
 * driver. */
 DEBUG_GET_ONCE_NUM_OPTION(msaa_nv, "__GL_FSAA_MODE", 0);
 static void
 dri_force_msaa_visual(struct st_visual *stvis,
                      struct pipe_screen *screen)
 {
   int i;
   int samples = debug_get_option_msaa();
   if (!samples)
      samples = debug_get_option_msaa_nv();
   if (samples <= 1)
      return; /* nothing to do */
   /* Choose a supported sample count greater than or equal to samples. */
   for (i = samples; i <= MSAA_VISUAL_MAX_SAMPLES; i++) {
      if (screen->is_format_supported(screen, stvis->color_format,
                                      PIPE_TEXTURE_2D, i,
                                      PIPE_BIND_RENDER_TARGET)) {
         stvis->samples = i;
         break;
      }
   }
 }
 /**
 * Roughly the converse of dri_fill_in_modes.
 */
@@ -260,10 +229,6 @@ dri_fill_st_visual(struct st_visual *stvis, struct dri_screen *screen,
   if (mode->sampleBuffers) {
      stvis->samples = mode->samples;
   }
   else {
      /* This must be done after stvis->color_format is set. */
      dri_force_msaa_visual(stvis, screen->base.screen);
   }
   switch (mode->depthBits) {
   default:
--- a/src/gallium/state_trackers/xa/xa_renderer.c
+++ b/src/gallium/state_trackers/xa/xa_renderer.c
@@ -530,11 +530,22 @@ renderer_draw_yuv(struct xa_context *r,
                         src_x, src_y, src_w, src_h,
                         dst_x, dst_y, dst_w, dst_h, srf);
   if (!r->scissor_valid) {
       r->scissor.minx = 0;
       r->scissor.miny = 0;
       r->scissor.maxx = r->dst->tex->width0;
       r->scissor.maxy = r->dst->tex->height0;
   }
   r->pipe->set_scissor_states(r->pipe, 0, 1, &r->scissor);
   cso_set_vertex_elements(r->cso, num_attribs, r->velems);
   util_draw_user_vertex_buffer(r->cso, r->buffer, PIPE_PRIM_QUADS,
                                4,	/* verts */
                                num_attribs);	/* attribs/vert */
   r->buffer_size = 0;
   xa_scissor_reset(r);
 }
 void
--- a/src/gallium/state_trackers/xa/xa_yuv.c
+++ b/src/gallium/state_trackers/xa/xa_yuv.c
@@ -146,6 +146,7 @@ xa_yuv_planar_blit(struct xa_context *r,
 	int w = box->x2 - box->x1;
 	int h = box->y2 - box->y1;
        xa_scissor_update(r, x, y, box->x2, box->y2);
 	renderer_draw_yuv(r,
 			  (float)src_x + scale_x * (x - dst_x),
 			  (float)src_y + scale_y * (y - dst_y),
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -616,6 +616,8 @@ intel_create_image_from_fds(__DRIscreen *screen,
      return NULL;
   }
   intel_setup_image_from_dimensions(image);
   image->planar_format = f;
   for (i = 0; i < f->nplanes; i++) {
      index = f->planes[i].buffer_index;
Author	SHA1	Message	Date
Emil Velikov	52bd154980	docs: Add sha256 sums for the 10.2.9 release Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>	2014-10-12 21:05:07 +01:00
Emil Velikov	9f1149876f	Add release notes for the 10.2.9 release Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>	2014-10-12 19:06:25 +01:00
Emil Velikov	b797208e6c	Update VERSION to 10.2.9 Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>	2014-10-12 18:54:11 +01:00
Thomas Hellstrom	8200c621a7	st/xa: Fix regression in xa_yuv_planar_blit() Commit "st/xa: scissor to help tilers" broke xa_yuv_planar_blit() and vmwgfx textured video. Fix this by implementing scissors also in the yuv draw path. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com> Cc: Rob Clark <robclark@freedesktop.org> Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org> (cherry picked from commit `46537f1d03`)	2014-10-03 01:09:59 +01:00
Marek Olšák	44dd7cbd52	st/dri: remove GALLIUM_MSAA and __GL_FSAA_MODE environment variables Some users don't understand that these variables can break OpenGL. The general is rule is that if an app supports MSAA, you mustn't use GALLIUM_MSAA. For example, if an app has an 8xMSAA FBO and GALLIUM_MSAA=4 is set, resolving the FBO to the back buffer will be rejected which will look like this on all gallium drivers: http://www.phoronix.com/scan.php?page=article&item=amd_radeonsi_msaa The environment variables also have no effect on modern apps like TF2, but there is still a performance hit due to wasted bandwidth and VRAM. In a nutshell, it does more harm than good. Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit `8449121971`)	2014-09-28 20:51:19 +01:00
Marek Olšák	bda7518e7c	radeonsi: properly destroy the GS copy shader and scratch_bo for compute Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit `dc05a9e4e0`) [Emil Velikov: remove unref scratch_bo, s/si_shader/si_pipe_shader/] Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>	2014-09-27 19:10:23 +01:00
Marek Olšák	7d3f6f7995	radeonsi: release GS rings at context destruction Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit `711623f7c8`) [Emil Velikov: s/ring/ring.buffer/] Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>	2014-09-27 19:07:55 +01:00
Tom Stellard	907da04eb6	configure.ac: Compute LLVM_VERSION_PATCH using llvm-config This is the only guaranteed way get the patch level for llvm, since the define cannot always be found in config.h depending on the version of llvm or the build system used. CC: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Jonathan Gray <jsg@jsg.id.au> (cherry picked from commit `ec566e0f16`)	2014-09-27 17:50:52 +01:00
Ilia Mirkin	18336b99b2	nv50/ir: avoid deleting pseudo instructions too early What happens is that a SPLIT operation is part of the spill node, and as a pseudo op, the instruction gets erased after processing its first def. However the later defs still need to refer to it, so instead delay deleting until after that whole RA node is done processing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79462 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org> (cherry picked from commit `0147c10c5f`)	2014-09-27 16:25:59 +01:00
Andreas Pokorny	38c5650656	i915: Fix black buffers when importing prime fds Width and Height of the imported image was never initialized from the imported bo. Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com> Reviewed-by: Daniel Stone <daniels@collabora.com> (cherry picked from commit `df341320c9`)	2014-09-27 16:04:03 +01:00
Andreas Pokorny	b4584d9eed	egl/drm: expose KHR_image_pixmap extension This changes enables EGL_KHR_image_pixmap in the egl drm platform, which is implemented there but has not been advertised yet. Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com> Reviewed-by: Daniel Stone <daniels@collabora.com> (cherry picked from commit `53b614bfd3`) Conflicts: src/egl/drivers/dri2/platform_drm.c	2014-09-27 16:04:03 +01:00
Roland Scheidegger	08923a1029	gallivm: fix idiv `ffeb77c7b0` had a typo which turned all signed integer divisions into unsigned ones. Oops. This gets us back the 51 little piglits (all from glsl built-in-functions, fs/vs/gs-op-div-int-ivec2 and similar). Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org> Reviewed-by: Jose Fonseca <jfonseca@vmware.com> (cherry picked from commit `5e1fcc6258`)	2014-09-27 16:04:03 +01:00
rconde	fc8fc3bfc8	gallivm,tgsi: fix idiv by zero crash While the result of signed integer division by zero is undefined by glsl (and doesn't exist with d3d10), we must not crash, so need to make sure we don't get sigfpe much like udiv already does. Unlike udiv where we return 0xffffffff (as required by d3d10) there is no requirement right now to return anything specific so we use zero. (cherry picked from commit `ffeb77c7b0`) Nominated-by: Roland Scheidegger <sroland@vmware.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83570	2014-09-23 00:54:04 +01:00
Emil Velikov	f95fcb1716	docs: Add sha256 sums for the 10.2.8 release Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>	2014-09-19 19:01:42 +01:00