Compare commits
14 Commits
mesa-10.3.
...
10.3
| Author | SHA1 | Date | |
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20e0546cc2 | ||
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6b00e5585a | ||
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e342f82fff | ||
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e635510ce3 | ||
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2c26f5cc96 | ||
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9bfdf3ae51 | ||
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9fbacc1945 | ||
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71cd8f1388 | ||
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87017f210d | ||
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8f22574e89 | ||
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3bcde5a954 | ||
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6ecffc89fd | ||
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4b1332dbf8 | ||
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2e49560a5c |
@@ -30,7 +30,9 @@ because compatibility contexts are not supported.
|
||||
|
||||
<h2>SHA256 checksums</h2>
|
||||
<pre>
|
||||
TBD
|
||||
c4d053d6bc6604cb5c93c99e0ef2e815c539f26dc5a03737eb3809bc1767d12f MesaLib-10.3.6.tar.gz
|
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8d43673c6788fbf85f9c36c3a95c61ccf46f8835fc9c0d85d34474490d80572b MesaLib-10.3.6.tar.bz2
|
||||
6b5b1e9a13949cfdb76fe51e8dcc3ea71e464a5ca73d11fdc29c20c4ba3f411a MesaLib-10.3.6.zip
|
||||
</pre>
|
||||
|
||||
<h2>New features</h2>
|
||||
|
||||
93
docs/relnotes/10.3.7.html
Normal file
93
docs/relnotes/10.3.7.html
Normal file
@@ -0,0 +1,93 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="content-type" content="text/html; charset=utf-8">
|
||||
<title>Mesa Release Notes</title>
|
||||
<link rel="stylesheet" type="text/css" href="../mesa.css">
|
||||
</head>
|
||||
<body>
|
||||
|
||||
<div class="header">
|
||||
<h1>The Mesa 3D Graphics Library</h1>
|
||||
</div>
|
||||
|
||||
<iframe src="../contents.html"></iframe>
|
||||
<div class="content">
|
||||
|
||||
<h1>Mesa 10.3.7 Release Notes / January 12, 2015</h1>
|
||||
|
||||
<p>
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Mesa 10.3.7 is a bug fix release which fixes bugs found since the 10.3.6 release.
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</p>
|
||||
<p>
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||||
Mesa 10.3.7 implements the OpenGL 3.3 API, but the version reported by
|
||||
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
|
||||
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
|
||||
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
|
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3.3 is <strong>only</strong> available if requested at context creation
|
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because compatibility contexts are not supported.
|
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</p>
|
||||
|
||||
<h2>SHA256 checksums</h2>
|
||||
<pre>
|
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bc13f33c19bc9f44a0565fdd51a8f9d1c0153a3365c429ceaf4ef43b7022b052 MesaLib-10.3.7.tar.gz
|
||||
43c6ced15e237cbb21b3082d7c0b42777c50c1f731d0d4b5efb5231063fb6a5b MesaLib-10.3.7.tar.bz2
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d821fd46baf804fecfcf403e901800a4b996c7dd1c83f20a354b46566a49026f MesaLib-10.3.7.zip
|
||||
</pre>
|
||||
|
||||
<h2>New features</h2>
|
||||
<p>None</p>
|
||||
|
||||
<h2>Bug fixes</h2>
|
||||
|
||||
<p>This list is likely incomplete.</p>
|
||||
|
||||
<ul>
|
||||
|
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<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85529">Bug 85529</a> - Surfaces not drawn in Unvanquished</li>
|
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|
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<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87619">Bug 87619</a> - Changes to state such as render targets change fragment shader without marking it dirty.</li>
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||||
|
||||
</ul>
|
||||
|
||||
<h2>Changes</h2>
|
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|
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<p>Chad Versace (2):</p>
|
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<ul>
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<li>i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()</li>
|
||||
<li>i965: Use safer pointer arithmetic in gather_oa_results()</li>
|
||||
</ul>
|
||||
|
||||
<p>Emil Velikov (2):</p>
|
||||
<ul>
|
||||
<li>docs: Add sha256 sums for the 10.3.6 release</li>
|
||||
<li>Update version to 10.3.7</li>
|
||||
</ul>
|
||||
|
||||
<p>Ilia Mirkin (2):</p>
|
||||
<ul>
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<li>nv50,nvc0: set vertex id base to index_bias</li>
|
||||
<li>nv50/ir: fix texture offsets in release builds</li>
|
||||
</ul>
|
||||
|
||||
<p>Kenneth Graunke (2):</p>
|
||||
<ul>
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<li>i965: Add missing BRW_NEW_*_PROG_DATA to texture/renderbuffer atoms.</li>
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||||
<li>i965: Fix start/base_vertex_location for >1 prims but !BRW_NEW_VERTICES.</li>
|
||||
</ul>
|
||||
|
||||
<p>Marek Olšák (3):</p>
|
||||
<ul>
|
||||
<li>glsl_to_tgsi: fix a bug in copy propagation</li>
|
||||
<li>vbo: ignore primitive restart if FixedIndex is enabled in DrawArrays</li>
|
||||
<li>st/mesa: fix GL_PRIMITIVE_RESTART_FIXED_INDEX</li>
|
||||
</ul>
|
||||
|
||||
<p>Michel Dänzer (1):</p>
|
||||
<ul>
|
||||
<li>radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0</li>
|
||||
</ul>
|
||||
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
@@ -772,7 +772,8 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i)
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||||
if (i->tex.useOffsets) {
|
||||
for (int c = 0; c < 3; ++c) {
|
||||
ImmediateValue val;
|
||||
assert(i->offset[0][c].getImmediate(val));
|
||||
if (!i->offset[0][c].getImmediate(val))
|
||||
assert(!"non-immediate offset");
|
||||
i->tex.offset[c] = val.reg.data.u32;
|
||||
i->offset[0][c].set(NULL);
|
||||
}
|
||||
|
||||
@@ -760,7 +760,8 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
|
||||
assert(i->tex.useOffsets == 1);
|
||||
for (c = 0; c < 3; ++c) {
|
||||
ImmediateValue val;
|
||||
assert(i->offset[0][c].getImmediate(val));
|
||||
if (!i->offset[0][c].getImmediate(val))
|
||||
assert(!"non-immediate offset passed to non-TXG");
|
||||
imm |= (val.reg.data.u32 & 0xf) << (c * 4);
|
||||
}
|
||||
if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) {
|
||||
|
||||
@@ -603,6 +603,13 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
|
||||
BEGIN_NV04(push, NV50_3D(EDGEFLAG), 1);
|
||||
PUSH_DATA (push, 1);
|
||||
|
||||
BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
|
||||
PUSH_DATA (push, 0);
|
||||
if (screen->base.class_3d >= NV84_3D_CLASS) {
|
||||
BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
|
||||
PUSH_DATA (push, 0);
|
||||
}
|
||||
|
||||
PUSH_KICK (push);
|
||||
}
|
||||
|
||||
|
||||
@@ -472,6 +472,10 @@ nv50_draw_arrays(struct nv50_context *nv50,
|
||||
if (nv50->state.index_bias) {
|
||||
BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
|
||||
PUSH_DATA (push, 0);
|
||||
if (nv50->screen->base.class_3d >= NV84_3D_CLASS) {
|
||||
BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
|
||||
PUSH_DATA (push, 0);
|
||||
}
|
||||
nv50->state.index_bias = 0;
|
||||
}
|
||||
|
||||
@@ -594,6 +598,10 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten,
|
||||
if (index_bias != nv50->state.index_bias) {
|
||||
BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
|
||||
PUSH_DATA (push, index_bias);
|
||||
if (nv50->screen->base.class_3d >= NV84_3D_CLASS) {
|
||||
BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
|
||||
PUSH_DATA (push, index_bias);
|
||||
}
|
||||
nv50->state.index_bias = index_bias;
|
||||
}
|
||||
|
||||
|
||||
@@ -227,6 +227,7 @@ locn_0f_ts:
|
||||
/* NVC0_3D_MACRO_DRAW_ELEMENTS_INDIRECT
|
||||
*
|
||||
* NOTE: Saves and restores VB_ELEMENT,INSTANCE_BASE.
|
||||
* Forcefully sets VERTEX_ID_BASE to the value of VB_ELEMENT_BASE.
|
||||
*
|
||||
* arg = mode
|
||||
* parm[0] = count
|
||||
@@ -247,6 +248,8 @@ locn_0f_ts:
|
||||
maddr 0x150d /* VB_ELEMENT,INSTANCE_BASE */
|
||||
send $r4
|
||||
send $r5
|
||||
maddr 0x446
|
||||
send $r4
|
||||
mov $r4 0x1
|
||||
dei_again:
|
||||
maddr 0x586 /* VERTEX_BEGIN_GL */
|
||||
@@ -258,8 +261,10 @@ dei_again:
|
||||
branz $r2 #dei_again
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mov $r1 (extrinsrt $r1 $r4 0 1 26) /* set INSTANCE_NEXT */
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||||
maddr 0x150d /* VB_ELEMENT,INSTANCE_BASE */
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exit send $r6
|
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send $r6
|
||||
send $r7
|
||||
exit maddr 0x446
|
||||
send $r6
|
||||
dei_end:
|
||||
exit
|
||||
nop
|
||||
|
||||
@@ -128,16 +128,18 @@ uint32_t mme9097_draw_elts_indirect[] = {
|
||||
0x00000301,
|
||||
0x00000201,
|
||||
0x017dc451,
|
||||
/* 0x000c: dei_again */
|
||||
/* 0x000e: dei_again */
|
||||
0x00002431,
|
||||
0x0004d007,
|
||||
/* 0x0017: dei_end */
|
||||
0x0005d007,
|
||||
0x00000501,
|
||||
/* 0x001b: dei_end */
|
||||
0x01434615,
|
||||
0x01438715,
|
||||
0x05434021,
|
||||
0x00002041,
|
||||
0x00002841,
|
||||
0x01118021,
|
||||
0x00002041,
|
||||
0x00004411,
|
||||
0x01618021,
|
||||
0x00000841,
|
||||
@@ -148,8 +150,10 @@ uint32_t mme9097_draw_elts_indirect[] = {
|
||||
0xfffe9017,
|
||||
0xd0410912,
|
||||
0x05434021,
|
||||
0x000030c1,
|
||||
0x00003041,
|
||||
0x00003841,
|
||||
0x011180a1,
|
||||
0x00003041,
|
||||
0x00000091,
|
||||
0x00000011,
|
||||
};
|
||||
|
||||
@@ -575,8 +575,9 @@ nvc0_draw_arrays(struct nvc0_context *nvc0,
|
||||
if (nvc0->state.index_bias) {
|
||||
/* index_bias is implied 0 if !info->indexed (really ?) */
|
||||
/* TODO: can we deactivate it for the VERTEX_BUFFER_FIRST command ? */
|
||||
PUSH_SPACE(push, 1);
|
||||
PUSH_SPACE(push, 2);
|
||||
IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0);
|
||||
IMMED_NVC0(push, NVC0_3D(VERTEX_ID), 0);
|
||||
nvc0->state.index_bias = 0;
|
||||
}
|
||||
|
||||
@@ -705,9 +706,11 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten,
|
||||
prim = nvc0_prim_gl(mode);
|
||||
|
||||
if (index_bias != nvc0->state.index_bias) {
|
||||
PUSH_SPACE(push, 2);
|
||||
PUSH_SPACE(push, 4);
|
||||
BEGIN_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 1);
|
||||
PUSH_DATA (push, index_bias);
|
||||
BEGIN_NVC0(push, NVC0_3D(VERTEX_ID), 1);
|
||||
PUSH_DATA (push, index_bias);
|
||||
nvc0->state.index_bias = index_bias;
|
||||
}
|
||||
|
||||
@@ -818,6 +821,7 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
|
||||
if (nvc0->state.index_bias) {
|
||||
/* index_bias is implied 0 if !info->indexed (really ?) */
|
||||
IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0);
|
||||
IMMED_NVC0(push, NVC0_3D(VERTEX_ID), 0);
|
||||
nvc0->state.index_bias = 0;
|
||||
}
|
||||
size = 4 * 4;
|
||||
|
||||
@@ -3207,8 +3207,10 @@ void si_init_config(struct si_context *sctx)
|
||||
break;
|
||||
}
|
||||
|
||||
/* Always use the default config when all backends are enabled. */
|
||||
if (rb_mask && util_bitcount(rb_mask) >= num_rb) {
|
||||
/* Always use the default config when all backends are enabled
|
||||
* (or when we failed to determine the enabled backends).
|
||||
*/
|
||||
if (!rb_mask || util_bitcount(rb_mask) >= num_rb) {
|
||||
si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG,
|
||||
raster_config);
|
||||
} else {
|
||||
|
||||
@@ -1063,11 +1063,8 @@ struct brw_context
|
||||
bool no_depth_or_stencil;
|
||||
|
||||
struct {
|
||||
/** Does the current draw use the index buffer? */
|
||||
bool indexed;
|
||||
|
||||
int start_vertex_location;
|
||||
int base_vertex_location;
|
||||
/** The value of gl_BaseVertex for the current _mesa_prim. */
|
||||
int gl_basevertex;
|
||||
|
||||
/**
|
||||
* Buffer and offset used for GL_ARB_shader_draw_parameters
|
||||
|
||||
@@ -181,14 +181,20 @@ static void brw_emit_prim(struct brw_context *brw,
|
||||
DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
|
||||
prim->start, prim->count);
|
||||
|
||||
int start_vertex_location = prim->start;
|
||||
int base_vertex_location = prim->basevertex;
|
||||
|
||||
if (prim->indexed) {
|
||||
vertex_access_type = brw->gen >= 7 ?
|
||||
GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
|
||||
GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
|
||||
start_vertex_location += brw->ib.start_vertex_offset;
|
||||
base_vertex_location += brw->vb.start_vertex_bias;
|
||||
} else {
|
||||
vertex_access_type = brw->gen >= 7 ?
|
||||
GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL :
|
||||
GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
|
||||
start_vertex_location += brw->vb.start_vertex_bias;
|
||||
}
|
||||
|
||||
/* We only need to trim the primitive count on pre-Gen6. */
|
||||
@@ -263,10 +269,10 @@ static void brw_emit_prim(struct brw_context *brw,
|
||||
vertex_access_type);
|
||||
}
|
||||
OUT_BATCH(verts_per_instance);
|
||||
OUT_BATCH(brw->draw.start_vertex_location);
|
||||
OUT_BATCH(start_vertex_location);
|
||||
OUT_BATCH(prim->num_instances);
|
||||
OUT_BATCH(prim->base_instance);
|
||||
OUT_BATCH(brw->draw.base_vertex_location);
|
||||
OUT_BATCH(base_vertex_location);
|
||||
ADVANCE_BATCH();
|
||||
|
||||
/* Only used on Sandybridge; harmless to set elsewhere. */
|
||||
@@ -430,9 +436,8 @@ static bool brw_try_draw_prims( struct gl_context *ctx,
|
||||
}
|
||||
}
|
||||
|
||||
brw->draw.indexed = prims[i].indexed;
|
||||
brw->draw.start_vertex_location = prims[i].start;
|
||||
brw->draw.base_vertex_location = prims[i].basevertex;
|
||||
brw->draw.gl_basevertex =
|
||||
prims[i].indexed ? prims[i].basevertex : prims[i].start;
|
||||
|
||||
drm_intel_bo_unreference(brw->draw.draw_params_bo);
|
||||
|
||||
|
||||
@@ -607,19 +607,9 @@ brw_prepare_vertices(struct brw_context *brw)
|
||||
void
|
||||
brw_prepare_shader_draw_parameters(struct brw_context *brw)
|
||||
{
|
||||
int *gl_basevertex_value;
|
||||
if (brw->draw.indexed) {
|
||||
brw->draw.start_vertex_location += brw->ib.start_vertex_offset;
|
||||
brw->draw.base_vertex_location += brw->vb.start_vertex_bias;
|
||||
gl_basevertex_value = &brw->draw.base_vertex_location;
|
||||
} else {
|
||||
brw->draw.start_vertex_location += brw->vb.start_vertex_bias;
|
||||
gl_basevertex_value = &brw->draw.start_vertex_location;
|
||||
}
|
||||
|
||||
/* For non-indirect draws, upload gl_BaseVertex. */
|
||||
if (brw->vs.prog_data->uses_vertexid && brw->draw.draw_params_bo == NULL) {
|
||||
intel_upload_data(brw, gl_basevertex_value, 4, 4,
|
||||
intel_upload_data(brw, &brw->draw.gl_basevertex, 4, 4,
|
||||
&brw->draw.draw_params_bo,
|
||||
&brw->draw.draw_params_offset);
|
||||
}
|
||||
|
||||
@@ -907,7 +907,7 @@ gather_oa_results(struct brw_context *brw,
|
||||
return;
|
||||
}
|
||||
|
||||
const int snapshot_size = brw->perfmon.entries_per_oa_snapshot;
|
||||
const ptrdiff_t snapshot_size = brw->perfmon.entries_per_oa_snapshot;
|
||||
|
||||
/* First, add the contributions from the "head" interval:
|
||||
* (snapshot taken at BeginPerfMonitor time,
|
||||
|
||||
@@ -535,6 +535,7 @@ brw_update_null_renderbuffer_surface(struct brw_context *brw, unsigned int unit)
|
||||
drm_intel_bo *bo = NULL;
|
||||
unsigned pitch_minus_1 = 0;
|
||||
uint32_t multisampling_state = 0;
|
||||
/* CACHE_NEW_WM_PROG */
|
||||
uint32_t surf_index =
|
||||
brw->wm.prog_data->binding_table.render_target_start + unit;
|
||||
|
||||
@@ -620,6 +621,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
|
||||
uint32_t format = 0;
|
||||
/* _NEW_BUFFERS */
|
||||
mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
|
||||
/* CACHE_NEW_WM_PROG */
|
||||
uint32_t surf_index =
|
||||
brw->wm.prog_data->binding_table.render_target_start + unit;
|
||||
|
||||
@@ -737,7 +739,7 @@ const struct brw_tracked_state brw_renderbuffer_surfaces = {
|
||||
.mesa = (_NEW_COLOR |
|
||||
_NEW_BUFFERS),
|
||||
.brw = BRW_NEW_BATCH,
|
||||
.cache = 0
|
||||
.cache = CACHE_NEW_WM_PROG,
|
||||
},
|
||||
.emit = brw_update_renderbuffer_surfaces,
|
||||
};
|
||||
@@ -764,6 +766,8 @@ update_stage_texture_surfaces(struct brw_context *brw,
|
||||
struct gl_context *ctx = &brw->ctx;
|
||||
|
||||
uint32_t *surf_offset = stage_state->surf_offset;
|
||||
|
||||
/* CACHE_NEW_*_PROG */
|
||||
if (for_gather)
|
||||
surf_offset += stage_state->prog_data->binding_table.gather_texture_start;
|
||||
else
|
||||
@@ -828,7 +832,7 @@ const struct brw_tracked_state brw_texture_surfaces = {
|
||||
BRW_NEW_VERTEX_PROGRAM |
|
||||
BRW_NEW_GEOMETRY_PROGRAM |
|
||||
BRW_NEW_FRAGMENT_PROGRAM,
|
||||
.cache = 0
|
||||
.cache = CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG | CACHE_NEW_WM_PROG,
|
||||
},
|
||||
.emit = brw_update_texture_surfaces,
|
||||
};
|
||||
|
||||
@@ -494,8 +494,8 @@ linear_to_tiled(uint32_t xt1, uint32_t xt2,
|
||||
/* Translate by (xt,yt) for single-tile copier. */
|
||||
tile_copy(x0-xt, x1-xt, x2-xt, x3-xt,
|
||||
y0-yt, y1-yt,
|
||||
dst + xt * th + yt * dst_pitch,
|
||||
src + xt + yt * src_pitch,
|
||||
dst + (ptrdiff_t) xt * th + (ptrdiff_t) yt * dst_pitch,
|
||||
src + (ptrdiff_t) xt + (ptrdiff_t) yt * src_pitch,
|
||||
src_pitch,
|
||||
swizzle_bit,
|
||||
mem_copy);
|
||||
@@ -660,7 +660,8 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
|
||||
linear_to_tiled(
|
||||
xoffset * cpp, (xoffset + width) * cpp,
|
||||
yoffset, yoffset + height,
|
||||
bo->virtual, pixels - yoffset * src_pitch - xoffset * cpp,
|
||||
bo->virtual,
|
||||
pixels - (ptrdiff_t) yoffset * src_pitch - (ptrdiff_t) xoffset * cpp,
|
||||
image->mt->pitch, src_pitch,
|
||||
brw->has_swizzling,
|
||||
image->mt->tiling,
|
||||
|
||||
@@ -40,6 +40,7 @@
|
||||
#include "main/image.h"
|
||||
#include "main/bufferobj.h"
|
||||
#include "main/macros.h"
|
||||
#include "main/varray.h"
|
||||
|
||||
#include "vbo/vbo.h"
|
||||
|
||||
@@ -234,7 +235,7 @@ st_draw_vbo(struct gl_context *ctx,
|
||||
* so we only set these fields for indexed drawing:
|
||||
*/
|
||||
info.primitive_restart = ctx->Array._PrimitiveRestart;
|
||||
info.restart_index = ctx->Array.RestartIndex;
|
||||
info.restart_index = _mesa_primitive_restart_index(ctx, ib->type);
|
||||
}
|
||||
else {
|
||||
/* Transform feedback drawing is always non-indexed. */
|
||||
|
||||
@@ -3564,7 +3564,8 @@ glsl_to_tgsi_visitor::copy_propagate(void)
|
||||
first = copy_chan;
|
||||
} else {
|
||||
if (first->src[0].file != copy_chan->src[0].file ||
|
||||
first->src[0].index != copy_chan->src[0].index) {
|
||||
first->src[0].index != copy_chan->src[0].index ||
|
||||
first->src[0].index2D != copy_chan->src[0].index2D) {
|
||||
good = false;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -620,7 +620,8 @@ vbo_draw_arrays(struct gl_context *ctx, GLenum mode, GLint start,
|
||||
prim[0].is_indirect = 0;
|
||||
|
||||
/* Implement the primitive restart index */
|
||||
if (ctx->Array.PrimitiveRestart && ctx->Array.RestartIndex < count) {
|
||||
if (ctx->Array.PrimitiveRestart && !ctx->Array.PrimitiveRestartFixedIndex &&
|
||||
ctx->Array.RestartIndex < count) {
|
||||
GLuint primCount = 0;
|
||||
|
||||
if (ctx->Array.RestartIndex == start) {
|
||||
|
||||
Reference in New Issue
Block a user