docs: Add sha256 sums for the 10.4.7 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

VERSION

@@ -1 +1 @@
-10.4.0-rc4
+10.4.7

bin/.cherry-ignore

@@ -1,2 +1,18 @@
 # No whitespace commits in stable.
-a10bf5c10caf27232d4df8da74d5c35c23eb883d
+a10bf5c10caf27232d4df8da74d5c35c23eb883d
+
+# The following patches address code which is missing in 10.4
+# http://lists.freedesktop.org/archives/mesa-dev/2015-March/078515.html
+06084652fefe49c3d6bf1b476ff74ff602fdc22a common: Correct texture init for meta pbo uploads and downloads.
+
+# http://lists.freedesktop.org/archives/mesa-dev/2015-March/078547.html
+ccc5ce6f72c1ec86be4dfcef96c0b51fba0faa6d common: Correct PBO 2D_ARRAY handling.
+
+# http://lists.freedesktop.org/archives/mesa-dev/2015-March/078549.html
+546aba143d13ba3f993ead4cc30b2404abfc0202 common: Fix PBOs for 1D_ARRAY.
+
+# http://lists.freedesktop.org/archives/mesa-dev/2015-March/078501.html
+2b2fa1865248c6e3b7baec81c4f92774759b201f mesa: Indent break statements and add a missing one.
+
+# http://lists.freedesktop.org/archives/mesa-dev/2015-March/078502.html
+87109acbed9c9b52f33d58ca06d9048d0ac7a215 mesa: Free memory allocated for luminance in readpixels.

bin/get-pick-list.sh

@@ -14,7 +14,7 @@ git log --reverse --grep="cherry picked from commit" origin/master..HEAD |\
 	sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked
 
 # Grep for commits that were marked as a candidate for the stable tree.
-git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*mesa-stable\)' HEAD..origin/master |\
+git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*10\.4.*mesa-stable\)' HEAD..origin/master |\
 while read sha
 do
 	# Check to see whether the patch is on the ignore list.

configure.ac

@@ -252,8 +252,16 @@ AC_SUBST([VISIBILITY_CXXFLAGS])
 dnl
 dnl Optional flags, check for compiler support
 dnl
+SSE41_CFLAGS="-msse4.1"
+dnl Code compiled by GCC with -msse* assumes a 16 byte aligned
+dnl stack, but on x86-32 such alignment is not guaranteed.
+case "$target_cpu" in
+i?86)
+    SSE41_CFLAGS="$SSE41_CFLAGS -mstackrealign"
+    ;;
+esac
 save_CFLAGS="$CFLAGS"
-CFLAGS="-msse4.1 $CFLAGS"
+CFLAGS="$SSE41_CFLAGS $CFLAGS"
 AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
 #include <smmintrin.h>
 int main () {
@@ -266,6 +274,7 @@ if test "x$SSE41_SUPPORTED" = x1; then
     DEFINES="$DEFINES -DUSE_SSE41"
 fi
 AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1])
+AC_SUBST([SSE41_CFLAGS], $SSE41_CFLAGS)
 
 dnl Can't have static and shared libraries, default to static if user
 dnl explicitly requested. If both disabled, set to static since shared
@@ -1707,7 +1716,7 @@ if test "x$enable_gallium_llvm" = xyes; then
         fi
 
         if test "x$enable_opencl" = xyes; then
-            LLVM_COMPONENTS="${LLVM_COMPONENTS} ipo linker instrumentation"
+            LLVM_COMPONENTS="${LLVM_COMPONENTS} all-targets ipo linker instrumentation"
             # LLVM 3.3 >= 177971 requires IRReader
             if $LLVM_CONFIG --components | grep -qw 'irreader'; then
                 LLVM_COMPONENTS="${LLVM_COMPONENTS} irreader"

docs/index.html

@@ -16,6 +16,13 @@
 
 <h1>News</h1>
 
+<h2>December 14, 2014</h2>
+<p>
+<a href="relnotes/10.4.html">Mesa 10.4</a> is released.  This is a new
+development release.  See the release notes for more information about
+the release.
+</p>
+
 <h2>November 8, 2014</h2>
 <p>
 <a href="relnotes/10.3.3.html">Mesa 10.3.3</a> is released.

docs/relnotes.html

@@ -21,6 +21,7 @@ The release notes summarize what's new or changed in each Mesa release.
 </p>
 
 <ul>
+<li><a href="relnotes/10.4.html">10.4 release notes</a>
 <li><a href="relnotes/10.3.3.html">10.3.3 release notes</a>
 <li><a href="relnotes/10.3.2.html">10.3.2 release notes</a>
 <li><a href="relnotes/10.3.1.html">10.3.1 release notes</a>

docs/relnotes/10.2.html

@@ -88,6 +88,8 @@ following options during configure, if you would like support for svga driver
 Note: The files are installed in $(libdir)/gallium-pipe/ and the interface
 between them and libxatracker.so is <strong>not</strong> stable.
 </p>
+
+<li>The environment variable GALLIUM_MSAA that forced a multisample GLX visual was removed.</li>
 </ul>
 
 </div>

docs/relnotes/10.3.html

@@ -327,6 +327,7 @@ DRM drivers that don't have a full-fledged GEM (such as qxl or simpledrm)</li>
 <li>Removed support for the GL_ATI_envmap_bumpmap extension</li>
 <li>The hacky --enable-32/64-bit is no longer available in configure. To build
 32/64 bit mesa refer to the default method recommended by your distribution</li>
+</li>The environment variable GALLIUM_MSAA that forced a multisample GLX visual was removed.</li>
 </ul>
 
 </div>

docs/relnotes/10.4.1.html

@@ -0,0 +1,97 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.1 Release Notes / December 29, 2014</h1>
+
+<p>
+Mesa 10.4.1 is a bug fix release which fixes bugs found since the 10.4.0 release.
+</p>
+<p>
+Mesa 10.4.1 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+5311285e791a6bfaa468ad002bd1e1164acb3eaa040b5a1bf958bdb7c27e0a9d  MesaLib-10.4.1.tar.gz
+91e8b71c8aff4cb92022a09a872b1c5d1ae5bfec8c6c84dbc4221333da5bf1ca  MesaLib-10.4.1.tar.bz2
+e09c8135f5a86ecb21182c6f8959aafd39ae2f98858fdf7c0e25df65b5abcdb8  MesaLib-10.4.1.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82585">Bug 82585</a> - geometry shader with optional out variable segfaults</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82991">Bug 82991</a> - Inverted bumpmap in webgl applications</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83908">Bug 83908</a> - [i965] Incorrect icon colors in Steam Big Picture</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Andres Gomez (1):</p>
+<ul>
+  <li>i965/brw_reg: struct constructor now needs explicit negate and abs values.</li>
+</ul>
+
+<p>Cody Northrop (1):</p>
+<ul>
+  <li>i965: Require pixel alignment for GPU copy blit</li>
+</ul>
+
+<p>Emil Velikov (3):</p>
+<ul>
+  <li>docs: Add 10.4 sha256 sums, news item and link release notes</li>
+  <li>Revert "glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)"</li>
+  <li>Update version to 10.4.1</li>
+</ul>
+
+<p>Ian Romanick (2):</p>
+<ul>
+  <li>linker: Wrap access of producer_var with a NULL check</li>
+  <li>linker: Assign varying locations geometry shader inputs for SSO</li>
+</ul>
+
+<p>Mario Kleiner (4):</p>
+<ul>
+  <li>glx/dri3: Fix glXWaitForSbcOML() to handle targetSBC==0 correctly. (v2)</li>
+  <li>glx/dri3: Track separate (ust, msc) for PresentPixmap vs. PresentNotifyMsc (v2)</li>
+  <li>glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)</li>
+  <li>glx/dri3: Don't fail on glXSwapBuffersMscOML(dpy, window, 0, 0, 0) (v2)</li>
+</ul>
+
+<p>Maxence Le Doré (1):</p>
+<ul>
+  <li>glsl: Add gl_MaxViewports to available builtin constants</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.2.html

@@ -0,0 +1,127 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.2 Release Notes / January 12, 2015</h1>
+
+<p>
+Mesa 10.4.2 is a bug fix release which fixes bugs found since the 10.4.1 release.
+</p>
+<p>
+Mesa 10.4.2 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+e303e77dd774df0d051b2870b165f98c97084a55980f884731df89c1b56a6146  MesaLib-10.4.2.tar.gz
+08a119937d9f2aa2f66dd5de97baffc2a6e675f549e40e699a31f5485d15327f  MesaLib-10.4.2.tar.bz2
+c2c2921a80a3395824f02bee4572a6a17d6a12a928a3e497618eeea04fb06490  MesaLib-10.4.2.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85529">Bug 85529</a> - Surfaces not drawn in Unvanquished</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87619">Bug 87619</a> - Changes to state such as render targets change fragment shader without marking it dirty.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87658">Bug 87658</a> - [llvmpipe] SEGV in sse2_has_daz on ancient Pentium4-M</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87913">Bug 87913</a> - CPU cacheline size of 0 can be returned by CPUID leaf 0x80000006 in some virtual machines</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Chad Versace (2):</p>
+<ul>
+  <li>i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()</li>
+  <li>i965: Use safer pointer arithmetic in gather_oa_results()</li>
+</ul>
+
+<p>Dave Airlie (3):</p>
+<ul>
+  <li>Revert "r600g/sb: fix issues cause by GLSL switching to loops for switch"</li>
+  <li>r600g: fix regression since UCMP change</li>
+  <li>r600g/sb: implement r600 gpr index workaround. (v3.1)</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.1 release</li>
+  <li>Update version to 10.4.2</li>
+</ul>
+
+<p>Ilia Mirkin (2):</p>
+<ul>
+  <li>nv50,nvc0: set vertex id base to index_bias</li>
+  <li>nv50/ir: fix texture offsets in release builds</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+  <li>i965: Add missing BRW_NEW_*_PROG_DATA to texture/renderbuffer atoms.</li>
+  <li>i965: Fix start/base_vertex_location for &gt;1 prims but !BRW_NEW_VERTICES.</li>
+</ul>
+
+<p>Leonid Shatz (1):</p>
+<ul>
+  <li>gallium/util: make sure cache line size is not zero</li>
+</ul>
+
+<p>Marek Olšák (4):</p>
+<ul>
+  <li>glsl_to_tgsi: fix a bug in copy propagation</li>
+  <li>vbo: ignore primitive restart if FixedIndex is enabled in DrawArrays</li>
+  <li>st/mesa: fix GL_PRIMITIVE_RESTART_FIXED_INDEX</li>
+  <li>radeonsi: fix VertexID for OpenGL</li>
+</ul>
+
+<p>Michel Dänzer (1):</p>
+<ul>
+  <li>radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+  <li>gallium/util: fix crash with daz detection on x86</li>
+</ul>
+
+<p>Tiziano Bacocco (1):</p>
+<ul>
+  <li>nv50,nvc0: implement half_pixel_center</li>
+</ul>
+
+<p>Vadim Girlin (1):</p>
+<ul>
+  <li>r600g/sb: fix issues with loops created for switch</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.3.html

@@ -0,0 +1,145 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.3 Release Notes / January 24, 2015</h1>
+
+<p>
+Mesa 10.4.3 is a bug fix release which fixes bugs found since the 10.4.2 release.
+</p>
+<p>
+Mesa 10.4.3 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+c53eaafc83d9c6315f63e0904d9954d929b841b0b2be7a328eeb6e14f1376129  MesaLib-10.4.3.tar.gz
+ef6ecc9c2f36c9f78d1662382a69ae961f38f03af3a0c3268e53f351aa1978ad  MesaLib-10.4.3.tar.bz2
+179325fc8ec66529d3b0d0c43ef61a33a44d91daa126c3bbdd1efdfd25a7db1d  MesaLib-10.4.3.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80568">Bug 80568</a> - [gen4] GPU Crash During Google Chrome Operation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85367">Bug 85367</a> - [gen4] GPU hang in glmark-es2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85696">Bug 85696</a> - r600g+nine: Bioshock shader failure after 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88219">Bug 88219</a> - include/c11/threads_posix.h:197: undefined reference to `pthread_mutex_lock'</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Axel Davy (39):</p>
+<ul>
+  <li>st/nine: Add new texture format strings</li>
+  <li>st/nine: Correctly advertise D3DPMISCCAPS_CLIPTLVERTS</li>
+  <li>st/nine: NineBaseTexture9: fix setting of last_layer</li>
+  <li>st/nine: CubeTexture: fix GetLevelDesc</li>
+  <li>st/nine: Fix crash when deleting non-implicit swapchain</li>
+  <li>st/nine: Return D3DERR_INVALIDCALL when trying to create a texture of bad format</li>
+  <li>st/nine: NineBaseTexture9: update sampler view creation</li>
+  <li>st/nine: Check if srgb format is supported before trying to use it.</li>
+  <li>st/nine: Add ATI1 and ATI2 support</li>
+  <li>st/nine: Rework of boolean constants</li>
+  <li>st/nine: Convert integer constants to floats before storing them when cards don't support integers</li>
+  <li>st/nine: Remove some shader unused code</li>
+  <li>st/nine: Saturate oFog and oPts vs outputs</li>
+  <li>st/nine: Correctly declare NineTranslateInstruction_Mkxn inputs</li>
+  <li>st/nine: Fix typo for M4x4</li>
+  <li>st/nine: Fix POW implementation</li>
+  <li>st/nine: Handle RSQ special cases</li>
+  <li>st/nine: Handle NRM with input of null norm</li>
+  <li>st/nine: Correct LOG on negative values</li>
+  <li>st/nine: Rewrite LOOP implementation, and a0 aL handling</li>
+  <li>st/nine: Fix CND implementation</li>
+  <li>st/nine: Clamp ps 1.X constants</li>
+  <li>st/nine: Fix some fixed function pipeline operation</li>
+  <li>st/nine: Implement TEXCOORD special behaviours</li>
+  <li>st/nine: Fill missing dst and src number for some instructions.</li>
+  <li>st/nine: Fix TEXM3x3 and implement TEXM3x3VSPEC</li>
+  <li>st/nine: implement TEXM3x2DEPTH</li>
+  <li>st/nine: Implement TEXM3x2TEX</li>
+  <li>st/nine: Implement TEXM3x3SPEC</li>
+  <li>st/nine: Implement TEXDEPTH</li>
+  <li>st/nine: Implement TEXDP3</li>
+  <li>st/nine: Implement TEXDP3TEX</li>
+  <li>st/nine: Implement TEXREG2AR, TEXREG2GB and TEXREG2RGB</li>
+  <li>st/nine: Correct rules for relative adressing and constants.</li>
+  <li>st/nine: Remove unused code for ps</li>
+  <li>st/nine: Fix sm3 relative addressing for non-debug build</li>
+  <li>st/nine: Add variables containing the size of the constant buffers</li>
+  <li>st/nine: Allocate the correct size for the user constant buffer</li>
+  <li>st/nine: Allocate vs constbuf buffer for indirect addressing once.</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.2 release</li>
+  <li>Update version to 10.4.3</li>
+</ul>
+
+<p>Jason Ekstrand (1):</p>
+<ul>
+  <li>mesa: Fix clamping to -1.0 in snorm_to_float</li>
+</ul>
+
+<p>Jonathan Gray (1):</p>
+<ul>
+  <li>glsl: Link glsl_test with pthreads library.</li>
+</ul>
+
+<p>Jose Fonseca (1):</p>
+<ul>
+  <li>nine: Drop use of TGSI_OPCODE_CND.</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+  <li>i965: Respect the no_8 flag on Gen6, not just Gen7+.</li>
+  <li>i965: Work around mysterious Gen4 GPU hangs with minimal state changes.</li>
+</ul>
+
+<p>Stanislaw Halik (1):</p>
+<ul>
+  <li>st/nine: Hack to generate resource if it doesn't exist when getting view</li>
+</ul>
+
+<p>Xavier Bouchoux (3):</p>
+<ul>
+  <li>st/nine: Additional defines to d3dtypes.h</li>
+  <li>st/nine: Add missing c++ declaration for IDirect3DVolumeTexture9</li>
+  <li>st/nine: Fix D3DRS_POINTSPRITE support</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.4.html

@@ -0,0 +1,100 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.4 Release Notes / February 06, 2015</h1>
+
+<p>
+Mesa 10.4.4 is a bug fix release which fixes bugs found since the 10.4.3 release.
+</p>
+<p>
+Mesa 10.4.4 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+5cb427eaf980cb8555953e9928f5797979ed783e277745d5f8cbae8bc5364086  MesaLib-10.4.4.tar.gz
+f18a967e9c4d80e054b2fdff8c130ce6e6d1f8eecfc42c9f354f8628d8b4df1c  MesaLib-10.4.4.tar.bz2
+86baad73b77920c80fe58402a905e7dd17e3ea10ead6ea7d3afdc0a56c860bd7  MesaLib-10.4.4.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88662">Bug 88662</a> - unaligned access to gl_dlist_node</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88930">Bug 88930</a> - [osmesa] osbuffer-&gt;textures should be indexed by attachment type</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Brian Paul (1):</p>
+<ul>
+  <li>mesa: fix display list 8-byte alignment issue</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.3 release</li>
+  <li>Update version to 10.4.4</li>
+</ul>
+
+<p>José Fonseca (1):</p>
+<ul>
+  <li>egl: Pass the correct X visual depth to xcb_put_image().</li>
+</ul>
+
+<p>Mario Kleiner (1):</p>
+<ul>
+  <li>glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)</li>
+</ul>
+
+<p>Matt Turner (1):</p>
+<ul>
+  <li>gallium/util: Don't use __builtin_clrsb in util_last_bit().</li>
+</ul>
+
+<p>Niels Ole Salscheider (1):</p>
+<ul>
+  <li>configure: Link against all LLVM targets when building clover</li>
+</ul>
+
+<p>Park, Jeongmin (1):</p>
+<ul>
+  <li>st/osmesa: Fix osbuffer-&gt;textures indexing</li>
+</ul>
+
+<p>Ville Syrjälä (1):</p>
+<ul>
+  <li>i965: Fix max_wm_threads for CHV</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.5.html

@@ -0,0 +1,114 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.5 Release Notes / February 21, 2015</h1>
+
+<p>
+Mesa 10.4.5 is a bug fix release which fixes bugs found since the 10.4.4 release.
+</p>
+<p>
+Mesa 10.4.5 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+e12bbdaee9a758617e8ebd0bb0e987f72addd11db2e4da25ba695e386cd63843  MesaLib-10.4.5.tar.gz
+bf60000700a9d58e3aca2bfeee7e781053b0d839e61a95b1883e05a2dee247a0  MesaLib-10.4.5.tar.bz2
+3b926de8eee500bb67cf85332c51292f826cc539b8636382aadbb8e70c76527a  MesaLib-10.4.5.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82477">Bug 82477</a> - [softpipe] piglit fp-long-alu regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88658">Bug 88658</a> - (bisected) Slow video playback on Kabini</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89069">Bug 89069</a> - Lack of grass in The Talos Principle on radeonsi (native\wine\nine)</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Carl Worth (1):</p>
+<ul>
+  <li>Revert use of Mesa IR optimizer for ARB_fragment_programs</li>
+</ul>
+
+<p>Emil Velikov (3):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.4 release</li>
+  <li>get-pick-list.sh: Require explicit "10.4" for nominating stable patches</li>
+  <li>Update version to 10.4.5</li>
+</ul>
+
+<p>Ilia Mirkin (3):</p>
+<ul>
+  <li>nvc0: bail out of 2d blits with non-A8_UNORM alpha formats</li>
+  <li>st/mesa: treat resource-less xfb buffers as if they weren't there</li>
+  <li>nvc0: allow holes in xfb target lists</li>
+</ul>
+
+<p>Jeremy Huddleston Sequoia (2):</p>
+<ul>
+  <li>darwin: build fix</li>
+  <li>darwin: build fix</li>
+</ul>
+
+<p>Kenneth Graunke (4):</p>
+<ul>
+  <li>i965: Override swizzles for integer luminance formats.</li>
+  <li>i965: Use a gl_color_union for sampler border color.</li>
+  <li>i965: Fix integer border color on Haswell.</li>
+  <li>glsl: Reduce memory consumption of copy propagation passes.</li>
+</ul>
+
+<p>Laura Ekstrand (1):</p>
+<ul>
+  <li>main: Fixed _mesa_GetCompressedTexImage_sw to copy slices correctly.</li>
+</ul>
+
+<p>Marek Olšák (5):</p>
+<ul>
+  <li>r600g,radeonsi: don't append to streamout buffers that haven't been used yet</li>
+  <li>radeonsi: fix instanced arrays with non-zero start instance</li>
+  <li>radeonsi: small fix in SPI state</li>
+  <li>mesa: fix AtomicBuffer typo in _mesa_DeleteBuffers</li>
+  <li>radeonsi: fix a crash if a stencil ref state is set before a DSA state</li>
+</ul>
+
+<p>Michel Dänzer (2):</p>
+<ul>
+  <li>st/mesa: Don't use PIPE_USAGE_STREAM for GL_PIXEL_UNPACK_BUFFER_ARB</li>
+  <li>Revert "radeon/llvm: enable unsafe math for graphics shaders"</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.6.html

@@ -0,0 +1,143 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.6 Release Notes / March 06, 2015</h1>
+
+<p>
+Mesa 10.4.6 is a bug fix release which fixes bugs found since the 10.4.5 release.
+</p>
+<p>
+Mesa 10.4.6 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+46c9082142e811c01e49a2c332a9ac0a1eb98f2908985fb9df216539d7eaeaf4  MesaLib-10.4.6.tar.gz
+d8baedd20e79ccd98a5a7b05e23d59a30892e68de1fcc057ca6873dafca02735  MesaLib-10.4.6.tar.bz2
+6aded6eac7f0d4d55117b8b581d8424710bbb4c768fc90f7b881f29311a751aa  MesaLib-10.4.6.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45348">Bug 45348</a> - [swrast] piglit fbo-drawbuffers-arbfp regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84613">Bug 84613</a> - [G965, bisected] piglit regressions : glslparsertest.glsl2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87516">Bug 87516</a> - glProgramBinary violates spec</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88885">Bug 88885</a> - Transform feedback uses incorrect interleaving if a previous draw did not write gl_Position</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89180">Bug 89180</a> - [IVB regression] Rendering issues in Mass Effect through VMware Workstation</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Abdiel Janulgue (2):</p>
+<ul>
+  <li>glsl: Don't optimize min/max into saturate when EmitNoSat is set</li>
+  <li>st/mesa: For vertex shaders, don't emit saturate when SM 3.0 is unsupported</li>
+</ul>
+
+<p>Andreas Boll (1):</p>
+<ul>
+  <li>glx: Fix returned values of GLX_RENDERER_PREFERRED_PROFILE_MESA</li>
+</ul>
+
+<p>Brian Paul (2):</p>
+<ul>
+  <li>swrast: fix multiple color buffer writing</li>
+  <li>st/mesa: fix sampler view reference counting bug in glDraw/CopyPixels</li>
+</ul>
+
+<p>Chris Forbes (1):</p>
+<ul>
+  <li>i965/gs: Check newly-generated GS-out VUE map against correct stage</li>
+</ul>
+
+<p>Eduardo Lima Mitev (1):</p>
+<ul>
+  <li>mesa: Fix error validating args for TexSubImage3D</li>
+</ul>
+
+<p>Emil Velikov (6):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.5 release</li>
+  <li>install-lib-links: remove the .install-lib-links file</li>
+  <li>Revert "mesa: Correct backwards NULL check."</li>
+  <li>mesa: cherry-pick the second half of commit 2aa71e9485a</li>
+  <li>Revert "gallivm: Update for RTDyldMemoryManager becoming an unique_ptr."</li>
+  <li>Update version to 10.4.6</li>
+</ul>
+
+<p>Ian Romanick (3):</p>
+<ul>
+  <li>mesa: Add missing error checks in _mesa_ProgramBinary</li>
+  <li>mesa: Ensure that length is set to zero in _mesa_GetProgramBinary</li>
+  <li>mesa: Always generate GL_INVALID_OPERATION in _mesa_GetProgramBinary</li>
+</ul>
+
+<p>Jonathan Gray (1):</p>
+<ul>
+  <li>auxilary/os: correct sysctl use in os_get_total_physical_memory()</li>
+</ul>
+
+<p>José Fonseca (1):</p>
+<ul>
+  <li>gallivm: Update for RTDyldMemoryManager becoming an unique_ptr.</li>
+</ul>
+
+<p>Leo Liu (1):</p>
+<ul>
+  <li>st/omx/dec/h264: fix picture out-of-order with poc type 0 v2</li>
+</ul>
+
+<p>Lucas Stach (1):</p>
+<ul>
+  <li>install-lib-links: don't depend on .libs directory</li>
+</ul>
+
+<p>Marek Olšák (2):</p>
+<ul>
+  <li>vbo: fix an unitialized-variable warning</li>
+  <li>radeonsi: fix point sprites</li>
+</ul>
+
+<p>Matt Turner (4):</p>
+<ul>
+  <li>glsl: Rewrite and fix min/max to saturate optimization.</li>
+  <li>mesa: Correct backwards NULL check.</li>
+  <li>i965/fs: Don't use backend_visitor::instructions after creating the CFG.</li>
+  <li>mesa: Correct backwards NULL check.</li>
+</ul>
+
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.7.html

@@ -0,0 +1,134 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.7 Release Notes / March 20, 2015</h1>
+
+<p>
+Mesa 10.4.7 is a bug fix release which fixes bugs found since the 10.4.6 release.
+</p>
+<p>
+Mesa 10.4.7 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+9e7b59267199658808f8b33e0410b86fbafbdcd52378658b9df65fac9d24947f  MesaLib-10.4.7.tar.gz
+2c351c98671f9a7ab3fd9c601bb7a255801b1580f5dd0992639f99152801b0d2  MesaLib-10.4.7.tar.bz2
+d14ac578b5ce16560757b53fbd1cb4d6b34652f8e110e4b10a019adc82e67ffd  MesaLib-10.4.7.zip
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79202">Bug 79202</a> - valgrind errors in glsl-fs-uniform-array-loop-unroll.shader_test; random code generation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89156">Bug 89156</a> - r300g: GL_COMPRESSED_RED_RGTC1 / ATI1N support broken</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89224">Bug 89224</a> - Incorrect rendering of Unigine Valley running in VM on VMware Workstation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89530">Bug 89530</a> - FTBFS in loader: missing fstat</li>
+
+</ul>
+
+<h2>Changes</h2>
+
+<p>Andrey Sudnik (1):</p>
+<ul>
+  <li>i965/vec4: Don't lose the saturate modifier in copy propagation.</li>
+</ul>
+
+<p>Daniel Stone (1):</p>
+<ul>
+  <li>egl: Take alpha bits into account when selecting GBM formats</li>
+</ul>
+
+<p>Emil Velikov (6):</p>
+<ul>
+  <li>docs: Add sha256 sums for the 10.4.6 release</li>
+  <li>cherry-ignore: add not applicable/rejected commits</li>
+  <li>mesa: rename format_info.c to format_info.h</li>
+  <li>loader: include &lt;sys/stat.h&gt; for non-sysfs builds</li>
+  <li>auxiliary/os: fix the android build - s/drm_munmap/os_munmap/</li>
+  <li>Update version to 10.4.7</li>
+</ul>
+
+<p>Iago Toral Quiroga (1):</p>
+<ul>
+  <li>i965: Fix out-of-bounds accesses into pull_constant_loc array</li>
+</ul>
+
+<p>Ilia Mirkin (4):</p>
+<ul>
+  <li>freedreno: move fb state copy after checking for size change</li>
+  <li>freedreno/ir3: fix array count returned by TXQ</li>
+  <li>freedreno/ir3: get the # of miplevels from getinfo</li>
+  <li>freedreno: fix slice pitch calculations</li>
+</ul>
+
+<p>Marc-Andre Lureau (1):</p>
+<ul>
+  <li>gallium/auxiliary/indices: fix start param</li>
+</ul>
+
+<p>Marek Olšák (4):</p>
+<ul>
+  <li>r300g: fix RGTC1 and LATC1 SNORM formats</li>
+  <li>r300g: fix a crash when resolving into an sRGB texture</li>
+  <li>r300g: fix sRGB-&gt;sRGB blits</li>
+  <li>radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords</li>
+</ul>
+
+<p>Mario Kleiner (1):</p>
+<ul>
+  <li>glx: Handle out-of-sequence swap completion events correctly. (v2)</li>
+</ul>
+
+<p>Matt Turner (2):</p>
+<ul>
+  <li>r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.</li>
+  <li>r300g: Check return value of snprintf().</li>
+</ul>
+
+<p>Rob Clark (2):</p>
+<ul>
+  <li>freedreno/ir3: fix silly typo for binning pass shaders</li>
+  <li>freedreno: update generated headers</li>
+</ul>
+
+<p>Samuel Iglesias Gonsalvez (1):</p>
+<ul>
+  <li>glsl: optimize (0 cmp x + y) into (-x cmp y).</li>
+</ul>
+
+<p>Stefan Dösinger (1):</p>
+<ul>
+  <li>r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)</li>
+</ul>
+
+</div>
+</body>
+</html>

docs/relnotes/10.4.html

@@ -14,7 +14,7 @@
 <iframe src="../contents.html"></iframe>
 <div class="content">
 
-<h1>Mesa 10.4 Release Notes / TBD</h1>
+<h1>Mesa 10.4 Release Notes / December 14, 2014</h1>
 
 <p>
 Mesa 10.4 is a new development release.
@@ -31,9 +31,11 @@ because compatibility contexts are not supported.
 </p>
 
 
-<h2>MD5 checksums</h2>
+<h2>SHA256 checksums</h2>
 <pre>
-TBD.
+abfbfd2d91ce81491c5bb6923ae649212ad5f82d0bee277de8704cc948dc221e  MesaLib-10.4.0.tar.gz
+98a7dff3a1a6708c79789de8b9a05d8042e867067f70e8f30387c15026233219  MesaLib-10.4.0.tar.bz2
+443a6d46d0691b5ac811d8d30091b1716c365689b16d49c57cf273c2b76086fe  MesaLib-10.4.0.zip
 </pre>
 
 
@@ -54,11 +56,202 @@ Note: some of the new features are only available with certain drivers.
 
 <h2>Bug fixes</h2>
 
-TBD.
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79963">Bug 79963</a> - [ILK Bisected]some piglit and ogles2conform cases fail </li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=29661">Bug 29661</a> - MSVC built u_format_test fails on Windows</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=38873">Bug 38873</a> - [855gm] gnome-shell misrendered</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=54372">Bug 54372</a> - GLX_INTEL_swap_event crashes driver when swapping window buffers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60879">Bug 60879</a> - [radeonsi] X11 can't start with acceleration enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61415">Bug 61415</a> - Clover ignores --with-opencl-libdir path</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64471">Bug 64471</a> - Radeon HD6570 lockup in Brütal Legend with HyperZ</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66184">Bug 66184</a> - src/mesa/state_tracker/st_glsl_to_tgsi.cpp:3216:simplify_cmp: Assertion `inst-&gt;dst.index &lt; 4096' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67672">Bug 67672</a> - [llvmpipe] lp_test_arit fails on old CPUs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69200">Bug 69200</a> - [Bisected]Piglit glx/glx-multithread-shader-compile aborted</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70410">Bug 70410</a> - egl-static/Makefile: linking fails with llvm &gt;= 3.4</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72685">Bug 72685</a> - [radeonsi hyperz] Artifacts in Unigine Sanctuary</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72819">Bug 72819</a> - [855GM] Incorrect drop shadow color on windows and strange white rectangle when showing/hiding GLX-dock...</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74563">Bug 74563</a> - Surfaceless contexts are not properly released by DRI drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74863">Bug 74863</a> - [r600g] HyperZ broken on RV770 and CYPRESS (Left 4 Dead 2 trees corruption) bisected!</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=75011">Bug 75011</a> - [hyperz] Performance drop since git-01e6371 (disable hyperz by default) with radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=75112">Bug 75112</a> - Meta Bug for HyperZ issues on r600g and radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76252">Bug 76252</a> - Dynamic loading/unloading of opengl32.dll results in a deadlock</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76861">Bug 76861</a> - mid3 generates slow code for constant arguments</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=77957">Bug 77957</a> - Variably-indexed constant arrays result in terrible shader code</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78468">Bug 78468</a> - Compiling of shader gets stuck in infinite loop</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78770">Bug 78770</a> - [SNB bisected]Webglc conformance/textures/texture-size-limit.html fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79155">Bug 79155</a> - [Tesseract Game] Global Illumination: Medium Causes Color Distortion</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79462">Bug 79462</a> - [NVC0/Codegen] Shader compilation falis in spill logic</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80011">Bug 80011</a> - [softpipe] tgsi/tgsi_exec.c:2023:exec_txf: Assertion `0' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80012">Bug 80012</a> - [softpipe] draw/draw_gs.c:113:tgsi_fetch_gs_outputs: Assertion `!util_is_inf_or_nan(output[slot][0])' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80050">Bug 80050</a> - [855GM] Incorrect drop shadow color under windows in Cinnamon persists with MESA 10.1.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80247">Bug 80247</a> - Khronos conformance test  ES3-CTS.gtf.GL3Tests.transform_feedback.transform_feedback_vertex_id  fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80561">Bug 80561</a> - Incorrect implementation of some VDPAU APIs.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80615">Bug 80615</a> - Files in bellagio directory [omx tracker] don't respect installation folder</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80848">Bug 80848</a> - [dri3] Building mesa fails with dri3 enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81680">Bug 81680</a> - [r600g] Firefox crashes with hardware acceleration turned on</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82255">Bug 82255</a> - [VP2] Chroma planes are vertically stretched during VDPAU playback</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82472">Bug 82472</a> - piglit 16385-consecutive-chars regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82537">Bug 82537</a> - Stunt Rally GLSL compiler assertion failure</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82538">Bug 82538</a> - Super Maryo Chronicles fails with st/mesa assertion failure</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82539">Bug 82539</a> - vmw_screen_dri.lo In file included from vmw_screen_dri.c:41: vmwgfx_drm.h:32:17: error: drm.h: No such file or directory</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82796">Bug 82796</a> - [IVB/BYT-M/HSW/BDW Bisected]Synmark2_v6.0_OglTerrainFlyInst/OglTerrainPanInst cannot run as image validation failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82804">Bug 82804</a> - unreal engine 4 rendering errors</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82828">Bug 82828</a> - Regression: Crash in 3Dmark2001</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82846">Bug 82846</a> - [BDW Bisected] Gpu hang when running Lightsmark v2008/Warsow v1.0/Xonotic v0.7/unigine-demos</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82881">Bug 82881</a> - test_vec4_register_coalesce regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82882">Bug 82882</a> - [swrast] piglit glsl-fs-uniform-bool-1 regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82921">Bug 82921</a> - layout(location=0) emits error &gt;= MAX_UNIFORM_LOCATIONS due to integer underflow</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82929">Bug 82929</a> - [BDW Bisected]glxgears causes X hang</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82932">Bug 82932</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.shaders.indexing.vector_subscript.vec3_static_loop_subscript_write_direct_read_vertex fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83079">Bug 83079</a> - [NVC0] Dota 2 (Linux native and Wine) crash with Nouveau Drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83080">Bug 83080</a> - [SNB+ Bisected]ES3-CTS.shaders.loops.do_while_constant_iterations.mixed_break_continue_fragment fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83081">Bug 83081</a> - [BDW Bisected]Piglit spec_ARB_sample_shading_builtin-gl-sample-mask_2 is core dumped</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83127">Bug 83127</a> - [ILK Bisected]Piglit glean_texCombine fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83148">Bug 83148</a> - Unity invisible under Ubuntu 14.04 and 14.10</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83355">Bug 83355</a> - FTBFS: src/mesa/program/program_lexer.l:122:64: error: unknown type name 'YYSTYPE'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83380">Bug 83380</a> - Linking fails when not writing gl_Position.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83418">Bug 83418</a> - EU IV is incorrectly rendered after git1409011930.d571f2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83432">Bug 83432</a> - r600_query.c:269:r600_emit_query_end: Assertion `ctx-&gt;num_pipelinestat_queries &gt; 0' failed [Gallium HUD]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83463">Bug 83463</a> - [swrast] piglit glsl-vs-clamp-1 regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83468">Bug 83468</a> - [UBO] Using bool from UBO as if-statement condition asserts</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83500">Bug 83500</a> - si_dma_copy_tile causes GPU hangs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83506">Bug 83506</a> - [UBO] row_major layout ignored inside structures</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83533">Bug 83533</a> - [UBO] nested structures don't get appropriate padding</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83573">Bug 83573</a> - [swrast] piglit fs-op-not-bool-using-if regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83574">Bug 83574</a> - [llvmpipe] [softpipe] piglit arb_explicit_uniform_location-use-of-unused-loc regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83741">Bug 83741</a> - [UBO] row_major layout partially ignored for arrays of structures</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83777">Bug 83777</a> - [regression] ilo fails to build</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83934">Bug 83934</a> - Structures must have same name to be considered same type.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84140">Bug 84140</a> - mplayer crashes playing some files using vdpau output</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84145">Bug 84145</a> - UE4: Realistic Rendering Demo render blue</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84178">Bug 84178</a> - Big glamor regression in Xorg server 1.6.99.1 GIT: x11perf 1.5 Test: PutImage XY 500x500 Square</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84355">Bug 84355</a> - texture2DProjLod and textureCubeLod are not supported when using GLES.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84529">Bug 84529</a> - [IVB bisected] glean fragProg1 CMP test failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84538">Bug 84538</a> - lp_test_format.c:226:4: error: too few arguments to function ‘gallivm_create’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84539">Bug 84539</a> - brw_fs_register_coalesce.cpp:183: bool fs_visitor::register_coalesce(): Assertion `src_size &lt;= 11' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84557">Bug 84557</a> - [HSW] &quot;Emit ELSE/ENDIF JIP with type D on Gen 7&quot; causes Atomic Afterlife and GPU hangs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84651">Bug 84651</a> - Distorted graphics or black window when running Battle.net app on Intel hardware via wine</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84662">Bug 84662</a> - Long pauses with Unreal demo Elemental on R9270X since : Always flush the HDP cache before submitting a CS to the GPU</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84777">Bug 84777</a> - [BSW]Piglit spec_glsl-1.50_execution_geometry-basic fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84807">Bug 84807</a> - Build issue starting between bf4aecfb2acc8d0dc815105d2f36eccbc97c284b and a3e9582f09249ad27716ba82c7dfcee685b65d51</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85189">Bug 85189</a> - llvm/invocation.cpp: In function 'void {anonymous}::optimize(llvm::Module*, unsigned int, const std::vector&lt;llvm::Function*&gt;&amp;)': llvm/invocation.cpp:324:18: error: expected type-specifier</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85267">Bug 85267</a> - vlc crashes with vdpau (Radeon 3850HD) [r600]</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85377">Bug 85377</a> - lp_test_format failure with llvm-3.6</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85425">Bug 85425</a> - [bisected] Compiler error in clip control operations in meta</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85429">Bug 85429</a> - indirect.c:296: multiple definition of `__indirect_glNewList'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85454">Bug 85454</a> - Unigine Sanctuary with Wine crashes on Mesa Git</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85647">Bug 85647</a> - Random radeonsi crashes with mesa 10.3.x</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85683">Bug 85683</a> - [i965 Bisected]Piglit shaders_glsl-vs-raytrace-bug26691 segfault</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85691">Bug 85691</a> - 'glsl: Drop constant 0.0 components from dot products.' broke piglit shaders/glsl-gnome-shell-dim-window and a few others with Gallium</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86025">Bug 86025</a> - src\glsl\list.h(535) : error C2143: syntax error : missing ';' before 'type'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86089">Bug 86089</a> - [r600g][mesa 10.4.0-dev] shader failure - r600_sb::bc_finalizer::cf_peephole() when starting Second Life</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86145">Bug 86145</a> - Pipeline statistic counter values for VF always 0</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86618">Bug 86618</a> - [NV96] neg modifiers not working in MIN and MAX operations</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86760">Bug 86760</a> - mesa doesn't build: recipe for target 'r600_llvm.lo' failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86764">Bug 86764</a> - [SNB+ Bisected]Piglit glean/pointSprite fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86788">Bug 86788</a> - (bisected) 32bit UrbanTerror 4.1 timedemo sse4.1 segfault...</li>
+
+</ul>
 
 <h2>Changes</h2>
 
 <ul>
+<li>The environment variable GALLIUM_MSAA that forced a multisample GLX visual was removed.</li>
 </ul>
 
 </div>

include/D3D9/d3d9.h

@@ -399,6 +399,16 @@ struct IDirect3DVolume9 : public IUnknown
 	virtual HRESULT WINAPI UnlockBox() = 0;
 };
 
+struct IDirect3DVolumeTexture9 : public IDirect3DBaseTexture9
+{
+    virtual HRESULT WINAPI GetLevelDesc(UINT Level, D3DVOLUME_DESC *pDesc) = 0;
+    virtual HRESULT WINAPI GetVolumeLevel(UINT Level, IDirect3DVolume9 **ppVolumeLevel) = 0;
+    virtual HRESULT WINAPI LockBox(UINT Level, D3DLOCKED_BOX *pLockedVolume, const D3DBOX *pBox, DWORD Flags) = 0;
+    virtual HRESULT WINAPI UnlockBox(UINT Level) = 0;
+    virtual HRESULT WINAPI AddDirtyBox(const D3DBOX *pDirtyBox) = 0;
+};
+
+
 #else /* __cplusplus */
 
 extern const GUID IID_IDirect3D9;

include/D3D9/d3d9types.h

@@ -224,6 +224,8 @@ typedef struct _RGNDATA {
 #define D3DERR_INVALIDDEVICE             MAKE_D3DHRESULT(2155)
 #define D3DERR_INVALIDCALL               MAKE_D3DHRESULT(2156)
 #define D3DERR_DRIVERINVALIDCALL         MAKE_D3DHRESULT(2157)
+#define D3DERR_DEVICEREMOVED             MAKE_D3DHRESULT(2160)
+#define D3DERR_DEVICEHUNG                MAKE_D3DHRESULT(2164)
 
 /********************************************************
  * Bitmasks                                             *
@@ -331,6 +333,7 @@ typedef struct _RGNDATA {
 
 #define D3DPRESENT_DONOTWAIT      0x00000001
 #define D3DPRESENT_LINEAR_CONTENT 0x00000002
+#define D3DPRESENT_RATE_DEFAULT            0
 
 #define D3DCREATE_FPU_PRESERVE              0x00000002
 #define D3DCREATE_MULTITHREADED             0x00000004
@@ -344,6 +347,13 @@ typedef struct _RGNDATA {
 #define D3DSTREAMSOURCE_INDEXEDDATA  (1 << 30)
 #define D3DSTREAMSOURCE_INSTANCEDATA (2 << 30)
 
+/* D3DRS_COLORWRITEENABLE */
+#define D3DCOLORWRITEENABLE_RED     (1L << 0)
+#define D3DCOLORWRITEENABLE_GREEN   (1L << 1)
+#define D3DCOLORWRITEENABLE_BLUE    (1L << 2)
+#define D3DCOLORWRITEENABLE_ALPHA   (1L << 3)
+
+
 /********************************************************
  * Function macros                                      *
  *******************************************************/
@@ -639,10 +649,13 @@ typedef enum _D3DFORMAT {
     D3DFMT_A1 = 118,
     D3DFMT_A2B10G10R10_XR_BIAS = 119,
     D3DFMT_BINARYBUFFER = 199,
+    D3DFMT_ATI1 = MAKEFOURCC('A', 'T', 'I', '1'),
+    D3DFMT_ATI2 = MAKEFOURCC('A', 'T', 'I', '2'),
     D3DFMT_DF16 = MAKEFOURCC('D', 'F', '1', '6'),
     D3DFMT_DF24 = MAKEFOURCC('D', 'F', '2', '4'),
     D3DFMT_INTZ = MAKEFOURCC('I', 'N', 'T', 'Z'),
     D3DFMT_NULL = MAKEFOURCC('N', 'U', 'L', 'L'),
+    D3DFMT_NVDB = MAKEFOURCC('N', 'V', 'D', 'B'),
     D3DFMT_NV11 = MAKEFOURCC('N', 'V', '1', '1'),
     D3DFMT_NV12 = MAKEFOURCC('N', 'V', '1', '2'),
     D3DFMT_Y210 = MAKEFOURCC('Y', '2', '1', '0'),

install-lib-links.mk

@@ -3,9 +3,9 @@
 
 if BUILD_SHARED
 if HAVE_COMPAT_SYMLINKS
-all-local : .libs/install-mesa-links
+all-local : .install-mesa-links
 
-.libs/install-mesa-links : $(lib_LTLIBRARIES)
+.install-mesa-links : $(lib_LTLIBRARIES)
 	$(AM_V_GEN)$(MKDIR_P) $(top_builddir)/$(LIB_DIR);	\
 	for f in $(join $(addsuffix .libs/,$(dir $(lib_LTLIBRARIES))),$(notdir $(lib_LTLIBRARIES:%.la=%.$(LIB_EXT)*))); do \
 		if test -h .libs/$$f; then			\
@@ -14,5 +14,9 @@ all-local : .libs/install-mesa-links
 			ln -f $$f $(top_builddir)/$(LIB_DIR);	\
 		fi;						\
 	done && touch $@
+
+clean-local:
+	$(RM) .install-mesa-links
+
 endif
 endif

src/egl/drivers/dri2/platform_drm.c

@@ -668,15 +668,21 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
 
    for (i = 0; dri2_dpy->driver_configs[i]; i++) {
       EGLint format, attr_list[3];
-      unsigned int mask;
+      unsigned int red, alpha;
 
       dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i],
-                                       __DRI_ATTRIB_RED_MASK, &mask);
-      if (mask == 0x3ff00000)
+                                       __DRI_ATTRIB_RED_MASK, &red);
+      dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i],
+                                       __DRI_ATTRIB_ALPHA_MASK, &alpha);
+      if (red == 0x3ff00000 && alpha == 0x00000000)
          format = GBM_FORMAT_XRGB2101010;
-      else if (mask == 0x00ff0000)
+      else if (red == 0x3ff00000 && alpha == 0xc0000000)
+         format = GBM_FORMAT_ARGB2101010;
+      else if (red == 0x00ff0000 && alpha == 0x00000000)
          format = GBM_FORMAT_XRGB8888;
-      else if (mask == 0xf800)
+      else if (red == 0x00ff0000 && alpha == 0xff000000)
+         format = GBM_FORMAT_ARGB8888;
+      else if (red == 0xf800)
          format = GBM_FORMAT_RGB565;
       else
          continue;

src/egl/drivers/dri2/platform_x11.c

@@ -49,8 +49,7 @@ dri2_x11_swap_interval(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf,
 
 static void
 swrastCreateDrawable(struct dri2_egl_display * dri2_dpy,
-                     struct dri2_egl_surface * dri2_surf,
-                     int depth)
+                     struct dri2_egl_surface * dri2_surf)
 {
    uint32_t           mask;
    const uint32_t     function = GXcopy;
@@ -66,8 +65,7 @@ swrastCreateDrawable(struct dri2_egl_display * dri2_dpy,
    valgc[0] = function;
    valgc[1] = False;
    xcb_create_gc(dri2_dpy->conn, dri2_surf->swapgc, dri2_surf->drawable, mask, valgc);
-   dri2_surf->depth = depth;
-   switch (depth) {
+   switch (dri2_surf->depth) {
       case 32:
       case 24:
          dri2_surf->bytes_per_pixel = 4;
@@ -82,7 +80,7 @@ swrastCreateDrawable(struct dri2_egl_display * dri2_dpy,
          dri2_surf->bytes_per_pixel = 0;
          break;
       default:
-         _eglLog(_EGL_WARNING, "unsupported depth %d", depth);
+         _eglLog(_EGL_WARNING, "unsupported depth %d", dri2_surf->depth);
    }
 }
 
@@ -257,12 +255,6 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
       _eglError(EGL_BAD_ALLOC, "dri2->createNewDrawable");
       goto cleanup_pixmap;
    }
-   
-   if (dri2_dpy->dri2) {
-      xcb_dri2_create_drawable (dri2_dpy->conn, dri2_surf->drawable);
-   } else {
-      swrastCreateDrawable(dri2_dpy, dri2_surf, _eglGetConfigKey(conf, EGL_BUFFER_SIZE));
-   }
 
    if (type != EGL_PBUFFER_BIT) {
       cookie = xcb_get_geometry (dri2_dpy->conn, dri2_surf->drawable);
@@ -275,9 +267,19 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
 
       dri2_surf->base.Width = reply->width;
       dri2_surf->base.Height = reply->height;
+      dri2_surf->depth = reply->depth;
       free(reply);
    }
 
+   if (dri2_dpy->dri2) {
+      xcb_dri2_create_drawable (dri2_dpy->conn, dri2_surf->drawable);
+   } else {
+      if (type == EGL_PBUFFER_BIT) {
+         dri2_surf->depth = _eglGetConfigKey(conf, EGL_BUFFER_SIZE);
+      }
+      swrastCreateDrawable(dri2_dpy, dri2_surf);
+   }
+
    /* we always copy the back buffer to front */
    dri2_surf->base.PostSubBufferSupportedNV = EGL_TRUE;
 

src/gallium/auxiliary/indices/u_indices_gen.py

@@ -193,7 +193,7 @@ def lineloop(intype, outtype, inpv, outpv):
     print '  for (i = start, j = 0; j < nr - 2; j+=2, i++) { '
     do_line( intype, outtype, 'out+j',  'i', 'i+1', inpv, outpv );
     print '   }'
-    do_line( intype, outtype, 'out+j',  'i', '0', inpv, outpv );
+    do_line( intype, outtype, 'out+j',  'i', 'start', inpv, outpv );
     postamble()
 
 def tris(intype, outtype, inpv, outpv):
@@ -218,7 +218,7 @@ def tristrip(intype, outtype, inpv, outpv):
 def trifan(intype, outtype, inpv, outpv):
     preamble(intype, outtype, inpv, outpv, prim='trifan')
     print '  for (i = start, j = 0; j < nr; j+=3, i++) { '
-    do_tri( intype, outtype, 'out+j',  '0', 'i+1', 'i+2', inpv, outpv );
+    do_tri( intype, outtype, 'out+j',  'start', 'i+1', 'i+2', inpv, outpv );
     print '   }'
     postamble()
 
@@ -228,9 +228,9 @@ def polygon(intype, outtype, inpv, outpv):
     preamble(intype, outtype, inpv, outpv, prim='polygon')
     print '  for (i = start, j = 0; j < nr; j+=3, i++) { '
     if inpv == FIRST:
-        do_tri( intype, outtype, 'out+j',  '0', 'i+1', 'i+2', inpv, outpv );
+        do_tri( intype, outtype, 'out+j',  'start', 'i+1', 'i+2', inpv, outpv );
     else:
-        do_tri( intype, outtype, 'out+j',  'i+1', 'i+2', '0', inpv, outpv );
+        do_tri( intype, outtype, 'out+j',  'i+1', 'i+2', 'start', inpv, outpv );
     print '   }'
     postamble()
 

src/gallium/auxiliary/indices/u_primconvert.c

@@ -124,6 +124,9 @@ util_primconvert_draw_vbo(struct primconvert_context *pc,
    new_info.indexed = true;
    new_info.min_index = info->min_index;
    new_info.max_index = info->max_index;
+   new_info.index_bias = info->index_bias;
+   new_info.start_instance = info->start_instance;
+   new_info.instance_count = info->instance_count;
 
    if (info->indexed) {
       u_index_translator(pc->primtypes_mask,
@@ -136,6 +139,7 @@ util_primconvert_draw_vbo(struct primconvert_context *pc,
          src = pipe_buffer_map(pc->pipe, ib->buffer,
                                PIPE_TRANSFER_READ, &src_transfer);
       }
+      src = (const uint8_t *)src + ib->offset;
    }
    else {
       u_index_generator(pc->primtypes_mask,

src/gallium/auxiliary/os/os_misc.c

@@ -118,7 +118,7 @@ os_get_total_physical_memory(uint64_t *size)
    *size = phys_pages * page_size;
    return (phys_pages > 0 && page_size > 0);
 #elif defined(PIPE_OS_APPLE) || defined(PIPE_OS_BSD)
-   size_t len = sizeof(size);
+   size_t len = sizeof(*size);
    int mib[2];
 
    mib[0] = CTL_HW;
@@ -134,7 +134,7 @@ os_get_total_physical_memory(uint64_t *size)
 #error Unsupported *BSD
 #endif
 
-   return (sysctl(mib, 2, &size, &len, NULL, 0) == 0);
+   return (sysctl(mib, 2, size, &len, NULL, 0) == 0);
 #elif defined(PIPE_OS_HAIKU)
    system_info info;
    status_t ret;

src/gallium/auxiliary/os/os_mman.h

@@ -70,8 +70,8 @@ static INLINE void *os_mmap(void *addr, size_t length, int prot, int flags,
    return __mmap2(addr, length, prot, flags, fd, (size_t) (offset >> 12));
 }
 
-#  define drm_munmap(addr, length) \
-              munmap(addr, length)
+#  define os_munmap(addr, length) \
+             munmap(addr, length)
 
 #else
 /* assume large file support exists */

src/gallium/auxiliary/util/u_cpu_detect.c

@@ -272,7 +272,7 @@ static INLINE uint64_t xgetbv(void)
 
 
 #if defined(PIPE_ARCH_X86)
-static INLINE boolean sse2_has_daz(void)
+PIPE_ALIGN_STACK static INLINE boolean sse2_has_daz(void)
 {
    struct {
       uint32_t pad1[7];
@@ -409,8 +409,12 @@ util_cpu_detect(void)
       }
 
       if (regs[0] >= 0x80000006) {
+         /* should we really do this if the clflush size above worked? */
+         unsigned int cacheline;
          cpuid(0x80000006, regs2);
-         util_cpu_caps.cacheline = regs2[2] & 0xFF;
+         cacheline = regs2[2] & 0xFF;
+         if (cacheline > 0)
+            util_cpu_caps.cacheline = cacheline;
       }
 
       if (!util_cpu_caps.has_sse) {

src/gallium/auxiliary/util/u_math.h

@@ -561,14 +561,10 @@ util_last_bit(unsigned u)
 static INLINE unsigned
 util_last_bit_signed(int i)
 {
-#if defined(__GNUC__) && ((__GNUC__ * 100 + __GNUC_MINOR__) >= 407) && !defined(__INTEL_COMPILER)
-   return 31 - __builtin_clrsb(i);
-#else
    if (i >= 0)
       return util_last_bit(i);
    else
       return util_last_bit(~(unsigned)i);
-#endif
 }
 
 /* Destructively loop over all of the bits in a mask as in:

src/gallium/drivers/freedreno/a2xx/a2xx.xml.h

@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64771 bytes, from 2015-03-15 21:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)
 
 Copyright (C) 2013-2014 by the following authors:

src/gallium/drivers/freedreno/a3xx/a3xx.xml.h

@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64771 bytes, from 2015-03-15 21:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)
 
 Copyright (C) 2013-2014 by the following authors:
@@ -2572,7 +2572,7 @@ static inline uint32_t A3XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)
 }
 
 #define REG_A3XX_TEX_CONST_3					0x00000003
-#define A3XX_TEX_CONST_3_LAYERSZ1__MASK				0x0000000f
+#define A3XX_TEX_CONST_3_LAYERSZ1__MASK				0x00001fff
 #define A3XX_TEX_CONST_3_LAYERSZ1__SHIFT			0
 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val)
 {

src/gallium/drivers/freedreno/adreno_common.xml.h

@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64771 bytes, from 2015-03-15 21:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)
 
 Copyright (C) 2013-2014 by the following authors:

src/gallium/drivers/freedreno/adreno_pm4.xml.h

@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10347 bytes, from 2014-10-01 18:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14960 bytes, from 2014-07-27 17:22:13)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  60533 bytes, from 2014-10-15 18:32:43)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  64771 bytes, from 2015-03-15 21:55:57)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  41068 bytes, from 2014-08-01 12:22:48)
 
 Copyright (C) 2013-2014 by the following authors:

src/gallium/drivers/freedreno/freedreno_resource.c

@@ -199,7 +199,7 @@ setup_slices(struct fd_resource *rsc)
 	for (level = 0; level <= prsc->last_level; level++) {
 		struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
 
-		slice->pitch = align(width, 32);
+		slice->pitch = width = align(width, 32);
 		slice->offset = size;
 		slice->size0 = slice->pitch * height * rsc->cpp;
 

src/gallium/drivers/freedreno/freedreno_state.c

@@ -123,12 +123,12 @@ fd_set_framebuffer_state(struct pipe_context *pctx,
 
 	fd_context_render(pctx);
 
-	util_copy_framebuffer_state(cso, framebuffer);
-
 	if ((cso->width != framebuffer->width) ||
 			(cso->height != framebuffer->height))
 		ctx->needs_rb_fbd = true;
 
+	util_copy_framebuffer_state(cso, framebuffer);
+
 	ctx->dirty |= FD_DIRTY_FRAMEBUFFER;
 
 	ctx->disabled_scissor.minx = 0;

src/gallium/drivers/freedreno/ir3/ir3_compiler.c

@@ -1421,6 +1421,7 @@ trans_txq(const struct instr_translater *t,
 	struct tgsi_dst_register *dst = &inst->Dst[0].Register;
 	struct tgsi_src_register *level = &inst->Src[0].Register;
 	struct tgsi_src_register *samp = &inst->Src[1].Register;
+	const struct target_info *tgt = &tex_targets[inst->Texture.Texture];
 	struct tex_info tinf;
 
 	memset(&tinf, 0, sizeof(tinf));
@@ -1434,8 +1435,67 @@ trans_txq(const struct instr_translater *t,
 	instr->cat5.tex  = samp->Index;
 	instr->flags |= tinf.flags;
 
-	add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
-	add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
+	if (tgt->array && (dst->WriteMask & (1 << tgt->dims))) {
+		/* Array size actually ends up in .w rather than .z. This doesn't
+		 * matter for miplevel 0, but for higher mips the value in z is
+		 * minified whereas w stays. Also, the value in TEX_CONST_3_DEPTH is
+		 * returned, which means that we have to add 1 to it for arrays.
+		 */
+		struct tgsi_dst_register tmp_dst;
+		struct tgsi_src_register *tmp_src;
+		type_t type_mov = get_utype(ctx);
+
+		tmp_src = get_internal_temp(ctx, &tmp_dst);
+		add_dst_reg_wrmask(ctx, instr, &tmp_dst, 0,
+						   dst->WriteMask | TGSI_WRITEMASK_W);
+		add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
+
+		if (dst->WriteMask & TGSI_WRITEMASK_X) {
+			instr = instr_create(ctx, 1, 0);
+			instr->cat1.src_type = type_mov;
+			instr->cat1.dst_type = type_mov;
+			add_dst_reg(ctx, instr, dst, 0);
+			add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 0));
+		}
+
+		if (tgt->dims == 2) {
+			if (dst->WriteMask & TGSI_WRITEMASK_Y) {
+				instr = instr_create(ctx, 1, 0);
+				instr->cat1.src_type = type_mov;
+				instr->cat1.dst_type = type_mov;
+				add_dst_reg(ctx, instr, dst, 1);
+				add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 1));
+			}
+		}
+
+		instr = instr_create(ctx, 2, OPC_ADD_U);
+		add_dst_reg(ctx, instr, dst, tgt->dims);
+		add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 3));
+		ir3_reg_create(instr, 0, IR3_REG_IMMED)->iim_val = 1;
+	} else {
+		add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
+		add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
+	}
+
+	if (dst->WriteMask & TGSI_WRITEMASK_W) {
+		/* The # of levels comes from getinfo.z. We need to add 1 to it, since
+		 * the value in TEX_CONST_0 is zero-based.
+		 */
+		struct tgsi_dst_register tmp_dst;
+		struct tgsi_src_register *tmp_src;
+
+		tmp_src = get_internal_temp(ctx, &tmp_dst);
+		instr = instr_create(ctx, 5, OPC_GETINFO);
+		instr->cat5.type = get_utype(ctx);
+		instr->cat5.samp = samp->Index;
+		instr->cat5.tex  = samp->Index;
+		add_dst_reg_wrmask(ctx, instr, &tmp_dst, 0, TGSI_WRITEMASK_Z);
+
+		instr = instr_create(ctx, 2, OPC_ADD_U);
+		add_dst_reg(ctx, instr, dst, 3);
+		add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 2));
+		ir3_reg_create(instr, 0, IR3_REG_IMMED)->iim_val = 1;
+	}
 }
 
 /* DDX/DDY */
@@ -3094,7 +3154,7 @@ ir3_compile_shader(struct ir3_shader_variant *so,
 	if (key.binning_pass) {
 		for (i = 0, j = 0; i < so->outputs_count; i++) {
 			unsigned name = sem2name(so->outputs[i].semantic);
-			unsigned idx = sem2name(so->outputs[i].semantic);
+			unsigned idx = sem2idx(so->outputs[i].semantic);
 
 			/* throw away everything but first position/psize */
 			if ((idx == 0) && ((name == TGSI_SEMANTIC_POSITION) ||

src/gallium/drivers/llvmpipe/lp_test_arit.c

@@ -33,6 +33,7 @@
 #include "util/u_pointer.h"
 #include "util/u_memory.h"
 #include "util/u_math.h"
+#include "util/u_cpu_detect.h"
 
 #include "gallivm/lp_bld.h"
 #include "gallivm/lp_bld_debug.h"
@@ -332,6 +333,38 @@ build_unary_test_func(struct gallivm_state *gallivm,
 }
 
 
+/*
+ * Flush denorms to zero.
+ */
+static float
+flush_denorm_to_zero(float val)
+{
+   /*
+    * If we have a denorm manually set it to (+-)0.
+    * This is because the reference may or may not do the right thing
+    * otherwise because we want the result according to treating all
+    * denormals as zero (FTZ/DAZ). Not using fpclassify because
+    * a) some compilers are stuck at c89 (msvc)
+    * b) not sure it reliably works with non-standard ftz/daz mode
+    * And, right now we only disable denorms with jited code on x86/sse
+    * (albeit this should be classified as a bug) so to get results which
+    * match we must only flush them to zero here in that case too.
+    */
+   union fi fi_val;
+
+   fi_val.f = val;
+
+#if defined(PIPE_ARCH_SSE)
+   if (util_cpu_caps.has_sse) {
+      if ((fi_val.ui & 0x7f800000) == 0) {
+         fi_val.ui &= 0xff800000;
+      }
+   }
+#endif
+
+   return fi_val.f;
+}
+
 /*
  * Test one LLVM unary arithmetic builder function.
  */
@@ -374,10 +407,13 @@ test_unary(unsigned verbose, FILE *fp, const struct unary_test_t *test)
 
       test_func_jit(out, in);
       for (i = 0; i < num_vals; ++i) {
-         float ref = test->ref(in[i]);
+         float testval, ref;
          double error, precision;
          bool pass;
 
+         testval = flush_denorm_to_zero(in[i]);
+         ref = flush_denorm_to_zero(test->ref(testval));
+
          if (util_inf_sign(ref) && util_inf_sign(out[i]) == util_inf_sign(ref)) {
             error = 0;
          } else {

src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp

@@ -772,7 +772,8 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i)
    if (i->tex.useOffsets) {
       for (int c = 0; c < 3; ++c) {
          ImmediateValue val;
-         assert(i->offset[0][c].getImmediate(val));
+         if (!i->offset[0][c].getImmediate(val))
+            assert(!"non-immediate offset");
          i->tex.offset[c] = val.reg.data.u32;
          i->offset[0][c].set(NULL);
       }

src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp

@@ -754,7 +754,8 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
          assert(i->tex.useOffsets == 1);
          for (c = 0; c < 3; ++c) {
             ImmediateValue val;
-            assert(i->offset[0][c].getImmediate(val));
+            if (!i->offset[0][c].getImmediate(val))
+               assert(!"non-immediate offset passed to non-TXG");
             imm |= (val.reg.data.u32 & 0xf) << (c * 4);
          }
          if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) {

src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h

@@ -1708,7 +1708,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NV50_3D_CULL_FACE_BACK					0x00000405
 #define NV50_3D_CULL_FACE_FRONT_AND_BACK			0x00000408
 
-#define NV50_3D_LINE_LAST_PIXEL					0x00001924
+#define NV50_3D_PIXEL_CENTER_INTEGER					0x00001924
 
 #define NVA3_3D_FP_MULTISAMPLE					0x00001928
 #define NVA3_3D_FP_MULTISAMPLE_EXPORT_SAMPLE_MASK		0x00000001

src/gallium/drivers/nouveau/nv50/nv50_screen.c

@@ -461,8 +461,6 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
    PUSH_DATA (push, 0);
    BEGIN_NV04(push, NV50_3D(PRIM_RESTART_WITH_DRAW_ARRAYS), 1);
    PUSH_DATA (push, 1);
-   BEGIN_NV04(push, NV50_3D(LINE_LAST_PIXEL), 1);
-   PUSH_DATA (push, 0);
    BEGIN_NV04(push, NV50_3D(BLEND_SEPARATE_ALPHA), 1);
    PUSH_DATA (push, 1);
 
@@ -609,6 +607,13 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
    BEGIN_NV04(push, NV50_3D(EDGEFLAG), 1);
    PUSH_DATA (push, 1);
 
+   BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
+   PUSH_DATA (push, 0);
+   if (screen->base.class_3d >= NV84_3D_CLASS) {
+      BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
+      PUSH_DATA (push, 0);
+   }
+
    PUSH_KICK (push);
 }
 

src/gallium/drivers/nouveau/nv50/nv50_state.c

@@ -57,10 +57,6 @@
  *  ! pipe_rasterizer_state.flatshade_first also applies to QUADS
  *    (There's a GL query for that, forcing an exception is just ridiculous.)
  *
- *  ! pipe_rasterizer_state.half_pixel_center is ignored - pixel centers
- *     are always at half integer coordinates and the top-left rule applies
- *    (There does not seem to be a hardware switch for this.)
- *
  *  ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
  *    (The hardware only has 8 slots meant for TexCoord and we have to assign
  *     in advance to maintain elegant separate shader objects.)
@@ -221,7 +217,7 @@ nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso)
    FREE(hwcso);
 }
 
-/* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
+/* NOTE: ignoring line_last_pixel */
 static void *
 nv50_rasterizer_state_create(struct pipe_context *pipe,
                              const struct pipe_rasterizer_state *cso)
@@ -336,6 +332,9 @@ nv50_rasterizer_state_create(struct pipe_context *pipe,
    SB_BEGIN_3D(so, DEPTH_CLIP_NEGATIVE_Z, 1);
    SB_DATA    (so, cso->clip_halfz);
 
+   SB_BEGIN_3D(so, PIXEL_CENTER_INTEGER, 1);
+   SB_DATA    (so, !cso->half_pixel_center);
+
    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
    return (void *)so;
 }

src/gallium/drivers/nouveau/nv50/nv50_stateobj.h

@@ -25,7 +25,7 @@ struct nv50_blend_stateobj {
 struct nv50_rasterizer_stateobj {
    struct pipe_rasterizer_state pipe;
    int size;
-   uint32_t state[48];
+   uint32_t state[49];
 };
 
 struct nv50_zsa_stateobj {

src/gallium/drivers/nouveau/nv50/nv50_vbo.c

@@ -472,6 +472,10 @@ nv50_draw_arrays(struct nv50_context *nv50,
    if (nv50->state.index_bias) {
       BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
       PUSH_DATA (push, 0);
+      if (nv50->screen->base.class_3d >= NV84_3D_CLASS) {
+         BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
+         PUSH_DATA (push, 0);
+      }
       nv50->state.index_bias = 0;
    }
 
@@ -594,6 +598,10 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten,
    if (index_bias != nv50->state.index_bias) {
       BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
       PUSH_DATA (push, index_bias);
+      if (nv50->screen->base.class_3d >= NV84_3D_CLASS) {
+         BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
+         PUSH_DATA (push, index_bias);
+      }
       nv50->state.index_bias = index_bias;
    }
 

src/gallium/drivers/nouveau/nvc0/mme/com9097.mme

@@ -227,6 +227,7 @@ locn_0f_ts:
 /* NVC0_3D_MACRO_DRAW_ELEMENTS_INDIRECT
  *
  * NOTE: Saves and restores VB_ELEMENT,INSTANCE_BASE.
+ * Forcefully sets VERTEX_ID_BASE to the value of VB_ELEMENT_BASE.
  *
  * arg     = mode
  * parm[0] = count
@@ -247,6 +248,8 @@ locn_0f_ts:
    maddr 0x150d /* VB_ELEMENT,INSTANCE_BASE */
    send $r4
    send $r5
+   maddr 0x446
+   send $r4
    mov $r4 0x1
 dei_again:
    maddr 0x586 /* VERTEX_BEGIN_GL */
@@ -258,8 +261,10 @@ dei_again:
    branz $r2 #dei_again
    mov $r1 (extrinsrt $r1 $r4 0 1 26) /* set INSTANCE_NEXT */
    maddr 0x150d /* VB_ELEMENT,INSTANCE_BASE */
-   exit send $r6
+   send $r6
    send $r7
+   exit maddr 0x446
+   send $r6
 dei_end:
    exit
    nop

src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h

@@ -128,16 +128,18 @@ uint32_t mme9097_draw_elts_indirect[] = {
 	0x00000301,
 	0x00000201,
 	0x017dc451,
-/* 0x000c: dei_again */
+/* 0x000e: dei_again */
 	0x00002431,
-	0x0004d007,
-/* 0x0017: dei_end */
+	0x0005d007,
 	0x00000501,
+/* 0x001b: dei_end */
 	0x01434615,
 	0x01438715,
 	0x05434021,
 	0x00002041,
 	0x00002841,
+	0x01118021,
+	0x00002041,
 	0x00004411,
 	0x01618021,
 	0x00000841,
@@ -148,8 +150,10 @@ uint32_t mme9097_draw_elts_indirect[] = {
 	0xfffe9017,
 	0xd0410912,
 	0x05434021,
-	0x000030c1,
+	0x00003041,
 	0x00003841,
+	0x011180a1,
+	0x00003041,
 	0x00000091,
 	0x00000011,
 };

src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h

@@ -1041,7 +1041,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define NVC0_3D_CULL_FACE_BACK					0x00000405
 #define NVC0_3D_CULL_FACE_FRONT_AND_BACK			0x00000408
 
-#define NVC0_3D_LINE_LAST_PIXEL					0x00001924
+#define NVC0_3D_PIXEL_CENTER_INTEGER					0x00001924
 
 #define NVC0_3D_VIEWPORT_TRANSFORM_EN				0x0000192c
 

src/gallium/drivers/nouveau/nvc0/nvc0_screen.c

@@ -786,8 +786,6 @@ nvc0_screen_create(struct nouveau_device *dev)
    PUSH_DATA (push, 0);
    BEGIN_NVC0(push, NVC0_3D(LINE_WIDTH_SEPARATE), 1);
    PUSH_DATA (push, 1);
-   BEGIN_NVC0(push, NVC0_3D(LINE_LAST_PIXEL), 1);
-   PUSH_DATA (push, 0);
    BEGIN_NVC0(push, NVC0_3D(PRIM_RESTART_WITH_DRAW_ARRAYS), 1);
    PUSH_DATA (push, 1);
    BEGIN_NVC0(push, NVC0_3D(BLEND_SEPARATE_ALPHA), 1);

src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c

@@ -252,7 +252,12 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
 
    for (b = 0; b < nvc0->num_tfbbufs; ++b) {
       struct nvc0_so_target *targ = nvc0_so_target(nvc0->tfbbuf[b]);
-      struct nv04_resource *buf = nv04_resource(targ->pipe.buffer);
+      struct nv04_resource *buf;
+
+      if (!targ) {
+         IMMED_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 0);
+         continue;
+      }
 
       if (tfb)
          targ->stride = tfb->stride[b];
@@ -260,6 +265,8 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
       if (!(nvc0->tfbbuf_dirty & (1 << b)))
          continue;
 
+      buf = nv04_resource(targ->pipe.buffer);
+
       if (!targ->clean)
          nvc0_query_fifo_wait(push, targ->pq);
       BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);

src/gallium/drivers/nouveau/nvc0/nvc0_state.c

@@ -204,7 +204,7 @@ nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
     FREE(hwcso);
 }
 
-/* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
+/* NOTE: ignoring line_last_pixel */
 static void *
 nvc0_rasterizer_state_create(struct pipe_context *pipe,
                              const struct pipe_rasterizer_state *cso)
@@ -315,6 +315,8 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe,
 
     SB_IMMED_3D(so, DEPTH_CLIP_NEGATIVE_Z, cso->clip_halfz);
 
+    SB_IMMED_3D(so, PIXEL_CENTER_INTEGER, !cso->half_pixel_center);
+
     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
     return (void *)so;
 }
@@ -1087,9 +1089,11 @@ nvc0_set_transform_feedback_targets(struct pipe_context *pipe,
       pipe_so_target_reference(&nvc0->tfbbuf[i], targets[i]);
    }
    for (; i < nvc0->num_tfbbufs; ++i) {
-      nvc0->tfbbuf_dirty |= 1 << i;
-      nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
-      pipe_so_target_reference(&nvc0->tfbbuf[i], NULL);
+      if (nvc0->tfbbuf[i]) {
+         nvc0->tfbbuf_dirty |= 1 << i;
+         nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
+         pipe_so_target_reference(&nvc0->tfbbuf[i], NULL);
+      }
    }
    nvc0->num_tfbbufs = num_targets;
 

src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h

@@ -23,7 +23,7 @@ struct nvc0_blend_stateobj {
 struct nvc0_rasterizer_stateobj {
    struct pipe_rasterizer_state pipe;
    int size;
-   uint32_t state[43];
+   uint32_t state[44];
 };
 
 struct nvc0_zsa_stateobj {

src/gallium/drivers/nouveau/nvc0/nvc0_surface.c

@@ -1401,11 +1401,14 @@ nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
       } else
       if (!nv50_2d_src_format_faithful(info->src.format)) {
          if (!util_format_is_luminance(info->src.format)) {
+            if (!nv50_2d_dst_format_ops_supported(info->dst.format))
+               eng3d = TRUE;
+            else
             if (util_format_is_intensity(info->src.format))
                eng3d = info->src.format != PIPE_FORMAT_I8_UNORM;
             else
-            if (!nv50_2d_dst_format_ops_supported(info->dst.format))
-               eng3d = TRUE;
+            if (util_format_is_alpha(info->src.format))
+               eng3d = info->src.format != PIPE_FORMAT_A8_UNORM;
             else
                eng3d = !nv50_2d_format_supported(info->src.format);
          }

src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c

@@ -575,8 +575,9 @@ nvc0_draw_arrays(struct nvc0_context *nvc0,
    if (nvc0->state.index_bias) {
       /* index_bias is implied 0 if !info->indexed (really ?) */
       /* TODO: can we deactivate it for the VERTEX_BUFFER_FIRST command ? */
-      PUSH_SPACE(push, 1);
+      PUSH_SPACE(push, 2);
       IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0);
+      IMMED_NVC0(push, NVC0_3D(VERTEX_ID), 0);
       nvc0->state.index_bias = 0;
    }
 
@@ -705,9 +706,11 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten,
    prim = nvc0_prim_gl(mode);
 
    if (index_bias != nvc0->state.index_bias) {
-      PUSH_SPACE(push, 2);
+      PUSH_SPACE(push, 4);
       BEGIN_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 1);
       PUSH_DATA (push, index_bias);
+      BEGIN_NVC0(push, NVC0_3D(VERTEX_ID), 1);
+      PUSH_DATA (push, index_bias);
       nvc0->state.index_bias = index_bias;
    }
 
@@ -818,6 +821,7 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
       if (nvc0->state.index_bias) {
          /* index_bias is implied 0 if !info->indexed (really ?) */
          IMMED_NVC0(push, NVC0_3D(VB_ELEMENT_BASE), 0);
+         IMMED_NVC0(push, NVC0_3D(VERTEX_ID), 0);
          nvc0->state.index_bias = 0;
       }
       size = 4 * 4;

src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c

@@ -28,6 +28,7 @@
  */
 
 #include <errno.h>
+#include <limits.h>
 #include <regex.h>
 #include <stdlib.h>
 #include <stdio.h>
@@ -528,7 +529,6 @@ void init_compiler(
 }
 
 #define MAX_LINE_LENGTH 100
-#define MAX_PATH_LENGTH 100
 
 unsigned load_program(
 	struct radeon_compiler *c,
@@ -536,14 +536,19 @@ unsigned load_program(
 	const char *filename)
 {
 	char line[MAX_LINE_LENGTH];
-	char path[MAX_PATH_LENGTH];
+	char path[PATH_MAX];
 	FILE *file;
 	unsigned *count;
 	char **string_store;
 	unsigned i = 0;
+	int n;
 
 	memset(line, 0, sizeof(line));
-	snprintf(path, MAX_PATH_LENGTH, TEST_PATH "/%s", filename);
+	n = snprintf(path, PATH_MAX, TEST_PATH "/%s", filename);
+	if (n < 0 || n >= PATH_MAX) {
+		return 0;
+	}
+
 	file = fopen(path, "r");
 	if (!file) {
 		return 0;

src/gallium/drivers/r300/r300_blit.c

@@ -803,6 +803,15 @@ static void r300_blit(struct pipe_context *pipe,
         (struct pipe_framebuffer_state*)r300->fb_state.state;
     struct pipe_blit_info info = *blit;
 
+    /* The driver supports sRGB textures but not framebuffers. Blitting
+     * from sRGB to sRGB should be the same as blitting from linear
+     * to linear, so use that, This avoids incorrect linearization.
+     */
+    if (util_format_is_srgb(info.src.format)) {
+      info.src.format = util_format_linear(info.src.format);
+      info.dst.format = util_format_linear(info.dst.format);
+    }
+
     /* MSAA resolve. */
     if (info.src.resource->nr_samples > 1 &&
         !util_format_is_depth_or_stencil(info.src.resource->format)) {

src/gallium/drivers/r300/r300_fs.c

@@ -170,24 +170,10 @@ static void get_external_state(
         }
 
         state->unit[i].non_normalized_coords = !s->state.normalized_coords;
-        state->unit[i].convert_unorm_to_snorm =
-                v->base.format == PIPE_FORMAT_RGTC1_SNORM ||
-                v->base.format == PIPE_FORMAT_LATC1_SNORM;
+        state->unit[i].convert_unorm_to_snorm = 0;
 
         /* Pass texture swizzling to the compiler, some lowering passes need it. */
-        if (v->base.format == PIPE_FORMAT_RGTC1_SNORM ||
-            v->base.format == PIPE_FORMAT_LATC1_SNORM) {
-            unsigned char swizzle[4];
-
-            util_format_compose_swizzles(
-                            util_format_description(v->base.format)->swizzle,
-                            v->swizzle,
-                            swizzle);
-
-            state->unit[i].texture_swizzle =
-                    RC_MAKE_SWIZZLE(swizzle[0], swizzle[1],
-                                    swizzle[2], swizzle[3]);
-        } else if (state->unit[i].compare_mode_enabled) {
+        if (state->unit[i].compare_mode_enabled) {
             state->unit[i].texture_swizzle =
                 RC_MAKE_SWIZZLE(v->swizzle[0], v->swizzle[1],
                                 v->swizzle[2], v->swizzle[3]);

src/gallium/drivers/r300/r300_texture.c

@@ -169,20 +169,21 @@ uint32_t r300_translate_texformat(enum pipe_format format,
 
     /* Add swizzling. */
     /* The RGTC1_SNORM and LATC1_SNORM swizzle is done in the shader. */
-    if (format != PIPE_FORMAT_RGTC1_SNORM &&
+    if (util_format_is_compressed(format) &&
+        dxtc_swizzle &&
+        format != PIPE_FORMAT_RGTC2_UNORM &&
+        format != PIPE_FORMAT_RGTC2_SNORM &&
+        format != PIPE_FORMAT_LATC2_UNORM &&
+        format != PIPE_FORMAT_LATC2_SNORM &&
+        format != PIPE_FORMAT_RGTC1_UNORM &&
+        format != PIPE_FORMAT_RGTC1_SNORM &&
+        format != PIPE_FORMAT_LATC1_UNORM &&
         format != PIPE_FORMAT_LATC1_SNORM) {
-        if (util_format_is_compressed(format) &&
-            dxtc_swizzle &&
-            format != PIPE_FORMAT_RGTC2_UNORM &&
-            format != PIPE_FORMAT_RGTC2_SNORM &&
-            format != PIPE_FORMAT_LATC2_UNORM &&
-            format != PIPE_FORMAT_LATC2_SNORM) {
-            result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
-                                                TRUE);
-        } else {
-            result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
-                                                FALSE);
-        }
+        result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
+                                            TRUE);
+    } else {
+        result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
+                                            FALSE);
     }
 
     /* S3TC formats. */
@@ -213,6 +214,7 @@ uint32_t r300_translate_texformat(enum pipe_format format,
         switch (format) {
             case PIPE_FORMAT_RGTC1_SNORM:
             case PIPE_FORMAT_LATC1_SNORM:
+                result |= sign_bit[0];
             case PIPE_FORMAT_LATC1_UNORM:
             case PIPE_FORMAT_RGTC1_UNORM:
                 return R500_TX_FORMAT_ATI1N | result;
@@ -936,14 +938,16 @@ static void r300_texture_setup_fb_state(struct r300_surface *surf)
         surf->pitch_zmask = tex->tex.zmask_stride_in_pixels[level];
         surf->pitch_hiz = tex->tex.hiz_stride_in_pixels[level];
     } else {
+        enum pipe_format format = util_format_linear(surf->base.format);
+
         surf->pitch =
                 stride |
-                r300_translate_colorformat(surf->base.format) |
+                r300_translate_colorformat(format) |
                 R300_COLOR_TILE(tex->tex.macrotile[level]) |
                 R300_COLOR_MICROTILE(tex->tex.microtile);
-        surf->format = r300_translate_out_fmt(surf->base.format);
+        surf->format = r300_translate_out_fmt(format);
         surf->colormask_swizzle =
-            r300_translate_colormask_swizzle(surf->base.format);
+            r300_translate_colormask_swizzle(format);
         surf->pitch_cmask = tex->tex.cmask_stride_in_pixels;
     }
 }

src/gallium/drivers/r600/r600_shader.c

@@ -6071,7 +6071,7 @@ static int tgsi_ucmp(struct r600_shader_ctx *ctx)
 			continue;
 
 		memset(&alu, 0, sizeof(struct r600_bytecode_alu));
-		alu.op = ALU_OP3_CNDGE_INT;
+		alu.op = ALU_OP3_CNDE_INT;
 		r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
 		r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
 		r600_bytecode_src(&alu.src[2], &ctx->src[1], i);

src/gallium/drivers/r600/r600_state.c

@@ -2659,11 +2659,8 @@ void r600_update_gs_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
 	r600_store_context_reg(cb, R_028A6C_VGT_GS_OUT_PRIM_TYPE,
 			       r600_conv_prim_to_gs_out(rshader->gs_output_prim));
 
-	r600_store_context_reg_seq(cb, R_0288C8_SQ_GS_VERT_ITEMSIZE, 4);
-	r600_store_value(cb, cp_shader->ring_item_size >> 2);
-	r600_store_value(cb, 0);
-	r600_store_value(cb, 0);
-	r600_store_value(cb, 0);
+	r600_store_context_reg(cb, R_0288C8_SQ_GS_VERT_ITEMSIZE,
+	                       cp_shader->ring_item_size >> 2);
 
 	r600_store_context_reg(cb, R_0288A8_SQ_ESGS_RING_ITEMSIZE,
 			       (rshader->ring_item_size) >> 2);

src/gallium/drivers/r600/sb/sb_bc.h

@@ -616,6 +616,8 @@ public:
 	unsigned num_slots;
 	bool uses_mova_gpr;
 
+	bool r6xx_gpr_index_workaround;
+
 	bool stack_workaround_8xx;
 	bool stack_workaround_9xx;
 

src/gallium/drivers/r600/sb/sb_bc_finalize.cpp

@@ -38,6 +38,18 @@
 
 namespace r600_sb {
 
+void bc_finalizer::insert_rv6xx_load_ar_workaround(alu_group_node *b4) {
+
+	alu_group_node *g = sh.create_alu_group();
+	alu_node *a = sh.create_alu();
+
+	a->bc.set_op(ALU_OP0_NOP);
+	a->bc.last = 1;
+
+	g->push_back(a);
+	b4->insert_before(g);
+}
+
 int bc_finalizer::run() {
 
 	run_on(sh.root);
@@ -46,22 +58,15 @@ int bc_finalizer::run() {
 	for (regions_vec::reverse_iterator I = rv.rbegin(), E = rv.rend(); I != E;
 			++I) {
 		region_node *r = *I;
-		bool is_if = false;
+
 		assert(r);
 
-		assert(r->first);
-		if (r->first->is_container()) {
-			container_node *repdep1 = static_cast<container_node*>(r->first);
-			assert(repdep1->is_depart() || repdep1->is_repeat());
-			if_node *n_if = static_cast<if_node*>(repdep1->first);
-			if (n_if && n_if->is_if())
-				is_if = true;
-		}
+		bool loop = r->is_loop();
 
-		if (is_if)
-			finalize_if(r);
-		else
+		if (loop)
 			finalize_loop(r);
+		else
+			finalize_if(r);
 
 		r->expand();
 	}
@@ -117,35 +122,20 @@ int bc_finalizer::run() {
 
 void bc_finalizer::finalize_loop(region_node* r) {
 
+	update_nstack(r);
+
 	cf_node *loop_start = sh.create_cf(CF_OP_LOOP_START_DX10);
 	cf_node *loop_end = sh.create_cf(CF_OP_LOOP_END);
-	bool has_instr = false;
 
-	if (!r->is_loop()) {
-		for (depart_vec::iterator I = r->departs.begin(), E = r->departs.end();
-		     I != E; ++I) {
-			depart_node *dep = *I;
-			if (!dep->empty()) {
-				has_instr = true;
-				break;
-			}
-		}
-	} else
-		has_instr = true;
-
-	if (has_instr) {
-		loop_start->jump_after(loop_end);
-		loop_end->jump_after(loop_start);
-	}
+	loop_start->jump_after(loop_end);
+	loop_end->jump_after(loop_start);
 
 	for (depart_vec::iterator I = r->departs.begin(), E = r->departs.end();
 			I != E; ++I) {
 		depart_node *dep = *I;
-		if (has_instr) {
-			cf_node *loop_break = sh.create_cf(CF_OP_LOOP_BREAK);
-			loop_break->jump(loop_end);
-			dep->push_back(loop_break);
-		}
+		cf_node *loop_break = sh.create_cf(CF_OP_LOOP_BREAK);
+		loop_break->jump(loop_end);
+		dep->push_back(loop_break);
 		dep->expand();
 	}
 
@@ -161,10 +151,8 @@ void bc_finalizer::finalize_loop(region_node* r) {
 		rep->expand();
 	}
 
-	if (has_instr) {
-		r->push_front(loop_start);
-		r->push_back(loop_end);
-	}
+	r->push_front(loop_start);
+	r->push_back(loop_end);
 }
 
 void bc_finalizer::finalize_if(region_node* r) {
@@ -235,12 +223,12 @@ void bc_finalizer::finalize_if(region_node* r) {
 }
 
 void bc_finalizer::run_on(container_node* c) {
-
+	node *prev_node = NULL;
 	for (node_iterator I = c->begin(), E = c->end(); I != E; ++I) {
 		node *n = *I;
 
 		if (n->is_alu_group()) {
-			finalize_alu_group(static_cast<alu_group_node*>(n));
+			finalize_alu_group(static_cast<alu_group_node*>(n), prev_node);
 		} else {
 			if (n->is_alu_clause()) {
 				cf_node *c = static_cast<cf_node*>(n);
@@ -275,17 +263,22 @@ void bc_finalizer::run_on(container_node* c) {
 			if (n->is_container())
 				run_on(static_cast<container_node*>(n));
 		}
+		prev_node = n;
 	}
 }
 
-void bc_finalizer::finalize_alu_group(alu_group_node* g) {
+void bc_finalizer::finalize_alu_group(alu_group_node* g, node *prev_node) {
 
 	alu_node *last = NULL;
+	alu_group_node *prev_g = NULL;
+	bool add_nop = false;
+	if (prev_node && prev_node->is_alu_group()) {
+		prev_g = static_cast<alu_group_node*>(prev_node);
+	}
 
 	for (node_iterator I = g->begin(), E = g->end(); I != E; ++I) {
 		alu_node *n = static_cast<alu_node*>(*I);
 		unsigned slot = n->bc.slot;
-
 		value *d = n->dst.empty() ? NULL : n->dst[0];
 
 		if (d && d->is_special_reg()) {
@@ -323,17 +316,22 @@ void bc_finalizer::finalize_alu_group(alu_group_node* g) {
 
 		update_ngpr(n->bc.dst_gpr);
 
-		finalize_alu_src(g, n);
+		add_nop |= finalize_alu_src(g, n, prev_g);
 
 		last = n;
 	}
 
+	if (add_nop) {
+		if (sh.get_ctx().r6xx_gpr_index_workaround) {
+			insert_rv6xx_load_ar_workaround(g);
+		}
+	}
 	last->bc.last = 1;
 }
 
-void bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a) {
+bool bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a, alu_group_node *prev) {
 	vvec &sv = a->src;
-
+	bool add_nop = false;
 	FBC_DUMP(
 		sblog << "finalize_alu_src: ";
 		dump::dump_op(a);
@@ -360,6 +358,15 @@ void bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a) {
 			if (!v->rel->is_const()) {
 				src.rel = 1;
 				update_ngpr(v->array->gpr.sel() + v->array->array_size -1);
+				if (prev && !add_nop) {
+					for (node_iterator pI = prev->begin(), pE = prev->end(); pI != pE; ++pI) {
+						alu_node *pn = static_cast<alu_node*>(*pI);
+						if (pn->bc.dst_gpr == src.sel) {
+							add_nop = true;
+							break;
+						}
+					}
+				}
 			} else
 				src.rel = 0;
 
@@ -417,11 +424,23 @@ void bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a) {
 			assert(!"unknown value kind");
 			break;
 		}
+		if (prev && !add_nop) {
+			for (node_iterator pI = prev->begin(), pE = prev->end(); pI != pE; ++pI) {
+				alu_node *pn = static_cast<alu_node*>(*pI);
+				if (pn->bc.dst_rel) {
+					if (pn->bc.dst_gpr == src.sel) {
+						add_nop = true;
+						break;
+					}
+				}
+			}
+		}
 	}
 
 	while (si < 3) {
 		a->bc.src[si++].sel = 0;
 	}
+	return add_nop;
 }
 
 void bc_finalizer::copy_fetch_src(fetch_node &dst, fetch_node &src, unsigned arg_start)

src/gallium/drivers/r600/sb/sb_bc_parser.cpp

@@ -758,6 +758,8 @@ int bc_parser::prepare_loop(cf_node* c) {
 	c->insert_before(reg);
 	rep->move(c, end->next);
 
+	reg->src_loop = true;
+
 	loop_stack.push(reg);
 	return 0;
 }

src/gallium/drivers/r600/sb/sb_context.cpp

@@ -61,6 +61,8 @@ int sb_context::init(r600_isa *isa, sb_hw_chip chip, sb_hw_class cclass) {
 
 	uses_mova_gpr = is_r600() && chip != HW_CHIP_RV670;
 
+	r6xx_gpr_index_workaround = is_r600() && chip != HW_CHIP_RV670 && chip != HW_CHIP_RS780 && chip != HW_CHIP_RS880;
+
 	switch (chip) {
 	case HW_CHIP_RV610:
 	case HW_CHIP_RS780:

src/gallium/drivers/r600/sb/sb_if_conversion.cpp

@@ -115,13 +115,13 @@ void if_conversion::convert_kill_instructions(region_node *r,
 bool if_conversion::check_and_convert(region_node *r) {
 
 	depart_node *nd1 = static_cast<depart_node*>(r->first);
-	if (!nd1->is_depart())
+	if (!nd1->is_depart() || nd1->target != r)
 		return false;
 	if_node *nif = static_cast<if_node*>(nd1->first);
 	if (!nif->is_if())
 		return false;
 	depart_node *nd2 = static_cast<depart_node*>(nif->first);
-	if (!nd2->is_depart())
+	if (!nd2->is_depart() || nd2->target != r)
 		return false;
 
 	value* &em = nif->cond;

src/gallium/drivers/r600/sb/sb_ir.h

@@ -1089,7 +1089,8 @@ typedef std::vector<repeat_node*> repeat_vec;
 class region_node : public container_node {
 protected:
 	region_node(unsigned id) : container_node(NT_REGION, NST_LIST), region_id(id),
-			loop_phi(), phi(), vars_defined(), departs(), repeats() {}
+			loop_phi(), phi(), vars_defined(), departs(), repeats(), src_loop()
+			{}
 public:
 	unsigned region_id;
 
@@ -1101,12 +1102,16 @@ public:
 	depart_vec departs;
 	repeat_vec repeats;
 
+	// true if region was created for loop in the parser, sometimes repeat_node
+	// may be optimized away so we need to remember this information
+	bool src_loop;
+
 	virtual bool accept(vpass &p, bool enter);
 
 	unsigned dep_count() { return departs.size(); }
 	unsigned rep_count() { return repeats.size() + 1; }
 
-	bool is_loop() { return !repeats.empty(); }
+	bool is_loop() { return src_loop || !repeats.empty(); }
 
 	container_node* get_entry_code_location() {
 		node *p = first;

src/gallium/drivers/r600/sb/sb_pass.h

@@ -695,8 +695,9 @@ public:
 
 	void run_on(container_node *c);
 
-	void finalize_alu_group(alu_group_node *g);
-	void finalize_alu_src(alu_group_node *g, alu_node *a);
+	void insert_rv6xx_load_ar_workaround(alu_group_node *b4);
+	void finalize_alu_group(alu_group_node *g, node *prev_node);
+	bool finalize_alu_src(alu_group_node *g, alu_node *a, alu_group_node *prev_node);
 
 	void emit_set_grad(fetch_node* f);
 	void finalize_fetch(fetch_node *f);

src/gallium/drivers/r600/sb/sb_sched.cpp

@@ -1527,6 +1527,9 @@ bool post_scheduler::check_copy(node *n) {
 
 	if (!s->is_prealloc()) {
 		recolor_local(s);
+
+		if (!s->chunk || s->chunk != d->chunk)
+			return false;
 	}
 
 	if (s->gpr == d->gpr) {

src/gallium/drivers/radeon/r600_pipe_common.h

@@ -294,6 +294,7 @@ struct r600_so_target {
 	/* The buffer where BUFFER_FILLED_SIZE is stored. */
 	struct r600_resource	*buf_filled_size;
 	unsigned		buf_filled_size_offset;
+	bool			buf_filled_size_valid;
 
 	unsigned		stride_in_dw;
 };

src/gallium/drivers/radeon/r600_streamout.c

@@ -237,7 +237,7 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
 			}
 		}
 
-		if (rctx->streamout.append_bitmask & (1 << i)) {
+		if (rctx->streamout.append_bitmask & (1 << i) && t[i]->buf_filled_size_valid) {
 			uint64_t va = t[i]->buf_filled_size->gpu_address +
 				      t[i]->buf_filled_size_offset;
 
@@ -302,6 +302,8 @@ void r600_emit_streamout_end(struct r600_common_context *rctx)
 		 * buffer bound. This ensures that the primitives-emitted query
 		 * won't increment. */
 		r600_write_context_reg(cs, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 + 16*i, 0);
+
+		t[i]->buf_filled_size_valid = true;
 	}
 
 	rctx->streamout.begin_emitted = false;

src/gallium/drivers/radeon/radeon_llvm_emit.c

@@ -80,10 +80,6 @@ void radeon_llvm_shader_type(LLVMValueRef F, unsigned type)
 	sprintf(Str, "%1d", llvm_type);
 
 	LLVMAddTargetDependentFunctionAttr(F, "ShaderType", Str);
-
-	if (type != TGSI_PROCESSOR_COMPUTE) {
-		LLVMAddTargetDependentFunctionAttr(F, "unsafe-fp-math", "true");
-	}
 }
 
 static void init_r600_target()

src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

@@ -748,7 +748,7 @@ static void txp_fetch_args(
 	const struct tgsi_full_instruction * inst = emit_data->inst;
 	LLVMValueRef src_w;
 	unsigned chan;
-	LLVMValueRef coords[4];
+	LLVMValueRef coords[5];
 
 	emit_data->dst_type = LLVMVectorType(bld_base->base.elem_type, 4);
 	src_w = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_W);

src/gallium/drivers/radeonsi/si_shader.c

@@ -228,14 +228,14 @@ static LLVMValueRef get_instance_index_for_fetch(
 
 	LLVMValueRef result = LLVMGetParam(radeon_bld->main_fn,
 					   si_shader_ctx->param_instance_id);
-	result = LLVMBuildAdd(gallivm->builder, result, LLVMGetParam(
-			radeon_bld->main_fn, SI_PARAM_START_INSTANCE), "");
 
+	/* The division must be done before START_INSTANCE is added. */
 	if (divisor > 1)
 		result = LLVMBuildUDiv(gallivm->builder, result,
 				lp_build_const_int32(gallivm, divisor), "");
 
-	return result;
+	return LLVMBuildAdd(gallivm->builder, result, LLVMGetParam(
+			radeon_bld->main_fn, SI_PARAM_START_INSTANCE), "");
 }
 
 static void declare_input_vs(
@@ -590,8 +590,11 @@ static void declare_system_value(
 		break;
 
 	case TGSI_SEMANTIC_VERTEXID:
-		value = LLVMGetParam(radeon_bld->main_fn,
-				     si_shader_ctx->param_vertex_id);
+		value = LLVMBuildAdd(gallivm->builder,
+				     LLVMGetParam(radeon_bld->main_fn,
+						  si_shader_ctx->param_vertex_id),
+				     LLVMGetParam(radeon_bld->main_fn,
+						  SI_PARAM_BASE_VERTEX), "");
 		break;
 
 	case TGSI_SEMANTIC_SAMPLEID:
@@ -1502,7 +1505,7 @@ static void tex_fetch_args(
 	const struct tgsi_full_instruction * inst = emit_data->inst;
 	unsigned opcode = inst->Instruction.Opcode;
 	unsigned target = inst->Texture.Texture;
-	LLVMValueRef coords[4];
+	LLVMValueRef coords[5];
 	LLVMValueRef address[16];
 	int ref_pos;
 	unsigned num_coords = tgsi_util_get_texture_coord_dim(target, &ref_pos);

src/gallium/drivers/radeonsi/si_state.c

@@ -697,12 +697,16 @@ static void si_delete_rs_state(struct pipe_context *ctx, void *state)
  */
 static void si_update_dsa_stencil_ref(struct si_context *sctx)
 {
-	struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
+	struct si_pm4_state *pm4;
 	struct pipe_stencil_ref *ref = &sctx->stencil_ref;
-        struct si_state_dsa *dsa = sctx->queued.named.dsa;
+	struct si_state_dsa *dsa = sctx->queued.named.dsa;
 
-        if (pm4 == NULL)
-                return;
+	if (!dsa)
+		return;
+
+	pm4 = CALLOC_STRUCT(si_pm4_state);
+	if (pm4 == NULL)
+		return;
 
 	si_pm4_set_reg(pm4, R_028430_DB_STENCILREFMASK,
 		       S_028430_STENCILTESTVAL(ref->ref_value[0]) |
@@ -3081,6 +3085,110 @@ void si_init_state_functions(struct si_context *sctx)
 	sctx->b.b.draw_vbo = si_draw_vbo;
 }
 
+static void
+si_write_harvested_raster_configs(struct si_context *sctx,
+				  struct si_pm4_state *pm4,
+				  unsigned raster_config)
+{
+	unsigned sh_per_se = MAX2(sctx->screen->b.info.max_sh_per_se, 1);
+	unsigned num_se = MAX2(sctx->screen->b.info.max_se, 1);
+	unsigned rb_mask = sctx->screen->b.info.si_backend_enabled_mask;
+	unsigned num_rb = sctx->screen->b.info.r600_num_backends;
+	unsigned rb_per_pkr = num_rb / num_se / sh_per_se;
+	unsigned rb_per_se = num_rb / num_se;
+	unsigned se0_mask = (1 << rb_per_se) - 1;
+	unsigned se1_mask = se0_mask << rb_per_se;
+	unsigned se;
+
+	assert(num_se == 1 || num_se == 2);
+	assert(sh_per_se == 1 || sh_per_se == 2);
+	assert(rb_per_pkr == 1 || rb_per_pkr == 2);
+
+	/* XXX: I can't figure out what the *_XSEL and *_YSEL
+	 * fields are for, so I'm leaving them as their default
+	 * values. */
+
+	se0_mask &= rb_mask;
+	se1_mask &= rb_mask;
+	if (num_se == 2 && (!se0_mask || !se1_mask)) {
+		raster_config &= C_028350_SE_MAP;
+
+		if (!se0_mask) {
+			raster_config |=
+				S_028350_SE_MAP(V_028350_RASTER_CONFIG_SE_MAP_3);
+		} else {
+			raster_config |=
+				S_028350_SE_MAP(V_028350_RASTER_CONFIG_SE_MAP_0);
+		}
+	}
+
+	for (se = 0; se < num_se; se++) {
+		unsigned raster_config_se = raster_config;
+		unsigned pkr0_mask = ((1 << rb_per_pkr) - 1) << (se * rb_per_se);
+		unsigned pkr1_mask = pkr0_mask << rb_per_pkr;
+
+		pkr0_mask &= rb_mask;
+		pkr1_mask &= rb_mask;
+		if (sh_per_se == 2 && (!pkr0_mask || !pkr1_mask)) {
+			raster_config_se &= C_028350_PKR_MAP;
+
+			if (!pkr0_mask) {
+				raster_config_se |=
+					S_028350_PKR_MAP(V_028350_RASTER_CONFIG_PKR_MAP_3);
+			} else {
+				raster_config_se |=
+					S_028350_PKR_MAP(V_028350_RASTER_CONFIG_PKR_MAP_0);
+			}
+		}
+
+		if (rb_per_pkr == 2) {
+			unsigned rb0_mask = 1 << (se * rb_per_se);
+			unsigned rb1_mask = rb0_mask << 1;
+
+			rb0_mask &= rb_mask;
+			rb1_mask &= rb_mask;
+			if (!rb0_mask || !rb1_mask) {
+				raster_config_se &= C_028350_RB_MAP_PKR0;
+
+				if (!rb0_mask) {
+					raster_config_se |=
+						S_028350_RB_MAP_PKR0(V_028350_RASTER_CONFIG_RB_MAP_3);
+				} else {
+					raster_config_se |=
+						S_028350_RB_MAP_PKR0(V_028350_RASTER_CONFIG_RB_MAP_0);
+				}
+			}
+
+			if (sh_per_se == 2) {
+				rb0_mask = 1 << (se * rb_per_se + rb_per_pkr);
+				rb1_mask = rb0_mask << 1;
+				rb0_mask &= rb_mask;
+				rb1_mask &= rb_mask;
+				if (!rb0_mask || !rb1_mask) {
+					raster_config_se &= C_028350_RB_MAP_PKR1;
+
+					if (!rb0_mask) {
+						raster_config_se |=
+							S_028350_RB_MAP_PKR1(V_028350_RASTER_CONFIG_RB_MAP_3);
+					} else {
+						raster_config_se |=
+							S_028350_RB_MAP_PKR1(V_028350_RASTER_CONFIG_RB_MAP_0);
+					}
+				}
+			}
+		}
+
+		si_pm4_set_reg(pm4, GRBM_GFX_INDEX,
+			       SE_INDEX(se) | SH_BROADCAST_WRITES |
+			       INSTANCE_BROADCAST_WRITES);
+		si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, raster_config_se);
+	}
+
+	si_pm4_set_reg(pm4, GRBM_GFX_INDEX,
+		       SE_BROADCAST_WRITES | SH_BROADCAST_WRITES |
+		       INSTANCE_BROADCAST_WRITES);
+}
+
 void si_init_config(struct si_context *sctx)
 {
 	struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
@@ -3152,24 +3260,40 @@ void si_init_config(struct si_context *sctx)
 			break;
 		}
 	} else {
+		unsigned rb_mask = sctx->screen->b.info.si_backend_enabled_mask;
+		unsigned num_rb = sctx->screen->b.info.r600_num_backends;
+		unsigned raster_config;
+
 		switch (sctx->screen->b.family) {
 		case CHIP_TAHITI:
 		case CHIP_PITCAIRN:
-			si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x2a00126a);
+			raster_config = 0x2a00126a;
 			break;
 		case CHIP_VERDE:
-			si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x0000124a);
+			raster_config = 0x0000124a;
 			break;
 		case CHIP_OLAND:
-			si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x00000082);
+			raster_config = 0x00000082;
 			break;
 		case CHIP_HAINAN:
-			si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x00000000);
+			raster_config = 0x00000000;
 			break;
 		default:
-			si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x00000000);
+			fprintf(stderr,
+				"radeonsi: Unknown GPU, using 0 for raster_config\n");
+			raster_config = 0x00000000;
 			break;
 		}
+
+		/* Always use the default config when all backends are enabled
+		 * (or when we failed to determine the enabled backends).
+		 */
+		if (!rb_mask || util_bitcount(rb_mask) >= num_rb) {
+			si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG,
+				       raster_config);
+		} else {
+			si_write_harvested_raster_configs(sctx, pm4, raster_config);
+		}
 	}
 
 	si_pm4_set_reg(pm4, R_028204_PA_SC_WINDOW_SCISSOR_TL, S_028204_WINDOW_OFFSET_DISABLE(1));

src/gallium/drivers/radeonsi/si_state_draw.c

@@ -544,9 +544,11 @@ bcolor:
 			}
 		}
 
-		if (j == vsinfo->num_outputs) {
-			/* No corresponding output found, load defaults into input */
-			tmp |= S_028644_OFFSET(0x20);
+		if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(tmp)) {
+			/* No corresponding output found, load defaults into input.
+			 * Don't set any other bits.
+			 * (FLAT_SHADE=1 completely changes behavior) */
+			tmp = S_028644_OFFSET(0x20);
 		}
 
 		si_pm4_set_reg(pm4,

src/gallium/drivers/radeonsi/sid.h

@@ -204,7 +204,13 @@
  * 6. COMMAND [29:22] | BYTE_COUNT [20:0]
  */
 
-
+#define GRBM_GFX_INDEX                                                  0x802C
+#define         INSTANCE_INDEX(x)                                     ((x) << 0)
+#define         SH_INDEX(x)                                           ((x) << 8)
+#define         SE_INDEX(x)                                           ((x) << 16)
+#define         SH_BROADCAST_WRITES                                   (1 << 29)
+#define         INSTANCE_BROADCAST_WRITES                             (1 << 30)
+#define         SE_BROADCAST_WRITES                                   (1 << 31)
 #define R_0084FC_CP_STRMOUT_CNTL		                        0x0084FC
 #define   S_0084FC_OFFSET_UPDATE_DONE(x)		              (((x) & 0x1) << 0)
 #define R_0085F0_CP_COHER_CNTL                                          0x0085F0

src/gallium/state_trackers/nine/adapter9.c

@@ -302,6 +302,9 @@ NineAdapter9_CheckDeviceFormat( struct NineAdapter9 *This,
         return D3DERR_NOTAVAILABLE;
     }
 
+    /* we support ATI1 and ATI2 hack only for 2D textures */
+    if (RType != D3DRTYPE_TEXTURE && (CheckFormat == D3DFMT_ATI1 || CheckFormat == D3DFMT_ATI2))
+        return D3DERR_NOTAVAILABLE;
     /* if (Usage & D3DUSAGE_NONSECURE) { don't know the implications of this } */
     /* if (Usage & D3DUSAGE_SOFTWAREPROCESSING) { we can always support this } */
 
@@ -549,7 +552,7 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
                                D3DPMISCCAPS_CULLCCW |
                                D3DPMISCCAPS_COLORWRITEENABLE |
                                D3DPMISCCAPS_CLIPPLANESCALEDPOINTS |
-                               D3DPMISCCAPS_CLIPTLVERTS |
+                               /*D3DPMISCCAPS_CLIPTLVERTS |*/
                                D3DPMISCCAPS_TSSARGTEMP |
                                D3DPMISCCAPS_BLENDOP |
                                D3DPIPECAP(INDEP_BLEND_ENABLE, D3DPMISCCAPS_INDEPENDENTWRITEMASKS) |
@@ -560,6 +563,8 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
                                D3DPIPECAP(MIXED_COLORBUFFER_FORMATS, D3DPMISCCAPS_MRTINDEPENDENTBITDEPTHS) |
                                D3DPMISCCAPS_MRTPOSTPIXELSHADERBLENDING |
                                /*D3DPMISCCAPS_FOGVERTEXCLAMPED*/0;
+    if (!screen->get_param(screen, PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION))
+        pCaps->PrimitiveMiscCaps |= D3DPMISCCAPS_CLIPTLVERTS;
 
     pCaps->RasterCaps =
         D3DPIPECAP(ANISOTROPIC_FILTER, D3DPRASTERCAPS_ANISOTROPY) |

src/gallium/state_trackers/nine/basetexture9.c

@@ -436,14 +436,21 @@ NineBaseTexture9_CreatePipeResource( struct NineBaseTexture9 *This,
     return D3D_OK;
 }
 
+#define SWIZZLE_TO_REPLACE(s) (s == UTIL_FORMAT_SWIZZLE_0 || \
+                               s == UTIL_FORMAT_SWIZZLE_1 || \
+                               s == UTIL_FORMAT_SWIZZLE_NONE)
+
 HRESULT
 NineBaseTexture9_UpdateSamplerView( struct NineBaseTexture9 *This,
                                     const int sRGB )
 {
     const struct util_format_description *desc;
     struct pipe_context *pipe = This->pipe;
+    struct pipe_screen *screen = pipe->screen;
     struct pipe_resource *resource = This->base.resource;
     struct pipe_sampler_view templ;
+    enum pipe_format srgb_format;
+    unsigned i;
     uint8_t swizzle[4];
 
     DBG("This=%p sRGB=%d\n", This, sRGB);
@@ -452,6 +459,9 @@ NineBaseTexture9_UpdateSamplerView( struct NineBaseTexture9 *This,
 	if (unlikely(This->format == D3DFMT_NULL))
             return D3D_OK;
         NineBaseTexture9_Dump(This);
+        /* hack due to incorrect POOL_MANAGED handling */
+        NineBaseTexture9_GenerateMipSubLevels(This);
+        resource = This->base.resource;
     }
     assert(resource);
 
@@ -463,25 +473,49 @@ NineBaseTexture9_UpdateSamplerView( struct NineBaseTexture9 *This,
     swizzle[3] = PIPE_SWIZZLE_ALPHA;
     desc = util_format_description(resource->format);
     if (desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) {
-        /* ZZZ1 -> 0Z01 (see end of docs/source/tgsi.rst)
-         * XXX: but it's wrong
-        swizzle[0] = PIPE_SWIZZLE_ZERO;
-        swizzle[2] = PIPE_SWIZZLE_ZERO; */
-    } else
-    if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_X &&
-        desc->swizzle[3] == UTIL_FORMAT_SWIZZLE_1) {
-        /* R001/RG01 -> R111/RG11 */
-        if (desc->swizzle[1] == UTIL_FORMAT_SWIZZLE_0)
-            swizzle[1] = PIPE_SWIZZLE_ONE;
-        if (desc->swizzle[2] == UTIL_FORMAT_SWIZZLE_0)
-            swizzle[2] = PIPE_SWIZZLE_ONE;
+        /* msdn doc is incomplete here and wrong.
+         * The only formats that can be read directly here
+         * are DF16, DF24 and INTZ.
+         * Tested on win the swizzle is
+         * R = depth, G = B = 0, A = 1 for DF16 and DF24
+         * R = G = B = A = depth for INTZ
+         * For the other ZS formats that can't be read directly
+         * but can be used as shadow map, the result is duplicated on
+         * all channel */
+        if (This->format == D3DFMT_DF16 ||
+            This->format == D3DFMT_DF24) {
+            swizzle[1] = PIPE_SWIZZLE_ZERO;
+            swizzle[2] = PIPE_SWIZZLE_ZERO;
+            swizzle[3] = PIPE_SWIZZLE_ONE;
+        } else {
+            swizzle[1] = PIPE_SWIZZLE_RED;
+            swizzle[2] = PIPE_SWIZZLE_RED;
+            swizzle[3] = PIPE_SWIZZLE_RED;
+        }
+    } else if (resource->format != PIPE_FORMAT_A8_UNORM &&
+               resource->format != PIPE_FORMAT_RGTC1_UNORM) {
+        /* exceptions:
+         * A8 should have 0.0 as default values for RGB.
+         * ATI1/RGTC1 should be r 0 0 1 (tested on windows).
+         * It is already what gallium does. All the other ones
+         * should have 1.0 for non-defined values */
+        for (i = 0; i < 4; i++) {
+            if (SWIZZLE_TO_REPLACE(desc->swizzle[i]))
+                swizzle[i] = PIPE_SWIZZLE_ONE;
+        }
     }
-    /* but 000A remains unchanged */
 
-    templ.format = sRGB ? util_format_srgb(resource->format) : resource->format;
+    /* if requested and supported, convert to the sRGB format */
+    srgb_format = util_format_srgb(resource->format);
+    if (sRGB && srgb_format != PIPE_FORMAT_NONE &&
+        screen->is_format_supported(screen, srgb_format,
+                                    resource->target, 0, resource->bind))
+        templ.format = srgb_format;
+    else
+        templ.format = resource->format;
     templ.u.tex.first_layer = 0;
-    templ.u.tex.last_layer = (resource->target == PIPE_TEXTURE_CUBE) ?
-        5 : (This->base.info.depth0 - 1);
+    templ.u.tex.last_layer = resource->target == PIPE_TEXTURE_3D ?
+                             resource->depth0 - 1 : resource->array_size - 1;
     templ.u.tex.first_level = 0;
     templ.u.tex.last_level = resource->last_level;
     templ.swizzle_r = swizzle[0];

src/gallium/state_trackers/nine/cubetexture9.c

@@ -38,6 +38,8 @@ NineCubeTexture9_ctor( struct NineCubeTexture9 *This,
                        HANDLE *pSharedHandle )
 {
     struct pipe_resource *info = &This->base.base.info;
+    struct pipe_screen *screen = pParams->device->screen;
+    enum pipe_format pf;
     unsigned i;
     D3DSURFACE_DESC sfdesc;
     HRESULT hr;
@@ -55,9 +57,19 @@ NineCubeTexture9_ctor( struct NineCubeTexture9 *This,
     if (Usage & D3DUSAGE_AUTOGENMIPMAP)
         Levels = 0;
 
+    pf = d3d9_to_pipe_format(Format);
+    if (pf == PIPE_FORMAT_NONE ||
+        !screen->is_format_supported(screen, pf, PIPE_TEXTURE_CUBE, 0, PIPE_BIND_SAMPLER_VIEW)) {
+        return D3DERR_INVALIDCALL;
+    }
+
+    /* We support ATI1 and ATI2 hacks only for 2D textures */
+    if (Format == D3DFMT_ATI1 || Format == D3DFMT_ATI2)
+        return D3DERR_INVALIDCALL;
+
     info->screen = pParams->device->screen;
     info->target = PIPE_TEXTURE_CUBE;
-    info->format = d3d9_to_pipe_format(Format);
+    info->format = pf;
     info->width0 = EdgeLength;
     info->height0 = EdgeLength;
     info->depth0 = 1;
@@ -146,7 +158,7 @@ NineCubeTexture9_GetLevelDesc( struct NineCubeTexture9 *This,
     user_assert(Level == 0 || !(This->base.base.usage & D3DUSAGE_AUTOGENMIPMAP),
                 D3DERR_INVALIDCALL);
 
-    *pDesc = This->surfaces[Level]->desc;
+    *pDesc = This->surfaces[Level * 6]->desc;
 
     return D3D_OK;
 }

src/gallium/state_trackers/nine/device9.c

@@ -62,7 +62,7 @@ NineDevice9_SetDefaultState( struct NineDevice9 *This, boolean is_reset )
 
     assert(!This->is_recording);
 
-    nine_state_set_defaults(&This->state, &This->caps, is_reset);
+    nine_state_set_defaults(This, &This->caps, is_reset);
 
     This->state.viewport.X = 0;
     This->state.viewport.Y = 0;
@@ -109,7 +109,7 @@ NineDevice9_RestoreNonCSOState( struct NineDevice9 *This, unsigned mask )
             cb.buffer = This->constbuf_vs;
             cb.user_buffer = NULL;
         }
-        cb.buffer_size = This->constbuf_vs->width0;
+        cb.buffer_size = This->vs_const_size;
         pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &cb);
 
         if (This->prefer_user_constbuf) {
@@ -117,7 +117,7 @@ NineDevice9_RestoreNonCSOState( struct NineDevice9 *This, unsigned mask )
         } else {
             cb.buffer = This->constbuf_ps;
         }
-        cb.buffer_size = This->constbuf_ps->width0;
+        cb.buffer_size = This->ps_const_size;
         pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, &cb);
     }
 
@@ -262,10 +262,14 @@ NineDevice9_ctor( struct NineDevice9 *This,
         This->max_ps_const_f = max_const_ps -
                                (NINE_MAX_CONST_I + NINE_MAX_CONST_B / 4);
 
+        This->vs_const_size = max_const_vs * sizeof(float[4]);
+        This->ps_const_size = max_const_ps * sizeof(float[4]);
         /* Include space for I,B constants for user constbuf. */
-        This->state.vs_const_f = CALLOC(NINE_MAX_CONST_ALL, sizeof(float[4]));
-        This->state.ps_const_f = CALLOC(NINE_MAX_CONST_ALL, sizeof(float[4]));
-        if (!This->state.vs_const_f || !This->state.ps_const_f)
+        This->state.vs_const_f = CALLOC(This->vs_const_size, 1);
+        This->state.ps_const_f = CALLOC(This->ps_const_size, 1);
+        This->state.vs_lconstf_temp = CALLOC(This->vs_const_size,1);
+        if (!This->state.vs_const_f || !This->state.ps_const_f ||
+            !This->state.vs_lconstf_temp)
             return E_OUTOFMEMORY;
 
         if (strstr(pScreen->get_name(pScreen), "AMD") ||
@@ -283,23 +287,16 @@ NineDevice9_ctor( struct NineDevice9 *This,
         tmpl.bind = PIPE_BIND_CONSTANT_BUFFER;
         tmpl.flags = 0;
 
-        tmpl.width0 = max_const_vs * sizeof(float[4]);
+        tmpl.width0 = This->vs_const_size;
         This->constbuf_vs = pScreen->resource_create(pScreen, &tmpl);
 
-        tmpl.width0 = max_const_ps * sizeof(float[4]);
+        tmpl.width0 = This->ps_const_size;
         This->constbuf_ps = pScreen->resource_create(pScreen, &tmpl);
 
         if (!This->constbuf_vs || !This->constbuf_ps)
             return E_OUTOFMEMORY;
     }
 
-    This->vs_bool_true = pScreen->get_shader_param(pScreen,
-        PIPE_SHADER_VERTEX,
-        PIPE_SHADER_CAP_INTEGERS) ? 0xFFFFFFFF : fui(1.0f);
-    This->ps_bool_true = pScreen->get_shader_param(pScreen,
-        PIPE_SHADER_FRAGMENT,
-        PIPE_SHADER_CAP_INTEGERS) ? 0xFFFFFFFF : fui(1.0f);
-
     /* Allocate upload helper for drivers that suck (from st pov ;). */
     {
         unsigned bind = 0;
@@ -314,6 +311,8 @@ NineDevice9_ctor( struct NineDevice9 *This,
     }
 
     This->driver_caps.window_space_position_support = GET_PCAP(TGSI_VS_WINDOW_SPACE_POSITION);
+    This->driver_caps.vs_integer = pScreen->get_shader_param(pScreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS);
+    This->driver_caps.ps_integer = pScreen->get_shader_param(pScreen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS);
 
     nine_ff_init(This); /* initialize fixed function code */
 
@@ -350,6 +349,7 @@ NineDevice9_dtor( struct NineDevice9 *This )
     pipe_resource_reference(&This->constbuf_ps, NULL);
     FREE(This->state.vs_const_f);
     FREE(This->state.ps_const_f);
+    FREE(This->state.vs_lconstf_temp);
 
     if (This->swapchains) {
         for (i = 0; i < This->nswapchains; ++i)
@@ -2938,6 +2938,7 @@ NineDevice9_SetVertexShaderConstantI( struct NineDevice9 *This,
                                       UINT Vector4iCount )
 {
     struct nine_state *state = This->update;
+    int i;
 
     DBG("This=%p StartRegister=%u pConstantData=%p Vector4iCount=%u\n",
         This, StartRegister, pConstantData, Vector4iCount);
@@ -2946,9 +2947,18 @@ NineDevice9_SetVertexShaderConstantI( struct NineDevice9 *This,
     user_assert(StartRegister + Vector4iCount <= NINE_MAX_CONST_I, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(&state->vs_const_i[StartRegister][0],
-           pConstantData,
-           Vector4iCount * sizeof(state->vs_const_i[0]));
+    if (This->driver_caps.vs_integer) {
+        memcpy(&state->vs_const_i[StartRegister][0],
+               pConstantData,
+               Vector4iCount * sizeof(state->vs_const_i[0]));
+    } else {
+        for (i = 0; i < Vector4iCount; i++) {
+            state->vs_const_i[StartRegister+i][0] = fui((float)(pConstantData[4*i]));
+            state->vs_const_i[StartRegister+i][1] = fui((float)(pConstantData[4*i+1]));
+            state->vs_const_i[StartRegister+i][2] = fui((float)(pConstantData[4*i+2]));
+            state->vs_const_i[StartRegister+i][3] = fui((float)(pConstantData[4*i+3]));
+        }
+    }
 
     state->changed.vs_const_i |= ((1 << Vector4iCount) - 1) << StartRegister;
     state->changed.group |= NINE_STATE_VS_CONST;
@@ -2963,14 +2973,24 @@ NineDevice9_GetVertexShaderConstantI( struct NineDevice9 *This,
                                       UINT Vector4iCount )
 {
     const struct nine_state *state = &This->state;
+    int i;
 
     user_assert(StartRegister                  < NINE_MAX_CONST_I, D3DERR_INVALIDCALL);
     user_assert(StartRegister + Vector4iCount <= NINE_MAX_CONST_I, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(pConstantData,
-           &state->vs_const_i[StartRegister][0],
-           Vector4iCount * sizeof(state->vs_const_i[0]));
+    if (This->driver_caps.vs_integer) {
+        memcpy(pConstantData,
+               &state->vs_const_i[StartRegister][0],
+               Vector4iCount * sizeof(state->vs_const_i[0]));
+    } else {
+        for (i = 0; i < Vector4iCount; i++) {
+            pConstantData[4*i] = (int32_t) uif(state->vs_const_i[StartRegister+i][0]);
+            pConstantData[4*i+1] = (int32_t) uif(state->vs_const_i[StartRegister+i][1]);
+            pConstantData[4*i+2] = (int32_t) uif(state->vs_const_i[StartRegister+i][2]);
+            pConstantData[4*i+3] = (int32_t) uif(state->vs_const_i[StartRegister+i][3]);
+        }
+    }
 
     return D3D_OK;
 }
@@ -2982,6 +3002,8 @@ NineDevice9_SetVertexShaderConstantB( struct NineDevice9 *This,
                                       UINT BoolCount )
 {
     struct nine_state *state = This->update;
+    int i;
+    uint32_t bool_true = This->driver_caps.vs_integer ? 0xFFFFFFFF : fui(1.0f);
 
     DBG("This=%p StartRegister=%u pConstantData=%p BoolCount=%u\n",
         This, StartRegister, pConstantData, BoolCount);
@@ -2990,9 +3012,8 @@ NineDevice9_SetVertexShaderConstantB( struct NineDevice9 *This,
     user_assert(StartRegister + BoolCount <= NINE_MAX_CONST_B, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(&state->vs_const_b[StartRegister],
-           pConstantData,
-           BoolCount * sizeof(state->vs_const_b[0]));
+    for (i = 0; i < BoolCount; i++)
+        state->vs_const_b[StartRegister + i] = pConstantData[i] ? bool_true : 0;
 
     state->changed.vs_const_b |= ((1 << BoolCount) - 1) << StartRegister;
     state->changed.group |= NINE_STATE_VS_CONST;
@@ -3007,14 +3028,14 @@ NineDevice9_GetVertexShaderConstantB( struct NineDevice9 *This,
                                       UINT BoolCount )
 {
     const struct nine_state *state = &This->state;
+    int i;
 
     user_assert(StartRegister              < NINE_MAX_CONST_B, D3DERR_INVALIDCALL);
     user_assert(StartRegister + BoolCount <= NINE_MAX_CONST_B, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(pConstantData,
-           &state->vs_const_b[StartRegister],
-           BoolCount * sizeof(state->vs_const_b[0]));
+    for (i = 0; i < BoolCount; i++)
+        pConstantData[i] = state->vs_const_b[StartRegister + i] != 0 ? TRUE : FALSE;
 
     return D3D_OK;
 }
@@ -3243,6 +3264,7 @@ NineDevice9_SetPixelShaderConstantI( struct NineDevice9 *This,
                                      UINT Vector4iCount )
 {
     struct nine_state *state = This->update;
+    int i;
 
     DBG("This=%p StartRegister=%u pConstantData=%p Vector4iCount=%u\n",
         This, StartRegister, pConstantData, Vector4iCount);
@@ -3251,10 +3273,18 @@ NineDevice9_SetPixelShaderConstantI( struct NineDevice9 *This,
     user_assert(StartRegister + Vector4iCount <= NINE_MAX_CONST_I, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(&state->ps_const_i[StartRegister][0],
-           pConstantData,
-           Vector4iCount * sizeof(state->ps_const_i[0]));
-
+    if (This->driver_caps.ps_integer) {
+        memcpy(&state->ps_const_i[StartRegister][0],
+               pConstantData,
+               Vector4iCount * sizeof(state->ps_const_i[0]));
+    } else {
+        for (i = 0; i < Vector4iCount; i++) {
+            state->ps_const_i[StartRegister+i][0] = fui((float)(pConstantData[4*i]));
+            state->ps_const_i[StartRegister+i][1] = fui((float)(pConstantData[4*i+1]));
+            state->ps_const_i[StartRegister+i][2] = fui((float)(pConstantData[4*i+2]));
+            state->ps_const_i[StartRegister+i][3] = fui((float)(pConstantData[4*i+3]));
+        }
+    }
     state->changed.ps_const_i |= ((1 << Vector4iCount) - 1) << StartRegister;
     state->changed.group |= NINE_STATE_PS_CONST;
 
@@ -3268,14 +3298,24 @@ NineDevice9_GetPixelShaderConstantI( struct NineDevice9 *This,
                                      UINT Vector4iCount )
 {
     const struct nine_state *state = &This->state;
+    int i;
 
     user_assert(StartRegister                  < NINE_MAX_CONST_I, D3DERR_INVALIDCALL);
     user_assert(StartRegister + Vector4iCount <= NINE_MAX_CONST_I, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(pConstantData,
-           &state->ps_const_i[StartRegister][0],
-           Vector4iCount * sizeof(state->ps_const_i[0]));
+    if (This->driver_caps.ps_integer) {
+        memcpy(pConstantData,
+               &state->ps_const_i[StartRegister][0],
+               Vector4iCount * sizeof(state->ps_const_i[0]));
+    } else {
+        for (i = 0; i < Vector4iCount; i++) {
+            pConstantData[4*i] = (int32_t) uif(state->ps_const_i[StartRegister+i][0]);
+            pConstantData[4*i+1] = (int32_t) uif(state->ps_const_i[StartRegister+i][1]);
+            pConstantData[4*i+2] = (int32_t) uif(state->ps_const_i[StartRegister+i][2]);
+            pConstantData[4*i+3] = (int32_t) uif(state->ps_const_i[StartRegister+i][3]);
+        }
+    }
 
     return D3D_OK;
 }
@@ -3287,6 +3327,8 @@ NineDevice9_SetPixelShaderConstantB( struct NineDevice9 *This,
                                      UINT BoolCount )
 {
     struct nine_state *state = This->update;
+    int i;
+    uint32_t bool_true = This->driver_caps.ps_integer ? 0xFFFFFFFF : fui(1.0f);
 
     DBG("This=%p StartRegister=%u pConstantData=%p BoolCount=%u\n",
         This, StartRegister, pConstantData, BoolCount);
@@ -3295,9 +3337,8 @@ NineDevice9_SetPixelShaderConstantB( struct NineDevice9 *This,
     user_assert(StartRegister + BoolCount <= NINE_MAX_CONST_B, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(&state->ps_const_b[StartRegister],
-           pConstantData,
-           BoolCount * sizeof(state->ps_const_b[0]));
+    for (i = 0; i < BoolCount; i++)
+        state->ps_const_b[StartRegister + i] = pConstantData[i] ? bool_true : 0;
 
     state->changed.ps_const_b |= ((1 << BoolCount) - 1) << StartRegister;
     state->changed.group |= NINE_STATE_PS_CONST;
@@ -3312,14 +3353,14 @@ NineDevice9_GetPixelShaderConstantB( struct NineDevice9 *This,
                                      UINT BoolCount )
 {
     const struct nine_state *state = &This->state;
+    int i;
 
     user_assert(StartRegister              < NINE_MAX_CONST_B, D3DERR_INVALIDCALL);
     user_assert(StartRegister + BoolCount <= NINE_MAX_CONST_B, D3DERR_INVALIDCALL);
     user_assert(pConstantData, D3DERR_INVALIDCALL);
 
-    memcpy(pConstantData,
-           &state->ps_const_b[StartRegister],
-           BoolCount * sizeof(state->ps_const_b[0]));
+    for (i = 0; i < BoolCount; i++)
+        pConstantData[i] = state->ps_const_b[StartRegister + i] ? TRUE : FALSE;
 
     return D3D_OK;
 }

src/gallium/state_trackers/nine/device9.h

@@ -77,10 +77,10 @@ struct NineDevice9
 
     struct pipe_resource *constbuf_vs;
     struct pipe_resource *constbuf_ps;
+    uint16_t vs_const_size;
+    uint16_t ps_const_size;
     uint16_t max_vs_const_f;
     uint16_t max_ps_const_f;
-    uint32_t vs_bool_true;
-    uint32_t ps_bool_true;
 
     struct gen_mipmap_state *gen_mipmap;
 
@@ -111,6 +111,8 @@ struct NineDevice9
         boolean user_vbufs;
         boolean user_ibufs;
         boolean window_space_position_support;
+        boolean vs_integer;
+        boolean ps_integer;
     } driver_caps;
 
     struct u_upload_mgr *upload;

src/gallium/state_trackers/nine/nine_ff.c

@@ -1151,10 +1151,10 @@ ps_do_ts_op(struct ps_build_ctx *ps, unsigned top, struct ureg_dst dst, struct u
         ureg_MUL(ureg, ureg_saturate(dst), ureg_src(tmp), ureg_imm4f(ureg,4.0,4.0,4.0,4.0));
         break;
     case D3DTOP_MULTIPLYADD:
-        ureg_MAD(ureg, dst, arg[2], arg[0], arg[1]);
+        ureg_MAD(ureg, dst, arg[1], arg[2], arg[0]);
         break;
     case D3DTOP_LERP:
-        ureg_LRP(ureg, dst, arg[1], arg[2], arg[0]);
+        ureg_LRP(ureg, dst, arg[0], arg[1], arg[2]);
         break;
     case D3DTOP_DISABLE:
         /* no-op ? */
@@ -1278,6 +1278,8 @@ nine_ff_build_ps(struct NineDevice9 *device, struct nine_ff_ps_key *key)
             (key->ts[0].resultarg != 0 /* not current */ ||
              key->ts[0].colorop == D3DTOP_DISABLE ||
              key->ts[0].alphaop == D3DTOP_DISABLE ||
+             key->ts[0].colorop == D3DTOP_BLENDCURRENTALPHA ||
+             key->ts[0].alphaop == D3DTOP_BLENDCURRENTALPHA ||
              key->ts[0].colorarg0 == D3DTA_CURRENT ||
              key->ts[0].colorarg1 == D3DTA_CURRENT ||
              key->ts[0].colorarg2 == D3DTA_CURRENT ||

src/gallium/state_trackers/nine/nine_pipe.h

@@ -185,6 +185,8 @@ d3d9_to_pipe_format(D3DFORMAT format)
     case D3DFMT_DXT3: return PIPE_FORMAT_DXT3_RGBA;
     case D3DFMT_DXT4: return PIPE_FORMAT_DXT5_RGBA; /* XXX */
     case D3DFMT_DXT5: return PIPE_FORMAT_DXT5_RGBA;
+    case D3DFMT_ATI1: return PIPE_FORMAT_RGTC1_UNORM;
+    case D3DFMT_ATI2: return PIPE_FORMAT_RGTC2_UNORM;
     case D3DFMT_UYVY: return PIPE_FORMAT_UYVY;
     case D3DFMT_YUY2: return PIPE_FORMAT_YUYV; /* XXX check */
     case D3DFMT_NV12: return PIPE_FORMAT_NV12;
@@ -249,6 +251,8 @@ d3dformat_to_string(D3DFORMAT fmt)
     case D3DFMT_DXT3: return "D3DFMT_DXT3";
     case D3DFMT_DXT4: return "D3DFMT_DXT4";
     case D3DFMT_DXT5: return "D3DFMT_DXT5";
+    case D3DFMT_ATI1: return "D3DFMT_ATI1";
+    case D3DFMT_ATI2: return "D3DFMT_ATI2";
     case D3DFMT_D16_LOCKABLE: return "D3DFMT_D16_LOCKABLE";
     case D3DFMT_D32: return "D3DFMT_D32";
     case D3DFMT_D15S1: return "D3DFMT_D15S1";
@@ -279,6 +283,7 @@ d3dformat_to_string(D3DFORMAT fmt)
     case D3DFMT_DF16: return "D3DFMT_DF16";
     case D3DFMT_DF24: return "D3DFMT_DF24";
     case D3DFMT_INTZ: return "D3DFMT_INTZ";
+    case D3DFMT_NVDB: return "D3DFMT_NVDB";
     case D3DFMT_NULL: return "D3DFMT_NULL";
     default:
         break;

src/gallium/state_trackers/nine/nine_shader.c

@@ -35,11 +35,6 @@
 
 #define DBG_CHANNEL DBG_SHADER
 
-#if 1
-#define NINE_TGSI_LAZY_DEVS /* don't use TGSI_OPCODE_BREAKC */
-#endif
-#define NINE_TGSI_LAZY_R600 /* don't use TGSI_OPCODE_DP2A */
-
 #define DUMP(args...) _nine_debug_printf(DBG_CHANNEL, NULL, args)
 
 
@@ -471,14 +466,14 @@ struct shader_translator
         struct ureg_src vFace;
         struct ureg_src s;
         struct ureg_dst p;
-        struct ureg_dst a;
+        struct ureg_dst address;
+        struct ureg_dst a0;
         struct ureg_dst tS[8]; /* texture stage registers */
         struct ureg_dst tdst; /* scratch dst if we need extra modifiers */
         struct ureg_dst t[5]; /* scratch TEMPs */
         struct ureg_src vC[2]; /* PS color in */
         struct ureg_src vT[8]; /* PS texcoord in */
         struct ureg_dst rL[NINE_MAX_LOOP_DEPTH]; /* loop ctr */
-        struct ureg_dst aL[NINE_MAX_LOOP_DEPTH]; /* loop ctr ADDR register */
     } regs;
     unsigned num_temp; /* Elements(regs.r) */
     unsigned num_scratch;
@@ -487,6 +482,7 @@ struct shader_translator
     unsigned cond_depth;
     unsigned loop_labels[NINE_MAX_LOOP_DEPTH];
     unsigned cond_labels[NINE_MAX_COND_DEPTH];
+    boolean loop_or_rep[NINE_MAX_LOOP_DEPTH]; /* true: loop, false: rep */
 
     unsigned *inst_labels; /* LABEL op */
     unsigned num_inst_labels;
@@ -664,8 +660,10 @@ static INLINE void
 tx_addr_alloc(struct shader_translator *tx, INT idx)
 {
     assert(idx == 0);
-    if (ureg_dst_is_undef(tx->regs.a))
-        tx->regs.a = ureg_DECL_address(tx->ureg);
+    if (ureg_dst_is_undef(tx->regs.address))
+        tx->regs.address = ureg_DECL_address(tx->ureg);
+    if (ureg_dst_is_undef(tx->regs.a0))
+        tx->regs.a0 = ureg_DECL_temporary(tx->ureg);
 }
 
 static INLINE void
@@ -707,7 +705,7 @@ tx_endloop(struct shader_translator *tx)
 }
 
 static struct ureg_dst
-tx_get_loopctr(struct shader_translator *tx)
+tx_get_loopctr(struct shader_translator *tx, boolean loop_or_rep)
 {
     const unsigned l = tx->loop_depth - 1;
 
@@ -717,26 +715,32 @@ tx_get_loopctr(struct shader_translator *tx)
         return ureg_dst_undef();
     }
 
-    if (ureg_dst_is_undef(tx->regs.aL[l]))
-    {
-        struct ureg_dst rreg = ureg_DECL_local_temporary(tx->ureg);
-        struct ureg_dst areg = ureg_DECL_address(tx->ureg);
-        unsigned c;
-
-        assert(l % 4 == 0);
-        for (c = l; c < (l + 4) && c < Elements(tx->regs.aL); ++c) {
-            tx->regs.rL[c] = ureg_writemask(rreg, 1 << (c & 3));
-            tx->regs.aL[c] = ureg_writemask(areg, 1 << (c & 3));
-        }
+    if (ureg_dst_is_undef(tx->regs.rL[l])) {
+        /* loop or rep ctr creation */
+        tx->regs.rL[l] = ureg_DECL_local_temporary(tx->ureg);
+        tx->loop_or_rep[l] = loop_or_rep;
     }
+    /* loop - rep - endloop - endrep not allowed */
+    assert(tx->loop_or_rep[l] == loop_or_rep);
+
     return tx->regs.rL[l];
 }
-static struct ureg_dst
-tx_get_aL(struct shader_translator *tx)
+
+static struct ureg_src
+tx_get_loopal(struct shader_translator *tx)
 {
-    if (!ureg_dst_is_undef(tx_get_loopctr(tx)))
-        return tx->regs.aL[tx->loop_depth - 1];
-    return ureg_dst_undef();
+    int loop_level = tx->loop_depth - 1;
+
+    while (loop_level >= 0) {
+        /* handle loop - rep - endrep - endloop case */
+        if (tx->loop_or_rep[loop_level])
+            /* the value is in the loop counter y component (nine implementation) */
+            return ureg_scalar(ureg_src(tx->regs.rL[loop_level]), TGSI_SWIZZLE_Y);
+        loop_level--;
+    }
+
+    DBG("aL counter requested outside of loop\n");
+    return ureg_src_undef();
 }
 
 static INLINE unsigned *
@@ -787,8 +791,12 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
     case D3DSPR_ADDR:
         assert(!param->rel);
         if (IS_VS) {
-            tx_addr_alloc(tx, param->idx);
-            src = ureg_src(tx->regs.a);
+            assert(param->idx == 0);
+            /* the address register (vs only) must be
+             * assigned before use */
+            assert(!ureg_dst_is_undef(tx->regs.a0));
+            ureg_ARR(ureg, tx->regs.address, ureg_src(tx->regs.a0));
+            src = ureg_src(tx->regs.address);
         } else {
             if (tx->version.major < 2 && tx->version.minor < 4) {
                 /* no subroutines, so should be defined */
@@ -827,6 +835,7 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
         src = ureg_src_register(TGSI_FILE_SAMPLER, param->idx);
         break;
     case D3DSPR_CONST:
+        assert(!param->rel || IS_VS);
         if (param->rel)
             tx->indirect_const_access = TRUE;
         if (param->rel || !tx_lconstf(tx, &src, param->idx)) {
@@ -834,6 +843,13 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
                 nine_info_mark_const_f_used(tx->info, param->idx);
             src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx);
         }
+        if (!IS_VS && tx->version.major < 2) {
+            /* ps 1.X clamps constants */
+            tmp = tx_scratch(tx);
+            ureg_MIN(ureg, tmp, src, ureg_imm1f(ureg, 1.0f));
+            ureg_MAX(ureg, tmp, ureg_src(tmp), ureg_imm1f(ureg, -1.0f));
+            src = ureg_src(tmp);
+        }
         break;
     case D3DSPR_CONST2:
     case D3DSPR_CONST3:
@@ -843,26 +859,33 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
         src = ureg_imm1f(ureg, 0.0f);
         break;
     case D3DSPR_CONSTINT:
-        if (param->rel || !tx_lconsti(tx, &src, param->idx)) {
-            if (!param->rel)
-                nine_info_mark_const_i_used(tx->info, param->idx);
+        /* relative adressing only possible for float constants in vs */
+        assert(!param->rel);
+        if (!tx_lconsti(tx, &src, param->idx)) {
+            nine_info_mark_const_i_used(tx->info, param->idx);
             src = ureg_src_register(TGSI_FILE_CONSTANT,
                                     tx->info->const_i_base + param->idx);
         }
         break;
     case D3DSPR_CONSTBOOL:
-        if (param->rel || !tx_lconstb(tx, &src, param->idx)) {
+        assert(!param->rel);
+        if (!tx_lconstb(tx, &src, param->idx)) {
            char r = param->idx / 4;
            char s = param->idx & 3;
-           if (!param->rel)
-               nine_info_mark_const_b_used(tx->info, param->idx);
+           nine_info_mark_const_b_used(tx->info, param->idx);
            src = ureg_src_register(TGSI_FILE_CONSTANT,
                                    tx->info->const_b_base + r);
            src = ureg_swizzle(src, s, s, s, s);
         }
         break;
     case D3DSPR_LOOP:
-        src = tx_src_scalar(tx_get_aL(tx));
+        if (ureg_dst_is_undef(tx->regs.address))
+            tx->regs.address = ureg_DECL_address(ureg);
+        if (!tx->native_integers)
+            ureg_ARR(ureg, tx->regs.address, tx_get_loopal(tx));
+        else
+            ureg_UARL(ureg, tx->regs.address, tx_get_loopal(tx));
+        src = ureg_src(tx->regs.address);
         break;
     case D3DSPR_MISCTYPE:
         switch (param->idx) {
@@ -904,6 +927,25 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
     if (param->rel)
         src = ureg_src_indirect(src, tx_src_param(tx, param->rel));
 
+    switch (param->mod) {
+    case NINED3DSPSM_DW:
+        tmp = tx_scratch(tx);
+        /* NOTE: app is not allowed to read w with this modifier */
+        ureg_RCP(ureg, ureg_writemask(tmp, NINED3DSP_WRITEMASK_3), src);
+        ureg_MUL(ureg, tmp, src, ureg_swizzle(ureg_src(tmp), NINE_SWIZZLE4(W,W,W,W)));
+        src = ureg_src(tmp);
+        break;
+    case NINED3DSPSM_DZ:
+        tmp = tx_scratch(tx);
+        /* NOTE: app is not allowed to read z with this modifier */
+        ureg_RCP(ureg, ureg_writemask(tmp, NINED3DSP_WRITEMASK_2), src);
+        ureg_MUL(ureg, tmp, src, ureg_swizzle(ureg_src(tmp), NINE_SWIZZLE4(Z,Z,Z,Z)));
+        src = ureg_src(tmp);
+        break;
+    default:
+        break;
+    }
+
     if (param->swizzle != NINED3DSP_NOSWIZZLE)
         src = ureg_swizzle(src,
                            (param->swizzle >> 0) & 0x3,
@@ -946,7 +988,7 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
         break;
     case NINED3DSPSM_DZ:
     case NINED3DSPSM_DW:
-        /* handled in instruction */
+        /* Already handled*/
         break;
     case NINED3DSPSM_SIGN:
         tmp = tx_scratch(tx);
@@ -1001,7 +1043,7 @@ _tx_dst_param(struct shader_translator *tx, const struct sm1_dst_param *param)
             dst = ureg_dst(tx->regs.vT[param->idx]);
         } else {
             tx_addr_alloc(tx, param->idx);
-            dst = tx->regs.a;
+            dst = tx->regs.a0;
         }
         break;
     case D3DSPR_RASTOUT:
@@ -1016,13 +1058,13 @@ _tx_dst_param(struct shader_translator *tx, const struct sm1_dst_param *param)
         case 1:
             if (ureg_dst_is_undef(tx->regs.oFog))
                 tx->regs.oFog =
-                    ureg_DECL_output(tx->ureg, TGSI_SEMANTIC_FOG, 0);
+                    ureg_saturate(ureg_DECL_output(tx->ureg, TGSI_SEMANTIC_FOG, 0));
             dst = tx->regs.oFog;
             break;
         case 2:
             if (ureg_dst_is_undef(tx->regs.oPts))
                 tx->regs.oPts =
-                    ureg_DECL_output(tx->ureg, TGSI_SEMANTIC_PSIZE, 0);
+                    ureg_saturate(ureg_DECL_output(tx->ureg, TGSI_SEMANTIC_PSIZE, 0));
             dst = tx->regs.oPts;
             break;
         default:
@@ -1163,16 +1205,19 @@ NineTranslateInstruction_Mkxn(struct shader_translator *tx, const unsigned k, co
     struct ureg_program *ureg = tx->ureg;
     struct ureg_dst dst;
     struct ureg_src src[2];
+    struct sm1_src_param *src_mat = &tx->insn.src[1];
     unsigned i;
 
     dst = tx_dst_param(tx, &tx->insn.dst[0]);
     src[0] = tx_src_param(tx, &tx->insn.src[0]);
-    src[1] = tx_src_param(tx, &tx->insn.src[1]);
 
-    for (i = 0; i < n; i++, src[1].Index++)
+    for (i = 0; i < n; i++)
     {
         const unsigned m = (1 << i);
 
+        src[1] = tx_src_param(tx, src_mat);
+        src_mat->idx++;
+
         if (!(dst.WriteMask & m))
             continue;
 
@@ -1329,7 +1374,7 @@ NineTranslateInstruction_Generic(struct shader_translator *);
 
 DECL_SPECIAL(M4x4)
 {
-    return NineTranslateInstruction_Mkxn(tx, 4, 3);
+    return NineTranslateInstruction_Mkxn(tx, 4, 4);
 }
 
 DECL_SPECIAL(M4x3)
@@ -1367,33 +1412,29 @@ DECL_SPECIAL(CND)
     struct ureg_dst cgt;
     struct ureg_src cnd;
 
-    if (tx->insn.coissue && tx->version.major == 1 && tx->version.minor < 4) {
+    /* the coissue flag was a tip for compilers to advise to
+     * execute two operations at the same time, in cases
+     * the two executions had same dst with different channels.
+     * It has no effect on current hw. However it seems CND
+     * is affected. The handling of this very specific case
+     * handled below mimick wine behaviour */
+    if (tx->insn.coissue && tx->version.major == 1 && tx->version.minor < 4 && tx->insn.dst[0].mask != NINED3DSP_WRITEMASK_3) {
         ureg_MOV(tx->ureg,
                  dst, tx_src_param(tx, &tx->insn.src[1]));
         return D3D_OK;
     }
 
     cnd = tx_src_param(tx, &tx->insn.src[0]);
-#ifdef NINE_TGSI_LAZY_R600
     cgt = tx_scratch(tx);
 
-    if (tx->version.major == 1 && tx->version.minor < 4) {
-        cgt.WriteMask = TGSI_WRITEMASK_W;
-        ureg_SGT(tx->ureg, cgt, cnd, ureg_imm1f(tx->ureg, 0.5f));
-        cnd = ureg_scalar(cnd, TGSI_SWIZZLE_W);
-    } else {
-        ureg_SGT(tx->ureg, cgt, cnd, ureg_imm1f(tx->ureg, 0.5f));
-    }
-    ureg_CMP(tx->ureg, dst,
-             tx_src_param(tx, &tx->insn.src[1]),
-             tx_src_param(tx, &tx->insn.src[2]), ureg_negate(cnd));
-#else
     if (tx->version.major == 1 && tx->version.minor < 4)
         cnd = ureg_scalar(cnd, TGSI_SWIZZLE_W);
-    ureg_CND(tx->ureg, dst,
+
+    ureg_SGT(tx->ureg, cgt, cnd, ureg_imm1f(tx->ureg, 0.5f));
+
+    ureg_CMP(tx->ureg, dst, ureg_negate(ureg_src(cgt)),
              tx_src_param(tx, &tx->insn.src[1]),
-             tx_src_param(tx, &tx->insn.src[2]), cnd);
-#endif
+             tx_src_param(tx, &tx->insn.src[2]));
     return D3D_OK;
 }
 
@@ -1427,9 +1468,17 @@ DECL_SPECIAL(CALLNZ)
 DECL_SPECIAL(MOV_vs1x)
 {
     if (tx->insn.dst[0].file == D3DSPR_ADDR) {
-        ureg_ARL(tx->ureg,
+        /* Implementation note: We don't write directly
+         * to the addr register, but to an intermediate
+         * float register.
+         * Contrary to the doc, when writing to ADDR here,
+         * the rounding is not to nearest, but to lowest
+         * (wine test).
+         * Since we use ARR next, substract 0.5. */
+        ureg_SUB(tx->ureg,
                  tx_dst_param(tx, &tx->insn.dst[0]),
-                 tx_src_param(tx, &tx->insn.src[0]));
+                 tx_src_param(tx, &tx->insn.src[0]),
+                 ureg_imm1f(tx->ureg, 0.5f));
         return D3D_OK;
     }
     return NineTranslateInstruction_Generic(tx);
@@ -1440,46 +1489,36 @@ DECL_SPECIAL(LOOP)
     struct ureg_program *ureg = tx->ureg;
     unsigned *label;
     struct ureg_src src = tx_src_param(tx, &tx->insn.src[1]);
-    struct ureg_src iter = ureg_scalar(src, TGSI_SWIZZLE_X);
-    struct ureg_src init = ureg_scalar(src, TGSI_SWIZZLE_Y);
-    struct ureg_src step = ureg_scalar(src, TGSI_SWIZZLE_Z);
     struct ureg_dst ctr;
-    struct ureg_dst tmp = tx_scratch_scalar(tx);
+    struct ureg_dst tmp;
+    struct ureg_src ctrx;
 
     label = tx_bgnloop(tx);
-    ctr = tx_get_loopctr(tx);
+    ctr = tx_get_loopctr(tx, TRUE);
+    ctrx = ureg_scalar(ureg_src(ctr), TGSI_SWIZZLE_X);
 
-    ureg_MOV(tx->ureg, ctr, init);
+    /* src: num_iterations - start_value of al - step for al - 0 */
+    ureg_MOV(ureg, ctr, src);
     ureg_BGNLOOP(tx->ureg, label);
-    if (tx->native_integers) {
-        /* we'll let the backend pull up that MAD ... */
-        ureg_UMAD(ureg, tmp, iter, step, init);
-        ureg_USEQ(ureg, tmp, ureg_src(ctr), tx_src_scalar(tmp));
-#ifdef NINE_TGSI_LAZY_DEVS
-        ureg_UIF(ureg, tx_src_scalar(tmp), tx_cond(tx));
-#endif
-    } else {
-        /* can't simply use SGE for precision because step might be negative */
-        ureg_MAD(ureg, tmp, iter, step, init);
-        ureg_SEQ(ureg, tmp, ureg_src(ctr), tx_src_scalar(tmp));
-#ifdef NINE_TGSI_LAZY_DEVS
+    tmp = tx_scratch_scalar(tx);
+    /* Initially ctr.x contains the number of iterations.
+     * ctr.y will contain the updated value of al.
+     * We decrease ctr.x at the end of every iteration,
+     * and stop when it reaches 0. */
+
+    if (!tx->native_integers) {
+        /* case src and ctr contain floats */
+        /* to avoid precision issue, we stop when ctr <= 0.5 */
+        ureg_SGE(ureg, tmp, ureg_imm1f(ureg, 0.5f), ctrx);
         ureg_IF(ureg, tx_src_scalar(tmp), tx_cond(tx));
-#endif
+    } else {
+        /* case src and ctr contain integers */
+        ureg_ISGE(ureg, tmp, ureg_imm1i(ureg, 0), ctrx);
+        ureg_UIF(ureg, tx_src_scalar(tmp), tx_cond(tx));
     }
-#ifdef NINE_TGSI_LAZY_DEVS
     ureg_BRK(ureg);
     tx_endcond(tx);
     ureg_ENDIF(ureg);
-#else
-    ureg_BREAKC(ureg, tx_src_scalar(tmp));
-#endif
-    if (tx->native_integers) {
-        ureg_UARL(ureg, tx_get_aL(tx), tx_src_scalar(ctr));
-        ureg_UADD(ureg, ctr, tx_src_scalar(ctr), step);
-    } else {
-        ureg_ARL(ureg, tx_get_aL(tx), tx_src_scalar(ctr));
-        ureg_ADD(ureg, ctr, tx_src_scalar(ctr), step);
-    }
     return D3D_OK;
 }
 
@@ -1491,6 +1530,25 @@ DECL_SPECIAL(RET)
 
 DECL_SPECIAL(ENDLOOP)
 {
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst ctr = tx_get_loopctr(tx, TRUE);
+    struct ureg_dst dst_ctrx, dst_al;
+    struct ureg_src src_ctr, al_counter;
+
+    dst_ctrx = ureg_writemask(ctr, NINED3DSP_WRITEMASK_0);
+    dst_al = ureg_writemask(ctr, NINED3DSP_WRITEMASK_1);
+    src_ctr = ureg_src(ctr);
+    al_counter = ureg_scalar(src_ctr, TGSI_SWIZZLE_Z);
+
+    /* ctr.x -= 1
+     * ctr.y (aL) += step */
+    if (!tx->native_integers) {
+        ureg_ADD(ureg, dst_ctrx, src_ctr, ureg_imm1f(ureg, -1.0f));
+        ureg_ADD(ureg, dst_al, src_ctr, al_counter);
+    } else {
+        ureg_UADD(ureg, dst_ctrx, src_ctr, ureg_imm1i(ureg, -1));
+        ureg_UADD(ureg, dst_al, src_ctr, al_counter);
+    }
     ureg_ENDLOOP(tx->ureg, tx_endloop(tx));
     return D3D_OK;
 }
@@ -1540,7 +1598,7 @@ DECL_SPECIAL(REP)
         tx->native_integers ? ureg_imm1u(ureg, 0) : ureg_imm1f(ureg, 0.0f);
 
     label = tx_bgnloop(tx);
-    ctr = tx_get_loopctr(tx);
+    ctr = tx_get_loopctr(tx, FALSE);
 
     /* NOTE: rep must be constant, so we don't have to save the count */
     assert(rep.File == TGSI_FILE_CONSTANT || rep.File == TGSI_FILE_IMMEDIATE);
@@ -1550,24 +1608,16 @@ DECL_SPECIAL(REP)
     if (tx->native_integers)
     {
         ureg_USGE(ureg, tmp, tx_src_scalar(ctr), rep);
-#ifdef NINE_TGSI_LAZY_DEVS
         ureg_UIF(ureg, tx_src_scalar(tmp), tx_cond(tx));
-#endif
     }
     else
     {
         ureg_SGE(ureg, tmp, tx_src_scalar(ctr), rep);
-#ifdef NINE_TGSI_LAZY_DEVS
         ureg_IF(ureg, tx_src_scalar(tmp), tx_cond(tx));
-#endif
     }
-#ifdef NINE_TGSI_LAZY_DEVS
     ureg_BRK(ureg);
     tx_endcond(tx);
     ureg_ENDIF(ureg);
-#else
-    ureg_BREAKC(ureg, tx_src_scalar(tmp));
-#endif
 
     if (tx->native_integers) {
         ureg_UADD(ureg, ctr, tx_src_scalar(ctr), ureg_imm1u(ureg, 1));
@@ -1645,14 +1695,10 @@ DECL_SPECIAL(BREAKC)
     src[0] = tx_src_param(tx, &tx->insn.src[0]);
     src[1] = tx_src_param(tx, &tx->insn.src[1]);
     ureg_insn(tx->ureg, cmp_op, &tmp, 1, src, 2);
-#ifdef NINE_TGSI_LAZY_DEVS
     ureg_IF(tx->ureg, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), tx_cond(tx));
     ureg_BRK(tx->ureg);
     tx_endcond(tx);
     ureg_ENDIF(tx->ureg);
-#else
-    ureg_BREAKC(tx->ureg, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X));
-#endif
     return D3D_OK;
 }
 
@@ -1958,21 +2004,55 @@ DECL_SPECIAL(DEFI)
     return D3D_OK;
 }
 
+DECL_SPECIAL(POW)
+{
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src src[2] = {
+        tx_src_param(tx, &tx->insn.src[0]),
+        tx_src_param(tx, &tx->insn.src[1])
+    };
+    ureg_POW(tx->ureg, dst, ureg_abs(src[0]), src[1]);
+    return D3D_OK;
+}
+
+DECL_SPECIAL(RSQ)
+{
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src src = tx_src_param(tx, &tx->insn.src[0]);
+    struct ureg_dst tmp = tx_scratch(tx);
+    ureg_RSQ(ureg, tmp, ureg_abs(src));
+    ureg_MIN(ureg, dst, ureg_imm1f(ureg, FLT_MAX), ureg_src(tmp));
+    return D3D_OK;
+}
+
+DECL_SPECIAL(LOG)
+{
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst tmp = tx_scratch_scalar(tx);
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src src = tx_src_param(tx, &tx->insn.src[0]);
+    ureg_LG2(ureg, tmp, ureg_abs(src));
+    ureg_MAX(ureg, dst, ureg_imm1f(ureg, -FLT_MAX), tx_src_scalar(tmp));
+    return D3D_OK;
+}
+
 DECL_SPECIAL(NRM)
 {
     struct ureg_program *ureg = tx->ureg;
     struct ureg_dst tmp = tx_scratch_scalar(tx);
     struct ureg_src nrm = tx_src_scalar(tmp);
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
     struct ureg_src src = tx_src_param(tx, &tx->insn.src[0]);
     ureg_DP3(ureg, tmp, src, src);
     ureg_RSQ(ureg, tmp, nrm);
-    ureg_MUL(ureg, tx_dst_param(tx, &tx->insn.dst[0]), src, nrm);
+    ureg_MIN(ureg, tmp, ureg_imm1f(ureg, FLT_MAX), nrm);
+    ureg_MUL(ureg, dst, src, nrm);
     return D3D_OK;
 }
 
 DECL_SPECIAL(DP2ADD)
 {
-#ifdef NINE_TGSI_LAZY_R600
     struct ureg_dst tmp = tx_scratch_scalar(tx);
     struct ureg_src dp2 = tx_src_scalar(tmp);
     struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
@@ -1986,9 +2066,6 @@ DECL_SPECIAL(DP2ADD)
     ureg_ADD(tx->ureg, dst, src[2], dp2);
 
     return D3D_OK;
-#else
-    return NineTranslateInstruction_Generic(tx);
-#endif
 }
 
 DECL_SPECIAL(TEXCOORD)
@@ -1997,9 +2074,9 @@ DECL_SPECIAL(TEXCOORD)
     const unsigned s = tx->insn.dst[0].idx;
     struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
 
-    if (ureg_src_is_undef(tx->regs.vT[s]))
-        tx->regs.vT[s] = ureg_DECL_fs_input(ureg, tx->texcoord_sn, s, TGSI_INTERPOLATE_PERSPECTIVE);
-    ureg_MOV(ureg, dst, tx->regs.vT[s]); /* XXX is this sufficient ? */
+    tx_texcoord_alloc(tx, s);
+    ureg_MOV(ureg, ureg_writemask(ureg_saturate(dst), TGSI_WRITEMASK_XYZ), tx->regs.vT[s]);
+    ureg_MOV(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W), ureg_imm1f(tx->ureg, 1.0f));
 
     return D3D_OK;
 }
@@ -2007,12 +2084,12 @@ DECL_SPECIAL(TEXCOORD)
 DECL_SPECIAL(TEXCOORD_ps14)
 {
     struct ureg_program *ureg = tx->ureg;
-    const unsigned s = tx->insn.src[0].idx;
+    struct ureg_src src = tx_src_param(tx, &tx->insn.src[0]);
     struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
 
-    if (ureg_src_is_undef(tx->regs.vT[s]))
-        tx->regs.vT[s] = ureg_DECL_fs_input(ureg, tx->texcoord_sn, s, TGSI_INTERPOLATE_PERSPECTIVE);
-    ureg_MOV(ureg, dst, tx->regs.vT[s]); /* XXX is this sufficient ? */
+    assert(tx->insn.src[0].file == D3DSPR_TEXTURE);
+
+    ureg_MOV(ureg, dst, src);
 
     return D3D_OK;
 }
@@ -2046,22 +2123,62 @@ DECL_SPECIAL(TEXBEML)
 
 DECL_SPECIAL(TEXREG2AR)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src sample;
+    const int m = tx->insn.dst[0].idx;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    sample = ureg_DECL_sampler(ureg, m);
+    tx->info->sampler_mask |= 1 << m;
+    ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m), ureg_swizzle(ureg_src(tx->regs.tS[n]), NINE_SWIZZLE4(W,X,X,X)), sample);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXREG2GB)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src sample;
+    const int m = tx->insn.dst[0].idx;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    sample = ureg_DECL_sampler(ureg, m);
+    tx->info->sampler_mask |= 1 << m;
+    ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m), ureg_swizzle(ureg_src(tx->regs.tS[n]), NINE_SWIZZLE4(Y,Z,Z,Z)), sample);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXM3x2PAD)
 {
-    STUB(D3DERR_INVALIDCALL);
+    return D3D_OK; /* this is just padding */
 }
 
 DECL_SPECIAL(TEXM3x2TEX)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src sample;
+    const int m = tx->insn.dst[0].idx - 1;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    tx_texcoord_alloc(tx, m);
+    tx_texcoord_alloc(tx, m+1);
+
+    /* performs the matrix multiplication */
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_X), tx->regs.vT[m], ureg_src(tx->regs.tS[n]));
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Y), tx->regs.vT[m+1], ureg_src(tx->regs.tS[n]));
+
+    sample = ureg_DECL_sampler(ureg, m + 1);
+    tx->info->sampler_mask |= 1 << (m + 1);
+    ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 1), ureg_src(dst), sample);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXM3x3PAD)
@@ -2071,61 +2188,180 @@ DECL_SPECIAL(TEXM3x3PAD)
 
 DECL_SPECIAL(TEXM3x3SPEC)
 {
-    STUB(D3DERR_INVALIDCALL);
-}
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src E = tx_src_param(tx, &tx->insn.src[1]);
+    struct ureg_src sample;
+    struct ureg_dst tmp;
+    const int m = tx->insn.dst[0].idx - 2;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
 
-DECL_SPECIAL(TEXM3x3VSPEC)
-{
-    STUB(D3DERR_INVALIDCALL);
+    tx_texcoord_alloc(tx, m);
+    tx_texcoord_alloc(tx, m+1);
+    tx_texcoord_alloc(tx, m+2);
+
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_X), tx->regs.vT[m], ureg_src(tx->regs.tS[n]));
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Y), tx->regs.vT[m+1], ureg_src(tx->regs.tS[n]));
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Z), tx->regs.vT[m+2], ureg_src(tx->regs.tS[n]));
+
+    sample = ureg_DECL_sampler(ureg, m + 2);
+    tx->info->sampler_mask |= 1 << (m + 2);
+    tmp = ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_XYZ);
+
+    /* At this step, dst = N = (u', w', z').
+     * We want dst to be the texture sampled at (u'', w'', z''), with
+     * (u'', w'', z'') = 2 * (N.E / N.N) * N - E */
+    ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(dst), ureg_src(dst));
+    ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X));
+    /* at this step tmp.x = 1/N.N */
+    ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(dst), E);
+    /* at this step tmp.y = N.E */
+    ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y));
+    /* at this step tmp.x = N.E/N.N */
+    ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_imm1f(ureg, 2.0f));
+    ureg_MUL(ureg, tmp, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_src(dst));
+    /* at this step tmp.xyz = 2 * (N.E / N.N) * N */
+    ureg_SUB(ureg, tmp, ureg_src(tmp), E);
+    ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 2), ureg_src(tmp), sample);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXREG2RGB)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_src sample;
+    const int m = tx->insn.dst[0].idx;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    sample = ureg_DECL_sampler(ureg, m);
+    tx->info->sampler_mask |= 1 << m;
+    ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m), ureg_src(tx->regs.tS[n]), sample);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXDP3TEX)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    struct ureg_dst tmp;
+    struct ureg_src sample;
+    const int m = tx->insn.dst[0].idx;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    tx_texcoord_alloc(tx, m);
+
+    tmp = tx_scratch(tx);
+    ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), tx->regs.vT[m], ureg_src(tx->regs.tS[n]));
+    ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_YZ), ureg_imm1f(ureg, 0.0f));
+
+    sample = ureg_DECL_sampler(ureg, m);
+    tx->info->sampler_mask |= 1 << m;
+    ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m), ureg_src(tmp), sample);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXM3x2DEPTH)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst tmp;
+    const int m = tx->insn.dst[0].idx - 1;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    tx_texcoord_alloc(tx, m);
+    tx_texcoord_alloc(tx, m+1);
+
+    tmp = tx_scratch(tx);
+
+    /* performs the matrix multiplication */
+    ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), tx->regs.vT[m], ureg_src(tx->regs.tS[n]));
+    ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), tx->regs.vT[m+1], ureg_src(tx->regs.tS[n]));
+
+    ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Z), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y));
+    /* tmp.x = 'z', tmp.y = 'w', tmp.z = 1/'w'. */
+    ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Z));
+    /* res = 'w' == 0 ? 1.0 : z/w */
+    ureg_CMP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_negate(ureg_abs(ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y))),
+             ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_imm1f(ureg, 1.0f));
+    /* replace the depth for depth testing with the result */
+    tx->regs.oDepth = ureg_DECL_output_masked(ureg, TGSI_SEMANTIC_POSITION, 0, TGSI_WRITEMASK_Z);
+    ureg_MOV(ureg, tx->regs.oDepth, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X));
+    /* note that we write nothing to the destination, since it's disallowed to use it afterward */
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXDP3)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
+    const int m = tx->insn.dst[0].idx;
+    const int n = tx->insn.src[0].idx;
+    assert(m >= 0 && m > n);
+
+    tx_texcoord_alloc(tx, m);
+
+    ureg_DP3(ureg, dst, tx->regs.vT[m], ureg_src(tx->regs.tS[n]));
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(TEXM3x3)
 {
     struct ureg_program *ureg = tx->ureg;
     struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]);
-    struct ureg_src src[4];
-    int s;
+    struct ureg_src sample;
+    struct ureg_dst E, tmp;
     const int m = tx->insn.dst[0].idx - 2;
     const int n = tx->insn.src[0].idx;
     assert(m >= 0 && m > n);
 
-    for (s = m; s <= (m + 2); ++s) {
-        if (ureg_src_is_undef(tx->regs.vT[s]))
-            tx->regs.vT[s] = ureg_DECL_fs_input(ureg, tx->texcoord_sn, s, TGSI_INTERPOLATE_PERSPECTIVE);
-        src[s] = tx->regs.vT[s];
-    }
-    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_X), src[0], ureg_src(tx->regs.tS[n]));
-    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Y), src[1], ureg_src(tx->regs.tS[n]));
-    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Z), src[2], ureg_src(tx->regs.tS[n]));
+    tx_texcoord_alloc(tx, m);
+    tx_texcoord_alloc(tx, m+1);
+    tx_texcoord_alloc(tx, m+2);
+
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_X), tx->regs.vT[m], ureg_src(tx->regs.tS[n]));
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Y), tx->regs.vT[m+1], ureg_src(tx->regs.tS[n]));
+    ureg_DP3(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Z), tx->regs.vT[m+2], ureg_src(tx->regs.tS[n]));
 
     switch (tx->insn.opcode) {
     case D3DSIO_TEXM3x3:
         ureg_MOV(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W), ureg_imm1f(ureg, 1.0f));
         break;
     case D3DSIO_TEXM3x3TEX:
-        src[3] = ureg_DECL_sampler(ureg, m + 2);
+        sample = ureg_DECL_sampler(ureg, m + 2);
         tx->info->sampler_mask |= 1 << (m + 2);
-        ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 2), ureg_src(dst), src[3]);
+        ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 2), ureg_src(dst), sample);
+        break;
+    case D3DSIO_TEXM3x3VSPEC:
+        sample = ureg_DECL_sampler(ureg, m + 2);
+        tx->info->sampler_mask |= 1 << (m + 2);
+        E = tx_scratch(tx);
+        tmp = ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_XYZ);
+        ureg_MOV(ureg, ureg_writemask(E, TGSI_WRITEMASK_X), ureg_scalar(tx->regs.vT[m], TGSI_SWIZZLE_W));
+        ureg_MOV(ureg, ureg_writemask(E, TGSI_WRITEMASK_Y), ureg_scalar(tx->regs.vT[m+1], TGSI_SWIZZLE_W));
+        ureg_MOV(ureg, ureg_writemask(E, TGSI_WRITEMASK_Z), ureg_scalar(tx->regs.vT[m+2], TGSI_SWIZZLE_W));
+        /* At this step, dst = N = (u', w', z').
+         * We want dst to be the texture sampled at (u'', w'', z''), with
+         * (u'', w'', z'') = 2 * (N.E / N.N) * N - E */
+        ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(dst), ureg_src(dst));
+        ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X));
+        /* at this step tmp.x = 1/N.N */
+        ureg_DP3(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(dst), ureg_src(E));
+        /* at this step tmp.y = N.E */
+        ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y));
+        /* at this step tmp.x = N.E/N.N */
+        ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_imm1f(ureg, 2.0f));
+        ureg_MUL(ureg, tmp, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_src(dst));
+        /* at this step tmp.xyz = 2 * (N.E / N.N) * N */
+        ureg_SUB(ureg, tmp, ureg_src(tmp), ureg_src(E));
+        ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 2), ureg_src(tmp), sample);
         break;
     default:
         return D3DERR_INVALIDCALL;
@@ -2135,7 +2371,28 @@ DECL_SPECIAL(TEXM3x3)
 
 DECL_SPECIAL(TEXDEPTH)
 {
-    STUB(D3DERR_INVALIDCALL);
+    struct ureg_program *ureg = tx->ureg;
+    struct ureg_dst r5;
+    struct ureg_src r5r, r5g;
+
+    assert(tx->insn.dst[0].idx == 5); /* instruction must get r5 here */
+
+    /* we must replace the depth by r5.g == 0 ? 1.0f : r5.r/r5.g.
+     * r5 won't be used afterward, thus we can use r5.ba */
+    r5 = tx->regs.r[5];
+    r5r = ureg_scalar(ureg_src(r5), TGSI_SWIZZLE_X);
+    r5g = ureg_scalar(ureg_src(r5), TGSI_SWIZZLE_Y);
+
+    ureg_RCP(ureg, ureg_writemask(r5, TGSI_WRITEMASK_Z), r5g);
+    ureg_MUL(ureg, ureg_writemask(r5, TGSI_WRITEMASK_X), r5r, ureg_scalar(ureg_src(r5), TGSI_SWIZZLE_Z));
+    /* r5.r = r/g */
+    ureg_CMP(ureg, ureg_writemask(r5, TGSI_WRITEMASK_X), ureg_negate(ureg_abs(r5g)),
+             r5r, ureg_imm1f(ureg, 1.0f));
+    /* replace the depth for depth testing with the result */
+    tx->regs.oDepth = ureg_DECL_output_masked(ureg, TGSI_SEMANTIC_POSITION, 0, TGSI_WRITEMASK_Z);
+    ureg_MOV(ureg, tx->regs.oDepth, r5r);
+
+    return D3D_OK;
 }
 
 DECL_SPECIAL(BEM)
@@ -2275,7 +2532,7 @@ struct sm1_op_info inst_table[] =
     _OPI(MAD, MAD, V(0,0), V(3,0), V(0,0), V(3,0), 1, 3, NULL), /* 4 */
     _OPI(MUL, MUL, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 5 */
     _OPI(RCP, RCP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), /* 6 */
-    _OPI(RSQ, RSQ, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), /* 7 */
+    _OPI(RSQ, RSQ, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, SPECIAL(RSQ)), /* 7 */
     _OPI(DP3, DP3, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 8 */
     _OPI(DP4, DP4, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 9 */
     _OPI(MIN, MIN, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 10 */
@@ -2283,7 +2540,7 @@ struct sm1_op_info inst_table[] =
     _OPI(SLT, SLT, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 12 */
     _OPI(SGE, SGE, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 13 */
     _OPI(EXP, EX2, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), /* 14 */
-    _OPI(LOG, LG2, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), /* 15 */
+    _OPI(LOG, LG2, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, SPECIAL(LOG)), /* 15 */
     _OPI(LIT, LIT, V(0,0), V(3,0), V(0,0), V(0,0), 1, 1, NULL), /* 16 */
     _OPI(DST, DST, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 17 */
     _OPI(LRP, LRP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 3, NULL), /* 18 */
@@ -2295,16 +2552,16 @@ struct sm1_op_info inst_table[] =
     _OPI(M3x3, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, SPECIAL(M3x3)),
     _OPI(M3x2, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, SPECIAL(M3x2)),
 
-    _OPI(CALL,    CAL,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(CALL)),
-    _OPI(CALLNZ,  CAL,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(CALLNZ)),
+    _OPI(CALL,    CAL,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 1, SPECIAL(CALL)),
+    _OPI(CALLNZ,  CAL,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 2, SPECIAL(CALLNZ)),
     _OPI(LOOP,    BGNLOOP, V(2,0), V(3,0), V(3,0), V(3,0), 0, 2, SPECIAL(LOOP)),
     _OPI(RET,     RET,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(RET)),
     _OPI(ENDLOOP, ENDLOOP, V(2,0), V(3,0), V(3,0), V(3,0), 0, 0, SPECIAL(ENDLOOP)),
-    _OPI(LABEL,   NOP,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(LABEL)),
+    _OPI(LABEL,   NOP,     V(2,0), V(3,0), V(2,1), V(3,0), 0, 1, SPECIAL(LABEL)),
 
     _OPI(DCL, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 0, 0, SPECIAL(DCL)),
 
-    _OPI(POW, POW, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL),
+    _OPI(POW, POW, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, SPECIAL(POW)),
     _OPI(CRS, XPD, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* XXX: .w */
     _OPI(SGN, SSG, V(2,0), V(3,0), V(0,0), V(0,0), 1, 3, SPECIAL(SGN)), /* ignore src1,2 */
     _OPI(ABS, ABS, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL),
@@ -2322,8 +2579,9 @@ struct sm1_op_info inst_table[] =
     _OPI(ENDIF,  ENDIF,  V(2,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(ENDIF)),
     _OPI(BREAK,  BRK,    V(2,1), V(3,0), V(2,1), V(3,0), 0, 0, NULL),
     _OPI(BREAKC, BREAKC, V(2,1), V(3,0), V(2,1), V(3,0), 0, 2, SPECIAL(BREAKC)),
-
-    _OPI(MOVA, ARR, V(2,0), V(3,0), V(0,0), V(0,0), 1, 1, NULL),
+    /* we don't write to the address register, but a normal register (copied
+     * when needed to the address register), thus we don't use ARR */
+    _OPI(MOVA, MOV, V(2,0), V(3,0), V(0,0), V(0,0), 1, 1, NULL),
 
     _OPI(DEFB, NOP, V(0,0), V(3,0) , V(0,0), V(3,0) , 1, 0, SPECIAL(DEFB)),
     _OPI(DEFI, NOP, V(0,0), V(3,0) , V(0,0), V(3,0) , 1, 0, SPECIAL(DEFI)),
@@ -2334,42 +2592,42 @@ struct sm1_op_info inst_table[] =
     _OPI(TEX,          TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 0, SPECIAL(TEX)),
     _OPI(TEX,          TEX, V(0,0), V(0,0), V(1,4), V(1,4), 1, 1, SPECIAL(TEXLD_14)),
     _OPI(TEX,          TEX, V(0,0), V(0,0), V(2,0), V(3,0), 1, 2, SPECIAL(TEXLD)),
-    _OPI(TEXBEM,       TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXBEM)),
-    _OPI(TEXBEML,      TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXBEML)),
-    _OPI(TEXREG2AR,    TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXREG2AR)),
-    _OPI(TEXREG2GB,    TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXREG2GB)),
-    _OPI(TEXM3x2PAD,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXM3x2PAD)),
-    _OPI(TEXM3x2TEX,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXM3x2TEX)),
-    _OPI(TEXM3x3PAD,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXM3x3PAD)),
-    _OPI(TEXM3x3TEX,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXM3x3)),
-    _OPI(TEXM3x3SPEC,  TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXM3x3SPEC)),
-    _OPI(TEXM3x3VSPEC, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 0, 0, SPECIAL(TEXM3x3VSPEC)),
+    _OPI(TEXBEM,       TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXBEM)),
+    _OPI(TEXBEML,      TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXBEML)),
+    _OPI(TEXREG2AR,    TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXREG2AR)),
+    _OPI(TEXREG2GB,    TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXREG2GB)),
+    _OPI(TEXM3x2PAD,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x2PAD)),
+    _OPI(TEXM3x2TEX,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x2TEX)),
+    _OPI(TEXM3x3PAD,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x3PAD)),
+    _OPI(TEXM3x3TEX,   TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x3)),
+    _OPI(TEXM3x3SPEC,  TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 2, SPECIAL(TEXM3x3SPEC)),
+    _OPI(TEXM3x3VSPEC, TEX, V(0,0), V(0,0), V(0,0), V(1,3), 1, 1, SPECIAL(TEXM3x3)),
 
     _OPI(EXPP, EXP, V(0,0), V(1,1), V(0,0), V(0,0), 1, 1, NULL),
     _OPI(EXPP, EX2, V(2,0), V(3,0), V(0,0), V(0,0), 1, 1, NULL),
-    _OPI(LOGP, LG2, V(0,0), V(3,0), V(0,0), V(0,0), 1, 1, NULL),
-    _OPI(CND,  CND, V(0,0), V(0,0), V(0,0), V(1,4), 1, 3, SPECIAL(CND)),
+    _OPI(LOGP, LG2, V(0,0), V(3,0), V(0,0), V(0,0), 1, 1, SPECIAL(LOG)),
+    _OPI(CND,  NOP, V(0,0), V(0,0), V(0,0), V(1,4), 1, 3, SPECIAL(CND)),
 
     _OPI(DEF, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 0, SPECIAL(DEF)),
 
     /* More tex stuff */
-    _OPI(TEXREG2RGB,   TEX, V(0,0), V(0,0), V(1,2), V(1,3), 0, 0, SPECIAL(TEXREG2RGB)),
-    _OPI(TEXDP3TEX,    TEX, V(0,0), V(0,0), V(1,2), V(1,3), 0, 0, SPECIAL(TEXDP3TEX)),
-    _OPI(TEXM3x2DEPTH, TEX, V(0,0), V(0,0), V(1,3), V(1,3), 0, 0, SPECIAL(TEXM3x2DEPTH)),
-    _OPI(TEXDP3,       TEX, V(0,0), V(0,0), V(1,2), V(1,3), 0, 0, SPECIAL(TEXDP3)),
-    _OPI(TEXM3x3,      TEX, V(0,0), V(0,0), V(1,2), V(1,3), 0, 0, SPECIAL(TEXM3x3)),
-    _OPI(TEXDEPTH,     TEX, V(0,0), V(0,0), V(1,4), V(1,4), 0, 0, SPECIAL(TEXDEPTH)),
+    _OPI(TEXREG2RGB,   TEX, V(0,0), V(0,0), V(1,2), V(1,3), 1, 1, SPECIAL(TEXREG2RGB)),
+    _OPI(TEXDP3TEX,    TEX, V(0,0), V(0,0), V(1,2), V(1,3), 1, 1, SPECIAL(TEXDP3TEX)),
+    _OPI(TEXM3x2DEPTH, TEX, V(0,0), V(0,0), V(1,3), V(1,3), 1, 1, SPECIAL(TEXM3x2DEPTH)),
+    _OPI(TEXDP3,       TEX, V(0,0), V(0,0), V(1,2), V(1,3), 1, 1, SPECIAL(TEXDP3)),
+    _OPI(TEXM3x3,      TEX, V(0,0), V(0,0), V(1,2), V(1,3), 1, 1, SPECIAL(TEXM3x3)),
+    _OPI(TEXDEPTH,     TEX, V(0,0), V(0,0), V(1,4), V(1,4), 1, 0, SPECIAL(TEXDEPTH)),
 
     /* Misc */
     _OPI(CMP,    CMP,  V(0,0), V(0,0), V(1,2), V(3,0), 1, 3, SPECIAL(CMP)), /* reversed */
-    _OPI(BEM,    NOP,  V(0,0), V(0,0), V(1,4), V(1,4), 0, 0, SPECIAL(BEM)),
-    _OPI(DP2ADD, DP2A, V(0,0), V(0,0), V(2,0), V(3,0), 1, 3, SPECIAL(DP2ADD)), /* for radeons */
+    _OPI(BEM,    NOP,  V(0,0), V(0,0), V(1,4), V(1,4), 1, 2, SPECIAL(BEM)),
+    _OPI(DP2ADD, NOP,  V(0,0), V(0,0), V(2,0), V(3,0), 1, 3, SPECIAL(DP2ADD)),
     _OPI(DSX,    DDX,  V(0,0), V(0,0), V(2,1), V(3,0), 1, 1, NULL),
     _OPI(DSY,    DDY,  V(0,0), V(0,0), V(2,1), V(3,0), 1, 1, NULL),
     _OPI(TEXLDD, TXD,  V(0,0), V(0,0), V(2,1), V(3,0), 1, 4, SPECIAL(TEXLDD)),
-    _OPI(SETP,   NOP,  V(0,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(SETP)),
+    _OPI(SETP,   NOP,  V(0,0), V(3,0), V(2,1), V(3,0), 1, 2, SPECIAL(SETP)),
     _OPI(TEXLDL, TXL,  V(3,0), V(3,0), V(3,0), V(3,0), 1, 2, SPECIAL(TEXLDL)),
-    _OPI(BREAKP, BRK,  V(0,0), V(3,0), V(2,1), V(3,0), 0, 0, SPECIAL(BREAKP))
+    _OPI(BREAKP, BRK,  V(0,0), V(3,0), V(2,1), V(3,0), 0, 1, SPECIAL(BREAKP))
 };
 
 struct sm1_op_info inst_phase =
@@ -2740,11 +2998,11 @@ tx_ctor(struct shader_translator *tx, struct nine_shader_info *info)
     info->lconstf.data = NULL;
     info->lconstf.ranges = NULL;
 
-    for (i = 0; i < Elements(tx->regs.aL); ++i) {
-        tx->regs.aL[i] = ureg_dst_undef();
+    for (i = 0; i < Elements(tx->regs.rL); ++i) {
         tx->regs.rL[i] = ureg_dst_undef();
     }
-    tx->regs.a = ureg_dst_undef();
+    tx->regs.address = ureg_dst_undef();
+    tx->regs.a0 = ureg_dst_undef();
     tx->regs.p = ureg_dst_undef();
     tx->regs.oDepth = ureg_dst_undef();
     tx->regs.vPos = ureg_src_undef();
@@ -2852,9 +3110,6 @@ nine_translate_shader(struct NineDevice9 *device, struct nine_shader_info *info)
             ureg_property_fs_coord_pixel_center(tx->ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
     }
 
-    if (!ureg_dst_is_undef(tx->regs.oPts))
-        info->point_size = TRUE;
-
     while (!sm1_parse_eof(tx))
         sm1_parse_instruction(tx);
     tx->parse++; /* for byte_size */
@@ -2870,6 +3125,9 @@ nine_translate_shader(struct NineDevice9 *device, struct nine_shader_info *info)
 
     ureg_END(tx->ureg);
 
+    if (IS_VS && !ureg_dst_is_undef(tx->regs.oPts))
+        info->point_size = TRUE;
+
     if (debug_get_bool_option("NINE_TGSI_DUMP", FALSE)) {
         unsigned count;
         const struct tgsi_token *toks = ureg_get_tokens(tx->ureg, &count);

src/gallium/state_trackers/nine/nine_state.c

@@ -347,14 +347,13 @@ update_constants(struct NineDevice9 *device, unsigned shader_type)
     const int *const_i;
     const BOOL *const_b;
     uint32_t data_b[NINE_MAX_CONST_B];
-    uint32_t b_true;
     uint16_t dirty_i;
     uint16_t dirty_b;
     const unsigned usage = PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE;
     unsigned x = 0; /* silence warning */
-    unsigned i, c, n;
-    const struct nine_lconstf *lconstf;
-    struct nine_range *r, *p;
+    unsigned i, c;
+    struct nine_range *r, *p, *lconstf_ranges;
+    float *lconstf_data;
 
     box.y = 0;
     box.z = 0;
@@ -381,9 +380,10 @@ update_constants(struct NineDevice9 *device, unsigned shader_type)
         dirty_b = device->state.changed.vs_const_b;
         device->state.changed.vs_const_b = 0;
         const_b = device->state.vs_const_b;
-        b_true = device->vs_bool_true;
 
-        lconstf = &device->state.vs->lconstf;
+        lconstf_ranges = device->state.vs->lconstf.ranges;
+        lconstf_data = device->state.vs->lconstf.data;
+
         device->state.ff.clobber.vs_const = TRUE;
         device->state.changed.group &= ~NINE_STATE_VS_CONST;
     } else {
@@ -406,9 +406,10 @@ update_constants(struct NineDevice9 *device, unsigned shader_type)
         dirty_b = device->state.changed.ps_const_b;
         device->state.changed.ps_const_b = 0;
         const_b = device->state.ps_const_b;
-        b_true = device->ps_bool_true;
 
-        lconstf = &device->state.ps->lconstf;
+        lconstf_ranges = NULL;
+        lconstf_data = NULL;
+
         device->state.ff.clobber.ps_const = TRUE;
         device->state.changed.group &= ~NINE_STATE_PS_CONST;
     }
@@ -420,11 +421,10 @@ update_constants(struct NineDevice9 *device, unsigned shader_type)
        i = ffs(dirty_b) - 1;
        x = buf->width0 - (NINE_MAX_CONST_B - i) * 4;
        c -= i;
-       for (n = 0; n < c; ++n, ++i)
-          data_b[n] = const_b[i] ? b_true : 0;
+       memcpy(data_b, &(const_b[i]), c * sizeof(uint32_t));
        box.x = x;
-       box.width = n * 4;
-       DBG("upload ConstantB [%u .. %u]\n", x, x + n - 1);
+       box.width = c * 4;
+       DBG("upload ConstantB [%u .. %u]\n", x, x + c - 1);
        pipe->transfer_inline_write(pipe, buf, 0, usage, &box, data_b, 0, 0);
     }
 
@@ -455,14 +455,14 @@ update_constants(struct NineDevice9 *device, unsigned shader_type)
     }
 
     /* TODO: only upload these when shader itself changes */
-    if (lconstf->ranges) {
+    if (lconstf_ranges) {
         unsigned n = 0;
-        struct nine_range *r = lconstf->ranges;
+        struct nine_range *r = lconstf_ranges;
         while (r) {
             box.x = r->bgn * 4 * sizeof(float);
             n += r->end - r->bgn;
             box.width = (r->end - r->bgn) * 4 * sizeof(float);
-            data = &lconstf->data[4 * n];
+            data = &lconstf_data[4 * n];
             pipe->transfer_inline_write(pipe, buf, 0, usage, &box, data, 0, 0);
             r = r->next;
         }
@@ -491,19 +491,16 @@ update_vs_constants_userbuf(struct NineDevice9 *device)
     if (state->changed.vs_const_b) {
         int *idst = (int *)&state->vs_const_f[4 * device->max_vs_const_f];
         uint32_t *bdst = (uint32_t *)&idst[4 * NINE_MAX_CONST_I];
-        int i;
-        for (i = 0; i < NINE_MAX_CONST_B; ++i)
-            bdst[i] = state->vs_const_b[i] ? device->vs_bool_true : 0;
+        memcpy(bdst, state->vs_const_b, sizeof(state->vs_const_b));
         state->changed.vs_const_b = 0;
     }
 
-#ifdef DEBUG
     if (device->state.vs->lconstf.ranges) {
         /* TODO: Can we make it so that we don't have to copy everything ? */
         const struct nine_lconstf *lconstf =  &device->state.vs->lconstf;
         const struct nine_range *r = lconstf->ranges;
         unsigned n = 0;
-        float *dst = (float *)MALLOC(cb.buffer_size);
+        float *dst = device->state.vs_lconstf_temp;
         float *src = (float *)cb.user_buffer;
         memcpy(dst, src, cb.buffer_size);
         while (r) {
@@ -515,15 +512,9 @@ update_vs_constants_userbuf(struct NineDevice9 *device)
         }
         cb.user_buffer = dst;
     }
-#endif
 
     pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &cb);
 
-#ifdef DEBUG
-    if (device->state.vs->lconstf.ranges)
-        FREE((void *)cb.user_buffer);
-#endif
-
     if (device->state.changed.vs_const_f) {
         struct nine_range *r = device->state.changed.vs_const_f;
         struct nine_range *p = r;
@@ -557,39 +548,12 @@ update_ps_constants_userbuf(struct NineDevice9 *device)
     if (state->changed.ps_const_b) {
         int *idst = (int *)&state->ps_const_f[4 * device->max_ps_const_f];
         uint32_t *bdst = (uint32_t *)&idst[4 * NINE_MAX_CONST_I];
-        int i;
-        for (i = 0; i < NINE_MAX_CONST_B; ++i)
-            bdst[i] = state->ps_const_b[i] ? device->ps_bool_true : 0;
+        memcpy(bdst, state->ps_const_b, sizeof(state->ps_const_b));
         state->changed.ps_const_b = 0;
     }
 
-#ifdef DEBUG
-    if (device->state.ps->lconstf.ranges) {
-        /* TODO: Can we make it so that we don't have to copy everything ? */
-        const struct nine_lconstf *lconstf =  &device->state.ps->lconstf;
-        const struct nine_range *r = lconstf->ranges;
-        unsigned n = 0;
-        float *dst = (float *)MALLOC(cb.buffer_size);
-        float *src = (float *)cb.user_buffer;
-        memcpy(dst, src, cb.buffer_size);
-        while (r) {
-            unsigned p = r->bgn;
-            unsigned c = r->end - r->bgn;
-            memcpy(&dst[p * 4], &lconstf->data[n * 4], c * 4 * sizeof(float));
-            n += c;
-            r = r->next;
-        }
-        cb.user_buffer = dst;
-    }
-#endif
-
     pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, &cb);
 
-#ifdef DEBUG
-    if (device->state.ps->lconstf.ranges)
-        FREE((void *)cb.user_buffer);
-#endif
-
     if (device->state.changed.ps_const_f) {
         struct nine_range *r = device->state.changed.ps_const_f;
         struct nine_range *p = r;
@@ -1030,9 +994,10 @@ static const DWORD nine_samp_state_defaults[NINED3DSAMP_LAST + 1] =
     [NINED3DSAMP_SHADOW] = 0
 };
 void
-nine_state_set_defaults(struct nine_state *state, const D3DCAPS9 *caps,
+nine_state_set_defaults(struct NineDevice9 *device, const D3DCAPS9 *caps,
                         boolean is_reset)
 {
+    struct nine_state *state = &device->state;
     unsigned s;
 
     /* Initialize defaults.
@@ -1053,9 +1018,9 @@ nine_state_set_defaults(struct nine_state *state, const D3DCAPS9 *caps,
     }
 
     if (state->vs_const_f)
-        memset(state->vs_const_f, 0, NINE_MAX_CONST_F * 4 * sizeof(float));
+        memset(state->vs_const_f, 0, device->vs_const_size);
     if (state->ps_const_f)
-        memset(state->ps_const_f, 0, NINE_MAX_CONST_F * 4 * sizeof(float));
+        memset(state->ps_const_f, 0, device->ps_const_size);
 
     /* Cap dependent initial state:
      */

src/gallium/state_trackers/nine/nine_state.h

@@ -144,6 +144,7 @@ struct nine_state
     float *vs_const_f;
     int    vs_const_i[NINE_MAX_CONST_I][4];
     BOOL   vs_const_b[NINE_MAX_CONST_B];
+    float *vs_lconstf_temp;
     uint32_t vs_key;
 
     struct NinePixelShader9 *ps;
@@ -218,7 +219,7 @@ struct NineDevice9;
 
 boolean nine_update_state(struct NineDevice9 *, uint32_t group_mask);
 
-void nine_state_set_defaults(struct nine_state *, const D3DCAPS9 *,
+void nine_state_set_defaults(struct NineDevice9 *, const D3DCAPS9 *,
                              boolean is_reset);
 void nine_state_clear(struct nine_state *, const boolean device);
 

src/gallium/state_trackers/nine/pixelshader9.c

@@ -72,9 +72,10 @@ NinePixelShader9_ctor( struct NinePixelShader9 *This,
     This->sampler_mask = info.sampler_mask;
     This->rt_mask = info.rt_mask;
     This->const_used_size = info.const_used_size;
-    if (info.const_used_size == ~0)
-        This->const_used_size = NINE_CONSTBUF_SIZE(device->max_ps_const_f);
-    This->lconstf = info.lconstf;
+    /* no constant relative addressing for ps */
+    assert(info.const_used_size != ~0);
+    assert(info.lconstf.data == NULL);
+    assert(info.lconstf.ranges == NULL);
 
     return D3D_OK;
 }
@@ -101,9 +102,6 @@ NinePixelShader9_dtor( struct NinePixelShader9 *This )
     if (This->byte_code.tokens)
         FREE((void *)This->byte_code.tokens); /* const_cast */
 
-    FREE(This->lconstf.data);
-    FREE(This->lconstf.ranges);
-
     NineUnknown_dtor(&This->base);
 }
 

src/gallium/state_trackers/nine/pixelshader9.h

@@ -41,8 +41,6 @@ struct NinePixelShader9
 
     unsigned const_used_size; /* in bytes */
 
-    struct nine_lconstf lconstf;
-
     uint16_t sampler_mask;
     uint16_t sampler_mask_shadow;
     uint8_t rt_mask;

src/gallium/state_trackers/nine/stateblock9.c

@@ -43,8 +43,8 @@ NineStateBlock9_ctor( struct NineStateBlock9 *This,
 
     This->type = type;
 
-    This->state.vs_const_f = MALLOC(pParams->device->constbuf_vs->width0);
-    This->state.ps_const_f = MALLOC(pParams->device->constbuf_ps->width0);
+    This->state.vs_const_f = MALLOC(This->base.device->vs_const_size);
+    This->state.ps_const_f = MALLOC(This->base.device->ps_const_size);
     if (!This->state.vs_const_f || !This->state.ps_const_f)
         return E_OUTOFMEMORY;
 

src/gallium/state_trackers/nine/surface9.c

@@ -38,6 +38,8 @@
 
 #define DBG_CHANNEL DBG_SURFACE
 
+#define is_ATI1_ATI2(format) (format == PIPE_FORMAT_RGTC1_UNORM || format == PIPE_FORMAT_RGTC2_UNORM)
+
 HRESULT
 NineSurface9_ctor( struct NineSurface9 *This,
                    struct NineUnknownParams *pParams,
@@ -150,14 +152,22 @@ struct pipe_surface *
 NineSurface9_CreatePipeSurface( struct NineSurface9 *This, const int sRGB )
 {
     struct pipe_context *pipe = This->pipe;
+    struct pipe_screen *screen = pipe->screen;
     struct pipe_resource *resource = This->base.resource;
     struct pipe_surface templ;
+    enum pipe_format srgb_format;
 
     assert(This->desc.Pool == D3DPOOL_DEFAULT ||
            This->desc.Pool == D3DPOOL_MANAGED);
     assert(resource);
 
-    templ.format = sRGB ? util_format_srgb(resource->format) : resource->format;
+    srgb_format = util_format_srgb(resource->format);
+    if (sRGB && srgb_format != PIPE_FORMAT_NONE &&
+        screen->is_format_supported(screen, srgb_format,
+                                    resource->target, 0, resource->bind))
+        templ.format = srgb_format;
+    else
+        templ.format = resource->format;
     templ.u.tex.level = This->level;
     templ.u.tex.first_layer = This->layer;
     templ.u.tex.last_layer = This->layer;
@@ -374,10 +384,19 @@ NineSurface9_LockRect( struct NineSurface9 *This,
 
     if (This->data) {
         DBG("returning system memory\n");
-
-        pLockedRect->Pitch = This->stride;
-        pLockedRect->pBits = NineSurface9_GetSystemMemPointer(This,
-                                                              box.x, box.y);
+        /* ATI1 and ATI2 need special handling, because of d3d9 bug.
+         * We must advertise to the application as if it is uncompressed
+         * and bpp 8, and the app has a workaround to work with the fact
+         * that it is actually compressed. */
+        if (is_ATI1_ATI2(This->base.info.format)) {
+            pLockedRect->Pitch = This->desc.Height;
+            pLockedRect->pBits = This->data + box.y * This->desc.Height + box.x;
+        } else {
+            pLockedRect->Pitch = This->stride;
+            pLockedRect->pBits = NineSurface9_GetSystemMemPointer(This,
+                                                                  box.x,
+                                                                  box.y);
+        }
     } else {
         DBG("mapping pipe_resource %p (level=%u usage=%x)\n",
             resource, This->level, usage);

src/gallium/state_trackers/nine/swapchain9.c

@@ -467,7 +467,7 @@ NineSwapChain9_dtor( struct NineSwapChain9 *This )
 
     if (This->buffers) {
         for (i = 0; i < This->params.BackBufferCount; i++) {
-            NineUnknown_Destroy(NineUnknown(This->buffers[i]));
+            NineUnknown_Release(NineUnknown(This->buffers[i]));
             ID3DPresent_DestroyD3DWindowBuffer(This->present, This->present_handles[i]);
             if (This->present_buffers)
                 pipe_resource_reference(&(This->present_buffers[i]), NULL);

src/gallium/state_trackers/nine/texture9.c

@@ -47,6 +47,7 @@ NineTexture9_ctor( struct NineTexture9 *This,
     struct pipe_screen *screen = pParams->device->screen;
     struct pipe_resource *info = &This->base.base.info;
     struct pipe_resource *resource;
+    enum pipe_format pf;
     unsigned l;
     D3DSURFACE_DESC sfdesc;
     HRESULT hr;
@@ -92,9 +93,15 @@ NineTexture9_ctor( struct NineTexture9 *This,
     if (Usage & D3DUSAGE_AUTOGENMIPMAP)
         Levels = 0;
 
+    pf = d3d9_to_pipe_format(Format);
+    if (Format != D3DFMT_NULL && (pf == PIPE_FORMAT_NONE ||
+        !screen->is_format_supported(screen, pf, PIPE_TEXTURE_2D, 0, PIPE_BIND_SAMPLER_VIEW))) {
+        return D3DERR_INVALIDCALL;
+    }
+
     info->screen = screen;
     info->target = PIPE_TEXTURE_2D;
-    info->format = d3d9_to_pipe_format(Format);
+    info->format = pf;
     info->width0 = Width;
     info->height0 = Height;
     info->depth0 = 1;

src/gallium/state_trackers/nine/volumetexture9.c

@@ -37,6 +37,8 @@ NineVolumeTexture9_ctor( struct NineVolumeTexture9 *This,
                          HANDLE *pSharedHandle )
 {
     struct pipe_resource *info = &This->base.base.info;
+    struct pipe_screen *screen = pParams->device->screen;
+    enum pipe_format pf;
     unsigned l;
     D3DVOLUME_DESC voldesc;
     HRESULT hr;
@@ -57,9 +59,19 @@ NineVolumeTexture9_ctor( struct NineVolumeTexture9 *This,
     if (Usage & D3DUSAGE_AUTOGENMIPMAP)
         Levels = 0;
 
+    pf = d3d9_to_pipe_format(Format);
+    if (pf == PIPE_FORMAT_NONE ||
+        !screen->is_format_supported(screen, pf, PIPE_TEXTURE_3D, 0, PIPE_BIND_SAMPLER_VIEW)) {
+        return D3DERR_INVALIDCALL;
+    }
+
+    /* We support ATI1 and ATI2 hacks only for 2D textures */
+    if (Format == D3DFMT_ATI1 || Format == D3DFMT_ATI2)
+        return D3DERR_INVALIDCALL;
+
     info->screen = pParams->device->screen;
     info->target = PIPE_TEXTURE_3D;
-    info->format = d3d9_to_pipe_format(Format);
+    info->format = pf;
     info->width0 = Width;
     info->height0 = Height;
     info->depth0 = Depth;

src/gallium/state_trackers/omx/vid_dec_h264.c

@@ -706,6 +706,11 @@ static void slice_header(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp,
       if (pic_order_cnt_lsb != priv->codec_data.h264.pic_order_cnt_lsb)
          vid_dec_h264_EndFrame(priv);
 
+      if (IdrPicFlag) {
+         priv->codec_data.h264.pic_order_cnt_msb = 0;
+         priv->codec_data.h264.pic_order_cnt_lsb = 0;
+      }
+
       if ((pic_order_cnt_lsb < priv->codec_data.h264.pic_order_cnt_lsb) &&
           (priv->codec_data.h264.pic_order_cnt_lsb - pic_order_cnt_lsb) >= (max_pic_order_cnt_lsb / 2))
          pic_order_cnt_msb = priv->codec_data.h264.pic_order_cnt_msb + max_pic_order_cnt_lsb;

src/gallium/state_trackers/osmesa/osmesa.c

@@ -431,7 +431,7 @@ osmesa_st_framebuffer_validate(struct st_context_iface *stctx,
 
       templat.format = format;
       templat.bind = bind;
-      out[i] = osbuffer->textures[i] =
+      out[i] = osbuffer->textures[statts[i]] =
          screen->resource_create(screen, &templat);
    }
 

src/gallium/winsys/radeon/drm/radeon_drm_winsys.c

@@ -325,6 +325,9 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
                          &ws->info.max_sclk);
     ws->info.max_sclk /= 1000;
 
+    radeon_get_drm_value(ws->fd, RADEON_INFO_SI_BACKEND_ENABLED_MASK, NULL,
+                         &ws->info.si_backend_enabled_mask);
+
     ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 
     /* Generation-specific queries. */

src/gallium/winsys/radeon/drm/radeon_winsys.h

@@ -231,6 +231,7 @@ struct radeon_info {
 
     boolean                     si_tile_mode_array_valid;
     uint32_t                    si_tile_mode_array[32];
+    uint32_t                    si_backend_enabled_mask;
 
     boolean                     cik_macrotile_mode_array_valid;
     uint32_t                    cik_macrotile_mode_array[16];

src/glsl/Makefile.am

@@ -137,7 +137,9 @@ glsl_test_SOURCES = \
 	test.cpp \
 	test_optpass.cpp
 
-glsl_test_LDADD = libglsl.la
+glsl_test_LDADD =					\
+	libglsl.la					\
+	$(PTHREAD_LIBS)
 
 # We write our own rules for yacc and lex below. We'd rather use automake,
 # but automake makes it especially difficult for a number of reasons:

src/glsl/builtin_variables.cpp

@@ -724,6 +724,10 @@ builtin_variable_generator::generate_constants()
       add_const("gl_MaxCombinedImageUniforms",
                 state->Const.MaxCombinedImageUniforms);
    }
+
+   if (state->is_version(410, 0) ||
+       state->ARB_viewport_array_enable)
+      add_const("gl_MaxViewports", state->Const.MaxViewports);
 }
 
 

src/glsl/glsl_parser_extras.cpp

@@ -134,6 +134,9 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *_ctx,
    this->Const.MaxFragmentImageUniforms = ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms;
    this->Const.MaxCombinedImageUniforms = ctx->Const.MaxCombinedImageUniforms;
 
+   /* ARB_viewport_array */
+   this->Const.MaxViewports = ctx->Const.MaxViewports;
+
    this->current_function = NULL;
    this->toplevel_ir = NULL;
    this->found_return = false;

src/glsl/glsl_parser_extras.h

@@ -343,6 +343,9 @@ struct _mesa_glsl_parse_state {
       unsigned MaxGeometryImageUniforms;
       unsigned MaxFragmentImageUniforms;
       unsigned MaxCombinedImageUniforms;
+
+      /* ARB_viewport_array */
+      unsigned MaxViewports;
    } Const;
 
    /**

src/glsl/link_varyings.cpp

@@ -835,9 +835,11 @@ varying_matches::record(ir_variable *producer_var, ir_variable *consumer_var)
        * regardless of where they appear.  We can trivially satisfy that
        * requirement by changing the interpolation type to flat here.
        */
-      producer_var->data.centroid = false;
-      producer_var->data.sample = false;
-      producer_var->data.interpolation = INTERP_QUALIFIER_FLAT;
+      if (producer_var) {
+         producer_var->data.centroid = false;
+         producer_var->data.sample = false;
+         producer_var->data.interpolation = INTERP_QUALIFIER_FLAT;
+      }
 
       if (consumer_var) {
          consumer_var->data.centroid = false;

src/glsl/linker.cpp

@@ -2746,6 +2746,21 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
    if (last >= 0 && last < MESA_SHADER_FRAGMENT) {
       gl_shader *const sh = prog->_LinkedShaders[last];
 
+      if (first == MESA_SHADER_GEOMETRY) {
+         /* There was no vertex shader, but we still have to assign varying
+          * locations for use by geometry shader inputs in SSO.
+          *
+          * If the shader is not separable (i.e., prog->SeparateShader is
+          * false), linking will have already failed when first is
+          * MESA_SHADER_GEOMETRY.
+          */
+         if (!assign_varying_locations(ctx, mem_ctx, prog,
+                                       NULL, sh,
+                                       num_tfeedback_decls, tfeedback_decls,
+                                       prog->Geom.VerticesIn))
+            goto done;
+      }
+
       if (num_tfeedback_decls != 0 || prog->SeparateShader) {
          /* There was no fragment shader, but we still have to assign varying
           * locations for use by transform feedback.