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Author SHA1 Message Date
Emil Velikov
4f1e500150 docs: Update 11.0.0 release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-12 13:06:25 +01:00
Emil Velikov
bd46093103 Update version to 11.0.0(final)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-12 10:21:51 +01:00
Kenneth Graunke
766d11e8f0 glsl: Use hash tables for opt_constant_propagation() kill sets.
Cuts compile/link time of the fragment shader in #91857 by 19%
(16.28 -> 13.05).

I didn't bother with the acp sets because they're smaller, but it
might be worth doing as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 4654439fdd)
Nominated-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-11 19:47:09 +01:00
Kenneth Graunke
5923bd6d78 i965: Use hash tables for brw_fs_vector_splitting().
Cuts compile/link time of the fragment shader in #91857 by 25%
(21.64 -> 16.28).

v2: Drop unnecessary _mesa_hash_table_destroy call, and use
    refs.ht->entries == 0 rather than ad-hoc checking (suggested by
    Timothy Arceri).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit e20f30eb51)
Nominated-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-11 19:46:16 +01:00
Kenneth Graunke
d0cf5100b5 glsl: Use hash tables in opt_constant_variable().
Cuts compile/link time of the fragment shader in bug #91857 by 31%
(31.79 -> 21.64).  It has over 8,000 variables so linked lists are
terrible.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 2fc0ce293a)
Nominated-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-11 19:43:42 +01:00
Ian Romanick
e36ca8c2bb meta: Always bind the texture
We may have been called from glGenerateTextureMipmap with CurrentUnit
still set to 0, so we don't know when we can skip binding the texture.
Assume that _mesa_BindTexture will be fast if we're rebinding the same
texture.

v2: Remove currentTexUnitSave because it is now unused.  Suggested by
both Neil and Anuj.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91847
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
(cherry picked from commit 767c33e881)
2015-09-11 19:19:32 +01:00
Marek Olšák
901744b2ff r600g: use pipe_resource::width0 instead pb_buffer::size
pb_buffer::size was aligned by 29aaab2b5f,
which broke the CMASK code I think.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91881

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 5c6c5b5246)
2015-09-11 19:19:32 +01:00
Marek Olšák
c62f82980c radeonsi: enable VGPR spilling on VI
This fixes corruption in Unigine Heaven on VI

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 7956eae1c7)
2015-09-11 19:19:32 +01:00
Marek Olšák
151f84f2db winsys/amdgpu: calculate the maximum number of compute units
Required for register spilling.

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit c6502e880b)
2015-09-11 19:19:32 +01:00
Albert Freeman
7d79ad95fd clover: Avoid using typename to allow compilation of clover by clang
When parsing an variable declaration qualified with the typename
keyword, clang attempted to declare a variable with the type of non
type member "enum type type" of module::argument (within the header
file clover/core/module.hpp) instead of the typed member of
module::argument "enum type".

Replaced "typename" with "enum" to force clang to declare the variable
marg_type with type "enum type" of module::argument.

CC: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Albert Freeman <albertwdfreeman@gmail.com>
(cherry picked from commit 1691ead1b8)
2015-09-11 19:19:32 +01:00
Kenneth Graunke
2becc98645 i965: Advertise 65536 for GL_MAX_UNIFORM_BLOCK_SIZE.
Our old value of 16384 is the minimum value.  DirectX apparently
requires 65536 at a minimum; that's also what nVidia and the Intel
Windows driver advertise.  AMD advertises MAX_INT.

Ilia Mirkin noticed that "Shadow Warrior" uses UBOs larger than 16k
on Nouveau, which advertises 65536 bytes for this limit.  Traces
captured on Nouveau don't work on i965 because our lower limit causes
the GLSL linker to reject the captured shaders.  While this isn't
important in and of itself, it does suggest that raising the limit
would be beneficial.

We can read linear buffers up to 2^27 bytes in size, so raising this
should be safe; we could probably even go larger.  For now, matching
nVidia and Intel/Windows seems like a good plan.

We have to reinitialize MaxCombinedUniformComponents as core Mesa will
have set it based on a stale value for MaxUniformBlockSize.

According to Tapani, there's an unreleased game that asserts on this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit bf58a2c362)
2015-09-11 19:19:32 +01:00
Ilia Mirkin
7cca7f71da nv50/ir: don't fold immediate into mad if registers are too high
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91551
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 74b86b971f)
2015-09-11 19:19:32 +01:00
Ilia Mirkin
94b8f60146 nv50/ir: fix emission of 8-byte wide interp instruction
This can come up if the target register number is > 63, which is fairly
rare.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91551
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit ce28ca7133)
2015-09-11 19:19:31 +01:00
Ilia Mirkin
94bf2e2e05 nv50/ir: r63 is only 0 if we are using less than 63 registers
It is advantageous to use r63 instead of r127 since r63 can fit into the
shorter encoding. However if we've RA'd over 63 registers, we must use
r127 as the replacement instead.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 641eda0c79)
2015-09-11 19:19:31 +01:00
Ilia Mirkin
78612aba51 nv50/ir: make edge splitting fix up phi node sources
Unfortunately nv50_ir phi nodes aren't directly connected to the CFG, so
the mapping between source and the actual BB is by inbound edge order.
So when manipulating edges one has to be extremely careful. We were
insufficiently careful when splitting critical edges which resulted in
the phi nodes being confused as to where their sources were coming from.

This primarily manifests itself with the TXL-lowering logic on nv50,
when it is inside of a conditional. I've been unable to trigger the
issue anywhere else so far. This resolves rendering failures
in a number of games like Two Worlds 2, Trine: Enchanted Edition, Trine 2,
XCOM:Enemy Unknown, Stacking. It also improves the situation in
Hearthstone, Sonic Generations, and The Raven: Legacy of a Master Thief.
However more work needs to be done there (splitting a lot more edges
solves it, so it's some other sort of RA-related issue).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90887
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a072ef8748)
2015-09-11 19:19:31 +01:00
Ilia Mirkin
0878187488 nvc0: remove BGRA4 format support
Something is wrong with the support somewhere. I couldn't get the blob
driver to use it either, although it happily used RGB5_A1.
teximage-colors works, but WoW seems to fail in the menus for drawing
text.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91526
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 342e68dc60)
2015-09-11 19:19:31 +01:00
Ilia Mirkin
4ae2ffbff1 nvc0: keep track of cb bindings per buffer, use for upload settings
CB updates to bound buffers need to go through the CB_DATA endpoints,
otherwise the shader may not notice that the updates happened.
Furthermore, these updates have to go in to the same address as the
bound buffer, otherwise, again, the shader may not notice updates.

So we keep track of all the places where a constbuf is bound, and
iterate over all of them when updating data. If a binding is found that
encompasses the region to be updated, then we use the settings of that
binding for the upload. Otherwise we upload as a regular data update.

This fixes piglit 'arb_uniform_buffer_object-rendering offset' as well
as blurriness in Witcher2.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91890
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e50c01d5af)
2015-09-11 19:19:31 +01:00
Hans de Goede
b0578c0061 nv30: Disable msaa unless requested from the env by NV30_MAX_MSAA
Some modern apps try to use msaa without keeping in mind the
restrictions on videomem of older cards. Resulting in dmesg saying:

 [ 1197.850642] nouveau E[soffice.bin[3785]] fail ttm_validate
 [ 1197.850648] nouveau E[soffice.bin[3785]] validating bo list
 [ 1197.850654] nouveau E[soffice.bin[3785]] validate: -12

Because we are running out of video memory, after which the program
using the msaa visual freezes, and eventually the entire system freezes.

To work around this we do not allow msaa visauls by default and allow
the user to override this via NV30_MAX_MSAA.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[imirkin: move env var lookup to screen so that it's only done once]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>

(cherry picked from commit 3e9df0e3af)
2015-09-11 19:19:31 +01:00
Hans de Goede
b3dfd67feb nv30: Fix color resolving for nv3x cards
We do not have a generic blitter on nv3x cards, so we must use the
sifm object for color resolving.

This commit divides the sources and dest surfaces in to tiles which
match the constraints of the sifm object, so that color resolving
will work properly on nv3x cards.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit ac066bf65c)
2015-09-11 19:19:31 +01:00
Mauro Rossi
017085efaf android: Always define __STDC_LIMIT_MACROS.
Analogous to commit 02a4fe22b1 (configure.ac: Always define
__STDC_LIMIT_MACROS.)

v2: [Emil Velikov] keep the LLVM specific __STDC_FORMAT_MACROS

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 8056b3ffeb)
2015-09-11 19:19:31 +01:00
Mauro Rossi
9e3528a844 android: rename LLVM_VERSION_PATCH to MESA_LLVM_VERSION_PATCH
Fixes: 797f4eacea8(configure.ac: rename LLVM_VERSION_PATCH to avoid
conflict with llvm-config.h)
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

(cherry picked from commit 5235bfe7b7)
2015-09-11 19:19:31 +01:00
Mauro Rossi
84060d35bb nouveau: android: add space before PRIx64 macro
Otherwise the android build fails with

   error : unable to find string literal operator ‘operator"" PRIx64’

There are several resources referring to the problem, which is related
to c++11, in our case used when building mesa for lollipop.

http://comments.gmane.org/gmane.comp.graphics.opensg.user/5883

I've not investigated all the semantics, some people even suggested a
bug in the gcc compiler,
I just saw the building error was solved with one little space for
lollipop and no side effect when c+11 not used.

v2: [Emil Velikov] add an alternative commit message from Mauro.

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit e838d91b94)
2015-09-11 19:19:31 +01:00
Emil Velikov
2c581d04cc auxiliary: rework the python generated sources rules
There are a few bits this commit aims to resolve:

One can generalise the mkdir rule to a simple MKDIR_P $(@D) which will
expand appropriately for even if we change the subdir name, and/or add
new rules. We can also drop the explicit $(srcdir) prefix for the
dependency rules, they they are not strictly required, nor used
elsewhere in mesa.

Finally replace $< with explicit filename to be consistent through the
file, and honour PYTHON_FLAGS.

v2: Add comprehensive commit summary/message (Ian, Matt)

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 0d39279448)
2015-09-11 19:19:31 +01:00
Emil Velikov
a1ac93fc4b glsl: build: remove bogus dependency
v2: rebase on top of the previous commit - don't touch the LOCAL_PATH
prefix for nir_constant_expressions.h

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit c373eaedfc)
2015-09-11 19:19:31 +01:00
Emil Velikov
1f2b601f8b glsl: build: use makefile.sources variables when possible
Rather than folding one variable within the other only to unwrap them,
just use the ones we need.

v2: bring back LOCAL_PATH prefix for nir_constant_expressions,h

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
(cherry picked from commit a3b05e0492)
2015-09-11 19:19:31 +01:00
Emil Velikov
4ca5756766 glsl: automake: reuse $(NIR_GENERATED_FILES) where possible
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit da5e4559ee)
2015-09-11 19:19:30 +01:00
Emil Velikov
7023899ab9 glsl: automake: rework the sources generation rules
The glsl equivalent of "mesa: automake: rework the source generation
rules". Plus let's make things consistent and always explicitly provide
the header name.

v2: Rebase on top of reverted "remove custom AM_V_LEX/YACC" (Matt)

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9e0594418d)
2015-09-11 19:19:30 +01:00
Emil Velikov
2190f218ad mesa: automake: rework the source generation rules
Same logic as previous commit applies.

Additionally remove the odd (set -e/mv/INDENT) from the rules.
The last one is the only one we remotely care about, if reading the
generated sources.

Upcoming work from DylanB which will replace the existing python
scripts with ones that produce more readable output anyway.

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit fd913f47b7)
2015-09-11 19:19:30 +01:00
Emil Velikov
2c27775a44 mapi: automake: rework the source generation rules
Same logic as previous commit applies. Also fix bogus MESA_MAPI_DIR -
the sources are located in the source dir (duh).

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 96509aa804)
2015-09-11 19:19:30 +01:00
Emil Velikov
b7b8d4982d mapi: automake: rework the *api/glapi_mapi_tmp.h rules
Same logic as previous commit applies.

v2: Merge with "inline glapi_gen_mapi define" (Matt)

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 449ce5d64f)
2015-09-11 19:19:30 +01:00
Emil Velikov
0d1f600c94 util: automake: rework the format_srgb.c rule
A handful of changes/cleanups paving the way to bmake support:
 - Remove optional $(srcdir)/ prefix for files in the prereq list.
 - Drop the space after the AM_V_GEN variable.
 - Using $< in a non-suffix rule is a GNU make idiom.
 - Use $(@D) over $(dir $@). The latter is a POSIX standard.

v2: Cosmetic tweaks in the commit summary.

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
(cherry picked from commit d65bd7a7be)
2015-09-11 19:19:30 +01:00
Emil Velikov
0c9f66829c xmlpool: 'promote' LOCALEDIR variable
This is the only place in mesa that uses this constuct which seems
to be GNUmake-ism. Attempting to build with POSIX make implementations
(bmake) would fail as below.

--- options.h ---
LOCALEDIR := .
sh: line 2: LOCALEDIR: command not found
*** [options.h] Error code 127

So let's keep things consistent and compatible by making the variable
non target specific.

v2:
 - Bring back LOCALEDIR.
 - Reword the commit message
 - Change mesa-stable tag 10.6 > 11.0

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Cc: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit c8984a7a46)
2015-09-11 19:19:30 +01:00
Dave Airlie
11dc43424d r600: don't use shader key without verifying shader type (v2)
Since 7a32652231
r600: Turn 'r600_shader_key' struct into union

we were accessing key fields that might be aliased in the union
with other fields, so we should check what shader type we are
compiling for before using key values from it.

v1.1: make it compile
v2: have caffeine, make it work - we don't set type
until later, so don't reference it until we've set it.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 6d2ceb10cd)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

Conflicts:
	src/gallium/drivers/r600/r600_shader.c
2015-09-11 19:19:30 +01:00
Ilia Mirkin
ec9bafda70 st/mesa: increase viewport bounds limits for GL4 hw
According to the ARB_viewport_array spec, GL4 limit is higher than the
GL3 limit. Also take this opportunity to fix the GL3 limit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 458e55d7c5)
2015-09-11 18:54:37 +01:00
Ilia Mirkin
6654483bc6 nvc0: always emit a full shader colormask
Indications are that if the colormask indicates a single bit set on
fermi, that value will always be read from $r0 instead of a potentially
higher register (if e.g. green is set). Not to upset the counting logic,
always set the header up with a full color mask for each RT. Such a
situation can basically only ever happen with generated blit shaders.

Fixes the following piglit on Fermi (Kepler is unaffected):
  fbo-stencil blit GL_DEPTH32F_STENCIL8

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 39df725f73)
2015-09-11 18:54:06 +01:00
Hans de Goede
4b1ef5e842 nv30: Fix max width / height checks in nv30 sifm code
The sifm object has a limit of 1024x1024 for its input size and 2048x2048
for its output. The code checking this was trying to be clever resulting
in it seeing a surface of e.g 1024x256 being outside of the input size
limit.

This commit fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 87073c69f3)
2015-09-11 18:53:32 +01:00
Chris Wilson
95bc059c50 i965: Disallow fast blit paths for CopyTexImage with PixelTransfer ops
glCopyTexImage behaves similarly to glReadPixels with respect to the
pixel transfer operations. Therefore if any are set we cannot use the
simple blit-only fast paths.

(Though if would be possible to relax the blorp path to handle
pixel zoom, or we can just enhance meta.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviwewed-by: Iago Toral <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit be519c2d50)
2015-09-11 18:52:40 +01:00
Ilia Mirkin
254a07841d st/mesa: don't fall back to 16F when 32F is requested
Nothing in the spec allows for the reduced precision, and this also
fixes st_QuerySamplesForFormat for nv50, which does not allow MS8 on
RGBA32F. Now this will be respected instead of reporting MS8 as
supported with an assumption that the format used will be RGBA16F.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e40f32d562)
2015-09-11 18:42:35 +01:00
Emil Velikov
271290f077 Update version to 11.0.0-rc3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-06 19:30:23 +01:00
Ilia Mirkin
7bf27c2393 nouveau: don't mark full range as used on unmap with explicit flush
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit a778831735)
2015-09-06 19:11:00 +01:00
Ilia Mirkin
7f80a2383e nv50: avoid using inline vertex data submit when gl_VertexID is used
The hardware only generates vertexid when vertices come from a VBO. This
fixes:

  vertexid-drawelements
  vertexid-drawarrays

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c830d193db)
2015-09-06 19:09:59 +01:00
Ilia Mirkin
3e1fde76b6 nv50: don't flush vertex arrays when index buffer changes
The index buffer is fed in inline over a pushbuf. It's not related to
vertices or any caching that might be done on them.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 4a025c6bc8)
2015-09-06 19:09:11 +01:00
Ilia Mirkin
747e1b03bf nv50: rebind bo to bufctx when invalidating idxbuf storage
There is nothing to be done on a dirty idxbuf, but the bo may have
changed, so we have to rebind it to the bufctx.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 1f62d36ae2)
2015-09-06 19:08:22 +01:00
Ilia Mirkin
b85ec1e34b nv50: clear buffer status on all vertex bufs, not just the first one
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 114cc18b98)
2015-09-06 19:07:37 +01:00
Ilia Mirkin
acb822f1bd nv50: fix drawing from tfb, direct-to-pushbuf submits
The stride was being set to 0, which is illegal (and also non-sensical).
Also we must wait for the buffer to become available for reading as
otherwise a wrong value may be prefetched. Since we must wait for the
buffer anyways, and it's mapped and in GART, we may as well avoid the
annoyance of the indirect pushbuf submit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 75e34d1df8)
2015-09-06 19:06:41 +01:00
Oded Gabbay
ddf459492d llvmpipe: convert double to long long instead of unsigned long long
round(val*dscale) produces a double result, as val and dscale are double.
However, LLVMConstInt receives unsigned long long, so there is an
implicit conversion from double to unsigned long long.
This is an undefined behavior. Therefore, we need to first explicitly
convert the round result to long long, and then let the compiler handle
conversion from that to unsigned long long.

This bug manifests itself in POWER, where all IMM values of -1 are being
converted to 0 implicitly, causing a wrong LLVM IR output.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
CC: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit 4f2290d161)
2015-09-06 19:05:54 +01:00
Hans de Goede
fcdaa190e5 nv30: Implement color resolve for msaa
Note this is not ideal. Since the sifm can only do source sizes upto
1024x1024 we end up using the blitter on nv4x, which is not that fast.

And on nv3x we end up using the cpu which is really slow.

Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 3c6c4d4f29)
2015-09-06 19:05:03 +01:00
Hans de Goede
0abcd9c8fc nv30: Fix creation of scanout buffers
Scanout buffers on nv30 must always be non-swizzled and have special
width alignment constraints.

These constrains have been taken from the xf86-video-nouveau
src/nv_accel_common.c: nouveau_allocate_surface() function.

nouveau_allocate_surface() applies these width constraints only when a
tiled attribute is set, which it sets for all surfaces allocated via
dri, and this "tiling" is not the same as swizzling, scanout surfaces
must be linear / have a uniform_pitch or only complete garbage is shown.

This commit fixes dri3 on nv30 showing a garbled display, with dri3 the
scanout buffers are allocated by mesa, rather then by the ddx, and the
wrong stride of these buffers was causing the garbled display.

Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 3329703eb1)
2015-09-06 19:04:19 +01:00
Boyan Ding
0b14d35863 vc4: Initialize pack field of qreg to 0 in qir_get_temp
This avoids generation of undefined packing in qir and qpu instructions,
fixing a lot of rendering errors.

Fixes 8b36d107fd (vc4: Pack the unorm-packing bits into a src MUL
instruction when possible.)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 48de40ce9c)
2015-09-06 19:03:38 +01:00
Chris Wilson
a6710090af i965: Disallow PixelTransfer operations for tiled-memcpy TexImage/ReadPixels
The tiled memcpy fast paths perform a simple blit (with only a couple of
trivial pixel conversion routines) and do not accommodate PixelTransfer
operations. Therefore if any are set, fallback to the regular routines.
Note that PixelTransfer only applies to TexImage and ReadPixels, not to
GetTexImage.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 099f5b3a62)
2015-09-06 19:02:55 +01:00
Kenneth Graunke
0c98ba7abf i965: Fix copy propagation type changes.
commit 472ef9a02f introduced code to
change the types of SEL and MOV instructions for moves that simply
"copy bits around".  It didn't account for type conversion moves,
however.  So it would happily turn this:

   mov(8) vgrf6:D, -vgrf5:D
   mov(8) vgrf7:F, vgrf6:UD

into this:

   mov(8) vgrf6:D, -vgrf5:D
   mov(8) vgrf7:D, -vgrf5:D

which erroneously drops the conversion to float.

Cc: "11.0 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 2ace64fd59)
2015-09-06 19:02:09 +01:00
Marek Olšák
eef8258a86 winsys/radeon: remove exported buffers from the cache
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit efea7c3a3f)
2015-09-06 19:01:19 +01:00
Marek Olšák
747cd2c273 winsys/amdgpu: remove exported buffers from the cache
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 54964c7751)
2015-09-06 19:00:32 +01:00
Marek Olšák
ecdd69cd05 gallium/pb_bufmgr_cache: add a way to remove buffers from the cache explicitly
This must be done before exporting a buffer as dmabuf fds, because
we lose track of who is using it and can't trust the reference counter.

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 35d0f12797)
2015-09-06 18:59:32 +01:00
Kenneth Graunke
74fa106932 glsl: Handle attribute aliasing in attribute storage limit check.
In various versions of OpenGL and GLSL, it's possible to declare
multiple VS input variables with aliasing attribute locations.

So, when computing the storage requirements for vertex attributes,
we can't simply add up the sizes.  Instead, we need to look at the
enabled slots.

This patch begins tracking which attributes are double types that
are larger than 128-bits (i.e. take up two vec4 slots).  We then
count normal attributes once, and count the double-size attributes
a second time.

Fixes deQP functional.attribute_location.bind_aliasing.max_cond_* tests
on i965, which regressed with commit ad208d975a.

No Piglit changes on llvmpipe (which actually supports dvecs).

Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c3294ca5a1)
2015-09-06 18:58:48 +01:00
Ian Romanick
1153420017 mesa: Don't allow wrong type setters for matrix uniforms
Previously we would allow glUniformMatrix4fv on a dmat4 and
glUniformMatrix4dv on a mat4.  Both are illegal.  That later also
overwrites the storage for the mat4 and causes bad things to happen.

Should fix the (new) arb_gpu_shader_fp64-wrong-type-setter piglit test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Cc: Dave Airlie <airlied@redhat.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 7237c937af)
2015-09-06 18:58:06 +01:00
Ian Romanick
5704d473c8 mesa: Pass the type to _mesa_uniform_matrix as a glsl_base_type
This matches _mesa_uniform, and it enables the bug fix in the next
patch.

v2: s/type/basicType/ in the assert in _mesa_uniform_matrix.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au> [v1]
Cc: Dave Airlie <airlied@redhat.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a6976f0972)
2015-09-06 18:56:34 +01:00
Matt Turner
eb2b88c44b i965/fs: Handle MRF destinations in lower_integer_multiplication().
The lowered code reads from the destination, which isn't possible from
message registers.

Fixes the following dEQP tests on SNB:

    dEQP-GLES3.functional.shaders.precision.int.highp_mul_fragment
    dEQP-GLES3.functional.shaders.precision.int.mediump_mul_fragment
    dEQP-GLES3.functional.shaders.precision.int.lowp_mul_fragment

Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Tested-by:  Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit 9390cb8459)
2015-09-06 18:55:46 +01:00
Dave Airlie
5c08afc894 mesa/readpixels: check strides are equal before skipping conversion
The CTS packed_pixels test checks that readpixels doesn't write
into the space between rows, however we fail that here unless
we check the format and stride match.

This fixes all the core mesa problems with CTS packed_pixels
tests.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 32769ac016)
2015-09-06 18:55:03 +01:00
Dave Airlie
5fb758a418 texcompress_s3tc/fxt1: fix stride checks (v1.1)
The fastpath currently checks the RowLength != width, but
if you have a RowLength of 7, and Alignment of 4, then
that shouldn't match.

align the rowlength to the pack alignment before comparing.

This fixes compressed cases in CTS packed_pixels_pixelstore
test when SKIP_PIXELS is enabled, which causes row length
to get set.

v1.1: add fxt1 fix (Iago)

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit b4a70401f5)
2015-09-06 18:54:19 +01:00
Dave Airlie
bb37824959 st/readpixels: fix accel path for skipimages.
We don't need to use the 3d image address here as that will
include SKIP_IMAGES, and we are only blitting a single
2D anyways, so just use the 2D path.

This fixes some memory overruns under CTS
 packed_pixels.packed_pixels_pixelstore when PACK_SKIP_IMAGES
is used.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 6a3e1fb958)
2015-09-06 18:53:38 +01:00
Dave Airlie
8fc2cbb00e mesa/formats: 8-bit channel integer formats addition
Add enough 8-bit channel formats to handle all the
different things CTS throws at us.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit c3c242070e)
2015-09-06 18:44:33 +01:00
Dave Airlie
b497b88dbe mesa/formats: add some formats from GL3.3
GL3.3 added GL_ARB_texture_rgb10_a2ui, which specifies
a lot more things than just rgb10/a2ui.

While playing with ogl conform one of the tests must
attempted all valid formats for GL3.3 and hits the
unreachable here.

This adds the first chunk of formats that hit the
assert.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8185a02316)
2015-09-06 18:35:57 +01:00
Dave Airlie
dcb220f2f7 mesa: handle SwapBytes in compressed texture get code.
This case just wasn't handled, so add support for it.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 5b6c7da460)
2015-09-06 18:35:14 +01:00
Dave Airlie
d9534e4785 mesa: fix SwapBytes handling in numerous places
In a number of places the SwapBytes handling didn't handle cases with
GL_(UN)PACK_ALIGNMENT set and 7 byte width cases aligned to 8 bytes.

This adds a common routine to swap bytes a 2D image and uses this
code in:

texture storage
texture get
readpixels
swrast drawpixels.

[airlied: updated with Brian's nitpicks].

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0ad3a475ef)
2015-09-06 18:33:47 +01:00
Marek Olšák
63b4e6bfc9 radeonsi: fix memory usage checking for big IBs
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 05af645a95)
2015-09-06 18:32:59 +01:00
Marek Olšák
a5dee22767 radeonsi: set all 16 viewport Z bounds for GL 4.1
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 08775a2196)
2015-09-06 18:32:09 +01:00
Marek Olšák
1aea7812b0 radeonsi: fix a Unigine Heaven hang when drirc is missing
Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 9b510a9652)
2015-09-06 18:31:12 +01:00
Chris Wilson
f0180a37d7 i965: Prevent coordinate overflow in intel_emit_linear_blit
Fixes regression from
commit 8c17d53823
Author: Kenneth Graunke <kenneth@whitecape.org>
Date:   Wed Apr 15 03:04:33 2015 -0700

    i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.

which adjusted the coordinates to be relative to the nearest cacheline.
However, this then offsets the coordinates by up to 63 and this may then
cause them to overflow the BLT limits. For the well aligned large
transfer case, we can use 32bpp pixels and so reduce the coordinates by
4 (versus the current 8bpp pixels). We also have to be more careful
doing the last line just in case it may exceed the coordinate limit.

Reported-and-tested-by: kaillasse91@hotmail.fr
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90734
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
(cherry picked from commit d38a560106)
2015-09-06 18:30:25 +01:00
Dave Airlie
fe77d714f2 r600g: fix calculation for gpr allocation
I've been chasing a geom shader hang on rv635 since I wrote
r600 geom code, and finally I hacked some values from fglrx
in and I could run texelfetch without failures.

This is totally my fault as well, maths fail 101.

This makes geom shaders on r600 not fail heavily.

Cc: "10.6" "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0de53ccc8c)
2015-09-06 18:29:28 +01:00
Dave Airlie
fb119b2260 r600/sb: update last_cf for finalize if.
As Glenn did for finalize_loop we need to update_cf when we
add a POP at the end of a shader.

I think this fixes one of the earlier shader going off end
of memory problems we've stopped.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.6" "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3063913f77)
2015-09-06 18:28:33 +01:00
Alexander von Gluck IV
50306a33b4 egl: scons: fix the haiku build, do not build the dri2 backend
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 5abbd1cacc)
Fixes: 78674631a2d(egl: remove the non-haiku scons build)
2015-09-01 14:38:31 +01:00
Rob Clark
cf007af859 freedreno/a4xx: formats update
Fixes glamor, which wants to use R8 integer textures.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
(cherry picked from commit 000e225360)
2015-09-01 14:36:08 +01:00
Rob Clark
7d576419b2 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
(cherry picked from commit afb6c24a20)
2015-09-01 14:35:56 +01:00
Dave Airlie
893caebf44 r600: move prim convert from geom shader to function.
This should avoid C++ fail including this header.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 03b7ec8778)
Fixes: 6941883175 (r600: port si_conv_prim_to_gs_out from radeonsi)
Nominated-by: Marek Olšák <marek.olsak@amd.com>
2015-09-01 14:35:21 +01:00
Emil Velikov
3f8d44210c Update version to 11.0.0-rc2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-31 13:40:19 +01:00
Marek Olšák
579ca506ae gallium/radeon: fix the ADDRESS_HI mask for EVENT_WRITE CIK packets
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 437cb1e3f4)
2015-08-31 13:16:23 +01:00
Ilia Mirkin
94205d0aa2 freedreno/a3xx: add basic clip plane support
The hardware is capable of dealing with GL1-style user clip planes.
No clip vertex, no clip distances. Fixes a number of ucp tests, as well
as neverball.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 58e24b4761)
2015-08-31 13:16:23 +01:00
Dave Airlie
1b40221850 r600: port si_conv_prim_to_gs_out from radeonsi
This code was broken by the tess merge, and I totally missed it
until now. I'm not sure this fixes anything but it stops the assert.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 6941883175)
2015-08-31 13:16:23 +01:00
Dave Airlie
2fe87a1b68 gallium/util: fix debug_get_flags_option on 32-bit
On 32-bit we need to use PRIu64 flags for printfs,
otherwise this segfaults in R600_DEBUG=help otherwise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8d6d0cc17d)
2015-08-31 13:16:23 +01:00
Daniel Scharrer
b83b452eea mesa: add missing queries for ARB_direct_state_access
This adds index queries (glGet*i_v) for GL_TEXTURE_BINDING_* and
GL_SAMPLER_BINDING, as well as textue queries
(glGetTex{,ture}Parameter*) for GL_TEXTURE_TARGET.

CC: "10.6 11.0" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
(cherry picked from commit 5aaaaebf22)
2015-08-31 13:16:23 +01:00
Glenn Kennard
68bd2ddda0 r600g/sb: Don't crash on empty if jump target
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 608c7b4a63)
2015-08-31 13:16:22 +01:00
Glenn Kennard
9db5c2ca2e r600g/sb: Don't read junk after EOP
Shaders that contain instruction data after an instruction with EOP could end
up parsing that as an instruction, leading to various crashes and asserts in
SB as it gets very confused if it sees for instance a loop start instruction
jumping off to some random point.

Add a couple of asserts, and print EOP bit if set in old asm printer.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a830225adb)
2015-08-31 13:16:22 +01:00
Glenn Kennard
08c41221d7 r600g/sb: Handle undef in read port tracker
e8e443 missed adding check for undef values also in
unreserve function, leading to an assert triggering.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 36f1999a87)
2015-08-31 13:16:22 +01:00
Ilia Mirkin
896ef5cb95 mesa: only copy the requested teximage faces
Cube maps are special in that they have separate teximages for each
face. We handled that by copying the data to them separately, but in
case zoffset != 0 or depth != 6 we would read off the end of the client
array or modify the wrong images.

zoffset/depth have already been verified by the time the code gets to
this stage, so no need to double-check.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 2259b11100)
2015-08-31 13:16:22 +01:00
Jason Ekstrand
594388e577 i965/fs: Split VGRFs after lowering pull constants
The split_virtual_grfs code doesn't properly rewrite reladdr so we need to
make sure that any uniform indirects are lowered away first.

This fixes the glsl-fs-uniform-indexed-by-swizzled-vec4.shader_test in piglit

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit fee0c5af11)

Conflicts:
	src/mesa/drivers/dri/i965/brw_fs.cpp
2015-08-31 13:16:05 +01:00
Marek Olšák
812f2855dd mesa: create multisample fallback textures like normal textures
This works if drivers upsample on upload (like all radeon ones do).
The alternative is an unexpected GL error from anything calling
_mesa_update_state and possibly other issues.

Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f432ae899f)
2015-08-31 13:09:37 +01:00
Dave Airlie
5d8ce45d90 mesa/texgetimage: fix missing stencil check
GetTexImage can read to stencil8 but only from
a stencil or depthstencil textures.

This fixes a bunch of failures in CTS
GL33-CTS.gtf32.GL3Tests.packed_pixels

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit c1452983b4)
2015-08-31 13:09:36 +01:00
Dave Airlie
33b0f6e5e1 mesa: enable texture stencil8 for multisample
This fixes GL45-CTS.gtf44.GL31Tests.texture_stencil8.texture_stencil8_gl44
from the ogl conform suite.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 529acab22a)
2015-08-31 13:09:36 +01:00
Chris Wilson
6659fba2c0 i965: Always re-emit the pipeline select during invariant state emission
On the older platforms where we don't have logical contexts preserving
state across batches, we emit the invariant state setup on every batch
using the brw_invariant_state atom. This includes the pipeline selection
which is cached with the introduction of

commit 0e0e23ef53
Author: Jordan Justen <jordan.l.justen@intel.com>
Date:   Wed Apr 22 11:43:50 2015 -0700

    i965/state: Emit pipeline select when changing pipelines

However, we do not reset the cache between batches on context-less
platforms resulting in us not setting the pipeline selection and can
cause GPU hangs if a media pipelined was loaded in the meantime (e.g.
mixing mplayer/gstreamer using libva and gnome-shell). A simple solution
is to just forcibly re-emit the pipeline select along with the invariant
state and reset the cache at that point.

Reported-and-tested-by: Tomasz C. <tomaszc@o2.pl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91254
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4e5752e2b7)
2015-08-31 13:09:36 +01:00
Marek Olšák
adae777f24 Revert "radeon/winsys: increase the IB size for VM"
This reverts commit 567394112d.

It regressed performance. It looks like smaller IBs are better, because
the GPU goes idle quicker and there is less waiting for buffers and fences.

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a83c36b5c0)
2015-08-31 13:09:36 +01:00
Ilia Mirkin
0b690e39dc nv50: fix 2d engine blits for 64- and 128-bit formats
This fixes bin/ext_framebuffer_multisample-formats all_samples

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e18c29b031)
2015-08-31 13:09:36 +01:00
Ilia Mirkin
67fc4b417a nv50: account for the int RT0 rule for alpha-to-one/cov
Same as commit 1af0641db but for nvc0. If an integer texture is
bound to RT0, don't do alpha-to-one or alpha-to-coverage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a6ad49cbbd)
2015-08-31 13:09:36 +01:00
Dave Airlie
7a8d2048bc mesa/arb_gpu_shader_fp64: add support for glGetUniformdv
This was missed when I did fp64, I've sent a piglit test to cover
the case as well.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 45971fd0df)
2015-08-31 13:09:36 +01:00
Ilia Mirkin
bf84c85130 nv50,nvc0: disable depth bounds test on blit
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit abbf05cfc2)
2015-08-31 13:09:36 +01:00
Neil Roberts
aab6075613 i965/bdw: Fix 3DSTATE_VF_INSTANCING when the edge flag is used
When the edge flag element is enabled then the elements are slightly
reordered so that the edge flag is always the last one. This was
confusing the code to upload the 3DSTATE_VF_INSTANCING state because
that is uploaded with a separate loop which has an instruction for
each element. The indices used in these instructions weren't taking
into account the reordering so the state would be incorrect.

v2: Use nr_elements instead of brw->vb.nr_enabled so that it will cope
    when gl_VertexID is used.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91292
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit 3a1ab23480)
2015-08-31 13:09:36 +01:00
Neil Roberts
2ef3434328 i965: Swap the order of the vertex ID and edge flag attributes
The edge flag data on Gen6+ is passed through the fixed function hardware as
an extra attribute. According to the PRM it must be the last valid
VERTEX_ELEMENT structure. However if the vertex ID is also used then another
extra element is added to source the VID. This made it so the vertex ID is in
the wrong register in the vertex shader and the edge attribute is no longer in
the last element.

v2: Also implement for BDW+

v3 [by Ben]: Remove 10.5 tag. Too late.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84677
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit fb02b4ec48)
2015-08-31 13:09:36 +01:00
Glenn Kennard
3d58fea2e3 r600g: Fix assert in tgsi_cmp
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=91726

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@gmail.com>
(cherry picked from commit 50932268aa)
2015-08-31 13:09:35 +01:00
Emil Velikov
ab94875352 Update version to 11.0.0-rc1
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 12:59:01 +01:00
Matt Turner
f077632030 Revert SHA1 additions.
The shader-cache isn't finished, so the configure checks are a bit
premature and will only stand to confuse users of Mesa 11.0.

This is a squash of the follow four reverts:

   Revert "Rename sha1.c and sha1.h to mesa-sha1.c and mesa-sha1.h"
   Revert "configure: Add machinery for --enable-shader-cache (and --disable-shader-cache)"
   Revert "sha1: Fix gcry_md_hd_t typo."
   Revert "mesa: Add mesa SHA-1 functions"

Reviewed-by: Carl Worth <cworth@cworth.org>
2015-08-22 12:59:01 +01:00
Boyan Ding
d7bafcafd3 egl/wayland: define set_cloexec_or_close only when mkostemp is not present
Fixes a compiler warning of defined but not used function when
HAVE_MKOSTEMP is defined.

Fixes: eb3e2562a4b(configure.ac: check for mkostemp())
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-22 12:59:01 +01:00
Emil Velikov
ec256eceed mapi: ship ARB_tessellation_shader.xml
Fixes: e2b59a39cbb(mapi: add ARB_tessellation_shader)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 12:59:00 +01:00
Emil Velikov
79da1b262d nouveau: add codegen/unordered_set.h to the tarball
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 12:16:00 +01:00
Emil Velikov
a8f451cd0e winsys/sw/kms-dri: don't attempt to bundle the sconscript
The build/file was removed with an earlier commit while the EXTRA_DIST
was forgotten.

Fixes: 66d77cd71c (scons: don't build the kms-dri winsys)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 11:48:38 +01:00
Emil Velikov
4a21da709b winsys/amdgpu: automake: remove missing headers
The files are not referenced in any other place in whole of
mesa. They are likely remnants of the early development stage.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 11:23:58 +01:00
Emil Velikov
cfbcabe673 automake: build all drivers but vc4 during distcheck
vc4 conflicts with ilo, when build on x86 as it's build for emulation
purposes. In that mode a i965-like symbol is exported by vc4, which
conflicts with the ilo one in the gallium-dri megadriver.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 11:23:58 +01:00
Mauro Rossi
4b5936335b android: enable amdgpu winsys in radeonsi driver
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 11:22:24 +01:00
Mauro Rossi
6aaa814995 android: fix cflags and includes for amdgpu winsys
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 11:22:24 +01:00
Emil Velikov
807b1e5b05 docs: add news item and link release notes for 10.6.5
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-22 11:04:11 +01:00
Emil Velikov
32cd1252b8 docs: add sha256 checksums for 10.6.5
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit fa34225167)
2015-08-22 11:02:09 +01:00
Emil Velikov
fa52cf0ccf docs: add release notes for 10.6.5
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit a43b3dd99b)
2015-08-22 11:02:08 +01:00
Chris Wilson
6817e0f1ce i965: Move control flush into pipelined conditional render
The nv_conditional_render piglits were sporadically failing. Moving
the control flush from the write and placing it just before the read
was sufficient to make the piglits pass a 1000/1000 times. The bspec
says that the flush enable bit "waits until all previous writes of
immediate data from post sync circles are complete before executing the
next command" - the operative word being previous!

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90691
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Neil Roberts <neil@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-22 09:11:18 +01:00
Eric Anholt
eb2776504a vc4: Actually allow math results to allocate into r4.
I switched us to tracking whether the results *could* go to r4, but then
didn't make a separate register class for the class bits that included r4.
Switch the "any" class to actually be "any", and name the "any but r4"
class more appropriately.

total instructions in shared programs: 96798 -> 94680 (-2.19%)
instructions in affected programs:     62736 -> 60618 (-3.38%)
2015-08-21 13:29:26 -07:00
Eric Anholt
89b1b33f44 vc4: Fold the 16-bit integer pack into the instructions generating it.
total instructions in shared programs: 97580 -> 96798 (-0.80%)
instructions in affected programs:     52826 -> 52044 (-1.48%)
2015-08-21 13:29:26 -07:00
Eric Anholt
7e0b868cf3 vc4: Reuse QPU dumping for packing bits in QIR. 2015-08-21 13:29:26 -07:00
Eric Anholt
4ae137534a vc4: Make _dest variants of qir ALU helpers to provide an explicit dest. 2015-08-21 13:29:26 -07:00
Eric Anholt
2002438c91 vc4: Use the SSA defs list for figuring out eligible MOVs for copy prop.
I thought I'd converted this over previously.  It was copy propagating
MOVs badly with the new destination packing flags.
2015-08-21 13:29:26 -07:00
Krzysztof Sobiecki
20746c2e7d st/nine: Always use user constant buffers
We had several reports of users hitting bugs
with the other path to upload constants,
and switching to the user constant buffer
path solves the bugs.

User constant buffers are expected to be slower
for Nvidia cards, so ideally this patch should be
reverted when the path is fixed.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Krzysztof Sobiecki <sobkas@gmail.com>
2015-08-21 22:21:48 +02:00
Axel Davy
f57e9c77e3 st/nine: Silent warning in nine_ff
release build was complaining

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
3cc205bbeb st/nine: Silent warning in sm1_declusage_to_tgsi
release build was complaining

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
d48cab9fa6 st/nine: Silent warning in NineCubeTexture9_ctor
The compiler was complaining the value may be uninitialised
when it is used (which is wrong). Initialize to NULL to silent
the warning.
2015-08-21 22:21:48 +02:00
Axel Davy
2f02d5e814 st/nine: Silent warning in update_vertex_buffer
There was an unused variable
2015-08-21 22:21:48 +02:00
Axel Davy
719f124620 st/nine: Catch setting the same shader
This is quite rare that an app does set again
the same shaders, but it isn't an expensive check
either.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
eba3c390a3 st/nine: Avoid Constant upload when there is no change
It is very common for d3d9 apps to set again the constants
they need before every draw call, even if nothing changed.

Since we are mostly gpu bound, it is better to check
for change, and upload constants again (and thus use
gpu bandwith) only if the constants changed.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
1a747094ed st/nine: Fix the number of texture stages
The number of texture stages is 8.

'tex_stage' array was too big, and thus
the checks with 'Elements(state->ff.tex_stage)' were passing,
causing some invalid API calls to pass, and crash because of
out of bounds write since bumpmap_vars was just the correct size.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
f15ff98e2c st/nine: Use CSO cache for sampler views
The CSO cache unbinds views that are not needed anymore,
which we don't do.
It checks for change before committing the views.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
98f786b270 st/nine: Calculate dummy sampler state only once
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
f5effeb8ea st/nine: Better check shader constant limits
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
bae2c7c154 st/nine: Remove NINED3DRS_ZBIASSCALE
It wasn't giving the expected result.

This fixes some object being transparents
in games like FEAR.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
6379a28aa7 st/nine: Implement special DOTPRODUCT3 behaviour
Taken from wine tests

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
791b794a84 st/nine: Implement ff vertex data passthrough
Fixes Wine tests

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
fb6c76f1ba st/nine: Change nine_state_update order
nine_update_state called every draw call.

This patch attemps to change the order
of the checks to have better control flow

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
4a00e4cdc9 st/nine: Programmable ps D3DTTSS_PROJECTED support
The implementation used Wine tests for conformance

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
b7261528ea st/nine: Complete ff texture transform implementation
Wine tests were used to get it right.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:48 +02:00
Axel Davy
dcb6f764cf st/nine: Change a few advertised caps
There were flags all sm3 cards do advertise,
and we weren't.
Some games can trigger buggy rendering path
if the caps are not what they expect.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
c2480bbab1 st/nine: Advertise Fog flags
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
fcca7ff38a st/nine: Revert to userbuf path when needed
Automatically switch to userbuf path when
we would need to upload fog or bumpmat
constants

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
8f39ffc11e st/nine: Finish Fog implementation
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
69de5d626f st/nine: Rework shader states
Separate state setting and commit
Changes how the shader key is computed

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
854778ea0f st/nine: Remove some useless variables
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:47 +02:00
Axel Davy
cb0816c0f6 st/nine: Fix nine_ff_ps_key padding
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
dd4802c8de st/nine: Begin programmable shader fog support
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
2dd59a2d28 st/nine: Fix fixed function fog support
Previous code had only a subcase of fog working right.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
87ec6b56b2 st/nine: Rework ff constant buffers
Always use a user constant buffer for ff.
It means we have to:
. commit the user constant buffer for ff when we use it
. commit back the non-ff constant buffer when we stop using it

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
993e68fa6a st/nine: Rework constant buffer state handling
We have two paths:
. One that uses a fixed constant buffer, and updates it when needed
. One that uses a user constant buffer, and uploads it when needed.

This patch separates the preparation of the constant buffer
and the commit.

It also removes NineDevice9_RestoreNonCSOState, which was
used to restore all states. Instead the commit of the constant
buffer is moved to nine_state, and the other field settings
moved to other functions where more appropriate.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
a3f0d21da9 st/nine: Rework blend states
Separate state preparation and state commit

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
b06f3ee6f4 st/nine: Improve fallback when driver doesn't support user buffers.
For now the path updated is only used by Amd drivers, but a later
patch will make it used by all drivers. Some drivers like llvmpipe
doesn't support the uploading of constants from user buffers, so improve
the path to work for all drivers

Inspired from the gl state tracker.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
a7ce3cd0d3 st/nine: Avoid useless updates in SetSamplerState
Check for redundant settings

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:47 +02:00
Axel Davy
5a2302b5ec st/nine: Rework rasterizer states
Separate state preparation and state commit

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
71616d0c50 st/nine: Reorder DSA state settings
Separate state preparation and state commit

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
0628553056 st/nine: Reorder nine_state.
Instead of mixing state preparation (filling pipe_****)
and state commit (pipe->set_*****),
begin doing so in two separate functions.

This will allow to implement efficient Stateblocks,
and eventually lead to optimisation where the complete
pipe_*** structure is only partially updated.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:47 +02:00
Axel Davy
99537f68db st/nine: Remove group_mask argument from nine_update_state
It was only used to discriminate update framebuffer vs update
everything. Instead use two functions.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Tiziano Bacocco
360ba5b748 st/nine: Implement TEXBEM,TEXBEML and BEM
Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
620f3e9bfe st/nine: Fix use of uninitialized values
Set all values to 0 after allocation. Found using valgrind.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
248833ff40 st/nine: Prevent possible crash
In case NineBaseTexture9_ctor returns an error
This->surfaces[l] might be NULL.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
bc6c80e547 st/nine: Return correct error codes in NineDevice9_Reset
Allow more than two errors, and return D3DERR_INVALIDCALL
for failed display resolution changes.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
d0a4374e1a st/nine: Fail on D3DUSAGE_DYNAMIC for D3DPOOL_SCRATCH textures
Texture with pool D3DPOOL_SCRATCH and D3DPOOL_MANAGED
cannot be used with flag D3DUSAGE_DYNAMIC.

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Axel Davy
f396cd43ab st/nine: Fix Lock Checks for Compressed textures
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
d0daec1797 st/nine: Impose restrictions on DXTN texture sizes
This is the expected behaviour.

Fixes wine tests.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
48d895aa4b st/nine: Return NULL pointer in lock error cases
Tests showed, that in case of errors, the pBits pointer is set to NULL.
The pBits field isn't set to NULL in case of an already locked object.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
74a77a4c1a st/nine: Fix resource SetPriority/GetPriority
Return 0 for non MANAGED textures and surfaces.
Fixes failing wine d3d9 tests device.c test_resource_priority.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
40a8943f53 st/nine: Clean GetPrivateData
Move the assert to return error codes in the correct order.
Always set the pSizeOfData to the required buffer size.
Fixes failing wine test device.c test_private_data()

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
9ba3f83592 st/nine: Allow lock coordinates outside range
This fixes wine test device.c test_lockrect_invalid()

Mimic WindowsXp behaviour and allow negative values in the rectangle passed.
Add comment to point out behaviour used.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Patrick Rudolph
bb1c2c2aa3 st/nine: Fix GenerateMipSubLevels potential crash
For the case of D3DPOOL_MANAGED textures, This->base.resource can be NULL
at the start of the function. In This case, UploadSelf will take care
of the defining. Assign resource after the UploadSelf call
to prevent NULL pointer exception.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:46 +02:00
Axel Davy
3bcab9ba75 st/nine: Fix FillColor Flag check
IT is better check if the surface was created with RT flag,
instead of checking capability (llvmpipe was complaining)

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
ef8ade6f09 st/nine: Fix StretchRect checks
Fixes Wine tests

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
c57f777b09 st/nine: Implement EvictManagedResources
EvictManagedResources is used by apps to free
the gpu memory of MANAGED textures (which have
a cpu memory backing)

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
4c126f0b58 st/nine: Track managed textures
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
41f54040e2 st/nine: Only update dirty rect for UpdateTexture
UpdateTexture is supposed to optimise by uploading only for the
dirty region of the source (d3d9 doc, wine tests).
This patch adds the behaviour for surfaces, but not entirely for
volumes.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
43d5c5a11b st/nine: Textures start dirty
According to the spec all textures start
dirty.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
e139e0debd st/nine: Track dirty region for SYSTEMMEM too
Dirty regions should be tracked for both MANAGED
and SYSTEMMEM.
Until now we didn't bother to track for SYSTEMMEM,
because we hadn't implemented using the dirty region
to avoid some copies

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
8a61894cdb st/nine: Add missing BASETEX_REGISTER_UPDATE calls
If the texture is bound and dirty_mip is true,
BASETEX_REGISTER_UPDATE adds the texture to the list
of things to update before the next draw call.

Some calls to it were missing.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
e4f69bc394 st/nine: SetAutoGenFilterType should regenerate the sublevels
It should regenerate the sublevels according to the spec

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
b75f830166 st/nine: Simplify NineVolume9_CopyVolume
We had only one usage for this function.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:46 +02:00
Axel Davy
bc42c29013 st/nine: Split NineSurface9_CopySurface
NineSurface9_CopySurface was supporting more cases than what
we needed, and doing checks that were innapropriate for
some NineSurface9_CopySurface use cases.

This patch splits it into two for the two use cases, and moves
the checks to the caller.

This patch also adds a few checks to NineDevice9_UpdateSurface

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:45 +02:00
Axel Davy
3f36ad732c st/nine: Simplify Volume9 dirty region tracking
Similar to what was done for Surface9, track the dirty region
only in VolumeTexture9.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:45 +02:00
Marek Olšák
ab0643225e util/u_blitter: implement alpha blending for pipe->blit 2015-08-21 22:21:45 +02:00
Christoph Bumiller
23da32a923 gallium: Add blending to pipe blit
This type of blending is used for gallium nine software cursor

Signed-off-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:45 +02:00
Axel Davy
a30684712e st/nine: Revert to sw cursor in case of failure to set hw cursor
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:45 +02:00
Axel Davy
df6f1f77cc st/nine: Do not call ID3DPresent_GetCursorPos for sw cursor
For sw cursor we do not tell wine the cursor position (the app
tells us directly). We shouldn't use ID3DPresent_GetCursorPos.

device->cursor.pos already contains the coordinates the app
gave us.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:45 +02:00
Axel Davy
78b304e2f9 st/nine: Force hw cursor for Windowed mode
According to the spec, Windowed mode must
have hw cursor

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:45 +02:00
Axel Davy
1b20eaff67 st/nine: Hide hardware cursor when we don't use it
We have either hardware cursor or software cursor.
When we use software cursor, we should hide the hardware
cursor.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:45 +02:00
Axel Davy
3470878383 st/nine: fix D3DRS_DITHERENABLE wrong state group
D3DRS_DITHERENABLE was assigned to the rasterizer state
group, but it was used for the blend group.

Assign it to the blend group.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:45 +02:00
Patrick Rudolph
1b645df2f3 st/nine: Account POINTSIZE_MIN and POINTSIZE_MAX for point size
When using D3DRS_POINTSIZE make sure the value is at least
D3DRS_POINTSIZE_MIN but not greater than D3DRS_POINTSIZE_MAX.

Fixes some Wine tests.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:45 +02:00
Patrick Rudolph
886227d363 st/nine: Align texture memory
Align texture memory on 32 byte boundry to allow
SSE/AVX memcpy to work on locked rects.

This fixes some crashes with games using SSE.

Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:45 +02:00
Axel Davy
3c4864fa55 st/nine: Always set point_quad_rasterization to 1
Both Points and Point Sprites are rasterized like quads,
according to d3d9 doc and gallium rasterizer doc.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-08-21 22:21:45 +02:00
Axel Davy
74de849bd4 st/nine: Fix Swizzle for ATI2 format
We had red and green in the wrong channels
for the ATI2 format (RGTC2).

Found thanks to wine tests.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: David Heidelberg <david@ixit.cz>
2015-08-21 22:21:45 +02:00
Patrick Rudolph
cb2d680232 target/d3dadapter9: Return Windows like card names
Add support for multiple cards and fill in Win
like card name, driver name and version info.
Use fallback for unknown vendors and unknown card names.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
2015-08-21 22:21:45 +02:00
David Heidelberg
56717c0b06 st/nine: Require gcc >= 4.6
Nine code uses some C11 features, and this
leads to compile error on gcc <= 4.5

Another way would have been to use the
-fms-extensions CFLAG

Signed-off-by: David Heidelberg <david@ixit.cz>
Cc: "10.4 10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-08-21 22:21:45 +02:00
Ilia Mirkin
365d631eb2 glsl: fix error message when validating tcs output decls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-21 15:20:23 -04:00
Rob Clark
3b4d03d440 relnote updates
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-21 11:59:07 -04:00
Ilia Mirkin
3525aa1dc9 st/mesa: pass through 4th opcode argument in bitmap/pixel visitors
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-21 11:44:13 -04:00
Ilia Mirkin
681efdf7a1 st/mesa: fix assignments with 4-operand arguments (i.e. BFI)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-21 11:43:58 -04:00
Martin Peres
f142e64b29 i965: allow image_size on float images
This got missed because the piglit test only tested int images to avoid a
combinatiorial explosion of format, targets, stages and sizes which
takes more than 5 minutes to test on nvidia's driver.

This patch also drops the IMAGE_FUNCTION_AVAIL_ATOMIC which is not applicable
to the image_size codepath but was not hurting in any way.

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-21 17:48:14 +03:00
Zoltan Gilian
df5cdec132 clover: fix llvm 3.5 build error
There is no MDOperand in llvm 3.5.

v2: Check if kernel metadata is present to avoid crash (EdB).
v3: Second attempt to avoid crash: switch off metadata query for llvm < 3.6.

Reviewed-by: Serge Martin (EdB) <edb+mesa@sigluy.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-21 14:18:10 +03:00
Tapani Pälli
7eda897bf0 mesa: update fbo state in glTexStorage
We have to re-validate FBOs rendering to the texture like is done
with TexImage and CopyTexImage.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91673
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-08-21 11:22:28 +03:00
Eric Anholt
8cae9f2fda vc4: Add algebraic opt for rcp(1.0).
We're generating rcps as part of backend lowering of the packed coordinate
in the CS, and we don't want to lower them in NIR because of the extra
newton-raphson steps in the common case.  However, GLB2.7 is moving a
vertex attribute with a 1.0 W component to the position, and that makes us
produce some silly RCPs.

total instructions in shared programs: 97590 -> 97580 (-0.01%)
instructions in affected programs:     74 -> 64 (-13.51%)
2015-08-20 23:43:04 -07:00
Eric Anholt
c800fef2e2 vc4: Allow unpack_8[abcd]_f's src to stay in r4.
I had QPU emit code to do it, but forgot to flag the register class.

total instructions in shared programs: 97974 -> 97590 (-0.39%)
instructions in affected programs:     25291 -> 24907 (-1.52%)
2015-08-20 23:43:04 -07:00
Eric Anholt
8b36d107fd vc4: Pack the unorm-packing bits into a src MUL instruction when possible.
Now that we do non-SSA QIR instructions, we can take a NIR SSA src that's
only used by the unorm packing and just stuff the pack bits into it.

total instructions in shared programs: 98136 -> 97974 (-0.17%)
instructions in affected programs:     4149 -> 3987 (-3.90%)
2015-08-20 23:43:04 -07:00
Eric Anholt
572a48366d vc4: Add a QIR helper for whether the op is a MUL type. 2015-08-20 23:42:59 -07:00
Eric Anholt
fd74da11c4 vc4: Drop an unused algebraic op.
NIR now handles this optimization for us.
2015-08-20 23:42:53 -07:00
Eric Anholt
98728ce071 vc4: Switch QPU_PACK_SCALED to be two non-SSA instructions.
total instructions in shared programs: 98159 -> 98136 (-0.02%)
instructions in affected programs:     12279 -> 12256 (-0.19%)
2015-08-20 23:42:45 -07:00
Eric Anholt
69ef08d303 vc4: Make the pack-to-unorm instructions be non-SSA.
This helps ensure that the register allocator doesn't force the later pack
operations to insert extra MOVs.

total instructions in shared programs: 98170 -> 98159 (-0.01%)
instructions in affected programs:     2134 -> 2123 (-0.52%)
2015-08-20 23:42:17 -07:00
Eric Anholt
0bba4fa070 vc4: Allow QIR registers to be non-SSA.
Now that we have NIR, most of the optimization we still need to do is
peepholes on instruction selection rather than general dataflow
operations.  This means we want to be able to have QIR be a lot closer to
the actual QPU instructions, just with virtual registers.  Allowing
multiple instructions writing the same register opens up a lot of
possibilities.
2015-08-20 23:40:22 -07:00
Eric Anholt
ceb1a31842 vc4: We can now move TEX_RESULT accesses across other r4 ops.
No difference on shader-db.
2015-08-20 23:40:16 -07:00
Timothy Arceri
ad89748541 glsl: fix binding validation for interface blocks
V2: rebase on SSBO changes

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-21 15:58:24 +10:00
Timothy Arceri
dd6a6dbaf7 glsl: interleave constant propagation and folding
The constant folding pass can take a long time to complete
so rather than running through the entire pass each time
a new constant is propagated (and vice versa) interleave them.

This change helps ES31-CTS.arrays_of_arrays.InteractionFunctionCalls1
go from around 2 min -> 23 sec.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-21 15:03:22 +10:00
Ilia Mirkin
8483577f6b nv50/ir: pre-compute BFE arg when both bits and offset are imm
Due to a quirk in how the nv50 opt passes run, the algebraic
optimization that looks for these BFE's happens before the constant
folding pass. Rearranging these passes isn't a great idea, but this is
easy enough to fix. Allows a following cvt to eliminate the bfe in
certain situations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 22:16:46 -04:00
Ilia Mirkin
ecebd3dbfc glsl: expose textureQueryLod in GLSL 4.00+ fragment shaders
See issue from the ARB_texture_query_lod spec for LOD vs Lod confusion:

    (3) The core specification uses the "Lod" spelling, not "LOD".  Should
        this extension be modified to use "Lod"?

      RESOLVED: The "Lod" spelling is the correct spelling for the core
      specification and the preferred spelling for use. However, use of
      "LOD" also exists, as the extension predated the core specification,
      so this extension won't remove use of "LOD".

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-20 21:05:19 -04:00
Nanley Chery
29e953b07b Revert "mesa/formats: refactor by collapsing cases in switch statement by type"
This reverts commit ffe6c6ad5f.

_mesa_format_num_components() does not include the padding bits in mesa formats
containing 'X' channels. This could cause mipmap generation for certain
uncompressed formats to underestimate the number of channels in the source
image by 1.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
2015-08-20 18:06:47 -07:00
Glenn Kennard
4237dfb978 r600g: Fix handling of TGSI_OPCODE_ARR with SB
FLT_TO_INT goes in the vector pipes on evergreen/NI,
not the trans unit as on earlier chips.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-08-21 09:46:13 +10:00
Edward O'Callaghan
7a32652231 r600: Turn 'r600_shader_key' struct into union
This struct was getting a bit crowded, following the lead of
radeonsi, mirror the idea of having sub-structures for each
shader type. Turning 'r600_shader_key' into an union saves
some trivial memory and CPU cycles for the shader keys.

[airlied: drop as_ls, and reorder so larger fields at start.]
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-08-21 09:46:13 +10:00
Edward O'Callaghan
e2145de74d r600: Rewrite r600_shader_selector_key() to use a switch stmt
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-08-21 09:46:13 +10:00
Jason Ekstrand
bbf8291bf8 i965: Use NIR by default for vertex shaders
Shader-db results for vec4 on i965:

   total instructions in shared programs: 1499894 -> 1502261 (0.16%)
   instructions in affected programs:     1414224 -> 1416591 (0.17%)
   helped:                                2434
   HURT:                                  10543
   GAINED:                                1
   LOST:                                  0

Shader-db results for vec4 on g4x:

   total instructions in shared programs: 1437411 -> 1439779 (0.16%)
   instructions in affected programs:     1362402 -> 1364770 (0.17%)
   helped:                                2434
   HURT:                                  10544
   GAINED:                                0
   LOST:                                  0

Shader-db results for vec4 on Iron Lake:

   total instructions in shared programs: 1437214 -> 1439593 (0.17%)
   instructions in affected programs:     1362205 -> 1364584 (0.17%)
   helped:                                2433
   HURT:                                  10544
   GAINED:                                1
   LOST:                                  0

Shader-db results for vec4 on Sandy Bridge:

   total instructions in shared programs: 2022092 -> 1941570 (-3.98%)
   instructions in affected programs:     1886838 -> 1806316 (-4.27%)
   helped:                                7510
   HURT:                                  10737
   GAINED:                                0
   LOST:                                  0

Shader-db results for vec4 on Ivy Bridge:

   total instructions in shared programs: 1853749 -> 1804960 (-2.63%)
   instructions in affected programs:     1686736 -> 1637947 (-2.89%)
   helped:                                6735
   HURT:                                  11101
   GAINED:                                0
   LOST:                                  0

Shader-db results for vec4 on Haswell:

   total instructions in shared programs: 1853749 -> 1804960 (-2.63%)
   instructions in affected programs:     1686736 -> 1637947 (-2.89%)
   helped:                                6735
   HURT:                                  11101
   GAINED:                                0
   LOST:                                  0

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-08-20 16:34:31 -07:00
Kai Wasserbäch
6921f170b6 glsl: check if return_deref in lower_subroutine_visitor::visit_leave isn't NULL
Fixes a crash in Piglit's
spec@arb_shader_subroutine@linker@no-mutual-recursion.vert for me.

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-08-21 09:23:52 +10:00
Tobias Klausmann
3e6adbd761 nv50/ir: Handle OP_CVT when folding constant expressions
[imirkin: handle more type combinations, use macro]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 17:58:30 -04:00
Ilia Mirkin
f5b926183d nvc0/ir: undo more shifts still by allowing a pre-SHL to occur
This happens with unpackSnorm lowering. There's yet another
bitfield-extract behind it, but there's too much variation to be worth
cutting through.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 17:58:30 -04:00
Ilia Mirkin
9ebe7dc094 nvc0/ir: don't require AND when the high byte is being addressed
unpackUnorm* lowering doesn't AND the high byte/word as it's
unnecessary. Detect that situation as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 17:58:30 -04:00
Ilia Mirkin
63cb85e567 nvc0/ir: detect i2f/i2i which operate on specific bytes/words
Some Unigine shaders have been observed to unpack bytes out of 32-bit
integers and convert them to floats. I2F/I2I can handle this sort of
thing directly. Detect the handleable situations.

This misses 16-bit word capabilities in nv50, but I haven't seen shaders
that would actually make use of that.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 17:58:30 -04:00
Ilia Mirkin
51499bb5ff nvc0/ir: detect AND/SHR pairs and convert into EXTBF
Some shaders appear to extract bits using shift/and combos. Detect
(some) of those and convert to EXTBF instead.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 17:58:30 -04:00
Chih-Wei Huang
2a4af36517 nv50/ir: support different unordered_set implementations
If build with C++11 standard, use std::unordered_set.

Otherwise if build on old Android version with stlport,
use std::tr1::unordered_set with a wrapper class.

Otherwise use std::tr1::unordered_set.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-20 17:58:30 -04:00
Martin Peres
56ebd3314b i965: Fix "handle nir_intrinsic_image_size"
I pushed a half-baked version of "i965: handle nir_intrinsic_image_size" by
accident. Not having the Reviewed-by: tags on the last two commits should
have been a red flag but I somehow missed it after the QA check.

This patch should fix image-size for non-int images. I will add support to
the piglit test for all the other image types.

Sorry for the noise.

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-20 15:28:21 +03:00
Martin Peres
e5851cff45 i965: enable GL_ARB_shader_image_size
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-08-20 14:08:34 +03:00
Martin Peres
50db9c1db6 i965: handle nir_intrinsic_image_size
v2, Review from Francisco Jerez:
- avoid the camelCase for the booleans
- init the booleans using the sampler type
- force the initialization of all the components of the output register

v3:
- Rename a variable from CubeMapArray to CubeArray to re-use GLSL's name (Ilia)
- Fix some indentation and drop parenthesis (Topi)
- Fix a signed/unsigned comparaison warning

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-08-20 14:07:46 +03:00
Martin Peres
80b1707e26 nir: convert the glsl intrinsic image_size to nir_intrinsic_image_size
v2, review from Francisco Jerez:
 - make the destination variable as large as what the nir instrinsic
   defines (4) instead of the size of the return variable of glsl. This
   is still safe for the already existing code because all the intrinsics
   affected returned the same amount of components as expected by glsl IR.
   In the case of image_size, it is not possible to do so because the
   returned number of component depends on the image type and this case
   is not well handled by nir.

v3:
- Style fix

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-20 14:07:46 +03:00
Martin Peres
58a8689717 glsl: add support for the imageSize builtin
The code is heavily inspired from Francisco Jerez's code supporting the
image_load_store extension.

Backends willing to support this builtin should handle
__intrinsic_image_size.

v2: Based on the review of Ilia Mirkin
- Enable the extension for GLES 3.1
- Fix indentation
- Fix the return type (float to int, number of components for CubeImages)
- Add a warning related to GLES 3.1

v3: Based on the review of Francisco Jerez
- Refactor the code to share both add_image_function and _image with the other
  image-related functions

v4: Based on Topi Pohjolainen's comments
- Do not add parenthesis for the return value

v5: based on Francisco Jerez's comments:
- Fix a few indent issues
- Reduce the size of a condition by testing the dimension and array properties
  instead of enumerating all the formats.

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-20 14:07:46 +03:00
Martin Peres
3d93f65ef2 main: add extension GL_ARB_shader_image_size
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-08-20 14:00:44 +03:00
Francisco Jerez
f6c622f584 docs: Mark GLES 3.1 image load/store as done on i965. 2015-08-20 13:53:42 +03:00
Francisco Jerez
f5070c801c mesa: Add ES31 API tag for the extension table.
I'll mark the OES_shader_image_atomic extension entry with this tag to
make sure that we don't expose it on earlier GLES API versions
accidentally, because according to the extension:

 "OpenGL ES 3.1 and GLSL ES 3.10 are required."

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:29:00 +03:00
Francisco Jerez
6379f5cb2a glsl: Parse the allowed image format qualifiers in GLSL ES 3.1.
This includes the minimum required desktop/ES GLSL version in the
format qualifier table in anticipation of new GLSL versions extending
the set of supported image formats.  According to section 4.4.7 of the
GLSL ES 3.1 spec:

"The format layout qualifier identifiers for image variable
 declarations are:
 [...]
 rgba32f
 rgba16f
 r32f
 rgba8
 rgba8_snorm
 [...]
 rgba32i
 rgba16i
 rgba8i
 r32i
 [...]
 rgba32ui
 rgba16ui
 rgba8ui
 r32ui"

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
e3fb2e1f0e glsl: Recognise image memory qualifiers in GLSL ES 3.1.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
307c382c1b glsl: Define image-related built-in constants required by GLSL ES 3.1.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
a976b7255b glsl: Remove duplicate definition of gl_MaxTess*ImageUniforms built-in constants.
These seem to have been re-added at some point during the
ARB_tessellation_shader implementation work.  AFAICT the second
(correct) definition of each constant would have had no effect because
the symbols were already defined.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
9d0bb6be09 glsl: Accept atomic_uint type in GLSL ES 3.1.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
d589df9401 glsl: Accept supported image types in GLSL ES 3.1.
These are a subset of the image types supported by desktop GL,
excluding 1D, 1D array, rectangle, buffer, cube array, 2D MS and 2D
MS array texture targets.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
6da187f805 glsl: Expose image load and store built-ins in GLSL ES 3.1.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:48 +03:00
Francisco Jerez
76a09c87c1 glsl: Use a separate availability class for image atomic built-ins.
These are not part of unextended GLSL ES 3.1.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:44 +03:00
Francisco Jerez
26b1141a78 glsl: Allow precision qualifiers on general opaque types.
From the GLSL ES 3.1 spec, section 4.7.3:
 "Any floating point, integer, opaque type declaration can have the
  type preceded by one of these precision qualifiers: [...] highp
  [...], mediump [...], lowp [...]."

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:37 +03:00
Francisco Jerez
ee7bf349d8 glsl: Implement GLSL ES restriction on images being either readonly or writeonly.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-20 12:28:27 +03:00
Francisco Jerez
527ae5d428 glsl: Require that all image uniforms have a format qualifier in GLSL ES.
Note that this is slightly more permissive than the spec language
requires: "Any image variable must specify a format layout qualifier."

The GLSL ES spec seems really sketchy regarding format layout
qualifiers on function formal parameters -- On the one hand they are
required, but on the other hand it doesn't provide any syntax to
specify them (see section 6.1.1), they don't participate in parameter
type matching for overload resolution, and are in fact explictly
forbidden ("Layout qualifiers cannot be used on formal function
parameters").  Of course none of the image built-in functions defined
by the spec specify format layout qualifiers (and they probably
couldn't sensibly), to contradict its own requirement.

This probably qualifies for a spec bug, but in the meantime do the
sensible thing and require layout qualifiers on uniforms *only*.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-20 12:26:56 +03:00
Francisco Jerez
241774aa03 glsl: Add support for image binding qualifiers.
Support for binding an image to an image unit explicitly in the shader
source is required by both GLSL 4.2 and GLSL ES 3.1, but not by the
original ARB_shader_image_load_store extension.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-20 12:26:54 +03:00
Francisco Jerez
ebf1196d82 glsl: Forbid non-constant image array indexing in GLSL ES 3.1.
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-20 12:26:54 +03:00
Francisco Jerez
6c161405dc mesa: Refuse to bind image uniforms using glUniform in GLES.
The GLES 3.1 spec removed support for updating the image unit bound to
an image uniform using glUniform1i() calls.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-20 12:26:54 +03:00
Francisco Jerez
86a64dfccf mesa: Refuse to bind a mutable texture object to an image unit in GLES.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-20 12:26:53 +03:00
Francisco Jerez
d70edfcfd5 mesa: Initialize image unit state to different defaults in GLES.
There is no GL_R8 image format in GLES, according to the state table
20.32 of the GLES 3.1 spec the default value should be GL_R32UI.  The
ES31-CTS.shader_image_load_store.basic-api-bind Khronos conformance
test checks that this is the case.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-20 12:26:53 +03:00
Francisco Jerez
3b70f7900b mesa: Reset image unit state to the default values when a bound image is deleted.
The ES31-CTS.shader_image_load_store.basic-api-bind conformance test
expects the whole image unit state to be reset when the bound texture
object is deleted.  The ARB_shader_image_load_store extension is
rather vague regarding what should happen with image unit state other
than the texture object in that case, but the GL 4.2 and GLES 3.1
specifications (section "Automatic Unbinding of Deleted Objects")
explicitly require it to be reset to the default values.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-20 12:26:53 +03:00
Francisco Jerez
10b7cf1a01 mesa: Reject image formats not supported by GLES.
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-20 12:26:53 +03:00
Francisco Jerez
b97d8c95a9 mesa: Don't lose track of the shader image layer originally specified by the user.
The spec requires that all layers of the image starting from the 0-th
are bound to the image unit regardless of the Layer parameter when
Layered is true, so I was setting gl_image_unit::Layer to zero in that
case for the convenience of the driver back-end.  However the
ES31-CTS.shader_image_load_store.basic-api-bind conformance test
checks that the layer value returned by glGetInteger is the same that
was originally specified, regardless of the value of layered.  Rename
Layer to _Layer as is usual for other derived state and keep track of
the original layer value as gl_image_unit::Layer.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-20 12:26:53 +03:00
Francisco Jerez
47e0d5b9b2 mesa: Rename MaxCombinedImageUnitsAndFragmentOutputs to MaxCombinedShaderOutputResources.
The name of both the GLSL built-in variable and the glGetInteger param
with the same value changed in GLSL ES 3.1 and GL 4.5.  Its semantics
also changed slightly, since the limit now also takes into account the
number of SSBs in use.  Switch our internal data structures to the
up-to-date name.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-20 12:26:53 +03:00
Dave Airlie
3547d9855c GL: update glext to svn 31811
This brings in the new ARB extensions.

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-08-20 18:42:03 +10:00
Kenneth Graunke
ab83be590d nir: Use nir_builder in nir_lower_io's get_io_offset().
Much more readable.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-19 19:29:39 -07:00
Kenneth Graunke
ed2afec3fc nir: Pull nir_lower_io's load_op selection into a helper function.
Makes the function a bit smaller.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-19 19:29:22 -07:00
Nanley Chery
ffe6c6ad5f mesa/formats: refactor by collapsing cases in switch statement by type
Combine the adjacent cases which have the same GL type in the switch statemnt.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
2015-08-19 16:40:45 -07:00
Nanley Chery
0872b042b1 mesa/formats: add more MESA_FORMAT_LAYOUTs
Add the classes of compressed formats as layouts. This allows the detection
of compressed formats belonging to a certain category of compressed formats.

v2. simplify layout name construction (Ilia).

Reviewed-by: Chad Versace <chad.versace@intel.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
2015-08-19 16:39:41 -07:00
Marta Lofstedt
2438e2fe32 glsl: Fix up GL_ARB_compute_shader for GLSL ES 3.1
GL_ARB_compute_shader is limited for GLSL version 430.
This enables for GLSL ES version 310.

V2: Updated error string to also include GLSL 3.10

Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-19 13:41:43 +03:00
Marta Lofstedt
3df7856b46 mesa/main: Add GL_IMAGE_FORMAT_COMPATIBILITY_TYPE to glGetTexParameterfv
According to Open GL ES 3.1 specification, section 8.10.2
GL_IMAGE_FORMAT_COMPATIBILITY_TYPE should be supported by
glGetTexParameterfv.

Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-19 13:32:30 +03:00
Marek Olšák
3b1e283d88 radeonsi: fix a typo as_es -> as_ls in a string
Trivial.
2015-08-19 12:04:51 +02:00
Marek Olšák
5fb0180592 winsys/amdgpu: fix the type of memory usage counters
If the 32-bit types overflowed, the driver could submit an IB that uses much
more memory than is available.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-19 12:03:01 +02:00
Marek Olšák
421b809db1 radeonsi: fix indirect indexing of MSAA textures
FMASK wasn't handled correctly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-19 12:03:01 +02:00
Ilia Mirkin
f33a7ab150 st/mesa: add fake ARB_copy_image support in Gallium
This support should be removed in favor of something that actually works
in all the weird cases. However this is simple and is enough to allow
Bioshock Infinite to render properly on nvc0.

Since the functionality is not implemented correctly, the extension will
not appear in the extension string and mesa will still return
INVALID_OPERATION for any glCopyImageSubData calls. In order to make use
of this functionality, run with
MESA_EXTENSION_OVERRIDE=GL_ARB_copy_image

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-19 02:35:38 -04:00
Tapani Pälli
89759381db glsl: enable textureSize and texelFetch on GLSL ES 3.10 with MS samplers
Patch separates array samplers from the texture_multisample check so that we
can enable only [iu]sampler2DMS, [iu]sampler2DMSArray are not supported.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-19 07:26:19 +03:00
Tapani Pälli
6a8e08cb89 mesa: validate size parameters for glTexStorage*Multisample
v2: code cleanup
v3: check only dimensions, samples is checked separately later

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-19 07:25:42 +03:00
Tapani Pälli
a342becc49 mesa: expose dimension check for glTex*Storage functions
This is done so that following patch can use it to verify dimensions
for multisample variants of glTex*Storage.

v2: move function to header, use bool instead GLboolean
v3: small changes, cleanup

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-19 07:25:09 +03:00
Roland Scheidegger
2b40a144b7 util/ra: (trivial) fix c99 loop variable initialization
Fails with old msvc otherwise.
2015-08-19 04:17:49 +02:00
Roland Scheidegger
3f797ef0c0 util: (trivial) include c99_math.h in rounding.h
Needed for rint/rintf.
2015-08-19 04:17:36 +02:00
Neil Roberts
c03247bae0 i965/bdw: Fix setting the instancing state for the SGVS element
When gl_VertexID or gl_InstanceID is used a 3DSTATE_VF_SGVS
instruction is sent to create a sort of element to store the generated
values. The last instruction in this chunk of code looks like it was
trying to set the instancing state for the element using the
3DSTATE_VF_INSTANCING instruction. However it was sending
brw->vb.nr_buffers instead of the element index. This instruction is
supposed to take an element index and that is how it is used further
down in the function so the previous code looks wrong. Perhaps
previously the number of buffers coincidentally matched the number of
enabled elements so the value was generally correct anyway. In a
subsequent patch I want to change a bit how it chooses the SGVS
element index so this needs to be fixed.

v2 [by Ben]
Remove stable 10.5 stable tag (it's too late now)
Commit update as follows:
The number of vertex buffers emitted is always <= the number of vertex elements.
To maximize reuse (actually, to minimize relocations - according to the code
comments), a vertex buffer is only emitted once, even when we setup multiple
components (3DSTATE_VERTEX_ELEMENT) from that buffer. This meant that the
previous code would use the wrong indexed element for these reuse cases. This
patch by itself prevents hangs on BSW in the linked bug. It doesn't make the
test pass, the remaining patches are needed for that.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91610
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
2015-08-18 18:28:09 -07:00
Jason Ekstrand
f01bdb0484 util/ra: Make allocating conflict lists optional
Since i965 is now using make_reg_conflicts_transitive and doesn't need
q-value computations, they are disabled on i965.  They are enabled
everywhere else so that they get the old behavior.  This reduces the time
spent in eglInitialize() on BDW by around 10-15%.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-18 17:48:53 -07:00
Jason Ekstrand
c3b21f2d56 i965/reg_allocate: Use make_reg_conflicts_transitive
Instead of adding transitive conflicts as we go, we now add regular
conflicts and them make them all transitive at the end.  This reduces
screen creation time substantially on BDW.  The time spent in eglInitialize
is reduced from 27.78 ms/call to 9.92 ms/call in debug mode and from 13.15
ms/call to 4.54 ms/call in release mode (about 65% in either case).

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-18 17:48:47 -07:00
Jason Ekstrand
9b49284c22 util/ra: Add a function for making all conflicts on a register transitive
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-18 17:48:45 -07:00
Jason Ekstrand
7c8e53f1be util/bitset: Add a BITSET_FOREACH_SET macro
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-18 17:48:28 -07:00
Eric Anholt
6ff3341fc7 mesa: Move varying slots and FS output names to shader_enums.h
They're used by glsl_to_nir.cpp, and I want to use them in TGSI-to-NIR as
well (our use of the var->index slot to store slot properties no longer
works since it got truncated).

The *_MAX defines are left in mtypes.h, because they depend on config.h.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-18 17:40:21 -07:00
Timothy Arceri
fdacadc87c mesa: undo split out of create shader code
This code was split out into a separate function to be used also
by GL_EXT_separate_shader_objects which has since been removed from
Mesa, so move it back.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-19 10:38:56 +10:00
Rob Clark
4a0bea3863 freedreno: use fd_pipe_wait_timeout()
To properly support the case of waiting on a fence with a 0 timeout, we
still need to call down to the kernel.  Which requires the use of the
new fd_pipe_wait_timeout() API.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-18 15:36:30 -04:00
Rob Clark
fd7a14f8dd freedreno: fence fix
Don't take current timestamp/fence from current ring, as we might have
already rolled over to new rb.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-18 15:36:30 -04:00
Neil Roberts
885762e182 Add mesa.icd to the .gitignore
Since 4d7e0fa8c7 this file is generated by the configure script.
Reviewed-by: Tapani Palli <tapani.palli@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-08-18 12:12:15 -07:00
Richard Yao
ec6af4f54c drirc: Add "Unigine Oil Rush" quirk (allow_glsl_extension_directive_midshader).
Appears to fix shader compilation. Tested by starting the client and observing
that the screen was correct after the trailers ran when previously, it was
blank. Play tested on amd64.

This was suggested by "Kuuchan" on the Steam forums:

https://steamcommunity.com/app/200390/discussions/0/540731690861139279/?insideModal=1#c594820656479479870

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Richard Yao <ryao@gentoo.org>
2015-08-18 11:45:44 -07:00
Thomas Helland
49d0a36bd6 nir: Simplify feq(fneg(a), a)) -> feq(a, 0.0)
The positive and negative value of a float can only
be equal to each other if it is -0.0f and 0.0f.
This is safe for Nan and Inf, as -Nan != Nan, and -Inf != Inf
This gives no changes in my shader-db

Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-18 11:34:44 -07:00
Thomas Helland
a39167d594 nir: Simplify fne(fneg(a), a) -> fne(a, 0.0)
-NaN != NaN, and -Inf != Inf, so this should be safe.
Found while working on my VRP pass.

Shader-db results on my IVB:
total instructions in shared programs: 1698267 -> 1698067 (-0.01%)
instructions in affected programs:     15785 -> 15585 (-1.27%)
helped:                                36
HURT:                                  0
GAINED:                                0
LOST:                                  0

Some shaders was found to have the following pattern in NIR:
vec1 ssa_26 = fneg ssa_21
vec1 ssa_27 = fne ssa_21, ssa_26

Make that:
vec1 ssa_27 = fne ssa_21, 0.0f

This is found in Dota2 and Brutal Legend.
One shader is cut by 8%, from 323 -> 296 instructons in SIMD8

Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
29264d0d0c i965/gen7: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/gen7_sol_state.c: In function 'gen7_upload_3dstate_so_decl_list':
mesa/src/mesa/drivers/dri/i965/gen7_sol_state.c:119:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < linked_xfb_info->NumOutputs; i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
94bdb50c0b i965/gen6: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/gen6_vs_state.c: In function 'gen6_upload_push_constants':
mesa/src/mesa/drivers/dri/i965/gen6_vs_state.c:85:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       for (i = 0; i < prog_data->nr_params; i++) {
                     ^
mesa/src/mesa/drivers/dri/i965/gen6_vs_state.c:92:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   for (i = 0; i < prog_data->nr_params; i++) {
                 ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
1d1056c4e3 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_vs_surface_state.c: In function 'brw_upload_pull_constants':
mesa/src/mesa/drivers/dri/i965/brw_vs_surface_state.c:84:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < prog_data->nr_pull_params; i++) {
                  ^
mesa/src/mesa/drivers/dri/i965/brw_vs_surface_state.c:89:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       for (i = 0; i < ALIGN(prog_data->nr_pull_params, 4) / 4; i++) {
                     ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
30694b3f42 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c: In function 'brw_upload_abo_surfaces':
mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c:961:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < prog->NumAtomicBuffers; i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
5fb58012be i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c: In function 'brw_upload_ubo_surfaces':
mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c:901:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < shader->NumUniformBlocks; i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
6625ca2370 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_tex_layout.c: In function 'brw_miptree_layout_texture_array':
mesa/src/mesa/drivers/dri/i965/brw_tex_layout.c:560:25: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       for (int q = 0; q < mt->level[level].depth; q++) {
                         ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
1512b086d3 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_state_cache.c: In function 'brw_try_upload_using_copy':
mesa/src/mesa/drivers/dri/i965/brw_state_cache.c:216:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < cache->size; i++) {
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
9febec0811 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_primitive_restart.c: In function 'can_cut_index_handle_prims':
mesa/src/mesa/drivers/dri/i965/brw_primitive_restart.c:94:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < nr_prims; i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
5be455281e i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_draw_upload.c: In function 'brw_prepare_vertices':
mesa/src/mesa/drivers/dri/i965/brw_draw_upload.c:434:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = j = 0; i < brw->vb.nr_enabled; i++) {
                      ^
mesa/src/mesa/drivers/dri/i965/brw_draw_upload.c:557:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   for (i = 0; i < nr_uploads; i++) {
                 ^
mesa/src/mesa/drivers/dri/i965/brw_draw_upload.c:569:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < nr_uploads; i++) {
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
82bc45bb08 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_draw.c: In function 'brw_draw_destroy':
mesa/src/mesa/drivers/dri/i965/brw_draw.c:630:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < brw->vb.nr_buffers; i++) {
                  ^
mesa/src/mesa/drivers/dri/i965/brw_draw.c:636:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < brw->vb.nr_enabled; i++) {
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:44 -07:00
Rhys Kidd
4864977e51 mesa/egl: Resolve GCC sign-compare warning.
mesa/src/egl/drivers/dri2/platform_drm.c: In function 'release_buffer':
mesa/src/egl/drivers/dri2/platform_drm.c:73:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
                  ^
mesa/src/egl/drivers/dri2/platform_drm.c: In function 'has_free_buffers':
mesa/src/egl/drivers/dri2/platform_drm.c:87:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
                  ^
mesa/src/egl/drivers/dri2/platform_drm.c: In function 'dri2_drm_destroy_surface':
mesa/src/egl/drivers/dri2/platform_drm.c:199:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
                  ^
mesa/src/egl/drivers/dri2/platform_drm.c: In function 'get_back_bo':
mesa/src/egl/drivers/dri2/platform_drm.c:224:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
                     ^
mesa/src/egl/drivers/dri2/platform_drm.c: In function 'dri2_drm_swap_buffers':
mesa/src/egl/drivers/dri2/platform_drm.c:425:24: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
          for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
                        ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:43 -07:00
Rhys Kidd
1d8c694928 mesa/gbm: Resolve GCC sign-compare warning.
mesa/src/gbm/main/backend.c: In function 'find_backend':
mesa/src/gbm/main/backend.c:70:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(backends); ++i) {
                  ^
mesa/src/gbm/main/backend.c: In function '_gbm_create_device':
mesa/src/gbm/main/backend.c:95:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(backends) && dev == NULL; ++i) {
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:43 -07:00
Rhys Kidd
f5bb5b957a mesa/glx: Resolve GCC sign-compare warning.
mesa/src/glx/dri_common_query_renderer.c: In function 'dri2_convert_glx_query_renderer_attribs':
mesa/src/glx/dri_common_query_renderer.c:61:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(query_renderer_map); i++)
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:43 -07:00
Rhys Kidd
dc7a1effc4 mesa/glx: Resolve GCC sign-compare warning.
mesa/src/glx/dri_common.c: In function 'scalarEqual':
mesa/src/glx/dri_common.c:259:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(attribMap); i++)
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:34:43 -07:00
Rhys Kidd
f4ef8d084c i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/intel_screen.c: In function 'intel_screen_make_configs':
mesa/src/mesa/drivers/dri/i965/intel_screen.c:1222:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
                      ^
mesa/src/mesa/drivers/dri/i965/intel_screen.c:1259:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
                      ^
mesa/src/mesa/drivers/dri/i965/intel_screen.c:1291:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Rhys Kidd
dc2b0b2067 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/intel_fbo.c: In function 'intel_validate_framebuffer':
mesa/src/mesa/drivers/dri/i965/intel_fbo.c:734:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ARRAY_SIZE(fb->Attachment); i++) {
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Rhys Kidd
3637e1e7f6 mesa: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/common/utils.c: In function 'driGetConfigAttrib':
mesa/src/mesa/drivers/dri/common/utils.c:457:19: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     for (i = 0; i < ARRAY_SIZE(attribMap); i++)
                   ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Rhys Kidd
65fe7c6ff1 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/intel_screen.c: In function 'aub_dump_bmp':
mesa/src/mesa/drivers/dri/i965/intel_screen.c:125:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Rhys Kidd
2722284b94 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/intel_fbo.c: In function 'intel_blit_framebuffer_with_blitter':
mesa/src/mesa/drivers/dri/i965/intel_fbo.c:836:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       for (i = 0; i < drawFb->_NumColorDrawBuffers; i++) {
                     ^
V2 (Thomas Helland):
  -Use unsigned instead of GLuint (trivial)

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Rhys Kidd
89b285ba0e i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_wm_state.c: In function 'brw_color_buffer_write_enabled':
mesa/src/mesa/drivers/dri/i965/brw_wm_state.c:53:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) {
                  ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Rhys Kidd
3696e620f5 i965: Resolve GCC sign-compare warning.
mesa/src/mesa/drivers/dri/i965/brw_draw.c: In function 'brw_postdraw_set_buffers_need_resolve':
mesa/src/mesa/drivers/dri/i965/brw_draw.c:390:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
                      ^

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-18 11:27:28 -07:00
Adam Jackson
8f7ebcb6fa glx: Fix __glXWireToEvent for BufferSwapComplete
In the DRI2 path this event is magically synthesized from the
corresponding DRI2 event, but with Present, the server sends us the
event itself. The DRI2 path fills in the serial number, send_event, and
display fields of the XEvent struct that the app sees, but the Present
path did not.

This is likely related to a class of crashes seen in gtk/clutter apps:

https://bugzilla.redhat.com/attachment.cgi?id=1032631

Note that the crashing instruction is looking up the lock_fns slot in
the Display *, and %rdi (holding the Display *) is 0x1.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-18 09:39:46 -04:00
Grazvydas Ignotas
97f5d00648 radeon/uvd: remove unused variables
Recent commits introduced new unused variable warnings, fix them.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-18 14:11:48 +02:00
Marcos Paulo de Souza
df97126731 nouveau: recognize tess stages in nouveau_compiler
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 23:05:00 -04:00
Marcos Paulo de Souza
723a5a2e68 tgsi: fix parsing of tessellation shader inputs/outputs
Tessellation control shaders write to outputs as OUT[ADDR[0].x][0], make
sure to parse the indirect dimension on outputs.

Also tess control inputs/outputs and tess eval input declarations need
to receive the same treatment as geometry shader inputs.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 23:05:00 -04:00
Marcos Paulo de Souza
a37fa7653b tgsi: set implicit array size for tess stages
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 22:50:16 -04:00
Timothy Arceri
46684d3ae3 mesa: move non-generic samples validation
The previous patch replaces the other use case.

V2: remove the validation from it old location.

Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-08-18 07:07:57 +10:00
Timothy Arceri
d3ace603a9 mesa: check samples > 0 for glTex*Multisample
The GL 4.5 spec says its an GL_INVALID_VALUE error if samples equals 0 for
glTexImage*Multisample and an GL_INVALID_VALUE error if samples < 1 for
glTexStorage*Multisample.

The spec says its undefined what happens if glTexImage*Multisample is passed
a samples value < 0 but we currently already produced a GL_INVALID_VALUE error
in this case, this is also consistent with the Nvidia binary.

Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-08-18 07:07:57 +10:00
Matt Turner
2450cbfcbc i965/vec4/nir: Emit single MOV to generate a scalar constant.
If an immediate is written to multiple channels, we can load it in a
single writemasked MOV.

total instructions in shared programs: 6285144 -> 6261991 (-0.37%)
instructions in affected programs:     718991 -> 695838 (-3.22%)
helped:                                5762

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-17 14:10:15 -07:00
Ilia Mirkin
5af71fb5ac freedreno/a3xx: add s3tc texture format support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 11:38:38 -04:00
Ilia Mirkin
581cbfdec1 freedreno/a3xx: fix up logic for handling block formats
This only appears in cubemaps which have have packed layers, so are very
sensitive to any layout disagreement between sw and hw.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 11:38:38 -04:00
Ilia Mirkin
12e1bf0b68 freedreno/a3xx: double the polygon offset value
A few other drivers do this, fixes the gl-1.4-polygon-offset piglit test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 11:38:38 -04:00
Ilia Mirkin
1af0641db3 nvc0: implement the color buffer 0 is integer rule for alpha-to-one/cov
The hardware checks for multisampling being enabled, but does not have
the rule about cbuf0 being an integer format. Only enable
alpha-to-one/alpha-to-coverage if cbuf0 is not an integer format.

Fixes piglits
  ext_framebuffer_multisample-int-draw-buffers-alpha-to-one
  ext_framebuffer_multisample-int-draw-buffers-alpha-to-coverage

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 04:21:18 -04:00
Marta Lofstedt
19a5a91ea4 mesa: Raise INVALID_VALUE from glCreateShaderProgramv if count < 0
According to OpenGL version 4.5 and OpenGL ES 3.1 standards, section 7.3:
GL_INVALID_VALUE should be generated, if count is less than 0.

V2: Changed title, eased Open GL ES 3.1 restriction and added comments.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-17 10:29:07 +03:00
Marta Lofstedt
dd9d2963d6 mesa: AtomicBufferBindings should be initialized to zero.
According to OpenGL specification version 4.5 table 23.46
and OpenGL ES specification version 3.1 table 20.31:
ATOMIC_COUNTER_BUFFER_START and ATOMIC_COUNTER_BUFFER_SIZE
should have the initial value of zero.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
2015-08-17 10:24:26 +03:00
Tapani Pälli
a7e6f8cc9f mesa: fix target error checking in glGetTexLevelParameter
With non-dsa functions we need to do target error checking before
_mesa_get_current_tex_object which would just call _mesa_problem without
raising GL_INVALID_ENUM error. In other places of Mesa, target gets checked
before this call.

Fixes failures in:
   ES31-CTS.texture_storage_multisample.APIGLGetTexLevelParameterifv.*

v2: do the target check also for dsa functions (Timothy)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-17 10:02:52 +03:00
Ilia Mirkin
2f5ee9bf27 gk110/ir: fix sched calculator to consider all registers in the ISA
GK110/GK208 have 256 registers, not 64. Find out the number of registers
from the target to avoid unnecessary iteration for pre-GK110.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 02:46:16 -04:00
Timothy Arceri
e32325fc85 mesa: rename texture function now that its static
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-08-17 15:38:21 +10:00
Tapani Pälli
a0cea8f642 glsl: add missing MS sampler builtin types for GLSL ES 3.10
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-17 08:25:04 +03:00
Marta Lofstedt
f67dde0b05 mesa: Implement glMemoryBarrierByRegion
The function glMemoryBarrierByRegion is part of OpenGL ES 3.1
and OpenGL 4.5 core and compatibility profiles.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-17 08:25:04 +03:00
Ilia Mirkin
ae5cf4f3f7 nvc0: program smooth line width when multisampling is enabled
There are separate line widths for smooth and aliased lines. The smooth
one is selected when multisampling is enabled even if line smoothing
isn't explicitly turned on.

Fixes the ext_framebuffer_multisample-line-smooth piglits

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 01:01:02 -04:00
Ilia Mirkin
884b4df3b6 nvc0: bind a fake tess control program when there isn't one available
Apparently this is necessary in order for tess factors to work in a tess
eval program without a tess control program bound. Probably because it
uses the fake program's shader header to work out the number of patch
constants.

Fixes vs-tes-tessinner-tessouter-inputs

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 01:01:02 -04:00
Ilia Mirkin
f13073b775 gm107/ir: avoid letting the lowering pass get out of sync
There's a lot of functionality duplicated in the gm107 lowering pass
from the nvc0 pass. As that one gets updated, the gm107 one falls
behind. Avoid this by sharing the code.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-17 01:01:02 -04:00
Ilia Mirkin
2514c78fba nv50,nvc0: take level into account when doing eng2d multi-layer blits
This fixes arb_get_texture_sub_image-get, and any situation where the 2d
engine was being used for multi-layer blits to a non-0 level.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-08-17 01:01:02 -04:00
Ilia Mirkin
bb9881fccf st/mesa: also move yoffset to zoffset for 1d array textures
Do the same as in st_TexSubImage. This fixes
arb_get_texture_sub_image-get on llvmpipe when it is set to prefer
blits, and nouveau when it uses the 3d engine for blits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-17 01:00:43 -04:00
Kenneth Graunke
afccbd7256 nir: Add a glsl_uint_type() wrapper.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-16 21:44:19 -07:00
Ilia Mirkin
ca628085b6 freedreno/a3xx: add per-texture seamless cubemap control
The default is to enable seamless cubemap filtering, but there's a bit
to turn it off.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-16 03:01:53 -04:00
Ilia Mirkin
b4ace13eea freedreno/a4xx: add cube map array support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-15 14:05:37 -04:00
Rob Clark
868b66fce7 freedreno/a4xx: fix srgb render targets
Also fixes mipmap level generation for srgb textures.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-15 12:09:06 -04:00
Rob Clark
dd412c8fcb freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-15 12:08:34 -04:00
Vinson Lee
ee113bbbc5 scons: Always define __STDC_LIMIT_MACROS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91591
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-15 01:44:33 -07:00
Ilia Mirkin
d19a98e2e6 freedreno: expose OES exts for float linear filtering
a4xx can do both float and half-float, while a3xx can only do half-float

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-14 20:22:49 -04:00
Ilia Mirkin
d3e23f1ff9 nvc0: disable tessellation on maxwell
The address calculations are all different (e.g. see GP), there appear
to be sync's in programs, and probably a bunch of other differences.
Just disable it for now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-14 16:02:26 -04:00
Eric Anholt
a6e75e3cd7 nir: Add support for CSE on textures.
NIR instruction count results on i965:
total instructions in shared programs: 1261954 -> 1261937 (-0.00%)
instructions in affected programs:     455 -> 438 (-3.74%)

One in yofrankie, two in tropics.  Apparently i965 had also optimized all
of these out anyway.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-14 11:39:18 -07:00
Eric Anholt
fb2425a641 nir: Zero out texture instructions when creating them.
There are so many flags in textures, that the CSE pass would have a hard
time referencing the correct set when figuring out if two texture ops are
the same.  By zeroing, we can avoid that fragility.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-14 11:39:18 -07:00
Eric Anholt
bf3c50fba2 vc4: Move all of our fixed function fragment color handling to NIR.
This massively reduces our dependency on VC4-specific optimization passes.

shader-db:
total uniforms in shared programs: 32077 -> 32067 (-0.03%)
uniforms in affected programs:     149 -> 139 (-6.71%)
total instructions in shared programs: 98208 -> 98182 (-0.03%)
instructions in affected programs:     2154 -> 2128 (-1.21%)
2015-08-14 11:39:18 -07:00
Eric Anholt
38c6c0f5b4 vc4: Add a helper for making driver-specific NIR load_uniform for GL state
In order to move more of our lowering into NIR, we need the ability to
reference various pipeline state (like texture rectangle scaling factors
or blend colors), so we just set those up as a load_uniform with a big
offset to indicate that it's not within the shader's uniform storage and
is one of our state values.
2015-08-14 11:39:18 -07:00
Eric Anholt
d50c182671 nir: Don't try to scalarize unpack ops.
Avoids regressions in vc4 when trying to do our blending in NIR.

v2: Add the other unpack ops I meant to when writing the original commit
    message.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-14 11:39:18 -07:00
Eric Anholt
9e6dc5b64d nir: Add a nir_opt_undef() to handle csels with undef.
We may find a cause to do more undef optimization in the future, but for
now this fixes up things after if flattening.  vc4 was handling this
internally most of the time, but a GLB2.7 shader that did a conditional
discard and assign gl_FragColor in the else was still emitting some extra
code.

total instructions in shared programs: 100809 -> 100795 (-0.01%)
instructions in affected programs:     37 -> 23 (-37.84%)

v2: Use nir_instr_rewrite_src() to update def/use on src[0] (by Thomas
    Helland).
v3: Make sure to flag metadata dirties, and copy the swizzle and abs/neg
    over to src[0], too (by anholt).

Reviewed-by: Thomas Helland <thomashelland90@gmail.com> (v2)
Tested-by: Thomas Helland <thomashelland90@gmail.com> (v2)
2015-08-14 11:39:18 -07:00
Ilia Mirkin
b346a84e27 gm107/ir: indirect handle goes first on maxwell also
Fixes fs-simple-texture-size.shader_test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-08-14 14:11:44 -04:00
Ilia Mirkin
7ff7d5d799 nv30: add depth bounds test support for hw that has it
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-14 13:05:29 -04:00
Ilia Mirkin
a6bf20d153 nv50: add depth bounds test support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-14 13:05:29 -04:00
Ilia Mirkin
d4087265f6 nvc0: add depth bounds test support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-14 13:05:29 -04:00
Marek Olšák
a90aa54fde docs/relnotes: document amdgpu, GL 4.1 and other new features 2015-08-14 15:04:59 +02:00
Marek Olšák
7bfb9ee5ee radeonsi: add all new VI PCI IDs including Fiji 2015-08-14 15:02:31 +02:00
Marek Olšák
f47c59322e radeonsi: revert a wrong DB bug workaround for VI
The bug was misunderstood. Besides that, the bug affects a DB feature we
don't use yet.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-14 15:02:31 +02:00
Boyuan Zhang
839bf82606 radeon/uvd: implement HEVC support
add context buffer to fix H265 uvd decode issue.
fix H265 corruption issue caused by incorrect assigned ref_pic_list.

v2: disable interlace for HEVC
    add CZ sps flag workaround
    fix coding style

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-08-14 15:02:31 +02:00
Leo Liu
0654a9ca17 radeon/vce: disable VCE dual instance for harvest part
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:31 +02:00
Leo Liu
09def7e1e0 radeon/vce: implement VCE dual instance support
VCE dual instances are encoding in parallel, it needs two frames for
encoding with their own parameters in one IB. Master instance will check
the task info to find another frame, assign it to the slave instance

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:31 +02:00
Leo Liu
4dfcf6e3a9 radeon/video: config encode stacked frame number based on HW
since VCE 3.0 with dual instances, we need stack frames for them.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Christian König
42bc4e6be4 radeon/vce: make reloc offset signed
We need a negative offset for FW 50.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
57fabe9f3a radeon/vce: add config task and put task info into encoder v2
The config task has own task ID, extract the configuration functions
into config task.

v2 (chk): calculate offset automatically

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
e91a67abfa radeon/vce: fix VCE fail after rebase
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
fa80c1fe20 radeon/vce: add dual pipe support for VI
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
468fcdcb4f radeon/vce: add new firmware support for VI and CI
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
1550790b3f radeon/vce: implement VCE two pipe support
v2: rebase by Marek

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
22f71dbf79 radeon/uvd: make 30M as minimum for MPEG4 dpb buffer size
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
baecc518c9 radeon/uvd: recalculate dbp buffer size
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
c29f0d4722 radeon/video: add 4K support for decode/encode parameters
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:30 +02:00
Leo Liu
261ed77547 gallium/radeon: add h264 performance HW decoder support
v2: -make tonga use new h264 performance HW decoder;
    -integrate it scaling buffer to msg_fb buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:30 +02:00
Christian König
67586c4b40 gallium/radeon: use VM for VCE
v2: (leo) add checking for driver backend
v3: (leo) change variable name from use_amdgpu to use_vm
v4: rebase by Marek

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:30 +02:00
Christian König
0248c13a8b gallium/radeon: use VM for UVD
v2: (leo) add checking for driver backend
v3: (leo) change variable name from use_amdgpu to use_vm
v4: rebase by Marek

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:30 +02:00
Alex Deucher
767ad50a10 radeonsi: add support for FIJI (v4)
v2: incorporate comments from Marek
v3: add missing fiji case in winsys init
    use tonga raster config (double check this)
v4: rebase on harvest patch

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v3)
Reviewed-by: Christian König <christian.koenig@amd.com> (v3)
Reviewed-by: David Zhang <david1.zhang@amd.com> (v3)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:29 +02:00
Alex Deucher
528a6ff599 winsys/amdgpu: add addrlib support for Fiji (v2)
v2: fix tonga chip check

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:29 +02:00
Alex Deucher
d69686f1d3 radeonsi: add harvest support for CI/VI parts (v3)
Properly calculate the PA_SC_RASTER_CONFIG[_1] settings
for harvest chips.

v2: - fix default raster config settings for CZ and KV
    - Suggestions from Michel
v3: - handle multiple packers properly for CI+
    - GRBM_GFX_INDEX is privileged on VI+

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:29 +02:00
Marek Olšák
933d24b176 gallium/radeon: enable the GPU load query for amdgpu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:29 +02:00
Alex Deucher
f0e24a7bea radeonsi: properly handler raster_config setup on CZ
Need to take into account the number of RBs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:29 +02:00
Alex Deucher
649975e716 radeonsi: properly set the raster_config for KV
This enables the second RB on asics that support it which
should boost performance.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-08-14 15:02:29 +02:00
Marek Olšák
bf2c3422d7 radeonsi: add amdgpu support for querying the GPU reset state
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:29 +02:00
Marek Olšák
2d1952e2a5 radeonsi: add VI hardware support 2015-08-14 15:02:29 +02:00
Marek Olšák
943a4b5e96 radeonsi: add definitions for VI status registers
Useful for debugging hangs with the read-register interface.
I checked that this adds the same register fields as the kernel driver.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:29 +02:00
Marek Olšák
8f49f6ed19 radeonsi: add VI register definitions 2015-08-14 15:02:29 +02:00
Marek Olšák
8ba70e0a74 radeonsi: fix DRM version checks for amdgpu DRM 3.0.0 2015-08-14 15:02:29 +02:00
Marek Olšák
e7fc664b91 winsys/amdgpu: add addrlib - texture addressing and alignment calculator
This is an internal project that Catalyst uses and now open source will do
too.

v2: squashed these commits in:
    - winsys/amdgpu: fix warnings in addrlib
    - winsys/amdgpu: set PIPE_CONFIG and NUM_BANKS in tiling_flags
2015-08-14 15:02:28 +02:00
Marek Olšák
2eb067db0f winsys/amdgpu: add a new winsys for the new kernel driver
v2: - lots of changes according to Emil Velikov's comments
    - implemented radeon_winsys::read_registers

v3: - a lot of new work, many of them adapt to libdrm interface changes
Squashed patches:
winsys/amdgpu: implement radeon_winsys context support
winsys/amdgpu: add reference counting for contexts
winsys/amdgpu: add userptr support
winsys/amdgpu: allocate IBs like normal buffers
winsys/amdgpu: add IBs to the buffer list, adapt to interface changes
winsys/amdgpu: don't use KMS handles as reloc hash keys
winsys/amdgpu: sync buffer accesses to different rings
winsys/amdgpu: use dependencies instead of waiting for last fence v2
gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interface (amdgpu part)
winsys/amdgpu: track fences per ring and be thread-safe
winsys/amdgpu: simplify waiting on a variable in amdgpu_fence_wait
gallium/radeon: allow the winsys to choose the IB size (amdgpu part)
winsys/amdgpu: switch to new amdgpu_cs_query_fence_status interface
winsys/amdgpu: handle fence and dependencies merge
winsys/amdgpu follow libdrm change to move user fence into UMD
winsys/amdgpu: use amdgpu_bo_va_op for va map/unmap v2
winsys/amdgpu: use the new tiling flags
winsys/amdgpu: switch to new GTT_USWC definition
winsys/amdgpu: expose amdgpu_cs_query_reset_state to drivers
winsys/amdgpu: fix valgrind warnings
winsys/amdgpu: don't use VRAM with APUs that don't have much of it
winsys/amdgpu: require LLVM 3.6.1 for VI because of bug fixes there
winsys/amdgpu: remove amdgpu_winsys::num_cpus
winsys/amdgpu: align BO size to page size
winsys/amdgpu: reduce BO cache timeout
winsys/amdgpu: remove useless flushing and waiting in amdgpu_bo_set_tiling
winsys/amdgpu: use amdgpu_device_handle as a unique device ID instead of fd
winsys/amdgpu: use safer access to amdgpu_fence_wait::signalled
winsys/amdgpu: allow maximum IB size of 4 MB
winsys/amdgpu: add ip_instance into amdgpu_fence
gallium/radeon: add RING_COMPUTE instead of RADEON_FLUSH_COMPUTE
winsys/amdgpu: set the ring type at CS initilization
winsys/amdgpu: query the GART page size from the kernel
winsys/amdgpu: correctly wait for shared buffers to become idle
winsys/amdgpu: set the amdgpu_cs_fence structure only once at fence creation
winsys/amdgpu: add a specific error message for cs_submit -> -ENOMEM
winsys/amdgpu: check num_active_ioctls before calling amdgpu_bo_wait_for_idle
winsys/amdgpu: clear user fence BO after allocating it
winsys/amdgpu: fix user fences
winsys/amdgpu: make amdgpu_winsys_create public
winsys/amdgpu: remove thread offloading
winsys/amdgpu: flatten the amdgpu_cs_context structure and simplify more

v4: require libdrm 2.4.63
2015-08-14 15:02:28 +02:00
Christian König
5609a6986f st/vdpau: add HEVC support v2
v2: fix return code

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-08-14 15:02:28 +02:00
Leo Liu
5581f9f28a st/omx/enc: stack frame tasks for the gathering
Put tasks to the FIFO queue for results

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:28 +02:00
Leo Liu
0729c251bb st/omx/enc: flush after eos handling v2
v2 (chk): reorder the flush

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-14 15:02:28 +02:00
Christian König
facba49d83 vl: add HEVC profiles and defines
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-08-14 15:02:28 +02:00
Leo Liu
716a67da12 vl: add cap for stacking frames
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-14 15:02:28 +02:00
Marek Olšák
973988ab8d swrast: fix EXT_depth_bounds_test
zMin and zMax can't use _DepthMaxF, because the test is done in Z32_UNORM.

Probably a useless patch given how popular swrast is nowadays, but it helped
create and validate the piglit test.

v2: add an explicit cast to GLuint

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-08-14 15:02:28 +02:00
Marek Olšák
97f58fb59a radeonsi: add support for EXT_depth_bounds_test
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-14 15:02:27 +02:00
Marek Olšák
36a6f848bb st/mesa: add EXT_depth_bounds_test
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-08-14 15:01:51 +02:00
Marek Olšák
3b7800e750 gallium: add an interface for EXT_depth_bounds_test
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-08-14 15:01:51 +02:00
Marek Olšák
2ebb8efa08 st/mesa: small cleanup in st_extensions.c
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
2015-08-14 15:01:51 +02:00
Marek Olšák
44dc1d307d gallium: add support for GLES texture float extensions (v3)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74329

v2: add a CAP for half floats
    drivers should not expose the CAPs if they don't support the formats

v3: update relnotes

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-14 14:56:54 +02:00
Zoltan Gilian
78493c3318 r600,compute: setup compute sampler states and views
v2: Add compute mode flag to sampler state setup (Marek).
    Drop branches which avoid reference counting (Marek).
    Simplify unset branch condition (Marek).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-14 11:35:34 +02:00
Michel Dänzer
7f4ad692a1 st/clover: Fix build against LLVM 3.8 SVN r244928
raw_svector_ostream::flush() is now unnecessary and forbidden:

  CXX      llvm/libclllvm_la-invocation.lo
../../../../../src/gallium/state_trackers/clover/llvm/invocation.cpp: In function 'clover::module {anonymous}::build_module_llvm(llvm::Module*, unsigned int (&)[7])':
../../../../../src/gallium/state_trackers/clover/llvm/invocation.cpp:574:29: error: use of deleted function 'void llvm::raw_svector_ostream::flush()'
       bitcode_ostream.flush();
                             ^
In file included from /home/daenzer/src/llvm-git/llvm/include/clang/Basic/VirtualFileSystem.h:22:0,
                 from /home/daenzer/src/llvm-git/llvm/include/clang/Basic/FileManager.h:20,
                 from /home/daenzer/src/llvm-git/llvm/include/clang/Basic/SourceManager.h:38,
                 from /home/daenzer/src/llvm-git/llvm/include/clang/Frontend/CompilerInstance.h:16,
                 from ../../../../../src/gallium/state_trackers/clover/llvm/invocation.cpp:25:
/home/daenzer/src/llvm-git/llvm/include/llvm/Support/raw_ostream.h:512:8: note: declared here
   void flush() = delete;
        ^
Makefile:862: recipe for target 'llvm/libclllvm_la-invocation.lo' failed

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-14 18:32:57 +09:00
Tapani Pälli
7a144aaf64 mesa: set correct error for non-renderable multisample textures
v2: same common error on gles31 and desktop OpenGL
    (spotted by Erik Faye-Lund)

Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-14 12:21:01 +03:00
Ben Widawsky
28ed1e08e8 i965/skl: Remove early platform support
We do not want bug reports from this early stepping of SKL. Few if any were ever
shipped outside of Intel to early enabling partners, and none will be sold.

There is a functional change here. If you're using new mesa on an old
kernel/libdrm, the revid will be -1, and we'll use new SKL values instead of
early ones (a hopefully irrelevant improvement IMO).

v2: Remove hunk which warned before dying. Instead, default to normal SKL
support (Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-08-13 16:44:42 -07:00
Frank Binns
d9603be038 egl: improve attribute checking for eglCreateContext
The EGL 1.4 spec states for eglCreateContext:

	"attribute EGL_CONTEXT_CLIENT_VERSION is only valid when the current
	 rendering API is EGL_OPENGL_ES_API"

Additionally, if the EGL_KHR_create_context EGL extension is supported
(this is mandatory in EGL 1.5) then the EGL_CONTEXT_MAJOR_VERSION_KHR,
which is an alias for EGL_CONTEXT_CLIENT_VERSION, and
EGL_CONTEXT_MINOR_VERSION_KHR attributes are also accepted by
eglCreateContext with the extension spec stating:

	"The values for attributes EGL_CONTEXT_MAJOR_VERSION_KHR and
	 EGL_CONTEXT_MINOR_VERSION_KHR specify the requested client API
	 version. They are only meaningful for OpenGL and OpenGL ES
	 contexts, and specifying them for other types of contexts will
	 generate an error."

Add the necessary checks against the extension and rendering APIs when
validating these attributes as part of eglCreateContext.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
[Emil Velikov: Add newline before the spec quote (Matt)]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-13 17:36:06 +01:00
Frank Binns
21b2c6fd5e egl: don't allow eglGetConfigs to set num_configs param to a negative value
When a buffer is provided to eglGetConfigs it's supposed to set the value
of the num_config parameter to the total number of configs that have been
copied into this buffer. For some reason the EGL spec doesn't consider it
to be an error to pass this function a buffer while specifying its size to
be less than 0. Given this, one would expect this combination to result in
the num_config parameter being set to 0 but this wasn't the case. This was
due to the buffer size being copied straight into num_configs without being
clamped to 0.

This was causing the following dEQP EGL test to fail:
dEQP-EGL.functional.query_config.get_configs.get_configs_bounds

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-13 17:36:06 +01:00
Frank Binns
9a4eae61c2 egl/x11: don't abort when creating a DRI2 drawable fails
When calling either eglCreateWindowSurface or eglCreatePixmapSurface it
was possible for an application to be aborted as a result of it failing
to create a DRI2 drawable on the server. This could happen due to an
application passing in an invalid native drawable handle, for example.

v2: Handle the case where an error has been set on the connection

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-13 17:36:06 +01:00
Frank Binns
3b491cbc42 egl/x11: set EGL_BAD_NATIVE_(PIXMAP|WINDOW) for invalid pixmaps/windows
Both eglCreatePixmapSurface and eglCreateWindowSurface were incorrectly
setting the EGL error to be EGL_BAD_ALLOC when an invalid native drawable
handle was being passed in. The EGL spec states the following for
eglCreatePixmapSurface:

	"If pixmap is not a valid native pixmap handle, then an EGL_BAD_-
	 NATIVE_PIXMAP error should be generated."

(eglCreateWindowSurface has similar text)

Correctly set the EGL error value based on xcb_get_geometry_reply returning
an error structure containing something other than BadAlloc.

v2: Check for BadAlloc error and update commit message to reflect this

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-13 17:36:06 +01:00
Frank Binns
2900e8ca90 egl/x11: fix use of EGL_BAD_NATIVE_WINDOW
Commit 4ed23fd590 introduced some calls to _eglError inappropriately
passing it EGL_BAD_NATIVE_WINDOW. This was actually harmless in two of the
cases as _eglError gets called later on with a more appropriate error code
but (just to be safe) switch these to _eglLog calls instead.

The final case is a little trickier as it actually needs to set an error
of which the following are available (according to the EGL spec):
EGL_BAD_MATCH, EGL_BAD_CONFIG, EGL_BAD_NATIVE_(PIXMAP|WINDOW) and
EGL_BAD_ALLOC.

Of these, EGL_BAD_ALLOC seems to be the most appropriate given that
failure can occur either as a result of xcb_get_setup failing due to an
earlier error on the connection (where the most commonly occurring error
code is XCB_CONN_CLOSED_MEM_INSUFFICIENT) or as a result of the
xcb_screen_iterator_t 'rem' field being 0.

In addition to this, commit af2aea40d2 unconditionally set the error to
EGL_BAD_NATIVE_WINDOW when creating a window or pixmap surface with a NULL
native handle. Change this to correctly set the error based on surface
type.

v2: Updated patch description (Emil Velikov)
    Return EGL_BAD_NATIVE_PIXMAP when eglCreatePixmapSurface is called
    with a NULL native pixmap handle

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-13 17:36:06 +01:00
Timothy Arceri
8dffa89e01 mesa: remove extern from texture function
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-13 21:57:30 +10:00
Timothy Arceri
b8f63b3c10 glsl: make linker error message more informative
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-13 21:57:20 +10:00
Topi Pohjolainen
1bba29ed40 i965: Stop aux data compare preventing program binary re-use
Items in the program cache consist of three things: key, the data
representing the instructions and auxiliary data representing
uniform storage. The data consisting of instructions is stored into
a drm buffer object while the key and the auxiliary data reside in
malloced section. Now the cache uploading is equipped with a check
that iterates over existing items and seeks to find a another item
using identical instruction data than the one being just uploaded.
If such is found there is no need to add another section into the
drm buffer object holding identical copy of the existing one. The
item just being uploaded should instead simply point to the same
offset in the underlying drm buffer object.

Unfortunately the check for the matching instruction data is
coupled with a check for matching auxiliary data also. This
effectively prevents the cache from ever containing two items
that could share a section in the drm buffer object.

The constraint for the instruction data and auxiliary data to
match is, fortunately, unnecessary strong. When items are stored
into the cache they will anyway contain their own copy of the
auxiliary data (even if they matched - which they in real world
never will). The only thing the items would be sharing is the
instruction data and hence we should only check for that to match
and nothing else.

No piglit regression in jenkins.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-08-13 13:37:49 +03:00
Topi Pohjolainen
12a66d91f6 i965: Only write program to cache when it doesn't exist yet
Current logic re-writes the same data when existing data is found.
Not that this actually matters at the moment in practice, the
contraint for finding matching data is too severe to ever allow
data to be shared between two items in the cache.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-08-13 13:37:49 +03:00
Topi Pohjolainen
b4897eb70a i965: Rename brw_upload_item_data to brw_alloc_item_data
and simplify the interface to take directly the size and to return
the offset. The routine does nothing more than allocate, it doesn't
upload anything.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-08-13 13:37:49 +03:00
Tapani Pälli
853853b2ac mesa: update MaxShaderStorageBlockSize to 2^27
Extension spec originally required 2^24 but 2^27 is the minimum value
required by OpenGL 4.5 and OpenGL ES 3.1 specifications.

Fixes:
   ES31-CTS.shader_storage_buffer_object.basic-max

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-08-13 12:55:29 +03:00
Tapani Pälli
24695f4b27 mesa: fix name returned for XFB varyings
_mesa_get_program_resource_name has logic to append '[0]' in name
if variable is an array, this should be skipped for XFB varyings
that have array index already appended.

v2: fix comment, change also GL_NAME_LENGTH query to match
    the behaviour

Fixes:
   ES31-CTS.program_interface_query.transform-feedback-types

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-08-13 12:55:17 +03:00
Edward O'Callaghan
86a72ee48e mesa: Fix printf format specifier warn of the ptrdiff_t
See §7.19.6.1, paragraph 7 of the ISO C specification.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-08-13 01:25:26 +02:00
Marek Olšák
8c0b943e87 r600g: allow setting geometry shader sampler states
We were ignoring them. This is both hilarious and sad.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-13 01:25:26 +02:00
Marek Olšák
d335aad11b r600g: fix polygon offset scale
The value was copied from r300g, which uses 1/12 subpixels, but this hw
uses 1/16 subpixels.

Should fix piglit: gl-1.4-polygon-offset (formerly a glean test)
(untested, ported from radeonsi)

Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-08-13 01:25:26 +02:00
Marek Olšák
bfac8ba9d3 radeonsi: fix polygon offset scale
The value was copied from r300g, which uses 1/12 subpixels, but this hw
uses 1/16 subpixels.

Fixes piglit: gl-1.4-polygon-offset (formerly a glean test)

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-08-13 01:25:26 +02:00
Marek Olšák
8ae88105b6 radeonsi: enable VS_OUT_MISC_SIDE_BUS_ENA
This is recommended for better performance.
Diag tests always enable this.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-13 01:25:26 +02:00
Marek Olšák
e7a52a5cb8 radeonsi: add support for gl_PrimitiveID in the fragment shader
It must be obtained from the VS.

The GS scenario A must be enabled for PrimID to be generated for the VS.

+ 4 piglits

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-13 01:25:26 +02:00
Marek Olšák
8e11be0ddb radeonsi: move VGT_GS_MODE to the VS state
The VS will want to select GS scenario A here (VS with PrimitiveID).

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-13 01:25:26 +02:00
Rob Clark
bdc564b942 freedreno/a4xx: format updates
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
500025a237 freedreno/a3xx+a4xx: add texture buffer object support
Basic texture buffer support.  Should be straightforward to add first/
last_element support.  And with a bit of work in ir3 emulate larger
texture buffer sizes.  But this seems to be enough for stk gl31 render
paths.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
fb07c49f48 ttn: add buffer texture type
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
aab3912f21 freedreno/ir3: 'keeps' need neighbors found too
This shows up with a glamor shader, which does a TXF and uses the result
for conditional kill.  Before we wouldn't group the fanin (collect)
neighbors which need to be allocated adjacently at RA, resulting in
badness.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
6e04020dd7 freedreno/ir3/print: print left/right neighbors too
When debugging compiler, this is useful to see.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
0667962103 freedreno/ir3: use nir pass to lower const to scalar
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
8885f2befa freedreno/a4xx: point-size and spritelist fixes
a4xx needs similar treatment as 995f55a6

Also fixup a few point-size and vpsrepl issues and drop fix_blit_fp()
hack previously needed for mem2gmem.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
f72fead4a2 freedreno: cap cleanups
Move a few things around to group stuff that is common to a3xx/a4xx
together.  Also, introduce is_ir3() for things that are more specific to
the compiler / shader-ISA than to the gpu generation.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-12 18:37:43 -04:00
Rob Clark
81d2fd91a9 mesa: add NV_read_{depth,stencil,depth_stencil} extensions
These extensions allow reading depth/stencil for GLES contexts, which is
useful for tools like apitrace.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-12 18:37:43 -04:00
Jason Ekstrand
078aef0e97 i965/shader: Don't use OptimizeForAOS for NIR vec4 vertex shaders
Shader-db results for vec4 programs using NIR on HSW:

   total instructions in shared programs: 1838157 -> 1828469 (-0.53%)
   instructions in affected programs:     275978 -> 266290 (-3.51%)
   helped:                                2827
   HURT:                                  244
   GAINED:                                0
   LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2015-08-12 14:12:47 -07:00
Nanley Chery
91698d1206 mesa/teximage: report the correct function which triggered the error
This function would always report that a dimension or size error occurred
in glTexImage even when it was called from glCompressedTexImage. Replace
the static string with the dynamically determined caller name.

Reviewed-by: Tapani Palli <tapani.palli@intel.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
2015-08-12 13:48:45 -07:00
Oded Gabbay
5f1d5b1c78 mesa/formats: don't byteswap when building array formats
Because we build here an array format, we don't need to swap the
bytes for big endian.
If it isn't an array format, the bytes will be swapped in
_mesa_format_convert.

v2: remove temp variable

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-08-12 08:28:31 -07:00
Jason Ekstrand
e3eb91af80 mesa/formats: Don't flip channels of null array formats
Before, if we encountered an array format of 0 on a BE system, we would
flip all the channels even though it's an invalid format.  This would
result in a mostly invalid format with a swizzle of yyyy or wwww.  Instead,
we should just return 0 if the array format stashed in the format info is
invalid.

Cc: "10.6 10.5" <mesa-stable@lists.freedesktop.org>
2015-08-12 08:28:31 -07:00
Jason Ekstrand
28d1a506c8 mesa/formats: Fix swizzle flipping for big-endian targets
The swizzle defines where in the format you should look for any given
channel.  When we flip the format around for BE targets, we need to change
the destinations of the swizzles, not the sources.  For example, say the
format is an RGBX format with a swizzle of xyz1 on LE.  Then it should be
wzy1 on BE;  however, the code as it was before, would have made it 1zyx on
BE which is clearly wrong.

Reviewed-by: Iago Toral <itoral@igalia.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: "10.6 10.5" <mesa-stable@lists.freedesktop.org>
2015-08-12 08:28:31 -07:00
Jason Ekstrand
3941539179 mesa/formats: Only do byteswapping for packed formats
Reviewed-by: Iago Toral <itoral@igalia.com>
Cc: "10.6 10.5" <mesa-stable@lists.freedesktop.org>
2015-08-12 08:28:31 -07:00
Matt Turner
02a4fe22b1 configure.ac: Always define __STDC_LIMIT_MACROS.
... which ensures that we get defines like LONG_MAX in C++.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91591
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-08-11 15:21:03 -07:00
Matt Turner
2265321834 i965: Optimize brw_inst_set_bits() and brw_compact_inst_set_bits().
Cuts about 2k of .text.

   text     data      bss      dec      hex  filename
5017141   197160    27672  5241973   4ffc75  i965_dri.so before
5014981   197160    27672  5239813   4ff405  i965_dri.so after

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-11 15:13:17 -07:00
Matt Turner
9fa70fef22 i965: Optimize brw_inst_bits() and brw_compact_inst_bits().
Cuts about 1k of .text.

   text     data      bss      dec      hex  filename
5018165   197160    27672  5242997   500075  i965_dri.so before
5017141   197160    27672  5241973   4ffc75  i965_dri.so after

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-11 15:13:10 -07:00
Emil Velikov
1e53df7064 docs: add news item and link release notes for 10.6.4
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-11 19:00:56 +01:00
Emil Velikov
d32c45ca7b docs: add sha256 checksums for 10.6.4
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 99793e2541)
2015-08-11 19:00:55 +01:00
Emil Velikov
c4b4bad68a docs: add release notes for 10.6.4
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 6b2fcee64e)
2015-08-11 19:00:55 +01:00
Marek Olšák
b88f14702d gallium/radeon: fix r600g build if LLVM is disabled
MESA_LLVM_VERSION_PATCH is undefined.

Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Tested-by: Benjamin Bellec <b.bellec@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-11 14:46:54 +02:00
Grazvydas Ignotas
5054588211 r600g: use a bitfield to track dirty atoms
r600 currently has 73 atoms and looping through their dirty flags has
become costly because checking each flag requires a pointer
dereference before the read. To avoid having to do that add additional
bitfield which can be checked really quickly thanks to tzcnt instruction.

id field was added to struct r600_atom but that doesn't affect memory
usage for both 32 and 64 bit CPUs because it was stuffed into padding.

The performance improvement is ~2% for benchmarks that can have FPS in
the thousands but is hardly measurable in "real" programs.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-08-11 14:46:54 +02:00
Grazvydas Ignotas
c58534c138 r600g: don't mark unused atom dirty
On evergreen config_state is not used, so don't mark it dirty.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-08-11 14:46:54 +02:00
Grazvydas Ignotas
85adde30a4 r600g: use a helper to add an initialized atom
Instead of writing to rctx->atoms directly use a helper to take
advantage of assert checks.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-08-11 14:46:54 +02:00
Grazvydas Ignotas
3206d4ed44 gallium/radeon: use helper functions to mark atoms dirty
This is analogous to r300_mark_atom_dirty() used by r300, and will
be used by later patches. For common radeon code, appropriate helper
is called through a function pointer.

No functional changes.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-08-11 14:46:53 +02:00
Francisco Jerez
3c04a90e91 docs: Mark ARB_shader_image_load_store as done on i965. 2015-08-11 15:07:40 +03:00
Francisco Jerez
d03c65793a i965: Expose ARB_shader_image_load_store.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:40 +03:00
Francisco Jerez
13a04abc27 i965/fs: Clamp image array indices to the array bounds on IVB.
This fixes the spec@arb_shader_image_load_store@invalid index bounds
piglit tests on IVB, which were causing a GPU hang and then a crash
due to the invalid binding table index result of the array index
calculation.  Other generations seem to behave sensibly when an
invalid surface is provided so it doesn't look like we need to care.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-08-11 15:07:40 +03:00
Francisco Jerez
a47ae8de2c i965/fs: Translate image load, store and atomic NIR intrinsics.
v2: Move array coordinate workaround into the surface builder.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:40 +03:00
Francisco Jerez
912ef52c29 i965/fs: Handle image uniforms in NIR programs.
v2: Move the image_params array back to brw_stage_prog_data.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:40 +03:00
Francisco Jerez
4af27145fe i965: Implement logic to set up and upload an image uniform.
v2: Move the image_params array back to brw_stage_prog_data.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-08-11 15:07:40 +03:00
Francisco Jerez
84431c1f1d i965: Teach type_size() about the size of an image uniform.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-08-11 15:07:40 +03:00
Francisco Jerez
caae52561d i965/fs: Implement image load, store and atomic.
v2: Drop VEC4 suport.
v3: Rebase.
v4: Move array coordinate workaround into the surface builder.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:39 +03:00
Francisco Jerez
7e8be00010 i965/fs: Import image format conversion primitives.
Define bitfield packing, unpacking and type conversion operations in
terms of which the image format conversion code will be implemented.
These don't directly know about image formats: The packing and
unpacking functions take a 4-tuple of bit shifts and a 4-tuple of bit
widths as arguments, determining the bitfield position of each
component.  Most of the remaining functions perform integer, fixed
point normalized, and floating point type conversions, mapping between
a target type with per-component bit widths given by a parameter and a
matching native representation of the same type.

v2: Drop VEC4 suport.
v3: Rebase.
v4: Fix clamping of negative floats in the unsigned case of
    emit_convert_to_scaled().

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:39 +03:00
Francisco Jerez
26ca81ce30 i965/fs: Import image format metadata queries.
Define some utility functions to query the bitfield layout of a given
image format and whether it satisfies a number of more or less
hardware-specific properties.

v2: Drop VEC4 suport.
v3: Add SKL support.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:39 +03:00
Francisco Jerez
86dbd8af40 i965/fs: Import code to transform image coordinates into surface coordinates.
Accounting for the padding required for 1D arrays in certain cases.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:39 +03:00
Francisco Jerez
1a37619763 i965/fs: Import image memory offset calculation code.
Define a function to calculate the memory address of the image
location given by a vector of coordinates.  This is required in cases
where we need to fall back to untyped surface access, which take a raw
memory offset and know nothing about surface coordinates, type
conversion or memory tiling and swizzling.  They are still useful
because typed surface reads don't support any 64 or 128-bit formats on
IVB, and they don't support any 128-bit formats on HSW and BDW.

The tiling algorithm is implemented based on a number of parameters
which are passed in as uniforms and determine whether the surface
layout is X-tiled, Y-tiled or untiled.  This allows binding surfaces
of different tiling layouts to the pipeline without recompiling the
program.

v2: Drop VEC4 suport.
v3: Rebase.
v4: Add plenty of comments (Jason).

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:39 +03:00
Francisco Jerez
fb19df7a62 i965/fs: Import image access validity checks.
These utility functions check whether an image access is valid.
According to the spec an invalid image access should have no effect on
the image and yield well-defined results.  Typically the hardware
implements correct bounds and surface checking by itself, but in some
cases (typed atomics on IVB and untyped messages elsewhere) we need to
implement it in software to work around lacking hardware support.

v2: Drop VEC4 suport.
v3: Rebase.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:39 +03:00
Francisco Jerez
3569742ec4 i965: Define implementation constants for ARB_shader_image_load_store.
Reviewed-by: Paul Berry <stereotype441@gmail.com>

v2: Drop VS support pre-Gen8, drop GS support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-11 15:07:39 +03:00
Francisco Jerez
786e0853be i965/gen7-8: Set up early depth/stencil control appropriately for image load/store.
v2: Store early fragment test mode in brw_wm_prog_data instead of
    getting it from core mesa data structures (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-11 15:07:39 +03:00
Francisco Jerez
ac7664e493 i965/gen7-8: Poke the 3DSTATE UAV access enable bits.
v2: Set the PS UAV-only bit on HSW (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-11 15:07:39 +03:00
Francisco Jerez
acb6d90dc8 i965/gen7: Enable fragment shader dispatch if the program has image uniforms.
Shaders with image uniforms may have side effects.  Make sure that
fragment shader threads are dispatched if the shader has any image
uniforms.

v2: Use brw_stage_prog_data::nr_image_params to find out if the shader
    has image uniforms instead of checking core mesa data structures
    (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-08-11 15:07:38 +03:00
Francisco Jerez
47f9b07e4c i965: Hook up image state upload.
v2: Add CS support.  Move the image_params array back to
    brw_stage_prog_data.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2015-08-11 15:07:38 +03:00
Francisco Jerez
868f1ba0a4 i965: Reserve enough parameter entries for all image uniforms used in the program.
v2: Add CS support.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-08-11 15:07:38 +03:00
Francisco Jerez
87a3e02d9b i965: Define and initialize image parameter structure.
This will be used to pass image meta-data to the shader when we cannot
use typed surface reads and writes.  All entries except surface_idx
and size are otherwise unused and will get eliminated by the uniform
packing pass.  size will be used for bounds checking with some image
formats and will be useful for ARB_shader_image_size too.  surface_idx
is always used.

v2: Add CS support.  Move the image_params array back to
    brw_stage_prog_data.
v3: Improve documentation.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-08-11 15:07:38 +03:00
Francisco Jerez
3144844f5c i965: Implement surface state set-up for shader images.
v2: Add SKL support.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:38 +03:00
Francisco Jerez
2cdb24a7c2 i965: Fix brw_memory_barrier() for SKL.
This works as-is on SKL, only the assertion needs to be relaxed.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-08-11 15:07:38 +03:00
Francisco Jerez
f909469137 i965: Add SKL support to brw_miptree_get_horizontal_slice_pitch().
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-11 15:07:38 +03:00
Timothy Arceri
fe55ab2d12 glsl: Add missing spec quote about atomic counter in structs
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-11 21:07:31 +10:00
Alex Deucher
87cea61b9e radeonsi: add new OLAND pci id
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-08-10 22:44:55 -04:00
Ilia Mirkin
3fa1ca34cc nouveau: no need to do tnl wakeup, state updates are always hooked up
A TNL state update now requires a DrawBuffer to be set, which it isn't
early on in context creation. Since we init swtnl from context init,
this caused crashes.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91570
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-08-10 17:43:44 -04:00
Jason Ekstrand
8a688bee83 i965/fs: Make resolve_source_modifiers consistent with the vec4 version
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 12:04:06 -07:00
Jason Ekstrand
7068a6409c i965/vec4_visitor: Make some function arguments const references
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 12:04:06 -07:00
Jason Ekstrand
1bb339493c i965/fs: Don't do redundant RA setup on IVB+
Acked-by: Matt Turner <mattst88@gmail.com>
2015-08-10 12:04:04 -07:00
Jason Ekstrand
0ac65abb46 i965/fs: Use dispatch_width instead of reg_width in alloc_reg_sets
reg_width is kind of an outdated concept.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:59:04 -07:00
Jason Ekstrand
bdcc8f3230 ra: Delete the conflict lists in ra_set_finalize
They are never used after the set is finalized so there's no reason to keep
them around.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:58:58 -07:00
Jason Ekstrand
7539ac7fe2 ra: Refactor ra_set_finalize
All this commit does is change an early return to an if with an else
clause.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:58:45 -07:00
Jason Ekstrand
c1d9b3ae0b i965/vec4_nir: Properly handle integer multiplies on BDW+
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:45:43 -07:00
Jason Ekstrand
1d658cf879 i965/vec4_nir: Do boolean source modifier resolves on BDW+
On BDW+, the negation source modifier on NOT, AND, OR, and XOR, is actually
a boolean negate and not an integer negate.  However, NIR's soruce
modifiers are the integer version.  We have to resolve it with a MOV prior
to emitting the actual instruction.  This is basically the same thing we do
in the FS backend.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:45:43 -07:00
Jason Ekstrand
5e1c1c2fcb i965/vec4-nir: Handle boolean resolvese on ILK-
The analysis code was already there and running, we just weren't doing
anything with the result of it yet.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:45:43 -07:00
Jason Ekstrand
1d4e698466 i965/nir: Don't mark bany or ball instructions for resolve
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:45:43 -07:00
Jason Ekstrand
17c9781661 i965/nir: Use nir_op_info.output_type for determining when to resolve
Previously, we were explicitly listing every instruction that needs a
resolve.  However, those instructions were precicely the ones that returned
booleans so there's no reason why we shouldn't just have that check.  Also,
all of the reduction opcodes such as bany and ball were missing so it
didn't properly flag stuff on vec4.  If an opcode gets added in the future
that returns a bool but doesn't need a resolve, we can special-case that.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 11:45:43 -07:00
Jason Ekstrand
9901aeb1c7 mesa/format_utils: Add src_bits == dst_bits cases to unorm_to_unorm
This better ensures that the src_bits == dst_bits case gets optimized away.

Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-10 11:11:47 -07:00
Marek Olšák
7e5d56394b gallium/radeon: add a debug flag not to use write combining (v2)
v2: just clear the flag before the allocation

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-10 18:26:44 +02:00
Rob Clark
7bfe8cf4a4 freedreno/a4xx: add s8/z32/z32_s8x24 support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-10 07:12:54 -04:00
Rob Clark
fcb8a04c9d freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-10 07:12:54 -04:00
Rob Clark
2d6a889e8b freedreno/a4xx: fix vpsrepl for blit shaders
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-10 07:12:54 -04:00
Rob Clark
d2f669e6c7 freedreno/a4xx: clear cached fp when switching blit prog
For gmem restore (mem2gmem), we swap blit programs, in order to have a
different frag shader for depth vs color restore.  But we weren't
actually clearing the cached fp, so it would not actually change the
frag shader as expected.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-10 07:12:54 -04:00
Rob Clark
6dabf45597 freedreno/a3xx: clear cached fp when switching blit prog
For gmem restore (mem2gmem), we swap blit programs, in order to have a
different frag shader for depth vs color restore.  But we weren't
actually clearing the cached fp, so it would not actually change the
frag shader as expected.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-10 07:12:54 -04:00
Marta Lofstedt
08f2dfe343 mesa/es3.1: Allow Multisampled FrameBufferTextures
GLES 3.1 must be allowed to use multisampled framebuffer textures.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-10 13:49:41 +03:00
Marta Lofstedt
b6d014f0ba mesa/es3.1: Pass sample count check for multisampled textures
v3 : Removed space in comment.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-10 13:34:49 +03:00
Oded Gabbay
2ac171a7db mesa: clear existing swizzle info before bitwise-OR
This patch fixes a bug in big-endian treatment, where the previous
swizzle info wasn't cleared before a new swizzle info was inserted into
the format field using a bitwise-OR operation.

v2: use MESA_ARRAY_FORMAT_SWIZZLE_*_MASK instead of numeric constants
v3: align according to coding style

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
CC: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-09 23:59:23 -07:00
Jose Fonseca
1eaa29cb30 util: Use LONG_MAX instead of LONG_BIT.
More portable.  Based on Roland Scheidegger's idea.

Tested with roundevent_test on Linux, MinGW, and MSVC.

https://bugs.freedesktop.org/show_bug.cgi?id=91591

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-10 00:08:55 +01:00
Jose Fonseca
497a22a727 scons: Build roundevent_test.
Reviewed-by: Roland Scheidegger <sroland@vmware.co>
2015-08-10 00:07:27 +01:00
Jose Fonseca
21ccdbdb5d util: Cope with LONG_BIT not being defined on Windows.
Neither MSVC nor MinGW defines LONG_BIT.  For MSVC this was not a problem as
it doesn't define __x86_64__ macro (it's GCC specific.)

However on Windows long type is guaranteed to be 32bits.

Also add an #error, as GCC will just warn, not throw any error, when no
value is returned.

Trivial.
2015-08-09 11:32:43 +01:00
Jose Fonseca
eb643db30e gallium: GCC 4.9 allows to include tmmintrin.h without -msse3.
Fixes build with MinGW x86_64 build with GCC 4.9, due to conflicting
definition _mm_shuffle_epi8 of u_sse.h and system headers.

Trivial.
2015-08-09 11:32:43 +01:00
Jose Fonseca
512aa0647f util: Rename PURE to ATTRIBUTE_PURE.
To avoid collission with windows.h's PURE macro.

We could consider eventually renaming to __pure, but that would require
further care, so it's left to the future.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-08-09 11:32:43 +01:00
Boyan Ding
27141f984d egl/x11: Fix driver_name acquisition
We don't need to free driverName string from dri2 reply, on the other
hand, the driver name acquired from loader doesn't need duplication.

Fixes: 45e110bad9 (egl/x11: trust our loader over the xserver for the
drivername)

Reported-by: Timothy Arceri <t_arceri@yahoo.com.au>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
[Emil Velikov: use brackets for both branches of conditional]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-08 13:36:17 +01:00
Ben Widawsky
a1adf0b3fe i965/skl: (trivial) Remove invalid comment about thread counts
This should have been a part of:
commit 7eaacc1678
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Date:   Wed Jul 29 12:35:24 2015 -0700

    i965/skl: Add production thread counts and URB size

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2015-08-07 13:48:27 -07:00
Chris Wilson
ffadfbf5d0 i965: Fix HW binding tables editing
Since the introduction of new gl_shader_stages in

commit a2af956963
Author: Fabian Bieler <fabianbieler@fastmail.fm>
Date:   Fri Mar 7 10:19:09 2014 +0100

    mesa: add tessellation shader enums

the translation table for the stage into the HW binding table edit
command was broken, and so we used illegal commands. Fix the array
initialisation to be impervious to changes in the gl_shader_stages enum
and add the asserts that would have caught the issue earlier.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-07 20:57:05 +01:00
Alexander von Gluck IV
ba651967a2 egl/dri2: Fix include path of u_atomic.h introduced e7e29189
This was causing a failure to build on SCons due to a missing
-Isrc/egl. Instead of adding in that path, lets just -Isrc/
and include "utils/u_atomic.h".

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-07 14:31:25 -05:00
Emil Velikov
6de9a03bed egl/x11: don't crash if dri2_dpy->conn is NULL
Identical to commit 60e9c35b3a0(egl/x11: bail out if we cannot fetch
the xcb connection) but for the swrast codepath.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-07 19:22:27 +01:00
Emil Velikov
2c7b6cf512 egl/x11: auth with xserver before attempting to open the dri module
No real change, apart from keeping the calls to the underlying winsys
(x11) next to each other. Just like platform_wayland.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 19:16:59 +01:00
Emil Velikov
45e110bad9 egl/x11: trust our loader over the xserver for the drivername
This is a port of commit 7bd95ec437a(dri2: Trust our own driver name
lookup over the server's.) from glx/dri2.

v2: Add newline between code and multiline comment. (Matt)

Cc: Julien Isorce <julien.isorce@gmail.com>
Reported-by: Julien Isorce <julien.isorce@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 19:16:10 +01:00
Emil Velikov
faf0f811e3 egl/x11: open the device from within dri2_x11_connect()
Allows us, with the next commit, to use alternative driver_name rather
than the one from xserver.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 19:15:02 +01:00
Emil Velikov
beddb0a237 egl/x11: fetch the device_name prior to driver_name
With the follow up commits we're about to further reshuffle things. Thus
we'll honour our our driver_name lookup (src/loader), and use the one
provided by xserver as a fall-back.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 19:14:37 +01:00
Emil Velikov
bf66988b08 egl/x11: remove dri2_dpy->conn checks
If the connection is NULL we won't be able to get here.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 19:14:20 +01:00
Emil Velikov
60e9c35b3a egl/x11: bail out if we cannot fetch the xcb connection
The documentation of xcb_connection_has_error() does not mention
what will happen, if NULL is fed to the function.

Upon closer look (props to Matt), it seems that we'll crash as the
implementation dereferences conn.

This will also allow us to remove the dri2_dpy->conn checking with the
next commit.

v2: Reword commit message as per Matt's findings.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-07 19:13:35 +01:00
Emil Velikov
75ce7919d6 vc4: add missing nir include, to fix the build
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 18:38:10 +01:00
Emil Velikov
4fa0cd17b7 vc4: automake: remove unused include
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-07 18:37:43 +01:00
Serge Martin (EdB)
a97f1b697b clover: Stub missing CL 1.2 functions.
As sugested by Tom a long time ago
and in order to be able to create Piglit tests

v2:
replace NOT_SUPPORTED_BY_CL_1_1 macro with an inline function
remove extra space in clLinkProgram arg

v3:
use __func__

v4:
back to a macro, it make more sense to use it with __func__

[ Francisco Jerez: Rename to CLOVER_NOT_SUPPORTED_UNTIL and pass the
  minimum API version required by the entry point so the error
  messages don't become stale when support for additional CL versions
  is introduced. ]

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-07 15:18:50 +03:00
Marta Lofstedt
0508861f29 mesa: NULL check InfoLog
When a program is compiled, but linking failed the sh->InfoLog
could be NULL. This is expoloited by OpenGL ES 3.1 conformance tests.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-07 13:17:07 +03:00
Iago Toral Quiroga
a0b7c1c86e i965/vec4: Fix indentation in vec4_visitor::evaluate_spill_costs
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-07 08:12:57 +02:00
Iago Toral Quiroga
f246aa6bca i965/vec4: do not predicate scratch writes for BRW_OPCODE_SEL instructions
The dst is always written, in this case the predicate is only used to select
the value to write, so if we are spilling the dst we always want to write
whatever value we selected to scratch.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-08-07 08:12:50 +02:00
Timothy Arceri
42d283a0cc glsl: remove stage ref generation for transform feedback
Stage ref cannot be queried for transform feedback.

Also simplify the build_stageref function by passing the
correct mode for uniforms.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-07 10:20:08 +10:00
Marek Olšák
6dea2456ca winsys/radeon: add a specific error message for cs_submit -> -ENOMEM
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-07 00:07:10 +02:00
Marek Olšák
42d9f6323a winsys/radeon: add an interface for contexts
Same idea as in libdrm_amdgpu.

A command stream can only be created for a specific context and it's always
submitted to that context.

This will mainly be used by amdgpu and it's required by the GPU reset status
query too.
(radeon only has a basic version of the query and thus doesn't need this)

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-07 00:06:52 +02:00
Marek Olšák
592ce6e2d1 gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interface
The timeout parameter covers both cases.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-07 00:06:13 +02:00
Marek Olšák
8118d3719a radeonsi: rename enable_s3tc -> enable_compressed_formats
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 22:54:03 +02:00
Marek Olšák
a3723fb9e3 gallium/radeon: add DRM and LLVM version to the renderer string
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 22:54:03 +02:00
Marek Olšák
a3e81f819c radeonsi: always flush framebuffer caches at the beginning of IBs
better safe than sorry

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-06 22:54:03 +02:00
Marek Olšák
0615ad1c70 radeonsi: don't count the exact needed CS space if the CS is large enough
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 22:54:03 +02:00
Marek Olšák
6d6208a431 radeonsi: don't crash when cleaning up after an incomplete context
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 22:54:03 +02:00
Matt Turner
9f78e27fc6 i965: Rename MIPTREE_LAYOUT_ALLOC_* -> MIPTREE_LAYOUT_TILING_*.
Ben suggested that I rename MIPTREE_LAYOUT_ALLOC_ANY_TILED since it
needed to include no tiling at all, but the name
MIPTREE_LAYOUT_ALLOC_ANY is pretty nondescriptive. We can avoid
confusion by replacing "ALLOC" with "TILING" in the identifiers.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-08-06 12:33:26 -07:00
Matt Turner
1c175fc2e3 i965: Correct a mistake that always forced texture tiling.
Regression since commit 3a31876600, when tiling modes were moved into
layout_flags.

The relevant enum values are

   MIPTREE_LAYOUT_ALLOC_YTILED = 1 << 5
   MIPTREE_LAYOUT_ALLOC_XTILED = 1 << 6
   MIPTREE_LAYOUT_ALLOC_ANY_TILED = MIPTREE_LAYOUT_ALLOC_YTILED |
                                    MIPTREE_LAYOUT_ALLOC_XTILED
   MIPTREE_LAYOUT_ALLOC_LINEAR = 1 << 7

so the expression (layout_flags & MIPTREE_LAYOUT_ALLOC_ANY_TILED) can
never produce a value of MIPTREE_LAYOUT_ALLOC_LINEAR.

The enum this replaced was

   enum intel_miptree_tiling_mode {
      INTEL_MIPTREE_TILING_ANY,
      INTEL_MIPTREE_TILING_Y,
      INTEL_MIPTREE_TILING_NONE,
   };

where "ANY" means "Y" or "NONE" (i.e., linear). As such, remove the
unused (and worse, unhandled) MIPTREE_LAYOUT_ALLOC_XTILED and redefine
MIPTREE_LAYOUT_ALLOC_ANY_TILED to mean what it did before.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91513
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-08-06 12:33:25 -07:00
Matt Turner
3d551c5c70 i965: Request a miptree with no tiling intel_miptree_map_blit().
Regression since commit 3a31876600, when tiling modes were moved into
layout_flags.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-08-06 12:33:25 -07:00
Marek Olšák
30a7e0c021 radeonsi: add a HUD query showing the number of shaders created
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:37 +02:00
Marek Olšák
70f5e49ba5 radeonsi: add a HUD query showing the number of compiler invocations
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:37 +02:00
Marek Olšák
028528215a gallium/radeon: display cumulative results for some driver queries
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
18501ff468 gallium/radeon: switch the buffer-wait-time query to microseconds
This display the units in the HUD.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
0257e1fbd2 gallium/radeon: change some driver query types to Hz
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
dbfeb0ec12 gallium/hud: automatically print % if max_value == 100
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
4e2a3e0376 gallium/hud: fix printing % next to panes
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
cbad30344d gallium/hud: replace assertions with clamping the unit index
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
97a65d90fe gallium,hud: allow displaying cumulative values instead of average
The cumulative value is useful for queries like the number of shader
compilations.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
130a03e360 gallium/hud: fix printing byte units
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
6b47b89781 gallium,hud: add support for Hz units in driver queries
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
60159bcfc6 radeonsi: before storing tess levels, load them from LDS instead of temporary
Also use only one store if stride <= 4.
All the fetches from and stores to temporaries can be removed now.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91461

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:36 +02:00
Marek Olšák
c2a5d1dcb1 winsys/radeon: loosen up the requirements for how much memory IBs can use
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:35 +02:00
Marek Olšák
cc59c78b0a gallium/radeon: always use the llvm. prefix in intrinsic names
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-08-06 20:44:35 +02:00
Marek Olšák
567394112d radeon/winsys: increase the IB size for VM
Luckily, there is a kernel query, so use the size from that.
It currently returns 256KB. It can be increased in the kernel.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:35 +02:00
Marek Olšák
d587742650 gallium/radeon: allow the winsys to choose the IB size
Picked from the amdgpu branch.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:35 +02:00
Marek Olšák
57245cce52 gallium/radeon: suspend timer queries between IBs
When we are measuring the time spent in a draw call, an unexpected flush
can distort the result.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-06 20:44:35 +02:00
Marek Olšák
b2eb13d602 st/mesa: implement DrawTransformFeedbackStream
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-06 20:11:43 +02:00
Marek Olšák
7d3939f0de mesa: save which transform feedback buffer is associated with which stream
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-06 20:11:43 +02:00
Marek Olšák
c63e8b1193 vbo: pass the stream from DrawTransformFeedbackStream to drivers
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-06 20:11:43 +02:00
Brian Paul
115964052b mesa: handle no-op cases sooner in _mesa_[Client]ActiveTexture()
If the new texture unit is the current texture unit, we can return
before error checking.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-06 07:38:47 -06:00
Francisco Jerez
ee977183dc i965/fs: Lower arithmetic instructions with register regions of unsupported width.
This extends the SIMD lowering pass to enforce the hardware limitation
that no directly-addressed source may read more than 2 physical GRFs.
One can easily go over this limit when doing 64-bit arithmetic
(e.g. FP64 or extended-precision integer MULs) or SIMD32, so it's nice
to be able to just emit an instruction of the intended execution size
from the visitor and let the lowering pass deal with this restriction
transparently.

Some hardware arithmetic instructions are not handled here, including
all instructions that use the accumulator implicitly (which the SIMD
lowering pass deliberately doesn't handle), instructions with
non-per-channel sources (e.g. LINE or PLANE) and SEND-like
instructions, which need special handling most likely as virtual
opcodes.

Reviewed-by: Connor Abbott <connor.w.abbott@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-08-06 14:12:12 +03:00
Francisco Jerez
42a18ca760 i965/fs: Fix fs_inst::regs_read() for sources in the ATTR file.
Otherwise it would crash on Gen8 with scalar VS.  The issue can easily
be reproduced with the following patch, but I don't see any reason why
it wouldn't be possible to end up with an ATTR argument here even
without it.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Connor Abbott <connor.w.abbott@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-08-06 14:12:12 +03:00
Francisco Jerez
e77a4a9b1f i965/fs: Implement nir_op_imul/umul_high in terms of MULH.
And get rid of another no16() call.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-06 14:12:12 +03:00
Francisco Jerez
3b48a0eeda i965/fs: Lower the MULH virtual instruction.
Translate MULH into the MUL/MACH sequence.  This does roughly the same
thing that nir_emit_alu() used to do but we can now handle 16-wide by
taking advantage of the SIMD lowering pass.  The force_sechalf
workaround near the bottom is required because the SIMD lowering pass
will emit instructions with non-zero quarter control and we need to
make sure we avoid that on integer arithmetic instructions with
implicit accumulator access due to a known hardware bug on IVB.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-06 14:12:12 +03:00
Francisco Jerez
2e73126438 i965/fs: Indent the implementation of 32x32-bit MUL lowering by one level.
In order to make room for the code that will lower the MULH virtual
instruction.  Also move the hardware generation and execution type
checks into the same branch, they are going to have to be different
for MULH.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-06 14:12:12 +03:00
Francisco Jerez
f5b37fb1ac i965/fs: Lower 32x32 bit multiplication on BXT.
AFAIK BXT has the same annoying alignment limitation as CHV on the
source register regions of 32x32 bit MULs, give it the same treatment.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-06 14:12:12 +03:00
Francisco Jerez
8f5d0988ea i965: Define virtual instruction to calculate the high 32 bits of a multiply.
This instruction will translate to the MUL/MACH sequence that computes
the high 32-bits of the result of a 64-bit multiply.  Before Gen8
integer operations that used the accumulator were limited to 8-wide,
but the SIMD lowering pass can easily be hooked up to sidestep this
limitation, we just need a virtual opcode to represent the MUL/MACH
sequence in the IR.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-06 14:12:12 +03:00
Michel Dänzer
f7ac4ef4ee glsl: Initialize patch member of glsl_struct_field
There is apparently a subtle difference in C++ between

    F f;

and

    F f();

The former will use the default constructor.  If there is no default
constructor specified, the compiler provides one that simply invokes the
default constructor for each field.  For built-in basic types, the
default constructor does nothing.  The later will, according to
http://stackoverflow.com/questions/2417065/does-the-default-constructor-initialize-built-in-types)
perform value-initialization of the type.  For built-in types this means
initializing to zero.

The per_vertex_accumulator constructor is:

    per_vertex_accumulator::per_vertex_accumulator()
       : fields(),
         num_fields(0)
    {
    }

This is the second form of constructor, so the glsl_struct_field
objects were previously zero initialized.  With the addition of an empty
default constructor in commit 7ac946e5, per_vertex_accumulator::fields
receive no initialization.

Fixes a bunch of random (mostly tessellation related) piglit failures
since commit 7ac946e5 ("glsl: Add constuctors for the common cases of
glsl_struct_field").

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91544
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-08-06 11:53:43 +09:00
Timothy Arceri
2c61d583f8 nir: add missing type to type_size_vec4()
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-08-05 21:16:45 +10:00
Eduardo Lima Mitev
03b7221dbb mesa: Add missing check of format and type in glTexSubImageXD on GLES 3.0
Argument validation for glTexSubImageXD is missing a check of format and type
against texture object's internal format when profile is OpenGL-ES 3.0+.

This patch also groups together all format and type checks on GLES into a
new function texture_format_error_check_gles(), to factorize similar
code in texture_format_error_check().

Fixes 2 dEQP tests:
* dEQP-GLES3.functional.negative_api.texture.texsubimage2d
* dEQP-GLES3.functional.negative_api.texture.texsubimage3d

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-08-05 08:20:16 +02:00
Eduardo Lima Mitev
4b07e9a033 mesa: Fix error returned by glCopyTexImage2D() upon an invalid internal format
Page 161 of the OpenGL-ES 3.1 (PDF) spec, and page 207 of the OpenGL 4.5 (PDF),
both on section '8.6. ALTERNATE TEXTURE IMAGE SPECIFICATION COMMANDS', states:

    "An INVALID_ENUM error is generated if an invalid value is specified for
     internalformat".

It is currently returning INVALID_OPERATION error because
_mesa_get_read_renderbuffer_for_format() is called before the internalformat
argument has been validated. To fix this, we move this call down the validation
process, after _mesa_base_tex_format() has been called. _mesa_base_tex_format()
effectively serves as a validator for the internal format.

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.texture.copyteximage2d_invalid_format

Fixes 1 piglit test:
* spec@oes_compressed_etc1_rgb8_texture@basic

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
2015-08-05 08:20:16 +02:00
Eduardo Lima Mitev
5d64cae842 mesa: Validate target before resolving tex obj in glTex(ture)SubImageXD
Currently, glTexSubImageXD attempt to resolve the texture object
(by calling _mesa_get_current_tex_object()) before validating the given
target. However, that method explicitly states that target must have been
validated before calling it, so it never returns a user error.

The target validation occurs later when texsubimage_error_check() is called.

This patch reorganizes target validation, taking it out from the error check
function and into a point before the texture object is resolved.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
2015-08-05 08:20:16 +02:00
Eduardo Lima Mitev
b38a50f1e3 mesa: Fix errors values returned by glShaderBinary()
Page 68, section 7.2 'Shader Binaries" of the of the OpenGL ES 3.1,
and page 88 of the OpenGL 4.5 specs state:

    "An INVALID_VALUE error is generated if count or length is negative.
     An INVALID_ENUM error is generated if binaryformat is not a supported
     format returned in SHADER_BINARY_FORMATS."

Currently, an INVALID_OPERATION error is returned for all cases.

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.shader.shader_binary

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
2015-08-05 08:20:16 +02:00
Tapani Pälli
784bea5a38 mesa: do not modify args when errors with GetProgramResourceName
Original purpose of these lines was to be more friendly against
GUI tools using the extension. However conformance suite explicitly
checks that buffers are not modified in error conditions.

Fixes:
   ES31-CTS.program_interface_query.buff-length

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-05 07:26:10 +03:00
Tapani Pälli
18c5cdb943 glsl: add variable mode check to build_stageref
Currently stage reference mask is built using the variable name
only. However it can happen that input of one stage has same name
as output from another stage. Adding check of variable mode makes
sure we do not pick wrong variable.

Fixes some subcases from
   ES31-CTS.program_interface_query.no-locations

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-05 07:25:53 +03:00
Frank Binns
7d88413ade dri: set the __DRI_API_OPENGL bit based on max gl compat version
This matches similar behaviour for the __DRI_API_OPENGL_CORE bit.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-04 20:03:16 -07:00
Frank Binns
b2c5986ea1 egl: Add eglQuerySurface surface type check for EGL_LARGEST_PBUFFER attrib
Calling eglQuerySurface on a window or pixmap with the EGL_LARGEST_PBUFFER
attribute resulted in the contents of the 'value' parameter being modified.
This is the wrong behaviour according to the EGL spec, which states:

    "Querying EGL_LARGEST_PBUFFER for a pbuffer surface returns the
     same attribute value specified when the surface was created with
     eglCreatePbufferSurface. For a window or pixmap surface, the
     contents of value are not modified."

Avoid this from happening by checking that the surface type is EGL_PBUFFER_BIT
before modifying the contents of the parameter.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-04 20:03:16 -07:00
Frank Binns
cfc3200a35 egl/dri: Add error info needed for EGL_EXT_image_dma_buf_import extension
Update the DRI image interface error codes to reflect the needs of the
EGL_EXT_image_dma_buf_import extension. This means updating the existing error
code documentation and adding a new __DRI_IMAGE_ERROR_BAD_ACCESS error code
so that drivers can correctly reject unsupported pitches and offsets. Hook
the new error code up in EGL to return EGL_BAD_ACCESS.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-08-04 20:03:16 -07:00
Eric Anholt
ee47d13abb vc4: Use nir_lower_load_const_to_scalar(). 2015-08-04 20:03:15 -07:00
Eric Anholt
6c28ee2041 nir: Add a nir_lower_load_const_to_scalar() pass.
This is useful to increase the CSE opportunities for a scalar backend.  It
avoids regressions when dropping vc4's custom CSE implementation.

v2: Cleanups by Matt (decl in the for loop, and unreachable()).
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-08-04 20:03:10 -07:00
Eric Anholt
45248d3640 vc4: Don't bother de-SSAing values that aren't part of phi webs.
We can just support them the same way we do load_const's SSA values.
2015-08-04 17:33:34 -07:00
Eric Anholt
a70f63ab20 nir: Add algebraic opt for no-op iand.
I lazily generated some of these in VC4 NIR lowering.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-08-04 17:19:25 -07:00
Eric Anholt
63eac5de8f vc4: Don't bother saturating the dst color for blending.
Since we just pulled it out of the destination as 8-bit unorm, we know
it's in [0, 1] already.

shader-db:
total instructions in shared programs: 100040 -> 98208 (-1.83%)
instructions in affected programs:     14084 -> 12252 (-13.01%)
2015-08-04 17:19:01 -07:00
Eric Anholt
cc8fb29046 vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.
Previously, SFU values always moved to a temporary, and TLB color reads
and texture reads always lived in r4.  Instead, we can have these results
just be normal temporaries, and the register allocator can leave the
values in r4 when they don't interfere with anything else using r4.

shader-db results:
total instructions in shared programs: 100809 -> 100040 (-0.76%)
instructions in affected programs:     42383 -> 41614 (-1.81%)
2015-08-04 17:19:01 -07:00
Eric Anholt
9b403c0756 vc4: Drop a dead prototype. 2015-08-04 17:19:01 -07:00
Eric Anholt
eae9c3286e Revert "nir: Use a single bit for the dual-source blend index"
This reverts commit ab5b7a0fe6.  We use more
than one bit of value in tgsi_to_nir.
2015-08-04 17:19:01 -07:00
Rob Clark
d6d7515bec freedreno/a4xx: add independent blend function support
needed for MRT

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-04 16:03:45 -04:00
Rob Clark
054526e49a freedreno/a4xx: MRT support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-04 16:03:45 -04:00
Rob Clark
b37a97c97d freedreno: move the half-precision logic into core
Both a3xx and a4xx need the same logic to decide if half-precision can
be used for blit shaders.  So move it to core and simplify things a bit
with a helper that considers all render targets.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-04 16:03:45 -04:00
Rob Clark
5ca032a9a8 freedreno: simplify/cleanup resource status tracking
Collapse dirty/reading bools into status bitmask (and drop writing which
should really be the same as dirty).  And use 'used_resources' list for
all tracking, including zsbuf/cbufs, rather than special casing the
color and depth/stencil buffers.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-04 16:03:45 -04:00
Rob Clark
c7deea51d2 freedreno: fix stream-out caps vec4->components
Should be in units of components, not vec4's

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-04 16:03:45 -04:00
Rob Clark
a221f8d9eb freedreno: small bit of cleanup about max rendertargets
We hard-coded 4 or 8 as the max in various places.  Switch it all to a
define since the limit will go up with a4xx (and maybe even again in the
future?)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-04 16:03:45 -04:00
Matt Turner
5f247a9656 glx: Use _mesa_lroundevenf() in glPixelStoref().
Functional change in which way half-way cases are rounded from towards
positive-infinity to even. The spec says "the passed value is rounded to
the nearest integer". Removes another case of bad half-up rounding.
2015-08-04 10:33:16 -07:00
Matt Turner
680de24545 util: Use SSE intrinsics in _mesa_lroundeven{f,}.
gcc actually generates this for us now that we use -fno-math-errno
(which is weird, since lrintf()/lrint() don't set errno) but clang still
does not. Presumably helps MSVC as well.

Reduced .text size by 8.5k with gcc before -fno-math-errno.

   text     data      bss      dec      hex  filename
4935850   195136    26192  5157178   4eb13a  i965_dri.so before
4927225   195128    26192  5148545   4e8f81  i965_dri.so after

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-04 10:33:13 -07:00
Matt Turner
3c050222b0 mesa: Use _mesa_lroundevenf() in some more places. 2015-08-04 10:32:39 -07:00
Vinson Lee
996349cb19 vl/mpeg12: Silence GCC unused-variable warning.
vl/vl_mpeg12_bitstream.c: In function 'decode_slice':
vl/vl_mpeg12_bitstream.c:928:19: warning: unused variable 'extra' [-Wunused-variable]
          unsigned extra = vl_vlc_get_uimsbf(&bs->vlc, 1);
                   ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-03 23:09:03 -07:00
Alejandro Seguí
e23cbaadaa glsl: replace old hash table with new and faster one
The util/hash_table was intended to be a fast hash table
replacement for the program/hash_table see 35fd61bd99 and
72e55bb688.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-04 12:31:05 +10:00
Ian Romanick
7ac946e546 glsl: Add constuctors for the common cases of glsl_struct_field
Fixes a giant pile of GCC warnings:

builtin_types.cpp:60:1: warning: missing initializer for member 'glsl_struct_field::stream' [-Wmissing-field-initializers]

I had to add a default constructor because a non-default constructor
was added.  Otherwise the only constructor would be the one with
parameters, and all the plases like

    glsl_struct_field foo;

would fail to compile.

I wanted to do this in two patches.  All of the initializers of
glsl_struct_field structures had to be converted to use the
constructor because C++ apparently forces you to do one or the other:

builtin_types.cpp:61:1: error: could not convert '{glsl_type::float_type, "near", -1, 0, 0, 0, GLSL_MATRIX_LAYOUT_INHERITED, 0, -1}' from '<brace-enclosed initializer list>' to 'glsl_struct_field'

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:07:04 -07:00
Ian Romanick
93977d3a15 i965: Make gen7_upload_ps_state static
It is only ever called from within the same file.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:05:00 -07:00
Ian Romanick
7a12e646d3 i965: Remove extern declaration for nonexistent state atom
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:58 -07:00
Ian Romanick
d302f51a1e i965: Trivial formatting changes in gen7_vs_state.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:56 -07:00
Ian Romanick
f917a65b3e i965: Trivial formatting changes in gen6_multisample_state.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:53 -07:00
Ian Romanick
07433760e3 i965: Trivial formatting changes in brw_misc_state.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:51 -07:00
Ian Romanick
680d09b072 i965: Trivial formatting changes in brw_draw_upload.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:49 -07:00
Ian Romanick
5b6218395c i965: Trivial formatting changes in brw_draw.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:47 -07:00
Ian Romanick
2b81cefb3f i965: Trivial formatting changes in brw_wm.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:20 -07:00
Iago Toral Quiroga
da1b1bf85c i965/nir: Do not scalarize phis in non-scalar setups
Significantly reduces register pressure in some piglit tests.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Antia Puentes
34d162260f i965/vec4: Handle uniform and GRF array access on vertex programs (NIR)
When the NIR-vec4 pass is enabled, handles uniform and GRF array access
on ARB_vertex_program like it is done on vertex shaders.

When the old IR-vec4 pass is used, emit_program_code() emits pull constant
loads directly instead of using relative addressing, hence to call to
move_uniform_array_access_to_pull_constants() is not needed and it is enough
to call to split_uniform_registers().

The patch also calls to move_grf_array_access_to_scratch() like it is
done for shaders, however I suspect this is a no-op for vertex programs and
we could remove it.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Antia Puentes
82f2e706bf i965/nir/vec4: Handle uniforms on vertex programs
The implementation takes into account that on ARB_vertex_program
only a single nir variable is generated to support all the uniform data.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Antia Puentes
90825e3ca9 i965/vec4: Enable NIR-vec4 pass on ARB_vertex_programs
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Iago Toral Quiroga
287b006a67 i965/nir/gs: Implement support for gl_InvocationID system value
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Samuel Iglesias Gonsalvez
7eced3aa86 i965/gs/gen6: Refactor ir_emit_vertex and ir_end_primitive for gen6
So the implementation is independent of GLSL IR and the visit methods of the
gen6 GS visitor. This way we will be able to reuse that implementation directly
from the NIR vec4 backend.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga
1836201fde i965/nir/gs: Implement EmitVertex and EndPrimitive
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga
551af29d2d i965/nir/gs: Handle geometry shaders inputs
Outputs from the vertex shader become array inputs in the geomtry shader,
but the arrays are interleaved, so we need to map our inputs accordingly.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga
7ade42755f i965/gs: Refactor ir_emit_vertex and ir_end_primitive
So the implementation is independent of GLSL IR and the visit methods of the
vec4 visitor. This way we will be able to reuse that implementation directly
from the NIR vec4 backend.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga
38fc4a91cd i965/nir: Enable NIR-vec4 pass on geometry shaders
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Samuel Iglesias Gonsalvez
418c004f80 nir: Fix output swizzle in get_mul_for_src
Avoid copying an overwritten swizzle, use the original values.

Example:

   Former swizzle[] = xyzw
   src->swizzle[] = zyxx

The expected output swizzle = zyxx but if we reuse swizzle in the loop,
then output swizzle would be zyzz.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro
19cf934f7f i965/nir/vec4: Add implementation of nir_emit_texture()
Uses the nir structure to get all the info needed (sources,
dest reg, etc), and then it uses the common
vec4_visitor::emit_texture to emit the final code.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro
1343f403b2 i965/ir/vec4: Refactor visit(ir_texture *ir)
Splitted in two. The emission is moved to a new vec4_visitor
method, vec4_visitor::emit_texture, ir order to be reused
on the nir path.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro
0d43d27df7 i965/vec4: Add a new dst_reg constructor accepting a brw_reg_type
This is useful for the upcoming texture support in NIR->vec4 pass,
as we found several cases where the brw_type is available, but not
the glsl_type.

Without this new constructor, the alternative would be:
dst_reg reg(MRF, <reg>)
reg.type = <brw_type>
reg.writemask = <mask>

Adding a new constructor makes code easier to read.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro
c15eea2afa i965/vec4: Change vec4_visitor::swizzle_result() method to allow reuse
This patch changes the signature of swizzle_result() to accept lower
level arguments. The purpose is to reuse it in the upcoming NIR->vec4
pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev
57182332b8 i965/vec4: Change vec4_visitor::gather_channel() method to allow reuse
This patch changes the signature of gather_channel() to accept the gather
component directly instead of fetching it internally from ir_texture.
This will allow reuse in the upcoming NIR->vec4 pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev
72c8d7721f i965/vec4: Change vec4_visitor::emit_mcs_fetch() method to allow reuse
This patch changes the signature of emit_mcs_fetch() to accept lower level
arguments. The purpose is to reuse it in the upcoming NIR->vec4 pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev
434481f315 i965/vec4: Move is_high_sample() method to vec4_visitor class
The is_high_sample() method is currently accessible only in the implementation of
vec4_visitor. Since we need to reuse it in the upcoming NIR->vec4 pass, lets make
it a method of the class instead.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev
db8a6de571 i965/nir: Add new utility method brw_glsl_base_type_for_nir_type()
This method returns the glsl_base_type corresponding to a nir_alu_type.
It will factorize code currently present in fs_nir, that can be reused
in vec4_nir on its upcoming emit_texture support.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev
583c1c6170 i965/nir/vec4: Implement nir_emit_jump
This implementation is taken as-is from fs_nir.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Antia Puentes
9b4a6fa4c0 i965/nir/vec4: Mark as unreachable ops that should be already lowered
NIR ALU operations:
   * nir_op_fabs
   * nir_op_iabs
   * nir_op_fneg
   * nir_op_ineg
   * nir_op_fsat
        should be lowered by lower_source mods

   * nir_op_fdiv
        should be lowered in the compiler by DIV_TO_MUL_RCP.

   * nir_op_fmod
        should be lowered in the compiler by MOD_TO_FLOOR.

   * nir_op_fsub
   * nir_op_isub
        should be handled by ir_sub_to_add_neg.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Antia Puentes
16072834ba i965/nir/vec4: Implement vector "any" operation
Adds NIR ALU operations:
   * nir_op_bany2
   * nir_op_bany3
   * nir_op_bany4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
fa4e3c3c9f i965/nir/vec4: Implement the dot product operation
Adds NIR ALU operations:
   * nir_op_fdot2
   * nir_op_fdot3
   * nir_op_fdot4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
96106e2a9f i965/nir/vec4: Implement conditional select
Adds NIR ALU operations:
   * nir_op_bcsel

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
b38fcd0aea i965/nir/vec4: Implement linear interpolation
Adds NIR ALU operation:
   * nir_op_flrp

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
314474872b i965/vec4: Return the emitted instruction in emit_lrp()
Needed in the NIR backend to set the "saturate" value of the
instruction.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
b64bd1fdc3 i965/nir/vec4: Implement floating-point fused multiply-add
Adds NIR ALU operation:
   * nir_op_ffma

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
d12e165dbb i965/nir/vec4: Implement "shift" operations
Adds NIR ALU operations:
   * nir_op_ishl
   * nir_op_ishr
   * nir_op_ushr

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
798cb33a25 i965/nir/vec4: Implement the "sign" operation
Follows the vec4_visitor IR implementation but
sets the saturate value in addition.

Adds NIR ALU operations:
   * nir_op_fsign
   * nir_op_isign

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
8e1e6facbf i965/nir/vec4: Implement bit operations
Same implementation than the IR case.

Adds NIR ALU operations:
   * nir_op_bitfield_reverse
   * nir_op_bit_count
   * nir_op_ufind_msb
   * nir_op_ifind_msb
   * nir_op_find_lsb
   * nir_op_ubitfield_extract
   * nir_op_ibitfield_extract
   * nir_op_bfm
   * nir_op_bfi
   * nir_op_bitfield_insert

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
0e874985ce i965/nir/vec4: Implement pack/unpack operations
* Lowered floating-point pack and unpack operations are not valid in VS.

* Pack and unpack 2x16 operations should be handled by lower_packing_builtins.

* Adds NIR ALU operations:
   * nir_op_pack_half_2x16
   * nir_op_unpack_half_2x16
   * nir_op_unpack_unorm_4x8
   * nir_op_unpack_snorm_4x8
   * nir_op_pack_unorm_4x8
   * nir_op_pack_snorm_4x8

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
3f10c2f3d7 i965/nir/vec4: "noise" ops should already be lowered
Marked them as unreachable.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
fa4731f4a5 i965/nir/vec4: Implement "bool<->int,float" format conversion
Used the same implementation than the vec4_visitor NIR.

Adds NIR ALU operations:
   * nir_op_b2i
   * nir_op_b2f
   * nir_op_f2b
   * nir_op_i2b

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
f14199a8fb i965/nir/vec4: Implement logical operators
Adds NIR ALU operations:
   * nir_op_inot
   * nir_op_ixor
   * nir_op_ior
   * nir_op_iand

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
51aeafaf96 i965/nir/vec4: Implement non-equality ops on vectors
Adds NIR ALU operations:
   * nir_op_bany_fnequal2
   * nir_op_bany_inequal2
   * nir_op_bany_fnequal3
   * nir_op_bany_inequal3
   * nir_op_bany_fnequal4
   * nir_op_bany_inequal4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
8be4b876c9 i965/nir/vec4: Implement equality ops on vectors
Adds NIR ALU operations:
   * nir_op_ball_fequal2
   * nir_op_ball_iequal2
   * nir_op_ball_fequal3
   * nir_op_ball_iequal3
   * nir_op_ball_fequal4
   * nir_op_ball_iequal4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
84d4a9dc2c i965/nir/vec4: Implement non-vector comparison ops
Adds NIR ALU operations:
   * nir_op_flt
   * nir_op_ilt
   * nir_op_ult
   * nir_op_fge
   * nir_op_ige
   * nir_op_uge
   * nir_op_feq
   * nir_op_ieq
   * nir_op_fne
   * nir_op_ine

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
b9c41affcf i965/nir: Add utility method for comparisons
This method returns the brw_conditional_mod value used when emitting
comparative ALU operations.

It could be moved to brw_nir in the future to reuse it in fs_nir backend.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes
dae6025e8e i965/nir/vec4: Derivatives are not allowed in VS
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
5e6f1c38a5 i965/nir/vec4: Implement min/max operations
Adds NIR ALU operations:
   * nir_op_fmin
   * nir_op_imin
   * nir_op_umin
   * nir_op_fmax
   * nir_op_imax
   * nir_op_umax

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
d53098393e i965/vec4: Return the emitted instruction in emit_minmax()
Needed in the NIR backend to set the "saturate" value of the
instruction.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
7553a51a68 i965/nir/vec4: Implement various rounding functions
Adds NIR ALU operations:
   * nir_op_ftrunc
   * nir_op_fceil
   * nir_op_ffloor
   * nir_op_ffrac
   * nir_op_fround_even

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
0ce159ec7f i965/nir/vec4: Implement carry/borrow for addition/subtraction
Adds NIR ALU operations:
   * nir_op_uadd_carry
   * nir_op_usub_borrow

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
62cef7b072 i965/nir/vec4: Implement more math operations
Adds NIR ALU operations:
   * nir_op_frcp
   * nir_op_fexp2
   * nir_op_flog2
   * nir_op_fexp
   * nir_op_flog
   * nir_op_fsin
   * nir_op_fcos
   * nir_op_idiv
   * nir_op_udiv
   * nir_op_umod
   * nir_op_ldexp
   * nir_op_fsqrt
   * nir_op_frsq
   * nir_op_fpow

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
068a41b349 i965/vec4: Return the last emitted instruction in emit_math()
Needed in the NIR backend to set the "saturate" value of the
instruction.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
9acebf1461 i965/nir/vec4: Implement multiplication
Implementation based on the vec4_visitor IR implementation
for the operations ir_binop_mul and ir_binop_imul_high.

Adds NIR ALU operations:
   * nir_op_fmul
   * nir_op_imul
   * nir_op_imul_high
   * nir_op_umul_high

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
0675842b56 i965/nir/vec4: Implement the addition operation
Adds NIR ALU operations:
   * nir_op_fadd
   * nir_op_iadd

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
4f39b547da i965/nir/vec4: Implement int<->float format conversion ops
Adds NIR ALU operations:
   * nir_op_f2i
   * nir_op_f2u
   * nir_op_i2f
   * nir_op_u2f

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
e4f02f47e7 i965/nir/vec4: Lower "vecN" instructions and mark them unreachable
This enables NIR pass "lower_vec_to_movs" on shaders that work on vec4.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
79154d99d6 i965/nir/vec4: Implement single-element "mov" operations
Adds NIR ALU operations:
   * nir_op_imov
   * nir_op_fmov

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Alejandro Piñeiro
9e5d827f45 i965/nir: Disable alu_to_scalar pass on non-scalar shaders
Disables nir_lower_alu_to_scalar when the shader stage being processed work
on vec4 vectors, like the upcoming NIR->vec4 backend.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
ef1b30ae63 i965/nir/vec4: Prepare source and destination registers for ALU operations
This patch resolves and initializes the destination and the source
registers that are common to most ALU operations.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Antia Puentes
168bbfa6ff i965/nir/vec4: Implement loading values from an UBO
Based on the vec4_visitor IR implementation for the ir_binop_load_ubo
operation. Notice that unlike the vec4_visitor IR, adding the !=0
comparison for UBO bools is not needed here because that comparison is
already added by the nir_visitor when processing the ir_binop_load_ubo
(in UBOs "true" is any value different from zero, but for us is ~0).

Adds NIR instrinsics:

   * nir_intrinsic_load_ubo_indirect
   * nir_intrinsic_load_ubo

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Alejandro Piñeiro
98d07022f5 i965/nir/vec4: Implement atomic counter intrinsics (read, inc and dec)
The implementation is based on its fs_nir counterpart.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Iago Toral Quiroga
e6cafb5dfd i965/nir/vec4: Implement load_uniform intrinsic
For the indirect case we need to take the index delivered by
NIR and compute the parent uniform that we are accessing (the one
that we uploaded to a surface) and the constant offset into that
surface.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:48 -07:00
Alejandro Piñeiro
e76e8caecd i965/nir/vec4: Implement intrinsics that load system values
These include:

nir_intrinsic_load_vertex_id_zero_base
nir_intrinsic_load_base_vertex
nir_intrinsic_load_instance_id

The source register is fetched from the nir_system_values map initialized
during nir_setup_system_values stage.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
662c4c9906 i965/nir/vec4: Implement store_output intrinsic
This implementation is based on the current URB setup in vec4_visitor, which
requires the output register to be stored in the output_reg array at variable's
original shader location index. But since nir_lower_io() pass uses the value
in var->data.driver_location, we need to put there var->data.location instead,
prior to calling nir_lower_io(), so that we end up with the correct index
in const_index[0].

The driver_location is not used at all, so this patch also disables the
nir_assign_var_locations pass on non-scalar shaders.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
11ed02e1c8 i965/vec4: Make sure that register types always match during emit_urb_slot()
Instead of relying on backends (currently vec4_visitor and soon NIR-vec4) to
store registers in output_reg with the correct type, this patch makes sure
that the common code in emit_urb_slot() always emit MOVs from output registers
using the same type on source and destination.

Since the actual type is not important, only that they match, we default to
float.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
167cb9663a i965/nir/vec4: Implement load_input intrinsic
The source register is fetched from the nir_inputs map built during
nir_setup_inputs stage.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
afe085a0ca i965/nir/vec4: Implement loop statements (nir_cf_node_loop)
This is taken as-is from fs_nir.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Iago Toral Quiroga
5c0436dbf8 i965/nir/vec4: Implement conditional statements (nir_cf_node_if)
The same we do in the FS NIR backend, only that here we need to consider
the number of components in the condition and adjust the swizzle
accordingly.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
f3187ea31e i965/nir/vec4: Add get_nir_dst() and get_nir_src() methods
These methods are essential for the implementation of the NIR->vec4 pass. They
work similar to their fs_nir counter-parts.

When processing instructions, these methods are invoked to resolve the
brw registers (source or destination) corresponding to the NIR sources
or destination. It uses the map of NIR register index to brw register for
all registers locally allocated in a block.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
97e205fd35 i965/nir: Move brw_type_for_nir_type() to brw_nir to allow reuse
Upcoming NIR->vec4 pass can benefit from this method, so lets move it up.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
f715252537 i965/nir/vec4: Implement load_const intrinsic
Similar to fs_nir backend, a nir_local_values map will be filled with
newly allocated registers as the load_const instrinsic instructions are
processed. Later, get_nir_src() will fetch the registers from this map
for sources that are ssa.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
a5a3287f73 i965/vec4: Add auxiliary func to build a writemask from a component size
New method brw_writemask_for_size() will return a writemask with the first
'size' components activated.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Iago Toral Quiroga
6e58fc56a5 i965/nir: Dot not assign direct uniform locations first for vec4-based shaders
In the vec4 backend we want uniform locations to be assigned consecutively
since that way the offsets produced by nir_lower_io are exactly what we
need to implement nir_intrinsic_load_uniform. Otherwise we would need a
mapping to match the output of nir_lower_io to the actual uniform registers
we need to use.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Iago Toral Quiroga
01f6235020 nir/nir_lower_io: Add vec4 support
The current implementation operates in scalar mode only, so add a vec4
mode where types are padded to vec4 sizes.

This will be useful in the i965 driver for its vec4 nir backend
(and possbly other drivers that have vec4-based shaders).

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
5e839727ed i965/nir: Pass a is_scalar boolean to brw_create_nir()
The upcoming introduction of NIR->vec4 pass will require that some NIR
lowering passes are enabled/disabled depending on the type of shader
(scalar vs. vector).

With this patch we pass a 'is_scalar' variable to the process of
constructing the NIR, to let an external context decide how the shader
should be handled.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
59006d3ad3 i965/nir/vec4: Add shader function implementation
It basically allocates registers local to a function in a nir_locals map,
then emits all its control-flow blocks.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Alejandro Piñeiro
4023b55fdd i965/nir/vec4: Add setup for system values
Similar to other variable setups, system values will initialize the
corresponding register inside a 'nir_system_values' map, which will then
be queried later when processing the different system value intrinsics
for the appropriate register.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Alejandro Piñeiro
01c5617c8e i965/vec4: Redefine make_reg_for_system_value() to allow reuse in NIR->vec4 pass
The new virtual method is more flexible, it has a signature:

dst_reg *make_reg_for_system_value(int location, const glsl_type *type);

v2 (Jason Ekstrand):
   Use the new version in unit tests so make check passes again

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Iago Toral Quiroga
195156e571 i965/nir/vec4: Add setup of uniform variables
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:47 -07:00
Eduardo Lima Mitev
b929acb6a8 i965/nir/vec4: Add setup of input variables in NIR->vec4 pass
This implementation sets up a map of input variable offsets to source registers
that are already initialized with the corresponding register offset.

This map will then be queried when processing load_input intrinsic operations,
to obtain the correct register source from which the input data will be loaded.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:46 -07:00
Eduardo Lima Mitev
78e7ce2b73 i965/vec4: Move type_size() method to brw_vec4_visitor class
The type_size() method is currently accessible only in the implementation
of vec4_visitor. Since we need to reuse it in the upcoming NIR->vec4 pass,
lets make it a method of the class instead.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:46 -07:00
Eduardo Lima Mitev
47d68908f2 i965/nir/vec4: Select between new nir_vec4 or current vec4_visitor code-paths
The NIR->vec4 pass will be activated if both the following conditions are met:

* INTEL_USE_NIR environment variable is defined and is positive (1 or true)
* The stage is vertex shader (support for geometry shaders and
  ARB_vertex_program will be added later).

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:46 -07:00
Eduardo Lima Mitev
abf4fa3c03 i965/nir/vec4: Add implementation placeholders for a new NIR->vec4 pass
This patch will add a brw_vec4_nir.cpp file filled with entry point methods to
the main functionality, following a structure similar to brw_fs_nir.cpp.

Subsequent patches in this series will be adding the implementations for these
methods, incrementally.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:46 -07:00
Matt Turner
594fc0f859 mesa: Replace F_TO_I() with _mesa_lroundevenf().
I'm not sure what the true meaning of "The rounding mode may vary." is,
but it is the case that the IROUND() path rounds differently than the
other paths (and does it wrong, at that).

Like _mesa_roundeven{f,}(), just add an use _mesa_lroundeven{f,}() that
has known semantics.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-03 09:24:51 -07:00
Matt Turner
f55c408067 mesa: Add -fno-trapping-math to CFLAGS.
Cuts about 1k of .text size.

   text    data     bss     dec     hex filename
4983676  197808   26328 5207812  4f7704 i965_dri.so before
4982522  197800   26328 5206650  4f727a i965_dri.so after

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-03 09:24:26 -07:00
Matt Turner
875458b778 mesa: Add -fno-math-errno to CFLAGS.
Cuts about 9k of .text size.

   text    data     bss     dec     hex filename
4992804  197808   26328 5216940  4f9aac i965_dri.so before
4983676  197808   26328 5207812  4f7704 i965_dri.so after

Also, Darwin's libm does not ever set errno, so if we care about those
systems we shouldn't rely on errno anyway.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-03 09:24:23 -07:00
Zoltan Gilian
44e90f2a55 r600,compute: force tiling on 2D and 3D texture compute resources
To circumvent a problem occuring when LINEAR_ALIGNED array mode is
selected on a TEXTURE_2D RAT.
This configuration causes MEM_RAT STORE_TYPED to write to incorrect
locations.
2015-08-03 15:29:02 +02:00
Zoltan Gilian
be3622dce3 clover: handle setKernelArg errors 2015-08-03 13:50:38 +02:00
Zoltan Gilian
aa46fba7e6 clover: fix image resource depth and array_size 2015-08-03 13:47:19 +02:00
Timothy Arceri
ab5b7a0fe6 nir: Use a single bit for the dual-source blend index
The only values allowed are 0 and 1, and the value is checked before
assigning.

This is a copy of 8eeca7a56c that seems to have been made to the glsl
ir type after it was copied for use in nir but before nir landed.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 21:36:50 +10:00
Zoltan Gilian
9ef5b7a233 clover: pass image attributes to the kernel
Read-only and write-only image arguments are recognized and
distinguished.
Attributes of the image arguments are passed to the kernel as implicit
arguments.
2015-08-03 13:31:16 +02:00
Zoltan Gilian
d2cd2c69b2 clover: move find_kernels to functions 2015-08-03 13:31:08 +02:00
Timothy Arceri
cf5667108b mesa: fix type for array indexing validation
parse_program_resource_name returns -1 when the index is invalid this needs to
be tested before assigning the value to the unsigned array_index.

In link_varyings.cpp (the other place parse_program_resource_name is used) after
the -1 check is done the value is just assigned to an unsigned variable so it
seems long is just used so we can return the -1 rather than actually expecting
index values to be ridiculously large.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 21:28:12 +10:00
Marta Lofstedt
704e764f06 mesa/es3.1: Allow multisampled textures for GLES 3.1
GLES 3.1 must be allowed to create multisampled textures.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:32:30 +03:00
Marta Lofstedt
2253a296c9 mesa/es3.1: Allow query of GL_TEXTURE_MULTISAMPLE
GLES 3.1 must allow a query for GL_TEXTURE_MULTISAMPLE.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:32:06 +03:00
Marta Lofstedt
0fe81a25f7 mesa/es3.1: Allow enable of GL_SAMPLE_MASK
GLES 3.1 must be able to enable GL_SAMPLE_MASK.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:31:38 +03:00
Marta Lofstedt
d74645d3ac mesa/es3.1: Allow textures with target GL_TEXTURE_2D_MULTISAMPLE
GLES 3.1 should be able to bind a texture with the target
GL_TEXTURE_2D_MULTISAMPLE.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:31:20 +03:00
Marta Lofstedt
a4bde371c7 mesa/es3.1: Allow GL_DEPTH_STENCIL_TEXTURE_MODE
GLES 3.1 must support the parameter GL_DEPTH_STENCIL_TEXTURE_MODE.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:31:04 +03:00
Marta Lofstedt
4f8e4a95db mesa/es3.1: Allow GL_SAMPLE_MASK
GLES 3.1 should be allowed to enable GL_SAMPLE_MASK.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:30:50 +03:00
Marta Lofstedt
2e0179e2b3 mesa/es3.1: Allow binding GL_DRAW_INDIRECT_BUFFER with gles 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:18:08 +03:00
Marek Olšák
de59a40f68 r600g: re-enable single-sample fast clear
Fixed by the CB_SHADER_MASK fix.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-03 00:18:41 +02:00
Marek Olšák
d4ad4c2061 r600g: fix the CB_SHADER_MASK setup
This fixes the single-sample fast clear hang.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-03 00:18:41 +02:00
Marek Olšák
828d20bdb7 r600g: fix the single-sample fast clear setup
No effect, but this is what we should be doing.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-03 00:18:41 +02:00
Marek Olšák
08fd736a45 radeonsi: flush if the memory usage for an IB is too high
Picked from the amdgpu branch.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-02 22:03:33 +02:00
Igor Gnatenko
4d7e0fa8c7 opencl: use versioned .so in mesa.icd
We must have versioned library in mesa.icd, because ICD loader would
fail if the mesa-devel package wasn't installed.

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reported-by: Fabian Deutsch <fabian.deutsch@gmx.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73512
Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-01 17:14:02 +01:00
Emil Velikov
2b831334e9 includes/GL: remove duplicated extension declarations from glx.h
All three of GLX_NV_float_buffer, GLX_EXT_texture_from_pixmap and
GLX_MESA_query_renderer have been in glxext.h for a while now.

As such we can drop this workaround/hack from the header.

v2: Remove the comment about GLX_NV_float_buffer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)
2015-08-01 15:47:55 +01:00
Emil Velikov
6f2d88927a docs: rename/bump 10.7.0 release notes to 11.0.0
Recently a few drivers have grown OpenGL 4+ support so we might as
well go all the way to... 11 ;-)

v2: Don't forget to update the version file (Ilia)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-01 15:45:43 +01:00
Emil Velikov
1307be519b winsys/radeon: don't leak the fd when it is 0
Earlier commit added an extra dup(fd) to fix a ZaphodHeads issue.
Although it did not consider the (very unlikely) case where we might end
up with the valid fd == 0.

Fixes: 28dda47ae4d(winsys/radeon: Use dup fd as key in drm-winsys hash
table to fix ZaphodHeads.)

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
2015-08-01 15:44:17 +01:00
Emil Velikov
eb3e2562a4 configure.ac: check for mkostemp()
We can make use of it over mkstemp + fcntl in the egl/wayland code.

Cc: Axel Davy <axel.davy@ens.fr>
Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-01 15:41:45 +01:00
Emil Velikov
175d975279 egl/wayland: use drmGetNodeTypeFromFd helper instead of opencoding it
Cc: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Boyan Ding <boyan.j.ding@gmail.com>
2015-08-01 15:41:45 +01:00
Emil Velikov
5567494403 egl/wayland: use designated initializers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-01 15:41:23 +01:00
Emil Velikov
720125ff99 egl: remove ifdef $(egl_extension) compile guards
All of these are already defined in the headers provided.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-01 15:41:23 +01:00
Emil Velikov
fa109d02dd egl/wayland: libdrm is a hard requirement, treat it as such
Prompt at configure time if it's missing otherwise we'll fail later on
in the build. Remove ambiguous HAVE_LIBDRM guard.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-01 15:41:23 +01:00
Emil Velikov
57c670a823 egl: consolidate ifdef HAVE_LIBDRM blocks
Move the code around rather than having it scattered. No functional
change.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-01 15:41:19 +01:00
Emil Velikov
b0a9299603 configure.ac: null,android,gdi are not valid egl-platforms
... and update the documentation to reflect reality.
null and gdi are gone, and surfaceless is a recent addition.

v2: s/platforms/platform/ (spotted by Thomas)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-01 15:40:44 +01:00
Marek Olšák
5d29eaef85 Revert "gallium/radeon: re-enable unsafe math for graphics shaders"
This reverts commit 8559f6ce62.

It causes hangs in DOTA 2 Reborn.
2015-08-01 00:52:05 +02:00
EdB
a40179f47b clover: make dispatch matches functions def
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-31 14:48:30 -07:00
Vinson Lee
8477dd7c2e gallivm: Fix GCC unused-variable warning.
lp_bld_tgsi_soa.c: In function 'lp_emit_immediate_soa':
lp_bld_tgsi_soa.c:3065:18: warning: unused variable 'size' [-Wunused-variable]
       const uint size = imm->Immediate.NrTokens - 1;
                  ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-31 14:43:11 -07:00
Adam Jackson
bafdafa7b2 glx: Fix missing bit decl for EXT_texture_integer
Missing from:

    commit b15aba940a
    Author: Adam Jackson <ajax@redhat.com>
    Date:   Tue Jul 21 11:43:42 2015 -0400

	glx: Fix image size computation for EXT_texture_integer (v2)

Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-07-31 13:37:19 -04:00
Matt Turner
616355160d glsl: Initialize parse-state in constructor of lower_subroutine.
Static analysis tools don't like partial object initializations.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-31 10:33:03 -07:00
Adam Jackson
b15aba940a glx: Fix image size computation for EXT_texture_integer (v2)
Without this this extension basically can't work in indirect contexts,
TexImage2D will compute the image size as 0 and we'll send no image data
to the server.

v2: Add EXT_texture_integer to the client extension list too (Ian)

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-07-31 12:32:16 -04:00
Marek Olšák
3050978864 radeonsi: copy *8_SNORM bits exactly in resource_copy_region
Disabling the FP16 mode didn't help.

If needed, we can use this trick for blits too, but not for scaled blits.

+ 4 piglits

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
64d3130994 r600g: early exit in r600_clear if there's nothing to do
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
f9c4953f99 radeonsi: early exit in si_clear if there's nothing to do
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
190a40580f radeonsi: fix a regression since the resource_copy_region cleanup
Broken since:
    46b2b3b - radeonsi: don't change pipe_resource in resource_copy_region

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91444

Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
3ca2132058 radeonsi: fix broken st/nine from merging tessellation
st/nine uses GENERIC slots greater than 60.
2015-07-31 16:49:17 +02:00
Marek Olšák
2d3ae154ba radeonsi: move CP DMA functions to their own file
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
3063c5e3d3 radeonsi: add a debug flag that disables printing ISA in shader dumps 2015-07-31 16:49:17 +02:00
Marek Olšák
2dcbd427da radeonsi: add a debug flag that disables printing TGSI in shader dumps
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
ac19a896d3 radeonsi: add a debug flag that disables printing the LLVM IR in shader dumps
This is for shader-db and should reduce size of shader dumps.
2015-07-31 16:49:17 +02:00
Marek Olšák
7dd1f45bc4 radeonsi: store shader disassemblies in memory for future users
This will be used by the new ddebug pipe. I'm including it now to avoid
conflicts with other patches.
2015-07-31 16:49:16 +02:00
Marek Olšák
1bbe408363 radeonsi: don't use llvm.AMDIL.fraction for FRC and DFRAC
There are 2 reasons for this:
- LLVM optimization passes can work with floor
- there are patterns to select v_fract from floor anyway

There is no change in the generated code.
2015-07-31 16:49:16 +02:00
Marek Olšák
8559f6ce62 gallium/radeon: re-enable unsafe math for graphics shaders
This reverts commit 4db985a5fa.

The grass no longer disappears, which was the reason the commit was reverted.
This might affect tessellation. We'll see.

Totals from affected shaders:
SGPRS: 151672 -> 150232 (-0.95 %)
VGPRS: 90620 -> 89776 (-0.93 %)
Code Size: 3980472 -> 3920836 (-1.50 %) bytes
LDS: 67 -> 67 (0.00 %) blocks
Scratch: 1357824 -> 1202176 (-11.46 %) bytes per wave

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
12a197b2d5 gallium/radeon: don't use rsq_action
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
681dbcf690 gallium/radeon: move r600-specific code to r600g
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
9a4c57afe4 gallium/radeon: remove unused variables and old comments
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
b9dad585e6 gallium/radeon: remove build_intrinsic and build_tgsi_intrinsic
duplicated now

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
0c805b6240 gallivm: add LLVMAttribute parameter to lp_build_intrinsic
This will help remove some duplicated code from radeon.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
488a83637f gallium/util: clear up that debug_get_flags_option returns a 64-bit mask
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
2015-07-31 16:49:16 +02:00
Marek Olšák
b0528118df radeonsi: completely rework updating descriptors without CP DMA
The patch has a better explanation. Just a summary here:
- The CPU always uploads a whole descriptor array to previously-unused memory.
- CP DMA isn't used.
- No caches need to be flushed.
- All descriptors are always up-to-date in memory even after a hang, because
  CP DMA doesn't serve as a middle man to update them.

This should bring:
- better hang recovery (descriptors are always up-to-date)
- better GPU performance (no KCACHE and TC flushes)
- worse CPU performance for partial updates (only whole arrays are uploaded)
- less used IB space (no CP_DMA and WRITE_DATA packets)
- simpler code
- hopefully, some of the corruption issues with SI cards will go away.
  If not, we'll know the issue is not here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:16 +02:00
Francisco Jerez
781dc7c0e1 i965/fs: Fix regression with SIMD8 VS since b5f1a48e23.
With num_direct_uniforms == 0 there's no space allocated in the
param_size array for the one block of direct uniforms -- On the FS
stage this would be a harmless no-op because it would simply re-set
one of the param_size entries allocated for the sampler units to zero,
but on the VS stage it has been reported to cause memory corruption
followed by a crash -- Surprising how a full piglit run on Gen8 didn't
catch it.

Reported-and-reviewed-by: "Lofstedt, Marta" <marta.lofstedt@intel.com>
2015-07-31 16:20:52 +03:00
Ben Widawsky
383558c564 i965/gen9: Add hs, ds, and cs thread + urb info
For SKL: These are the production values.

For BXT: These are low estimates to enable platforms.

This patch was originally part of
i965/skl: Add production thread counts and URB size
but was split out at Jordan's request (which I found to be reasonable).

Note on stable inclusion: 10.6 does not care about hs, and ds. It does care
about cs, but since Jordan was the one that asked me to extract it, I'll leave
it up to him to deal with a backport to stable is required.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-30 22:39:11 -07:00
Ben Widawsky
3cb5801003 i965/bxt: Use more conservative thread counts
Since we really do not know what may occur in the future, pick a more
conservative value for thread counts until we know better what values are
correct. As far as I can tell, the old values will work fine, but some of the
registers seem to indicate that going even lower is possible and the purpose of
having early support is to enable as many configurations that can possibly
exist (we can trim things down after platforms begin shipping later).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-30 22:39:11 -07:00
Ben Widawsky
7eaacc1678 i965/skl: Add production thread counts and URB size
This patch adjusts the SKL values to the best known values we have.

v2: Remove HS/DS/CS fields. Adding this makes most sense to add to the
GEN9_FEATURES macro, however, doing that would require updating BXT values, and
Jordan requested I not do that. Conveniently, this request makes a lot of sense
wrt to stable backport as HS, and DS do not even exist there.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-30 22:39:11 -07:00
Eric Anholt
7830e465a5 vc4: Lower uniform loads to scalar in NIR.
This also moves the vec4-to-byte-addressing math into NIR, so that
algebraic has a chance at it.
2015-07-30 15:47:12 -07:00
Eric Anholt
5a8c57b522 vc4: Move some FS input lowering into NIR. 2015-07-30 15:47:12 -07:00
Eric Anholt
13ddd48b97 vc4: Move program keys to the header file.
I want to be able to inspect them from other files for lowering passes in
NIR.
2015-07-30 15:47:12 -07:00
Eric Anholt
27f728cdc5 vc4: Lower NIR inputs to scalar as well.
For now this is just scalarizing, but it also means we'll get to dump a
bunch of QIR-based lowering in a moment.
2015-07-30 15:47:12 -07:00
Eric Anholt
b85f6ae4b2 vc4: Start adding a NIR-based output lowering pass.
For now, this just splits up store_output intrinsics to be scalars, and
drops unused outputs in the coordinate shader.  My goal is to be able to
drop a bunch of my VC4-specific optimization by letting NIR handle it.
2015-07-30 15:47:11 -07:00
Eric Anholt
c93ffd661a vc4: Mark our shaders as single-threaded.
I had my understanding of this bit flipped.  We're using the full register
space, so we need to say so.
2015-07-30 15:46:28 -07:00
Eric Anholt
df3005de18 vc4: Avoid leaking indirect array access UBOs. 2015-07-30 15:46:28 -07:00
Eric Anholt
86541cf8ce vc4: Avoid overflowing various static tables. 2015-07-30 15:46:27 -07:00
Eric Anholt
d0173bce37 vc4: Fix return values from recent validation changes. 2015-07-30 15:46:27 -07:00
Kai Wasserbäch
a5b3b24958 docs: trivial cleanup of GL3.txt, remove redundant radeonsi entries.
Follow-up to 1b2b0e42ce

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-31 07:28:17 +10:00
Dave Airlie
518abd0bbe st/mesa: don't draw instead of asserting in transform feedback
if we get a request to take the count from feedback, but there
is no buffer to take it from, just draw as if we got 0 vertices
so nothing.

This fixes this assert killing the ogl conform, and a piglit
test I've sent.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-31 07:27:29 +10:00
Timothy Arceri
fdb8487613 mesa: remove now unused _mesa_get_uniform_location
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 22:00:56 +10:00
Timothy Arceri
7f5f7d15fb mesa: remove now unused subscript validations
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 22:00:50 +10:00
Timothy Arceri
8cd2f88845 mesa: fix and simplify resource query for arrays
This removes the need for multiple functions designed to validate an array
subscript and replaces them with a call to a single function.

The change also means that validation is now only done once and the index
is retrived at the same time, as a result the getUniformLocation code can
be simplified saving an extra hash table lookup (and yet another
validation call).

This chage also fixes some tests in:
ES31-CTS.program_interface_query.uniform

V3: rebase on subroutines, and move the resource index array == 0
check into _mesa_GetProgramResourceIndex() to simplify things further

V2: Fix bounds checks for program input/output, split unrelated comment fix
and _mesa_get_uniform_location() removal into their own patch.

Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 22:00:45 +10:00
Neil Roberts
3a21e4bd26 i965/bxt: Don't use brw_device_info_skl_early on BXT
Previously it could end up using the “SKL early” device on BXT
depending on the revision number. This would probably break things
because for example has_llc would be wrong.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-30 11:45:27 +01:00
Timothy Arceri
75a96cedf7 glsl: set stage flag for structs and arrays in resource list
This fixes the remaining failing tests in:
ES31-CTS.program_interface_query.uniform-types

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 19:33:33 +10:00
Dave Airlie
1b2b0e42ce docs: consolidate radeonsi in GL3.txt
move into DONE for GL4.0 and GL4.1

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-30 09:00:42 +01:00
Dave Airlie
af1e6aa75b radeonsi: enable GL4.1 and update documentation (v2)
This enables GL4.1 for radeonsi, and updates the
docs in the correct places.

v2: enable only for llvm 3.7 which has fixes in place.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-30 09:00:25 +01:00
Dave Airlie
3c73c41871 radeonsi: add GS multiple streams support (v2)
This is the final piece for ARB_gpu_shader5,

The code is based on the r600 code from Glenn Kennard,
and myself.

While developing this, I'm not 100% sure of all the calculations
made in the GS registers, this is why the max_stream is worked
out there and used to limit the changes in registers. Otherwise
my initial attempts either regressed GS texelFetch tests
or primitive-id-restart. The current code has no regressions
in piglit.

This commit doesn't enable ARB_gpu_shader5, since that just
bumps the glsl level to 4.00, so I'll just do a separate patch
for 4.10.

v1.1: fix bug introduced in rebase.
v2: Address Marek's review comments,
remove my llvm stream code for simpler C,
move gsvs_ring and gs_next_vertex to arrays.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-30 09:00:17 +01:00
Anuj Phogat
c73a13e953 Delete unused functions in format parser
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-07-29 14:46:32 -07:00
Anuj Phogat
92994742d0 i965: Change the type of max_{vs, hs, ...}_threads variables to unsigned
Fixes following compiler warning:
brw_cs.cpp:386:27: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-29 14:46:31 -07:00
Anuj Phogat
2484263fe9 Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 14:46:30 -07:00
Jose Fonseca
8413822c8c gallium/auxiliary: Ensure c99_math.h is included.
As it is needed for exp2.

Trivial.
2015-07-29 21:25:10 +01:00
Roland Scheidegger
2b916c6e47 c99_math: (trivial) implement exp2 for MSVC too
Unsurprisingly doesn't build otherwise with old msvc.
2015-07-29 22:20:04 +02:00
Ben Widawsky
e933d54599 i965/bxt: Support 3src simd16 instructions
This is easily accomplished by moving simd16 3src to GEN9_FEATURES.

v2: small cleanup to make it more similar to GEN8_FEATURES

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 11:10:02 -07:00
Emil Velikov
c0731a1b14 targets/dri: scons: add missing link against libdrm
Otherwise the final dri module will have (additional) unresolved
symbols.

Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviwed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-29 17:41:43 +01:00
Emil Velikov
4fc86f183e svga: scons: remove unused HAVE_SYS_TYPES_H define
There isn't a single instance in mesa that
mentions HAVE_SYS_TYPES_H, other than this file.

Cc: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 17:40:47 +01:00
Matt Turner
23bba717e1 glsl: Avoid double promotion. 2015-07-29 09:34:52 -07:00
Matt Turner
a562313f37 mesa: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner
7adc9fa1f1 mesa/math: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner
076f73edb3 program: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner
04aa8b58a0 swrast: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner
c92b2a1d7b tnl: Avoid double promotion.
There are a couple of unrelated changes in t_vb_lighttmp.h that I hope
you'll excuse -- there's a block of code that's duplicated modulo a few
trivial differences that I took the liberty of fixing.
2015-07-29 09:34:52 -07:00
Matt Turner
2b47ef715a vbo: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner
b568a5f6a8 util: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner
29ef7a9f19 gallium/auxiliary: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-07-29 09:34:52 -07:00
Matt Turner
4251ccb47b nir: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:51 -07:00
Matt Turner
c1da15709a i965: Use float calculations when double is unnecessary.
Literals without an f/F suffix are of type double, and implicit
conversion rules specify that the float in (float op double) be
converted to a double before the operation is performed. I believe float
execution was intended (in nearly all cases) or is sufficient (in the
case of gen7_urb.c).

Removes a lot of float <-> double conversion instructions and replaces
many double instructions with float instructions which are cheaper.

   text     data      bss      dec      hex  filename
4928659   195160    26192  5150011   4e953b  i965_dri.so before
4928315   195152    26192  5149659   4e93db  i965_dri.so after

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:51 -07:00
Matt Turner
c67ce2bd3b gallium/auxiliary: Use exp2(x) instead of pow(2.0, x). 2015-07-29 09:34:51 -07:00
Matt Turner
b73782bf18 program: Use exp2(x) instead of pow(2.0, x). 2015-07-29 09:34:51 -07:00
Matt Turner
f8a647883a mesa: Use floats for viewport bounds.
ARB_viewport_array specifies that DEPTH_RANGE consists of double-
precision parameters (corresponding commit d4dc35987), and a preparatory
commit (6340e609a) added _mesa_get_viewport_xform() which returned
double-precision scale[3] and translate[3] vectors, even though X, Y,
Width, and Height were still floats.

All users of _mesa_get_viewport_xform() immediately convert the double
scale and translation vectors into floats (which were floats originally,
but were converted to doubles in _mesa_get_viewport_xform(), sigh).

i965 at least cannot consume doubles (see SF_CLIP_VIEWPORT). If we want
to pass doubles to hardware, we should have a different function that
does that.

Acked-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-07-29 09:34:51 -07:00
Matt Turner
ecc559218d c99_math: Implement exp2f for MSVC.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-29 09:34:51 -07:00
Matt Turner
5c7fd67045 glsl: Remove MSVC implementations of copysign and isnormal.
Non-Gallium parts of Mesa require MSVC 2013 which provides these.
2015-07-29 09:34:51 -07:00
Francisco Jerez
02425d3ec2 i965/fs: Make the default builder 64-wide before entering the optimization loop.
Not a typo.  Replace the default builder with one of bogus width to
catch cases in which optimization passes assume that the default
dispatch width is good enough.  The execution controls of instructions
emitted during optimization should in general match the original code
that is being manipulated.  Many of the problems fixed in this series
were caught by the assertions introduced in this patch.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 19:30:11 +03:00
Francisco Jerez
4529916dfd i965/fs: Don't set exec_all on instructions wider than the original in lower_simd_width.
This could have led to somewhat increased bandwidth usage for lowered
texturing instructions on Gen4 (which is the only case in which
lower_width may be greater than inst->exec_size).  After the previous
patches the invariant mentioned in the comment should no longer be
assumed by any of the other optimization and lowering passes, so the
exec_all() call shouldn't be necessary anymore.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 19:30:11 +03:00
Francisco Jerez
eaba922582 i965/fs: Initialize a builder explicitly in the gen4 send dependency work-arounds.
Instead of relying on the default one.  This shouldn't lead to any
functional changes because DEP_RESOLVE_MOV overrides the execution
size of the instruction anyway and other execution controls are
irrelevant.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 19:30:11 +03:00
Matt Turner
8b838fa9f0 i965/cfg: Assert that cur_do/while/if pointers are non-NULL.
More.. like in commit 4d93a07c.
2015-07-29 09:20:07 -07:00
Ilia Mirkin
9da9adcfd7 nvc0/ir: cache vertex out base so that we don't recompute again
The global CSE pass stinks and is unable to pull this out. Easy enough
to handle it here and avoid generating unnecessary special register
loads (which can allegedly be quite slow).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-29 11:05:56 -04:00
Ilia Mirkin
ad75620863 nvc0/ir: output base for reading is based on laneid
PFETCH retrieves the address for incoming vertices, not output vertices
in TCS. For output vertices, we must use the laneid as a base.

Fixes barrier piglit test, which was failing for entirely non-barrier
reasons, but rather that it was (a) trying to draw multiple patches and
(b) the incoming patch size was not the same as the outgoing patch size.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-29 09:40:44 -04:00
Francisco Jerez
e42d2948d3 Revert "pipe-loader: simplify pipe_loader_drm_probe"
This reverts commit a27ec5dc46.  It
breaks the intended behaviour of pipe_loader_probe() with ndev==0 as
relied upon by clover to query the number of devices available to the
pipe loader in the system.

Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 16:17:17 +03:00
Francisco Jerez
5e645e68d6 i965/fs: Switch opt_cse() to the fs_builder constructor from instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:15:34 +03:00
Francisco Jerez
992cda2c8a i965/fs: Switch lower_logical_sends() to the fs_builder constructor from instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:15:23 +03:00
Francisco Jerez
930ebb2585 i965/fs: Switch lower_load_payload() to the fs_builder constructor from instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:15:16 +03:00
Francisco Jerez
a0b192d3d9 i965/fs: Don't rely on the default builder to create a null register in emit_spill.
It's not guaranteed to have the same width as the instruction
generating the spilled variable.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:15:10 +03:00
Francisco Jerez
bfad71606a i965/fs: Set up the builder execution size explicitly in opt_sampler_eot().
opt_sampler_eot() was relying on the default builder to have the same
width as the sampler and FB write opcodes it was eliminating, the
channel selects didn't matter because the builder was only being used
to allocate registers, no new instructions were being emitted with it.
A future commit will change the width of the default builder what will
break this assumption, so initialize it explicitly here.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:15:03 +03:00
Francisco Jerez
09039f4bc1 i965/fs: Initialize a builder explicitly in opt_peephole_predicated_break().
This wasn't taking into account the execution controls of the original
instruction, but it was most likely not a bug because control flow
instructions are typically full width.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:14:56 +03:00
Francisco Jerez
e1f4724097 i965/fs: Set execution controls explicitly in opt_peephole_sel().
Emit the SELs and MOVs with the same execution controls as the
original MOVs, and the CMP with the same execution controls as the IF.
Also explicitly check that the execution controls of any pair of MOVs
being folded into a SEL are compatible (which is almost always going
to be the case), since otherwise it would seem wrong to initialize the
builder object below from the then_mov instruction only.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:14:49 +03:00
Francisco Jerez
ff463af436 i965/fs: Set execution controls correctly in lower_integer_multiplication().
lower_integer_multiplication() was ignoring the execution controls of
the original MUL instruction.  Fix it by using the new fs_builder
constructor.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:14:42 +03:00
Francisco Jerez
ce90227c71 i965/fs: Set execution controls correctly for lowered pull constant loads.
demote_pull_constants() was ignoring the execution size and channel
selects of the instruction that wanted the constant, which doesn't
matter for uniform pull constant loads because all channels get the
same scalar value, but it might for varying pull constant loads.  Fix
it by using the new fs_builder() constructor that takes care of
setting execution controls compatible with the instruction passed as
argument.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:14:35 +03:00
Francisco Jerez
53077aee66 i965/fs: Set the execution size of the MOVs correctly in opt_combine_constants().
The execution size was being left equal to the default of 8/16, which
AFAICT would have overwritten components other than the one we wanted
to initialize and could potentially have corrupted other registers.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:14:29 +03:00
Francisco Jerez
6f7dea0b32 i965/fs: Define a new fs_builder constructor taking an instruction as argument.
We have a number of optimization passes that repeat the same pattern
before inserting new instructions into the program based on some
previous instruction: They point the default builder at the original
instruction, then call exec_all() and group() to select the same
execution controls the original instruction had, and then maybe call
annotate() to clone the debug annotation from the original
instruction.

In fact an optimization pass missing any of these steps is likely to
be broken if the intention was to emit new code based on a preexisting
instruction, so let's make it easy for passes to do the right thing by
having an fs_builder constructor that automates the task of setting up
a builder to emit a given instruction provided as argument.

The following patches fix all cases I've found in which we weren't
explicitly initializing the execution controls of the emitted
instructions, and clean-up optimization passes which were already
doing the right thing to use the new constructor.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:13:49 +03:00
Francisco Jerez
7cb60d770f i965/fs: Translate memory barrier NIR intrinsics.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:50 +03:00
Francisco Jerez
b5f1a48e23 i965/fs: Execute nir_setup_uniforms, _inputs and _outputs unconditionally.
Images take up zero uniform slots in the nir_shader::num_uniforms
calculation, but nir_setup_uniforms needs to be executed even if the
program has no non-image uniforms so the driver-specific image
parameters are uploaded.  nir_setup_uniforms is a no-op if there are
really no uniforms, so checking the num_uniform count is useless in
any case.

The nir_setup_inputs and _outputs changes shouldn't lead to any
functional change, they are just meant to preserve the symmetry
between them and nir_setup_uniforms.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:50 +03:00
Francisco Jerez
3e5a90792d i965/fs: Don't overwrite fs_visitor::uniforms and ::param_size during the SIMD16 run.
Image variables need to allocate additional uniform slots over
nir_shader::num_uniforms.  nir_setup_uniforms() overwrites the values
imported from the SIMD8 visitor and then exits early before entering
the nir_shader::uniforms loop, so image uniforms are never re-created.
Instead leave the imported values alone, they *must* be the same for
the uniform layout of both runs to be compatible.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
ea0ac53f05 i965/fs: Drop unused untyped surface read and atomic emit methods.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
854c4d8b37 i965/fs: Revisit NIR atomic counter intrinsic translation.
Rewrite the NIR atomic counter intrinsics translation code making use
of the recently introduced surface builder.  This will allow the
removal of some of the functionality duplicated between the visitor
and surface builder.

v2: Drop VEC4 suport.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
1aab58f394 i965/fs: Import surface message builder helper functions.
Implement helper functions that can be used to construct and send
untyped and typed surface read, write and atomic messages to the
shared dataport unit easily.

v2: Drop VEC4 suport.
v3: Reimplement in terms of logical send opcodes.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
03846696ce i965/fs: Handle zero-size allocations in fs_builder::vgrf().
This will be handy to avoid some ugly ternary operators in the next
patch, like:
 fs_reg reg = (size == 0 ? null_reg_ud() : vgrf(..., size));

Because a zero-size register allocation is guaranteed not to ever be
read or written we can just return the null register.  Another
possibility would be to actually allocate a zero-size VGRF what would
involve defining a zero-size register class in the register allocator
and a considerable amount of churn.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
3352724dfa i965/fs: Implement lowering of logical surface instructions.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
086d29f4d7 i965/fs: Hook up SIMD lowering to unroll surface instructions of unsupported width.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
7a594a95a9 i965/fs: Define logical typed and untyped surface opcodes.
Each logical variant is largely equivalent to the original opcode but
instead of taking a single payload source it expects its arguments
separately as individual sources, like:

 typed_surface_write_logical null, coordinates, source, surface,
                                    num_coordinates, num_components

This patch defines the opcodes and usual instruction boilerplate,
including a placeholder lowering function provided mainly as
documentation for their source registers.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:49 +03:00
Francisco Jerez
3af2623da5 i965: Lift the constness restriction on surface indices passed to untyped ops.
v2: Update NIR atomic intrinsic handling too (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:49 +03:00
Francisco Jerez
a0c02d2bbb i965: Define the setup_vector_uniform_values() backend_visitor interface.
This cleans up the VEC4 implementation of setup_uniform_values()
somewhat and will avoid duplication of the image uniform upload code
by having a common interface to upload a vector of uniforms on either
back-end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
bd0d6a9cce i965/fs: Remove the emit_texture_gen*() fs_visitor methods.
This is now dead code.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
59979b133d i965/fs: Reimplement emit_mcs_fetch() in terms of logical sends.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
ba78a50071 i965/fs: Reimplement emit_texture() in terms of logical send messages.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
4be99438e6 i965/fs: Hook up SIMD lowering to handle texturing opcodes of unsupported width.
This should match the set of cases in which we currently call fail()
or no16() from the emit_texture_*() methods and the ones in which
emit_texture_gen4() enables the SIMD16 workaround.

Hint for reviewers: It's not a big deal if I happen to have missed
some case here, it will just lead to an assertion failure down the
road which is easily fixable, however being stricter than necessary
won't cause any visible breakage, it would just decrease performance
silently due to the unnecessary message splitting, so feel free to
double-check that all cases listed here already cause a SIMD8/16
fall-back with the current texturing code -- You may want to skip over
the Gen5-6 cases though if you don't have pencil and paper at hand.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
2cd466f6c3 i965/fs: Implement lowering of logical texturing opcodes on Gen4.
Unlike its Gen5 and Gen7 counterparts this patch isn't a plain
refactor of the previous Gen4 texturing code, it's more of a rewrite
largely based on emit_texture_gen4_simd16().  The reason is that on
the one hand the original emit_texture_gen4() code didn't seem easily
fixable to be SIMD width-invariant and had plenty of clutter to
support SIMD-width workarounds which are no longer required.  On the
other hand emit_texture_gen4_simd16() was missing a number of
SIMD8-only opcodes.  This should generalize both and roughly match
their current behaviour where there is overlap.

Incidentally this will fix the following piglits on Gen4:

    arb_shader_texture_lod.execution.arb_shader_texture_lod-texgrad
    arb_shader_texture_lod.execution.tex-miplevel-selection *gradarb 2d
    arb_shader_texture_lod.execution.tex-miplevel-selection *gradarb 3d
    arb_shader_texture_lod.execution.tex-miplevel-selection *projgradarb 2d
    arb_shader_texture_lod.execution.tex-miplevel-selection *projgradarb 2d_projvec4
    arb_shader_texture_lod.execution.tex-miplevel-selection *projgradarb 3d

Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
501134b9fe i965/fs: Implement lowering of logical texturing opcodes on Gen5-6.
This should be largely equivalent to emit_texture_gen5() except for
slight codestyle changes and the use i965 opcodes instead of the
ir_texture_opcode enum, see "i965/fs: Implement lowering of logical
texturing opcodes on Gen7+." for the mapping between them.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
03582f95b2 i965/fs: Lower SHADER_OPCODE_TXF_UMS/MCS_LOGICAL too on Gen7+.
These weren't being handled by emit_texture_gen7() but we can easily
lower them here for consistency with other texturing opcodes.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
8be01e3548 i965/fs: Implement lowering of logical texturing opcodes on Gen7+.
This should be largely equivalent to emit_texture_gen7() except that
we now get i965 sampling opcodes directly rather than
ir_texture_opcode enum values.  The mapping is as follows:

 - ir_tex -> SHADER_OPCODE_TEX
 - ir_txb -> FS_OPCODE_TXB
 - ir_txl -> SHADER_OPCODE_TXL
 - ir_txd -> SHADER_OPCODE_TXD
 - ir_txf -> SHADER_OPCODE_TXF
 - ir_txf_ms -> SHADER_OPCODE_TXF_CMS
 - ir_txs -> SHADER_OPCODE_TXS
 - ir_query_levels -> SHADER_OPCODE_TXS too, the visitor will make
                      sure that the provided lod value is zero in this
                      case.
 - ir_lod -> SHADER_OPCODE_LOD
 - ir_tg4 -> SHADER_OPCODE_TG4_OFFSET if the offset value is not
             immediate, SHADER_OPCODE_TG4 otherwise.

Other than that there are only minor changes and style fixes like the
implementation now being factored out in static functions to improve
encapsulation.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
a69332a312 i965/fs: Fix misleading comment regarding the message header in emit_texture_gen7.
This hasn't been overallocating space for the header for a long time.
It still leaves the header uninitialized though until the generator
fixes it.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:48 +03:00
Francisco Jerez
fc2273a340 i965/fs: Pass a BAD_FILE header source to LOAD_PAYLOAD in emit_texture_gen7().
So that it's left uninitialized by LOAD_PAYLOAD, we only need to
reserve space for it in the message since it will be initialized
implicitly by the generator.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:48 +03:00
Francisco Jerez
44a8cf488e i965/fs: Fix opt_zero_samples() for texturing ops not matching dispatch_width.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
8fbb3d3569 i965/fs: Use exec_size instead of dispatch_width to determine the message variant.
dispatch_width is global for a single compilation and doesn't
necessarily match the desired execution width if we had to lower the
original full-width instruction due to hardware limitations.  These
were all inside a Gen4-specific branch so this patch shouldn't have
any effect on more recent hardware.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
33deff4f05 i965/fs: Define logical texture sampling opcodes.
Each logical variant is largely equivalent to the original opcode but
instead of taking a single payload source it expects the arguments
separately as individual sources, like:

 tex_logical dst, coordinates, shadow_c, lod, lod2,
                  sample_index, mcs, sampler, offset,
                  num_coordinate_components, num_grad_components

This patch defines the opcodes and usual instruction boilerplate,
including a placeholder lowering function provided mostly as
documentation for their source registers.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
f18792aa10 i965/fs: Reimplement emit_single_fb_write() in terms of logical framebuffer writes.
The only non-trivial thing it still has to do is figure out where to
take the src/dst depth values from and predicate the instruction if
discard is in use.  The manual SIMD unrolling logic in the dual-source
case goes away because this is now handled transparently by the SIMD
lowering pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
59e7e6f7a2 i965/fs: Implement lowering of logical framebuffer writes.
This does essentially the same thing as
fs_visitor::emit_single_fb_write(), with some slight differences:

 - We don't have to worry about exec_size and use_2nd_half anymore,
   16-wide sources have already been lowered to 8-wide thanks to the
   previous commit and the manual argument unzipping is no longer
   required.

 - The src/dst_depth and sample_mask values are now explicit sources
   of the instruction instead of being taken from the visitor state
   directly.  The same goes for the kill-pixel mask that will be
   passed to the instruction explicitly as predicate.

 - Everything is now done in static functions to improve
   encapsulation.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
633938afd3 i965/fs: Hook up SIMD lowering to unroll FB writes of unsupported width.
This shouldn't have any effect because we don't emit logical
framebuffer writes yet.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
cecf738b0f i965/fs: Remove the FS_OPCODE_SET_OMASK pseudo-opcode.
This is now unused.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
98b0122e0a i965/fs: Don't attempt to copy the useless half of oMask for SIMD8 FB writes.
There's no need to initialize the wrong half of oMask in the payload
when we're doing an 8-wide framebuffer write because it will be
ignored by the hardware anyway.  By doing it this way we can let the
SIMD lowering pass split the sample_mask source as a regular
per-channel source, otherwise we would have to introduce some sort of
per-instruction source query or use fs_inst::header_size for the
lowering pass to be able to find out whether some source is
header-like, and leave the source untouched in that case.

As a bonus this achieves the same purpose as the previous code without
making use of the SET_OMASK pseudo-instruction, which will be removed
in a future commit.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
b1abfc4947 i965/fs: Move up Gen6 no16 check to emit_fb_writes().
And update the comment.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:47 +03:00
Francisco Jerez
b145855df6 i965/fs: Move up prog_data->uses_omask assignment up to brw_codegen_wm_prog().
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:46 +03:00
Francisco Jerez
6bd991a137 i965/fs: Simplify control flow in emit_single_fb_write().
Flatten the if ladder to match the way that the ordering of these
fields is specified in the hardware documentation a bit more closely.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:46 +03:00
Francisco Jerez
1ad928ed9f i965/fs: Fix slight layering violation in emit_single_fb_writes().
In cases where the color0 argument wasn't being provided,
emit_single_fb_writes() would take the alpha channel directly from the
visitor state instead of taking it from its arguments.  This sort of
hack didn't fit nicely into the logical send-message approach because
all parameters of the instruction have to be visible to the SIMD
lowering pass for it to be able to split them into halves at all.

Fix it by using LOAD_PAYLOAD in fs_visitor::emit_fb_writes() to
provide an actual color0 vector with undefined contents except for the
alpha component to match the previous behavior when no color buffers
are enabled.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:46 +03:00
Francisco Jerez
f68ec2baf4 i965/fs: Make sure that the type sizes are compatible during copy propagation.
It's surprising that we weren't checking for this already.  A future
patch will cause code like the following to be emitted:

 MOV(16) tmp<1>:uw, src
 MOV(8) dst<1>:ud, tmp<8,8,1>:ud

The second MOV comes from the expansion of a LOAD_PAYLOAD header copy,
so I don't have control over its types.  Copy propagation will happily
turn this into:

 MOV(8) dst<1>:ud, src

Which has different semantics.  Fix it by preventing propagation in
cases where a single channel of the instruction would span several
channels of the copy (this requirement could in fact be relaxed if the
copy is just a trivial memcpy, but this case is unusual enough that I
don't think it matters in practice).

I'm deliberately only checking if the type of the instruction is
larger than the original, because the converse case seems to be
handled correctly already in the code below.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:46 +03:00
Francisco Jerez
fa75f2d566 i965/fs: Honour the instruction force_sechalf and exec_size fields for FB writes.
We were previously guessing the half based on the EOT flag which seems
rather gross.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:46 +03:00
Francisco Jerez
a9f31a032b i965/fs: Define logical framebuffer write opcode.
The logical variant is largely equivalent to the original opcode but
instead of taking a single payload source it expects its arguments
that make up the payload separately as individual sources, like:

 fb_write_logical null, color0, color1, src0_alpha,
                        src_depth, dst_depth, sample_mask, num_components

This patch defines the opcode and usual instruction boilerplate,
including a placeholder lowering function provided mainly as
self-documentation.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 14:12:46 +03:00
Francisco Jerez
8368939e5d i965/fs: Implement pass to lower instructions of unsupported SIMD width.
This lowering pass implements an algorithm to expand SIMDN
instructions into a sequence of SIMDM instructions in cases where the
hardware doesn't support the original execution size natively for some
particular instruction.  The most important use-cases are:

 - Lowering send message instructions that don't support SIMD16
   natively into SIMD8 (several texturing, framebuffer write and typed
   surface operations).

 - Lowering messages that don't support SIMD8 natively into SIMD16
   (*cough*gen4*cough*).

 - 64-bit precision operations (e.g. FP64 and 64-bit integer
   multiplication).

 - SIMD32.

The algorithm works by splitting the sources of the original
instruction into chunks of width appropriate for the lowered
instructions, and then interleaving the results component-wise into
the destination of the original instruction.  The pass is controlled
by the get_lowered_simd_width() function that currently just returns
the original execution size making the whole pass a no-op for the
moment until some user is introduced.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

v2: Reverse order of the source transformations and split_inst emit
    call to make the code a bit easier to understand.
2015-07-29 14:12:46 +03:00
Francisco Jerez
86ae788bae i965/fs: Fix return value of fs_inst::regs_read() for BAD_FILE.
Typically BAD_FILE sources are used to mark a source as not present
what implies that no registers are read.  This will become much more
frequent with logical send opcodes which have a large number of
sources, many of them optionally used and marked as BAD_FILE when they
aren't applicable.  It will prove to be useful to be able to rely on
the value of regs_read() regardless of whether a source is present or
not.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:46 +03:00
Francisco Jerez
5a5607a16c i965/fs: Add builder emit method taking a variable number of source registers.
And start using it in fs_builder::LOAD_PAYLOAD().  This will be used
to emit logical send message opcodes which have an unusually large
number of arguments.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:46 +03:00
Francisco Jerez
1dd3543ac1 i965/fs: Add stub lowering pass for logical send-message opcodes.
This pass will house ad-hoc lowering code for several send
message-like virtual opcodes that will represent their logically
independent arguments as separate instruction sources rather than as a
single payload blob.  This pass will basically just take the separate
arguments that are supposed to be part of the payload and concatenate
them to construct a message in the form required by the hardware.
Virtual instructions in separate-source form will eventually allow
some simplification of the visitor code and make several
transformations easier like lowering SIMD16 instructions to SIMD8
algorithmically in cases where the hardware doesn't support the former
natively.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:46 +03:00
Francisco Jerez
fb7eba97d7 i965/fs: Factor out source components calculation to a separate method.
This cleans up fs_inst::regs_read() slightly by disentangling the
calculation of "components" from the handling of message payload
arguments.  This will also simplify the SIMD lowering and logical send
message lowering passes, because it will avoid expressions like
'regs_read * REG_SIZE / component_size' which are not only ugly, they
may be inaccurate because regs_read rounds up the result to the
closest register multiple so they could give incorrect results when
the component size is lower than one register (e.g. uniforms).  This
didn't seem to be a problem right now because all such expressions
happen to be dealing with per-channel GRFs only currently, but that's
by no means obvious so better be safe than sorry.

v2: Split PIXEL_X/Y and LINTERP into separate case blocks.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:46 +03:00
Francisco Jerez
24d74b6688 i965/fs: Simplify instruction rewrite loop in the register coalesce pass.
For some reason the loop that rewrites all occurrences of the
coalesced register was iterating over all possible offsets until it
would find one that compares equal to the offset of a source or
destination of any instruction in the program.  Since the mapping
between old and new offsets is already available in the regs_to_offset
array and we know that the whole register has been coalesced we can
just look it up.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:45 +03:00
Francisco Jerez
170200e0fc i965/fs: Fix rewrite of the second half of 16-wide coalesced registers.
The register coalesce pass wasn't rewriting the destination and
sources of instructions that accessed the second half of a coalesced
register previously copied with a 16-wide MOV instruction.  E.g.:

| ADD (16) vgrf0:f, vgrf0:f, 1.0:f
| MOV (16) vgrf1:f, vgrf0:f
| MOV (8)  vgrf2:f, vgrf0+1:f { sechalf }

would get incorrectly register-coalesced into:

| ADD (16) vgrf1:f, vgrf1:f, 1.0:f
| MOV (8)  vgrf2:f, vgrf0+1:f { sechalf }

The reason is that the mov[i] pointer was being left equal to NULL for
every other register.  The fact that we've made it to the rewrite loop
implies that the whole register will be coalesced, so it doesn't seem
right not to update something that uses it depending on whether mov[i]
is NULL or not.  Fixes an amount of texturing and image_load_store
piglit tests on my SIMD-lowering branch.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 14:12:02 +03:00
Francisco Jerez
d0a42b457f i965/fs: Detect multi-register MOVs correctly in register_coalesce.
register_coalesce() was considering the exec_size of the MOV
instruction alone to decide whether the register at offset+1 of the
source VGRF was being copied to inst->dst.reg_offset+1 of the
destination VGRF, which is only a valid assumption if the move has a
32-bit execution type.  Use regs_read() instead to find out the number
of registers copied by the instruction.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 13:27:12 +03:00
Dave Airlie
2294ba9565 radeon: add support for streams to the common streamout code. (v2)
This adds to the common radeon streamout code, support
for multiple streams.

It updates radeonsi/r600 to set the enabled mask up.

v2: update for changes in previous patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-29 10:48:47 +01:00
Dave Airlie
3f0e7c28fe radeon: move streamout buffer config to streamout enable function. (v2)
This will be used here later.

v2: update atom sizes
add check for old vs new enabled mask

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-29 10:48:10 +01:00
Fabio Pedretti
19d88e3f9f docs: consolidate nvc0 status 2015-07-29 04:52:52 -04:00
Marta Lofstedt
cb1cfb710c mesa/es3.1: enable GL_ARB_explicit_uniform_location for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 10:11:28 +03:00
Marta Lofstedt
49db765deb mesa/es3.1: enable GL_ARB_compute_shader for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 10:10:40 +03:00
Marta Lofstedt
49021e5058 mesa/es3.1: enable GL_ARB_texture_gather for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 10:03:19 +03:00
Marta Lofstedt
c561b2faa8 mesa/es3.1: enable GL_ARB_texture_multisample for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 10:02:37 +03:00
Marta Lofstedt
cd14fcbca0 mesa/es3.1: enable GL_ARB_shader_atomic_counters for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 10:02:00 +03:00
Marta Lofstedt
9ec50dc6bb mesa/es3.1: enable GL_ARB_shader_image_load_store for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 10:01:16 +03:00
Marta Lofstedt
d1bb3b4910 mesa/es3.1: Add ES 3.1 handling to get.c and get_hash_generator.py
Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 09:59:44 +03:00
Eduardo Lima Mitev
c00d093c8f mesa: Return INVALID_ENUM in glClearBufferiv() when buffer is not color or stencil
Page 497 of the PDF, section '17.4.3.1 Clearing Individual Buffers' of the
OpenGL 4.5 spec states:

    "An INVALID_ENUM error is generated by ClearBufferiv and
     ClearNamedFramebufferiv if buffer is not COLOR or STENCIL."

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.buffer.clear_bufferiv

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-29 08:13:12 +02:00
Kenneth Graunke
055e3a3f87 i965: Use real stage in "Unsupported form of variable indexing" warning.
Other stages can be miserably slow too!

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-28 23:03:08 -07:00
Kenneth Graunke
e235ca159f glsl: Fix a bug where LHS swizzles of swizzles were too small.
A simple shader such as

   vec4 color;
   color.xy.x = 1.0;

would cause ir_assignment::set_lhs() to generate bogus IR:

   (swiz xy (swiz x (constant float (1.0))))

We were setting the number of components of each new RHS swizzle based
on the highest channel used in the LHS swizzle.  So, .xy.y would
generate (swiz xy (swiz xx ...)), while .xy.x would break.

Our existing Piglit test happened to use .xzy.z, which worked, since
'z' is the third component, resulting in an xxx swizzle.

This patch sets the number of swizzle components based on the size of
the LHS swizzle's inner value, so we always have the correct number
at each step.

Fixes new Piglit tests glsl-vs-swizzle-swizzle-lhs-[23].
Fixes ir_validate assertions in in Metro 2033 Redux.

v2: Move num_components updating completely out of update_rhs_swizzle
    (suggested by Timothy Arceri).  Simplify.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-07-28 22:56:10 -07:00
Tapani Pälli
e17056f5a2 glsl: verify location when dual source blending
Same check is made for glBindFragDataLocationIndexed but it was missing
when using layout qualifiers.

Fixes following Piglit test:
	arb_blend_func_extended-output-location

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-07-29 08:17:55 +03:00
Tapani Pälli
b868971e78 glsl: move max_index calc to assign_attribute_or_color_locations
Change function to get all gl_constants for inspection, this is used
by follow-up patch.

v2: rebase, update function documentation

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-07-29 08:17:12 +03:00
Eric Anholt
2e04492a14 vc4: Skip re-emitting the shader_rec if it's unchanged.
It's a bunch of work for us to emit it (and its uniforms), more work for
the kernel to validate it, and additional work for the CLE to read
it. Improves es2gears framerate by about 50%.

Signed-off-by: Eric Anholt <eric@anholt.net>
2015-07-28 20:02:16 -07:00
Eric Anholt
aefec4fa22 vc4: Drop unused vpm_offset value.
It's been dead since we started doing VS/CS attr offset setup during
shader compile.
2015-07-28 19:59:45 -07:00
Eric Anholt
1f5e070dd7 vc4: Simplify vc4_use_bo and make sure it's not a shader.
Since the conversion to keeping validated shaders around for the BO's
lifetime, we haven't been checking that rendering doesn't happen to
shaders.  Make vc4_use_bo check that always, and just don't use it for the
VC4_MODE_SHADER case (so now modes are unused)
2015-07-28 19:35:26 -07:00
Eric Anholt
044f7bbda0 vc4: Keep the validated shader around for the simulator execution.
This more closely matches the kernel behavior on shader validation now.
2015-07-28 19:35:26 -07:00
Eric Anholt
22954db71c vc4: Make the object be the return value from vc4_use_bo().
Drops 40 bytes of code from validation.
2015-07-28 19:35:26 -07:00
Eric Anholt
cbb7477e8a vc4: Ensure that the bin CL is properly capped by increment/flush.
We don't want anything to appear after we've kicked off the render (and
thus job flush), since that might then get written out to the tile
allocation state.

Signed-off-by: Eric Anholt <eric@anholt.net>
2015-07-28 19:35:23 -07:00
Eric Anholt
601733da67 vc4: Drop NV shader reloc validation.
It wasn't validating enough, and we don't need the packet.
2015-07-28 19:35:23 -07:00
Eric Anholt
95faf2c639 vc4: Fix raster surface shadow updates under DRI2.
Glamor asks GBM for the handle of the BO, then flinks it itself.  We
were marking the bo non-private in the flink and dmabuf (DRI3) paths,
but not the GEM handle path.  As a result, non-pageflipping DRI2
swapbuffers (EGL apps, in particular) were never updating the texture.
2015-07-28 19:35:23 -07:00
Eric Anholt
b0193adbe9 vc4: Fix bus errors on dumping CL on hardware.
The kernel can't fixup unaligned float traps for us, so deref as a
uint32_t first.
2015-07-28 19:35:22 -07:00
Jason Ekstrand
736c6f3cfc meta/copy_image: Stash off the scissor
The meta CopyImageSubData path uses BlitFramebuffers to do the actual copy.
The only thing that can affect BlitFramebuffers other than the currently
bound framebuffers is the scissor so we need to save that off and reset it.
If we don't do this, applications that use a scissor together with
CopyImageSubData will get accidentally scissored copies.

Tested-by: Markus Wick <markus at selfnet.de>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-28 17:50:10 -07:00
Dave Airlie
bf4019a1c8 radeon: add streamout status 1-3 queries.
This adds support for queries against the non-0 vertex streams.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-29 00:00:37 +01:00
Marek Olšák
5142564734 st/mesa: remove st_context::missing textures and get_passthrough_fs
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Marek Olšák
72f31c63d7 st/mesa: remove st_finalize_textures atom
It only checks fragment textures and ignores other shaders, which makes it
incomplete, and textures are already finalized in update_single_texture.

There are no piglit regressions.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Marek Olšák
6ca3ff982a st/mesa: add shader dumping for shader-db
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Marek Olšák
768b4a25b9 st/mesa: fix GLSL 1.30 texture shadow functions with the GL_ALPHA depth mode (v2)
Fixes piglit:
    spec@glsl-1.30@execution@fs-texture-sampler2dshadow-10
    spec@glsl-1.30@execution@fs-texture-sampler2dshadow-11

v2: use st_shader_stage_to_ptarget

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Edward O'Callaghan
82546729e3 r600,radeonsi: GL_ARB_conditional_render_inverted
By using 'Tobias Klausmann' piglit test-suite patch. We obtain
a full 12/12 passes using this patch. By 'faking' to claim
support for this extension we obtain 7 fails and 5 passes.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: Furkan Alaca <falaca@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-07-29 00:10:27 +02:00
Dave Airlie
aa25a2c1ba radeonsi: add support for interpolateAt functions (v2)
This is part of ARB_gpu_shader5, and this passes
all the piglit tests currently available.

v2: use macros from the fine derivs commit.
add comments.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-28 22:13:27 +01:00
Chad Versace
56f1f47eda i965: Support importing R8 and GR88 dma_bufs
EGL_EXT_image_dma_buf_import now supports those formats.

Tests:
  - Tested by Piglit ext_image_dma_buf_import-transcode-nv12-as-r8-gr88.
  - Tested by Peter in Kodi/XBMC to obtain 60fps NV12 transcode at 4K.

Tested-by: Peter Frühberger <peter.fruehberger@gmail.com>
Signed-off-by: Chad Versace <chad.versace@intel.com>
2015-07-28 11:45:46 -07:00
Chad Versace
fd865d56d2 egl: Add support for DRM_FORMAT_R8, RG88, and GR88
The Kodi/XBMC developers want to transcode NV12 to RGB with OpenGL shaders,
importing the two source planes through EGL_EXT_image_dma_buf_import. That
requires importing the Y plane as an R8 EGLImage and the UV plane as either an
RG88 or GR88 EGLImage.

This patch teaches the driver-independent part of EGL about the new
formats. Real driver support is left for follow-up patches.

The new formats landed in airlied's kernel branch 'drm-next' on July 24.

Tested-by: Peter Frühberger <peter.fruehberger@gmail.com>
Signed-off-by: Chad Versace <chad.versace@intel.com>
2015-07-28 11:43:28 -07:00
Ilia Mirkin
313940b03c nvc0/ir: trim out barrier sync for non-compute shaders
It seems like they're never necessary, and actively cause harm. This
fixes some of the barrier-related piglits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-28 02:38:43 -04:00
Ilia Mirkin
ab63610a36 nvc0/ir: fix barrier emission
immediate arguments require a flag to be set for each one

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-28 02:30:01 -04:00
Eric Anholt
7850774f21 vc4: Add support for ARB_draw_elements_base_vertex.
Gallium exposes it unconditionally, so do our best to support it.  It
fails on the negative index cases, but those seem unlikely to be used in
the wild.
2015-07-27 22:48:20 -07:00
Rob Clark
98a4b111fb freedreno/ir3: add transform-feedback support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
96d4db683f freedreno/ir3: track "keeps" in ir
Previously we had a fixed array to track kills, since they don't
generate an SSA value, and then cheated by stuffing them in the
outputs array before sending things through depth/sched/etc.  But
store instructions will need similar treatment.  So convert this
over to a more general array of instructions that must be kept
and fix up the places that were previously relying on kills being
in the output array.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
020301bacc freedreno/ir3: add support for store instructions
For store instructions, the "dst" register is a read register, not a
written register.  (Ie. it is the address to store to.)  Lets not
confuse register allocation, scheduling, etc, with these details.
Instead just leave a dummy instr->regs[0], and take "dst" from
instr->regs[1] and srcs following.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
a240748de5 freedreno/ir3: cleanup driver-param stuff
Add 'enum ir3_driver_param' to track driver-param slots, and a
create_driver_param() helper to avoid having the knowledge about
where driver params are placed in const regs spread throughout
the code as we add additional driver-params.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
be8a8ebe57 freedreno: add transform-feedback state
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
bda1354aac freedreno: add resource tracking support for written buffers
With stream-out (transform-feedback) we have the case where resources
are *written* by the gpu, which needs basically the same tracking to
figure out when rendering must be flushed.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
65d36a109a freedreno/a3xx+a4xx: add support for vtxcnt semantic
This will be used for stream-out (transform-feedback)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
1b1ef6b457 freedreno/ir3: add stream-output support to cmdline compiler
A bit hard-coded configuration at the moment, but sufficient for now.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
810763deb5 freedreno/ir3: drop unused create_input() arg
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark
56462a3008 freedreno/ir3: move emit_const to ir3
Details of the cmdstream packets are different between a3xx and a4xx,
but the logic about the layout of const registers is the same, as that
is dictated by the ir3 shader compiler.  So rather than duplicating
logic that is tightly coupled to ir3 between a3xx and a4xx, move this
into ir3 and use per-generation callbacks for to build the cmdstream
packets.

This should make it easier to pass additional const regs (such as for
transform feedback).  And it also keeps the layout internal to ir3 in
case we want to make the layout more dynamic some day.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:05 -04:00
Rob Clark
0815729d96 freedreno/ir3: bit of shader API refactoring
Since for transform-feedback, we'll need more than just the TGSI
tokens from the state object, just pass the entire state object to
ir3_shader_create().  This also cleans things up a bit for some
day in the future when we could take shader either as TGSI or
directly NIR (for ex, glsl2nir or spirv2nir paths).  In the same
spirit, drop extra args from ir3_compile_shader_nir() (since it
can anyways get what it needs from the ir3_shader_variant).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:05 -04:00
Rob Clark
bc5e2bec30 freedreno/ir3: updated cat6 encoding
Sync updated cat6 encoding from freedreno.git, needed to properly encode
store instructions.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:05 -04:00
Ilia Mirkin
4b15cb6daa glsl: enable conservative depth, ssbo based on GLSL version
Add in missed version checks in the GLSL parser

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-27 12:11:00 -04:00
Emil Velikov
d69da58e84 docs: add news item and link release notes for mesa 10.6.3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-26 15:23:38 +01:00
Emil Velikov
11516b8bd1 docs: Add checksums for mesa 10.6.3 tarballs
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit ccef8901de)
2015-07-26 15:23:35 +01:00
Emil Velikov
e1dcd15878 Add release notes for 10.6.3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit ddc976368f)
2015-07-26 15:19:14 +01:00
Dave Airlie
bb9d59aed5 radeonsi: add fine derivate control (v2.1)
This adds support for fine derivatives and enables
ARB_derivative_control on radeonsi.

(just fell out of my working out interpolation)

v2: cleanup some bits, write a comment
v2.1: take Michel's comment from the mailing list

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-25 23:09:54 +01:00
Marek Olšák
9deb614cac radeonsi: fix GLSL textureGrad(samplerCube*) functions
+4 piglits

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-25 10:38:14 +02:00
Marek Olšák
e39ece0d78 st/mesa: don't ignore texture buffer state changes
Fixes piglit:
  spec@arb_texture_buffer_range@ranges-2

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-25 10:37:00 +02:00
Ilia Mirkin
a818faa6dd nvc0: fix geometry program revalidation of clipping params
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-07-25 02:03:25 -04:00
Dave Airlie
7b40d92f0d radeonsi: ubo indexing support (v2)
This is required as part of ARB_gpu_shader5.

no backend changes are required for this, or if
any are, it's the same ones as for samplers.

v2: use get_indirect_index (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-25 01:06:42 +01:00
Dave Airlie
b0654e368b radeonsi: add support for indirect samplers (v2)
This adds the frontend support, however the llvm
backend produces the wrong pattern, however
we can conditionalise enabling ARB_gpu_shader5
on whatever version of llvm we fix this in.

v2: drop unneeded sampler_indirect checks (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-25 01:06:42 +01:00
Dave Airlie
4b6c1efb22 radeonsi: split out interpolation input selection
This is prep work for using it in the interpolation code
later.

Also add storage for the input interpolation mode so we
can pick it up later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-25 01:06:41 +01:00
Dave Airlie
730e8c4410 radeonsi: separate out load sample position
This is prep work for reusing this in the interpolation
code later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-25 01:06:41 +01:00
Ilia Mirkin
b42444ffed glsl: recognize ARB_shading_language_420pack to be enabled with 4.20+
The 420pack extension enables various GLSL rules that need to be applied
to any GLSL 4.20+ shader even if the extension is not explicitly
enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-07-24 18:25:06 -04:00
Ilia Mirkin
f8059c9f3f mesa: fix error checking for getting zero-sized texture images
Commit 17f714836 (mesa: rearrange texture error checking order) moved
the width/height/depth == 0 allowance before checking if the image was
there. This was in part due to depth having to be == 1 for 2D images and
width having to be == 1 for 1D images. Instead relax the height/depth
checks to also accept 0 as valid.

With this change,

  bin/arb_direct_state_access-get-textures

starts passing again.

Fixes: 17f714836 (mesa: rearrange texture error checking order)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-24 17:09:27 -04:00
Anuj Phogat
56980f107e mesa: Fix typo in a comment
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-24 10:48:59 -07:00
Anuj Phogat
a9cbb2c722 meta: Use _mesa_need_rgb_to_luminance_conversion() in decompress_texture_image()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:59 -07:00
Anuj Phogat
4b8745680f mesa: Change the signature of _mesa_need_rgb_to_luminance_conversion()
This allows us to handle cases when texImage->_BaseFormat doesn't match
_mesa_format_get_base_format(texImage->Format). _BaseFormat is what we
care about in this function.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
aa40546b2d meta: Fix reading luminance texture as rgba in _mesa_meta_pbo_GetTexSubImage()
After recent addition of pbo testing in piglit test getteximage-luminance,
it fails on i965. This patch makes a sub test pass.

This patch adds a clear color operation to meta pbo path, which I think is
better than falling back to software path.

V2: Fix color mask for GL_LUMINANCE_ALPHA

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
be405ee334 meta: Use _mesa_need_luminance_to_rgb_conversion() in decompress_texture_image()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
c59c0f8a42 mesa: Add a helper function _mesa_need_luminance_to_rgb_conversion()
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
9fff00d387 meta: Use _mesa_unpack_format_to_base_format() to handle integer formats
Replace a call to mesa_base_tex_format() that handles only internal
formats with a call to the new _mesa_unpack_format_to_base_format()
function that handles allowed unpack formats and does not care for
internal formats at all.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
0127580647 mesa: Add a helper function _mesa_unpack_format_to_base_format()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
bbbefec732 mesa: Set green, blue channels to zero only for formats with these components
This is an optimization which avoids setting pixel transfer operations
when not required. _mesa_ReadPixels falls back to slower path if
transfer operations are set.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
ca4e17e03e meta: Don't do fragment color clamping in _mesa_meta_pbo_GetTexSubImage
_mesa_meta_pbo_GetTexSubImage() uses _mesa_meta_BlitFrameBuffer(),
which will do fragment clamping if enabled. But fragment clamping
doesn't affect ReadPixels and GetTexImage.

Without this patch, piglit test arb_color_buffer_float-clear fails,
when forced to use the meta pbo path.

v2: Apply this fix to both glReadPixels and glGetTexImage.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
0d207905e6 meta: Abort meta pbo path if readpixels need signed-unsigned conversion
Meta pbo path for ReadPixels rely on BlitFramebuffer which doesn't support
signed to unsigned integer conversions and vice versa.

Without this patch, piglit test fbo_integer_readpixels_sint_uint fails, when
forced to use the meta pbo path.

v2: Make need_signed_unsigned_int_conversion() a static function. (Iago)
    Bump up the comment and the commit message. (Jason)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Iago Toral <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
1252d53c19 meta: Fix transfer operations check in meta pbo path for readpixels
Currently used ctx->_ImageTransferState check is not sufficient
because it doesn't include the read color clamping enabled with
GL_CLAMP_READ_COLOR. So, use the helper function
_mesa_get_readpixels_transfer_ops().

Also, transfer operations don't affect glGetTexImage(). So, do
the check only for glReadPixles.

Without this patch, arb_color_buffer_float-readpixels test fails, when
forced to use meta pbo path.

V2: Add a comment and bump up the commit message.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Anuj Phogat
7974e23be9 mesa: Turn get_readpixels_transfer_ops() in to a global function
This utility function is utilized in a later patch.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-24 10:48:58 -07:00
Chris Wilson
013d731a67 i965: Use updated kernel interface for accurate TIMESTAMP reads
I was mistaken, I thought we already had fixed this in the kernel a
couple of years ago. We had not, and the broken read (the hardware
shifts the register output on 64bit kernels, but not on 32bit kernels) is
now enshrined into the ABI. I also had the buggy architecture reversed,
believing it to be 32bit that had the shifted results. On the basis of
those mistakes, I wrote

commit c8d3ebaffc
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Apr 29 13:32:38 2015 +0100

    i965: Query whether we have kernel support for the TIMESTAMP register once

Now that we do have an extended register read interface for always
reporting the full 36bit TIMESTAMP (irrespective of whether the hardware
is buggy or not), make use of it and in the process fix my reversed
detection of the buggy reads for unpatched kernels.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Tested-and-acked-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
2015-07-24 17:38:55 +01:00
Samuel Iglesias Gonsalvez
30f97b5e52 glsl/glcpp: fix SIGSEGV when checking error condition for macro redefinition
Commit a6e9cd14c does not take into account than node_{a,b}->next could be NULL
in some circumstances, such as in a shader containing this code:

  #define A 1 /* comment */
  #define A 1 /* comment */

This patch fixes the segmentation fault for cases like that.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91290
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-07-24 07:01:13 +02:00
Ilia Mirkin
24a7d4e437 nvc0/ir: per-patch vars are in a separate address space
There's no need to attempt to avoid overlapping generic i/o with patch
i/o. By the same token, we can't merge patch and non-patch loads/stores.

This fixes at least the

  tes-both-input-array-*-index-rd

tessellation variable-indexing tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-24 00:23:00 -04:00
Ilia Mirkin
9d60793a03 nvc0/ir: kepler can't do indirect shader input/output loads directly
There's a special AL2P instruction (called AFETCH in nv50 ir) which
computes a "physical" value to be used with indirect addressing with ALD.

Fixes

  tcs-input-array-*-index-rd
  tcs-output-array-*-index-wr

varying-indexing tessellation tests on Kepler.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 23:47:11 -04:00
Vinson Lee
22c9339abf radeon: Silence GCC unused-but-set-variable warnings.
radeon_fbo.c: In function 'radeon_map_renderbuffer_s8z24':
radeon_fbo.c:162:9: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
     int ret;
         ^
radeon_fbo.c: In function 'radeon_map_renderbuffer_z16':
radeon_fbo.c:200:9: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
     int ret;
         ^
radeon_fbo.c: In function 'radeon_map_renderbuffer':
radeon_fbo.c:242:8: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
    int ret;
        ^
radeon_fbo.c: In function 'radeon_unmap_renderbuffer':
radeon_fbo.c:419:14: warning: variable 'ok' set but not used [-Wunused-but-set-variable]
    GLboolean ok;
              ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-23 19:47:21 -07:00
Rhys Kidd
00fb21e744 doxygen: Link GLvector4f struct members properly, avoiding invalid XML/HTML warning
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-23 20:19:51 -06:00
Rhys Kidd
bc893e3dad doxygen: Correct grammatical typo in math/m_vector.h
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-23 20:19:51 -06:00
Brian Paul
28db89fa8b mesa: minor clean-ups in shaderapi.c
80-column wrapping.  Move break statements.  Indentation fixes.
2015-07-23 20:19:51 -06:00
Brian Paul
dd86fbeaaa mesa: fix _mesa_error() compiler warnings in shaderapi.c
Fix many instances of:
main/shaderapi.c: In function '_mesa_GetSubroutineUniformLocation':
main/shaderapi.c:2176:7: warning: format not a string literal and no format arguments [-Wformat-security]
       _mesa_error(ctx, GL_INVALID_OPERATION, api_name);
       ^

Ideally, many of these error messages should be improved to indicate
which argument is incorrect as we do in other parts of Mesa.

Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
2015-07-23 20:19:51 -06:00
Brian Paul
43b69aad19 st/mesa: remove unused 'samp' function parameters
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-23 20:19:51 -06:00
Brian Paul
d7cb3f76f5 st/mesa: add comments on a few sampler view functions
Trivial.
2015-07-23 20:19:51 -06:00
Brian Paul
3afa40e433 mesa: do more thorough target checking in compressed_subtexture_target_check()
When we're error-checking the target, we also need to check if the
corresponding extension is supported.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-07-23 20:19:50 -06:00
Brian Paul
05a44ab328 mesa: another target fix in compressed_subtexture_target_check()
The previous fix added GL_TEXTURE_CUBE_MAP_ARRAY but we also need
to support GL_TEXTURE_CUBE_MAP (via DSA).

So in the end, GL_TEXTURE_3D is the only (legal) target for
glCompressedTex*SubImage3D() which needs additional compression
format checking.  GL_TEXTURE_2D_ARRAY, GL_TEXTURE_CUBE_MAP_ARRAY
and GL_TEXTURE_CUBE_MAP are basically 2D images which support all
compressed formats.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-07-23 20:19:50 -06:00
Brian Paul
81e2c256e9 mesa: simplify format check in compressed_subtexture_target_check()
Lose the invalidformat local variable.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-07-23 20:19:50 -06:00
Brian Paul
dbefffa5b4 mesa: initialize variables to silence compiler warnings
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-23 20:19:50 -06:00
Dave Airlie
319b83b3ee apiexec: remove leading gl from shader subroutine interfaces
Remove the gl at the start, stared at this for a while
yesterday, totally missed it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91441
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-24 12:07:11 +10:00
Ilia Mirkin
0a51acbb46 docs: remove expanded ARB_dsa notes
This doesn't provide much value since it's all done. The qbo interaction
is fairly trivial.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-23 21:54:50 -04:00
Ilia Mirkin
7e0036a492 nvc0/ir: tess factors are now sysvals, adapt codegen to expect that
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 21:46:09 -04:00
Dave Airlie
7c4768540d docs/GL3.txt: ARB_shader_precision
This extension is about setting expectation on GL4.1 implementations
rather than actually enforcing things. So once you support GLSL 410
then you support this in theory.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-24 11:11:59 +10:00
Dave Airlie
80511d176a i965: add support for ARB_shader_subroutine
This just adds some missing pieces to nir/i965,
it is lightly tested on my Haswell.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-24 10:25:08 +10:00
Ilia Mirkin
17f7148369 mesa: rearrange texture error checking order
This moves the width/height/depth == 0 check to the front and avoids
doing any other checking when that is the case.

Also moves the dimensions check after the format/type checks so that we
don't bail out with success on a width/height/depth == 0 request when
the format/type don't match.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91425
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-23 16:22:52 -04:00
Ilia Mirkin
c844afe94e mesa: adjust error message when there's a missing teximage
The current message makes it seem like the zoffset is invalid.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-23 16:22:52 -04:00
Marek Olšák
a6f39ec1c5 Revert "Match swrast modes more loosely."
This reverts commit f3728a16c9.

It broke glxgears on radeonsi. The window was just black.
2015-07-23 21:53:06 +02:00
Jose Fonseca
d6b50ba980 gallivm: Fix profile build. 2015-07-23 16:54:02 +01:00
Jose Fonseca
c6267ebd6c gallium/util: Stop bundling our snprintf implementation.
Use MSVCRT functions instead.  Their semantics are slightly
different but they can be made to work as expected.

Also, use the same code paths for both MSVCRT and MinGW.

https://bugs.freedesktop.org/show_bug.cgi?id=91418

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-23 15:57:53 +01:00
Tom Hughes
f3728a16c9 Match swrast modes more loosely.
https://bugs.freedesktop.org/show_bug.cgi?id=90817

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-23 15:57:53 +01:00
Eduardo Lima Mitev
b469cf10ef mesa: Fix error in target validation of glCompressedTex(ture)SubImage3D() calls
Basically, two different target error checks are chained consecutively, and the
second one is executed regardless the result of the first one. This produces an
incorrect error if the first check fails but is overrided by the second.

This patch conditions the execution of the second check to a successful pass of
the first one.

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-07-23 16:31:14 +02:00
Tom Stellard
a3b53beaa0 gallivm: Add ifdefs so raw_debug_stream is only defined when used
Its only use is to implement a custom version of LLVMDumpValue
on some Windows and embedded platforms.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-23 14:13:03 +00:00
Tom Stellard
9f7a68feaf gallivm: Don't use raw_debug_ostream for dissasembling
All LLVM API calls that require an ostream object have been removed from
the disassemble() function, so we don't need to use this class to wrap
_debug_printf() we can just call this function directly.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-23 14:12:56 +00:00
Ilia Mirkin
6d8e466792 docs: mark off tess for nvc0 2015-07-23 03:39:46 -04:00
Ilia Mirkin
88818c4cd6 gk110/ir: fake BAR support
Makes things sorta work until we figure out the real way to do this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
fd092328e1 nvc0/ir: cleanup private enums that have graduated to gallium
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
da89e75d9c nvc0/ir: allow tess eval output loads to be CSE'd
These only happen for gl_TessCoord which are constant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
77672cdb64 nvc0/ir: add hazard for 2nd dim of vfetch/load indirect argument
Apparently a multi-word load can potentially overwrite the indirect
sources, so make sure that RA picks different registers for those.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
7cf2bffe82 nvc0/ir: patch vertex count is stored in the upper bits 2015-07-23 03:33:09 -04:00
Ilia Mirkin
e3e2df01bf nvc0/ir: add support for reading outputs in tess control shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
71744c0692 nvc0/ir: set perPatch flag on load/stores to per-patch varyings
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
c2350fb3db nvc0/ir: populate info structure based on new tess properties
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
59438a4d0e nvc0/ir: mark varyings as per-patch based on semantic name
Also add proper handling for PATCH semantics

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
4b2a58a523 nvc0: TESSCOORD comes in as a sysval, not an input
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
c8e5337a9a nvc0: add handling for set_tess_state callback
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
d1ffdebce6 nvc0: add support for setting patch vertices at draw time
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
b9ea557fd0 nvc0: support MAX_SHADER_PATCH_VARYINGS 2015-07-23 03:33:08 -04:00
Ilia Mirkin
f97c14f9e4 nvc0: preliminary tess support
Uncomment the various functionality that was already there and add in
obvious missing bits that parallel vp/gp/fp functionality.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Dave Airlie
65d84daf29 docs/GL3.txt: update ARB_shader_subroutine status.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:26:13 +10:00
Dave Airlie
c3fad009c5 st/mesa: enable shader subroutine
since this touches drivers, only enable it on gallium
for now for drivers reporting GLSL 1.30 or above.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:26:09 +10:00
Dave Airlie
a922c27993 st/mesa: add subroutine bits (v1.1)
Just add support for the subroutine type to the
glsl->tgsi convertor.

v1.1: add subroutine to int support.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:26:04 +10:00
Dave Airlie
6f57fda494 mesa: fill out the ARB_shader_subroutine APIs
This fleshes out the APIs, using the program resource
APIs where they should match.

It also sets the default values to valid subroutines.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:59 +10:00
Dave Airlie
3f4f3e2d48 program: add subroutine uniform support (v1.1)
Add support for the subroutine uniform type ir->mesa.cpp

v1.1: add subroutine to int to switch

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:55 +10:00
Dave Airlie
0a18f16015 program_resource: add subroutine support (v3.1)
This fleshes out the ARB_program_query support for the
APIs that ARB_shader_subroutine introduces, leaving
some TODOs for later addition.

v2: reworked for lots of the ARB_program_interface_query
entry points and tests
v3: use common function to test for subroutine support
v3.1: add tess, fix missing breaks

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:49 +10:00
Dave Airlie
60266863d8 glsl: add uniform and program resource support (v2)
This adds linker support for subroutine uniforms, they
have some subtle differences from real uniforms, we also hide
them and they are given internal uniform names.

This also adds the subroutine locations and subroutine uniforms
to the program resource tracking for later use.

v1.1: drop is_subroutine_def

v2: handle explicit location properly, ARB_explicit_location
has a lot of language for subroutine shaders.
Calculate a link time the number of compatible subroutines
for a uniform, to make program resource easier later.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:43 +10:00
Dave Airlie
44ea8b9b8e mesa/mtypes: add gl_subroutine_function and uniform storage to shader (v2)
This adds the necessary storage for subroutine info to gl_shader.

v2: add comments, rename one member
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:39 +10:00
Dave Airlie
7dd429e8f7 glsl/ir: add subroutine lowering pass (v2.3)
This lowers the enhanced ir_call using the lookaside table
of subroutines into an if ladder. This initially was done
at the AST level but it caused some ordering issues so a separate
pass was required.

v2: clone return value derefs.
v2.1: update for subroutine->int convert.
v2.2: add a clone for the array index

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:37 +10:00
Dave Airlie
65ac360823 glsl: add ast/parser support for subroutine parsing storage (v3.2)
This is the guts of the GLSL parser and AST support for
shader subroutines.

The code creates a subroutine type in the parser, and
uses that there to validate the identifiers. The parser
also distinguishes between subroutine types/function prototypes
/uniforms and subroutine defintions for functions.

Then in the AST conversion it recreates the types, and
stores the subroutine definition info or subroutine info
into the ir_function along with a side lookup table in
the parser state. It also converts subroutine calls into
the enhanced ir_call.

v2: move to handling method calls in
function handling not in field selection.
v3: merge Chris's previous parser patches in here, to
make it clearer what's changed in one place.
v3.1: add more documentation, drop unused include
v3.2: drop is_subroutine_def

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:35 +10:00
Dave Airlie
884df9ef83 glsl/ir: allow ir_call to handle subroutine calling
This adds a ir_variable which contains the subroutine uniform
and an array rvalue for the deref of that uniform, these
are stored in the ir_call and lowered later.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:34 +10:00
Dave Airlie
30681c3bb8 glsl/ir: add subroutine information storage to ir_function (v1.1)
We need to store two sets of info into the ir_function,
if this is a function definition with a subroutine list
(subroutine_def) or if it a subroutine prototype.

v1.1: add some more documentation.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:32 +10:00
Dave Airlie
d8a250ce5e mesa: add function to check if shader subroutines are enabled.
This checks if core profile and shader subroutine extension
is enabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:31 +10:00
Dave Airlie
670b9e56da mesa: add inline conversion functions for ARB_shader_subroutine (v2)
This handles converting the shader stages to the internal
prefix along with the program resource interfaces.

v2: add tess support

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:29 +10:00
Dave Airlie
f73ef82486 glsl: don't eliminate subroutine types.
This stops dead code from removing subroutines types,
we need these for the queries to work properly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:27 +10:00
Dave Airlie
57f24299b7 glsl/types: add new subroutine type (v3.2)
This type will be used to store the name of subroutine types

as in subroutine void myfunc(void);
will store myfunc into a subroutine type.

This is required to the parser can identify a subroutine
type in a uniform decleration as a valid type, and also for
looking up the type later.

Also add contains_subroutine method.

v2: handle subroutine to int comparisons, needed
for lowering pass.
v3: do subroutine to int with it's own IR
operation to avoid hacking on asserts (Kayden)
v3.1: fix warnings in this patch, fix nir,
fix tgsi
v3.2: fixup tests

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>

tests: fix warnings
2015-07-23 17:25:25 +10:00
Chris Forbes
d16ff8ac78 glsl: Make subroutine a reserved keyword
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:23 +10:00
Dave Airlie
24b0e50683 dispatch_sanity: add shader subroutine to fix make check
Add the shader subroutine to the core only API list,
and fixup dispatch_sanity to suit.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:16 +10:00
Chris Forbes
cc172fddf3 glsl: Add extension plumbing and define for ARB_shader_subroutine
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:15 +10:00
Chris Forbes
25d6f56c08 mesa: Add glGet support for ARB_shader_subroutine implementation limits
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:14 +10:00
Chris Forbes
4c7b007104 mesa: Add extension tracking for arb_shader_subroutine (v2)
v2: [airlied]: merge version check update.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:13 +10:00
Chris Forbes
b8f3e316bc glapi: Add ARB_shader_subroutine functions and enums (v2)
v2: fix output="true" and LENGTH typo

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:13 +10:00
Chris Forbes
2ffe9b5421 mesa: Add stubs for ARB_shader_subroutine entrypoints
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 17:25:11 +10:00
Dave Airlie
2ca1f76781 dispatch_sanity.cpp: remove commented out tess entries
These entries were put in the GL4.0 section, so removed the commented
out ones.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 12:46:46 +10:00
Dave Airlie
18955e8a80 glsl/tests: fix varying_test since tess changes.
This fixes make check since the tess changes.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 12:46:42 +10:00
Dave Airlie
b406c34a65 i965: fix warning since tess merge.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-23 10:39:26 +10:00
Marek Olšák
bac12c8948 radeonsi: enable tessellation, update GL3.txt & release notes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
a193c4978b radeonsi: add scratch buffer support for tessellation shaders
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
12df9a7876 radeonsi: update invariant registers for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
99bf47f603 radeonsi: add assertions into draw_vbo and check tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
5aa5f90823 radeonsi: set the rasterization primitive type for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
3344699243 radeonsi: set VGT_LS_HS_CONFIG for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
09d02fa463 radeonsi: update IA_MULTI_VGT_PARAM for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
74c1001d13 radeonsi: add derived tessellation state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
db267a04ce radeonsi: implement a fixed-function tessellation control shader and its state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
b6f4fdf6a9 radeonsi: set up a ring buffer for tessellation factors
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
ebfd9e0071 radeonsi: add tessellation shader states
ls_rsrc# will be emitted as part of the derived tessellation state

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
aa2fa6723a radeonsi: update si_get_vs_info and si_get_vs_state for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
fff16e4ad2 radeonsi: add shader code generation for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
4805685b6f radeonsi: implement TGSI_OPCODE_BARRIER
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
59b3556f4c radeonsi: program VGT_SHADER_STAGES_EN for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
d9d0de4d28 radeonsi: add translation of PATCH primitives
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
55b6f1caae radeonsi: add support for tessellation shader resources and samplers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
d1f43a7e5b radeonsi: add code for creating, binding and destroying tessellation shaders
This doesn't do anything yet.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
c2670463fd radeonsi: add debug flags for dumping tessellation shaders
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
3ce91c727f radeonsi: rework how shader pointers to descriptors are set
This is mainly needed for tessellation where a VS can be bound as VS, ES,
or LS, and TES (tess. evaluationshader) can be bound as VS or ES or neither.
Therefore we need the ability to move pointers to descriptors between
shaders arbitrarily.

The idea is that the context has a mapping from PIPE_SHADER_x to
SPI_SHADER_USER_DATA_x. After a shader is enabled or disabled,
si_shader_change_notify should be called to update this mapping accordingly.

There is a dirty flag for each shader pointer, but only one emit function
for all pointers in the whole context, whose code and logic is separated
from descriptors.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
57b6f8d9f9 radeonsi: rename build_streamout_store -> build_tbuffer_store_dwords
It will be reused later.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
f66844820e radeonsi: separate primitive ID computation
Support for new shader stages will be added here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
aa1f2af572 radeonsi: move declaring streamout parameters to its own function
It will be reused later.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
2ecb06b946 radeonsi: make ES2GS offset sgpr location dynamic
It will have a different location in the tessellation evaluation shader.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
1bc0fba572 gallium/radeon: expose emit_fetch
Radeonsi will use this.
2015-07-23 00:59:31 +02:00
Marek Olšák
a3be59b4a9 gallium/radeon: expose LLVM functions implementing emit_store
emit_store will be reimplemented for tessellation control shader outputs
where only radeon_llvm_saturate will be used, but radeonsi will want to
fall back to radeon_llvm_emit_store for other register types.

This exposes both functions.
2015-07-23 00:59:31 +02:00
Marek Olšák
7626ad8d6d st/mesa: enable tessellation if the driver supports it 2015-07-23 00:59:30 +02:00
Marek Olšák
bda9094f1d st/mesa: set default tessellation levels 2015-07-23 00:59:30 +02:00
Ilia Mirkin
82f7fad966 st/mesa: add barrier support 2015-07-23 00:59:30 +02:00
Ilia Mirkin
8f40428afb st/mesa: disable copy propagation for tessellation shaders
This can't work due to shared inputs and outputs and barriers.
2015-07-23 00:59:30 +02:00
Ilia Mirkin
f4c13fad65 st/mesa: set vertices_per_patch when drawing 2015-07-23 00:59:30 +02:00
Ilia Mirkin
37d1809dd7 st/mesa: add 2d indexing support to outputs 2015-07-23 00:59:30 +02:00
Marek Olšák
c9998617a8 st/mesa: handle tessellation 2D varyings correctly 2015-07-23 00:59:30 +02:00
Ilia Mirkin
05c847433f st/mesa: lower gl_TessLevel from float[] to vecn 2015-07-23 00:59:30 +02:00
Ilia Mirkin
d00e2763b1 st/mesa: query shader CAPs for tessellation
The MaxTessPatchComponents query added by Marek.
2015-07-23 00:59:30 +02:00
Ilia Mirkin
40bc1c32d2 st/mesa: add texture updates for tessellation programs 2015-07-23 00:59:29 +02:00
Ilia Mirkin
bda79139d4 st/mesa: handle constbufs/ubos for tessellation shaders 2015-07-23 00:59:29 +02:00
Marek Olšák
a58a66fe85 st/mesa: add conversion for tessellation shaders
Based on code from Ilia Mirkin <imirkin@alum.mit.edu>.
2015-07-23 00:59:29 +02:00
Ilia Mirkin
ba9fb96f86 st/mesa: add tessellation shader states
additional fixes by Marek
2015-07-23 00:59:29 +02:00
Marek Olšák
df4ee8ef36 mesa: implement GL_IS_PER_PATCH
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:29 +02:00
Marek Olšák
0af240e940 glsl: use separate varying slots for patch varyings
The idea is to allow 32 normal varyings and 32 patch varyings,
a total of 64. Previously, only a total of 32 was allowed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:29 +02:00
Marek Olšák
d070238944 glsl: fix locations of 2-dimensional varyings without varying packing (v2)
v2: renamed producer/consumer_type -> producer/consumer_stage

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:29 +02:00
Marek Olšák
41acdae2e9 glsl: don't demote tess control shader outputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:29 +02:00
Marek Olšák
3a4b87f26d glsl: disable varying packing between tessellation shaders
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:29 +02:00
Marek Olšák
d5787e7eef glsl: allow indexing of gl_out with a non-const if length isn't known
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
19f46d0540 glsl: allow redeclaration of TCS gl_out[]
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
8cf72972ce glsl: validate restrictions on use of barrier()
With the exception of always-taken switch cases (which are
indistinguishable from straight line code in our IR), this
disallows use of the builtin barrier() function in all the
places it may not appear.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Marek Olšák
799afadf51 glsl: allow barrier() in tessellation control shaders
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
df16e0dd63 glsl: analyze TES usage of gl_ClipDistance
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
0e94f350ee glsl: push vertex count determination down one level
We have the prog here, so we don't need the caller to work this out for
us.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Ilia Mirkin
567f1b2ee8 glsl: pass shader stage to lower_output_reads and handle tess control
Tessellation control outputs can be read in directly without first
having been written. Accessing these will require some special logic
anyways, so just let them through.

V2: Never lower tess control output reads, whether patch or not -- both
can be read back by other threads.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
61846f222f glsl: properly size unsized arrays in tess stages
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
d563946a40 glsl: restrict indexing for writes to TCS outputs to gl_InvocationID
Marek: handle ir_swizzle

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:28 +02:00
Chris Forbes
da7adb99e8 glsl: add builtin constants for ARB_tessellation_shader
Limits from other extensions added by Marek.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:27 +02:00
Chris Forbes
b7f98f9f09 glsl: allow nonconst indexing of arrays where we can work out an implicit size
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:27 +02:00
Chris Forbes
64a0ae88b9 glsl: relax unsized input/output block arrays for TCS/TES
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-23 00:59:27 +02:00
Marek Olšák
2abbe941e1 glsl: add the tessellation extension to the list for the "layout" qualifier
This is technically not needed, but it makes the compiler return a better
error message if tessellation is used with GLSL < 1.50.

Instead of:
    error: syntax error, unexpected NEW_IDENTIFIER, expecting $end
It returns:
    error: #version 150 layout qualifier `triangles' used

And the tessellation spec says:
    OpenGL 3.2 and GLSL 1.50 are required.
So it makes perfect sense.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:27 +02:00
Marek Olšák
fb800b3dcd glsl: don't lower variable indexing on non-patch tessellation inputs/outputs
There is no way to lower them, because the array sizes are unknown
at compile time.

Based on a patch from: Fabian Bieler <fabianbieler@fastmail.fm>

v2: add comments

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-23 00:59:27 +02:00
Fabian Bieler
0cfac91755 glsl: make stand-alone compiler work with tessellation shaders.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:27 +02:00
Fabian Bieler
c53aa26379 glsl: add "in" or "out" prefix to name when flattening interface blocks
This is to prevent a name conflict in tessellation shaders built-in interface
blocks.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-23 00:59:27 +02:00
Fabian Bieler
73a9a1539a glsl: lower gl_TessLevel* from float[n] to vecn.
Similar to gl_ClipDistance -> gl_ClipDistanceMESA

v2: - renamed is_mesa_var to lowered_builtin_array_variable
    - moved LowerTessLevel into gl_constants
    - cosmetic changes in lower_tess_level.cpp

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:27 +02:00
Fabian Bieler
54f2950297 glsl: make lower_clip_distance work with tessellation shaders.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-23 00:59:27 +02:00
Chris Forbes
7c758c5a21 glsl: allow linking of tessellation shaders.
Marek: require a tess eval shader if a tess control shader is present

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-23 00:59:27 +02:00
Fabian Bieler
1009b3311f glsl: add the patch in/out qualifier (v2)
v2: Dropped some unrelated reordering in glsl_parser.yy as Ken suggested.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Fabian Bieler
1036b024d4 glsl: add tessellation shader defines and built-in variables.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Fabian Bieler
497eb29583 glsl: add tessellation shader parsing support (v2)
v2: Fixed things that Ken suggested.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Marek Olšák
206af9d049 mesa: don't allow drawing with tess ctrl shader and without tess eval shader
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Marek Olšák
3d528e7c47 mesa: handle tessellation shaders in use_shader_program
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Marek Olšák
882413f1c5 mesa: add program interface queries for tessellation shaders
Based on a patch by Chris Forbes <chrisf@ijw.co.nz>.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Fabian Bieler
550a570c53 mesa: add misc tessellation shader stuff
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Fabian Bieler
6823d713c6 mesa: add tessellation shader getters (v3)
Tessellation dependencies added by Marek.

v2: require tessellation in addition to atomics/images for some glGet queries

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:26 +02:00
Marek Olšák
cb0c12512c mesa: allow setting of patch parameters.
Based on a patch from Fabian Bieler <fabianbieler@fastmail.fm>.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Chris Forbes
e32e546c17 mesa: require VS if TCS or TES is present in pipeline
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Chris Forbes
a30cc28829 mesa: allow tess stages in glUseProgramStages
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Fabian Bieler
6435b2909e mesa: support tess stages in glGetProgramPipelineiv
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Marek Olšák
5852b5d2fa mesa: take tessellation into account when validating GS input primitive mode
I've reported the bug in the Khronos bugzilla.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Chris Forbes
8e758c3a74 mesa: allow drawing of patch primitives
Cosmetic changes and fixes by Marek.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Marek Olšák
fa602c2088 mesa: add _mesa_has_tessellation
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Fabian Bieler
a894ed8293 mesa: add misc tessellation shader support
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Fabian Bieler
78d3054980 mesa: add tessellation shader init functions.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Chris Forbes
bb97cc66c1 mesa: add tessellation shader state and limits
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:25 +02:00
Fabian Bieler
a2af956963 mesa: add tessellation shader enums
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:24 +02:00
Fabian Bieler
df3860a3e3 mesa: add tessellation shader structs
Marek: remove unused members, cleanup

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:24 +02:00
Fabian Bieler
e2b59a39cb mapi: add ARB_tessellation_shader
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:24 +02:00
Marek Olšák
5ead448719 drirc: drop support for Heaven 3.0, fixes tessellation in 4.0
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-23 00:59:24 +02:00
Marek Olšák
6b37643b82 winsys/radeon: implement buffer_unmap
This has been a no-op due to performance concerns. From now on, drivers
should decide when they don't want to unmap, not the winsys.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
5e3974338e gallium/radeon: remove buffer_unmap calls that can potentially decrease perf
buffer_unmap is currently a no-op on radeon and done correctly on amdgpu.
I plan to fix it for radeon, but before that, all occurences of buffer_unmap
that can negatively affect performance in the future must be removed.

There are 2 reasons for removing buffer_unmap calls:
- There is a likelihood that buffer_map will be called again, so we don't
  want to unmap yet.
- The buffer is being released, which automatically unmaps it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
0aa2446e2c radeonsi: remove switch statement in si_create_context
and make si_init_config static

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
46b2b3bda8 radeonsi: don't change pipe_resource in resource_copy_region
Copied from r600g. pipe_resource can be shared by multiple threads, so we
shouldn't change it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
50a957c5de radeonsi: upload shader rodata after updating scratch relocations
Cc: 10.5 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
e4d738f6c6 radeonsi: remove redundant parameter in si_shader_binary_read
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:23 +02:00
Marek Olšák
2369dc8382 cso: eliminate some sampler function wrappers 2015-07-23 00:59:23 +02:00
Marek Olšák
68dcbf4c46 gallium/tests: use cso_set_samplers 2015-07-23 00:59:23 +02:00
Marek Olšák
85f5722f70 gallium/util: use cso_set_samplers 2015-07-23 00:59:23 +02:00
Marek Olšák
5ef1782b9f st/mesa: use cso_set_samplers 2015-07-23 00:59:23 +02:00
Marek Olšák
4ef7d93a94 cso: remove clip state handling
There is no need for this.

v2: handle redundant clip state changes in st/mesa
2015-07-23 00:59:21 +02:00
Marek Olšák
b7492a1f45 cso: only allow saving and restoring fragment sampler states 2015-07-22 23:56:00 +02:00
Marek Olšák
4e8bbed926 cso: drop inefficient checking for redundant sampler state changes
Drivers can do this better, because they can skip redundant state changes
at per-slot granularity.
2015-07-22 23:56:00 +02:00
Marek Olšák
3639d66a47 cso: only allow saving and restoring fragment sampler views
Not needed for other shader stages.
2015-07-22 23:56:00 +02:00
Marek Olšák
2d8213bfa9 gallium/util: improve dump functions
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-22 23:56:00 +02:00
Marek Olšák
8141b4cee5 tgsi: allow dumping to a file directly 2015-07-22 23:56:00 +02:00
Marek Olšák
d082c53249 st/mesa: don't call st_validate_state in BlitFramebuffer
None of the draw states are used here.
This fixes a crash in piglit: ext_framebuffer_blit/blit-early

Calling st_manager_validate_framebuffers is the minimum requirement here.

Cc: mesa-stable@lists.freedesktop.org
2015-07-22 23:56:00 +02:00
Marek Olšák
2f50fc040c docs/relnotes: document new EGL extensions and EGL 1.5 2015-07-22 23:56:00 +02:00
Anatoli Antonovitch
1828357629 st/dri: enable 3D textures and sRGB colorspace for EGL
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-07-22 23:56:00 +02:00
Marek Olšák
4f57ccd02d egl,dri_interface: use DRI2rendererQueryExtension to enable 3D textures & sRGB
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 23:56:00 +02:00
Marek Olšák
c2c2e9ab60 egl: implement EGL_KHR_gl_colorspace (v2)
v2: add missing "break"

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 23:56:00 +02:00
Marek Olšák
956ebf41ac st/dri: expose sRGB visuals (v2)
v2: The fix for the darkness in Ubuntu Unity is in the hunk
    with the 4-line comment.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 23:56:00 +02:00
Dylan Baker
b06a6852ff glapi: fix argument parsing in glX_proto_recv.py
One of the plugins I use with vim "helpfully" added an underscore to the
front of mode for kicks.

Obviously this isn't a feature used very often because it's been broken
since d986cb7c70 (since May 20th), and no one has noticed.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
461b4b103f egl: android: remove DRM_GRALLOC_TOP hack
Now that the drm_gralloc module exports the correct includes we can get
rid of this hack.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Varad Gautam <varadgautam@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
e2ef659c2e egl: remove old makefile.sources
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
1040a861a8 android: rework the EGL build
See previous two commits for details.

v2: Don't forget git mv, bring back DRM_GRALLOC_TOP. Spotted by Varad.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Tested-by: Varad Gautam <varadgautam@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
e7e29189e2 scons: rework the EGL build
The scons equivalent of the previous commit - just fold the almost
identical driver + main Sconscripts.

Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
e342039612 automake: rework the EGL build
Simplify things by merging the two makefiles. This way we can combine
the duplicated HAVE_PLATFORM_ checks, and build the library without
having a separate static library.

v2: use $() when referencing variables, use correct define (Matt)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
0399d7ab3f gbm: do not build intermittent libgbm_dri static library
The only user of it (libgbm.la) immediately links it. Just build it
directly into the library.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
8e5e18ac28 egl: automake: remove unused HAVE_XCB_DRI2 define
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
a1202807dc egl: remove unused _EGL_DRIVER_SEARCH_DIR define
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
0b915856ba egl/haiku: remove unused DEFAULT_DRIVER_DIR define
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:27 +01:00
Emil Velikov
c17e01748e egl: remove final Windows specific workaround
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
3593f37fd7 egl: remove custom string functions
Support for Windows has been removed for a while now, and virtually
every POSIX compliant system provides strcasecmp, strdup and snprintf.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
d62879565a egl: remove _EGL_PLATFORM_WINDOWS enum
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
32debea337 egl: remove final references of platform_null
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
dc1ece3748 egl: remove flatten HAVE_SHARED_GLAPI
It is simply not possible to use the dri backend without shared glapi,
as the alternative provider (libGL) is not always present. We have fixed
the build for a while now, so we can rip this out.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
78674631a2 egl: remove the non-haiku scons build
It has been broken since 2011 with commit c98ea26e16b(egl: Make
egl_dri2 and egl_glx built-in drivers.). When the backends got merged
into the main library each entry point was guarded by a
_EGL_BUILT_IN_DRIVER_* define.

As the define was missing, the linker kindly removed the whole of the
dri2 backend, thus we did not notice any errors due to the unresolved
link to xcb and friends.

Cc: Chia-I Wu <olv@lunarg.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
ce2a4bd541 dri/common: remove unused drm_version variable
As of last commit the only user of it (radeon/r200) no longer uses it.
As such let's remove it and cleanup the nasty hacks that we had in place
to support this.

v2: Leave LIBDRM_CFLAGS around.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
2015-07-22 16:35:26 +01:00
Emil Velikov
5284e9e2c4 radeon,r200: allow hyperz for radeon DRM module v2
The original code only half considered hyperz as an option. As per
previous commit "major != 2 cannot occur" we can simply things, and
allow users to set the option if they choose to do so.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
48926da0f7 radeon,r200: remove support for UMS radeon DRM module
As mentioned by Michel Dänzer
 "FWIW though, any code which is specific to radeon DRM major version 1
  can be removed, because that's the UMS major version."

and Marek Olšák
 "major != 2" can't occur. You don't have to check the major version at
  all and you can just assume it's always 2."

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
bf6247f608 radeon,r200: remove unused variable texmicrotile
Dead since at least 2009 with commit ccf7814a315(radeon: major cleanups
removing old dead codepaths.)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-07-22 16:35:26 +01:00
Emil Velikov
66d77cd71c scons: don't build the kms-dri winsys
Same as previous commit - unused (gbm is not a thing outside the
autotools build).

v2: Remove trailing HAVE_LIBDRM.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:35:25 +01:00
Emil Velikov
a29a8b92ff android: don't build the kms-dri winsys
GBM (the only user of kms-dri) is currently not available under Android.
Considering we have no way of testing/using this let's not bother
building it for now.

Cc: Chih-Wei Huang <cwhuang@linux.org.tw>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:35:25 +01:00
Emil Velikov
fe1503fe38 android: dri: correctly set HAVE_LIBDRM
Set the macro if we're not building swrast alone.

Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-07-22 16:35:25 +01:00
Emil Velikov
787995bffb swrast: remove unneeded __NOT_HAVE_DRM_H define
No longer applicable since the cleanup of dri_interface.h.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:35:25 +01:00
Emil Velikov
9ab5b644ef dri/common: use HAVE_LIBDRM over __NOT_HAVE_DRM_H
See previous commit message for details.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:35:25 +01:00
Emil Velikov
1c328b8aa7 loader: use HAVE_LIBDRM instead of ! __NOT_HAVE_DRM_H
Double negatives in English language are normally avoided, plus the
former seems cleaner and more consistent.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-22 16:35:25 +01:00
Emil Velikov
72c784347b st/dri: unwrap/remove __NOT_HAVE_DRM_H magic
With the dri_interface.h clean of the macro, we can remove the final
only st/dri specific use of the very same.

Seemingly it was incorrectly used, as the build-time presence of dri2 is
not libdrm specific. At run-time, the code is already limited to dri2
use-cases plus returning true, when the extension is not present (or too
old) will likely lead to a crash as one tries to use it shortly after
the dri_with_format() call.

As a side effect this gives us a nice cleanup the builds.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:35:25 +01:00
Emil Velikov
0efd773f71 dri_interface: drop __NOT_HAVE_DRM_H magic
v2: use HAVE_LIBDRM macro.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-22 16:33:11 +01:00
Emil Velikov
816e4c1b5e dri/swrast: automake: add LIBDRM_CFLAGS
With the follow up commit we'll remove the __NOT_HAVE_DRM_H macro. As
requested by Ian HAVE_LIBDRM will be used instead, which will lead to
swrast including drm.h when libdrm package is available, even though we
don't need/make use of the header.

As the define is added after the AM_CFLAGS we cannnot use -UHAVE_LIBDRM,
but instead let's just add LIBDRM_CFLAGS. The latter of which will
expand to NULL when the libdrm package is not around.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:33:11 +01:00
Emil Velikov
16f6d432de configure.ac: do not set HAVE_DRI(23) when libdrm is missing
These conditionals are used to guard both dri modules and loader(s).

Currently if we try to build the gallium swrast dri module (without glx)
on a system that's missing libdrm the build will fail.

v2: Make sure we assign prior to checking the have_libdrm variable.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-22 16:33:10 +01:00
Brian Paul
fe42902009 mesa: fix typo s/glGetTextImage/glGetTexImage/
Trivial.
2015-07-22 08:17:24 -06:00
Michel Dänzer
800efb0690 radeonsi: Flush when we're asked to return a fence but don't have one yet
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-22 16:11:39 +09:00
Timothy Arceri
fcc1949cc4 mesa: fix misleading comment
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-22 13:34:45 +10:00
Timothy Arceri
13322a6590 mesa: fix active sampler conflict validation
The type stored in gl_uniform_storage is the type of a single array
element not the array type so size was always 1.

V2: Dont validate sampler units pointing to 0

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-22 12:58:40 +10:00
Timothy Arceri
09c440c718 glsl: check for leading zeros in array index validation
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-22 12:58:33 +10:00
Brian Paul
7fccebf980 swrast: remove unneeded & operators in _swrast_choose_texture_sample_func()
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-07-21 18:44:07 -06:00
Brian Paul
300926def0 mesa: move check for no-op glShadeModel call earlier
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-21 18:44:07 -06:00
Brian Paul
d323f26830 mesa: move check for no-op glAlphaFunc call earlier
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-21 18:44:07 -06:00
Brian Paul
61ed88b1dd mesa: move check for no-op glFrontFace call earlier
If the new mode matches the current mode, there can be no error.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-21 18:44:07 -06:00
Brian Paul
24799c4223 mesa: s/GLint/GLsizei/ for consistency
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
b94367ba8d docs: document that GL_ARB_get_texture_sub_image is completed
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
89212f9d06 mesa: enable GL_ARB_get_texture_sub_image for all drivers
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
48f9f0bfdd mesa: add API dispatch for GL_ARB_get_texture_sub_image
This adds the new glGetTextureSubImage() and
glGetCompressedTextureSubImage() functions.  Also update the
dispatch sanity test program.

v2: remove stray brace, move xi:include line in gl_API.xml, fix extension
number typo, s/program/texture/ in xml file.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
2494f91fb8 mesa: add new _mesa_Get[Compressed]TextureSubImage() functions
Simple implementations in terms of get_[compressed_]texture_image().

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
a92f0277d8 mesa: overhaul the glGetCompressedTexImage code
Same idea as the previous patch.
v2: a few clean-ups spotted by Ilia

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
f20cfc5a40 mesa: overhaul the glGetTexImage code
1. Reorganize the error checking code.
2. Lay groundwork for getting sub images by passing image offset and
   dimensions to the error checking code.
3. Implement _mesa_GetnTexImageARB(), _mesa_GetTexImage() and
   _mesa_GetTextureImage() all in terms of get_texture_image().

v2: pass offset/width/height/depth arguments to the error checking
function, avoid using magic width/height/depth values.
v3: remove unused bufSize param to get_texture_image()

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
613f1e00b8 mesa: 80-column wrapping in texgetimage.c
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
2a95fd1531 mesa: replace Driver.GetCompressedTexImage() w/ GetCompressedTexSubImage()
For now, pass offsets of zero and width/height/depth equal to the
whole image.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
5bfc360e40 mesa: make _mesa_get_[compressed_]texture_image() static
These functions are only called from teximage.c

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
1ad305b612 mesa: plumb offset/size parameters through GetTexSubImage code
Needed for GL_ARB_get_texture_sub_image.  But at this point, the
offsets are always zero and the sizes match the whole texture image.

v2: Fixes, suggestions from Laura Ekstrand:
* Fix calls to ctx->Driver.UnmapTextureImage() to pass the correct
  slice value.
* Added comments and assertions to check zoffset+depth<=tex->Depth before
  the 'img' loops.
* Added a new zoffset==0 assert in get_tex_memcpy().

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
e693fc299f mesa: replace Driver.GetTexImage with GetTexSubImage()
The new driver hook has x/y/zoffset and width/height/depth parameters
for the new glGetTextureSubImage() function.

The meta code and gallium state tracker are updated to handle the
new parameters.

Callers to Driver.GetTexSubImage() pass in offsets=0 and sizes equal
to the whole texture size.

v2: update i965 driver code, s/GLint/GLsizei/ in GetTexSubImage hook

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
0963718790 meta: add offset, width, height parameters to decompress_texture_image()
In preparation for decompressing texture sub images.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 18:35:38 -06:00
Brian Paul
2a2c946942 meta: handle subimages in _mesa_meta_setup_texture_coords()
v2: fix depth, total_depth mix-up in meta.h, per Laura Ekstrand.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-21 18:35:38 -06:00
Brian Paul
d7bd9fa1a3 mesa: assorted whitespace, formatting fixes in teximage.c
Trivial.
2015-07-21 18:35:38 -06:00
Brian Paul
98a6c5ea11 mesa: allow GL_TEXTURE_CUBE_MAP_ARRAY case for glCompressedTexSubImage3D()
Since s3tc works for cube maps and 2D arrays, it should also work for
cube arrays.  NVIDIA's driver supports this too.  Seems like the spec
should say this.

This is a minor follow-on fix for the commit "mesa: fix up some texture
error checks".

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-07-21 18:35:38 -06:00
Jonathan Gray
4c7196b684 mesa: include stdarg.h for va_list
Include stdarg.h for va_list.  Unbreaks the build on OpenBSD:

In file included from mesa/program/dummy_errors.c:24:
../src/mesa/main/errors.h:85: error: expected declaration specifiers or '...' before 'va_list'

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 17:53:00 -04:00
Ilia Mirkin
a2a1a5805f gallium: replace INLINE with inline
Generated by running:
git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g'
git grep -l INLINE src/mesa/state_tracker/ | xargs sed -i 's/\bINLINE\b/inline/g'
git checkout src/gallium/state_trackers/clover/Doxyfile

and manual edits to
src/gallium/include/pipe/p_compiler.h
src/gallium/README.portability

to remove mentions of the inline define.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Marek Olšák <marek.olsak@amd.com>
2015-07-21 17:52:16 -04:00
Samuel Pitoiset
958b5c3111 nvc0: force cache flush when binding a new ubo
This fixes the following piglit test:
  ext_transform_feedback-immediate-reuse-uniform-buffer

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 22:02:23 +02:00
Samuel Pitoiset
a62ccdec62 nv50: force cache flush when binding a new ubo
This fixes the following piglit test:
  ext_transform_feedback-immediate-reuse-uniform-buffer

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 21:39:36 +02:00
Vinson Lee
912921059d st/mesa: Silence GCC unused-variable warning.
Silence a release build warning.

st_glsl_to_tgsi.cpp: In function 'pipe_error st_translate_program(gl_context*, uint, ureg_program*, glsl_to_tgsi_visitor*, const gl_program*, GLuint, const GLuint*, const GLuint*, const ubyte*, const ubyte*, const GLuint*, const GLuint*, GLuint, const GLuint*, const GLuint*, const ubyte*, const ubyte*, boolean, boolean)':
st_glsl_to_tgsi.cpp:5461:36: warning: unused variable 'pscreen' [-Wunused-variable]
                struct pipe_screen *pscreen = st->pipe->screen;
                                    ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-21 12:25:41 -07:00
Adam Jackson
5b4a7ec8f1 r600/sb: Fix an &/&& mistake
gcc says:

    sb/sb_sched.cpp: In member function 'bool r600_sb::alu_group_tracker::try_reserve(r600_sb::alu_node*)':
    sb/sb_sched.cpp:492:7: warning: suggest parentheses around operand of '!' or change '&' to '&&' or '!' to '~' [-Wparentheses]
      if (!trans & fbs)

It happens to be harmless; if fbs is ever non-zero, it will be VEC_210,
which is 5, so (!trans & 5) == 1 and the branch works as expected.  But
logical AND is clearly what was meant.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-07-21 13:38:27 -04:00
Anuj Phogat
545dec5b3e Revert "i965/gen9: Plugin the code for selecting YF/YS tiling on skl+"
Commit c9dbdc0 introduced some dead code which is supposed to be used
once we have Yf/Ys tiling working and performing better. Ken reported
the issue that static analysis tool now shows warnings due to the dead
code. To fix these warnings, this patch reverts the changes made in
commit c9dbdc0.

It'll be better to add the Yf/Ys tiling selection code later, when we
are ready to use it.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-21 09:56:07 -07:00
Francisco Jerez
fadf347735 i965: Fix stride field for the result of emit_uniformize().
This is essentially the same problem fixed in an earlier patch for
immediates.  Setting the stride to zero will be particularly useful
for my future SIMD lowering pass, because we will be able to just
check whether the stride of a source register is zero and skip
emitting the copies required to unzip it in that case.

Instead of setting stride to zero in every caller of emit_uniformize()
I've changed the function to return the result as its return value
(previously it was being written into a caller-provided destination
register), because this way we can enforce that the result is used with
the correct regioning from the function itself.

The changes to the prototype of its VEC4 counterpart are mainly for
the sake of symmetry, VEC4 registers don't have stride.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-21 17:54:00 +03:00
Francisco Jerez
9383664a9c i965/fs: Fix stride field for uniforms.
This fixes essentially the same problem as for immediates.  Registers
of the UNIFORM file are typically accessed according to the formula:

 read_uniform(r, channel_index, array_index) =
    read_element(r, channel_index * 0 + array_index * 1)

Which matches the general direct addressing formula for stride=0:

 read_direct(r, channel_index, array_index) =
    read_element(r, channel_index * stride +
                    array_index * max{1, stride * width})

In either case if reladdr is present the access will be according to
the composition of two register regions, the first one determining the
per-channel array_index used for the second, like:

 read_indirect(r, channel_index, array_index) =
    read_direct(r, channel_index,
                read(r.reladdr, channel_index, array_index))

where:
 read(r, channel_index, array_index) = if r.reladdr == NULL
    then read_direct(r, channel_index, array_index)
    else read_indirect(r, channel_index, array_index)

In conclusion we can handle uniforms consistently with the other
register files if we set stride to zero.  After lowering to a GRF
using VARYING_PULL_CONSTANT_LOAD in demote_pull_constant_loads() the
stride of the source is set to one again because the result of
VARYING_PULL_CONSTANT_LOAD is generally non-uniform.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-21 17:54:00 +03:00
Francisco Jerez
5f8d9ae5a5 i965/fs: Fix stride for immediate registers.
When the width field was removed from fs_reg the BROADCAST handling
code in opt_algebraic() started to miss a number of trivial
optimization cases resulting in the ugly indirect-addressing sequence
to be emitted unnecessarily for some variable-indexed texturing and
UBO loads regardless of one of the sources of BROADCAST being
immediate.  Apparently the reason was that we were setting the stride
field to one for immediates even though they are typically uniform.
Width used to be set to one too which is why this optimization used to
work previously until the "reg.width == 1" check was removed.

The stride field of vector immediates is intentionally left equal to
one, because they are strictly speaking not uniform.  The assertion in
fs_generator makes sure that immediates have the expected stride as
consistency check.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-21 17:54:00 +03:00
Iago Toral Quiroga
b298311d51 i965/vec4: Fix liveness analysis with BRW_OPCODE_SEL
We only consider a vgrf defined by a given block if the block writes to it
unconditionally. So far we have been checking this by testing that the
instruction is not predicated, however, in the case of BRW_OPCODE_SEL,
the predication is used to select the value to write, not to decide if
the write is actually done. The consequence of this was increased life
spans for affected vgrfs, which could lead to additional register pressure.

Since NIR generates selects for conditional writes this was causing massive
register pressure in a handful of piglit and dEQP tests that had a large
number of select operations with the NIR-vec4 backend.

Fixes the following piglit tests with the NIR-vec4 backend:
spec/glsl-1.50/execution/variable-indexing/vs-output-array-vec4-index-wr-before-gs
spec/glsl-1.50/execution/variable-indexing/gs-input-array-vec4-index-rd
spec/glsl-1.50/execution/variable-indexing/vs-output-array-vec2-index-wr-before-gs
spec/glsl-1.50/execution/variable-indexing/vs-output-array-vec3-index-wr-before-gs
spec/glsl-1.50/execution/variable-indexing/vs-output-array-float-index-wr-before-gs

Fixes 80 dEQP tests with the NIR-vec4 backend in the following category:
dEQP-GLES3.functional.ubo.*

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-21 09:00:14 +02:00
Kenneth Graunke
2f11e92cef mesa: Rename _mesa_lookup_enum_by_nr() to _mesa_enum_to_string().
Generated by sed; no manual changes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-20 16:45:37 -07:00
Samuel Pitoiset
cd0dec0d9d nouveau: use bool instead of boolean
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-21 00:42:53 +02:00
Tom Stellard
4be30fcd05 gallivm: Initialize LLVM Modules's DataLayout to an empty string.
This fixes crashes in llvmpipe with LLVM 3.8 and also some piglit tests
on radeonsi that use the draw module.

This is just a temporary solution.  The correct solution will require
creating a TargetMachine during gallivm initialization and pulling the
DataLayout from there.  This will be a somewhat invasive change, and it
will need to be validatated on multiple LLVM versions.

https://llvm.org/bugs/show_bug.cgi?id=24172

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-07-20 20:28:26 +00:00
Samuel Pitoiset
5b7dd4d419 nvc0: add a missing parameter to nvc0_set_shader_images()
This fixes a compilation warning introduced in commit 05a12c5
(gallium: add interface for writable shader images).

While we are at it, fix indentation and rename parameters according to
the gallium interface.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-20 18:49:14 +02:00
Samuel Pitoiset
c2cb771354 nouveau: always align buffers to 0x100
Only constbufs must be aligned to 0x100, but since all buffers can be
rebinded as constant buffers they must be also aligned.

This patch prevents this behaviour by aligning everything to 256-byte
increments at buffer creation.

This fixes dmesg fails for the following piglit test:
  ext_transform_feedback-immediate-reuse-uniform-buffer -auto -fbo

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-20 18:48:27 +02:00
Samuel Pitoiset
19a6214b0f nv50: limit the maximum number of samplers to 16
NV50_3D_BIND_TSC only allows to bind 16 samplers, and since we don't
want to do anything with NV50_3D_BIND_TSC2, just limit the maximum
number of samplers to 16 like for nvc0.

This fixes dmesg fails with the following piglit test:
 max-samplers

But the test still fails.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-20 18:45:56 +02:00
Samuel Pitoiset
6d207b8e35 nv50: turn samples counts off during blit
Fixes the following piglit test:
  occlusion_query_meta_no_fragments

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-20 18:45:56 +02:00
Samuel Pitoiset
d246a96bbc nv50: add nesting support for occlusion queries
This is loosely based on nvc0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-20 18:45:55 +02:00
Alejandro Piñeiro
8ba1982b1e i965/nir/fs: removed unneeded support for global variables
As functions are inlined, and nir_lower_global_vars_to_local gets
run, all global variables are lowered to local variables.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-20 09:50:04 +02:00
Ilia Mirkin
801d41fa43 nv50: fix max level clamping on G80
It appears that the G80 did not have support for the sampler view
first/last clamping. Put the view's last level in the place of the
texture's so that it doesn't go past what the sampler view allows.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-20 00:59:37 -04:00
Ilia Mirkin
8c8a71f0d1 gm107/ir: fix indirect txq emission
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-18 19:03:07 -04:00
Ilia Mirkin
346ce0b988 nvc0/ir: don't worry about sampler in txq handling
There's no need to deal with samplers for texture size queries. That
code also was accidentally setting an invalid sIndirectSrc position, but
it can now just be removed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-18 18:48:14 -04:00
Ilia Mirkin
20e484afa4 nvc0/ir: fix txq on indirect samplers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-18 17:34:48 -04:00
Abdiel Janulgue
670914ea7c i965: Disable resource streamer in BLORP
Switch off hardware-generated binding tables and gather push
constants in the blorp. Blorp requires only a minimal set of
simple constants. There is no need for the extra complexity
to program a gather table entry into the pipeline.

Cc: kenneth@whitecape.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-07-18 16:17:01 +03:00
Abdiel Janulgue
fc65b6eb61 i965: Upload binding tables in hw-generated binding table format.
When hardware-generated binding tables are enabled, use the hw-generated
binding table format when uploading binding table state.

Normally, the CS will will just consume the binding table pointer commands
as pipelined state. When the RS is enabled however, the RS flushes whatever
edited surface state entries of our on-chip binding table to the binding
table pool before passing the command on to the CS.

Note that the the binding table pointer offset is relative to the binding table
pool base address when resource streamer instead of the surface state base address.

v2: Fix possible buffer overflow when allocating a chunk out of the
    hw-binding table pool (Ken).
v3: Remove extra newline and add missing brace around if-statement (Matt).
v4: Fix broken INTEL_DEBUG=shader_time for hw-generated binding tables.
    Document PRM WaStateBindingTableOverfetch workaround.

Cc: kenneth@whitecape.org
Cc: mattst88@gmail.com
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-07-18 16:16:59 +03:00
Abdiel Janulgue
2133980bc7 i965: Implement interface to edit binding table entries
Unlike normal software binding tables where the driver has to manually
generate and fill a binding table array which are then uploaded to the
hardware, the resource streamer instead presents the driver with an option
to fill out slots for individual binding table indices. The hardware
accumulates the state for these combined edits which it then automatically
flushes to a binding table pool when the binding table pointer state
command is invoked.

v2: Clarify binding table edit bit aligment (Topi).
v3: Make comments and function names more clearer (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-07-18 16:16:56 +03:00
Abdiel Janulgue
190756482e i965: Enable hardware-generated binding tables on render path.
This patch implements the binding table enable command which is also
used to allocate a binding table pool where where hardware-generated
binding table entries are flushed into. Each binding table offset in
the binding table pool is unique per each shader stage that are
enabled within a batch.

Also insert the required brw_tracked_state objects to enable
hw-generated binding tables in normal render path.

v2: - Use MOCS in binding table pool alloc for GEN8
    - Fix spurious offset when allocating binding table pool entry
      and start from zero instead.
v3: - Include GEN8 fix for spurious offset above.
v4: - Fixup wrong packet length in enable/disable hw-binding table
      for GEN8 (Ville).
    - Don't invoke HW-binding table disable command when we dont
      have resource streamer (Chris).
v5: - Reorder the state cache invalidate flush so it happens in-between
      enabling hw-generated binding tables and the previous sw-binding
      table GPU state (Chris).
v6: - Do the same fix in v5 for gen7_disable_hw_binding_tables().
    - Adhere to coding guidelines and make comments more informative.

Cc: kenneth@whitecape.org
Cc: syrjala@sci.fi
Cc: chris@chris-wilson.co.uk
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-07-18 16:16:54 +03:00
Abdiel Janulgue
090529af18 i965: Enable resource streamer for the batchbuffer
Check first if the hardware and kernel supports resource streamer. If this
is allowed, tell the kernel to enable the resource streamer enable bit on
MI_BATCHBUFFER_START by specifying I915_EXEC_RESOURCE_STREAMER
execbuffer flags.

v2: - Use new I915_PARAM_HAS_RESOURCE_STREAMER ioctl to check if kernel
      supports RS (Ken).
    - Add brw_device_info::has_resource_streamer and toggle it for
      Haswell, Broadwell, Cherryview, Skylake, and Broxton (Ken).
v3: - Update I915_PARAM_HAS_RESOURCE_STREAMER to match updated kernel.
v4: - Always inspect the getparam.value (Chris Wilson).
v5: - Fold redundant devinfo->has_resource_streamer check in context create
      into init screen.

Cc: kenneth@whitecape.org
Cc: chris@chris-wilson.co.uk
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-07-18 16:16:52 +03:00
Abdiel Janulgue
ccf9598ad7 i965: Define HW-binding table and resource streamer control opcodes
v2: Use macros for HW binding table edits (Topi)
v3: Add Broadwell support.
v4: Make hardware binding table bit definitions even more clearer (Ken)

Cc: kenneth@whitecape.org
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-07-18 16:16:50 +03:00
Eric Anholt
ff7896a398 vc4: Switch to using a separate ioctl for making shaders.
This gives the kernel a chance to validate and lock down the data,
without having to deal with mmap zapping.

With this, GLBenchmark stops on a texture relocations, because we'd
recycled a shader BO as another shader and failed to revalidate, since we
weren't clearing the cached validation state on mmap faults.
2015-07-17 22:11:56 -07:00
Roland Scheidegger
e42cfe5d03 mesa: fix up some texture error checks
In particular, we were incorrectly accepting s3tc (and lots of others)
for CompressedTexSubImage3D (but not CompressedTexImage3D) calls with 3d
targets. At this time, the only allowed formats for these calls are the
bptc ones, since none of the specific extensions allow it (astc hdr would).
Also, fix up a bug in _mesa_target_can_be_compressed - 3d target needs to
be allowed for bptc formats.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-18 02:35:24 +02:00
Eric Anholt
27aa31fab4 vc4: Fix printing of shader-db debug when shader-db isn't turned on. 2015-07-17 12:25:55 -07:00
Eric Anholt
5341349dde vc4: Add debugging on texture relocation validation failures. 2015-07-17 12:25:55 -07:00
Eric Anholt
be7adc2eca vc4: Also consider uniform 0 in uniform lowering.
The hash table considers key 0 to be the empty key.
2015-07-17 12:25:55 -07:00
Eric Anholt
90dfabc3b5 vc4: Use the pure/const attributes on a bunch of our QPU functions.
On a release build, this makes the rest of vc4_qpu_validate.c go away
(the compiler didn't know that our qpu helper function calls had no
side effects).
2015-07-17 12:25:55 -07:00
Eric Anholt
be1f49bda9 mesa: Detect and provide macros for function attributes pure and const.
These are really useful hints to the compiler in the absence of link-time
optimization, and I'm going to use them in VC4.

I've made the const attribute be ATTRIBUTE_CONST unlike other function
attributes, because we have other things in the tree #defining CONST for
their own unrelated purposes.

v2: Alphabetize.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-07-17 12:25:54 -07:00
Connor Abbott
bde4c8ec1f i965/fs: don't make unused payload registers interfere
Before, we were setting payload_last_use_ip for unused payload
registers to 0, which made them interfere with whatever the first
instruction wrote to due to the workaround for SIMD16 uniform arguments.
Just use -1 to mean "unused" instead, and then skip setting any
interferences for unused payload registers.

instructions in affected programs:     0 -> 0
helped:                                0
HURT:                                  0
GAINED:                                1
LOST:                                  0

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
2015-07-17 10:10:57 -07:00
Connor Abbott
18e73bf7f8 i965/fs: remove special case in setup_payload_interference()
regs_read() will handle LINTERP for us since the previous commit. In
addition, we were being too conservative, since it will only read 2
registers on SIMD8.

instructions in affected programs:     9061 -> 8893 (-1.85%)
helped:                                10
HURT:                                  0
GAINED:                                0
LOST:                                  0

All of the changes were due to spills being eliminated, mostly in KSP
shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
2015-07-17 10:10:51 -07:00
Jordan Justen
c4a2217e79 i965/fs: Mark last used ip for all regs read in the payload
If a source register in the push constant registers uses more than one
register, then we wouldn't update payload_last_use_ip for subsequent
registers.

Unlike most uniform data pushed into registers, the CS gl_LocalInvocationID
data varies per execution channel. Therefore for SIMD16 mode, we have vec16
data in the payload. In this case we then need to mark 2 registers in
payload_last_use_ip as last used by the instruction. There's a similar
situation for the z and w coordinates of gl_FragCoord for fragment shaders,
where it had only happened to work before because of some bogus interferences
which the next commit removes.

(Connor: added bit about gl_FragCoord to commit message)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <connor.w.abbott@intel.com>
2015-07-17 10:10:48 -07:00
Connor Abbott
9f344b908a i965/fs: fix regs_read() for LINTERP
The second source always stays within the same SIMD8 register.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
2015-07-17 10:10:39 -07:00
Connor Abbott
eaf799ddff nir: add nir_foreach_instr_safe_reverse()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
2015-07-17 09:49:53 -07:00
Connor Abbott
8eea091747 nir: add nir_instr_is_first() and nir_instr_is_last() helpers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Connor Abbott <connor.w.abbott@intel.com>
2015-07-17 09:47:22 -07:00
Jordan Justen
01cdbba341 i965/cs: Use dispatch width of 8 for cs terminate payload setup
This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_write: Assertion `var < num_vars' failed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-16 21:37:24 -07:00
Jordan Justen
7e337859ff i965/cs: Return 1 for regs_read on CS_OPCODE_CS_TERMINATE
This prevents an assertion failure in brw_fs_live_variables.cpp,
fs_live_variables::setup_one_read: Assertion `var < num_vars' failed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-16 21:37:07 -07:00
Kenneth Graunke
4b17f0d9f5 program: Allow redundant OPTION ARB_fog_* directives.
A fragment program from "Pixel Piracy" contains redundant OPTION
directives:

!!ARBfp1.0
OPTION ARB_precision_hint_fastest;
OPTION ARB_fog_exp2;
OPTION ARB_precision_hint_fastest;
OPTION ARB_fog_exp2;
...

We already allow redundant ARB_precision_hint_fastest directives, but
disallow the redundant (yet consistent) ARB_fog_exp2 directives, failing
to compile the program.

The specification seems to contradict itself - the main text says that
only one fog application option may be specified, but then backpedals,
indicating the intent is to disallow /contradictory/ flags.  One of the
issues suggests that specifying contradictory ones is stupid, but
allowed, and only the last one should take effect.

Accepting multiple redundant (but consistent) directives seems harmless,
and like a reasonable interpretation of the specification.  It also
fixes a fragment program found in the wild.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-16 20:26:43 -07:00
Ben Widawsky
3a31876600 i965: Push miptree tiling request into flags
With the last few patches a way was provided to influence lower layer miptree
layout and allocation decisions via flags (replacing bools). For simplicity, I
chose not to touch the tiling requests because the change was slightly less
mechanical than replacing the bools.

The goal is to organize the code so we can continue to add new parameters and
tiling types while minimizing risk to the existing code, and not having to
constantly add new function parameters.

v2: Rebased on Anuj's recent Yf/Ys changes
Fix non-msrt MCS allocation (was only happening in gen8 case before)

v3: small fix in assertion requested by Chad

v4: Use parens to get the order right from v3.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-16 17:02:35 -07:00
Ben Widawsky
ef42352ff4 Revert "i965: Push miptree tiling request into flags"
This reverts commit 51e8d549e1.
2015-07-16 16:52:08 -07:00
Ben Widawsky
51e8d549e1 i965: Push miptree tiling request into flags
With the last few patches a way was provided to influence lower layer miptree
layout and allocation decisions via flags (replacing bools). For simplicity, I
chose not to touch the tiling requests because the change was slightly less
mechanical than replacing the bools.

The goal is to organize the code so we can continue to add new parameters and
tiling types while minimizing risk to the existing code, and not having to
constantly add new function parameters.

v2: Rebased on Anuj's recent Yf/Ys changes
Fix non-msrt MCS allocation (was only happening in gen8 case before)

v3: small fix in assertion requested by Chad

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> (v2)
Reviewed-by: Chad Versace <chad.versace@intel.com> (v2)
2015-07-16 13:28:33 -07:00
Francisco Jerez
4bddd82bf3 i965/fs: Factor out universally broken calculation of the register component size.
This in principle simple calculation was being open-coded in a number
of places (in a series I haven't yet sent for review there will be a
couple more), all of them were subtly broken in one way or another:
None of them were handling the HW_REG case correctly as pointed out by
Connor, and fs_inst::regs_read() was handling the stride=0 case rather
naively.  This patch solves both problems and factors out the
calculation as a new fs_reg method.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-16 18:31:01 +03:00
Francisco Jerez
b00cd6e4a0 i965: Implement nir_op_uadd_carry and _usub_borrow without accumulator.
This gets rid of two no16() fall-backs and should allow better
scheduling of the generated IR.  There are no uses of usubBorrow() or
uaddCarry() in shader-db so no changes are expected.  However the
"arb_gpu_shader5/execution/built-in-functions/fs-usubBorrow" and
"arb_gpu_shader5/execution/built-in-functions/fs-uaddCarry" piglit
tests go from 40 to 28 instructions.  The reason is that the plain ADD
instruction can easily be CSE'ed with the original addition, and the
b2i negation can easily be propagated into the source modifier of
another instruction, so effectively both operations are performed with
just one instruction.

v2: Rely on carry_to_arith() and borrow_to_arith() to lower these
    (Ilia Mirkin).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-16 18:29:32 +03:00
Francisco Jerez
3ee2daf23d i965: Implement b2f and b2i using negation.
Booleans are represented as 0/-1 on modern hardware which means we can
just negate them to convert them into a numeric type.  Negation has
the benefit that it can be implemented using a source modifier which
can easily be propagated into some other instruction.  shader-db
results on HSW:

total instructions in shared programs: 6349082 -> 6346693 (-0.04%)
instructions in affected programs:     40948 -> 38559 (-5.83%)
helped:                                123
HURT:                                  1
GAINED:                                1
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-16 18:29:32 +03:00
Marek Olšák
8fba933ca2 gallium: add interface for writable shader buffers
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-16 16:52:21 +02:00
Marek Olšák
05a12c53a3 gallium: add interface for writable shader images
PIPE_CAPs will be added some other time.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-16 16:52:20 +02:00
Marek Olšák
b73bec0ecd gallium: add new limits for shader buffers and images
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-16 16:52:17 +02:00
Marek Olšák
f9f79d29ce gallium: add BIND flags for R/W buffers and images
PIPE_CAPs and TGSI support will be added later. The TGSI support should be
straightforward. We only need to split TGSI_FILE_RESOURCE into TGSI_FILE_IMAGE
and TGSI_FILE_BUFFER, though duplicating all opcodes shouldn't be necessary.

The idea is:
* ARB_shader_image_load_store should use set_shader_images.
* ARB_shader_storage_buffer_object should use set_shader_buffers(slots 0..M-1)
  if M shader storage buffers are supported.
* ARB_shader_atomic_counters should use set_shader_buffers(slots M..N)
  if N-M+1 atomic counter buffers are supported.

PIPE_CAPs can describe various constraints for early DX11 hardware.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-16 16:52:02 +02:00
Marek Olšák
26222932c0 gallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGS
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-16 16:09:20 +02:00
Francisco Jerez
af768922ca i965/gen9: Use custom MOCS entries set up by the kernel.
Instead of relying on hardware defaults the i915 kernel driver is
going program custom MOCS tables system-wide on Gen9 hardware.  The
"WT" entry previously used for renderbuffers had a number of problems:
It disabled caching on eLLC, it used a reserved L3 cacheability
setting, and it used to override the PTE controls making renderbuffers
always WT on LLC regardless of the kernel's setting.  Instead use an
entry from the new MOCS tables with parameters: TC=LLC/eLLC, LeCC=PTE,
L3CC=WB.

The "WB" entry previously used for anything other than renderbuffers
has moved to a different index in the new MOCS tables but it should
have the same caching semantics as the old entry.

Even though the corresponding kernel change ("drm/i915: Added
Programming of the MOCS") is in a way an ABI break it doesn't seem
necessary to check that the kernel is recent enough because the change
should only affect Gen9 which is still unreleased hardware.

v2: Update MOCS values for the new Android-incompatible tables
    introduced in v7 of the kernel patch.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-July/071080.html
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-07-16 13:48:20 +03:00
EdB
7e0180d57d clover: little OpenCL status code logging clean
s/build_error/compile_error in order to match the stored OpenCL status code.
Make program::build catch and log every OpenCL error.
Make tgsi error triggering uniform with the llvm one.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-16 13:48:20 +03:00
Renaud Gaubert
7b9ebf879b glsl: avoid compiler's segfault when processing operators with void arguments
This is done by returning an rvalue of type void in the
ast_function_expression::hir function instead of a void expression.

This produces (in the case of the ternary) an hir with a call
to the void returning function and an assignment of a void variable
which will be optimized out (the assignment) during the optimization
pass.

This fix results in having a valid subexpression in the many
different cases where the subexpressions are functions whose
return values are void.

Thus preventing to dereference NULL in the following cases:
  * binary operator
  * unary operators
  * ternary operator
  * comparison operators (except equal and nequal operator)

Equal and nequal had to be handled as a special case because
instead of segfaulting on a forbidden syntax it was now accepting
expressions with a void return value on either (or both) side of
the expression.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85252

Signed-off-by: Renaud Gaubert <renaud@lse.epita.fr>
Reviewed-by: Gabriel Laskar <gabriel@lse.epita.fr>
Reviewed-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
2015-07-16 08:06:41 +02:00
Roland Scheidegger
779cabfc7d r200: fix some potential big endian issues
The formats chosen (both by texture format choser, fbo storage allocation)
are different for big endian not just for rgba8 but also lower bit width
formats (why I don't actually know). Even the function to test for renderable
formats used different formats, however the actual colorbuffer setup did not.
And the blitter did not take that into account neither.
Untested (what could possibly go wrong...).
Same as for r100.

Acked-by: Marek Olšák <marek.olsak@amd.com>
2015-07-16 03:55:59 +02:00
Roland Scheidegger
d21320f625 radeon: fix some potential big endian issues
The formats chosen (both by texture format choser, fbo storage allocation)
are different for big endian not just for rgba8 but also lower bit width
formats (why I don't actually know). Even the function to test for renderable
formats used different formats, however the actual colorbuffer setup did not.
And the blitter did not take that into account neither.
Untested (what could possibly go wrong...).

Acked-by: Marek Olšák <marek.olsak@amd.com>
2015-07-16 03:54:53 +02:00
Roland Scheidegger
882476fea3 radeon/r200: mark state atoms as dirty after blits
Blit submits lots of packets which are usually handled by state atoms, so
these must be dirtied.
Not sure if this fixes anything, but it was a concern raised by bug 51658
(with this all issues there seen as actual bugs should be fixed, with the
exception of the patch to upload non-used texenv state atoms which I just
don't understand).

Acked-by: Marek Olšák <marek.olsak@amd.com>
2015-07-16 03:07:07 +02:00
Roland Scheidegger
26c1361ac3 r200: fix fbo rendering by disabling optimized texture format chooser
It is rather unfortunate that we don't know if a texture is going to be used
as a rt later, and we lack the means to do something about a format chosen
which we can't render to directly, so disable this and always chose renderable
format for rgba8 textures.
This addresses an issue raised on (old) bug,
https://bugs.freedesktop.org/show_bug.cgi?id=51658 with gnome-shell, don't
know if that's still applicable but it might fix other things as well.

Acked-by: Marek Olšák <marek.olsak@amd.com>
2015-07-16 03:06:47 +02:00
Anuj Phogat
642f289824 i965: Fix 32 bit build warnings in intel_get_yf_ys_bo_size()
Along with fixing the type of pitch parameter, patch also changes
the types of few local variables and function return type.

Warnings fixed are:
intel_mipmap_tree.c:671:7: warning: passing argument 3 of
'intel_get_yf_ys_bo_size' from incompatible pointer type

intel_mipmap_tree.c:563:1: note: expected 'uint64_t *' but
argument is of type 'long unsigned int *'

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-15 15:02:02 -07:00
Matt Turner
f11c6f09cf i965: Optimize batchbuffer macros.
Previously OUT_BATCH was just a macro around an inline function which
does

   brw->batch.map[brw->batch.used++] = dword;

When making consecutive calls to intel_batchbuffer_emit_dword() the
compiler isn't able to recognize that we're writing consecutive memory
locations or that it doesn't need to write batch.used back to memory
each time.

We can avoid both of these problems by making a local pointer to the
next location in the batch in BEGIN_BATCH().

Cuts 18k from the .text size.

   text     data      bss      dec      hex  filename
4946956   195152    26192  5168300   4edcac  i965_dri.so before
4928956   195152    26192  5150300   4e965c  i965_dri.so after

This series (including commit c0433948) improves performance of Synmark
OglBatch7 by 8.01389% +/- 0.63922% (n=83) on Ivybridge.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-07-15 13:09:22 -07:00
Matt Turner
131573df7a i965: Add and use USED_BATCH macro.
The next patch will replace the .used field with an on-demand
calculation of batchbuffer usage.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-07-15 13:09:22 -07:00
Matt Turner
09348c12fc i965: Split batch emission from relocation functions.
So that everything writing to the batch between BEGIN_BATCH() and
ADVANCE_BATCH() goes through OUT_BATCH.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-07-15 13:09:22 -07:00
Matt Turner
fbf3aebf1f i965: Move BEGIN_BATCH() into same control flow as ADVANCE_BATCH().
BEGIN_BATCH() and ADVANCE_BATCH() will contain "do {" and "} while (0)"
respectively to allow declaring local variables used by intervening
OUT_BATCH macros. As such, BEGIN_BATCH() and ADVANCE_BATCH() need to be
in the same control flow.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-07-15 13:09:22 -07:00
Brian Paul
141e1eb29f osmesa: fix OSMesaPixelsStore typo
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91337
Cc: 10.6 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-15 07:31:59 -06:00
Eric Anholt
7124feba1b vc4: Cache the texture p1 for the sampler.
Cuts another 12% of vc4_uniforms.o, in exchange for computing it at
CSO creation time.
2015-07-14 15:17:58 -07:00
Eric Anholt
0f4d2b0a2d vc4: Cache texture p0/p1 setup for the sampler view.
In exchange for a bit of space and computation in CSO setup, we cut
vc4_uniform.c (draw time) code size by 4.8%.
2015-07-14 15:17:58 -07:00
Eric Anholt
1835ce6e35 vc4: Move uniforms handling to a separate file.
The rest of vc4_program.c is about compiling, while this is about
uniform emit at draw time.
2015-07-14 15:17:58 -07:00
Eric Anholt
9476b11d6e vc4: Fix some -Wdouble-promotion warnings.
No code generation changes from this, but it'll be useful to have this
next time I go checking -Wdouble-promotion.
2015-07-14 15:17:58 -07:00
Jordan Justen
320089dbd6 i965/cs: Initialize GPGPU Thread Count
This field should always be set for gen8. In the bdw PRM, Volume 2d:
Command Reference: Structures under INTERFACE_DESCRIPTOR_DATA, DWORD
6, Bits 9:0, Number of Threads in GPGPU Thread Group:

"This field should not be set to 0 even if the barrier is disabled,
since an accurate value is needed for proper pre-emption."

In the HSW PRM, the it doesn't mention that it must always be set, but
it should not hurt.

Reported-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-07-14 14:44:48 -07:00
Eric Anholt
cd7dd45bfe vc4: Fix compiler warnings on release builds. 2015-07-14 11:39:28 -07:00
Eric Anholt
1e80c9fab9 vc4: Add better debug for register allocation failure. 2015-07-14 11:33:54 -07:00
Eric Anholt
3df7892878 vc4: Drop reloc_count tracking for debug asserts on non-debug builds.
Cuts another 88 bytes of compiled code.
2015-07-14 11:31:57 -07:00
Eric Anholt
7432017f65 vc4: Rework cl handling to be friendlier to the compiler.
Drops 680 bytes of code, from avoiding a bunch of extra updates to the
next pointer in the struct.
2015-07-14 11:31:57 -07:00
Eric Anholt
a0d3915663 vc4: Make a helper function for getting the current offset in the CL.
I needed to rewrite this a bit for safety checking in the next commit.
Despite being a static inline of the same thing that was being done, we
lose 36 bytes of code for some reason.
2015-07-14 11:31:57 -07:00
Eric Anholt
748bf459b4 vc4: Drop separate cl*_reloc_hindex().
Now that RCL generation is in the kernel, we don't have any other
callers.  Oddly, the compiler generates another 8 bytes of code for
this, but the simplification is worth it.
2015-07-14 11:31:57 -07:00
Eric Anholt
e4c540f6d0 vc4: Store reloc pointers as pointers, not offsets.
Now that we don't resize the CL as we build (it's set up at the top by
vc4_start_draw()), we can store the pointers instead of offsets from
the base.  Saves a bit of math in emitting relocs (about 60 bytes of
code).
2015-07-14 11:31:57 -07:00
Eric Anholt
ab80519b3c vc4: Add perf debug for when we wait on BOs. 2015-07-14 11:31:57 -07:00
Matt Turner
759ed0bd03 i965: Mark constant static data as const.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-14 08:09:51 -07:00
Samuel Iglesias Gonsalvez
ea633db65f glsl: Lower shader storage buffer object loads to GLSL IR instrinsics
Extend the existing lower_ubo_reference pass to also detect SSBO loads
and lower them to __intrinsic_load_ssbo intrinsics.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Samuel Iglesias Gonsalvez
1966ea5772 glsl: Lower shader storage buffer object writes to GLSL IR instrinsics
Extend the existing lower_ubo_reference pass to also detect SSBO writes
and lower them to __intrinsic_store_ssbo intrinsics.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
2a66ee6fc1 glsl: Don't do copy propagation on buffer variables
Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
5dfea83ee6 glsl: Don't do constant variable on buffer variables
Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
0b1111d985 glsl: Don't do constant propagation on buffer variables
Since the backing storage for these is shared we cannot ensure that
the value won't change by writes from other threads. Normally SSBO
accesses are not guaranteed to be syncronized with other threads,
except when memoryBarrier is used. So, we might be able to optimize
some SSBO accesses, but for now we always take the safe path and emit
the SSBO access.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
5360ff30c4 glsl: Do not kill dead assignments to buffer variables or SSBO declarations.
If we kill dead assignments we lose the buffer writes.

Also, we never kill UBO declarations even if they are never referenced
by the shader, they are always considered active. Although the spec
does not seem say this specifically for SSBOs, it is probably implied
since SSBOs are pretty much the same as UBOs, only that you can write
to them.

v2:
- Fix the comment (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
3ad92589f2 glsl: Don't do tree grafting on buffer variables
Otherwise we can lose writes into the buffers backing the variables.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
173ed05a6d mesa: Implement _mesa_BindBufferRange for target GL_SHADER_STORAGE_BUFFER
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
8a1d58bd61 mesa: Implement _mesa_BindBufferBase for target GL_SHADER_STORAGE_BUFFER
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
7b0d0a2bf2 mesa: Implement _mesa_BindBuffersRange for target GL_SHADER_STORAGE_BUFFER
v2:
- Fix error message (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
0aa83f3e90 mesa: Implement _mesa_BindBuffersBase for target GL_SHADER_STORAGE_BUFFER
v2:
- Add space before const (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
e72f5ef502 mesa: Implement _mesa_DeleteBuffers for target GL_SHADER_STORAGE_BUFFER
v2:
- Remove the extra spaces (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
98a1a2c730 mesa: Initialize and free shader storage buffers
v2:
- Fix indention, used tabs instead of whitespaces. (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Samuel Iglesias Gonsalvez
2747d566f1 glsl: fix error messages in invalid declarations of shader storage blocks
Due to GL_ARB_shader_storage_buffer_object extension, shader storage blocks
have the same limitations as uniform blocks.

This patch fixes the corresponding error messages.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Samuel Iglesias Gonsalvez
9f651dbf79 glsl: buffer variables cannot be defined outside interface blocks
Section 4.3.7 "Buffer Variables", GLSL 4.30 spec:

"Buffer variables may only be declared inside interface blocks
(section 4.3.9 “Interface Blocks”), which are then referred to as
shader storage blocks. It is a compile-time error to declare buffer
variables at global scope (outside a block)."

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Samuel Iglesias Gonsalvez
20b2907db7 glsl: shader buffer variables cannot have initializers
Section 4.3.7 "Buffer Variables" of the GLSL 4.30 spec:

    "Buffer variables cannot have initializers."

v2:
- Rewrite error message (Jordan)

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Samuel Iglesias Gonsalvez
fa0a86c057 glsl: enable binding layout qualifier usage for shader storage buffer objects
See GLSL 4.30 spec, section 4.4.5 "Uniform and Shader Storage Block
Layout Qualifiers".

v2:
- Add whitespace in an error message. Delete period '.' at the end of that
error message (Jordan).

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Samuel Iglesias Gonsalvez
c717604dc4 mesa: add MaxShaderStorageBlocks to struct gl_program_constants
v2:
- Set MaxShaderStorageBlocks to 8.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
cd50906e03 mesa: Add shader storage buffer support to struct gl_context
This includes the array of bindings, the current buffer bound to the
GL_SHADER_STORAGE_BUFFER target and a set of general limits and default
values for shader storage buffers.

v2:
- Use spec values for the new defined constants (Jordan)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:04 +02:00
Iago Toral Quiroga
df89ed1591 glsl: Identify active uniform blocks that are buffer blocks as such.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Kristian Høgsberg
a78a589efc glsl: link buffer variables and shader storage buffer interface blocks
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Kristian Høgsberg
84fc5fece0 glsl: Implement parser support for 'buffer' qualifier
This is used to identify shader storage buffer interface blocks where
buffer variables are declared.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Iago Toral Quiroga
6b09598d63 nir: add nir_var_shader_storage
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Iago Toral Quiroga
1146696f75 mesa: rename is_in_uniform_block to is_in_buffer_block
Since this now checks if a variable is inside a uniform or a shader
storage block.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Kristian Høgsberg
18feaa8f36 glsl: Add ir_var_shader_storage
This will be used to identify buffer variables inside shader storage
buffer objects, which are very similar to uniforms except for a few
differences, most important of which is that they are writable.

Since buffer variables are so similar to uniforms, we will almost always
want them to go through the same paths as uniforms.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Samuel Iglesias Gonsalvez
3095ee9b8b mesa: define ARB_shader_storage_buffer_object extension
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-14 07:04:03 +02:00
Timothy Arceri
75df8f0019 glsl: free interface_types
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-14 07:48:34 +10:00
Timothy Arceri
431a065861 glsl: replace some more old hash_table uses
The util/hash_table was intended to be a fast hash table
replacement for the program/hash_table see 35fd61bd99 and 72e55bb688.

This change replaces some more uses of the old hash table.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-14 07:48:25 +10:00
Emil Velikov
7a50bf6c7f auxiliary/vl: use the correct screen index
Inspired (copied) from Marek's commit for egl/x11
commit 0b56e23e7f3(egl/dri2: use the correct screen index)

v2: Fix copy/pasta errors.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-13 20:43:11 +01:00
Emil Velikov
10a7b579fd radeon: remove dri_mirror state
Most of the data stored(duplicated) was unused, and for the one that is
follow the approach set by other drivers.
This eliminates the use of legacy (dri1) types.

Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-13 20:15:27 +01:00
Emil Velikov
82b9b2e523 i915: remove unused driFd variable
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-13 20:14:53 +01:00
Emil Velikov
a025e539e4 i965: bump libdrm requirement to 2.4.61 and drop in-tree workaround
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-13 20:14:31 +01:00
Emil Velikov
c505064b2c bugzilla_mesa.sh: sort the bugs list by number
v2: Use change sed/sort based on Ilia's suggestion.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-13 20:02:09 +01:00
Emil Velikov
9027d53b2a radeonsi: directly include radeon/* headers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-13 20:01:16 +01:00
Emil Velikov
dd50ccf0f4 auxiliary/vl: use loader_open_device() over open()
The former handles O_CLOEXEC (and the lack of it) appropriately.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:59 +01:00
Emil Velikov
cc32d25454 pipe-loader: use loader_open_device() rather than open()
The former handles O_CLOEXEC (and the lack of it) appropriately.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:54 +01:00
Emil Velikov
132031b110 pipe-loader: remove pipe_loader_sw_probe_xlib
It was only useful for st/egl, although I've never got to merging the
pipe-loader and inline-helpers before it was removed. There are no users
for it ATM.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:38 +01:00
Emil Velikov
c73d30dfe9 automake: remove empty GALLIUM_PIPE_LOADER_LIBS
Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:34 +01:00
Emil Velikov
abc20120e4 automake: pipe-loader: remove the 'client' pipe-loader
Was only around as opencl's pipe-loader wanted to link against xcb in
some cases.

Cc: Rob Clark <robclark@freedesktop.org>
Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:57:06 +01:00
Emil Velikov
0959d7312d pipe-loader: remove pipe_loader_drm_probe_fd() x_auth argument
No longer used by anyone, as of last commit.

Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:56:54 +01:00
Emil Velikov
a27ec5dc46 pipe-loader: simplify pipe_loader_drm_probe
Do not iterate and (attempt to) open the render device, if we're over
the requested number of devices.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:56:39 +01:00
Emil Velikov
69a1b9959e pipe-loader: drop support for non-render node devices
Render nodes have been around for quite some time. Removing support via
the master/primary node allows us to clean up the conditional
compilation and simplify the build greatly.

For example currently we the pipe-loader, which explicitly links against
xcb and friends (for X auth) if found at compile-time. That
would cause problems as one will be forced to use X/xcb, even if it's a
headless system that is used for opencl.

v2: Clarify the linking topic in the commit message.

Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-13 19:52:48 +01:00
Dave Airlie
de5c2b6f2b radeonsi: direct emit intrinsic for DFRAC.
Michel reported this still failed, and this fixed it

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-13 09:21:43 +01:00
Dave Airlie
4cbf0a0ccf radeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.
This adds the translation from TGSI to AMDGPU llvm backend, for the
64-bit opcodes. The backend pretty much handles everything for us
fine. There is one patch required for SI DFRAC support, that I know
off.

[airlied: fixed missing comma, updated relnotes]

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-12 22:40:51 +01:00
Guillaume Desmottes
8108de4774 loader: don't leak udev_enumerate
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:49:25 +01:00
Guillaume Desmottes
f7008ebcdc dri3_open: don't leak the reply
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:48:53 +01:00
Rhys Kidd
5d219908ce doxygen: Remove doxygen_sqlite3.db with 'make clean'
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:48:25 +01:00
Rhys Kidd
6cc29cf5e2 doxygen: Add doxygen_sqlite3.db to .gitignore
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:48:06 +01:00
Emil Velikov
846c60fc7d docs: add news item and link release notes for mesa 10.6.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 20:36:44 +01:00
Emil Velikov
6dfce109c2 docs: Add sha256 checksums for the 10.6.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 89cbd91b17)
2015-07-11 20:35:06 +01:00
Emil Velikov
66d3543845 Add release notes for the 10.6.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9643cce94c)
2015-07-11 20:35:04 +01:00
Dave Airlie
ad2c3905d3 tgsi: add DFMA to the opcode infer functions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-11 08:05:56 +01:00
Dave Airlie
e70d051560 r600g: move sampler/ubo index registers before temp reg
temp_reg needs to be last, as we increment things
away from it, otherwise on cayman some tests were overwriting
the index regs.

Fixes 2 piglit with ARB_gpu_shader5 forced on cayman.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-11 16:31:02 +10:00
Dave Airlie
c397bd1407 r600g: fix sampler/ubo indexing on cayman
Cayman needs a different method to upload the CF IDX0/1

This fixes 31 piglits when ARB_gpu_shader5 is forced on
with cayman.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-11 16:30:39 +10:00
Ilia Mirkin
1bfa25e88d nv50, nvc0: enable at least one color RT if alphatest is enabled
Fixes the following piglits:
  fbo-alphatest-nocolor
  fbo-alphatest-nocolor-ff

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-10 22:15:56 -04:00
Kenneth Graunke
4fe15717ce i965: Remove special case for layered drawbuffer attachments.
When binding a layered texture, the layer is already 0.  There's no need
to special case this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-10 19:14:41 -07:00
Kenneth Graunke
6be024f44d i965/gen6: Set up layer constraints properly for depth buffers.
This ports over Chris Forbes' equivalent fixes in gen7_misc_state.c
from commit 77d55ef481.

No Piglit changes on Sandybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-10 19:13:42 -07:00
Kenneth Graunke
f3a620e2a6 i965: Label the repclear shader "meta repclear" rather than "meta clear".
Color clears can be performed via two separate shaders - one is the
generic "meta clear" shader (in meta.c); the other is the i965 specific
"repclear" shader (in brw_meta_fast_clear.c).

Giving them separate names makes them distinguishable when reading
INTEL_DEBUG=shader_time output.

v2: Call it "meta repclear", as suggested by Jason.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-10 19:10:19 -07:00
Kenneth Graunke
a078e13a7c i965: Fix indentation in emit_control_data_bits().
The last patch left the code indented too far.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-10 18:21:27 -07:00
Kenneth Graunke
0edb084f9d i965/gs: Move vertex_count != 0 check up a level; skip one caller.
Paul's original code had emit_control_data_bits() skip the URB write if
vertex_count was 0.  This meant wrapping every control data write in a
conditional write.

We accumulate control data bits in a single UD (32-bit) register.  For
simple shaders that don't emit many vertices, the control data header
will be <= 32-bits long, so we only need to write it once at the end of
the shader.

For shaders with larger headers, we write out batches of control data
bits at EmitVertex(), when (vertex_count * bits_per_vertex) % 32 == 0.
On the first EmitVertex() call, the above expression will evaluate to
true simply because vertex_count == 0.  But we want to avoid emitting
the control data bits, because we haven't accumulated 32-bits worth yet.

In other words, the vertex_count != 0 check is really only necessary in
the EmitVertex() batching case, not the end-of-thread case.

This saves a CMP/IF/ENDIF in every shader that uses EndPrimitive() or
multiple streams.  The only downside is that a shader which emits no
vertices at all will execute an additional URB write---but such shaders
are pointless and not worth optimizing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-10 18:21:15 -07:00
Timothy Arceri
0fae4e451b glsl: use set rather than old hash table for ir_validate
When the new hash table implementation was added to Mesa it claimed to be much
faster, see commits 35fd61bd99 and 72e55bb688.

The set implementation follows the same implementation strategy so this should
be faster and there was no need to store a data field.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-11 10:25:32 +10:00
Chad Versace
75784243df mesa: Fix generation of git_sha1.h.tmp for gitlinks
Don't assume that $(top_srcdir)/.git is a directory. It may be a
gitlink file [1] if $(top_srcdir) is a submodule checkout or a linked
worktree [2].

[1] A "gitlink" is a text file that specifies the real location of
    the gitdir.
[2] Linked worktrees are a new feature in Git 2.5.

Cc: "10.6, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-10 11:22:47 -07:00
Rob Clark
15d3524ad2 freedreno/a4xx: occlusion query support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark
2b7a54452f freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark
e44845472a freedreno/ir3/sched: fixup new instr's block
If we split addr/pred, the original instruction could have originated
from a different block.  If we don't fixup the block ptr we hit asserts
later (in debug builds).

NOTE: perhaps we don't want to try to preserve addr/pred reg's across
block boundaries.. this at least needs some thought in case addr/pred
writes end up inside a conditional block..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark
a1a6f00782 freedreno/ir3/ra: fix failed assert for a0/p0
The address and predicate register are special, they don't get assigned
in RA.  So do a better job of ignoring them rather than hitting later
asserts.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark
65b2ae510b freedreno/ir3: shader-db traces
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:31 -04:00
Rob Clark
422296e38d freedreno: fix crash in fd_invalidate_resource()
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:30 -04:00
Rob Clark
ab3ba21f97 vc4: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush().  So driver
should use fence_ref() which will unref the old fence if not NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
2015-07-10 11:57:30 -04:00
Rob Clark
749dced4b3 ilo: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush().  So driver
should use fence_ref() which will unref the old fence if not NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Chia-I Wu <olvaffe@gmail.com>
2015-07-10 11:57:30 -04:00
Rob Clark
7e0a26defe freedreno: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush().  So driver
should use fence_ref() which will unref the old fence if not NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:30 -04:00
Rob Clark
f60354ee72 gallium: clarify reference counting for fence
Nowhere was it spelled out that the state tracker may expect the pipe
driver to unref the old fence.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-10 11:57:30 -04:00
Rob Clark
0a8af6361e xa: don't leak fences
XA was never unref'ing last_fence in the various call paths to
pipe->flush().  Add this to xa_context_flush() and update the other
open-coded calls to pipe->flush() to use xa_context_flush() instead.

This fixes a memory leak reported with xf86-video-freedreno.

Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-10 11:57:30 -04:00
Kenneth Graunke
f12302b898 i965/vs: Get rid of brw_vs_compile completely.
After tearing it out another level or two, and just passing the key and
vp directly, we can finally remove this struct.  It also eliminates a
pointless memcpy() of the key.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:10:06 -07:00
Kenneth Graunke
64390967c1 i965/vs: Remove 'c'/vs_compile from vec4_vs_visitor.
At this point, the brw_vs_compile structure only contains the key and
gl_vertex_program pointer.  We may as well pass and store them directly;
it's simpler and more convenient (key-> instead of vs_compile->key...).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:08:42 -07:00
Kenneth Graunke
13372a0ce7 i965/vec4: Move c->last_scratch into vec4_visitor.
Nothing outside of vec4_visitor uses it, so we may as well keep it
internal.

Commit db9c915abc for the vec4 backend.

(The empty class will be going away soon.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:29 -07:00
Kenneth Graunke
8524deb8c8 i965/vec4: Move total_scratch calculation into the visitor.
This is more consistent with how we do it in the FS backend, and reduces
a tiny bit of duplication.  It'll also allow for a bit more tidying.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:27 -07:00
Kenneth Graunke
dc776ffb90 i965/vec4: Move perf_debug about register spilling into the visitor.
This patch makes us only issue the performance warning about register
spilling if we actually spilled registers.  We also use scratch space
for indirect addressing and the like.

This is basically commit c51163b0cf for
the vec4 backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:26 -07:00
Kenneth Graunke
0163c99e8f i965/vec4: Plumb log_data through so the backend_shader field gets set.
Jason plumbed this through a while back in the FS backend, but
apparently we were just passing NULL in the vec4 backend.

This patch passes brw in as intended.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-07-09 17:06:16 -07:00
Kenneth Graunke
308c0bf743 i965: Switch on shader stage in nir_setup_outputs().
Adding new shader stages to a switch statement is less confusing than an
if-else-if ladder where all but the first case are fragment shader
specific (but don't claim to be).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-09 16:56:35 -07:00
Brian Paul
04a57a7ee9 tgsi: whitespace fixes in tgsi_parse.c
Trivial.
2015-07-09 16:58:07 -06:00
Brian Paul
1f02a82c8b gallium: fix comment typo in p_shader_tokens.h 2015-07-09 16:56:20 -06:00
Brian Paul
27d8a690c4 gallium/docs: s/treaded/treated/ typo in tgsi.rst
Trivial.
2015-07-09 16:56:20 -06:00
Matt Turner
a2dde3a8da util: Don't link to SHA1 library if shader-cache is disabled.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-09 15:49:02 -07:00
Matt Turner
c04339486a i965: Set brw->batch.emit only #ifdef DEBUG.
It's only used inside #ifdef DEBUG. Cuts ~1.7k of .text, and more
importantly prevents a larger code size regression in the next commit
when the .used field is replaced and calculated on demand.

   text     data      bss      dec      hex  filename
4945468   195152    26192  5166812   4ed6dc  i965_dri.so before
4943740   195152    26192  5165084   4ed01c  i965_dri.so after

And surround the emit and total fields with #ifdef DEBUG to prevent
such mistakes from happening again.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-09 15:17:02 -07:00
Ben Widawsky
0166b4c165 i965/hsw: Implement end of batch workaround
This patch can cause an infinite recursion if the previous patch titled, "i965:
Track finished batch state" isn't present (backporters take notice).

v2: Sent out the wrong patch originally. This patches switches the order of
flushes, doing the generic flush before the CC_STATE, and the required
workaround flush afterwards

v3: Only perform workaround for render ring
Add text to the BATCH_RESERVE comments

v4 (By Ken): Rebase; update citation to mention PRM and Wa name; combine two
blocks.

http://otc-mesa-ci.jf.intel.com/job/bwidawsk/171/

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-09 11:11:06 -07:00
Christian König
2cfa64e159 st/vdpau: fix mixer size checks
We need to check what the 3D pipe is able to handle for the mixer, not what
the decoder is able to decode. This fixes output of resolutions like 720x1280.

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: mesa-stable@lists.freedesktop.org
2015-07-09 10:44:04 +02:00
Christian König
bbfdf5c17b vl: cleanup video buffer private when the decoder is destroyed
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=90728

Signed-off-by: Christian König <christian.koenig@amd.com>
CC: mesa-stable@lists.freedesktop.org
2015-07-09 10:44:03 +02:00
Samuel Pitoiset
adc816a1e4 nv50: avoid segfault with enabled but unbound vertex attrib
Before validating vertex arrays we need to check if a VBO is present.
Checking if vb->buffer is not NULL fixes the issue.

Fixes the following piglit test:
  gl-3.1-vao-broken-attrib

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-08 21:03:23 +02:00
Samuel Pitoiset
ec151e2f72 nvc0: fix wrong use of BLIT_SRC_Y_INT for 2D texture copy
According to nv50, this should be src->ms_y instead of src->ms_x. This
code is here since 2012, so it's probably a typo error which has never
been detected since a long time. I didn't do a full piglit run to check
if it fixes some other weird issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-08 21:03:23 +02:00
Kenneth Graunke
efb36271a9 nir: Fix comment above nir_convert_from_ssa() prototype.
Connor renamed the parameter, inverting the sense.
Update the comment accordingly.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-07-08 11:28:08 -07:00
Julien Isorce
e27ea99644 egl/dri2: load libglapi.0.dylib on osx
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90903
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-08 13:19:33 +01:00
Julien Isorce
7d642442d9 egl: use unix defines on osx with clang
I also created an bug in Khronos 's bugzilla as you suggested:
https://www.khronos.org/bugzilla/show_bug.cgi?id=1356
I'll let you know if I get feedback from this bug or else where.

Patch with updated error messages:

[PATCH] eglplatform: treat __APPLE__ the same way as __unix__ to handle X11 types

  CC       eglapi.lo
./egldisplay.h:258:19: error: unknown type name 'Display'
_eglGetX11Display(Display *native_display, const EGLint *attrib_list);
eglapi.c:290:4: error: array size is negative
   STATIC_ASSERT(sizeof(void*) == sizeof(nativeDisplay));
eglapi.c:291:25: warning: cast to 'void *' from smaller integer type
   'EGLNativeDisplayType' (aka 'int') [-Wint-to-void-pointer-cast]
   native_display_ptr = (void*) nativeDisplay;
eglapi.c:307:32: error: use of undeclared identifier 'Display'
      dpy = _eglGetX11Display((Display*) native_display, attrib_list);
eglapi.c:776:35: error: use of undeclared identifier 'Window'
      native_window = (void*) (* (Window*) native_window);
eglapi.c:847:35: error: use of undeclared identifier 'Pixmap'
      native_pixmap = (void*) (* (Pixmap*) native_pixmap);

Bugzilla Mesa: https://bugs.freedesktop.org/show_bug.cgi?id=90249
Bugzilla Khronos: https://www.khronos.org/bugzilla/show_bug.cgi?id=1356
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-08 13:19:33 +01:00
Julien Isorce
c7f3657450 darwin: Suppress type conversion warnings for GLhandleARB
This patch and its description are inspired from Jose Fonseca
explanations and suggestions.

With this patch the following logic applies and only if __APPLE__:

When building mesa, GLhandleARB is defined as unsigned long and
at some point casted to GLuint in gl fuction implementations.
These exact points are where these errors and warnings appear.

When building an application GLhandleARB is defined as void*.
Later when calling a gl function, for example glBindAttribLocationARB,
it will be dispatched to _mesa_BindAttribLocation. So internally
void* will be treated as unsigned long which has the same size.
So the same truncation happens when casting it to GLuint.

Same when GLhandleARB appears as return value.
For mesa it will be GLuint -> unsigned long.
For an application it will be GLuint -> unsigned long -> void*.
Note that the value will be preserved when casting back to GLuint.

When GLhandleARB appears as a pointer there are also separate
entry-points, i.e. _mesa_FuncNameARB. So the same logic can
be applied.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66346
Signed-off-by: Julien Isorce <julien.isorce@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-08 13:18:42 +01:00
Varad Gautam
64cb014037 android: freedreno: add missing components to the build
Freedreno requires {a4xx,ir3}_SOURCES and NIR to build.

Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-08 13:17:22 +01:00
Chris Wilson
f1d08c4f75 i965: Move pipecontrol workaround bo to brw_pipe_control
With the exception of gen8, the sole user of the workaround bo are for
emitting pipe controls. Move it out of the purview of the batchbuffer
and into the pipecontrol.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-07-08 11:11:50 +01:00
Chris Wilson
f241345793 loader: Look for any version of currently linked libudev.so
Since there was an ABI break and linking twice against libudev.so.0 and
libudev.so.1 causes the application to quickly crash, we first check if
the application is currently linked against libudev before dlopening a
local handle. However for backwards/forwards compatability, we need to
inspect the application for current linkage against all known versions
first. Not doing so causes a crash when both libraries are present and
so mesa chooses libudev.so.1 but the application was linked against
libudev.so.0.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Emil Velikov:

I'm ever so slightly conserned that RTLD_NOLOAD is not part of the POSIX
standard, thus it's missing on some platforms (*BSD seems ok, while
Solaris, MacOS are not).

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-07-08 11:04:02 +01:00
Chris Wilson
c8d3ebaffc i965: Query whether we have kernel support for the TIMESTAMP register once
Move the query for the TIMESTAMP register from context init to the
screen, so that it is only queried once for all contexts.

On 32bit systems, some old kernels trigger a hw bug resulting in the
TIMESTAMP register being shifted and the low 32bits always zero. Detect
this by repeating the read a few times and check the register is
incrementing every 80ns as expected and not stuck on zero (as would be
the case with the buggy kernel/hw.).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-08 10:57:35 +01:00
Ilia Mirkin
38c2ec5ff0 nvc0: turn sample counts off during blit
Fixes the following piglits:
  occlusion_query_meta_fragments
  occlusion_query_meta_no_fragments

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-07-07 23:07:41 -04:00
Timothy Arceri
87d2e15b1a mesa: use implementation specified MAX_VERTEX_ATTRIBS rather than hardcoded value
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-08 11:40:30 +10:00
Kenneth Graunke
73d0e7f345 i965/vs: Fix matNxM vertex attributes where M != 4.
Matrix vertex attributes have their columns padded out to vec4s, which
I was failing to account for.  Scalar NIR expects them to be packed,
however.

Fixes 1256 dEQP tests on Broadwell.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-07-07 16:44:22 -07:00
Marek Olšák
6611f65047 st/dri: don't set PIPE_BIND_SCANOUT for MSAA surfaces
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91231

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-07 21:36:50 +02:00
Brian Paul
10cff5e1ae gallium/hud: display percentages with % suffix
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-07 13:21:20 -06:00
Brian Paul
a804f58243 gallium/hud: add PIPE_DRIVER_QUERY_TYPE_MICROSECONDS for HUD
This allows drivers to report queries in units of microseconds and
have the HUD display "us" (microseconds), "ms" (milliseconds) or "s"
(seconds) on the graph.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-07 12:36:48 -06:00
Brian Paul
86ebd31c67 gallium/hud: replace byte units flag with pipe_driver_query_type
Instead of using a boolean 'is bytes' value, use the pipe_driver_query_type
enum type.  This will let is add support for time values in the next patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-07 12:36:48 -06:00
Brian Paul
f025aec906 gallium/os: minor whitespace fixes in os_time.h
Trivial.
2015-07-07 12:36:48 -06:00
Francisco Jerez
7009e2683e i965/gen4-5: Enable 16-wide dispatch on shaders with control flow.
This was probably disabled due to a combination of several bugs in the
generator code (fixed earlier in this series) and a misunderstanding
of the hardware spec.  The documentation for most control flow
instructions mentions among other restrictions:

 "Instruction compression is not allowed."

This however doesn't have any implications on 16 wide not being
supported, because none of the control flow instructions have
multi-register operands (control flow instructions are not compressed
on more recent hardware either, except maybe SNB's IF with inline
compare).  In fact Gen4-5 had 16-wide control flow masks and stacks,
and the spec mentions in several places that control flow instructions
push and pop 16 channels worth of data -- Otherwise there doesn't seem
to be any indication that it shouldn't work.

Causes no piglit regressions, and gives the following shader-db
results on ILK:

 total instructions in shared programs: 4711384 -> 4711384 (0.00%)
 instructions in affected programs:     0 -> 0
 helped:                                0
 HURT:                                  0
 GAINED:                                1215
 LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-07 20:20:22 +03:00
Francisco Jerez
24842e18aa i965/gen4-5: Program the execution size correctly for DO/WHILE instructions.
From the hardware docs for the DO instruction:

 "Execution size is ignored for this instruction."

My observation on ILK hardware contradicts the spec though, channels
over the execution size of a DO instruction won't enter the loop, and
channels over the execution size of a WHILE instruction will exit the
loop after the first iteration -- The latter is consistent with the
spec though, there's no claim about the execution size being ignored
for the WHILE instruction so it's not completely unexpected that it
has an influence on the evaluation of EMask.

The execute_size argument of brw_DO() shouldn't have any effect on
Gen6 and newer hardware.  On Gen4-5 WHILE instructions inherit the
execution size from the matching DO, so this patch should fix them
too.  The execution size of BREAK and CONT instructions was already
being set correctly.

Fixes some 50 piglit tests on Gen4-5 when forced to run shaders with
conditional and loop instructions 16-wide,
e.g. shaders/glsl-fs-continue-inside-do-while.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-07 20:20:22 +03:00
Francisco Jerez
40e2102e52 i965/gen4-5: Set ENDIF dst and src0 fields to the null register.
The hardware docs don't mention explicitly what these fields should
be, but I've verified experimentally on ILK that using a GRF as
destination causes the register to be corrupted when the execution
size of an ENDIF instruction is higher than 8 -- and because the
destination we were using was g0, eventually a hang.

Fixes some 150 piglit tests on Gen4-5 when forced to run shaders with
if conditionals 16-wide, e.g. shaders/glsl-fs-sampler-numbering-3.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-07 20:20:22 +03:00
Michel Dänzer
248b26429f radeonsi: Use param export count from si_llvm_export_vs in si_shader_vs
This eliminates the error prone logic in si_shader_vs recalculating this
value.

It also fixes TGSI_SEMANTIC_CLIPDIST outputs incorrectly not being
counted for VS exports. They need to be counted because they are passed
to the pixel shader as parameters as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91193
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-07 12:35:35 +09:00
Matt Turner
b0334a9aeb mesa: Convert some asserts into STATIC_ASSERT.
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-07-06 16:04:56 -07:00
Roland Scheidegger
7b06af9d3c gallivm: fix lp_build_compare_ext
The expansion should always be to the same width as the input arguments
no matter what, since these functions should work with any bit width of
the arguments (the sext is a no-op on any sane simd architecture).
Thus, fix the caller expecting differently.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=91222

Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-06 23:52:32 +02:00
Kenneth Graunke
128de6f6d7 mesa: Add a MUST_CHECK macro for __attribute__((warn_unused_result)).
In the kernel, this is called __must_check; all our attribute macros in
Mesa appear to be uppercase, so I went with that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-06 13:40:16 -07:00
Neil Roberts
86a3557d7c glsl: Make sure not to dereference NULL
In this bit of code point_five can be NULL if the expression is not a
constant. This fixes it to match the pattern of the rest of the chunk
of code so that it checks for NULLs.

Cc: Matt Turner <mattst88@gmail.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-06 11:52:37 -07:00
Neil Roberts
18039078e0 glsl: Add missing check for whether an expression is an add operation
There is a piece of code that is trying to match expressions of the
form (mul (floor (add (abs x) 0.5) (sign x))). However the check for
the add expression wasn't checking whether it had the expected
operation. It looks like this was just an oversight because it doesn't
match the pattern for the rest of the code snippet. The existing line
to check whether add_expr!=NULL was added as part of a coverity fix in
3384179f.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91226
Cc: Matt Turner <mattst88@gmail.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-06 11:52:10 -07:00
Kenneth Graunke
d9ab95b365 i965: Reserve more batch space to accomodate Gen6 perfmonitors.
Ben noticed that I said each PIPE_CONTROL was 4 DWords, but it's
actually 5 DWords on Gen6-7.  We've been reserving insufficient space
for performance monitoring on Sandybridge, which means it would likely
break if you used that functionality.  (Thankfully, no one does...)

Also, the existing number of 146 was the result of me flubbing up the
arithmetic: it should have actually been 140.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-07-06 10:00:47 -07:00
Neil Roberts
493af150fb i965/skl: Set the pulls bary bit in 3DSTATE_PS_EXTRA
On Gen9+ there is a new bit in 3DSTATE_PS_EXTRA that must be set if
the shader sends a message to the pixel interpolator. This fixes the
interpolateAt* tests on SKL, apart from interpolateatsample-nonconst
but that is not implemented anywhere so it's not a regression.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.6 10.5" <mesa-stable@lists.freedesktop.org>
2015-07-06 08:15:31 -07:00
Marek Olšák
fc2726e4af winsys/radeon: use os_wait_until_zero in radeon_bo_set_tiling 2015-07-05 15:08:59 +02:00
Marek Olšák
f1be3d8cdd radeonsi: don't flush an empty IB if the only thing we need is a fence
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-05 15:08:59 +02:00
Marek Olšák
7316cc92f3 gallium/os: add conversion and wait functions for absolute timeouts
Absolute timeouts are used with the amdgpu kernel driver.
It also makes waiting for several variables and fences at the same time
easier (the timeout doesn't have to be recalculated after every wait call).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-05 15:08:59 +02:00
Marek Olšák
3836857a77 gallium/os: add os_wait_until_zero (v2)
This will be used by radeon and amdgpu winsyses.
Copied from the amdgpu winsys.

v2: use volatile and p_atomic_read

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-05 15:08:59 +02:00
Marek Olšák
245b464d5c gallium/radeon: mark the gpu load thread stop trigger as volatile 2015-07-05 15:08:59 +02:00
Marek Olšák
872ede6fd1 st/mesa: if a fence isn't returned, assume it's signalled
The reason might be that no commands have been submitted before the flush
and the GPU is idle.
2015-07-05 15:08:59 +02:00
Marek Olšák
5a69929683 gallium: remove redundant pipe_context::fence_signalled
fence_finish(timeout=0) does the same thing

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-05 15:08:59 +02:00
Marek Olšák
bd214f030f gallium: use fence_finish instead of fence_signalled in state trackers
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-05 15:08:59 +02:00
Marek Olšák
3da1c7919d gallium: handle fence_finish timeout in various drivers
I copied what fence_signalled does.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-05 15:08:58 +02:00
Marek Olšák
d50598fbad gallium/docs: remove out-of-date document about D3D11 features
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-05 15:08:58 +02:00
Marek Olšák
d3f4f6b2e9 radeonsi: fix a hang with DrawTransformFeedback on 4 SE chips
Cc: 10.6 10.5 <mesa-stable@lists.freedesktop.org>
Acked-by: Christian König <christain.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-05 15:06:50 +02:00
Emil Velikov
ff0a41b5d5 docs: add news item and link release notes for mesa 10.5.9
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-04 12:53:22 +01:00
Emil Velikov
c427daa23e docs: Add sha256sums for the 10.5.9 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 4a0bd3dcff)
2015-07-04 12:50:03 +01:00
Emil Velikov
24bf11e9c7 Add release notes for the 10.5.9 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 7f40d08374)
2015-07-04 12:50:00 +01:00
Timothy Arceri
939dc28506 glsl: update types for unsized arrays of members
Assigns a new array type based on the max access of
unsized array members. This is to support arrays of arrays.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-04 17:13:10 +10:00
Timothy Arceri
7ecb11c81c glsl: update assert to support arrays of arrays
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-04 17:12:38 +10:00
Timothy Arceri
9565e34528 glsl: allow precision qualifiers for AoA
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-04 13:57:25 +10:00
Ilia Mirkin
f70719cc4b nv50/ir: UCMP arguments are float, so make sure modifiers are applied
The first argument to UCMP needs to be compared against 0, but the
latter arguments are treated as float and need to be able to properly
apply neg/abs arguments. Adjust the inferSrcType function accordingly.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-07-03 20:23:03 -04:00
Erik Faye-Lund
83984f134b glsl: add a missing call to _mesa_locale_init
After c61bc6e ("util: port _mesa_strto[df] to C"), "make check"
fails due to a missing _mesa_locale_init. Fixup this oversight,
by moving the stand-alone compiler initializer inside
initialize_context_to_defaults().

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
2015-07-03 10:56:55 -07:00
Mario Kleiner
28dda47ae4 winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
Same problem and fix as for nouveau's ZaphodHeads trouble.

See patch ...

"nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads."

... for reference.

Cc: "10.3 10.4 10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-03 19:24:12 +02:00
Marek Olšák
97ec2c694f r600g: disable single-sample fast color clear due to hangs
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73528
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82186

Cc: 10.4 10.5 10.6 <mesa-stable@lists.freedesktop.org>
2015-07-03 16:26:11 +02:00
Marek Olšák
7744687ddb docs/relnotes: document create_context_robustness extensions 2015-07-03 16:24:29 +02:00
Marek Olšák
914365c0eb r600g,radeonsi: implement get_device_reset_status
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-03 16:23:28 +02:00
Marek Olšák
a34e871449 dri/common: allow BGRX sRGB visuals 2015-07-03 16:23:28 +02:00
Marek Olšák
9e127325ef mesa: fix sRGB rendering for GLES1 2015-07-03 16:23:28 +02:00
Marek Olšák
32aa1d769d egl: sort extension lists alphabetically
and add the missing KHR_gl_colorspace case.
2015-07-03 16:23:28 +02:00
Anatoli Antonovitch
b193f2b9b6 egl: implement EGL_KHR_gl_texture_3D_image
Most of the code has been in place already.
2015-07-03 16:23:28 +02:00
Rob Clark
a84505c719 freedreno/ir3: don't be confused by eliminated indirects
If an instruction using address register value gets eliminated, we need
to remove it from the indirects list, otherwise it causes mayhem in
sched for scheduling address register usage.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-03 08:56:09 -04:00
Rob Clark
2215ff2a5d freedreno/ir3: sched fixes for addr register usage
A handful of fixes and cleanups:

1) If we split addr/pred, we need the newly created instruction to
   end up in the unscheduled_list
2) Avoid scheduling a write to the address register if there is no
   instruction using the address register that is otherwise ready
   to schedule.  Note that I currently don't bother with the same
   logic for predicate register, since the only instructions using
   predicate (br/kill) don't take any other src registers, so this
   situation should not arise.
3) few other cosmetic cleanups

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-03 08:56:09 -04:00
Rob Clark
6b9f5cd5f7 freedreno/ir3: fix indirects tracking
cp would update instr->address but not update the indirects array
resulting in sched getting confused when it had to 'spill' the address
register.  Add an ir3_instr_set_address() helper to set instr->address
and also update ir->indirects, and update all places that were writing
instr->address to use helper instead.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-03 08:56:09 -04:00
Ilia Mirkin
0a155538eb gallium/ttn: mark location specially in nir for color0-writes-all
We need to distinguish a shader that has separate writes to each MRT
from one which is supposed to write the data from MRT 0 to all the MRTs.
In TGSI this is done with a property. NIR doesn't have that, so encode
it as a funny location and decode on the other end.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-07-03 08:56:09 -04:00
Rob Clark
959b47262b nir/lower_phis_to_scalar: undef is trivially scalarizable
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-07-03 08:56:09 -04:00
Rob Clark
29addf50e0 gallium/ttn: IN/OUT are only array if ArrayID != 0
Fixes issue with gallium HUD.  See this thread for details:
http://lists.freedesktop.org/archives/mesa-dev/2015-June/087140.html

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-07-03 08:56:09 -04:00
Rob Clark
fc73f8ab8c tgsi: update docs for ArrayID usage
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-03 08:56:09 -04:00
Neil Roberts
7abc1e3286 i965/fs: Don't disable SIMD16 when using the pixel interpolator
There was a comment saying that in SIMD16 mode the pixel interpolator
returns coords interleaved 8 channels at a time and that this requires
extra work to support. However, this interleaved format is exactly
what the PLN instruction requires so I don't think anything needs to
be done to support it apart from removing the line to disable it and
to ensure that the message lengths for the send message are correct.

I am more convinced that this is correct because as it says in the
comment this interleaved output is identical to what is given in the
thread payload. The code generated to apply the plane equation to
these coordinates is identical on SIMD16 and SIMD8 except that the
dispatch width is larger which implies no special unmangling is
needed.

Perhaps the confusion stems from the fact that the description of the
PLN instruction in the IVB PRM seems to imply that the src1 inputs are
not interleaved so it wouldn't work. However, in the HSW and BDW PRMs,
the pseudo-code is different and looks like it expects the interleaved
format. Mesa doesn't seem to generate different code on IVB to
uninterleave the payload registers and everything is working so I can
only assume that the PRM is wrong.

I tested the interpolateAt tests on HSW and did a full Piglit run on
IVB on there were no regressions.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-07-03 09:39:09 +01:00
Jason Ekstrand
89bd5ee64c nir: Don't allow copying SSA destinations
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-07-02 15:42:33 -07:00
Ilia Mirkin
197a19f9ed mesa/prog: relative offsets into constbufs are not constant
The optimization logic relies on being able to read out constbuf values
from program parameters. However that only works if there's no relative
addressing involved.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91173
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-07-02 13:29:51 -04:00
Mike Stroyan
fe2b748a39 i965: allocate at least 1 BLEND_STATE element
When there are no color buffer render targets, gen6 and gen7 still
use the first BLEND_STATE element to determine alpha test.
gen6_upload_blend_state was allocating zero elements when
ctx->Color.AlphaEnabled was false.
That left _3DSTATE_CC_STATE_POINTERS or _3DSTATE_BLEND_STATE_POINTERS
pointing to random data from some previous brw_state_batch().
That sometimes suppressed depth rendering when those bits
happened to mean COMPAREFUNC_NEVER.
This produced flickering shadows for dota2 reborn.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80500
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-02 00:12:52 -07:00
Iago Toral Quiroga
9d408a41a3 mesa/st: Add checks for signed/unsigned integer conversions in ReadPixels
These checks were in Mesa prior to commit fbba25bba, but they were
not necessary for the purpose that Mesa intended (check if we could
resolve ReadPixels via memcpy), so that commit took them away.

Unfortunately, it seems that some Gallium drivers rely on these
checks to make the decision of whether they should fallback to Mesa's
implementation of ReadPixels correctly. Michel Dänzer reported that
the following piglit test would fail on radeonsi after commit
fbba25bba:

spec@ext_texture_integer@fbo_integer_readpixels_sint_uint

This patch puts the checks back in Gallium, where they are needed.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-02 08:15:51 +02:00
Ilia Mirkin
c3215ef204 nv50/ir: don't emit src2 in immediate form
In the immediate form, src2 == dst, so it does not need to be emitted.
Otherwise it overlaps with the immediate value's low bits.

Fixes: 09ee907266 (nv50/ir: Fold IMM into MAD)
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-02 00:15:27 -04:00
Alexandre Courbot
1087c566e3 nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capability
Prefer blit-based texture transfers only if the chip has dedicated VRAM
since it would translate to a copy into the same memory on shared-memory
chips.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-01 22:40:18 -04:00
Ilia Mirkin
4f57cdba27 mesa: reset the source packing when creating temp transfer image
Commit 4b249d2ee (mesa: Handle transferOps in texstore_rgba) introduced
proper transferops handling, but in updating the source to the newly
allocated temporary image neglected to reset the source packing. Set it
to the default which should be appropriate for the floats used.

Fixes: 4b249d2ee (mesa: Handle transferOps in texstore_rgba)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91173
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-01 21:06:48 -04:00
Alexandre Courbot
e212a80db3 nvc0: create screen fence objects with coherent attribute
This is required on non-coherent architectures to ensure the value of
the fence is correct at all times. Failure to do this results in the
display freezing for a few seconds every now and then on Tegra.

The NOUVEAU_BO_COHERENT is a no-op for coherent architectures, so behavior
on x86 should not be affected by this patch.

Also bump the required libdrm version to 2.4.62, which introduced this
flag.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-07-02 02:01:09 +03:00
Nanley Chery
2c8f251369 i965/gen9: use an unreserved surface alignment value
Although the horizontal and vertical alignment fields are ignored here,
0 is a reserved value for them and may cause undefined behavior. Change
the default value to an abitrary valid one.

v2: add comment about chosen value (Topi).

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
2015-07-01 10:22:40 -07:00
Jason Ekstrand
80fc9c01df i965/fs: Use the builder directly for the gen6 interpolation add(32)
Now that we can create builders with a bigger width than their parent as
long as it's exec_all, we don't need to create the instruction manually.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-01 09:24:46 -07:00
Francisco Jerez
dabec9c293 i965/fs: Relax fs_builder channel group assertion when force_writemask_all is on.
This assertion was meant to catch code inadvertently escaping the
control flow jail determined by the group of channel enable signals
selected by some caller, however it seems useful to be able to
increase the default execution size as long as force_writemask_all is
enabled, because force_writemask_all is an explicit indication that
there is no longer a one-to-one correspondence between channels and
SIMD components so the restriction doesn't apply.

In addition reorder the calls to fs_builder::group and ::exec_all in a
couple of places to make sure that we don't temporarily break this
invariant in the future for instructions with exec_size higher than
the dispatch width.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-01 09:24:46 -07:00
Ilia Mirkin
8276ba260e nouveau: rename var name for nouveau_vieux to avoid conflict with nouveau
We want to require different versions for nouveau and nouveau_vieux.
autoconf will only check for NOUVEAU once if both drivers are enabled,
meaning both version checks don't get executed. Rename the nouveau_vieux
one to NVVIEUX to avoid the issue.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Martin Peres <martin.peres@free.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-01 10:45:42 -04:00
Tapani Pälli
f045b8b2ff glsl: create program resource list after LinkShader
Resource list can be created properly  only after LinkShader hook
has been called to make sure all dead variables have been removed.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90925
2015-07-01 14:40:34 +03:00
Tapani Pälli
73afa31f07 glsl: expose build_program_resource_list function
This is required so that we can move resource list creation
to happen later.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-07-01 14:40:34 +03:00
Tapani Pälli
ccaf37f449 glsl: build stageref mask using IR, not symbol table
Instead of using symbol table, build mask by inspecting IR. This
change is required by further patches to move resource list creation
to happen later when symbol table does not exist anymore.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-07-01 14:40:34 +03:00
Chia-I Wu
19ea623586 ilo: remove ilo_image_params
It suffices to use ilo_image_layout directly.
2015-07-01 15:54:39 +08:00
Chia-I Wu
b4c66e4d3e ilo: add image_init_gen6_transfer_layout()
It replaces img_init_for_transfer().
2015-07-01 15:54:39 +08:00
Chia-I Wu
3c6af396f9 ilo: add image_set_gen6_bo_size()
It replaces img_calculate_bo_size().
2015-07-01 15:54:39 +08:00
Chia-I Wu
0896d629fd ilo: add image_set_gen6_{hiz,mcs}
They replace img_calculate_{hiz,mcs}_size().
2015-07-01 15:54:39 +08:00
Chia-I Wu
0da3b732ad ilo: add image_get_gen6_monolithic_size()
It replaces img_align().
2015-07-01 15:54:39 +08:00
Chia-I Wu
0faeb21dc0 ilo: add image_get_gen6_lods()
It replaces img_init_lods() and img_init_layer_height().
2015-07-01 15:54:39 +08:00
Chia-I Wu
f1946546c7 ilo: add image_get_gen{6,7}_alignment()
They replace img_init_alignments().
2015-07-01 15:54:39 +08:00
Chia-I Wu
c88e6cdfbf ilo: add image_get_gen6_{hiz,mcs}_enable()
They replace img_init_aux().
2015-07-01 15:54:39 +08:00
Chia-I Wu
c3b205dbeb ilo: add image_get_gen6_tiling()
It replaces img_init_tiling().
2015-07-01 15:54:39 +08:00
Chia-I Wu
9e13f5c85f ilo: add image_get_gen6_layout()
It replaces only img_init_walk() right now.  It will replace all img_init_*().
2015-07-01 15:54:39 +08:00
Ilia Mirkin
5dcb28c3d2 nv50/ir: copy joinAt when splitting both before and after
The current implementation only moves the joinAt when splitting after
the given instruction, not before it. So if you have a BB with

  foo
  instr
  bar
  joinat

and thus with joinAt set, we end up first splitting before instr, at
which point the instr's bb is updated to the new bb. Since that bb
doesn't have a joinAt set (despite containing one), when splitting after
the instr, there is nothing to copy over. Since the joinat will be in
the "split" bb irrespective of whether we're splitting before or after
the instruction, move it over in either case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91124
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-07-01 02:50:43 -04:00
Dave Airlie
4caaa2681e docs: update for llvmpipe fp64 support
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-01 12:53:44 +10:00
Dave Airlie
e35c571783 gallivm: add fp64 support. (v2.1)
This adds support for ARB_gpu_shader_fp64 and ARB_vertex_attrib_64bit to
llvmpipe.

Two things that don't mix well are SoA and doubles, see
emit_fetch_double, and emit_store_double_chan in this.

I've also had to split emit_data.chan, to add src_chan,
which can be different for doubles.

It handles indirect double fetches from temps, inputs, constants
and immediates. It doesn't handle double stores to indirects,
however it appears the mesa/st doesn't currently emit these,
it always does UARL/MOV combos, which will work fine.

tested with piglit, no regressions, all the fp64 tests seem to pass.

v2:
switch to using shuffles for fetch/store (Roland)
assert on indirect double stores - mesa/st never emits these (it uses MOV)
fix indirect temp/input/constant/immediates (Roland)
typos/formatting fixes (Roland)

v2.1:
cleanup some long lines, emit_store_double_chan cleanups.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-01 12:53:43 +10:00
Dave Airlie
5ccd61217d tgsi: add infer support for double opcodes.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-01 12:53:21 +10:00
Timothy Arceri
1de93f9499 freedreno: use consistent version string format
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-01 11:36:02 +10:00
Timothy Arceri
5afed936fe glsl: use consistent version string format
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-01 11:35:56 +10:00
Jason Ekstrand
ebe3043eea i965/fs: Fix PIXEL_X/Y in regs_read()
PIXEL_X/Y takes a vec2 in the first argument
2015-06-30 17:47:56 -07:00
Jason Ekstrand
830f67046a i965/fs: Remove the width field from fs_reg
As of now, the width field is no longer used for anything.  The width field
"seemed like a good idea at the time" but is actually entirely redundant
with the instruction's execution size.  Initially, it gave us the ability
to easily set the instructions execution size based entirely on register
widths.  With the builder, we can easiliy set the sizes explicitly and the
width field doesn't have as much purpose.  At this point, it's just
redundant information that can get out of sync so it really needs to go.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:51 -07:00
Jason Ekstrand
7f77abc9ed i965/fs_generator: Use inst->exec_size for determining hardware reg widths
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:51 -07:00
Jason Ekstrand
83458e7c53 i965/fs: Use exec_size instead of dst.width for computing component size
There are a variety of places where we use dst.width / 8 to compute the
size of a single logical channel.  Instead, we should be using exec_size.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:51 -07:00
Jason Ekstrand
9a0c883292 i965/fs: Use the builder dispatch_width for computing register offsets
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:51 -07:00
Jason Ekstrand
21803b7b33 i965/fs: Use the builder dispatch width instead of dst.width for pull constants
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:51 -07:00
Jason Ekstrand
c9676329dd i965/fs: Remove exec_size guessing from fs_inst::init()
Now that all of the non-explicit constructors are gone, we don't need to
guess anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:50 -07:00
Jason Ekstrand
b624ccc206 i965/fs_builder: Use the dispatch width for setting exec sizes
Previously we used dst.width but the two *should* be the same.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:50 -07:00
Jason Ekstrand
500525e960 i965/fs: Use exec_size for determining regs read/written and partial writes
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:50 -07:00
Jason Ekstrand
89bc4c78c3 i965/fs: Remove fs_inst constructors that don't take an explicit exec_size
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:50 -07:00
Jason Ekstrand
67c4c9e1a7 i965/fs: Make better use of the builder in shader_time
Previously, we were just depending on register widths to ensure that
various things were exec_size of 1 etc.  Now, we do so explicitly using the
builder.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:50 -07:00
Jason Ekstrand
f7dcc11603 i965/fs: Add a builder argument to offset()
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:13:48 -07:00
Jason Ekstrand
7fcbe14107 i965/fs: Move offset(fs_reg, unsigned) to brw_fs.h
Shortly, offset() will depend on the builder so we need it moved to some
place where it has access to that.

Reviewed-by: Iago Toral Quiroga <itoral@igali.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:11:19 -07:00
Jason Ekstrand
b535ba55ed i965/blorp: Explicitly set execution sizes for new'd instructions
This doesn't affect instructions allocated using the builder.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:11:19 -07:00
Jason Ekstrand
362eff7741 i965/fs: Set the builder group for emitting FB-write stencil/AA alpha
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:11:19 -07:00
Jason Ekstrand
438e9c8b88 i965/fs: Explicitly set the exec_size on the add(32) in interpolation setup
Soon we will start using the builder to explicitly set all the execution
sizes.  We could make a 32-wide builder, but the builder asserts that we
never grow it which is usually a reasonable assumption.  Since this one
instruction is a bit of an odd-ball, we just set the exec_size explicitly.

v2: Explicitly new the fs_inst instead of using the builder and setting
    exec_size after the fact.

v3: Set force_writemask_all with the builder instead of directly.  The
    builder over-writes it if we set it manually.  Also, if we don't have
    force_writemask_all in the builder it will assert-fail on SIMD32.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 16:11:19 -07:00
Jason Ekstrand
c5a8da5f24 i965/fs: Properly handle LOAD_PAYLOAD in fs_inst::regs_read
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-30 16:11:17 -07:00
Jason Ekstrand
12bc22ef58 i965/fs: Report the right value in fs_inst::regs_read() for PIXEL_X/Y
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 15:58:16 -07:00
Jason Ekstrand
aca5228011 i965/fs: Fix fs_inst::regs_read() for uniform pull constant loads
Previously, fs_inst::regs_read() fell back to depending on the register
width for the second source.  This isn't really correct since it isn't a
SIMD8 value at all, but a SIMD4x2 value.  This commit changes it to
explicitly be always one register.

v2: Use mlen for determining the number of registers read

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2015-06-30 15:58:12 -07:00
Jason Ekstrand
241317d59a i965/fs: Actually set/use the mlen for gen7 uniform pull constant loads
Previously, we were allocating the payload with different sizes per gen and
then figuring out the mlen in the generator based on gen.  This meant,
among other things, that the higher level passes knew nothing about it.

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-30 15:57:56 -07:00
Jason Ekstrand
3258e1b80d i965/fs: Use a switch statement in fs_inst::regs_read()
This makes things a little simpler, more efficient, and quite a bit more
readable.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-30 15:42:47 -07:00
Connor Abbott
aa7d4cecec nir: remove parent_instr from nir_register
It's no longer used.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-30 11:18:27 -07:00
Connor Abbott
f49e51ef44 nir: remove nir_src_get_parent_instr()
It's now unused.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-30 11:18:27 -07:00
Connor Abbott
0ecdf04060 i965/fs: emit constants only once
Before, we would lazily emit a MOV whenever we encountered a use of a
constant. Now that we have a dedicated file for SSA values, we can
instead only emit the MOV's once, which is more consistent and prevents
us from relying on CSE to re-combine the constants when they aren't
absorbed into the instruction.

total instructions in shared programs: 6078991 -> 6073118 (-0.10%)
instructions in affected programs:     402221 -> 396348 (-1.46%)
helped:                                1527
HURT:                                  0
GAINED:                                8
LOST:                                  2

v2: split this out from the previous commit (Jason)

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-30 11:18:27 -07:00
Connor Abbott
864907e2f1 i965/fs: use SSA values directly
Before, we would use registers, but set a magical "parent_instr" field
to indicate that it was actually purely an SSA value (i.e., it wasn't
involved in any phi nodes). Instead, just use SSA values directly, which
lets us get rid of the hack and reduces memory usage since we're not
allocating a nir_register for every value. It also makes our handling of
load_const more consistent compared to the other instructions.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-30 11:18:27 -07:00
Connor Abbott
2b1a1d8b12 nir/from_ssa: add a flag to not convert everything from SSA
We already don't convert constants out of SSA, and in our backend we'd
like to have only one way of saying something is still in SSA.

The one tricky part about this is that we may now leave some undef
instructions around if they aren't part of a phi-web, so we have to be
more careful about deleting them.

v2: rename and flip meaning of flag (Jason)

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-30 11:18:27 -07:00
Emil Velikov
af2aea40d2 egl/x11: handle when invalid drawable is passed in create_surface
0 is not used as a valid drawable id, as such there is no point in
attempting to query its geometry. Just bail out early and provide the
more meaningful EGL_BAD_NATIVE_WINDOW to the user.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-30 17:35:25 +01:00
Emil Velikov
4ea5223a95 egl/wayland: cleanup dri2_wl_create_surface error path
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-30 17:35:20 +01:00
Emil Velikov
0afa633507 egl/wayland: handle NULL native_window in create_surface
Raise EGL_BAD_NATIVE_WINDOW instead of crashing.

v2: s/Rise/Raise/ (spotted by Michel)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-30 17:34:31 +01:00
Emil Velikov
6098ef8244 egl/drm: plug memory leak
Free the memory for dri2_surf in the unlikely case that one provides
NULL for native_window. Also set the relevant EGL_ERROR to provide
feedback to the user.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-30 17:34:11 +01:00
Rob Clark
879dcf07f6 gallium/ttn: don't upset nir_validate w/ BRK's
Previously we were unconditionally doing ttn_get_src() even for
instructions with no src's.  Which created a lot of unnecessary
load_const instructions.  These were mostly harmless since NIR opt
passes would strip them back out.  But for an ENDIF following a
BRK, it would result in load_const instructions created after the
NIR break instruction.  Which nir_validate dislikes.

But we can actually just dtrt by using NumSrcRegs instead.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-30 12:13:44 -04:00
Rob Clark
d1f0e01979 gallium/ttn: add TXB2
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-30 12:13:44 -04:00
Rob Clark
6082515de7 gallium/ttn: partial fix for output arrays
It isn't quite yet practical to enable TGSI_ANY_INOUT_DECL_RANGE shader
cap yet, at least not in drivers that need lower_to_scalar pass (which
right now is all of the ttn users), since the register arrays do not get
converted to SSA, which angers nir_lower_alu_to_scalar.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-30 12:13:44 -04:00
Rob Clark
dc7e6463d3 nir: cleanup open-coded instruction casts
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-06-30 12:13:44 -04:00
Rob Clark
00b6b41482 freedreno/ir3: cache defining instruction
It is silly to traverse back to find first instruction that writes part
of a larger "virtual" register many times per instruction (plus per use
as a src to later instructions).  Cache this information so we only
figure it out once.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
906da49527 freedreno/ir3: fix RA issue with fanin
The fanin source could be grouped, for example with shaders like:

    VERT
    DCL IN[0]
    DCL IN[1]
    DCL OUT[0], POSITION
    DCL OUT[1], GENERIC[9]
    DCL SAMP[0]
    DCL SVIEW[0], 2D, FLOAT
    DCL TEMP[0], LOCAL
      0: MOV TEMP[0].xy, IN[1].xyyy
      1: MOV TEMP[0].w, IN[1].wwww
      2: TXF TEMP[0], TEMP[0], SAMP[0], 2D
      3: MOV OUT[1], TEMP[0]
      4: MOV OUT[0], IN[0]
      5: END

The second arg to the isaml is IN[1].w, so we need to look at the fanin
source to get the correct offset.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
db5105b4b3 freedreno/ir3: add ir3_shader_disasm()
Split out most of dump_info() from ir3_cmdline compiler into a function
that can be used both by cmdline compiler and also for the disasm debug
option.  This way, for FD_MESA_DEBUG=disasm we also get to see intput/
output registers, etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
3244195f48 freedreno/a4xx: fix for sparse-samplers
Some piglit tests, like arb_fragment_program-sparse-samplers, result in
having a null samp#0 but valid samp#1.

TODO: a3xx probably needs similar fix

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
0a8c8fa770 freedreno/ir3: fix crash in fail path
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
1370fde8af freedreno/ir3: fix crash in RA
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
bb2c4b68f7 freedreno/ir3: fixes for indirect writes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Rob Clark
01b5f13363 freedreno/ir3: fix constlen in case of load_uniform_indirect
We can't rely on what we get from the assembler if we have indirect
addressing of constant file, since the assembler doesn't know the array
index.  This got lost in the transition to NIR.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Tapani Pälli
9350ea6979 glsl: validate sampler array indexing for 'constant-index-expression'
Desktop GLSL < 130 and GLSL ES < 300 allow sampler array indexing where
index can contain a loop induction variable. This extra check will warn
during linking if some of the indexes could not be turned in to constant
expressions.

v2: warning instead of error for backends that did not enable
    EmitNoIndirectSampler option (have dynamic indexing)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 11:12:44 +03:00
Tapani Pälli
f17c8c287f mesa/st: use EmitNoIndirectSampler if !ARB_gpu_shader5
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 11:12:44 +03:00
Tapani Pälli
2dc2b12ed1 i915: use EmitNoIndirectSampler
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 11:12:44 +03:00
Tapani Pälli
8852e26e93 i965: use EmitNoIndirectSampler for gen < 7
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 11:12:44 +03:00
Tapani Pälli
e4512e1581 mesa/glsl: new compiler option EmitNoIndirectSampler
Patch provides new compiler option for backend to force unroll loops
that have non-constant expression indexing on sampler arrays.

This makes sure that we can never end up with a shader that uses loop
induction variable as sampler array index but does not unroll because
of having too much instructions. This would not work without dynamic
indexing support.

v2: change option name as EmitNoIndirectSampler

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 11:12:43 +03:00
Tapani Pälli
edb8383c98 glsl: Allow dynamic sampler array indexing with GLSL ES < 3.00
Dynamic indexing of sampler arrays is prohibited by GLSL ES 3.00.
Earlier versions allow 'constant-index-expression' indexing, where
index can contain a loop induction variable.

Patch allows dynamic indexing for sampler arrays when GLSL ES < 3.00.
This change makes 'sampler-array-index.frag' parser test in Piglit
pass + fishgl.com works when running Chrome on OpenGL ES 2.0 backend

v2: small change and some more commit message (Tapani)
v3: refactor checks to make it more readable (Ian Romanick)
v4: change warning comment in GLSL ES case (Curro)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84225
2015-06-30 11:12:43 +03:00
Ilia Mirkin
d5f1253b0c nv50/ir: fix emission of address reg in 3rd source
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91056
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 02:51:14 -04:00
Kenneth Graunke
21b7c58b8a i965: Don't use GCC extension for ?: with only two operands.
From the "apparently I don't know C" files...GCC apparently supports:

    x ?: y

which is equivalent to

    x ? x : y

except that it doesn't cause side-effects to occur twice.  See:
https://gcc.gnu.org/onlinedocs/gcc/Conditionals.html#Conditionals

This was confusing and looked like a typo.  It doesn't really buy us
anything, so just write the obvious code in normal C.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-06-29 22:21:02 -07:00
Alexander von Gluck IV
e22e0de0d7 egl/haiku: fix Mesa build under Haiku
Performing a goto crosses the initialization of 'BWindow* win'
breaking the build. We also fix a missing semicolon.
2015-06-29 23:30:59 -05:00
Ilia Mirkin
089e7c3788 nv30: align transfer stride to 64, required by blit, sifm transfer impls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin
dacf9efd63 nv30: allow vertex state creation with 0 elements
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin
bad107f2ec nv30: reset fragprog bufctx at bind time
A clear will do a partial validate, which will in turn reference all the
buffers in the bufctx again. However the fragprog last validated might
have already been deleted. So reset the bufctx when updating state.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin
b875198f1f nv30: modernize fp upload logic
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin
54afb10f0e nv30: provide a minimum map buffer alignment
Otherwise we return 0, which is out of spec. Return 64 like all the
other nouveau drivers.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Anuj Phogat
3df5aaaa15 i965/skl: Extract the blit command setup in to a helper
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 13:18:42 -07:00
Anuj Phogat
412c8c8e7e i965/gen9: Add XY_FAST_COPY_BLT support to intelEmitCopyBlit()
This patch enables using XY_FAST_COPY_BLT only for Yf/Ys tiled buffers.
It can be later turned on for other tiling patterns (X,Y) too.

V3: Flush in between sequential fast copy blits.
    Fix src/dst alignment requirements.
    Make can_fast_copy_blit() helper.
    Use ffs(), is_power_of_two()
    Move overlap computation inside intel_miptree_blit().

V4: Use _mesa_regions_overlap() function.
    Add check for src_buffer == dst_buffer.
    Simplify horizontal and vertical alignment computations.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 13:17:44 -07:00
Anuj Phogat
ca21c9ab28 mesa/swrast: Use global function _mesa_regions_overlap()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 13:17:19 -07:00
Anuj Phogat
2a397c7958 mesa/st: Use global function _mesa_regions_overlap()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 13:16:56 -07:00
Anuj Phogat
7f282d05a1 mesa: Add a new helper function _mesa_regions_overlap()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 13:16:13 -07:00
Anuj Phogat
69ee316c1d i965/gen9: Allocate YF/YS tiled buffer objects
In case of I915_TILING_{X,Y} we need to pass tiling format to libdrm
using drm_intel_bo_alloc_tiled(). But, In case of YF/YS tiled buffers
libdrm need not know about the tiling format because these buffers
don't have hardware support to be tiled or detiled through a fenced
region. libdrm still need to know buffer alignment value for its use
in kernel when resolving the relocation.

Using drm_intel_bo_alloc_for_render() for YF/YS tiled buffers
satisfy both the above conditions.

V2: Delete min/max buffer size restrictions not valid for i965+.
    Remove redundant align to tile size statements.
    Remove some redundant code now when there are no min/max buffer size.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 13:15:13 -07:00
Anuj Phogat
a1afd59662 i965: Make a helper function intel_miptree_can_use_tr_mode()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 13:14:48 -07:00
Anuj Phogat
385cd3e0be i965: Make a helper function intel_miptree_release_levels()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 13:14:17 -07:00
Anuj Phogat
c9dbdc08b9 i965/gen9: Plugin the code for selecting YF/YS tiling on skl+
Buffers with Yf/Ys tiling end up using meta upload / download
paths or the blitter for cases where they used tiled_memcpy paths
in case of Y tiling. This has exposed some bugs in meta path. To
avoid any piglit regressions on SKL this patch keeps the Yf/Ys
tiling disabled at the moment.

V3: Make brw_miptree_choose_tr_mode() actually choose TRMODE. (Ben)
    Few cosmetic changes.
V4: Get rid of brw_miptree_choose_tr_mode().
    Take care of all tile resource modes {Yf, Ys, none} for all
    generations at one place.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 13:13:41 -07:00
Anuj Phogat
06f76b7fa6 i965: Make a helper function intel_miptree_set_alignment()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-29 12:23:17 -07:00
Erik Faye-Lund
e566e5203a mesa/main: free locale at exit
In order to save a small leak if mesa is continously loaded and
unloaded, let's free the locale when the shared object is unloaded.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 09:06:40 -07:00
Erik Faye-Lund
c61bc6ed84 util: port _mesa_strto[df] to C
_mesa_strtod and _mesa_strtof are only used from the GLSL compiler and
the ARB_[vertex|fragment]_program code, meaning that the locale doesn't
need to be initialized before the first OpenGL context gets initialized.

So let's use explicit initialization from the one-time init code instead
of depending on a C++ compiler to initialize at image-load time.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 09:06:40 -07:00
Erik Faye-Lund
de3e323be1 glsl: No need to lock in _mesa_glsl_release_types
This function only gets called while mesa is unloading, so there's
no potential of racing or multiple calls at the same time. So let's
just get rid of the locking.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 09:06:40 -07:00
Erik Faye-Lund
195ab79dde mesa/main: only call _mesa_destroy_shader_compiler once on exit
There's no point in calling _mesa_destroy_shader_compiler multiple
times on exit; the resources will only be released once anyway.

So let's move the atexit-call into the part that is only called
once.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 09:06:40 -07:00
Erik Faye-Lund
ba5e1612c8 dri: don't touch the shader compiler
This function is for deleting per-screen resources, and the shader
compiler resources are not of such nature. Besides, dri shouldn't
need to even know about the presence of a shader compiler.

These resources will already be released when mesa gets unloaded,
and that should be sufficient.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 09:06:40 -07:00
Erik Faye-Lund
73d2b5af52 mesa/main: Get rid of outdated GDB-hack
All of these enums are now in use around in the code, so there's no need
to explicitly use them here any more.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-29 09:06:40 -07:00
Grigori Goronzy
d15b32ebde clover: implement CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE
Work-group size should always be aligned to subgroup size; this is a
basic requirement, otherwise some work-items will be no-operation.

It might make sense to refine the value according to a kernel's
resource usage, but that's a possible optimization for the future.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-29 13:24:37 +02:00
Grigori Goronzy
249a9df7fc gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZE
We need this to implement OpenCL's
CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-29 13:24:22 +02:00
Neil Roberts
c0ca6c30ea i965: Don't try to print the GLSL IR if it has been freed
Since commit 104c8fc2c2 the GLSL IR will be freed if NIR is
being used. This was causing it to segfault if INTEL_DEBUG=wm is set.
This patch just makes it avoid dumping the GLSL IR in that case.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-29 11:33:34 +01:00
Emil Velikov
dd9ceb0219 docs: add news item and link release notes for mesa 10.6.1
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-29 09:03:19 +01:00
Emil Velikov
24df6cd0f7 docs: Add sha256 checksums for the 10.6.1 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 6ff3ae8deb)
2015-06-29 09:01:04 +01:00
Emil Velikov
07158c508a Add release notes for the 10.6.1 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit a871e80fc6)
2015-06-29 09:01:00 +01:00
Kenneth Graunke
6218c68bec Revert "glsl: clone inputs and outputs during linking"
This reverts commit c2ff3485b3.

Ilia and I noticed a memory leak caused by this patch: at least with
fixed-function programs, we clone things using ProgramResourceList as
the context before reralloc makes it non-NULL.

I believe Tapani found other bugs with these patches, so I'm just going
to revert them for now and let him pursue them further.
2015-06-28 22:20:27 -07:00
Kenneth Graunke
cae701fc8e Revert "i965: Delete linked GLSL IR when using NIR."
This reverts commit 104c8fc2c2.
2015-06-28 22:17:09 -07:00
Ilia Mirkin
61912036d1 nv30: avoid leaking blit fp/vp
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 00:46:53 -04:00
Ilia Mirkin
b5622313ea nv40: enable base vertex
Still appears to have issues with negative indices less than -1M, but
that's a corner case of a corner case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 00:46:45 -04:00
Kenneth Graunke
19a0ba130f i965/vs: Move compute_clip_distance() out of emit_urb_writes().
Legacy user clipping (using gl_Position or gl_ClipVertex) is handled by
turning those into the modern gl_ClipDistance equivalents.

This is unnecessary in Core Profile: if user clipping is enabled, but
the shader doesn't write the corresponding gl_ClipDistance entry,
results are undefined.  Hence, it is also unnecessary for geometry
shaders.

This patch moves the call up to run_vs().  This is equivalent for VS,
but removes the need to pass clip distances into emit_urb_writes().

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-28 19:44:34 -07:00
Kenneth Graunke
17e8fca626 i965: Write at least some data in SIMD8 URB write messages.
According to the "URB SIMD8 Write > Write Data Payload" documentation,
"The write data payload can be between 1 and 8 message phases long."

Apparently, the simulator considers it an error if you issue an URB
SIMD8 message with only a header and no actual data to write.

v2: Try to put in a better PRM citation, now that the Broadwell docs
    actually exist (requested by Jordan).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-28 19:44:33 -07:00
Samuel Pitoiset
b4b4406e1e gallium/hud: prevent NULL pointer dereference with pipe_query functions
The HUD doesn't check if query_create() fails and it calls other
pipe_query functions with NULL pointer instead of a valid query object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-28 09:49:03 +02:00
Mario Kleiner
a98600b0eb nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
The dup'ed fd owned by the nouveau_screen for a device node
must also be used as key for the winsys hash table, instead
of using the original fd passed in for a screen, to make
multi-x-screen ZaphodHeads configurations work on nouveau.

The original fd's lifetime differs from that of the nouveau_screen stored
in the hash. The hash key is the fd, and in order to compare hash entries
we fstat them, so the fd must be around for as long as the screen is.

This is an extension of the fix in commit a59f2bb1 (nouveau: dup fd
before passing it to device).

Cc: "10.3 10.4 10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-28 01:11:38 -04:00
Mike Stroyan
2a210b797e meta: Only change and restore viewport 0 in mesa meta mode
The meta code was setting a default depth range for all viewports
and 'restoring' all viewports to depth range values saved from viewport 0.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-27 11:29:56 -07:00
Dave Airlie
556dd4af76 radeonsi: add support for geometry shader invocations.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-27 00:24:30 +01:00
Dave Airlie
7e5064360c radeonsi: add support for viewport array (v3)
This isn't pretty and I'd suggest it the pm4 interface builder
could be tweaked to do this more efficently, but I'd need
guidance on how that would look.

This seems to pass the few piglit tests I threw at it.

v2: handle passing layer/viewport index to fragment shader.
fix crash in blit changes,
add support to io_get_unique_index for layer/viewport index
update docs.
v3: avoid looking up viewport index and layer in es (Marek).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-27 00:24:07 +01:00
Kenneth Graunke
35d8379304 i965/fs: Fix ir_txs in emit_texture_gen4_simd16().
We were not emitting the LOD, which led to message lengths of 1 instead
of 3.  Setting has_lod makes us emit the LOD, but I had to make changes
to avoid emitting the non-existent coordinate as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91022
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-26 15:57:03 -07:00
Ilia Mirkin
ad62ec8316 nv50/ir: propagate modifier to right arg when const-folding mad
An immediate has to be the second arg of an ADD operation. However we
were mistakenly propagating the modifier of the non-folded value to the
folded immediate argument.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91117
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-26 18:42:29 -04:00
Boyan Ding
052b3d4e2f egl_dri2: Remove trailing whitespaces
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-26 17:05:21 +00:00
Neil Roberts
3cf90bb183 i965/skl: Fix aligning mt->total_width to the block size
brw_miptree_layout_2d tries to ensure that mt->total_width is a
multiple of the compressed block size, presumably because it wouldn't
be possible to make an image that has a fraction of a block. However
it was doing this by aligning mt->total_width to align_w. Previously
align_w has been used as a shortcut for getting the block width
because before Gen9 the block width was always equal to the alignment.
Commit 4ab8d59a2 tried to fix these cases to use the block width
instead of the alignment but it missed this case.

I think in practice this probably won't make any difference because
the buffer for the texture will be allocated to be large enough to
contain the entire pitch and libdrm aligns the pitch to the tile width
anyway. However I think the patch is worth having to make the
intention clearer.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-26 17:02:22 +01:00
Matt Turner
404a90b827 mesa: Enable subdir-objects globally.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-26 12:55:25 +01:00
Emil Velikov
229450520a mesa: fold duplicated GL/GL_CORE/GLES3 entry in get_hash_params.py
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-26 12:55:25 +01:00
Chia-I Wu
7de85694fa ilo: define ILO_IMAGE_MAX_LEVEL_COUNT
Define ILO_IMAGE_MAX_LEVEL_COUNT for ilo_image and remove unnecessary header
includes.
2015-06-26 13:45:28 +08:00
Chia-I Wu
cbdc26aa3f ilo: replace pipe_format by gen_surface_format
Replace pipe_format by gen_surface_format in ilo_image.  Change how depth
format is specified in ilo_state_zs.
2015-06-26 13:45:28 +08:00
Chia-I Wu
2ee95f6d64 ilo: always use the specified image format
Move silent promotion of PIPE_FORMAT_ETC1_RGB8 or combined depth/stencil out
of core.
2015-06-26 13:45:28 +08:00
Chia-I Wu
dc2e92b2d3 ilo: replace pipe_texture_target by gen_surface_type
Replace pipe_texture_target by gen_surface_type in ilo_image.  Change how
GEN6_SURFTYPE_CUBE is specified in ilo_state_surface and ilo_state_zs.
2015-06-26 13:45:28 +08:00
Chia-I Wu
934e4a469f ilo: initialize ilo_image from ilo_image_info
Convert pipe_resource to ilo_image_info for image initialization.
2015-06-26 13:45:28 +08:00
Chia-I Wu
f825fe8e13 ilo: remove ilo_image_disable_aux()
Fail resource creation when aux bo allocation fails.
2015-06-26 13:45:28 +08:00
Chia-I Wu
07acf9cb16 ilo: improve SURFTYPE_BUFFER validations
Reorganize the validations to make them more systematic.
2015-06-26 13:45:27 +08:00
Chia-I Wu
9871646c13 ilo: remove ilo_buffer
Since the addition of ilo_vma, it was used only to pad a bo for sampling
engine surfaces.  Replace it entirely with these functions

  ilo_state_surface_buffer_size()
  ilo_state_vertex_buffer_size()
  ilo_state_index_buffer_size()
  ilo_state_sol_buffer_size()
2015-06-26 13:45:27 +08:00
Chia-I Wu
36d107e92c ilo: introduce ilo_vma
This cleans up the code a bit and makes ilo_state_vector_resource_renamed()
simpler and more robust.  It also allows a single bo to back mulitple VMAs.
2015-06-26 13:45:27 +08:00
Iago Toral Quiroga
fbba25bba0 mesa: remove unnecessary checks in _mesa_readpixels_needs_slow_path
readpixels_can_use_memcpy will later call _mesa_format_matches_format_and_type
which does much tighter checks than these to decide if we can use
memcpy for readpixels.

Also, the checks do not seem to be extensive enough anyway, since we are
checking for signed/unsigned conversion only when the framebuffer has integers,
but the same checks could be done for other types anyway, since as long as
there is a signed/unsigned conversion we can't memcpy.

No regressions observed on i965/llvmpipe.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-26 07:42:47 +02:00
Jason Ekstrand
316206ee9e i965/vec4_live_variables: Do liveness analysis bottom-to-top
From Muchnick's Advanced Compiler Design and Implementation:

"To determine which variables are live at each point in a flowgraph, we
perform a backward data-flow analysis"

Previously, we were walking the blocks forwards and updating the livein and
then the liveout.  However, the livein calculation depends on the liveout
and the liveout depends on the successor blocks.  The net result is that it
takes one full iteration to go from liveout to livein and then another
full iteration to propagate to the predecessors.  This works out to an
O(n^2) computation where n is the number of blocks.  If we run things in
the other order, it's O(nl) where l is the maximum loop depth which is
practically bounded by 3.

In b2c6ba0c4b, we made this same change in
the FS backend to great effect.  Might as well keep it consistent and make
the same change for vec4.  Also, this took the time to run the test:

ES31-CTS.arrays_of_arrays.InteractionFunctionCalls1

from 6:49.62 to 3:31.40 on Timothy Arceri's machine.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-25 16:42:20 -07:00
Ben Widawsky
c1151b18f2 i965/skl: Use more compact hiz dimensions
gen8 had some special restrictions which don't seem to carry over to gen9.
Quoting the spec for SKL:
"The Z_Height and Z_Width values must equal those present in
3DSTATE_DEPTH_BUFFER incremented by one."

This fixes nothing in piglit (and regresses nothing).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-25 14:17:02 -07:00
Marek Olšák
101a73846b radeonsi: don't fail in si_shader_io_get_unique_index
Trivial. Picked from my tessellation branch.
2015-06-25 15:05:56 +02:00
Kenneth Graunke
c97105ee12 i965: Drop brw->depthstencil.stencil_offset from gen8_depth_state.c.
This is always 0 - only brw_workaround_depthstencil_alignment ever sets
it, and that doesn't run on Gen6+.  My initial Broadwell depth state
commit had this mistake.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-25 02:18:51 -07:00
Kenneth Graunke
6026f7e8fb nir: Recognize max(min(a, 1.0), 0.0) as fsat(a).
We already recognize min(max(a, 0.0), 1.0) as a saturate, but neglected
this variant (which is also handled by the GLSL IR pass).

shader-db results on Broadwell:
total instructions in shared programs: 7363046 -> 7362788 (-0.00%)
instructions in affected programs:     11928 -> 11670 (-2.16%)
helped:                                64
HURT:                                  0

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-06-25 02:12:32 -07:00
Marek Olšák
77a78c65f8 softpipe,llvmpipe: fix PIPE_SHADER_CAP_MAX_INPUTS value
PIPE_MAX_SHADER_INPUTS was recently bumped to 80 because of tessellation.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91099
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91101

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-25 09:00:23 +02:00
Ben Widawsky
d1663ccb4c i965/bxt: Add basic Broxton infrastructure
The thread counts and URB information are all speculative numbers that were
based on some CHV numbers at the time.

v2:
Originally this patch had PCI IDs. I've moved that to a new patch at the end of
the series.
Remove is_cherryview hack.
Add PCI ids. These match the ones defined in the kernel. The only one tested by
us is 0x0a84.
Capitalize the hex string (Mark)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: "Lecluse, Philippe" <Philippe.Lecluse@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-06-24 16:37:12 -07:00
Ian Romanick
9f261dc18d radeon: Advertise correct GL_QUERY_COUNTER_BITS/GL_SAMPLES_PASSED value
Commit b765119c changed the default value of all the counter bits to
64.  However, older hardware only has 32 counter bits.

This has only been build-tested.  We don't have any tests that verify
the advertised value against implementation behavior, so I don't know
what additional testing could be done.

NOTE: It appears that many Gallium drivers (at least r300 and i915g)
have the same problem, but I don't see a way for the state-tracker to
determine the counter size.  Marek says, "For Gallium, a new PIPE_CAP or
new get_xxx_param function will be needed."

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
2015-06-24 16:33:32 -07:00
Jason Ekstrand
b2c6ba0c4b i965/fs_live_variables: Do liveness analysis bottom-to-top
From Muchnick's Advanced Compiler Design and Implementation:

"To determine which variables are live at each point in a flowgraph, we
perform a backward data-flow analysis"

Previously, we were walking the blocks forwards and updating the livein and
then the liveout.  However, the livein calculation depends on the liveout
and the liveout depends on the successor blocks.  The net result is that it
takes one full iteration to go from liveout to livein and then another
full iteration to propagate to the predecessors.  This works out to an
O(n^2) computation where n is the number of blocks.  If we run things in
the other order, it's O(nl) where l is the maximum loop depth which is
practically bounded by 3.

On my HSW desktop, one particular shadertoy test gets a 20% improvement in
compile times:

N           Min           Max        Median           Avg        Stddev
x  10        15.965        16.884        16.026       16.1822    0.34736846
+  10        12.813        13.052        12.876       12.8891    0.06913666
Difference at 95.0% confidence
        -3.2931 +/- 0.235316
        -20.3501% +/- 1.45417%
        (Student's t, pooled s = 0.250444)

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-24 13:11:30 -07:00
Tapani Pälli
104c8fc2c2 i965: Delete linked GLSL IR when using NIR.
This is based on Kenneth's patch to delete 'most of the IR'. Due to
linker changes to clone variables, we can now free all of IR.

Saves 58MB of memory when replaying a Dota 2 trace on Broadwell.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-06-24 12:03:41 -07:00
Tapani Pälli
c2ff3485b3 glsl: clone inputs and outputs during linking
This increases memory pressure during linking but makes it easier
for backend to free IR after it is not needed anymore.

v2: use resource list as ralloc context in case of relink (Kenneth)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-06-24 12:01:21 -07:00
Chris Wilson
4b35ab9bdb i965: Rename intel_emit* to reflect their new location in brw_pipe_control
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-24 10:35:04 -07:00
Chris Wilson
9d4b9f1e0c i965: Transplant PIPE_CONTROL routines to brw_pipe_control
Start trimming the fat from intel_batchbuffer.c. First by moving the set
of routines for emitting PIPE_CONTROLS (along with the lore concerning
hardware workarounds) to a separate brw_pipe_control.c

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-24 10:35:04 -07:00
Kenneth Graunke
147cdb53ec nir: Use a switch statement for detecting move-like operations.
Suggested by Jason Ekstrand.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-06-24 10:35:04 -07:00
Brian Paul
e31bce4041 svga: silence warnings about unexpected shader type
Trivial.
2015-06-24 10:42:19 -06:00
Brian Paul
c1de7df6d4 st/mesa: remove unneeded pipe_surface_release() in st_render_texture()
This caused us to always free the pipe_surface for the renderbuffer.
The subsequent call to st_update_renderbuffer_surface() would typically
just recreate it.  Remove the call to pipe_surface_release() and let
st_update_renderbuffer_surface() take care of freeing the old surface
if it needs to be replaced (because of change to mipmap level, etc).

This can save quite a few calls to pipe_context::create_surface() and
surface_destroy().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-24 07:14:56 -06:00
Emil Velikov
a552c897ca st/wgl: add stw_nopfuncs.h to the sources lists
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-24 13:43:44 +01:00
Julien Isorce
30d67d3824 loader: move loader_open_device out of HAVE_LIBUDEV block
Fixes the following build issue, when building without libudev.

CCLD   libGL.la
./.libs/libglx.a(dri2_glx.o): In function `dri2CreateScreen':
src/glx/dri2_glx.c:1186: undefined reference to `loader_open_device'
collect2: ld returned 1 exit status

CCLD     libEGL.la
Undefined symbols for architecture x86_64:
"_loader_open_device", referenced from:
  _dri2_initialize_x11_dri2 in libegl_dri2.a(platform_x11.o)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91077
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-24 13:43:44 +01:00
Grigori Goronzy
390f94e358 winsys/radeon: reduce BO cache timeout
1000 ms is an extreme value for typical interactive loads. A large
cache has some disadvantages. Search for reusable BOs can take a long
time and memory might get exhausted.

Let's be rather conservative and use half of the old value,
500ms. This is beneficial to some loads on my test system and there
are no regressions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-24 14:33:40 +02:00
Grigori Goronzy
29aaab2b5f winsys/radeon: align BO size to page size
This is the basic granularity for BO allocations. The alignment also
helps with BO reuse by the cached bufmgr.

This results in a huge 45% speedup in Metro 2033 Redux on my test
system. The game relies on buffer orphaning with very small buffers
(hundreds of bytes in size) and that did not work efficiently
before. This change may also affect other applications and games.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-24 14:33:14 +02:00
Tapani Pälli
32a220f1f6 glsl: remove cross validation of interpolation qualifier with GLSL 4.40
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-06-24 10:06:32 +03:00
Kenneth Graunke
23132cd13b i965: Fix whitespace error in gen8_depth_state.c
Trivial.
2015-06-23 23:31:17 -07:00
Kenneth Graunke
c8b8e8b29b i965: Don't count NIR instructions for shader-db.
Matt, Jason, and I haven't found this useful in a long time.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-23 23:31:17 -07:00
Michel Dänzer
7796e8889a winsys/radeon: Unmap GPU VM address range when destroying BO
But only when doing so is safe according to the
RADEON_INFO_VA_UNMAP_WORKING kernel query.

This avoids kernel GPU VM address range conflicts when the BO has other
references than the GEM handle being closed, e.g. when the BO is shared.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90537
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90873

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-24 15:11:55 +09:00
Eric Anholt
3fd4c80b32 vc4: Also dump VC4_PACKET_LOAD_TILE_BUFFER_GENERAL. 2015-06-23 18:40:50 -07:00
Eric Anholt
5458ac01ae vc4: Add dumping for VC4_PACKET_LOAD/STORE_FULL_RES_TILE_BUFFER. 2015-06-23 18:40:50 -07:00
Eric Anholt
997f677841 vc4: Don't try to CSE color reads.
It returns a new value for each sample in the TLB.  We've already avoided
trying to get the same index's color multiple times at the vc4_program.c
level, so we're not losing anything by doing this.
2015-06-23 18:40:50 -07:00
Eric Anholt
0f69d59b1c vc4: Make a helper for TLB color writes, too.
We've done so for all the other QIR instruction generation in this file.
2015-06-23 18:40:50 -07:00
Eric Anholt
af83eb2581 vc4: Pull the blending operation out to a separate function.
It's fairly separate from the rest of the TLB operations at frag end time,
and we'll need to run it multiple times to support MSAA blending.
2015-06-23 18:40:50 -07:00
Eric Anholt
76851f49a5 vc4: Clarify size calculation for Z/S writes.
It's the same value for loads and stores, because they're basically the
same packet.
2015-06-23 18:40:50 -07:00
Eric Anholt
8fbcabc41a vc4: Add an "args" temporary for RCL setup. 2015-06-23 18:40:50 -07:00
Eric Anholt
19056d0429 vc4: Reuse (and extend) the packet.h sizes for dumping. 2015-06-23 18:40:50 -07:00
Eric Anholt
fc0da629b5 vc4: Fix printfs for blit fallbacks. 2015-06-23 18:40:50 -07:00
Eric Anholt
e70f5617f1 tgsi_to_nir: Fix translation of TXF on MSAA targets.
Noticed while trying to add GL_ARB_texture_multisample support to vc4.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-23 18:40:50 -07:00
Jason Ekstrand
6844d6b7f8 i965/fs: Get rid of an unused variable in emit_barrier()
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-23 17:06:05 -07:00
Jason Ekstrand
40801295d5 i965: Remove the brw_context from the visitors
As of this commit, nothing actually needs the brw_context.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:36:13 -07:00
Jason Ekstrand
bcaf4a3f07 i965/vec4_vs: Add an explicit use_legacy_snorm_formula flag
This way we can stop doing is_gles3 checks inside of the compiler.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:35:01 -07:00
Jason Ekstrand
924b15d7de i965/vec4: Turn some _mesa_problem calls into asserts
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:35:00 -07:00
Jason Ekstrand
663f8d121d i965/vs: Pass the current set of clip planes through run() and run_vs()
Previously, these were pulled out of the GL context conditionally based on
whether we were running ff/ARB or a GLSL program.  Now, we just pass them
in so that the visitor doesn't have to grab them itself.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:35:00 -07:00
Jason Ekstrand
4af62c0f5c i965/fs: Add a do_rep_send flag to run_fs
Previously, we were pulling it from brw->do_rep_send

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:35:00 -07:00
Jason Ekstrand
1b0f6ffa15 i965: Pull calls to get_shader_time_index out of the visitor
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:34:59 -07:00
Jason Ekstrand
c7893dc3c5 i965: Use a single index per shader for shader_time.
Previously, each shader took 3 shader time indices which were potentially
at arbirary points in the shader time buffer.  Now, each shader gets a
single index which refers to 3 consecutive locations in the buffer.  This
simplifies some of the logic at the cost of having a magic 3 a few places.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 15:33:16 -07:00
Jason Ekstrand
6e255a3299 i965: Add compiler options to brw_compiler
This creates the options at screen cration time and then we just copy them
into the context at context creation time.  We also move is_scalar to the
brw_compiler structure.

We also end up manually setting some values that the core would have set by
default for us.  Fortunately, there are only two non-zero shader compiler
option defaults that we aren't overriding anyway so this isn't a big deal.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 14:28:09 -07:00
Jason Ekstrand
073294d3ef i965/fs: Plumb compiler debug logging through brw_compiler
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 14:28:08 -07:00
Jason Ekstrand
3fd457c9dd i965/fs: Do the no16 perf logging directly in fs_visitor::no16()
While we're at it, we'll drop the note about 10-20% performance loss.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 14:28:08 -07:00
Jason Ekstrand
f45bf97f30 i965/fs: Make no16 non-variadic
We never used the fact that it was variadic anyway.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-23 14:28:08 -07:00
Jason Ekstrand
1bc3b62d4a i965: Move INTEL_DEBUG variable parsing to screen creation time
v2: Do bufmgr set_debug and set_aub_dump at screen time as well.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-23 14:28:08 -07:00
Jason Ekstrand
d7565b7d65 i965: Remove the dependance on brw_context from the generators
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-23 14:28:08 -07:00
Jason Ekstrand
e639a6f68e i965: Plumb compiler debug logging through a function pointer in brw_compiler
v2 (Ken): Make shader_debug_log a printf-like function.
v3 (Jason): Add a void * to pass the brw_context through

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-23 14:28:08 -07:00
Kenneth Graunke
b0ad3ce4e7 mesa: Add a va_args variant of _mesa_gl_debug().
This will be useful for wrapper functions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-23 14:28:08 -07:00
Jason Ekstrand
630764407a i965: Replace some instances of brw->gen with devinfo->gen 2015-06-23 14:28:08 -07:00
Matt Turner
ae097580ac i965: Initialize backend_shader::mem_ctx in its constructor.
We were initializing it in each subclasses' constructors for some
reason.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-23 12:24:42 -07:00
Matt Turner
d8eeb4917c i965: Assert that the GL primitive isn't out of range.
Coverity sees the if (mode >= BRW_PRIM_OFFSET (128)) test and assumes
that the else-branch might execute for mode to up 127, which out be out
of bounds.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-23 12:24:42 -07:00
Matt Turner
4d93a07c45 i965/cfg: Assert that cur_do/while/if pointers are non-NULL.
Coverity sees that the functions immediately below the new assertions
dereference these pointers, but is unaware that an ENDIF always follows
an IF, etc.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-23 12:24:42 -07:00
Matt Turner
04758d25b4 mesa: Delete unused ICEIL().
Can't find any uses of it in git history.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-23 12:24:42 -07:00
Matt Turner
a49328d58d i965/fs: Don't mess up stride for uniform integer multiplication.
If the stride is 0, the source is a uniform and we should not modify the
stride.

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91047
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-23 12:24:42 -07:00
Boyan Ding
3fa9bb81ec egl/x11: Remove duplicate call to dri2_x11_add_configs_for_visuals
The call to dri2_x11_add_configs_for_visuals (previously
dri2_add_configs_for_visuals) was moved downwards in commit f8c5b8a1,
but appeared again in its original position after its rename in
d019cd81. Remove it.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-23 18:54:27 +01:00
Ben Widawsky
20dca37a20 i965/gen9: Don't use encrypted MOCS
On gen9+ MOCS is an index into a table. It is 7 bits, and AFAICT, bit 0 is for
doing encrypted reads.

I don't recall how I decided to do this for BXT. I don't know this patch was
ever needed, since it seems nothing is broken today on SKL. Furthermore, this
patch may no longer be needed because of the ongoing changes with MOCS setup. It
is what is being used/tested, so it's included in the series.

The chosen values are the old values left shifted. That was also an arbitrary
choice.

v2: Use shift in MOCS to make it clear what we're doing. (Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-23 10:22:07 -07:00
Ilia Mirkin
78d58e6425 nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data
Without first running the bo through pushbuf_refn, the nouveau drm
library will have uninitialized structures regarding this bo, and will
insert incorrect data.

This fixes supertuxkart 0.9 crash on start (where it ends up doing a lot
of indirect draws).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-23 12:08:34 -04:00
Ilia Mirkin
9fcbf515b4 nvc0: always put all tfb bufs into bufctx
Since we clear the TFB bufctx binding point above, we need to put all of
the active tfb's back in, even if they haven't changed since last time.
Otherwise the tfb may get moved into sysmem and the underlying mapping
will generate write errors.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-23 12:08:34 -04:00
Ilia Mirkin
fccf012adc glsl: binding point is a texture unit, which is a combined space
This fixes compilation failures in Dota 2 Reborn where a texture unit
binding point was used that was numerically higher than the max
per stage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-23 12:08:34 -04:00
Emil Velikov
59f8d4ee79 android: egl: do not link against libglapi
The only reason we touch glapi is to dlopen it in order to:
 - make sure that the unresolved _glapi* symbols in the dri modules are
provided.
 - fetch glFlush() and use it at various stages in the dri2 driver.

Cc: Chih-Wei Huang <cwhuang@linux.org.tw>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 17:08:05 +01:00
Emil Velikov
a0dc6b7824 gbm: do not (over)link against libglapi.so
The whole of GBM does not rely on even a single symbol from the GL
dispatch library, unsuprisingly. The only need for it comes from the
unresolved symbols in the DRI modules, which are now correctly handled
with Frank's commit.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 17:08:05 +01:00
Frank Henigman
828f13330c gbm: dlopen libglapi so gbm_create_device works
Dri driver libs are not linked to pull in libglapi so gbm_create_device()
fails when it tries to dlopen them (unless the application is linked
with something that does pull in libglapi, like libGL).
Until dri drivers can be fixed properly, dlopen libglapi before trying
to dlopen them.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Frank Henigman <fjhenigman@google.com>
[Emil Velikov: Drop misleading bugzilla link, mention that libname differs]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 17:08:05 +01:00
Emil Velikov
6ed52f78a0 configure: drop unused variable GBM_BACKEND_DIRS
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-23 17:08:05 +01:00
Emil Velikov
994be5143a configure: error out when building libEGL without shared-glapi
The latter is a hard requirement and without it we'll error out later
on in the build.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-23 17:08:05 +01:00
Emil Velikov
ddc886b5bf configure: error out when building backend-less libEGL
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-23 17:07:32 +01:00
Emil Velikov
2752e629e7 drivers/x11: drop unneeded HAVE_X11_DRIVER check
Already handled in the Makefile which includes the drivers/x11 subdir.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-23 17:04:40 +01:00
Emil Velikov
92dc507862 configure: allow building shared-glapi powered libgl-xlib
Cc: Brian Paul <brianp@vmware.com>
Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-23 17:04:34 +01:00
Emil Velikov
5c37ababae targets/libgl-xlib: fix the build against shared_glapi
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-23 17:04:29 +01:00
Emil Velikov
b92233f2a5 drivers/x11: fix the build against shared_glapi
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-23 17:04:21 +01:00
Emil Velikov
6d744aaf4e configure: warn about shared_glapi & xlib-glx only when both are set
Printing out the message when shared_glapi is disabled only leads to
confusion.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-23 17:02:50 +01:00
Emil Velikov
06109db47b glapi: remap_helper.py: remove unused argument 'es'
Identical to the previous commit - unused by neither the Autotools,
Android or SCons build.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-23 16:57:27 +01:00
Emil Velikov
ec16bb62ac glapi: gl_table.py: remove unused variable 'es'
None of the three build systems ever set it, as such we can clear things
up a bit.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-23 16:56:50 +01:00
Derek Foreman
4f8f790525 egl: Use the loader_open_device() helper to do open with CLOEXEC
We've moved the open with CLOEXEC idiom into a helper function, so
call it instead of duplicating the code.

This also replaces a couple of opens that didn't properly do CLOEXEC.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 16:54:56 +01:00
Derek Foreman
324ee9b391 glx: Use loader_open_device() helper
We've moved the open with CLOEXEC idiom into a helper function, so
call it instead of duplicating the code here.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 16:54:53 +01:00
Derek Foreman
9c92746349 loader: Rename drm_open_device() to loader_open_device() and share it
This is already our common idiom for opening files with CLOEXEC and
it's a little ugly, so let's share this one implementation.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 16:54:51 +01:00
Derek Foreman
aaac913e90 egl/drm: Duplicate fd with F_DUPFD_CLOEXEC to prevent leak
Replacing dup() with fcntl F_DUPFD_CLOEXEC creates the duplicate
file descriptor with CLOEXEC so it won't be leaked to child
processes if the process fork()s later.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-23 16:54:47 +01:00
Jose Fonseca
be5f71d4a5 draw,tgsi: Assume TGSI_PROPERTY_GS_INVOCATIONS default of 1.
If the shader doesn't specify number of invocations, assume one.

This fixes geometry shaders on state trackers other than Mesa (and
probably graw tests too.)

Trivial.
2015-06-23 12:19:52 +01:00
Jose Fonseca
634cfb9a45 glsl: Specify the shader stage in linker errors due to too many in/outputs.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-23 12:06:39 +01:00
Dave Airlie
4731be701f docs: update GL3 with softpipe/llvmpipe gpu_shader5 pieces.
This just updates the bits I've added in the previous few patches.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:55:30 +10:00
Dave Airlie
1a71fbe28c draw/gallivm: add invocation ID support for llvmpipe.
This extends the draw code to add support for invocations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:54:07 +10:00
Dave Airlie
40d225803e draw/tgsi: implement geom shader invocation support.
This is just for softpipe, llvmpipe won't work without
some changes.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:53:49 +10:00
Dave Airlie
24e77cb09f tgsi: handle indirect sampler arrays. (v2)
This is required for ARB_gpu_shader5 support in softpipe.

v2: add support to txd/txf/txq paths.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:52:48 +10:00
Kenneth Graunke
1762568fd3 nir: Allow vec2/vec3/vec4 instructions in the select peephole pass.
These are basically just moves, so they should be safe as well.

When disabling i965's GLSL IR level scalarizer (channel expressions)
pass, I started seeing NIR code like this:

        if ssa_21 {
                block block_1:
                /* preds: block_0 */
                vec4 ssa_120 = vec4 ssa_82, ssa_83, ssa_84, ssa_30
                /* succs: block_3 */
        } else {
                block block_2:
                /* preds: block_0 */
                /* succs: block_3 */
        }
        block block_3:
        /* preds: block_1 block_2 */
        vec4 ssa_33 = phi block_1: ssa_120, block_2: ssa_2

Previously, the GLSL IR scalarizer pass would break the vec4 into a
series of fmovs, which were allowed by the peephole pass.  But with
the vec4 operation, they were not.  We want to keep getting selects.

Normal i965 on Broadwell:
instructions in affected programs:     200 -> 176 (-12.00%)
helped:                                4

With brw_fs_channel_expressions() disabled:
instructions in affected programs:     1832 -> 1646 (-10.15%)
helped:                                30

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-06-22 14:08:36 -07:00
Kenneth Graunke
94e3864707 i965: Add and fix comments in brw_vue_map.c.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-22 14:05:44 -07:00
Kenneth Graunke
38eb9015e3 i965: Split VUE map handling out of brw_vs.c into brw_vue_map.c.
This was originally only used by the vertex shader, but it's now used by
the geometry shader as well, and will also eventually be used for
tessellation control and evaluation shaders.

I suspect it will be easier to find in a file named after the concept.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-22 14:05:44 -07:00
Ben Widawsky
90754d2df0 i965/gen9: Implement Push Constant Buffer workaround
This implements a workaround (exact excerpt as a comment in the code). The docs
specify [clearly, after you struggle for a while] that the offset isn't relative
to state base. This actually makes sense. This fixes hangs on SKL.

Buffer #0 is meant to be used for normal uniforms.
Buffer #1 is typically used for gather constants when using RS.
Buffer #1-#3 could be used to push a bunch of UBO data which would just be
  somewhere in memory, and not relative to the dynamic state.

NOTE: I've moved away from the ternary operator for the new gen9 conditions.
Admittedly it's probably not great to do this, but I really want to fix this all
up in the subsequent patch and doing it here makes that diff a lot nicer. I want
to split out the gen8/9 code to make the function a bit more readable, but to
keep this easily cherry-pickable I am doing this fix first. If we decide not to
merge the cleanup patch then I can revisit this.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Valtteri Rantala <Valtteri.rantala@intel.com>
2015-06-22 12:11:41 -07:00
Brian Paul
2b07b8d104 mesa: use _mesa_lookup_enum_by_nr() in print_array()
Print GL_FLOAT, etc. instead of hex value.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-22 08:46:56 -06:00
Chia-I Wu
8787141429 ilo: emit 3DPRIMITIVE from gen6_3dprimitive_info
It allows us to remove ilo_ib_state::draw_start_offset and
ILO_PRIM_RECTANGLES.  gen6_3d_translate_pipe_prim() is also replaced by
ilo_translate_draw_mode().
2015-06-22 15:18:57 +08:00
Chia-I Wu
58f95b332d ilo: align vertex buffer size in buf_create()
With ilo_format.[ch] moved out of core, the aligning of vertex buffers does
not belong to core anymore.
2015-06-22 15:18:57 +08:00
Chia-I Wu
513bc5d90b ilo: move ilo_format.[ch] out of core
They provide PIPE_FORMAT_x to GEN6_FORMAT_x translation as well as some
convenient helpers.  Move them out of core.
2015-06-22 15:18:56 +08:00
Chia-I Wu
3547bb0783 ilo: add ilo_state_surface_valid_format()
Check if a surface format can be used for the specified access type.
2015-06-22 15:18:56 +08:00
Chia-I Wu
aa3e5e0dde ilo: add ilo_state_vf_valid_element_format()
Check if a surface format can be used as a VE format.
2015-06-22 15:18:56 +08:00
Alexandre Courbot
da8300cb03 nvc0: use NV_VRAM_DOMAIN() macro
Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative
VRAM domains for chips that do not have dedicated video memory.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-06-22 01:00:02 -04:00
Alexandre Courbot
f22406837f nouveau: support for custom VRAM domains
Some GPUs (e.g. GK20A, GM20B) do not embed VRAM of their own and use
the system memory as a backend instead. For such systems, allocating
objects in VRAM results in errors since the kernel will not allow
VRAM objects allocations.

This patch adds a vram_domain member to struct nouveau_screen that can
optionally be initialized to an alternative domain to use for VRAM
allocations. If left untouched, NOUVEAU_BO_VRAM will be used for
systems that embed VRAM, and NOUVEAU_BO_GART will be used for VRAM-less
systems.

Code that uses GPU objects is then expected to use the NV_VRAM_DOMAIN()
macro in place of NOUVEAU_BO_VRAM to ensure correct behavior on
VRAM-less chips.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-06-22 01:00:02 -04:00
Chia-I Wu
57bdcae9e0 ilo: add ilo_state_compute
Replace gen6_idrt_data with ilo_state_compute, which has a bunch of
validations and is now preferred.
2015-06-22 12:56:55 +08:00
Dave Airlie
2bf5a4211e r600g: ignore sampler views for now.
This fixes a regression in that r600 stopped working when
sampler views were pushed.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-22 14:02:49 +10:00
Rob Clark
66a93a0ff9 freedreno/ir3: pass sz to split_dest()
For query_levels, we generate a getinfo with writemask of (z), which RA
will consider as size==3.  But we were still generating four fanouts.
Which meant that RA would see it as two different register classes,
depending on the path to definer.  Ie. on the getinfo instruction itself
it would see size==3, but when chasing back through the fanouts it would
see size==4.

Easiest way to solve that is to just generate the chain of neighboring
fanouts to have the correct size in the first place.

Note: we may eventually want split_dest() to take start/end or wrmask
instead, since really we only need size==1.  But RA is not clever enough
for that, query_levels is not that common, and the other two registers
that get allocated are never used so those register slots can be
immediately re-used.  So bunch of work for probably no real gain.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 08:01:12 -04:00
Rob Clark
1ee4d51e7a freedreno/ir3/nir: add more opcodes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 08:01:06 -04:00
Rob Clark
43048c7093 freedreno/ir3: only unminify txf coords on a3xx
Seems like a4xx gets this right.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 08:01:05 -04:00
Rob Clark
0f008082b1 freedreno: remove int sampler shader variants
We get this information from NIR (which gets it from sview decl in tgsi
when translating from tgsi), so no need to maintain shader variants for
this.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 08:00:58 -04:00
Rob Clark
457f7c2a2a freedreno/ir3: block reshuffling and loops!
This shuffles things around to allow the shader to have multiple basic
blocks.  We drop the entire CFG structure from nir and just preserve the
blocks.  At scheduling we know whether to schedule conditional branches
or unconditional jumps at the end of the block based on the # of block
successors.  (Dropping jumps to the following instruction, etc.)

One slight complication is that variables (load_var/store_var, ie.
arrays) are not in SSA form, so we have to figure out where to put the
phi's ourself.  For this, we use the predecessor set information from
nir_block.  (We could perhaps use NIR's dominance frontier information
to help with this?)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:54:38 -04:00
Rob Clark
660d5c1646 freedreno/ir3: a4xx encodes larger immed offset
Without this, negative branch/jump offsets look like very large positive
offsets.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:54:31 -04:00
Rob Clark
d646d3ae9d freedreno/ir3: simplify find_neighbors stop condition
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:54:16 -04:00
Rob Clark
c8fb5f8a01 freedreno/ir3: move inputs/outputs to shader
These belong in the shader, rather than the block.  Mostly a lot of
churn and nothing too interesting.  But splitting this out from the
rest of ir3_block reshuffling to cut down the noise in the later
patch.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:54:04 -04:00
Rob Clark
d52fb2f5ad freedreno/ir3/ra: use register_allocate
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:58 -04:00
Rob Clark
694beb8b83 freedreno/ir3: introduce ir3_compiler object
Right now, just provides a cleaner way to get at the gpu-id, given the
separation between compiler and context.  But we will need this also to
hold the reg-set for new register allocation.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:50 -04:00
Rob Clark
5c1e153467 freedreno/ir3: dump nocp option
No longer used, or even possible, with NIR frontend.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:43 -04:00
Rob Clark
7674ab12e8 freedreno/ir3: silence warnings
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:35 -04:00
Rob Clark
0f6faa8ff3 freedreno/ir3: remove tgsi f/e
Also remove ir3_flatten which was only used by tgsi f/e.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:25 -04:00
Rob Clark
7273cb4e93 freedreno/ir3/sched: convert to priority queue
Use a more standard priority-queue based scheduling algo.  It is simpler
and will make things easier once we have multiple basic blocks and flow
control.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:17 -04:00
Rob Clark
adf1659ff5 freedreno/ir3: use standard list implementation
Use standard list_head double-linked list and related iterators,
helpers, etc, rather than weird combo of instruction array and next
pointers depending on stage.  Now block has an instrs_list.  In
certain stages where we want to remove and re-add to the blocks list
we just use list_replace() to copy the list to a new list_head.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:53:09 -04:00
Rob Clark
67d994c676 freedreno/ir3: drop dot graph dumping
At least for now.. right now the instruction and instruction list
printing should suffice, and the re-working of ir3_block would require
a lot of changes in that code.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:52:58 -04:00
Rob Clark
5c8c2e2f97 freedreno/ir3: more builder helpers
Use ir3_MOV() builder in a couple of spots, rather than open-coding the
instruction construction.  Also add ir3_NOP() builder and use that
instead of open coding.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:52:41 -04:00
Rob Clark
b33015f889 gallium/ttn: add missing SNE
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-21 07:52:36 -04:00
Rob Clark
c79b2e626c util/list: add list_first/last_entry
I need an easier way to get at head/tail in ir3.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-21 07:52:36 -04:00
Rob Clark
b3d2e36716 gallium/ttn: add texture-type support
v2: rebased on using SVIEW to hold type information

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:29 -04:00
Rob Clark
cb258c1dec glsl_to_tgsi: add SVIEW decl support
Freedreno needs sampler type information to deal with int/uint textures.
To accomplish this, start creating sampler-view declarations, as
suggested here:

 http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html

create a sampler-view with index matching the sampler, to encode the
texture type (ie. SINT/UINT/FLOAT).  Ie:

   DCL SVIEW[n], 2D, UINT
   DCL SAMP[n]
   TEX OUT[1], IN[1], SAMP[n]

For tgsi texture instructions which do not take an explicit SVIEW
argument, the SVIEW index is implied by the SAMP index.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:22 -04:00
Rob Clark
93379748f7 util/blitter (and friends): generate appropriate SVIEW decls
Some hardware needs to know the sampler type.  Update the blit related
shaders to include SVIEW decl.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:16 -04:00
Rob Clark
e536992986 util/pstipple: updates for SVIEW decls
To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:12 -04:00
Rob Clark
b516e68afb draw: updates to support SVIEW decls
To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:07 -04:00
Rob Clark
f481af110e tgsi/transform: add support for SVIEW decls
TODO single return_type (use enum)

v2: single return_type arg, and use enum

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:52:02 -04:00
Rob Clark
b13135e066 tgsi: update docs for SVIEW usage with TEX* instructions
Based on mailing list discussion here:

http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-21 07:51:53 -04:00
Eric Anholt
717376155d mesa: Back out an accidental change I had in a VC4 commit.
This was a hack as part of debugging some glamor-on-GLES2 behavior that
ended up being an xserver bug.  I suspect we can just flip this extension
on for GLES2, but the spec says it requires 3.1.
2015-06-20 15:04:17 -07:00
Emil Velikov
104bff0376 docs: add news item and link release notes for mesa 10.5.8
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-20 16:42:21 +01:00
Emil Velikov
aa28423bcc docs: Add sha256sums for the 10.5.8 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit a81b1d5512)
2015-06-20 16:42:21 +01:00
Emil Velikov
97caf2054f Add release notes for the 10.5.8 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 24b043aab7)
2015-06-20 16:42:21 +01:00
Eric Anholt
c009038674 vc4: Use a defined t value for 1D textures.
This doesn't fix the broken 1D cases of texsubimage, but it does prevent
segfaulting when dumping the QIR code generated in fbo-1d.
2015-06-20 00:16:32 -07:00
Eric Anholt
bb107110a4 vc4: Fix write-only texsubimage when we had to align.
We need to make sure that when we store the aligned box, we've got
initialized contents in the border.  We could potentially just load the
border area, but for now let's get text rendering working in X (and fix
the GL_TEXTURE_2D errors in piglit's texsubimage test and
gl-2.1-pbo/test_tex_image)
2015-06-20 00:16:32 -07:00
Chia-I Wu
028590cbc7 ilo: clean up header includes
Core is more self-contained now.
2015-06-20 11:20:12 +08:00
Chia-I Wu
244caba250 ilo: avoid ilo_ib_state in genX_3DPRIMITIVE()
ilo_ib_state is not in core.
2015-06-20 11:18:30 +08:00
Chia-I Wu
dcb5bad3a3 ilo: move gen6_so_SURFACE_STATE() out of core
It does not belong to core.
2015-06-20 11:18:10 +08:00
Chia-I Wu
e3372c4bfb ilo: add ilo_state_sol_buffer
It serves the same purpose as ilo_state_vertex_buffer does.
2015-06-20 11:18:09 +08:00
Chia-I Wu
9904e647cc ilo: add ilo_state_index_buffer
It serves the same purpose as ilo_state_vertex_buffer does.
2015-06-20 11:18:07 +08:00
Chia-I Wu
da4878cb80 ilo: add ilo_state_vertex_buffer
Being a parameter-like state, we may want to get rid of
ilo_state_vertex_buffer_info or ilo_state_vertex_buffer eventually.  But we
want them now as they are how we do cross-validation right now.
2015-06-20 11:14:14 +08:00
Chia-I Wu
4555211028 ilo: add 3DSTATE_VF_INSTANCING to ilo_state_vf
3DSTATE_VF_INSTANCING specifies instancing enable and step rate.  They are
specified along with 3DSTATE_VERTEX_BUFFERS instead prior to Gen8.  Both
commands are added.
2015-06-20 11:14:14 +08:00
Chia-I Wu
e8d297b7a1 ilo: add 3DSTATE_VF to ilo_state_vf
3DSTATE_VF specifies cut index enable and cut index.  Cut index enable is
specified in 3DSTATE_INDEX_BUFFER instead prior to Gen7.5.  Both commands are
added.
2015-06-20 11:14:14 +08:00
Chia-I Wu
7b3432b62d ilo: embed pipe_index_buffer in ilo_ib_state
Make it obvious that we save a copy of pipe_index_buffer.
2015-06-20 11:14:10 +08:00
Chia-I Wu
73f0d6d22d ilo: fix a buffer overrun
Add missing parentheses in SURFTYPE_NULL initialization.
2015-06-20 11:13:20 +08:00
Chia-I Wu
aa3ec8bc46 ilo: fix a -Wmaybe-uninitialized warning
ilo_shader.c: In function ‘ilo_shader_select_kernel_sbe’:
ilo_shader.c:1140:27: warning: ‘src_skip’ may be used uninitialized in this
function [-Wmaybe-uninitialized]
2015-06-20 11:13:20 +08:00
Brian Paul
a1f84453a2 glsl: fix formatting glitch in _mesa_print_ir()
Print the closing ) before the newline.  Trivial.
2015-06-19 16:46:29 -06:00
Ben Widawsky
7c3da3592e i965/gen8: Use HALIGN_16 for single sample mcs buffers
The original code meant to do this, but was only checking num_samples == 1 to
figure out if a surface was fast clear capable. However, we can allocate single
sample miptrees with num_samples == 0 (when it's an internally created buffer).

This fixes a bunch of the piglit tests on gen8. Other gens should have been
fine.

Here is the order of events that allowed this to slip through:
t0: I wrote halign patches and tested them. These alignment assertions are for
   gen8 fast clear surfaces, basically.
t1: I pushed bogus perf patch which made fast clears never happen
t2: Reworked halign patches based on Chad's feedback and introduced the bug this
   patch fixes.
t2.5: I tested reworked patches, but assertion wasn't hit because of t1.
t3. Matt fixed issue in t1 which made fast clears happen here:
commit 22af95af83
Author: Matt Turner <mattst88@gmail.com>
Date:   Thu Jun 18 16:14:50 2015 -0700

    i965: Add missing braces around if-statement.

This logic should match that of the v1 of my halign patch series.

Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Matt Turner <mattst88@gmail.com>
Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2015-06-19 11:25:00 -07:00
Ilia Mirkin
539cb2b76e mesa: move ARB_gs5 enums to core, EXT_polygon_offset_clamp to desktop
When adding EXT_polygon_offset_clamp, I first made it core-only, and
never moved the enum getter back to the GL/GL_CORE section. Similarly,
ARB_gs5 is a core-only extension, so move its getters to the GL_CORE
section.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-19 14:11:27 -04:00
Brian Paul
6ec4e9c28d u_vbuf: fix src_offset alignment in u_vbuf_create_vertex_elements()
If the driver says PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY=1,
the driver should never receive a pipe_vertex_element::src_offset value
that's not a multiple of four.  But the vbuf code wasn't actually adjusting
the src_offset value when creating the vertex element state object.

We just need to align the src_offset values put in the driver_attribs[]
array.

See the piglit gl-1.5-vertex-buffer-offsets test.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-19 10:54:24 -06:00
Brian Paul
c40f44cc99 gallium: whitespace, formatting clean-up in p_state.h
Remove trailing whitespace, move some braces, 78-column wrapping.
Trivial.
2015-06-19 08:45:00 -06:00
Brian Paul
4c11008eba st/wgl: fix WGL_SWAP_METHOD_ARB query
There are three possible return values (not two): WGL_SWAP_COPY_ARB,
WGL_SWAP_EXCHANGE_EXT and WGL_SWAP_UNDEFINED_ARB.

VMware bug 1431184

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
73bdf4ba86 stw: use new stw_get_nop_function() function to avoid Viewperf 12 crashes
Also, print a warning if we do return NULL from wglGetProcAddress() to
help spot this sort of problem in the future.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
8d005a643e stw: add some no-op functions for GL_EXT_dsa, GL_NV_half_float
Viewperf 12 calls wglGetProcAddress() to get pointers to some unsupported
DSA and half-float functions.  We return NULL but Viewperf doesn't check
for null before trying to jump through the pointer.  That causes a crash.

This patch adds no-op functions to call instead (used by the next patch).
This avoids the crash but the rendering is incorrect.

Some DSA functions are being added to Mesa at this time so we may be
able to remove some of these no-ops in the future.

More no-op functions may be added as needed.

VMware PR1383421

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-06-19 08:45:00 -06:00
Jose Fonseca
eee9247018 st/wgl: Don't return core profile for 3.1 contexts.
WGL_CONTEXT_PROFILE_MASK_ARB doesn't apply to desktop OpenGL versions
less than 3.2 -- applications can't specify whether they want a core or
a compat 3.1 context -- instead they are supposed the check whether the
returned context advertises GL_ARB_compatibility extension.

Mesa doesn't support compatability contexts for version higher than 3.1,
so we used to return core profile context, but this makes several Windows
applications unhappy, because they just assume they got a compatability
context without checking.

So it seems safer to on Windows to never return core profile for 3.1,
ie, just fail the context creation.

VMware PR1365920.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
528bd94432 st/wgl: set PIPE_BIND_SAMPLER_VIEW for window color buffers
To allow sampling from the surface for things like glCopyPixels
or glCopyTexSubImage.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
9405c1b3b0 st/wgl: add support for multisample pixel formats
Create pixel formats with 0, 4, 8 and 16 samples per pixel.
Add a SVGA_FORCE_MSAA env var to force creating all pixel formats
with a particular sample count.  This is useful for testing Mesa/GLUT/
etc. programs which don't ordinarily use multisample.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
0925e5f5bc st/wgl: respect sample count when creating framebuffer surfaces
Use the visual/pixel format's sample count instead of zero.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
b8249de646 st/wgl: fix WGL_SAMPLE_BUFFERS_ARB query
Only report 1 for WGL_SAMPLE_BUFFERS_ARB if the number of samples
per pixel > 1.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
5ad5d44af5 tgsi: add comments for ureg_emit_label() 2015-06-19 08:45:00 -06:00
Brian Paul
12c1c0706d tgsi: new comments, assertion for executing TGSI_OPCODE_CAL 2015-06-19 08:45:00 -06:00
Timothy Arceri
2ce2b80c6f docs: update developer info
Update piglit link to the current Piglit website.

Add note about updating patchwork when sending patch revisions.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-06-19 18:27:40 +10:00
Jose Fonseca
afeb922206 llvmpipe: Truncate the binned constants to max const buffer size.
Tested with Ilia Mirkin's gzdoom.trace and
"arb_uniform_buffer_object-maxuniformblocksize fsexceed" piglit test
without my earlier fix to fail linkage when UBO exceeds
GL_MAX_UNIFORM_BLOCK_SIZE.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:06 +01:00
Jose Fonseca
f734d25560 glsl: Fail linkage when UBO exceeds GL_MAX_UNIFORM_BLOCK_SIZE.
It's not totally clear whether other Mesa drivers can safely cope with
over-sized UBOs, but at least for llvmpipe receiving a UBO larger than
its limit causes problems, as it won't fit into its internal display
lists.

This fixes piglit "arb_uniform_buffer_object-maxuniformblocksize
fsexceed" without regressions for llvmpipe.

NVIDIA driver also fails to link the shader from
"arb_uniform_buffer_object-maxuniformblocksize fsexceed".

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65525

PS: I don't recommend cherry-picking this for Mesa stable, as some app
might inadvertently been relying on UBOs larger than
GL_MAX_UNIFORM_BLOCK_SIZE to work on other drivers, so even if this
commit is universally accepted it's probably best to let it mature in
master for a while.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:05 +01:00
Ilia Mirkin
5974841fd0 glsl: guard gl_NumSamples enablement on ARB_sample_shading
gl_NumSamples should only be enabled when ARB_sample_shading is enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-18 20:40:22 -04:00
Matt Turner
22af95af83 i965: Add missing braces around if-statement.
Fixes a performance problem caused by commit b639ed2f.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90895
2015-06-18 16:45:55 -07:00
Jordan Justen
2310a65c28 i965/compute: Fix undefined code with right_mask for SIMD32
Although we don't support SIMD32, krh pointed out that the left shift
by 32 is undefined by C/C++ for 32-bit integers.

Suggested-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-18 11:24:39 -07:00
Ilia Mirkin
770f141866 mesa: add GL_PROGRAM_PIPELINE support in KHR_debug calls
This was apparently missed when ARB_sso support was added.
Add label support to pipeline objects just like all the other
debug-related objects.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-18 13:21:44 -04:00
Ilia Mirkin
b6e238023c glsl: add version checks to conditionals for builtin variable enablement
A number of builtin variables have checks based on the extension being
enabled, but were missing enablement via a higher GLSL version.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-18 13:21:44 -04:00
Ilia Mirkin
c40e7ee7c4 glsl: handle conversions to double when comparing param matches
This allows mod(int, int) to become selected as float mod when doubles
are supported.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-18 13:21:44 -04:00
Emil Velikov
6b0378e483 ilo: remove missing ilo_fence.h from the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-18 12:59:28 +01:00
Boyan Ding
997fc807b2 egl/x11: Set version of swrastLoader to 2
which it actually implements instead of the newest version defined in
dri_interface.h

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-18 12:57:59 +01:00
Eric Anholt
1d45e44b2f vc4: Move tile state/alloc allocation into the kernel.
This avoids a security issue where userspace could have written the tile
state/tile alloc behind the GPU's back, and will apparently be necessary
for fixing stability bugs (tile state buffers are missing some top bits
for the tile alloc's address).
2015-06-17 23:53:49 -07:00
Eric Anholt
9adcd2d80a vc4: Move RCL generation into the kernel.
There weren't that many variations of RCL generation, and this lets us
skip all the in-kernel validation for what we generated.
2015-06-17 23:53:49 -07:00
Eric Anholt
91c73a9a28 vc4: Add dumping of VC4_PACKET_TILE_BINNING_MODE_CONFIG. 2015-06-17 23:53:49 -07:00
Eric Anholt
dc1fbad2eb vc4: Fix memory leak from simple_list conversion.
I accidentally shadowed the outside declaration, so we always returned
NULL even when we'd found something in the cache.
2015-06-17 23:53:49 -07:00
Eric Anholt
62d153ea37 vc4: Track the number of BOs allocated and their size.
This is useful for BO leak debugging.
2015-06-17 23:53:49 -07:00
Iago Toral Quiroga
2b1cdb0edd i965: Fix textureGrad with cube samplers
We can't use sampler messages with gradient information (like
sample_g or sample_d) to deal with this scenario because according
to the PRM:

"The r coordinate and its gradients are required only for surface
types that use the third coordinate. Usage of this message type on
cube surfaces assumes that the u, v, and gradients have already been
transformed onto the appropriate face, but still in [-1,+1] range.
The r coordinate contains the faceid, and the r gradients are ignored
by hardware."

Instead, we should lower this to compute the LOD manually based on the
gradients and use a different sample message that takes the computed
LOD instead of the gradients. This is already being done in
brw_lower_texture_gradients.cpp, but it is restricted to shadow
samplers only, although there is a comment stating that we should
probably do this also for samplerCube and samplerCubeArray.

Because of this, both dEQP and Piglit test cases for textureGrad with
cube maps currently fail.

This patch does two things:
1) Activates the texturegrad lowering pass for all cube samplers.
2) Corrects the computation of the LOD value for cube samplers.

I had to do 2) because for cube maps the calculations implemented
in the lowering pass always compute a value of rho that is twice
the value we want (so we get a LOD value one unit larger than we
want). This only happens for cube map samplers (all kinds). I am
not sure about why we need to do this, but I suspect that it is
related to the fact that cube map coordinates, when transported
to a specific face in the cube, are in the range [-1, 1] instead of
[0, 1] so we probably need to divide the derivatives by 2 when
we compute the LOD. Doing that would produce the same result as
dividing the final rho computation by 2 (or removing a unit
from the computed LOD, which is what we are doing here).

Fixes the following piglit tests:
bin/tex-miplevel-selection textureGrad Cube -auto -fbo
bin/tex-miplevel-selection textureGrad CubeArray -auto -fbo
bin/tex-miplevel-selection textureGrad CubeShadow -auto -fbo

Fixes 10 dEQP tests in the following category:
dEQP-GLES3.functional.shaders.texture_functions.texturegrad.*cube*

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-18 08:35:46 +02:00
Ilia Mirkin
36e3eb6a95 nvc0/ir: can't have a join on a load with an indirect source
Triggers an INVALID_OPCODE warning on GK208. Seems rare enough to not
warrant verification on other chips. Fixes the new piglits:

  ubo_array_indexing/fs-nonuniform-control-flow.shader_test
  ubo_array_indexing/vs-nonuniform-control-flow.shader_test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-17 22:23:20 -04:00
Kevin Rogovin
ff06901082 docs: mark GL_ARB_framebuffer_no_attachments done for i965
Mark GL_ARB_framebuffer_no_attachments as done for i965.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
8319999831 i965: enable ARB_framebuffer_no_attachments for Gen7+
Enable GL_ARB_framebuffer_no_attachments in i965 for Gen7 and higher.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
9ded636975 i965: execution of frag-shader when it has atomic buffer
Ensure that the GPU spawns the fragment shader thread for those
fragment shaders with atomic buffer access.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
bbb700967e mesa: function for testing if current frag-shader has atomics
Add helper function that checks if current fragment shader active
of gl_context has atomic buffer access.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
41b6db225f i965: Use _mesa_geometric_ functions appropriately
Change references to gl_framebuffer::Width, Height, MaxNumLayers
and Visual::samples to use the _mesa_geometry_ convenience functions
for those places where the geometry of the gl_framebuffer is needed
(in contrast to the geometry of the intersection of the attachments
of the gl_framebuffer).

This patch is to pave the way to enable GL_ARB_framebuffer_no_attachments
on Gen7 and higher in i965.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
51f4b51151 mesa: helper function for scissor box of gl_framebuffer
Add helper convenience function that intersects the scissor values
against a passed bounding box. In addition, to avoid replicated code,
make the function _mesa_scissor_bounding_box() use this new function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
74987977a3 mesa: add helper functions for geometry of gl_framebuffer
Add convenience helper functions for fetching geometry of gl_framebuffer
that return the geometry of the gl_framebuffer instead of the geometry of
the buffers of the gl_framebuffer when then the gl_framebuffer has no
attachments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
6aa12994bd PATCH 03/10] mesa: Complete ARB_framebuffer_no_attachments in Mesa core
Implement GL_ARB_framebuffer_no_attachments in Mesa core
 - changes to conditions for framebuffer completenss
 - implement set/get functions for framebuffers for
   new functions in GL_ARB_framebuffer_no_attachments

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:03 +03:00
Kevin Rogovin
c9d26f201a mesa: Constants and functions for ARB_framebuffer_no_attachments
Define the enumeration constants, function entry points and
glGet for the GL_ARB_framebuffer_no_attachments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:02 +03:00
Kevin Rogovin
da81999bee mesa: Define infrastructure for ARB_framebuffer_no_attachments
Define the infrastructure for the extension GL_ARB_framebuffer_no_attachments:
 - extension table
 - additions to gl_framebuffer

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
2015-06-17 14:39:02 +03:00
Eric Anholt
a0cd1a4060 vc4: Make sure that direct texture clamps have a minimum value of 0.
I was thinking of the MIN opcode in terms of unsigned math, but it's
signed, so if you used a negative array index, you could read before the
UBO.  Fixes segfaults under simulation in piglit array indexing tests with
mprotect-based guard pages.
2015-06-16 15:15:14 -07:00
Eric Anholt
d4d2736149 vc4: Swap around which src we spill to ra31/rb31.
I wanted to assert that src1 came from a non-unspilled register in shader
validation, and this easily gets us that.  And, as a bonus:

total instructions in shared programs: 93347 -> 92723 (-0.67%)
instructions in affected programs:     60524 -> 59900 (-1.03%)
2015-06-16 15:15:14 -07:00
Eric Anholt
507f3e708c vc4: R4 is not a valid register for clamped direct texturing.
Our array only goes to R3, and R4 is a special case that shouldn't be
used.
2015-06-16 15:15:14 -07:00
Eric Anholt
2eac356467 vc4: Factor out the live clamp register getter. 2015-06-16 15:15:14 -07:00
Eric Anholt
596532cc7d vc4: Drop the unused "stride" field of surfaces.
We're always looking at the slice anyway, when we would have needed it.
2015-06-16 15:15:14 -07:00
Eric Anholt
6dd55b4909 vc4: Handle refcounting the exec BO like we do in the kernel.
This reduces the diff to the kernel, and will be useful when I make the
kernel allocate more BOs as part of validation.
2015-06-16 15:15:14 -07:00
Eric Anholt
731ac05cc4 vc4: Use VC4_SET/GET_FIELD for some RCL packets. 2015-06-16 15:15:14 -07:00
Eric Anholt
e22a192784 vc4: Make symbolic values for packet sizes. 2015-06-16 15:15:14 -07:00
Eric Anholt
c2f8287601 vc4: Use symbolic values in texture ptype validation. 2015-06-16 15:15:14 -07:00
Eric Anholt
5fbbec9aae vc4: Move vc4_packet.h to the kernel/ directory, since it's also shared.
I want to notice discrepancies when I diff -u between Mesa and the kernel.
2015-06-16 15:15:14 -07:00
Anuj Phogat
e20345204d i965/gen9: Disable Mip Tail for YF/YS tiled surfaces
Disabling miptails fixed the buffer corruption happening in FBO
which use YF/YS tiled renderbuffer or texture as color attachment.

Spec recommends disabling mip tails only for non-mip-mapped surfaces.
But, without disabling miptails I couldn't get correct data out of
mipmapped YF/YS tiled surface.

We need better understanding of miptails before start using them.
For now this patch helps move things forward.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-16 14:52:49 -07:00
Anuj Phogat
54591bb67f i965/gen9: Set vertical and horizontal surface alignments
Patch sets the alignments for texture and renderbuffer surfaces.

V3: Make changes inside horizontal_alignment() and
    vertical_alignment() (Topi)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Anuj Phogat
6c380d42b1 i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*
Makes no functional changes in the code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Anuj Phogat
af08530332 i965: Rename use_linear_1d_layout() and make it global
This function will be utilised in later patches.

V2: Make both pointers constants (Topi)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Anuj Phogat
0668756447 i965/gen9: Set tiled resource mode in surface state
This patch sets the tiled resource mode for texture and renderbuffer
surfaces.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-16 14:52:48 -07:00
Haixia Shi
6b8accb36b egl/dri2: implement platform_surfaceless
The surfaceless platform is for off-screen rendering only. Render node support
is required.

Only consider the render nodes. Do not use normal nodes as they require
auth hooks.

v3: change platform_null to platform_surfaceless
v4: make libdrm required for surfaceless
v5: remove modified include guards with defined(HAVE_SURFACELESS_PLATFORM)
v6: use O_CLOEXEC for drm fd

Signed-off-by: Haixia Shi <hshi@chromium.org>
Signed-off-by: Zach Reizner <zachr@google.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-16 13:55:26 -07:00
Neil Roberts
c753866cc4 i965/vec4: Fix the source register for indexed samplers
Previously when setting up the sample instruction for an indirect
sampler the vec4 backend was directly passing the pseudo opcode's
src0. However vec4_visitor::visit(ir_texture *) doesn't set the
texture operation's src0 -- it's left as BAD_FILE, which when
translated into a brw_reg gives the null register. In brw_SAMPLE,
gen6_resolve_implied_move() inserts a MOV from the inst->base_mrf and
sets the src0 appropriately. The indirect sampler case did not have a
call to gen6_resolve_implied_move().

The fs backend avoids this because the platforms that support dynamic
indexing of samplers (IVB+) have been converted to not use the
fake-MRF hack, and instead send from proper GRFs.

This patch makes it call gen6_resolve_implied_move before setting up
the indirect message. This is similar to what is done for constant
sampler numbers in brw_SAMPLE.

The Piglit tests for sampler array indexing didn't pick this up
because they were using a texture with a solid colour so it didn't
matter what texture coordinates were actually used. The tests have now
been changed to be more thorough in this commit:

http://cgit.freedesktop.org/piglit/commit/?id=4f9caf084eda7

With that patch the tests for gs and vs are currently failing on
Ivybridge, but this patch fixes them. There are no other changes to a
Piglit run on Ivybridge.

On Skylake the gs tests were failing even without the Piglit patch
because Skylake needs the source registers to work correctly in order
to send a message header to select SIMD4x2 mode.

(The explanation in the commit message is partially written by Matt
Turner)

Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-16 18:44:32 +01:00
Marek Olšák
aab55b0bc6 st/mesa: improve assertions in vp/fp translation
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:03 +02:00
Marek Olšák
42a3c1ec84 mesa: don't rebind constant buffers after every state change if GS is active
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:03 +02:00
Chris Forbes
358b6bb7a7 mesa: generalize sso stage interleaving check
For tessellation.

v2: cleanup by Marek Olšák

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:03 +02:00
Marek Olšák
8af11afc38 mesa: remove unused variables from gl_program
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:02 +02:00
Chris Forbes
fa49536ab1 glsl: add ir reader support for ir_barrier
Picked from the tessellation branch.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:02 +02:00
Marek Olšák
2f86c22e75 glsl: print locations of variables
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-16 15:47:02 +02:00
Marek Olšák
797f4eacea configure.ac: rename LLVM_VERSION_PATCH to avoid conflict with llvm-config.h
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-06-16 15:47:02 +02:00
Timothy Arceri
da6996485f Revert "glsl: remove restriction on unsized arrays in GLSL ES 3.10"
This reverts commit adee54f826.

Further down in the GLSL ES 3.10 spec it say:

"If an array is declared as the last member of a shader storage block
and the size is not specified at compile-time, it is sized at run-time.
In all other cases, arrays are sized only at compile-time."

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-06-16 20:58:59 +10:00
Tapani Pälli
7d88ab42b9 mesa: set override_version per api version override
Before 9b5e92f get_gl_override was called only once, but now it is
called for multiple APIs (GLES2, GL), version needs to be set always.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90797
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Tested-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-16 13:52:01 +03:00
Neil Roberts
1a6220b416 i965: Fix aligning to the block size in intel_miptree_copy_slice
This function was trying to align the width and height to a multiple
of the block size for compressed textures. It was using align_w/h as a
shortcut to get the block size as up until Gen9 this always happens to
match. However in Gen9+ the alignment values are expressed as
multiples of the block size so in effect the alignment values are
always 4 for compressed textures as that is the minimum value we can
pick. This happened to work for most compressed formats because the
block size is also 4, but for FXT1 this was breaking because it has a
block width of 8.

This fixes some Piglit tests testing FXT1 such as

spec@3dfx_texture_compression_fxt1@fbo-generatemipmap-formats

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2015-06-16 11:28:44 +01:00
Ilia Mirkin
8b24388647 nv50,nvc0: clamp uniform size to 64k
The state tracker will pass through requests from buggy applications
which will have the buffer size larger than the max allowed (64k). Clamp
the size to 64k so that we don't get errors when uploading the constbuf
data.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-15 15:48:58 -04:00
Ilia Mirkin
a2af42c1d2 nvc0/ir: fix collection of first uses for texture barrier insertion
One of the places we have to insert texbars is in situations where the
result of the tex gets overwritten by a different instruction (e.g. in a
conditional statement). However in some situations it can actually
appear as though the original tex itself is an overwriting instruction.
This can naturally never really happen, so just ignore the tex
instruction when it comes up.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90347
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-15 14:31:00 -04:00
Eric Anholt
932d1613d1 egl: Drop check for driver != NULL.
Back in 2013, a patch was added (with 2 reviewers!) at the end of the
block to early exit the loop in this case, without noticing that the loop
already did.  I added another early exit case, again without noticing, but
Rob caught me.  Just drop the loop condition that apparently surprises
most of us, instead of leaving the end of the loop conspicuously not
exiting on success.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2015-06-15 10:32:23 -07:00
Eric Anholt
bcd8a64f32 gallium: Drop the gallium-specific Android sw winsys.
This was part of gallium_egl, and we now have the normal libEGL Android
winsys support to handle it.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Eric Anholt
6ce0b0e317 vc4: Add support for building on Android.
v2: Add a comment explaining why we link libmesa_glsl.  Drop warning
    option from freedreno.  Add vc4 to the documentation for
    BOARD_GPU_DRIVERS.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Eric Anholt
fd3234891f gallium: Enable build of NIR support on Android.
v2: Add a comment explaining why we link libmesa_glsl.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Eric Anholt
71aaf62fca egl/dri2: Fix Android Lollipop build on ARM.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Anuj Phogat
8e9eec5cbf meta: Abort texture upload if pixels == null and no pixel unpack buffer set
in case of glTexImage{1,2,3}D(). Texture has already been allocated
at this point and we have no data to upload. With out this patch,
with create_pbo = true, we end up creating a temporary pbo and then
uploading uninitialzed texture data.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
a4ff47ade9 meta: Abort meta path if ReadPixels need rgb to luminance conversion
After recent addition of pbo testing in piglit test getteximage-luminance,
it fails on i965. This patch makes a sub test pass.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
ba2b1f8668 mesa: Turn need_rgb_to_luminance_conversion() in to a global function
This will be used by _mesa_meta_pbo_GetTexSubImage() in a later patch.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
0b13adcd08 mesa: Use helper function need_rgb_to_luminance_conversion()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
82abdf209a mesa: Handle integer formats in need_rgb_to_luminance_conversion()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
6c14b66e40 meta: Use is_power_of_two() helper function
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
278460279b i965: Check for miptree pitch alignment before using intel_miptree_map_movntdqa()
We have an assert() in intel_miptree_map_movntdqa() which expects
the pitch to be 16 byte aligned.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-15 09:07:28 -07:00
Anuj Phogat
84d27c32d2 i965: Remove break after return
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-15 09:07:28 -07:00
Jürgen Rühle
2e42deb29c nv50/ir: OP_JOIN is a flow instruction
OP_JOIN instructions are assumed to be flow instructions and mercilessly
casted to FlowInstruction.

This patch fixes an instance where an OP_JOIN is created as a plain
instruction. This can cause crashes in the ir printer.

[imirkin: add ->fixed = 1]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-15 11:46:32 -04:00
Emil Velikov
061c9bc204 docs: add news item and link release notes for mesa 10.6.0
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 08:57:56 +01:00
Emil Velikov
f9e0441328 docs: Add sha256sums for the 10.6.0 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 5d327b3735)
2015-06-15 08:57:55 +01:00
Emil Velikov
311abe7fbd docs: Update 10.6.0 release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 3b9cde5c81)
2015-06-15 08:57:55 +01:00
Chia-I Wu
94ab563671 ilo: add ilo_state_raster_{line,poly}_stipple
Initialize hardware stipple states on bound instead of on emission.
2015-06-15 15:06:11 +08:00
Chia-I Wu
7cb853d52a ilo: add ilo_state_sample_pattern
Move sample pattern initialization from ilo_render to
ilo_state_sample_pattern.
2015-06-15 15:06:11 +08:00
Chia-I Wu
8f37e8e64f ilo: add 3DSTATE_AA_LINE_PARAMETERS to ilo_state_raster
Utilize ilo_state_raster to avoid redundant state change.
2015-06-15 15:06:11 +08:00
Marek Olšák
b0a2280e45 gallium/util: add util_last_bit64
This will be needed by radeonsi.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-14 20:17:29 +02:00
Marek Olšák
2489054f66 glsl: fix "tesselation" typo
Trivial.
2015-06-14 20:17:29 +02:00
Marek Olšák
790510808e r600g: handle TGSI input/output array declarations correctly
Most of this code could be removed if r600g used tgsi_shader_info.
2015-06-14 20:17:29 +02:00
Chia-I Wu
117926debb ilo: merge ilo_state_3d*.[ch] to ilo_state.[ch]
With most code replaced to ilo_state_*, what was left did not belong there
anymore.
2015-06-15 01:23:23 +08:00
Chia-I Wu
54e0a8ed5d ilo: add ilo_state_ps to ilo_shader_cso 2015-06-15 01:22:13 +08:00
Chia-I Wu
30fcb31c9b ilo: add ilo_state_{vs,hs,ds,gs} to ilo_shader_cso 2015-06-15 01:07:10 +08:00
Chia-I Wu
da6e45fcbc ilo: embed ilo_state_sbe in ilo_shader 2015-06-15 01:07:10 +08:00
Chia-I Wu
5a52627c4f ilo: embed ilo_state_vf in ilo_ve_state 2015-06-15 01:07:09 +08:00
Chia-I Wu
9bfa987fb0 ilo: embed ilo_state_urb in ilo_state_vector 2015-06-15 01:07:09 +08:00
Chia-I Wu
eaf2c73899 ilo: embed ilo_state_sol in ilo_shader 2015-06-15 01:07:09 +08:00
Chia-I Wu
960ca7d5e3 ilo: embed ilo_state_cc in ilo_blend_state 2015-06-15 01:07:09 +08:00
Chia-I Wu
402e155cd3 ilo: embed ilo_state_raster in ilo_rasterizer_state 2015-06-15 01:07:09 +08:00
Chia-I Wu
ded7d412d0 ilo: embed ilo_state_viewport in ilo_viewport_state 2015-06-15 01:06:45 +08:00
Chia-I Wu
4b5c0a8341 ilo: replace ilo_sampler_cso with ilo_state_sampler 2015-06-15 01:06:45 +08:00
Chia-I Wu
745ef2c07b ilo: replace ilo_view_surface with ilo_state_surface 2015-06-15 01:06:45 +08:00
Chia-I Wu
c10c1ac0cf ilo: replace ilo_zs_surface with ilo_state_zs 2015-06-15 01:06:44 +08:00
Chia-I Wu
6dad848d1a ilo: add ilo_state_ps
We want to make ilo_shader_cso a union of ilo_state_{vs,hs,ds,gs,ps}.
2015-06-15 01:06:44 +08:00
Chia-I Wu
df9f846ac6 ilo: add ilo_state_{vs,hs,ds,gs}
We want to make ilo_shader_cso a union of ilo_state_{vs,hs,ds,gs} and ps
payload.
2015-06-15 01:06:44 +08:00
Chia-I Wu
a0bb1c2d17 ilo: add ilo_state_sbe
We want to replace ilo_kernel_routing with ilo_state_sbe.
2015-06-15 01:06:44 +08:00
Chia-I Wu
1ccab943b6 ilo: add ilo_state_vf
We want to replace ilo_ve_state with ilo_state_vf.
2015-06-15 01:06:44 +08:00
Chia-I Wu
9c77ebef24 ilo: add ilo_state_urb 2015-06-15 01:06:44 +08:00
Chia-I Wu
3ff40be0ee ilo: add ilo_state_sol 2015-06-15 01:06:44 +08:00
Chia-I Wu
62bb643718 ilo: add ilo_state_cc
We want to replace ilo_dsa_state and ilo_blend_state with ilo_state_cc.
2015-06-15 01:06:44 +08:00
Chia-I Wu
6be8b6053d ilo: add ilo_state_raster
We want to replace ilo_rasterizer_state with ilo_state_raster.
2015-06-15 01:06:44 +08:00
Chia-I Wu
4fa7ed99a1 ilo: add ilo_state_viewport
We want to replace ilo_viewport_cso and ilo_scissor_state with
ilo_state_viewport.
2015-06-14 23:00:04 +08:00
Chia-I Wu
61fea171af ilo: add ilo_state_sampler
We want to replace ilo_sampler_cso with ilo_state_sampler.
2015-06-14 23:00:04 +08:00
Chia-I Wu
f5f2007322 ilo: add ilo_state_surface
We want to replace ilo_view_surface with ilo_state_surface.
2015-06-14 23:00:04 +08:00
Chia-I Wu
b91250a56b ilo: add ilo_state_zs
We want to replace ilo_zs_surface with ilo_state_zs.  One noteworthy
difference is that ilo_state_zs always aligns level 0 to 8x4 when HiZ is
enabled.  HiZ will not be enabled for 1D surfaces as a result.
2015-06-14 23:00:03 +08:00
Chia-I Wu
9af1fc590d ilo: update genhw headers
Generate these new enums

  enum gen_reorder_mode;
  enum gen_clip_mode;
  enum gen_front_winding;
  enum gen_fill_mode;
  enum gen_cull_mode;
  enum gen_pixel_location;
  enum gen_sample_count;
  enum gen_inputattr_select;
  enum gen_msrast_mode;
  enum gen_prefilter_op;

Correct the type of GEN6_SAMPLER_DW0_BASE_LOD.  Rename gen_logicop_function,
gen_sampler_mip_filter, gen_sampler_map_filter, gen_sampler_aniso_ratio, and
others.
2015-06-14 15:43:20 +08:00
Chia-I Wu
9cb0df4b50 ilo: add ilo_image_disable_aux()
When aux bo allocation fails, ilo_image_disable_aux() should be called to
disable aux buffer.
2015-06-14 15:43:20 +08:00
Chia-I Wu
f0de65cbc2 ilo: add array_size and level_count to ilo_image
We will use them for bound checking.
2015-06-14 15:43:20 +08:00
Chia-I Wu
f9d2bbe967 ilo: add pipe_texture_target to ilo_image
Save the target in ilo_image instead of passing it around.
2015-06-14 15:43:20 +08:00
Chia-I Wu
9da9cf729f ilo: fix "Render Cache Read Write Mode"
It needs be set to R/W only when using certain messages via DP render cache.
Since we only use RT wrties with the render cache, we never need to set it.
2015-06-14 15:43:20 +08:00
Chia-I Wu
1885ac4908 ilo: avoid resource owning in core
It is up to the users whether to reference count the BOs or not.
2015-06-14 15:43:20 +08:00
Chia-I Wu
ab7229b9b6 ilo: assert core objects are zero-initialized
Core objects are usually embedded inside calloc()'ed objects and we expect
them to be zero-initialized.
2015-06-14 15:43:20 +08:00
Tom Stellard
4d35eef326 radeon/llvm: Handle LLVM backend rename from R600 to AMDGPU
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-12 21:02:00 -07:00
Tom Stellard
3e74122337 gallivm: Only build lp_profile() body when PROFILE is defined
The only use of lp_profile() is wrapped in #if defined(PROFILE),
so there is no reason to build it unless this macro is defined.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-12 21:02:00 -07:00
Timothy Arceri
faf7670ee8 glsl: fix compile error message
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-13 12:21:26 +10:00
Ben Widawsky
935f1f60da i965/gen8+: Add aux buffer alignment assertions
This helped find the incorrect HALIGN values from the previous patches.

v2: Add PRM references for assertions (Chad)

v3: Remove duplicated part of commit message, assert num_samples > 1, instead of
num_samples > 0. (Chad)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-12 18:09:49 -07:00
Ben Widawsky
a2421623db i965/gen9: Set HALIGN_16 for all aux buffers
Just like the previous patch, but for the GEN9 constraints.

v2:
bugfix: Gen9 HALIGN was being set for all miptree buffers (Chad). To address
this, move the check to where the gen8 check is, and do the appropriate
conditional there.

v3:
Remove stray whitespace introduced in v2 (Chad)
Rework comment to show AUX_CCS and AUX_MCS specifically. Remove misworded part
about gen7 (Chad).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> (v1)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-12 18:09:49 -07:00
Ben Widawsky
c4aa041a61 i965/gen8: Correct HALIGN for AUX surfaces
This restriction was attempted in this commit:
commit 4705346463
Author: Anuj Phogat <anuj.phogat@gmail.com>
Date:   Fri Feb 13 11:21:21 2015 -0800

   i965/gen8: Use HALIGN_16 if MCS is enabled for non-MSRT

However, the commit itself doesn't achieve the desired goal as determined by the
asserts which the next patch adds. mcs_mt is NULL (never set) we're in the
process of allocating the mcs_mt miptree when we get to this function. I didn't
check, but perhaps this would work with blorp, however, meta clears allocate the
miptree structure (which AFAICT needs the alignment also) way before it
allocates using meta clears where the renderbuffer is allocated way before the
aux buffer.

The restriction is referenced in a few places, but the most concise one [IMO]
from the spec is for Gen9. Gen8 loosens the restriction in that it only requires
this for non-msrt surface.

   When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E, HALIGN 16 must
   be used.

With the code before the miptree layout flag rework (patches preceding this),
accomplishing this workaround is very difficult.

v2:
bugfix: Don't set HALIGN16 for gens before 8 (Chad)

v3:
non-trivial rebase

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-12 18:09:49 -07:00
Ben Widawsky
e92fbdcf9c i965: Extract tiling from fast clear decision
There are several constraints when determining if one can fast clear a surface.
Some of these are alignment, pixel density, tiling formats, and others that vary
by generation. The helper function which exists today does a suitable job,
however it conflates "BO properties" with "Miptree properties" when using
tiling. I consider the former to be attributes of the physical surface, things
which are determined through BO allocation, and the latter being attributes
which are derived from the API, and having nothing to do with the underlying
surface.

Determining tiling properties and creating miptrees are related operations
(when we allocate a BO for a miptree) with some disjoint constraints. By
extracting the decisions into two distinct choices (tiling vs. miptree
properties), we gain flexibility throughout the code to make determinations
about when we can or cannot fast clear strictly on the miptree.

To signify this change, I've also renamed the function to indicate it is a
distinction made on the miptree. I am torn as to whether or not it was a good
idea to remove "non_msrt" since it's a really nice thing for grep.

v2:
Reword some comments (Chad)
intel_is_non_msrt_mcs_tile_supported->intel_tiling_supports_non_msrt_mcs (Chad)
Make full if ladder for gens in above function (Chad)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2015-06-12 18:09:49 -07:00
Ben Widawsky
b91a110d5c i965/gen9: Only allow Y-Tiled MCS buffers
For GEN9, much of the logic to use X-Tiled buffers has been stripped out. It is
still supported in some places, but it's never desirable. Unfortunately we don't
yet have the ability to have Y-Tiled scanout (see:
http://patchwork.freedesktop.org/patch/46984/),

NOTE: This patch shouldn't actually do anything since SKL doesn't yet use fast
clears (they are disabled because they are causing regressions). THerefore, the
only case we can get to this function on SKL is by way of
intel_update_winsys_renderbuffer_miptree.

v2: Update commit message to be more clear that the NOTE is for SKL only.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-12 18:09:48 -07:00
Ben Widawsky
b5c5aac687 i965: Consolidate certain miptree params to flags
I think pretty much everyone agrees that having more than a single bool as a
function argument is bordering on a bad idea. What sucks about the current
code is in several instances it's necessary to propagate these boolean
selections down to lower layers of the code. This requires plumbing (mechanical,
but still churn) pretty much all of the miptree functions each time.  By
introducing the flags paramater, it is possible to add miptree constraints very
easily.

The use of this, as is already the case, is sometimes we have some information
at the time we create the miptree that needs to be known all the way at the
lowest levels of the create/allocation, disable_aux_buffers is currently one
such example. There will be another example coming up in a few patches.

v2:
Tab fix. (Ben)
Long line fixes (Topi)
Use anonymous enum instead of #define for layout flags (Chad)
Use 'X != 0' instead of !!X (everyone except Chad)

v3:
Some non-trivial conflict resolution on top of Anuj's patches.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Cc: "Pohjolainen, Topi" <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-06-12 18:09:48 -07:00
Timothy Arceri
0d2068a92d glsl: enforce restriction on AoA interface blocks in GLSL ES 3.10
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-06-13 08:31:21 +10:00
Timothy Arceri
94d669b0d2 glsl: enforce fragment shader input restrictions in GLSL ES 3.10
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-06-13 08:31:15 +10:00
Timothy Arceri
3d78bdea31 glsl: enforce output variable rules for GLSL ES 3.10
Some rules are already applied this just adds the missing ones.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-06-13 08:31:09 +10:00
Jordan Justen
f0e772392f i965/nir: Support barrier intrinsic function
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-12 15:12:40 -07:00
Jordan Justen
f7ef8ec9d8 i965/fs: Implement support for ir_barrier
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-12 15:12:40 -07:00
Jordan Justen
7953c00073 i965: Add brw_barrier to emit a Gateway Barrier SEND
This will be used to implement the Gateway Barrier SEND needed to implement
the barrier function.

v2:
 * notify => gateway_notify (Ken)
 * combine short lines of brw_barrier proto/decl (mattst88)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-12 15:12:40 -07:00
Jordan Justen
0d250cc210 i965: Add brw_WAIT to emit wait instruction
This will be used to implement the barrier function.

v2:
 * Rename to brw_WAIT (mattst88)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-12 15:12:40 -07:00
Jordan Justen
b925f1a1df i965: Add notification register
This will be used by the wait instruction when implementing the barrier()
function.

v2:
 * Changes suggested by mattst88

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-12 15:12:40 -07:00
Jordan Justen
bdbbec33cf i965: Disassemble Gateway SEND messages
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-12 15:12:40 -07:00
Jordan Justen
69659546a6 i965/inst: Add gateway_notify and gateway_subfuncid fields
These fields will be used when emitting a send for the barrier function.

Reference: IVB PRM Volume 4, Part 2, Section 1.1.1 Message Descriptor

v2:
 * notify => gateway_notify (Ken)
 * define bits for gen4-gen6 (bwidawsk, Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-12 15:12:40 -07:00
Jordan Justen
1b9cc257d4 i965: Add GATEWAY_SFID definitions
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-12 15:12:40 -07:00
Jordan Justen
2867f2e8cd nir: Add barrier intrinsic function
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-12 15:12:40 -07:00
Chris Forbes
86855365b4 glsl: Add builtin barrier() function
[jordan.l.justen@intel.com: Add CS support]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-12 15:12:39 -07:00
Chris Forbes
e7f628c2fc glsl: Add ir node for barrier
v2:
 * Changes suggested by mattst88

[jordan.l.justen@intel.com: Add nir support]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-12 15:12:39 -07:00
Jordan Justen
86b4acb409 i965/cs: Use exec all for CS terminate
This prevents an assertion from being hit with SIMD16:

Assertion `inst->exec_size == dispatch_width() || force_writemask_all' failed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-12 15:12:39 -07:00
Chad Versace
cfc175b409 i965/fs: Fix unused variable warning
Annotate offset_components with attribute 'unused'.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-12 12:37:25 -07:00
Emil Velikov
d15c06b514 vc4: automake: enable subdir-objects
Silence the warnings about the future incompatibility with automake 2.0

Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:42:22 +01:00
Erik Faye-Lund
634f200256 mesa: build xmlconfig to a separate static library
As we use the file from both the dri modules and loader, we end up with
multiple definition of the symbols provided in our gallium dri  modules.
Additionally we compile the file twice.

Resolve both issues, effectively enabling the build on toolchains which
don't support -Wl,--allow-multiple-definition.

v2: [Emil Velikov]
 - Fix the Scons/Android build.
 - Resolve libgbm build issues (bring back the missing -lm)

Cc: Julien Isorce <j.isorce@samsung.com>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90310
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90905
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:32:18 +01:00
Emil Velikov
83b5648a1e targets/nine: link against libnir/libglsl_util
Based on commit 101142c4010(xa: support for drivers which use NIR)

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90466
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:32:18 +01:00
Emil Velikov
ba512cc7fa pipe-loader: add libnir and libglsl_util to the link
Based on commit 101142c4010(xa: support for drivers which use NIR)

Cc: Rob Clark <robclark@freedesktop.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90466
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:32:18 +01:00
Emil Velikov
1df5a6c71e mesa; add a dummy _mesa_error_no_memory() symbol to libglsl_util
Rather than forcing everyone to provide their own definition of the symbol
provide a common (dummy) one.

This helps us resolve the build of the standalone pipe-drivers (amongst
others), which are missing the symbol.

Cc: Rob Clark <robclark@freedesktop.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:32:18 +01:00
Emil Velikov
4722743f4b gallium: use $(top_builddir) when referencing static archives
Just like every other place in gallium.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:32:17 +01:00
Emil Velikov
3f5dc9b94f freedreno: use CXX linker rather than explicit link against libstdc++
Cc: Rob Clark <robclark@freedesktop.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:32:17 +01:00
Emil Velikov
0e55db3b8a egl/haiku: coding style fixes
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:53 +01:00
Emil Velikov
b0f33e9736 egl/haiku: plug some obvious memory leaks
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:48 +01:00
Emil Velikov
e77a32fcae egl/haiku: minor surface management cleanups
Drop the stub/unused function haiku_create_surface() and add some basic implementation for destroy_surface()

Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:44 +01:00
Emil Velikov
d38a80ba6c egl/haiku: kill off haiku_log()
It's an incomplete copy of the default _eglLog() implementation. Just
use the default logger.

Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:40 +01:00
Emil Velikov
667fe2f5e9 egl/haiku: we don't use src/loader, drop all the references to it
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:37 +01:00
Emil Velikov
d0af283303 egl/haiku: remove unused variables in struct haiku_egl_driver
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:34 +01:00
Emil Velikov
46f87b2c19 egl/haiku: handle memory allocation failure
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:27 +01:00
Emil Velikov
ed9dcdf927 egl/haiku: use CALL/TRACE/ERROR over _eglLog() for haiku specifics
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:24 +01:00
Emil Velikov
0b652fedb5 egl/haiku: remove commented out code
It serves little to no purpose. As the driver gets updated, one can
look at the existing implementation (dri2) for reference rather than
letting the commented functions bitrot.

Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:20 +01:00
Emil Velikov
c3036f4bb1 egl/haiku: use correct version variable
Earlier commit folded the two separate variables into one, but forgot to
update the haiku driver.

Fixes: 0e4b564ef28(egl: combine VersionMajor and VersionMinor into one
variable)
Cc: Marek Olšák <marek.olsak@amd.com>>
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-12 15:17:12 +01:00
Jose Fonseca
0dde821bcc trace: Add missing p_compiler.h include.
For boolean.

Trivial.
2015-06-12 12:14:11 +01:00
Francisco Jerez
8d3c48eed2 i965/fs: Remove one more fixed brw_null_reg() from the visitor.
Instead use fs_builder::null_reg_f() which has the correct register
width.  Avoids the assertion failure in fs_builder::emit() hit by the
"ES3-CTS.shaders.loops.for_dynamic_iterations.unconditional_break_fragment"
GLES3 conformance test introduced by 4af4cfba9e.

Reported-and-reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-12 11:17:25 +03:00
Kenneth Graunke
16658f426d Revert "i965: Advertise a line width of 40.0 on Cherryview and Skylake."
This reverts commit f3b709c0ac.

The "dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.
interpolation.lines_wide" test appears to be broken on Cherryview when
we expose line widths greater than 12.0.  I'm not sure why.

For now, just go back to the limits we used on older platforms.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90902
Acked-by: Matt Turner <mattst88@gmail.com>
2015-06-11 16:59:49 -07:00
Kenneth Graunke
f4310cdbd0 i965: Re-index SSA definitions before printing NIR code.
This makes the SSA definitions use sequential numbers (0, 1, 2, ...)
instead of seemingly random ones.  There's not much point normally,
but it makes debug output much easier to read.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-06-11 11:17:52 -07:00
Brian Paul
1a6e4f46ed gallium: remove explicit values from PIPE_CAP_ enums
The other PIPE_CAPF_ and PIPE_SHADER_CAP_ enums don't have explicit values.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-11 10:27:17 -06:00
Jose Fonseca
9fed4f9bf5 mesa/main: Don't use ONCE_FLAG_INIT as a r-value.
It should only be used as an initializer expression.

Trivial, and fixes Windows builds.

Nevertheless, overwriting an once_flag like this seems dangerous and
should be revised.
2015-06-11 13:35:23 +01:00
Iago Toral Quiroga
0f1fe649b7 i965/gen8: Fix antialiased line rendering with width < 1.5
The same fix Marius implemented for gen6 (commit a9b04d8a) and
gen7 (commit 24ecf37a).

Also, we need the same code to handle special cases of line width
in gen6, gen7 and now gen8, so put that in the helper function
we use to compute the line width.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-11 13:40:15 +02:00
Martin Peres
5b61cb1236 glsl: fix constructing a vector from a matrix
Without this patch, the following constructs (not an extensive list)
would crash mesa:

- mat2 foo = mat2(1); vec4 bar = vec4(foo);
- mat3 foo = mat3(1); vec4 bar = vec4(foo);
- mat3 foo = mat3(1); ivec4 bar = ivec4(foo);

The first case is explicitely allowed by the GLSL spec, as seen on
page 101 of the GLSL 4.40 spec:

	"vec4(mat2) // the vec4 is column 0 followed by column 1"

The other cases are implicitely allowed also.

The actual changes are quite minimal. We first split each column of
the matrix to a list of vectors and then use them to initialize the
vector. An additional check to make sure that we are not trying to
copy 0 elements of a vector fix the (i)vec4(mat3) case as the last
vector (3rd column) is not needed at all.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-11 14:04:29 +03:00
Tapani Pälli
83624c141d mesa/es3.1: enable DRAW_INDIRECT_BUFFER_BINDING for gles3.1
(increases ES31-CTS.draw_indirect.basic.* passing tests)

v2: only expose DRAW_INDIRECT_BUFFER_BINDING for GL core + ES3.1

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-06-11 13:39:44 +03:00
Juha-Pekka Heikkila
56e9f3b493 mesa/main: avoid null access in format_array_table_init()
If _mesa_hash_table_create failed we'd get null pointer. Report
error and go away.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-11 13:17:11 +03:00
Juha-Pekka Heikkila
fd00c738c0 mesa/main: Remove _mesa_HashClone()
I didn't find this being used anywhere.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-11 13:17:11 +03:00
Alexander Monakov
bd38f91f8d i965: do_blit_drawpixels: decode array formats
Correct a regression introduced by commit 922c0c9fd5 by converting "array
format", if received from _mesa_format_from_format_and_type, to mesa_format.

References: https://bugs.freedesktop.org/show_bug.cgi?id=90839
Signed-off-by: Alexander Monakov <amonakov@gmail.com>
Tested-by: AnAkkk <anakin.cs@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-06-11 00:15:37 -07:00
Iago Toral Quiroga
f9a18acb56 i965: do not round line width when multisampling or antialiaing are enabled
In commit fe74fee8fa we rounded the line width to the nearest integer to
match the GLES3 spec requirements stated in section 13.4.2.1, but that seems
to break a dEQP test that renders wide lines in some multisampling scenarios.

Ian noted that the Open 4.4 spec has the following similar text:

    "The actual width of non-antialiased lines is determined by rounding the
    supplied width to the nearest integer, then clamping it to the
    implementation-dependent maximum non-antialiased line width."

and suggested that when ES removed antialiased lines, they removed
"non-antialised" from that paragraph but probably should not have.

Going by that note, this patch restricts the quantization implemented in
fe74fee8fa only to regular aliased lines. This seems to keep the
tests fixed with that commit passing while fixing the broken test.

v2:
  - Drop one of the clamps (Ken, Marius)
  - Add a rule to prevent advertising line widths that when rounded go beyond
    the limits allowed by the hardware (Ken)
  - Update comments in the code accordingly (Ian)
  - Put the code in a utility function (Ian)

Fixes:
dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines_wide

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90749

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-06-11 08:32:07 +02:00
Kenneth Graunke
f83b9e58f6 i965: Momentarily pretend to support ARB_texture_stencil8 for blits.
Broadwell's stencil blitting code attempts to bind a renderbuffer as a
texture, using dd->BindRenderbufferTexImage().

This calls _mesa_init_teximage_fields(), which then attempts to set
img->_BaseFormat = _mesa_base_tex_format(ctx, internalFormat), which
assert fails if internalFormat is GL_STENCIL_INDEX8 but
ARB_texture_stencil8 is unsupported.

To work around this, just pretend to support the extension momentarily,
during the blit.  Meta has already munged a variety of other things in
the context (including the API!), so it's not that much worse than what
we're already doing.

Fixes regressions since commit f7aad9da20
(mesa/teximage: use correct extension for accept stencil texture.).

v2: Add an XXX comment explaining the situation (requested by Jason
    Ekstrand and Martin Peres), and an assert that we don't support
    the extension so we remember to remove this hack (requested by
    Neil Roberts).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-10 14:24:49 -07:00
Brian Paul
7217faf39f llvmpipe: simplify lp_resource_copy()
Just implement it in terms of util_resource_copy_region().  Both the
original code and util_resource_copy_region() boil down to mapping,
calling util_copy_box() and unmapping.

No piglit regressions.  This will also help to implement GL_ARB_copy_image.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-10 08:20:58 -06:00
Tapani Pälli
5b0d6f5c1b mesa: add GL_RED, GL_RG support for floating point textures
Mesa supports EXT_texture_rg and OES_texture_float. This patch adds
support for using unsized enums GL_RED and GL_RG for floating point
targets and writes proper checks for internalformat when format is
GL_RED or GL_RG and type is of GL_FLOAT or GL_HALF_FLOAT.

Later, internalformat will get adjusted by adjust_for_oes_float_texture
after these checks.

v2: simplify to check vs supported enums
v3: follow the style and break out if internalFormat ok (Kenneth)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90748
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-10 13:00:30 +03:00
Tapani Pälli
07e4f12e66 mesa: allow unsized formats GL_RG, GL_RED for GLES 3.0 with half float
v2: && -> ||, we enable on gles3 or if ARB_texture_rg is enabled

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90748
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-10 12:59:50 +03:00
Timothy Arceri
adee54f826 glsl: remove restriction on unsized arrays in GLSL ES 3.10
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-06-10 18:54:43 +10:00
Dave Airlie
563706c146 st/dri: check pscreen is valid before querying param
we don't check the validity of pscreen until dri_init_screen_helper

hit this trying to init glamor on a device with no driver (udl).

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-10 14:10:33 +10:00
Dave Airlie
c6877c9e59 nouveau: set imported buffers to what the kernel gives us
When we import a dma-buf fd from another driver the kernel
gives us the right info, and this trashes it.

Convert the kernel bo flags into the domain flags.

This helps getting reverse prime and glamor working.

Cc: mesa-stable@lists.freedesktop.org
Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-10 14:10:01 +10:00
Eric Anholt
9dca3beb62 vc4: Drop qir include from vc4_screen.h
We didn't need any of it except for the list header, and qir.h pulls in
nir.h, which is not really interesting to winsys.
2015-06-09 12:25:50 -07:00
Eric Anholt
8d10b2a046 vc4: Drop subdirectory in vc4 build.
Just because we put the source in a subdir, doesn't mean we need helper
libraries in the build.  This will also simplify the Android build setup.
2015-06-09 12:25:50 -07:00
Eric Anholt
e67b12eaf8 vc4: Update to current kernel validation code.
After profiling on real hardware, I found a few ways to cut down the
kernel overhead.
2015-06-09 12:25:50 -07:00
Chih-Wei Huang
c5e11e5f7f android: build with libcxx on android lollipop
On Lollipop, apparently stlport is gone and libcxx must be used instead.
We still support stlport when building on earlier android releases.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 12:25:50 -07:00
Chih-Wei Huang
1842832660 android: enable the radeonsi driver
Based on the nice work of Paulo Sergio Travaglia <pstglia@gmail.com>.

The main modifications are:

- Include paths for LLVM header files and shared/static libraries
- Set C++ flag "c++11" to avoid compiling errors on LLVM header files
- Set defines for LLVM
- Add GALLIVM source files
- Changes path of libelf library for lollipop

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Anholt <eric@anholt.net>
2015-06-09 12:25:50 -07:00
Chih-Wei Huang
1e4081f54a android: generate files by $(call es-gen)
Use the pre-defined macro es-gen to generate new added files
instead of writing new rules manually. The handmade rules
that may generate the files before the directory is created
result in such an error:

/bin/bash: out/target/product/x86/gen/STATIC_LIBRARIES/libmesa_st_mesa_intermediates/main/format_pack.c: No such file or directory
make: *** [out/target/product/x86/gen/STATIC_LIBRARIES/libmesa_st_mesa_intermediates/main/format_pack.c] Error 1

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 12:25:49 -07:00
Chih-Wei Huang
c3b5afbd4e android: try to load gallium_dri.so directly
This avoids needing hardlinks between all of the DRI driver .so names,
since we're the only loader on the system.

v2: Add early exit on success (like previous block) and log message on
    failure.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 12:25:15 -07:00
Chih-Wei Huang
ac296aee58 android: Depend on gallium_dri from EGL, instead of linking in gallium.
The Android gallium build used to use gallium_egl, which was removed back
in March.  Instead, we will now use a normal Mesa libEGL loader with
dlopen()ing of a DRI module.

v2: add a clean step to rebuild all dri modules properly.
v3: Squish the 2 patches doing this together (change by anholt).

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 11:38:45 -07:00
Chih-Wei Huang
933df3d335 android: add rules to build a gallium_dri.so
This single .so includes all of the enabled gallium drivers.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 11:38:45 -07:00
Chih-Wei Huang
f4f609b27e android: add rules to build gallium/state_trackers/dri
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 11:38:45 -07:00
Chih-Wei Huang
581aa208fa android: export more dirs from libmesa_dri_common
The include paths of libmesa_dri_common are also used by modules
that need libmesa_dri_common.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 11:38:44 -07:00
Chih-Wei Huang
b8213bbe4c android: loader: export the path to be included
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-06-09 11:38:44 -07:00
Ben Widawsky
30ba4faf5d i965/gen9: Use raw PS invocation count for queries
Previously the number needed to be divided by 4 to get the proper results. Now
the hardware does the right thing. Through experimentation it seems Braswell
(CHV) does also need the division by 4.

Fixes piglit test:
arb_pipeline_statistics_query-frag

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-06-09 11:17:37 -07:00
Brian Paul
c10dc485f3 glsl: fix comment typo: s/accpet/accept/ 2015-06-09 10:49:35 -06:00
Brian Paul
37e0677870 mesa: remove some MAX_NV_FRAGMENT_PROGRAM_* macros
GL_NV_fragment_program support was removed a while ago.  This is just
some clean-up.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 10:49:35 -06:00
Jason Ekstrand
670862a506 fs/reg_allocate: Remove the MRF hack helpers from fs_visitor
These are helpers that only exist in this one file.  No reason to put them
in the visitor.

Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-06-09 09:22:56 -07:00
Jason Ekstrand
86e5afbfee i965/fs: Don't let the EOT send message interfere with the MRF hack
Previously, we just put the message for the EOT send as high in the file as
it would go.  This is because the register pre-filling hardware will stop
all over the early registers in the file in preparation for the next thread
while you're still sending the last message.  However, if something happens
to spill, then the MRF hack interferes with the EOT send message and, if
things aren't scheduled nicely, will stomp on it.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90520
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-06-09 09:22:56 -07:00
Jose Fonseca
65bd4159b3 rtasm: Generalize executable memory allocator to all Unices.
We're only using fairly portable standard Unix calls here, so might as
well save ourselves future trouble by enabling on all Unices by default.

https://bugs.freedesktop.org/show_bug.cgi?id=90904

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-09 16:18:16 +01:00
Francisco Jerez
698c391521 i965/fs: Drop fs_inst::force_uncompressed.
This is now unused.  Saves a whole bit of memory per instruction.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:35 +03:00
Francisco Jerez
44928b799a i965/fs: Remove dead IR construction code from the visitor.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:35 +03:00
Francisco Jerez
51948085a2 i965/fs: Migrate test_fs_cmod_propagation to the IR builder.
v2: Use set_predicate/condmod.  Use fs_builder::OPCODE instead of
    ::emit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
76c8142d0a i965/fs: Migrate test_fs_saturate_propagation to the IR builder.
v2: Use set_saturate.  Use fs_builder::OPCODE instead of ::emit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
bf83a1a219 i965/fs: Migrate translation of NIR texturing instructions to the IR builder.
v2: Don't remove assignments of base_ir just yet.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
979fe2ffee i965/fs: Migrate translation of NIR intrinsics to the IR builder.
v2: Use fs_builder::SEL instead of ::emit.  Use set_condmod().

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
fe88c7ae38 i965/fs: Migrate translation of NIR ALU instructions to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
3632c28bde i965/fs: Migrate translation of NIR control flow to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
9976731485 i965/fs: Migrate NIR variable handling to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
09733f220a i965/fs: Migrate NIR emit_percomp() to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
d5cb2e5137 i965/fs: Migrate CS terminate message to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:34 +03:00
Francisco Jerez
e522f12f03 i965/fs: Migrate VS output writes to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
e32c16c47f i965/fs: Migrate FS framebuffer writes to the IR builder.
The explicit call to fs_builder::group() in emit_single_fb_write() is
required by the builder (otherwise the assertion in fs_builder::emit()
would fail) because the subsequent LOAD_PAYLOAD and FB_WRITE
instructions are in some cases emitted with a non-native execution
width.  The previous code would always use the channel enables for the
first quarter, which is dubious but probably worked in practice
because FB writes are never emitted inside non-uniform control flow
and we don't pass the kill-pixel mask via predication in the cases
where we have to fall-back to SIMD8 writes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
840cbef416 i965/fs: Migrate FS alpha test to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
ad68853f17 i965/fs: Migrate FS discard handling to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
46f264638a i965/fs: Migrate FS gl_SamplePosition/ID computation code to the IR builder.
v2: Use fs_builder::AND/SHR/MOV instead of ::emit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
31477226ec i965/fs: Migrate FS interpolation code to the IR builder.
v2: Fix some preexisting trivial codestyle issues.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
d3c10ad427 i965/fs: Migrate shader time to the IR builder.
v2: Change null register destination type to UD so it can be compacted.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
35e64f2a76 i965/fs: Migrate untyped surface read and atomic to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
db83d9d2d0 i965/fs: Migrate texturing implementation to the IR builder.
v2: Remove tabs from modified lines.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:33 +03:00
Francisco Jerez
546839ef63 i965/fs: Migrate pull constant loads to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
8f626c1498 i965/fs: Migrate Gen4 send dependency workarounds to the IR builder.
v2: Change brw_null_reg() to bld.null_reg_f().

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
4af4cfba9e i965/fs: Migrate lower_integer_multiplication to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
efa60e49f2 i965/fs: Migrate lower_load_payload to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
8f8c6b7bda i965/fs: Migrate register spills and fills to the IR builder.
Yes, it's incorrect to use the 0-th channel enable group
unconditionally without considering the execution and regioning
controls of the instruction that uses the spilled value, but it
matches the previous behaviour exactly, the builder just makes the
preexisting problem more obvious because emitting an instruction of
non-native SIMD width without having called .group() or .exec_all()
explicitly would have led to an assertion failure.

I'll fix the problem in a follow-up series, as the solution is going
to be non-trivial.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
3e6ac0bced i965/fs: Migrate try_replace_with_sel to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
6114ba4dcc i965/fs: Migrate opt_sampler_eot to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
a800ec04ad i965/fs: Migrate opt_peephole_sel to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
78f7c9edeb i965/fs: Create and emit instructions in one step in opt_peephole_sel.
This simplifies opt_peephole_sel() slightly by emitting the SEL
instructions immediately after they are created, what makes the
sel_inst and mov_imm_inst arrays unnecessary and will make it possible
to get rid of the explicit inserts when the pass is migrated to the IR
builder.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
74c2458ecf i965/fs: Migrate opt_cse to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:32 +03:00
Francisco Jerez
e7069fbc70 i965/fs: Don't drop force_writemask_all and _sechalf when copying a CSE temporary.
LOAD_PAYLOAD instructions need the same treatment as any other
generator instructions, at least FB writes and typed surface messages
will need a payload built with non-zero execution controls.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:31 +03:00
Francisco Jerez
497d238ae7 i965/vec4: Take into account all instruction fields in CSE instructions_match().
Most of these fields affect the behaviour of the instruction, but
apparently we currently don't CSE the kind of instructions for which
these fields could make a difference in the VEC4 back-end.  That's
likely to change soon though when we start using send-from-GRF for
texture sampling and surface access messages.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:31 +03:00
Francisco Jerez
8013b8147a i965/fs: Take into account all instruction fields in CSE instructions_match().
Most of these fields affect the behaviour of the instruction so it
could actually break the program if we CSE a pair of otherwise
matching instructions with different values of these fields.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:31 +03:00
Francisco Jerez
d86c2e6e53 i965/fs: Migrate opt_peephole_predicated_break to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:31 +03:00
Francisco Jerez
35e5f118a5 i965/fs: Migrate opt_combine_constants to the IR builder.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:31 +03:00
Francisco Jerez
e04b4156a7 i965/fs: Allocate a common IR builder object in fs_visitor.
v2: Call fs_builder::at_end() to point the builder at the end of the
    program explicitly.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:18:31 +03:00
Francisco Jerez
8ea8f83c8f i965/fs: Introduce FS IR builder.
The purpose of this change is threefold: First, it improves the
modularity of the compiler back-end by separating the functionality
required to construct an i965 IR program from the rest of the visitor
god-object, what in turn will reduce the coupling between other
components and the visitor allowing a more modular design.  This patch
doesn't yet remove the equivalent functionality from the visitor
classes, as it involves major back-end surgery.

Second, it improves consistency between the scalar and vector
back-ends.  The FS and VEC4 builders can both be used to generate
scalar code with a compatible interface or they can be used to
generate natural vector width code -- 1 or 4 components respectively.

Third, the approach to IR construction is somewhat different to what
the visitor classes currently do.  All parameters affecting code
generation (execution size, half control, point in the program where
new instructions are inserted, etc.) are encapsulated in a stand-alone
object rather than being quasi-global state (yes, anything defined in
one of the visitor classes is effectively global due to the tight
coupling with virtually everything else in the compiler back-end).
This object is lightweight and can be copied, mutated and passed
around, making helper IR-building functions more flexible because they
can now simply take a builder object as argument and will inherit its
IR generation properties in exactly the same way that a discrete
instruction would from the same builder object.

The emit_typed_write() function from my image-load-store branch is an
example that illustrates the usefulness of the latter point: Due to
hardware limitations the function may have to split the untyped
surface message in 8-wide chunks.  That means that the several
functions called to help with the construction of the message payload
are themselves required to set the execution width and half control
correctly on the instructions they emit, and to allocate all registers
with half the default width.  With the previous approach this would
require the used helper functions to be aware of the parameters that
might differ from the default state and explicitly set the instruction
bits accordingly.  With the new approach they would get a modified
builder object as argument that would influence all instructions
emitted by the helper function as if it were the default state.

Another example is the fs_visitor::VARYING_PULL_CONSTANT_LOAD()
method.  It doesn't actually emit any instructions, they are simply
created and inserted into an exec_list which is returned for the
caller to emit at some location of the program.  This sort of two-step
emission becomes unnecessary with the builder interface because the
insertion point is one more of the code generation parameters which
are part of the builder object.  The caller can simply pass
VARYING_PULL_CONSTANT_LOAD() a modified builder object pointing at the
location of the program where the effect of the constant load is
desired.  This two-step emission (which pervades the compiler back-end
and is in most cases redundant) goes away: E.g. ADD() now actually
adds two registers rather than just creating an ADD instruction in
memory, emit(ADD()) is no longer necessary.

v2: Drop scalarizing VEC4 builder.
v3: Take a backend_shader as constructor argument.  Improve handling
    of debug annotations and execution control flags.
v4: Drop Gen6 IF with inline comparison.  Rename "instr" variable.
    Initialize cursor to NULL by default and add method to explicitly
    point the builder at the end of the program.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-09 15:07:18 +03:00
Francisco Jerez
6e04065729 i965: Define consistent interface to enable instruction result saturation.
v2: Use set_ prefix.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-09 13:56:06 +03:00
Francisco Jerez
7624f8410f i965: Define consistent interface to enable instruction conditional modifiers.
v2: Use set_ prefix.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-09 13:56:06 +03:00
Francisco Jerez
239dfc5410 i965: Define consistent interface to predicate an instruction.
v2: Use set_ prefix.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-09 13:56:06 +03:00
Francisco Jerez
f9367191b3 mesa: Drop include of simple_list.h from mtypes.h.
simple_list.h defines a number of macros with short non-namespaced
names that can easily collide with other declarations (first_elem,
last_elem, next_elem, prev_elem, at_end), and according to the comment
it was only being included because of struct simple_node, which is no
longer used in this file.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-09 13:56:06 +03:00
Francisco Jerez
277b94f172 dri/nouveau: Include simple_list.h explicitly in nv*_state_tnl.c.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-09 13:56:06 +03:00
Francisco Jerez
7065c8153b tnl: Include simple_list.h explicitly in t_context.c.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-09 13:56:06 +03:00
Francisco Jerez
08a1046f67 mesa: Include simple_list.h explicitly in errors.c.
This seems to be the only user of simple_list in core mesa not
including the header explicitly.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-09 13:56:05 +03:00
Dave Airlie
f7aad9da20 mesa/teximage: use correct extension for accept stencil texture.
This was using the wrong extension, ARB_stencil_texturing
doesn't mention any changes in this area.

Fixes "dEQP-GLES3.functional.fbo.completeness.renderable.texture.
stencil.stencil_index8."

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90751
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-08 15:47:09 -07:00
Anuj Phogat
556b2fbd24 i965: Make a helper function intel_miptree_set_total_width_height()
and some more code refactoring. No functional changes in this patch.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-08 13:57:11 -07:00
Anuj Phogat
9111377978 i965/gen9: Set vertical alignment for the miptree
v3: Use ffs() and a switch loop in
    tr_mode_horizontal_texture_alignment() (Ben)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-08 13:57:11 -07:00
Anuj Phogat
447410b664 i965/gen9: Set horizontal alignment for the miptree
v3: Use ffs() and a switch loop in
    tr_mode_vertical_texture_alignment() (Ben)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-08 13:57:11 -07:00
Anuj Phogat
126078faca i965/gen9: Set tiled resource mode for the miptree
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-08 13:57:11 -07:00
Anuj Phogat
ef6b9985ea i965: Pass miptree pointer as function parameter in intel_vertical_texture_alignment_unit
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-08 13:57:11 -07:00
Anuj Phogat
9edac38f2a i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c
and change the name to brw_miptree_choose_tiling().

V3: Remove redundant function parameters. (Topi)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-08 13:57:11 -07:00
Anuj Phogat
2cbe730ac5 i965: Choose tiling in brw_miptree_layout() function
This refactoring is required by later patches in this series.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-06-08 13:57:11 -07:00
Ben Widawsky
4f2f5c8d81 i965: Disallow saturation for MACH operations.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-08 12:43:28 -07:00
Chris Wilson
922c0c9fd5 i965: Export format comparison for blitting between miptrees
Since the introduction of

commit 536003c11e
Author: Boyan Ding <boyan.j.ding@gmail.com>
Date:   Wed Mar 25 19:36:54 2015 +0800

    i965: Add XRGB8888 format to intel_screen_make_configs

winsys buffers no longer have an alpha channel. This causes
_mesa_format_matches_format_and_type() to reject previously working BGRA
uploads from using the BLT fast path. Instead of using the generic
routine for matching formats exactly, export the slightly more relaxed
check from intel_miptree_blit() which importantly allows the blitter
routine to apply a small number of format conversions.

References: https://bugs.freedesktop.org/show_bug.cgi?id=90839
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Alexander Monakov <amonakov@gmail.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-06-08 17:56:14 +01:00
Chris Wilson
c2d0606827 i915: Blit RGBX<->RGBA drawpixels
The blitter already has code to accommodate filling in the alpha channel
for BGRX destination formats, so expand this to also allow filling the
alpha channgel in RGBX formats.

More importantly for the next patch is moving the test into its own
function for the purpose of exporting the check to the callers.

v2: Fix alpha expansion as spotted by Alexander with the fix suggested by
Kenneth

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Alexander Monakov <amonakov@gmail.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-06-08 17:56:10 +01:00
Chris Wilson
8da79b8378 i965: Fix HW blitter pitch limits
The BLT pitch is specified in bytes for linear surfaces and in dwords
for tiled surfaces. In both cases the programmable limit is 32,767, so
adjust the check to compensate for the effect of tiling.

v2: Tweak whitespace for functions (Kenneth)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-06-08 17:55:56 +01:00
Martin Peres
8614b9e489 softpipe/query: force parenthesis around a logical not
This makes GCC5 happy.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-08 12:38:08 +03:00
Martin Peres
184e4de3a1 main/version: make sure all the output variables get set in get_gl_override
This fixes 2 warnings in gcc 5.1.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-08 12:37:42 +03:00
Michel Dänzer
56e38edc96 radeonsi: Add CIK SDMA support
Based on the corresponding SI support. Same as that, this is currently
only enabled for one-dimensional buffer copies due to issues with
multi-dimensional SDMA copies.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 18:13:22 +09:00
Michel Dänzer
79f2acb8f8 r600g,radeonsi: Assert that there's enough space after flushing
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 18:10:35 +09:00
Emil Velikov
9538902c4f docs: add news item and link release notes for mesa 10.5.7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-07 13:44:37 +01:00
Emil Velikov
f7db7fe6ea docs: Add sha256sums for the 10.5.7 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit eb3a704bb0)
2015-06-07 13:42:48 +01:00
Emil Velikov
56efe81ab1 Add release notes for the 10.5.7 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 495bcbc48c)
2015-06-07 13:42:46 +01:00
Kenneth Graunke
7b8f20ec55 prog_to_nir: Fix fragment depth writes.
In the ARB_fragment_program specification, the result.depth output
variable is treated as a vec4, where the fragment depth is stored in the
.z component, and the other three components are undefined.

This is different than GLSL, which uses a scalar value (gl_FragDepth).

To make this consistent for driver backends, this patch makes
prog_to_nir use a scalar output variable for FRAG_RESULT_DEPTH,
moving result.depth.z into the first component.

Fixes Glean's fragProg1 "Z-write test" subtest.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90000
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-06 13:26:10 -07:00
Chris Forbes
52e5ad7bf8 i965: Set max texture buffer size to hardware limit
Previously we were leaving this at the default of 64K, which meets the
spec but is too small for some real uses. The hardware can handle up to
128M.

User was complaining about this on freenode ##OpenGL today.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-06 18:40:33 +12:00
Ben Widawsky
b639ed2f1b i965: Add gen8 fast clear perf debug
In an ideal world I would just implement this instead of adding the perf debug.
There are some errata involved which lead me to believe it won't be so simple as
flipping a few bits.

There is room to add a thing for Gen9s flexibility, but since I am actively
working on that I have opted to ignore it.

Example:
Multi-LOD fast clear - giving up (256x128x8).

v2: Use braces for if statements because they are multiple lines (Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-05 14:25:47 -07:00
Ben Widawsky
77a44512d9 i965: Add buffer sizes to perf debug of fast clears
When we cannot do the optimized fast clear it's important to know the buffer
size since a small buffer will have much less performance impact.

A follow-on patch could restrict printing the message to only certain sizes.

Example:
Failed to fast clear 1400x1056 depth because of scissors.  Possible 5% performance win if avoided.

Recommended-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-05 14:25:47 -07:00
Marek Olšák
6acb61fc9c clover: clarify and fix the EGL interop error case
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
2015-06-05 19:44:33 +02:00
Marek Olšák
a1cb407b04 egl: expose EGL 1.5 if all requirements are met
There's no driver support yet, because EGL_KHR_gl_colorspace isn't
implemented.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
51c8c66e1d egl: return correct invalid-type error from eglCreateSync
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
820a4d402a egl: add new platform functions (v2)
These are just wrappers around the existing extension functions.

v2: return BAD_ALLOC if _eglConvertAttribsToInt fails

Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
515f04ed6f egl: add eglCreateImage (v2)
v2: - use calloc
    - return BAD_ALLOC if calloc fails

Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
1e79e054e7 egl: add eglGetSyncAttrib (v2)
v2: - don't modify "value" in eglGetSyncAttribKHR after an error
    - rename _egl_api::GetSyncAttribKHR -> GetSyncAttrib
    - rename GetSyncAttribKHR_t -> GetSyncAttrib_t
    - rename _eglGetSyncAttribKHR to _eglGetSyncAttrib

Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
7524592da6 egl: add eglWaitSync
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
2885ba0e4c egl: add EGL 1.5 functions that don't need any changes from extensions
Declare the functions without the suffix, so that the core names are exported.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
d333d30632 egl: use EGL 1.5 types without suffixes
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
706466f461 egl: add context attribs from EGL 1.5
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
f9f894447e egl: fix setting context flags
Cc: 10.6 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
0e4b564ef2 egl: combine VersionMajor and VersionMinor into one variable
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
efda9c5649 egl: set the EGL version in common code
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
3a83adeb7c egl: remove unused _egl_global::ClientExtensions
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
20249d3559 egl: import platform headers from registry (v2)
v2: don't remove local Mesa changes

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:33 +02:00
Marek Olšák
6b31f22338 egl: import eglext.h from registry and cleanup eglmesaext.h (v2)
v2: include mesa and chromium extensions in eglext.h so as not to break
    existing users
v3: keep PFNEGLSWAPBUFFERSREGIONNOK because piglit uses it

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
49ae822183 egl: import egl.h from registry (v2)
v2: split the commit into 3 patches

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
f52e8572ae mesa: remove unused gl_config::colorIndexMode
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
4312b4f570 mesa: use GL_GEOMETRY_PROGRAM_NV instead of MESA_GEOMETRY_PROGRAM
There's no reason to use our own definition.
Tessellation will use the NV definitions too.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
3b2721ce11 mesa: use _mesa_has_geometry_shader in get_programiv
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
b7ef7903b8 mesa: remove useless gl_compute_program_state::Current
This is for user assembly shaders only (not GLSL). We won't support those.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
e8b040477e mesa: remove unused geometry shader variables
These states are for GS assembly shaders only. We don't support those.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-05 19:44:32 +02:00
Marek Olšák
3d16b5af1d tgsi/ureg: fix a coverity defect in emit_decls
Reported by Ilia Mirkin.
2015-06-05 19:44:32 +02:00
Marek Olšák
6aff87bb01 r600g: fix a coverity defect in streamout code
Reported by Ilia Mirkin.
2015-06-05 19:44:32 +02:00
Marek Olšák
6bf3729a3f glsl_to_tgsi: use TGSI array declarations for VS,GS arrays of outputs (v2)
v2: don't use PIPE_MAX_SHADER_ARRAYS
2015-06-05 19:44:32 +02:00
Marek Olšák
9b1921100e glsl_to_tgsi: use TGSI array declarations for GS,FS arrays of inputs (v2)
v2: don't use PIPE_MAX_SHADER_ARRAYS
2015-06-05 19:44:32 +02:00
Marek Olšák
26c8a49bc4 glsl_to_tgsi: remove some emit functions by using C++ default values 2015-06-05 19:44:32 +02:00
Marek Olšák
85cd1cf4b8 glsl_to_tgsi: rename emit -> emit_asm
My editor thinks "emit" is a keyword, which breaks code indexing.
2015-06-05 19:44:32 +02:00
Marek Olšák
30b74c02cd glsl_to_tgsi: remove memset after calloc 2015-06-05 19:44:32 +02:00
Marek Olšák
6ae3bc2569 glsl_to_tgsi: don't use a static array size for st_translate::arrays 2015-06-05 19:44:32 +02:00
Marek Olšák
57c98e22db glsl_to_tgsi: don't use a static array size for "array_sizes" 2015-06-05 19:44:32 +02:00
Marek Olšák
b6ebe7eabf tgsi/ureg: don't emit in/out arrays if drivers don't support ranged declarations
Softpipe, llvmpipe, r300g, and radeonsi pass tests. Other drivers need testing.

Freedreno and nv30 are definitely broken. Other drivers seem to be alright.
2015-06-05 19:44:32 +02:00
Marek Olšák
a015b3952f tgsi/ureg: add support for output array declarations 2015-06-05 19:44:32 +02:00
Marek Olšák
1fa6c99e24 tgsi/ureg: add support for GS input array declarations 2015-06-05 19:44:32 +02:00
Marek Olšák
d3fbc65986 tgsi/ureg: merge input and fs_input arrays 2015-06-05 19:44:32 +02:00
Marek Olšák
3b1d157751 tgsi/ureg: rename and simplify ureg_DECL_gs_input
There is nothing special about it and it's used for tessellation shaders
too.
2015-06-05 19:44:32 +02:00
Marek Olšák
918ca4031f tgsi/ureg: add support for FS input array declarations 2015-06-05 19:44:32 +02:00
Marek Olšák
cf2c9265a3 tgsi/scan: get more information about arrays and handle arrays correctly (v2)
v2: use less memory for the information
2015-06-05 19:44:32 +02:00
Tapani
78395dbf9f mesa: fix program resource queries for builtin variables
Patch fixes special cases with gl_VertexID and sets all builtin
variables locations as '-1' as specified by the extension spec.

Fixes ES 3.1 conformance test failure:
	ES31-CTS.program_interface_query.input-built-in

v2: comments + use is_gl_identifier() (Martin)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-05 08:39:59 +03:00
Alan Coopersmith
cb277cde6f glsl_compiler: Remove unused extra argument to printf in usage_fail
Flagged by Oracle's parfait static analyzer:

Error: Format string argument mismatch (CWE 628)
   In call to printf with format string "usage: %s [options] <file.vert | file.geom | file.frag>\n\nPossible options are:\n"
      Too many arguments for format string (got more than 1 arguments)
        at line 285 of src/glsl/main.cpp in function 'usage_fail'.

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-04 19:01:16 -07:00
Roland Scheidegger
00d8733120 docs: add note about llvmpipe supporting GL_ARB_shader_stencil_export 2015-06-05 02:25:03 +02:00
Roland Scheidegger
6e5970ffee draw: (trivial) fix NULL pointer dereference
This probably got broken when the samplers were converted to be indexed
by shader type.
Seen when looking at bug 89819 though I'm not sure if that really was what
the bug was about...

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-05 02:20:35 +02:00
Kenneth Graunke
c820407ef0 i965/fs: Print mlen in dump_instructions() output.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-06-04 15:34:01 -07:00
Kenneth Graunke
15a12795c6 prog_to_nir: Make RSQ properly take the absolute value of its argument.
I just botched this when writing the original code.

From the ARB_vertex_program specification:
"The RSQ instruction approximates the reciprocal of the square root of
 the absolute value of the scalar operand and replicates it to all four
 components of the result vector."

Fixes a Glean vertProg1 subtest:
RSQ test 2 (reciprocal square root of negative value)

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90547
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-04 15:32:46 -07:00
Martin Peres
71e9457877 main: fix a regression in uniform handling introduced by 87a4bc5
The comment was accurate but the condition was reversed...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-04 15:42:06 +03:00
Martin Peres
87a4bc5118 mesa: reference built-in uniforms into gl_uniform_storage
This change introduces a new field in gl_uniform_storage to
explicitely say that a uniform is built-in. In the case where it is,
no storage is defined to make it clear that it is read-only from the
mesa side. I fixed all the places in the code that made use of the
structure that I changed. Any place making a wrong assumption and using
the storage straight away will just crash.

This patch seems to implement the path of least resistance towards
listing built-in uniforms in GL_ACTIVE_UNIFORM (and other APIs).

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-06-04 09:25:00 +03:00
Roland Scheidegger
4fd42a7c27 llvmpipe: Implement stencil export
Pretty trivial, fixes the issue that we're expected to be able to blit
stencil surfaces (as the blit just relies on util blitter code which needs
stencil export to do it).
2 piglits skip->pass, 11 fail->pass

v2: prettify, keep different stencil ref value handling out of depth/stencil
test itself.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-06-04 03:56:19 +02:00
Matt Turner
d46d04529b i965: Use UW-typed immediate in multiply inst.
Some hardware reads only the low 16-bits even if the type is UD, but
other hardware like Cherryview can't handle this.

Fixes spec@arb_gpu_shader5@execution@sampler_array_indexing@fs-simple on
Cherryview.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90830
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-06-03 10:47:41 -07:00
Matt Turner
54a70a8ef2 program: Replace gl_inst_opcode with enum prog_opcode.
Both were introduced at the same time. I'm not sure why we needed two.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-03 10:40:59 -07:00
Matt Turner
fb011d3157 program: Remove dead Aux field from prog_instruction.
Appears to have been last used by the i965 driver (removed by commit
098acf6c).

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-03 10:40:59 -07:00
Matt Turner
ef3f89e53e program: Shrink and rename SaturateMode field to Saturate.
It was 2 bits to accommodate SATURATE_PLUS_MINUS_ONE (removed by commit
09b566e1). A similar change was made to TGSI recently in commit
e1c4e8aa.

Reducing the size from 2 bits to 1 reduces the size of the bit fields
from 17 bits to 16, which is a much nicer number.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-03 10:40:59 -07:00
Brian Paul
56b2b3d385 mesa: move no-change glDepthFunc check earlier
If the incoming func matches the current state it must be a legal
value so we can do this before the switch statement.

Signed-off-by: Brian Paul <brianp@vmware.com>
2015-06-03 11:35:46 -06:00
Brian Paul
4dd72fe70d mesa: restore GL_EXT_depth_bounds_test state in glPopAttrib()
Spotted by inspection.  Untested (no piglit test).

Signed-off-by: Brian Paul <brianp@vmware.com>
2015-06-03 11:35:46 -06:00
Brian Paul
6139195606 mesa: fix glPushAttrib(0) / glPopAttrib() error
If the glPushAttrib() mask value was zero we didn't actually push
anything onto the attribute stack.  A subsequent glPopAttrib() call
would generate a GL_STACK_UNDERFLOW error.  Now push a dummy attribute
in that case to prevent the error.

Mesa now matches nvidia's behavior.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-03 11:35:46 -06:00
Timothy Arceri
86a74e9b6b nir: use src for ssa helper
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-06-03 06:50:39 +10:00
Timothy Arceri
5f7b8fa481 nir: remove extra semicolon
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-06-03 06:50:33 +10:00
Matt Turner
5da809d70f prog_to_nir: Remove OPCODE_MOV special case.
OPCODE_MOV is in the op_trans[] array.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-02 12:22:42 -07:00
Matt Turner
576f7241b6 prog_to_nir: Remove from op_trans[] opcodes handled in the switch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-06-02 12:22:42 -07:00
Eduardo Lima Mitev
5b226a1242 nir: prevent use-after-free condition in should_lower_phi()
lower_phis_to_scalar() pass recurses the instruction dependence graph to
determine if all the sources of a given instruction are scalarizable.
To prevent cycles, it temporary marks the phi instruction before recursing in,
then updates the entry with the resulting value. However, it does not consider
that the entry value may have changed after a recursion pass, hence causing
a use-after-free situation and a crash.

This patch fixes this by reloading the entry corresponding to the 'phi'
after recursing and before updating its value.

The crash can be reproduced ~20% of times with the dEQP test:

dEQP-GLES3.functional.shaders.loops.while_constant_iterations.nested_sequence_fragment

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-06-02 20:21:49 +02:00
Kenneth Graunke
762395736b i965: Add Gen8+ VS dispatch_mode assertion.
Suggested by Ben Widawsky.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-01 22:08:54 -07:00
Kenneth Graunke
a2655e0dd4 i965: Drop LOAD_PAYLOAD workaround in fs_visitor::emit_urb_writes().
Now that Jason's LOAD_PAYLOAD improvements have landed, we don't need
this.  Passing 1 for the number of header registers already takes care
of setting force_writemask_all on the header copy.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-06-01 12:45:41 -07:00
Kenneth Graunke
386bf336c4 i965: Use proper pitch for scalar GS pull constants and UBOs.
See the corresponding code in brw_vs_surface_state.c.

v2: const more things (requested by Topi Pohjolainen)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-01 12:45:40 -07:00
Kenneth Graunke
0f8ec779dd i965: Create a shader_dispatch_mode enum to replace VS/GS fields.
We used to store the GS dispatch mode in brw_gs_prog_data while
separately storing the VS dispatch mode in brw_vue_prog_data::simd8.

This patch introduces an enum to represent all possible dispatch modes,
and stores it in brw_vue_prog_data::dispatch_mode, unifying the two.

Based on a suggestion by Matt Turner.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-01 12:45:40 -07:00
Kenneth Graunke
9945573d65 i965: Drop "Vector Mask Enable" bit from 3DSTATE_GS on Gen8+.
The documentation makes it pretty clear that we shouldn't use this:

   "Under normal conditions SW shall specify DMask, as the GS stage
    will provide a Dispatch Mask appropriate to SIMD4x2 or SIMD8 thread
    execution (as a function of dispatch mode).  E.g., for SIMD4x2
    execution, the GS stage will generate a Dispatch Mask that is equal
    to what the EU would use as the Vector Mask.  For SIMD8 execution
    there is no known usage model for use of Vector Mask (as there is
    for PS shaders)."

I also managed to find descriptions of DMask and VMask, in the "State
Register" (sr0.2/3) field descriptions:

   "Dispatch Mask (DMask).  This 32-bit field specifies which channels
    are active at Dispatch time."

   "Vector Mask (VMask).  This 32-bit field contains, for each 4-bit
    group, the OR of the corresponding 4-bit group in the dispatch
    mask."

SIMD4x2 shaders process one or two vec4 values, with each 4-bit group
corresponding to xyzw channel enables (either all on, or all off).
Thus, DMask = VMask in SIMD4x2 mode.  But in SIMD8 mode, 4-bit groups
are meaningless, so it just messes up your values.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-06-01 12:45:40 -07:00
Brian Paul
f97166e550 docs: update GL_ARB_copy_image, GL_ARB_clear_texture gallium status
VMware is working on these.

Signed-off-by: Brian Paul <brianp@vmware.com>
2015-06-01 07:47:25 -06:00
Brian Paul
51d08d55f4 gallium/util: silence silence unused var warnings for non-debug build
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-01 07:42:05 -06:00
Brian Paul
54070a9d1d egl/dri2: silence uninitialized variable warnings
And update assertions to be more informative.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-01 07:42:04 -06:00
Brian Paul
87813c504a gallivm: silence unused var warnings for non-debug build
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-01 07:42:03 -06:00
Brian Paul
71afc13eda pipebuffer: silence unused var warnings for non-debug build
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-01 07:42:02 -06:00
Brian Paul
8759185871 st/mesa: silence unused var warnings for non-debug build
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-01 07:42:02 -06:00
Brian Paul
ae5d6db924 draw: silence unused var warnings for non-debug build
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-01 07:42:01 -06:00
Jose Fonseca
512117ce0e gallivm: Remove stub disassemblerSymbolLookupCB.
It's incompletete -- it wasn't filling ReferenceType so it was causing
garbagge on the disassembly.  Furthermore it seems impossible to get the
jump information through this interface.

The solution for function size problem is to effectively book-keep the
machine code start and end address while JIT'ing.
2015-06-01 10:43:28 +01:00
Neil Roberts
7f62fdae16 i965: Don't add base_binding_table_index if it's zero
When calculating the binding table index for non-constant sampler
array indexing it needs to add the base binding table index which is a
constant within the generated code. Often this base is zero so we can
avoid a redundant instruction in that case.

It looks like nothing in shader-db is doing non-constant sampler array
indexing so this patch doesn't make any difference but it might be
worth having anyway.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
2015-05-31 00:48:57 +01:00
Neil Roberts
6c846dc57b i965: Don't use a temporary when generating an indirect sample
Previously when generating the send instruction for a sample
instruction with an indirect sampler it would use the destination
register as a temporary store. This breaks when used in combination
with the opt_sampler_eot optimisation because that forces the
destination to be null. This patch fixes that by avoiding the temp
register altogether.

The reason the temporary register was needed was because it was trying
to ensure the binding table index doesn't overflow a byte by and'ing
it with 0xff. The result is then or'd with samper_index<<8. This patch
instead just and's the whole thing by 0xfff. This will ensure that a
bogus sampler index won't overflow into the rest of the message
descriptor but unlike the previous code it won't ensure that the
binding table index doesn't overflow into the sampler index. It
doesn't seem like that should matter very much though because if the
shader is generating a bogus sampler index then it's going to just get
garbage out either way.

Instead of doing sampler_index<<8|(sampler_index+base_table_index) the
new code avoids one operation by doing
sampler_index*0x101+base_table_index which should be equivalent.
However if we wanted to avoid the multiply for some reason we could do
this by adding an extra or instruction still without needing the
temporary register.

This fixes a number of Piglit tests on Skylake that were using
indirect samplers such as:

 spec@arb_gpu_shader5@execution@sampler_array_indexing@fs-simple

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-05-31 00:48:57 +01:00
Eric Anholt
ec1c72d38e vc4: Don't bother with safe list traversal in CSE.
We don't remove or move instructions.
2015-05-29 22:09:53 -07:00
Eric Anholt
78c773bb36 vc4: Convert from simple_list.h to list.h
list.h is a nicer and more familiar set of list functions/macros.
2015-05-29 22:09:53 -07:00
Eric Anholt
21a22a61c0 vc4: Make sure we allocate idle BOs from the cache.
We were returning the most recently freed BO, without checking if it
was idle yet.  This meant that we generally stalled immediately on the
previous frame when generating a new one.  Instead, allocate new BOs
when the *oldest* BO is still busy, so that the cache scales with how
much is needed to keep some frames outstanding, as originally
intended.

Note that if you don't have some throttling happening, this means that
you can accidentally run the system out of memory.  The kernel is now
applying some throttling on all execs, to hopefully avoid this.
2015-05-29 18:15:00 -07:00
Eric Anholt
c821ccf0e3 vc4: Fix return value handling for BO waits.
If the wait ever returned -ETIME, we'd abort because the errno was
stored in errno and not drmIoctl()'s return value.
2015-05-29 18:15:00 -07:00
Timothy Arceri
fcc79af9e2 mesa: remove unused function declaration
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-30 07:24:02 +10:00
Brian Paul
82305f7b00 dri_util: make version var unsigned to silence warnings
_mesa_override_gl_version_contextless() takes an unsigned version
parameter.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-29 13:36:39 -06:00
Ben Widawsky
b307921c3f i965: Disable compaction for EOT send messages
AFAICT, there is no real way to make sure a send message with EOT is properly
ignored from compact, nor can I see a way to actually encode EOT while
compacting. Before the single send optimization we'd always bail because we hit
the is_immediate && !is_compactable_immediate case. However, with single send,
is_immediate is not true, and so we end up trying to compact the un-compactible.

Without this, any compacting single send instruction will hang because the EOT
isn't there. I am not sure how I didn't hit this when I originally enabled the
optimization.  I didn't check if some surrounding code changed.

I know Neil and Matt were both looking into this. I did a quick search and
didn't see any patches out there to handle this. Please ignore if this has
already been sent by someone. (Direct me to it and I will review it).

Reported-by: Neil Roberts <neil@linux.intel.com>
Reported-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-29 11:55:10 -07:00
Roland Scheidegger
c0d2b83f0b gallivm: make sampling more robust when the sampler setup is bogus
Pure integer formats cannot be sampled with linear tex / mip filters. In GL
such a setup would make the texture incomplete.
We shouldn't rely on the state tracker though to filter that out, just return
all zeros instead of dying in the lerp.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-05-29 19:33:19 +02:00
Jose Fonseca
0ad15e55bf configure.ac: Link mcdisassembler component.
gallivm now depends on it. And depending on particular LLVM version /
configure options, the build can fail without this change due to
undefined reference to `LLVM*Disasm*' symbols.

Trivial.
2015-05-29 12:17:16 +01:00
Jose Fonseca
9119cd7d2c configure.ac: Don't bother checking whether LLVM's MCJIT component is available.
Now that we require LLVM 3.3, MCJIT is guaranteed to be available.

Trvial.
2015-05-29 12:14:34 +01:00
Jose Fonseca
0db4ef9df1 gallivm: Use the LLVM's C disassembly interface.
It doesn't do everything we want.  In particular it doesn't allow to
detect jumps or return opcodes.  Currently we detect the x86's RET
opcode.

Even though it's worse for LLVM 3.3, it's an improvement for LLVM 3.7,
which was totally busted.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-05-29 11:20:58 +01:00
Jose Fonseca
29203e7738 gallivm: Disable frame pointer omission on LLVM 3.7.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-05-29 11:20:58 +01:00
Marek Olšák
dd048543e9 configure.ac: enable building GLES1 and GLES2 by default
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-29 11:52:44 +02:00
Marek Olšák
25e9ae2b79 st/dri: fix postprocessing crash when there's no depth buffer
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89131

Cc: 10.6 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-29 11:52:44 +02:00
Marek Olšák
7116250b7a radeon/llvm: reset temps_count on deallocation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-29 11:52:44 +02:00
Marek Olšák
7afc992c20 radeon/llvm: don't use a static array size for radeon_llvm_context::arrays (v2)
v2: - don't use realloc (tgsi_shader_info provides the size)

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-29 11:52:44 +02:00
Dave Airlie
065978d36b softpipe: fix offset wrapping calculations (v2)
Roland pointed out my previous attempt was lacking, so I enhanced the
texwrap piglit test, and tested them. This fixes the offset calculations
in a number of areas by adding the offset first, it also fixes the fastpaths,
which I forgot to address in the previous commit.

v2: try and avoid divides in most paths, the repeat mirror path
really was ugly no matter which way I went, so I left it having
the divide.
Also fix the gather lod calculation bug.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-29 13:15:47 +10:00
Jason Ekstrand
b95ec49e57 i965/vs: Rework the logic for generating NIR from ARB vertex programs
Whether or not to use NIR is now equivalent to brw->scalar_vs.  We can
simplify the logic and make it far less confusing.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 17:07:01 -07:00
Jason Ekstrand
78644ffc4d i965/fs: Remove the ir_visitor code
Now that everything is running through NIR, this is all dead.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 17:07:01 -07:00
Jason Ekstrand
66a03a4c4b i965: Remove the old fragment program code
Now that everything is running through NIR, this is all dead.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 17:07:00 -07:00
Jason Ekstrand
114497afff i965: Make NIR non-optional for scalar shaders
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 17:07:00 -07:00
Jason Ekstrand
8b9ecfff36 i965: Make fs/vec4_visitor inherit from ir_visitor directly
This is using multiple inheritance in C++.  However, ir_visitor is really
just an interface with no data so it shouldn't be so bad.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 17:07:00 -07:00
Jason Ekstrand
99cb423320 i965: Rename backend_visitor to backend_shader
The backend_shader class really is a representation of a shader.  The fact
that it inherits from ir_visitor is somewhat immaterial.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 17:07:00 -07:00
Ian Romanick
1ca60de4c0 mesa: Enable ARB_direct_state_access by default for core profile
And core profile only.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 17:02:54 -07:00
Ian Romanick
ef4dd0fc3e dispatch_sanity: Validate the compatibility profile dispatch table too
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 17:02:47 -07:00
Ian Romanick
49ab670f52 dispatch_sanity: Split list of GL 3.1 functions in to core and common
The next patch will add a test for compatibility profile dispatch, and
it seems to make more sense to share the lists.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
a6fa74e6bb mesa: Don't install glVertexAttribL* functions in compatibility profile
GL_ARB_vertex_attrib_64bit is exclusive to core profile, and none of the
other functions added by the extension are advertised in other profiles.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
4e5efa9e7d glapi: Make GL_ARB_direct_state_access functions exclusive to core profile
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Dylan Baker <baker.dylan.c@gmail.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
f20899b727 glapi: Store exec table version info outside the XML
Currently on the functions that are exclusive to core-profile are
implemented.  The remainder continue to live in the XML.  Additional
functions can be moved later.

The functions for GL_ARB_draw_indirect and GL_ARB_multi_draw_indirect
are put in the dispatch table inside the VBO module, so they do not need
to be moved over.

The diff of src/mesa/main/api_exec.c before and after this patch is as
expected.  All of the functions listed in apiexec.py moved out of a 'if
(_mesa_is_desktop(ctx))' block into a new 'if (ctx->API ==
API_OPENGL_CORE)' block.

v2: Remove stray shebang line in apiexec.py.  Suggested by Ilia.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Dylan Baker <baker.dylan.c@gmail.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
5c4aab58ee Revert "mesa: Add an extension flag for ARB_direct_state_access"
This reverts commit 30dcaaec35.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
832ea2345a mesa: Use the profile instead of an extension bit to validate GL_TEXTURE_CUBE_MAP
The extension on which this depends will always be enabled in core
profile, and the extension bit is about to be removed.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
90e98ea215 Revert "mesa: Add ARB_direct_state_access checks in XFB functions"
This reverts commit 7d212765a4.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
cab233f277 Revert "mesa: Add ARB_direct_state_access checks in buffer object functions"
This reverts commit 339ed0984d.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
8bcd14fab9 Revert "mesa: Add ARB_direct_state_access checks in FBO functions"
This reverts commit 6ad0b7e07a.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
f3e8596a37 Revert "mesa: Add ARB_direct_state_access checks in renderbuffer functions"
This reverts commit cb49940766.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
1ac6a8f1d1 Revert "mesa: Add ARB_direct_state_access checks in texture functions"
This reverts commit 8940957238.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
92e362191e Revert "mesa: Add ARB_direct_state_access checks in VAO functions"
This reverts commit 36b0579337.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
ae54577544 Revert "mesa: Add ARB_direct_state_access checks in sampler object functions"
This reverts commit 9e7149c898.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
a9dcf45cd8 Revert "mesa: Add ARB_direct_state_access checks in program pipeline functions"
This reverts commit bebf3c6ab3.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
a9f678a8f4 Revert "mesa: Add ARB_direct_state_access checks in query object functions"
This reverts commit d3368e0c9e.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
f1fcf79e3c Revert "i915: Enable ARB_direct_state_access"
This reverts commit 121030eed8.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
4bc00b1a4b Revert "i965: Enable ARB_direct_state_access"
This reverts commit a57feba0a3.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:32 -07:00
Ian Romanick
73cf10e623 Revert "st/mesa: Enable ARB_direct_state_access"
This reverts commit 357bf80caa.

Acked-by: Fredrik Höglund <fredrik@kde.org>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-28 16:56:31 -07:00
Ian Romanick
9b5e92f4cc mesa: Allow overriding the version of ES2+ contexts
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-28 16:56:31 -07:00
Ian Romanick
03fd6704db mesa: Add support for a new override string MESA_GLES_VERSION_OVERRIDE
The string is only applied when the context is API_OPENGLES2.

The bulk of the change is to prevent overriding the context to
API_OPENGL_CORE based on the requested version.  If the context is
API_OPENGL_ES2, don't change it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-28 16:56:31 -07:00
Ian Romanick
464c56d3d5 dri_util: Use _mesa_override_gl_version_contextless
Remove _mesa_get_gl_version_override.  We don't need two functions that
do basically the same thing.  This change seemed easier (esp. with the
next patch) than going the other way.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-28 16:56:31 -07:00
Ian Romanick
1fe243938b mesa/es3.1: Enable ES 3.1 API and shading language version
This is a bit of a hack for now.  Several of the extensions required for
OpenGL ES 3.1 have no support, at all, in Mesa.  However, with this
patch and a patch to allow MESA_GL_VERSION_OVERRIDE to work with ES
contexts, people can begin testing the ES "version" of the functionality
that is supported.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-28 16:56:31 -07:00
Ian Romanick
366ceacf72 gles/es3.1: Enable dispatch of almost all new GLES 3.1 functions
A couple functions are missing because there are no implementations of
them yet.  These are:

      glFramebufferParameteri (from GL_ARB_framebuffer_no_attachments)
      glGetFramebufferParameteriv (from GL_ARB_framebuffer_no_attachments)
      glMemoryBarrierByRegion

v2: Rebase on updated dispatch_sanity.cpp test.

v3: Add support for glDraw{Arrays,Elements}Indirect in vbo_exec_array.c.
The updated dispatch_sanity.cpp test discovered this omission.

v4: Rebase on glapi changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-28 16:56:31 -07:00
Jason Ekstrand
8bbe7fa7a8 i965/fs: Properly handle explicit depth in SIMD16 with dual-source blend
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90629
Tested-by: Markus Wick <markus@selfnet.de>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-28 13:33:09 -07:00
Matt Turner
e354cc9b79 i965: Silence warning in 3-src type-setting.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-28 12:59:04 -07:00
Matt Turner
0596134410 i965/fs: Fix lowering of integer multiplication with cmod.
If the multiplication's result is unused, except by a conditional_mod,
the destination will be null. Since the final instruction in the lowered
sequence is a partial-write, we can't put the conditional mod on it and
we have to store the full result to a register and do a MOV with a
conditional mod.

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90580
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-28 12:58:50 -07:00
Iago Toral Quiroga
2231cf0ba3 nir: Fix output swizzle in get_mul_for_src
When we compute the output swizzle we want to consider the number of
components in the add operation. So far we were using the writemask
of the multiplication for this instead, which is not correct.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-28 18:25:37 +02:00
Jose Fonseca
09d6243aed gallivm: Workaround LLVM PR23628.
Temporarily undefine DEBUG macro while including LLVM C++ headers,
leveraging the push/pop_macro pragmas, which are supported both by GCC
and MSVC.

https://bugs.freedesktop.org/show_bug.cgi?id=90621

Trivial.
2015-05-28 10:12:55 +01:00
Eric Anholt
10aacf5ae8 vc4: Just stream out fallback IB contents.
The idea I had when I wrote the original shadow code was that you'd see a
set_index_buffer to the IB, then a bunch of draws out of it.  What's
actually happening in openarena is that set_index_buffer occurs at every
draw, so we end up making a new shadow BO every time, and converting more
of the BO than is actually used in the draw.

While I could maybe come up with a better caching scheme, for now just
do the simple thing that doesn't result in a new shadow IB allocation
per draw.

Improves performance of isosurf in drawelements mode by 58.7967% +/-
3.86152% (n=8).
2015-05-27 17:29:11 -07:00
Eric Anholt
f8de6277bf vc4: Don't try to put our dmabuf-exported BOs into the BO cache.
We'd sometimes try to reallocate something that X was using as a new
pipe_resource, and potentially conflict in our rendering.  But even
worse, if we reallocated the BO as a shader, the kernel would reject
rendering using the shader.
2015-05-27 17:29:11 -07:00
Eric Anholt
b0edc19a52 vc4: Don't forget to make our raster shadow textures non-raster.
Not sure what happened in my testing that made the previous shadow
code fix glxgears swapbuffering, but this also fixes lots of CopyArea
in X (like dragging xlogo around in metacity).
2015-05-27 17:29:11 -07:00
Samuel Pitoiset
41630c0653 vc4: make vc4_begin_query() return a boolean
I forgot to make the change in 96f164f6f0.
This fixes a warning with GCC and probably an error with Clang.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-05-27 17:29:03 -07:00
Ben Widawsky
e2d84d99f5 i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)
Starting with GEN8, there is documentation that the multisample state command
must be emitted before the 3DSTATE_WM_HZ_OP command any time the multisample
count changes. The 3DSTATE_WM_HZ_OP packet gets emitted as a result of a
intel_hix_exec(), which is called upon a fast clear and/or a resolve. This can
happen before the state atoms are checked, and so the multisample state must be
put directly in the function.

v1:
- In v0, I was always emitting the command, but Ken came up with the condition to
determine whether or not the sample count actually changed.
- Ken's recommendation was to set brw->num_multisamples after emitting
3DSTATE_MULTISAMPLE. This doesn't work. I put my best guess as to why in the XXX
(it was causing 7 regressions on BDW).

v2:
Flag NEW_MULTISAMPLE state. As Ken found, in state upload we check for the
multisample change to determine whether or not to emit certain packets. Since
the hiz code doesn't actually care about the number of multisamples, set the
flag and let the later code take care of it.

Jenkins results:
http://otc-mesa-ci.jf.intel.com/view/dev/job/bwidawsk/136/

Fixes around 200 piglit tests on SKL. I'm somewhat surprised that it seems to
have no impact on BDW as the restriction is needed there as well.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Neil Roberts <neil@linux.intel.com> (v0)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v2)
2015-05-27 17:08:08 -07:00
Vinson Lee
147ffd4816 gallivm: Do not use NoFramePointerElim with LLVM 3.7.
TargetOptions::NoFramePointerElim was removed in llvm-3.7.0svn r238244
"Remove NoFramePointerElim and NoFramePointerElimOverride from
TargetOptions and remove ExecutionEngine's dependence on CodeGen. NFC."

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-05-27 17:01:51 -07:00
Kenneth Graunke
70c6f2323e i965: Remove _NEW_MULTISAMPLE dirty bit from 3DSTATE_PS_EXTRA.
BRW_NEW_NUM_SAMPLES is sufficient.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-05-27 12:20:25 -07:00
Kenneth Graunke
bb18df008e i965: Delete GS scratch space workaround warning.
This workaround is documented in the 3DSTATE_GS documentation.  It
appears to only apply to early steppings of Broadwell and Skylake.

I don't think it ever affected production hardware, so at this point it
probably makes sense to delete it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-27 12:20:18 -07:00
EdB
40665362fd clover: Log build options when dumping clc source.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-05-27 15:33:58 +03:00
Ian Romanick
2b8c51834b glapi: Encapsulate nop table knowledge in new _mesa_new_nop_table function
Encapsulate the knowledge about how to build the nop table in a new
_mesa_new_nop_table function.  This makes it easier for dispatch_sanity
to keep working now and in the future.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
2015-05-26 18:25:41 -07:00
Thomas Helland
8d813d14e1 docs: Fix some typos in the developer notes
Found when double-checking my review on Brian's series.

Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-26 15:14:04 -06:00
Brian Paul
be71bbfaa2 mesa: do not use _glapi_new_nop_table() for DRI builds
Commit 4bdbb588a9 introduced new _glapi_new_nop_table() and
_glapi_set_nop_handler() functions in the glapi dispatcher (which
live in libGL.so).  The calls to those functions from context.c
would be undefined (i.e. an ABI break) if the libGL used at runtime
was older.

For the time being, use the old single generic_nop() function for
non-Windows builds to avoid this problem.  At some point in the future
it should be safe to remove this work-around.  See comments for more
details.

v2: Incorporate feedback from Emil.  Use _WIN32 instead of
GLX_DIRECT_RENDERING to control behavior, move comments.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-and-tested-by: Ian Romanick <ian.d.romanick@intel.com>
2015-05-26 12:16:48 -06:00
Brian Paul
2ab0ca36c1 docs: add information about reviewing patches
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-26 12:16:36 -06:00
Brian Paul
c6184f84b7 docs: update the coding style information
This hasn't been updated in a long time and from recent discussion on
the mailing list, it's not always clear what's expected.  Hopefully,
this will help a bit.

v2: document function brace placement, per Thomas Helland.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-05-26 10:02:59 -06:00
Brian Paul
d959885b91 docs: update documentation about patch formatting, testing, etc
v2: correctly escape < and > chars.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-05-26 10:02:59 -06:00
Brian Paul
98f2f47f7a docs: reorganize devnotes.html file
Move "Adding Extensions" to the end.  Add a simple table of contents
at the top.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-05-26 10:02:59 -06:00
Brian Paul
eec904d29c xlib: fix X_GLXCreateContextAtrribs/Attribs typo
In case the glproto.h file isn't up to date, we provide the #define
for X_GLXCreateContextAttribsARB.

v2: fix other occurances, improve #ifndef test, per Jose.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-05-26 09:58:09 -06:00
Brian Paul
dce53a7d24 mesa: add some comments in copyimage.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-26 09:58:09 -06:00
Brian Paul
0b76541ce0 mesa: move decls, add const qualifiers in copyimage.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-26 09:58:09 -06:00
Brian Paul
8369675a55 mesa: code clean-ups in textureview.[ch]
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-26 09:58:09 -06:00
Brian Paul
3ddd1cf7d1 mesa: const qualify, return bool for _mesa_texture_view_compatible_format()
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-26 09:58:09 -06:00
Brian Paul
09eabf5be6 mesa: add const qualifer on _mesa_is_compressed_format()
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-26 09:58:09 -06:00
Jose Fonseca
b787f48ed2 glapi: Avoid argparse type argument for API XML input files.
argparse type is a nice type saver for simple data types, but it doesn't
look a good fit for the input XML file:

- Certain implementations of argparse (particularly python 2.7.3's)
  invoke the type constructor for the default argument even when an
  option is passed in the command line.  Causing `No such file or
  directory: 'gl_API.xml'` when the current dir is not
  src/mapi/glapi/gen.

- The parser takes multiple arguments.  This is currently worked around
  using lambdas, but that unnecessarily complex and hard to read.
  Furthermore it's odd to have a side-effect as heavy as parsing XML
  happening deep inside the argument parsing.

https://bugs.freedesktop.org/show_bug.cgi?id=90600

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-26 15:26:03 +01:00
Marek Olšák
224a77cc60 radeonsi: use a switch statement in si_delete_shader_selector
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-26 12:42:37 +02:00
Marek Olšák
0c5a309cee radeonsi: use a switch statement in si_shader_selector_key
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-26 12:42:37 +02:00
Marek Olšák
fa7f606e89 radeonsi: fix scratch buffer setup for geometry shaders
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-26 12:42:37 +02:00
Marek Olšák
f41517242a radeonsi: remove unused cases from si_shader_io_get_unique_index
These can't occur between VS and GS, because GS is only supported
in the core profile.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-26 12:42:37 +02:00
Marek Olšák
af4b9c7c2e radeonsi: don't count special outputs for the VS export count
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-26 12:42:36 +02:00
Marek Olšák
e4339bc988 radeonsi: add support for PIPE_CAP_TGSI_TEXCOORD
Without it, texcoords are mapped to GENERIC[0..7], PointCoord is mapped to
GENERIC[8], and user-defined varyings start from GENERIC[9]. Since texcoords
can only be used between VS and PS, and PointCoord is PS-only, it's silly to
always start from GENERIC[9] in all other shaders (such as LS, HS, ES, GS).

This adds support for TEXCOORD and PCOORD semantics. As a result, st/mesa
will use GENERIC[0] as a base for user-defined varyings, which should make
linking ES and GS as well as tessellation shaders at runtime easier.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-05-26 12:42:31 +02:00
Marek Olšák
3d35027fdc tgsi/ureg: enable creating tessellation shaders with ureg_create_shader
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-26 11:46:28 +02:00
Marek Olšák
c1266f28d6 tgsi/text: enable parsing tessellation shaders
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-26 11:46:28 +02:00
Marek Olšák
0d84b6cf84 gallium: rename TGSI tessellation processor types to match pipe shader names
I forgot to do this when pushing the interface changes.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-26 11:46:28 +02:00
Marek Olšák
92c31bb0dd gallium: use const in set_tess_state
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-26 11:46:28 +02:00
Koop Mast
967825d053 clover: Build fix for FreeBSD.
Cc: 10.6 10.5 <mesa-stable@lists.freedesktop.org>
2015-05-26 11:46:28 +02:00
Neil Roberts
5ae6c7bfce i965/skl: Add a message header for the TXF_MCS instruction in vec4vs
When using SIMD4x2 on Skylake, the sampler instructions need a message
header to select the correct mode. This was added for most sample
instructions in 0ac4c2727 but the TXF_MCS instruction is emitted
separately and it was missed.

This fixes a bunch of Piglit tests which test texelFetch in a geometry
shader, for example:

 spec/arb_texture_multisample/texelfetch/2-gs-sampler2dms

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-26 10:22:27 +01:00
Ilia Mirkin
3ec1815285 nv30: falling back to draw path for edgeflag does no good
The problem is that the EDGEFLAG has to be toggled at vertex submission
time. This can be done from either the draw or the regular paths. Avoid
falling back to draw just because there's an edgeflag.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 21:45:31 -04:00
Ilia Mirkin
25be70462d nv30/draw: switch varying hookup logic to know about texcoords
Commit 8acaf862df switched things over to use TEXCOORD instead of
GENERIC, but did not update the nv30 swtnl draw paths. This teaches the
draw logic about TEXCOORD.

Among other things, this fixes a crash in demos/arbocclude when using
swtnl. Curiously enough, the point-sprite piglit works without this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 21:45:31 -04:00
Ilia Mirkin
c3d36a2e1a nv30/draw: allocate vertex buffers in gart
These are only used once per draw, so it makes sense to keep them in
GART. Also take this opportunity to modernize the buffer mapping API
usage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 21:45:22 -04:00
Ilia Mirkin
fdad7dfbda nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAM
Instead of always having it in the data, let the bo placement decide it.
This fixes glxgears with swtnl forced on.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 21:45:08 -04:00
Ilia Mirkin
3600439897 nv30/draw: fix indexed draws with swtnl path and a resource index buffer
The map = assignment was missing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 20:16:51 -04:00
Ilia Mirkin
5646f0f18a glsl: avoid leaking linked gl_shader when there's a late linker error
This makes piglit mixing-clip-distance-and-clip-vertex-disallowed have 0
definitely lost blocks with valgrind. (Same non-0 number of possibly
lost blocks though.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 16:52:11 -04:00
Roland Scheidegger
6a111e54d7 llvmpipe: (trivial) add parantheses in (!x == y) expression
Apparently some compilers think we probably wanted to do !(x == y) instead
and issue a warning, so just shut it up... No functional change, obviously.

Cc: <mesa-stable@lists.freedesktop.org>
2015-05-25 22:24:42 +02:00
Ilia Mirkin
bb973723a5 st/mesa: don't leak glsl_to_tgsi object on link failure
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 15:45:12 -04:00
Ilia Mirkin
147816375d nv30/draw: draw expects constbuf size in bytes, not vec4 units
This fixes glxgears with NV30_SWTNL=1 forced on. Probably fixes a bunch
of other situations where we fall back to the swtnl path.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 14:11:16 -04:00
Ilia Mirkin
89585edf3c nv30/draw: avoid leaving stale pointers in draw state
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-25 14:11:16 -04:00
Jason Ekstrand
cc3d275557 Fix an unused variable warning
Trivial.  Deleted the 2 unneeded lines.
2015-05-25 09:27:10 -07:00
Tobias Klausmann
843ff4ba2a docs: Mark ARB_cull_distance as in progress
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2015-05-25 16:27:09 +02:00
Iago Toral Quiroga
3dec892d9b docs: Mark ARB_shader_storage_buffer_object as in progress
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-05-25 10:26:38 +02:00
Ilia Mirkin
7518fc3c66 nv30: fix clip plane uploads and enable changes
nv30_validate_clip depends on the rasterizer state. Also we should
upload all the new clip planes on change since next time the plane data
won't have changed, but the enables might.

This fixes fixed-clip-enables and vs-clip-vertex-enables shader tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-24 12:00:03 -04:00
Ilia Mirkin
aba3392541 nv30: avoid doing extra work on clear and hitting unexpected states
Clearing can happen at a time when various state objects are incoherent
and not ready for a draw. Some of the validation functions don't handle
this well, so only flush the framebuffer state. This has the advantage
of also not doing extra work.

This works around some crashes that can happen when clearing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
2015-05-24 12:00:03 -04:00
Emil Velikov
207ae2b0ef docs: add news item and link release notes for mesa 10.5.6
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-24 10:47:54 +01:00
Emil Velikov
81d5d78573 docs: Add sha256sums for the 10.5.6 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 8cb28bc49d)
2015-05-24 10:45:38 +01:00
Emil Velikov
3ab4556b84 Add release notes for the 10.5.6 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit b1cf9cfb16)
2015-05-24 10:45:35 +01:00
Ilia Mirkin
9870ed05dd nv30: avoid leaking render state and draw shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-24 02:26:29 -04:00
Ilia Mirkin
605ce36d7f nv30: don't leak fragprog consts
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-24 01:33:06 -04:00
Ilia Mirkin
fa7f9f123b nv50/ir: avoid messing up arg1 of PFETCH
There can be scenarios where the "indirect" arg of a PFETCH becomes
known, and so the code will attempt to propagate it. Use this
opportunity to just fold it into the first argument, and prevent the
load propagation pass from touching PFETCH further.

This fixes gs-input-array-vec4-index-rd.shader_test and
vs-output-array-vec4-index-wr-before-gs.shader_test on nvc0 at least.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-23 22:15:15 -04:00
Grigori Goronzy
f972b223c4 clover: try userptr for CL_MEM_USE_HOST_PTR
According to spec, CL_MEM_USE_HOST_PTR should directly use host memory,
if possible. This is just what userptr is for, so use it.

In case the memory cannot be mapped, a fallback similar to
CL_MEM_COPY_HOST_PTR is used.

v2: constify, drop unneeded cast

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-05-24 01:14:49 +02:00
Grigori Goronzy
5c495e8638 clover: implement CL_MEM_ALLOC_HOST_PTR
This flag is typically used to request pinned host memory, to avoid
any copies between GPU and CPU.

This improves throughput with an older OpenCL app which I unfortunately
can't publish due to its licensing.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-05-24 01:14:48 +02:00
Ilia Mirkin
c922758685 nv30: check nouveau_bo_map output of notify bo
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-23 19:10:07 -04:00
Ilia Mirkin
921917c8d8 nvc0: a geometry shader can have up to 1024 vertices output
The 1024 is already reported everywhere, not sure where this 0x1ff came
from.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-23 17:55:21 -04:00
Jason Ekstrand
6ca67f62e8 i965/fs: Fix implied_mrf_writes for scratch writes
We build the entire message in the generator so all the MRF writes are
implied.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-23 12:09:24 -07:00
Jason Ekstrand
58aed1031d prog_to_nir: Use a variable for uniform data
Previously, the prog_to_nir pass was directly generating uniform load/store
intrinsics.  This converts it to use a single giant "parameters" variable
and we now depend on lowering to get the uniform load/store intrinsics.
One advantage of this is that we now have one code-path after we do the
initial conversion into NIR.

No shader-db changes.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-23 12:09:08 -07:00
Samuel Pitoiset
c783fd476c nv50: fix PIPE_QUERY_TIMESTAMP_DISJOINT, based on nvc0
PIPE_QUERY_TIMESTAMP_DISJOINT could not work because q->ready was always
set to FALSE. To fix this issue, add more different states for queries
according to nvc0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-23 19:00:55 +02:00
Ilia Mirkin
217301843a nvc0/ir: LOAD's can't be used for shader inputs
We forgot to convert to VFETCH in case of indirect access. Fix that.

This avoids crashes on the new gs-input-array-vec4-index-rd and
vs-output-array-vec4-index-wr-before-gs but they still fail.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-22 19:08:24 -04:00
Ilia Mirkin
0bab3962f5 nv50/ir: guess that the constant offset is the starting slot of array
When we get something like IN[ADDR[0].x+5], we will now guess that we
should look at IN[5] for the "base" information.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-22 19:08:14 -04:00
Ilia Mirkin
d1eea18a59 nvc0/ir: set ftz when sources are floats, not just destinations
In the case of a compare, the destination might be a predicate, but we
still want to flush denorms.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-05-22 16:51:05 -04:00
Ilia Mirkin
a85aba190d nv50/ir: allow OP_SET to merge with OP_SET_AND/etc as well as a neg
This covers the pattern where a KILL_IF is used, which triggers a
comparison of -x to 0. This can usually be folded into the comparison whose
result is being compared to 0, however it may, itself, have already been
combined with another comparison. That shouldn't impact the logic of
this pass however. With this and the & 1.0 change, code like

00000020: 001c0001 80081df4     set b32 $r0 lt f32 $r0 0x3e800000
00000028: 001c0000 201fc000     and b32 $r0 $r0 0x3f800000
00000030: 7f9c001e dd885c00     set $p0 0x1 lt f32 neg $r0 0x0
00000038: 0000003c 19800000     $p0 discard

becomes

00000020: 001c001d b5881df4     set $p0 0x1 lt f32 $r0 0x3e800000
00000028: 0000003c 19800000     $p0 discard

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-22 16:51:05 -04:00
Ilia Mirkin
d2a474e8d4 nvc0/ir: optimize set & 1.0 to produce boolean-float sets
This has started to happen more now that the backend is producing
KILL_IF more often.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
2015-05-22 16:51:05 -04:00
Ilia Mirkin
e5ad19a46e nvc0/ir: allow iset to produce a boolean float
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-22 16:51:05 -04:00
Ilia Mirkin
0ec6b8ea8c nvc0/ir: avoid jumping to a sched instruction
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-22 16:51:05 -04:00
Brian Paul
491adb61d2 glx: fix Scons build
Replace -h with --header-tag as was done for the Makefile build.

Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
2015-05-22 14:38:33 -06:00
Dylan Baker
3f823cc55a glapi: glX_proto_size.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
9ace0b5422 glapi: glX_proto_size.py: use argparse instead of getopt
This is roughly equivalent to the original getopt, except that it
removes the '-h' short option, which argparse reserves for
auto-generated help messages. It does retain the long option specified
by the getopt version, and changes the makefile to use that.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
1c7cc67778 glapi: glX_proto_recv.py: Use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
d986cb7c70 glapi: glX_proto_recv.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
67d3ec0bb8 glapy: gl_genexec.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
79c4e595bc glapi: gl_genexec.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
9097a4a103 glapi: glX_proto_send.py: use a main function.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
9eed4e6232 glapi: glX_proto_send.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
dddac8cac3 glapi: glX_server_table.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
952bd305c6 glapi: gl_SPARC_asm.py: use main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
86c9fb526e glapi: gl_SPARC_asm.py use argparse instead of getopt
Also drop -m switch, which only accepted a single value or raised an
error, and was unused in the makefile.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
f2e78bd697 glapi: gl_x86-64_asm.py: Use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
2e3da443f1 glapi: gl_x86_64_asm.py: Use argparse instead of getopt
Also removes the redundant -m argument, which could only be set to
'generic', or it would raise an exception. This option wasn't used in
the makefile.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:28 -07:00
Dylan Baker
4892456799 glapi: gl_x86_asm.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
fc96122fb6 glapi: gl_x86_asm.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
5998d32f09 glapi: gl_gentable.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
d36fa4472e glapi: gl_gentable.py: Replace getopt with argparse
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
3317cea048 glapi: gl_apitemp.py: Use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
24ec03bd05 glapi: gl_apitemp.py: Convert to argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
6c4dcef6dc glapi: gl_enums.py: use main() function for if __name__ == "__main__"
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
fd5f1dd6c7 glapi: gl_enums.py: use argparse instead of getopt.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
e51530ba16 glapi: gl_procs.py: Use argparse rather than getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
28ecdd6be7 glapi: gl_procs.py: Fix a few low hanging style things
Shuts up analysis tools to make them return actual problems.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
622fee43c8 glapi: remap_helper.py: use argparse instead of optparse
Make the code simpler, cleaner, and easier to work with.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
bdae3bc1ff glapi: remap_helper.py: Fix some low hanging style issues
This makes the tools shut up about a bunch of problems, making them more
useful for catching actual problems.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
cf718cc964 glapi: gl_table.py: replace getopt with argparse.
This results in slightly less code, but code that is much more readable.
It has the advantage of putting everything together in one place, all of
the code is self documenting, help messages are auto-generated, choices
are automatically enforced, and the syntax is much less C like, taking
advantage of python features and idioms.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Dylan Baker
b6298c7a71 glapi: gl_table.py: Fix some low hanging style issues
Making the tools shut up about worthless errors so you can see real ones
is very useful

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-22 11:31:27 -07:00
Matt Turner
a1c070c1a7 i965/disasm: Skip swizzle disassembly when using 3-src repctrl.
... since it's always .x, and also always print the subreg offset when
using repctrl.
2015-05-22 11:26:37 -07:00
Matt Turner
5614bcc416 nir: Remove sRGB colorspace conversion round-trip.
Some shaders in Civilization V and Beyond Earth do

   pow(pow(x, 2.2), 0.454545)

which is converting to and from sRGB colorspace.

A more general rule that replaces pow(pow(a, b), c) with pow(a, b * c)
actually regresses two shaders in Sun Temple in which the result of the
inner pow is used twice, once by another pow and once by another
instruction. Also, since 2.2 * 0.454545 isn't exactly one, the more
general pattern would have still left us with a pow, and I'm 2.2 *
0.454545 percent sure that's not what they want.

instructions in affected programs:     934 -> 886 (-5.14%)
helped:                                16
2015-05-22 11:26:36 -07:00
Samuel Pitoiset
a21d23e191 nv50: fix PIPELINE_STATISTICS with HUD, based on nvc0
Tested on NVA8. No regression for ARB_pipeline_statistics piglit tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-22 11:39:23 +02:00
Samuel Pitoiset
867fd2b5f5 nv50: fix 64-bit queries with HUD, based on nvc0
A sequence number is written for 32-bits queries to make sure they are
ready, but not for 64-bits queries. Instead, we have to use a fence in
order to fix the HUD because it doesn't wait until the result is ready.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-22 11:39:23 +02:00
Christian König
6921ea42a1 radeon/vce: adapt new firmware interface changes
v2: make this also compatible with original released firmware
v3 (chk): switch to original idea of separate files for fw versions

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v2)
2015-05-22 10:17:24 +02:00
Christian König
2b40c306d2 radeon/vce: move CPB handling function into common code
They are not firmware version dependent.

Signed-off-by: Christian König <christian.koenig@amd.com>
2015-05-22 10:17:24 +02:00
Dave Airlie
7c1a00174b u_math: uses assert, include assert.h
this fixes a build problem found on RHEL s390.

not sure what configure options caused it, I couldn't get it on
x86 here.

Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.6" mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-22 09:19:58 +10:00
Timothy Arceri
d67515b7be glsl: remove element_type() helper
We now have is_array() and without_array() that make the
code much clearer and remove the need for this.

For all remaining calls to this we already knew that
the type was an array so returning a null wasn't adding any value.

v2: use without_array() in _mesa_ast_array_index_to_hir() and don't use
 without_array() in lower_clip_distance_visitor() as we want to make sure the
 array is 2D.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-22 08:35:45 +10:00
Matt Turner
51ccdb6346 glsl: Use AM_V_GEN/AM_V_at in NIR rules. 2015-05-21 09:43:43 -07:00
Ilia Mirkin
6cdb29d52f freedreno/a3xx: set .zw of sprite coords to .01
Fixes non-determinism in bin/point-sprite rendering, and the stars on
the intro screen to neverball.

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-20 21:54:00 -04:00
Ilia Mirkin
3e7bc67285 freedreno/ir3: fix immediate usage in tgsi tex fe
get_immediate will return a const reference, the requested immediate
isn't necessarily in the x slot. Make sure to use the swizzle.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-05-20 21:53:59 -04:00
Emil Velikov
36438f0db6 targets/osmesa: drop the -module tag from LDFLAGS
Gallium equivalent of commit 06ff751f97f(darwin: Fix install name of
libOSMesa)

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-20 21:56:36 +01:00
Jeremy Huddleston Sequoia
06ff751f97 darwin: Fix install name of libOSMesa
Passing -module to glibtool causes the resulting library to be called
libSomething.so rather than libSomething.dylib on darwin.

Regardless if libOSMesa is a library or a module, it has been used as
the former for quite some time. Update the build to reflect that and
resolve the naming issue.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
[Emil Velikov: Tweak the commit message.]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-20 21:56:32 +01:00
Alan Coopersmith
31cd2d75dc swrast: Build fix for Solaris
Fixes regression from commit 5b2d3480f5

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Reviewed-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
2015-05-20 21:44:21 +01:00
Jason Ekstrand
2126c68e5c nir: Get rid of the array elements parameter on load/store intrinsics
Previously, we used intrinsic->const_index[1] to represent "the number of
array elements to load" for load/store intrinsics.  However, this set to 1
by every pass that ever creates a load/store intrinsic.  Also, while it
might make some sense for registers, it makes no sense whatsoever in SSA.
On top of that, the i965 backend was the only backend to ever support it;
freedreno and vc4 just assert that it's always 1.  Let's just delete it.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-05-20 09:28:06 -07:00
Marek Olšák
e1c4e8aaaa gallium: remove TGSI_SAT_MINUS_PLUS_ONE
It's a remnant of some old NV extension. Unused.

I also have a patch that removes predicates if anyone is interested.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-05-20 15:40:46 +02:00
Marek Olšák
e4201bb618 cso: add context cleanup code from st/mesa
This fixes a crash in nouveau which can't handle
set_constant_buffer(PIPE_SHADER_TESS_*).

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-20 15:39:20 +02:00
Samuel Iglesias Gonsalvez
4ee69a97bb mesa/main: validate name syntax for array variables only
From ARB_program_interface_query:

 "Note that if an interface enumerates a single active resource list
 entry for an array variable (e.g., "a[0]"), a <name> identifying
 any array element other than the first (e.g., "a[1]") is not
 considered to match."

It doesn't apply to arrays of interface blocks but just to array
variables.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-20 07:24:53 +02:00
Dave Airlie
1b05290676 GL3.txt: update softpipe ARB_gpu_shader5 status
texture gather and it already supported the new instructions.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:36:14 +10:00
Dave Airlie
55a7b5165d softpipe: start adding gather support (v2)
This adds both ARB_texture_gather and the enhanced gather
for ARB_gpu_shader5.

This passes all the piglit tests, it relies on the GLSL
lowering pass to make textureGatherOffsets work.

v2: use inline to get gather component (Brian)
fix function name, add asserts (Brian)

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:32:59 +10:00
Dave Airlie
0108eae291 softpipe: use arrays to make gather easier
This is a prep change for gather, and it makes more sense
to use an array in these cases.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:32:55 +10:00
Dave Airlie
a6861ecfc9 tgsi: handle TG4 opcode in tgsi exec
This just adds a new modifier interface for drivers to implement.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:32:51 +10:00
Dave Airlie
3f5c67d651 softpipe: add textureOffset support.
This was an oversight when GLSL1.30 was enabled, I think my
misunderstanding.

This fixes a bunch of tex-miplevel-selection tests under softpipe,
and is required for textureGather support.

I'm not sure this won't make sampling slowering, but its softpipe,
correctness first and all that.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:32:47 +10:00
Dave Airlie
8bec83a307 softpipe: move control into a filter args struct
more stuff for offsets and gather will go in here later.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:32:44 +10:00
Dave Airlie
99e583120c softpipe: move some image filter parameters into a struct
This moves some of the image filter args into a struct,
and passes that instead, this is prep work for adding texture
gather support which needs new arguments.

review: make filter args const.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-20 12:32:27 +10:00
Emil Velikov
b9b516248e Post-branch version bump to 10.7.0-devel, add release notes template
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-19 13:23:05 +01:00
Emil Velikov
0c9e0b7a6c glapi: track GL_ARB_program_interface_query.xml
Add the file to the API_XML list, otherwise there will be no knowledge
by the build that it should be included in the tarball.

Thus the (scons) build will fail.

Fixes: b297fc27aa9(glapi: add GL_ARB_program_interface_query skeleton)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-19 13:23:05 +01:00
Emil Velikov
0148c0ae6a i965: add brw_cs.h to the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-19 12:39:05 +01:00
Alexander von Gluck IV
7af2601a07 mesa/driver/haiku: Drop Mesa swrast renderer
This just created extra upkeep and the push to move extern
C's into mesa code would mean a large number of extern's
in core Mesa driver interfaces. The Haiku Gallium renderers
are mostly insulated via the C-based Haiku state tracker.

As any future hardware support in Haiku will be gallium
based, lets just drop swrast.

Haiku has a Mesa 7.12 fork for gcc2 that uses swrast.

This commit fixes the last of the Haiku build issues.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-18 21:02:25 -04:00
Jason Ekstrand
42298b05d1 i965: Use NIR by default for vertex shaders on GEN8+
GLSL IR vs. NIR shader-db results for SIMD8 vertex shaders on Broadwell:

   total instructions in shared programs: 2742062 -> 2681339 (-2.21%)
   instructions in affected programs:     1514770 -> 1454047 (-4.01%)
   helped:                                5813
   HURT:                                  1120

The gained programs are ARB vertext programs that were previously going
through the vec4 backend.  Now that we have prog_to_nir, ARB vertex
programs can go through the scalar backend so they show up as "gained" in
the shader-db results.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-05-18 15:32:00 -07:00
Rob Clark
e6f912f07e freedreno: fence fix
A fence can outlive the ctx, so we shouldn't deref the ctx to get at the
screen.  We need some updates in libdrm_freedreno API to completely
handle fences properly, but this is at least an improvement.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-05-18 17:47:54 -04:00
Ben Widawsky
8427ad9125 i965: Add gen8 blend state
OLD:
0x00007340:      0x00800000:    BLEND:
0x00007344:      0x84202100:    BLEND:

NEW:
0x00007340:      0x00800000:    BLEND: Alpha blend/test
0x00007344:      0x0000000b84202100: BLEND_ENTRY00:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x0000734c:      0x0000000b84202100: BLEND_ENTRY01:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x00007354:      0x0000000b84202100: BLEND_ENTRY02:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x0000735c:      0x0000000b84202100: BLEND_ENTRY03:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x00007364:      0x0000000b84202100: BLEND_ENTRY04:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x0000736c:      0x0000000b84202100: BLEND_ENTRY05:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x00007374:      0x0000000b84202100: BLEND_ENTRY06:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----
0x0000737c:      0x0000000b84202100: BLEND_ENTRY07:
                        Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
                        function ADD,ADD (color, alpha), Disables: ----

v2: Line length fixes, and const usage (Topi)
Safer initialization of name string (Topi)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-18 12:02:18 -07:00
Ben Widawsky
fa284d6f2f i965: Add renderbuffer surface indexes to debug
This patch is optional in the series. It does make the output much cleaner, but
there is some risk.

Sample output (v3):
0x00007e80:      0x231d7000:  SURF000: 2D R8G8B8A8_UNORM  VALIGN4 HALIGN4 Y-tiled
0x00007e84:      0x05000000:  SURF000: MOCS: 0x5 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007e88:      0x009f009f:  SURF000: 160x160 [AUX_NONE]
0x00007e8c:      0x0000027f:  SURF000: 1 slices (depth), pitch: 640
0x00007e90:      0x00000000:  SURF000: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007e94:      0x00000000:  SURF000: x,y offset: 0,0, min LOD: 0
0x00007e98:      0x00000000:  SURF000: AUX pitch: 0 qpitch: 0
0x00007e9c:      0x09770000:  SURF000: Clear color: R(0)G(0)B(0)A(0)
0x00007ea0:      0x00001000:  SURF000: 0x00001000
0x00007ea4:      0x00000000:  SURF000: 0x00000000
0x00007ea8:      0x00000000:  SURF000: 0x00000000
0x00007eac:      0x00000000:  SURF000: 0x00000000
0x00007e40:      0x234df000:  SURF001: 2D R11G11B10_FLOAT  VALIGN4 HALIGN16 Y-tiled
0x00007e44:      0x09000000:  SURF001: MOCS: 0x9 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007e48:      0x009f009f:  SURF001: 160x160 [AUX_CCS_D (Uncompressed, MULTISAMPLE_COUNT=1)]
0x00007e4c:      0x0000027f:  SURF001: 1 slices (depth), pitch: 640
0x00007e50:      0x00000000:  SURF001: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007e54:      0x00000000:  SURF001: x,y offset: 0,0, min LOD: 0
0x00007e58:      0x00000001:  SURF001: AUX pitch: 0 qpitch: 0
0x00007e5c:      0x09770000:  SURF001: Clear color: R(0)G(0)B(0)A(0)
0x00007e60:      0x0002b000:  SURF001: 0x0002b000
0x00007e64:      0x00000000:  SURF001: 0x00000000
0x00007e68:      0x0002a000:  SURF001: 0x0002a000
0x00007e6c:      0x00000000:  SURF001: 0x00000000

v2: Rebased on Topi's recent series which changed around some of the gen8
surface setup code.

v3: Use ralloc_asprintf instead of asprintf to be more friendly to non-GNU
platforms.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2015-05-18 12:02:18 -07:00
Ben Widawsky
c14bb07230 i965: Add Gen9 surface state decoding
Gen9 surface state is very similar to the previous generation. The important
changes here are aux mode, and the way clear colors work.

NOTE: There are some things intentionally left out of this decoding.

v2: Redo the string for the aux buffer type to address compressed variants.

v3: Use the shift for compression enable (instead of compression mode) (Topi)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-18 12:02:18 -07:00
Ben Widawsky
313abbb8ca i965: Add gen8 surface state debug info
AFAICT, none of the old data was wrong (the gen7 decoder), but it wa smissing a
bunch of stuff.

Adds a tick (') to denote the beginning of the surface state for easier reading.
This will be replaced later with some better, but more risky code.

OLD:
0x00007980:      0x23016000:     SURF: 2D BRW_SURFACEFORMAT_B8G8R8A8_UNORM
0x00007984:      0x18000000:     SURF: offset
0x00007988:      0x00ff00ff:     SURF: 256x256 size, 0 mips, 1 slices
0x0000798c:      0x000003ff:     SURF: pitch 1024, tiled
0x00007990:      0x00000000:     SURF: min array element 0, array extent 1
0x00007994:      0x00000000:     SURF: mip base 0
0x00007998:      0x00000000:     SURF: x,y offset: 0,0
0x0000799c:      0x09770000:     SURF:
0x00007940:      0x231d7000:     SURF: 2D BRW_SURFACEFORMAT_R8G8B8A8_UNORM
0x00007944:      0x78000000:     SURF: offset
0x00007948:      0x001f001f:     SURF: 32x32 size, 0 mips, 1 slices
0x0000794c:      0x0000007f:     SURF: pitch 128, tiled
0x00007950:      0x00000000:     SURF: min array element 0, array extent 1
0x00007954:      0x00000000:     SURF: mip base 0
0x00007958:      0x00000000:     SURF: x,y offset: 0,0
0x0000795c:      0x09770000:     SURF:

NEW (v1):
0x00007980:      0x23016000:    SURF': 2D B8G8R8A8_UNORM  VALIGN4 HALIGN4 X-tiled
0x00007984:      0x18000000:     SURF: MOCS: 0x18 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007988:      0x00ff00ff:     SURF: 256x256 [AUX_NONE]
0x0000798c:      0x000003ff:     SURF: 1 slices (depth), pitch: 1024
0x00007990:      0x00000000:     SURF: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007994:      0x00000000:     SURF: x,y offset: 0,0, min LOD: 0
0x00007998:      0x00000000:     SURF: AUX pitch: 0 qpitch: 0
0x0000799c:      0x09770000:     SURF: Clear color: ----
0x00007940:      0x231d7000:    SURF': 2D R8G8B8A8_UNORM  VALIGN4 HALIGN4 Y-tiled
0x00007944:      0x78000000:     SURF: MOCS: 0x78 Base MIP: 0 (0 mips) Surface QPitch: ff0000
0x00007948:      0x001f001f:     SURF: 32x32 [AUX_NONE]
0x0000794c:      0x0000007f:     SURF: 1 slices (depth), pitch: 128
0x00007950:      0x00000000:     SURF: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007954:      0x00000000:     SURF: x,y offset: 0,0, min LOD: 0
0x00007958:      0x00000000:     SURF: AUX pitch: 0 qpitch: 0
0x0000795c:      0x09770000:     SURF: Clear color: ----
0x00007920:      0x00007980:    BIND0: surface state address
0x00007924:      0x00007940:    BIND1: surface state address

v2: Style cleanups (Matt)
Fix aux mode dword 7->6 (Topi)
Use exp2 instead of pow (Matt)
Add dwords 8-12 to the dump

v3: Needed to update the surface format name getter for the change in the first
patch in the series

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Matt Turner <mattst88@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-18 12:02:18 -07:00
Ben Widawsky
7f0c7a5f90 i965: Add gen7+ sampler state to batch debug
OLD:
0x00007e00:      0x10000000: WM SAMP0: filtering
0x00007e04:      0x000d0000: WM SAMP0: wrapping, lod
0x00007e08:      0x00000000: WM SAMP0: default color pointer
0x00007e0c:      0x00000090: WM SAMP0: chroma key, aniso

NEW:
0x00007e00:      0x10000000: SAMPLER_STATE 0: Disabled = no, Base Mip: 0.0, Mip/Mag/Min Filter: NONE/NEAREST/NEAREST, LOD Bias: 0.0
0x00007e04:      0x000d0000: SAMPLER_STATE 0: Min LOD: 0.0, Max LOD: 13.0
0x00007e08:      0x00000000: SAMPLER_STATE 0: Border Color
0x00007e0c:      0x00000090: SAMPLER_STATE 0: Max aniso: RATIO 2:1, TC[XYZ] Address Control: CLAMP|CLAMP|WRAP

v2: Move GET_BITS macro to here (with paren protection) Ben/Topi
Add const to the sampler pointer (Topi)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-18 12:02:18 -07:00
Ben Widawsky
1fa0789a94 i965: Add viewport extents (gen8) to batch decode
0x00007da0:      0xc1da740e: SF_CLIP VP: guardband xmin = -27.306667
0x00007da4:      0x41da740e: SF_CLIP VP: guardband xmax = 27.306667
0x00007da4:      0x41da740e: SF_CLIP VP: guardband ymin = -23.405714
0x00007da8:      0xc1bb3ee7: SF_CLIP VP: guardband ymax = 23.405714
0x00007db0:      0x00000000: SF_CLIP VP: Min extents: 0.00x0.00
0x00007db8:      0x00000000: SF_CLIP VP: Max extents: 299.00x349.00

While here, fix the wrong offsets for the guardband (I didn't check if it used
to be valid on GEN4).

v2: Remove leftover GET_BITS which belongs later in the series. (Topi)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-18 12:02:18 -07:00
Ben Widawsky
e45a292556 i965: Add all surface types to the batch decode
It's true that not all surfaces apply for every gen, but for the most part this
is what we want. (The unfortunate case is when we use a valid surface, but not
for the specific GEN).

This was automated with a vim macro.

v2: Shortened common forms such as R8G8B8A8->RGBA8. Note that this makes some of
the sample output in subsequent commits slightly incorrect.

v3: Use the name from the table (Ken). This requires declaring the surface
format array as extern, and declaring the struct in the .h file.

v4: Move the struct back and create a helper function to obtain the name (Ken)
Get rid of the now useless helper in the state_dump.c

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (v3)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-18 12:02:18 -07:00
Ben Widawsky
421e396bb7 i965: Add string for surface format to table
Recommended-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-18 12:02:18 -07:00
Matt Turner
f7df169ba1 i965/fs: Implement integer multiply without mul/mach.
Ivybridge and Baytrail can't use mach with 2Q quarter control, so just
do it without the accumulator. Stupid accumulator.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-18 10:11:36 -07:00
Matt Turner
0a9e3a0160 i965/fs: Rework compression control selection.
The next commit uses an add(16) with a UW destination with a stride of
2, which needs compression control since it's writing two registers. The
old code would have failed to set compression control correctly.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-18 10:11:36 -07:00
Matt Turner
4ec09c7747 i965/fs: Support integer multiplication in SIMD16 on Haswell.
Ivybridge (and presumably Baytrail) have a bug that prevents this from
working.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-18 10:11:36 -07:00
Matt Turner
0592ee457d i965/fs: Add set_sechalf() method.
Used in the next commit.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-18 10:11:36 -07:00
Matt Turner
81deefc45b i965/fs: Unrestrict constant propagation into integer multiply.
Gen8+'s MUL instruction doesn't ignore the high 16-bits of one source
like on earlier platforms, so we can constant propagate into it without
worry. Integer multiplies (not into the accumulator, which is done for
imul_high) are lowered in lower_integer_multiplication(), so it's safe
there as well.

On Broadwell, fragment shaders only:
total instructions in shared programs: 4377769 -> 4377451 (-0.01%)
instructions in affected programs:     48064 -> 47746 (-0.66%)
helped:                                156

On Broadwell, vertex shaders only:
total instructions in shared programs: 2858885 -> 2856313 (-0.09%)
instructions in affected programs:     26380 -> 23808 (-9.75%)
helped:                                134

On Broadwell, vertex shaders only (with INTEL_USE_NIR=1):
total instructions in shared programs: 2911688 -> 2865984 (-1.57%)
instructions in affected programs:     1421715 -> 1376011 (-3.21%)
helped:                                6186

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-18 10:11:36 -07:00
Matt Turner
1e4e17fbd9 i965/fs: Lower integer multiplication after optimizations.
32-bit x 32-bit integer multiplication requires multiple instructions
until Broadwell. This patch just lets us treat the MUL instruction in
the FS backend like it operates on Broadwell, and after optimizations
we lower it into a sequence of instructions on older platforms.

Doing this will allow us to some extra optimization on integer
multiplies.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-18 10:11:36 -07:00
Ilia Mirkin
ae405d429f gk110/ir: switch to gk104-style sched codes rather than all-in-one
Matches change to envydis/envyas tools.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-18 12:59:52 -04:00
Tapani Pälli
9f4eaba36f glsl: add stage references for UBO uniforms
Patch marks uniforms inside UBO properly referenced by stages.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90397
2015-05-18 15:23:09 +03:00
Iago Toral Quiroga
845ad2667a i965: Fix textureSize for Lod > 0 with non-mipmap filters
Currently, when the MinFilter is GL_LINEAR or GL_NEAREST we hide the
actual miplevel count from the hardware (and we avoid re-creating
the miptree structure with all the levels), since we don't expect
levels other than the base level to be needed. Unfortunately,
GLSL's textureSize() function is an exception to this rule. This
function takes a lod parameter that we need to use to return the
size of the appropriate miplevel (if it exists). The spec only
requires that the miplevel exists, so even if the sampler is
configured with a linear or nearest MinFilter, as far as the user
has uploaded miplevels for the texture, textureSize() should return
the appropriate sizes.

This patch fixes this by exposing the actual miplevel count for all
sampling engine textures while keeping the original implementation
for render targets (for render targets textures we do not provide
the miplevel count but the actual LOD we are wrting to, so we
want to make sure that we make this the base level).

Fixes 28 dEQP tests in the following category:
dEQP-GLES3.functional.shaders.texture_functions.texturesize.*

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-05-18 11:23:17 +02:00
Fredrik Höglund
5a55f681f6 mesa: Check the lookup_framebuffer return value in NamedFramebufferRenderbuffer
Found by Coverity.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-16 19:55:00 +02:00
Ilia Mirkin
d7081828cc tgsi/dump: fix declaration printing of tessellation inputs/outputs
mareko: only output second dimension for non-patch semantics

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:23 +02:00
Ilia Mirkin
dfc3bced2c tgsi/ureg: allow ureg_dst to have dimension indices
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:23 +02:00
Marek Olšák
ec67d73a73 tgsi/ureg: use correct limit for max input count
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:23 +02:00
Ilia Mirkin
93c940736f tgsi/sanity: set implicit in/out array sizes based on patch sizes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:23 +02:00
Ilia Mirkin
5b45cbe7e2 tgsi/scan: allow scanning tessellation shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Marek Olšák
2420ee497a gallium: disable tessellation shaders for meta ops
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Marek Olšák
ed1b273ffc gallium/cso: set NULL shaders at context destruction
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Marek Olšák
2a7da1bddb gallium/cso: add support for tessellation shaders
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Marek Olšák
267ad27ab6 gallium/u_blitter: disable tessellation for all operations
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Marek Olšák
66630290df gallium/util: print vertices_per_patch in util_dump_draw_info
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Marek Olšák
369aca1b4a trace: implement new tessellation functions
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Ilia Mirkin
6b26206120 gallium: add set_tess_state to configure default tessellation parameters
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:22 +02:00
Ilia Mirkin
4dbfe6b627 gallium: add vertices_per_patch to draw info
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:51:15 +02:00
Ilia Mirkin
9e1ba1d689 gallium: add tessellation shader properties
v2: Marek: rename tess spacing definitions

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:48:54 +02:00
Ilia Mirkin
18bce2f194 gallium: add interfaces for controlling tess program state
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:48:54 +02:00
Marek Olšák
7ffc1fb928 gallium: bump shader input and output limits
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:48:54 +02:00
Ilia Mirkin
018aa27953 gallium: add new semantics for tessellation
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:48:54 +02:00
Ilia Mirkin
88c4f5d0a5 gallium: add new PATCHES primitive type
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:48:54 +02:00
Ilia Mirkin
398b0b3e36 gallium: add tessellation shader types
v2: Marek: rename shader types

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-05-16 14:48:54 +02:00
Ian Romanick
35c28103b0 glapi: Remove offset from the DTD
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:34 -07:00
Ian Romanick
a75910071e glapi: Whitespace clean up after the previous commit
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:33 -07:00
Ian Romanick
f507d33d4f glapi: Remove all offset tags from the XML
Changes generated by:

    cd src/mapi/glapi/gen
    for i in *.xml; do
        cat $i |\
        sed 's/[[:space:]]*offset="[^"]*">/>/' |\
        sed 's/[[:space:]]*offset="[^"]*"[[:space:]]*$//' |\
        sed 's/[[:space:]]*offset="[^"]*"[[:space:]]*/ /' > x
        mv x $i
    done

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:31 -07:00
Ian Romanick
2b419e0db9 glapi: Use the offsets from static_data.py instead of from the XML
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
2015-05-15 20:23:24 -07:00
Ian Romanick
0fe7eab8d9 glapi: Add a list of functions that are not used but still need dispatch slots
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:20 -07:00
Ian Romanick
d2ee60cd52 glapi: Remove static dispatch for functions that didn't exist in NVIDIA
Comparing the output of

    nm -D libGL.so.349.16 | grep ' T gl[^X]' | sed 's/.* T //'

between Catalyst NVIDIA 349.16 and this commit, the only change is a bunch
of functions that NVIDIA exports that Mesa does not.

If a function is not statically exported by either of the major binary
drivers on Linux, there is almost zero chance that any application
statically links with it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:19 -07:00
Ian Romanick
4adfc6ed31 glapi: Remove static dispatch for functions that didn't exist in fglrx
Comparing the output of

    nm -D arch/x86_64/usr/X11R6/lib64/fglrx/fglrx-libGL.so.1.2 |\
        grep ' T gl[^X]' | sed 's/.* T //'

between Catalyst 14.6 Beta and this commit, the only change is a bunch
of functions that AMD exports that Mesa does not and some OpenGL ES
1.1 functions that Mesa exported but AMD does not.

The OpenGL ES 1.1 functions (e.g., glAlphaFuncx) are added by extensions
in desktop.  Our infrastructure doesn't allow us to statically export a
function in one lib and not in another.  The GLES1 conformance tests
expect to be able to link with these functions, so we have to export
them.

If a function is not statically exported by either of the major binary
drivers on Linux, there is almost zero chance that any application
statically links with it.

As a side note... I find it odd that AMD exports glTextureBarrierNV but
not glTextureBarrier.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:18 -07:00
Ian Romanick
90a1a4e234 glapi: Remove static dispatch for functions that didn't exist in 10.3
Comparing the output of

    nm libGL.so | grep ' T gl[^X]' | sed 's/.* T //'

between 10.3.7 and this commit, the only change is the removal of
glFramebufferTextureFaceARB.  This function was removed a couple commits
previously.

glClipControl was, at the time 10.3 shipped, a very new function.  It
was added by GL_ARB_clip_control.  That extension was ratified by the
Khronos Board of Promoters on August 7, 2014.  It's less than a year
old, and I don't think it's is likely that there are many applications
using that extension... much less statically linking with the function.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:16 -07:00
Ian Romanick
c1ad2bac71 glapi: Remove static dispatch for functions that didn't exist in 10.4
Comparing the output of

    nm libGL.so | grep ' T gl[^X]' | sed 's/.* T //'

between 10.4.7 and this commit, the only change is the removal of
glFramebufferTextureFaceARB.  This function was removed a couple commits
previously.

None of these functions are particuarly new.  If applications were not
statically linking them with 10.4.7, there's approximately zero chance
they will for 10.6.

Almost all of these functions are for GL_ARB_direct_state_access.
Since the whole DSA API wasn't statically exported (and the extension
wasn't enabled!), I think there's exactly zero chance anyone linked
against these symbols.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:15 -07:00
Ian Romanick
832d43bbb6 glapi: Remove static dispatch for functions that didn't exist in 10.5
Comparing the output of

    nm libGL.so | grep ' T gl[^X]' | sed 's/.* T //'

between 10.5.5 and this commit, the only change is the removal of
glFramebufferTextureFaceARB.  This function was removed a couple commits
previously.

None of these functions are particuarly new.  If applications were not
statically linking them with 10.5.5, there's approximately zero chance
they will for 10.6.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:23:13 -07:00
Ian Romanick
ea54b3ea1a glapi: Remove static_dispatch from the DTD
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:22:43 -07:00
Ian Romanick
7a22e78704 glapi: Whitespace clean up after the previous commit
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
2015-05-15 20:22:40 -07:00
Ian Romanick
44e67398cc glapi: Remove all static_dispatch tags from the XML
Changes generated by:

    cd src/mapi/glapi/gen
    for i in *.xml; do
        cat $i |\
        sed 's/[[:space:]]*static_dispatch="[^"]*">/>/' |\
        sed 's/[[:space:]]*static_dispatch="[^"]*"[[:space:]]*$//' |\
        sed 's/[[:space:]]*static_dispatch="[^"]*"[[:space:]]*/ /' > x
        mv x $i
    done

Comparing the output of

        nm libGL.so | grep ' T gl[^X]' | sed 's/.* T //'

before and after this commit showed no differences.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
2015-05-15 20:22:36 -07:00
Ian Romanick
d9be1db4b6 glapi: Store list of functions with static dispatch in a separate table
The set of functions with static dispatch is (supposed to be) defined by
the Linux OpenGL ABI.  We export quite a few more functions than that
for historical reasons.  However, this list should never grow.

This table is used instead of the static_dispatch tag in the XML to
generate the static dispatch functions.  I used

    nm libGL.so | grep ' T gl[^X]' | sed 's/.* T //'

before and after the change.  diff showed no differences.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
2015-05-15 20:22:32 -07:00
Ian Romanick
d649fcf727 glapi: Store static dispatch offsets in a separate table
Since the set of functions with static will never change, there is no
reason to store it in the XML.  It's just one of those fields that
confuses people adding new functions.

This is split out from the rest of the series so that in-code assertions
can be used to verify that the data in the Python code matches the XML.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
2015-05-15 20:22:26 -07:00
Ian Romanick
5aaabd7630 mesa: Remove all vestiges of glFramebufferTextureFaceARB
Mesa does not (and probably never will) support GL_ARB_geometry_shader4,
so this function will never exist.  Having a function that is
exec="skip" and offset="assign" is just weird.

There are still a couple 'exec="skip" offset="assign"' functions
remaining.  These remain because we either support GLX protocol for them
(glSampleMaskSGIS and glSamplePatternSGIS) or older DRI drivers still
need them in the dispatch table (glResizeBuffersMESA).  The SGIS
functions can be removed later.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:22:23 -07:00
Ian Romanick
0784bb01b5 glapi: Mark a couple functions "ignore" for GLX
Without this the next patch will try to put these functions in the
dispatch table in indirect_init.c.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-15 20:21:36 -07:00
Fredrik Höglund
b3059bb7c5 st/mesa: Flush the bitmap cache in st_BlitFramebuffer
With DSA we can no longer rely on this being done in st_validate_state
in response to the framebuffer bindings having changed.

This fixes the ext_framebuffer_multisample-bitmap piglit test.

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-15 22:12:05 +02:00
Ian Romanick
d43aed9646 i965: Fix FS unit tests
Commit 3687d75 changed the fs_visitor constructors, but it didn't update
all the users.  As a result, 'make check' fails.

I added the explicit cast to the gl_program* parameter to make it more
clear which NULL was which.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@Whitecape.org>
2015-05-15 12:31:15 -07:00
Alexander von Gluck IV
7de484871d target/haiku-softpipe: Move api init into st code
We also reduce the amount of need-to-know information about st_api
to require one less extern "C" in st_manager.h

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-15 13:55:59 -04:00
Alexander von Gluck IV
9b5da7f06a st/hgl: Move st_api creation to st and extern "C" it
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-15 13:55:59 -04:00
Alexander von Gluck IV
73aef2d1d8 winsys/hgl: Add needed extern "C" to hgl winsys
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-15 13:55:59 -04:00
Alexander von Gluck IV
624b38add9 gallium/drivers: Add extern "C" wrappers to public entry
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-15 13:55:59 -04:00
Alexander von Gluck IV
40a8b2f92a gallium/aux: Add needed extern "C" wrappers
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-15 13:55:59 -04:00
Kenneth Graunke
3687d752e5 i965/fs: Combine the fs_visitor constructors.
For scalar GS support, we either need to add a fourth constructor which
takes the GS structures, or combine the existing two and pass the shader
stage.

Given that they're not significantly different, I opted for the latter.

v2: Remove more stuff from the .h file (Jason and Jordan).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-05-14 21:19:48 -07:00
Emil Velikov
0c4eef6a2c egl: remove remaining EGL_MESA_copy_context skeleton
With earlier commit (7a58262e58 egl: Remove skeleton implementation of
EGL_MESA_screen_surface) we've removed the skeleton implementation of
eglCopyContextMESA(). Just like EGL_MESA_screen_surface this extension
was never implemented in mesa.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 21:05:16 +00:00
Emil Velikov
448e01b291 egl/main: fix EGL_KHR_get_all_proc_addresses
The extension requires that the address of the core functions should be
available via eglGetProcAddress. Currently the list is guarded by
_EGL_GET_CORE_ADDRESSES, which was only set for the scons (windows)
build.

Unconditionally enable it for all the builds (automake, android and
haiku) considering that the extension is not platform specific and is
always enabled.

v2: Drop the _EGL_GET_CORE_ADDRESSES macro altogether.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-14 21:00:05 +00:00
Marc-André Lureau
ffc94e32a3 egl: more define fixes for EGL_MESA_image_dma_buf_export
s/EGL_MESA_dma_buf_image_export/EGL_MESA_image_dma_buf_export as defined by the spec
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-05-14 21:00:05 +00:00
Emil Velikov
e3cc5ad49d egl/main: expose only core EGL functions statically
The EGL 1.3, 1.4 and 1.5 spec (as quoted below) explicitly mentions that
providing static symbols for functions provided by EGL extensions is not
portable. Considering that relatively recently we've seen a non-mesa
desktop EGL implementation, the fact that we opt for such behaviour has
gone unnoticed.

From the EGL 1.5 specification:
    For functions that are queryable with eglGetProcAddress,
    implementations may choose to also export those functions
    statically from the object libraries implementing those
    functions. However, portable clients cannot rely on this
    behavior.

To encourage devs against writing such non-portable code, let's hide the
symbols similar to the official binary driver from NVIDIA.

v2: Quote the EGL 1.5 spec, as suggested by Chad.

Cc: Brian Paul <brianp@vmware.com>
Cc: Chad Versace <chad.versace@intel.com>
Cc: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-05-14 21:00:05 +00:00
Emil Velikov
f9bf9133cc egl: fix the EGL_MESA_image_dma_buf_export header declarations
Similar to other EGL extensions - guard the function prototypes by
EGL_EGLEXT_PROTOTYPES as the libEGL library does (should) not provide
the symbols statically.

Instead users should call eglGetProcAddress, which returns the function
pointer. The latter of which was missing the type declaration (typedef).

Cc: Dave Airlie <airlied@redhat.com>
Cc: Marc-André Lureau <marcandre.lureau@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-05-14 21:00:04 +00:00
Emil Velikov
9790988123 egl/main: Update README.txt
The driver search/load is not done at eglGetDisplay (or eglOpenDisplay
as the readme called it) time, but during eglInitialize().

Drop _eglMain (available only for external drivers) reference. Mention
we use function(s), specific to the built-in driver(s).

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-05-14 21:00:04 +00:00
Emil Velikov
1fac38ee32 egl/main: cleanup function prototypes
Cleanup the function propotypes which were part of the previous EGL
drivers.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-05-14 21:00:04 +00:00
Emil Velikov
209360bbb9 egl/main: drop support for external egl drivers
The only user (egl_gallium) is not longer around.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-05-14 21:00:04 +00:00
Rob Clark
4925c35660 freedreno: fix bug in tile/slot calculation
This was causing corruption with hw binning on a306.  Unlikely that it
is a306 specific, but rather the smaller gmem size resulted in different
tile configuration which was triggering the bug at certain resolutions.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4" and "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
2015-05-14 14:46:14 -04:00
Rob Clark
fcc7d6323b freedreno: enable a306
Whitelist adreno 306 (as found in msm8916/apq8016).  Works pretty much
out of the box, although the smaller GMEM size requires more tiles to
fit 1920x1080, so bump up the max # of tiles as well.

Since it is just whitelist + trivial change, it makes sense to land on
all the active release branches.

Note that a305c ends up with gpu-id "306", hence a306 ends up with
gpu-id of "307".  Apparently that is what happens when you let the
marketing dept name things.

Cc: "10.4" and "10.5" and "10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-05-14 14:46:14 -04:00
Alexander von Gluck IV
0fbf49ce57 egl/haiku: Drop extern "C". No longer needed
Reviewed-⁠by: Brian Paul <brianp@vmware.com>
2015-05-14 14:08:40 -04:00
Alexander von Gluck IV
8362068c1b egl: Add needed extern "C" for C++ access
* Haiku's egl driver is C++ due to the interface natively being C++

Reviewed-⁠by: Brian Paul <brianp@vmware.com>
2015-05-14 14:08:37 -04:00
Samuel Pitoiset
175cbb447a nvc0: remove unused nv50_tsc_wrap_mode() function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-14 13:27:44 -04:00
Samuel Pitoiset
ac1ac94b38 nv50/ir: silence compiler warnings about mismatched tags
These warnings have been detected by Clang 3.6.

codegen/nv50_ir_from_tgsi.cpp:1319:10: warning: struct 'Source' was
previously declared as a class [-Wmismatched-tags] const struct tgsi::Source *code;

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-14 13:27:44 -04:00
Samuel Pitoiset
70651b7041 nv50/ir: remove unused private field cycle to SchedDataCalculator
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-14 13:27:43 -04:00
Samuel Pitoiset
7469f2fd23 nv30: remove unused nvfx_fp_memcpy() function and comment nv40_fp_bra()
The nv40_fp_bra() function in the same file is also unused but this is
the only place where the nv30/nv40 isa is documented.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-14 13:27:43 -04:00
Samuel Pitoiset
48c84a36dd nvc0: do not expose MP counters for nvf0 (GK110+)
This fixes a crash when trying to monitor MP counters because compute
support is not implemented for nvf0.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-14 13:27:43 -04:00
Fredrik Höglund
b9cb7c1980 docs/relnotes: Mark off ARB_direct_state_access for 10.6
v2: Make it clear that ARB_direct_state_access is only available on
    drivers that support GL 2.0+

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:18 +02:00
Fredrik Höglund
d9109cc211 docs: Update the ARB_direct_state_access status
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:18 +02:00
Fredrik Höglund
357bf80caa st/mesa: Enable ARB_direct_state_access
Assume that all drivers that advertise support for NPOT textures
are able to support GL 2.0.

v2: Add a comment.

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:18 +02:00
Fredrik Höglund
a57feba0a3 i965: Enable ARB_direct_state_access
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:18 +02:00
Fredrik Höglund
121030eed8 i915: Enable ARB_direct_state_access
This extension requires OpenGL 2.0, so enable it on gen3 and later.

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:18 +02:00
Fredrik Höglund
d3368e0c9e mesa: Add ARB_direct_state_access checks in query object functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
bebf3c6ab3 mesa: Add ARB_direct_state_access checks in program pipeline functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
9e7149c898 mesa: Add ARB_direct_state_access checks in sampler object functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
36b0579337 mesa: Add ARB_direct_state_access checks in VAO functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
8940957238 mesa: Add ARB_direct_state_access checks in texture functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
cb49940766 mesa: Add ARB_direct_state_access checks in renderbuffer functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
6ad0b7e07a mesa: Add ARB_direct_state_access checks in FBO functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:17 +02:00
Fredrik Höglund
339ed0984d mesa: Add ARB_direct_state_access checks in buffer object functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:16 +02:00
Fredrik Höglund
7d212765a4 mesa: Add ARB_direct_state_access checks in XFB functions
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:16 +02:00
Fredrik Höglund
03420eac0c mesa: Make GL_TEXTURE_CUBE_MAP valid in FramebufferTextureLayer
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:16 +02:00
Fredrik Höglund
30dcaaec35 mesa: Add an extension flag for ARB_direct_state_access
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2015-05-14 15:48:16 +02:00
Laura Ekstrand
9de7a81626 main: Add entry point for NamedFramebufferDrawBuffers.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:16 +02:00
Laura Ekstrand
68c6964b37 main: Refactor DrawBuffers.
This could have added a new DD table entry for DrawBuffers that takes an
arbitrary draw buffer, but, after looking at the existing DD functions,
Kenneth Graunke recommended that we just skip calling the DD functions in the
case of ARB_direct_state_access.  The DD implementations for DrawBuffer(s)
have limited functionality, especially with respect to
ARB_direct_state_access.

[Fredrik: Call the driver function when fb is the bound draw buffer]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
1f0a5f32d3 main: Add entry point for NamedFramebufferReadBuffer.
[Fredrik: Fix the name of the buf parameter in the XML file]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
7518c6b5b2 main: Refactor _mesa_ReadBuffer.
This could have added a new DD table entry for ReadBuffer that takes an
arbitrary read buffer, but, after looking at the existing DD functions,
Kenneth Graunke recommended that we just skip calling the DD functions in the
case of ARB_direct_state_access.  The DD implementations for ReadBuffer
have limited functionality, especially with respect to
ARB_direct_state_access.

[Fredrik: Call the driver function when fb is the bound read buffer]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
642fb71277 main: Add entry point for NamedFramebufferDrawBuffer.
[Fredrik: Fix the name of the buf parameter in the XML file]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
2f32e4847d main: Refactor _mesa_DrawBuffer.
This could have added a new DD table entry for DrawBuffer that takes an
arbitrary draw buffer, but, after looking at the existing DD functions,
Kenneth Graunke recommended that we just skip calling the DD functions in the
case of ARB_direct_state_access.  The DD implementations for DrawBuffer(s)
have limited functionality, especially with respect to
ARB_direct_state_access.

[Fredrik: Call the driver function when fb is the bound draw buffer]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
f8fd8dfee8 main: Refactor _mesa_drawbuffers.
[Fredrik: Whitespace fix]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
9f1db78a83 main: Add stubs for [Get]NamedFramebufferParameteri[v].
The ARB_direct_state_access specification says (as of 2015.02.05):
   "Interactions with OpenGL 4.3 or ARB_framebuffer_no_attachments

       If neither OpenGL 4.3 nor ARB_framebuffer_no_attachments are supported,
       ignore the support for NamedFramebufferParameteri and
       GetNamedFramebufferParameteriv."

This commit adds stubs for these entry points.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
a0329c7b40 main: Fake entry point for glClearNamedFramebufferfi.
Mesa's ClearBuffer framework is very complicated and thoroughly married to the
object binding model.  Moreover, the OpenGL spec for ClearBuffer is also very
complicated.  At some point, we should implement buffer clearing for arbitrary
framebuffer objects, but for now, we will just wrap ClearBuffer.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
bbd9c55d02 main: Fake entry point for glClearNamedFramebufferfv.
Mesa's ClearBuffer framework is very complicated and thoroughly married to the
object binding model.  Moreover, the OpenGL spec for ClearBuffer is also very
complicated.  At some point, we should implement buffer clearing for arbitrary
framebuffer objects, but for now, we will just wrap ClearBuffer.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
43db4b8465 main: Fake entry point for glClearNamedFramebufferuiv.
Mesa's ClearBuffer framework is very complicated and thoroughly married to the
object binding model.  Moreover, the OpenGL spec for ClearBuffer is also very
complicated.  At some point, we should implement buffer clearing for arbitrary
framebuffer objects, but for now, we will just wrap ClearBuffer.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:15 +02:00
Laura Ekstrand
6236c47799 main: Fake entry point for glClearNamedFramebufferiv.
Mesa's ClearBuffer framework is very complicated and thoroughly married to the
object binding model.  Moreover, the OpenGL spec for ClearBuffer is also very
complicated.  At some point, we should implement buffer clearing for arbitrary
framebuffer objects, but for now, we will just wrap ClearBuffer.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
d890fc710f main: Add entry points for InvalidateNamedFramebuffer[Sub]Data.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
65d4a20f1c main: Refactor invalidate_framebuffer_storage.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
b4368ac09d main: Complete error conditions for glInvalidate*Framebuffer.
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
6b284f08ab main: _mesa_blit_framebuffer updates its arbitrary framebuffers.
Previously, we used _mesa_update_state to update the currently bound
framebuffers prior to performing a blit.  Now that _mesa_blit_framebuffer
uses arbitrary framebuffers, _mesa_update_state is not specific enough.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
47b910d275 main: Add entry point for BlitNamedFramebuffer.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
b590c61725 main: Refactor _mesa_update_draw_buffer_bounds.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
39be0c5f6c main: Refactor _mesa_get_clamp_read_color.
This wasn't neccessary for ARB_direct_state_access, but felt like a good idea
for the sake of completeness.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
2cabfd9636 main: Refactor _mesa_[update|get]_clamp_fragment_color.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
c1fe8d841c main: Refactor _mesa_[update|get]_clamp_vertex_color.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
9036a6c0aa main: Refactor _mesa_update_framebuffer.
_mesa_update_framebuffer now operates on arbitrary read and draw framebuffers.
This allows BlitNamedFramebuffer to update the state of its arbitrary read and
draw framebuffers.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:14 +02:00
Laura Ekstrand
1a314f3c51 main: Refactor glBlitFramebuffer.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
df032ef7e0 main: Fix whitespace in blit.c
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
f22fa307de main: Add entry point GetNamedFramebufferAttachmentParameteriv.
[Fredrik: - Update one of the error messages to reflect that the
            framebuffer might not be the bound framebuffer.
          - Whitespace fixes.]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
f93f95928d main: Add entry point for CheckNamedFramebufferStatus.
[Fredrik: - Retain the debugging code in CheckFramebufferStatus.
          - Whitespace fixes.]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
80e9bf2641 main: Fix indents in former get_texture_for_framebuffer functions.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
085c67dc77 main: Major refactor of get_texture_for_framebuffer.
This splits off the (still) rather large chunk that is
get_texture_for_framebuffer into lots of smaller functions specialized to
service the wide variety of unique needs of *FramebufferTexture* entry points.
The result is much cleaner because, rather than having a pile of branches and
confusing conditions (like the boolean layered), the uniqueness is baked into
the entry points. The entry points know whether or not they are layered or use
a textarget.

[Fredrik: - Mention the value of <textarget> in the error message.
          - Rename check_zoffset to check_layer, and zoffset to layer.
            The zoffset parameter was renamed to layer in
            ARB_framebuffer_object.
          - Make layered a GLboolean since the value is visible to the API.
          - Remove EXT suffixes in refactored code.
          - Whitespace fixes.]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
d78c831a14 main: Add entry points for glNamedFramebufferTexture[Layer].
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
a602b21f94 main: Fix indentation in get_texture_for_framebuffer.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
a9f73f7f42 main: Refactor get_texture_for_framebuffer.
This moves a few blocks around so that the control flow is more obvious.  If
the texture is 0, just return true at the beginning of the function.
Likewise, if the texObj is NULL, return true at the beginning of the function
as well.

[Fredrik: Fix the texObj NULL check]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:13 +02:00
Laura Ekstrand
a245e3bdeb main: Split framebuffer_texture.
Split apart utility function framebuffer_texture to better prepare for
implementing NamedFramebufferTexture and NamedFramebufferTextureLayer.  This
should also pave the way for some future cleanup work.

[Fredrik: - Mention which limit was exceeded when <layer> is out of range.
          - Update a comment to reflect that <fb> might not be the bound
            framebuffer.
          - Make it clear that the error message in glFramebufferTexture*D
            refers to the <textarget> parameter.
          - Remove EXT suffixes.]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
69bdc9dcb8 main: Fix an error generated by FramebufferTexture
gl*FramebufferTexture should generate GL_INVALID_VALUE when the
texture doesn't exist.

[Fredrik: Split this change out from the next commit]

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-05-14 15:48:12 +02:00
Fredrik Höglund
8ba7ad8abc mesa: Generate GL_INVALID_VALUE in framebuffer_texture when layer < 0
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-05-14 15:48:12 +02:00
Fredrik Höglund
f9f5c82284 main: Require that the texture exists in framebuffer_texture
Generate GL_INVALID_OPERATION if the texture hasn't been created.

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
8f78c6889d main: Fix the indentation in framebuffer_texture
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
a29318bf0a main: Add entry point for NamedFramebufferRenderbuffer.
[Fredrik: - Remove the DummyRenderbuffer checks now that they are
            done in _mesa_lookup_renderbuffer_err.
          - Fix the <renderbuffertarget> name in error messages.
          - Make the error message in _mesa_framebuffer_renderbuffer
            reflect that <fb> might not be the bound framebuffer.
          - Remove EXT suffixes from GL tokens.]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
3d100372f1 main: Rename framebuffer renderbuffer software fallback.
Rename _mesa_framebuffer_renderbuffer to _mesa_FramebufferRenderbuffer_sw in
preparation for adding the ARB_direct_state_access backend function for
FramebufferRenderbuffer and NamedFramebufferRenderbuffer to share.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
2bb138e7ec main: Add utility function _mesa_lookup_renderbuffer_err.
[Fredrik: Generate an error for non-existent renderbuffers]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
f868de7d6b main: Add glCreateFramebuffers.
[Fredrik: Whitespace fixes]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Laura Ekstrand
6d8eff4af7 main: Add utility function _mesa_lookup_framebuffer_err.
[Fredrik: Generate an error for non-existent framebuffers]

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
2015-05-14 15:48:12 +02:00
Roland Scheidegger
adcf8f8a13 softpipe: enable ARB_texture_view
Some bits were already there for texture views but some were missing.
In particular for cube map views things needed to change a bit.
For simplicity I ended up removing the separate face addr bit (just use
the z bit) - cube arrays didn't use it already, so just follow the same
logic there. (In theory using separate bits could allow for better hash
function but I don't think anyone ever did some measurements of that so
probably not worth the trouble, if we'd reintroduce it we'd certainly
wanted to use the same logic for cube arrays and cube maps.)
Also extend the seamless cube sampling to cube arrays - as there were no
piglit failures before this is apparently untested, but things now generally
work quite the same for cube textures and cube array textures so there
hopefully shouldn't be any trouble...

49 new piglits, 47 pass, 2 fail (both due to fake multisampling).

v2: incorporate Brian's feedback, add sampler view validation,
function rename, formatting fixes.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-13 22:57:50 +02:00
Roland Scheidegger
e6c66f4fb0 llvmpipe: enable ARB_texture_view
All the functionality was pretty much there, just not tested.
Trivially fix up the missing pieces (take target info from view not
resource), and add some missing bits for cubes.
Also add some minimal debug validation to detect uninitialized target values
in the view...

49 new piglits, 47 pass, 2 fail (both related to fake multisampling,
not texture_view itself). No other piglit changes.

v2: move sampler view validation to sampler view creation, update docs.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-13 22:57:50 +02:00
Roland Scheidegger
2712f70d57 gallium/util: fix blitter sampler view target initialization
This was missing, and drivers relying on the target in the view could get
into quite some trouble.

Signed-off-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-05-13 22:57:50 +02:00
Alexander von Gluck IV
cf71e7093c glapi/hgl: Drop extern "C" as it was added to glapi
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-13 15:26:29 -04:00
Alexander von Gluck IV
d27b114eaf glapi: Add extern "C" to glapi_priv.h
* The Haiku glapi has a C++ wrapper around the dispatch code.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-13 15:26:26 -04:00
Alexander von Gluck IV
915d808a56 gallium/st + hgl: Build fixes for Haiku
* No impact risk to any other platforms
* Tracing printf needs stdio.h now due to child header change
* Add missing #/src include directory for util/macros.h
2015-05-13 09:41:30 -05:00
Francisco Jerez
d247615e0d i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().
This problem can easily be reproduced with a number of
ARB_shader_image_load_store piglit tests, which use a buffer object as
PBO for a pixel transfer operation and later on bind the same buffer
to the pipeline as shader image -- The problem is not exclusive to
images though, and is likely to affect other kinds of buffer objects
that can be bound to the 3D pipeline, including vertex, index,
uniform, atomic counter buffers, etc.

CC: 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-05-13 14:28:25 +03:00
Tapani Pälli
58715b7239 i965/fs: set execution size to 8 with simd8 ddy instruction
Commit dd5c825 changed the way how execution size for instructions
get set. Previously it was based on destination register width, now
it is set explicitly when emitting instructions.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90258
2015-05-13 09:08:47 +03:00
Dave Airlie
71fc52072b i965/cs: drop explicit initialisers in C++ file
gcc 4.4.7 really doesn't like them, and they aren't standard
C++, they seem to be a gcc extension.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-13 10:09:48 +10:00
Ilia Mirkin
c696a318ef nouveau: document nouveau_heap
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-12 18:58:49 -04:00
Ilia Mirkin
d06ce2f1df nvc0: switch mechanism for shader eviction to be a while loop
This aligns it to work similarly to nv50. However there's no library
code there, so the whole thing can be freed. Here we end up with an
allocated node that's not attached to a specific program.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86792
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-05-12 18:47:17 -04:00
Ilia Mirkin
380f7611b5 st/mesa: update stencil surface if it comes from texture
Now that ARB_texture_stencil8 is supported, this might happen.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-05-12 18:41:11 -04:00
Alex Deucher
71ba30f778 radeonsi: add new bonaire pci id
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-05-12 14:46:42 -04:00
Marek Olšák
0ea1047d8c st/mesa: translate st_api robustness flags to gl_context flags
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 19:38:45 +02:00
Marek Olšák
f1c42475a5 st/dri: add support for create_context_robustness GLX and EGL extensions
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 19:38:45 +02:00
Marek Olšák
a0ad185803 st/mesa: implement GetGraphicsResetStatus
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 19:38:45 +02:00
Marek Olšák
79ffc08ae8 gallium: add PIPE_CAP_DEVICE_RESET_STATUS_QUERY
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 19:38:31 +02:00
Marek Olšák
cacd0e290a gallium: add an interface for querying a device reset status
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 19:34:20 +02:00
Francisco Jerez
a533d4edf1 clover: Implement locking of the wait_count, _chain and _status members of event.
Tested-by: Tom Stellard <thomas.stellard@amd.com>
CC: 10.5 <mesa-stable@lists.freedesktop.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
4022a468b2 clover: Wrap event::_status in a method to prevent unlocked access.
Tested-by: Tom Stellard <thomas.stellard@amd.com>
CC: 10.5 <mesa-stable@lists.freedesktop.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
2232b929fd clover: Refactor event::trigger and ::abort to prevent deadlock and reentrancy issues.
Refactor ::trigger and ::abort to split out the operations that access
concurrently modified data members and require locking from the
recursive and possibly re-entrant part of these methods.  This will
avoid some deadlock situations when locking is implemented.

Tested-by: Tom Stellard <thomas.stellard@amd.com>
CC: 10.5 <mesa-stable@lists.freedesktop.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
d91d6b3f03 nir: Translate memory barrier intrinsics from GLSL IR.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
f8f8b31847 nir: Translate image load, store and atomic intrinsics from GLSL IR.
v2: Undefine coordinate components not applicable to the target.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
6de78e6b0c nir: Fix indexing of atomic counter arrays with a constant value.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
f1269a3e01 nir: Add memory barrier intrinsic.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
d9e930997f nir: Define image load, store and atomic intrinsics.
v2: Undefine coordinate components not applicable to the target.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 15:47:57 +03:00
Francisco Jerez
ee1a8b5a8c i965/fs: Have component() set the register stride to zero.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 15:47:56 +03:00
Francisco Jerez
4171ef371a i965/fs: Fix offset() for registers with zero stride.
stride == 0 implies that the register has one channel per vector
component.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-12 15:47:56 +03:00
Francisco Jerez
0db663503e i965: Don't forget the force_sechalf flag in lower_load_payload().
Regression from commit 41868bb682.
Fixes a bunch of ARB_shader_image_load_store tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-05-12 15:47:56 +03:00
Francisco Jerez
cbf204069d i965: Document brw_mask_reg().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-12 15:47:56 +03:00
Tapani Pälli
95774ca258 nir: fix sampler lowering pass for arrays
This fixes bugs with special cases where we have arrays of
structures containing samplers or arrays of samplers.

I've verified that patch results in calculating same index value as
returned by _mesa_get_sampler_uniform_value for IR. Patch makes
following ES3 conformance test pass:

	ES3-CTS.shaders.struct.uniform.sampler_array_fragment

v2: remove unnecessary comment (Topi)
    simplify changes and the overall code (Jason)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90114
2015-05-12 14:28:16 +03:00
Neil Roberts
426023050d i965: Use predicate enable bit for conditional rendering w/o stalling
Previously whenever a primitive is drawn the driver would call
_mesa_check_conditional_render which blocks waiting for the result of
the query to determine whether to render. On Gen7+ there is a bit in
the 3DPRIMITIVE command which can be used to disable the primitive
based on the value of a state bit. This state bit can be set based on
whether two registers have different values using the MI_PREDICATE
command. We can load these two registers with the pixel count values
stored in the query begin and end to implement conditional rendering
without stalling.

Unfortunately these two source registers were not in the whitelist of
available registers in the kernel driver until v3.19. This patch uses
the command parser version from intel_screen to detect whether to
attempt to set the predicate data registers.

The predicate enable bit is currently only used for drawing 3D
primitives. For blits, clears, bitmaps, copypixels and drawpixels it
still causes a stall. For most of these it would probably just work to
call the new brw_check_conditional_render function instead of
_mesa_check_conditional_render because they already work in terms of
rendering primitives. However it's a bit trickier for blits because it
can use the BLT ring or the blorp codepath. I think these operations
are less useful for conditional rendering than rendering primitives so
it might be best to leave it for a later patch.

v2: Use the command parser version to detect whether we can write to
    the predicate data registers instead of trying to execute a
    register load command.
v3: Simple rebase
v4: Changes suggested by Kenneth Graunke: Split the
    load_64bit_register function out to a separate patch so it can be
    a shared public function. Avoid calling
    _mesa_check_conditional_render if we've already determined that
    there's no query object. Some styling fixes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 11:20:47 +01:00
Neil Roberts
9585879d46 i956: Add a function to load a 64-bit register from a buffer
Adds brw_load_register_mem64 which is similar to brw_load_register_mem
except that it queues two GEN7_MI_LOAD_REGISTER_MEM commands in order
to load both halves of a 64-bit register. The function is implemented
by splitting the 32-bit version into an internal helper function which
takes a size.

This will later be used to set the 64-bit predicate source registers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 11:20:35 +01:00
Neil Roberts
8a59f2f26f i965: Store the command parser version number in intel_screen
In order to detect whether the predicate source registers can be used
in a later patch we will need to know the version number for the
command parser. This patch just adds a member to intel_screen and does
an ioctl to get the version.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-12 11:20:35 +01:00
Roland Scheidegger
971be2b7c9 docs/GL3: (trivial) mark some tf extensions as done for softpipe/llvmpipe
Those extensions were enabled for ages already.
2015-05-12 04:48:48 +02:00
Emil Velikov
95089bfaeb docs: add news item and link release notes for mesa 10.5.5
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-11 22:07:46 +01:00
Emil Velikov
d4125c41f9 docs: Add sha256 sums for the 10.5.5 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 8ee1a1c08b)
2015-05-11 22:06:13 +01:00
Emil Velikov
22aaa746bd Add release notes for the 10.5.5 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit d88fb40505)
2015-05-11 22:06:11 +01:00
Ilia Mirkin
2b5355c8ab st/mesa: make sure to create a "clean" bool when doing i2b
i2b has to work for all integers, not just 1. INEG would not necessarily
result with all bits set, which is something that other operations can
rely on by e.g. using AND (or INEG for b2i).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
2015-05-11 15:52:17 -04:00
Tom Stellard
9c4dc98b29 clover: Fix a bug with multi-threaded events v2
It was possible for some events never to get triggered if one thread
was creating events and another threads was waiting for them.

This patch consolidates soft_event::wait() and hard_event::wait()
into event::wait() so that hard_event objects will now wait for
all their dependencies to be submitted before flushing the command
queue.

v2:
  - Rename variables
  - Use mutable varibales so we can keep event::wait() const
  - Open code signalled() call so mutex can be atted to signalled
    without deadlocking.

CC: 10.5 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-05-11 18:52:29 +00:00
Tom Stellard
f546902d95 clover: Add a mutex to guard queue::queued_events
This fixes a potential crash where on a sequence like this:

Thread 0: Check if queue is not empty.
Thread 1: Remove item from queue, making it empty.
Thread 0: Do something assuming queue is not empty.

CC: 10.5 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-05-11 18:52:18 +00:00
Matt Turner
73f4010082 i965/fs: Add missing initializer in fs_visitor(). 2015-05-11 11:25:03 -07:00
Adam Jackson
7a58262e58 egl: Remove skeleton implementation of EGL_MESA_screen_surface
No backend wires this up to anything, and the extension spec has been
marked obsolete for 4+ years.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-05-11 14:19:37 -04:00
Axel Davy
13fa84e1bc egl/swrast: Enable config extension for swrast
Enables to use dri config for swrast, like vblank_mode.

Reviewed-by: Dave Airlie <airlied@redhat.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
cdcfe48fb0 egl/wayland: Implement swrast support
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
cd25e52f6b egl/wayland: Simplify dri2_wl_create_surface
This function is always used with EGL_WINDOW_BIT. Pixmaps are forbidden
for Wayland, and PBuffers are unimplemented.

Reviewed-by: Daniel Stone <daniels@collabora.com>.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
f1cc478d89 egl/x11: move dri2_x11_swrast_create_image_khr to egl_dri2_fallback.h
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
4cd546df82 egl/wayland: Implement DRI_PRIME support
When the server gpu and requested gpu are different:
. They likely don't support the same tiling modes
. They likely do not have fast access to the same locations

Thus we do:
. render to a tiled buffer we do not share with the server
. Copy the content at every swap to a buffer with no tiling
that we share with the server.

This is similar to the glx dri3 DRI_PRIME implementation.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
fb0960a14b egl/wayland: Add support for render-nodes
It is possible the server advertises a render-node.
In that case no authentication is needed,
and Gem names are forbidden.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>

v2: do not check for __DRI_IMAGE_DRIVER, but instead
do not advertise __DRI_DRI2_LOADER when on a render-node.
2015-05-11 19:31:44 +02:00
Axel Davy
c4ff6d00cd glx/dri3: Add additional check for gpu offloading case
Checks blitImage is implemented.
Initially having the __DRIimageExtension extension
at version 9 at least meant blitImage was supported.
However some implementation do advertise version >= 9
without implementing it.

CC: 10.5 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
05ac39ac49 doc/egl: Remove depreciated EGL_SOFTWARE
EGL_SOFTWARE is not supported anywhere in the code,
whereas LIBGL_ALWAYS_SOFTWARE is.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:44 +02:00
Axel Davy
6aaf09b93b egl/wayland: properly destroy wayland objects
the wl_registry and the wl_queue allocated weren't destroyed.

CC: 10.5 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-05-11 19:31:43 +02:00
Neil Roberts
bfdae9149e i965/fs: Disable opt_sampler_eot for textureGather
The opt_sampler_eot optimisation seems to break when the last
instruction is SHADER_OPCODE_TG4. A bunch of Piglit tests end up doing
this so it causes a lot of regressions. I can't find any documentation
or known workarounds to indicate that this is expected behaviour, but
considering that this is probably a pretty unlikely situation in a
real use case we might as well disable it in order to avoid the
regressions. In total this fixes 451 tests.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-05-11 12:09:20 +01:00
Tapani Pälli
abf3fefa1a mesa: use _mesa_has_compute_shaders instead of extension check
This was really the original purpose, for enabling the path for
ES3.1 tests without the extension being set. Set also fallthrough
comment for Coverity (caught by Matt).

v2: .. and test the right way, not wrong one (Ilia Mirkin)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-11 08:14:51 +03:00
Marta Lofstedt
4a8cd2799c main: glGetIntegeri_v fails for GL_VERTEX_BINDING_STRIDE
The return type for GL_VERTEX_BINDING_STRIDE is missing,
this cause glGetIntegeri_v to fail.

Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-05-11 08:00:30 +03:00
Dave Airlie
9ab90c058f r600: use pipe->hw prim convert from radeonsi
This avoids future addition to PIPE_PRIM_ from causing regressions
on r600g.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-11 06:43:18 +10:00
Rob Clark
1cbdafc47a freedreno/ir3/nir: fix build break after f752effa
Our lower if/else pass was missed when converting NIR to use linked
lists rather than hashsets to track use/def sets.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-05-10 06:03:53 -04:00
Ilia Mirkin
da136dc07d nv50/ir: only enable mul saturate on G200+
Commit 44673512a8 enabled support for saturating fmul. However
experimentally this does not seem to work on the older chips. Restrict
the feature to G200 (NVA0) and later.

Reported-by: Pierre Moreau <pierre.morrow@free.fr>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: mesa-stable@lists.freedesktop.org
2015-05-09 13:41:51 -04:00
Ilia Mirkin
7892210400 nvc0: reset the instanced elements state when doing blit using 3d engine
Since we update num_vtxelts here, we could otherwise end up with stale
instancing information in the upper bits which wouldn't otherwise get
reset. (Also we run the risk of the previous draw having set the first
element as instanced.)

This appears as one of the causes for the test pointed out in fdo#90363
to fail on nvc0.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90363
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-05-09 13:36:23 -04:00
Ilia Mirkin
e9b1ea29bf nvc0: keep track of PGRAPH state in nvc0_screen
See identical commit for nv50. Destroying the current context and then
creating a new one or switching to another existing context would cause
the "current" state to not be properly initialized, so we save it off in
the screen.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-05-09 13:36:23 -04:00
Ilia Mirkin
f617029db3 nv50: keep track of PGRAPH state in nv50_screen
Normally this is kept in nv50_context, and on switching the active
context, the state is copied from the previous context. However when the
last context is destroyed, this is lost, and a new context might later
be created. When the currently-active context is destroyed, save its
state in the screen, and restore it when setting the current context.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90363
Reported-by: Matteo Bruni <matteo.mystral@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Matteo Bruni <matteo.mystral@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-05-09 13:36:23 -04:00
Kenneth Graunke
d6fb155f30 nir: Fix aggressive typos in nir_from_ssa.c.
s/agressive/aggressive/g

Trivial.
2015-05-08 19:38:14 -07:00
Jason Ekstrand
fb5f411248 nir/search: Save/restore the variables_seen bitmask when matching
Shader-db results on Broadwell:

   total instructions in shared programs: 7152330 -> 7137006 (-0.21%)
   instructions in affected programs:     1330548 -> 1315224 (-1.15%)
   helped:                                5797
   HURT:                                  76
   GAINED:                                0
   LOST:                                  8

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:29:15 -07:00
Jason Ekstrand
e0cfe59c37 nir/search: Assert that variable id's are in range
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:29:15 -07:00
Jason Ekstrand
13facfbd5b nir/search: handle explicitly sized sources in match_value
Previously, this case was being handled in match_expression prior to
calling match_value.  However, there is really no good reason for this
given that match_value has all of the information it needs.  Also, they
weren't being handled properly in the commutative case and putting it in
match_value gives us that for free.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:29:14 -07:00
Jason Ekstrand
f752effa08 nir/nir: Use a linked list instead of a hash set for use/def sets
This commit switches us from the current setup of using hash sets for
use/def sets to using linked lists.  Doing so should save us quite a bit of
memory because we aren't carrying around 3 hash sets per register and 2 per
SSA value.  It should also save us CPU time because adding/removing things
from use/def sets is 4 pointer manipulations instead of a hash lookup.

Running shader-db 50 times with USE_NIR=0, NIR, and NIR + use/def lists:

   GLSL IR Only:        586.4 +/- 1.653833
   NIR with hash sets:  675.4 +/- 2.502108
   NIR + use/def lists: 641.2 +/- 1.557043

I also ran a memory usage experiment with Ken's patch to delete GLSL IR and
keep NIR.  This patch cuts an aditional 42.9 MiB of ralloc'd memory over
and above what we gained by deleting the GLSL IR on the same dota trace.

On the code complexity side of things, some things are now much easier and
others are a bit harder.  One of the operations we perform constantly in
optimization passes is to replace one source with another.  Due to the fact
that an instruction can use the same SSA value multiple times, we had to
iterate through the sources of the instruction and determine if the use we
were replacing was the only one before removing it from the set of uses.
With this patch, uses are per-source not per-instruction so we can just
remove it safely.  On the other hand, trying to iterate over all of the
instructions that use a given value is more difficult.  Fortunately, the
two places we do that are the ffma peephole where it doesn't matter and GCM
where we already gracefully handle duplicates visits to an instruction.

Another aspect here is that using linked lists in this way can be tricky to
get right.  With sets, things were quite forgiving and the worst that
happened if you didn't properly remove a use was that it would get caught
in the validator.  With linked lists, it can lead to linked list corruption
which can be harder to track.  However, we do just as much validation of
the linked lists as we did of the sets so the validator should still catch
these problems.  While working on this series, the vast majority of the
bugs I had to fix were caught by assertions.  I don't think the lists are
going to be that much worse than the sets.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
2c2cd368aa util/list: Add a list validation function
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
addcf41066 util/list: Add list_empty and list_length functions
v2: Don't use C99 when iterating over the list

Acked-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
b31d8983ba util/list: Add C99-based iterator macros
v2: Use LIST_ENTRY instead of container_of in iterators

Acked-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
7a30668ad6 util: Move gallium's linked list to util
The linked list in gallium is pretty much the kernel list and we would like
to have a C-based linked list for all of mesa.  Let's not duplicate and
just steal the gallium one.

Acked-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
258b4194c8 gallium/double_list: s/INLINE/inline and remove the p_compiler include
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
ecc2cfc8b6 nir: Use nir_instr_rewrite_src in copy propagation
We were rolling our own rewrite_src variant in copy-propagation.  Let's
stop doing that and use the ones in core NIR.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
f72a8d1cf0 nir: Add a function for rewriting the condition of an if statement
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
300d729436 nir: Add and use initializer #defines for nir_src and nir_dest
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
6702ebce57 nir: Modernize the out-of-SSA pass
The out-of-SSA pass was one of the first passes written when getting SSA
up-and-going (for obvious reasons).  As such, it came before a lot of the
nifty SSA-based helpers were introduced.  This commit modernizes it so that
we're no longer doing nearly as much manual banging on use/def sets.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:16:13 -07:00
Jason Ekstrand
7ee0216e2d nir/validate: Validate SSA def parent instructions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-05-08 17:16:13 -07:00
Ilia Mirkin
c4ac09e30e nv50/ir: only propagate saturate up if some actual folding took place
The former logic would copy the saturate up to any mul with an immediate
if there was a subsequent mul with a saturate. However we only want to
do that if we collapsed 2 muls by multiplying their immediates (or were
able to put the immediate in as a post-multiplier).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-05-08 18:56:56 -04:00
Ian Romanick
3bdbc1e436 nir: Delete all traces of nir_op_flog
Nothing produces it, and nothing can consume it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-08 12:12:54 -07:00
Ian Romanick
ad51f9b421 nir: Don't produce nir_op_flog from GLSL IR
All paths that produce GLSL IR for NIR lower ir_unop_log.  All paths
that consume NIR will explode if they geta nir_op_flog.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-08 12:12:54 -07:00
Ian Romanick
e0a17f6e31 nir: Delete all traces of nir_op_fexp
Nothing produces it, and nothing can consume it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-08 12:12:54 -07:00
Ian Romanick
a45d55f17c nir: Don't produce nir_op_fexp from GLSL IR
All paths that produce GLSL IR for NIR lower ir_unop_exp.  All paths
that consume NIR will explode if they geta nir_op_fexp.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-08 12:12:54 -07:00
Ian Romanick
5e0dca62a7 prog_to_nir: OPCODE_EXP is not nir_op_fexp
It's a weird thing that provides some values related to 2**x.  It's also
already handled by a case in the switch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-08 12:12:54 -07:00
Neil Roberts
f98c3f3e44 i965/fs: Improve a comment about stripping trailing zeroes
Originally I wrote that removing the first parameter doesn't work but
I didn't know why. I now found a mention of this in the PRM so it's
probably worthing adding it to the comment.
2015-05-08 16:16:56 +01:00
Fredrik Höglund
b004510072 docs: Update the ARB_direct_state_access status
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:04 +02:00
Fredrik Höglund
97b268f1de mesa: Implement GetVertexArrayIndexed[64]iv
v2: Fix the name of the entry point in the error messages.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:04 +02:00
Fredrik Höglund
2ad0268871 mesa: Add support for querying GL_VERTEX_ATTRIB_ARRAY_LONG
This parameter was added in OpenGL 4.3 and GL_ARB_direct_state_access.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:04 +02:00
Fredrik Höglund
4f5160300d mesa: Add a vao parameter to get_vertex_array_attrib
This is needed to implement glGetVertexArrayIndexediv and
glGetVertexArrayIndexed64iv.

v2: Make the vao parameter const.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:04 +02:00
Fredrik Höglund
1085c01121 mesa: Implement GetVertexArrayiv
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
0a895c379e mesa: Implement VertexArrayBindingDivisor
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
f2ef09d44a mesa: Add a vao parameter to vertex_binding_divisor
This is needed to implement VertexArrayBindingDivisor.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
dc2eaaf912 mesa: Implement VertexArrayAttribBinding
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
ade0179f77 mesa: Add a vao parameter to vertex_attrib_binding
This is needed to implement VertexArrayAttribBinding.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
f0030b0f1f mesa: Implement VertexArrayAttrib[I|L]Format
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
fa350eadfb mesa: Add a vao parameter to update_array_format
This is needed to implement VertexArrayAttrib*Format.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
bc6668e35d mesa: Refactor VertexAttrib[I|L]Format
The only difference between these functions is the legal types and
sizes, so consolidate the code into a single vertex_attrib_format()
function and call it from all three entry points.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
308926853d mesa: Implement VertexArrayVertexBuffers
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
cc9b68e9c9 mesa: Implement VertexArrayVertexBuffer
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
c59b5317fc mesa: Add a vao parameter to bind_vertex_buffer
This is needed to implement VertexArrayVertexBuffer and
VertexArrayVertexBuffers.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
7ccc4f3f23 mesa: Implement VertexArrayElementBuffer
v2: Add a doxygen comment.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:03 +02:00
Fredrik Höglund
c99efbd3c2 mesa: Implement EnableVertexArrayAttrib
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:02 +02:00
Fredrik Höglund
96b6463463 mesa: Implement DisableVertexArrayAttrib
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:02 +02:00
Fredrik Höglund
6c37acfbed mesa: Keep track of the last looked-up VAO
This saves the cost of repeated hash table lookups when the same
vertex array object is referenced in a sequence of calls such as:

    glVertexArrayAttribFormat(vao, ...);
    glVertexArrayAttribBinding(vao, ...);
    glEnableVertexArrayAttrib(vao, ...);
    ...

Note that VAO's are container objects that are not shared between
contexts.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:02 +02:00
Fredrik Höglund
2830c2fbeb mesa: Add _mesa_lookup_vao_err
This is a convenience function that generates GL_INVALID_OPERATION
when the array object doesn't exist.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:02 +02:00
Fredrik Höglund
a1f48268b4 mesa: Implement CreateVertexArrays
v2: Update the documentation for gen_vertex_arrays().

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-05-08 15:31:02 +02:00
Neil Roberts
e51bad669a i965/skl: In opt_sampler_eot always set destination register to null
opt_sampler_eot enables a direct write to framebuffer from a sample.
In order to do this the sample message needs to have a message header
so if there wasn't one already then the function adds one. In addition
the function sets the destination register to null because it's no
longer used. However it was only doing this in cases where it was
adding a message header. This patch just moves setting the destination
so that it happens even if there's a messge header. In practice this
doesn't seem to make any difference but it's a bit cleaner.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-05-08 12:40:22 +01:00
Neil Roberts
1c5de556c5 i965/fs: Set the header_size on LOAD_PAYLOAD in opt_sampler_eot
Commit 94ee908448 added a header size parameter to the function to
create the LOAD_PAYLOAD instruction. However this broke
opt_sampler_eot which manually constructs the instruction and so
wasn't setting the header_size. This ends up making the parameters for
the send message all have the wrong location and it all falls apart.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-05-08 12:40:14 +01:00
Martin Peres
e4b2973607 docs: document the LIBGL_DRI3_DISABLE environment variable
Suggested-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-08 13:36:52 +03:00
Dave Airlie
ff64411c84 docs: update ARB_vertex_attrib_64bit status
Add to GL3.txt and release notes.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:22:12 +10:00
Dave Airlie
ef83c9b762 st/mesa: add double input support including lowering (v3.1)
This takes a different approach to previously, we cannot index into the
inputMapping with anything but the mesa attribute index, so we can't use
the just add one to index trick, we need more info to add one to it
after we've mapped the input.

(Fixed copy propgation and cleaned up a little)

v2: drop float64 format check, just attr->Doubles.
merge enable patch.
v3: cleanup code a bit.
v3.1: minor review fixups (comment, newline) (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:02 +10:00
Dave Airlie
c4254ee526 mesa/vbo: add support for 64-bit vertex attributes. (v1)
This adds support in the vbo and array code to handle
double vertex attributes.

v0.2: merge code to handle doubles in vbo layer.
v1: don't use v0, merge api_array elt code.

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
ad208d975a glsl: check total count of multi-slot double vertex attribs
The spec is vague all over the place about this, but this seems
to be the intent, we can probably make this optional later if
someone makes hw that cares and writes a driver.

Basically we need to double count some of the d types but
only for totalling not for slot number assignment.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
023fc344da glsl: track which program inputs are doubles
instead of doing the attempts at dual slot handling here,
let the backend do it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
5d6190e496 glsl: add ARB_vertex_attrib_64bit support. (v2)
Just more boilerplate stuff.

v2:
bad fallthrough on versioning,
this is my ugly but self contained solution (Ian)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
fc71ae7c57 mesa: add ARB_vertex_attrib_64bit to extensions. (v2)
Just add the boilerplate bits.

v2: add to version.c

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
5a7f04925f mapi: add GL_ARB_vertex_attrib_64bit support
This just adds the glapi bits.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
731b7c49bb st/glsl_to_tgsi: fix ir_assignment hack doing bad things for doubles
This hack for fixing gl_FragDepth apparantly caused a GLSL shader
outputting a single double to try and output a dvec4, but we hadn't
assigned outputs for the secondary bit.

This avoids going into the hack code for scalar doubles.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Topi Pohjolainen
b1119ce838 i965/wm/gen6: Add option for disabling statistics collection
Normally this is always needed but for internal blits and clears
we need to be able to disable it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-07 22:30:18 +03:00
Topi Pohjolainen
dae7183cdd i965/wm/gen6: Refactor state setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-07 22:30:17 +03:00
Anuj Phogat
d14f3e14b4 i965: Remove unused variables
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-05-07 11:43:01 -07:00
Anuj Phogat
15259d63e8 i965: Change the order of conditions tested in if
Reduces the number of conditions tested in if to one in case of
non-integer formats. Makes no functional changes.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-07 11:43:01 -07:00
Matt Turner
8e029105c2 nir: Allow feq/fne/ieq/ine to be optimized with inot.
instructions in affected programs:     380 -> 376 (-1.05%)
helped:                                2

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
f5cf74d8ba nir: Recognize (a < c || b < c) as min(a, b) < c.
... and (a >= c) || (b >= c) as max(a, b) >= c.

Similar to commit 97e6c1b9.

total instructions in shared programs: 6182276 -> 6182180 (-0.00%)
instructions in affected programs:     6400 -> 6304 (-1.50%)
helped:                                68
HURT:                                  4

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
ceb8b739ce nir: Recognize trivial min/max.
No changes, but does prevent some regressions in the next commit.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
8ae559971a nir: Recognize i2b(b2i(x)) as x.
Helps the same set of programs as the previous commit.

instructions in affected programs:     4490 -> 4346 (-3.21%)
helped:                                8

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
74697e2844 nir: Recognize imul(b2i(a), b2i(b)) as a logical AND.
Four shaders in Unreal 4's Sun Temple are helped, and gain SIMD16
because we avoid an integer multiplication.

instructions in affected programs:     2353 -> 2245 (-4.59%)
helped:                                4
GAINED:                                4

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Chad Versace
c636284ee8 i965/sync: Implement DRI2_Fence extension
This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync.

Below is the difference in piglit results, before and after this patch.
No regressions and several tests improve from 'skip' to 'pass'. Out of
EGL_KHR_fence_sync tests, two of the multithreaded tests skip; all other
tests pass.

  cmdline: piglit run -p gbm -t sync tests/quick.py
  mesa: master@1ac7db0
  piglit: 4069bec
  hw: Ivybridge

        | before after
  ------+-------------
   pass |     32    46
   fail |      0     0
  crash |      0     0
   skip |     35    21
  total |     67    67

v2:
  - Set fence->signalled = true in brw_fence_has_completed() too.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:22 -07:00
Chad Versace
2516d835b1 i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'
I'm about to implement DRI2_Fenc in intel_syncobj.c.  To prevent
madness, we need to prefix functions for GL_ARB_sync with 'gl' and
functions for DRI2_Fence with 'dri'. Otherwise, the file will become
a jumble of similiarly named functions.

For example:
    old-name:      intel_client_wait_sync()
    new-name:      intel_gl_client_wait_sync()
    soon-to-come:  intel_dri_client_wait_sync()

I wrote this renaming commit separately from the commit that implements
DRI2_Fence because I wanted the latter diff to be reviewable.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
19b5a82fda i915/sync: Return early when calloc fails
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
00f3c7baeb i965/sync: Return NULL when calloc fails
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
9cf9a2dec5 i915/sync: Don't crash when deleting sync object
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.

Bug found by code inspection.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
a93ab73a07 i965/sync: Don't crash when deleting sync object
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.

Bug found by code inspection.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
a6bfdd7b46 egl/dri2: Fix codestyle in a comment
Pointed out by Kenneth Graunke. Trivial fix.
2015-05-07 08:09:07 -07:00
Martin Peres
cedd5008da glx: report which DRI version is used when in verbose debug mode
This should make it more obvious in bug reports while also removing
any sort of guesswork for developers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-07 16:56:14 +03:00
Vinson Lee
cf5e015f71 glapi: Add positional argument specifier.
Fix build error introduced with commit 1c5a57a "glapi/es3.1: Add support
for GLES versions > 3.0" with Python < 2.7.

  File "src/mapi/glapi/gen/gl_genexec.py", line 230, in <module>
    printer.Print(api)
  File "src/mapi/glapi/gen/gl_XML.py", line 120, in Print
    self.printBody(api)
  File "src/mapi/glapi/gen/gl_genexec.py", line 187, in printBody
    condition_parts.append('(ctx->API == API_OPENGLES2 && ctx->Version >= {})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-05-06 23:26:21 -07:00
Ilia Mirkin
55b66dc4de nv50/ir: add SHL to the list of U32 opcodes
Having the wrong inferred type prevents a number of optimizations,
including constant propagation (since float immediates work differently
than integer immediates).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-06 20:50:03 -04:00
Ian Romanick
51e3453785 i965: Sort extension enable lists
Sort by GEN, then sort by extension name.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-06 13:05:18 -07:00
Vinson Lee
382b1a36e3 r600g: Fix Clang return-type build error.
Fix Clang return-type error introduced with commit
96f164f6f0 "gallium: make
pipe_context::begin_query return a boolean".

  CC       r600_query.lo
r600_query.c:443:3: error: non-void function 'r600_begin_query' should return a value [-Wreturn-type]
                return;
                ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-05-06 12:21:34 -07:00
Kenneth Graunke
0c0ca55711 i965/fs: Allow copy propagation on ATTR file registers.
This especially helps with NIR because we currently emit MOVs at the top
of the shader to copy from various ATTR registers to a giant VGRF array
of all inputs.  (This could potentially be done better, but since
there's only ever one write to each register, it should be trivial to
copy propagate away...)

With NIR - only vertex shaders:
total instructions in shared programs: 3129373 -> 2889581 (-7.66%)
instructions in affected programs:     3119717 -> 2879925 (-7.69%)
helped:                                20833

Without NIR - only vertex shaders:
total instructions in shared programs: 2745901 -> 2724483 (-0.78%)
instructions in affected programs:     693426 -> 672008 (-3.09%)
helped:                                3516

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
7a75b55a01 i965/fs_inst: Get rid of the effective_width field
The effective_width field was an ill-concieved hack to get around issues in
the LOAD_PAYLOAD instruction.  Now that the LOAD_PAYLOAD instruction is far
more sane, this field can die.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
41868bb682 i965/fs: Rework the fs_visitor LOAD_PAYLOAD instruction
The newly reworked instruction is far more straightforward than the
original.  Before, the LOAD_PAYLOAD instruction was lowered by a the
complicated and broken-by-design pile of heuristics to try and guess
force_writemask_all, exec_size, and a number of other factors on the
sources.

Instead, we use the header_size on the instruction to denote which sources
are "header sources".  Header sources are required to be a single physical
hardware register that is copied verbatim.  The registers that follow are
considered the actual payload registers and have a width that correspond's
to the LOAD_PAYLOAD's exec_size and are treated as being per-channel.  This
gives us a fairly straightforward lowering:

 1) All header sources are copied directly using force_writemask_all and,
    since they are guaranteed to be a single register, there are no
    force_sechalf issues.

 2) All non-header sources are copied using the exact same force_sechalf
    and force_writemask_all modifiers as the LOAD_PAYLOAD operation itself.

 3) In order to accommodate older gens that need interleaved colors,
    lower_load_payload detects when the destination is a COMPR4 register
    and automatically interleaves the non-header sources.  The
    lower_load_payload pass does the right thing here regardless of whether
    or not the hardware actually supports COMPR4.

This patch commit itself is made up of a bunch of smaller changes squashed
together.  Individual change descriptions follow:

i965/fs: Rework fs_visitor::LOAD_PAYLOAD

   We rework LOAD_PAYLOAD to verify that all of the sources that count as
   headers are, indeed, exactly one register and that all of the non-header
   sources match the destination width.  We then take the exec_size for
   LOAD_PAYLOAD directly from the destination width.

i965/fs: Make destinations of load_payload have the appropreate width

i965/fs: Rework fs_visitor::lower_load_payload

   v2: Don't allow the saturate flag on LOAD_PAYLOAD instructions

i965/fs_cse: Support the new-style LOAD_PAYLOAD

i965/fs_inst::is_copy_payload: Support the new-style LOAD_PAYLOAD

i965/fs: Simplify setup_color_payload

   Previously, setup_color_payload was a a big helper function that did a
   lot of gen-specific special casing for setting up the color sources of
   the LOAD_PAYLOAD instruction.  Now that lower_load_payload is much more
   sane, most of that complexity isn't needed anymore.  Instead, we can do
   a simple fixup pass for color clamps and then just stash sources
   directly in the LOAD_PAYLOAD.  We can trust lower_load_payload to do the
   right thing with respect to COMPR4.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
94ee908448 i965/fs: Make LOAD_PAYLOAD take a header size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
74dccdad4b i965/fs: Make emit_single_fb_write take an explicit exec_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
32af7d4188 i965/fs_inst: Add an is_copy_payload helper
This commit adds a new is_copy_payload helper to fs_inst that takes the
place of the similarly named functions in cse and register coalesce.  The
two is_copy_payload functions in CSE and register coalesce were subtly
different and potentially subtly broken.  The new version unifies the two
and should be more correct.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
76c1086f2d i965: Change header_present to header_size in backend_instruction
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
a9ccb14d14 i965/fs_cse: Factor out code to create copy instructions
v2: Get rid of the block parameter and make src a const reference

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:29 -07:00
Jason Ekstrand
cf4607e853 i965/fs: Make half(fs_reg, unsigned) handle register files more explicitly
Previously, we had a special case for uniforms and immediates and then a
bunch of asserts for various other pessimal things.  This commit changes it
so that it explicitly does something on each register file.  Some of them
are disallowed and others are treated properly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:29 -07:00
Francisco Jerez
88414de45e i965/fs: Fix passing an immediate to half().
Immediates are generally uniform, they yield the same value to both
halves of any instruction.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-06 10:29:29 -07:00
Jeremy Huddleston Sequoia
5b2d3480f5 swrast: Build fix for darwin
Fixes regression from commit 64b1dc4449

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90147
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
CC: jon.turney@dronecode.org.uk
CC: ionic@macports.org
2015-05-06 10:04:05 -06:00
Chad Versace
b0f410a2a0 egl/dri2: Check return value of __DRI2fence::create_fence()
If it returns NULL, then return early with an error.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-05-06 07:55:41 -07:00
Roland Scheidegger
b8a1495106 draw: (trivial) fix out-of-bounds vector initialization
Was off-by-one. llvm says inserting an element with an index higher than the
number of elements yields undefined results. Previously such inserts were
ignored but as of llvm revision 235854 the vector gets replaced with undef,
causing failures.
This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in
https://llvm.org/bugs/show_bug.cgi?id=23424.

Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
2015-05-06 16:51:09 +02:00
Martin Peres
9891fc329b main/queryobj: add GL_QUERY_TARGET support to GetQueryObjectiv()
This was missing from my patchset to support the query-related entry
points of Direct State Access.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-06 15:26:12 +03:00
Chia-I Wu
ef5d4bcc3a ilo: silence a compiler warning
Silence

  ilo_query.c:120:7: warning: 'return' with no value, in function returning non-void

since commit 96f164f6.
2015-05-06 16:35:30 +08:00
Tapani Pälli
818cc90535 mesa: support compute stage in _mesa_program_resource_prop
Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-06 11:12:01 +03:00
Tapani Pälli
3706e5dbc9 glsl: mark special built-in inputs referenced by vertex stage
Refactoring done on active attribute queries did not take in to
account special built-in inputs for the vertex stage. This commit
sets them referenced by vertex stage so that they get enumerated
properly.

Fixes Piglit test 'get-active-attrib-returns-all-inputs' failure.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90243
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
2015-05-06 11:10:51 +03:00
Chris Forbes
1fcdb2ce79 relnotes: Note support for viewport arrays on i965/Gen6.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2015-05-06 19:05:17 +12:00
Chris Forbes
5fc23375e8 i965/gen6: Enable ARB_viewport_array and AMD_vertex_shader_viewport_index
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:58 +12:00
Chris Forbes
c41f625200 i965/gen6: Upload all the SF viewports
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:57 +12:00
Chris Forbes
2a8835d485 i965/gen6: Upload all the clip viewports
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:55 +12:00
Chris Forbes
0374159b0c i965/gen6: setup limits for ARB_viewport_array
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:38 +12:00
Brian Paul
212f26bb60 st/mesa: fix pipe_query_result result initializer
Fixes MSVC build error.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-05 16:00:54 -06:00
Brian Paul
062e2b06b2 st/mesa: fix st_NewPerfMonitor() declaration
Was missing the context parameter.  Fixes MSVC warning.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-05 16:00:53 -06:00
Brian Paul
0beaf1cd9a glsl: add parens in shader_integer_mix() to silence compiler warning
Silences gcc warning:
builtin_functions.cpp:204:23: warning: suggest parentheses around '&&'
within '||' [-Wparentheses]

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-05 16:00:53 -06:00
Brian Paul
f7bdb2f372 st/mesa: also try PIPE_FORMAT_R10G10B10A2_UNORM for GL_RGB10
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-05 15:27:52 -06:00
Samuel Pitoiset
cea910bc28 nvc0: all queries use an unsigned 64-bits integer by default
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:36 +03:00
Samuel Pitoiset
35a9286be6 nvc0: make begin_query return false when all MP counters are used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:36 +03:00
Samuel Pitoiset
3a365df665 docs: mark GL_AMD_performance_monitor on nvc0 for the 10.6.0 release
Other drivers which want to enable this extension must expose groups of
GPU hardware performance counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:36 +03:00
Samuel Pitoiset
ed7d3886cc nvc0: define driver-specific query groups
This patch defines "Driver statistics" and "MP counters" groups, but
only the latter will be exposed through GL_AMD_performance_monitor.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:36 +03:00
Christoph Bumiller
4cd1cfb983 st/mesa: implement GL_AMD_performance_monitor
This is based on the original patch of Christoph Bumiller.

v2 (Samuel Pitoiset):
 - improve Gallium interface for this extension
 - rewrite some parts of the original code
 - fix compilation errors and piglit tests

v3:
 - only enable this extension when the underlying driver expose GPU counters
 - get rid of the ring buffer of queries

v4:
 - add a debug message when the maximum number of counters has been
   reached

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:36 +03:00
Samuel Pitoiset
96f164f6f0 gallium: make pipe_context::begin_query return a boolean
GL_AMD_performance_monitor must return an error when a monitoring
session cannot be started.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:36 +03:00
Samuel Pitoiset
546ec980f8 gallium: replace pipe_driver_query_info::max_value by a union
This allows queries to return different numeric types.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:35 +03:00
Samuel Pitoiset
d5b2832c11 gallium: add new numeric types to pipe_query_result
This will be used by GL_AMD_performance_monitor.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:35 +03:00
Samuel Pitoiset
b620829b5e gallium: add new fields to pipe_driver_query_info
According to the spec of GL_AMD_performance_monitor, valid type values
returned are UNSIGNED_INT, UNSIGNED_INT64_AMD, PERCENTAGE_AMD, FLOAT.
This also introduces the new field group_id in order to categorize
queries into groups.

v2: add PIPE_DRIVER_QUERY_TYPE_BYTES

v3: fix incorrect query type for radeon and svga drivers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:35 +03:00
Samuel Pitoiset
f137f5c691 gallium: add pipe_screen::get_driver_query_group_info
Driver queries are organized as a single hierarchy where queries are
categorized into groups. Each group has a list of queries and a maximum
number of queries that can be sampled. The list of available groups can
be obtained using pipe_screen::get_driver_query_group_info.

This will be used by GL_AMD_performance monitor.

v2: add group type (CPU/GPU)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>
2015-05-06 00:03:35 +03:00
Tim Rowley
ce01c0af70 mesa: fix shininess check for ffvertex_prog v2
Switch to using VERT_BIT_GENERIC macro, as varying_vp_inputs is a
bitmask.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-05-05 16:20:08 -04:00
Marius Predut
24ecf37ac0 i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN7
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
    Add code comments. re-word wrap the commit message.
    Add a complete bugzillia list.
    Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-05-05 11:56:20 -07:00
Kenneth Graunke
d376c3549b i965: Fix missing type in local variable declaration.
Trivial.  Fixes the following compiler warning (from GCC 5.1.0):

brw_context.c:629:10: warning: type defaults to ‘int’ in declaration
of ‘simd_size’ [-Wimplicit-int]

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-05 11:52:15 -07:00
Matt Turner
07b49f126a i965/vec4: Use same type for immediate, for compaction. 2015-05-05 11:44:37 -07:00
Marius Predut
a9b04d8a0d i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
    Add code comments. re-word wrap the commit message.
    Add a complete bugzillia list.
    Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-05-05 11:44:37 -07:00
Matt Turner
6da2d71888 i965: Remove end-of-thread SEND alignment code.
This was present in Eric's initial implementation of the compaction code
for Sandybridge (commit 077d01b6). There is no documentation saying this
is necessary, and removing it causes no regressions in piglit on any
platform.
2015-05-05 11:44:37 -07:00
Boyan Ding
28090b30dd i965: Add XRGB8888 format to intel_screen_make_configs
Some application, such as drm backend of weston, uses XRGB8888 config as
default. i965 doesn't provide this format, but before commit 65c8965d,
the drm platform of EGL takes ARGB8888 as XRGB8888. Now that commit
65c8965d makes EGL recognize format correctly so weston won't start
because it can't find XRGB8888. Add XRGB8888 format to i965 just as
other drivers do.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-05-05 14:43:18 +01:00
Emil Velikov
8da47e8a69 nir: add nir_array.h to the sources list
Otherwise `make distcheck' will fail.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-05 14:39:16 +01:00
Samuel Iglesias Gonsalvez
08a4639e81 glsl: don't lower fragdata array if the output data types don't match
Commit 7e414b5864 broke the gl_FragData array
into separate gl_FragData[i] variables, so drivers can eliminate useless
writes to gl_FragData improving their performance.

The problem occurs when GLSL IR code is linked in the following case:

* The FS output variable base data type does not match gl_FragData one (float
  vector)
* The FS output variable is replaced by gl_out_FragDataX because of commit
  7e414b5864 with X from 0 to GL_MAX_DRAW_BUFFERS.

Then the FS output variable base data type is lost in the resulting GLSL IR,
making that the driver does a wrong assignment to gl_out_FragData components
because of unmatching data types.

This patch reverts the fragdata array lowering when the output var base data type
doesn't match gl_out_FragData, i.e., when output variable base data type is
not a float or a float vector.

This patch fixes 250 dEQP tests (tested in an Intel Haswell machine)

dEQP-GLES3.functional.fragment_out.random.* (22 failed tests)
dEQP-GLES3.functional.fragment_out.array.uint.* (120 failed tests)
dEQP-GLES3.functional.fragment_out.array.int.* (108 failed tests)

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-05 12:50:22 +02:00
Neil Roberts
4ab8d59a23 i965/skl: Align compressed textures to four times the block size
On Skylake it is possible to choose your own alignment values for
compressed textures but they are expressed as a multiple of the block
size. The minimum alignment value we can use is 4 so we effectively
have to align to 4 times the block size. This patch makes it initially
set mt->align_[wh] to the large alignment value and then later divides
it by the block size so that it can be uploaded as part of the surface
state.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-05-05 10:19:16 +01:00
Dave Airlie
b5045e2991 egl: image_dma_buf_export - use KHR 64-bit type
After talking to Jon Leech he suggested this should be fine.

update spec to the version in the registry.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-05 12:19:40 +10:00
Ian Romanick
1c5a57aee1 glapi/es3.1: Add support for GLES versions > 3.0
Make the checks in the Python script and the generated code more generic
to support arbitrary GLES versions >= 2.0.

The updated dispatch_sanity.cpp test discovered this problem.  Without
this, the next patch would erroneously enable GLES 3.1 functions in GLES
2.0 and GLES 3.0.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
23d2f63b58 glsl/es3.1: Allow misc ARB_gpu_shader5 built-ins in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
cea605d373 glsl/es3.1: Allow textureGather and textureGatherOffset in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
0e1655c6bd glsl/es3.1: Allow enhnaced packing functions in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
ad14f44b3e glsl/es3.1: Allow interger mix built-ins in GLSL ES 3.10
v2: Add missing lexer support.  Noticed by Tapani.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> [v1]
2015-05-04 13:49:58 -07:00
Ian Romanick
dd61475d56 glsl/es3.1: Allow separate shader objects in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
2dcc535300 glsl/es3.1: Allow explicit uniform locations in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
7038370bd1 glsl/es3.1: Allow 3.10 ES shaders in a GLES 3.1 context
Currently no 3.10 ES features (beyond 3.00 ES) are enabled.  That will
come later.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
7efc11e071 mesa/es3.1: Add _mesa_is_gles31 helper
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
56030a75ed docs/GL3: Update GLES 3.1 dependencies
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
6c9c317caf glsl: Add glsl_parser_state::has_atomic_counters helper
v2: Change GL version from 400 to 420.  Noticed by Tapani and Ilia.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
fa3475b269 mesa: Use bool in _mesa_is_ helpers instead of GLboolean
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:58 -07:00
Ian Romanick
1ec6523fcf mesa: Trivial coding standards cleanups
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:57 -07:00
Ian Romanick
5a845cf898 mesa: Use bool instead of GLboolean
v2: Squash in whitespace fixes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 13:49:44 -07:00
Ian Romanick
8b103cf636 glsl: Silence unused parameter warnings
I opted to comment out "last_field" because it was not obvious what the
meaning of the dangling bool would be.  For the other parameters, the
meaning was more intuitive without the name.

link_uniform_blocks.cpp:70:65: warning: unused parameter 'name' [-Wunused-parameter]
    virtual void enter_record(const glsl_type *type, const char *name,
                                                                 ^
link_uniform_blocks.cpp:77:65: warning: unused parameter 'name' [-Wunused-parameter]
    virtual void leave_record(const glsl_type *type, const char *name,
                                                                 ^
link_uniform_blocks.cpp:93:62: warning: unused parameter 'record_type' [-Wunused-parameter]
                             bool row_major, const glsl_type *record_type,
                                                              ^
link_uniform_blocks.cpp:94:34: warning: unused parameter 'last_field' [-Wunused-parameter]
                             bool last_field)
                                  ^
link_uniforms.cpp:547:65: warning: unused parameter 'name' [-Wunused-parameter]
    virtual void enter_record(const glsl_type *type, const char *name,
                                                                 ^
link_uniforms.cpp:556:65: warning: unused parameter 'name' [-Wunused-parameter]
    virtual void leave_record(const glsl_type *type, const char *name,
                                                                 ^
link_uniforms.cpp:567:34: warning: unused parameter 'last_field' [-Wunused-parameter]
                             bool last_field)
                                  ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-04 13:49:04 -07:00
Ian Romanick
778c7f149a mesa: Restore functionality to dispatch sanity test
Along with a couple secondary goals, the dispatch sanity test had two
major, primary goals.

1. Ensure that all functions part of an API version are set in the
   dispatch table.

2. Ensure that functions that cannot be part of an API version are not
   set in the dispatch table.

Commit 4bdbb58 removed the tests ability to fulfill either of its
primary goals by removing anything that used _mesa_generic_nop().  It
seems like the problem on Windows could have been resolved by adding the
NULL context pointer check from nop_handler to _mesa_generic_nop().
There is, however, some debugging benefit to actually getting the
(supposed) function name logged in the "unsupported function called"
message.

The preceding commit added a function, _glapi_new_nop_table, that
allocates a table of per-entry point no-op functions.  Restore the
ability to actually validate the sanity of the dispatch table by using
_glapi_new_nop_table.

Previous to this commit removing a function from one of the
*_functions_possible lists would not cause the test to fail.  With this
commit removing such a function will result in failure, as is expected.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-05-04 13:27:21 -07:00
Francisco Jerez
e1ae0c3bc3 i965: Fix variable indexing of sampler arrays under non-uniform control flow.
ARB_gpu_shader5 requires sampler array indexing expressions to be
dynamically uniform, this however doesn't have any implications on the
control flow that leads to the evaluation of that expression being
uniform.  Use emit_uniformize() to obtain an arbitrary live value from
the binding table index calculation instead of assuming that the first
channel is always live.

Fixes the following Piglit test cases:
  arb_gpu_shader5/execution/sampler_array_indexing/fs-nonuniform-control-flow.shader_test
  arb_gpu_shader5/execution/sampler_array_indexing/vs-nonuniform-control-flow.shader_test

part of the series:
  http://lists.freedesktop.org/archives/piglit/2015-February/014615.html

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
b234537cc3 i965: Fix variable indexing of UBO arrays under non-uniform control flow.
ARB_gpu_shader5 requires UBO array indexing expressions to be
dynamically uniform, this however doesn't have any implications on the
control flow that leads to the evaluation of that expression being
uniform.  Use emit_uniformize() to obtain an arbitrary live value from
the binding table index calculation instead of assuming that the first
channel is always live.

Fixes the following Piglit tests:
  arb_gpu_shader5/execution/ubo_array_indexing/fs-nonuniform-control-flow.shader_test
  arb_gpu_shader5/execution/ubo_array_indexing/vs-nonuniform-control-flow.shader_test

part of the series:
  http://lists.freedesktop.org/archives/piglit/2015-February/014616.html

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
046abc998c i965: Define helper function to copy an arbitrary live component from some register.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
3da9f708d4 i965: Perform basic optimizations on the FIND_LIVE_CHANNEL opcode.
v2: Save some CPU cycles by doing 'return progress' rather than
    'depth++' in the discard jump special case.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 17:44:17 +03:00
Francisco Jerez
715bc6d8b1 i965: Introduce the FIND_LIVE_CHANNEL pseudo-opcode.
This instruction calculates the index of an arbitrary channel enabled
in the current execution mask.  It's expected to be used as input for
the BROADCAST opcode, but it's implemented as a separate instruction
rather than being baked into BROADCAST because FIND_LIVE_CHANNEL has
no dependencies so it can always be CSE'ed with other instances of the
same instruction within a basic block.

v2: Whitespace fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
f2fad0dc80 i965: Perform basic optimizations on the BROADCAST opcode.
v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
c74511f5dc i965: Introduce the BROADCAST pseudo-opcode.
The BROADCAST instruction picks the channel from its first source
given by an index passed in as second source.  This will be used in
situations where all channels from the same SIMD thread have to agree
on the value of something, e.g. a surface binding table index.

This is in particular the case for UBO, sampler and image arrays,
which can be indexed dynamically with the restriction that all active
SIMD channels access the same index, provided to the shared unit as
part of a single scalar field of the message descriptor.  Simply
taking the index value from the first channel as we were doing until
now is incorrect, because it might contain an uninitialized value if
the channel had previously been disabled by non-uniform control flow.

v2: Minor style fixes.  Improve commit message.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
ce0e151721 glsl: Keep track of the early_fragment_tests flag in gl_shader.
And rename _mesa_glsl_parse_state::early_fragment_tests to
fs_early_fragment_tests for consistency with other FS-specific flags in the
same struct.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:17 +03:00
Francisco Jerez
6c1f6f8291 glsl: Error out on invalid uses of the early_fragment_tests layout qualifier.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
b5994d24d8 glsl: Forbid use of image qualifiers in declarations of type other than image.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
3f8558650d glsl: Split off memory qualifiers from storage qualifiers.
Image memory qualifiers (coherent, volatile, restrict, readonly and writeonly)
follow slightly different rules from storage qualifiers, e.g. the uniqueness
rule doesn't apply.  Make them a separate non-terminal.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
f64edfdc44 glsl: Forbid opaque variables as operands of the ternary operator.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
b5854ee72b mesa: Update image unit state when glBindImageTexture is called with texture=0.
There's no indication in the spec that the image unit state other than the
bound texture object shouldn't be updated when glBindImageTexture() is called
passing the zero texture as argument.  It's very unlikely that any application
would ever have relied on this, but it's easy to get right, and it fixes the
"state" ARB_shader_image_load_store piglit test.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
b663d6bc6f mesa: Initialize image units to default state on context creation.
This is the required initial image unit state according to "Table 23.45. Image
State (state per image unit)" of the OpenGL 4.3 specification.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
1b9990e373 mesa: Implement image uniform queries.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
cad0cf4cee mesa: Validate original image internal format rather than derived mesa format.
This matches what _mesa_BindImageTextures() does.  The derived image format
(gl_texture_image::TexFormat) isn't necessarily equivalent to the internal
format of the texture image.  If a forbidden internal format has been
specified we need to mark the image unit as invalid as required by the spec,
regardless of the derived format.  Fixes the "invalid"
ARB_shader_image_load_store piglit test.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
4e4855f1de mesa: Call _mesa_test_texobj_completeness() before using _MaxLevel in image validation.
gl_texture_object::_MaxLevel doesn't have any meaningful value until
_mesa_test_texobj_completeness() has been run.  Fixes the "level"
ARB_shader_image_load_store piglit test.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:16 +03:00
Francisco Jerez
f74ba58f84 mesa: Add support for binding a buffer texture to a shader image unit.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:15 +03:00
Francisco Jerez
8424cafbac mesa: Add extern "C" guards to shaderimage.h to allow inclusion from C++ code.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:15 +03:00
Francisco Jerez
dded5271e4 mesa: Export shader image format to mesa format conversion function.
This function will be useful for back-ends to translate an image internal
format as specified in GLSL code into a mesa format.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-04 17:44:15 +03:00
Iago Toral Quiroga
96142a3e87 swrast: Fix rgba_draw_pixels with GL_COLOR_INDEX
When we implemented the format conversion rewrite we forgot to handle
GL_COLOR_INDEX here, which needs special handling.

Fixes the following piglit test:
bin/gl-1.0-drawpixels-color-index -auto -fbo

Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90213

Tested-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-04 16:08:41 +02:00
Francisco Jerez
f1d1d17db6 i965: Add memory fence opcode.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 15:05:21 +03:00
Francisco Jerez
f118e5d15f i965: Add typed surface access opcodes.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 15:05:21 +03:00
Francisco Jerez
0775d8835a i965: Add untyped surface write opcode.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:21 +03:00
Francisco Jerez
c97a7705ea i965: Reorder sources of the untyped atomic opcode.
This is consistent with the untyped surface read opcode.  From now on
all typed and untyped surface access opcodes will follow the same
pattern: src[0] will be the message payload, src[1] will be the
surface index and src[2] will be a control immediate (atomic operation
for atomic opcodes and number of vector components for surface read
and write opcodes).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez
ac747ca5f7 i965: Pass the number of components as a source of the untyped surface read opcode.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez
20915130ac i965/vec4: Add support for untyped surface message sends from GRF.
This doesn't actually enable untyped surface message sends from GRF
yet, the upcoming atomic counter and image intrinsic lowering code
will.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez
8865fe309d i965: Don't request untyped atomic writeback message if the destination is null.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez
0519a6259b i965: Simplify generator code for untyped surface messages.
The generate_untyped_*() methods do nothing useful other than calling
the corresponding function from brw_eu_emit.c.  The calls to
brw_mark_surface_used() will go away too in a future commit.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez
2f1c16df3e i965: Fix the untyped surface opcodes to deal with indirect surface access.
Change brw_untyped_atomic() and brw_untyped_surface_read() to take the
surface index as a register instead of a constant and to use
brw_send_indirect_message() to emit the indirect variant of send with
a dynamically calculated message descriptor.  This will be required to
support variable indexing of image arrays for
ARB_shader_image_load_store.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 15:05:20 +03:00
Chia-I Wu
4348046a2f ilo: use ilo_image exclusively in core
Initialize ilo_view_surface and ilo_zs_surface from ilo_image instead of
ilo_texture.
2015-05-02 22:28:31 +08:00
Chia-I Wu
9b705ec32d ilo: add ilo_image_can_enable_aux()
It replaces ilo_texture_can_enable_hiz().
2015-05-02 22:14:07 +08:00
Chia-I Wu
430594c34f ilo: make ilo_image more self-contained
Add depth0, sample_count, and scanout to ilo_image.
2015-05-02 22:14:06 +08:00
Chia-I Wu
f6ca4084c7 ilo: add ilo_image_init_for_imported()
It replaces ilo_image_update_for_imported_bo() and enables more error
checkings for imported textures.
2015-05-02 22:14:06 +08:00
Chia-I Wu
938c9b8cea ilo: prepare for image init for imported bo
Refactoring in prepraration for ilo_image_init_for_imported().
2015-05-02 22:14:06 +08:00
Chia-I Wu
3f9415077b ilo: constify ilo_image_params
Make ilo_image_params const in functions that do not modify it.
2015-05-02 22:14:06 +08:00
Chia-I Wu
c209aa7a8f ilo: improve readability of ilo_image
Improve docs, rename struct fields, and reorder walk types.  No real changes.
2015-05-02 22:14:06 +08:00
Chia-I Wu
9b72bf5bd2 ilo: move command builder to core 2015-05-02 22:14:06 +08:00
Chia-I Wu
9e24c49e64 ilo: move ilo_state_3d* to core
ilo state structs (struct ilo_xxx_state) are moved as well.
2015-05-02 22:14:06 +08:00
Chia-I Wu
8ab18262c5 ilo: add ilo_buffer.h to core
Rename the original ilo_buffer to ilo_buffer_resource to avoid name conflict.
2015-05-02 22:14:06 +08:00
Chia-I Wu
3afbeb115a ilo: move BOs from ilo_texture to ilo_image
We want to work with ilo_image instead of ilo_texture in core.
2015-05-02 22:14:06 +08:00
Chia-I Wu
ac47563cb4 ilo: move ilo_layout.[ch] to core as ilo_image.[ch]
Move files and s/layout/image/.
2015-05-02 22:14:06 +08:00
Chia-I Wu
8252765532 ilo: add ilo_format.[ch] to core
The original ilo_format.[ch] are removed.
2015-05-02 22:14:06 +08:00
Chia-I Wu
9b7080c8b3 ilo: add ilo_fence.h to core
Implement pipe_fence_handle on top of ilo_fence.
2015-05-02 22:14:06 +08:00
Chia-I Wu
2182beb431 ilo: add ilo_dev_init() to core
Move init_dev() from ilo_screen.c to core.
2015-05-02 22:14:06 +08:00
Chia-I Wu
7562f9e907 ilo: rename ilo_dev_info to ilo_dev
With intel_winsys being embedded in it, drop the "_info" suffix.
2015-05-02 22:14:06 +08:00
Chia-I Wu
19351af53d ilo: move intel_winsys to ilo_dev_info
We want to use ilo_dev_info instead of ilo_screen in core.
2015-05-02 22:14:06 +08:00
Chia-I Wu
b3197fe5f4 ilo: add ilo_dev.h to core
Move what are remaining in ilo_common.h (that is, ilo_dev_*) to ilo_dev.h.
2015-05-02 22:14:06 +08:00
Chia-I Wu
7bb4fa72c0 ilo: add ilo_debug.[ch] to core
They consist of the debug helpers that used to live in ilo_common.h and
ilo_screen.c.
2015-05-02 22:14:06 +08:00
Chia-I Wu
a5797873d0 ilo: add ilo_core.h to core
ilo_core.h includes the common gallium headers that were included in
ilo_common.h.
2015-05-02 22:14:05 +08:00
Chia-I Wu
bbe91576b7 ilo: move intel_winsys.h to core
Add a new subdirectory and start moving files that do not depend on
ilo_screen/ilo_context to it.
2015-05-02 22:14:05 +08:00
Jordan Justen
eeee212e53 i965: Upload atomic buffer state for compute shaders
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen
5328ffbe79 i965/cs: Emit MEDIA_STATE_FLUSH after WALKER
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen
8d87070af2 i965/cs: Implement brw_emit_gpgpu_walker
Tested on Ivybridge, Haswell and Broadwell.

v2:
 * Use SET_FIELD. (Ken)
 * Use simd_size / 16 to support SIMD8/16/32. Ken suggested
   that we might be able to do it arithmetically rather than just
   supporting SIMD8 and SIMD16 with a conditional.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen
0e0e23ef53 i965/state: Emit pipeline select when changing pipelines
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Paul Berry
013031b229 i965: Implement DispatchCompute() back-end
brw_emit_gpgpu_walker will be implemented in a subsequent patch.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Paul Berry
8f1423b2c4 main/cs: Implement front end code for glDispatchCompute().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Paul Berry
4d0f3d2319 mesa/cs: Add DispatchCompute() to driver function table.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen
5f70b49d4b i965/cs: Emit state base address
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
b750e14fbb i965/fs: Add CS shader time support
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
6b1b484b60 i965/cs: Upload brw_cs_state
v3:
 * Add defines. Misc cleanup suggestions. (Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
6ec6c1581c i965/cs: Support CS program precompile
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
17233f9bbc i965: Add brw_setup_tex_for_precompile. Use in VS, GS & FS.
Suggested-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
932045061b i965/cs: Emit compute shader code and upload programs
v2:
 * Don't bother checking for 'gen > 5' (krh)
 * Populate sampler data in key (krh)

v3:
 * Drop no8 support, and simplify code in several places (Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
cb18f3f021 i965/cs: Set invocation counts based on max_cs_threads
For ES, we set the max counts based on SIMD8, which is currently
accurate.

For desktop GL, we set the max counts based on SIMD16, which can fail
in some cases where a SIMD16 program is not currently supported.
Therefore, this value is not currently accurate, but will work fine in
many cases, and lets us run more test cases. Eventually we want to
always be able to generate a SIMD16 program.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
73cb2d3a73 i965/cs: Add max_cs_threads
Add values for gen7 & gen8. These are the number threads in a
subslice.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen
ea888c771c i965: Remove comment about chv device numbers being preliminary
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:29 -07:00
Jordan Justen
c380973a95 i965/fs: Support compute programs in fs_visitor
v2:
 * Clean out some unneeded code copied from run_fs (krh)
 * Always use NIR
 * Split shader time out into a separate commit

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen
ae6308a41e i965/cache: Add support for CS in program state cache
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry
92a57e7207 i965/cs: Add brw_cs_prog_data, brw_cs_prog_key and brw_context::cs.
jordan.l.justen@intel.com:
 * Added brw_cs_prog_key structure
 * Added brw_cs_prog_data::dispatch_grf_start_reg_16
 * Added brw_cs_prog_data::local_size
 * Added brw_cs_prog_data::simd_size

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen
2a4df9c524 i965/cs: Add generator support for CS_OPCODE_CS_TERMINATE
v2:
 * Don't rely on brw_eu* to generate the send instruction. We now
   generate the send here, and drop the "i965/cs: Add support for the
   SEND message that terminates a CS thread" brw_eu* patch.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen
dff4a42676 i965/cs: Mark g0 as used by CS_OPCODE_CS_TERMINATE
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen
d79cdee1d9 i965/fs: Add emit_cs_terminate to emit CS_OPCODE_CS_TERMINATE
v2:
 * Do more work at the visitor level. g0 is loaded and sent to the
   generator now.

v3:
 * Use Ken's comment explaining g0 usage

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen
eeb4b68224 i965/cs: Add CS_OPCODE_CS_TERMINATE
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen
f002176d5d i965/cs: Add BRW_NEW_CS_PROG_DATA and BRW_CACHE_CS_PROG
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry
d94a9e7041 i965: Add an INTEL_DEBUG=cs option.
At the moment it's not wired up to anything.  Later patches will hook
it up to the compute shader back-end.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry
bf058dad6b mesa/cs: Add compute support to update_program().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry
abb049dab6 mesa/cs: Update program.c for compute shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry
56d5c5ab5c mesa/cs: Add inline functions for dealing with compute shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry
6ee4dac1ef i965/cs: Add BRW_NEW_COMPUTE_PROGRAM state flag.
Also add code to brw_upload_state to set it when the compute program
changes.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Neil Roberts
02e9773bc8 i965/fs: Strip trailing constant zeroes in sample messages
If a send message is emitted with a message length that is less than
required for the message then the remaining parameters default to
zero. We can take advantage of this to save a register when a shader
passes constant zeroes as the final coordinates to the sample
function.

I think this might be useful for GLES applications that are using 2D
textures to simulate 1D textures.

On Skylake it will be useful for shaders that do
texelFetch(tex,something,0) which I think is fairly common. This helps
more on Skylake because in that case the order of the instruction
operands are u,v,lod,r which is good for 2D textures whereas before
they were u,lod,v,r which is only good for 1D textures.

On Haswell:
total instructions in shared programs: 8535730 -> 8533261 (-0.03%)
instructions in affected programs:     236968 -> 234499 (-1.04%)
helped:                                1174

On Skylake:
total instructions in shared programs: 10345646 -> 10341237 (-0.04%)
instructions in affected programs:     293011 -> 288602 (-1.50%)
helped:                                1218

Reviewed-by: Matt Turner <mattst88@gmail.com>

v2: Applied suggestions by Kenneth Graunke:
    - Only apply on Gen5+
    - Apply to all texture opcodes, not just TEX and TXF.
    Moved the optimisation into the loop as suggested by Matt Turner.
    Fix the array index when there is a header.
2015-05-01 11:46:28 +01:00
Neil Roberts
be119e80c9 i965/skl: Force the exec size to 8 when initing header for SIMD4x2
On Gen9+ there needs to be a header when sampling using SIMD4x2. The
header is set up by copying from the g0 register. Commit 07c571a39f
tried to fix this mov instruction to always use an exec size of 8
because previously it was incorrectly using 4. It did this by casting
the type of the destination register to vec8. This was done because
there is code in brw_set_dest to guess the exec size based on the
width of the dest register. However I misunderstood how this works
because it is actually only used when the width is less than 8. That
means the patch actually changed it to use the default exec size which
on SIMD16 would be 16 and the MOV would clobber over the first
register in the send message. This patch makes it additionally set the
default exec size to 8. This is similar to how the message is set up
in fs_generator::generate_tex.

I think this wasn't picked up by any Piglit tests because we don't
have any fragment shaders that hit this code path so nothing was using
SIMD16. However the patch caused failures in deqp tests.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90153
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-01 11:46:22 +01:00
Kenneth Graunke
1ac7db07b3 i965: Unhardcode a few more stage names and abbreviations.
The stage_abbrev and stage_name fields in backend_visitor provide what
we need without any additional effort.  It also means we'll get the
right names for compute shaders, SIMD8 geometry shaders, and both kinds
of tessellation shaders.

This does unfortunately change the capitalization of the stage
abbreviation in the INTEL_DEBUG=optimizer output filenames.  It doesn't
seem worth adding code to handle, though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-30 11:49:50 -07:00
Marek Olšák
1db5d3c19e docs/relnotes: document the new EGL sync extensions 2015-04-30 14:38:38 +02:00
Marek Olšák
e70de9b032 st/dri: implement the fence interface for CL events 2015-04-30 14:38:38 +02:00
Marek Olšák
952b5e84db gallium,clover: add OpenCL interoperability support for CL events
v2: - move interop.cpp to clover/api
    - change intptr_t to void* in the interface
    - add a virtual function fence() to simplify some code

v3: - use bool in the interface
v4: - enclose the last two interop functions in try..catch

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-04-30 14:38:38 +02:00
Marek Olšák
7070b0dd66 st/dri: implement the fence interface 2015-04-30 14:38:38 +02:00
Marek Olšák
a2557b30d8 egl/dri2: return the latest sync status in eglGetSyncAttribKHR 2015-04-30 14:38:38 +02:00
Marek Olšák
290a3eb750 egl/dri2: implement EGL_KHR_cl_event2 (v2)
v2: fix the SYNC_CONDITION query
2015-04-30 14:38:38 +02:00
Marek Olšák
a8617cc042 egl/dri2: implement EGL_KHR_wait_sync 2015-04-30 14:38:38 +02:00
Marek Olšák
9a0bda2430 egl/dri2: implement EGL_KHR_fence_sync 2015-04-30 14:38:38 +02:00
Marek Olšák
592ee249a1 mesa: add GL_OES_EGL_sync
This is an empty extension whose presence means that EGL sync objects can be
used with ES contexts.
2015-04-30 14:38:38 +02:00
Marek Olšák
b02a5bf3ba dri_interface: add an interface for fences 2015-04-30 14:38:38 +02:00
Marek Olšák
396cbabbef egl/dri: don't expose configs with an accumulation buffer 2015-04-30 14:38:38 +02:00
Ilia Mirkin
33f0d1138d nvc0/ir: fix predicated PFETCH for real
Commit a9d08a250 accidentally didn't make use of the new src1 variable.
Use it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-30 02:02:47 -04:00
Ilia Mirkin
db269ae495 nv50/ir: fix asFlow() const helper for OP_JOIN
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-29 23:34:30 -04:00
Ilia Mirkin
a9d08a250a nvc0/ir: fix predicated PFETCH emission
src1 would contain the predicate, which would get emitted as a register
source by an undiscerning srcId helper. Work around this in the same way
as in emitTEX.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-29 23:34:22 -04:00
Ilia Mirkin
515ac907e6 gk110/ir: fix set with a register dest to not auto-set the abs flag
This was causing src0 to always have the absolute value flag set.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-29 18:03:19 -04:00
Topi Pohjolainen
13670e8bad i965/blorp: Prepare drawing rectangle for flipped coordinates
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:49 +03:00
Topi Pohjolainen
dfd896699d i965/blorp: Add support for layered rendering
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:49 +03:00
Topi Pohjolainen
91daf9f09b i965/blorp: Allow blend state to be set for multiple render targets
Original blorp writes only one buffer per shader invocation. Once
the launch mechanism is shared with glsl-based programs there will
be need for supporting multiple render targets.

Also drop the always constant color write disable settings.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
7fb0db4dd1 i965/blorp: Prepare for attributes other than render position
Note that the magic number of one in gen7 logic is replaced by
BRW_SF_URB_ENTRY_READ_OFFSET ( == 1 also) for clarity.

On gen6 the change from zero to one (BRW_SF_URB_ENTRY_READ_OFFSET)
has no effect for native blorp as blorp doesn't use any
additional attributes. In fact, regular pipeline setup always
uses BRW_SF_URB_ENTRY_READ_OFFSET even when there are no additional
attributes. Hence the change makes the two (blorp and regular)
consistent.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
25ce6c6943 i965/blorp: Remove unused arguments
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
dce1972945 i965/gen7/blorp: Remove unused arguments
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
4de0bef7f4 i965/blorp: Allow caller to provide sampler settings
v2 (Ken): s/use_unorm_coords/non_normalized_coords/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
bfdacac86c i965/blorp: Refactor vertex buffer state setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
d271a13ba3 i965/blorp: Remove constant parameter
This was still needed when we had support for blorp clears but now
this is fixed to nop.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
d7e49fba9a i965/gen8: Expose state base address setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen
fea168f495 i965/ps/gen8: Refactor state uploading
v2: Use SET_FIELD() for sampler count, and for that reason
    added GEN7_PS_SAMPLER_COUNT_MASK.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
4047420ec4 i965/ps/gen7: Refactor state uploading
Now the uploading depends only on the input parameters instead
of consulting the current gl-state.

v2: Rebased on top of sampler count clamping

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
02dbc79297 i965: Refactor sampler state setup
v2 (Matt): Moved * to the name.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
47f32cb50d i965: Remove dependency to tex object in default color setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
21071afc43 i965: Refactor and expose brw_upload_binding_table()
Read and write parts of the state stage are also split into
explicit arguments allowing future patches to use constant
program data.

v2 (Ken): s/BRW_NEW_WM_PROG_DATA/BRW_NEW_FS_PROG_DATA/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
c15e20d8f6 i965: Expose and refactor brw_update_renderbuffer_surfaces()
Note that brw_update_renderbuffer_surfaces() already had a helper
variable which was used in parallel to direct access of the current
draw buffer of the context.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
c8b0d890c0 i965: Refactor rb surface setup to allow caller to store offsets
Notice that in gen7_wm_surface_state.c there is also indentation
change in the surrounding code removing tabs.

v2 (Matt): Fixed whitespace: tabs -> spaces

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
d6c83c9d86 i965/gen8: Use constant pointers for reading miptree details
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen
f39846fb57 i965/ps: Use SET_FIELD() for sampler count
The value is actually clamped to 0-16 as sample state pointer
can be used to support more than 16 samplers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:33 +03:00
Ian Romanick
2c7e289d8b glx: Massive update of comments in struct extension_info
In response to another patch, Emil asked for some clarification how this
stuff works.  Rather than just reply to the e-mail, I decided to update
the exlanation in the code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-29 13:18:59 -07:00
Marek Olšák
a582b22c63 winsys/radeon: add a private interface for radeon_surface 2015-04-29 21:51:40 +02:00
Marek Olšák
dcfbc006b6 winsys/radeon: move radeon_winsys.h to drivers/radeon 2015-04-29 21:51:40 +02:00
EdB
d8f817ae7f clover: remove util/compat
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 14:25:42 +00:00
Neil Roberts
5d4f085a43 i965: Don't try to apply the opt_sampler_eot extension for vs
The opt_sampler_eot optimisation of fs_visitor effectively assumes
that it is running on a fragment shader because it casts the program
key to a brw_wm_prog_key. However on Skylake fs_visitor can also be
used for vertex shaders. It looks like this usually works anyway
because the optimisation is skipped if key->nr_color_regions != 1.
However for a vertex shader the key is actually a brw_vs_prog_key so
the space for nr_color_regions is probably taken up by
key->base.program_string_id. This can end up making nr_color_regions
be 1 in which case the function will later assert when the last
instruction is not FS_OPCODE_FB_WRITE. This was making the DEQP test
suite assert. Presumably this only happens there because that compiles
a lot of shaders so it would end up with a high value for
program_string_id.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-29 15:31:45 +01:00
Emil Velikov
b124dc2b70 r300: do not link against libdrm_intel
Accidentally added since the introduction of the file.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-04-29 15:15:19 +01:00
EdB
2d112ed961 clover: make module::symbol::name a string
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:45:07 +00:00
EdB
5ca9b23319 clover: remove compat::string
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:45:00 +00:00
EdB
1b4a1d0049 clover: remove compat classes that match std one
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:44:53 +00:00
EdB
3c61ff0d89 clover: compile all sources with c++11
Later we can remove the compat code

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:43:55 +00:00
Axel Davy
231be57ee2 st/nine: Remove Managed texture hack.
Previously binding an unitialized managed texture
was causing a crash, and a workaround was added to
prevent the crash.

This patch removes this workaround and instead set the initial
state of managed textures as dirty, so that when the texture is bound
for the first time, it is always initialized.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
58d295d41e st/nine: Enforce LOD 0 for D3DUSAGE_AUTOGENMIPMAP
For D3DUSAGE_AUTOGENMIPMAP textures, applications can only
lock/copy from/get surface descriptor for/etc the first level.
Thus it makes sense to restrict the LOD to 0, and use only the first
level to generate the sublevels.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
6f57e01436 st/nine: Some D3DUSAGE_AUTOGENMIPMAP fixes
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
24eca6a30d st/nine: util_gen_mipmap doesn't need we reset states.
util_gen_mipmap uses pipe->blit, and thus doesn't need
we restore all states after using it.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
7a7758c552 st/nine: D3DUSAGE_AUTOGENMIPMAP is forbidden for volumes
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
ec411d9b74 st/nine: Fix NineBaseTexture9_PreLoad
It wasn't uploading the texture when the lod
had changed.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
b45fa97a22 st/nine: Rewrite Managed texture uploads
That part of the code was quite obscure.
This new implementation tries to make it clearer
by separating the differents parts, and commenting more.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
090ebc7638 st/nine: Bound the dirty regions to resource size
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
520e36f89c st/nine: Simplify Surface9 Managed resources implementation
Remove the Surface9 code for dirty rects, used only for Managed
resources. Instead convey the information to the parent texture.

According to documentation, this seems to be the expected behaviour,
and if documentation is wrong there, that's not a problem since it can
only leads to more texture updates in corner cases.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
4c2247ac60 st/nine: Remove impossible cases with Managed textures
Copying to/from a Managed texture is forbidden.
Rendering to a Managed texture is forbidden.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
e558ce98f2 st/nine: Encapsulate variables for MANAGED resource
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
35fe920e1e st/nine: Rework texture data allocation
Some applications assume the memory for multilevel
textures is allocated per continuous blocks.

This patch implements that behaviour.

v2: cache offsets

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
54f8e8a18d st/nine: Fix update_vertex_elements bad rebase
This code was supposed to be removed, but a rebase seems to have
made it stay.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
87868d3832 st/nine: Add debug warning when application uses sw processing
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy
4acbf420d1 st/nine: Rework update_vertex_buffers
Previous code was trying to optimise to call set_vertex_buffers on
big packets, and thus avoids as many calls as possible.

However in practice doing so won't be faster (drivers implement
set_vertex_buffers by a loop over the buffers we want to bind)

When we want to unbind a buffer, we were calling set_vertex_buffers
on a buffer with vtxbuf->buffer = NULL. It works on some drivers,
but not on all of them, because it isn't in Gallium spec.
This patch fixes that.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Xavier Bouchoux
5beb411bf7 st/nine: Fix computation of const_used_size
Was sometimes too large for PS.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
2015-04-29 08:28:10 +02:00
Axel Davy
559342d01d gallium/svga: Remove useless ARRAY_SIZE declaration
This is already declared in util/macros.h

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Axel Davy
64880d073a util/macros: Move DIV_ROUND_UP to util/macros.h
Move DIV_ROUND_UP to a shared location accessible everywhere

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Xavier Bouchoux
405c7d7511 st/nine: Fix behaviour of D3DUSAGE_QUERY_POSTPIXELSHADER_BLENDING
Ignore D3DUSAGE_QUERY_POSTPIXELSHADER_BLENDING when
D3DUSAGE_RENDERTARGET is not specified.

This behaviour matches windows drivers.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
2015-04-29 08:28:10 +02:00
Xavier Bouchoux
d838fe8243 st/nine: Improve D3DQUERYTYPE_TIMESTAMP
Avoid blocking when retrieving D3DQUERYTYPE_TIMESTAMP result with
NineQuery9_GetData(), when D3DGETDATA_FLUSH is not specified.
This mimics Win behaviour and gives slightly better performance
for some games.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
2015-04-29 08:28:10 +02:00
Xavier Bouchoux
851abb9145 st/nine: Fix D3DQUERYTYPE_TIMESTAMPFREQ query
D3DQUERYTYPE_TIMESTAMPFREQ is supposed to give the frequency
at which the clock of D3DQUERYTYPE_TIMESTAMP runs.

PIPE_QUERY_TIMESTAMP returns a value in ns, thus the corresponding
frequency is 1000000000.
PIPE_QUERY_TIMESTAMP_DISJOINT returns the frequency at which
PIPE_QUERY_TIMESTAMP value is updated. It isn't always
1000000000.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
2015-04-29 08:28:10 +02:00
Tiziano Bacocco
31bb4cd5c6 st/nine: Change x86 FPU Control word on device creation
As on wined3d and windows, when D3DCREATE_FPU_PRESERVE is not
specified, change the fpu control word to all exceptions masked,
single precision, round to nearest.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>
2015-04-29 08:28:10 +02:00
Axel Davy
e7b1a1e57c st/nine: Do not advertise D3DDEVCAPS_TEXTURESYSTEMMEMORY
No major vendor advertises it, and we weren't supporting it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Axel Davy
907f28f87e st/nine: Fix comment in update_viewport
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Axel Davy
6e825b69bd st/nine: Workaround barycentrics issue on some cards
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Xavier Bouchoux
f3fd06e94d st/nine: Clear struct pipe_blit_info before use.
render_condition_enable was uninitialized.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
2015-04-29 08:28:10 +02:00
Patrick Rudolph
77a38d2088 st/nine: NineDevice9_Clear skip fastpath for bigger depth-buffers
This adds an additional check to make sure the bound depth-buffer doesn't
exceed the rendertarget size when clearing depth and color buffer at once.
D3D9 clears only a rectangle with the same dimensions as the viewport, leaving
other parts of the depth-buffer intact.

This fixes failing WINE test visual.c:depth_buffer_test()

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Axel Davy
716bef2643 st/nine: Fix wrong assert in nine_shader
The sampler src index was wrong for texldl and texldd

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Axel Davy
8d3e063e68 st/nine: Handle special LIT case
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:10 +02:00
Jose Fonseca
114ac39a88 mesa: Fix glGetProgramiv(GL_ACTIVE_ATTRIBUTES).
It's returning random values, because RESOURCE_VAR() is casting
different objects into ir_variable pointers.

This updates _mesa_count_active_attribs to filter the resources with the
same logic used in _mesa_longest_attribute_name_length.

https://bugs.freedesktop.org/show_bug.cgi?id=90207

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-04-29 06:42:12 +01:00
Marc-André Lureau
c66c158e59 egl: misc fixes for EGL_MESA_image_dma_buf_export
Fix define and a function argument name introduced in commit
8f7338f284

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-29 15:13:19 +10:00
Ilia Mirkin
6fe0d4f035 nvc0/ir: flush denorms to zero in non-compute shaders
This will set the FTZ flag (flush denorms to zero) on all opcodes that
can take it.

This resolves issues in Unigine Heaven 4.0 where there were solid-filled
boxes popping up.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-28 20:17:03 -04:00
Brian Paul
66985d2a6d meta: remove unneeded #include colortab.h
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-28 12:27:48 -06:00
Brian Paul
7e8de8219f mesa: remove unneeded #include colortab.h
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-28 12:27:48 -06:00
Brian Paul
7c1be009b7 mesa: remove unused options var in compile_shader()
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-28 12:27:48 -06:00
Brian Paul
3597a0de94 docs: more details about Viewperf 12 medical-01 test issues 2015-04-28 12:27:48 -06:00
Ilia Mirkin
e312a69958 nvc0: expose GLSL version 410
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-28 12:48:22 -04:00
Ilia Mirkin
b5947984cd st/mesa: allow glsl version up to 410, enable ARB_shader_precision
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-04-28 12:48:22 -04:00
Leo Liu
2d4a890c0b st/va: add h264 decoder level support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-04-28 17:42:52 +02:00
Leo Liu
b2596efeb7 st/omx/dec: add h264 decoder level support
v2: use sps level idc as level to driver

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-04-28 17:42:45 +02:00
Leo Liu
1a5e2bb5ce vl: add level idc in sps
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-04-28 17:42:39 +02:00
Leo Liu
ef1ae703a9 st/omx/dec: separate create_video_codec to different codecs
v2: get frame size from port info

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-04-28 17:42:35 +02:00
Leo Liu
d043b51ba4 st/vdpau: add h264 decoder level support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-04-28 17:42:29 +02:00
Leo Liu
4509fc8b94 gallium/util: get h264 level based on number of max references and resolution
v2: add commments for limitation of max references numbers,
and what the caculation is based

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-04-28 17:42:25 +02:00
Marek Olšák
6d05396b00 r600g,radeonsi: add a driver query returning GPU load
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-28 16:05:45 +02:00
Marek Olšák
0b8e73a6ae r600g,radeonsi: add driver queries for GPU temperature and shader+memory clocks
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-28 16:05:45 +02:00
Ilia Mirkin
9143940da2 gm107/ir: add lane/vertex count sysvals
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 21:25:29 -04:00
Ilia Mirkin
89e0b08794 gk110/ir: add support for writing per-patch and shader outputs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 21:25:28 -04:00
Ilia Mirkin
52614f59b7 freedreno/a3xx: color masking works like a blend for some formats
When there is a colormask active that does not cover all the channels,
enable reading in the destination like with a combining blend
operation. This fixes fbo-blending-formats on a3xx.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 20:17:07 -04:00
Ilia Mirkin
9fc3f47278 freedreno/a3xx: add support for S8 and Z32F_S8
Enables ARB_depth_buffer_float. There is no sampling support for
interleaved Z32F_S8, so we store the two textures separately, one as
Z32F, the other as S8. As a result, we need a lot of additional logic
for restores and transfers.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 20:17:07 -04:00
Ilia Mirkin
1571da6ac3 freedreno/a3xx: add Z32F support
32-bit depth buffers are stored as unorm, and thus need special handling
when moving to and from gmem. They are copied into gmem by writing
depth, and resolved from gmem using a special resolve bit which
apparently float-ifies the data.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 20:17:07 -04:00
Ilia Mirkin
0a4cb00c77 freedreno: add fd_transfer to wrap around pipe_transfer
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 20:17:07 -04:00
Ilia Mirkin
f5c1101996 freedreno/a3xx: add support for disabling depth clipping
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 20:17:07 -04:00
Kenneth Graunke
dffc1a0ae3 i965/vs: Remove unnecessary NULL check on generate_code() result.
Code generation is not allowed to fail for any reason - in fact,
fs_generator has no mechanism for failing.  The visitor is responsible
for that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-27 14:59:06 -07:00
Timothy Arceri
d795cc6508 glsl: fix packing support for arrays of doubles
Broke in commit f00c5f85b8 when
adding support for multidimensional arrays

Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
2015-04-28 07:49:32 +10:00
Matt Turner
ff6ee39c19 i965: Enable ARB_gpu_shader5 on Gen8+.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-27 14:44:32 -07:00
Matt Turner
0c06d019bc i965/fs: Fix code emission for imul_high in NIR.
Copy over from brw_fs_visitor.cpp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-27 14:44:32 -07:00
Matt Turner
ecf428aa59 i965/fs: Fix stride for multiply in macro.
We have to use W/UW type for src1 of the multiply in the MUL/MACH macro,
but in order to read the low 16-bits of each 32-bit integer, we need to
set the appropriate stride.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-27 14:44:32 -07:00
Matt Turner
b3e29a2022 Revert "i965/fs: Allow SIMD16 borrow/carry/64-bit multiply on Gen > 7."
This reverts commit 9f5e5bd34d.

I have no idea what made me believe these didn't apply to Gen > 7. They
do, and without them we generate bad code that causes failures on Gen 8.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-27 14:44:32 -07:00
Olivier Pena
b94a4e8498 scons: Support LLVM 3.5 and 3.6 on windows.
llvm/Config/llvm-config.h is parsed instead of llvm/Config/config.h for
detecting LLVM version
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-June/073707.html).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-27 21:47:27 +01:00
Ilia Mirkin
dfb0b36e8f mesa: fix up GLSL version when computing GL version
In some situations it is convenient for a driver to expose a higher GLSL
version while some extensions are still incomplete. However in that
situation, it would report a GLSL version that was higher than the GL
version. Avoid that situation by limiting the GLSL version to the GL
version.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-27 16:03:16 -04:00
Roland Scheidegger
7c3d1c132e softpipe: fix another stencil-as-float issue
Hopefully this is the last one now (for texture X32_S8X24_UINT views).
+4 piglits.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90167

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-27 18:51:30 +02:00
Ilia Mirkin
dfb274af4c mesa: the function name appears to have a gl prefix already
Currently we're producing errors like

User error: GL_INVALID_OPERATION in glglDeleteProgramsARB(invalid call)

And noop_warn appears to be called with the full function name. Don't
prepend a gl prefix.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-27 12:06:54 -04:00
Zoë Blade
05e7f7f438 Fix a few typos
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-04-27 17:28:29 +03:00
Francisco Jerez
e17dc004fd i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface().
This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.
2015-04-27 17:28:29 +03:00
Francisco Jerez
6f26ffaf66 i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface().
This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.
2015-04-27 17:28:28 +03:00
Francisco Jerez
e94c80c08b i965: Add helper functions to calculate the slice pitch of an array or 3D miptree. 2015-04-27 17:28:28 +03:00
Olivier Pena
f9965347dc scons: add target osmesa using gallium state tracker.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-27 15:18:36 +01:00
Marek Olšák
db2415189a radeonsi: set an optimal value for DB_Z_INFO.ZRANGE_PRECISION
Required because of a VI hw bug.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-27 15:57:07 +02:00
Marek Olšák
bed98eef9a radeonsi: remove deprecated and useless registers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-27 15:56:27 +02:00
Marek Olšák
393b0e0531 radeonsi: remove useless includes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-27 15:56:27 +02:00
Marek Olšák
d8269be1ce gallium/radeon: print winsys info with R600_DEBUG=info
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-27 15:56:27 +02:00
Marek Olšák
96bbdc5188 winsys/radeon: make radeon_bo_vtbl static
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-27 15:56:27 +02:00
Timothy Arceri
ca9e280d89 glsl: replace while loop with without_array function
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 21:31:08 +10:00
Timothy Arceri
f00c5f85b8 glsl: support packing of arrays of arrays
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 21:31:01 +10:00
Timothy Arceri
fda5f7bb2f glsl: add arrays of arrays support to without_array function
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-27 21:30:54 +10:00
Martin Peres
9ea38ee96d docs/GL3: started adding support for shader_image_size
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-27 10:13:49 +03:00
Gediminas Jakutis
6fc0cd2f52 gallium/hud: add more options to customize HUD panes
Extends the syntax of GALLIUM_HUD environment variable to:
- Add options to set the size and exact location of each pane.
- Add an option to limit the maximum allowed value of the X axis on a
  pane, clamping the graph down to not go above this value.
- Add an option to auto-adjust the value of the Y axis down to the
  highest value still visible on the graph.

v2:
- Make the patch simpler and smaller.
- With dynamic auto-adjusting on, adjust the Y axis once per pane
  update instead of updating once every several seconds.
- No longer mishandle pane height when having more than one graph per
  pane.
2015-04-26 00:40:08 +02:00
Kenneth Graunke
30c8d8a831 i965: Fill out the rest of brw_debug_recompile_sampler_key().
This makes INTEL_DEBUG=perf report shader recompiles due to CMS vs.
UMS/IMS differences and Sandybridge textureGather workarounds.

Previously, we just flagged them as "Something else".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-25 09:48:59 -07:00
Kenneth Graunke
19165e3b6e i965: Disassemble sampler message names on Gen5+.
Previously, sampler messages were decoded as

sampler (1, 0, 2, 2) mlen 6 rlen 8              { align1 1H };

I don't know how much time we've collectly wasted trying to read this
format.  I can never recall which number is the surface index, sampler
index, message type, or...whatever that other number is.  Figuring out
the message name from the numerical code is also painful.

Now they decode as:

sampler sample_l SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 8 { align1 1H };

This is easy to read at a glance, and matches the format I used for
render target formats.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-04-25 09:47:29 -07:00
Matt Turner
7f5a8ac155 i965/fs: Disallow constant propagation into POW on Gen 6.
Fixes assertion failures in three piglit tests on Gen 6 since commit
0087cf23e.
2015-04-25 02:15:35 -07:00
Ilia Mirkin
67ba388dc0 mesa: add support for exposing up to GL4.2
Add the 4.0/4.1/4.2 extensions lists to compute_version. A couple of
extensions aren't in mesa yet, so those are marked with 0 until they
become supported.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-24 21:55:14 -04:00
Matt Turner
11d2305d7f i965/fs: Add missing pixel_x/y to brw_instruction_name().
Forgotten in commit 529064f6.
2015-04-24 16:25:02 -07:00
Matt Turner
51c61fff8f i965/fs: Don't constant propagate into integer math instructions.
Constant combining won't promote non-floats, so this isn't safe.

Fixes regressions since commit 0087cf23e.
2015-04-24 16:25:02 -07:00
Emil Velikov
e170185896 docs: add news item and link release notes for mesa 10.5.4
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-24 23:00:14 +01:00
Emil Velikov
196cf8db65 docs: Add sha256 sums for the 10.5.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit adb47b5b27)
2015-04-24 23:00:14 +01:00
Emil Velikov
5b39cb4736 Add release notes for the 10.5.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit ea0d1f575c)
2015-04-24 23:00:14 +01:00
Brian Paul
13b2e6a520 mesa: put more info in glTexImage GL_OUT_OF_MEMORY error message
Give the user some idea about the size of the texture which caused
the GL_OUT_OF_MEMORY error.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-24 14:48:54 -06:00
Matt Turner
0087cf23e8 i965/fs: Allow 2-src math instructions to have immediate src1.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-24 11:39:01 -07:00
Matt Turner
f251ea393b nir: Transform pow(x, 4) into (x*x)*(x*x). 2015-04-24 11:39:01 -07:00
Matt Turner
9b577d5702 glsl: Transform pow(x, 4) into (x*x)*(x*x).
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-24 11:39:01 -07:00
Tapani Pälli
18f44d3030 mesa: fix glGetActiveUniformsiv regression
Commit 7519ddb caused regression to glGetActiveUniformsiv.
Patch adds back validation loop of all given uniforms before
writing any values, not touching params in case of errors
is tested by the conformance suite.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90149
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-24 13:42:24 +03:00
Tapani Pälli
a563689a40 mesa: refactor active attrib queries for glGetProgramiv
Main motivation here is to get rid of iterating IR and
encapsulate queries within program resources.
No functional changes.

Piglit tests calling the modified functionality:

   - gl-get-active-attrib-returns-all-inputs
   - glsl-1.50-get-active-attrib-array
   - getactiveattrib

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-24 13:41:54 +03:00
Jason Ekstrand
d5a15a89f0 i965: Add an INTEL_DEBUG=spill option to test spilling
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-23 18:08:21 -07:00
Jason Ekstrand
bf55096207 i965/debug: Use the ull specifier for DEBUG enum defines
The INTEL_DEBUG variable is a uint64_t and if we want a enum value higer
than 32 bits, you need to use ull.  We might as well use it for all of them.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-23 18:08:20 -07:00
Kenneth Graunke
5957da1edb i965: Disallow linear blits that are not cacheline aligned.
The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned.  This restriction was added as part of converting the BLT to
use 48-bit addressing.

The main user, intel_emit_linear_blit, now handles this properly.
But we might also have linear miptrees; just refuse to blit those.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-04-23 14:16:57 -07:00
Kenneth Graunke
8c17d53823 i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.
The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned.  This restriction was added as part of converting the BLT to
use 48-bit addressing.

intel_emit_linear_blit needs to handle blits that are not cacheline
aligned, as we use it for arbitrary glBufferSubData calls and subrange
mappings.

Since intel_emit_linear_blit uses 1 byte per pixel, we can use the src/dst
pixel X offset field to represent the unaligned portion, and subtract
that from the address so it's cacheline aligned.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-04-23 14:05:41 -07:00
Pali Rohár
29f0f976bd mapi: Adding missing string.h include.
File glapi_entrypoint.c calls memcpy() function, but does not include
string.h header. So compilation can fail at error: implicit declaration
of function 'memcpy'.

Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-23 22:02:07 +01:00
Jose Fonseca
525be9c079 os/os_memory_aligned.h: Handle integer overflow.
This code is only used when our memory debugging wrappers are enabled,
as we use the C runtime functions directly elsewhere.

Tested llvmpipe on Windows w/ memory debugging enabled.

VMware PR894263.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-04-23 21:59:43 +01:00
Roland Scheidegger
f2a7fd9943 draw: fix prim ids when there's no gs
We were resetting the prim id count for each run of the prim assembler,
hence this only worked when the draw calls were very small (the exact limit
depending on the vertex size), since larger draw calls get split up.
So, do the same as we do already if there's a gs, reset it to zero explicitly
for every new instance (this possibly could use the same variable but that
isn't doable without some heavy refactoring and I'm not sure it makes sense).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90130.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

CC: <mesa-stable@lists.freedesktop.org>
2015-04-23 18:14:22 +02:00
Marek Olšák
ecc7f2ed91 gallium/radeon: don't crash when getting out-of-bounds TEMP references
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-23 16:14:39 +02:00
Jason Ekstrand
125574d1ef nir/lower_source_mods: Don't propagate register sources
The nir_lower_source_mods pass does a weak form of copy propagation to
clean up all of the mov-with-negate's that get generated.  However, we
weren't properly checking that the sources were SSA and so we could end up
moving a register read which is not, in general, valid.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
296131f467 nir: Rewrite instr_rewrite_src
The old code wasn't correctly handling the case where the new value of the
source contains an indirect.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
d61bd972d8 nir/locals_to_regs: Hanadle indirect accesses of length-1 arrays
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
06f3c98b9d nir/locals_to_regs: Initialize registers with constant initializers
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
4e9b376594 nir/locals_to_regs: Pass around the nir_shader rather than a void * mem_ctx
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
f50f59d3d9 nir: Add a simple growing array data structure
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
8b900e7405 nir/types: Make glsl_get_length smarter
Previously, this function returned the number of elements for structures
and arrays and 0 for everything else.  In NIR, this is almost never what
you want because we also treat matricies as arrays so you have to
special-case constantly.  This commit  glsl_get_length treat matrices
as an array of columns by returning the number of columns instead of 0

This also fixes a bug in locals_to_regs caused by not checking for the
matrix case in one place.

v2: Only special-case for matrices and return a length of 0 for vectors as
    we did before.  This was needed to not break the TGSI-based drivers and
    doesn't really affect NIR at the moment.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
7e1d21edbf nir: Move get_const_initializer_load from vars_to_ssa to NIR core
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
ba88760202 nir/lower_vars_to_ssa: Pass around the nir_shader instead of a void mem_ctx
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
c68364ac34 i965/nir: Use the correct offsets when handling register indirects
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
e79120afdc nir/print: Print the closing paren on load_const instructions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
02f03fc0f1 nir/tex: Use the correct return size for query_levels and lod
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
94669cb534 nir: Refactor tex_instr_dest_size to use a switch statement
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
73cc76362d nir/lower_vars_to_ssa: Actually look for indirects when determining aliasing
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:39 -07:00
Dave Airlie
734bceed86 docs: mark off texture_stencil8 (v2.1)
copy drivers from the stencil_texturing list,
softpipe is definitely broken for stencil texturing
since it uses float, but I'll look at that later.

v2.1: update relnotes

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 10:11:27 +10:00
Dave Airlie
6cc49c4ce1 st/mesa: add ARB_texture_stencil8 support (v4)
if we support stencil texturing, enable texture_stencil8
there is no requirement to support native S8 for this,
the texture can be converted to x24s8 fine.

v2: fold fixes from Marek in:
   a) put S8 last in the list
   b) fix renderable to always test for d/s renderable
    fixup the texture case to use a stencil only format
    for picking the format for the texture view.
v3: hit fallback for getteximage
v4: put s8 back in front, it shouldn't get picked now (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 10:11:27 +10:00
Dave Airlie
782e71cc07 mesa: finish implementing ARB_texture_stencil8 (v5)
Parts of this were implemented previously, so finish it off.

v2: fix getteximage falling into the integer check
    add fixes for the FBO paths, (fbo-stencil8 test).

v3: fix getteximage path harder.
v4: remove swapbytes from getteximage path (Ilia)
v5: brown paper bag the swapbytes removal. (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 10:11:26 +10:00
Jason Ekstrand
1948880720 mesa: remove the gl_sl_pragmas structure
This code was added by Brian Paul in 2009 but, as far as Matt and I can
tell, it's been dead ever since the new GLSL compiler was added.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-22 16:00:35 -07:00
Jason Ekstrand
ae3870df70 i965: Add a brw_compiler structure and store the register sets in it
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
a85c4c9b3f i965: Rename brw_compile to brw_codegen
This name better matches what it's actually used for.  The patch was
generated with the following command:

for file in *; do
sed -i -e s/brw_compile/brw_codegen/g $file
done

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
cfc56fcee3 i965: Use device_info instead of the context for computing vue maps
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
02ccb19495 i965: Use device_info instead of the context in instruction scheduling
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
28e9601d0e i965: Add a devinfo field to backend_visitor and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
73bf8f3d6b i965: Remove remaining uses of ctx->Const.UniformBooleanTrue in visitors
Since commit 2881b123, we have used 0/~0 for representing booleans on all
gens.  However, we still had a bunch of places in the visitor code where we
were still referring to ctx->Const.UniformBooleanTrue.  Since this is
always ~0, we can just remove them.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
2bf207b473 i965/vec4: Add a devinfo field to the generator and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
5bda1ff1be i965/fs: Add a devinfo field to the generator and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
38dc2ddab4 i965/device_info: Add a supports_simd16_3src flag
This also involves moving revision checking to screen creation time and
passing that into brw_get_device_info so that we can get the right
device_info for early versions of SKL.  Since the only place we used
revision was to check for SIMD16 3-src instruction support, it's safe to
remove the revision field from brw_context.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
85db2aca52 i965/device_info: Add a HSW_FEATURES macro
It's basically just a copy of GEN7_FEATURES only with is_haswell set

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
9c89e47806 i965: Make the annotation code take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
5cb91db619 i965/fs: Remove the GL context from the generator
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
61c4702489 i965: Remove the context field from brw_compiler
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
639314d40e i965: Make the disassembler take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
c3e5f32840 i965: Make instruction compaction take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
4e9c79c847 i965: Make the brw_inst helpers take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
6219a8f098 i965/eu: Add a devinfo parameter to brw_compile
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
a921475c22 i965: Do better fake context setup in unit tests
In future tests, we will start relying on devinfo and not just brw in the
compiler.  Changing this now keeps these tests from failing in the future.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
ceb6e5eebe i965: Remove the context parameter from brw_texture_offset
It wasn't really being used anyway.  We used it to assert that gpu_shader5
is supported in the back-end but that should be caught by the front-end.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:31 -07:00
Dave Airlie
8a41cd2407 softpipe: fix stencil write to use an integer value
This fixes a number of regressions since
61393bdcdc
u_tile: fix stencil texturing tests under softpipe

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89960
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 08:32:30 +10:00
Anuj Phogat
2c08e3b8ea mesa: Fix typo in a comment
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-22 15:24:43 -07:00
Rob Clark
cb24d3b7ad freedreno: misc minor cleanups
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:28 -04:00
Rob Clark
1b58d8c2bf freedreno/a4xx: (partial) gl_FragCoord.zw
The bit to enable .z is still commented out, as it is triggering gpu
hangs in 0ad.  But at least gl_FragCoord.w works now, and we know what
bits we are *supposed* to set for .z (with that uncommented all piglit
fragcoord tests are passing).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:28 -04:00
Rob Clark
a869183123 freedreno/a4xx: primitive-restart
This was the missing bit to get dolphin-emu working on a4xx.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:28 -04:00
Rob Clark
632ea2a113 freedreno/nir: sysval fixes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:28 -04:00
Rob Clark
13527df143 freedreno/a4xx: wire up integer texture sampling
Similar to a3xx, the compiler needs to know the return type of the sam,
etc, instructions.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:28 -04:00
Rob Clark
48a651e98c freedreno/a4xx: formats updates/fixes
Update formats table with new formats that Ilia has figured out, and fix
sampling from srgb texture and integer vbo's.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:28 -04:00
Rob Clark
21ceedfd8b freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 13:20:27 -04:00
Emil Velikov
9450bd56be gallium/targets/d3dadapter9: drop the libdrm prefix for drm.h
The path is provided by libdrm.pc and already used appropriately by
the build system.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 16:03:01 +01:00
Brian Paul
02e93be55e cso: minor comment fix 2015-04-22 08:58:05 -06:00
Brian Paul
31667e6237 glsl: rewrite glsl_type::record_key_hash() to avoid buffer overflow
This should be more efficient than the previous snprintf() solution.
But more importantly, it avoids a buffer overflow bug that could result
in crashes or unpredictable results when processing very large interface
blocks.

For the app in question, key->length = 103 for some interfaces.  The check
if size >= sizeof(hash_key) was insufficient to prevent overflows of the
hash_key[128] array because it didn't account for the terminating zero.
In this case, this caused the call to hash_table_string_hash() to return
different results for identical inputs, and then shader linking failed.

This new solution also takes all structure fields into account instead
of just the first 15 when sizeof(pointer)==8.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-22 08:58:05 -06:00
Brian Paul
bd4dbdfa51 mesa: add check for NV_texture_barrier in _mesa_TextureBarrierNV()
If an app called glTextureBarrierNV() without checking if the
extension was available, we'd crash with some gallium drivers
in st_TextureBarrier() because the pipe_context::texture_barrier()
pointer was NULL.

Generate GL_INVALID_OPERATION instead.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-22 08:58:05 -06:00
Brian Paul
b260d9d91f main: silence missing return value warning in array_index_of_resource()
v2: return -1 instead of 0, per Emil Velikov.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-22 08:58:05 -06:00
Chih-Wei Huang
0b1823f5be android: re-build all mesa binaries properly
The clean steps ensure both 32-bit and 64-bit objects are cleaned.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 15:57:00 +01:00
Emil Velikov
36e59215ba android: xmlpool: cleanup the generation rules
- Do not attempt to create the save folder twice - both dir $@ and
PRIVATE_LOCALEDIR point to the same place.
 - Use @ and $(hide), for mkdir and python, to avoid spamming the
output.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 15:56:32 +01:00
Chih-Wei Huang
98c8997fe5 android: xmlpool: Get rid of the last use of intermediates-dir-for
v2 [Emil Velikov]
 - Keep the PRIVATE_LOCALEDIR variable.
 - Do not use $(@D) but the more widespead $(dir $@)

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 15:54:51 +01:00
Chih-Wei Huang
5b8d61b0cc android: export the path of the generated headers
The modules need the headers can get the path automatically.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 15:53:36 +01:00
Chih-Wei Huang
b0e33c2256 android: fix the building rules for Android 5.0
Android 5.0 allows modules to generate source into $OUT/gen, which will
then be copied into $OUT/obj and $OUT/obj_$(TARGET_2ND_ARCH) as necessary.
Modules will need to change calls to local-intermediates-dir into
local-generated-sources-dir.

The patch changes local-intermediates-dir into local-generated-sources-dir.
If the Android version is less than 5.0, fallback to local-intermediates-dir.

The patch also fixes the 64-bit building issue of Android 5.0.

v2 [Emil Velikov]
 - Keep the LOCAL_UNSTRIPPED_PATH variable.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 15:53:35 +01:00
Chih-Wei Huang
671a550846 android: fix building issues of host binaries
Define _GNU_SOURCE to enable features (__USE_XOPEN2K and __USE_UNIX98)
required to build the host binaries.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 15:53:35 +01:00
Chih-Wei Huang
076edc6a03 android: fix a building error of libmesa_program
Add libmesa_glsl to LOCAL_STATIC_LIBRARIES to get
its exported include path (for nir_opcodes.h).

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 15:53:35 +01:00
Emil Velikov
8098bf8e7a android: mesa: fold the ARCH_X86_HAVE_SSE4_1 conditionals
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 15:53:11 +01:00
Emil Velikov
669cfc267a android: mesa: fix the path of the SSE4_1 optimisations
Commit dd6f641303c(mesa: Build with subdir-objects.) removed the SRCDIR
variable, but forgot to update all references of it.

v2: Fix path - must be relative to LOCAL_PATH. (Chih-Wei)

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 15:52:02 +01:00
Emil Velikov
64171c2d24 android: build the Mesa IR -> NIR translator
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:53:22 +01:00
Emil Velikov
c734261dcf android: nir: add build rules for nir_builder_opcodes.h
Missed out with commit 2a135c470e3(nir: Add an ALU op builder kind of
like ir_builder.h)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:51:31 +01:00
Mauro Rossi
06619749a1 android: add inital NIR build
Required by the i965 driver.

v2:
 - Split out the nir_builder_opcodes.h rules.
 - Do not unconditionally hide the python command - use $(hide)
 - Use LOCAL_EXPORT_C_INCLUDE_DIRS to manage includes for the generated
sources.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
[Emil Velikov: Split from a larger commit, v2]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:49:39 +01:00
Emil Velikov
618885f71f android: dri: link against libmesa_util
The dri modules depend on symbols provided by it.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:37:32 +01:00
Emil Velikov
0afbd2df04 android: add $(mesa_top)/src/mesa/main to the includes list
Required by the format_{un,}pack rework. Otherwise the build will fail
to locate the respective headers - format_{un,}pack.h

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:37:17 +01:00
Emil Velikov
39a175e0c7 android: add HAVE__BUILTIN_* and HAVE_FUNC_ATTRIBUTE_* defines
All of those are available on gcc 4.5 and later with the current android
build using gcc 4.7.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:36:34 +01:00
Emil Velikov
94cab35ee9 android: add gallium dirs to more places in the tree
Similar to e8c5cbfd921(mesa: Add gallium include dirs to more parts of
the tree.)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:36:25 +01:00
Emil Velikov
8d90bfb724 android: dri/common: conditionally include drm_cflags/set __NOT_HAVE_DRM_H
Otherwise we'll fail to find the drm.h header.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:36:18 +01:00
Emil Velikov
2d06791f6f android: egl: add libsync_cflags to the build
... via local_shared_libraries. Otherwise the sync/sync.h header won't
be found.

Note: 10.5 and earlier will need similar change in st/egl.

v2: Append the library to the local_shared_libraries list. (Chih-Wei)

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:36:05 +01:00
Mauro Rossi
5f7081eb90 android: mesa: generate the format_{un,}pack.[ch] sources
Missed out with commit e1fdcddafe9(mesa: Autogenerate format_unpack.c)

v2: Conditionaly print the python commands - s/@/$(hide) / (Chih-Wei)

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
[Emil Velikov: Split our from a larger commit.]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:32:07 +01:00
Emil Velikov
6fb8017866 android: add $(mesa_top)/src include to the whole of mesa
Many parts of mesa already have the include with others depending on it
but it's missing. Add it once at the top makefile and be done with it.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:26:22 +01:00
Emil Velikov
ba3bc1eea2 android: use := operator for assigning MESA_VERSION
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:25:58 +01:00
Chih-Wei Huang
6c2c5f74a2 util: android: optimize the rules to generate format_srgb.c
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:24:22 +01:00
Chih-Wei Huang
63a76c15d8 android: simplify the subdirs including rules
Use the macro defined in the Android build system.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:24:13 +01:00
Emil Velikov
86919352e3 android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERS
... to manage the LIBDRM*_CFLAGS. The former is the recommended approach
by the Android build system developers while the latter has been
depreciated for quite some time.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-22 14:23:28 +01:00
Emil Velikov
413bc0a618 ilo: remove unused include from Android.mk
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2015-04-22 14:18:47 +01:00
Kenneth Graunke
00bf7d2e9c drirc: Add "Second Life" quirk (allow_glsl_extension_directive_midshader).
Appears to fix shader compilation.  Tested by starting the client,
dragging the "quality and speed" slider back and forth, and watching the
console output - instead of piles of "shader failed to compile", the CPU
seems to be busy compiling shaders.  I haven't actually tried to play.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69226
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71591
Cc: mesa-stable@lists.freedesktop.org
2015-04-21 22:16:30 -07:00
Kenneth Graunke
44461e7098 nir: Fix per-component negation in prog_to_nir's SWZ handling.
I missed the fact that the ARB_fragment_program SWZ instruction allows
per-component negation.  To fix this, move Abs/Negate handling into both
the simple case and the SWZ case's per-component loop.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90000
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-21 12:01:36 -07:00
Tapani Pälli
ed10f9cfad glsl: correct indentation of comment, Trivial.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
2015-04-21 20:11:43 +03:00
Matt Turner
529064f6a8 i965/fs: Combine pixel center calculation into one inst.
The X and Y values come interleaved in g1 (.4-.11 inclusive), so we can
calculate them together with a single add(32) instruction on some
platforms like Broadwell and newer or in SIMD8 elsewhere.

Note that I also moved the PIXEL_X/PIXEL_Y virtual opcodes from before
LINTERP to after it. That's because the writes_accumulator_implicitly()
function in backend_instruction tests for <= LINTERP for determining
whether the instruction indeed writes the accumulator implicitly. The
old FS_OPCODE_PIXEL_X/Y emitted ADD instructions, which did, but the new
opcodes just emit MOVs, which don't. It doesn't matter, since we don't
use these opcodes on Gen4/5 anymore, but in the case that we do...

On Broadwell:
total instructions in shared programs: 7192355 -> 7186224 (-0.09%)
instructions in affected programs:     1190700 -> 1184569 (-0.51%)
helped:                                6131

On Haswell:
total instructions in shared programs: 6155979 -> 6152800 (-0.05%)
instructions in affected programs:     652362 -> 649183 (-0.49%)
helped:                                3179

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
5af0604d52 i965/fs: Calculate delta_x and delta_y together.
This lets SIMD16 programs on G45 and Gen5 use the PLN instruction.

On Ironlake:

total instructions in shared programs: 5634757 -> 5518055 (-2.07%)
instructions in affected programs:     1745837 -> 1629135 (-6.68%)
helped:                                11439
HURT:                                  4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
fde3100fe6 i965/fs: Emit ADDs for gl_FragCoord, not virtual opcodes.
These were used only on Gen4 and 5. emit_interpolation_setup_gen6() emits
ADDs directly. The virtual opcodes weren't providing anything useful.

I'm going to repurpose these opcodes, so deleting and readding them makes
it simpler to see what's going on.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
b14313e452 i965/fs: Manually set source regioning on PLN instructions.
Like LINE (commit 92346db0), src0 must have a scalar region. Setting
src1's region to <8,8,1> lets us pass a properly sized combined delta_xy
argument in a few commits without getting a bogus <16,16,1> region.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
a1dd2f0bb6 i965/fs: Add LINTERP's src0 to fs_inst::regs_read().
LINTERP's src0 is PLN's src1, and PLN's src1 reads exec_size / 4
registers.

Having that information lets us drop the delta_x/y special case code in
split_virtual_grfs().

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
8bc49f9536 i965/fs: Set compression only if writing two registers.
We don't want to set compression control on a SIMD16 instruction
operating on words or smaller.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
b5a5b63548 i965/fs: Allow an execution size of 32.
In a few commits, we'll start emitting an add(32) instruction on some
platforms.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
45a1348612 i965: Make type_sz() return unsigned.
Avoids annoying warnings when comparing with sizeof(...).

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
dd5c825053 i965: Replace guess_execution_size with something simpler.
guess_execution_size() does two things:

   1. Cope with small destination registers.
   2. Cope with SIMD8 vs SIMD16 mode.

This patch replaces the first with a simple if block in brw_set_dest: if
the destination register width is less than 8, you probably want the
execution size to match.  (I didn't put this in the 3src block because
it doesn't seem to matter.)

Since only the FS compiler cares about SIMD16 mode, it's easy to just
set the default execution size there.

This pattern was already been proven in the Gen8+ generator, but we
didn't port it back to the existing generator when we combined the two.

This is based on a patch from Ken from about a year ago. I've rebased it
and and fixed a few bugs.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Matt Turner
3b4abdae04 i965/fs: Ensure delta_x/y are even-aligned registers on Gen6.
The BSpec says this applies to Gen6 as well.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-21 09:24:48 -07:00
Marius Predut
958b4965a2 main: remove __FUNCTION__ defined because it is obsolete
Consistently just use C99's __func__ everywhere.
No functional changes.

Signed-off-by: Marius Predut <marius.predut@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-21 13:05:30 +00:00
Marius Predut
d8b14a57a9 radeon: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.

Signed-off-by: Marius Predut <marius.predut@intel.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-21 13:05:03 +00:00
Tapani Pälli
ad5ae271e7 mesa: add missing break in switch statement
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
2015-04-21 14:38:59 +03:00
Tapani Pälli
5917ca349a glsl: add fallthrough comment on switch
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
2015-04-21 14:38:10 +03:00
Tapani Pälli
054c7dc7eb mesa: fix UBO queries for active uniforms
Commit 34df5eb introduced regression to GetActiveUniformBlockiv
when querying one of the following properties:

   GL_UNIFORM_BLOCK_ACTIVE_UNIFORMS
   GL_UNIFORM_BLOCK_ACTIVE_UNIFORM_INDICES

Implementation counted all uniforms in ubo directly while query should
check first if the uniform in question is _active_.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90109
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
2015-04-21 14:37:09 +03:00
Neil Roberts
7004632b28 i965/skl: Fix the qpitch value
On Skylake the qpitch value is uploaded as part of the surface state
so we don't need to add the extra rows that are done for other
generations. However for 3D textures it needs to be aligned to the
tile height and for depth/stencil textures it needs to be a multiple
of 8. Unlike previous generations the qpitch is measured as a multiple
of the block size for compressed surfaces. When the horizontal mipmap
layout is used for 1D textures then the qpitch is measured in pixels
instead of rows.

v2: Align the depth/stencil textures to a multiple of 8
v3: Add an assert that ALL_SLICES_AT_EACH_LOD is not used. Ignore the
    vertical alignment when picking the qpitch for 1D_ARRAY textures.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-20 22:03:21 -07:00
Neil Roberts
584f8e1ec5 i965/skl: Don't use ALL_SLICES_AT_EACH_LOD
The render surface state command for Skylake doesn't have the surface
array spacing bit so it's not possible to select this layout. I think
it was only used in order to make it pick a tightly-packed qpitch
value that doesn't include space for the mipmaps. However this won't
be necessary after the next patch because it will automatically pick a
packed qpitch value whenever first_level==last_level. It is better to
remove this layout entirely on Gen8+ because although it can
effectively be implemented with a small qpitch value when there are no
mipmaps it isn't possible to support the case where there are mipmaps
because in that case the layout is very different.

It could be good to make a similar change for Gen8 if we also change
the layouting code to pick the qpitch value in a similar way.

v2: Make the commit message and comments more convincing

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
2015-04-20 22:03:21 -07:00
EdB
c1485f4b7d clover: remove pre llvm 3.5.0 compatibility code
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-20 18:11:04 +00:00
EdB
f39cd71618 clover: make llvm >= 3.5.0 and c++11 mandatory
Clover not longer compile with llvm <= 3.5.0 since e1d363b3.
e1d363b3 implies c++11 and llvm 3.5.0 CXXFLAGS provided it.
No one seems to have noticed it, it's now official.

Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-20 18:10:29 +00:00
Dave Airlie
3282e57bcf docs/GL3.txt: update ARB_shader_subroutine status
Admit to having started working on this, I don't admit to ever finishing it

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-20 18:43:36 +10:00
Nick Sarnie
645f77fe50 gallivm: Fix build against LLVM 3.7 SVN r235265
LLVM removed JITEmitDebugInfo from TargetOptions since they weren't used

v2: Be consistent with the LLVM version check (Aaron Watry)

Signed-off-by: Nick Sarnie <commendsarnex@gmail.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-20 13:34:45 +09:00
Ian Romanick
c015008ee0 doc: Add GL_ARB_shader_image_size dependency for OpenGL ES 3.1
imageSize() is in the GLSL ES 3.1 spec.  Trivial.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-20 08:30:28 +09:00
Ilia Mirkin
b2e871bd48 indices: fix provoking vertex for quads/quadstrips
This allows drivers to provide consistent flat shading for quads.
Otherwise a driver that only supported tris would have to force last
provoking vertex when drawing quads (and would have to say that quads
don't follow the provoking vertex convention).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-04-18 18:27:22 -04:00
Ilia Mirkin
1cdb01d716 primconvert: select pv convention only from flatshade_first
This should match to how drivers program hardware. flatshade relates to
whether color inputs are interpolated, not the provoking vertex
convention.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-04-18 18:27:09 -04:00
Ilia Mirkin
0904774af1 freedreno/a3xx: enable polymode setting with non-fill modes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-18 17:35:23 -04:00
Ilia Mirkin
6357601628 freedreno/a3xx: fix integer and 32-bit float border colors
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-18 17:35:23 -04:00
Ilia Mirkin
6895c3554e freedreno/a3xx: add support for float R/RG render targets
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-18 17:35:23 -04:00
Connor Abbott
1eac3ae1a6 mesa: add .mesa-install-links files to gitignore
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-17 15:24:14 -04:00
Connor Abbott
65f13352b9 mesa/main: add autogenerated format-info.c to gitignore
v2: move to right after format-info.h

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-17 15:24:06 -04:00
Kenneth Graunke
1d6829813e i965: Issue perf_debug messages for unsynchronized maps on !LLC systems.
We haven't implemented proper unsynchronized map support on !LLC systems
(pre-SNB, Atom).  MapBufferRange with GL_MAP_UNSYNCHRONIZE_BIT will
actually do a synchronized map, probably killing performance.

Also warn on BufferSubData, when we should be doing an unsynchronized
upload, but instead have to do a synchronous map.

v2: Only complain if the buffer is actually busy - we use unsynchronized
    maps internally for vertex upload and such, but expect those to not
    be busy.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
2015-04-17 12:14:52 -07:00
Kenneth Graunke
cd9058fae3 i965: Make shader_time store names/ids instead of referencing shaders.
Jason noticed that shader_time was bumping the reference count on the
gl_shader_program and gl_program structures, in code called during
compilation.

Not only were these never unreferenced, but it meant fragment shaders
might be referenced twice (SIMD8 and SIMD16)...or only once.

We don't actually need the programs.  We just need their numeric ID and
their language (GLSL/ARB/FF) or KHR_debug label.  If there's a label, we
have to strdup it since the underlying program could be deleted.

To be fair, we're not exactly cleaning that up either, but we at least
ralloc it out of the shader_time arrays, so if we ever bother cleaning
those up, they'll go away properly.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-17 12:07:35 -07:00
Kenneth Graunke
eb6e770889 i965: Delete some unnecessary code in brw_report_shader_time().
It is true that a gl_shader_program with ID 0 will be a fixed-function
fragment program; a gl_program with ID 0 but NULL gl_shader_program
means that it's a fixed-function vertex shader.

But that's not terribly interesting or relevant to what we're doing.
We just need to know that ID 0 means "fixed function".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-17 12:07:33 -07:00
Kenneth Graunke
e9efd667de i965: Make shader_time use 0 instead of -1 for "no meaningful ID".
0 is not a valid GLSL shader or ARB program ID.  For some reason,
shader_time used -1 instead...so we had code to detect 0, then override
it to -1.

We can just delete that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-17 12:06:08 -07:00
Tobias Nygren
cfab4ea9c6 adjust a couple of ifdefs to handle NetBSD correctly
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Tobias Nygren <tnn@NetBSD.org>
2015-04-17 12:04:48 -07:00
Tobias Nygren
52e4e4712f configure.ac: fix bashism
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Tobias Nygren <tnn@NetBSD.org>
2015-04-17 12:04:21 -07:00
Anuj Phogat
79010c9a53 i965: Render R16G16B16X16 as R16G16B16A16
This enables using _mesa_meta_pbo_TexSubImage() to upload data
to R16G16B16X16 texture. Earlier it fell back to slower paths.

Jenkins run shows no piglit regressions.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-17 11:48:38 -07:00
Anuj Phogat
c6b0922c31 i965: Update the comment about platforms supporting blorp
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-04-17 11:48:38 -07:00
Matt Turner
4dacb212fd nir: Allow abs/neg in select peephole pass.
total instructions in shared programs: 4314531 -> 4308949 (-0.13%)
instructions in affected programs:     429085 -> 423503 (-1.30%)
helped:                                1680
HURT:                                  0
GAINED:                                0
LOST:                                  111

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-17 11:01:34 -07:00
Jason Ekstrand
472ef9a02f i965/fs: Change SEL and MOV types as needed to propagate source modifiers
SEL and MOV instructions, as long as they don't have source modifiers, are
just copying bits around.  This commit adds support to copy propagation to
switch the type of a SEL or MOV instruction as needed so that it can
propagate source modifiers.  This is needed because NIR generates integer
SEL and MOV instructions whenver it doesn't know what else to generate.

shader-db results with NIR:
total FS instructions in shared programs: 4360910 -> 4360186 (-0.02%)
FS instructions in affected programs:     59094 -> 58370 (-1.23%)
helped:                                   341
HURT:                                     0
GAINED:                                   2
LOST:                                     0

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-17 11:01:34 -07:00
Jason Ekstrand
bb99a58e77 i965/fs: Use the source type when looking for UD negations in copy prop
There can be problems with floats and conditional modifiers when
copy-propagating a negated UD source.  The problem arises when a source
modifier is applied to a UD value.  In this case, a 33-bit representation
is internally used.  If you do the following:

   1: mov foo:UD 7U
   2: mov bar:UD -foo:UD
   3: mov out:F bar:UD

the out register will have the value (float)(unt32_t)-7 which is some very
large floating-point number.  However, if we allow copy-propagation of the
second mov, we get

   1: mov foo:UD 7U
   3: mov out:f -bar:UD

and, since the negation is computed in 33-bits, we get a value of -7.0f
which is clearly not the same.  This is a similar problem if the
instruction has a conditional modifier where the 33-bit value is used in
the comparison and not the 32-bit version.

Previously, we checked the source to be copied for the negate and then
checked the source being propagated to for the type.  This isn't quite what
we want because we are really just looking for negated UD sources.  A check
later in the file ensures that both ends of the propagate have the right
type so it works.  However, if we relax the restriction that both ends of
the propagation have the same type, it ends up causing us to bail early in
cases we don't want.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-17 11:01:33 -07:00
Rob Clark
95e68adcd9 freedreno/ir3/nir: few little fixes
isaml needs to scale up coords based on LoD.  Also fix bogus bary.f
varying # when there are non-bary frag shader inputs.  And use sub.s of
a positive immediate rather than add.s of negative (since CP is better
about figuring out that those can be collapsed into the cat2 instr).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 11:40:14 -04:00
Rob Clark
efbf14e893 freedreno/ir3/nir: lower if/else
For now, completely flatten if/else blocks.  That will almost certainly
change once we have flow control.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 11:40:14 -04:00
Rob Clark
e5e11b5baf freedreno/a4xx: support for large shaders
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 10:40:50 -04:00
Rob Clark
20ea698c49 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 10:40:44 -04:00
Rob Clark
57f0d3b3c6 freedreno/ir3/nir: UBO support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 10:40:36 -04:00
Rob Clark
87807e5cc5 freedreno/ir3: move out helper
We'll also want it in NIR f/e for implementing UBO support.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 10:40:28 -04:00
Rob Clark
70b2f872ea freedreno/a4xx: sysvals and UBOs
Basically just sync up the cmdstream emit parts to match the changes
already done on a3xx.

Also, fix scheduling for mem instructions.  This is needed on a4xx, and
I am a bit surprised it isn't needed for a3xx.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 10:40:18 -04:00
Rob Clark
e14af4c067 nir/builder: add nir_builder_insert_after_instr()
For lowering if/else, I need a way to insert at the end of the previous
block.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-17 10:34:15 -04:00
Rob Clark
7a9063e7c7 gallium/ttn: fix TXF
There is a level param stashed away in the .w component of the first
src.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-17 10:34:15 -04:00
Rob Clark
ef7c4f39bf gallium/ttn: add UBO support
v2: move ishl into ttn (instead of driver backend) to keep the units
    consistent between immediate and indirect offsets

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-17 10:34:15 -04:00
Rob Clark
8efe20467b gallium/ttn: minor cleanup
v2: also use ttn_src_for_indirect() everywhere for addr access, rather
    than open-coding it for INPUT/CONST srcs
v3: move ralloc out of ttn_src_for_indirect() into the one call site
    that needs a ptr

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-17 10:34:15 -04:00
Rob Clark
a3cce7a38e gallium/ttn: add support for TXL2
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-17 10:34:15 -04:00
Rob Clark
f44d836d7a gallium/ttn: add support for texture offsets
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-17 10:34:14 -04:00
Brian Paul
e050a19af8 mesa/st: Free st_translate with FREE macro.
To match CALLOC_STRUCT macro.

Fixes memory corruption on Windows when u_memory's memory debugging is
enabled.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-17 15:14:23 +01:00
Jose Fonseca
8638e3ae1b libgl-gdi: Prevent "pure virtual method called" error when.
When running piglit w/ llvmpipe on Windows several tests terminate
abnormally just when the test exits.

The problem was that LLVMContextDispose was being called
after LLVM global destructors.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-04-16 20:37:34 +01:00
Ville Syrjälä
4fc645aed1 i965: Add marketing names for CHV
All CHV devices will be branded as "Intel(r) HD Graphics".

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-04-16 21:32:41 +03:00
Ian Romanick
94aab6cde6 nir: Convert the if-test for num_inputs == 2 to an assertion
Suggested by Jason on a different patch after some comments /
questions by Ilia.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabott0@gmail.com>
2015-04-16 09:56:49 -07:00
Marek Olšák
61293bfced configure.ac: print LLVM_LDFLAGS
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velilkov@gmail.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
0d46440c3a glsl_to_tgsi: only associate the uniform storage once at link time
This hack is no longer needed. (see the previous commit)

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
bb5df7350b glsl_to_tgsi: add STATE_FB_WPOS_Y_TRANSFORM at link time
This will allow removing the uniform storage re-association during
TGSI generation at draw time.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
e2066a4344 glsl_to_tgsi: add assertions for detecting out-of-bounds immediates access
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
dcc74d47c4 glsl_to_tgsi: don't use a potentially-undefined immediate for ir_query_levels
Cc: 10.4 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
14c5bc3b9a glsl_to_tgsi: fix out-of-bounds constant access and crash for uniforms
This fixes piglit shaders@glsl-fs-uniform-array-loop-unroll with immediate
shader compilation - it's a compiler test, so it has never been translated
to TGSI before.

Cc: 10.4 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
d3045d391b glsl_to_tgsi: cleanup includes
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
76c2d4498d mesa/program: remove dead code
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
b79c620663 radeonsi: add a debug option to compile shaders when they're created
Tested-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-16 18:36:29 +02:00
Marek Olšák
99eef3b8b3 st/mesa: add a debug option to compile shaders at link time
v2: fix crashes

Tested-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-04-16 18:36:29 +02:00
Kristian Høgsberg
993a6288f7 i965: Rewrite ir_tex to ir_txl with lod 0 for vertex shaders
The ir_tex opcode turns into a sample or sample_c message, which will try to
compute derivatives to determine the lod. This produces garbage for
non-fragment shaders where the sample coordinates don't correspond to
subspans.

We fix this by rewriting the opcode from ir_tex to ir_txl and setting the
lod to 0.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89457
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-16 09:18:30 -07:00
Emil Velikov
a7d018accf radeonsi: remove bogus r600-- triple
As mentioned by Michel Dänzer for LLVM >= 3.6 we create the
LLVMTargetMachine (with triple amdgcn--), as we setup the radeonsi
context. For older LLVM or hardware (r600) the triple is always r600--
and is created at a later stage - radeon_llvm_compile()

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-04-16 14:15:19 +01:00
Neil Roberts
33f73e93ff i965/skl: Add the header for constant loads outside of the generator
Commit 5a06ee738 added a step to the generator to set up the message
header when generating the VS_OPCODE_PULL_CONSTANT_LOAD_GEN7
instruction. That pseudo opcode is implemented in terms of multiple
actual opcodes, one of which writes to one of the source registers in
order to set up the message header. This causes problems because the
scheduler isn't aware that the source register is written to and it
can end up reorganising the instructions incorrectly such that the
write to the source register overwrites a needed value from a previous
instruction. This problem was presenting itself as a rendering error
in the weapon in Enemy Territory: Quake Wars.

Since commit 588859e1 there is an additional problem that the double
register allocated to include the message header would end up being
split into two. This wasn't happening previously because the code to
split registers was explicitly avoided for instructions that are
sending from the GRF.

This patch fixes both problems by splitting the code to set up the
message header into a new pseudo opcode so that it will be done
outside of the generator. This new opcode has the header register as a
destination so the scheduler can recognise that the register is
written to. This has the additional benefit that the scheduler can
optimise the message header slightly better by moving the mov
instructions further away from the send instructions.

On Skylake it appears to fix the following three Piglit tests without
causing any regressions:

 gs-float-array-variable-index
 gs-mat3x4-row-major
 gs-mat4x3-row-major

I think we actually may need to do something similar for the fs
backend and possibly for message headers from regular texture sampling
but I'm not entirely sure.

v2: Make sure the exec-size is retained as 8 for the mov instruction
    to initialise the header from g0. This was accidentally lost
    during a rebase on top of 07c571a39f.
    Split the patch into two so that the helper function is a separate
    change.
    Fix emitting the MOV instruction on Gen7.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89058
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-04-16 13:02:26 +01:00
Neil Roberts
a9e4cf5d32 i965/vec4: Add a helper function to emit VS_OPCODE_PULL_CONSTANT_LOAD
There were three places in the visitor that had a similar chunk of
code to emit the VS_OPCODE_PULL_CONSTANT_LOAD opcode using a register
for the offset. This patch combines the chunks into a helper function
to reduce the code duplication. It will also be useful in the next
patch to expand what happens on Gen9+. This shouldn't introduce any
functional changes.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-04-16 13:01:43 +01:00
Jose Fonseca
037e0e78ab mesa,glsl: rename interface to programInterface.
`interface` is a define on Windows -- an alias for `struct` keyword,
used when declaring COM interfaces in C or C++.

So use instead `programInterface`, therefore matching the name used
in GL_ARB_program_interface_query spec/headers, which was renamed exactly
for the same reason:

  "Revision 10, May 10, 2012 (pbrown)
     - Rename the formal parameter <interface> used by the functions in this
       extension to <programInterface>.  Certain versions of the Microsoft
       C/C++ compiler and/or its headers cause "interface" to be treated as a
       reserved keyword."

Trivial.
2015-04-16 10:23:24 +01:00
Flora Cui
f78b2c432f gbm: Add GBM_BO_USE_LINEAR flag
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-04-16 15:49:15 +09:00
Tapani Pälli
7c154bbe60 mesa: refactor GetUniformBlockIndex
Use _mesa_program_resource_index to get index.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
1b256eb0ec mesa: refactor GetUniformIndices
Use _mesa_program_resource_index to get indices.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
51313f567d mesa: refactor GetUniformLocation
Use _mesa_program_resource_location to get location.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
45637e9c1f mesa: refactor GetActiveUniformBlockName
Use _mesa_get_program_resource_name to get name.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
284003e1f1 mesa: remove unused _mesa_get_uniform_name
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
8d6fa52e33 mesa: refactor GetActiveUniformName
Use _mesa_get_program_resource_name to get name.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
17dc939f75 mesa: refactor GetActiveUniform
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
dc39d843d2 mesa: refactor GetTransformFeedbackVarying
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
7519ddb4d8 mesa: refactor GetActiveUniformsiv, use _mesa_program_resource_prop
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-16 07:55:57 +03:00
Tapani Pälli
34df5ebd77 mesa: mesa_bufferiv utility function for buffer objects
Patch adds new function 'mesa_bufferiv' and refactors existing
GetActiveUniformBlockiv and GetActiveAtomicCounterBufferiv to
use it.

corresponding Piglit tests:
   arb_uniform_buffer_object*
   arb_shader_atomic_counters*

(Many tests hit the corresponding queries.)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
4e7f134f89 mesa: refactor GetFragDataIndex
Use _mesa_program_resource_location_index to fetch index.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
62057c77f1 mesa: refactor GetFragDataLocation
Use program_resource_location to fetch location.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
3d1544cc91 mesa: refactor GetAttribLocation
Use program_resource_location to fetch location.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
26c0394a96 mesa: refactor GetActiveAttrib
Instead of iterating IR, retrieve required information through
the new program resource functions.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-16 07:55:57 +03:00
Tapani Pälli
41c230cd98 mesa: enable GL_ARB_program_interface_query extension
(and mark it as DONE in docs/GL3.txt + 10.6.0 relnotes)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
2ab8de2181 mesa: implementation of glGetProgramResourceiv
Patch adds required helper functions to shaderapi.h and
the actual implementation.

The property query functionality can be tested with tests for
following functions that are refactored by later patches:

   GetActiveAtomicCounterBufferiv
   GetActiveUniformBlockiv
   GetActiveUniformsiv

v2: code cleanup (Ilia Mirkin)
    add bufSize < 0 check and error out
    fix is_resource_referenced to return bool
    check for propCount and bufSize, fixes in buffer_prop

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:57 +03:00
Tapani Pälli
9367ade331 mesa: glGetProgramResourceLocationIndex
Patch adds required helper functions to shaderapi.h and
the actual implementation.

The added functionality can be tested by tests for following
functions that are refactored by later patches:

   GetFragDataIndex

v2: return -1 if output not referenced by fragment stage
    (Ilia Mirkin)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:56 +03:00
Tapani Pälli
e0e4d77f01 mesa: glGetProgramResourceLocation
Patch adds required helper functions to shaderapi.h and
the actual implementation.

corresponding Piglit test:
   arb_program_interface_query-resource-location

The added functionality can be tested by tests for following
functions that are refactored by later patches:

   GetAttribLocation
   GetUniformLocation
   GetFragDataLocation

v2: code cleanup, changes to array element
    syntax checking (Ilia Mirkin)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:56 +03:00
Tapani Pälli
2a5a0d19d6 mesa: glGetProgramResourceName
Patch adds required helper functions to shaderapi.h and
the actual implementation.

Name generation copied from '_mesa_get_uniform_name' which can
be removed later by refactoring functions to use resource list.

The added functionality can be tested by tests for following
functions that are refactored by later patches:

   GetActiveUniformName
   GetActiveUniformBlockName

v2: no index for geometry shader inputs (Ilia Mirkin)
    add bufSize < 0 check and error out
    validate enum

corresponding Piglit test:
   arb_program_interface_query-getprogramresourcename

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.org>
2015-04-16 07:55:56 +03:00
Tapani Pälli
161f57f610 mesa: glGetProgramResourceIndex
Patch adds required helper functions to shaderapi.h and
the actual implementation.

v2: code cleanup (Ilia Mirkin)

corresponding Piglit test:
   arb_program_interface_query-getprogramresourceindex

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.org>
2015-04-16 07:55:56 +03:00
Tapani Pälli
4d3b98bc58 mesa: glGetProgramInterfaceiv
Patch adds required helper functions to shaderapi.h and
the actual implementation.

v2: code cleanup (Ilia Mirkin)
    fix array size fo xfb varyings
    validate programInterface and throw error

v3: put GL_MAX_NUM_COMPATIBLE_SUBROUTINES where
    it belongs

corresponding Piglit test:
   arb_program_interface_query-getprograminterfaceiv

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:56 +03:00
Tapani Pälli
c796ce4108 mesa/glsl: build list of program resources during linking
Patch adds ProgramResourceList to gl_shader_program structure.
List contains references to active program resources and is
constructed during linking phase.

This list will be used by follow-up patches to implement hooks
for GL_ARB_program_interface_query. It can be also used to
implement any of the older shader program query APIs.

v2: code cleanups + note for SSBO and subroutines (Ilia Mirkin)
v3: code cleanups + assert(MESA_SHADER_STAGES < 8) (Martin Peres)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:55:35 +03:00
Tapani Pälli
b297fc27aa glapi: add GL_ARB_program_interface_query skeleton
v2: update dispatch_sanity test (Jason Ekstrand)
    + small code cleanups

v3: xml and Makefile fixes (Ilia Mirkin, Matt Turner)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:30:12 +03:00
Tapani Pälli
993b9b6adb linker: fix varying linking if SSO program has only gs and fs
Previously linker did not take in to account case where one would
have only gs and fs (with SSO), patch adds the case by refactoring
code around assign_varying_locations. This makes sure locations for
gs get populated correctly.

This was found with some of the SSO subtests of Martin's upcoming
GetProgramInterfaceiv Piglit test which passes with the patch, no
Piglit regressions.

v2: code cleanups (Martin Peres)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-16 07:30:12 +03:00
Glenn Kennard
17d69862a9 r600g/sb: Skip empty ALU clause while scheduling
Fixes assert triggered by
ext_transform_feedback-intervening-read output use_gs
piglit test.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-16 12:43:20 +10:00
Ian Romanick
4cf5ca5ca5 nir: Try commutative sources in CSE
Shader-db results:

GM45 NIR:
total instructions in shared programs: 4082044 -> 4081919 (-0.00%)
instructions in affected programs:     27609 -> 27484 (-0.45%)
helped:                                44

Iron Lake NIR:
total instructions in shared programs: 5678776 -> 5678646 (-0.00%)
instructions in affected programs:     27406 -> 27276 (-0.47%)
helped:                                45

Sandy Bridge NIR:
total instructions in shared programs: 7329995 -> 7329096 (-0.01%)
instructions in affected programs:     142035 -> 141136 (-0.63%)
helped:                                406
HURT:                                  19

Ivy Bridge NIR:
total instructions in shared programs: 6769314 -> 6768359 (-0.01%)
instructions in affected programs:     140820 -> 139865 (-0.68%)
helped:                                423
HURT:                                  2

Haswell NIR:
total instructions in shared programs: 6183693 -> 6183298 (-0.01%)
instructions in affected programs:     96538 -> 96143 (-0.41%)
helped:                                303
HURT:                                  4

Broadwell NIR:
total instructions in shared programs: 7501711 -> 7498170 (-0.05%)
instructions in affected programs:     266403 -> 262862 (-1.33%)
helped:                                705
HURT:                                  5
GAINED:                                4

v2: Rebase on top of Connor's fix.

v3: Convert the if-test for num_inputs == 2 to an assertion.  Suggested
by Jason after some comments / questions by Ilia.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> [v1]
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: Connor Abbott <cwabbott0@gmail.com>
2015-04-15 18:15:59 -07:00
Ian Romanick
8957c9e448 glx: Create proper server dependency for GLX_EXT_create_context_es2_profile
Previously GLX_EXT_create_context_es2_profile was marked as "direct
only" so that it would not depend on server support.  Since the
extension required functions that are part of
GLX_ARB_create_context_profile, support for the EXT was disabled if the
ARB was not supported.

This was complete rubbish.  If the server supported the ARB but not the
EXT, sending a request with GLX_CONTEXT_ES2_PROFILE_BIT_EXT would result
in GLXBadProfileARB.

Instead of the misguided hack, make GLX_EXT_create_context_es2_profile
properly depend on server support by not marking it as "direct only."

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-15 18:11:54 -07:00
Eric Anholt
b229e6c7de vc4: Don't try to use color load/stores to blit across format changes.
We could potentially support the right combination of 8888 to 565, but the
important thing for now is to not mix up our orderings of 8888.  Fixes
fbo-copyteximage regressions.
2015-04-15 16:50:23 -07:00
Eric Anholt
cff2e08c4c vc4: Don't try to use color load/stores to do depth/stencil blits.
Fixes regressions in fbo-generatemipmap-formats on depth/stencil (which
does blits to work around baselevel/lastlevel).
2015-04-15 16:50:23 -07:00
Eric Anholt
3a728d4dfb vc4: Update the shadow texture for public textures on every draw.
We don't know who else has written to it, so we'd better update it every
time.  This makes the gears spin in X again.
2015-04-15 16:50:23 -07:00
Eric Anholt
bd957b1b79 vc4: Hook up VC4_DEBUG=perf to some useful printfs. 2015-04-15 16:50:22 -07:00
Brian Paul
e1d095053b st/mesa: log shaders, GLSL info log with _mesa_log()
As with previous patch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-04-15 16:30:49 -06:00
Brian Paul
011cad806a mesa: log shaders, GLSL info log with _mesa_log()
Now, if we set MESA_LOG_FILE and MESA_GLSL=dump, all the shader info
will get logged to the named file instead of stderr.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-04-15 16:30:49 -06:00
Brian Paul
2926bbfb28 mesa: add _mesa_log(), _mesa_get_log_file() functions
_mesa_log() simply writes log information to stderr or MESA_LOG_FILE.
_mesa_get_log_file() returns the file handle to use for logging.

This will be used for shader dumping/logging instead of always printing
to stderr.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-04-15 16:30:49 -06:00
Brian Paul
11bfee4c3a tgsi: also dump label for TGSI_OPCODE_BGNSUB opcode
So we can see the label associated with subroutines.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-04-15 16:30:49 -06:00
Jose Fonseca
1aa50339d8 st/wgl: Couple of fixes to opengl32.dll's wglCreateContext/wglDeleteContext dispatch.
- Use GetModuleHandle instead of LoadLibrary to avoid incrementing the
  opengl32.dll reference count (otherwise the opengl32.dll will linger
  in memory forever.)

- Ensure we use our fake wglCreateContext/wglDeleteContext when using
  Mesa as a drop-in replacement for opengl32.dll

Untested.  Just noticed by accident.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-15 09:58:38 +01:00
Jose Fonseca
6635fb6cae mesa: Enable _mesa_dlopen on MSVC too.
As pointed out by Shervin Sharifi.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-15 09:58:27 +01:00
Samuel Iglesias Gonsalvez
3cbefe3cf4 glsl: fix assignment of multiple scalar and vecs to matrices.
When a vec has more elements than row components in a matrix, the
code could end up failing an assert inside assign_to_matrix_column().

This patch makes sure that when there is still room in the matrix for
more elements (but in other columns of the matrix), the data is actually
assigned.

This patch fixes the following dEQP test:

  dEQP-GLES3.functional.shaders.conversions.matrix_combine.float_bvec4_ivec2_bool_to_mat4x2_vertex
  dEQP-GLES3.functional.shaders.conversions.matrix_combine.float_bvec4_ivec2_bool_to_mat4x2_fragment

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-04-15 08:11:18 +02:00
Ian Romanick
bc672e261c nir: Fix typo in "ushr by 0" algebraic replacement
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Cc: "10.5" <mesa-stable@lists.freedestkop.org>
2015-04-14 16:41:04 -07:00
Ian Romanick
67a8610caf nir: Silence unused parameter warnings
nir/nir.h: In function 'nir_validate_shader':
nir/nir.h:1567:56: warning: unused parameter 'shader' [-Wunused-parameter]
 static inline void nir_validate_shader(nir_shader *shader) { }
                                                        ^
nir/nir_opt_cse.c: In function 'src_is_ssa':
nir/nir_opt_cse.c:165:32: warning: unused parameter 'data' [-Wunused-parameter]
 src_is_ssa(nir_src *src, void *data)
                                ^
nir/nir_opt_cse.c: In function 'dest_is_ssa':
nir/nir_opt_cse.c:171:35: warning: unused parameter 'data' [-Wunused-parameter]
 dest_is_ssa(nir_dest *dest, void *data)
                                   ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-14 16:41:04 -07:00
Connor Abbott
47a1b4841d nir/cse: fix bug with comparing non-per-component sources
We weren't comparing the right number of components when checking
swizzles. Use nir_ssa_alu_instr_num_src_components() to do the right
thing.

No piglit regressions, and no fixes either.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-14 19:07:44 -04:00
Ben Widawsky
b069f9eafd i965/fs: Combine tex/fb_write operations (opt)
Certain platforms support the ability to sample from a texture, and write it out
to the file RT - thus saving a costly send instructions (note that this is a
potnential win if one wanted to backport to a tag that didn't have the patch
from Topi which removed excess MOVs from LOAD_PAYLOAD - 97caf5fa04),

v2: Modify the algorithm. Instead of iterating in reverse through blocks and
insts, since the last block/inst is the only thing which can benefit. Rebased
on top of Ken's patching modifying is_last_send

v3: Rebased over almost 2 months, and Incorporated feedback from Matt:
Some comment typo fixes and rewordings.
Whitespace
Move the optimization pass outside of the optimize loop

v4: Some cosmetic changes requested from Ken. These changes ensured that the
optimization function always returned true when an optimization occurred, and
false when one did not. This behavior did not exist with the original patch. As
a result, having the separate helper function which Matt did not like no longer
made sense, and so now I believe everyone should be happy.

Benchmark (n=20)   %diff
*OglBatch5         -1.4
*OglBatch7         -1.79
OglFillTexMulti    5.57
OglFillTexSingle   1.16
OglShMapPcf        0.05
OglTexFilterAniso  3.01
OglTexFilterTri    1.94

No piglit regressions:
(http://otc-gfxtest-01.jf.intel.com:8080/view/dev/job/bwidawsk/112/)

[*] I believe my measurements are incorrect for Batch5-7. If I add this new
optimization, but never emit the new instruction I see similar results.

v5: Remove declaration of combine_tex_header since v4 dropped that function
(Ben)
Remove check for impossible case of an empty block (Matt)
Set dest earlier to avoid extra special-casing in generate_tex (Matt)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-14 15:22:47 -07:00
Ben Widawsky
6866378cf4 i965/fs: Only emit FS_OPCODE_PLACEHOLDER_HALT if there are discards
Based originally on a patch from Ken in May 2014 of the same title. Things
changed enough that I didn't feel comfortable leaving his authorship.

v2: Replace fp->UsesKill with wm_prog_data->uses_kill. Since Ken took the time
to also explain the difference to me, here is his explanation for posterity:

"fp->UsesKill indicates that a ARB_fragment_program shader uses the KIL
instruction, or that a GLSL shader uses the "discard" insntruction
(which are analogous).

On Gen4-5, we sometimes have to simulate OpenGL's "Alpha Test" feature
by emitting shader code that implicitly does a "discard" instruction.

In the key setup, we do:

   /* key->alpha_test_func means simulating alpha testing via discards,
    * so the shader definitely kills pixels.
    */
   prog_data.uses_kill = fp->program.UsesKill || key->alpha_test_func;

Even though the shader may not technically contain a "discard", we need
to act as if it does.

I've also been trying to move the i965 state setup code to use
brw_wm_prog_key for everything, rather than poking at core Mesa's
gl_program/gl_fragment_program/gl_shader/gl_shader_program structures.

--Ken"

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-14 15:22:47 -07:00
Ben Widawsky
38707e1478 i965/fs: Create a has_side_effects for fs_inst
When an instruction has a side effect, it impacts the available options when
reordering an instruction. As the EOT flag is an implied write to the render
target in the FS, it can be considered a side effect.

This patch shouldn't actually have any impact on the current code since the EOT
flag implies that the opcode is already one with side effects,
FS_OPCODE_FB_WRITE. The next patch however will introduce an optimization
whereby the EOT flag can occur with an opcode SHADER_OPCODE_TEX, and as that
instruction will perform the same implied write to the render target, it cannot
be reordered.

v2: Remove extra whitespace (Matt)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-14 15:22:47 -07:00
Marius Predut
28d9e90428 i965: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:53 -07:00
Marius Predut
139e6c7c4a i915: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:51 -07:00
Marius Predut
fc57222f60 glx: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:41 -07:00
Marius Predut
6f4d9418b4 main: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:41 -07:00
Marius Predut
50cb780f7f state_tracker: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:41 -07:00
Marius Predut
d02942cc77 swrast: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:41 -07:00
Marius Predut
e1231159bc vbo: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:41 -07:00
Marius Predut
f0e693efb3 tnl: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
The patch was verified with Microsoft Visual studio 2013
redistributable package(RTM version number: 18.0.21005.1)
Next MSVC versions intends to support __func__.
No functional changes.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
2015-04-14 12:23:41 -07:00
Matt Turner
3ca17e75e4 i965/fs: Correct mistake in determining whether a MUL is negated.
a * b is equivalent to -a * -b, and the previous code was failing at
that.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89961
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-14 12:16:03 -07:00
Neil Roberts
07c571a39f i965/skl: Use an exec size of 8 to initialise the message header
Commit e93566a15c changed the message header code needed to
make Skylake use SIMD4x2 so that it uses a register with width 4
instead of 8 as the source register in the send message. However it
also changed the width for the dest in the MOV instruction which is
used to initialise the header register with the values from g0. The
width of the destination is used to determine the exec size in
brw_set_dest so this would end up making the MOV have an exec size of
4. I think this would end up leaving the top half of the register
uninitialised. The top half of the header has meaningful values so
this probably isn't a good idea.

This patch just casts the dest register for the MOV instruction back
to a vec8 to fix it. It doesn't cause any changes to a Piglit run.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-04-14 19:20:28 +01:00
Ian Romanick
05a1d84491 i965/fs: Always invert predicate of SEL with swapped arguments
Commit b616164 added an optimization of b2f generation of a comparison.
It also included an extra optimization of one of the comparison values
is a constant of zero.  The trick was that some value was known to be
zero, so that value could be used in the SEL instruction instead of
potentially loading 0.0 into a register.

This change switched the order of the arguments to the SEL, and, for
some unknown reason, I thought that the predicate should therefore
only be inverted for the == case.  Clearly, it should always be
inverted.

Fixes piglit fs-notEqual-of-expression.shader_test and
fs-equal-of-expression.shader_test.

v2: Don't do the "register already has zero" optimization for the '== 0'
case.  In that case, the register does not have zero when we want to
produce a zero result.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89722
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v1]
Tested-by: Lu Hua <huax.lu@intel.com>
2015-04-14 08:35:10 -07:00
Tom Stellard
e0994e0f97 radeon/llvm: Improve codegen for KILL_IF
Rather than emitting one kill instruction per component of KILL_IF's src
reg, we now or the components of the src register together and use the
result as a condition for just one kill instruction.

shader-db stats (bonaire):

979 shaders
Totals:
SGPRS: 34872 -> 34848 (-0.07 %)
VGPRS: 20696 -> 20676 (-0.10 %)
Code Size: 749032 -> 748452 (-0.08 %) bytes
LDS: 11 -> 11 (0.00 %) blocks
Scratch: 12288 -> 12288 (0.00 %) bytes per wave

Totals from affected shaders:
SGPRS: 1184 -> 1160 (-2.03 %)
VGPRS: 600 -> 580 (-3.33 %)
Code Size: 13200 -> 12620 (-4.39 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Increases:
SGPRS: 2 (0.00 %)
VGPRS: 0 (0.00 %)
Code Size: 0 (0.00 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)

Decreases:
SGPRS: 5 (0.01 %)
VGPRS: 5 (0.01 %)
Code Size: 25 (0.03 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)

*** BY PERCENTAGE ***

Max Increase:

SGPRS: 32 -> 40 (25.00 %)
VGPRS: 0 -> 0 (0.00 %)
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Max Decrease:

SGPRS: 32 -> 24 (-25.00 %)
VGPRS: 16 -> 12 (-25.00 %)
Code Size: 116 -> 96 (-17.24 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

*** BY UNIT ***

Max Increase:

SGPRS: 64 -> 72 (12.50 %)
VGPRS: 0 -> 0 (0.00 %)
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Max Decrease:

SGPRS: 32 -> 24 (-25.00 %)
VGPRS: 16 -> 12 (-25.00 %)
Code Size: 424 -> 356 (-16.04 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-04-14 13:37:12 +00:00
Tom Stellard
c6d79ed289 radeon/llvm: Run LLVM's instruction combining pass
This should improve code quality in general and will help with some
future changes to how we emit kill instructions.

shader-db shows a few regressions, but these don't seem to be the result
of deficiencies in instcombine.  They're mostly caused by the scheduler
making different decisions than before.

shader-db stats (bonaire):

979 shaders
Totals:
SGPRS: 35056 -> 34872 (-0.52 %)
VGPRS: 20624 -> 20696 (0.35 %)
Code Size: 764372 -> 749032 (-2.01 %) bytes
LDS: 11 -> 11 (0.00 %) blocks
Scratch: 12288 -> 12288 (0.00 %) bytes per wave

Totals from affected shaders:
SGPRS: 13264 -> 13072 (-1.45 %)
VGPRS: 8248 -> 8316 (0.82 %)
Code Size: 486320 -> 470992 (-3.15 %) bytes
LDS: 11 -> 11 (0.00 %) blocks
Scratch: 11264 -> 11264 (0.00 %) bytes per wave

Increases:
SGPRS: 6 (0.01 %)
VGPRS: 20 (0.02 %)
Code Size: 14 (0.01 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)

Decreases:
SGPRS: 32 (0.03 %)
VGPRS: 8 (0.01 %)
Code Size: 244 (0.25 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)

*** BY PERCENTAGE ***

Max Increase:

SGPRS: 32 -> 48 (50.00 %)
VGPRS: 12 -> 20 (66.67 %)
Code Size: 216 -> 224 (3.70 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Max Decrease:

SGPRS: 40 -> 32 (-20.00 %)
VGPRS: 16 -> 12 (-25.00 %)
Code Size: 368 -> 280 (-23.91 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

*** BY UNIT ***

Max Increase:

SGPRS: 32 -> 48 (50.00 %)
VGPRS: 28 -> 36 (28.57 %)
Code Size: 39320 -> 40132 (2.07 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Max Decrease:

SGPRS: 72 -> 64 (-11.11 %)
VGPRS: 48 -> 40 (-16.67 %)
Code Size: 6272 -> 5852 (-6.70 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Scratch: 0 -> 0 (0.00 %) bytes per wave

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-04-14 13:37:05 +00:00
Tom Stellard
2569c7109d radeonsi: Add header and footer to shader stat dump
This makes it easier to parse.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-04-14 13:36:59 +00:00
Kenneth Graunke
406df68736 i965: Fix software primitive restart with indirect draws.
new_prim was declared as a stack variable within a nested scope; we
tried to retain a pointer to that data beyond the scope, which is bogus.

GCC with -O1 eliminated most of the code that set new_prim's fields.

Move the declaration to fix the bug.

v2: Also fix new_ib (thanks to Matt Turner and Ben Widawsky).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81025
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Cc: mesa-stable@lists.freedesktop.org
2015-04-14 01:49:02 -07:00
Kenneth Graunke
f55ded764c i965: Implement proper workaround for Gen4 GPU CONSTANT_BUFFER hangs.
I finally managed to dig up some information on our mysterious GPU hangs.
A wiki page from the Crestline validation team mentions that they found
a GPU hang in "Serious Sam 2" (on Windows) with remarkably similar
conditions to the ones we've seen in Google Chrome and glmark2.

Apparently, if WM_STATE has "PS Use Source Depth" enabled, CC_STATE has
most depth state disabled, and you issue a CONSTANT_BUFFER command and
immediately draw, the depth interpolator makes a small mistake that
leads to hangs.

Most of the traces I looked at contained a CONSTANT_BUFFER packet
immediately followed by 3DPRIMITIVE, or at least very few packets.
It appears they also have "PS Use Source Depth" enabled - either at the
hang, or a little before it.  So I think this is our bug.

The workaround is to emit a non-pipelined state packet after issuing a
CONSTANT_BUFFER packet.  This is really similar to the workaround I
developed in commit c4fd0c9052.

v2: Fix word-wrapping issues.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-14 01:49:00 -07:00
Kenneth Graunke
21d29124a7 i965: Fix INTEL_DEBUG=shader_time for SIMD8 VS.
In commit 4ebeb71573, I deleted the
emit_shader_time_end() call in emit_urb_writes().  But I failed to add
it to run_vs(), as I intended.  So no data was recorded at all.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-14 01:47:14 -07:00
Eric Anholt
1be329e64c vc4: Add a blitter path using just the render thread.
This accelerates the path for generating the shadow tiled texture when
asked to sample from a raster texture (typical in glamor).
2015-04-13 23:20:46 -07:00
Eric Anholt
76d56752cc vc4: Allow submitting jobs with no bin CL in validation.
For blitting, we want to fire off an RCL-only job.  This takes a bit of
tweaking in our validation and the simulator support (and corresponding
new code in the kernel).
2015-04-13 23:20:45 -07:00
Eric Anholt
43b20795b7 vc4: Move the blit code to a separate file.
There will be other blit code showing up, and it seems like the place
you'd look.
2015-04-13 23:20:45 -07:00
Eric Anholt
e214a59635 vc4: Separate out a bit of code for submitting jobs to the kernel.
I want to be able to have multiple jobs being set up at the same time (for
example, a render job to do a little fixup blit in the course of doing a
render to the main FBO).
2015-04-13 23:20:45 -07:00
Eric Anholt
44b63cf5c0 vc4: When asked to sample from a raster texture, make a shadow tiled copy.
So, it turns out my simulator doesn't *quite* match the hardware.  And the
errata about raster textures tells you most of what's wrong, but there's
still stuff wrong after that.  Instead, if we're asked to sample from
raster, we'll just blit it to a tiled temporary.

Raster textures should only be screen scanout, and word is that it's
faster to copy to tiled using the tiling engine first than to texture from
an entire raster texture, anyway.
2015-04-13 22:34:06 -07:00
Eric Anholt
d04b07f8e2 vc4: Fix off-by-one in branch target validation. 2015-04-13 22:34:06 -07:00
Eric Anholt
7fa2f2e366 vc4: Use NIR-level lowering for idiv.
This fixes the idiv tests in piglit.
2015-04-13 21:36:40 -07:00
Eric Anholt
84ebaff1b7 vc4: Add a bunch of type conversions.
These are required to get piglit's idiv tests working.  The
unsigned<->float conversions are wrong, but are good enough to get
piglit's small ranges of values working.
2015-04-13 21:36:40 -07:00
Dave Airlie
cc5860e407 st/mesa: align cube map arrays layers
We create textures internally for texsubimage, and we use
the values from sub image to create a new texture, however
we don't align these to valid sizes, and cube map arrays
must have an array size aligned to 6.

This fixes texsubimage cube_map_array on CAYMAN at least,
(it was causing  GPU hang and bad values), it probably
also fixes it on radeonsi and evergreen.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89957
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-14 08:04:41 +10:00
Dave Airlie
5ed79312ed st/mesa: convert sub image for cube map arrays to 2d arrays for upload
Since we can subimage upload a number of cube map array layers,
that aren't a complete cube map array, we should specify things
as a 2D array and blit from that.

Suggested by Ilia Mirkin as an alternate fix for texsubimage
cube map array issues.

seems to work just as well.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-14 08:04:21 +10:00
Mathias Froehlich
1e1d5456ba i965: Flush batchbuffer containing the query on glQueryCounter.
This change fixes a regression with timer queries introduced with
commit 3eb6258. There the pending batchbuffer is flushed
only if glEndQuery is executed. This present change adds such
a flush to glQueryCounter which also schedules a value query
just like glEndQuery does. The patch fixes GPU timer queries
going mad from within osgviewer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
Cc: mesa-stable@lists.freedesktop.org
2015-04-13 20:30:23 +02:00
Eric Anholt
adae027260 vc4: Use the blit interface for updating shadow textures.
This lets us plug in a better blit implementation and have it impact the
shadow update, too.
2015-04-13 10:39:24 -07:00
Eric Anholt
39b6f7e76c vc4: Remove dead fields from vc4_surface. 2015-04-13 10:39:24 -07:00
Eric Anholt
5100221ff7 vc4: Skip sending down the clear colors if not clearing. 2015-04-13 10:39:24 -07:00
Eric Anholt
725620f21d vc4: Sync with kernel changes to relax BCL versus RCL validation.
There was no reason to tie the two packets' values together.
2015-04-13 10:39:23 -07:00
Eric Anholt
cb88d2cfcb vc4: Fix another space allocation mistake.
We're over-allocating our BCL in vc4_draw.c, so this never mattered.
However, new RCL-only blit support might end up here without having set up
any BCL contents.
2015-04-13 10:39:02 -07:00
Eric Anholt
8eb9304ee7 vc4: Add missed accounting for the size of the semaphore.
This wouldn't have mattered except in the worst case scenario RCL setup.
2015-04-13 10:33:30 -07:00
Matt Turner
89b140dfae swrast: Mark MAX_GLUINT literal with u suffix.
Coverity is confused by the "float < int / 2" expression and suggests
casting MAX_GLUINT to unsigned, which I believe it was supposed to have
been already.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-13 09:03:02 -07:00
Matt Turner
1c9db39d54 i965: Don't bother freeing NULL.
Commit e16c5c90 was replacing 'region' with 'mt', leaving this
nonsensical code.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-13 09:03:02 -07:00
Chad Versace
a76dc15b2b i965: Lift some restrictions on dma_buf EGLImages
Allow glEGLImageTargetRenderbufferStorageOES and
glEGLImageTargetTexture2DOES for dma_buf EGLImages if the image is
a single RGBA8 unorm plane. This is safe, despite fast color clears,
because i965 disables allocation of auxiliary buffers for EGLImages.

Chrome OS needs this, because its compositor uses dma_buf EGLImages for
its scanout buffers.

Testing:
  - Tested on Ivybridge Chromebook Pixel with WebGL Aquarium and
    YouTube.
  - No Piglit regressions on Broadwell with `piglit run -p gbm
    tests/quick.py`, with my Piglit patches that update the
    EGL_EXT_image_dma_buf_import tests.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:36:32 -07:00
Chad Versace
2943b15ce7 i965: Disable aux buffers for EGLImage-backed miptrees
EGL does not yet have extensions to manage the flushing and invalidating
of driver-internal aux buffers. So we must disable aux buffers of
dma_buf-backed EGLImages in order to safely render into them.

This patch is obviously needed for renderbufers. It's also needed for
textures because the user can attach the texture to a framebuffer and
because the driver sometimes renders to textures for internal reasons.

Testing:
  - Tested on Ivybridge Chromebook Pixel with WebGL Aquarium and
    YouTube.
  - No Piglit regressions on Broadwell with `piglit run -p gbm
    tests/quick.py`.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:36:32 -07:00
Chad Versace
bf504b6127 i965: Change intel_miptree_create_for_bo() signature
Add parameter 'bool disable_aux_buffers'.

This is a refactor patch. The patch changes no behavior because the new
parameter is false in every call.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:36:32 -07:00
Chad Versace
d3b042f359 i965: Add field intel_mipmap_tree::disable_aux_buffers
The new field disables allocation of auxiliary buffers, such as the HiZ
buffer and MCS buffer. This is useful for sharing the miptree bo with an
external client that doesn't understand auxiliary buffers.

We need this field to safely render to a buffer that was imported with
EGL_EXT_image_dma_buf_import, because EGL does not yet have extensions
to manage flushing and invalidating auxiliary buffers.

Nothing yet enables this field. That's left to follow-up patches.

Testing:
  - Tested on Ivybridge Chromebook Pixel with WebGL Aquarium and
    YouTube.
  - No Piglit regressions on Broadwell with `piglit run -p gbm
    tests/quick.py`.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:36:29 -07:00
Chad Versace
e1338f267f i965: Refactor brw_is_hiz_depth_format()
Every caller of this function uses it to determine if the current
miptree needs a hiz buffer to be allocated. Strangely, the function
doesn't take a miptree argument. So, this function effectively decides
if and when a miptree's hiz buffer gets allocated without inspecting the
miptree itself.  Luckily, the driver behaves correctly despite the
brw_is_hiz_depth_format's quirk.

I will soon make some changes to the miptree that will require
inspecting the miptree to determine if it needs a hiz buffer. So this
patch renames
    brw_is_hiz_depth_format -> intel_miptree_wants_hiz_buffer
and gives it a miptree parameter.

This patch shouldn't change any behavior.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:32:02 -07:00
Chad Versace
5776d65114 i965: Declare intel_miptree_create_layout() as static
It's not used outside intel_mipmap_tree.c.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:32:02 -07:00
Chad Versace
1ef4bf7191 i965: Declare intel_miptree_alloc_mcs() as static
It's not used outside of intel_mipmap_tree.c, nor should it ever be.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-13 07:32:02 -07:00
Jose Fonseca
36ceda4ece docs: Improve LLVM_USE_CRT_xxx instructions. 2015-04-13 13:08:13 +01:00
Jose Fonseca
fa1b3e1501 glx: Include util/macros.h instead of redefining PRINTFLIKE.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-04-13 12:03:33 +01:00
Jose Fonseca
978753e843 util/ralloc: Fix extern "C" usage.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-13 12:03:26 +01:00
Jose Fonseca
85dd46d90c mesa: Remove pointless USE_EXTERNAL_DXTN_LIB macro.
I'm not sure what was the original intention, but currently
USE_EXTERNAL_DXTN_LIB always ends up defined, one way or another.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-04-13 12:02:52 +01:00
Emil Velikov
5ddeab8a06 docs: add news item and link release notes for mesa 10.5.3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-12 23:16:42 +01:00
Emil Velikov
a94f8e712f docs: Add 256 sums for the 10.5.3 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 65776421fe)
2015-04-12 23:14:31 +01:00
Emil Velikov
794b9bf26a Add release notes for the 10.5.3 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit c4b8bff6e2)
2015-04-12 23:14:28 +01:00
Emil Velikov
61c6cc4a4a docs: remove the --with-max-{width,height} note
Missed out with commit d99135b2e9b(configure: nuke
--with-max-{width,height})

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-12 23:14:07 +01:00
Emil Velikov
0e742b1cb3 configure.ac: remove deprecated --with-libclc-path
The option was deprecated with commit 959e83d6507(clover: Adapt libclc's
INCLUDEDIR and LIBEXECDIR to make use of the new introduced libclc.pc.)
back in 2012 with mesa 9.2.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-12 23:12:03 +01:00
Kenneth Graunke
b6354d9bb0 i965/nir: Make INTEL_DEBUG=ann work with NIR.
Now that we store a copy of the NIR shader, and don't immediately free
it, we can use it in annotations as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-11 12:35:47 -07:00
Kenneth Graunke
89c1feb78d i965: Create NIR during LinkShader() and ProgramStringNotify().
Previously, we translated into NIR and did all the optimizations and
lowering as part of running fs_visitor.  This meant that we did all of
that work twice for fragment shaders - once for SIMD8, and again for
SIMD16.  We also had to redo it every time we hit a state based
recompile.

We now generate NIR once at link time.  ARB programs don't have linking,
so we instead generate it at ProgramStringNotify time.

Mesa's fixed function vertex program handling doesn't bother to inform
the driver about new programs at all (which is rather mean), so we
generate NIR at the last minute, if it hasn't happened already.

shader-db runs ~9.4% faster on my i7-5600U, with a release build.

v2: Check NirOptions != NULL in ProgramStringNotify().  Don't bother
    using _mesa_program_enum_to_shader_stage as we already know it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-11 12:35:33 -07:00
Kenneth Graunke
b3e286c457 nir: Store num_direct_uniforms in the nir_shader.
Storing this here is pretty sketchy - I don't know if any driver other
than i965 will want to use it.  But this will make it a lot easier to
generate NIR code at link time.  We'll probably rework it anyway.

(Ian suggested making nir_assign_var_locations_scalar_direct_first
 simply modify the nir_shader's fields, rather than passing pointers
 to them.  If this stays long term, we should do that.  But Jason and
 I suspect we'll be reworking this area again in the near future.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-11 11:39:48 -07:00
Kenneth Graunke
f41f07f685 i965: Move lower_output_reads to brw_link_shader().
This makes it so emit_nir_code() doesn't modify the GLSL IR.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-11 11:38:14 -07:00
Matt Turner
8e414cbdec glsl: Mark path as unreachable. 2015-04-11 10:23:05 -07:00
Matt Turner
ea0c35faf8 i965: Remove useless null check.
If it were null, we'd have just derefernced it two lines above.
2015-04-11 09:59:47 -07:00
Matt Turner
024ecc783b i965/fs/nir: Mark fallthrough. 2015-04-11 09:59:47 -07:00
Matt Turner
1ac230975e i965: Remove useless reg_offset >= 0 tests.
Commit eb9bd3a1 changed the type of this field to uint16_t.
2015-04-11 09:59:46 -07:00
Rob Clark
b98c0262d1 freedreno/ir3/nir: couple little fixes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:41:03 -04:00
Rob Clark
1b936bb9f8 freedreno/ir3/nir: handle system values
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:57 -04:00
Rob Clark
715b2e0dbb freedreno/ir3/nir: handle txs and query_levels tex ops
These correspond to the tgsi TXQ opcode

(plus sneak in a fix for two-sided color)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:43 -04:00
Rob Clark
97e8fc3fdd freedreno/ir3/nir: split out tex helpers
We'll need these in one or two other spots.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:36 -04:00
Rob Clark
6e8160d6e3 freedreno/ir3/nir: simplify emit_tex()
Just build up arrays for src0/src1, and use create_collect()..

Also add back missing .3d flag for 3d/cube textures.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:28 -04:00
Rob Clark
d5357c16cc freedreno/ir3/cp: handle indirect properly
I noticed some cases where we where trying to copy-propagate indirect
src's into places they cannot go, like 2nd src for cat3 (mad, etc).
Expand out valid_flags() to be aware of relativ flag, and fix up a few
related spots.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:21 -04:00
Rob Clark
49be76166b freedreno/ir3/sched: avoid getting stuck on addr conflicts
When we get in a scenario where we cannot schedule any more instructions
due to address register conflict, clone the instruction that writes the
address register, and switch the remaining unscheduled users for the
current address register over to the new clone.

This is simpler and more robust than the previous attempt (which tried
and sometimes failed to ensure all other dependencies of users of the
address register were scheduled first).. hint it would try to schedule
instructions that were not actually needed for any output value.

We probably need to do the same with predicate register, although so far
it isn't so heavily used so we aren't running into problems with it
(yet).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:15 -04:00
Rob Clark
4cf4006674 freedreno/ir3/nir: add variable-indexing support
A bit fugly.. try and make this cleaner..  note if we hoist all the
get_addr() out of the loop we can drop the hashtable and just use
create_addr()..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:09 -04:00
Rob Clark
972ce757d7 freedreno/ir3/asm: change assert to warning
It probably *should* be an assert, but for now TGSI f/e isn't very good
about dealing w/ CONST vs ABS/NEG.  So for debug builds, print a warning
instead of crashing with an assert for now.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:40:03 -04:00
Rob Clark
09cbd97a47 freedreno/ir3/nir: set first_driver_param
Without this, a3xx breaks.. a4xx would too if it had already implemented
support for passing driver params.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:39:56 -04:00
Rob Clark
f0e9a632a1 freedreno/ir3/cp: support to swap mad src's
For a normal MAD (ie. not MADSH), if first source is gpr and second
source is const, we can swap the first two sources to avoid needing a
mov instruction.

This gives back the biggest advantage TGSI f/e had over NIR f/e for
common shaders, since TGSI f/e had this logic in the f/e.  Note that
doing this in copy-prop step has the advantage that it will also work
for cases like:

   MOV TEMP[b], CONST[x]
   MAD TEMP[d], TEMP[a], TEMP[b], TEMP[c]

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 11:39:46 -04:00
Rob Clark
f596135616 nir: fix bit of cargo-culting in lower_idiv
I guess I was looking too much at how lower_system_values worked when
writing lower_idiv.

Since ttn wasn't emitting load_var for sysvals and the only drivers
using lower_idiv were using ttn, I think nothing was broken as a result.
But might as well fix this before it becomes a problem.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-11 10:43:16 -04:00
Rob Clark
58add76791 nir: split out lower_sub from lower_negate
Originally you had to have one or the other.  But actually I don't want
either.  (Or rather I want whatever is the minimum # of instructions.)

TODO: not sure where the best place to insert a check that driver hasn't
set *both* lower_negate and lower_sub?

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 10:43:16 -04:00
Rob Clark
fd65122a90 gallium/ttn: add support for system values
So far just the system values that freedreno supports, so we may add
more later.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-11 10:43:16 -04:00
Rob Clark
2faa878f13 gallium/ttn: fix TXD
With TXD we also have the ddx/ddy sources (before the sampler).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-11 10:43:16 -04:00
Rob Clark
ca3ae90490 gallium/ttn: add TXQ support (v2)
Split out from ttn_tex() since it is kind of a weird instruction that
maps to two NIR opcodes, and it was cleaner this way.

v2: query_levels doesn't take any args

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-11 10:43:15 -04:00
Rob Clark
0b71451920 gallium/ttn: split out helper to get texture info
We'll need this as well for TXQ.  Split this out first to reduce noise
in the next patch.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-11 10:43:15 -04:00
Rob Clark
96c0f9328d gallium/ttn: add support for temp arrays
Since the rest of NIR really would rather have these as variables rather
than registers, create a nir_variable per array.  But rather than
completely re-arrange ttn to be variable based rather than register
based, keep the registers.  In the cases where there is a matching var
for the reg, ttn_emit_instruction will append the appropriate intrinsic
to get things back from the shadow reg into the variable.

NOTE: this doesn't quite handle TEMP[ADDR[]] when the DCL doesn't give
an array id.  But those just kinda suck, and should really go away.
AFAICT we don't get those from glsl.  Might be an issue for some other
state tracker.

v2: rework to use load_var/store_var with deref chains
v3: create new "burner" reg for temporarily holding the (potentially
writemask'd) dest after each instruction; add load_var to initialize
temporary dest in case not all components are overwritten
v4: review comments: asserts and use ttn_src_for_indirect() in
ttn_array_deref() so we can drop later patch converting to use vec1 for
addr reg (since ttn_src_for_indirect() handles the imov to vec1 from
tgsi addr component that we want)
v5: rebase: new requirements about parent mem ctx for derefs

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-11 10:41:45 -04:00
Rob Clark
b91d987140 gallium/ttn: minor cleanup
Extract tgsi_dst->Index into a local.. split out from 'gallium/ttn: add
support for temp arrays' for noise reduction..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-11 10:24:50 -04:00
Jason Ekstrand
d47405eb70 i965: Use NIR by default for fragment shaders
GLSL IR vs. NIR shader-db results on i965:

   total instructions in shared programs: 2889747 -> 2890782 (0.04%)
   instructions in affected programs:     2425446 -> 2426481 (0.04%)
   helped:                                3698
   HURT:                                  5341

GLSL IR vs. NIR shader-db results on g4x:

   total instructions in shared programs: 2547252 -> 2550440 (0.13%)
   instructions in affected programs:     1984482 -> 1987670 (0.16%)
   helped:                                2844
   HURT:                                  4776

GLSL IR vs. NIR shader-db results on Iron Lake:

   total instructions in shared programs: 4053381 -> 4063828 (0.26%)
   instructions in affected programs:     3026601 -> 3037048 (0.35%)
   helped:                                4110
   HURT:                                  8331
   GAINED:                                1287
   LOST:                                  9

GLSL IR vs. NIR shader-db results on Sandy Bridge:

   total instructions in shared programs: 5307041 -> 5236666 (-1.33%)
   instructions in affected programs:     3442908 -> 3372533 (-2.04%)
   helped:                                11829
   HURT:                                  5604
   GAINED:                                33
   LOST:                                  18

GLSL IR vs. NIR shader-db results on Ivy Bridge:

   total instructions in shared programs: 4926333 -> 4857017 (-1.41%)
   instructions in affected programs:     3144042 -> 3074726 (-2.20%)
   helped:                                11559
   HURT:                                  4774
   GAINED:                                46
   LOST:                                  25

GLSL IR vs. NIR shader-db results on Bay Trail:

   total instructions in shared programs: 4926333 -> 4857017 (-1.41%)
   instructions in affected programs:     3144042 -> 3074726 (-2.20%)
   helped:                                11559
   HURT:                                  4774
   GAINED:                                46
   LOST:                                  25

GLSL IR vs. NIR shader-db results on Haswell:

   total instructions in shared programs: 4392487 -> 4293476 (-2.25%)
   instructions in affected programs:     2800180 -> 2701169 (-3.54%)
   helped:                                13073
   HURT:                                  3383
   GAINED:                                46
   LOST:                                  23

GLSL IR vs. NIR shader-db results on Broadwell (FS only):

   total instructions in shared programs: 4378113 -> 4283025 (-2.17%)
   instructions in affected programs:     2743209 -> 2648121 (-3.47%)
   helped:                                12470
   HURT:                                  3609
   GAINED:                                64
   LOST:                                  27

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-10 17:19:54 -07:00
Kenneth Graunke
c2a0600d5b i965: Don't set NirOptions for stages that will use the vec4 backend.
We've started using NirOptions != NULL to mean "we're using NIR for this
stage."  However, when INTEL_USE_NIR=1, we set it for a bunch of stages
that still use the vec4 backend, and thus definitely aren't using NIR.

For example, if INTEL_USE_NIR=1 we disable the GLSL IR cubemap
normalization pass, even for vertex shaders and geometry shaders.  This
is wrong, but breaks a very uncommon case.

When I started deleting GLSL IR for stages where we claimed to be using
NIR, this bug quickly became apparent.

For now, only set it for fragment shaders, and vertex shaders if
brw->scalar_vs is set.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-10 16:22:48 -07:00
Nick Sarnie
f9048ee3c8 gallivm: Fix build since llvm-3.7.0svn r234495
Revert 50e9fa2ed6 as LLVM reverted their
change.

Signed-off-by: Nick Sarnie <commendsarnex@gmail.com>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2015-04-10 13:30:23 -04:00
Ville Syrjälä
50db8bd1b5 i965/disasm: Print the type after the swizzle also for 3src src operands
The disassembly currently has the swizzle after the type for 3src source
operands, and the other way around for 2src. Flip the type and swizzle
around for 3src so that the output matches 2src.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-04-10 14:53:12 +03:00
Kenneth Graunke
ae17f34850 i965: Move brw_link_shader's GLSL IR transformations into a helper.
This function was getting a bit large and unwieldy.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:37 -07:00
Kenneth Graunke
10d85ffc5a i965: Change brw_shader to gl_shader in brw_link_shader().
Nothing actually wanted brw_shader fields - we just had to type
shader->base all over the place for no reason.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:35 -07:00
Kenneth Graunke
500da98e0b nir: Constify nir_lower_sampler's gl_shader_program pointer.
Now that we're not generating linker errors, we don't actually modify
this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:33 -07:00
Kenneth Graunke
709b88ccd8 nir: Remove linker_error calls from nir_lower_samplers().
These should never happen.  Plus, NIR passes really shouldn't be
reporting linker errors - this is past link time.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:31 -07:00
Kenneth Graunke
99264b7f37 nir: Make nir_lower_samplers take a gl_shader_stage, not a gl_program *.
We don't actually need a gl_program struct.  We only used it to
translate prog->Target (i.e. GL_VERTEX_PROGRAM) to the gl_shader_stage
(i.e. MESA_SHADER_VERTEX).  We may as well just pass that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:29 -07:00
Kenneth Graunke
4b27391cad nir: Move gl_shader_stage enum from mtypes.h to shader_enums.h.
I want to use this in some code that doesn't currently include mtypes.h.
It seems like a better place for it anyway.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:27 -07:00
Kenneth Graunke
feafe70399 nir: Fix #include guards in shader_enums.h.
This header was originally going to be called pipeline.h, but it got
renamed at the last minute.  Make the include guards match.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:16:25 -07:00
Kenneth Graunke
d0f39a2fcd nir: Constify prog_to_nir's gl_program pointer.
prog_to_nir should not modify the incoming Mesa IR program - just
translate it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-10 02:15:58 -07:00
Vinson Lee
50e9fa2ed6 gallivm: Fix build since llvm-3.7.0svn r234460.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89963
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-09 10:41:26 -07:00
Roland Scheidegger
a873b79fa5 draw: (trivial) don't print the shader twice with GALLIVM_DEBUG=tgsi (or ir)
Neither the shader nor the key change when doing elts or linear variant, so
this was just annoying (probably mildly useful at some point when we printed
the IR per function too).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-09 01:32:30 +02:00
Roland Scheidegger
586536a4e1 gallivm: don't use control flow when doing indirect constant buffer lookups
llvm goes crazy when doing that, using way more memory and time, though there's
probably more to it - this points to a very much similar issue as fixed in
8a9f5ecdb1. In any case I've seen a quite
plain looking vertex shader with just ~50 simple tgsi instructions (but with a
dozen or so such indirect constant buffer lookups) go from a terribly high
~440ms compile time (consuming 25MB of memory in the process) down to a still
awful ~230ms and 13MB with this fix (with llvm 3.3), so there's still obvious
improvements possible (but I have no clue why it's so slow...).
The resulting shader is most likely also faster (certainly seemed so though
I don't have any hard numbers as it may have been influenced by compile times)
since generally fetching constants outside the buffer range is most likely an
app error (that is we expect all indices to be valid).
It is possible this fixes some mysterious vertex shader slowdowns we've seen
ever since we are conforming to newer apis at least partially (the main draw
loop also has similar looking conditionals which we probably could do without -
if not for the fetch at least for the additional elts condition.)

v2: use static vars for the fake bufs, minor code cleanups

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-09 01:32:30 +02:00
Brian Paul
09e7e2016b glsl: check for forced_language_version in is_version()
This is a follow-on fix from the earlier "glsl: allow ForceGLSLVersion
to override #version directives" change.  Since we're not changing
the language_version field, we have to check forced_language_version
here.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-04-08 17:03:16 -06:00
Neil Roberts
4deca1274c i965/skl: Fix the order of the arguments for the LD sampler message
In Skylake the order of the arguments for sample messages with the LD
type are u, v, lod, r whereas previously they were u, lod, v, r.

This fixes 144 Piglit tests including ones that directly use
texelFetch and also some using the meta stencil blit path which
appears to use texelFetch in its shader.

v2: Fix sampling 1D textures

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-08 12:08:41 +01:00
Zhenyu Wang
eb51c6d55f i965: Fix depth field setting in surface state for raw buffer on Gen7/8
On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface
state means [30:21] bits of number of entries which is different from
other surface format which uses [26:21] bits field.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-08 13:20:17 +08:00
Dave Airlie
6b722c390b u_tile: fix warnings about incompatible casts.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-08 10:31:42 +10:00
Glenn Kennard
f2947807c8 r600g/sb: Enable SB for geometry shaders
Add SV_GEOMETRY_EMIT special variable type to track the
implicit dependencies between CUT/EMIT_VERTEX/MEM_RING
instructions so GCM/scheduler doesn't reorder them.

Mark emit instructions as unkillable so DCE doesn't eat them.

Enable only for evergreen/cayman as there are a few
unexplained GS piglit regressions on R6xx/R7xx with SB
enabled otherwise.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-08 08:18:35 +10:00
Glenn Kennard
06bb68da4a r600g/sb: Update last_cf for loops
CF_END could end up emitted in the middle of a shader on cayman
when there was a loop at the very end.

Fixes glsl-1.50-geometry-end-primitive and
ext_transform_feedback-geometry-shaders-basic piglit tests.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-08 08:18:17 +10:00
Dave Airlie
61393bdcdc u_tile: fix stencil texturing tests under softpipe
arb_stencil_texturing-draw failed under softpipe because we got a float
back from the texturing function, and then tried to U2F it, stencil
texturing returns ints, so we should fix the tiling to retrieve
the stencil values as integers not floats.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-08 08:17:32 +10:00
Jason Ekstrand
11694737fc nir: Make nir_*_instr_create take a nir_shader instead of a void * context
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-07 14:34:21 -07:00
Kenneth Graunke
a10d493715 nir: Implement a nir_sweep() pass.
This pass performs a mark and sweep pass over a nir_shader's associated
memory - anything still connected to the program will be kept, and any
dead memory we dropped on the floor will be freed.

The expectation is that this will be called when finished building and
optimizing the shader.  However, it's also fine to call it earlier, and
many times, to free up memory earlier.

v2: (feedback from Jason Ekstrand)
- Skip sweeping impl->start_block, as it's already in the CF list.
- Don't sweep SSA defs (they're owned by their defining instruction)
- Don't steal phi sources (they're owned by nir_phi_instr).
- Don't steal tex->src (it's owned by the tex_inst itself)
- Don't sweep dereference chains (top-level dereferences are owned by
  the instruction; sub-dereferences are owned by the parent deref).
- Don't sweep sources and destinations (SSA defs are handled as part of
  the defining instruction, and registers are handled as part of
  function implementations).
- Just steal instructions; don't walk them (no longer required).

v3: (feedback from Jason Ekstrand)
- Steal indirect sources from nir_src/nir_dest.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-07 14:34:14 -07:00
Kenneth Graunke
de2014cf1e nir: Allocate dereferences out of their parent instruction or deref.
Jason pointed out that variable dereferences in NIR are really part of
their parent instruction, and should have the same lifetime.

Unlike in GLSL IR, they're not used very often - just for intrinsic
variables, call parameters & return, and indirect samplers for
texturing.  Also, nir_deref_var is the top-level concept, and
nir_deref_array/nir_deref_record are child nodes.

This patch attempts to allocate nir_deref_vars out of their parent
instruction, and any sub-dereferences out of their parent deref.
It enforces these restrictions in the validator as well.

This means that freeing an instruction should free its associated
dereference chain as well.  The memory sweeper pass can also happily
ignore them.

v2: Rename make_deref to evaluate_deref and make it take a nir_instr *
    instead of void *.  This involves adding &instr->instr everywhere.
    (Requested by Jason Ekstrand.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-07 14:34:14 -07:00
Kenneth Graunke
4f4b04b7c7 nir: Allocate nir_ssa_def::uses/if_uses out of the instruction.
We can't allocate them out of the nir_ssa_def itself, because it may not
be ralloc'd (for example, nir_dest embeds a nir_ssa_def).

However, allocating them out of the instruction should work.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-07 14:34:13 -07:00
Kenneth Graunke
900498bd11 nir: Allocate nir_phi_src values out of the nir_phi_instr.
Phi sources are part of the phi instruction and should have the same
lifetime.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-07 14:34:13 -07:00
Kenneth Graunke
b05d53404c nir: Allocate nir_call_instr::params out of the nir_call itself.
The lifetime of the params array needs to be match the nir_call_instr
itself.  So, allocate it using the instruction itself as the context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-07 14:34:13 -07:00
Kenneth Graunke
73d106822e i965: Add the ability to render to I8/L8 and I16/L16 UNORM formats.
This allows those formats to work with the meta PBO upload path.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-07 14:34:02 -07:00
Kenneth Graunke
60dcd97257 i965: Use SET_FIELD in 3DSTATE_STREAMOUT packets.
Suggested by Topi Pohjolainen.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-07 14:34:02 -07:00
Jason Ekstrand
2e3b35a1cb nir/lower_tex_projector: Don't use designated initializers
These don't work in MSVC or in older versions of GCC

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89899
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-07 11:49:39 -07:00
Tapani Pälli
1aa5738e66 glsl: relax input->output validation for SSO programs
Commit 18004c3 introduced more restrictive validation to linker
between inputs and outputs. This patch skips the additional check
for programs that utilize GL_ARB_separate_shader_objects, there
inputs and outputs might not make exact match during linking but
only when constructing the final pipeline.

This made some of the GL_ARB_program_interface_query tests shaders
fail to link, these tests can be used to verify the change.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-07 08:11:07 +03:00
Ilia Mirkin
ae720c66cb nv50,nvc0: limit the y-tiling of 3d textures to the first level's tiling
We limit y-tiling to 0x20 when depth is involved. However the function is
run for each miplevel, and the hardware expects miplevel 0 to have the
highest tiling settings. Perform the y-tiling limit on all levels of a
3d texture, not just the ones that have depth.

Fixes:
  texelFetch fs sampler3D 98x129x1-98x129x9

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Nick Tenney <nick.tenney@gmail.com> # GT216
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-04-06 23:06:55 -04:00
Dave Airlie
ad84689f73 r600g: fix op3 abs issue
This code to handle absolute values on op3 srcs was a bit too simple,
it really needs a temp reg per src, not one per channel, make it
easier and let sb clean up the mess.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89831

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-07 11:40:16 +10:00
Iago Toral Quiroga
2042a2f961 i965: Do not render primitives in non-zero streams then TF is disabled
Haswell hardware seems to ignore Render Stream Select bits from
3DSTATE_STREAMOUT packet when the SOL stage is disabled even if
the PRM says otherwise. Because of this, all primitives are sent
down the pipeline for rasterization, which is wrong. If SOL is
enabled, Render Stream Select is honored and primitives bound to
non-zero streams are discarded after stream output.

Since the only purpose of primives sent to non-zero streams is to
be recorded by transform feedback, we can simply discard all geometry
bound to non-zero streams then transform feedback is disabled
to prevent it from ever reaching the rasterization stage.

Notice that this patch introduces a small change in the behavior we
get when a geometry shader emits more vertices than the maximum declared:
before, a vertex that was emitted to a non-zero stream when TF was
disabled would still count for the purposes of checking that we don't
exceed the maximum number of output vertices declared by the shader. With
this change, these vertices are completely ignored and won't increase
the output vertex count, making more room for other (hopefully more
useful) vertices.

Fixes piglit test arb_gpu_shader5-emitstreamvertex_nodraw on Haswell
and Broadwell.

v2 (Ken): Drop is_haswell check in favor of doing this unconditionally.
Broadwell needs the workaround as well, and it doesn't hurt to do it in
general.  Also tweak comments - the Haswell PRM does actually mention
this ("Command Reference: Instructions" page 797).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83962
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2015-04-06 16:00:41 -07:00
Kenneth Graunke
f368d0fa1f i965: Add forgotten multi-stream code to Gen8 SOL state.
Fixes Piglit's arb_gpu_shader5-xfb-streams-without-invocations.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
2015-04-06 14:07:28 -07:00
Kenneth Graunke
f9e5dc0a85 i965: Fix instanced geometry shaders on Gen8+.
Jordan added this in commit 741782b594 for
Gen7 platforms.  I missed this when adding the Broadwell code.

Fixes Piglit's spec/arb_gpu_shader5/invocation-id-{basic,in-separate-gs}
with MESA_EXTENSION_OVERRIDE=GL_ARB_gpu_shader5 set.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
2015-04-06 14:06:26 -07:00
Kenneth Graunke
a09c5b8527 i965: Free dead GLSL IR one last time.
While working on NIR's memory allocation model, I realized the GLSL IR
memory model was broken.

During glCompileShader, we allocate everything out of the
_mesa_glsl_parse_state context, and reparent it to gl_shader at the end.

During glLinkProgram, we allocate everything out of a temporary context,
then reparent it to the exec_list containing the linked IR.

But during brw_link_shader - the driver's final opportunity to do
lowering and optimization - we just allocated everything out of the
permanent context given to us by the linker.  That memory stayed
forever.

Notably, passes like brw_fs_channel_expressions cause us to churn the
majority of the code, so we really want to free dead IR here.

Saves 125MB of memory when replaying a Dota 2 trace on Broadwell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-06 14:03:43 -07:00
Kenneth Graunke
797d606127 i965: Implement SIMD16 texturing on Gen4.
This allows SIMD16 mode to work for a lot more programs.  Texturing is
also more efficient in SIMD16 mode than SIMD8.  Several messages don't
actually exist in SIMD8 mode, so we did SIMD16 messages and threw away
half of the data.  Now we compute real data in both halves.

Also, the SIMD16 "sample" message doesn't require all three coordinate
components to exist (like the SIMD8 one), so we can shorten the message
lengths, cutting register usage a bit.

I chose to implement the visitor functionality in a separate function,
since mixing true SIMD16 with SIMD8 code that uses SIMD16 fallbacks
seemed like a mess.  The new code bails on a few cases where we'd
have to do two SIMD8 messages - we just fall back to SIMD8 for now.

Improves performance in "Shadowrun: Dragonfall - Director's Cut" by
about 20% on GM45 (measured with LIBGL_SHOW_FPS=1 while standing around
in the first mission).

v2: Add ir_txf to the has_lod case (caught by Jordan Justen).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-06 13:49:02 -07:00
Kenneth Graunke
8aee87fe4c i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.
Gen5+ systems allow you to specify multiple shader programs - both SIMD8
and SIMD16 - and the hardware will automatically dispatch to the most
appropriate one, given the number of subspans to be processed.

However, that is not the case on Gen4.  Instead, you program a single
shader.  If you enable multiple dispatch modes (SIMD8 and SIMD16), the
shader is supposed to contain a series of jump instructions at the
beginning.  The hardware will launch the shader at a small offset,
hitting one of the jumps.

We've always thought that sounds like a pain, and weren't clear how it
affected performance - is it worth having multiple shader types?  So,
we never bothered with SIMD16 until now.

This patch takes a simpler approach: try and compile a SIMD16 shader.
If possible, set the no_8 flag, telling the hardware to just use the
SIMD16 variant all the time.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-06 13:49:02 -07:00
Kenneth Graunke
108b92b1e9 i965: Respect the no_8 flag on Gen4-5.
This flag means to ignore the SIMD8 program and only use the SIMD16 one.
It was originally meant for repdata clear shaders, but I plan to use it
for other things on Gen4 as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-06 13:49:02 -07:00
Kenneth Graunke
62050886c8 i965/fp: Set coord_components correctly for cube textures.
I've no idea why this was 4.  It certainly seems wrong.

Prevents assertion failures in fp-incomplete-tex with some upcoming
patches of mine.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-06 13:49:01 -07:00
Ian Romanick
dd7d068784 glsl/cse: Maintain a list of free ae_entry objects
The CSE algorithm will continuously allocate new ae_entry objects.  As
each new basic block is exited, all of the previously allocated objects
are dumped.  Instead, put them in a free list and re-use them in the
next basic block.  Reduce, reuse, recycle!

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-04-06 11:53:59 -07:00
Matt Turner
d131630c08 nir: Remove fsin_reduced/fcos_reduced.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-06 10:13:22 -07:00
Matt Turner
c8d65dd713 st/mesa: Remove unused emit_scs().
Was only used by the sin_reduced/cos_reduced cases, which themselves
were impossible to reach.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-06 10:13:22 -07:00
Matt Turner
5fb735b756 program: Remove unused emit_scs().
Was only used by the sin_reduced/cos_reduced cases, which themselves
were impossible to reach.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-06 10:13:22 -07:00
Matt Turner
cdb1eb9a3f i965/vec4: Remove emit_scs() prototype.
This has never existed.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-06 10:13:22 -07:00
Matt Turner
5c71cf8531 glsl: Remove never used sin_reduced/cos_reduced.
These were added in commit f2616e56, presumably in preparation for
translating ARB vp/fp into GLSL IR. That never happened, and neither did
a lowering pass that actually generated these instructions.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-06 10:13:22 -07:00
Antia Puentes
490621f0f2 glsl: Update the #line behaviour on GLSL 3.30+ and GLSL ES+
From GLSL 3.30 and GLSL ES 1.00 on, after processing the line
directive (including its new-line), the implementation should
behave as if it is compiling at the line number passed as
argument. In previous versions, it behaved as if compiling
at the passed line number + 1.

Partially fixes https://bugs.freedesktop.org/show_bug.cgi?id=88815

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-06 08:55:10 +02:00
Antia Puentes
c0a7014601 glsl: respect the source number set by #line <line> <source>
From GLSL 1.30.10, section 3.3 (Preprocessor):
"#line line source-string-number ... After processing this directive
(including its new-line), the implementation will behave as if it is
compiling at ... source string number source-string-number. Subsequent
source strings will be numbered sequentially, until another #line
directive overrides that numbering."

In the previous implementation the source number was always zero.
Subsequent source strings are still not numbered sequentially, because
in the glShaderSource implementation we are concatenating the source code
strings into one long string.

Partially fixes https://bugs.freedesktop.org/show_bug.cgi?id=88815

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-06 08:50:41 +02:00
Iago Toral Quiroga
47597f8f5c i965: Make sure we always mark array surfaces as such
Even if they only have one slice, otherwise textureSize() won't
produce correct results for the depth value.

Fixes 10 dEQP tests in this category:
dEQP-GLES3.functional.shaders.texture_functions.texturesize.sampler2darray*

Reviewed-by: Mark Janes <mark.a.janes at intel.com>
2015-04-06 08:07:42 +02:00
Rob Clark
8b0b81339b freedreno/ir3: add NIR compiler
The NIR compiler frontend is an alternative to the TGSI f/e, producing
the same ir3 IR and using the same backend passes for scheduling, etc.

It is not enabled by default yet, as there are still some regressions.
To enable, use 'FD_MESA_DEBUG=nir'.  It is enough to use with, for
example, xonotic or supertuxkart.

With the NIR f/e, scalarizing and a number of other lowering steps
happen in NIR, so we don't have to do them in ir3.  Which simplifies the
f/e and allows the lowered instructions to pass through other
optimization stages.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 16:36:40 -04:00
Ilia Mirkin
700d949ea1 freedreno/a3xx: don't decode srgb on mem2gmem
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:35 -04:00
Ilia Mirkin
b060b56772 freedreno/a3xx: pass sprite coord mode through to program emit
Use the correct sprite replacement depending on the flip of the coord
mode, using either T or 1-T depending on whether we have an upper-left or
lower-left coordinate origin. This fixes all the point sprite piglits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:35 -04:00
Ilia Mirkin
1de72dfc8a freedreno/a3xx: add UBO support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:35 -04:00
Ilia Mirkin
c7811f56c2 freedreno/ir3: insert nop between sfu/mem operations
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:35 -04:00
Ilia Mirkin
14dfd8cc43 freedreno: dirty context when reallocating a bound bo
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:35 -04:00
Ilia Mirkin
bde2045fa2 freedreno: keep track of buffer valid ranges
Copies nouveau_buffer and radeon_buffer. This allows a write to proceed
to an uninitialized part of a buffer even when the GPU is using the
previously-initialized portions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:35 -04:00
Ilia Mirkin
dacf22e0a3 freedreno: mark resources as being read so that writes flush the queue
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:34 -04:00
Ilia Mirkin
2e1445c8f3 freedreno: don't bother setting resource timestamps
Waiting on a bo being ready is handled in fd_bo_cpu_prep. No need to
keep separate timestamps around.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:34 -04:00
Ilia Mirkin
1fee3061d5 freedreno: add a reading flag to indicate gpu is reading rsc
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:34 -04:00
Ilia Mirkin
ea0952a9db freedreno: fix resource flushing confusion
A resource flush is an upload of a hypothetically-staging texture to the
GPU. For a UMA system, this will largely be a no-op or
cache-maintenance. Move the render flush logic into transfer_map where
it belongs, and clear out the transfer_flush function.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:34 -04:00
Ilia Mirkin
bfb0a8eb69 freedreno: remove tex_resource
pipe_sampler_view already contains a texture, remove the redundant
tex_resource member which pointed at the same thing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-05 16:36:34 -04:00
Rob Clark
6cd9c94ce4 freedreno/ir3: handle FRAG IN's without interpolation specified
Fallback to picking based on semantic name.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 16:36:34 -04:00
Rob Clark
f513f006ce freedreno/ir3/cmdline: add @const headers for immediates
Since NIR f/e currently encodes immediates in instructions (rather than
passing via const), we need to ensure that when const's are used the get
initialized to the proper values.  Otherwise comparing NIR to TGSI
compiler, it will use proper immediate values in one case, and randomly
initialize values in the other.  Which confuses ir3test.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 16:36:34 -04:00
Rob Clark
6bc12bb5fd freedreno/ir3/cmdline: remove hack for old compiler
Since we dropped the old compiler, we don't need this hack anymore.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 16:36:34 -04:00
Rob Clark
f370e95421 freedreno/ir3: handle const/immed/abs/neg in cp
Be smarter about propagating copies from const or immed, or with abs/neg
modifiers.  Also, realize that absneg.s and absneg.f are really "fancy"
mov instructions.

This opens up the possibility to remove more copies.  It helps the TGSI
frontend a bit, but will be really needed for the NIR f/e which builds
everything up in SSA form (ie. will *always* insert a mov from const or
immediate).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 16:36:34 -04:00
Rob Clark
104713d9f2 freedreno/ir3: split float/int abs/neg
Even though in the end, they map to the same bits, the backend will need
to be able to differentiate float abs/neg vs integer abs/neg.  Rather
than making the backend figure it out based on instruction opcode (which
when combined with mov/absneg instructions, can be awkward), just split
out different flags for each so the frontend can signal it's intentions
more clearly.  Also, since (neg) for bitwise op's is actually a bitwise-
not, split it out into bnot flag.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 12:44:01 -04:00
Rob Clark
203f37540a freedreno/ir3: add ir3 builder helpers
Add helpers for constructing SSA forms of instructions.

Only partial cat5/cat6 coverage.. but we can add stuff as needed.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 12:44:01 -04:00
Rob Clark
b1c9fb9fca freedreno/ir3: fix sam argument order comment
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 12:44:01 -04:00
Rob Clark
101142c401 xa: support for drivers which use NIR
We need to pull in libnir.la and it's dependency libglsl_util.la.  Also,
_mesa_error_no_memory() must be defined.

Fortunately with libnir.la (vs pulling in all of libglsl.la) we don't
also need libstdc++.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 09:24:17 -04:00
Rob Clark
1c857727a1 build: add libnir.la
If we want to use NIR from state trackers that don't already pull in the
whole of glsl (ie. anything other than mesa state tracker), we need a
separate more minimal libnir.  Possibly NIR should be better split out
from glsl, but for now, generate a second smaller libnir.la for those
who just want NIR but not all of glsl.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-04-05 09:24:17 -04:00
Rob Clark
52282fa42d gallium/ttn: MOD is an integer instruction
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net
2015-04-05 09:24:17 -04:00
Rob Clark
7579ae422a gallium/ttn: add UMAD
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-05 09:24:17 -04:00
Rob Clark
f2ecc95e44 nir: add lowering for idiv/udiv/umod
Based on the algo from NV50LegalizeSSA::handleDIV() and handleMOD().
See also trans_idiv() in freedreno/ir3/ir3_compiler.c (which was an
adaptation of the nv50 code from Ilia Mirkin).

A python/numpy script which implements the same algorithm (and is
possibly useful for debugging or analysis) can be found here:

  http://people.freedesktop.org/~robclark/div-lowering.py

I've tested this on i965 hacked up to insert the idiv lowering pass,
and on freedreno with NIR frontend.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Eric Anholt <eric@anholt.net> (vc4)
2015-04-05 09:20:35 -04:00
Rob Clark
7880bea2fb nir: fix typo for f2b/i2b/b2i expressions (v2)
v2: discovered that i2b/b2i are also confused

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-05 08:56:24 -04:00
Rob Clark
6829d76e02 nir: add option to lower slt/sge/seq/sne
In freedreno these get implemented as the matching f* instruction plus a
u2f to convert the result to float 1.0/0.0.  But less lines of code to
just let nir_opt_algebraic handle this for us, plus opens up some small
window for other opt passes to improve (ie. if some shader ended up with
both a flt and slt with same src args, for example).

v2: use b2f rather than u2f

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-05 08:56:24 -04:00
Mathias Froehlich
24b78fe54e mesa: Remove unused variables left over from 107ae27e57.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-04-05 09:40:47 +02:00
Mathias Fröhlich
fdd90fcb15 i965: Implement support for ARB_clip_control.
Switch between the two clip space definitions already available
in hardware. Update winding order dependent state according
to the clip control state.
This change did not introduce new piglit quick.test regressions on
an Ivybridge Mobile and a GM45 Express chipset.
Also it enables and passes the clip-control and clip-control-depth-precision
tests on these two chipsets.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-04-05 08:01:47 +02:00
Mathias Froehlich
107ae27e57 mesa: Remove the _WindowMap from gl_viewport_attrib.
The _WindowMap can be dropped from gl_viewport_attrib now.
Simplify gl_viewport_attrib handling where possible.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-04-05 08:01:47 +02:00
Mathias Froehlich
29e6c7dbc5 tnl: Maintain the _WindowMap matrix in TNLcontext v2.
This is the only real user of _WindowMap which has the depth
buffer scaling multiplied in. Maintain the _WindowMap of the
one and only viewport inside TNLcontext.

v2:
Remove unneeded parentheses.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-04-05 08:01:47 +02:00
Mathias Froehlich
472913ea75 radeon: Make use of _mesa_get_viewport_xform v2.
Instead of _WindowMap just use the translation and scale
of the viewport transform directly. Thereby avoid dividing by
_DepthMaxF again.

v2:
Change order of assignments.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-04-05 08:01:46 +02:00
Mathias Froehlich
a8ceb8e450 i965: Make use of _mesa_get_viewport_xform.
Instead of _WindowMap just use the translation and scale
of the viewport transform directly. Thereby avoid dividing by
_DepthMaxF again.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
2015-04-05 08:01:46 +02:00
Ilia Mirkin
ba353935a3 nv50: allocate more offset space for occlusion queries
Commit 1a170980a0 started writing to q->data[4]/[5] but kept the
per-query space at 16, which meant that in some cases we would write
past the end of the buffer. Rotate by 32, like nvc0 does. This ensures
that we always have 32 bytes in front of us, and the data writes will go
within the allocated space.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89679
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Nick Tenney <nick.tenney@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-04-04 11:30:03 -04:00
Jason Ekstrand
9c53e80b9b nir/lower_samplers: Use the right memory context for realloc'ing tex sources
As of da5ec2a, we allocate instruction sources out of the instruction
itself.  When we realloc the texture sources we need to use the right
memory context or ralloc will get angry and assert-fail

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-03 17:02:20 -07:00
Jason Ekstrand
1bd1fc248c i965: Use brw_nir_cubemap_normalize for NIR shaders
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-03 14:12:49 -07:00
Jason Ekstrand
52e718097f nir: Add a cubemap normalizing pass
This commit adds a pass to L1-normalize cube-map coordinates.  Some hardware
such as i965 requires that largest cube-map coordinate is +-1.  We had a
pass to perform this normalization in GLSL IR but we need it in NIR for
cube maps on ARB programs to work correctly.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

v2 (Suggested by Eric):
 - Do a vector fabs and split into components later
 - Move to core NIR

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-03 14:12:49 -07:00
Jason Ekstrand
bff4213326 i965: Check the INTEL_USE_NIR environment variable once at context creation
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-03 14:12:49 -07:00
Jason Ekstrand
dccc57eaba nir/from_ssa: Don't set reg->parent_instr for ssa_undef instructions
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-03 14:04:31 -07:00
Jason Ekstrand
7bdba4a245 nir: Add a src_get_parent_instr function
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-04-03 14:04:12 -07:00
Eric Anholt
cb966fb2be i965: Use the tex projector lowering pass instead of hand-rolling it.
This only impacts the ARB_fp path.  We can't quite disable the GLSL-level
lowering pass, because it needs to apply before
brw_do_lower_unnormalized_offset().

total instructions in shared programs: 5667857 -> 5667847 (-0.00%)
instructions in affected programs:     1114 -> 1104 (-0.90%)
helped:                                16
HURT:                                  6

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-03 11:50:27 -07:00
Eric Anholt
ea811b7868 nir: Add a lowering pass for texture projectors.
Not much hardware wants them these days, and it might give us a chance to
do CSE or algebraic at the NIR level.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-03 11:50:24 -07:00
Eric Anholt
64bdfc698d nir: Add an interface to turn a nir_src into a nir_ssa_def.
We use nir_ssa_defs for nir_builder args, so this takes a nir_src and
makes one so it can be passed in.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-03 11:50:22 -07:00
Eric Anholt
ec02970205 nir: Add an interface for the builder to insert instructions before.
So far we'd only used nir_builder to build brand new programs.  But if
we're doing modifications to instructions (like in a lowering pass), then
we want to generate new stuff before the instruction we're modifying.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-03 11:50:18 -07:00
Jose Fonseca
328375d274 gallium: fix gcc compile errors when using _XOPEN_SOURCE=600 but not std=c99
The fpclassify stuff either needs std=c99 or _XOPEN_SOURCE=600 passed
to gcc, but when using the latter the lrint family of function will be defined
too.
2015-04-03 19:22:09 +02:00
Carl Worth
b9b66985c3 i965: Rename do_<stage>_prog to brw_compile_<stage>_prog (and export)
This is in preparation for these functions to be called from other
files.

This commit is intended to have no functional change. It exists in
preparation for some upcoming code movement in preparation for the
shader cache.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-02 22:15:45 -07:00
Carl Worth
a57672f18d i965: Split out per-stage dirty-bit checking into separate functions
The dirty-bit checking from each brw_upload_<stage>_prog function is
split out into its a new brw_<stage>_state_dirty function.

This commit is intended to have no functional change. It exists in
preparation for some upcoming code movement in preparation for the
shader cache.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-02 22:15:45 -07:00
Carl Worth
28510d69ff i965: Split out brw_<stage>_populate_key into their own functions
This commit splits portions of the existing brw_upload_vs_prog and
brw_upload_gs_prog function into new brw_vs_populate_key and
brw_gs_populate_key functions. This follows the same style as is
already present for all other stages, (see brw_wm_populate_key, etc.).

This commit is intended to have no functional change. It exists in
preparation for some upcoming code movement in preparation for the
shader cache.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-02 22:15:45 -07:00
Ilia Mirkin
01d3b750b3 nv50/ir: avoid folding immediates into imad operations
Commit 09ee907266 added logic to fold immediates into mad operations,
but the emission code is only there for fmad. Only allow it on float
types.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 18:42:31 -04:00
Ilia Mirkin
603d28f32c nv50/ir: fix imad emission when dst == src2
Commit fb63df2215 added 4-byte mad support, but only supported
emission for floats. Disable it for ints for now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 18:35:59 -04:00
Kenneth Graunke
da5ec2ac0b nir: Allocate nir_tex_instr::sources out of the instruction itself.
The lifetime of the sources array needs to be match the nir_tex_instr
itself.  So, allocate it using the instruction itself as the context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:20:03 -07:00
Kenneth Graunke
7380c641b1 nir: Allocate predecessor and dominance frontier sets from block itself.
These sets are part of the block, and their lifetime needs to match the
block itself.  So, allocate them using the block itself as the context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:20:02 -07:00
Kenneth Graunke
131444e1c5 nir: Allocate register fields out of the register itself.
The lifetime of each register's use/def/if_use sets needs to match the
register itself.  So, allocate them using the register itself as the
context.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:20:01 -07:00
Kenneth Graunke
587b3a20a1 nir: Make nir_create_function() strdup the function name.
glsl_to_nir passes in the ir_function's name field; we were copying the
pointer, but not duplicating the memory.

We want to be able to free the linked GLSL IR program after translating
to NIR, so we'll need to create a copy of the function name that the NIR
shader actually owns.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:20:00 -07:00
Kenneth Graunke
f61b6c3e48 nir: Free dead variables when removing them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:19:58 -07:00
Kenneth Graunke
f4e4491080 nir: Combine remove_dead_local_vars() and remove_dead_global_vars().
We can just pass a pointer to the list of variables, and reuse the code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:19:56 -07:00
Kenneth Graunke
33f0f68d59 ralloc: Implement a new ralloc_adopt() API.
ralloc_adopt() reparents all children from one context to another.
Conceptually, ralloc_adopt(new_ctx, old_ctx) behaves like this
pseudocode:

   foreach child of old_ctx:
      ralloc_steal(new_ctx, child)

However, ralloc provides no way to iterate over a memory context's
children, and ralloc_adopt does this task more efficiently anyway.

One potential use of this is to implement a memory-sweeper pass: first,
steal all of a context's memory to a temporary context.  Then, walk over
anything that should be kept, and ralloc_steal it back to the original
context.  Finally, free the temporary context.  This works when the
context is something that can't be freed (i.e. an important structure).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-02 14:19:41 -07:00
Jason Ekstrand
ca3b4d6d17 nir/opt_peephole_ffma: Fix a couple typos in a comment
Acked-by: Matt Turner <mattst88@gmail.com>
2015-04-02 11:09:37 -07:00
Ilia Mirkin
4609ba6ea3 mesa: add ARB_depth_buffer_float to ES3.0 required extension list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-02 13:35:18 -04:00
Eric Anholt
a9152376b4 vc4: Add support for nir_iabs.
Tested using the GLSL 1.30 tests for integer abs().  Not currently used,
but it was one of the new opcodes used by robclark's idiv lowering.
2015-04-02 10:32:35 -07:00
Jason Ekstrand
e50cf5faa5 i965/generator: Get rid of the ! in the unreachable statement
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-02 10:21:18 -07:00
Jason Ekstrand
0573d0e484 nir/print: Correctly print swizzles for explicitly sized alu sources
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-02 10:21:18 -07:00
Ilia Mirkin
4a3c0e9950 freedreno/a3xx: add MRT support
The hardware only supports 4 MRTs. It should be possible to emulate
support for 8, but doesn't seem worth the trouble.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Ilia Mirkin
6f4c1976f4 freedreno: convert blit program to array for each number of rts
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Ilia Mirkin
d9992ab35a freedreno: add support for laying out MRTs in gmem
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Ilia Mirkin
602bc6c88d freedreno: add core infrastructure support for MRTs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Ilia Mirkin
d13803c76f freedreno/ir3: add support for FS_COLOR0_WRITES_ALL_CBUFS property
This will enable the driver to tell which regids to link up to which
MRT outputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Ilia Mirkin
f27ec59084 freedreno/a3xx: add independent blend function support
This is needed for MRT support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Ilia Mirkin
8efa3e340d freedreno: remove alpha key from ir3_shader
This complication is unnecessary and makes MRTs more complicated and
likely to generate tons of variants.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-02 00:09:14 -04:00
Stéphane Marchesin
70eed78cac i915g: Implement EGL_EXT_image_dma_buf_import
This adds all the plumbing to get EGL_EXT_image_dma_buf_import in
i915g.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2015-04-01 20:13:37 -07:00
Matt Turner
a03d0ba78f i965/fs: Relax type check in cmod propagation.
The thing we want to avoid is int/float comparisons, but int/unsigned
comparisons with 0 are equivalent.

total instructions in shared programs: 6194829 -> 6193996 (-0.01%)
instructions in affected programs:     117192 -> 116359 (-0.71%)
helped:                                471

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-04-01 13:43:57 -07:00
Matt Turner
781badee7a nir: Remove useless ftrunc inside f2i/f2u.
No shader-db changes, probably because they're all removed by the GLSL
compiler optimization added in commit 69ad5fd4.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Matt Turner
97e6c1b957 nir: Recognize (a < b || a < c) as a < max(b, c).
Doesn't work for analogous && cases, because of NaNs.

total instructions in shared programs: 6195712 -> 6194829 (-0.01%)
instructions in affected programs:     42000 -> 41117 (-2.10%)
helped:                                403

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Matt Turner
a2b6e908cf nir: Add addition/multiplication identities of exp/log.
instructions in affected programs:     2858 -> 2808 (-1.75%)
helped:                                12

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Matt Turner
099c729b4c nir: Add identities for the log function.
The rcp(log(x)) pattern affects instruction counts.

instructions in affected programs:     144 -> 138 (-4.17%)
helped:                                6

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Matt Turner
8a6ae384b2 nir: Add identities for the exponential function.
No changes in shader-db.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Matt Turner
e26783d445 nir: Recognize another open coded lrp.
total instructions in shared programs: 6195924 -> 6195768 (-0.00%)
instructions in affected programs:     4876 -> 4720 (-3.20%)
helped:                                58
HURT:                                  10

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Matt Turner
e82437e141 nir: Recognize open coded lrp.
total instructions in shared programs: 6197614 -> 6195924 (-0.03%)
instructions in affected programs:     34773 -> 33083 (-4.86%)
helped:                                147
HURT:                                  6

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:43:57 -07:00
Kenneth Graunke
25e214db00 nir: Use _mesa_flsll(InputsRead) in prog->nir.
InputsRead is a 64-bit bitfield.  Using _mesa_fls would silently
truncate off the high bits, claiming inputs 32..56 (VARYING_SLOT_MAX)
were never read.

Using <= here was a hack I threw in at the last minute to fix programs
which happened to use input slot 32.  Switch back to using < now that
the underlying problem is fixed.

Fixes crashes in "Euro Truck Simulator 2" when using prog->nir, which
uses input slot 33.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 13:30:13 -07:00
Kenneth Graunke
3d166b313d mesa: Implement _mesa_flsll().
This is _mesa_fls() for 64-bit values.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 13:30:13 -07:00
Kenneth Graunke
4b38c5c783 nir: In prog->nir, don't wrap dot products with ptn_channel(..., X).
ptn_move_dest and nir_fadd already take care of replicating the last
channel out, so we can just use a scalar and skip splatting it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-04-01 13:30:13 -07:00
Jason Ekstrand
218e45e2f7 i965: Use the same nir options for all gens
If we tell NIR to split ffma's, then we don't need seperate options
anymore.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:04 -07:00
Jason Ekstrand
b9d7454571 i965/nir: Run DCE again before going out of SSA
We run lowering and optimization passes that might leave garbage lying
around. This keeps the FS cse from having to clean it up.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:04 -07:00
Jason Ekstrand
37703040a1 i965/nir: Run the ffma peephole after the rest of the optimizations
The idea here is that fusing multiply-add combinations too early can reduce
our ability to perform CSE and value-numbering.  Instead, we split ffma
opcodes up-front, hope CSE cleans up, and then fuse after-the-fact.
Unless an algebraic pass does something silly where it inserts something
between the multiply and the add, splitting and re-fusing should never
cause a problem.  We run the late algebraic optimizations after this so
that things like compare-with-zero don't hurt our ability to fuse things.

shader-db results for fragment shaders on Haswell:
total instructions in shared programs: 4390538 -> 4379236 (-0.26%)
instructions in affected programs:     989359 -> 978057 (-1.14%)
helped:                                5308
HURT:                                  97
GAINED:                                78
LOST:                                  5

This does, unfortunately, cause some substantial hurt to a shader in Kerbal
Space Program.  However, the damage is caused by changing a single
instruction from a ffma to an add.  This, in turn, *decreases* register
pressure in one part of the program causing it to fail to register allocate
and spill.  Given the overwhelmingly positive results in other shaders and
the fact that the NIR for the Kerbal shaders is actually better, this
should be considered a positive.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:04 -07:00
Jason Ekstrand
7f344721b1 nir/peephole_ffma: Be less agressive about fusing multiply-adds
shader-db results for fragment shaders on Haswell:
total instructions in shared programs: 4395688 -> 4389623 (-0.14%)
instructions in affected programs:     355876 -> 349811 (-1.70%)
helped:                                1455
HURT:                                  14
GAINED:                                5
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:04 -07:00
Jason Ekstrand
a8c8b3b872 nir: Add a dedicated ffma peephole optimization
i965/nir: Use the dedicated ffma peephole

total instructions in shared programs: 4418748 -> 4394618 (-0.55%)
instructions in affected programs:     1292790 -> 1268660 (-1.87%)
helped:                                5999
HURT:                                  457
GAINED:                                4
LOST:                                  9

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:04 -07:00
Jason Ekstrand
e06a3d0282 nir: Move the compare-with-zero optimizations to the late section
total instructions in shared programs: 4422307 -> 4422363 (0.00%)
instructions in affected programs:     4230 -> 4286 (1.32%)
helped:                                0
HURT:                                  12

While this does hurt some things, the losses are minor and it prevents the
compare-with-zero optimization from fighting with ffma which is much more
important.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:03 -07:00
Jason Ekstrand
da294f9b2f nir/algebraic: Add a seperate section for "late" optimizations
i965/nir: Use the late optimizations

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:03 -07:00
Jason Ekstrand
1779dc060f nir/algebraic: Remove a duplicate optimization
This optimization is repeated verbatim above

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:03 -07:00
Jason Ekstrand
22ee7eeb4e nir/algebraic: #define around structure definitions
Previously, we couldn't generate two algebraic passes in the same file
because of multiple structure definitions.  To solve this, we play the
age-old header file trick and just #define around it.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 12:51:03 -07:00
Jason Ekstrand
793a94d6b5 nir/print: Don't print extra swizzzle components
Previously, NIR would just print 4 swizzle components if the swizzle was
anything other than foo.xyzw.  This creates lots of noise if, for example,
you have a one-component element with a swizzle of foo.xxxx.

Reviewed-by: Kenneth Grunke <kenneth@whitecape.org>
2015-04-01 12:49:49 -07:00
Emil Velikov
d99135b2e9 configure: nuke --with-max-{width,height}
Unused as of commit 630ab0d27ba(mesa: remove last of MAX_WIDTH,
MAX_HEIGHT). Update all the remaining references to the defines.

v2: Use the correct variable name in the comments

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-01 19:43:34 +00:00
Emil Velikov
bd4925c6ac gallium: ship tgsi_to_nir.h in the tarball
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-01 19:33:37 +00:00
Emil Velikov
4008975e6f configure.ac: error out if python/mako is not found when required
In case of using a distribution tarball (or a dirty git tree) one can
have the generated sources locally. Make configure.ac error out
otherwise, to alert that about the unmet requirement(s) of python/mako.

v2: Check only for a single file for each dependency.

Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 19:33:37 +00:00
Matt Turner
3384179faa glsl: Make sure not to dereference NULL.
Found by Coverity.
2015-04-01 12:25:29 -07:00
Laura Ekstrand
142909f19d main: create_buffers unlocks mutex when throwing OUT_OF_MEMORY.
Ilia Mirkin found that I had forgotten to free the mutex in the error case.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-04-01 12:07:28 -07:00
Jose Fonseca
3321724c10 automake,scons: Put NIR source files in a separate var to fix SCons build.
SCons does not build NIR yet.

Trivial.
2015-04-01 19:49:09 +01:00
Jose Fonseca
7f0682cebf automake: Fix out-of-source builds.
Add include path for generated nir_opcodes.h.

Trivial.
2015-04-01 19:48:09 +01:00
Brian Paul
1625d7a87a mesa: don't include colormac.h in format code
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-01 12:04:28 -06:00
Brian Paul
2768a0b1b4 mesa: remove unneeded #include of colormac.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-01 12:04:28 -06:00
Brian Paul
f1d55017d7 tnl: remove unneeded #include of colormac.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-01 12:04:28 -06:00
Brian Paul
8ac9407a83 swrast: remove unneeded #include of colormac.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-01 12:04:28 -06:00
Brian Paul
2ad8af1a0c mesa: remove unused macros from colormac.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-04-01 12:04:28 -06:00
Eric Anholt
15b03b7964 nir: Recognize a pattern of bool frobbing from TGSI KILL_IF.
TGSI's conditional discards take float arg and negate it, so GLSL to TGSI
generates a b2f and negates that value.  Only, in NIR we want a proper
bool once again, so we compare with 0.  This is a lot of pointless extra
instructions.

total instructions in shared programs: 39735 -> 39702 (-0.08%)
instructions in affected programs:     1342 -> 1309 (-2.46%)

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-01 10:57:01 -07:00
Eric Anholt
6e8d4a2f80 nir: Recognize a pattern for doing b2f without the opcode.
Since we have patterns based on b2f, generate them if we see the b2f
equivalent using an iand.  This is common when generating NIR from TGSI.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-01 10:57:01 -07:00
Eric Anholt
26261bca21 vc4: Add shader-db dumping of NIR instruction count.
I was previously using temporary disables of VC4 optimization to show the
benefits of improved NIR optimization, but this can get me quick and dirty
numbers for NIR-only improvements without having to add hacks to disable
VC4's code (disabling of which might hide ways that the NIR changes would
hurt actual VC4 codegen).
2015-04-01 10:57:01 -07:00
Eric Anholt
73e2d4837d vc4: Convert to consuming NIR.
NIR brings us better optimization than I would have bothered to write
within the driver, developers sharing future optimization work, and the
ability to share device-specific lowering code that we and other
GLES2-level drivers need.

total uniforms in shared programs: 13421 -> 13422 (0.01%)
uniforms in affected programs:     62 -> 63 (1.61%)
total instructions in shared programs: 39961 -> 39707 (-0.64%)
instructions in affected programs:     15494 -> 15240 (-1.64%)

v2: Add missing imov support, and assert that there are no dest saturates.
v3: Rebase on the target-specific algebraic series.
v4: Rebase on gallium-includes-from-NIR changes in mater.
v5: Rebase on variables being in lists instead of hash tables.
v6: Squash in intermediate changes that used the NIR-to-TGSI pass (which
    I'm not committing)
2015-04-01 10:57:01 -07:00
Eric Anholt
783ad697d2 gallium: Add tgsi_to_nir to get a nir_shader for a TGSI shader.
This will be used by the VC4 driver for doing device-independent
optimization, and hopefully eventually replacing its whole IR.  It also
may be useful to other drivers for the same reason.

v2: Add all of the instructions I was relying on tgsi_lowering to remove,
    and more.
v3: Rebase on SSA rework of the builder.
v4: Use the NIR ineg operation instead of doing a src modifier.
v5: Don't use ineg for fnegs.  (infer_src_type on MOV doesn't do what I
    expect, again).
v6: Fix handling of multi-channel KILL_IF sources.
v7: Make ttn_get_f() return a swizzle of a scalar load_const, rather than
    a vector load_const.  CSE doesn't recognize that srcs out of those
    channels are actually all the same.
v8: Rebase on nir_builder auto-sizing, make the scalar arguments to
    non-ALU instructions actually be scalars.
v9: Add support for if/loop instructions, additional texture targets, and
    untested support for indirect addressing on temps.
v10: Rebase on master, drop bad comment about control flow and just choose
     the X channel, use int comparison opcodes in LIT for now, drop unused
     pipe_context argument..
v11: Fix translation of LRP (previously missed because I mis-translated
     back out), use nir_builder init helpers.
v12: Rebase on master, adding explicit include of mtypes.h to get
     INTERP_QUALIFIER_*
v13: Rebase on variables being in lists instead of hash tables, drop use
     of mtypes.h in favor of util/pipeline.h.  Use Ken's nir_builder
     swizzle and fmov/imov_alu helpers, drop "struct" in front of
     nir_builder, use nir_builder directly as the function arg in a lot of
     cases, drop redundant members of ttn_compile that are also in
     nir_builder, drop some half-baked malloc failure handling.
v14: The indirect uniform src0 should be scalar, not vector (noticed as
     odd by robclark, confirmed by cwabbott).  Apply Ken's review to
     initialize s->num_uniforms and friends, skip ttn_channel for dot
     products, and use the simpler discard_if intrinsic.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v13)
Acked-by: Rob Clark <robclark@freedesktop.org>
2015-04-01 10:57:01 -07:00
Eric Anholt
486dcfbbd9 vc4: Tell shader-db how big our UBOs are, if present.
I had regressed them for a while with the NIR work.
2015-04-01 10:57:01 -07:00
Eric Anholt
a3a07d46d1 mesa: Make a shared header for 3D pipeline enum / #defines.
NIR uses these enums/#defines in nir_variables and associated intrinsics,
but I want to be able to use them from TGSI->NIR and NIR->TGSI.
Otherwise, we had to pull in all of mtypes.h.

This doesn't cover all of the enums we might want from a shared compiler
core (like varying slots or vert attribs), but it at least covers what I
need at the moment (system values and interp qualifiers).

v2: Move to src/glsl since util/ is really vague.  Include in Makefile.am
    list.  Use plain bitshifts and stdint types instead of undefined
    BITFIELD64_BIT.
v3: Rename to shader_enums.h. Move it into Makefile.sources.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v2, with
             recommendation to rename)
2015-04-01 10:57:01 -07:00
Emil Velikov
5604d7675e nir: add nir_builder.h to the tarball
The header was added with commit 2a135c470e3(nir: Add an ALU op builder
kind of like ir_builder.h) but did not made it into to the sources list.

Fortunately it remained unused until a recent commit faf6106c6f6(nir:
Implement a Mesa IR -> NIR translator.)

v2: Remove the bogus dependency. Tweak commit message.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 14:46:42 +01:00
Emil Velikov
4984cb7ef8 xmlpool: remove the clean target
... by folding it into CLEANFILES. Don't worry about $(LANG) as it is
essentially the first folder of $(POS). With the latter already handled.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 14:46:41 +01:00
Emil Velikov
a665b9b3c8 xmlpool: don't forget to ship the MOS
This will allow us to finally remove python from the build time
dependencies list. Considering that you're building from a release
tarball of course :-)

Cc: Bernd Kuhls <bernd.kuhls@t-online.de>
Reported-by: Bernd Kuhls <bernd.kuhls@t-online.de>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-01 14:46:41 +01:00
Emil Velikov
c07df0f201 osmesa: don't try to bundle osmesa.def SConscript
Both of which were removed with commit 69db422218b(scons: Don't build
osmesa.)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-01 14:46:41 +01:00
Emil Velikov
1d36c52f5d docs: note that classic osmesa/libEGL no longer builds with scons
Plus nuke the final reference to osmesa from README.WIN32.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-01 14:46:35 +01:00
Iago Toral Quiroga
3818dfcf3c i965: Handle scratch accesses where reladdr also points to scratch space
This is a problem when we have IR like this:

(array_ref (var_ref temps) (swiz x (expression ivec4 bitcast_f2i
   (swiz xxxx (array_ref (var_ref temps) (constant int (2)) ) )) )) ) )

where we are indexing an array with the result of an expression that
accesses the same array.

In this scenario, temps will be moved to scratch space and we will need
to add scratch reads/writes for all accesses to temps, however, the
current implementation does not consider the case where a reladdr pointer
(obtained by indexing into temps trough a expression) points to a register
that is also stored in scratch space (as in this case, where the expression
used to index temps access temps[2]), and thus, requires a scratch read
before it is accessed.

v2 (Francisco Jerez):
 - Handle also recursive reladdr addressing.
 - Do not memcpy dst_reg into src_reg when rewriting reladdr.

v3 (Francisco Jerez):
 - Reduce complexity by moving recursive reladdr scratch access handling
   to a separate recursive function.
 - Do not skip demoting reladdr index registers to scratch space if the
   top level GRF has already been visited.

v4 (Francisco Jerez)
 - Remove redundant checks.
 - Simplify code by making emit_resolve_reladdr return a register with
   the original src data except for reg, reg_offset and reladdr.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89508
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-04-01 15:35:23 +02:00
Roland Scheidegger
e3252defd2 gallivm: (trivial) fix the logic deciding if function call should be used...
Copy and paste bug with the img filter decision. Since there's only 2 different
filters anyway just drop this bit.
2015-04-01 13:26:19 +02:00
Martin Peres
59af7ed28c mesa/fbo: lock ctx->Shared->Mutex when allocating renderbuffers
This mutex is used to make sure the shared context does not change
while some shared code is looking into it.

Calling BindRenderbufferEXT BindRenderbuffer with a gles context
would not take the mutex before allocating an entry. Commit a34669b
then moved out the allocation out of bind_renderbuffer into
allocate_renderbuffer before using it for the CreateRenderBuffer
entry point. This thus also made this entry point unsafe.

The issue has been hinted by Ilia Mirkin.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-01 09:36:27 +03:00
Martin Peres
fa38321551 mesa/fbo: do not assign a value that is never read later on
The issue has been detected by coverty.

v2:
- move the declaration of obj to the else clause (Brian Paul)

v3: Review by Brian Paul
- get rid of the obj declaration in favor of a direct reference

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-01 09:36:27 +03:00
Dave Airlie
8f7338f284 egl: add initial EGL_MESA_image_dma_buf_export v2.4
At the moment to get an EGL image to a dma-buf file descriptor,
you have to use EGL_MESA_drm_image, and then use libdrm to
convert this to a file descriptor.

This extension just provides an API modelled on EGL_MESA_drm_image,
to return a dma-buf file descriptor.

v2: update spec for new API proposal
add internal queries to get the fourcc back from intel driver.

v2.1: add gallium pieces.

v2.2: add offsets to spec and API, rename fd->fds, stride->strides
in API. rewrite spec a bit more, add some q/a

v2.3:
add modifiers to query interface and 64-bit type for that (Daniel Stone)
specifiy what happens to num fds vs num planes differences. (Chad Versace)

v2.4:
fix grammar (Daniel Stone)

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-01 14:10:04 +10:00
Jordan Justen
22ccdf12dd i965/state: Remove brw->state.dirty
We now use brw->NewGLState and brw->ctx.NewDriverState instead.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:24 -07:00
Jordan Justen
7ecf3530d8 i965/state: Don't use brw->state.dirty.mesa
Now, we only use brw->NewGLState.

I used this bash & sed command in the i965 directory:
  for file in *.[ch] *.[ch]pp; do
    sed -i -e 's/brw->state\.dirty\.mesa/brw->NewGLState/g' $file
  done

Followed by manual changes to brw_state_upload.c.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:24 -07:00
Jordan Justen
4e56a9ad46 i965/state: Don't use brw->state.dirty.brw
Now, we only use ctx->NewDriverState.

I used this bash & sed command in the i965 directory:
  for file in *.[ch] *.[ch]pp; do
    sed -i -e 's/state\.dirty\.brw/ctx.NewDriverState/g' $file
  done

Followed by manual changes to brw_state_upload.c.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:24 -07:00
Jordan Justen
20ef23b227 i965/state: Add compute pipeline with empty atom lists
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:24 -07:00
Jordan Justen
a8e39e1903 i965/state: Only upload render programs for render state uploads
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:24 -07:00
Jordan Justen
d70f4e6daf i965/state: Create separate dirty state bits for each pipeline
When clearing the state for a pipeline, we will save changed state for
the other pipelines.

v3:
 * Adjust brw_upload_pipeline_state
   * Don't pull pipeline state bits into common state bits
   * Don't clear pipeline state bits
 * Adjust 'clear' phase
   * brw_clear_dirty_bits is now brw_render_state_finished
   * Move cross-pipeline state flagging to brw_pipeline_state_finished
   * Move pipeline clears to brw_pipeline_state_finished

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:24 -07:00
Jordan Justen
db11955072 i965/state: Support multiple pipelines in brw->num_atoms
brw->num_atoms is converted to an array, but currently just an array
of length 1.

Adds brw_copy_pipeline_atoms which copies the atoms for a pipeline,
and sets brw->num_atoms[p] for pipeline p.

v2:
 * Rename brw->atoms[] to render_atoms
 * Rename brw_add_pipeline_atoms to brw_copy_pipeline_atoms
 * Rename brw_pipeline_first_atom to brw_get_pipeline_atoms

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:23 -07:00
Jordan Justen
736a31d462 i965/state: Rename brw_clear_dirty_bits to brw_render_state_finished
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:23 -07:00
Jordan Justen
2c02baa487 i965/state: Rename brw_upload_state to brw_upload_render_state
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 16:40:23 -07:00
Roland Scheidegger
611bd80f3b gallivm: do some hack heuristic to disable texture functions
We've seen some cases where performance can hurt quite a bit.
Technically, the more simple the function the more overhead there is
for using a function for this (and the less benefits this provides).
Hence don't do this if we expect the generated code to be simple.
There's an even more important reason why this hurts performance,
which is shaders reusing the same unit with some of the same inputs,
as llvm cannot figure out the calculations are the same if they
are performned in the function (even just reusing the same unit without
any input being the same provides such optimization opportunities though
not very much). This is something which would need to be handled by IPO
passes however.
2015-04-01 00:56:12 +02:00
Matt Turner
47c4b38540 i965/fs: Allow CSE to handle MULs with negated arguments.
mul x, -y is equivalent to mul -x, y; and mul x, y is the negation of
mul x, -y.

With NIR:
total instructions in shared programs: 6167779 -> 6161193 (-0.11%)
instructions in affected programs:     983511 -> 976925 (-0.67%)
helped:                                4106
HURT:                                  16
GAINED:                                18
LOST:                                  7

Without NIR:
total instructions in shared programs: 6192323 -> 6185299 (-0.11%)
instructions in affected programs:     987875 -> 980851 (-0.71%)
helped:                                4146
HURT:                                  16
GAINED:                                16
LOST:                                  0
2015-03-31 14:14:36 -07:00
Matt Turner
438c1c0080 i965: Mark brw_inst_bits' brw_inst* parameter const.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-31 14:14:36 -07:00
Matt Turner
ac6102bcc5 glsl: Remove bogus Makefile dependency. 2015-03-31 14:14:36 -07:00
Matt Turner
2c38f891ad glsl: Reassociate multiplication of mat*mat*vec.
The typical case of mat4*mat4*vec4 is 80 scalar multiplications, but
mat4*(mat4*vec4) is only 32.

On HSW (with vec4 vertex shaders):
instructions in affected programs:     4420 -> 3194 (-27.74%)

On BDW (with scalar vertex shaders):
instructions in affected programs:     12756 -> 6726 (-47.27%)

Implementing a general matrix chain ordering is harder (or at least
tedious) because of having to walk the GLSL IR to create a list of
multiplicands. I'm guessing that this patch handles 90+% of cases, but
of course to tell definitively you'd have to implement the general
thing.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-31 14:01:15 -07:00
Matt Turner
cf2dc1624f glsl: Implement type inferencing of matrix types.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-31 14:01:15 -07:00
Matt Turner
73f6f9b9be glsl: Factor out a get_mul_type() function.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-31 14:01:15 -07:00
Marcin Ślusarz
f9e2295560 nouveau: synchronize "scratch runout" destruction with the command stream
When nvc0_push_vbo calls nouveau_scratch_done it does not mean
scratch buffers can be freed immediately. It means "when hardware
advances to this place in the command stream the scratch buffers
can be freed".

To fix it, just postpone scratch runout destruction after current
fence is signalled.

The bug existed for a very long time. Nobody noticed, because
"scratch runout" code path is rarely executed.

Fixes hang at the very beginning of first mission in "Serious Sam 3"
on nve7/gk107. It manifested as:

nouveau E[   PFIFO][0000:01:00.0] read fault at 0x000a9e0000 [PTE] from GR/GPC0/PE_2 on channel 0x007f853000 [Sam3[17056]]

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-31 22:04:31 +02:00
Brian Paul
3db0317351 docs: document Viewperf 12 issues
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-03-31 11:50:20 -06:00
Neil Roberts
fe026d7ce5 i965/skl: Avoid using the 1D stencil layout for stencil-only images
Commit cf67ca9ffa made the layouting code pick a special layout for
1D images on Skylake. This should not be used for depth and stencil
buffers because these need to be treated as 2D tiled images. However
the patch was missing a check for images with a base format of
GL_STENCIL_INDEX. In practice I don't think it's currently possible to
hit this because Mesa doesn't support GL_ARB_texture_stencil8 and it's
not possible to create a 1D renderbuffer, but it'll be good to be
ready for when the extension is supported.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-31 18:22:01 +01:00
Tom Stellard
fda7558057 clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation fails v2
v2:
  - Don't use _errs map

Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-31 15:40:51 +00:00
Tom Stellard
4c53d2acbb radeonsi/compute: Default to the same PIPE_SHADER_CAP values as other shader types v2
v2:
  - Fix typo

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-31 15:40:51 +00:00
Leo Liu
a714fbacf7 radeon/vce: implement video usability information support
This will help encoding VUI into the bitstream

v2: make backward compatible

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-03-31 12:31:58 -04:00
Leo Liu
8e3668a7c0 st/omx/enc: export framerate to vce driver
The framerate will be used for video usability info support by VCE driver

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-03-31 12:31:58 -04:00
Roland Scheidegger
489866938f llvmpipe: enable ARB_texture_gather
Just announce support for 4 components.
While here also increase the max/min texel offsets (the limit is completely
artificial, was chosen because that's what other hardware did, however there's
other drivers using larger limits).
Over a thousand little piglits skip->pass.

v2: update docs/GL3.txt

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Roland Scheidegger
0753b135f6 gallivm: implement TG4 for ARB_texture_gather
This is quite trivial, essentially just follow all the same code you'd
use with linear min/mag (and no mip) filter, then just skip the filtering
after looking up the texels in favor of direct assignment of the right channel
to the result. (This is though not true for the multi-offset version if we'd
want to support it - for this would probably need to do something along the
lines of 4x nearest sampling due to the necessity of doing coord wrapping
individually per texel.)
Supports multi-channel formats.
From the SM5 gather cap bit, should support non-constant offsets, plus shadow
comparisons (the former untested), but not component selection (should be
easy to implement but all this stuff is not really exposable anyway for now).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Roland Scheidegger
73c6914195 gallivm: add gather support to sampler interface
Luckily thanks to the revamped interface this is a lot less work now...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Roland Scheidegger
1863ed21ff gallivm: simplify sampler interface
This has got a bit out of control with more and more parameters added.
Worse, whenever something in there changes all callees have to be updated
for that, even though they don't really do much with any parameter in there
except pass it on to the actual sampling function.
Hence simply put almost everything into a struct. Also instead of relying
on some arguments being NULL, be explicit and set this in a key (which is
just reused for function generation for simplicity). (The code still relies
on them being NULL in the end for now.)
Technically there is a minimal functional change here for shadow sampling:
if shadow sampling is done is now determined explicitly by the texture
function (either sample_c or the gl-style tex func inherit this from target)
instead of the static texture state. These two should always match, however.
Otherwise, it should generate all the same code.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Jose Fonseca
0fc5b80e7a util/debug: Update MgwHelp link, drop BfdHelp link. 2015-03-31 09:42:06 +01:00
Michel Dänzer
b8797a7875 gallivm: Fix build against LLVM 3.7 SVN r233648
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 15:05:01 +09:00
Eric Anholt
1dcc1ee314 vc4: Drop integer multiplies with 0 to moves of 0.
This cleans up more instructions generated by uniform array indexing
multiplies.

total instructions in shared programs: 39989 -> 39961 (-0.07%)
instructions in affected programs:     896 -> 868 (-3.12%)
2015-03-30 12:57:45 -07:00
Eric Anholt
8c5dcdbccb vc4: Add a constant folding pass.
This cleans up some pointless operations generated by the in-driver mul24
lowering (commonly generated by making a vec4 index for a matrix in a
uniform array).

I could fill in other operations, but pretty much anything else ought to
be getting handled at the NIR level, I think.

total uniforms in shared programs: 13423 -> 13421 (-0.01%)
uniforms in affected programs:     346 -> 344 (-0.58%)
2015-03-30 12:57:45 -07:00
Brian Paul
dbe67d76e0 glsl: allow ForceGLSLVersion to override #version directives
Previously, the ctx->Const.ForceGLSLVersion setting only worked if
the shader lacked a #version directive.  Now, the ForceGLSLVersion
setting will override the #version directive too.

This change should be safe since it should be rare to have an app
that has a mix of shader versions and we only wanted to override
the #version for shaders which lacked the #version directive.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-30 11:25:39 -06:00
Eric Anholt
c519c4d85e vc4: Don't bother masking out the low 24 bits for integer multiplies
The hardware just uses the low 24 lines, saving us an AND to drop the high
bits.

total uniforms in shared programs: 13433 -> 13423 (-0.07%)
uniforms in affected programs:     356 -> 346 (-2.81%)
total instructions in shared programs: 40003 -> 39989 (-0.03%)
instructions in affected programs:     910 -> 896 (-1.54%)
2015-03-30 09:23:39 -07:00
Eric Anholt
5df8bf86fe vc4: Make integer multiply use 24 bits for the low parts.
The hardware uses the low 24 bits in integer multiplies, so we can have
fewer high bits (and so probably drop them more frequently).
2015-03-30 09:23:39 -07:00
Samuel Iglesias Gonsalvez
18004c338f glsl: fail when a shader's input var has not an equivalent out var in previous
GLSL ES 3.00 spec, 4.3.10 (Linking of Vertex Outputs and Fragment Inputs),
page 45 says the following:

"The type of vertex outputs and fragment input with the same name must match,
otherwise the link command will fail. The precision does not need to match.
Only those fragment inputs statically used (i.e. read) in the fragment shader
must be declared as outputs in the vertex shader; declaring superfluous vertex
shader outputs is permissible."
[...]
"The term static use means that after preprocessing the shader includes at
least one statement that accesses the input or output, even if that statement
is never actually executed."

And it includes a table with all the possibilities.

Similar table or content is present in other GLSL specs: GLSL 4.40, GLSL 1.50,
etc but for more stages (vertex and geometry shaders, etc).

This patch detects that case and returns a link error. It fixes the following
dEQP test:

  dEQP-GLES3.functional.shaders.linkage.varying.rules.illegal_usage_1

However, it adds a new regression in piglit because the test hasn't a
vertex shader and it checks the link status.

bin/glslparsertest \
tests/spec/glsl-1.50/compiler/gs-also-uses-smooth-flat-noperspective.geom pass \
1.50 --check-link

This piglit test is wrong according to the spec wording above, so if this patch
is merged it should be updated.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-30 13:29:05 +02:00
Michel Dänzer
d64adc3a79 radeonsi: Cache LLVMTargetMachineRef in context instead of in screen
Fixes a crash in genymotion with several threads compiling shaders
concurrently.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-30 15:15:10 +09:00
Tapani Pälli
ce83a6ec81 glsl: fix unreachable(!"") to unreachable("")
Correct error with commit 151fb1e where assert was renamed
to unreachable without removing ! from string argument.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-30 08:16:00 +03:00
Emil Velikov
938b17940f docs: add news item and link release notes for mesa 10.5.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-28 19:21:31 +00:00
Emil Velikov
dc8d8a2951 docs: Add sha256 sums for the 10.5.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit ff87ae1e00)
2015-03-28 19:21:31 +00:00
Emil Velikov
6e19f6b4d0 Add release notes for the 10.5.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 5e59f895c4)
2015-03-28 19:21:31 +00:00
Ilia Mirkin
ee670c9efa freedreno/a3xx: add support for point sprite coordinate replacement
This does not (yet) support different coordinate origins, so the tests
still fail due to fbo flipping.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
995f55a6ce freedreno/a3xx: make vs-set point size work
This appears to need the A2XX version of the point list, so select it at
draw time if necessary.

Experimentally, always using the A2XX version causes hangs when PSIZE
isn't actually emitted.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
7fc5da8b93 freedreno/a3xx: point size should not be divided by 2
The division is probably a holdover from the days when the fixed point
inline functions generated by headergen were broken.

Also reduce the maximum point size to 4092 (vs 4096), which is what the
blob does.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
738c8319ac freedreno/a3xx: fix 3d texture layout
The SZ2 field contains the layer size of a lower miplevel. It only
contains 4 bits, which limits the maximum layer size it can describe. In
situations where the next miplevel would be too big, the hardware
appears to keep minifying the size until it hits one of that size.
Unfortunately the hardware's ideas about sizes can differ from
freedreno's which can still lead to issues. Minimize those by stopping
to minify as soon as possible.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
3735643df3 freedreno/a3xx: LAYERSZ2 appears to have no effect on arrays
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:40 -04:00
Kenneth Graunke
72b06fb08e nir: Fix copy and pasted error message in nir_validate.
These are nir_cf_nodes, not ALU instructions.
Also, use unreachable() to preempt said review feedback.

v2: Do it right (thanks Ilia).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-28 09:36:46 -07:00
Kenneth Graunke
31dc63d5ca i965/nir: Use NIR for ARB_vertex_program support on Gen8+.
Everything is already in place; we simply have to take the scalar code
generation path.  This gives us SIMD8 VS programs, instead of SIMD4x2.

v2: Rebase on the patch that drops brw->gen >= 8.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-27 21:16:51 -07:00
Kenneth Graunke
ac69ab7302 i965: Move env_var_as_boolean to intel_debug.c.
I need to use this in brw_vec4.cpp, so it can't be static anymore.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-27 21:16:43 -07:00
Kenneth Graunke
826d3afb8f i965/fs: Add ARB_fragment_program support to the NIR backend.
Use prog_to_nir where we would normally call glsl_to_nir, handle program
parameter lists, and skip a few things that don't exist.

Using NIR generates much better shader code than Mesa IR, since we get
real optimizations, as opposed to prog_optimize:

total instructions in shared programs: 314007 -> 279892 (-10.86%)
instructions in affected programs:     285173 -> 251058 (-11.96%)
helped:                                2001
HURT:                                  67
GAINED:                                4
LOST:                                  7

v2: Change early return in nir_setup_uniforms to if/else (Jordan).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-27 21:16:34 -07:00
Kenneth Graunke
bf2c3bc316 nir: Lower subtraction to add with negation when !lower_negate.
prog->nir will generate fsub opcodes, but i965 doesn't implement them.
We may as well lower them at the NIR level, since it's trivial to do.

Suggested by Connor Abbott.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:34 -07:00
Kenneth Graunke
faf6106c6f nir: Implement a Mesa IR -> NIR translator.
Shamelessly ripped off from Eric Anholt's tgsi_to_nir pass.

This is not built on SCons, like the rest of NIR.

v2:
- Delete redundant c->s, c->impl, and c->cf_node_list pointers (Ken)
- Use nir_builder directly instead of ptn_compile in more places (Ken)
- Drop 'struct' keyword in front of nir_builder (ken)
- Add a file level Doxygen comment (Ken)
- Use scalar constants instead of splatting (Eric)
- Use nir_builder helpers for constants, moves, and swizzles (Connor)

v3: Minor indentation improvements.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:34 -07:00
Kenneth Graunke
06f7bea96a nir: Add builder helpers for MOVs with ALU sources and swizzling MOVs.
These will be useful for prog->nir and tgsi->nir.

v2: Don't forget to mark nir_swizzle as inline (Eric).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:33 -07:00
Kenneth Graunke
75c922e0fe nir: Add nir_builder helpers for creating load_const intrinsics.
Both prog->nir and tgsi->nir will want to use these.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:33 -07:00
Ben Widawsky
74fd226e34 i965/skl: Don't use the PMA depth stall workaround
The PMA depth stall must be enabled (optimization turned off) under certain
circumstances on gen8. This was supposedly fixed for Gen9, which means we do not
need to check, or toggle the state. The hardware is supposed to enable the
hardware optimization by default, unlike BDW, so we also don't need to set it at
init. For whatever reason this improves stability on ETQW with the bug mentioned
below.

References: https://bugs.freedesktop.org/show_bug.cgi?id=89039 (doesn't fix)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Anuj Phogat <anuj.phogat@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-27 21:04:41 -07:00
Ben Widawsky
9d32d35850 i965/skl: Disable partial resolve in VC
Recomendation [sic] is to set this field to 1 always. Programming it to default
value of 0, may have -ve impact on performance for MSAA WLs.

Another don't suck bit which needs to get set.

The patch wasn't as well tested as I would have liked, primarily I don't have
perf numbers for it, but it's getting to a point where it is in danger of being
lost.

v2: v1 was a mix of two patches. Since 0x7004 is masked, we only need to set it
once at initialization and make sure the pma workaround doesn't set the mask bit
(which it doesn't).
Move LRI to init gpu state (Ken)
Add a comment.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-27 21:04:37 -07:00
Roland Scheidegger
b2424fb030 llvmpipe: simplify address calculation for 4x4 blocks
These functions looked quite complicated, even though what they actually did
was trivial (ever since we dropped swizzled rendering). Also drop lookup of
format block per bytes done for each block, and do it once per scene instead.
This improves everybody's favorite "benchmark" by 3% or so, though
lp_rast_shade_quads_all() which calls this shows up still quite high for a
function which does little more than call the jit function.
(This would most likely be much better handled by the jit function itself,
the strides are passed through anyway already, though for being able to
handle layers it would definitely add some complexity.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-28 02:59:42 +01:00
Roland Scheidegger
764fc2be5a gallivm: fix texture function name (key) when using txf/ld
When using the texel fetch functions rather than ordinary texturing,
the arguments are all int vecs instead of float vecs, not to mention
the actual function would look completely different. Hence this must
be included in the texture function name (which serves as the key)
otherwise things crash badly when a shader accesses the same texture
and sampler unit with both txf/ld and ordinary texturing instructions
with otherwise matching keys.
2015-03-28 02:58:43 +01:00
Timothy Arceri
2cb149c289 glsl: mark uniform and input interface blocks as read only
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-28 10:18:40 +11:00
Ilia Mirkin
58030a8f99 nv50/ir/gk110: fix offset flag position for TXD opcode
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-27 19:02:19 -04:00
Ilia Mirkin
49b86007aa nv50/ir: take postFactor into account when doing peephole optimizations
Multiply operations can have a post-factor on them, which other ops
don't support. Only perform the peephole optimizations when there is no
post-factor involved.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89758
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-27 19:02:19 -04:00
Jan Vesely
a99a16a0cf gallivm: Fix build since llvm r233411
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-27 18:57:02 -04:00
Eric Anholt
afa9fc1561 nir: Add optional lowering of flrp.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-27 13:29:48 -07:00
Roland Scheidegger
56076be2ac gallivm: use llvm function calls for texturing instead of inlining
There are issues with inlining everything, most notably llvm will use much
more memory (and be slower) when compiling. Ideally we'd probably use
functions for shader functions too but texture sampling usually is responsible
for quite some IR (it can easily reach 80% of total IR instructions) so this
seems like a good start.
This still generates a different function for all different combinations just
like before, however it is possible llvm is missing some optimization
opportunities - it is believed though such opportunities should be somewhat
rare, but at least for now it can still be switched off (at compile time only).
It should probably make compiled code also smaller because the same function
should be used for different variants in the same module (so for the
opaque/partial or linear/elts variants).
No piglit change (though it does indeed speed up unrealistic tests like
fp-indirections2 by a factor of 30 or so).
Has a small negative performance impact in openarena - I suspect this could
be fixed by running some IPO passes (despite the private linkage, llvm right
now does NO optimization at all wrt anything going past the call, even if
there's just one caller - so things like values stored before the call and then
always written by the function etc. will not be optimized away, nor will dead
arguments (which we mostly shouldn't have) be eliminated, always constant
arguments promoted etc.).

v2: use proper return values instead of pointer function arguments.
llvm supports aggregate return values, which do wonders here eliminating
unnecessary stack variables - everything in fact will be returned in registers
even without any IPO optimizations. It makes the code simpler too.
With this I could not measure a peformance impact in openarena any longer
(though since there's still no constant value propagation etc. into the tex
functions this does not mean it couldn't have a negative impact elsewhere).

v3: fix some minor issues suggested by Jose, and do disassembly (and the
profiling) without hacks.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-27 19:25:53 +01:00
Roland Scheidegger
8dad9455ff gallivm: pass jit_context pointer through to sampling
The callbacks used for getting the dynamic texture/sampler state were using
the jit_context from the generated jit function. This works just fine, however
that way it's impossible to generate separate functions for texture sampling,
as will be done in the next commit. Hence, pass this pointer through all
interfaces so it can be passed to a separate function (technically, it would
probably be possible to extract this pointer from the current function instead,
but this feels hacky and would probably require some more hacks if we'd use
real functions instead of inlining all shader functions at some point).
There should be no difference in the generated code for now.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-27 19:25:53 +01:00
Christian König
787aa26cb7 gallium/vl: partially revert "Use util_cpu_to_le{16,32} in many more places."
The data in memory is in big endian format and needs to be converted
into CPU byte order. So the patch actually reversed what needs to be done.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-27 11:30:32 +01:00
Ilia Mirkin
626434893a tgsi: fix out-of-bounds access for cube arrays
The CUBE_ARRAY case uses r[4]. Make sure that the stack variable is
there.

Noticed by Coverity.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-03-26 21:02:09 -04:00
Ilia Mirkin
f95a6b2ff4 st/mesa: initialize have_fma in constructor
Spotted by Coverity.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-26 21:02:09 -04:00
Ilia Mirkin
1b87d73a9f gallium/util: remove u_linkage
Does not appear to be used in tree. Coverity spotted some errors in the
bitmask stuff, but the whole thing appears to be unused.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-26 21:02:09 -04:00
Ilia Mirkin
2e34faaf06 gallium/hud: avoid overflowing hud graph name size
Spotted by Coverity.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-26 21:02:08 -04:00
Ilia Mirkin
9d1b5febb6 st/mesa: update arrays when the current attrib has been updated
Fixes the recently-sent gl-2.0-vertex-const-attr piglit test. Makes sure
to revalidate arrays when only the current attribute has been updated
via glVertexAttrib*.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89754
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-26 21:01:59 -04:00
Dave Airlie
91e3533481 st_glsl_to_tgsi: only do mov copy propagation on temps (v2)
Don't propagate ARRAYs

This should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=89759

v2: just specify arrays so we get input propagation
Signed-off-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-26 12:03:44 +10:00
Kenneth Graunke
ef09cfb51e i965: Drop unnecessary brw->gen >= 8 check from scalar VS code.
brw->scalar_vs already implies that brw->gen >= 8.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-25 16:19:26 -07:00
Kenneth Graunke
649173b473 i965/fs: Implement texture projection support.
Our fragment program backend implements support for TXP directly, and
there's no NIR lowering pass to remove the projection.  When we switch
fragment program support over to NIR, we need to support it somehow.

It's easy enough to support directly.

v2: Split out offset/tex_offset rename (requested by Jordan).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-25 16:17:19 -07:00
Kenneth Graunke
0a9bcf9e39 i965/fs: Rename offset to tex_offset to avoid shadowing offset().
fs_visitor::nir_emit_texture() created an fs_reg variable called offset,
which shadowed the offset() helper function in brw_ir_fs.h.

Rename the variable to tex_offset so we can still call offset().

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-25 16:17:19 -07:00
Kenneth Graunke
3120345f40 nir: Add glsl_float_type() wrapper.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-25 16:17:19 -07:00
Matt Turner
871f1080d0 glsl: Use INFINITY instead of std::numeric_limits<float>::infinity().
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-25 15:06:48 -07:00
Emil Velikov
5dc573e5de automake: add missing egl files to the tarball
Namely the Haiku EGL driver backend and the SConscript for the dri2 EGL
driver backend.

Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-25 21:00:02 +00:00
Ian Romanick
6075780247 glsl: Constify ir_instruction::equals
v2: Don't be lazy.  Constify the as_foo functions and use those instead
of ugly casts.  Suggested by Curro.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-25 10:41:08 -07:00
Ian Romanick
dec9664e35 glsl: Constify the as_foo functions
Now that they're all implemented using macros, this is trivial.

v2: Remove redundant parenthesis.  Suggested by Curro.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-25 10:40:52 -07:00
Ian Romanick
0c4ee62045 glsl: Implement remaining as_foo functions with macros
The downcast functions for non-leaf classes were previously implemented
"by hand."  Now they are implemented using macros based on the is_foo
functions added in the previous patch.

v2: Remove redundant parenthesis.  Suggested by Curro (on the next
patch).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-25 10:39:09 -07:00
Ian Romanick
a284c63006 glsl: Add is_rvalue, is_dereference, and is_jump methods
These functions deteremine when an IR node is one of the non-leaf
classes.

v2: Adjust indentation to line up.  Suggested by Matt.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-25 10:34:59 -07:00
Jose Fonseca
25d6cdd2ff util/u_atomic: Ignore warnings interlocked accesses.
These are due how we implemented the atomic tests, not the atomic
implementation itself.  It's also difficult to refactor the code to
avoid the warnings due to the use of macros -- the code would be quite
hairy.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:48 +00:00
Jose Fonseca
28c54400af scons: Disable MSVC warnings about inconsistent function annotation.
Somehow, merely including any of the *intrin.h headers causes dozens of
this warnings (when compiling pretty much every source file).  MSVC does
not always complain the same -- so it's possible we're doing something
weird --, but silence these warnings in the meanwhile.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:45 +00:00
Jose Fonseca
cb88edbd4e mesa: Avoid MSVC C6334 warning in /analyze mode.
MSVC's implementation of signbit(x) uses sizeof(x) with expressions to
dispatch to an internal function based on the argument's type (float,
double, etc), but that raises a flag with MSVC's own static analyzer,
and because this is an inline function in a header it causes substantial
warning spam.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:43 +00:00
Jose Fonseca
fdb507e3d6 c99_math: Don't reimplement lrint and friends on MSVC 2013.
MSVC 2013 declares these functions, both for C and C++ source files.

This was caught with MSVC in analyze mode.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:41 +00:00
Jose Fonseca
69db422218 scons: Don't build osmesa.
There doesn't seem much interest on osmesa on Windows, particularly classic osmesa.

If there is indeed interest in osmesa on Windows, we should instead
integrate src/gallium/targets/osmesa into SCons.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:38 +00:00
Jose Fonseca
47870d658b scons: Don't build loader on Windows.
EGL was the last user.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:35 +00:00
Jose Fonseca
f9b8c9299d scons: Don't build egl on Windows.
Useless, as there are no drivers for it.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:32 +00:00
Jose Fonseca
5db57b8a55 scons: Fix git_sha1.h generation fallback.
I didn't meant to remove the 'if not os.path.exists(filename)' statement.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-25 10:42:26 +00:00
Martin Peres
31a30fb342 docs: Update progress on ARB_direct_state_access.
v2:
- Fix the state of the Program pipelines and Query objects (Laura)

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
bf11c195a5 main: Added entry points for NamedRenderbufferStorage/Multisample
v2: Review from Laura Ekstrand
- get rid of a change that should not have happened in this patch
- improve the error messages
- fix alignments
- fix a capitalization in a function name in an error message

v3: Review from Laura Ekstrand
- move the test for the validity of the renderbuffer to less generic
  functions
- get rid of some changes that accidentally landed in the wrong commit
- revert some alignment fixes

v3: Review from Laura Ekstrand
- check that the lookup returns a valid renderbuffer
- cosmetic changes to some error messages

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
245e5c4813 main: Added entry point for glGetNamedRenderbufferParameteriv
v2:
- improve an error message

v3:
- move a test to less generic functions
- fix an alignment

v4:
- take the caller as a parameter instead of bool dsa
- check that the lookup returns a valid renderbuffer

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
a34669b961 main: Added entry point for glCreateRenderbuffers
v2:
- refactor bindRenderBuffer and create_render_buffers to fix an assertion

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
73a9d0fbe5 main: Added entry point for glCreateSamplers
Because of the current way the code is architectured, there is no
functional difference between the DSA and the non-DSA path.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
b09f2ee8f7 main: Added entry point for glCreateProgramPipelines
v2:
- add spaces in an error message (Laura)

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
19e6efc0ad main: Added entry points for glGetQueryBufferObject*
These entry points will be fleshed out when the GL_ARB_query_buffer_object
extension gets implemented. In the meantime, return GL_INVALID_OPERATION as
suggested by Ian.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
c3c1ed874e main: Added entry point for glCreateQueries
v2:
- display the name of the target instead of its id (Laura)

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
6ead10d08f main: Added entry point for glGetTransformFeedbacki64_v
v2: Review from Laura Ekstrand
- use the transform feedback object lookup wrapper

v3:
- use the new name of _mesa_lookup_transform_feedback_object_err

v4: Review from Laura Ekstrand
- fix some alignement problems

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
8799ecddb6 main: Added entry point for glGetTransformFeedbacki_v
v2: Review from Laura Ekstrand
- use the transform feedback object lookup wrapper

v3:
- use the new name of _mesa_lookup_transform_feedback_object_err

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
e59d2434a0 main: Added entry point for glGetTransformFeedbackiv
v2: Review from Laura Ekstrand
- use the transform feedback object lookup wrapper

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
296d82376e main: Added entry point for glTransformFeedbackBufferRange
v2: review from Laura Ekstrand
- use the refactored code to lookup the objects
- improve some error messages
- factor out the gl method name computation
- better handle the spec differences between the DSA and non-DSA cases
- quote the spec a little more

v3: review from Laura Ekstrand
- use the new name of _mesa_lookup_bufferobj_err
- swap the comments around the offset and size checks

v4: review from Laura Ekstrand
- add more spec quotes
- properly fix the comments around the offset and size checks

v5: review from Laura Ekstrand
- add quotes on the spec citations
- revert some changes in the printf format

v6: review from Laura Ekstrand
- remove a redondant "gl" in a method name

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-25 10:05:45 +02:00
Martin Peres
a5d165afed main: Added entry point for glTransformFeedbackBufferBase
v2: Review from Laura Ekstrand
- give more helpful error messages
- factor the lookup code for the xfb and objBuf
- replace some already-existing tabs with spaces
- add comments to explain the cases where xfb == 0 or buffer == 0
- fix the condition for binding the transform buffer or not

v3: Review from Laura Ekstrand
- rename _mesa_lookup_bufferobj_err to
  _mesa_lookup_transform_feedback_bufferobj_err and make it static to avoid a
  future conflict
- make _mesa_lookup_transform_feedback_object_err static

v4: Review from Laura Ekstrand
- add the pdf page number when quoting the spec
- rename some of the symbols to follow the public/private conventions

v5: Review from Laura Ekstrand
- properly rename some of the symbols to follow the public/private conventions
- fix some alignments
- add quotes around a spec citation
- add back a newline I accidentally deleted
- add spaces around the ternary operator usages

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-25 10:05:45 +02:00
Martin Peres
c86cb2da25 main: Added entry point for glCreateTransformFeedbacks
v2: Review from Laura Ekstrand
- generate the name of the gl method once
- shorten some lines to stay in the 78 chars limit

v3: Review from Fredrik Höglund <fredrik@kde.org>
- rename gl_mthd_name to func
- set EverBound in _mesa_create_transform_feedbacks in the dsa case

v4:
- rename _mesa_create_transform_feedbacks to create_transform_feedbacks and
  make it static

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
fc76fac419 main: fix the validation of the number of samples
Maybe this should be the job of the dispatch layer.

v2:
- add the section name and pdf page number of the quote (Laura)
- OpenGL 3.0 core does not exist, get rid of "core"

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
7bd8b48084 main: replace tabs by 8 spaces in fbobject.c
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Martin Peres
cd0763b78f main: replace tabs by 8 spaces in bufferobj.c
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-25 10:05:45 +02:00
Kristian Høgsberg
169b389a34 mesa: Apply visibility flags to src/Makefile.am targets
We were building libglsl_util.la without our visibility flags and
leaking hash_table_* symbols.

Signed-off-by: Kristian Høgsberg <kristian.h.kristensen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-24 22:02:57 -07:00
Matt Turner
babd0fa3e2 nir: Fix typo. 2015-03-24 19:14:40 -07:00
Matt Turner
3fb56805f0 nir: Recognize sat(add(b2f(a), b2f(b))) as a logical OR.
Transform this into b2f(or(a, b)).

instructions in affected programs:     432 -> 430 (-0.46%)
helped:                                2

Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-24 14:43:37 -07:00
Matt Turner
c31158d2cb nir: Recognize mul(b2f(a), b2f(b)) as a logical AND.
Transform this into b2f(and(a, b)).

total instructions in shared programs: 6205448 -> 6204391 (-0.02%)
instructions in affected programs:     284030 -> 282973 (-0.37%)
helped:                                903
HURT:                                  6

Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-24 14:43:37 -07:00
Matt Turner
b481ebbe39 glsl: Recognize sat(add(b2f(a), b2f(b))) as a logical OR.
Transform this into b2f(or(a, b)).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-24 14:43:37 -07:00
Matt Turner
c8e8f66036 glsl: Recognize mul(b2f(a), b2f(b)) as a logical AND.
Transform this into b2f(and(a, b)).

total instructions in shared programs: 6190291 -> 6189225 (-0.02%)
instructions in affected programs:     267247 -> 266181 (-0.40%)
helped:                                866

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-24 14:43:37 -07:00
Matt Turner
95729d2458 nir: Handle mixed scalar/vector arguments to logical and/or/xor.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-24 14:43:37 -07:00
Matt Turner
c8acbd1bfd glsl: Allow vector logic ops to be generated.
They're not accessible from the source language, but optimizations are
allowed to generate them.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-24 14:42:51 -07:00
Emil Velikov
248eb54eb6 configure.ac: move AC_MSG_RESULT reporting back into the m4 macro
The one who does AC_MSG_CHECKING should provide the AC_MSG_RESULT.

Fixes: ced9425327 (configure: Introduce new output variable to
ax_check_python_mako_module.m4"

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89328
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
2015-03-24 20:49:32 +00:00
Jonathan Gray
726d99b197 gallium/util: Use HAVE___BUILTIN_FFS* macros.
Make use of the builtin ffs macros and split out ffsll
to a seperate block.  Needed for at least OpenBSD which
does not have ffsll in libc.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-24 20:49:32 +00:00
Emil Velikov
8cce7b05f1 i965: add the remaining files to the tarball
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-24 20:49:31 +00:00
Emil Velikov
9950eec173 glsl: add the remaining files to the tarball
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-24 20:49:31 +00:00
Emil Velikov
b2439602be makefile: add all headers to the tarball
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-24 20:49:31 +00:00
Emil Velikov
113d59fb55 gbm: remove gbm_gallium_drm from the loader
No longer used as of commit 48c7461d5a0(st/gbm: remove state-tracker)

v2: Add commit message.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> (v1)
2015-03-24 20:49:31 +00:00
Anuj Phogat
d8208312a3 glsl: Generate link error for non-matching gl_FragCoord redeclarations
in different fragment shaders. This also applies to a case when gl_FragCoord
is redeclared with no layout qualifiers in one fragment shader and not
declared but used in other fragment shader.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Khronos Bug#12957
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-24 11:16:31 -07:00
Eric Anholt
7bc39c8418 vc4: Add a dump-the-surface-contents routine.
This has been useful once again while trying to debug stride issues
between render targets and texturing.
2015-03-24 10:39:12 -07:00
Eric Anholt
4df13f55b6 vc4: Allow DRI3 on simulation, as well.
The problem I'd seen before seems to be gone.
2015-03-24 10:39:12 -07:00
Eric Anholt
7f797e3d17 vc4: Fix pitch alignment of linear textures.
Fixes some non-power-of-two texture rendering when I force ARGB8888 to
raster.
2015-03-24 10:39:12 -07:00
Eric Anholt
b3ea377f86 vc4: Write the alignment of level width consistently in validation.
16 / cpp happens to be the same as utile_w on the only raster format
supported (4 bytes per pixel), but simulator/hw source code generally
talks in terms of utiles.
2015-03-24 10:39:12 -07:00
Eric Anholt
8975a09494 vc4: Fix use of a bool as an enum.
The enum compared to was 0, so it worked out, but it sure looked wrong.
2015-03-24 10:39:12 -07:00
Eric Anholt
04605c21f6 vc4: Decide the HW's format before laying out the miptree.
I'm experimenting with a workaround for raster texture misrendering on
hardware, and this lets me look at the format chosen when computing
strides.
2015-03-24 10:39:12 -07:00
Eric Anholt
25d60763d9 vc4: Use our device-specific ioctls for create/mmap.
They don't do anything special for us, but I've been told by kernel
maintainers that relying on dumb for my acceleration-capable buffers
is not OK.
2015-03-24 10:39:12 -07:00
Eric Anholt
af3d747194 vc4: Make a new #define for making code conditional on the simulator.
I'd like to compile as much of the device-specific code as possible
when building for simulator, and using if (using_simulator) instead of
ifdefs helps.
2015-03-24 10:39:12 -07:00
Eric Anholt
9bafcf630a vc4: Add some useful debug printfs for miptrees.
I keep rewriting these.
2015-03-24 10:39:12 -07:00
Ilia Mirkin
baa22c8825 glsl: avoid calling base_alignment when samplers are involved
Earlier commit 53bf7c8fd2 changed the logic to always call
base_alignment on structs. 1ec715ce8b hacked the function to return 0
for sampler fields, but didn't handle sampler arrays. Instead of
extending the hack, avoid calling base_alignment in the first place on
non-UBO uniforms.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89726
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tapani Palli <tapani.palli@intel.com>
2015-03-24 10:10:13 -04:00
Ilia Mirkin
43277fcd59 Revert "nv50,nvc0: remove bogus 64_FLOAT formats"
This reverts commit 20346808cf.

The conversion is actually done since these are the *B macro variants
and no vtx format is supplied, which makes them go through the translate
module.

This restores the following piglit tests to passing:

  draw-vertices user
  gl-2.0-vertexattribpointer

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-23 20:57:52 -04:00
Mario Kleiner
1110113a7f mapi: Make private copies of name strings provided by client.
glXGetProcAddress("glFoo") ends up in stub_add_dynamic() to
create dynamic stubs for dynamic functions. stub_add_dynamic()
doesn't store the caller provided name string "Foo" in a mesa
private copy, but just stores a pointer to the "glFoo" string
passed to glXGetProcAddress - a pointer into arbitrary memory
outside mesa's control.

If the caller passes some dynamically allocated/changing
memory buffer to glXGetProcAddress(), or the caller gets unmapped
from memory, e.g., some dynamically loaded application
plugin which uses OpenGL, this ends badly - with a dangling
pointer.

strdup() the name string provided by the client to avoid
this problem.

Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-23 22:17:03 +00:00
Tom Stellard
dfb1ae9d91 clover: Return 0 as storage size for local kernel args that are not set v2
The storage size for local kernel args can be queried before the
arguments are set by using the CL_KERNEL_LOCAL_MEM_SIZE param
of clGetKernelWorkGroupInfo().

The spec says that if local kernel arguments have not been specified,
then we should assume their size is 0.

v2:
  - Implement using c++11 member initialization.

Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-23 17:20:21 +00:00
Tom Stellard
769b366b83 gallivm: Use MCInstrInfo in the disassembler for querying instruction info
This fixes the build since llvm r232885 and also simplifies the code.
2015-03-23 14:43:10 +00:00
Giuseppe Bilotta
7932b30892 clover: use get_device_vendor instead of get_vendor
The pipe's get_vendor method returns something more akin to a driver
vendor string in most cases, instead of the actual device vendor. Use
get_device_vendor instead, which was introduced specifically for this
purpose.

Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:25:34 +00:00
Giuseppe Bilotta
76039b38f0 gallium: implement get_device_vendor() for existing drivers
The only hackish ones are llvmpipe and softpipe, which currently return
the same string as for get_vendor(), while ideally they should return
the CPU vendor.

Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-23 13:25:34 +00:00
Giuseppe Bilotta
31d4e6fbff gallium: introduce get_device_vendor() entrypoint for pipes
This will be needed by Clover to return the correct information
to CL_DEVICE_VENDOR info queries.

Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-23 13:25:34 +00:00
Giuseppe Bilotta
9280f17e82 gallium: remove trailing whitespace in p_screen.h
Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-23 13:25:34 +00:00
Tom Stellard
6e17936bf8 clover: The unit for CL_DEVICE_MEM_BASE_ADDR_ALIGN is bits not bytes
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:22:42 +00:00
Tom Stellard
2b12b1752a clover: Add all the mandatory 1.1 extensions to the extension string
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:22:42 +00:00
Tom Stellard
96f9cc9181 clover: Add a space at the end of CL_DEVICE_OPENCL_C_VERSION
This is required by the spec.

Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:22:42 +00:00
Francisco Jerez
3d1bba7c9b i965/vec4: Fix handling of multiple register reads and writes in dead_code_eliminate().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:52:57 +02:00
Francisco Jerez
2babde35b9 i965/vec4: Calculate live intervals with subregister granularity.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:52:57 +02:00
Francisco Jerez
e6e655ef76 i965/vec4: Define helpers to calculate the common live interval of a range of variables.
These will be especially useful when we start keeping track of
liveness information for each subregister.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:52:49 +02:00
Francisco Jerez
eddb87402e i965/vec4: Define helper functions to convert a register to a variable index.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:13:05 +02:00
Francisco Jerez
ce030a6399 i965/vec4: Don't lose the force_writemask_all flag during CSE.
And set it in the MOV instructions that copy the temporary to the
original destination if the generator instruction had it set.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:13:00 +02:00
Francisco Jerez
1db9c0cd0c i965/vec4: Fix handling of multiple register reads and writes in opt_cse().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:56 +02:00
Francisco Jerez
d041a43c0f i965/vec4: Fix handling of multiple register reads and writes during copy propagation.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:52 +02:00
Francisco Jerez
588859e18c i965/vec4: Fix handling of multiple register reads and writes in split_virtual_grfs().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:48 +02:00
Francisco Jerez
9304f60cbe i965/vec4: Fix handling of multiple register reads and writes in opt_register_coalesce().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:40 +02:00
Francisco Jerez
74c7e5d351 i965: Define method to check whether a backend_reg is inside a given range.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:36 +02:00
Francisco Jerez
bf6eb37e0b i965/vec4: Remove dependency of vec4_live_variables on the visitor.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:13 +02:00
Francisco Jerez
2e7622a487 i965/vec4: Trivial copy propagate clean-up.
Fix typo and punctuation in a comment, break long line and add space
before curly bracket.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
7526ee36bc i965/vec4: Add argument index and type checks to SEL saturate propagation.
SEL saturate propagation already implicitly relies on these
assumptions.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
24073b2cd7 i965/vec4: Fix broken saturate mask check in copy propagation.
try_copy_propagate() was checking the bit of the saturate mask for the
arg-th component of the source to decide whether the whole source
should be saturated (WTF?).  We need to swizzle the original saturate
mask and check that for all enabled channels the saturate flag is
either set or unset, as we cannot saturate a subset of destination
components only.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
18dc59c212 i965/vec4: Don't lose copy propagation saturate bits for not written components.
Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
a3733defbe Revert "i965/vec4: Don't lose the saturate modifier in copy propagation."
This reverts commit 0dfec59a27.  The
change prevented propagation of copies with the saturate flag set,
making the whole saturate mask tracking completely useless.  A proper
fix follows.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
21c829e5cc i965/vec4: Remove unused method definition.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
516d45f78a i965/vec4: Some more trivial swizzle clean-up.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
430c6bf70e i965/vec4: Improve src_reg/dst_reg conversion constructors.
This simplifies the src_reg/dst_reg conversion constructors using the
swizzle utils introduced in a previous patch.  It also makes them more
useful by changing their semantics slightly: dst_reg(src_reg) used to
set the writemask to XYZW if the src_reg swizzle was anything other
than XXXX, which was almost certainly not what the caller intended if
the swizzle was non-trivial.  After this patch the same components
that are present in the swizzle will be enabled in the resulting
writemask.

src_reg(dst_reg) used to set the first components of the swizzle to
the enabled components of the writemask and then replicate the last
enabled component to fill the swizzle, which, in cases where the
writemask didn't have exactly the first n components set, would in
general not be compatible with the original dst_reg.  E.g.:

| ADD(tmp, src_reg(tmp), src_reg(1));

would *not* do what one would expect (add one to each of the enabled
components of tmp) if tmp didn't have a writemask of the described
form (e.g. YZ, YW, XZW would all fail).  This pattern actually occurs
in many different places in the VEC4 back-end, it's a wonder that it
hasn't caused piglit failures until now.  After this patch
src_reg(dst_reg) will construct a swizzle with each enabled component
at its natural position (e.g. Y at the second position, Z at the
third, and so on).  The resulting swizzle will behave like the
identity when used in any instruction with the original writemask.

I've manually verified that *none* of the callers of both conversion
constructors were relying on the previous broken semantics.  There are
no piglit regressions on any generation.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
62fd335338 i965/vec4: Pass argument by reference to src_reg/dst_reg conversion constructors.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
23bda945f5 i965/vec4: Remove swizzle_for_size() in favour of brw_swizzle_for_size().
It could be objected that swizzle_for_size() is "faster" than
brw_swizzle_for_size().  It's not measurably better in any reasonable
CPU-bound benchmark on VLV according to the Finnish benchmarking
system (including the SynMark2 DrvShComp shader compilation
benchmark).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
5bcca9f8dc i965/vec4: Remove broken vector size deduction in setup_builtin_uniform_values().
This seemed to be trying to deduce the number of uniform vector
components from the parameter swizzle, but the algorithm would always
give 4 as result.  Instead grab the correct number of components from
the GLSL type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
132cdcc468 i965/vec4: Simplify visitor handling of swizzles using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
9a17e4e900 i965/vec4: Simplify opt_register_coalesce() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
05ec72d8ec i965/vec4: Simplify reswizzle() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7b30493dc4 i965/vec4: Simplify opt_reduce_swizzle() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
eb9bd3a1b0 i965: Fix signedness of backend_reg::reg_offset.
And make it 16-bit so it packs nicely with the previous field.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7e816c7feb i965/vec4: Fix signedness of dst_reg::writemask.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7678fb9c63 i965/vec4: Don't use GL types in the IR data structures.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7bc02c786d i965/vec4: Fix signedness of brw_is_single_value_swizzle() argument.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
cff670b009 i965: Define some useful swizzle helper functions.
This defines helper functions implementing some common swizzle
transformations that are usually open-coded in the compiler back-end,
causing a lot of clutter.  Some optimization passes will become almost
trivial implemented in terms of these functions (e.g.
vec4_visitor::opt_reduce_swizzle()).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:29 +02:00
Tapani Pälli
3cf99701ba glsl: fix names in lower_constant_arrays_to_uniforms
Patch changes lowering pass to use unique name for each uniform
so that arrays from different stages cannot end up having same
name.

v2: instead of global counter, use pointer to achieve
    unique name (Kenneth Graunke)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89590
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-23 11:18:39 +02:00
Jason Ekstrand
a6d4a108d2 i965/nir: Use signed integer type for booleans
FS instructions with NIR on i965:
total instructions in shared programs: 2663561 -> 2619051 (-1.67%)
instructions in affected programs:     1612965 -> 1568455 (-2.76%)
helped:                                5455
HURT:                                  12

FS instructions with NIR on g4x:
total instructions in shared programs: 2352633 -> 2307908 (-1.90%)
instructions in affected programs:     1441842 -> 1397117 (-3.10%)
helped:                                5463
HURT:                                  11

FS instructions with NIR on ilk:
total instructions in shared programs: 3997305 -> 3934278 (-1.58%)
instructions in affected programs:     2189409 -> 2126382 (-2.88%)
helped:                                8969
HURT:                                  22

FS instructions with NIR on hsw (snb and ivb were similar):
total instructions in shared programs: 4109389 -> 4109242 (-0.00%)
instructions in affected programs:     109869 -> 109722 (-0.13%)
helped:                                339
HURT:                                  190

No SIMD16 programs were gained or lost on any platform

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
41d64fa184 i965/nir: Do boolean resolves on GEN <= 5
v2: A couple comment clean-ups from Matt

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
a55af2699f i965: Add a NIR analysis pass for determining when a boolean resolve is needed
v2: Fix the spelling of analyze and re-arrange code for better readability
    as per Connor's comments.
v3: Make the naming of things more consistent and add a pile of comments
v4: Stop trying to avoid vectors

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
2612e569e0 i965/nir: Properly set the predicate on the SEL used in min/max
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
80390f91a0 i965/nir: Use NIR lowering for ffma for gen < 6
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
235c728020 i965/nir: Use emit_lrp for emitting flrp
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
a3e05898e9 i965/fs: Make emit_lrp return an fs_inst
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-23 01:01:14 -07:00
Dave Airlie
484f9f4fcd i965: define I915_PARAM_REVISION
we are broken against the libdrm 2.4.60 minimum specified,
so fix it for now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-23 09:55:33 +10:00
Jose Fonseca
397b491173 gallivm: Silence unused variable warnings on release builds.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
06ac717810 scons: Silence conversion from 'size_t' to 'type', possible loss of data on MSVC.
Most cases seem harmless, though that might not always be the case.  Maybe
one day we can get gcc to complain about these and fix them throughout
the code, but until then let's silence them.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
15c5595bb1 scons: Ensure inttypes.h is always pre-included on MSVC.
It's a bit hackish couldn't find another solution.  See code comment
for details.   The warning is useful, so universally disabling doesn't
sound a good idea.

Fixes

   warning C4005: 'xxx' : macro redefinition

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
e4d95982ee scons: Silence MSVC C4351 warning.
It warns about change in MSVC behavior -- array initialisation used to
be non-standard, but is standard now, assuming I understand correctly
http://en.cppreference.com/w/cpp/language/zero_initialization .

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
e518d97d7e scons: Match some of LLVM warning options.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
31e47a59ad scons: Cleanup flex/bison settings specification.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
9c1c657e19 scons: Prefer winflexbison, and use --wincompat when available.
This avoids MSVC the warning

  warning C4013: 'isatty' undefined; assuming extern returning int

with certain versions of flex.

Reviewed-by: Brian Paul <brianp@vmware.com>

v2: Add win flex-bison link to docs/install.html.
2015-03-22 08:23:24 +00:00
Jose Fonseca
015e8b6384 scons: Define YY_USE_CONST on MSVC.
This prevents the MSVC from

  warning C4090: 'function' : different 'const' qualifiers

when compiling flex generated lexers.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
357d1fc81a scons: Tell MSVC STL library to not use exceptions.
MSVC defaults to no exceptions unless /EH option is passed (which we don't), while
MSVC's STL defaults to use exceptions unless _HAS_EXCEPTIONS=0 is defined,
which we didn't.

This fixes

  warning C4530: C++ exception handler used, but unwind semantics are not enabled. Specify /EHsc

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
e6330f9f56 scons: Ensure git_sha1.h's directory exists.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
8f0274c6c6 configure: Bail out with MinGW targets.
We only support native Windows builds with SCons.

Tested with:

  ./configure --host=i686-w64-mingw32

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
8d5c303ab9 include: Ensure float.h is included for DBL_MAX.
I didn't actually hit the issue in practice, but just happen to notice
while looking at the code.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
60eff44277 st/vdpau: Avoid constness cast warnings.
Fixes MSVC

  warning C4090: '=' : different 'const' qualifiers

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
fb78cccd7b glsl: Disable MSVC switch warning on a per-file basis.
This addresses

  ...\glsl_parser.cpp(...) : warning C4065: switch statement contains 'default' but no 'case' labels

This is on code generated by bison, which we have little control.

It seems useful to have this warning otherwise enabled.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-22 08:23:23 +00:00
Jose Fonseca
d01a7cdae5 glsl: Avoid GLboolean vs bool arithmetic MSVC warnings.
Note that GLboolean is an alias for unsigned char, which lacks the
implicit true/false semantics that C++/C99 bool have.

Reviewed-by: Brian Paul <brianp@vmware.com>

v2: Change gl_shader::IsES and gl_shader_program::IsES to be bool as
recommended by Ian Romanick.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-22 08:23:23 +00:00
Emil Velikov
7c7954b09d galahad: actually remove the driver
Should have been part of 429a4355259(galahad: remove driver). Seems like
I've erroneously committed the trimmed patch.

Reported-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-21 22:35:27 +00:00
Emil Velikov
bbaf22a998 egl: cut down static storage size for {Version,ClientAPI}String
Both seems to be excessively long, namely:

ClientAPIString can get up-to 47 based on current code, while the name
of the driver can dictate the length of the VersionString, currently it
is around 11. Let's pad each to 100, rather than the current 1000.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-21 17:22:19 +00:00
Emil Velikov
0bff196b22 docs: note the removal of gbm_gallium, galahad and identity
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-21 17:21:30 +00:00
Emil Velikov
429a435525 galahad: remove driver
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:18:28 +00:00
Emil Velikov
84041bab3f gallium/docs: remove information about identity driver
Removed from tree.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:18:25 +00:00
Emil Velikov
55029b2bab docs: update the egl_platforms list
Add the missing wayland, null, android and haiku platforms.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:16:44 +00:00
Emil Velikov
0d6e7620f3 egl/main: drop platform fbdev specific code
st/egl was the only one which had support for this platform.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:16:41 +00:00
Emil Velikov
65a8d4d6dd winsys/sw/fbdev: remove unused software winsys
st/egl was its only user.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:16:38 +00:00
Emil Velikov
1081ed9dc3 winsys/sw/wayland: remove unused winsys
st/egl was its only user.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:16:35 +00:00
Emil Velikov
48c7461d5a st/gbm: remove state-tracker
st/egl was its only user.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-21 17:16:27 +00:00
Roland Scheidegger
e8039208c4 llvmpipe: use global llvm context for PIPE_SUBSYSTEM_EMBEDDED
There's 2 reasons why we'd want to use the global context:
1) There still seems to be one memory "leak" left when using multiple llvm
contexts (it is not a true leak as the memory disappears into some still
addressable pool but nevertheless the memory consumption grows). See
http://cgit.freedesktop.org/~jrfonseca/llvm-jitstress/
2) These contexts get kinda big - even when disposing modules etc. after
compiling a shader the LLVMContext can easily be over 100kB. So when there's
lots of llvm contexts arounds it adds up.

The downside is that at least right now this is absolutely not thread safe,
so this only works safely in environments where multiple pipe contexts are not
used concurrently.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-21 01:52:03 +01:00
Emil Velikov
b2dccfd17e docs: add news item and link release notes for mesa 10.4.7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-21 00:54:14 +00:00
Emil Velikov
0030eef62b docs: Add sha256 sums for the 10.4.7 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit cb154bb221)
2015-03-21 00:53:22 +00:00
Emil Velikov
befb5d1c94 Add release notes for the 10.4.7 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit d26f3c1f86)
2015-03-21 00:53:21 +00:00
Dave Airlie
ad6ede260f mesa: reorder gl_light_attrib
reduces from 2664->2656.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:41 +10:00
Dave Airlie
b99c7defac mesa: reorder gl_framebuffer
this reduces it from 1088 -> 1080 bytes

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:38 +10:00
Dave Airlie
727eb4c4e7 mesa: fix hole in vertex_array_object
this just removes 4 bytes from this object.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:33 +10:00
Dave Airlie
974e4783a5 mesa: repack gl_texture_attrib.
This removes a hole, and puts the large allocation at the end,

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:29 +10:00
Dave Airlie
2dbd8284e7 mesa: reduce gl_colorbuffer_attrib and gl_fog_attrib
These 392->388 and 72->68.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:25 +10:00
Dave Airlie
2c016ed35f mesa: reorder gl_image_unit
reduces 40->32
but reduces use in context from 7680->6144.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:21 +10:00
Dave Airlie
0ff4726a06 mesa: reorder gl_program, gl_shader, gl_shader_program
gl_program : 1344->1336
gl_shader: 488->472
gl_shader_program: 352->344.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:16 +10:00
Dave Airlie
7b634fed59 mesa: reorder gl_transform_feedback_object
Reduces size from 184 to 176 bytes.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:09 +10:00
Dave Airlie
e17b0435c5 mesa: reorder prog_instruction
reduces size from 64 to 56 bytes.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:05 +10:00
Dave Airlie
401b11843b mesa: reorder gl_array_attrib
drops 80 bytes to 72.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:00 +10:00
Dave Airlie
b3f6e0bb58 mesa: reorder gl_client_array
drops from 56 to 48 bytes,
drops gl_vertex_array_object from 4584 to 4320 bytes

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:56 +10:00
Dave Airlie
cbaff50828 mesa: reorder gl_texture_unit
drops size from 520 -> 512 bytes,
which then makes gl_texture_attrib go from 99984 to 98440.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:51 +10:00
Dave Airlie
83606b4904 mesa: reorder gl_point_attrib
this drops the size from 52 bytes to 48 bytes.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:47 +10:00
Dave Airlie
684c914014 mesa: reorder gl_multisample_attrib
drops size from 28 bytes to 20.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:17 +10:00
Ian Romanick
a04b520890 i965/fs: Use correct null destination register in cmod tests
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89670
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: Vinson Lee <vlee@freedesktop.org>
2015-03-20 12:27:02 -07:00
Connor Abbott
ccb9cbc849 i965/fs: bail on move-to-flag in sel peephole
Fixes a piglit regression
(shaders/glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined) with
my series for GVN.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-20 11:53:11 -04:00
Francisco Jerez
1cc00f1875 i965: Mask out unused Align16 components in brw_untyped_atomic.
This is currently not a problem because the vec4 visitor happens to
mask out unused components from the destination, but it might become
an issue when we start using atomics without writeback message.  In
any case it seems sensible to set it again here because the
consequences of setting the wrong writemask (random graphics memory
corruption) are difficult to debug and can easily go unnoticed.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
959d16e38e i965: Pass number of components explicitly to brw_untyped_atomic and _surface_read.
And calculate the message response size based on the number of
components rather than the other way around.  This simplifies their
interface somewhat and allows the caller to request a writeback
message with more than one vector component in SIMD4x2 mode.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
a815cd8449 i965: Don't disable exec masking for sampler message sends.
This was telling the sampler to do texture fetches for *all* channels
in the non-constant surface index case, what could have reduced
throughput unnecessarily when some of the channels were disabled by
control flow.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
a902a5d6ba i965: Factor out logic to build a send message instruction with indirect descriptor.
This is going to be useful because the Gen7+ uniform and varying pull
constant, texturing, typed and untyped surface read, write, and atomic
generation code on the vec4 and fs back-end all require the same logic
to handle conditionally indirect surface indices.  In pseudocode:

|   if (surface.file == BRW_IMMEDIATE_VALUE) {
|      inst = brw_SEND(p, dst, payload);
|      set_descriptor_control_bits(inst, surface, ...);
|   } else {
|      inst = brw_OR(p, addr, surface, 0);
|      set_descriptor_control_bits(inst, ...);
|      inst = brw_SEND(p, dst, payload);
|      set_indirect_send_descriptor(inst, addr);
|   }

This patch abstracts out this frequently recurring pattern so we can
now write:

| inst = brw_send_indirect_message(p, sfid, dst, payload, surface)
| set_descriptor_control_bits(inst, ...);

without worrying about handling the immediate and indirect surface
index cases explicitly.

v2: Rebase.  Improve documentatation and commit message. (Topi)
    Preserve UW destination type cargo-cult. (Topi, Ken, Matt)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
fd149628e1 i965: Set nr_params to the number of uniform components in the VS/GS path.
Both do_vs_prog and do_gs_prog initialize brw_stage_prog_data::nr_params to
the number of uniform *vectors* required by the shader rather than the number
of uniform components, contradicting the comment.  This is inconsistent with
what the state upload code and scalar path expect but it happens to work until
Gen8 because vec4_visitor interprets it as a number of vectors on construction
and later on overwrites its original value with the number of uniform
components referenced by the shader.

Also there's no need to add the number of samplers, they're not actually
passed in as uniforms.

Fixes a memory corruption issue on BDW with SIMD8 VS.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 16:55:36 +02:00
Kenneth Graunke
706b916960 i965/skl: Break down SIMD16 3-source instructions when required.
Several steppings of Skylake fail when using SIMD16 with 3-source
instructions (such as MAD).

This implements WaDisableSIMD16On3SrcInstr and fixes ~190 Piglit
tests.

Based on a patch by Neil Roberts.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-03-20 13:25:41 +00:00
Neil Roberts
bc4b18d297 i965: Refactor SIMD16-to-2xSIMD8 checks.
The places that were checking whether 3-source instructions are
supported have now been combined into a small helper function. This
will be used in the next patch to add an additonal restriction.

Based on a patch by Kenneth Graunke.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-20 13:25:41 +00:00
Neil Roberts
c02c4b567c i965: Store the GPU revision number in brw_context
brwContextInit now queries the GPU revision number via a new parameter
for DRM_I915_GETPARAM. This new parameter requires a kernel patch and
a patch to libdrm. If the kernel doesn't support it then it will
continue but set the revision number to -1. The intention is to use
this to implement workarounds that are only needed on certain
steppings of the GPU.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-03-20 13:25:40 +00:00
Fredrik Höglund
2fd21d8a84 mesa: Make sure the buffer exists in _mesa_lookup_bufferobj_err
Generate GL_INVALID_OPERATION and return NULL when the buffer object
hasn't been created.  All callers expect this.

v2: Use a more concise error message.

Cc: Laura Ekstrand <laura@jlekstrand.net>
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-20 01:25:29 +01:00
Dave Airlie
9d97cd2e3e u_primconvert: add primitive restart support
This add primitive restart support to the prim conversion.

This involves changing the API for the translate functions
as we need to pass the prim restart index and the original
number of indices into the translate functions.

primitive restart is support for quads, quad strips
and polygons.

This deal with the case where the actual number of output
primitives is less than the initially calculated number,
by filling the rest of the output primitives with the restart
index, the other option is to reduce the output prim number,
but that will make the generator code a bit messier.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-20 09:46:30 +10:00
Kenneth Graunke
201aef9d13 i965/fp: Emit discard jumps.
This should improve the performance of any shaders using the KIL
instruction.  I'm a bit surprised we missed this.

Unfortunately, I have not been able to measure any performance
improvements from this patch.  It does make ARB_fragment_program
behave similarly to GLSL code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-19 16:14:51 -07:00
Kenneth Graunke
8a0946f3b1 i965/fs: Make an emit_discard_jump() function to reduce duplication.
This is already copied in two places, and I want to copy it to a third
place.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-19 16:14:51 -07:00
Laura Ekstrand
09bfa326a9 main: Add TEXTURE_CUBE_MAP support in CopyTextureSubImage3D.
So it turns out that this doesn't actually fix any bugs or add any features,
stictly speaking. However, it does avoid a lot of kludginess.  Previously, if
you called

glCopyTextureSubImage3D(texcube, 0, 0, 0, zoffset = 3, ...

it would grab the texture image object for face = 0 in teximage.c instead of
the desired face = 3.  But Line 274 of brw_blorp_blit.cpp would correct for
this by updating the slice to 3.

This commit does the correct thing before calling any drivers,
which should make the functionality much more robust and uniform across all
drivers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-19 16:07:57 -07:00
Laura Ekstrand
037e36a8aa main: Simplify debug messages for CopyTex*SubImage*D.
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-19 16:07:44 -07:00
Ian Romanick
a44b95cd57 glsl: Annotate as_foo functions that the this pointer cannot be NULL
We use the idiom

   ir_foo *x = y->as_foo();
   if (x == NULL)
      return;

all over the place.  GCC generates some quite lovely code for this.
One such example:

  340a5b:       83 7d 18 04             cmpl   $0x4,0x18(%rbp)
  340a5f:       0f 85 06 04 00 00       jne    340e6b
  340a65:       48 85 ed                test   %rbp,%rbp
  340a68:       0f 84 fd 03 00 00       je     340e6b

This case used as_expression() (ir_type_expression is 4).  Note that it
checks the ir_type, then checks that the pointer isn't NULL.  There is
some disconnect in GCC around the condition in the as_foo functions.

      return ir_type == ir_type_##TYPE ? (ir_##TYPE *) this : NULL; \

It believes "this" could be NULL, so it emits check outside the function
just for fun.

This patch uses assume() to tell GCC that it need not bother with extra
NULL checking of the pointer returned by the as_foo functions.

   text	   data	    bss	    dec	    hex	filename
4836430	 158688	  26248	5021366	 4c9eb6	i965_dri-before.so
4836173	 158688	  26248	5021109	 4c9db5	i965_dri-after.so

v2: Replace 'if (this == NULL) unreachable("this cannot be NULL")' with
assume(this != NULL).  Suggested by Ilia Mirkin.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-19 15:35:42 -07:00
Paul Berry
bf9d921936 main: Change the type argument of use_shader_program() to gl_shader_stage.
This allows it to be called from a loop.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-03-19 13:38:51 -07:00
Paul Berry
57b2652322 main: Clean up a strange construction in use_shader_program().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-19 13:38:51 -07:00
Jason Ekstrand
46c35c61e9 i965/nir: Sort uniforms direct-first and use two different uniform registers
Previously, we put all the uniforms into one big array.  The problem with
this approach is that, as soon as there was one indirect array acces, the
backend would decide that the entire large array should be pull constants.
This commit splits the array in half: first direct-only uniforms and then
potentially-indirect uniforms.  This may not be optimal, but it does let
the backend promote things to push constants.

Shader-db results on HSW:
total instructions in shared programs: 4114840 -> 4112172 (-0.06%)
instructions in affected programs:     43316 -> 40648 (-6.16%)
helped:                                116
HURT:                                  0

v2: Set param_size[num_direct_uniforms] only if we have indirect uniforms.
    This caused a bug that, strangely enough, only showed up on Broadwell
    vertex shaders.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:39 -07:00
Jason Ekstrand
8a33f95b7a nir/lower_io: Add a assign_locations function that sorts by [in]direct use
v2: Delete the set of indirectly accessed variables when we're done with it
v3: Rename from _packed to _scalar

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:39 -07:00
Jason Ekstrand
25db44a845 nir/lower_io: Make variable location assignment a manual operation
Previously, we just assigned variable locations in nir_lower_io.  Now, we
force the user to assign variable locations for us.  This gives the backend
a bit more control over where variables are placed.

v2: Rename from _packed to _scalar

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:39 -07:00
Jason Ekstrand
639115123e nir: Use a list instead of a hash_table for inputs, outputs, and uniforms
We never did a single hash table lookup in the entire NIR code base that I
found so there was no real benifit to doing it that way.  I suppose that
for linking, we'll probably want to be able to lookup by name but we can
leave building that hash table to the linker.  In the mean time this was
causing problems with GLSL IR -> NIR because GLSL IR doesn't guarantee us
unique names of uniforms, etc.  This was causing massive rendering isues in
the unreal4 Sun Temple demo.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:38 -07:00
Brian Paul
8f255f948b gallivm: remove unused 'builder' variable
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-19 12:56:35 -06:00
Brian Paul
1cd3745911 mesa: use more descriptive error messages for glUniform errors
Different errors for type mismatches, size mismatches and matrix/
non-matrix mismatches.  Use a common format of "uniformName"@location
in the messags.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-19 12:56:35 -06:00
Matt Turner
b0d422cd2a i965/fs: Print spills:fills and number of promoted constants.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-19 11:15:57 -07:00
Ian Romanick
b616164c95 i965/fs: Emit better b2f of an expression on GEN4 and GEN5
On platforms that do not natively generate 0u and ~0u for Boolean
results, b2f expressions that look like

    f = b2f(expr cmp 0)

will generate better code by pretending the expression is

    f = ir_triop_sel(0.0, 1.0, expr cmp 0)

This is because the last instruction of "expr" can generate the
condition code for the "cmp 0".  This avoids having to do the "-(b & 1)"
trick to generate 0u or ~0u for the Boolean result.  This means code like

    mov(16)         g16<1>F         1F
    mul.ge.f0(16)   null            g6<8,8,1>F      g14<8,8,1>F
    (+f0) sel(16)   m6<1>F          g16<8,8,1>F     0F

will be generated instead of

    mul(16)         g2<1>F          g12<8,8,1>F     g4<8,8,1>F
    cmp.ge.f0(16)   g2<1>D          g4<8,8,1>F      0F
    and(16)         g4<1>D          g2<8,8,1>D      1D
    and(16)         m6<1>D          -g4<8,8,1>D     0x3f800000UD

v2: When the comparison is either == 0.0 or != 0.0 use the knowledge
that the true (or false) case already results in zero would allow better
code generation by possibly avoiding a load-immediate instruction.

v3: Apply the optimization even when neither comparitor is zero.

Shader-db results:

GM45 (0x2A42):
total instructions in shared programs: 3551002 -> 3550829 (-0.00%)
instructions in affected programs:     33269 -> 33096 (-0.52%)
helped:                                121

Iron Lake (0x0046):
total instructions in shared programs: 4993327 -> 4993146 (-0.00%)
instructions in affected programs:     34199 -> 34018 (-0.53%)
helped:                                129

No change on other platforms.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Palli <tapani.palli@intel.com>
2015-03-19 10:21:08 -07:00
Matt Turner
036e347f3c util: Optimize _mesa_roundeven with SSE 4.1.
The SSE 4.1 ROUND instructions let us implement roundeven directly.
Otherwise we assume that the rounding mode has not been modified (as we
do in the rest of Mesa) and use rint().

glibc uses the ROUND instruction in rint() after a cpuid check. This
patch just lets us inline it directly when we're already building for
SSE 4.1.

Reviewed-by: Carl Worth <cworth@cworth.org>
2015-03-18 21:06:26 -07:00
Matt Turner
5de86102f9 util: Add a roundeven test.
Reviewed-by: Carl Worth <cworth@cworth.org>
2015-03-18 21:06:26 -07:00
Matt Turner
dd0d3a2c0f mesa: Replace _mesa_round_to_even() with _mesa_roundeven().
Eric's initial patch adding constant expression evaluation for
ir_unop_round_even used nearbyint. The open-coded _mesa_round_to_even
implementation came about without much explanation after a reviewer
asked whether nearbyint depended on the application not modifying the
rounding mode. Of course (as Eric commented) we rely on the application
not changing the rounding mode from its default (round-to-nearest) in
many other places, including the IROUND function used by
_mesa_round_to_even!

Worse, IROUND() is implemented using the trunc(x + 0.5) trick which
fails for x = nextafterf(0.5, 0.0).

Still worse, _mesa_round_to_even unexpectedly returns an int. I suspect
that could cause problems when rounding large integral values not
representable as an int in ir_constant_expression.cpp's
ir_unop_round_even evaluation. Its use of _mesa_round_to_even is clearly
broken for doubles (as noted during review).

The constant expression evaluation code for the packing built-in
functions also mistakenly assumed that _mesa_round_to_even returned a
float, as can be seen by the cast through a signed integer type to an
unsigned (since negative float -> unsigned conversions are undefined).

rint() and nearbyint() implement the round-half-to-even behavior we want
when the rounding mode is set to the default round-to-nearest. The only
difference between them is that nearbyint() raises the inexact
exception.

This patch implements _mesa_roundeven{f,}, a function similar to the
roundeven function added by a yet unimplemented technical specification
(ISO/IEC TS 18661-1:2014), with a small difference in behavior -- we
don't bother raising the inexact exception, which I don't think we care
about anyway.

At least recent Intel CPUs can quickly change a subset of the bits in
the x87 floating-point control register, but the exception mask bits are
not included. rint() does not need to change these bits, but nearbyint()
does (twice: save old, set new, and restore old) in order to raise the
inexact exception, which would incur some penalty.

Reviewed-by: Carl Worth <cworth@cworth.org>
2015-03-18 21:06:26 -07:00
Matt Turner
bb22aa08e4 i965/fs: Ignore type in cmod prop if scan_inst is CMP.
total instructions in shared programs: 6263270 -> 6203091 (-0.96%)
instructions in affected programs:     2606529 -> 2546350 (-2.31%)
helped:                                14301
GAINED:                                5
LOST:                                  3

Revewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-18 21:03:09 -07:00
Jason Ekstrand
e1f3ddef8c i965/nir: Make our environment variable checking smarter
Before, we enabled NIR if you set INTEL_USE_NIR to anything which mean that
INTEL_USE_NIR=false would actually turn on NIR.  In preparation for turning
NIR on by default, this commit makes it smarter by allowing the
INTEL_USE_NIR variable to work as either a force-enable or a force-disable.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-18 16:40:22 -07:00
Dave Airlie
37e3a116f8 egl: don't fill client apis string forever.
We never reset the string on eglTerminate, so it grows
for ever on multiple eglInitialise.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-19 08:28:38 +10:00
Jose Fonseca
cebc62f106 swrast: Use BITFIELD64_BIT for arrayAttribs.
As VARYING_SLOT_MAX can be bigger than 32.

I'll probably stop building swrast with MSVC in the near future, but this
seems a real bug regardless.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-18 21:51:54 +00:00
Jose Fonseca
d3e9aa8d88 scons: Don't link program_lexer.l/y twice.
program/lex.yy.c and program/program_parse.tab.c is already included in
the PROGRAM_FILES variable.

We still need to specify the dependency relationship though.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-18 21:51:54 +00:00
Jose Fonseca
a56f1a8b32 gallivm: Use INFINITY directly.
Already done below.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-18 21:51:40 +00:00
Jose Fonseca
1d30fd85dd scons: Silence MSVC warnings about overflows in constant arithmetic.
These get triggered even when using the standard C99 INFINITY/NAN
constants.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-18 21:51:40 +00:00
José Fonseca
bbac03ecca scons: Disable MSVC signed/unsigned mismatch warnings.
By default gcc ignores the issue, and as result code that mixes
signed/unsigned is so widespread through the code base that it ends up
being little more than noise, potentially obscuring more pertinent
warnings.

Maybe one day we enable the corresponding gcc warnings and cleanup, but
until then, this change disables them.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-03-18 21:51:40 +00:00
Laura Ekstrand
2ccfce3f4c docs: Update progress on ARB_direct_state_access.
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-18 13:59:39 -07:00
Brian Paul
627991dbf7 dri: add _glapi_set_nop_handler(), _glapi_new_nop_table() to dri_test.c
I wasn't aware of these _glapi_ stub functions when I committed
4bdbb588a9.  Fixes "make check"

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89662
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-18 12:46:11 -06:00
Brian Paul
9263986401 mesa: remove MSVC warning pragmas
Removing this block of pragmas doesn't seem to increase the number of
warning generated by MSVC.  Other than signed/unsigned comparison warnings
there's very few other warnings nowadays.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-18 09:01:50 -06:00
Brian Paul
ea1b066a34 mesa: add void to format_array_format_table_init() declaration
Silences an MSVC warning where it's called from call_once().

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-18 09:01:50 -06:00
Brian Paul
9fbbd60c1d mapi: move some #includes from .h file to .c files
Just include things where they're needed.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-18 09:01:50 -06:00
Brian Paul
4009d22b61 mesa: make _mesa_alloc_dispatch_table() static
Never called from outside of context.c

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-18 09:01:50 -06:00
Brian Paul
4bdbb588a9 mesa: reimplement dispatch table no-op function handling
Use the new _glapi_new_nop_table() and _glapi_set_nop_handler() to
improve how we handle calling no-op GL functions.

If there's a current context for the calling thread, generate a
GL_INVALID_OPERATION error.  This will happen if the app calls an
unimplemented extension function or it calls an illegal function
between glBegin/glEnd.

If there's no current context, print an error to stdout if it's a debug
build.

The dispatch_sanity.cpp file has some previous checks removed since
the _mesa_generic_nop() function no longer exists.

This fixes the piglit gl-1.0-dlist-begin-end and gl-1.0-beginend-coverage
tests on Windows.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-18 09:01:50 -06:00
Brian Paul
201e36e77d mapi: add new _glapi_new_nop_table() and _glapi_set_nop_handler()
_glapi_new_nop_table() creates a new dispatch table populated with
pointers to no-op functions.

_glapi_set_nop_handler() is used to register a callback function which
will be called from each of the no-op functions.

Now we always generate a separate no-op function for each GL entrypoint.
This allows us to do proper stack clean-up for Windows __stdcall and
lets us report the actual function name in error messages.  Before this
change, for non-Windows release builds we used a single no-op function
for all entrypoints.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-18 09:01:50 -06:00
Rob Clark
aee26d292f freedreno/ir3: fix infinite recursion in sched
One more case we need to handle.  One of the src instructions for the
indirect could also end up being ourself.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-18 10:42:33 -04:00
Rob Clark
62cc003b7d freedreno: fix spelling
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-18 10:42:33 -04:00
Marek Olšák
42715ad793 docs/GL3: don't list nv30
Suggested by Ilia Mirkin.
2015-03-18 12:04:27 +01:00
Marek Olšák
4e46af0195 docs/GL3: don't list swrast
Let's face it: This driver is unlikely to get more love.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-18 12:04:27 +01:00
Marek Olšák
2b5379651f docs/GL3: don't list r300
r300g already supports everything it can. There's no point in listing
the driver here.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-18 12:04:27 +01:00
Marek Olšák
a984abdad3 radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords
radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.)

Discovered by Coverity. Reported by Ilia Mirkin.

Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-18 12:04:27 +01:00
Jonathan Gray
8475526a38 configure: check if compiler supports -Werror=vla.
Check if the compiler supports -Werror=vla before using it.
-Wvla was introduced with GCC 4.3 and is not present in 4.2.
Fixes the build on OpenBSD.

v2: Fix statement order, and quote $save_CFLAGS.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89433
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-18 10:53:20 +00:00
Chris Wilson
eeb504e0ae i965: Defer the throttle until we submit new commands
Currently, we throttle before the user begins preparing commands for the
next frame when we acquire the draw/read buffers. However, construction
of the command buffer can itself take significant time relative to the
frame time. If we move the throttle from the buffer acquire to the
command submit phase we can allow the user to improve concurrency
between the CPU and GPU (i.e. reduce the amount of time we waste inside
the throttle).

v2: Whitespace + delay throttling until after the next submission for
greater parallelism

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> [v1]
2015-03-18 09:33:33 +00:00
Chris Wilson
64788b2e8d i965: Throttle to the previous frame
In order to facilitate the concurrency offered by triple buffering and to
offset the latency induced by swapping via an external process, which
may incur extra rendering itself, only throttle to the previous frame
and not the last. The second issue that mostly affects swap benchmarks,
but also can incur jitter in the throttling, is that the throttle bo is
closer to the next SwapBuffers rather than immediately after the previous
SwapBuffers. Throttling to the previous frame doubles the maximum possible
latency at the benefit of improving throughput and reducing jitter.

v2: Rename "first_post_swapbuffer" batches array to a plain
throttle_batch[] as the pluralisation was contorting the name and not
making it clear as to whether it was the first batch or first_post_swap
batch. Not least of which was that not all throttle points are SwapBuffers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2015-03-18 09:33:33 +00:00
Chris Wilson
8b9bd19021 i965: Throttle rendering to an fbo
When rendering to an fbo, even though it may be acting as a winsys
frontbuffer or just generally, we never throttle. However, when rendering
to an fbo, there is no natural frame boundary. Conventionally we use
SwapBuffers and glFinish, but potential callers avoid often glFinish for
being too heavy handed (waiting on all outstanding rendering to complete).
The kernel provides a soft-throttling option for this case that waits for
rendering older than 20ms to be complete (that's a little too lax to be
used for swapbuffers, but is here a useful safety net). The remaining
choice is then either never to throttle, throttle after every draw call,
or at after intermediate user defined point such as glFlush and thus all the
implied flushes. This patch opts for the latter as that is the current
method used for flushing to front buffers.

v2: Defer the throttling from inside the flush to the next
intel_prepare_render() and switch non-fbo frontbuffer throttling over to
use the same lax method. The issuing being that
glFlush()/intel_prepare_read() is just as likely to be called inside a
tight loop and not at "frame" boundaries.

v3: Rename from need_front_throttle to need_flush_throttle to avoid any
ambiguity between front buffer rendering and fbo rendering. (Chad)

v4: Whitespace

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2015-03-18 09:33:33 +00:00
Jason Ekstrand
27bf37ba05 nir/peephole_select: Allow uniform/input loads and load_const
Shader-db results on HSW:

total instructions in shared programs: 4174156 -> 4157291 (-0.40%)
instructions in affected programs:     145397 -> 128532 (-11.60%)
helped:                                383
HURT:                                  0
GAINED:                                20
LOST:                                  22

There are two more tests lost than gained.  However, comparing this with
GLSL IR vs. NIR results, the overall delta is reduced from 85/44
gained/lost on current master to 71/32 with this commit.  Therefore, I
think it's probably a boon since we are getting "closer" to where we were
before.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-17 17:11:05 -07:00
Jason Ekstrand
1be862c0c4 nir/peephole_select: Copy instructions into the block before the if
Previously we tried to do poor-man's copy propagation as we created the
select instructions.  Instead, this commit just moves the instructions from
the blocks inside the if into the block before.  Copy propagation will take
care of making sure we don't have any extra mov's in there for us.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-17 17:11:05 -07:00
Jason Ekstrand
8cf40ed05d nir/peephole_select: Rename are_all_move_to_phi and use a switch
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-17 17:11:05 -07:00
Mario Kleiner
cc5ddd584d glx: Handle out-of-sequence swap completion events correctly. (v2)
The code for emitting INTEL_swap_events swap completion
events needs to translate from 32-Bit sbc on the wire to
64-Bit sbc for the events and handle wraparound accordingly.

It assumed that events would be sent by the server in the
order their corresponding swap requests were emitted from
the client, iow. sbc count should be always increasing. This
was correct for DRI2.

This is not always the case under the DRI3/Present backend,
where the Present extension can execute presents and send out
completion events in a different order than the submission
order of the present requests, due to client code specifying
targetMSC target vblank counts which are not strictly
monotonically increasing. This confused the wraparound
handling. This patch fixes the problem by handling 32-Bit
wraparound in both directions. As long as successive swap
completion events real 64-Bit sbc's don't differ by more
than 2^30, this should be able to do the right thing.

How this is supposed to work:

awire->sbc contains the low 32-Bits of the true 64-Bit sbc
of the current swap event, transmitted over the wire.

glxDraw->lastEventSbc contains the low 32-Bits of the 64-Bit
sbc of the most recently processed swap event.

glxDraw->eventSbcWrap is a 64-Bit offset which tracks the upper
32-Bits of the current sbc. The final 64-Bit output sbc
aevent->sbc is computed from the sum of awire->sbc and
glxDraw->eventSbcWrap.

Under DRI3/Present, swap completion events can be received
slightly out of order due to non-monotic targetMsc specified
by client code, e.g., present request submission:

Submission sbc:   1   2   3
targetMsc:        10  11  9

Reception of completion events:
Completion sbc:   3   1   2

The completion sequence 3, 1, 2 would confuse the old wraparound
handling made for DRI2 as 1 < 3 --> Assumes a 32-Bit wraparound
has happened when it hasn't.

The client can queue multiple present requests, in the case of
Mesa up to n requests for n-buffered rendering, e.g., n =  2-4 in
the current Mesa GLX DRI3/Present implementation. In the case of
direct Pixmap presents via xcb_present_pixmap() the number n is
limited by the amount of memory available.

We reasonably assume that the number of outstanding requests n is
much less than 2 billion due to memory contraints and common sense.
Therefore while the order of received sbc's can be a bit scrambled,
successive 64-Bit sbc's won't deviate by much, a given sbc may be
a few counts lower or higher than the previous received sbc.

Therefore any large difference between the incoming awire->sbc and
the last recorded glxDraw->lastEventSbc will be due to 32-Bit
wraparound and we need to adapt glxDraw->eventSbcWrap accordingly
to adjust the upper 32-Bits of the sbc.

Two cases, correponding to the two if-statements in the patch:

a) Previous sbc event was below the last 2^32 boundary, in the previous
glxDraw->eventSbcWrap epoch, the new sbc event is in the next 2^32
epoch, therefore the low 32-Bit awire->sbc wrapped around to zero,
or close to zero --> awire->sbc is apparently much lower than the
glxDraw->lastEventSbc recorded for the previous epoch

--> We need to increment glxDraw->eventSbcWrap by 2^32 to adjust
the current epoch to be one higher than the previous one.

--> Case a) also handles the old DRI2 behaviour.

b) Previous sbc event was above closest 2^32 boundary, but now a
late event from the previous 2^32 epoch arrives, with a true sbc
that belongs to the previous 2^32 segment, so the awire->sbc of
this late event has a high count close to 2^32, whereas
glxDraw->lastEventSbc is closer to zero --> awire->sbc is much
greater than glXDraw->lastEventSbc.

--> We need to decrement glxDraw->eventSbcWrap by 2^32 to adjust
the current epoch back to the previous lower epoch of this late
completion event.

We assume such a wraparound to a higher (a) epoch or lower (b)
epoch has happened if awire->sbc and glxDraw->lastEventSbc differ
by more than 2^30 counts, as such a difference can only happen
on wraparound, or if somehow 2^30 present requests would be pending
for a given drawable inside the server, which is rather unlikely.

v2: Explain the reason for this patch and the new wraparound handling
    much more extensive in commit message, no code change wrt. initial
    version.

Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-17 23:54:02 +00:00
Emil Velikov
3f94a5afcb r600g: constify r600_shader_tgsi_instruction lists.
Massive list of constant data. Annotate it as such.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-17 23:52:39 +00:00
Emil Velikov
63cf2b4448 r600g: kill off r600_shader_tgsi_instruction::{tgsi_opcode,is_op3}
Both of which are no longer used. Use designated initializer to make
things obvious as people add/remove TGSI_OPCODEs.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-17 23:52:35 +00:00
Emil Velikov
5e68c6b322 r600g: use the tgsi opcode from parse.FullToken.FullInstruction
... rather than the local one in inst_info->tgsi_opcode.

This will allow us to simplify struct r600_shader_tgsi_instruction.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-17 23:52:32 +00:00
Ian Romanick
6db5e134b6 i965/fs: Apply gl_FrontFacing ? -1 : 1 optimization only for floats
At the very least, unreal4/sun-temple/102.shader_test uses this pattern
for a signed integer result.  However, that shader did not hit the
optimization in the first place because it uses !gl_FrontFacing.  I
changed the shader to use remove the logical-not and reverse the other
operands.  I verified that incorrect code is generated before this
change and correct code is generated after.

Fixes fs-frontfacing-ternary-1-neg-1.shader_test.

No shader-db changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-17 15:01:44 -07:00
Ian Romanick
4a53445b0d i965/fs: Change try_opt_frontfacing_ternary to eliminate asserts
If we check for the case that is actually necessary, the asserts
become superfluous.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-17 15:00:28 -07:00
Ian Romanick
ce3f46397d i965/fs: Handle CMP.nz ... 0 and AND.nz ... 1 similarly in cmod propagation
Espically on platforms that do not natively generate 0u and ~0u for
Boolean results, we generate a lot of sequences where a CMP is
followed by an AND with 1.  emit_bool_to_cond_code does this, for
example.  On ILK, this results in a sequence like:

    add(8)          g3<1>F          g8<8,8,1>F      -g4<0,1,0>F
    cmp.l.f0(8)     g3<1>D          g3<8,8,1>F      0F
    and.nz.f0(8)    null            g3<8,8,1>D      1D
    (+f0) iff(8)    Jump: 6

The AND.nz is obviously redundant.  By propagating the cmod, we can
instead generate

    add.l.f0(8)     null            g8<8,8,1>F      -g4<0,1,0>F
    (+f0) iff(8)    Jump: 6

Existing code already handles the propagation from the CMP to the ADD.

Shader-db results:

GM45 (0x2A42):
total instructions in shared programs: 3550829 -> 3550788 (-0.00%)
instructions in affected programs:     10028 -> 9987 (-0.41%)
helped:                                24

Iron Lake (0x0046):
total instructions in shared programs: 4993146 -> 4993105 (-0.00%)
instructions in affected programs:     9675 -> 9634 (-0.42%)
helped:                                24

Ivy Bridge (0x0166):
total instructions in shared programs: 6291870 -> 6291794 (-0.00%)
instructions in affected programs:     17914 -> 17838 (-0.42%)
helped:                                48

Haswell (0x0426):
total instructions in shared programs: 5779256 -> 5779180 (-0.00%)
instructions in affected programs:     16694 -> 16618 (-0.46%)
helped:                                48

Broadwell (0x162E):
total instructions in shared programs: 6823088 -> 6823014 (-0.00%)
instructions in affected programs:     15824 -> 15750 (-0.47%)
helped:                                46

No chage on Sandy Bridge or on any platform when NIR is used.

v2: Add unit tests suggested by Matt.  Remove spurious writes_flag()
check on scan_inst when scan_inst is known to be BRW_OPCODE_CMP (also
suggested by Matt).

v3: Fix some comments and remove some explicit int() casts in fs_reg
constructors in the unit tests.  Both suggested by Matt.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-17 14:59:43 -07:00
Matt Turner
d35720da9b i965: Mark paths in linear <-> tiled functions as unreachable().
text    data     bss     dec     hex filename
9663       0       0    9663    25bf intel_tiled_memcpy.o   before
8215       0       0    8215    2017 intel_tiled_memcpy.o   after

Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2015-03-17 14:09:56 -07:00
Matt Turner
6c6e2a15aa egl: Remove eglQueryString virtual dispatch.
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-03-17 14:09:56 -07:00
Laura Ekstrand
827da841a1 main: Correct _mesa_error with no format in bufferobj.c.
This fixes Bug 89616, a build failure due to line 1639 of bufferobj.c:
_mesa_error(ctx, GL_INVALID_OPERATION, func);

Trivial.
2015-03-17 13:30:54 -07:00
Laura Ekstrand
579297c8bd main: Cosmetic changes to GetBufferSubData.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
23eab47bbe main: Add entry point for GetNamedBufferSubData.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
3706ace244 main: Cosmetic updates to GetBufferPointerv.
v3: Review from Fredrik Hoglund
   -Split cosmetic refactor of GetBufferPointerv out into a separate commit

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
105ddc6aea main: Add entry point for GetNamedBufferPointerv.
v3: Review from Fredrik Hoglund
   -Split cosmetic refactor of GetBufferPointerv out into a separate commit

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
1e45752aaf main: Add entry points for GetNamedBufferParameteri[64]v.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
efcb830d49 main: Refactor GetBufferParameteri[64]v.
v2: Split into a refactor commit and an entry point commit.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
1cfc18da8d main: Add entry point for FlushMappedNamedBufferRange.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
ee5fae6e89 main: Refactor FlushMappedBufferRange.
v2:-Remove "_mesa" from in front of static software fallback.
   -Split out the refactor from the addition of the DSA entry points.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
f7f5df9954 main: Add entry point for UnmapNamedBuffer.
v2: review from Ian Romanick
   - Restore VBO_DEBUG and BOUNDS_CHECK
   - Remove _mesa from static software fallback unmap_buffer.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
a0cc03929e main: Add entry points for MapNamedBuffer[Range].
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
4f513bc330 main: Refactor MapBuffer[Range].
v2: review from Jason Ekstrand
   - Split refactor from addition of DSA entry points.
    review from Ian Romanick
   - Remove "_mesa" from static software fallback map_buffer_range
   - Restore VBO_DEBUG and BOUNDS_CHECK

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
16244525fb main: Minor whitespace fixes in ClearNamedBuffer[Sub]Data.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2015-03-17 10:18:34 -07:00
Laura Ekstrand
5030d0a4f7 main: Add entry points for ClearNamedBuffer[Sub]Data.
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
9fa6c3637a main: Refactor ClearBuffer[Sub]Data.
v2: review by Jason Ekstrand
   - Split refactor of clear buffer sub data from addition of DSA entry
     points.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
4adaad5fcc main: Add entry point for CopyNamedBufferSubData.
v2: remove _mesa in front of static software fallback.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
9cb732b8e9 main: Improve errors and style in BufferSubData.
- More explicit error reporting.
- Removed legacy style.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
566ccdf11b main: Add entry point for NamedBufferSubData.
v2: review by Ian Romanick
   - Remove "_mesa" from name of static software fallback buffer_sub_data.
   - Remove mappedRange from _mesa_buffer_sub_data.
   - Removed some cosmetic changes to a separate commit.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
cb56835f87 main: Add entry point for NamedBufferData.
v2: review from Ian Romanick
   - Fix space in ARB_direct_state_access.xml.
   - Remove "_mesa" from the name of buffer_data static fallback.
   - Restore VBO_DEBUG and BOUNDS_CHECK.
   - Fix beginning of comment to start on same line as /*

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
a76808dc19 main: Add entry point for NamedBufferStorage.
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
2cf48c37c1 main: Add entry point for CreateBuffers.
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-17 10:18:33 -07:00
Laura Ekstrand
44ecf0793d Revert "main: _mesa_cube_level_complete checks NumLayers."
This reverts commit 1ee000a0b6.
Failures with the GLES3 conformance suite and Synmark2 OGLHdrBloom revealed
that this commit was in error.

Extensive testing with Piglit prior to patch review and upstreaming did not
reveal this problem because, in the few Piglit tests that test for cube
completeness, NumLayers = 6.  This is because all of the existing tests use
TextureStorage to initialize the texture, which sets NumLayers.

A new Piglit test has been sent to the mailing list that reproduces the bug
related to this patch ("texturing: Testing
glGenerateMipmap(GL_TEXTURE_CUBE_MAP) without glTexStorage2D").

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-17 10:04:10 -07:00
Neil Roberts
5a06ee7384 i965/skl: Send a message header when doing constant loads SIMD4x2
Commit 0ac4c27275 made it add a header for the send message when
using SIMD4x2 on Skylake because without this it will end up using
SIMD8D. However the patch missed the case when a sampler is being used
to implement constant loads from a buffer surface in a SIMD4x2 vertex
shader.

This fixes 29 Piglit tests, mostly related to the ARL instruction in
vertex programs.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-17 16:32:11 +00:00
Tapani Pälli
627c683086 i965/fs: in MAD optimizations, switch last argument to be immediate
Commit bb33a31 introduced optimizations that transform cases of MAD
in to simpler forms but it did not take in to account that src[0]
can not be immediate and did not report progress. Patch switches
src[0] and src[1] if src[0] is immediate and adds progress
reporting. If both sources are immediates, this is taken care of by
the same opt_algebraic pass on later run.

v2: Fix for all cases, use temporary fs_reg (Matt, Kenneth)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89569
Reviewed-by: Francisco Jerez <currojerez@riseup.net> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-03-17 07:59:30 +02:00
Vinson Lee
60f77b22b1 common.py: Fix PEP 8 issues.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-16 22:55:08 -07:00
Roland Scheidegger
2372275d2f gallivm: abort properly when running out of buffer space in lp_disassembly
Before this actually ran into an infinite loop printing out "invalid"...

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-17 00:46:48 +01:00
Marek Olšák
9d1682d619 docs/GL3: also mark GLES3/GS5 for radeonsi as done 2015-03-16 23:27:25 +01:00
Emil Velikov
c066669b8d st/dri: remove unused include from the automake/scons build
st/dri/common hasn't been around for a while.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-16 20:59:52 +00:00
Emil Velikov
55f0c0a29f auxiliary/os: fix the android build - s/drm_munmap/os_munmap/
Squash this silly typo introduced with commit c63eb5dd5ec(auxiliary/os: get
the mmap/munmap wrappers working with android)

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-16 20:59:36 +00:00
Emil Velikov
5664f57df3 gallium/sw/kms: trivial cleanups
Remove the forward declaration and make use of the DEBUG_PRINT macro for
debug builds.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-16 20:59:22 +00:00
Emil Velikov
771cd266b9 loader: include <sys/stat.h> for non-sysfs builds
Required by fstat(), otherwise we'll error out due to implicit function
declaration.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89530
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: Vadim Rutkovsky <vrutkovs@redhat.com>
Tested-by: Vadim Rutkovsky <vrutkovs@redhat.com>
2015-03-16 20:48:07 +00:00
Felix Janda
aead7fe2e2 c11/threads: Use PTHREAD_MUTEX_RECURSIVE by default
Previously PTHREAD_MUTEX_RECURSIVE_NP had been used on linux for
compatibility with old glibc. Since mesa defines __GNU_SOURCE__
on linux PTHREAD_MUTEX_RECURSIVE is also available since at least
1998. So we can unconditionally use the portable version
PTHREAD_MUTEX_RECURSIVE.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88534
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-16 20:41:39 +00:00
Marek Olšák
b5f19db976 radeonsi: implement TGSI_OPCODE_BFI (v2)
v2: Don't use the intrinsics, the shader backend can recognize these
    patterns and generates optimal code automatically.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-16 14:58:19 +01:00
Marek Olšák
d3723c614f radeonsi: add a helper for extracting bitfields from parameters (v2)
This will be used a lot (especially by tessellation).

v2: don't use the bfe intrinsic

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-16 14:58:19 +01:00
Antia Puentes
9735a62a2c i965: Emit IF/ELSE/ENDIF/WHILE JIP with type W on Gen7
IvyBridge and Haswell PRM say that the JIP should be emitted
with type W but we were using UD. The previous implementation
did not show adverse effects, but IMHO it is safer to follow
the specification thoroughly.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Antia Puentes <apuentes@igalia.com>
2015-03-16 12:56:17 +01:00
Marek Olšák
dc39413640 radeonsi: move scratch reloc state setup
- move it to its own function
- do it after all states are emitted
- bump SI_MAX_DRAW_CS_DWORDS

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Marek Olšák
567c8d7300 radeonsi: don't emit PA_SC_LINE_STIPPLE if not rendering lines
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Marek Olšák
1f4bb38264 radeonsi: don't emit PA_SC_LINE_STIPPLE after every rasterizer state change
Do it only when the line stipple state is changed.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Marek Olšák
f5832f3f9d radeonsi: move PA_SU_SC_MODE_CNTL to rasterizer state
This requires enabling the optional GL provoking vertex behavior for quads.

+ some cosmetic changes, so that the register is set exactly the same as
on r600.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Marek Olšák
98a2398222 radeonsi: implement line and polygon smoothing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Marek Olšák
303d23e10d radeonsi: add shader code for smoothing
The fragment shader multiplies the alpha channel with gl_SampleMaskIn.
If blending is enabled, it looks like MSAA.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Marek Olšák
4f20a8f278 radeonsi: split sample locations into its own state atom
Sample locations are not updated as often as framebuffers.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
f7796a966d radeonsi: add basic code for overrasterization
This will be used for line and polygon smoothing.
This is GCN-only even though it's in shared code.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
1921fa4304 radeonsi: small cleanup in si_shader_selector_key
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
52ff1edc51 radeonsi: simplify accessing alpha pointer in si_llvm_emit_fs_epilogue
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
955ebf2890 radeonsi: add support for easy opcodes from ARB_gpu_shader5
I have to use the BFE instrinsics, because BFE is one of the most complex
instructions that can't be matched easily. BFE has 3 conditional branches
and one of them is quite big.

In the isel DAG, lowered BFE has 27 nodes (including leafs).
2015-03-16 12:54:18 +01:00
Marek Olšák
755a2907a3 radeonsi: implement bit-finding opcodes from ARB_gpu_shader5
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
ca90cde81e radeonsi: implement gl_SampleMaskIn
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
f9fd0c4a55 radeonsi: add support for SQRT
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
d73c1c1304 radeonsi: add support for FMA
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
dfea35666e gallium/radeon: don't use LLVMReadOnlyAttribute for ALU
None of the instructions use a pointer argument.
(+ small cosmetic changes)

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-16 12:54:18 +01:00
Marek Olšák
9da9c8e3f4 tgsi: handle bitwise opcodes in tgsi_opcode_infer_type (v2)
v2: set the same types as the destination type in tgsi_exec

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-16 12:54:18 +01:00
Marek Olšák
216543ea54 gallium: add FMA and DFMA opcodes (v3)
Needed by ARB_gpu_shader5.

v2: select DMAD for FMA with double precision
v3: add and select DFMA

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-16 12:54:18 +01:00
Rob Clark
e92bc6b38e freedreno: update generated headers
Fix a3xx texture layer-size.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-15 18:00:19 -04:00
Rob Clark
d3fb949c03 freedreno/ir3: remove old compiler
Now that piglit is no longer falling back to old compiler for any tests,
we can remove it.  Hurray \o/

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-15 13:27:03 -04:00
Rob Clark
feb858b788 freedreno/ir3: avoid scheduler deadlock
Deadlock can occur if we schedule an address register write, yet some
instructions which depend on that address register value also depend on
other unscheduled instructions that depend on a different address
register value.  To solve this, before scheduling an address register
write, ensure that all the other dependencies of the instructions which
consume this address register are already scheduled.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-15 13:26:56 -04:00
Rob Clark
7208e96bb8 freedreno/ir3: bit of cleanup
Add an array_insert() macro to simplify inserting into dynamically sized
arrays, add a comment, and remove unused prototype inherited from the
original freedreno.git/fdre-a3xx test code, etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-15 13:26:44 -04:00
Kenneth Graunke
db095eb43b i965: De-duplicate is_expression_commutative() functions.
Create a backend_inst::is_commutative() method to replace two static
functions that did the exact same thing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-03-15 03:14:53 -07:00
Chris Forbes
f68a973dfb i965/gen4-5: Cope with immutable-format texture revalidation
This is unfortunately sometimes necessary due to rebasing levels when
rendering into them.

16 piglits crash -> pass, when building mesa with debug enabled.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-14 15:55:17 +13:00
Emil Velikov
8ed1b65b62 docs: add news item and link release notes for mesa 10.5.1
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-13 23:36:33 +00:00
Emil Velikov
5f72847a88 docs: Add sha256 sums for the 10.5.1 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 2abba086ca)
2015-03-13 23:35:02 +00:00
Emil Velikov
6c96608937 Add release notes for the 10.5.1 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 11c0ff60ef)
2015-03-13 23:35:00 +00:00
Ilia Mirkin
620e29b748 freedreno: fix slice pitch calculations
For example if width were 65, the first slice would get 96 while the
second would get 32. However the hardware appears to expect the second
pitch to be 64, based on halving the 96 (and aligning up to 32).

This fixes texelFetch piglit tests on a3xx below a certain size. Going
higher they break again, but most likely due to unrelated reasons.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-03-13 16:05:16 -04:00
Ilia Mirkin
89b26d5a36 freedreno/a3xx: use the same layer size for all slices
We only program in one layer size per texture, so that means that all
levels must share one size. This makes the piglit test

bin/texelFetch fs sampler2DArray

have the same breakage as its non-array version instead of being
completely off, and makes

bin/ext_texture_array-gen-mipmap

start passing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-03-13 16:05:16 -04:00
Ian Romanick
e76a8dc8ed i965/vs: Add missing resolve_bool_comparison calls on GEN4 and GEN5
The ir_unop_any problem was discovered by some later optimization passes
that generate ir_triop_csel.  I was also able to reproduce it by
modifying the gl-2.0-vertexattribpointer vertex shader to generate its
result using

   color = mix(vec4(0, 1, 0, 0),
               vec4(1, 0, 0, 0),
               bvec4(any(greaterThan(diff, vec4(tolerance)))));

instead of an if-statement.  This also required using #version 130 and
MESA_GLSL_VERSION_OVERRIDE=130.

I have not nominated this for stable releases because I don't think
there's any way to trigger the problem without GLSL 1.30 or
optimizations that don't exist in stable.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Abdiel Janulgue <abdiel.janulgue@intel.com>
2015-03-13 12:57:32 -07:00
Chris Forbes
21ff9bfe1c i965/disasm: Fix format strings
Most of the brw_inst_* api returns 64bit values. This fixes disassembly
of sampler messages, etc.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-14 07:51:18 +13:00
Chris Forbes
7c3095d6b7 i965/disasm: Mark format() as being printf-style.
This allows us to get warnings from GCC when we mess up the format
strings.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-14 07:50:48 +13:00
Matt Turner
97399fc751 docs: List ARB_shading_language_packing/EXT_shader_integer_mix.
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-13 10:42:38 -07:00
Matt Turner
8d3aa5926b glsl: Expose built-in packing functions under GLSL 4.2.
ARB_shading_language_packing is part of GLSL 4.2, not 4.0 as I
mistakenly believed. The following functions are available only with
ARB_shading_language_packing, GLSL 4.2 (not GLSL 4.0), or ES 3.0:

   - packSnorm2x16
   - unpackSnorm2x16
   - packHalf2x16
   - unpackHalf2x16

Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-13 10:42:38 -07:00
Matt Turner
dac2e7deaa egl: Create queryable strings in eglInitialize().
Creating/recreating the strings in eglQueryString() is extra work and
isn't thread-safe, as exhibited by shader-db's run.c using libepoxy.

Multiple threads in run.c call eglReleaseThread() around the same time.
libepoxy calls eglQueryString() to determine whether eglReleaseThread()
exists, and our EGL implementation passes a pointer to the version
string to libepoxy while simultaneously overwriting the string, leading
to a failure in libepoxy.

Moreover, the EGL spec says (emphasis mine):

"eglQueryString returns a pointer to a *static*, zero-terminated string"

This patch moves some auxiliary functions from eglmisc.c to eglapi.c so
that they may be used to create the extension, API, and version strings
once during eglInitialize(). The auxiliary functions are renamed from
_eglUpdate* to _eglCreate*, and some checks made unnecessary by calling
the functions from eglInitialize() are removed.

Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-03-13 10:42:38 -07:00
Samuel Iglesias Gonsalvez
b43bbfa90a glsl: optimize (0 cmp x + y) into (-x cmp y).
The optimization done by commit 34ec1a24d did not take it into account.

Fixes:

dEQP-GLES3.functional.shaders.random.all_features.fragment.20

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-13 16:40:20 +01:00
Eduardo Lima Mitev
cf6f33ee68 mesa: Check for valid PBO access in gl(Compressed)Tex(Sub)Image calls
This patch adds two types of checks to the gl(Compressed)Tex(Sub)Imgage family
of functions when a pixel buffer object is bound to GL_PIXEL_UNPACK_BUFFER:

- That the buffer is not mapped.
- The total data size is within the boundaries of the buffer size.

It does so by calling auxiliary validations functions from PBO API:
_mesa_validate_pbo_source() for non-compressed texture calls, and
_mesa_validate_pbo_source_compressed() for compressed texture calls.

The first check is defined in Section 6.3.2 'Effects of Mapping Buffers
on Other GL Commands' of the GLES 3.1 spec, page 57:

    "Any GL command which attempts to read from, write to, or change the
     state of a buffer object may generate an INVALID_OPERATION error if all
     or part of the buffer object is mapped. However, only commands which
     explicitly describe this error are required to do so. If an error is not
     generated, using such commands to perform invalid reads, writes, or
     state changes will have undefined results and may result in GL
     interruption or termination."

Similar wording exists in GL 4.5 spec, page 76.

In the case of gl(Compressed)Tex(Sub)Image(2,3)D, the specification doesn't force
implemtations to throw an error. However since Mesa don't currently implement
checks to determine when it is safe to read/write from/to a mapped PBO, we
should always return the error if all or parts of it are mapped.

The 2nd check is defined in Section 8.5 'Texture Image Specification' of the
OpenGL 4.5 spec, page 203:

    "An INVALID_OPERATION error is generated if a pixel unpack buffer object
     is bound and storing texture data would access memory beyond the end of
     the pixel unpack buffer."

Fixes 4 dEQP tests:
* dEQP-GLES3.functional.negative_api.texture.compressedteximage2d_invalid_buffer_target
* dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage2d_invalid_buffer_target
* dEQP-GLES3.functional.negative_api.texture.compressedteximage3d_invalid_buffer_target
* dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d_invalid_buffer_target

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-13 16:40:20 +01:00
Eduardo Lima Mitev
7c084752c6 mesa: Separate PBO validation checks from buffer mapping, to allow reuse
Internal PBO functions such as _mesa_map_validate_pbo_source() and
_mesa_validate_pbo_compressed_teximage() perform validation and buffer mapping
within the same call.

This patch takes out the validation into separate functions to allow reuse
of functionality by other code (i.e, gl(Compressed)Tex(Sub)Image).

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-13 16:40:20 +01:00
Eduardo Lima Mitev
7b5bb97cef mesa: Set the correct image size in _mesa_validate_pbo_access()
_mesa_validate_pbo_access() provides a generic way to check that a
requested pixel transfer operation on a PBO falls within the
boundaries of the buffer. It is used in various other places, and
depending on the caller, some arguments are used or not.

In particular, the 'clientMemSize' argument is used only by calls
that are knowledgeable of the total size of the user data involved
in a pixel transfer, such as the case of compressed texture image
calls. Other calls don't provide 'clientMemSize' directly since it
is made implicit from the size and format of the texture, and its
data type. In these cases, a sufficiently big value is passed to
'clientMemSize' (INT_MAX) to avoid an incorrect constrain.

The problem is that _mesa_validate_pbo_access() use uint
pointers to make the calculations, which are 64 bits long in 64
bits platforms, meanwhile the dummy INT_MAX passed in 'clientMemSize'
is just 32 bits. This causes a constrain that is not desired.

This patch fixes that by checking that if 'clientMemSize' is MAX_INT,
then UINTPTR_MAX is assumed instead.

This is an ugly workaround to the fact that _mesa_validate_pbo_access()
intends to be a one function fits all. The clean solution here would
be to break it into different functions that provide the adequate API
for each of the possible code paths and validation needs.

Since there are callers relying on passing INT_MAX to 'clientMemSize',
this patch is necessary to deal with the problem above while a cleaner
implementation of the PBO API is not implemented.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-13 16:40:20 +01:00
Eduardo Lima Mitev
f6f7bfb5e1 meta: Remove error checks for texture <-> pixel-buffer transfers that don't belong in driver code
The implementation of texture <-> pixel-buffer transfers in drivers common layer
includes certain error checks and argument validation that don't belong there,
considering how the Mesa codebase is laid out. These are higher level
validations that, if necessary, should be performed earlier (i.e, in GL API
entry points).

This patch simply removes these error checks from driver code.

For more information, see discussion at
http://lists.freedesktop.org/archives/mesa-dev/2015-February/077417.html.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-13 16:40:20 +01:00
Brian Paul
558dcd8770 util: convert slab macros to inline functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-13 08:03:43 -06:00
Brian Paul
d24a20e967 egl: fix cast to silence compiler warning
eglcurrent.c: In function '_eglSetTSD':
eglcurrent.c:57:4: warning: passing argument 2 of 'tss_set' discards
'const' qualifier from pointer target type [enabled by default]
    tss_set(_egl_TSD, (const void *) t);
    ^
In file included from ../../../include/c11/threads.h:72:0,
                 from eglcurrent.c:32:
../../../include/c11/threads_posix.h:357:1: note: expected 'void *'
but argument is of type 'const void *'
 tss_set(tss_t key, void *val)
 ^

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-13 08:03:43 -06:00
Alexandre Demers
a38e6c4fbd gallivm: (trivial) Fix typo in comment introduced by 70dc8a
Fix typo in comment introduced by 70dc8a

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-13 13:52:52 +00:00
Seán de Búrca
1a469a34d5 mesa: improve ARB_copy_image internal format compat check
The memory layout of compatible internal formats may differ in bytes per
block, so TexFormat is not a reliable measure of compatibility. For example,
GL_RGB8 and GL_RGB8UI are compatible formats, but GL_RGB8 may be laid out in
memory as B8G8R8X8. If GL_RGB8UI has a 3 byte-per-block memory layout, the
existing compatibility check will fail.

Additionally, the current check allows any two compressed textures which share
block size to be used, whereas the spec gives an explicit table of compatible
formats.

v2: Use a switch instead of array iteration for block class and show the
    correct GL error when internal formats are mismatched.
v3: Include spec citations for new compatibility checks, rearrange check
    order to ensure that compressed, view-compatible formats return the
    correct result, and make style fixes. Original commit message amended
    for clarity.
v4: Reformatted spec citations.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 16:40:03 -07:00
Kenneth Graunke
f3e4b2c9d2 nir: Fix non-determinism in nir_lower_vars_to_ssa().
Previously, we stored derefs in a hash table, using the malloc'd pointer
as the key.  Then, we walked through the hash table and generated code,
based on the order of the hash table's elements.

Memory addresses returned by malloc are pretty much random, which meant
that the hash was random, and the hash table's elements would be walked
in some random order.  This led to successive compiles of the same
shader using different variable names and slightly different orderings
of phi-nodes.  Code could not be diff'd, and the final assembly would
sometimes change slightly too.

It turns out the only point of the hash table was to avoid inserting
the same node multiple times for different dereferences.  We never
actually searched the hash table!  This patch uses an intrusive
linked list instead.  Since exec_list uses head and tail sentinels,
checking prev or next against NULL will tell us whether the node is
already in the list.

Pair programming with Jason Ekstrand.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-12 13:25:39 -07:00
Jason Ekstrand
67388c1ef2 util: Fix foreach_list_typed_safe when exec_node is not at offset 0.
__next and __prev are pointers to the structure containing the exec_node
link, not the embedded exec_node.  NULL checks would fail unless the
embedded exec_node happened to be at offset 0 in the parent struct.

v2: Jason Ekstrand <jason.ekstrand@intel.com>:
   Use "(__node)->__field.next != NULL" to check for the end of the list
   instead of the "&__next->__field != NULL".  The former is far more
   obviously correct as it matches what the non-safe versions do.  The
   original code tried to avoid any use of __next as the client code may
   delete it during its execution.  However, since the looping condition is
   checked after the iteration clause but before the client code is
   executed, we know that __node is valid during the looping condition.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-12 13:25:39 -07:00
Kenneth Graunke
547c760964 i965: Use NIR for scalar VS when INTEL_USE_NIR is set.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:49 -07:00
Kenneth Graunke
7ef0b6b367 i965/fs: Add VS output support to nir_setup_outputs().
Adapted from fs_visitor::visit(ir_variable *).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:49 -07:00
Kenneth Graunke
eb137117b7 i965/fs: Handle VS inputs in the NIR backend.
(Jason noted that this is not a good long term solution, and we should
instead improve nir_lower_io so that this extra set of MOVs is
unnecessary.  I tend to agree, but decided we could do that as a
follow-up improvement.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Kenneth Graunke
a5c4e7fcf5 i965/fs: Refactor fs_visitor::nir_setup_inputs().
No functional change.  In preparation for supporting vertex shaders,
this adds a switch statement on shader stage (since vertex attributes
and fragment shader varyings will need different handling).  It also
renames "varying" to "input", to be more general.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Kenneth Graunke
34628a838a i965: Implement NIR intrinsics for loading VS system values.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Kenneth Graunke
2c79f6f9c3 nir: Add intrinsics for SYSTEM_VALUE_BASE_VERTEX and VERTEX_ID_ZERO_BASE
Ian and I added these around the time Connor was developing NIR.  Now
that both exist, we should make them work together!

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Kenneth Graunke
b9dea9bc45 i965/nir: Lower to registers a bit later.
We can't safely call nir_optimize() with register present, since several
passes called in the loop can't handle registers, and will fail asserts.

Notably, nir_lower_vec_alus() and nir_opt_algebraic() really don't want
registers.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Kenneth Graunke
1f0067811c i965/nir: Optimize after nir_lower_var_copies().
Array variable copy splitting generates a bunch of stuff we want to
clean up before proceeding.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Kenneth Graunke
1d8ef6ba60 i965/fs: Store a pointer to brw_sampler_prog_key_data in the visitor.
The NIR backend hardcodes brw_wm_prog_key at the moment, which won't
work when we support scalar VS.  We could use get_tex(), but it's a
static method.  I was going to promote it to fs_visitor, but then
realized that both parameters (stage and key) are already members.

It then occured to me that we could just set up a pointer in the
constructor, and skip having a function altogether.

This patch also converts all existing users to use key_tex.

v2: Make key_tex a "const brw_sampler_prog_key_data *" instead of
    non-const; word-wrap some lines.  (Review comments from Topi.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-12 08:29:48 -07:00
Brian Paul
48b0a3c1c9 tnl: HAVE_LE32_VERTS is never defined, remove associated code
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul
6d3b86c3af mesa: move LONGSTRING into generated enums.c
enums.c is the only place this directive is needed.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul
f8ed0bbfef mesa: remove _ASMAPI, ASMAPIP
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-12 07:52:45 -06:00
Brian Paul
09ffa04cd9 mesa: remove _XFORMAPI
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-12 07:52:45 -06:00
Brian Paul
10035361b5 swrast: remove _BLENDAPI
_BLENDAPI boils down to __cdecl on Windows, but __cdecl is the default
calling convention so this serves no purpose.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-12 07:52:45 -06:00
Brian Paul
6ca5eaf49c mesa: use ARRAY_SIZE in _mesa_QueryMatrixxOES()
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul
c3984c1155 mesa: remove register keyword, add const in _mesa_QueryMatrixxOES()
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul
97f6d50f72 mesa: reindent querymatrix.c
Use 3-space indents, not 4.  Move some comments after the case statements.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul
be4e198be0 mesa: move fpclassify work-arounds into c99_math.h
v2: Use #error in the #else clause, per Jose.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-12 07:52:35 -06:00
Jose Fonseca
70dc8a9930 gallivm: Prevent double delete on LLVM 3.6
std::unique_ptr takes ownership of MM, and a double delete could ensure
in case of an error,  as pointed out by Chris Vine in
https://bugs.freedesktop.org/show_bug.cgi?id=89387

Reviewed-by: Chris Vine <chris@cvine.freeserve.co.uk>
2015-03-12 10:01:09 +00:00
Emil Velikov
30916a5ef0 autogen.sh: pass --force to autoreconf, quote ORIGDIR
By passing --force autoreconf will update all the aux files, which would
otherwise be ignored if one updates autoconf/automake.

Quote the ORIGDIR variable to prevent fall-outs, when its name contains
space.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-11 23:28:26 +00:00
Emil Velikov
a385d18598 glx: remove support for non-multithreaded platforms
Implicitly required for a while, although commit 9385c592c6 (mapi:
remove u_thread.h) was the one that put the final nail on the
coffin.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:26 +00:00
Emil Velikov
42144170d1 glx: remove final reference to THREADS
Left over from commit 18db13f5865(mapi: THREADS was always defined,
remove it)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:26 +00:00
Emil Velikov
39f90e6b9b configure: require pthreads for POSIX builds
This has been an implicit rule for building mesa for a long time. Let's
make it official and just bail out at configure time. This way we can
cleaning up some of our glx code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:25 +00:00
Emil Velikov
a806df3f23 egl/main: convert thread management to use c11 threads
Convert the code to use the C11 threads implementation, and nuke the
Windows non-pthreads code-path. The c11/threads_win32.h abstraction
should be better than the current code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:25 +00:00
Emil Velikov
efe87f1a80 egl/main: use c11/threads' mutex directly
Remove the inline wrappers/abstraction layer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:25 +00:00
Jason Ekstrand
90e50908d7 nir/worklist: Don't change the start index when computing the tail index
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-11 15:18:16 -07:00
Thomas Helland
8fb8fe46fa nir: Optimize a + neg(a)
Shader-db i965 instructions:
total instructions in shared programs: 1711180 -> 1711159 (-0.00%)
instructions in affected programs:     825 -> 804 (-2.55%)
helped:                                9
HURT:                                  0
GAINED:                                3
LOST:                                  3

Shader-db NIR instructions:
total instructions in shared programs: 606187 -> 606179 (-0.00%)
instructions in affected programs:     298 -> 290 (-2.68%)
helped:                                4
HURT:                                  0
GAINED:                                0
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
2015-03-11 14:21:05 -07:00
Thomas Helland
0525f2e851 nir: Optimize (a*b)+(a*c) -> a*(b+c)
Shader-db i965 instructions:
total instructions in shared programs: 1715894 -> 1710802 (-0.30%)
instructions in affected programs:     443080 -> 437988 (-1.15%)
helped:                                1502
HURT:                                  13
GAINED:                                4
LOST:                                  4

Shader-db NIR instructions:
total instructions in shared programs: 607710 -> 606187 (-0.25%)
instructions in affected programs:     208285 -> 206762 (-0.73%)
helped:                                769
HURT:                                  8
GAINED:                                0
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
2015-03-11 14:21:05 -07:00
Marius Predut
09b0325409 vbo: improve the code style by adjust the preprocessing c code directives
Brian Paul review suggestion: there's more macro use here than necessary.
Removed and redefine some #define preprocessing directives.
Removed the directive input parameter 'T' .
No functional changes.

Signed-off-by: Marius Predut <marius.predut@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 09:34:25 -06:00
Brian Paul
9816acff2c mesa: remove CPU_TO_LE32() for AIX
This is the only remnant of AIX-specific code in Mesa.  Probably long
unused.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:25 -06:00
Brian Paul
3158b3abb3 mesa: remove #define __volatile
Not actually used anwhere in Mesa.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul
d7193ce42c mesa: use strdup() instead of _mesa_strdup()
We were already using strdup() in various places in Mesa.  Get rid
of the _mesa_strdup() wrapper.  All the callers pass a non-NULL
argument so the NULL check isn't needed either.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul
5376bc74cc st/glx: use strdup() instead of _mesa_strdup()
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul
279c5965aa xlib: use strdup() instead of _mesa_strdup()
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul
14ba6c9325 i915: add parens to silence operator precedence warning
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-03-11 09:34:07 -06:00
Iago Toral Quiroga
6ac1bc90c4 i965: Fix out-of-bounds accesses into pull_constant_loc array
The piglit test glsl-fs-uniform-array-loop-unroll.shader_test was designed
to do an out of bounds access into an uniform array to make sure that we
handle that situation gracefully inside the driver, however, as Ken describes
in bug 79202, Valgrind reports that this is leading to an out-of-bounds access
in fs_visitor::demote_pull_constants().

Before accessing the pull_constant_loc array we should make sure that
the uniform we are trying to access is valid.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79202
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-11 08:03:40 +01:00
Jordan Justen
5750595ca9 i965/gen6 gs: Convert brw_imm_ud/brw_imm_d to src_reg
Same idea as this patch, only for gen6_gs_visitor:

commit 49a938a265
Author: Jordan Justen <jordan.l.justen@intel.com>
Date:   Fri Feb 20 12:12:25 2015 -0800
    i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data

Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-10 00:14:53 -07:00
Jordan Justen
e5269ca28e i965/fs: Use unsigned for CS/VS atomics pixel mask immediate data
brw_imm_ud(0xffff) should have been converted to fs_reg(0xffffu) to
make sure the uint32_t fs_reg constructor was matched.

commit 49a938a265
Author: Jordan Justen <jordan.l.justen@intel.com>
Date:   Fri Feb 20 12:12:25 2015 -0800
    i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-10 00:13:08 -07:00
Jordan Justen
6626e3548b i965/gen8: Don't allocate hiz miptree structure
We now skip allocating a hiz miptree for gen8. Instead, we calculate
the required hiz buffer parameters and allocate a bo directly.

v2:
 * Update hz_height calculation as suggested by Topi
v3:
 * Bail if we failed to create the bo (Ben)
v4:
 * CEILING => DIV_ROUND_UP
 * Make sure mt->logical_depth0 being 0 would not cause trouble
 * Fail if Y tiling is not returned

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen
81124aefe8 i965/gen7: Don't allocate hiz miptree structure
We now skip allocating a hiz miptree for gen7. Instead, we calculate
the required hiz buffer parameters and allocate a bo directly.

v2:
 * Update hz_height calculation as suggested by Topi
v3:
 * Bail if we failed to create the bo (Ben)
v4:
 * CEILING => DIV_ROUND_UP
 * Make sure mt->logical_depth0 being 0 would not cause trouble
 * Fail if Y tiling is not returned

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen
31b851dccb i965/gen8: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from
intel_miptree_aux_buffer. This will allow us to switch over to not
allocating a miptree.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen
26eabd189d i965/gen7: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from
intel_miptree_aux_buffer. This will allow us to switch over to not
allocating a miptree.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen
aedcd466bb i965/hiz: Start to separate miptree out from hiz buffers
Today we allocate a miptree's for the hiz buffer. We needed this in
the past because we would point the hardware at offsets of the hiz
buffer. Since the hiz format is not documented, this is not a good
idea.

Since moving to support layered rendering on Gen7+, we no longer point
at an offset into the buffer on Gen7+.

Therefore, to support hiz on Gen7+, we don't need a full miptree
structure allocated.

This patch starts to create a new auxiliary buffer structure
(intel_miptree_aux_buffer) that can be a more simplistic miptree
side-band buffer associated with a miptree. (For example, to serve the
needs of the hiz buffer.)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:50 -07:00
Dave Airlie
4d318b61fc mesa/scissor: fix typos in debug names
Just noticed this when working on virgl.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-10 16:45:45 +10:00
Samuel Pitoiset
e5cd42ed9a nvc0: fix wrong max value for driver queries
The maximum value of a Gallium HUD's panel is automatically adjusted
when the current value is greater than the max. If we set the
pipe_query_driver_info::max_value to UINT64_MAX, the maximum value is
never adjusted and this results in a flat line instead of a pretty curve
which is correctly scaled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-09 20:47:05 -04:00
Vinson Lee
13f4963ed2 i965: Silence GCC maybe-uninitialized warning.
brw_shader.cpp: In function ‘bool brw_saturate_immediate(brw_reg_type, brw_reg*)’:
brw_shader.cpp:618:31: warning: ‘sat_imm.brw_saturate_immediate(brw_reg_type, brw_reg*)::<anonymous union>::ud’ may be used uninitialized in this function [-Wmaybe-uninitialized]
       reg->dw1.ud = sat_imm.ud;
                               ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 17:28:39 -07:00
Vinson Lee
282f67becd i915: Fix GCC unused-but-set-variable warning in release build.
i915_fragprog.c: In function ‘i915ValidateFragmentProgram’:
i915_fragprog.c:1453:11: warning: variable ‘k’ set but not used [-Wunused-but-set-variable]
       int k;
           ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 17:28:39 -07:00
Vinson Lee
5f759836ad Add macro for unused function attribute.
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-09 17:28:39 -07:00
Ben Widawsky
7aba4ab1f3 meta: Plug memory leak
It looks like this has existed since
commit f5a477ab76
Author: Ian Romanick <ian.d.romanick@intel.com>
Date:   Mon Dec 16 11:54:08 2013 -0800

    meta: Refactor shader generation code out of mipmap generation path

Valgrind was complaining on fbo-generatemipmap-formats

v2: Instead, do the allocation after the early return block (v2)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-09 16:32:33 -07:00
Kenneth Graunke
e95969cd95 i965/fs: Don't issue FB writes for bound but unwritten color targets.
We used to loop over all color attachments, and emit FB writes for each
one, even if the shader didn't write to a corresponding output variable.
Those color attachments would be filled with garbage (undefined values).

Football Manager binds a framebuffer with 4 color attachments, but draws
to it using a shader that only writes to gl_FragData[0..2].  This meant
that color attachment 3 would be filled with garbage, resulting in
rendering artifacts.  Now we skip writing to it, fixing rendering.

Writes to gl_FragColor initialize outputs[0..nr_color_regions-1] to
GRFs, while writes to gl_FragData[i] initialize outputs[i].

Thanks to Jason Ekstrand for tracking this down.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86747
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke
4ebeb71573 i965/fs: Make emit_shader_time_end() insert before EOT.
Previously, we emitted the shader-time epilogue from emit_fb_writes(),
during the middle of looping through color regions (or emit_urb_writes
for the VS).  This is duplicated several times and rather awkward.

I need to fix a bug in our FB write handling, and it will be a lot
easier if we move emit_shader_time_end() out of there.

Now, we simply emit FB writes/URB writes, and subsequently have
emit_shader_time_end() insert instructions before the final SEND with
EOT.  Not only is this simpler, it's actually a slight improvement:
we now include the MOVs to set up the final FB write payload in our
shader-time measurements.

Note that INTEL_DEBUG=shader_time only exists on Gen7+, and uses
send-from-GRF.  (In the past, we might have hit trouble where both
attempt to use MRFs for messages; that's not a problem now.)

v2: Rebase on v3 of the previous patch and other shader_time fixes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> [v1]
Acked-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke
e43af8d09f i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.
This makes another part of the INTEL_DEBUG=shader_time code emittable
at arbitrary locations, rather than just at the end of the instruction
stream.

v2: Don't lose smear!  Caught by Topi Pohjolainen.
v3: Don't set smear on the destination of the MOV.  Thanks Topi!

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke
bea854c7f3 i965/fs: Make emit_shader_time_write return rather than emit.
Instead of emit_shader_time_write, we now do emit(SHADER_TIME_ADD(...)).
The advantage is that we can also insert a shader time write at an
arbitrary location in the instruction stream, rather than being
restricted to emitting at the end.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke
f1adc45dbe i965/fs: Set smear on shader_time diff register.
The ADD(diff, diff, fs_reg(-2u)) instruction reads diff, which is a
width 1 register.  We need to read it as <0,1,0> with a subreg of 0,
which is what smear accomplishes.

Fixes assertion:
brw_eu_emit.c:285: validate_reg: Assertion `hstride == 0' failed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:03 -07:00
Kenneth Graunke
ef9cc7d0c1 i965/fs: Set force_writemask_all on shader_time instructions.
These computations don't have anything to do with the currently
executing channels, so they should use force_writemask_all.

This fixes assert failures.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:03 -07:00
Alexandre Demers
7a37d5c3a4 r600g: Use R600_MAX_VIEWPORTS instead of 16
Lets define R600_MAX_VIEWPORTS instead of using 16 here and there
in the code when looping through viewports and scissors. It is
easier to understand what this number represents.

v2: Missed a case where R600_MAX_VIEWPORTS should have been used.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-03-09 23:02:05 +01:00
Ian Romanick
85df48b45a i915: Remove unused IS_GEN2 macro
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:09:21 -07:00
Ian Romanick
07a062997a i915: Remove (mostly) unused IS_915 macro
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:09:16 -07:00
Ian Romanick
117288dbf3 i915: Remove (mostly) unused IS_PNV, IS_PNVG, and IS_PNVGM macros
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:09:06 -07:00
Ian Romanick
19fda9fc83 i915: Remove IS_9XX macro
Since the i915 / i965 split, IS_9XX just means IS_GEN3.  Inspired by
Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:08:57 -07:00
Ian Romanick
6d41316b79 i915: Remove unused IS_MOBILE macro
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:08:49 -07:00
Ian Romanick
e7d94be1ec i965: Don't write past the end of the application supplied buffer
Both the AMD and Intel APIs provide a dataSize parameter, and this
function would merrily ignore it.  Neither API specifies what to do when
the buffer isn't big enough.  I take the easy route of writing all the
complete bits of data that will fit.  With more complete specs, we could
probably do something different.

I noticed this while looking into an unused parameter warning.  The
warning was actually useful!

brw_performance_monitor.c: In function 'brw_get_perf_monitor_result':
brw_performance_monitor.c:1261:37: warning: unused parameter 'data_size' [-Wunused-parameter]
                             GLsizei data_size,
                                     ^

v2: Fix checks to include offset in the calculation.  Noticed by Jan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2015-03-09 14:07:14 -07:00
Ian Romanick
78a211cee5 i965: Silence unused parameter warning
All dd functions take a gl_context as the first parameter.  Instead of
removing it, just silence the warning.

brw_performance_monitor.c: In function 'brw_new_perf_monitor':
brw_performance_monitor.c:1354:41: warning: unused parameter 'ctx' [-Wunused-parameter]
 brw_new_perf_monitor(struct gl_context *ctx)
                                         ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:07:14 -07:00
Ian Romanick
3a6a732c43 i965: Silence many 'static' is not at beginning of declaration warnings
What a useful warning. #ThanksGCC

brw_performance_monitor.c:153:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_counter gen5_raw_chaps_counters[] = {
 ^
brw_performance_monitor.c:185:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static int gen5_oa_snapshot_layout[] =
 ^
brw_performance_monitor.c:221:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_group gen5_groups[] = {
 ^
brw_performance_monitor.c:240:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_counter gen6_raw_oa_counters[] = {
 ^
brw_performance_monitor.c:281:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static int gen6_oa_snapshot_layout[] =
 ^
brw_performance_monitor.c:317:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_counter gen6_statistics_counters[] = {
 ^
brw_performance_monitor.c:332:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static int gen6_statistics_register_addresses[] = {
 ^
brw_performance_monitor.c:346:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_group gen6_groups[] = {
 ^
brw_performance_monitor.c:356:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_counter gen7_raw_oa_counters[] = {
 ^
brw_performance_monitor.c:402:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static int gen7_oa_snapshot_layout[] =
 ^
brw_performance_monitor.c:470:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_counter gen7_statistics_counters[] = {
 ^
brw_performance_monitor.c:493:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static int gen7_statistics_register_addresses[] = {
 ^
brw_performance_monitor.c:515:1: warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
 const static struct gl_perf_monitor_group gen7_groups[] = {
 ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:07:14 -07:00
Ian Romanick
c82c8b2201 i965/fs: Silence unused parameter warning
I don't this opt_cmod_propagation_local ever used the fs_visitor.

brw_fs_cmod_propagation.cpp:52:40: warning: unused parameter 'v' [-Wunused-parameter]
 opt_cmod_propagation_local(fs_visitor *v, bblock_t *block)
                                        ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:07:14 -07:00
Ian Romanick
f9779e4a8f i965/fs: Silence unused parameter warning
Unused since b18fd23.

brw_fs.cpp:2878:44: warning: unused parameter 'dispatch_width' [-Wunused-parameter]
 clear_deps_for_inst_src(fs_inst *inst, int dispatch_width, bool *deps,
                                            ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:07:13 -07:00
Ian Romanick
e4f26acc08 i965/fs: Silence unused parameter warning
brw_fs_visitor.cpp:2162:56: warning: unused parameter 'offset_components' [-Wunused-parameter]
                          fs_reg offset_value, unsigned offset_components,
                                                        ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:07:13 -07:00
Laura Ekstrand
1e552db522 main: Add entry point for TextureBufferRange.
v2: Review by Martin Peres
   - Get rid of difficult-to-follow code copied and pasted from
     the original TexBufferRange

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:54 -07:00
Laura Ekstrand
311b3686fe main: Add check_texture_buffer_target.
Creates a shared function to ensure that texture buffer target is
GL_TEXTURE_BUFFER. Helps to clean up the Tex[ture]Buffer[Range] functions.

v2: Review from Anuj Phogat
   - Split rebase of Tex[ture]Buffer[Range]

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:54 -07:00
Laura Ekstrand
5f8c6eabbe main: Add check_texture_buffer_range.
Creates a shared function that TexBufferRange and TextureBufferRange can use
to check the buffer range. This cleans up TexBufferRange considerably.

v2: Review from Anuj Phogat
   - Split rebase of Tex[ture]Buffer[Range]

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:54 -07:00
Laura Ekstrand
0f6372946b main: Cosmetic changes for Texture Buffers.
Adds a useful comment and some whitespace. Fixes an error message.

v2: Review from Anuj Phogat
   - Split rebase of Tex[ture]Buffer[Range]

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:54 -07:00
Laura Ekstrand
6b78a1fb89 main: Refactor _mesa_texture_buffer_range.
Changes how the caller is identified in error messages, moves a check for
ARB_texture_buffer_object from the entry points to the shared code in
_mesa_texture_buffer_range, and removes an unused argument (GLenum target).

v2: Review from Anuj Phogat
   - Split rebase of Tex[ture]Buffer[Range]

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:54 -07:00
Laura Ekstrand
d03337306a main: Use _mesa_lookup_bufferobj_err to simplify Tex[ture]Buffer[Range].
v2: Review from Anuj Phogat
   - Split rebase of Tex[ture]Buffer[Range]
   - Closing curly brace on the same line as else

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:54 -07:00
Laura Ekstrand
768ca8b83e main: Add utility function _mesa_lookup_bufferobj_err.
This function is exposed to mesa driver internals so that texture buffer
objects and array objects can use it.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Laura Ekstrand
ff011340a4 main: Checking for cube completeness in GetCompressedTextureImage.
v2: Review from Anuj Phogat
   - Remove redundant copies of the cube map block comment
   - Replace redundant "if (!texImage) return;" statements with
     assert(texImage)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Laura Ekstrand
4080c330fa main: Add TEXTURE_CUBE_MAP support for glCompressedTextureSubImage3D.
v2: Review from Anuj Phogat
   - Remove redundant copies of the cube map block comment
   - Replace redundant "if (!texImage) return;" statements with
     assert(texImage)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Laura Ekstrand
70eab80f80 main: assert(texImage) in ARB_DSA texture cube map functions.
ARB_direct_state_access functions that deal with texture cube
maps need to make sure that texture images are not NULL before operating on
them. In the following cases, the error check functions already throw an
error if texImage == NULL, so an assert can be raised instead.

v2: Review from Anuj Phogat
   - Replace redundant "if (!texImage) return;" statements with
     assert(texImage)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Laura Ekstrand
c3e92faeb4 main: Remove redundant copy of cube map block comment in GetTextureImage.
The comment describing why ARB_direct_state_access texture cube map functions
use _mesa_cube_level_complete is very long.  To save room in the files,
readers are now referred to one central comment on texturesubimage in
teximage.c.

v2: Review from Anuj Phogat
   - Remove redundant copies of the cube map block comment

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Laura Ekstrand
8979368f12 main: Remove redundant NumLayers checks.
ARB_direct_state_access texture functions that operate on cube maps no longer
need to verify that cube map texture objects contain six texture images
because _mesa_cube_level_complete now does that for them.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Laura Ekstrand
1ee000a0b6 main: _mesa_cube_level_complete checks NumLayers.
_mesa_cube_level_complete now verifies that a cube map texture object actually
has six texture images before proceeding.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 13:33:53 -07:00
Marek Olšák
c939231e72 r300g: fix sRGB->sRGB blits
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-09 21:22:22 +01:00
Marek Olšák
9953586af2 r300g: fix a crash when resolving into an sRGB texture
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-09 21:03:49 +01:00
Marek Olšák
113601086d r300g: use memset for clearing the shader key 2015-03-09 20:58:32 +01:00
Marek Olšák
4815c187b7 r300g: remove the broken SNORM->UNORM shader lowering pass
Not used anymore.
2015-03-09 20:58:32 +01:00
Marek Olšák
74a757f92f r300g: fix RGTC1 and LATC1 SNORM formats
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-09 20:58:32 +01:00
Stefan Dösinger
f710b99071 r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)
This fixes the GL_COMPRESSED_RED_RGTC1 part of piglit's rgtc-teximage-01
test as well as the precision part of Wine's 3dc format test (fd.o bug
89156).

The Z component seems to contain a lower precision version of the
result, probably a temporary value from the decompression computation.
The Y and W component contain different data that depends on the input
values as well, but I could not make sense of them (Not that I tried
very hard).

GL_COMPRESSED_SIGNED_RED_RGTC1 still seems to have precision problems in
piglit, and both formats are affected by a compiler bug if they're
sampled by the shader with a swizzle other than .xyzw. Wine uses .xxxx,
which returns random garbage.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89156
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-09 20:58:32 +01:00
Tom Stellard
51b43c559f radeonsi: Add additional information to shader dumps
This adds SGPR count, VGPR count, shader size, LDS size, and scratch
usage to shader dumps.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-09 13:53:33 +00:00
Tom Stellard
bbfa1c3239 radeonsi/compute: Use value from compiler for COMPUTE_PGM_RSRC1.FLOAT_MODE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-09 13:53:33 +00:00
Tom Stellard
a646b00cfc clover: Return the minimum required value for CL_DEVICE_SINGLE_FP_CONFIG v2
This means dropping CL_FP_DENORM from the current return value.

v2:
  - Add comments about minimum values for OpenCL 1.2.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2015-03-09 13:53:33 +00:00
Ilia Mirkin
cb3eb43ad6 freedreno/ir3: get the # of miplevels from getinfo
This fixes ARB_texture_query_levels to actually return the desired
value.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-09 10:50:39 -04:00
Ilia Mirkin
8ac957a51c freedreno/ir3: fix array count returned by TXQ
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-09 10:50:39 -04:00
Ilia Mirkin
f3dfe6513c freedreno: move fb state copy after checking for size change
Fixes: 1f3ca56b ("freedreno: use util_copy_framebuffer_state()")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-09 10:50:39 -04:00
Kenneth Graunke
b9c2fa15e3 nir: Make the printer include nir_variable::location too.
Being able to see both location and driver_location can be useful when
debugging IO mistakes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-09 01:34:03 -07:00
Iago Toral Quiroga
a72fb69604 i965/fs: Implement SIMD16 dual source blending.
From the SNB PRM, volume 4, part 1, page 193:

"The dual source render target messages only have SIMD8 forms due to
 maximum message length limitations. SIMD16 pixel shaders must send two of
 these messages to cover all of the pixels. Each message contains two colors
 (4 channels each) for each pixel in the message payload."

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82831
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-09 08:15:13 +01:00
Kenneth Graunke
8dcc1f2c10 nir: Only do gl_FrontFacing workaround in glsl_to_nir for the FS.
Vertex shaders can have shader inputs where location happens to be
VARYING_SLOT_FACE.  Without predicating this on the shader stage,
we suddenly end up with load_front_face intrinsics in vertex shaders,
which is nonsensical.

Fixes spec/arb_vertex_buffer_object/pos-array when using NIR for VS.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:04:02 -07:00
Kenneth Graunke
c6f2abe67e nir: Plumb the shader stage into glsl_to_nir().
The next commit needs to know the shader stage in glsl_to_nir().
To facilitate that, we pass the gl_shader rather than the raw exec_list
of instructions.  This has both the exec_list and the stage.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:04:01 -07:00
Kenneth Graunke
b200cbb0a4 nir: Add native_integers to nir_shader_compiler_options.
glsl_to_nir, tgsi_to_nir, and prog_to_nir all want to know whether the
driver supports native integers.  Presumably other passes may as well.

Adding this to nir_shader_compiler_options is an easy way to provide
that information, as it's accessible via nir_shader::options.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:03:57 -07:00
Kenneth Graunke
a55da73be4 nir: Try to make sense of the nir_shader_compiler_options code.
The code in glsl_to_nir is entirely dead, as we translate from GLSL to
NIR at link time, when there isn't a _mesa_glsl_parse_state to pass,
so every caller passes NULL.

glsl_to_nir seems like the wrong place to try and create the shader
compiler options structure anyway - tgsi_to_nir, prog_to_nir, and other
translators all would have to duplicate that code.  The driver should
set this up once with whatever settings it wants, and pass it in.

Eric also added a NirOptions field to ctx->Const.ShaderCompilerOptions[]
and left a comment saying: "The memory for the options is expected to be
kept in a single static copy by the driver."  This suggests the plan was
to do exactly that.  That pointer was not marked const, however, and the
dead code used a mix of static structures and ralloced ones.

This patch deletes the dead code in glsl_to_nir, instead making it take
the shader compiler options as a mandatory argument.  It creates an
(empty) options struct in the i965 driver, and makes NirOptions point
to that.  It marks the pointer const so that we can actually do so
without generating "discards const qualifier" compiler warnings.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-08 20:03:46 -07:00
Kenneth Graunke
2561aea6b3 nir: Delete nir_shader::user_structures and num_user_structures.
Nothing actually uses these, and the only caller of glsl_to_nir()
(brw_fs_nir.cpp) always passes NULL for the _mesa_glsl_parse_state
pointer, meaning they'll always be NULL and 0, respectively.

Just delete them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-08 20:03:44 -07:00
Kenneth Graunke
9f1e250e77 glsl: Mark array access when copying to a temporary for the ?: operator.
Piglit's spec/glsl-1.20/compiler/structure-and-array-operations/
array-selection.vert test contains the following code:

   gl_Position = (pick_from_a_or_b ? a : b)[i];

where "a" and "b" are uniform vec4[2] variables.

ast_to_hir creates a temporary vec4[2] variable, conditional_tmp, and
generates an if-block to copy one or the other:

   (declare (temporary) (array vec4 2) conditional_tmp)
   (if (var_ref pick_from_a_or_b)
     ((assign () (var_ref conditional_tmp) (var_ref a)))
     ((assign () (var_ref conditional_tmp) (var_ref b))))

However, we failed to update max_array_access for "a" and "b", so it
remained 0 - here, the whole array is being accessed.  At link time,
update_array_sizes() used this bogus information to change the types
of "a" and "b" to vec4[1].  We then had assignments from a vec4[1] to
a vec4[2], which is highly illegal.

This tripped assertions in nir_split_var_copies with scalar VS.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-08 20:03:36 -07:00
Kenneth Graunke
a84f66a9b6 i965/nir: Resolve source modifiers on Gen8+ logic operations.
On Gen8+, AND/OR/XOR/NOT don't support the abs() source modifier, and
negate changes meaning to bitwise-not (~, not -).  This isn't what NIR
expects, so we should resolve the source modifers via a MOV.

+30 Piglits (fs-op-bit{and,or,xor}-not-abs-*).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-03-08 20:03:35 -07:00
Dave Airlie
7c25a4a84d st/mesa: drop unused texture function
This has no users.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-09 10:43:27 +10:00
Dave Airlie
c5e69409d7 mesa/st: remove unused TexData
this isn't hooked up to anything at all from what I can see.

Seems like a left over from commit 5d67d4fbebb(st/mesa: remove
st_TexImage(), use core Mesa code instead).

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-09 09:48:49 +10:00
Rob Clark
fd17db6fe5 freedreno: replace glsl130 debug flag with glsl120
Now that relative-dst works, we should never fall back to the old
compiler.  (Which is almost true, other than a couple edge case sched
fails in piglit).

So replace glsl130 flag to force GLSL 130 and integers on a3xx/a4xx with
a glsl120 flag to force GLSL 120 and !integers.

If this commit breaks any game/app/etc use FD_MESA_DEBUG=glsl120 as a
workaround and please let me know.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
0e8d58b80a gallium/docs: add some freedreno compiler docs
Enable the 'sphinx.ext.graphviz' extension, and add in a section for
driver specific docs, with freedreno compiler docs beneath.  The
goal is for more complete compiler docs, and hopefully some docs about
other parts of the driver (such as how tiling works, etc).

Note that there is also a Distribution -> Drivers section.  Although
that appears to be simply just a list of drivers.  Not sure if that
should move under the 'Drivers' section or left alone.  I did add a
one-line section for freedreno in the existing Distribution -> Drivers
section.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
060d349920 freedreno/ir3: relative dst
To simplify RA, assign arrays that are written to first.  Since enough
dependency information is in the graph to preserve order of reads and
writes of array, so all SSA names for the array collapse into one, just
assign the entire thing by array-id.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
b7703212d8 freedreno/ir3: split out array_fanin() helper
We'll need this too for relative dst..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
17754b70d7 freedreno/ir3: drop deref nodes
The meta-deref instruction doesn't really do what we need for relative
destination.  Instead, since each instruction can reference at most a
single address value, track the dependency on the address register via
instr->address.  This lets us express the dependency regardless of
whether it is used for dst and/or src.

The foreach_ssa_src{_n} iterator macros now also iterates the address
register so, at least in SSA form, the address register behaves as an
additional virtual src to the instruction.  Which is pretty much what
we want, as far as scheduling/etc.

TODO:
For now, the foreach_src{_n} iterators are unchanged.  We could wrap
the address in an ir3_register and make the foreach_src_{_n} iterators
behave the same way.  But that seems unnecessary at this point, since
we mainly care about the address dependency when in SSA form.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
f8f7548f46 freedreno/ir3: helpful iterator macros
I remembered that we are using c99.. which makes some sugary iterator
macros easier.  So introduce iterator macros to iterate all src
registers and all SSA src instructions.  The _n variants also return
the src #, since there are a handful of places that need this.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
26b79ac3e4 freedreno/ir3: fix register usage calculations
For cat1 instructions, use reg() as well for relative src, to ensure
proper accounting of register usage.  Also, for relative instructions,
use reg->size rather than reg->wrmask to determine the number of
components read/written.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
3ecc834e75 freedreno/ir3: couple tweaks for cmdline compiler
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
0f797f7b7d freedreno/ir3: split up ssa_dst
And a couple other trivial renames, to prepare for relative dst.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Rob Clark
27648efa20 freedreno/ir3: fix failed assert in grouping
Turns out there are scenarios where we need to insert mov's in "front"
of an input.  Triggered by shaders like:

  VERT
  DCL IN[0]
  DCL IN[1]
  DCL OUT[0], POSITION
  DCL OUT[1], GENERIC[9]
  DCL SAMP[0]
  DCL TEMP[0], LOCAL
    0: MOV TEMP[0].xy, IN[1].xyyy
    1: MOV TEMP[0].w, IN[1].wwww
    2: TXF TEMP[0], TEMP[0], SAMP[0], 1D_ARRAY
    3: MOV OUT[1], TEMP[0]
    4: MOV OUT[0], IN[0]
    5: END

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-08 17:42:43 -04:00
Jon TURNEY
72d4f6c67f c99_alloca.h: Also use <alloca.h> for cygwin
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-07 18:18:32 +00:00
Vinson Lee
1ca39ec03c i915: Fix GCC unused-variable warning in release build.
i915_debug_fp.c: In function ‘i915_disassemble_program’:
i915_debug_fp.c:302:11: warning: unused variable ‘size’ [-Wunused-variable]
    GLuint size = program[0] & 0x1ff;
           ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-03-06 21:41:46 -08:00
Mark Janes
b28c037d64 r300g: Fix build, invalid extern "C" around header inclusion.
A previous patch to fix header inclusion within extern "C" neglected
to fix the occurences of this pattern in r300 files.

When the helper to detect this issue was pushed to master, it broke
the build for the r300 driver.  This patch fixes the r300 build.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89477
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-06 22:08:44 -05:00
Mark Janes
c4b91a1f5c nouveau: Fix build, invalid extern "C" around header inclusion.
A previous patch to fix header inclusion within extern "C" neglected
to fix the occurences of this pattern in nouveau files.

When the helper to detect this issue was pushed to master, it broke
the build for the nouveau driver.  This patch fixes the nouveau build.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89477
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-06 22:08:11 -05:00
Ilia Mirkin
20346808cf nv50,nvc0: remove bogus 64_FLOAT formats
There is no HW support for these and the VBO pusher doesn't know about
them. No need to, either, since the st will be lowering them to 2x32.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-06 22:06:05 -05:00
Emil Velikov
1e5f833a0d docs: add news item and link release notes for mesa 10.4.6/10.5.0
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-07 00:33:06 +00:00
Emil Velikov
ac9679b1c5 docs: Add sha256 sums for the 10.5.0 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 0d3e4ed134)
2015-03-07 00:25:05 +00:00
Emil Velikov
b48774e7d8 docs: Update 10.5.0 release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 97357d475f)
2015-03-07 00:25:01 +00:00
Emil Velikov
19c5bee101 docs: Add sha256 sums for the 10.4.6 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit fc9dd495b2)
2015-03-07 00:24:57 +00:00
Emil Velikov
9fe27c7b99 Add release notes for the 10.4.6 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 542a754524)
2015-03-07 00:24:54 +00:00
Chia-I Wu
bca6c8572f ilo: clarify valid and preferred tilings
We did it right until the switch to gen_surface_tiling, which has
GEN8_TILING_W.  Generally, GEN8_TILING_W may be valid but not preferred.
2015-03-07 04:32:39 +08:00
Chia-I Wu
bf061a3d2e ilo: clean up Gen6 WAs
Add a help function for each WA and make PIPE_CONTROL flags match the WA
descriptions.  Call gen6_wa_pre_pipe_contro() only before PIPE_CONTROLs.
Fix missing gen6_wa_pre_3dstate_vs_toggle() in the rectlist path.
2015-03-07 02:17:54 +08:00
Chia-I Wu
ba5670fc50 ilo: add generic ilo_render_3dprimitive()
It replaces gen[6-8]_3dprimitive().
2015-03-07 01:45:52 +08:00
Chia-I Wu
8b2eecfbf8 ilo: add generic ilo_render_pipe_control()
It replaces gen[6-8]_pipe_control() and a direct gen6_PIPE_CONTROL() call in
ilo_render_emit_flush().
2015-03-07 01:40:23 +08:00
Chia-I Wu
35b713ad75 ilo: fix padding of linear sampler views
Should use the temporary variable in the loop instead of layout->bo_height.
2015-03-07 01:38:35 +08:00
Chia-I Wu
dda4823844 ilo: do not check for interleaved_samples
interleaved_samples is only zero-initialized when layout_want_mcs() is called.
We should not check for it.  There is also no need to.
2015-03-07 01:38:35 +08:00
Emil Velikov
56ede80940 Revert "egl/main: use c11/threads' mutex directly"
This reverts commit 6cee785c69.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:40 +00:00
Emil Velikov
eb14d28e6d Revert "egl/main: convert thread management to use c11 threads"
This reverts commit 33eff85336.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:34 +00:00
Emil Velikov
3b1d69910d Revert "configure: require pthreads for POSIX builds"
This reverts commit 50714cec2b.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:29 +00:00
Emil Velikov
8f2eaae10c Revert "glx: remove final reference to THREADS"
This reverts commit 8b15a883e0.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:23 +00:00
Emil Velikov
5e3276f5c7 Revert "glx: remove support for non-multithreaded platforms"
This reverts commit 38591295cd.

Not meant to go in yet. Lacking review.
2015-03-06 17:07:11 +00:00
Emil Velikov
1c1fd82b4b glx: remove unneeded ifdef _WIN32 guard
The C99 header exists on other platforms as well.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-06 16:49:03 +00:00
Emil Velikov
3f16751639 util: rework _MSC_VER >= 1200 checks
Replace the _MSC_VER >= 1200 with defined (_MSC_VER) and compact if/else
statements. We require MSVC 2008 or later with commit 46110c5d564.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-06 16:48:50 +00:00
Emil Velikov
38591295cd glx: remove support for non-multithreaded platforms
Implicitly required for a while, although commit 9385c592c6 (mapi:
remove u_thread.h) was the one that put the final nail on the
coffin.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:18 +00:00
Emil Velikov
8b15a883e0 glx: remove final reference to THREADS
Left over from commit 18db13f5865(mapi: THREADS was always defined,
remove it)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:18 +00:00
Emil Velikov
50714cec2b configure: require pthreads for POSIX builds
This has been an implicit rule for building mesa for a long time. Let's
make it official and just bail out at configure time. This way we can
cleaning up some of our glx code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:17 +00:00
Emil Velikov
33eff85336 egl/main: convert thread management to use c11 threads
Convert the code to use the C11 threads implementation, and nuke the
Windows non-pthreads code-path. The c11/threads_win32.h abstraction
should be better than the current code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:17 +00:00
Emil Velikov
6cee785c69 egl/main: use c11/threads' mutex directly
Remove the inline wrappers/abstraction layer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-06 16:46:17 +00:00
José Fonseca
bfb4db83b6 include: Add helper header to help trap includes inside extern C.
This is just to help repro and fixing these issues with any C++ compiler --

Commiting this will of course wait until all issues are addressed.

$ scons src/glsl/
scons: Reading SConscript files ...
Checking for GCC ...  yes
Checking for Clang ...  no
Checking for X11 (x11 xext xdamage xfixes glproto >= 1.4.13)... yes
Checking for XCB (x11-xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8)... yes
Checking for XF86VIDMODE (xxf86vm)... yes
Checking for DRM (libdrm >= 2.4.38)... yes
Checking for UDEV (libudev >= 151)... yes
warning: LLVM disabled: not building llvmpipe
scons: done reading SConscript files.
scons: Building targets ...
scons: building associated VariantDir targets: build/linux-x86_64-debug/glsl
  Compiling src/glsl/ast_array_index.cpp ...
  Compiling src/glsl/ast_expr.cpp ...
  Compiling src/glsl/ast_function.cpp ...
  Compiling src/glsl/ast_to_hir.cpp ...
  Compiling src/glsl/ast_type.cpp ...
  Compiling src/glsl/builtin_functions.cpp ...
In file included from include/c99_compat.h:28:0,
                 from src/mapi/u_compiler.h:4,
                 from src/mapi/u_thread.h:47,
                 from src/mapi/glapi/glapi.h:47,
                 from src/mesa/main/mtypes.h:42,
                 from src/mesa/main/errors.h:47,
                 from src/mesa/main/imports.h:41,
                 from src/mesa/main/core.h:44,
                 from src/glsl/builtin_functions.cpp:58:
include/no_extern_c.h:48:1: error: template with C linkage
 template<class T> class _IncludeInsideExternCNotPortable;
 ^
In file included from include/c99_compat.h:28:0,
                 from include/c11/threads.h:38,
                 from src/mapi/u_thread.h:49,
                 from src/mapi/glapi/glapi.h:47,
                 from src/mesa/main/mtypes.h:42,
                 from src/mesa/main/errors.h:47,
                 from src/mesa/main/imports.h:41,
                 from src/mesa/main/core.h:44,
                 from src/glsl/builtin_functions.cpp:58:
include/no_extern_c.h:48:1: error: template with C linkage
 template<class T> class _IncludeInsideExternCNotPortable;
 ^
  Compiling src/glsl/builtin_types.cpp ...
  Compiling src/glsl/builtin_variables.cpp ...
scons: *** [build/linux-x86_64-debug/glsl/builtin_functions.os] Error 1
scons: building terminated because of errors.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-06 12:38:55 +00:00
Iago Toral Quiroga
7f10e1678e i965: free scratch buffers when destroying the context
If scratch space is needed for a shader stage we try to reuse the last scratch
buffer bound to that stage. If we can't, we free the old scratch buffer and
allocate a new one. This means we always keep the last scratch buffer for a
particular shader stage around for the entire life span of the context.

These buffers are being reported by Valgrind as definitely lost after
destroying the OpenGL context. For example, for the geometry shader stage:

==18350== 248 bytes in 1 blocks are definitely lost in loss record 85 of 150
==18350==    at 0x4C2CC70: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==18350==    by 0xA1B35D6: drm_intel_gem_bo_alloc_internal (intel_bufmgr_gem.c:724)
==18350==    by 0xA1B383F: drm_intel_gem_bo_alloc (intel_bufmgr_gem.c:794)
==18350==    by 0xA1AEFA3: drm_intel_bo_alloc (intel_bufmgr.c:52)
==18350==    by 0x9D08E31: brw_get_scratch_bo (brw_program.c:226)
==18350==    by 0x9D2A0F2: do_gs_prog (brw_vec4_gs.c:280)
==18350==    by 0x9D2A635: brw_gs_precompile (brw_vec4_gs.c:401)
==18350==    by 0x9D14F68: brw_shader_precompile(gl_context*, gl_shader_program*) (brw_shader.cpp:76)
==18350==    by 0x9D157B8: brw_link_shader (brw_shader.cpp:269)
==18350==    by 0x9B0941E: _mesa_glsl_link_shader (ir_to_mesa.cpp:3038)
==18350==    by 0x99AE4ED: link_program (shaderapi.c:917)
==18350==    by 0x99AF365: _mesa_LinkProgram (shaderapi.c:1385)

So make sure that by the time we destroy the context we check if we have live
scratch buffers for the various stages and release them if that is the case.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-06 13:13:24 +01:00
Ville Syrjälä
970dc23603 i965: Fix URB size for CHV
Increase the device info .urb.size for CHV to match the default URB
size (192kB).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-03-06 11:50:49 +02:00
Samuel Iglesias Gonsalvez
ced9425327 configure: Introduce new output variable to ax_check_python_mako_module.m4
This output variables gives more flexibility for future changes
in autoconf to detect if it is needed to auto-generate files and
check for the auto-generation dependencies.

It is still returning error when Python is not installed.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
2015-03-06 09:39:41 +01:00
Andrey Sudnik
0dfec59a27 i965/vec4: Don't lose the saturate modifier in copy propagation.
Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89224
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-05 15:47:19 -08:00
Matt Turner
78df9d5e30 i965/vec4: Handle saturate in dump_instruction().
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-05 15:47:18 -08:00
Chia-I Wu
ebad062e9a ilo: enable L3 cache in MOCS
This enables L3 cache in MOCS almost everywhere.
2015-03-06 04:50:19 +08:00
Chia-I Wu
c7d17f8a80 ilo: track if a ilo_view_surface is a scanout
Scanouts require a different cache type.
2015-03-06 04:43:20 +08:00
Chia-I Wu
e7c74ef43d ilo: clean up SURFACE_STATE and BINDING_TABLE_STATE
Add ilo_builder_surface_pointer() to replace ilo_builder_surface_write().
Make Gen8+ take a different path in gen6_SURFACE_STATE().
2015-03-06 04:43:20 +08:00
Brian Paul
8b2c845ea0 mapi: actually remove unused u_thread.h
I thought this was in the previous commit in the series.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-05 13:39:22 -07:00
Rob Clark
60096ed906 freedreno/ir3: fix silly typo for binning pass shaders
Was resulting in gl_PointSize write being optimized out, causing
particle system type shaders to hang if hw binning enabled.

Fixes neverball, OGLES2ParticleSystem, etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-05 15:36:47 -05:00
Timothy Arceri
1a96d9ef1c glsl: let interface linking code validate its arrays
Currently intrastage arrays are validated twice for interface blocks.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-06 07:26:57 +11:00
Timothy Arceri
c5a56a63f9 glsl: use common intrastage array validation
Use common intrastage array validation for interface blocks.

This change also allows us to support interface blocks
that are arrays of arrays.

V2: Reinsert unsized array asserts in interstage_match()

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-06 07:26:50 +11:00
Timothy Arceri
50859c688c glsl: move array validation into its own function
V2: return true when var->type is unsized but max access is within valid range

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-06 07:26:41 +11:00
Kenneth Graunke
aa0705c06c i965: Split Gen4-5 BlitFramebuffer code; prefer BLT over Meta.
A while back I switched intel_blit_framebuffer to prefer Meta over the
BLT.  This meant that Gen8 platforms would start using the 3D engine
for blits, just like we do on Gen6-7.5.

However, I hadn't considered Gen4-5 when making that change.  The BLT
engine appears to be substantially faster on 965GM than using Meta to
drive the 3D engine.  This isn't too surprising: original Gen4 doesn't
support tile offsets (that came on G45), and the level/layer fields
don't work for cubemap rendering, so for inconvenient miplevel
alignments, we end up blitting or copying data to/from temporaries
in order to render to it.  We may as well just use the blitter.

I chose to use the BLT on Gen4-5 because they use the same ring for
both 3D and BLT; Gen6+ splits it out.

Fixes regressions on 965GM due to botched tile offset code (we should
fix those properly as well, but they're longstanding bugs - for now,
put things back to the status quo).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89430
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-03-05 10:36:03 -08:00
Chia-I Wu
4ddd981e40 ilo: add more convenient intel_bo_{ref,unref}()
They both check for NULL and intel_bo_ref() returns the referenced bo.  They
replace intel_bo_{reference,unreference}().
2015-03-06 02:25:03 +08:00
Chia-I Wu
70ef171e91 ilo: add intel_bo_set_tiling()
Make intel_winsys_alloc_bo() always allocate a linear bo, and add
intel_bo_set_tiling() to set the tiling.  Document the purpose of tiling.
2015-03-06 02:25:03 +08:00
Chia-I Wu
0ac706535a ilo: replace intel_tiling_mode by gen_surface_tiling
The former is used by the kernel driver to set up fence registers and to pass
tiling info across processes.  It lacks INTEL_TILING_W, which made our code
less expressive.
2015-03-06 02:25:03 +08:00
Chia-I Wu
eb32ac1956 ilo: update genhw headers
The main change is non-inline <enum>s are now generated as C enums.
2015-03-06 02:25:03 +08:00
Mark Janes
237dcb4aa7 Fix invalid extern "C" around header inclusion.
System headers may contain C++ declarations, which cannot be given C
linkage.  For this reason, include statements should never occur
inside extern "C".

This patch moves the C linkage statements to enclose only the
declarations within a single header.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-05 10:21:40 -08:00
Matt Turner
2e4c95dfe2 i965: Tell intel_get_memcpy() which direction the memcpy() is going.
The SSSE3 swizzling code was written for fast uploads to the GPU and
assumed the destination was always 16-byte aligned. When we began using
this code for fast downloads as well we didn't do anything to account
for the fact that the destination pointer given by glReadPixels() or
glGetTexImage() is not guaranteed to be suitably aligned.

With SSSE3 enabled (at compile-time), some applications would crash when
an SSE aligned-store instruction tried to store to an unaligned
destination (or an assertion that the destination is aligned would
trigger).

To remedy this, tell intel_get_memcpy() whether we're uploading or
downloading so that it can select whether to assume the destination or
source is aligned, respectively.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89416
Tested-by: Uriy Zhuravlev <stalkerg@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-05 10:18:28 -08:00
Mark Janes
5f9ee6a02f mesa/x86: missing stdio inclusions
Several patches added include statements where required by the m64
build.  Some files are only compiled for m32, and require similar
changes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 10:16:25 -08:00
Tom Stellard
c97e902a1a clover: Enable cl_khr_fp64 for devices that support doubles v4
v2:
  - Report correct values for CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE
    and CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE.
  - Only define cl_khr_fp64 if the extension is supported.
  - Remove trailing space from extension string.
  - Rename device query function from cl_khr_fp64() to
    has_doubles().

v3:
  - Return 0 for device::doubled_fp_confg() when doubles aren't
    supported.

v4:
  - Remove device query for double fp_config.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-05 14:07:37 +00:00
Emil Velikov
8d8ca64c28 xmlpool: make sure we ship options.h
The header is included in ../xmlpool.h. With the latter of which used
directly in a number of places in mesa.
Note that we can also add it (alongside t_option.h) to noinst_HEADERS,
but neither solution fixes the issue that brough us here - namely:
Do not regenerate the headers, if it already exists.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 14:45:55 +00:00
Emil Velikov
fe5fddd7e2 mapi: fix *glapi dependency tracking
I.e. add {shared-,}glapi/glapi_mapi_tmp.h to the SOURCES list. Otherwise
there will be no knowledge that the file is required by others for the
build. Thus autotools won't pick it up for the distribution tarball.

v2: Don't forget about the static glapi. Spotted by Matt.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 14:45:55 +00:00
Emil Velikov
2c0f72d538 mesa: drop Makefile from get_hash.h dependency list
Not required. Additionally this had the side effect of generating the
file, despite it's existence.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 14:45:55 +00:00
Emil Velikov
d22391cb16 mesa: fix dependency tracking of generated sources
Some of the files generated were not in the SOURCES variable, thus
although generated prior to compilation the dependency tracking was
incomplete. The latter of which resulted in the files missing from the
distribution tarball.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 14:45:54 +00:00
Emil Velikov
3f6c28f2a9 mesa: rename format_info.c to format_info.h
The file is auto-generated, and #included by formats.c. Let's rename it
to reflect the latter. This will also help up fix the dependency
tracking by adding it to the _SOURCES variable, without the side effect
of it being compiled (twice).

v2: Update .gitignore to reflect the rename.

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 14:45:54 +00:00
Emil Velikov
abae3434c4 mesa/main: update .gitignore
Drop the no longer present get_es{1,2}.c from the list.

v2: Keep the format_info.c rename hunk out of this patch.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-05 14:45:54 +00:00
Emil Velikov
d1fbea038b egl/main: remove no-longer needed definition of stdint types
All the users directly include the header, plus we have a in-tree
replacements for non C99 compilers which we already use.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-05 14:45:54 +00:00
Emil Velikov
bf0e4d219a egl/drivers: include stdint.h where needed
Currently these files are including it indirectly via eglcompiler.h
The latter of which will be removed with follow up commits.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-05 14:45:54 +00:00
Emil Velikov
74c40b9b56 egl/main: drop the declaration of PUBLIC keyword.
Should no longer be used. As many places indirectly include
eglcompiler.h keep this change separate, so that it can be easily
reverted, if needed.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-05 14:45:54 +00:00
Emil Velikov
dd438ae34b egl/main: no longer export internal function
With the split of the gallium egl module we had previously it required
access to some of the internal functions. As the only build (automake)
that did this no longer builds it we can now appropriately hide those
functions.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-05 14:45:53 +00:00
Emil Velikov
d780012cd7 egl/main: replace __FUNCTION__ with __func__
The latter is a C99 standard, and our current wrapper c99_compat.h
should handle non-compliant compilers.
Drop the c99_compat.h inclusion from eglcompiler.h altogether, as it's
no longer required.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-05 14:45:53 +00:00
Emil Velikov
7bd1693877 egl/main: replace INLINE with inline
Drop the custom keyword in favour of the C99 one. All the places using
it now directly include c99_compat.h which should handle things on
platforms which lack it.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-05 14:45:53 +00:00
Brian Paul
9385c592c6 mapi: remove u_thread.h
Just use c11 threads directly.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
262cd683e2 mapi: use c11 call_once() instead of pthread_once()
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
18db13f586 mapi: THREADS was always defined, remove it
THREADS was defined if HAVE_PTHREADS or _WIN32 was defined.  That's
always the case.  The build would die in c11/threads.h otherwise.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
fac77912b5 mesa: remove THREADS check, printf calls in debug.c
THREADS is going away in the next commit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
458c7490c2 mapi: rewrite u_current_init() function without u_thread_self()
Remove u_thread_self() since u_thread.h is going away soon.
Create a simple thread ID abstraction which wraps WIN32 or c11 threads.
This also gets rid of the questionable casting of thrd_t to an unsigned
long.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
6b5eb7bce6 mapi: fix preprocessor check in u_current_destroy()
So it matches the preprocessor check around the u_current_init_tsd() code.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
c3f352e836 mapi: remove u_macros.h
Only U_STRINGIFY() is used in entry.c

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
83926b8193 osmesa: include stdio.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
80524549f0 xlib: include stdio.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
8f1a11bfc4 st/osmesa: include stdio.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
8c68987d09 st/xlib: include stdio.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
68579c4a5c st/xlib: include stdio.h
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
fe976ceb76 st/mesa: include stdio.h where needed
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:43 -07:00
Brian Paul
2655afc7e6 swrast: include stdio.h where needed
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:42 -07:00
Brian Paul
78ee6fdb23 nouveau: include stdio.h where needed
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:42 -07:00
Brian Paul
f330ab9383 dri/common: include stdio.h where needed
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:42 -07:00
Brian Paul
db9a088d32 glsl: include stdio.h where needed
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:42 -07:00
Brian Paul
db29869205 mesa: include stdio.h where needed
Instead of relying on glapi.h or some other header to provide it.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:42 -07:00
Brian Paul
028968a3ce mesa: include c11/threads.h in mtypes.h
Let's directly include c11/threads.h instead of relying on glapi.h
to provide it.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-03-05 06:59:42 -07:00
Neil Roberts
7286a68991 meta: Fix the y offset for 1D_ARRAY in _mesa_meta_pbo_TexSubImage
The yoffset needs to be interpreted as a slice offset for 1D array
textures. This patch implements that by moving the yoffset into
zoffset similar to how it moves the height into depth.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-03-05 13:24:53 +00:00
Neil Roberts
a08bff1e98 meta: Allow GL_UN/PACK_IMAGE_HEIGHT in _mesa_meta_pbo_Get/TexSubImage
Now that a layered source PBO is interpreted as a single tall 2D image
it's quite easy to accept the image height packing option by just
creating an image that is tall enough to include the image padding.

I'm not sure whether the image height property should affect 1D_ARRAY
textures. My intuition and interpretation of the GL spec (which is a
bit vague) would be that it shouldn't. However the software fallback
path in Mesa uses the property for packing but not for unpacking. The
binary NVidia driver uses it for both. This patch doesn't use it for
either case so it is different from the software fallback. There is
some discussion about this here:

http://lists.freedesktop.org/archives/mesa-dev/2015-February/077925.html

This is tested by the texsubimage Piglit test with the array and pbo
arguments. Previously this test was skipping this code path because it
always sets the image height.

I've also tested it by modifying the getteximage-targets test. It
wasn't using this code path before because it was using the default
texture object so this code couldn't successfully create a frame
buffer. I also modified it to add some image padding with the image
height in the PBO.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-03-05 13:24:45 +00:00
Neil Roberts
7d10d2feee Revert "common: Fix PBOs for 1D_ARRAY."
This reverts commit 546aba143d.

I think the changes to the calls to glBlitFramebuffer from this patch
are no different to what it was doing previously because it used to
set height to 1 before doing the blits. However it was introducing
some problems with the blit for layer 0 because this was no longer
special cased. It didn't fix problems with the yoffset which needs to
be interpreted as a slice offset. I think a better solution would be
to modify the original if statement to cope with the yoffset.

Conflicts:
	src/mesa/drivers/common/meta_tex_subimage.c

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-05 13:23:10 +00:00
Vinson Lee
29c23644cc glsl: Fix GCC unused-variable warning in release build.
CXX      ast_array_index.lo
ast_array_index.cpp: In function ‘void update_max_array_access(ir_rvalue*, int, YYLTYPE*, _mesa_glsl_parse_state*)’:
ast_array_index.cpp:86:30: warning: unused variable ‘interface_type’ [-Wunused-variable]
             const glsl_type *interface_type =
                              ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-03-04 17:20:25 -08:00
Chia-I Wu
b5eb6f769d ilo: improve WA handling in rectlist path
Add wrappers for 3DPRIMITIVE to make sure we clear current_pipe_control_dw1
and deferred_pipe_control_dw1 after it.  Add missing
gen7_wa_post_ps_and_later().
2015-03-04 15:28:05 -07:00
Chia-I Wu
1424bdd61b ilo: clean up Gen7.5 WAs
These WAs

  gen7_wa_post_3dstate_push_constant_alloc_ps()
  gen7_wa_pre_vs()
  gen7_wa_pre_3dstate_sf_depth_bias()
  first half of gen7_wa_pre_depth()
  gen7_wa_post_ps_and_later()

are Gen7-specific.  Update copy-and-pasted gen8_wa_pre_depth() also.
2015-03-04 15:28:05 -07:00
Tom Stellard
a398168f72 clover: Fix build since llvm r231270 2015-03-04 13:10:56 -08:00
Chia-I Wu
68d2e395d9 ilo: add ILO_DEBUG=hang
When set, detect and dump the hanging batch bufffer.
2015-03-05 04:52:49 +08:00
Chia-I Wu
af4cff5d6f ilo: add some more winsys functions
Add intel_winsys_get_reset_stats(), intel_winsys_import_userptr(), and
intel_bo_map_async().  The latter two are stubs, but we are not going to use
them immediately either.
2015-03-04 13:42:17 -07:00
Matt Turner
1e128e9b69 i965/fs: Don't propagate cmod to inst with different type.
Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89317
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-04 12:37:34 -08:00
Matt Turner
ade0b580e7 r300g: Check return value of snprintf().
Would have at least prevented the crash the previous patch fixed.

Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540970
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-04 11:15:09 -08:00
Matt Turner
f5e2aa1324 r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.
When built with Gentoo's package manager, the Mesa source directory
exists seven directories deep. The path to the .test file is too long
and is silently truncated, leading to a crash. Just use PATH_MAX.

Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540970
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-04 11:15:09 -08:00
Brian Paul
67e0a4f6e8 glx/tests: add -I src/ to fix make check
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-04 11:02:09 -07:00
Kristian Høgsberg
10c82c6c5f i965: Fix uint64_t overflow in intel_client_wait_sync()
DRM_IOCTL_I915_GEM_WAIT takes an int64_t for the timeout value but
GL_ARB_sync takes an uint64_t.  Further, the ioctl used to wait
indefinitely when passed a negative timeout, but it's been broken and
now returns immediately in that case.  Thus, if an application passes
UINT64_MAX to wait forever, we overflow to -1LL and return immediately.
Work around this mess by clamping the wait timeout to INT64_MAX.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-03-04 09:55:31 -08:00
Daniel Stone
65c8965d03 egl: Take alpha bits into account when selecting GBM formats
This fixes piglit when using PIGLIT_PLATFORM=gbm

Tom Stellard:
  - Fix ARGB2101010 format

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-03-04 15:48:18 +00:00
Rob Clark
b709adf7cc freedreno/ir3: fix old compiler after f6b2e8af74
If first_driver_param is left as zero (calloc'd struct), the result is
c0 getting clobbered.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-04 11:37:58 -05:00
Brian Paul
34ff9bc669 gallivm: init MM = NULL to silence warning
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
8aa9191878 mapi: remove u_compiler.h
Just include c99_compat.h or util/macros.h where needed.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
4ab713423f mapi: use util/macros.h instead of locally defined macros
The next step is to get rid of u_compiler.h completely.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
41c87cc566 mapi: replace INLINE with inline
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
5bebd7099a mesa: consolidate PUBLIC macro definition
Define the macro in src/util/macros.h rather than in two different
places.  Note that USED isn't actually used anywhere at this time.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
25656753d7 st/xlib: include p_compiler.h to get PUBLIC definition
To prevent build break with following changes.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
25a847d9cc mapi: remove unneeded ARRAY_SIZE #define
include util/macros.h instead.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Brian Paul
0339e7dbda glx: use ARRAY_SIZE from macros.h
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-04 08:33:48 -07:00
Jose Fonseca
6e836d2c86 scons: Update for the fact that we require GCC 4.2
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-04 15:12:22 +00:00
Jose Fonseca
d0b1c74b73 svga: Set MSVC2013 compat flags.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-04 15:12:19 +00:00
Jose Fonseca
2c25008e8e softpipe,trace: Set MSVC 2008 compat flags.
Although we don't deploy these, we need to use them for debugging.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-04 15:12:17 +00:00
Jose Fonseca
00faf9f000 scons: Use -Werror MSVC compatibility flags per-directory.
Matching what we already do with autotools builds.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-04 15:12:06 +00:00
Jose Fonseca
3acd7a34ab st/vega: Remove.
OpenVG API seems to have dwindled away.  The code
would still be interesting if we wanted to implement NV_path_rendering
but given the trend of the next gen graphics APIs, it seems
unlikely that this becomes ARB or core.

v2: Remove a few "openvg" references left, per Emil Velikov.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

v3: Update release notes.
2015-03-04 11:01:45 +00:00
Jose Fonseca
5564c361b5 st/egl: Remove.
Largely superseeded by src/egl, and
WGL/GLX_EXT_create_context_es_profile extensions.

Note this will break Android.mk with gallium drivers -- somebody
familiar with that build infrastructure will need to update it to use
gallium drivers through egl_dri2.

v2: Remove the _EGL_BUILT_IN_DRIVER_GALLIUM define from
src/egl/main/Android.mk; and update the src/egl/main/Sconscript to
create a SharedLibrary, add versioning, create symlink - copy the bits
from egl-static, per Emil Velikov.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

v3: Disallow undefined symbols in libEGL.so.  Update release notes
2015-03-04 11:01:42 +00:00
Jose Fonseca
17b2825d76 windows/gdi: Remove.
This classic driver is so far behind Gallium softpipe/llvmpipe based
one, that's hard to imagine ever being useful.

v2: Drop drivers/windows from src/mesa/Makefile.am:EXTRA_DIST per Emil
Velikov.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

v3: Update release notes.
2015-03-04 11:01:38 +00:00
Jose Fonseca
40a4797384 nir: Use helper macros for dealing with VLAs.
v2:
- Single statement, by using memset return value as suggested by Ian
Romanick.
- No internal declaration, as suggested by Jason Ekstrand.
- Move macros to a header.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-04 10:52:02 +00:00
Marc-Andre Lureau
073a5d2e84 gallium/auxiliary/indices: fix start param
Since commit 28f3f8d, indices generator take a start parameter. However, some
index values have been left to start at 0.

This fixes the glean/fbo test with the virgl driver, and copytexsubimage
with freedreno.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-04 00:15:22 -05:00
Vinson Lee
b77576edc1 scons: Define _DEFAULT_SOURCE.
Fix GCC cpp warnings with glibc >= 2.19.

/usr/include/features.h:148:3: warning: #warning "_BSD_SOURCE and _SVID_SOURCE are deprecated, use _DEFAULT_SOURCE" [-Wcpp]
 # warning "_BSD_SOURCE and _SVID_SOURCE are deprecated, use _DEFAULT_SOURCE"
   ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-03 17:23:48 -08:00
Frank Henigman
e43729943e intel: fix EGLImage renderbuffer _BaseFormat
Correctly set _BaseFormat field when creating a gl_renderbuffer
with EGLImage storage.

Change-Id: I8c9f7302d18b617f54fa68304d8ffee087ed8a77
Signed-off-by: Frank Henigman <fjhenigman@google.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-03-03 10:58:42 -08:00
Rob Clark
8e67fd798e freedreno/a4xx: re-enable int (conditional on glsl130)
Re-enable integer, now that we can handle flat varyings.  Still, ofc,
conditional on FD_MESA_DEBUG=glsl130, until we can deprecate _old
compiler..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-03 10:41:00 -05:00
Rob Clark
e9f2abe349 freedreno/ir3: handle flat bypass for a4xx
We may not need this for later a4xx patchlevels, but we do at least need
this for patchlevel 0.  Bypass bary.f for fetching varyings when flat
shading is needed (rather than configure via cmdstream).  This requires
a special dummy bary.f w/ (ei) flag to signal to scheduler when all
varyings are consumed.  And requires shader variants based on rasterizer
flatshade state to handle TGSI_INTERPOLATE_COLOR.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-03 10:41:00 -05:00
Rob Clark
9d732d3125 freedreno/ir3: add support for memory (cat6) instructions
Scheduled basically the same as texture (cat5) instructions, using (sy)
flag for synchronization.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-03 10:41:00 -05:00
Rob Clark
20b50a0712 freedreno/ir3: fix up cat6 instruction encodings
I think there is at least one more sub-encoding, but these two should be
enough to cover the common load/store instructions.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-03 10:41:00 -05:00
Rob Clark
4abb789bca tgsi/lowering: don't forget interp for BCOLOR inputs
To lower two sided color, tgsi_lowering creates additional BCOLOR inputs
(matching up to the BCOLOR outputs on the vert shader).  These inputs
should copy the interpolation state of their matching COLOR input.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-03 10:41:00 -05:00
Rob Clark
583a8a8f65 freedreno/a3xx,a4xx: silence some warnings
fd3_emit.c: In function ‘fd3_emit_vertex_bufs’:
  fd3_emit.c:377:11: warning: unused variable ‘semantic’ [-Wunused-variable]
     uint8_t semantic = sem2name(vp->inputs[i].semantic);

and

  fd4_emit.c: In function ‘fd4_emit_vertex_bufs’:
  fd4_emit.c:304:11: warning: unused variable ‘semantic’ [-Wunused-variable]
     uint8_t semantic = sem2name(vp->inputs[i].semantic);

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-03-03 10:41:00 -05:00
Brian Paul
5ece288876 c99_alloca.h: add case for __sun
Reviewed-by: Alan Coopersmith <alan.coopersmith@oracle.com>
2015-03-03 08:40:13 -07:00
Jose Fonseca
80c5bd7ef0 configure: Leverage gcc warn options to enable safe use of C99 features where possible.
The main objective of this change is to enable Linux developers to use
more of C99 throughout Mesa, with confidence that the portions that need
to be built with MSVC -- and only those portions --, stay portable.

This is achieved by using the appropriate -Werror= options only on the
places they need to be used.

Unfortunately we still need MSVC 2008 on a few portions of the code
(namely llvmpipe and its dependencies).  I hope to eventually eliminate
this so that we can use C99 everywhere, but there are technical/logistic
challenges (specifically, newer Windows SDKs no longer bundle MSVC,
instead require a full installation of Visual Studio, and that has
hindered adoption of newer MSVC versions on our build processes.)
Thankfully we have more directy control over our OpenGL driver, which is
why we're now able to migrate to MSVC 2013 for most of the tree.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-03 09:25:11 +00:00
Ben Widawsky
3d4d77a5dc i965: Fix assertion in brw_reg_type_letters
While using various debugging features (optimization debug, instruction dumping,
etc) this function is called in order to get a readable letter for the type of
unit.

On GEN8, two new units were added, the Qword and the Unsigned Qword (Q, and UQ
respectively). The existing assertion tries to determine that the argument
passed in is within the correct boundary, however, it was using UQ as the upper
limit instead of Q.

To my knowledge you can only hit this case with the branch I am currently
working on, so it doesn't fix any known issues.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-02 19:55:20 -08:00
Ben Widawsky
37c2687645 i965: Rename some PIPE_CONTROL flags
I'm not really sure of the origins of the existing flag names. Modern docs have
some slightly different names. Having the correct names makes it easier to
determine if existing PIPE_CONTROL flag settings are correct, as well as making
adding new PIPE_CONTROLs easier.

This originally came up while I was trying to implement workarounds and spotted
some things called, "flush" which should have been called "invalidate."

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-02 19:28:43 -08:00
Matt Turner
e214000f25 i965/fs: Don't use backend_visitor::instructions after creating the CFG.
This is a fix for a regression introduced in commit a9f8296d ("i965/fs:
Preserve the CFG in a few more places.").

The errata this code works around is described in a comment before the function:

   "[DevBW, DevCL] Errata: A destination register from a send can not be
    used as a destination register until after it has been sourced by an
    instruction with a different destination register.

The framebuffer write's sources must be in message registers, which SEND
instructions cannot have as a destination. There's no way for this
errata to affect anything at the end of the program. Just remove the
code.

Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84613
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-02 18:13:28 -08:00
Jason Ekstrand
c4925d7f3b main/base_tex_format: Properly handle STENCIL_INDEX1/4/16
This takes "fbo-stencil blit GL_STENCIL_INDEX1/4/16" from crash to pass on
BDW.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-02 11:06:44 -08:00
Jason Ekstrand
b1ab02d9c0 meta/TexSubImage: Stash everything other than PIXEL_TRANSFER/store in meta_begin
Previously, there were bugs where if the app set a scissor it could affect
the area of the texture that was downloaded.  There was also potential that
the framebuffer SRGB state could affect downloads.  This ensures that those
will get saved/restored and can't affect the texture download.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89292
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-03-02 11:06:37 -08:00
Matt Turner
93a8c702a6 i915: Remove hand-rolled memcpy implementation.
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-02 10:38:49 -08:00
Matt Turner
54d7925012 i965: Remove hand-rolled memcpy implementation.
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-02 10:38:49 -08:00
Matt Turner
da20bf068e i965: Consider scratch writes to have side effects.
We could do better by tracking scratch reads and writes.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88793
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-02 10:24:49 -08:00
Matt Turner
491d42135a mesa: Correct backwards NULL check.
Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-02 10:24:33 -08:00
Matt Turner
87109acbed mesa: Free memory allocated for luminance in readpixels.
Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-03-02 10:24:18 -08:00
Matt Turner
2b2fa18652 mesa: Indent break statements and add a missing one.
Always indenting break statements makes spotting missing ones easier.

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-03-02 10:24:16 -08:00
Vinson Lee
3de01d2fe4 c99_alloca.h: Include stdlib.h on all non-Windows.
Fix build on FreeBSD.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89364
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Tested-by: Brian Paul <brianp@vmware.com>
2015-03-02 09:26:36 -07:00
Brian Paul
6f0e9c2e39 mesa: remove extra definition of ARRAY_SIZE in src/mesa/main/macros.h
Already defined in src/util/macros.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-02 08:55:31 -07:00
Brian Paul
e1437d6c0a mesa: remove the Elements() macro definition
No longer used.

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:31 -07:00
Brian Paul
692bd4a1ab util: replace Elements() with ARRAY_SIZE()
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-02 08:55:31 -07:00
Brian Paul
6633271159 radeon: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:31 -07:00
Brian Paul
9775dbc335 r200: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
ea760c2090 nouveau: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
49a7f8c919 i965: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
b565771003 i915: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
0a77ffcd5a mapi: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
c16c719647 glsl: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
70b401029c st/dri: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
2f0143ca96 st/mesa: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
c7136ff646 mesa/program: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
16f7b77275 mesa/swrast: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
766f5cf8f8 mesa/vbo: replace Elements() with ARRAY_SIZE()
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
c2e130f820 mesa/main: replace Elements() with ARRAY_SIZE()
We've been using a mix of these two macros for a while now.  Let's
just use the later everywhere.  It seems to be the convention used
by other open-source projects.

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-02 08:55:30 -07:00
Brian Paul
cd6db1989a mesa: trim down #includes in api_loopback.h
Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-02 08:55:30 -07:00
Brian Paul
775049b6ad mesa: trim down includes of compiler.h
In some cases, glheader.h is the right #include.
Also remove some instances of struct _glapi_table declarations.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-02 08:55:30 -07:00
Jose Fonseca
fa5140bb18 scons: Fix HAVE___* definition.
These definitions must be moved before `cppdefines` is used to have effect.

Trivial.
2015-03-02 14:23:51 +00:00
Jose Fonseca
9a07435ff8 identity: Remove.
It's unmaintained, and most likely broken: I use trace driver every now
and then, and everytime I do I need to fix it up.

It's also unused: identity_screen_create is never called.

Above all, it's dead weight: if identity driver had the infrastructure
for other pass-through drivers (like trace and rbug), then it would make
sense on its own right.  But as it is implemmented, it's just another
driver to (forget) to update whenever there is a gallium interface
change.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-02 14:12:46 +00:00
Francisco Jerez
7bfbaf4a5a i965: Remove the create_raw_surface vtbl hook.
It's a wrapper around emit_buffer_surface_state with format=RAW, pitch=1,
rw=true and the remaining arguments ordered differently.  There's no point in
having a separate vtbl pointer for that.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-03-02 14:33:13 +02:00
Francisco Jerez
65f9b83e05 i965: Add missing defines for render cache messages.
And remove duplicated definition of OWORD_DUAL_BLOCK_WRITE.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2015-03-02 14:33:13 +02:00
Neil Roberts
cf67ca9ffa i965/skl: Lay out a 1D miptree horizontally
On Gen9+ the 1D miptree is laid out with all of the mipmap levels in a
horizontal line.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-02 11:57:37 +00:00
Neil Roberts
0f1e86afd6 i965/skl: Lay out 3D textures the same as array textures
On Gen9+ the 3D textures use the same mipmap layout as 2D array
textures.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-02 11:57:37 +00:00
Neil Roberts
aef8a48979 i965/skl: Fix the maximum thread count format for the PS
According to the bspec for some reason the format of the maximum
number of threads field has changed from U8-2 to U8-1 for the PS.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-02 11:57:37 +00:00
Marek Olšák
27a34f62ba draw: fix division-by-zero for empty geometry shaders
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89372

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-03-02 12:46:36 +01:00
Chris Forbes
b51ff50a76 i965/gs: Check newly-generated GS-out VUE map against correct stage
Previously, we compared our new GS-out VUE map to the existing *VS*-out
VUE map, which is bogus.

This would mostly manifest as redundant dirty flagging where the GS is
in use but the VS and GS output layouts differ; but there is a scary
case where we would fail to flag a GS-out layout change if it happened
to match the VS-out layout.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: "10.5, 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88885
2015-03-01 11:13:35 +13:00
Brian Paul
213c41bf5d i965: add GLSL_TYPE_DOUBLE switch case to silence warning
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-28 13:39:58 -07:00
Brian Paul
7783131a51 mesa: include macros.h in stencil.h
Since it uses the CLAMP macro.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-28 13:39:58 -07:00
Brian Paul
8a25e73df3 mesa: move finite macro to imports.h
Move it to the only place it's used.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-28 13:39:57 -07:00
Brian Paul
977c56df09 mesa: remove _NORMAPI, _NORMAPIP macros
Was only used in one place.  Use equivalent _XFORMAPIP there instead.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-28 13:39:57 -07:00
Brian Paul
61d344ebba mesa: move FLT_MAX_EXP to c99_math.h
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-28 13:39:57 -07:00
Brian Paul
20dc94ba3c mesa: move ONE_DIV_SQRT_LN2 to prog_statevars.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-28 13:39:57 -07:00
Brian Paul
cbf788a348 mesa: remove unused uninitialized_var() macro
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-28 13:39:57 -07:00
Matt Turner
e71a7f8013 mesa: Check return value of __get_cpuid().
The use of the uninitialized_var() macro was to silence an uninitialized
variable warning that I assumed stemmed from gcc being unable to see
inside __get_cpuid() or understand its inline assembly.

In fact, it was because the __get_cpuid() function can fail, and not
initialize its arguments. Instead, check for failure and return early.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-28 12:20:31 -08:00
Matt Turner
5666d9266f i965/fs/nir: Mark fallthrough. 2015-02-28 10:46:41 -08:00
Matt Turner
54cd2f7c96 i965/fs/nir: Mark fallthrough. 2015-02-28 10:38:21 -08:00
Matt Turner
d528907fd2 i965: Avoid applying negate to wrong MAD source.
For some given GLSL IR like (+ (neg x) (* 1.2 x)), the try_emit_mad
function would see that one of the +'s sources was a negate expression
and set mul_negate = true without confirming that it was actually a
multiply.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89315
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89095
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-27 20:24:12 -08:00
Matt Turner
43ef2657a0 i965/vec4: Fix implementation of i2b.
I broke this in commit 2881b123d. I must have misread i2b as b2i.

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88246
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-27 20:24:12 -08:00
Ian Romanick
b8a1637119 i965/fs/nir: Use emit_math for nir_op_fpow
It appears that all the other instructions that need it already use it.
This one just got missed.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-27 18:47:04 -08:00
Matt Turner
76cd0f00f4 mapi: Don't rely on GNU void pointer arithmetic.
Commit 79daa510c added -Werror=pointer-arith to CFLAGS, which makes
arithmetic on void pointers an error.

See https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-27 16:57:10 -08:00
Kenneth Graunke
982723dfa2 Revert "configure: Leverage gcc warn options to enable safe use of C99 features where possible."
This reverts commit 79daa510c7.

I apparently hadn't done a clean build when testing this; it broke the
build for Tom, Ben, and myself.  We like the idea; let's try a v2.
2015-02-27 16:13:10 -08:00
Jonathan Gray
7983a3d2e0 auxilary/os: correct sysctl use in os_get_total_physical_memory()
The length argument passed to sysctl was the size of the pointer
not the type.  The result of this is sysctl calls would fail on
32 bit BSD/Mac OS X.

Additionally the wrong pointer was passed as an argument to store
the result of the sysctl call.

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-27 23:17:22 +00:00
Brian Paul
667dac9d40 glsl: silence uninitialized var warning on MinGW
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-27 15:22:25 -07:00
Brian Paul
bf8d049488 mesa: silence unused var warning in get_tex_rgba_uncompressed()
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-27 15:22:25 -07:00
Brian Paul
48f229d759 mesa: move declaration before code
To fix MinGW warning.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-27 15:22:24 -07:00
Brian Paul
5b089e5f15 meta: silence declaration after code warning on MinGW
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-27 15:22:24 -07:00
Brian Paul
544f56b75a meta: silence uninitialized variable warnings for MinGW
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-27 15:22:24 -07:00
Brian Paul
098e5bf3b3 c99_alloca.h: fix #include for MinGW
As with MSVC, include malloc.h but don't redefine alloca.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89364
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-02-27 15:22:24 -07:00
Brian Paul
943784bbcd gallium/util: add debug_print_usage_enum() debug helper
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-02-27 15:22:04 -07:00
Brian Paul
b14cec0b8e gallium/util: fix 'statement with no effect' warning
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-02-27 15:20:15 -07:00
Kenneth Graunke
53295bebc8 i965: Fix I/L/LA SNORM formats.
_mesa_choose_tex_format (texformat.c) tries I8_SNORM, L8_SNORM, and
either L8A8_SNORM or A8L8_SNORM, none of which are supported by our
driver.  Failing that, it falls back to RGBX for luminance, and RGBA
intensity and luminance alpha.  So, we need to use swizzle overrrides
to obtain the correct values.

Fixes Piglit's EXT_texture_snorm/fbo-blending-formats and
fbo-clear-formats.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-02-27 11:36:27 -08:00
Kenneth Graunke
ea696be5ac i965/fs: Patch the instruction generating discards; don't use CMP.Z.
CMP.Z doesn't work on Gen4-5 because the boolean isn't guaranteed to be
0 or 0xFFFFFFFF - only the low bit is defined.

We can call emit_bool_to_cond_code to generate the condition in f0.0;
the last instruction will generate the flag value.  We can patch it to
use f0.1, and negate the condition.

Fixes discard tests on Gen4-5.

Haswell shader-db stats:
total instructions in shared programs: 5770279 -> 5769112 (-0.02%)
instructions in affected programs:     64342 -> 63175 (-1.81%)
helped:                                1069

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-27 11:36:24 -08:00
Kenneth Graunke
4ebacf8aa6 i965/fs: Introduce brw_negate_cmod().
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-27 11:36:08 -08:00
Laura Ekstrand
0fad07af9a main: Fix whitespace in teximage.c.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-27 11:11:45 -08:00
Tom Stellard
da85ab4b65 radeonsi/compute: Enable PIPE_SHADER_CAP_DOUBLES v2
v2:
  - Simplify ifdef

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-27 14:57:52 +00:00
Tom Stellard
75514555aa clover: Don't unconditionally define cl_khr_fp64
This should be done by the frontend for devices that support this
extension.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-02-27 14:57:44 +00:00
Tom Stellard
ed07255149 pipe-loader: Fix build with dri drivers enabled, and vl state trackers disabled
Configure arguments:

./configure --disable-dri3 --disable-xvmc --enable-opencl
            --with-gallium-drivers=r300,r600,radeonsi
            --with-egl-platforms=drm

Build error:

make[3]: *** No rule to make target
`../../../../src/gallium/auxiliary/libgalliumvlwinsys.la', needed by
`pipe_r300.la'.  Stop.

Cc: "10.5" <mesa-stable@lists.freedestkop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-27 14:51:33 +00:00
Jose Fonseca
79daa510c7 configure: Leverage gcc warn options to enable safe use of C99 features where possible.
The main objective of this change is to enable Linux developers to use
more of C99 throughout Mesa, with confidence that the portions that need
to be built with MSVC -- and only those portions --, stay portable.

This is achieved by using the appropriate -Werror= options only on the
places they need to be used.

Unfortunately we still need MSVC 2008 on a few portions of the code
(namely llvmpipe and its dependencies).  I hope to eventually eliminate
this so that we can use C99 everywhere, but there are technical/logistic
challenges (specifically, newer Windows SDKs no longer bundle MSVC,
instead require a full installation of Visual Studio, and that has
hindered adoption of newer MSVC versions on our build processes.)
Thankfully we have more directy control over our OpenGL driver, which is
why we're now able to migrate to MSVC 2013 for most of the tree.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-27 14:30:36 +00:00
Jose Fonseca
f320ecf218 nir: Use alloca instead of variable length arrays.
This is to enable the code to build with -Werror=vla in the short term,
and enable the code to build with MSVC2013 soon after.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-27 14:30:36 +00:00
Brian Paul
84a1e3d61e mesa: restore #include stdarg.h in imports.h
https://bugs.freedesktop.org/show_bug.cgi?id=89345
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-02-27 07:04:49 -07:00
Brian Paul
06ed81044f c99_math.h: add defines for M_PI, M_E, M_LOG2E
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89342
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-02-27 07:04:49 -07:00
Vinson Lee
8170eba7e7 r300g/tests: Include stdio.h.
Fix build error.

  CC       compiler/tests/r300_compiler_tests-radeon_compiler_regalloc_tests.o
compiler/tests/radeon_compiler_regalloc_tests.c: In function ‘test_runner_rc_regalloc’:
compiler/tests/radeon_compiler_regalloc_tests.c:57:3: error: implicit declaration of function ‘fprintf’ [-Werror=implicit-function-declaration]
   fprintf(stderr, "Failed to load program\n");
   ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
2015-02-26 21:01:32 -08:00
Brian Paul
40cfa0c347 radeon/compiler: include stdio.h
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89343
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-02-26 17:53:05 -07:00
Laura Ekstrand
549078cb5a main: Fix target checking for CompressedTexSubImage*D.
This fixes a dEQP test failure.  In the test,
glCompressedTexSubImage2D was called with target = 0 and failed to throw
INVALID ENUM. This failure was caused by _mesa_get_current_tex_object(ctx,
target) being called before the target checking.  To remedy this, target
checking was made into its own function and called prior to
_mesa_get_current_tex_object.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89311

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-26 14:24:11 -08:00
Laura Ekstrand
ca65764d60 main: Fix target checking for CopyTexSubImage*D.
This fixes a dEQP test failure.  In the test,
glCopyTexSubImage2D was called with target = 0 and failed to throw
INVALID ENUM. This failure was caused by _mesa_get_current_tex_object(ctx,
target) being called before the target checking.  To remedy this, target
checking was separated from the main error-checking function and
called prior to _mesa_get_current_tex_object.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89312

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-26 13:31:59 -08:00
Brian Paul
688d7656c5 c99: in c99_math.h check that _USE_MATH_DEFINES is defined with MSVC
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 12:21:30 -07:00
Brian Paul
fb2ddef157 mesa: remove unused INLINE macro from compiler.h
We now use 'inline' everywhere in Mesa.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-26 11:02:14 -07:00
Brian Paul
164b3cd757 st/mesa: replace INLINE with inline
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-26 11:02:14 -07:00
Brian Paul
0dc6b72455 swrast: replace INLINE with inline
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-26 11:02:14 -07:00
Brian Paul
f51f2af76d radeon: replace INLINE with inline
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-26 11:02:14 -07:00
Brian Paul
bbedb85898 r200: replace INLINE with inline
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-26 11:02:13 -07:00
Brian Paul
8e9fe53ce9 i915: replace INLINE with inline
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-26 11:02:13 -07:00
Jose Fonseca
46110c5d56 include,auxiliary: Remove support for MSVC older then 2008.
MSVC 2008 (shipped with Windows SDK 7.0.7600) is the oldest we
need to support.  At least on llvmpipe, gallium/auxiliary, and util
modules.  For the remaining modules (particular all OpenGL specific
code) can be built with MSVC 2013.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-26 16:53:16 +00:00
Brian Paul
fd090fdadd mesa: don't include stdint.h in compiler.h
Not needed.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:39 -07:00
Brian Paul
95855dd32f mesa: don't include math.h in compiler.h
Not needed by anything in that header.  Include math.h or c99_math.h
where needed instead.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:39 -07:00
Brian Paul
4f25a18011 mesa: trim down #includes in compiler.h
Don't include stuff we don't need.  Fix a few #includes elsewhere to
keep thing building.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:39 -07:00
Brian Paul
538e13d4a1 r300g: remove dependency on compiler.h
It only needs typical stdio.h and stdlib.h functions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
609cb60d4b mesa: don't include limits.h in compiler.h
Not needed.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
13730bcaf3 mesa: don't include float.h in compiler.h
Not needed.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
ddf4b2e363 mesa: only include ctype.h where it's used
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
135b8c6530 mesa: include stdarg.h only where it's used
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
6b06697b0d mesa: remove M_PI, M_E, M_LOG2E macro definitions
Should be defined in math.h.  If not, we can add them to c99_math.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
6cb431c19c glsl: #include c99_math.h instead of core.h
We only need the M_LOG2E definition.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
36ea81d067 gallium: whitespace, comment formatting fixes in p_defines.h
Just to keep things consistent.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
e09fe38935 util: add debug_print_bind_flags() debug helper
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Brian Paul
2069f2c7fa gallium: renumber PIPE_BIND_ flags
Note that PIPE_BIND_COMMAND_ARGS_BUFFER and PIPE_BIND_LINEAR were both
bit 21 before.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-02-26 08:38:38 -07:00
Neil Roberts
a44606eb81 meta: In pbo_{Get,}TexSubImage don't repeatedly rebind the source tex
A layered PBO image is now interpreted as a single tall 2D image so
the z argument in _mesa_meta_bind_fbo_image is ignored. Therefore this
was just redundantly rebinding the same image repeatedly.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-26 12:04:21 +00:00
Marius Predut
1a93e7690d mesa: use fi_type in vertex attribute code
For 32-bit builds, floating point operations use x86 FPU registers,
not SSE registers.  If we're actually storing an integer in a float
variable, the value might get modified when written to memory.  This
patch changes the VBO code to use the fi_type (float/int union) to
store/copy vertex attributes.

Also, this can improve performance on x86 because moving floats with
integer registers instead of FP registers is faster.

Neil Roberts review:
- include changes on all places that are storing attribute values.
- check with and without -O3 compiler flag.
Brian Paul review:
- use fi_type type instead gl_constant_value type
- fix a bunch of nit-picks.
- fix compiler warnings

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82668
Signed-off-by: Marius Predut <marius.predut@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-25 16:35:49 -07:00
Anuj Phogat
4705346463 i965/gen8: Use HALIGN_16 if MCS is enabled for non-MSRT
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:59 -08:00
Anuj Phogat
84199fa647 i965: Pass pointer to miptree as function parameter in intel_horizontal_texture_alignment_unit
This will be used by next patch in the series.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:53 -08:00
Anuj Phogat
94d88cb468 i965: Allocate texture buffer in intelTexImage
before calling _mesa_meta_pbo_TexSubImage(). This will be used in
later patches and will be required in Skylake to get the tile
resource mode of miptree before calling _mesa_meta_pbo_TexSubImage().

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:46 -08:00
Anuj Phogat
82f6d17300 i965: Make a function to check the conditions to use the blitter
No functional changes in the patch. Just makes the code look cleaner.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:41 -08:00
Anuj Phogat
6960a3962c i965: Move the comment to the right place
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:37 -08:00
Anuj Phogat
524a729f68 i965: Fix condition to use Y tiling in blitter in intel_miptree_create()
Y tiling is supported in blitter on SNB+.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:32 -08:00
Anuj Phogat
688309374d meta: Pass null pointer for the pixel data to avoid unnecessary data upload
to a temporary pbo created in _mesa_meta_pbo_GetTexSubImage().

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:28 -08:00
Anuj Phogat
068ba4ac78 meta: Fix buffer object assignment to account for both pack and unpack bo's
create_texture_for_pbo() is shared by _mesa_meta_pbo_GetTexSubImage()
and _mesa_meta_pbo_TexSubImage() functions. So, we need to account
for both pack and unpack buffer objects.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:23 -08:00
Anuj Phogat
618c4c4b6a meta: Use GL_STREAM_READ for pbo created with GL_PIXEL_PACK_BUFFER
create_texture_for_pbo() is used by both _mesa_meta_pbo_GetTexSubImage()
and _mesa_meta_pbo_TexSubImage() functions with different PBO targets.
Use GL_STREAM_READ with GL_PIXEL_PACK_BUFFER and GL_STREAM_DRAW with
GL_PIXEL_UNPACK_BUFFER.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:11:14 -08:00
Anuj Phogat
8d6ae49a8b meta: Add assertion check for ctx->Meta->SaveStackDepth
before using it for derefrencing.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:10:59 -08:00
Anuj Phogat
0a4ea87344 meta: Do power of two samples check only for samples > 0
otherwise samples=0 passes the check, which is invalid.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-02-25 14:10:47 -08:00
Matt Turner
cb25087c7b glsl: Rewrite and fix min/max to saturate optimization.
There were some bugs, and the code was really difficult to follow. We
would optimize

   min(max(x, b), 1.0) into max(sat(x), b)

but not pay attention to the order of min/max and also do

   max(min(x, b), 1.0) into max(sat(x), b)

Corrects four shaders from Champions of Regnum that do

   min(max(x, 1), 10)

and corrects rendering of Mass Effect under VMware Workstation.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89180
Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-25 08:44:49 -08:00
Rob Clark
864340219b freedreno: drop ARRAY_SIZE macro
Since now ARRAY_SIZE has been added to util/macros.h.  Fixes a bunch of:

  freedreno_util.h:79:0: warning: "ARRAY_SIZE" redefined
   #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
   ^
  In file included from ../../../../src/gallium/include/pipe/p_compiler.h:36:0,
                   from ../../../../src/gallium/include/pipe/p_context.h:31,
                   from freedreno_context.h:32,
                   from freedreno_context.c:29:
  ../../../../src/util/macros.h:29:0: note: this is the location of the previous definition
   #  define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
   ^

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-25 08:37:58 -05:00
Neil Roberts
67e3302497 i965: Don't force x-tiling for 16-bpp formats on Gen>7
Sandybridge doesn't support y-tiling for surface formats with 16 or
more bpp. There was previously an override to explicitly allow this
for Gen7. However, this restriction is also removed in Gen8+ so we
should use y-tiling there too.

This is important to do for Skylake which doesn't support x-tiling for
3D surfaces.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-02-25 13:19:34 +00:00
Andreas Boll
6d164f65c5 glx: Fix returned values of GLX_RENDERER_PREFERRED_PROFILE_MESA
If the renderer supports the core profile the query returned incorrectly
0x8 as value, because it was using (1U << __DRI_API_OPENGL_CORE) for the
returned value.

The same happened with the compatibility profile. It returned 0x1
(1U << __DRI_API_OPENGL) instead of 0x2.

Internal DRI defines:
   dri_interface.h: #define __DRI_API_OPENGL       0
   dri_interface.h: #define __DRI_API_OPENGL_CORE  3

Those two bits are supposed for internal usage only and should be
translated to GLX_CONTEXT_CORE_PROFILE_BIT_ARB (0x1) for a preferred
core context profile and GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB (0x2)
for a preferred compatibility context profile.

This patch implements the above translation in the glx module.

v2: Fix the incorrect behavior in the glx module

Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-25 08:23:38 +01:00
Andreas Boll
06924972d5 dri/common: Update comment about driQueryRendererIntegerCommon
Since 87d3ae0b45
driQueryRendererIntegerCommon handles __DRI2_RENDERER_PREFFERED_PROFILE
too.

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-25 08:23:33 +01:00
Ilia Mirkin
720ba6ca97 glsl: add double support for packing varyings
Doubles are always packed, but a single double will never cross a slot
boundary -- single slots can still be wasted in some situations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 22:07:29 -05:00
Laura Ekstrand
546aba143d common: Fix PBOs for 1D_ARRAY.
Corrects the way that _mesa_meta_pbo_TexSubImage and
_mesa_meta_pbo_GetTexSubImage handle 1D_ARRAY textures.  Fixes a failure in
the Piglit arb_direct_state_access/gettextureimage-targets test.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Tested-by: Laura Ekstrand <laura@jlekstrand.net>

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-24 17:33:44 -08:00
Laura Ekstrand
ccc5ce6f72 common: Correct PBO 2D_ARRAY handling.
Changes PBO uploads and downloads to use a tall (height * depth) 2D texture
for blitting. This fixes the bug where 2D_ARRAY, 3D, and CUBE_MAP_ARRAY
textures are not properly uploaded and downloaded.

Removes the option to use a 2D ARRAY texture for the PBO during upload and
download.  This option didn't work because the miptree couldn't be set up
reliably.

v2: Review from Jason Ekstrand and Neil Roberts:
   -Delete the depth parameter from create_texture_for_pbo
   -Abandon the option to create a 2D ARRAY texture in create_texture_for_pbo

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-24 17:30:13 -08:00
Laura Ekstrand
06084652fe common: Correct texture init for meta pbo uploads and downloads.
This moves the line setting immutability for the texture to after
_mesa_initialize_texture_object so that the initializer function will not
cancel it out. Moreover, because of the ARB_texture_view extension, immutable
textures must have NumLayers > 0, or depth will equal (0-1)=0xFFFFFFFF during
SURFACE_STATE setup, which triggers assertions.

v2: Review from Kenneth Graunke:
   - Include more explanation in the commit message.
   - Make texture setup bug fixes into a separate patch.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-24 17:27:52 -08:00
Brian Paul
88ff8dee02 mesa: remove DEG2RAD macro
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 17:10:28 -07:00
Brian Paul
ab68219a59 mesa: remove MAX_GLUSHORT, move MAX_GLUINT
The later is only used in one place in swrast.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 17:10:28 -07:00
Brian Paul
f847ddb64d mesa: move signbit() macro to c99_math.h
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 17:10:28 -07:00
Brian Paul
612143b2d0 mesa: remove unused isblank() function
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 17:10:28 -07:00
Brian Paul
e033d2c642 glcpp: remove unneeded #include of core.h
isblank() is not used in the code.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 17:10:28 -07:00
Brian Paul
9fd7e9d831 mesa: remove sqrtf macro
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 17:10:28 -07:00
Kenneth Graunke
ee3f674572 i965: Remove redundant discard jumps.
With the previous optimization in place, some shaders wind up with
multiple discard jumps in a row, or jumps directly to the next
instruction.  We can remove those.

Without NIR on Haswell:
total instructions in shared programs: 5777258 -> 5775872 (-0.02%)
instructions in affected programs:     20312 -> 18926 (-6.82%)
helped:                                716

With NIR on Haswell:
total instructions in shared programs: 5773163 -> 5771785 (-0.02%)
instructions in affected programs:     21040 -> 19662 (-6.55%)
helped:                                717

v2: Use the CFG rather than the old instructions list.  Presumably
    the placeholder halt will be in the last basic block.

v3: Make sure placeholder_halt->prev isn't the head sentinel (caught
    twice by Eric Anholt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:53 -08:00
Kenneth Graunke
30f51f1a1a glsl: Optimize "if (cond) discard;" to a conditional discard.
st_glsl_to_tgsi and ir_to_mesa have handled conditional discards for a
long time; the previous patch added that capability to i965.

i965 (Haswell) shader-db stats:

Without NIR:
total instructions in shared programs: 5792133 -> 5776360 (-0.27%)
instructions in affected programs:     737585 -> 721812 (-2.14%)
helped:                                6300
HURT:                                  68
GAINED:                                2

With NIR:
total instructions in shared programs: 5787538 -> 5769569 (-0.31%)
instructions in affected programs:     767843 -> 749874 (-2.34%)
helped:                                6522
HURT:                                  35
GAINED:                                6

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:53 -08:00
Kenneth Graunke
8eb6c10999 i965/fs: Handle conditional discards.
The discard condition tells us which channels we want killed.  We want
to invert that condition to get the channels that should survive (remain
live) in f0.1.  Emit a CMP to negate it.

Nothing generates these today, but that will change shortly.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:52 -08:00
Kenneth Graunke
8e62bd52f8 nir: Introduce nir_intrinsic_discard_if.
This is a conditional discard, which takes a boolean source.

Note that we don't generate ir_discard::condition today, so this
shouldn't break drivers (since none implement this intrinsic yet).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:52 -08:00
Kenneth Graunke
23d42b46e3 glsl: Delete dead discard conditions in constant folding.
opt_constant_folding() already detects conditional assignments where the
condition is constant, and either deletes the assignment or the
condition.

Make it handle discards in the same fashion.

Spotted happening in the wild in Tropico 5 shaders.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:52 -08:00
Kenneth Graunke
d77b186871 glsl: Handle conditional discards in lower_discard_flow().
This pass wasn't prepared to handle conditional discards.

Instead of initializing the "discarded" temporary to "true", set it to
the condition.  Then, refer to the variable for the condition, to avoid
duplicating the expression tree.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:52 -08:00
Kenneth Graunke
44b45da994 glsl: Make ir_rvalue_visitor visit ir_discard::condition.
This was forgotten.

I omitted the NULL check since we don't check ir_assignment::condition
either.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:52 -08:00
Kenneth Graunke
926d8b0510 glsl: Make ir_validate check the type of ir_discard::condition.
Copy and pasted from the ir_if::condition handling, plus a NULL check.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 15:24:52 -08:00
Matt Turner
6f5604601c Revert "i965/fs: Remove force_writemask_all assertion for execsize < 8."
This reverts commit 0d8f27eab7.

"This doesn't seem to be necessary." <- I was wrong!

Tested-by: Markus Wick <markus@selfnet.de>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-02-24 14:08:04 -08:00
Matt Turner
2c7a703b05 i965/fs: Emit MOV(1) instructions with force_writemask_all.
Fixes rendering with Dolphin.

Tested-by: Markus Wick <markus@selfnet.de>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-02-24 14:08:04 -08:00
Matt Turner
467077b834 i965/fs: Optimize (gl_FrontFacing ? x : y) where x and y are ±1.0.
total instructions in shared programs: 5695356 -> 5689775 (-0.10%)
instructions in affected programs:     486231 -> 480650 (-1.15%)
helped:                                2604
LOST:                                  1
2015-02-24 14:08:04 -08:00
Matt Turner
b8582d18e6 i965/fs/nir: Optimize integer multiply by a 16-bit constant.
Gen8+ support was just broken, since MUL now consumes 32-bits from both
sources. Fixes 986 piglit tests on my BDW.

total instructions in shared programs: 7753873 -> 7753522 (-0.00%)
instructions in affected programs:     28164 -> 27813 (-1.25%)
helped:                                77
GAINED:                                47

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 14:08:04 -08:00
Matt Turner
7a997a3863 i965/fs/nir: Optimize (gl_FrontFacing ? x : y) where x and y are ±1.0.
total instructions in shared programs: 7756214 -> 7753873 (-0.03%)
instructions in affected programs:     455452 -> 453111 (-0.51%)
helped:                                2333

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 14:08:04 -08:00
Jason Ekstrand
c750ecaa12 nir/register: Add a parent_instr field
This adds a parent_instr field similar to the one for ssa_def.  The
difference here is that the parent_instr field on a nir_register can be
NULL if the register does not have a unique definition or if that
definition does not dominate all its uses.  We set this field in the
out-of-SSA pass so that backends can get SSA-like information even after
they have gone out of SSA.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 14:08:04 -08:00
Marek Olšák
fc59695b92 st/mesa: remove unused/broken function st_print_shaders
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-24 22:59:57 +01:00
Brian Paul
a86054bac7 st/mesa: remove struct qualifier from st_src_reg parameter
It's a class.  Silences MSVC warning.
2015-02-24 14:44:19 -07:00
Brian Paul
a2b366b92c mesa: remove INV_SQRTF() macro
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
bbb2d84032 mesa: remove ceilf, floorf macros
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
bdd0402ca3 mesa: remove expf macro
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
cffedcf163 mesa: remove logf macro
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
f5816d77e2 mesa: remove powf macro
Use the wrapper in c99_math.h if needed.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
bad154e677 mesa: remove unused exp2f, log2f, truncf wrappers
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
aeabf4ede5 mesa: remove unused acosf, asinf, atan2f, etc. macros
Not used anywhere.  If any of these are needed, they should be added
to c99_math.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
bd7f7aac56 mesa: replace FABSF with fabsf
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
46ce78d4c6 mesa: replace FLOORF with floorf
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
b2c13534f7 mesa: remove unused CEILF macro
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
79b480ccc0 mesa: replace LOGF, EXPF with logf, expf
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
e25f7772ca mesa: replace FREXPF, LDEXPF with frexpf, ldexpf
Start getting rid of some imports.h macros.  Use the c99 functions instead.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 14:44:19 -07:00
Brian Paul
e6eddbb96a targets/libgl-xlib: add src/ include dir to fix build 2015-02-24 14:44:19 -07:00
Brian Paul
a55831e8fa swrast: fix a few release build warnings 2015-02-24 14:44:19 -07:00
Marek Olšák
1180e61a1b r600g,radeonsi: fix streamout after pipeline stats have been used
EVENT_TYPE_PIPELINESTAT_STOP disables streamout queries too.

Luckily, pipeline stats are enabled by default, so we don't even have to
emit EVENT_TYPE_PIPELINESTAT_START.

Tested on Hawaii, Bonaire, Redwood, RV730.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
fdf2c04737 radeonsi: small cleanup around current_rast_prim
- remove the last parameter of si_emit_rasterizer_prim_state
- remove the last unused parameter of si_emit_draw_registers
- use current_rast_prim in si_emit_draw_registers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
0b1f31ab7f radeonsi: set current_rast_prim in the right place
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
4eb0ccf9e7 radeonsi: simplify obtaining a shader property in si_emit_clip_regs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
5349437154 radeonsi: only preload VertexID for the GS copy shader
The copy shader doesn't use any other preloaded VGPRs.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
ffd701e677 radeonsi: dump the shader key when dumping shaders
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
93daf5a2f6 r600g,radeonsi: cleanup of hex literals
0x3F800000 -> fui(1.0)
0x00000000 -> 0

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
fa913a2dc6 radeonsi: set PA_SU_HARDWARE_SCREEN_OFFSET to 0
It was probably 0 already, but it doesn't hurt to set it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
558f51f1c5 st/mesa: cleanup st_translate_geometry_program
Mostly dead code or code that didn't do anything.

Computing gs_num_outputs at the end was also useless. It's already set
correctly.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
94746cadc0 st/mesa: inline st_free_tokens
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
b039302fb7 st/mesa: cleanup st_geometry_program structure
It's full of unused variables and variables only used
in st_translate_geometry_program.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-24 21:21:04 +01:00
Marek Olšák
002aa75022 mesa: add a missing GS support check in GetActiveUniformBlockiv
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 21:21:04 +01:00
Glenn Kennard
d80701df8a r600g: Implement GL_ARB_draw_indirect for EG/CM
Requires Evergreen/Cayman and radeon kernel module
2.41.0 or newer.

Expected piglit fails due to hardware limitations:
* arb_draw_indirect-draw-arrays-prim-restart
  Restarts not applied for DrawArrays commands
* arb_draw_indirect-vertexid
  Base vertex offset is not included in vertex id

Marek: bump vgt_state num_dw by 3 (= space needed for one register write)

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-02-24 21:21:04 +01:00
Rob Clark
dd70e78674 freedreno/a4xx: aniso filtering
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-24 14:23:38 -05:00
Rob Clark
c70097ae86 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-24 14:23:38 -05:00
Rob Clark
daccbd27ce freedreno/a4xx: add ARB_instanced_arrays support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-24 14:23:38 -05:00
Rob Clark
e13398714c freedreno/a4xx: handle index_bias (i.e. base_vertex)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-24 14:23:38 -05:00
Rob Clark
283bb4848e freedreno/a4xx: add support for vertexid and instanceid sysvals
ir3 bits of it already in place from a3xx patch..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-24 14:23:38 -05:00
Rob Clark
4aef0d79ee freedreno/a4xx: pass number of instances to draw
a4xx has it's own draw packet, so needs equivalent update to what a3xx
already got.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-24 14:23:38 -05:00
Emil Velikov
86d88e2fbb docs: add news item and link release notes for mesa 10.4.5
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-24 16:10:52 +00:00
Emil Velikov
d60c628f2a docs: Add sha256 sums for the 10.4.5 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 41bdeda102)
2015-02-24 16:10:52 +00:00
Emil Velikov
1d761be43a Add release notes for the 10.4.5 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit a5c608e951)
2015-02-24 16:10:52 +00:00
Leo Liu
9c7b343bc0 st/omx/dec/h264: fix picture out-of-order with poc type 0 v2
poc counter should be reset with IDR frame,
otherwise there would be a re-order issue with
frames before and after IDR

v2: add commit message

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-24 10:39:49 -05:00
Emil Velikov
fece147be5 install-lib-links: remove the .install-lib-links file
With earlier commit (install-lib-links: don't depend on .libs directory)
we moved the location of the file from .libs/ to the current dir.
Although we did not attribute that in the former case autotools was
doing us a favour and removing the file. Explicitly remove the file at
clean-local time, otherwise we'll end up with dangling files.

Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-24 15:33:25 +00:00
Francisco Jerez
f8f3aa78d8 clover: Set appropriate flag defaults on memory object creation.
According to the spec when no device access mode is specified
clCreateBuffer and clCreateImage* should default to read/write, and
clCreateSubBuffer should default to the parent's device access flags.

clCreateSubBuffer is also required to inherit the host access and
host pointer flags from the parent.

Reviewed-and-tested-by: EdB <edb+mesa@sigluy.net>
2015-02-24 16:18:14 +02:00
EdB
0e8460a528 clover: Add CL_MEM_HOST_* flag checks.
Those flags have been introduced in OpenCL 1.2.

[ Francisco Jerez: Rebase.  Throw CL_INVALID_VALUE from
  clCreateSubBuffer if the subbuffer drops access flags from its
  parent.  Use single function taking the set of allowed host access
  flags to validate memory transfer operands. ]

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-02-24 16:17:18 +02:00
Francisco Jerez
80d3c1e537 clover: Factor out memory object flags validation to a helper function.
And define constants for commonly used subsets of flags to save some
typing.

Reviewed-and-tested-by: EdB <edb+mesa@sigluy.net>
2015-02-24 16:15:48 +02:00
Eric Anholt
49d3c6a8e6 vc4: Update to current kernel sources.
New BO create and mmap ioctls are added.  The submit ABI gains a flags
argument, and the pointers are fixed at 64-bit.  Shaders are now fixed at
the start of their BOs.
2015-02-24 13:49:12 +00:00
Eric Anholt
1d1e820a6d r600: Fix build after 984f306937
Same as for the CLAMP macro, undef it before including a header file that
tries to make fields with that name.
2015-02-24 13:49:12 +00:00
Tobias Klausmann
98ae01c822 st/nine: Mark end of non-void function unreachable
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 12:21:00 +00:00
Tobias Klausmann
984f306937 gallium: include util/macros.h
The most common macros are defined there, no use to duplicate these
Clean up the already redefinded macros

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-24 12:20:59 +00:00
Alex Henrie
9913ce14e7 driconf: Update Catalan translation
Signed-off-by: Alex Henrie <alexhenrie24@gmail.com>
2015-02-24 09:03:45 +00:00
Alex Henrie
d28a4b523d driconf: Update Spanish translation
Signed-off-by: Alex Henrie <alexhenrie24@gmail.com>
2015-02-24 09:03:45 +00:00
Eduardo Lima Mitev
0c47e5492b mesa: Add missing error checks to GetProgramInfoLog, GetShaderInfoLog and GetProgramiv
Fixes 3 dEQP tests:
* dEQP-GLES3.functional.negative_api.state.get_program_info_log
* dEQP-GLES3.functional.negative_api.state.get_shader_info_log
* dEQP-GLES3.functional.negative_api.state.get_programiv

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 08:58:54 +01:00
Iago Toral Quiroga
fe74fee8fa i965: Fix non-AA wide line rendering with fractional line widths
"(...)Let w be the width rounded to the nearest integer (...). If the
line segment has endpoints given by (x0,y0) and (x1,y1) in window
coordinates, the segment with endpoints (x0,y0-(w-1)/2) and
(x1,y1-(w-1/2)) is rasterized, (...)"

The hardware it not rounding the line width, so we should do it.

Also, we should be careful not to go beyond the hardware limits
for the line width after it gets rounded. Gen6-7 define a maximum line
width slightly below 8.0, so we should advertise a maximum line
width lower than 7.5 to make sure that 7.0 is the maximum integer
line width that we can select. Since the line width granularity in these
platforms is 0.125, we choose 7.375. Other platforms advertise rounded
maximum line widths, so those are fine.

Fixes the following 3 dEQP tests:
dEQP-GLES3.functional.rasterization.primitives.lines_wide
dEQP-GLES3.functional.rasterization.fbo.texture_2d.primitives.lines_wide
dEQP-GLES3.functional.rasterization.fbo.rbo_singlesample.primitives.lines_wide

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-24 08:58:54 +01:00
Iago Toral Quiroga
6148e3aae7 mesa: Fix ctx->Texture.CubeMapSeamless
The intel driver code, and apparently all other Mesa drivers, call
_mesa_initialize_context early in the CreateContext hook. That
function will end up calling _mesa_init_texture which will do:

ctx->Texture.CubeMapSeamless = _mesa_is_gles3(ctx);

But this won't work at this point, since _mesa_is_gles3 requires
ctx->Version to be set and that will not happen until late
in the CreateContext hook, when _mesa_compute_version is called.

We can't just move the call to _mesa_compute_version before
_mesa_initialize_context since it needs that available extensions
have been computed, which again requires other things to be
initialized, etc. Instead, we enable seamless cube maps since
GLES2, which should work for most implementations, and expect
drivers that don't support this to disable it manually as part
of their context initialization setup.

Fixes the following 192 dEQP tests:
dEQP-GLES3.functional.texture.filtering.cube.formats.*
dEQP-GLES3.functional.texture.filtering.cube.sizes.*
dEQP-GLES3.functional.texture.filtering.cube.combinations.*
dEQP-GLES3.functional.texture.mipmap.cube.*
dEQP-GLES3.functional.texture.vertex.cube.filtering.*
dEQP-GLES3.functional.texture.vertex.cube.wrap.*
dEQP-GLES3.functional.shaders.texture_functions.texturelod.samplercube_fixed_*

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 08:58:54 +01:00
Eduardo Lima Mitev
dccdf1d687 mesa: Return error if BeginQuery is called with an existing object of different type
Section 2.14 Asynchronous Queries, page 84 of the OpenGL ES 3.0.4
spec states:

  "BeginQuery generates an INVALID_OPERATION error if any of the
   following conditions hold: [...] id is the name of an
   existing query object whose type does not match target; [...]

Similar wording exists in the OpenGL 4.5 spec, section 4.2. QUERY
OBJECTS AND ASYNCHRONOUS QUERIES, page 43.

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.fragment.begin_query

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 08:58:53 +01:00
Eduardo Lima Mitev
3699866463 mesa: Return INVALID_OPERATION when querying a never bound Query obj
Section 2.14 Asynchronous Queries, page 84 of the OpenGL ES 3.0.4 states:

"The command void GenQueries( sizei n, uint *ids ); returns n previously unused
query object names in ids. These names are marked as used, for the purposes of
GenQueries only, but no object is associated with them until the first time they
are used by BeginQuery."

This means that any attempt to use or query a Query object id before it has ever
been bound by calling glBeginQuery, should be assume to be an invalid object.

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.state.get_query_objectuiv

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-24 08:58:53 +01:00
Iago Toral Quiroga
4db4a559ad mesa: Add _mesa_is_array_texture helper
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-24 08:58:53 +01:00
Eduardo Lima Mitev
2aa71e9485 mesa: Fix error validating args for TexSubImage3D
The zoffset and depth values were not being considered when calling
error_check_subtexture_dimensions().

Fixes 2 dEQP tests:
* dEQP-GLES3.functional.negative_api.texture.texsubimage3d_neg_offset
* dEQP-GLES3.functional.negative_api.texture.texsubimage3d_invalid_offset

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedestkop.org>
2015-02-24 08:58:53 +01:00
Samuel Iglesias Gonsalvez
fbd6eba72b i965/blorp: round to nearest when converting float into integer
Fixes:

dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_nearest
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_linear
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_y_nearest
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_y_linear
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_dst_y_nearest
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_dst_y_linear
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_dst_x_nearest
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_dst_x_linear
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_dst_y_nearest
dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_dst_y_linear

No piglit regressions.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-24 08:58:53 +01:00
Carl Worth
4a6c6c49a7 i965: Perform program state upload outside of atom handling
Across the board of the various generations, the intial few atoms in
all of the atom lists are basically the same, (performing uploads for
the various programs). The only difference is that prior to gen6
there's an ff_gs upload in place of the later gs upload.

In this commit, instead of using the atom lists for this program state
upload, we add a new function brw_upload_programs that calls into the
per-stage upload functions which in turn check dirty bits and return
immediately if nothing needs to be done.

This commit is intended to have no functional change. The motivation
is that future code, (such as the shader cache), wants to have a
single function within which to perform various operations before and
after program upload, (with some local variables holding state across
the upload).

It may be worth looking at whether some of the other functionality
currently handled via atoms might also be more cleanly handled in a
similar fashion.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-23 14:54:15 -08:00
Vivek Kasireddy
1e96eece30 egl, wayland: RGB565 format support on Back-buffer
In current code, color format is always hardcoded to
__DRI_IMAGE_FORMAT_ARGB8888 when buffer or DRI image is
allocated in function calls, get_back_bo and dri2_get_buffers,
regardless of current target's color format. This problem
may leads to incorrect render pitch calculation, which
eventually ends up with wrong offset of pixels in
the frame buffer when the image is in different color format
from dri surf's, especially with different bpp. (e.g. RGB565-16bpp)

Attached code patch simply adds RGB565 and XRGB8888 cases to two
functions noted above to resolve the issue.

v2: added a case of XRGB8888, format and bpp selection is done
    via switch-case (not "if-else" anymore)

Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-23 14:07:02 -08:00
Brian Paul
cbd287f094 mesa: move math-related function into new c99_math.h file
The alternative would be to include math.h in c99_compat.h but that
seems heavy-handed.

This patch also replaces INLINE with inline in the c99 math function
wrappers.

Fixes MSVC build.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-02-23 14:45:14 -07:00
Jason Ekstrand
9b9ef2aeee nir/gcm: Add some missing break statements
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-23 13:20:13 -08:00
Jason Ekstrand
cb4b2ad44a nir: Copy-propagate vecN operations that are actually moves
We were already do this for ALU operations but we haven't for non-ALU
operations.  This changes that.

total NIR instructions in shared programs: 2039883 -> 2022338 (-0.86%)
NIR instructions in affected programs:     1768850 -> 1751305 (-0.99%)
helped:                                    14244
HURT:                                      124

total FS instructions in shared programs: 4083960 -> 4084036 (0.00%)
FS instructions in affected programs:     7302 -> 7378 (1.04%)
helped:                                   12
HURT:                                     51

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-23 13:19:05 -08:00
Francisco Jerez
f80af89d48 ra: Disable round-robin strategy for optimistically colorable nodes.
The round-robin allocation strategy is expected to decrease the amount
of false dependencies created by the register allocator and give the
post-RA scheduling pass more freedom to move instructions around.  On
the other hand it has the disadvantage of increasing fragmentation and
decreasing the number of equally-colored nearby nodes, what increases
the likelihood of failure in presence of optimistically colorable
nodes.

This patch disables the round-robin strategy for optimistically
colorable nodes.  These typically arise in situations of high register
pressure or for registers with large live intervals, in both cases the
task of the instruction scheduler shouldn't be constrained excessively
by the dense packing of those nodes, and a spill (or on Intel hardware
a fall-back to SIMD8 mode) is invariably worse than a slightly less
optimal scheduling.

Shader-db results on the i965 driver:

total instructions in shared programs: 5488539 -> 5488489 (-0.00%)
instructions in affected programs:     1121 -> 1071 (-4.46%)
helped:                                1
HURT:                                  0
GAINED:                                49
LOST:                                  5

v2: Re-enable round-robin already for the lowest one of the nodes
    pushed optimistically onto the sack (Connor).
v3: Use UINT_MAX instead of ~0, open-code MIN2 (Jason, Connor).

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-23 20:55:40 +02:00
Francisco Jerez
34c93fd7f1 i965/fs: Fix lower_load_payload() not to use an incorrect half for immediates and uniforms.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-23 20:55:40 +02:00
Francisco Jerez
ea7b4d25c8 i965/fs: Fix lower_load_payload() to take into account non-zero reg_offset.
Fixes metadata guess when instructions in the program specify a
destination register with non-zero reg_offset and when the payload of
a LOAD_PAYLOAD spans several registers.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-23 20:55:40 +02:00
Francisco Jerez
08b4c8f7bf i965/fs: Remove logic to keep track of MRF metadata in lower_load_payload().
MRFs cannot be read from anyway so they cannot possibly be a valid
source of LOAD_PAYLOAD.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-23 20:55:40 +02:00
Francisco Jerez
8e47f51a5a i965/fs: Less broken handling of force_writemask_all in lower_load_payload().
It's perfectly fine to read the second half of a register written with
force_writemask_all from a first half MOV instruction or vice versa, and
lower_load_payload shouldn't mark the whole MOV as belonging to the second
half in that case.  Replicate the same metadata to both halves of the
destination when writemasking is disabled.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-23 20:55:40 +02:00
Matt Turner
57d80d11b1 mesa/vbo: Use unreachable to silence uninitialized var warning.
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-23 10:49:57 -08:00
Matt Turner
bb2a897dbc mesa: Move START/END_FAST_MATH macros to their only use.
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-23 10:49:48 -08:00
Matt Turner
08bc7cf8f6 mesa: Remove definition of NULL.
If your stdlib.h doesn't define this you should fix your stdlib.h.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-23 10:49:47 -08:00
Matt Turner
bfcdb84383 mesa: Use assert() instead of ASSERT wrapper.
Acked-by: Eric Anholt <eric@anholt.net>
2015-02-23 10:49:47 -08:00
Matt Turner
52049f8fd8 mesa: Remove CHECK macro.
There's some commentary about how it's defined by other "modules", and
maybe that was true in 2000 when the code was added.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-23 10:41:22 -08:00
Matt Turner
6a587a4461 mesa: Remove dead CAPI define.
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-23 10:41:22 -08:00
Matt Turner
14ded5ee61 gallium: Use util_cpu_to_le{16,32} in many more places.
... and util_le{16,32}_to_cpu. I think I've used the right ones for
describing the actual operation performed (even though they're both just
"byte-swap this if I'm on big-endian").

The Linux Kernel has typedefs __le32/__be32 and friends that static
analysis tools can use to check that byte-orderings are correct. It
might be interesting to apply that here as well.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-23 10:41:22 -08:00
Matt Turner
3492e88090 gallium/util: Use HAVE___BUILTIN_* macros.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-23 10:41:22 -08:00
Matt Turner
5a191f49ad mesa: Move C99 MSVC compatibility code from u_math.h to c99_compat.h.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-23 10:41:21 -08:00
Matt Turner
0b6d43e329 i965: Link test programs with gtest before pthreads.
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540962
2015-02-23 10:41:21 -08:00
Brian Paul
5dc6c8c570 osmesa: add gallium include dirs to Makefile.am
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89260
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-23 10:07:48 -07:00
Brian Paul
44375a3b13 util: move pipe_prim_names array into u_prim_name()
Also, wrapping the array in #ifdef DEBUG / #endif doesn't seem necessary.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-23 10:02:39 -07:00
Brian Paul
f1c67e37e6 util: rewrite debug_print_transfer_flags() using debug_dump_flags()
Add add missing PIPE_TRANSFER_PERSISTENT, PIPE_TRANSFER_COHERENT flags.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-23 10:02:39 -07:00
Eduardo Lima Mitev
0bfe21e8e0 mesa: Adds missing error condition in _mesa_check_sample_count()
This corrects a trivial error introduced in commit
19252fee46. That patch was merged recently
and omits one condition (that 'samples' is greater than zero) in one of
the error checks. That error will definitely cause regressions.

Also corrects the reference to the specification above the error check,
which was wrongly quoting OpenGL instead of OpenGL-ES.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-02-23 15:04:26 +01:00
Marek Olšák
050bf75c8b radeonsi: fix a warning caused by previous commit
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-02-23 11:45:00 +01:00
Marek Olšák
7820a11e3d radeonsi: fix point sprites
Broken by a27b74819a.

This fix is critical and should be ported to stable ASAP.

Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-02-23 11:40:55 +01:00
Ben Widawsky
6e62a52865 i965/skl: Use 1 register for uniform pull constant payload
When under dispatch_width=16 the previous code would allocate 2 registers for
the payload when only one is needed. This manifested itself through bugs on SKL
which needs to mess with this instruction.

Ken though this might impact shader-db, but apparently it doesn't

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89118
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88999
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Timo Aaltonen <timo.aaltonen@canonical.com>
2015-02-22 12:27:35 -08:00
Eric Anholt
4359954d84 nir: Generalize the optimization of subs of subs from 0.
I initially wrote this based on the "(('fneg', ('fneg', a)), a)" above,
but we can generalize it and make it more potentially useful.  In the
specific original case of a 0 for our new 'a' argument, it'll get further
algebraic optimization once the 0 is an argument to the new add.

No shader-db effects.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-21 14:57:14 -08:00
Eric Anholt
345c2b288a nir: Collapse repeated bcsels on the same argument.
vc4 results:
total instructions in shared programs: 39881 -> 39794 (-0.22%)
instructions in affected programs:     6302 -> 6215 (-1.38%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-21 14:57:14 -08:00
Eric Anholt
a38038ca5e nir: When faced with a csel on !condition, just flip the arguments.
total NIR instructions in shared programs: 39426 -> 39411 (-0.04%)
NIR instructions in affected programs:     3748 -> 3733 (-0.40%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-21 14:57:14 -08:00
Eric Anholt
8e1152cb33 nir: Allow nir_opt_algebraic to see booleanness through &&, ||, ^, !.
We have some useful optimizations to drop things like 'ine a, 0' on a
boolean argument, but if 'a' came from logical operations on bools, it
couldn't tell.  These kinds of constructs appear as a result of TGSI->NIR
quite frequently (at least with if flattening), so being a little more
aggressive in detecting booleans can pay off.

v2: Add ixor as a booleanness-preserving op (Suggestion by Connor).

vc4 results:
total instructions in shared programs: 40207 -> 39881 (-0.81%)
instructions in affected programs:     6677 -> 6351 (-4.88%)

Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-21 14:57:14 -08:00
Eric Anholt
dc982f4a85 nir: Add a couple of simplifications of csel operations.
vc4 was already cleaning these up, but it does shave 4 NIR instructions in
shader-db.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-21 14:57:14 -08:00
Ilia Mirkin
c2ece77678 glsl: ensure that enter/leave record get a record type
May make life easier for tools like Coverity.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-21 17:27:24 -05:00
Ilia Mirkin
1763494b31 tgsi: avoid returning pointer to local var, make it static
Spotted by Coverity.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-02-21 17:27:24 -05:00
Rob Clark
51e335742e freedreno/a4xx: set PC_PRIM_VTX_CNTL.VAROUT properly
Fixes xonotic, some webgl stuff, and really pretty much anything with
more than 4 varyings.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-21 17:11:02 -05:00
Rob Clark
fb1301e40a freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-21 17:11:02 -05:00
Rob Clark
bdf023482a freedreno/a4xx: bit of cleanup
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-21 17:11:02 -05:00
Rob Clark
9153dd4b7e loader: not having a pci-id should not be a warn
If there is no pci-id, which is valid for vc4 and freedreno, just emit
an info msg.  Keep malformed but existing pci-id's as a warning.

Mostly just to clean up a warning that confuses users for the non-pci
devices.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-21 17:11:02 -05:00
Rob Clark
e17437386c freedreno: implement fence
I never actually implemented the stubbed out fence stuff back in the
early days.  Fix that.

We'll need a few libdrm_freedreno changes to handle timeout properly,
so ignore that for now to avoid a libdrm_freedreno dependency bump.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-21 17:11:02 -05:00
Rob Clark
6855226653 freedreno/a2xx: fix increment in assert
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88883
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-02-21 17:11:01 -05:00
Jordan Justen
49a938a265 i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data
The brw_imm_ud will yield a HW_REG which then will introduce a barrier
for certain optimization opportunities.

No piglit regressions seen with gen8 (simd8vs).

Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-21 11:40:53 -08:00
Jordan Justen
17fbd854e0 i965/fs: Set pixel/sample mask for compute shaders atomic ops
For fragment programs, we pull this mask from the payload header. The same
mask doesn't exist for compute shaders, so we set all bits to enabled.

Previously we were setting 0xff to support SIMD8 VS, but with CS we
support SIMD16, and therefore we change this to 0xffff.

Related commits for SIMD8 VS:

commit d9cd982d55
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Date:   Sun Feb 15 20:06:59 2015 -0800
    i965/simd8vs: Fix SIMD8 atomics

commit 4a95be9772
Author: Jordan Justen <jordan.l.justen@intel.com>
Date:   Tue Feb 17 09:57:35 2015 -0800
    i965/simd8vs: Fix SIMD8 atomics (read-only)

Note: this mask is ANDed with the execution mask, so some channels may not end
up issuing the atomic operation.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-02-21 11:40:53 -08:00
Chia-I Wu
9fe81879c5 ilo: R32G32B32_FLOAT need no special care on Gen8+
Gen8+ must use VALIGN_4.  Unlike prior Gens, R32G32B32_FLOAT should supposedly
support VALIGN_4.
2015-02-21 11:33:54 +08:00
Chia-I Wu
226109436f ilo: 128 BPP formats can use TiledY on Gen7.5+
The restriction is lifted.
2015-02-21 11:33:54 +08:00
Ilia Mirkin
f8e4792b22 nvc0: enable double support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:51:50 -05:00
Ilia Mirkin
5491458843 nvc0/ir: remove merge/split pairs to allow normal propagation to occur
Because the TGSI interface creates merges for each instruction source
and then splits them back out, there are a lot of unnecessary
merge/split pairs which do essentially nothing. The various modifier/etc
propagation doesn't know how to walk though those, so just remove them
when they're unnecessary.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:51:50 -05:00
Ilia Mirkin
93812dc10a nvc0/ir: add support for new TGSI double opcodes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:51:43 -05:00
Ilia Mirkin
ef8f09be33 nvc0/ir: handle zero and negative sqrt arguments
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:28 -05:00
Ilia Mirkin
88127874a3 nvc0/ir: no instruction can load a double immediate
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:28 -05:00
Ilia Mirkin
b87b498b88 nvc0/ir: fix lowering of RSQ/RCP/SQRT/MOD to work with F64
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:28 -05:00
Ilia Mirkin
93ebe91bae gm107/ir: fix F2F flipped stype/dtype flags
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:27 -05:00
Ilia Mirkin
dbf4a674b9 gm107/ir: fix DSET boolean float flag
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:27 -05:00
Ilia Mirkin
727018bb0c gm107/ir: fix DMUL opcode encoding
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:27 -05:00
Ilia Mirkin
493ad88e1b gk110/ir: add emission of dadd/dmul/dmad opcodes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:27 -05:00
Ilia Mirkin
fd0b1a4cbf nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-20 19:30:27 -05:00
Roland Scheidegger
88305dfd0b mesa: don't enable NV_fragment_program_option with swrast
Since dropping some NV_fragment_program opcodes (commits
868f95f1da, a3688d686f)
we can no longer parse all opcodes necessary for this extension, leading
to bugs (https://bugs.freedesktop.org/show_bug.cgi?id=86980).
Hence don't announce support for it in swrast (no other driver enabled it).
(Note that remnants of some NV_fp/vp extensions remain, they could be
dropped but are required as hacks for getting viewperf11 catia to run.)
2015-02-21 01:23:00 +01:00
Brian Paul
9dbe5e1dca drivers/x11: add gallium include dirs to Makefile.am
Fixes xlib driver build after e8c5cbfd92.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-02-20 16:25:07 -07:00
Marek Olšák
0feb0b7373 vbo: fix an unitialized-variable warning
It looks like a bug to me.

Cc: 10.5 10.4 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-21 00:16:35 +01:00
Marek Olšák
41f49a2fd4 gallium/sw/kms: fix a type-mismatch warning
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-21 00:16:35 +01:00
Marek Olšák
1a44566132 gallium/sw/kms: don't redefine DEBUG
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-21 00:16:35 +01:00
Marek Olšák
f900233928 targets/d3dadapter9: remove an unused variable
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-21 00:16:35 +01:00
Marek Olšák
ab947d2dd8 tgsi: fix type-mismatch warning
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-21 00:16:34 +01:00
Marek Olšák
6f273ec408 gallivm: fix uninitialized-variable warnings
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-21 00:16:34 +01:00
Matt Turner
b21ad12485 mesa: Have configure define NDEBUG, not mtypes.h.
mtypes.h had been defining NDEBUG (used by assert) if DEBUG was not
defined. Confusing and bizarre that you don't get NDEBUG if you don't
include mtypes.h.

... which is just what happened in commit bef38f62e.

Let's let configure define this for us if not using --enable-debug.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-20 14:10:38 -08:00
Kenneth Graunke
b6393d7040 nir: Fix the Mesa build without -DDEBUG.
With -DDEBUG -UNDEBUG, this assert uses reg_state::stack_size, which
doesn't exist, breaking the build:

assert(state->states[index].index < state->states[index].stack_size);

Switch it to ifndef NDEBUG, so the field will exist if the assertion
actually generates code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-20 13:43:44 -08:00
Eric Anholt
bef38f62e0 nir: Drop dependency on mtypes.h for core NIR.
One less new directory necessary for gallium code that wants to interact
with NIR.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Eric Anholt
90b4bf2e6e glsl: Only include mtypes from glsl_types.h for the C++ code that needs it.
It's used in one of the methods, not in the structure definitions.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Eric Anholt
b53d035825 util: Move Mesa's bitset.h to util/.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Eric Anholt
8aa381e3cd mesa: Make bitset.h not rely on Mesa-specific types and functions.
Note that we can't use u_math.h's align() because it's a function instead
of a macro, while BITSET_DECLARE needs a constant expression for nouveau's
usage in global declarations.

v2: Stick some parens around the bits macro argument usage (review by Jose).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Eric Anholt
41b1882ed4 mesa: Use u_math.h from macros.h
This avoids duplication of some macros and other definitions across the
tree.

Note that COPY_4FV switches from a memcpy-based implementation to an
assignment of 4 floats.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Eric Anholt
5ca019358f gallium/util: Don't include unused debug functions from u_math.h
It introduces references to gallium util/ symbols which means we don't get
to include it from outside-of-gallium code.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Eric Anholt
e8c5cbfd92 mesa: Add gallium include dirs to more parts of the tree.
v2: Try to patch up the scons bits.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-02-20 11:36:34 -08:00
Marek Olšák
f5ac5e20b1 gallium/radeon: fix an uninitialized-variable warning 2015-02-20 20:20:10 +01:00
Ilia Mirkin
c85a686d02 gallium: add new double-related shader caps to all the getters
Missed a few drivers in the earlier changes, this should fix up all the
ones that print unknown caps or don't have a default statement.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-20 14:09:25 -05:00
Brian Paul
71b155a2cb svga: add missing _DROUND,DFRACEXP_DLDEXP_SUPPORTED switch cases
To silence unhandled switch case warnings.
2015-02-20 08:09:40 -07:00
Marek Olšák
7692704b14 radeonsi: don't use SQC_CACHES to flush ICACHE and KCACHE on SI
This reverts 73c2b0d18c.

It doesn't seem to be reliable. It's probably missing a wait packet or
something, because it's just a register write and doesn't wait for anything.
SURFACE_SYNC at least seems to wait until the flush is done. Just guessing.

Let's not complicate things and revert this.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88561

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-20 12:06:22 +01:00
Iago Toral Quiroga
2a06728ba0 i965/gen6: Fix GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARB
In gen6 we need to compute the primitive count in the generated GS program.
The current implementation only counts full primitives, that is, if the
output primitive type is a triangle strip, it won't count individual
triangles in the strip, only complete strips.

If we want to count basic primitives instead we have two options: rework
the assembly code we generate for strip primitives or simply use
CL_INVOCATION_COUNT to resolve the query and let the hardware do that work
for us. This patch implements the latter approach.

Fixes the following piglit test:
bin/arb_pipeline_statistics_query-geom -auto

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89210
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-02-20 11:24:11 +01:00
Eduardo Lima Mitev
097b933b55 mesa: Check that draw buffers are valid for glDrawBuffers on GLES3
Section 4.2 (Whole Framebuffer Operations) of the OpenGL 3.0 specification
says:

    "Each buffer listed in bufs must be BACK, NONE, or one of the values from
     table 4.3 (NONE, COLOR_ATTACHMENTi)".

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.buffer.draw_buffers

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-20 09:35:12 +01:00
Samuel Iglesias Gonsalvez
fe1e89a026 glsl: don't allow invariant qualifiers for interface blocks
GLSL 1.50 and GLSL 4.40 specs, they both say the same in
"Interface Blocks" section:

"If optional qualifiers are used, they can include interpolation qualifiers,
auxiliary storage qualifiers, and storage qualifiers and they must declare
an input, output, or uniform member consistent with the interface qualifier
of the block"

From GLSL ES 3.0, chapter 4.3.7 "Interface Blocks", page 38:

"GLSL ES 3.0 does not support interface blocks for shader inputs or outputs."

and from GLSL ES 3.0, chapter 4.6.1 "The invariant qualifier", page 52.

"Only variables output from a shader can be candidates for invariance."

This patch fixes the following dEQP tests:

dEQP-GLES3.functional.shaders.declarations.invalid_declarations.invariant_uniform_block_2_vertex
dEQP-GLES3.functional.shaders.declarations.invalid_declarations.invariant_uniform_block_2_fragment

No piglit regressions.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>

v2:

- Enable this check for GLSL.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-20 09:35:08 +01:00
Eric Anholt
85316d059c vc4: Keep an array of pointers to instructions defining the temps around.
The optimization passes are always regenerating it and throwing it away,
but it's not hard to keep track of.
2015-02-19 23:35:17 -08:00
Eric Anholt
877b48a531 vc4: Move qir_uniform() and the constant-value versions to vc4_qir.c/h.
I may want them in optimization passes, and they're not really particular
to the program translation stage.
2015-02-19 23:35:17 -08:00
Eric Anholt
14dc281c13 vc4: Enforce one-uniform-per-instruction after optimization.
This lets us more intelligently decide which uniform values should be put
into temporaries, by choosing the most reused values to push to temps
first.

total uniforms in shared programs: 13457 -> 13433 (-0.18%)
uniforms in affected programs:     1524 -> 1500 (-1.57%)
total instructions in shared programs: 40198 -> 40019 (-0.45%)
instructions in affected programs:     6027 -> 5848 (-2.97%)

I noticed this opportunity because with the NIR work, some programs were
happening to make different uniform copy propagation choices that
significantly increased instruction counts.
2015-02-19 23:35:17 -08:00
Eric Anholt
09c844fcd9 vc4: Rename add_uniform() to qir_uniform(). 2015-02-19 23:35:17 -08:00
Eric Anholt
96f6efc561 vc4: Shut up runtime warnings about new pipe caps. 2015-02-19 23:35:13 -08:00
Matt Turner
e0137fd6f7 i965/vec4: Add and use byte-MOV instruction for unpack 4x8.
Previously we were using a B/UB source in an Align16 instruction, which
is illegal. It for some reason works on all platforms, except Broadwell.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86811
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:44 -08:00
Matt Turner
dada30462b i965/blorp: Emit MADs.
Low hanging fruit: cuts a couple of instructions.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Matt Turner
30ec53f30e i965/blorp: Optimize clamping tex coords.
Each emit_cond_mov() emits a CMP of its first to arguments using the
specified conditional mod, followed by a predicated MOV of the fifth
argument into the fourth. In all four cases here, it was just
implementing MIN/MAX which we can do in a single SEL instruction.

Also reorder the instructions for a slightly better schedule.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Matt Turner
3b7f683f3b i965: Use greater-equal cmod to implement maximum.
The docs specifically call out SEL with .l and .ge as the
implementations of MIN and MAX respectively. Among other things, SEL
with these conditional mods are commutative.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Matt Turner
f8b435ae6a i965: Don't emit saturates for instructions without destinations.
We were special casing OPCODE_END but no other instructions that have no
destination, like OPCODE_KIL, leading us to emitting MOVs with null
destinations.

total instructions in shared programs: 5705243 -> 5701539 (-0.06%)
instructions in affected programs:     124104 -> 120400 (-2.98%)
helped:                                904

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Matt Turner
7f8dd91d16 i965/fs: Consider MOV.SAT to interfere if it has a source modifier.
The saturate propagation pass recognizes that the second instruction
below does not interfere with an attempt to propagate the saturate
modifier from instruction 3 to 1.

 1:  add(8)     dst0   src0  src1
 2:  mov.sat(8) dst1   dst0
 3:  mov.sat(8) dst2   dst0

Unfortunately, we did not consider the case of instruction 2 having a
source modifier on dst0. Take for instance:

 1:  add(8)     dst0   src0  src1
 2:  mov.sat(8) dst1  -dst0
 3:  mov.sat(8) dst2   dst0

Consider such an instruction to interfere. Increase instruction counts
in Anomaly 2, which could be a bug fix depending on the values the first
instruction produces.

instructions in affected programs:     53228 -> 53934 (1.33%)
HURT:                                  360

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Matt Turner
871ad3f08b i965/fs: Use fs_inst::overwrites_reg() in saturate propagation.
This is safer and matches the conditional_mod propagation pass.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Matt Turner
bf3389ec49 i965/fs: Add unit tests for saturate propagation pass.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 21:16:43 -08:00
Timothy Arceri
9acb011a3e glsl: Use the without_array predicate
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-20 16:11:15 +11:00
Ilia Mirkin
5000a5f67b nv50: add PIPELINE_STATISTICS query support, based on nvc0
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Nick Tenney <nick.tenney@gmail.com>
2015-02-19 23:12:35 -05:00
Ilia Mirkin
f883df74e0 svga: add missing :
Fixes: 924ee3f408 ("gallium: add shader cap for dldexp/dfracexp support")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 20:18:02 -05:00
Jason Ekstrand
c7002fad90 nir/GCM: Pull unpinned instructions out of blocks while pinning
This lets us be slightly more efficient by not walking the CFG extra times.
Also, it may make it easier to ensure that GVN happens on only unpinned
instructions.

Reviewed-by: Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
8dfe6f672f nir/GCM: Use pass_flags instead of bitsets for tracking visited/pinned
Reviewed-by: Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
190073c737 nir: Add a global code motion (GCM) pass
v2 Jason Ekstrand <jason.ekstrand@intel.com>:
 - Use nir_dominance_lca for computing least common anscestors
 - Use the block index for comparing dominance tree depths
 - Pin things that do partial derivatives

Reviewed-by: Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
a52a4b5223 nir/instr: Change "live" to a more generic "pass_flags" field
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
3d25afc51c nir: Make nir_[cf_node/instr]_[prev/next] return null if at the end
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
902b0ccc9a nir/from_ssa: Don't try to read an invalid instruction
Right now, the nir_instr_prev function function blindly looks up the
previous element in the exec list and casts it to an instruction even if
it's the tail sentinel.  The next commit will change this to return null if
it's the first instruction.  Making this change first avoids getting a
segfault between commits.  The only reason we never noticed is that, thanks
to the way things are laid out in nir_block, the casted instruction's type
was never parallal_copy.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
0281fd0786 nir/validate: Validate SSA defs the same way we do for registers
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
34952b5671 nir/validate: Validate if_uses on registers
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
98ecb25f89 nir: Properly clean up CF nodes when we remove them
Previously, if you remved a CF node that still had instructions in it, none
of the use/def information from those instructions would get cleaned up.
Also, we weren't removing if statements from the if_uses of the
corresponding register or SSA def.  This commit fixes both of these
problems

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
e025943134 nir: use nir_foreach_ssa_def for indexing ssa defs
This is both simpler and more correct.  The old code didn't properly index
load_const instructions.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
0167c38cac nir/from_ssa: Use the nir_block_dominance function instead of our own
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
f481a9425c nir/dominance: Add a constant-time mechanism for comparing blocks
This is mostly thanks to Connor.  The idea is to do a depth-first search
that computes pre and post indices for all the blocks.  We can then figure
out if one block dominates another in constant time by two simple
comparison operations.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:17 -08:00
Jason Ekstrand
b4c5489c8a nir/dominance: Expose the dominance intersection function
Being able to find the least common anscestor in the dominance tree is a
useful thing that we may want to do in other passes.  In particular, we
need it for GCM.

v2: Handle NULL inputs by returning the other block

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-19 17:06:16 -08:00
Ilia Mirkin
6316c90cc0 st/mesa: lower DFRACEXP/DLDEXP when they are not supported
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:39:15 -05:00
Ilia Mirkin
e4a3f48a45 st/mesa: disable lowering of dops to dfrac when dround is available
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:38:26 -05:00
Ilia Mirkin
e556bfc8ff st/mesa: add support for new double opcodes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:55 -05:00
Ilia Mirkin
924ee3f408 gallium: add shader cap for dldexp/dfracexp support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:52 -05:00
Ilia Mirkin
899d779cb7 gallium: add a cap to enable double rounding opcodes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:49 -05:00
Ilia Mirkin
12dedca523 gallium: add some more double opcodes to avoid unnecessary lowering
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:35 -05:00
Dave Airlie
1759689d18 docs/GL3.txt: softpipe now supports GL_ARB_gpu_shader_fp64
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:12:00 +10:00
Dave Airlie
8c6a0ebaad st/mesa: add st fp64 support (v7.1)
This adds support to the state tracker for
ARB_gpu_shader_fp64.

The details are explained in comments
within the code.

v2 : add double to int/unsigned conversion
v3: handle fp64 consts better
v4: use DRSQ
v4.1: add d2b
v4.2: drop DDIV

v5: split out some prep patches.
v5.1: add some comments.
v5.2: more comments

v6: simplify down the double instruction
    generation loop.

v7: Merge Ilia's two cleanup patches.
v7.1: minor fixups for Ilia patch + cleanups

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:06:56 +10:00
Dave Airlie
0178358a2d mesa/st_tgsi_to_glsl: prepare add_constant for fp64
This just moves stuff around a little to make the next patch
cleaner.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:06:47 +10:00
Dave Airlie
12150a5bee st/glsl_to_tgsi: convert dst to an array
This is just prep work for fp64 support where we need
an array of 2 dst values.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:05:52 +10:00
Dave Airlie
c442d0961e i965: just avoid warnings with fp64
This just fills in some blanks to avoid warnings in the i965 driver.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 09:44:28 +10:00
Kenneth Graunke
75f6ed617f glsl: Add compute to _mesa_shader_stage_to_string(); use unreachable.
This is basically Ian's review feedback for my patch that added
_mesa_shader_stage_to_abbrev() - it just makes both consistent again.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 15:15:46 -08:00
Kenneth Graunke
5cdfa839c2 i965/vec4: Print "VS" or "GS" when compiles fail, not "vec4".
This is now trivial to do right.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:46 -08:00
Kenneth Graunke
e60318fbcd i965/vec4: Replace debug_flag with debug_enabled.
backend_visitor now handles this, so we can delete the vec4_visitor
specific code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
eeacbc1a02 i965: Make scheduler cycle estimates use the proper stage name.
Previously, the vec4 backend labeled shaders as "vec4" - now it uses the
specific names "VS" and "GS".

The FS backend now correctly prints "VS" for vertex shaders (rather than
"fs").  It also prints "FS" instead of "fs" for fragment shaders;
preserving that behavior didn't seem essential.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
2bd139e18c i965/fs: Un-hardcode DEBUG_WM, "FS", and "fragment".
These code paths can (or will) be used for other shader stages.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
7e35a81264 i965: Create backend_visitor fields for debugging messages.
We introduce three new fields in backend_visitor:
- debug_enabled: whether or not INTEL_DEBUG & DEBUG_<stage flag>
- stage_name: "vertex", "fragment", etc. for use in messages
- stage_abbrev: "VS", "FS", etc. for use in messages

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
7c891e8ddd i965: Add a function to translate MESA_SHADER_* into DEBUG_* enums.
When compiling, we have a gl_shader_stage (MESA_SHADER_*) enum, and want
to know whether debugging is enabled for that stage.  This allows us to
easily translate it into the corresponding debug flag.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
7555d1bafb glsl: Create a _mesa_shader_stage_to_abbrev() function.
This is similar to _mesa_shader_stage_to_string(), but returns "VS"
instead of "vertex".

v2: Use unreachable() and add MESA_SHADER_COMPUTE (requested by Ian).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
231267bf01 i965/fs: Use VARYING_SLOT checks rather than strcmp().
Comparing the location field is equivalent and more efficient.

We'll also need this when we start using NIR for ARB programs, as our
NIR converter will set the location field correctly, but probably won't
use the GLSL names for these concepts.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
a07cd42f1e i965/fs: Remove type parameter from emit_vs_system_value().
Every VS system value has type D.  We can always add this back if that
changes, but for now, it's extra typing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Dave Airlie
2e9f4eadfb glsl: add lowering for double divide to rcp/mul
It looks like no hw does div anyways, so we should just
lower at the GLSL level.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:58:06 +10:00
Dave Airlie
0e82817247 softpipe/tgsi: expose doubles for softpipe.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:52:11 +10:00
Dave Airlie
fa43e0443e tgsi: add support for flt64 constants
These act like flt32 except they take up two slots, and you
can only add 2 x flt64 constants in one slot.

The main reason they are different is we don't want to match half a flt64
constants against a flt32 constant in the matching code, we need to make
sure we treat both parts of the flt64 as an single structure.

Cleaned up printing/parsing by Ilia Mirkin <imirkin@alum.mit.edu>

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:51:49 +10:00
Dave Airlie
3cd1338534 gallium: add double opcodes and TGSI execution (v4.2)
This patch adds support for a set of double opcodes
to TGSI. It is an update of work done originally
by Michal Krol on the gallium-double-opcodes branch.

The opcodes have a hint where they came from in the
header file.

v2: add unsigned/int <-> double
v2.1:  update docs.

v3: add DRSQ (Glenn), fix review comments (Glenn).

v4: drop DDIV
v4.1: cleanups, fix some docs bugs, (Ilia)
      rework store_dest and fetch_source fns. (Ilia)
4.2: fixup float comparisons (Ilia)

This is based on code by Michael Krol <michal@vmware.com>

Roland and Glenn also reviewed earlier versions.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:49:12 +10:00
Brian Paul
14b9bf630c gallium/util: indentation fix 2015-02-19 15:36:59 -07:00
Brian Paul
21c57a697f st/mesa: add GSL_TYPE_DOUBLE, new ir_unop_* switch cases
To silence compiler warnings about unhandled switch cases.
v2: move GSL_TYPE_DOUBLE case to the "Invalid type in type_size" section,
per Ilia.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 15:36:59 -07:00
Brian Paul
2f5597787c nir: add missing GLSL_TYPE_DOUBLE case in type_size()
To silence compiler warning about unhandled switch case.
v2: move GLSL_TYPE_DOUBLE to the "not reached" section, per Ilia.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 15:36:59 -07:00
Brian Paul
62a8883f32 st/mesa: fix sampler view reference counting bug in glDraw/CopyPixels
Use pipe_sampler_view_reference() instead of ordinary assignment.
Also add a new sanity check assertion.

Fixes piglit gl-1.0-drawpixels-color-index test crash.  But note
that the test still fails.

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 15:36:59 -07:00
Brian Paul
89c96afe3c swrast: fix multiple color buffer writing
If a fragment program wrote to more than one color buffer, the
first fragment color got replicated to all dest buffers.  This
fixes 5 piglit FBO tests, including fbo-drawbuffers-arbfp.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45348
Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-19 15:36:59 -07:00
Brian Paul
fbac86ad2a mesa: remove unused _math_trans_4chan()
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-19 15:36:59 -07:00
Lucas Stach
5c1aac17ad install-lib-links: don't depend on .libs directory
This snippet can be included in Makefiles that may, depending on the
project configuration, not actually build any installable libraries.

In that case we don't have anything to depend on and this part of
the makefile may be executed before the .libs directory is created,
so do not depend on it being there.

Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2015-02-19 10:02:02 -08:00
Francisco Jerez
6c34fd20be i965/vec4: Calculate register allocation q values manually.
This fixes a regression in the running time of Piglit introduced by
commit 78e9043475, which increased the
number of register allocation classes set up by the VEC4 back-end
from 2 to 16.  The algorithm used by ra_set_finalize() to calculate
them is unnecessarily expensive, do it manually like the FS back-end
does.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:09:12 +02:00
Francisco Jerez
35a77a148f i965: Don't compact instructions with unmapped bits.
Some instruction bits don't have a mapping defined to any compacted
instruction field.  If they're ever set and we end up compacting the
instruction they will be forced to zero.  Avoid using compaction in such
cases.

v2: Align multiple lines of an expression to the same column.  Change
    conditional compaction of 3-source instructions to an
    assertion. (Matt)
v3: The 3-source instruction bit 105 is part of SourceIndex on CHV.
    Add assertion that reserved bit 7 is not set. (Matt)
    Document overlap with UIP and 64-bit immediate fields.
v4: Make some more unmapped bit checks assertions. (Matt)

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
6c07279e5a i965: Handle F16TO32/F32TO16 with dword src/dst consistently on both back-ends.
Due to the way it's implemented in hardware, the F16TO32/F32TO16
instructions require the source/destination register to be of some
16-bit type in Align1 mode, while they require it to be some 32-bit
type in Align16 mode (and as an undocumented feature the high 16 bits
of the destination register are zeroed out in the case of the F32TO16
instruction on Gen7).  Make their behaviour consistent so you can
specify a 32 bit register type as source or destination and get
predictable results in the most significant bits no matter what access
mode is being used.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
437d401e63 i965/gen8: Fix F32TO16 in vec4 mode if the source and destination registers alias.
We cannot zero out the destination register if it overlaps with the
source.  Use an Align1 instruction instead to zero out the high 16
bits after the conversion to half float.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
509f58740c i965/fs: Replace ud_reg_to_w() with a more general helper function.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
63d6d09a3b i965/vec4: Don't attempt to reduce swizzles of send from GRF instructions.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
bda7698fce i965/vec4: Fix constant propagation across different types.
If the source type differs from the original type of the constant we
need to bit-cast it before propagating, otherwise the original type
information will be lost.  If the constant was a vector float there
isn't much we can do, because the result of bit-casting the component
values of a vector float cannot itself be represented as an immediate.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Samuel Iglesias Gonsalvez
187ace73a9 glsl: A shader cannot redefine or overload built-in functions in GLSL ES 3.00
Create a new search function to look for matching built-in functions by name
and use it for built-in function redefinition or overload in GLSL ES 3.00.

GLSL ES 3.0 spec, chapter 6.1 "Function Definitions", page 71

  "A shader cannot redefine or overload built-in functions."

While in GLSL ES 1.0 specification, chapter 8 "Built-in Functions"

  "User code can overload the built-in functions but cannot redefine them."

So this check is specific to GLSL ES 3.00.

This patch fixes the following dEQP tests:

dEQP-GLES3.functional.shaders.functions.invalid.overload_builtin_function_vertex
dEQP-GLES3.functional.shaders.functions.invalid.overload_builtin_function_fragment
dEQP-GLES3.functional.shaders.functions.invalid.redefine_builtin_function_vertex
dEQP-GLES3.functional.shaders.functions.invalid.redefine_builtin_function_fragment

No piglit regressions.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-19 10:05:33 +01:00
Eduardo Lima Mitev
19252fee46 mesa: Adds check for integer internal format and num samples in glRenderbufferStorageMultisample
Per GLES3 specification, section 4.4 Framebuffer objects page 198, "If
internalformat is a signed or unsigned integer format and samples is greater
than zero, then the error INVALID_OPERATION is generated.".

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.buffer.renderbuffer_storage_multisample

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 09:35:41 +01:00
Eduardo Lima Mitev
dbc160a3f8 mesa: Returns correct error values from gl(Get)SamplerParameter*() on GL-ES 3.0+
'3.8.2 Sampler Objects' section of the GL-ES 3.0 specification states:

    "An INVALID_OPERATION error is generated if sampler is not the name
    of a sampler object previously returned from a call to GenSamplers."

In desktop GL, an GL_INVALID_VALUE is returned instead.

Fixes 6 dEQP failing tests:
* dEQP-GLES3.functional.negative_api.shader.get_sampler_parameteriv
* dEQP-GLES3.functional.negative_api.shader.get_sampler_parameterfv
* dEQP-GLES3.functional.negative_api.shader.sampler_parameteri
* dEQP-GLES3.functional.negative_api.shader.sampler_parameteriv
* dEQP-GLES3.functional.negative_api.shader.sampler_parameterf
* dEQP-GLES3.functional.negative_api.shader.sampler_parameterfv

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 09:35:37 +01:00
Ilia Mirkin
e8e22cf65f glsl: remove bogus 'd' constant qualifiers
0.0 is a double anyways. Apparently my version of gcc was happy with
0.0d as well, but this is not true of all compilers.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89218

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 01:45:54 -05:00
Ilia Mirkin
0cade4ea2b st/mesa: don't die for ETC2 formats when no driver support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 01:41:28 -05:00
Eric Anholt
2a135c470e nir: Add an ALU op builder kind of like ir_builder.h
v2: Rebase on the nir_opcodes.h python code generation support.
v3: Use SSA values, and set an appropriate writemask on dot products.
v4: Make the arguments be SSA references as well.  This lets you stack up
    expressions in the arguments of other expressions, at the cost of
    having to insert a fmov/imov if you want to swizzle.  Also, add
    the generated file to NIR_GENERATED_FILES.
v5: Use more pythonish style for iterating the list.
v6: Infer the size of the dest from the size of the srcs, and auto-swizzle
    a single small src out to the appropriate size.
v7: Add little helpers for initializing the struct, add a typedef for the
    struct like other nir types have.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v6)
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> (v7)
2015-02-18 22:28:42 -08:00
Ilia Mirkin
de798bb937 docs: mark ARB_gpu_shader_fp64 as done in core
No driver support... yet. But core is ready.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Ilia Mirkin
e790a3c910 glsl/tests: add DOUBLE types
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 00:28:35 -05:00
Ilia Mirkin
2e7e7b8af6 glsl: add a lowering pass for frexp/ldexp with double arguments
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 00:28:35 -05:00
Dave Airlie
fffbf37124 glsl: lower double optional passes (v2)
These lowering passes are optional for the backend to request, currently
the TGSI softpipe backend most likely the r600g backend would want to use
these passes as is. They aim to hit the gallium opcodes from the standard
rounding/truncation functions.

v2: also lower floor in mod_to_floor

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
e6354a2850 glsl: implement double builtin functions
This implements the bulk of the builtin functions for fp64 support.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
2e626318e0 glsl/lower_instructions: add double lowering passes
This lowers double dot product and lrp to fma.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
8be5ee23de glsl: enable/disable certain lowering passes for doubles
We want to restrict some lowering passes to floats only,
and enable other for doubles.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Tapani Pälli
3bbaf71994 glsl: validate output types for shader stages
Patch fixes Piglit test:
   arb_gpu_shader_fp64/preprocessor/fs-output-double.frag

and adds additional validation for shader outputs.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
94f9ed701a glsl: add double support to lower_mat_op_to_vec
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
3773072169 glsl: Linking support for doubles
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
7aa3ffe2c5 glsl: Support double loop control
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
53383476d1 glsl: Support double inouts
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
a10275f762 glsl/lexer: Support double floats
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
942574bb24 glsl/parser: Support double floats
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
ba3bab264d glsl/ast: Support double floats
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
24626444c3 glsl: Add ubo lowering support for doubles
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
8609b53716 glsl: Add support doubles in optimization passes
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
41e9adfd83 glsl/ir: Add builder support for functions with double floats
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
eeae6251be glsl/ir: Add builtin constant function support for doubles
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
753ba6b999 glsl/ir: Add cloning support for doubles
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
57c6c3d3bd glsl/ir: Add printing support for doubles
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
5a69bdb599 glsl/ir: Add builtin function support for doubles
v2: add d2b, more ir_constant stuff (Ilia)

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Ilia Mirkin
53bf7c8fd2 glsl: fix uniform linking logic in the presence of structs
Add a enter/leave record callback so that the offset may be aligned to
the proper value. Otherwise only leaf fields are called, and the first
field needs to be aligned to the outer struct's base alignment while the
last field needs to be aligned to the inner struct's base alignment.

This removes most usage of the last field/record type values passed into
visit_field.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 00:28:34 -05:00
Ilia Mirkin
1ec715ce8b glsl: teach std140_base_alignment about samplers
These functions are about to be used more aggressively for determining
uniform layout. Samplers may be inside of structs, and it's easier to
reuse the existing base alignment logic.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 00:28:34 -05:00
Dave Airlie
fe23bb85ba glsl: Uniform linking support for doubles
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:34 -05:00
Dave Airlie
3af8db94cd glsl: Add double builtin type generation
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:33 -05:00
Dave Airlie
277f4d75a7 glsl: add ARB_gpu_shader_fp64 to the glsl extensions. (v2)
v2: add define bit (Tapani Pälli)

Patch makes following Piglit tests pass:
   arb_gpu_shader_fp64/preprocessor/define.vert
   arb_gpu_shader_fp64/preprocessor/define.frag

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:33 -05:00
Dave Airlie
5cc486b4e3 mesa: add double uniform support. (v5)
This adds support for the new uniform interfaces
from ARB_gpu_shader_fp64.

v2:
support ARB_separate_shader_objects ProgramUniform*d* (Ian)
don't allow boolean uniforms to be updated (issue 15) (Ian)

v3: fix size_mul
v4: Teach uniform update to take into account double precision (Topi)
v5: add transpose for double case (Ilia)

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:33 -05:00
Dave Airlie
bf257d2c90 glsl: Add double builtin type
This causes a lot of warnings about unchecked type in
switch statements - fix them later.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:33 -05:00
Dave Airlie
6227af2690 mesa: add ARB_gpu_shader_fp64 extension info (v2)
This just adds the entries to extensions.c and mtypes.h

v2: use core profile only (Ian)

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:33 -05:00
Dave Airlie
3c915e5c16 glapi: add ARB_gpu_shader_fp64 (v2)
Just add the xml file covering this extension,
and dummy interface files in mesa, and fix up
sanity tests.

v2:
Enable ProgramUniform*d* from ARB_separate_shader_objects (Ian)
use 40 instead of 43 for dispatch_sanity.cpp (Chris)
uncomment PU sanity tests.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:33 -05:00
Ilia Mirkin
069dab7576 freedreno: add missing PIPE_CAP_RESOURCE_FROM_USER_MEMORY to switch
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:25:03 -05:00
Ilia Mirkin
92fc8f04d6 freedreno/a3xx: add ARB_instanced_arrays support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:25:03 -05:00
Ilia Mirkin
f6b2e8af74 freedreno/a3xx: add support for vertexid and instanceid sysvals
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:25:03 -05:00
Ilia Mirkin
2c6e3d822b freedreno: pass number of instances to draw
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:25:03 -05:00
Ilia Mirkin
e4ddfeea65 freedreno/a3xx: add ETC2 decoding support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:25:03 -05:00
Ilia Mirkin
33edda7d97 st/mesa: pass etc2 textures to driver if supported
If the driver actually supports ETC2, don't decode it in software.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-02-19 00:25:03 -05:00
Ilia Mirkin
845b9e4294 llvmpipe,softpipe: only support ETC1, not the upcoming ETC2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-18 22:32:25 -05:00
Ilia Mirkin
0821efcb33 gallium: add ETC2 format support
No actual decoding is added, similar faking mechanism to bptc.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-02-18 22:32:25 -05:00
Ilia Mirkin
d622afdbc3 freedreno/a3xx: add hardware ETC1 support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-18 22:32:25 -05:00
Eric Anholt
935ee6b652 gallium/dri: Shut up a compiler warning.
The compiler doesn't see that buffers is set in the !image case and used
in the !image case.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-18 15:15:29 -08:00
Eric Anholt
6eadde51bb nir: Recognize and reduce duplicated fsats.
No effect on vc4 shader-db.

v2: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-02-18 14:47:51 -08:00
Eric Anholt
1907a3a7ee nir: Add a flag for lowering fsat.
vc4 cse/algebraic-disabled stats:
total instructions in shared programs: 44356 -> 44354 (-0.00%)
instructions in affected programs:     55 -> 53 (-3.64%)

v2: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-02-18 14:47:51 -08:00
Eric Anholt
e5ecf8e427 nir: Add a flag for lowering ffma.
vc4 cse/algebraic-disabled stats:
total uniforms in shared programs: 13966 -> 13791 (-1.25%)
uniforms in affected programs:     435 -> 260 (-40.23%)
total instructions in shared programs: 44732 -> 44356 (-0.84%)
instructions in affected programs:     9599 -> 9223 (-3.92%)

v2: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-02-18 14:47:51 -08:00
Eric Anholt
42a8ace66e nir: Add a flag for lowering fneg/ineg.
vc4 cse/algebraic-disabled stats:
total instructions in shared programs: 44911 -> 44732 (-0.40%)
instructions in affected programs:     11371 -> 11192 (-1.57%)

v2: Fix broken iabs(isub(0, a)) transformation.
v3: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-02-18 14:47:51 -08:00
Eric Anholt
cb95a228e8 nir: Add a flag for lowering fsqrt(x) to frcp(frsqrt(x)).
vc4 cse/algebraic-disabled stats:
total uniforms in shared programs: 13972 -> 13966 (-0.04%)
uniforms in affected programs:     408 -> 402 (-1.47%)
total instructions in shared programs: 44973 -> 44911 (-0.14%)
instructions in affected programs:     1551 -> 1489 (-4.00%)

v2: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-02-18 14:47:50 -08:00
Eric Anholt
ccf14bca4b nir: Add lowering of POW instructions if the lower flag is set.
This could be done in a separate pass like we do in GLSL IR, but it seems
to me like having the definitions of the transformations in the two
directions next to each other makes a lot of sense.

v2: Reorder the comment about the transformation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-18 14:47:50 -08:00
Eric Anholt
8e9dbfff17 nir: Conditionalize the POW reconstruction on shader compiler options.
Mesa has a shader compiler struct flagging whether GLSL IR's opt_algebraic
and other passes should try and generate certain types of opcodes or
patterns.  Extend that to NIR by defining our own struct, which is
automatically generated from the Mesa struct in glsl_to_nir and provided
directly by the driver in TGSI-to-NIR.

v2: Split out the previous two prep patches.
v3: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v2)
2015-02-18 14:47:50 -08:00
Eric Anholt
955a6bb57d nir: Add an optional expression controlling nir_algebraic xforms.
This will be used so that we can customize the transforms for the target
GPU, so we don't un-lower expressions that had already been lowered (or
introduce new lowering transformations that not all GPUs want)

v2: Drop the complication of having the condition->index dictionary, since
    we don't actually expect there to be many different conditions (change
    by Kenneth).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-18 14:47:50 -08:00
Eric Anholt
f90bb54734 nir: Add a nir_shader_compiler_options struct pointed to by the shaders.
This will be used to give the optimization passes a chance to customize
behavior for the particular target device.

v2: Rebase to master (no TGSI->NIR present)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2015-02-18 14:47:50 -08:00
Jordan Justen
4a95be9772 i965/simd8vs: Fix SIMD8 atomics (read-only)
An update for d9cd982d55.

A similar change was needed for CS to allow the piglit test
tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test
to pass.

The previous change (d9cd982d) should fix cases that write atomics,
such as atomicCounterIncrement, and this change will fix cases than
only read atomics, such as atomicCounter.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-02-18 14:33:36 -08:00
Chia-I Wu
b0e26173b2 ilo: fix PCB alloc asserts on Gen7.5 GT3
GT3 has two slices and all limits are doubled.
2015-02-18 14:20:29 -07:00
Chia-I Wu
68573f57ee ilo: fix compiler warnings
Fix -Wmaybe-uninitialized warnings.  The change to
ilo_blit_resolve_slices_for_hiz() is a potential bug fix.
2015-02-18 14:20:29 -07:00
Adam Jackson
b290330e3b i915: For the love of all that is holy, stop saying "IGD"
a001 and a011 are pineview chips.  Say so.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-02-18 14:51:16 -05:00
Emil Velikov
8a71fd8d49 auxiliary/vl: honour the DRI2PROTO_CFLAGS
Otherwise for non-default installations the build will fail to find the
headers and error out.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-18 11:02:50 +00:00
Emil Velikov
dd7b6670a2 auxiliary/vl: Build vl_winsys_dri.c only when needed.
With commit c39dbfdd0f7(auxiliary/vl: bring back the VL code for the dri
targets) we did not fully consider users of dri-swrast alone. Thus we
ended up trying to compile the dri2 specific code on platform which lack
it - Cygwin for example.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reported-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jon TURNEY <jon.turney@dronecode.org.uk>
2015-02-18 11:02:50 +00:00
Emil Velikov
3018c4a56a automake: Use AM_DISTCHECK_CONFIGURE_FLAGS
Currently we use DISTCHECK_CONFIGURE_FLAGS, which is reserved for
the user. As with other variables, one should use the AM_ variable
within the makefile.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-18 11:02:44 +00:00
Emil Velikov
b0eada1707 glx: do not leak the dri2 extension information
The XExtensionInfo is allocated dynamically (if the pointer is NULL)
in the XEXT_GENERATE_FIND_DISPLAY macro. On the other hand the
macro XEXT_GENERATE_CLOSE_DISPLAY does not check/free the memory.

Follow the example set by dri1 and appledri, and use a static variable.

Spotted while hunting "still reachable" leaks in Waffle.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-18 11:02:25 +00:00
Michel Dänzer
4db985a5fa Revert "radeon/llvm: enable unsafe math for graphics shaders"
This reverts commit 0e9cdedd2e.

It caused the grass to disappear in The Talos Principle.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89069
Cc: "10.5 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-02-18 17:06:32 +09:00
Ilia Mirkin
b7a85bee83 st/mesa: add ARB_pipeline_statistics_query support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-02-18 02:10:47 -05:00
Ben Widawsky
e206785b57 i965: implement ARB_pipeline_statistics_query
NOTE: The implementation was initially one patch, this. All the history is kept
here, even though all the core mesa changes were moved to the parent of this
patch.

This patch implements ARB_pipeline_statistics_query. This addition to GL does
not add a new API. Instead, it adds new tokens to the existing query APIs. The
work to hook up the new tokens is trivial due to it's similarity to the previous
work done for the query APIs. I've implemented all the new tokens to some
degree, but have stubbed out the untested ones at the entry point for Begin().
Doing this should allow the remainder of the code to be left in.

The new tokens give GL clients a way to obtain stats about the GL pipeline.
Generally, you get the number of things going in, invocations, and number of
things coming out, primitives, of the various stages. There are two immediate
uses for this, performance information, and debugging various types of
misrendering. I doubt one can use these for debugging very complex applications,
but for piglit tests, it should be quite useful.

Tessellation shaders, and compute shaders are not addressed in this patch
because there is no upstream implementation. I've implemented how I believe
tessellation shader stats will work for Intel hardware (though there is a bit of
ambiguity). Compute shaders are a bit more interesting though, and I don't yet
know what we'll do there.

For the lazy, here is a link to the relevant part of the spec:
https://www.opengl.org/registry/specs/ARB/pipeline_statistics_query.txt

Running the piglit tests
http://lists.freedesktop.org/archives/piglit/2014-November/013321.html
(http://cgit.freedesktop.org/~bwidawsk/piglit/log/?h=pipe_stats)
yield the following results:

> piglit-run.py -t stats tests/all.py output/pipeline_stats
> [5/5] pass: 5 Running Test(s): 5

v2:
- Don't allow pipeline_stats to be per stream (Ilia). This may (not sure) be
  needed for AMD_transform_feedback4, which we do not support.
   > If AMD_transform_feedback4 is supported then GEOMETRY_SHADER_PRIMITIVES_-
   > EMITTED_ARB counts primitives emitted to any of the vertex streams for
   > which STREAM_RASTERIZATION_AMD is enabled.
- Remove comment from GL3.txt because it is only used for extensions that are
  part of required versions (Ilia)
- Move the new tokens to a new XML doc instead of using the main GL4x.xml (Ilia)
- Add a fallthrough comment (Ilia)
- Only divide PS invocations by 4 on HSW+ (Ben)

v3:
- Add ARB_pipeline_statistics_query to relnotes.html
- Add ARB_pipeline_statistics_query.xml to the Makefile.am, and master XML (Ilia)
- Correct extension number (Ilia)
- Add link to xml in the main GL API xml (Ilia)
- remove special GS case from gen6_end_query (Ian)
- Make lookup table static so gcc doesn't initialized it on every call (Ian)
- Use if (_mesa_has_geometry_shaders(ctx)) instead of explicit checks (Ian)
- Core mesa parts moved into a prep patch (Ilia)

v4:
- Change to 10.6 relnotes since we missed 10.5 window
- Moved compute shader stuff into the switch statement (Jordan)
- Jordan: Add compute shader support

v5:
- Fixed relnote style (Ilia)

v6:
- Rebased on master which beat me to adding the first relnotes - essentially
  this undoes v5 (which had a typo anyway)
- Some code style fixes (Ken)
- Remove some excess comments (Ken)
- Unify tessellation failure style - unreachable (Ken)
- Fix workaround comment for PS invocations (Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 23:01:12 -08:00
Ben Widawsky
86ffc36d3c mesa: Add support for the ARB_pipeline_statistics_query extension
This was originally part of a single patch which added the extension, and
implemented it for i965 classic. For information about the evolution of the
patch, please see the subsequent commit.

One difference here as compared to the original mega patch is this does build
support for the compute shader query. Since it cannot be tested on any platform,
it will always return NULL for now. Jordan has already written a patch to
address this, and when that patch lands, this logic can be modified.

v2: Fix typo in subject (Brian Paul)
Add checks for desktop gl (Ilia)
Fail for any callers for now (Ilia)
Update QueryCounterBits for new tokens (Ilia)
Jordan: Use _mesa_has_compute_shaders

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

v3: Rebased on patch which adds the proper information to unstub tessellation
shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 23:01:11 -08:00
Jordan Justen
2cd2831500 mesa: Add _mesa_has_compute_shaders
v2 (Ben): Change GLboolean to bool as requested by Ian

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2015-02-17 23:00:15 -08:00
Fabian Bieler
599cbe5508 mesa: Add ARB_tessellation_shader to extension table.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 22:06:19 -08:00
Kenneth Graunke
d523fefa75 i965: Prefer Meta over the BLT for BlitFramebuffer.
There's some debate about whether we should use Meta or BLORP,
but either should run circles around the BLT engine.

In particular, this means that Gen8+ will use the 3D engine for blits,
like we do on Gen6-7.

Improves performance in "copypixrate -blit -back" (from Mesa demos)
by 232.037% +/- 3.15795% (n=10) on Broadwell GT3e.

v2: Rebase on Laura's changes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-17 22:06:06 -08:00
Matt Turner
bb33a31c38 i965/fs: Add algebraic optimizations for MAD.
total instructions in shared programs: 5764176 -> 5763808 (-0.01%)
instructions in affected programs:     25121 -> 24753 (-1.46%)
helped:                                164
HURT:                                  2

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
8cfd1e2ac6 i965/fs: Emit MAD instructions when possible.
Previously we didn't emit MAD instructions since they cannot take
immediate arguments, but with the opt_combine_constants() pass we can
handle this properly.

total instructions in shared programs: 5920017 -> 5733278 (-3.15%)
instructions in affected programs:     3625153 -> 3438414 (-5.15%)
helped:                                22017
HURT:                                  870
GAINED:                                91
LOST:                                  49

Without constant pooling, this patch is a complete loss:

total instructions in shared programs: 5912589 -> 5987888 (1.27%)
instructions in affected programs:     3190050 -> 3265349 (2.36%)
helped:                                1564
HURT:                                  17827
GAINED:                                27
LOST:                                  101

And since the constant pooling patch by itself hurt a bunch of things,
from before constant pooling to this patch the results are:

total instructions in shared programs: 5895414 -> 5747946 (-2.50%)
instructions in affected programs:     3617993 -> 3470525 (-4.08%)
helped:                                20478
HURT:                                  4469
GAINED:                                54
LOST:                                  146

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
36bc5f06dd i965/fs: Allow immediates in MAD and LRP instructions.
And then the opt_combine_constants() pass will pull them out into
registers. This will allow us to do some algebraic optimizations on MAD
and LRP.

total instructions in shared programs: 5946656 -> 5931320 (-0.26%)
instructions in affected programs:     778247 -> 762911 (-1.97%)
helped:                                3780
HURT:                                  6
GAINED:                                12
LOST:                                  12

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
2dad1e3abd i965/fs: Add pass to combine immediates.
total instructions in shared programs: 5885407 -> 5940958 (0.94%)
instructions in affected programs:     3617311 -> 3672862 (1.54%)
helped:                                3
HURT:                                  23556
GAINED:                                31
LOST:                                  165

... but will allow us to always emit MAD instructions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
0d8f27eab7 i965/fs: Remove force_writemask_all assertion for execsize < 8.
This doesn't seem to be necessary.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
662c645318 i965/cfg: Add function to generate a dot file of the dominator tree.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
b06eef05d0 i965/cfg: Add function to generate a dot file of the CFG.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
0e3dbc0248 i965/cfg: Calculate the immediate dominators.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
08f304bb3b i965/cfg: Allow cfg::dump to be called without a visitor.
The fs_visitor's dump_instruction() implementation calls cfg_t()
indirectly through calculate_live_intervals, so if you have an infinite
loop in the CFG code, you can't call cfg::dump(fs_visitor *) to debug
it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Matt Turner
1af5c4a526 i965: Allow exec_list sentinels as arguments to insert functions.
To insert an instruction at the end of a basic block, we typically do
something like

   inst = block->last_non_control_flow_inst();
   inst->insert_after(block, new_inst);

But blocks can consist of a single control flow instruction, so inst
will actually be the exec_list's head sentinel. We shouldn't use it as
if it were a regular instruction, but it is safe to insert something after
it.

This patch avoids assert-failing because an exec_list sentinel wasn't in
the basic block's instruction list.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-17 20:44:09 -08:00
Alan Coopersmith
b7ce7c00e3 Make _mesa_swizzle_and_convert argument types in .c match those in .h
Caused Solaris Studio compilers to fail to build with errors about
incompatible function redefinitions.

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-17 18:16:33 -08:00
Alan Coopersmith
4671dca0ee Use __typeof instead of typeof with Solaris Studio compilers
While the C compiler accepts typeof, C++ requires __typeof.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86944
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-17 18:16:33 -08:00
Alan Coopersmith
d602fbd861 Avoid fighting with Solaris headers over isnormal()
When compiling in C99 or C++11 modes, Solaris defines isnormal() as
a macro via <math.h>, which causes the function definition to become
too mangled to compile.

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-17 18:16:33 -08:00
Alan Coopersmith
815b3bd096 Remove extraneous ; after DECL_TYPE usage
The macro is defined to provide a trailing ; so this caused the expansion
to end in ";;" which made the Solaris Studio compilers issue warnings for
every line of:
  "builtin_type_macros.h", line 113: Warning: extra ";" ignored.
for every file that included the header, filling build logs with thousands
of useless warnings.

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-17 18:16:33 -08:00
Alan Coopersmith
60ad5103b9 Bracket arguments to tr so they work with Solaris tr
https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.69/html_node/Limitations-of-Usual-Tools.html#index-g_t_0040command_007btr_007d-1842

Without this fix, egl fails to build on Solaris, with the error:

<command-line>:0:22: error: '_EGL_PLATFORM_x11' undeclared (first use in this function)
egldisplay.c:207:31: note: in expansion of macro '_EGL_NATIVE_PLATFORM'
             native_platform = _EGL_NATIVE_PLATFORM;
                               ^

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-17 18:16:32 -08:00
Kenneth Graunke
76960a55e6 glsl: Reduce memory consumption of copy propagation passes.
opt_copy_propagation and opt_copy_propagation_elements create new ACP
and Kill sets each time they enter a new control flow block.  For if
blocks, they also copy the entire existing ACP set contents into the
new set.

When we exit the control flow block, we discard the new sets.  However,
we weren't freeing them - so they lived on until the pass finished.
This can waste a lot of memory (57MB on one pessimal shader).

This patch makes the pass allocate ACP entries using this->acp as the
memory context, and Kill entries out of this->kill.  It also steals
kill entries when moving them from the inner kill list to the parent.

It then frees the lists, including their contents.

v2: Move ralloc_free(this->acp) just before this->acp = orig_acp
    (suggested by Eric Anholt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.5 10.4" <mesa-stable@lists.freedesktop.org>
2015-02-17 17:33:27 -08:00
Chris Forbes
eda3dd0076 i965: Add device limits for tess threads & URB entries
This should cover all platforms prior to Skylake.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
2015-02-17 17:33:27 -08:00
Dave Airlie
e8e4437ed0 r600g/sb: treat undefined values like constants
When we schedule an instructions with undefined value, we
eventually will use 0, which is a constant, however sb wasn't
taking this into account and creating ops with illegal scalar
swizzles.

this replaces my fix for op3 in t slots.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-18 11:13:06 +10:00
Kenneth Graunke
598d144cef i915c: Use the actual MIN instruction.
Matt Turner noticed that the hardware has always had a MIN
instruction, but the driver always used MAX+MOV for no
apparent reason.

This should cut an instruction, and a temporary, allowing
more programs to run in hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 15:24:15 -08:00
Kenneth Graunke
7bf774034a i915g: Use the actual MIN instruction.
Matt Turner noticed that the hardware has always had a MIN
instruction, but the driver always used MAX+MOV for no
apparent reason.

This should cut an instruction, and a temporary, allowing
more programs to run in hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 15:24:15 -08:00
Kenneth Graunke
27b6ef7eca i965: Add a function to disassemble an instruction from the 4 dwords.
I used this a while back when debugging GPU hangs, and it seems like it
could be useful, so I figured I'd add it so people can use it in the
debugger.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-17 15:24:15 -08:00
Kenneth Graunke
0b499abb51 i965: Do Sandybridge workaround flushes before each primitive.
Sandybridge requires the post-sync non-zero workaround in a ton of
places, and if you ever miss one, the GPU usually hangs.

Currently, we try to track exactly when a workaround flush is
necessary (via the brw->batch.need_workaround_flush flag).  This is
tricky to get right, and we've botched it several times in the past.

This patch unconditionally performs the post-sync non-zero flush at the
start of each primitive's state upload (including BLORP).  We drop the
needs_workaround_flush flag, and drop all the other callers, as the
flush has already been performed.

We have no data to indicate that simply flushing all the time will
hurt performance, and it has the potential to help stability.

v2: Add post-sync workaround to initial GPU state upload to be extra
    cautious (suggested by Chad Versace).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2015-02-17 15:24:14 -08:00
Laura Ekstrand
92163482bd main: Fixed _mesa_GetCompressedTexImage_sw to copy slices correctly.
Previously array textures were not working with GetCompressedTextureImage,
leading to failures in the test
arb_direct_state_access/getcompressedtextureimage.c.

Tested-by: Laura Ekstrand <laura@jlekstrand.net>
Reviewed-by: Brian Paul <brianp@vmware.com>

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-17 13:45:48 -08:00
Ian Romanick
4470bf1f49 i965/vec4: Silence unused parameter warnings
brw_vec4_copy_propagation.cpp:243:59: warning: unused parameter 'reg' [-Wunused-parameter]
                    int arg, struct copy_entry *entry, int reg)
                                                           ^

brw_vec4_generator.cpp:869:57: warning: unused parameter 'inst' [-Wunused-parameter]
 vec4_generator::generate_unpack_flags(vec4_instruction *inst,
                                                         ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 12:29:58 -08:00
Ian Romanick
2524f9b80d mesa/main: Silence unused parameter warning
Just remove the _mesa_free_lighting_data function.  The body has been
empty since the shine table was moved into the tnl module (commit
ba1d921).

main/light.c:1216:46: warning: unused parameter 'ctx' [-Wunused-parameter]
 _mesa_free_lighting_data( struct gl_context *ctx )
                                              ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 12:29:58 -08:00
Ian Romanick
1424bbfb57 util/hash: Silence comparison between signed and unsigned integer warnings in tests
delete_management.c:56:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < size; i++) {
                  ^
delete_management.c:69:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = size - 100; i < size; i++) {
                           ^
delete_management.c:79:31: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       assert(key_value(entry->key) >= size - 100 &&
                               ^
delete_management.c:79:70: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       assert(key_value(entry->key) >= size - 100 &&
                                                                      ^
insert_many.c:56:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < size; i++) {
                  ^
insert_many.c:62:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < size; i++) {
                  ^
insert_many.c:67:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    assert(ht->entries == size);
                  ^
random_entry.c:62:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    for (i = 0; i < size; i++) {
                  ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 12:29:58 -08:00
Ian Romanick
3d8f9570cd util/hash: Silence unused parameter warnings in tests
delete_and_lookup.c:37:21: warning: unused parameter ‘key’ [-Wunused-parameter]
 badhash(const void *key)
                     ^
delete_and_lookup.c:43:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
delete_and_lookup.c:43:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
collision.c:34:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
collision.c:34:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
destroy_callback.c:50:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
destroy_callback.c:50:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
insert_many.c:46:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
insert_many.c:46:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
insert_and_lookup.c:34:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
insert_and_lookup.c:34:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
null_destroy.c:32:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
null_destroy.c:32:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
random_entry.c:52:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
random_entry.c:52:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
remove_null.c:34:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
remove_null.c:34:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^
replacement.c:34:10: warning: unused parameter ‘argc’ [-Wunused-parameter]
 main(int argc, char **argv)
          ^
replacement.c:34:23: warning: unused parameter ‘argv’ [-Wunused-parameter]
 main(int argc, char **argv)
                       ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 12:29:58 -08:00
Ian Romanick
147afac80c glcpp: Silence GCC warning
glcpp/glcpp.c:124:1: warning: ‘static’ is not at beginning of declaration [-Wold-style-declaration]
 const static struct option
 ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-17 12:29:58 -08:00
Marek Olšák
2ead74888a radeonsi: fix a crash if a stencil ref state is set before a DSA state
+ minor indentation fixes

Discovered by Axel Davy.

This can't be reproduced with any app, because all state trackers set a DSA
state first.

Cc: 10.5 10.4 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2015-02-17 17:41:00 +01:00
Marek Olšák
7713d594e4 r600g,radeonsi: implement GL_AMD_pinned_memory
v2: update release notes

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
c688988b0d winsys/radeon: test the userptr ioctl to see if it's present
There is no other way to check for support.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
064847122a winsys/radeon: allow unaligned size for user-memory buffers
This is not required, but being user-friendly doesn't hurt.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
e8d727a2b6 winsys/radeon: allow mapping a user buffer
OpenGL requires this.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
8b587ee701 gallium: add interface and state tracker support for GL_AMD_pinned_memory
v2: add alignment restrictions to docs, fix indentation in headers

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
11ebb03c26 mesa: implement GL_AMD_pinned_memory
It's not possible to query the current buffer binding, because the extension
doesn't define GL_..._BUFFER__BINDING_AMD.

Drivers should check the target parameter of Drivers.BufferData. If it's
equal to GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD, the memory should be pinned.
That's all there is to it.

A piglit test is on the piglit mailing list.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Christian König
4fa61b1a23 winsys/radeon: add user pointer support
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
e8625a29fe mesa: fix AtomicBuffer typo in _mesa_DeleteBuffers
Cc: 10.5 10.4 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
218b15715e radeonsi: initialize TC_L2_dirty to false after buffer allocation
I forgot to do this, though "true" should have no effect on correctness.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
a27b74819a radeonsi: small fix in SPI state
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
5f1cef76f9 r600g,radeonsi: use fences to implement PIPE_QUERY_GPU_FINISHED
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89014

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
f1103f6a1e r600g,radeonsi: demote TIMESTAMP_DISJOINT query to be a software query
The query result is always constant.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-17 17:31:48 +01:00
Dave Airlie
59292b38eb st/glsl_to_tgsi: fix whitespace
everytime I open this file in emacs with show trailing whitespace
or git add from it my screen flares with red.

Just do a general cleanup, makes working on fp64 support not as
jarring.

I'm not saying this is perfect, its just better than before.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-17 14:49:19 +10:00
Ilia Mirkin
b53fbec01d glsl/tests: add IMAGE type.
This fixes a warning when running make check.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-17 11:26:06 +10:00
Chia-I Wu
faaf13f6bf ilo: always set up BLEND_STATE on Gen8
There is now an DW0 that seems to be always referenced.
2015-02-17 04:59:33 +08:00
Chia-I Wu
6d4475d7bf ilo: fix alpha test on Gen8
Shoudl use GEN8_BLEND_DW0_ALPHA_TEST_ENABLE instead of
GEN6_RT_DW1_ALPHA_TEST_ENABLE (and others).
2015-02-17 04:59:33 +08:00
Ben Widawsky
d9cd982d55 i965/simd8vs: Fix SIMD8 atomics
The short version: we need to set bits in R0.7 which provide a mask to be used
for PS kill samples/pixels. Since the VS has no such concept, we just need to
set all 1.

The longer version...
Execution for SIMD8 atomics is defined as follows:
SIMD8: The low 8 bits of the execution mask are ANDed with 8 bits of the
Pixel/Sample Mask from the message header. For the typed messages, the Slot
Group in the message descriptor selects either the low or high 8 bits. For the
untyped messages, the low 8 bits are always selected. The resulting mask is used
to determine which slots are read into the destination GRF register (for read),
or which slots are written to the surface (for write). If the header is not
present, only the low 8 bits of the execution mask are used.

The message header for untyped messages is defined in R0.7 "This field contains
the 16-bit pixel/sample mask to be used for SIMD16 and SIMD8 messages. All 16
bits are used for SIMD16 messages.  For typed SIMD8 messages, Slot Group selects
which 8 bits of this field are used. For untyped SIMD8 messages, the low 8 bits
of this field are used." Furthermore, "The message header for the untyped
messages only needs to be delivered for pixel shader threads, where the
execution mask may indicate pixels/samples that are enabled only due to
derivative (LOD) calculations, but the corresponding slot on the surface must
not be accessed." We're not using a pixel shader here, but AFAICT, this mask is
used for all stages.

This leaves two options, Remove the header, or make the VS code emit the correct
thing for the header. I believe one of the goals of using SIMD8 VS was to get as
much code reuse as possible, and so I chose the latter. Since the VS has no such
thing as kill instructions, the mask is derived simple as all 1's.

v2:
Add a comment to the code (stolen from Curro on the mailing list)
Change the control flow style (Curro + Jason)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87258
Cc: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-16 12:22:44 -08:00
Brian Paul
9ac3700146 mesa: move assertion after declarations in texstore.c
To fix MSVC build.
2015-02-16 08:39:25 -07:00
Brian Paul
4d2cee4d5e mesa: silence uninitialized var warning in get_tex_rgba_uncompressed()
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-16 08:33:28 -07:00
Neil Roberts
bb77745681 meta: Fix saving the results of the current occlusion query
When restoring the current state in _mesa_meta_end it was previously trying to
copy the on-going sample count of the current occlusion query into the new
query after restarting it so that the driver will continue adding to the
previous value. This wouldn't work for two reasons. Firstly, the query might
not be ready yet so the Result member will usually be zero. Secondly the saved
query is stored as a pointer to the query object, not a copy of the struct, so
it is actually restarting the exact same object. Copying the result value is
just copying between identical addresses with no effect. The call to
_mesa_BeginQuery will have always reset it back to zero.

This patch fixes it by making it actually wait for the query object to be
ready before grabbing the previous result. The downside of doing this is that
it could introduce a stall but I think this situation is unlikely so it might
not matter too much. A better solution might be to introduce a real
suspend/resume mechanism to the driver interface. This could be implemented in
the i965 driver by saving the depth count multiple times like it does in the
i945 driver.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88248
Reviewed-by: Carl Worth <cworth@cworth.org>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-16 12:09:17 +00:00
Francisco Jerez
946e29847b i965/vec4: Override destination register writemask in sampler message send.
This line was removed by accident in commit
16b9112574 causing a regression in the
ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_vert Khronos conformance
test.  It's necessary because the swizzle_result() code below expects
all four components of the vector to be valid.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89094
Tested-by: Lu Hua <huax.lu@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-16 13:51:08 +02:00
Iago Toral Quiroga
0a811e1d1e i965: Fix a crash in the texture gradient lowering pass with cube samplers
We need to swizzle the rhs to match the number of components in the writemask,
otherwise we'll hit an assertion in ir_assignment.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-16 10:53:48 +01:00
Iago Toral Quiroga
ba426522dd mesa: Fix element count for byte-swaps in texstore, readpix and texgetimage
Some old format conversion code in pack.c implemented byte-swapping like this:

GLint comps = _mesa_components_in_format(dstFormat);
GLint swapSize = _mesa_sizeof_packed_type(dstType);
if (swapSize == 2)
   _mesa_swap2((GLushort *) dstAddr, n * comps);
else if (swapSize == 4)
   _mesa_swap4((GLuint *) dstAddr, n * comps);

where n is the pixel count. But this is incorrect for packed formats,
where _mesa_sizeof_packed_type is already returning the size of a pixel
instead of the size of a single component, so multiplying this by the
number of components in the format results in a larger element count
for _mesa_swap than we want.

Unfortunately, we followed the same implementation for byte-swapping
in the rewrite of the format conversion code for texstore, readpixels
and texgetimage.

This patch computes the correct element counts for _mesa_swap calls
by computing the bytes per pixel in the image and dividing that by the
swap size to obtain the number of swaps required per pixel. Then multiplies
that by the number of pixels in the image to obtain the swap count that
we need to use.

Also, when handling byte-swapping in texstore_rgba, we were ignoring
the image's depth. This patch fixes this too.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-16 10:51:18 +01:00
Iago Toral Quiroga
4b249d2eed mesa: Handle transferOps in texstore_rgba
In the recent rewrite of the format conversion code we did not handle this.
This patch adds the missing support.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89068
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-16 10:49:41 +01:00
Matt Turner
a2299bfbbd i965/fs: Handle U/UW-type immediates in the generator. 2015-02-15 14:29:08 -08:00
Matt Turner
7a83f7d481 i965/fs: Handle W/UW-type immediates in dump_instructions(). 2015-02-15 14:29:08 -08:00
Matt Turner
74ef90acd7 i965: Let dump_instructions() work before calculate_cfg().
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-02-15 12:24:11 -08:00
Matt Turner
fa124a337c i965/fs: Call calculate_cfg() before optimize().
The CFG is fundamental to the FS IR, not merely a piece of optimization.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-02-15 12:24:11 -08:00
Matt Turner
eb47d0efd3 i965: Optimize multiplication by -1 into a negated MOV.
instructions in affected programs:     968 -> 942 (-2.69%)
helped:                                4

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-15 12:24:10 -08:00
Matt Turner
e8a6f2ad65 i965: Add an is_negative_one() method.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-15 12:24:10 -08:00
Matt Turner
72b9f8db2a i965/vec4/vp: Use vec4_visitor::CMP.
... instead of emit(BRW_OPCODE_CMP, ...). In commit 6b3a301f I changed
vec4_visitor::CMP to set the destination's type to that of src0. In the
following commit (2335153f) I removed an apparently now unnecessary work
around for Gen8 that did the same thing.

But there was a single place that emitted a CMP instruction without
using the vec4_visitor::CMP function. Use it there.

And change dst_null_d to dst_null_f for good measure, since ARB vp
doesn't have integers.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89032
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-15 12:24:10 -08:00
Chia-I Wu
69b1693ef3 ilo: fix some state pointer commands on Gen8
3DSTATE_CC_STATE_POINTERS seems to be ignored when bit 0 of DW1 is not set.
Follow i965 and set the bit for 3DSTATE_CC_STATE_POINTERS and
3DSTATE_BLEND_STATE_POINTERS.  Add gen checks for all state pointer commands.
2015-02-15 13:32:41 +08:00
Ilia Mirkin
854eb06bee nvc0: allow holes in xfb target lists
Tested with a modified xfb-streams test which outputs to streams 0, 2,
and 3.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-14 17:15:54 -05:00
Ilia Mirkin
80d373ed5b st/mesa: treat resource-less xfb buffers as if they weren't there
If a transform feedback buffer's size is 0, st_bufferobj_data doesn't
end up creating a buffer for it. There's no point in trying to write to
such a buffer, so just pretend as if it's not really there.

This fixes arb_gpu_shader5-xfb-streams-without-invocations on nvc0.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-14 17:15:54 -05:00
Ilia Mirkin
68e4f3f572 nvc0: bail out of 2d blits with non-A8_UNORM alpha formats
This fixes the teximage-colors uploads with GL_ALPHA format and
non-GL_UNSIGNED_BYTE type.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-14 17:15:54 -05:00
Jason Ekstrand
3c57a59527 i965/nir: Don't support gl_FrontFacing as an input variable
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-14 13:47:16 -08:00
Jason Ekstrand
dd110cdfd8 nir: Make gl_FrontFacing a system_value
GLSL IR labels gl_FrontFacing as an input variable and not a system value.
This commit makes NIR silently translate gl_FrontFacing to a system value
so that it properly gets translated into a load_system_value intrinsic.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-14 13:47:16 -08:00
Jason Ekstrand
785b22caee i965/nir: Add support for nir_intrinsic_load_front_face
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-14 13:47:16 -08:00
Jason Ekstrand
929f43851e nir/lower_phis_to_scalar: Fix some logic in is_phi_scalarizable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-14 13:46:59 -08:00
Shawn Starr
7df256add2 clover: Use Legacy PassManager for LLVM trunk (3.7)
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Shawn Starr <shawn.starr@rogers.com>
2015-02-14 01:31:57 +00:00
Chia-I Wu
8323796840 ilo: fix JIP/UIP on Gen8
UIP is in DW2 and JIP is in DW3 on Gen8.  Also, the units are in bytes.
2015-02-14 06:52:36 +08:00
Chia-I Wu
c62507f42c ilo: do not set GEN6_THREADCTRL_SWITCH
It is not needed on Gen6+, and it appears to be broken on Gen8.
2015-02-14 06:52:36 +08:00
Chia-I Wu
7504b357d4 ilo: correct ISA UIP/JIP decoding for Gen8
JIP is int32_t and UIP is in DW2 on Gen8.
2015-02-14 06:52:36 +08:00
Chia-I Wu
f8126fed95 ilo: prepare for 64-bit immediates decoding
Replace imm32 by imm64.  Add more ways (UD, D, etc) to access the immediate.
2015-02-14 06:52:36 +08:00
Chia-I Wu
9ed376a76c ilo: cleanup ISA DW1 decoding
Decode the higher and lower 16 bits separately.
2015-02-14 06:52:36 +08:00
Chia-I Wu
db362983d1 ilo: cleanup ISA DW0 decoding
Add disasm_inst_decode_dw0_opcode_gen6() to decode the opcode.  Simplify
branch_ctrl/acc_wr_ctrl decoding.
2015-02-14 06:52:36 +08:00
Chia-I Wu
5fc0dd8953 ilo: update some outdated gen checks
Update gen checks for 3DSTATE_POLY_STIPPLE_OFFSET,
3DSTATE_POLY_STIPPLE_PATTERN, 3DSTATE_LINE_STIPPLE, and
3DSTATE_AA_LINE_PARAMETERS.
2015-02-14 06:52:36 +08:00
Chia-I Wu
8b9446dbeb ilo: fix rectlist length on Gen8
5 PIPE_CONTROLs, 2 3DSTATE_WM_HZ_OP, and depth buffer setup require 65 DWords.
2015-02-14 06:52:36 +08:00
Chia-I Wu
baba8b2745 ilo: fix 3DSTATE_VF_TOPOLOGY
The pipe primitive type was wrongly translated twice.
2015-02-14 06:52:36 +08:00
Jose Fonseca
c944b91190 os,llvmpipe: Set rasterizer thread names on Linux.
To help identify llvmpipe rasterizer threads -- especially when there
can be so many.

We can eventually generalize this to other OSes, but for that we must
restrict the function to be called from the current thread.  See also
http://stackoverflow.com/a/7989973

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-02-13 19:42:21 +00:00
Jose Fonseca
b09f25428f uti/u_atomic: Don't test p_atomic_add with booleans.
Add another class of tests.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=89112

I failed to spot this in my previous change, because bool was a typedef
for char on the system I tested.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-02-13 19:39:27 +00:00
Tapani Pälli
e333035c47 mesa: fix OES_texture_float texture render target behavior
Current implementation allowed usage of unsized type texture GL_FLOAT
and GL_HALF_FLOAT as a render target as this was 'expected behavior' by
WEBGL_oes_texture_float and is also allowed by the oes-texture-float
WebGL test. However this broke some ES3 conformance tests that do not
accept such behavior. Patch sets such an fbo incomplete as expected by
the ES3 conformance tests. Textures with sized types like RGBA32F will
still continue to work as render targets.

v2: code style cleanups (Ian Romanick, Matt Turner)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88905
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
2015-02-13 07:51:13 +02:00
Eric Anholt
3f1e1287fd vc4: Make SF be a flag on the QIR instructions.
Right now the places that used to emit a mov.sf just put the SF on the
previous instruction when it generated the source of the SF value.  Even
without optimization to push the sf up further (and kill thus potentially
kill more MOVs), this gets us:

total uniforms in shared programs: 13455 -> 13457 (0.01%)
uniforms in affected programs:     3 -> 5 (66.67%)
total instructions in shared programs: 40296 -> 40198 (-0.24%)
instructions in affected programs:     12595 -> 12497 (-0.78%)
2015-02-12 16:33:16 -08:00
Eric Anholt
4413861dd8 r200: Drop unused variable.
Quiets compiler warning since e7f2f2dea5.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-12 16:33:16 -08:00
Eric Anholt
55de910f90 i965: Quiet another compiler warning about uninitialized values.
The compiler can't tell that we're always going to hit the first if block
on the first time through the loop.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-12 16:33:16 -08:00
Eric Anholt
f65e26478b i965: Move some asserts to unreachable.
If execution was supposed to be supported in this case, we'd run into
trouble from completely uninitialized sat_imm values.

v2: Drop the '!' before the string.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-12 16:32:10 -08:00
Eric Anholt
6489cb1ae6 i965: Shut up a compiler warning about uninitialized var.
We always pass this argument, even if it won't be used by the particular
texture op.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-12 16:29:53 -08:00
Carl Worth
55a57834bf Revert use of Mesa IR optimizer for ARB_fragment_programs
Commit f82f2fb3dc added use of the Mesa
IR optimizer for both ARB_fragment_program and ARB_vertex_program, but
only justified the vertex-program portions with measured performance
improvements.

Meanwhile, the optimizer was seen to generate hundreds of unused
immediates without discarding them, causing failures.

Discard the use of the optimizer for now to fix the regression. (In
the future, we anticpate things moving from Mesa IR to NIR for better
optimization anyway.)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82477

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

CC: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-02-12 13:33:12 -08:00
Jose Fonseca
1ba9f9e62c util/u_atomic: Use lower-case variables in _Interlocked* helpers. 2015-02-12 19:32:21 +00:00
Jose Fonseca
531d47baa8 util/u_atomic: Add _InterlockedExchangeAdd8/16 for older MSVC.
We need to build certain parts of Mesa (namely gallium, llvmpipe, and
therefore util) with Windows SDK 7.0.7600, which includes MSVC 2008.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-02-12 19:32:21 +00:00
Jose Fonseca
d2438f5920 util/u_atomic: Test p_atomic_add() for 8bit integers.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-02-12 19:32:21 +00:00
Ilia Mirkin
b1e70f2423 docs: add ARB_draw_indirect to ES 3.1 list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-12 11:12:29 -05:00
Axel Davy
63986f9580 egl: Soften several HAVE_DRM_PLATFORM to HAVE_LIBDRM
To fix build when libdrm is not found,
commit a594cec7e3 did put several
parts of egl code under #ifdef HAVE_DRM_PLATFORM.

HAVE_DRM_PLATFORM means the egl drm platform is being built.
What should have been used instead is HAVE_LIBDRM.

At a few locations, the HAVE_DRM_PLATFORM introduced
have already been replaced by HAVE_LIBDRM, this patch
replaces the remaining occurences.

This patch makes for example EGL_EXT_image_dma_buf_import
be advertised by egl under x11 when the drm egl platform
is not built, whereas previously it required the drm egl
platform to be built.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-12 13:20:22 +00:00
Emil Velikov
c39dbfdd0f auxiliary/vl: bring back the VL code for the dri targets
With commit c642e87d9f4(auxiliary/vl: rework the build of the VL code)
we split out the VL code into a separate static library that was meant
to be used by the VL targets alone - va, vdpau, xvmc.

The commit failed to consider the way we handle vdpau-gl interop and
broke it. Bring back the functionality by keeping the vl <> vl_stub
separation as requrested by Christian.

v2: Update the omx target as well. Update mesa-stable email address.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86837
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
2015-02-12 13:19:26 +00:00
Emil Velikov
153539bd9d configure: rework wayland_scanner handling(fix make distcheck)
Currently having the wayland-scanner is optional, which causes problems
when autotools parses through the makefiles, and tries to generate all
the BUILT_SOURCES.

As the config option --with-egl-platform=wayland is not the default, we
won't end up setting the WAYLAND_SCANNER variable, which in turn will
cause some files to not get generated.

There has been a wayland-scanner package as of wayland 1.2 which
provides a variable for the scanner binary, so let's use that one and
fall back to manually searching via AC_PATH_PROG when needed.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-12 13:19:20 +00:00
Emil Velikov
72e602905d nir: add missing header to the sources list
Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-12 13:19:13 +00:00
Emil Velikov
556fc4b84d nir: resolve nir.h dependency list (fix make distcheck)
Use nir/nir_opcodes.h as is (w/o the absolute path), as it is the target
name used to generate the actual file. Otherwise the target is missing,
the file won't get generated and the build will fail.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-12 13:18:52 +00:00
Martin Peres
9f7efa78a8 docs: update GL3.txt to state my current work on the dsa extension
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-02-12 11:24:37 +02:00
Ben Widawsky
e93566a15c i965/vs/skl: Use vec4 datatypes for message header
We're using a SIMD4x2 sampler message, which has execsize 4, and so the
register width must be <= 4.  Use <4,4,1> regioning instead of <8,8,1>
regioning to access the same data but avoid tripping the assert.

Fixes the following piglit tests:
spec/glsl-1.20/compiler/structure-and-array-operations/array-selection.vert
spec/glsl-es-3.00/compiler/uniform_block/interface-name-basic.vert
spec/glsl-es-3.00/compiler/uniform_block/interface-name-field-clashes-with-struct.vert
spec/glsl-es-3.00/compiler/uniform_block/interface-name-field-clashes-with-function.vert
spec/glsl-es-3.00/compiler/uniform_block/interface-name-array.vert
glslparsertest/glsl2/condition-07.vert
spec/glsl-es-3.00/compiler/uniform_block/interface-name-field-clashes-with-variable.vert

v2: Better commit message courtesy of Ken.
I had a discussion with Ken, and we both question how we end up with a mov and
execsize 4. For now though, this fixes the piglit tests, so we can worry about
it later.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-11 21:41:58 -08:00
Chia-I Wu
cba6a4a129 ilo: update screen init for Gen8
This is very preliminary and is only tested with glxgears.  All information
about Gen8 is derived from i965 and beignet.
2015-02-12 08:05:07 +08:00
Chia-I Wu
cb1cdecf64 ilo: update outdated render command emissions for Gen8 2015-02-12 07:56:13 +08:00
Chia-I Wu
9ab4fc4e63 ilo: update rectlist command emission for Gen8 2015-02-12 07:56:13 +08:00
Chia-I Wu
4caf8d9761 ilo: update draw command emission for Gen8 2015-02-12 07:56:13 +08:00
Chia-I Wu
d8927ab02f ilo: update surface state emission for Gen8 2015-02-12 07:56:13 +08:00
Chia-I Wu
7832a3013b ilo: update dynamic state emission for Gen8 2015-02-12 07:56:13 +08:00
Chia-I Wu
8682cbab3e ilo: update outdated gen assertions for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
c173a5288f ilo: add new WM related helpers for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
8c2cbc8955 ilo: update VS related functions for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
0e3381154c ilo: update VF related functions for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
a57805cb75 ilo: update SAMPLER_STATE for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
7e7e45db65 ilo: update SAMPLER_BORDER_COLOR_STATE for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
8976a190b2 ilo: update depth clear value for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
0b7fdce4f5 ilo: update ilo_zs_surface for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
aa7109f059 ilo: update ilo_view_surface for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
7922982d4f ilo: update texture layout for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
47dc2ae6e2 ilo: update ilo_blend_state and related functions for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
e8455128aa ilo: update ilo_dsa_state and related functions for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
9aeee99e4d ilo: update multisample related states for Gen8 2015-02-12 07:56:12 +08:00
Chia-I Wu
6366fbc1a8 ilo: update WM and PS related functions for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
584d3369b6 ilo: update SBE related functions for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
4cb592ec17 ilo: update SF related functions for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
05e2eb57cd ilo: update CLIP related functions for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
9ab0165375 ilo: update SF_CLIP_VIEWPORT for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
b64aeebbcc ilo: update streamout related functions for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
6f77bd3bdc ilo: update 3DSTATE_{DS,HS,GS} for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
3be0504399 ilo: update 3DSTATE_CONSTANT_x for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
49306afe7b ilo: update 3DSTATE_URB_x for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
d43ae05d76 ilo: update 3DSTATE_PUSH_CONSTANT_ALLOC_x for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
f43332ca2f ilo: update render engine common helpers for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
8d9f69bef2 ilo: update BLT helpers for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
574f8d0229 ilo: update MI helpers for Gen8 2015-02-12 07:56:11 +08:00
Chia-I Wu
bfc8a72609 ilo: add functions for Gen8 relocs
Extend ilo_builder_writer_reloc() for Gen8 memory addressing.  Add new
wrappers, ilo_builder_surface_reloc64(() and ilo_builder_batch_reloc64().
2015-02-12 07:56:11 +08:00
Chia-I Wu
a7911620f6 ilo: update the toy compiler for Gen8
Based on what we know from the classic driver.
2015-02-12 07:56:11 +08:00
Chia-I Wu
0066c22c40 ilo: update genhw headers
Accumulated changes for various renames and additions, including Gen8
definitions.  Some of the dynamic state __SIZE no longer means the size of an
element, but the size of an array of elements.  The changes can be seen in
ilo_render_dynamic.c.
2015-02-12 07:56:10 +08:00
Chia-I Wu
5933d84ad6 ilo: clean up ilo_gpe_init_dsa()
Add dsa_get_stencil_enable_gen6(), dsa_get_depth_enable_gen6(), and
dsa_get_alpha_enable_gen6() to be called from ilo_gpe_init_dsa().
2015-02-12 07:56:10 +08:00
Chia-I Wu
aa354b92d2 ilo: clean up ilo_gpe_init_blend()
Make ilo_blend_state more space efficient and forward-looking.
2015-02-12 07:56:10 +08:00
Chia-I Wu
1d07055b50 ilo: clean up sample patterns
Use signed int for sample positions and add helpers to access them.  Call them
patterns instead of positions.
2015-02-12 07:56:10 +08:00
Matt Turner
69ad5fd4ce glsl: Optimize (f2i(trunc x)) into (f2i x).
total instructions in shared programs: 5950326 -> 5949286 (-0.02%)
instructions in affected programs:     88264 -> 87224 (-1.18%)
helped:                                692
2015-02-11 13:50:19 -08:00
Matt Turner
c262b2b582 glsl: Optimize round-half-up pattern.
Hurts some Psychonauts shaders, but after the next patch (which this
enables) they're fewer instructions than before this patch.
2015-02-11 13:50:19 -08:00
Matt Turner
a5455ab1ca glsl: Add trunc() to ir_builder. 2015-02-11 13:50:19 -08:00
Matt Turner
d91390634f i965: Add LINTERP/CINTERP to can_do_cmod().
LINTERP is implemented as a PLN instruction or a LINE+MAC. PLN and MAC
can do conditional mod. CINTERP is just a MOV.

total instructions in shared programs: 5952103 -> 5950284 (-0.03%)
instructions in affected programs:     324573 -> 322754 (-0.56%)
helped:                                1819

We lose the SIMD16 in one Unigine Heaven shader which appears six times
in shader-db.
2015-02-11 13:50:19 -08:00
Matt Turner
245c7848fc program: Remove _mesa_nop_vertex_program/_mesa_nop_fragment_program.
Dead since

   commit 284ce20901
   Author: Eric Anholt <eric@anholt.net>
   Date:   Fri Aug 20 10:52:14 2010 -0700

       Remove remnants of the old glsl compiler.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-11 13:50:19 -08:00
Matt Turner
4c42e1116b nir: Recognize open-coded fmin/fmax.
And unfortunately other shaders do the same thing but with >=/<= which
we can't apply this optimization to because of NaNs.

instructions in affected programs:     23309 -> 22938 (-1.59%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-11 13:50:19 -08:00
Eric Anholt
56e21647e2 nir: Add algebraic opt for int comparisons with identical operands.
No change on shader-db on i965.

v2: Reword the comment due to feedback from Erik Faye-Lund

Reviewed-by: Connor Abbott <cwabbott0@gmail.com> (v1)
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> (v1)
2015-02-11 11:52:38 -08:00
Eric Anholt
2919bdf466 nir: Fix load_const comparisons for CSE.
We want the size of a float per component, not the size of a whole vec4.

NIR instructions on i965:
total instructions in shared programs: 1261937 -> 1261929 (-0.00%)
instructions in affected programs:     114 -> 106 (-7.02%)

Looking at one of these examples (tesseract), it's from vec4 load_consts
for a MRT solid fill, which do get CSEed now that we don't memcmp off the
end of the const value and into the SSA def.  For the 1-component loads
that are common in i965, we were only memcmping off into the rest of the
usually zero-filled const_value.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-11 11:52:38 -08:00
Matt Turner
09d6ea9ae3 i965/fs: Remove conditional mod when optimizing a SEL into a MOV.
Missed in commit ca675b73, but got right in the companion commit 3c28b2c0.
2015-02-11 10:26:49 -08:00
Jeremy Huddleston Sequoia
e68b67b53f darwin: build fix
xfont.c:237:14: error: implicit declaration of function 'GetGLXDRIDrawable' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   glxdraw = GetGLXDRIDrawable(CC->currentDpy, CC->currentDrawable);
             ^
Fixes regression from 291be28476

Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
2015-02-10 22:22:33 -08:00
Jeremy Huddleston Sequoia
1c67a5687a darwin: build fix
../../../src/mesa/main/compiler.h:47:10: fatal error: 'util/macros.h' file not found

Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
2015-02-10 20:35:10 -08:00
Matt Turner
ea0f0eb6c0 glsl: Optimize 1/exp(x) into exp(-x).
Lots of shaders divide by exp2(...) which we turn into a multiplication
by the reciprocal. We can avoid the reciprocal by simply negating exp2's
argument.

total instructions in shared programs: 5947154 -> 5946695 (-0.01%)
instructions in affected programs:     118661 -> 118202 (-0.39%)
helped:                                380

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-10 17:48:44 -08:00
Matt Turner
a9065cef48 nir: Remove casts from void*.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-10 17:48:42 -08:00
Matt Turner
bb1e007157 nir: Replace assert(0) with unreachable().
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-02-10 17:48:31 -08:00
Matt Turner
942b56ad05 nir: Remove unused has_indirect variable.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-10 17:48:16 -08:00
Matt Turner
fff0b2eab5 i965/vec4: Emit MADs from (x + abs(y * z)).
Same as commit 3654b6d4 to the fs backend.

total instructions in shared programs: 5945788 -> 5945787 (-0.00%)
instructions in affected programs:     36 -> 35 (-2.78%)
helped:                                1

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 17:48:15 -08:00
Matt Turner
3d581f9996 i965/vec4: Emit MADs from (x + -(y * z)).
Same as commit c4fab711 to the fs backend.

total instructions in shared programs: 5945998 -> 5945788 (-0.00%)
instructions in affected programs:     74665 -> 74455 (-0.28%)
helped:                                399
HURT:                                  180

It hurts some programs because we make no attempts in the vec4 backend
to avoid MADs if they have constant (or vector uniform) arguments.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 17:47:37 -08:00
Neil Roberts
5b29b2922a i965/skl: Implement WaDisable1DDepthStencil
Skylake+ doesn't support setting a depth buffer to a 1D surface but it
does allow pretending it's a 2D texture with a height of 1 instead.

This fixes the GL_DEPTH_COMPONENT_* tests of the copyteximage piglit
test (and also seems to avoid a subsequent GPU hang).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89037
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 18:00:21 +00:00
Francisco Jerez
1b224290fb i965/gen7-8: Implement glMemoryBarrier().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 19:09:25 +02:00
Francisco Jerez
46b03d5400 i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-renderbuffers.
Null surfaces are going to be useful to have something to point
unbound image units to, as the ARB_shader_image_load_store extension
requires us to behave deterministically in cases where some shader
tries to access an unbound image unit: Invalid stores and atomics are
supposed to be discarded and invalid loads are supposed to return
zero, which is precisely what the null surface does.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 19:09:25 +02:00
Francisco Jerez
342b7ce7d4 i965: Allocate binding table space for shader images.
v2: Bump the number of supported image uniforms to 32 (Ken).

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 19:09:25 +02:00
Francisco Jerez
36a17f0f99 i965: Don't tile 1D miptrees.
It doesn't really improve locality of texture fetches, quite the
opposite it's a waste of memory bandwidth and space due to tile
alignment.

v2: Check mt->logical_height0 instead of mt->target (Ken).  Add short
    comment explaining why they shouldn't be tiled.

Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 19:09:25 +02:00
Francisco Jerez
b40bcd24e0 i965/vec4: Don't set any dependency control bits for F32TO16 on Gen8.
It's expanded to several instructions.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:25 +02:00
Francisco Jerez
aef83957e1 i965: Handle negated unsigned immediate values in constant propagation.
Negation of UD/UW sources behaves the same as for D/W sources, taking
the two's complement of the source, except for bitwise logical
operations on Gen8 and up which take the one's complement.  Fixes
crash in a GLSL shader with subtraction of two unsigned values.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:25 +02:00
Francisco Jerez
64fde7b31c i965/vec4: Take into account non-zero reg_offset during register allocation.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:25 +02:00
Francisco Jerez
78e9043475 i965/vec4: Add register classes up to MAX_VGRF_SIZE.
In preparation for some send from GRF instructions that will require
larger payloads.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:25 +02:00
Francisco Jerez
530445330b i965/vec4: Init mlen for several send from GRF instructions.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:25 +02:00
Francisco Jerez
5f878d1b47 i965/vec4: Don't infer MRF dependencies for send from GRF instructions.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:24 +02:00
Francisco Jerez
de666fc102 i965/vec4: Fix the scheduler to take into account reads and writes of multiple registers.
v2: Avoid nested ternary operators in vec4_instruction::regs_read(). (Matt)

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:24 +02:00
Francisco Jerez
8ad486077e i965/vec4: Make vec4_visitor::implied_mrf_writes() return zero for sends from GRF.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:24 +02:00
Francisco Jerez
16b9112574 i965/vec4: Pass dst register to the vec4_instruction constructor.
So regs_written gets initialized with a sensible value.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:24 +02:00
Francisco Jerez
0c902a8f78 i965/vec4: Initialize vec4_instruction::predicate and ::predicate_inverse.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:24 +02:00
Francisco Jerez
388b136e67 i965/vec4: Implement equals() method for dst_reg too.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 19:09:24 +02:00
Francisco Jerez
3df2cb2f86 i965/fs: Fix fs_inst::regs_written calculation for instructions with scalar dst.
Scalar registers are required to have zero stride, fix the
regs_written calculation not to assume that the instruction writes
zero registers in that case.

v2: Rename CEILING() to DIV_ROUND_UP(). (Matt, Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:51 +02:00
Francisco Jerez
f2668f9f21 i965/fs: Fix stack allocation of fs_inst and stop stealing src array provided on construction.
Using 'ralloc*(this, ...)' is wrong if the object has automatic
storage or was allocated through any other means.  Use normal dynamic
memory instead.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:51 +02:00
Francisco Jerez
c472793a2a i965/fs: Remove duplicate include of brw_shader.h
The second one was inside an extern "C" block, luckily it was being
discarded by the preprocessor.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:51 +02:00
Francisco Jerez
dfe957c02b i965: Move up fs_inst::flag_subreg to backend_instruction.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:51 +02:00
Francisco Jerez
639696aa05 i965: Move up fs_inst::regs_written to backend_instruction.
It will also be useful in the VEC4 back-end.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:51 +02:00
Francisco Jerez
4ed52e8bc4 i965/vec4: Remove dependency of vec4_instruction on the visitor class.
The only reason why you need a vec4_visitor to construct a
vec4_instruction is to initialize vec4_instruction::ir and
::annotation.  Instead set them from vec4_visitor::emit() just like
fs_visitor does.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:50 +02:00
Francisco Jerez
a3ee6c7d19 i965/fs: Remove dependency of fs_inst on the visitor class.
The fs_visitor argument of fs_inst::regs_read() wasn't used at all.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:50 +02:00
Francisco Jerez
bfbb0e84e1 i965: Move IR object definitions to separate header files.
One should be able to manipulate i965 IR without pulling the whole
FS/VEC4 visitor classes -- Optimization passes and other
transformations would ideally be visitor-agnostic.  Among other issues
this avoids a circular dependency between the header file where such
visitor-agnostic code will be defined and the main FS/VEC4 header
where both IR (layer below) and visitor (layer above) happen to be
defined.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:50 +02:00
Francisco Jerez
447879eb88 i965: Factor out virtual GRF allocation to a separate object.
Right now virtual GRF book-keeping and allocation is performed in each
visitor class separately (among other hundred different things),
leading to duplicated logic in each visitor and preventing layering as
it forces any code that manipulates i965 IR and needs to allocate
virtual registers to depend on the specific visitor that happens to be
used to translate from GLSL IR.

v2: Use realloc()/free() to allocate VGRF book-keeping arrays (Connor).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 16:05:47 +02:00
Francisco Jerez
e6146e6f14 glsl: Forbid calling the constructor of any opaque type.
The spec doesn't define any opaque type constructors.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-10 15:49:43 +02:00
Francisco Jerez
c4111dfa0a glsl: Return correct number of coordinate components for cubemap array images.
Cubemap array images are unlike cubemap array samplers in that they don't need
an additional coordinate to index individual cubemaps in the array, instead
they behave like a 2D array of 6n layers, with n the number of cubemaps in the
array.  Take this exception into account.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-10 15:49:43 +02:00
Francisco Jerez
fcc2fd53df mesa: Bump MAX_IMAGE_UNIFORMS to 32.
So the i965 driver can expose 32 image uniforms per shader stage.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-10 15:37:56 +02:00
Francisco Jerez
818585b9f9 mesa: Rename the CEILING() macro to DIV_ROUND_UP().
Some people have complained that code using the CEILING() macro is
difficult to understand because it's not immediately obvious what it
is supposed to do until you go and look up its definition.  Use a more
descriptive name that matches the similar utility macro in the Linux
kernel.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-10 15:37:47 +02:00
Tiziano Bacocco
1e02f2badf nv50,nvc0: Mark PIPE_QUERY_TIMESTAMP_DISJOINT as ready immediately
Without this when an application issues that query, it would try to
wait the result from the gpu, and since no query has been actually
issued, it will wait forever.

Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-10 08:02:17 -05:00
Roy Spliet
09ee907266 nv50/ir: Fold IMM into MAD
Add a specific optimisation pass for NV50 to check whether SRC0 or SRC1 is
a MOV dst, IMM. If so: fold the IMM in and try to drop the MOV. Must be
done post-RA because it requires that SDST == SSRC2.

V2: improve readability and add comments to clarify decisions
V3: Remove redundant code... compiler already attempts to put the IMM in
SSRC1

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-10 08:02:13 -05:00
Roy Spliet
3dc39d0bca nv50/ir: Add emit support for MAD IMM format
But don't enable generation of it in the opProperties, because we can't
guarantee the SDST==SRC2 constraint until after register assignment. We'll
add a post-RA folding pass to utilise this.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-10 08:02:02 -05:00
Roy Spliet
fb63df2215 nv50/ir: Add support for MAD 4-byte opcode
Add emission rules for negative and saturate flags for MAD 4-byte opcodes,
and get rid of some of the constraints. Obviously tested with a wide variety
of shaders.

V2: Document MAD as supported short form
V3: Split up IMM from short-form modifiers

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-10 08:01:46 -05:00
Ilia Mirkin
354206f407 nv50/ir: change the way float face is returned
The old way made it impossible for the optimizer to reason about what
was going on. The new way is the same number of instructions (the neg
gets folded into the cvt) but enables the optimizer to be cleverer if
comparing to a constant (most common case). [The optimizer is presently
not sufficiently clever to work this out, but it could relatively easily
be made to be. The old way would have required significant complexity to
work out.]

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-10 08:01:46 -05:00
Kenneth Graunke
480ee1f0b4 nir: Mark nir_print_instr's instr pointer as const.
Printing instructions doesn't modify them, so we can mark the parameter
const.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-02-10 03:37:55 -08:00
Kenneth Graunke
08a06b6b89 i965: Fix integer border color on Haswell.
+82 Piglits - 100% of border color tests now pass on Haswell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
2015-02-09 13:18:58 -08:00
Kenneth Graunke
e1e73443c5 i965: Use a gl_color_union for sampler border color.
This should have no effect, but will make it easier to implement other
bug fixes.

v2: Eliminate "unsigned one" local; just use the value where necessary.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2015-02-09 13:18:58 -08:00
Kenneth Graunke
8cb18760cc i965: Override swizzles for integer luminance formats.
The hardware's integer luminance formats are completely unusable;
currently we fall back to RGBA.  This means we need to override
the texture swizzle to obtain the XXX1 values expected for luminance
formats.

Fixes spec/EXT_texture_integer/texwrap formats bordercolor [swizzled]
on Broadwell - 100% of border color tests now pass on Broadwell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
2015-02-09 13:18:54 -08:00
Carl Worth
b16de0b713 util/u_atomic: Add new macro p_atomic_add
This provides for atomic addition, which will be used by an upcoming
shader-cache patch. A simple test is added to "make check" as well.

Note: The various O/S functions differ on whether they return the
original value or the value after the addition, so I did not provide
an add_return() macro which would be sensitive to that difference.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-02-09 10:47:44 -08:00
Jason Ekstrand
345e8cc849 util/hash_table: Try to hit a double-insertion bug in the collision test
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-07 17:01:05 -08:00
Jason Ekstrand
623c3a858d util/set: Do a full search when adding new items
Previously, the set_insert function would bail early if it found a deleted
slot that it could re-use.  However, this is a problem if the key being
inserted is already in the set but further down the list.  If this happens,
the element ends up getting inserted in the set twice.  This commit makes
it so that we walk over all of the possible entries for the given key and
then, if we don't find the key, place it in the available free entry we
found.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-07 17:01:05 -08:00
Jason Ekstrand
c9287e797b util/hash_table: Do a full search when adding new items
Previously, the hash_table_insert function would bail early if it found a
deleted slot that it could re-use.  However, this is a problem if the key
being inserted is already in the hash table but further down the list.  If
this happens, the element ends up getting inserted in the hash table twice.
This commit makes it so that we walk over all of the possible entries for
the given key and then, if we don't find the key, place it in the available
free entry we found.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-07 17:01:05 -08:00
James Legg
1581e12aba mesa: Make renderbuffer FBO attachments not layered
For framebuffer completeness checks, consider renderbuffers as not
layered. Previously, they would have counted as layered if a layered
textured had previously been bound to the same attachment point. This
could cause framebuffer completeness checks to incorrectly fail with
GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS, even if no layered attachments
were present.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89026
2015-02-08 13:54:15 +13:00
Emil Velikov
49299ef6fa Post-branch version bump to 10.6.0-devel, add release notes template
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-02-07 19:12:20 +00:00
2460 changed files with 170499 additions and 118141 deletions

1
.gitignore vendored
View File

@@ -45,3 +45,4 @@ manifest.txt
.libs/
Makefile
Makefile.in
.install-mesa-links

View File

@@ -24,16 +24,17 @@
# use c99 compiler by default
ifeq ($(LOCAL_CC),)
ifeq ($(LOCAL_IS_HOST_MODULE),true)
LOCAL_CC := $(HOST_CC) -std=c99
LOCAL_CC := $(HOST_CC) -std=c99 -D_GNU_SOURCE
else
LOCAL_CC := $(TARGET_CC) -std=c99
endif
endif
LOCAL_C_INCLUDES += \
$(MESA_TOP)/src \
$(MESA_TOP)/include
MESA_VERSION=$(shell cat $(MESA_TOP)/VERSION)
MESA_VERSION := $(shell cat $(MESA_TOP)/VERSION)
# define ANDROID_VERSION (e.g., 4.0.x => 0x0400)
LOCAL_CFLAGS += \
-DPACKAGE_VERSION=\"$(MESA_VERSION)\" \
@@ -41,6 +42,20 @@ LOCAL_CFLAGS += \
-DANDROID_VERSION=0x0$(MESA_ANDROID_MAJOR_VERSION)0$(MESA_ANDROID_MINOR_VERSION)
LOCAL_CFLAGS += \
-D__STDC_LIMIT_MACROS \
-DHAVE___BUILTIN_EXPECT \
-DHAVE___BUILTIN_FFS \
-DHAVE___BUILTIN_FFSLL \
-DHAVE_FUNC_ATTRIBUTE_FLATTEN \
-DHAVE_FUNC_ATTRIBUTE_UNUSED \
-DHAVE_FUNC_ATTRIBUTE_FORMAT \
-DHAVE_FUNC_ATTRIBUTE_PACKED \
-DHAVE___BUILTIN_CTZ \
-DHAVE___BUILTIN_POPCOUNT \
-DHAVE___BUILTIN_POPCOUNTLL \
-DHAVE___BUILTIN_CLZ \
-DHAVE___BUILTIN_CLZLL \
-DHAVE___BUILTIN_UNREACHABLE \
-DHAVE_PTHREAD=1 \
-fvisibility=hidden \
-Wno-sign-compare
@@ -54,7 +69,16 @@ LOCAL_CFLAGS += \
endif
endif
ifeq ($(MESA_ENABLE_LLVM),true)
LOCAL_CFLAGS += \
-DHAVE_LLVM=0x0305 -DMESA_LLVM_VERSION_PATCH=2 \
-D__STDC_CONSTANT_MACROS \
-D__STDC_FORMAT_MACROS \
-D__STDC_LIMIT_MACROS
endif
LOCAL_CPPFLAGS += \
$(if $(filter true,$(MESA_LOLLIPOP_BUILD)),-D_USING_LIBCXX) \
-Wno-error=non-virtual-dtor \
-Wno-non-virtual-dtor

View File

@@ -24,7 +24,7 @@
# BOARD_GPU_DRIVERS should be defined. The valid values are
#
# classic drivers: i915 i965
# gallium drivers: swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx
# gallium drivers: swrast freedreno i915g ilo nouveau r300g r600g radeonsi vc4 vmwgfx
#
# The main target is libGLES_mesa. For each classic driver enabled, a DRI
# module will also be built. DRI modules will be loaded by libGLES_mesa.
@@ -34,14 +34,19 @@ MESA_TOP := $(call my-dir)
MESA_ANDROID_MAJOR_VERSION := $(word 1, $(subst ., , $(PLATFORM_VERSION)))
MESA_ANDROID_MINOR_VERSION := $(word 2, $(subst ., , $(PLATFORM_VERSION)))
MESA_ANDROID_VERSION := $(MESA_ANDROID_MAJOR_VERSION).$(MESA_ANDROID_MINOR_VERSION)
ifeq ($(filter 1 2 3 4,$(MESA_ANDROID_MAJOR_VERSION)),)
MESA_LOLLIPOP_BUILD := true
else
define local-generated-sources-dir
$(call local-intermediates-dir)
endef
endif
MESA_COMMON_MK := $(MESA_TOP)/Android.common.mk
MESA_PYTHON2 := python
DRM_GRALLOC_TOP := hardware/drm_gralloc
classic_drivers := i915 i965
gallium_drivers := swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx
gallium_drivers := swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx vc4
MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS))
@@ -73,6 +78,8 @@ else
MESA_BUILD_GALLIUM := false
endif
MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false)
# add subdirectories
ifneq ($(strip $(MESA_GPU_DRIVERS)),)
@@ -82,19 +89,13 @@ SUBDIRS := \
src/glsl \
src/mesa \
src/util \
src/egl/main
ifeq ($(strip $(MESA_BUILD_CLASSIC)),true)
SUBDIRS += \
src/egl/drivers/dri2 \
src/egl \
src/mesa/drivers/dri
endif
ifeq ($(strip $(MESA_BUILD_GALLIUM)),true)
SUBDIRS += src/gallium
endif
mkfiles := $(patsubst %,$(MESA_TOP)/%/Android.mk,$(SUBDIRS))
include $(mkfiles)
include $(call all-named-subdir-makefiles,$(SUBDIRS))
endif

View File

@@ -5,3 +5,12 @@ $(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/SHARED_LIBRARIES/libGLES_mesa_i
$(call add-clean-step, rm -rf $(OUT_DIR)/host/$(HOST_OS)-$(HOST_ARCH)/obj/EXECUTABLES/mesa_*_intermediates)
$(call add-clean-step, rm -rf $(OUT_DIR)/host/$(HOST_OS)-$(HOST_ARCH)/obj/EXECUTABLES/glsl_compiler_intermediates)
$(call add-clean-step, rm -rf $(OUT_DIR)/host/$(HOST_OS)-$(HOST_ARCH)/obj/STATIC_LIBRARIES/libmesa_glsl_utils_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/i9?5_dri_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libglapi_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libGLES_mesa_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/mesa_*_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/glsl_compiler_intermediates)
$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/*_dri_intermediates)

View File

@@ -21,7 +21,7 @@
SUBDIRS = src
DISTCHECK_CONFIGURE_FLAGS = \
AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-dri3 \
--enable-gallium-tests \
--enable-gbm \
@@ -32,7 +32,9 @@ DISTCHECK_CONFIGURE_FLAGS = \
--enable-vdpau \
--enable-xa \
--enable-xvmc \
--with-egl-platforms=x11,wayland,drm
--with-egl-platforms=x11,wayland,drm \
--with-dri-drivers=i915,i965,nouveau,radeon,r200,swrast \
--with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast
ACLOCAL_AMFLAGS = -I m4
@@ -44,12 +46,15 @@ EXTRA_DIST = \
scons \
SConstruct
noinst_HEADERS = \
include/c99_compat.h \
include/c99 \
include/c11 \
include/D3D9 \
include/HaikuGL \
noinst_HEADERS = \
include/c99_alloca.h \
include/c99_compat.h \
include/c99_math.h \
include/c99 \
include/c11 \
include/D3D9 \
include/HaikuGL \
include/no_extern_c.h \
include/pci_ids
# We list some directories in EXTRA_DIST, but don't actually want to include

View File

@@ -1 +1 @@
10.5.0-devel
11.0.0

View File

@@ -6,8 +6,8 @@ test -z "$srcdir" && srcdir=.
ORIGDIR=`pwd`
cd "$srcdir"
autoreconf -v --install || exit 1
cd $ORIGDIR || exit $?
autoreconf --force --verbose --install || exit 1
cd "$ORIGDIR" || exit $?
if test -z "$NOCONFIGURE"; then
"$srcdir"/configure "$@"

View File

@@ -15,17 +15,14 @@
# $ DRYRUN=yes bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 | wc -l
# regex pattern: trim before url
trim_before='s/.*\(http\)/\1/'
# regex pattern: trim before bug number
trim_before='s/.*show_bug.cgi?id=\([0-9]*\).*/\1/'
# regex pattern: trim after url
trim_after='s/\(show_bug.cgi?id=[0-9]*\).*/\1/'
# regex pattern: always use https
use_https='s/http:/https:/'
# regex pattern: reconstruct the url
use_after='s,^,https://bugs.freedesktop.org/show_bug.cgi?id=,'
# extract fdo urls from commit log
urls=$(git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before -e $trim_after -e $use_https | sort | uniq)
urls=$(git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before | sort -n -u | sed -e $use_after)
# if DRYRUN is set to "yes", simply print the URLs and don't fetch the
# details from fdo bugzilla.

View File

@@ -26,28 +26,28 @@ else:
target_platform = host_platform
_machine_map = {
'x86': 'x86',
'i386': 'x86',
'i486': 'x86',
'i586': 'x86',
'i686': 'x86',
'BePC': 'x86',
'Intel': 'x86',
'ppc' : 'ppc',
'BeBox': 'ppc',
'BeMac': 'ppc',
'AMD64': 'x86_64',
'x86_64': 'x86_64',
'sparc': 'sparc',
'sun4u': 'sparc',
'x86': 'x86',
'i386': 'x86',
'i486': 'x86',
'i586': 'x86',
'i686': 'x86',
'BePC': 'x86',
'Intel': 'x86',
'ppc': 'ppc',
'BeBox': 'ppc',
'BeMac': 'ppc',
'AMD64': 'x86_64',
'x86_64': 'x86_64',
'sparc': 'sparc',
'sun4u': 'sparc',
}
# find host_machine value
if 'PROCESSOR_ARCHITECTURE' in os.environ:
host_machine = os.environ['PROCESSOR_ARCHITECTURE']
host_machine = os.environ['PROCESSOR_ARCHITECTURE']
else:
host_machine = _platform.machine()
host_machine = _platform.machine()
host_machine = _machine_map.get(host_machine, 'generic')
default_machine = host_machine
@@ -65,7 +65,8 @@ else:
default_llvm = 'no'
try:
if target_platform != 'windows' and \
subprocess.call(['llvm-config', '--version'], stdout=subprocess.PIPE) == 0:
subprocess.call(['llvm-config', '--version'],
stdout=subprocess.PIPE) == 0:
default_llvm = 'yes'
except:
pass
@@ -75,30 +76,38 @@ else:
# Common options
def AddOptions(opts):
try:
from SCons.Variables.BoolVariable import BoolVariable as BoolOption
except ImportError:
from SCons.Options.BoolOption import BoolOption
try:
from SCons.Variables.EnumVariable import EnumVariable as EnumOption
except ImportError:
from SCons.Options.EnumOption import EnumOption
opts.Add(EnumOption('build', 'build type', 'debug',
allowed_values=('debug', 'checked', 'profile', 'release')))
opts.Add(BoolOption('verbose', 'verbose output', 'no'))
opts.Add(EnumOption('machine', 'use machine-specific assembly code', default_machine,
allowed_values=('generic', 'ppc', 'x86', 'x86_64')))
opts.Add(EnumOption('platform', 'target platform', host_platform,
allowed_values=('cygwin', 'darwin', 'freebsd', 'haiku', 'linux', 'sunos', 'windows')))
opts.Add(BoolOption('embedded', 'embedded build', 'no'))
opts.Add(BoolOption('analyze', 'enable static code analysis where available', 'no'))
opts.Add('toolchain', 'compiler toolchain', default_toolchain)
opts.Add(BoolOption('gles', 'EXPERIMENTAL: enable OpenGL ES support', 'no'))
opts.Add(BoolOption('llvm', 'use LLVM', default_llvm))
opts.Add(BoolOption('openmp', 'EXPERIMENTAL: compile with openmp (swrast)', 'no'))
opts.Add(BoolOption('debug', 'DEPRECATED: debug build', 'yes'))
opts.Add(BoolOption('profile', 'DEPRECATED: profile build', 'no'))
opts.Add(BoolOption('quiet', 'DEPRECATED: profile build', 'yes'))
opts.Add(BoolOption('texture_float', 'enable floating-point textures and renderbuffers', 'no'))
if host_platform == 'windows':
opts.Add('MSVC_VERSION', 'Microsoft Visual C/C++ version')
try:
from SCons.Variables.BoolVariable import BoolVariable as BoolOption
except ImportError:
from SCons.Options.BoolOption import BoolOption
try:
from SCons.Variables.EnumVariable import EnumVariable as EnumOption
except ImportError:
from SCons.Options.EnumOption import EnumOption
opts.Add(EnumOption('build', 'build type', 'debug',
allowed_values=('debug', 'checked', 'profile',
'release')))
opts.Add(BoolOption('verbose', 'verbose output', 'no'))
opts.Add(EnumOption('machine', 'use machine-specific assembly code',
default_machine,
allowed_values=('generic', 'ppc', 'x86', 'x86_64')))
opts.Add(EnumOption('platform', 'target platform', host_platform,
allowed_values=('cygwin', 'darwin', 'freebsd', 'haiku',
'linux', 'sunos', 'windows')))
opts.Add(BoolOption('embedded', 'embedded build', 'no'))
opts.Add(BoolOption('analyze',
'enable static code analysis where available', 'no'))
opts.Add('toolchain', 'compiler toolchain', default_toolchain)
opts.Add(BoolOption('gles', 'EXPERIMENTAL: enable OpenGL ES support',
'no'))
opts.Add(BoolOption('llvm', 'use LLVM', default_llvm))
opts.Add(BoolOption('openmp', 'EXPERIMENTAL: compile with openmp (swrast)',
'no'))
opts.Add(BoolOption('debug', 'DEPRECATED: debug build', 'yes'))
opts.Add(BoolOption('profile', 'DEPRECATED: profile build', 'no'))
opts.Add(BoolOption('quiet', 'DEPRECATED: profile build', 'yes'))
opts.Add(BoolOption('texture_float',
'enable floating-point textures and renderbuffers',
'no'))
if host_platform == 'windows':
opts.Add('MSVC_VERSION', 'Microsoft Visual C/C++ version')

View File

@@ -9,7 +9,6 @@ dnl Copyright © 2009-2014 Jon TURNEY
dnl Copyright © 2011-2012 Benjamin Franzke
dnl Copyright © 2008-2014 David Airlie
dnl Copyright © 2009-2013 Brian Paul
dnl Copyright © 2003-2007 Keith Packard, Daniel Stone
dnl
dnl Permission is hereby granted, free of charge, to any person obtaining a
dnl copy of this software and associated documentation files (the "Software"),
@@ -44,7 +43,14 @@ AC_INIT([Mesa], [MESA_VERSION],
AC_CONFIG_AUX_DIR([bin])
AC_CONFIG_MACRO_DIR([m4])
AC_CANONICAL_SYSTEM
AM_INIT_AUTOMAKE([foreign tar-ustar dist-xz])
AM_INIT_AUTOMAKE([foreign tar-ustar dist-xz subdir-objects])
dnl We only support native Windows builds (MinGW/MSVC) through SCons.
case "$host_os" in
mingw*)
AC_MSG_ERROR([MinGW build not supported through autoconf/automake, use SCons instead])
;;
esac
# Support silent build rules, requires at least automake-1.11. Disable
# by either passing --disable-silent-rules to configure or passing V=1
@@ -57,14 +63,17 @@ m4_ifdef([AM_PROG_AR], [AM_PROG_AR])
dnl Set internal versions
OSMESA_VERSION=8
AC_SUBST([OSMESA_VERSION])
OPENCL_VERSION=1
AC_SUBST([OPENCL_VERSION])
dnl Versions for external dependencies
LIBDRM_REQUIRED=2.4.38
LIBDRM_REQUIRED=2.4.60
LIBDRM_RADEON_REQUIRED=2.4.56
LIBDRM_INTEL_REQUIRED=2.4.52
LIBDRM_AMDGPU_REQUIRED=2.4.63
LIBDRM_INTEL_REQUIRED=2.4.61
LIBDRM_NVVIEUX_REQUIRED=2.4.33
LIBDRM_NOUVEAU_REQUIRED="2.4.33 libdrm >= 2.4.41"
LIBDRM_FREEDRENO_REQUIRED=2.4.57
LIBDRM_NOUVEAU_REQUIRED=2.4.62
LIBDRM_FREEDRENO_REQUIRED=2.4.64
DRI2PROTO_REQUIRED=2.6
DRI3PROTO_REQUIRED=1.0
PRESENTPROTO_REQUIRED=1.0
@@ -72,13 +81,14 @@ LIBUDEV_REQUIRED=151
GLPROTO_REQUIRED=1.4.14
LIBOMXIL_BELLAGIO_REQUIRED=0.0
LIBVA_REQUIRED=0.35.0
VDPAU_REQUIRED=0.4.1
VDPAU_REQUIRED=1.1
WAYLAND_REQUIRED=1.2.0
XCB_REQUIRED=1.9.3
XCBDRI2_REQUIRED=1.8
XCBGLX_REQUIRED=1.8.1
XSHMFENCE_REQUIRED=1.1
XVMC_REQUIRED=1.0.6
PYTHON_MAKO_REQUIRED=0.3.4
dnl Check for progs
AC_PROG_CPP
@@ -114,7 +124,19 @@ if test "x$INDENT" != "xcat"; then
fi
fi
AX_CHECK_PYTHON_MAKO_MODULE(0.3.4)
AX_CHECK_PYTHON_MAKO_MODULE($PYTHON_MAKO_REQUIRED)
if test -z "$PYTHON2"; then
if test ! -f "$srcdir/src/util/format_srgb.c"; then
AC_MSG_ERROR([Python not found - unable to generate sources])
fi
else
if test "x$acv_mako_found" = xno; then
if test ! -f "$srcdir/src/mesa/main/format_unpack.c"; then
AC_MSG_ERROR([Python mako module v$PYTHON_MAKO_REQUIRED or higher not found])
fi
fi
fi
AC_PROG_INSTALL
@@ -185,10 +207,14 @@ AX_GCC_BUILTIN([__builtin_popcount])
AX_GCC_BUILTIN([__builtin_popcountll])
AX_GCC_BUILTIN([__builtin_unreachable])
AX_GCC_FUNC_ATTRIBUTE([const])
AX_GCC_FUNC_ATTRIBUTE([flatten])
AX_GCC_FUNC_ATTRIBUTE([format])
AX_GCC_FUNC_ATTRIBUTE([malloc])
AX_GCC_FUNC_ATTRIBUTE([packed])
AX_GCC_FUNC_ATTRIBUTE([pure])
AX_GCC_FUNC_ATTRIBUTE([unused])
AX_GCC_FUNC_ATTRIBUTE([warn_unused_result])
AM_CONDITIONAL([GEN_ASM_OFFSETS], test "x$GEN_ASM_OFFSETS" = xyes)
@@ -209,7 +235,7 @@ _SAVE_LDFLAGS="$LDFLAGS"
_SAVE_CPPFLAGS="$CPPFLAGS"
dnl Compiler macros
DEFINES="-DUSE_EXTERNAL_DXTN_LIB=1"
DEFINES="-D__STDC_LIMIT_MACROS"
AC_SUBST([DEFINES])
case "$host_os" in
linux*|*-gnu*|gnu*)
@@ -260,9 +286,36 @@ if test "x$GCC" = xyes; then
# Work around aliasing bugs - developers should comment this out
CFLAGS="$CFLAGS -fno-strict-aliasing"
# We don't want floating-point math functions to set errno or trap
CFLAGS="$CFLAGS -fno-math-errno -fno-trapping-math"
# gcc's builtin memcmp is slower than glibc's
# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43052
CFLAGS="$CFLAGS -fno-builtin-memcmp"
# Flags to help ensure that certain portions of the code -- and only those
# portions -- can be built with MSVC:
# - src/util, src/gallium/auxiliary, and src/gallium/drivers/llvmpipe needs
# to build with Windows SDK 7.0.7600, which bundles MSVC 2008
# - non-Linux/Posix OpenGL portions needs to build on MSVC 2013 (which
# supports most of C99)
# - the rest has no compiler compiler restrictions
MSVC2013_COMPAT_CFLAGS="-Werror=pointer-arith"
MSVC2013_COMPAT_CXXFLAGS="-Werror=pointer-arith"
# Enable -Werror=vla if compiler supports it
save_CFLAGS="$CFLAGS"
AC_MSG_CHECKING([whether $CC supports -Werror=vla])
CFLAGS="$CFLAGS -Werror=vla"
AC_LINK_IFELSE([AC_LANG_PROGRAM()],
[MSVC2013_COMPAT_CFLAGS="$MSVC2013_COMPAT_CFLAGS -Werror=vla";
MSVC2013_COMPAT_CXXFLAGS="$MSVC2013_COMPAT_CXXFLAGS -Werror=vla";
AC_MSG_RESULT([yes])],
AC_MSG_RESULT([no]));
CFLAGS="$save_CFLAGS"
MSVC2008_COMPAT_CFLAGS="$MSVC2013_COMPAT_CFLAGS -Werror=declaration-after-statement"
MSVC2008_COMPAT_CXXFLAGS="$MSVC2013_COMPAT_CXXFLAGS"
fi
if test "x$GXX" = xyes; then
CXXFLAGS="$CXXFLAGS -Wall"
@@ -288,6 +341,11 @@ if test "x$GXX" = xyes; then
CXXFLAGS="$CXXFLAGS -fno-builtin-memcmp"
fi
AC_SUBST([MSVC2013_COMPAT_CFLAGS])
AC_SUBST([MSVC2013_COMPAT_CXXFLAGS])
AC_SUBST([MSVC2008_COMPAT_CFLAGS])
AC_SUBST([MSVC2008_COMPAT_CXXFLAGS])
dnl even if the compiler appears to support it, using visibility attributes isn't
dnl going to do anything useful currently on cygwin apart from emit lots of warnings
case "$host_os" in
@@ -370,6 +428,8 @@ if test "x$enable_debug" = xyes; then
CXXFLAGS="$CXXFLAGS -O0"
fi
fi
else
DEFINES="$DEFINES -DNDEBUG"
fi
dnl
@@ -597,7 +657,9 @@ if test "x$enable_asm" = xyes; then
fi
AC_CHECK_HEADER([xlocale.h], [DEFINES="$DEFINES -DHAVE_XLOCALE_H"])
AC_CHECK_HEADER([sys/sysctl.h], [DEFINES="$DEFINES -DHAVE_SYS_SYSCTL_H"])
AC_CHECK_FUNC([strtof], [DEFINES="$DEFINES -DHAVE_STRTOF"])
AC_CHECK_FUNC([mkostemp], [DEFINES="$DEFINES -DHAVE_MKOSTEMP"])
dnl Check to see if dlopen is in default libraries (like Solaris, which
dnl has it in libc), or if libdl is needed to get it.
@@ -613,7 +675,7 @@ AC_CHECK_FUNCS([dladdr])
LIBS="$save_LIBS"
case "$host_os" in
darwin*|mingw*)
darwin*)
;;
*)
AC_CHECK_FUNCS([clock_gettime], [CLOCK_LIB=],
@@ -627,13 +689,10 @@ dnl See if posix_memalign is available
AC_CHECK_FUNC([posix_memalign], [DEFINES="$DEFINES -DHAVE_POSIX_MEMALIGN"])
dnl Check for pthreads
case "$host_os" in
mingw*)
;;
*)
AX_PTHREAD
;;
esac
AX_PTHREAD
if test "x$ax_pthread_ok" = xno; then
AC_MSG_ERROR([Building mesa on this platform requires pthreads])
fi
dnl AX_PTHREADS leaves PTHREAD_LIBS empty for gcc and sets PTHREAD_CFLAGS
dnl to -pthread, which causes problems if we need -lpthread to appear in
dnl pkgconfig files.
@@ -664,20 +723,15 @@ AC_ARG_ENABLE([opengl],
[enable_opengl="$enableval"],
[enable_opengl=yes])
AC_ARG_ENABLE([gles1],
[AS_HELP_STRING([--enable-gles1],
[enable support for OpenGL ES 1.x API @<:@default=disabled@:>@])],
[AS_HELP_STRING([--disable-gles1],
[disable support for OpenGL ES 1.x API @<:@default=enabled@:>@])],
[enable_gles1="$enableval"],
[enable_gles1=no])
[enable_gles1=yes])
AC_ARG_ENABLE([gles2],
[AS_HELP_STRING([--enable-gles2],
[enable support for OpenGL ES 2.x API @<:@default=disabled@:>@])],
[AS_HELP_STRING([--disable-gles2],
[disable support for OpenGL ES 2.x API @<:@default=enabled@:>@])],
[enable_gles2="$enableval"],
[enable_gles2=no])
AC_ARG_ENABLE([openvg],
[AS_HELP_STRING([--enable-openvg],
[enable support for OpenVG API @<:@default=disabled@:>@])],
[enable_openvg="$enableval"],
[enable_openvg=no])
[enable_gles2=yes])
AC_ARG_ENABLE([dri],
[AS_HELP_STRING([--enable-dri],
@@ -808,7 +862,6 @@ if test "x$enable_opengl" = xno -a \
"x$enable_gles1" = xno -a \
"x$enable_gles2" = xno -a \
"x$enable_nine" = xno -a \
"x$enable_openvg" = xno -a \
"x$enable_xa" = xno -a \
"x$enable_xvmc" = xno -a \
"x$enable_vdpau" = xno -a \
@@ -866,11 +919,18 @@ fi
AM_CONDITIONAL(HAVE_DRI_GLX, test "x$enable_glx" = xyes -a \
"x$enable_dri" = xyes)
# Check for libdrm
PKG_CHECK_MODULES([LIBDRM], [libdrm >= $LIBDRM_REQUIRED],
[have_libdrm=yes], [have_libdrm=no])
if test "x$have_libdrm" = xyes; then
DEFINES="$DEFINES -DHAVE_LIBDRM"
fi
# Select which platform-dependent DRI code gets built
case "$host_os" in
darwin*)
dri_platform='apple' ;;
gnu*|mingw*|cygwin*)
gnu*|cygwin*)
dri_platform='none' ;;
*)
dri_platform='drm' ;;
@@ -878,8 +938,8 @@ esac
AM_CONDITIONAL(HAVE_DRICOMMON, test "x$enable_dri" = xyes )
AM_CONDITIONAL(HAVE_DRISW, test "x$enable_dri" = xyes )
AM_CONDITIONAL(HAVE_DRI2, test "x$enable_dri" = xyes -a "x$dri_platform" = xdrm )
AM_CONDITIONAL(HAVE_DRI3, test "x$enable_dri3" = xyes -a "x$dri_platform" = xdrm )
AM_CONDITIONAL(HAVE_DRI2, test "x$enable_dri" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes )
AM_CONDITIONAL(HAVE_DRI3, test "x$enable_dri3" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes )
AM_CONDITIONAL(HAVE_APPLEDRI, test "x$enable_dri" = xyes -a "x$dri_platform" = xapple )
AC_ARG_ENABLE([shared-glapi],
@@ -897,12 +957,6 @@ x*yes*yes*)
;;
esac
# Building Xlib-GLX requires shared glapi to be disabled.
if test "x$enable_xlib_glx" = xyes; then
AC_MSG_NOTICE([Shared GLAPI should not used with Xlib-GLX, disabling])
enable_shared_glapi=no
fi
AM_CONDITIONAL(HAVE_SHARED_GLAPI, test "x$enable_shared_glapi" = xyes)
# Build the pipe-drivers as separate libraries/modules.
@@ -914,11 +968,9 @@ dnl
dnl Driver specific build directories
dnl
case "x$enable_glx$enable_xlib_glx" in
xyesyes)
if test -n "$with_gallium_drivers" -a "x$enable_glx$enable_xlib_glx" = xyesyes; then
NEED_WINSYS_XLIB="yes"
;;
esac
fi
if test "x$enable_dri" = xyes; then
enable_gallium_loader="$enable_shared_pipe_drivers"
@@ -935,151 +987,6 @@ fi
AC_SUBST([MESA_LLVM])
# SHA1 hashing
AC_ARG_WITH([sha1],
[AS_HELP_STRING([--with-sha1=libc|libmd|libnettle|libgcrypt|libcrypto|libsha1|CommonCrypto|CryptoAPI],
[choose SHA1 implementation])])
case "x$with_sha1" in
x | xlibc | xlibmd | xlibnettle | xlibgcrypt | xlibcrypto | xlibsha1 | xCommonCrypto | xCryptoAPI)
;;
*)
AC_MSG_ERROR([Illegal value for --with-sha1: $with_sha1])
esac
AC_CHECK_FUNC([SHA1Init], [HAVE_SHA1_IN_LIBC=yes])
if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_LIBC" = xyes; then
with_sha1=libc
fi
if test "x$with_sha1" = xlibc && test "x$HAVE_SHA1_IN_LIBC" != xyes; then
AC_MSG_ERROR([sha1 in libc requested but not found])
fi
if test "x$with_sha1" = xlibc; then
AC_DEFINE([HAVE_SHA1_IN_LIBC], [1],
[Use libc SHA1 functions])
SHA1_LIBS=""
fi
AC_CHECK_FUNC([CC_SHA1_Init], [HAVE_SHA1_IN_COMMONCRYPTO=yes])
if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_COMMONCRYPTO" = xyes; then
with_sha1=CommonCrypto
fi
if test "x$with_sha1" = xCommonCrypto && test "x$HAVE_SHA1_IN_COMMONCRYPTO" != xyes; then
AC_MSG_ERROR([CommonCrypto requested but not found])
fi
if test "x$with_sha1" = xCommonCrypto; then
AC_DEFINE([HAVE_SHA1_IN_COMMONCRYPTO], [1],
[Use CommonCrypto SHA1 functions])
SHA1_LIBS=""
fi
dnl stdcall functions cannot be tested with AC_CHECK_LIB
AC_CHECK_HEADER([wincrypt.h], [HAVE_SHA1_IN_CRYPTOAPI=yes], [], [#include <windows.h>])
if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_CRYPTOAPI" = xyes; then
with_sha1=CryptoAPI
fi
if test "x$with_sha1" = xCryptoAPI && test "x$HAVE_SHA1_IN_CRYPTOAPI" != xyes; then
AC_MSG_ERROR([CryptoAPI requested but not found])
fi
if test "x$with_sha1" = xCryptoAPI; then
AC_DEFINE([HAVE_SHA1_IN_CRYPTOAPI], [1],
[Use CryptoAPI SHA1 functions])
SHA1_LIBS=""
fi
AC_CHECK_LIB([md], [SHA1Init], [HAVE_LIBMD=yes])
if test "x$with_sha1" = x && test "x$HAVE_LIBMD" = xyes; then
with_sha1=libmd
fi
if test "x$with_sha1" = xlibmd && test "x$HAVE_LIBMD" != xyes; then
AC_MSG_ERROR([libmd requested but not found])
fi
if test "x$with_sha1" = xlibmd; then
AC_DEFINE([HAVE_SHA1_IN_LIBMD], [1],
[Use libmd SHA1 functions])
SHA1_LIBS=-lmd
fi
PKG_CHECK_MODULES([LIBSHA1], [libsha1], [HAVE_LIBSHA1=yes], [HAVE_LIBSHA1=no])
if test "x$with_sha1" = x && test "x$HAVE_LIBSHA1" = xyes; then
with_sha1=libsha1
fi
if test "x$with_sha1" = xlibsha1 && test "x$HAVE_LIBSHA1" != xyes; then
AC_MSG_ERROR([libsha1 requested but not found])
fi
if test "x$with_sha1" = xlibsha1; then
AC_DEFINE([HAVE_SHA1_IN_LIBSHA1], [1],
[Use libsha1 for SHA1])
SHA1_LIBS=-lsha1
fi
AC_CHECK_LIB([nettle], [nettle_sha1_init], [HAVE_LIBNETTLE=yes])
if test "x$with_sha1" = x && test "x$HAVE_LIBNETTLE" = xyes; then
with_sha1=libnettle
fi
if test "x$with_sha1" = xlibnettle && test "x$HAVE_LIBNETTLE" != xyes; then
AC_MSG_ERROR([libnettle requested but not found])
fi
if test "x$with_sha1" = xlibnettle; then
AC_DEFINE([HAVE_SHA1_IN_LIBNETTLE], [1],
[Use libnettle SHA1 functions])
SHA1_LIBS=-lnettle
fi
AC_CHECK_LIB([gcrypt], [gcry_md_open], [HAVE_LIBGCRYPT=yes])
if test "x$with_sha1" = x && test "x$HAVE_LIBGCRYPT" = xyes; then
with_sha1=libgcrypt
fi
if test "x$with_sha1" = xlibgcrypt && test "x$HAVE_LIBGCRYPT" != xyes; then
AC_MSG_ERROR([libgcrypt requested but not found])
fi
if test "x$with_sha1" = xlibgcrypt; then
AC_DEFINE([HAVE_SHA1_IN_LIBGCRYPT], [1],
[Use libgcrypt SHA1 functions])
SHA1_LIBS=-lgcrypt
fi
# We don't need all of the OpenSSL libraries, just libcrypto
AC_CHECK_LIB([crypto], [SHA1_Init], [HAVE_LIBCRYPTO=yes])
PKG_CHECK_MODULES([OPENSSL], [openssl], [HAVE_OPENSSL_PKC=yes],
[HAVE_OPENSSL_PKC=no])
if test "x$HAVE_LIBCRYPTO" = xyes || test "x$HAVE_OPENSSL_PKC" = xyes; then
if test "x$with_sha1" = x; then
with_sha1=libcrypto
fi
else
if test "x$with_sha1" = xlibcrypto; then
AC_MSG_ERROR([OpenSSL libcrypto requested but not found])
fi
fi
if test "x$with_sha1" = xlibcrypto; then
if test "x$HAVE_LIBCRYPTO" = xyes; then
SHA1_LIBS=-lcrypto
else
SHA1_LIBS="$OPENSSL_LIBS"
SHA1_CFLAGS="$OPENSSL_CFLAGS"
fi
fi
AC_MSG_CHECKING([for SHA1 implementation])
AC_MSG_RESULT([$with_sha1])
AC_SUBST(SHA1_LIBS)
AC_SUBST(SHA1_CFLAGS)
# Allow user to configure out the shader-cache feature
AC_ARG_ENABLE([shader-cache],
AS_HELP_STRING([--disable-shader-cache], [Disable binary shader cache]),
[enable_shader_cache="$enableval"],
[if test "x$with_sha1" != "x"; then
enable_shader_cache=yes
else
enable_shader_cache=no
fi])
if test "x$with_sha1" = "x"; then
if test "x$enable_shader_cache" = "xyes"; then
AC_MSG_ERROR([Cannot enable shader cache (no SHA-1 implementation found)])
fi
fi
AM_CONDITIONAL([ENABLE_SHADER_CACHE], [test x$enable_shader_cache = xyes])
# Check for libdrm
PKG_CHECK_MODULES([LIBDRM], [libdrm >= $LIBDRM_REQUIRED],
[have_libdrm=yes], [have_libdrm=no])
if test "x$have_libdrm" = xyes; then
DEFINES="$DEFINES -DHAVE_LIBDRM"
fi
case "$host_os" in
linux*)
need_pci_id=yes ;;
@@ -1315,7 +1222,7 @@ if test "x$enable_dri" = xyes; then
fi
;;
darwin*)
DEFINES="$DEFINES -DGLX_ALIAS_UNSUPPORTED"
DEFINES="$DEFINES -DGLX_ALIAS_UNSUPPORTED -DBUILDING_MESA"
if test "x$with_dri_drivers" = "xyes"; then
with_dri_drivers="swrast"
fi
@@ -1336,26 +1243,6 @@ if test "x$enable_dri" = xyes; then
[AC_MSG_ERROR([Expat library required for DRI not found])])
EXPAT_LIBS="-lexpat"])
DRICOMMON_NEED_LIBDRM=no
# If we are building any DRI driver other than swrast.
if test -n "$with_dri_drivers"; then
if test "x$with_dri_drivers" != xswrast; then
# ... libdrm is required
if test "x$have_libdrm" != xyes; then
AC_MSG_ERROR([DRI drivers requires libdrm >= $LIBDRM_REQUIRED])
fi
DRICOMMON_NEED_LIBDRM=yes
fi
fi
# If we're building any gallium DRI driver other than swrast
if test -n "$with_gallium_drivers" -a "x$DRICOMMON_NEED_LIBDRM" = xno; then
if test "x$with_gallium_drivers" != xswrast; then
# ... build a libdrm aware dricommon
DRICOMMON_NEED_LIBDRM=yes
fi
fi
# put all the necessary libs together
DRI_LIB_DEPS="$DRI_LIB_DEPS $SELINUX_LIBS $LIBDRM_LIBS $EXPAT_LIBS -lm $PTHREAD_LIBS $DLOPEN_LIBS"
fi
@@ -1383,7 +1270,7 @@ if test -n "$with_dri_drivers"; then
;;
xnouveau)
HAVE_NOUVEAU_DRI=yes;
PKG_CHECK_MODULES([NOUVEAU], [libdrm_nouveau >= $LIBDRM_NVVIEUX_REQUIRED])
PKG_CHECK_MODULES([NVVIEUX], [libdrm_nouveau >= $LIBDRM_NVVIEUX_REQUIRED])
;;
xradeon)
HAVE_RADEON_DRI=yes;
@@ -1469,7 +1356,6 @@ if test "x$enable_gbm" = xyes; then
fi
if test "x$enable_dri" = xyes; then
GBM_BACKEND_DIRS="$GBM_BACKEND_DIRS dri"
if test "x$enable_shared_glapi" = xno; then
AC_MSG_ERROR([gbm_dri requires --enable-shared-glapi])
fi
@@ -1504,8 +1390,15 @@ if test "x$enable_egl" = xyes; then
if test "$enable_static" != yes; then
if test "x$enable_dri" = xyes; then
HAVE_EGL_DRIVER_DRI2=1
fi
HAVE_EGL_DRIVER_DRI2=1
if test "x$enable_shared_glapi" = xno; then
AC_MSG_ERROR([egl_dri2 requires --enable-shared-glapi])
fi
else
# Avoid building an "empty" libEGL. Drop/update this
# when other backends (haiku?) come along.
AC_MSG_ERROR([egl requires --enable-dri])
fi
fi
fi
@@ -1528,29 +1421,6 @@ if test "x$enable_xa" = xyes; then
fi
AM_CONDITIONAL(HAVE_ST_XA, test "x$enable_xa" = xyes)
dnl
dnl OpenVG configuration
dnl
VG_LIB_DEPS=""
if test "x$enable_openvg" = xyes; then
if test "x$enable_egl" = xno; then
AC_MSG_ERROR([cannot enable OpenVG without EGL])
fi
if test -z "$with_gallium_drivers"; then
AC_MSG_ERROR([cannot enable OpenVG without Gallium])
fi
AC_MSG_ERROR([Cannot enable OpenVG, because egl_gallium has been removed and
OpenVG has not been integrated into standard libEGL yet])
EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(VG_LIB)'
VG_LIB_DEPS="$VG_LIB_DEPS $SELINUX_LIBS $PTHREAD_LIBS"
VG_PC_LIB_PRIV="-lm $CLOCK_LIB $PTHREAD_LIBS $DLOPEN_LIBS"
AC_SUBST([VG_PC_LIB_PRIV])
fi
AM_CONDITIONAL(HAVE_OPENVG, test "x$enable_openvg" = xyes)
dnl
dnl Gallium G3DVL configuration
dnl
@@ -1572,14 +1442,23 @@ if test -n "$with_gallium_drivers" -a "x$with_gallium_drivers" != xswrast; then
fi
fi
if test "x$enable_dri" = xyes -o \
"x$enable_xvmc" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx" = xyes -o \
"x$enable_va" = xyes; then
need_gallium_vl=yes
fi
AM_CONDITIONAL(NEED_GALLIUM_VL, test "x$need_gallium_vl" = xyes)
if test "x$enable_xvmc" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx" = xyes -o \
"x$enable_va" = xyes; then
PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
need_gallium_vl=yes
need_gallium_vl_winsys=yes
fi
AM_CONDITIONAL(NEED_GALLIUM_VL, test "x$need_gallium_vl" = xyes)
AM_CONDITIONAL(NEED_GALLIUM_VL_WINSYS, test "x$need_gallium_vl_winsys" = xyes)
if test "x$enable_xvmc" = xyes; then
PKG_CHECK_MODULES([XVMC], [xvmc >= $XVMC_REQUIRED])
@@ -1612,9 +1491,13 @@ if test "x$enable_nine" = xyes; then
if ! echo "$with_gallium_drivers" | grep -q 'swrast'; then
AC_MSG_ERROR([nine requires the gallium swrast driver])
fi
if test "x$with_gallium_drivers" == xswrast; then
if test "x$with_gallium_drivers" = xswrast; then
AC_MSG_ERROR([nine requires at least one non-swrast gallium driver])
fi
if test $GCC_VERSION_MAJOR -lt 4 -o $GCC_VERSION_MAJOR -eq 4 -a $GCC_VERSION_MINOR -lt 6; then
AC_MSG_ERROR([gcc >= 4.6 is required to build nine])
fi
if test "x$enable_dri3" = xno; then
AC_MSG_WARN([using nine together with wine requires DRI3 enabled system])
fi
@@ -1627,19 +1510,6 @@ dnl
dnl OpenCL configuration
dnl
AC_ARG_WITH([libclc-path],
[AS_HELP_STRING([--with-libclc-path],
[DEPRECATED: See http://dri.freedesktop.org/wiki/GalliumCompute#How_to_Install])],
[LIBCLC_PATH="$withval"],
[LIBCLC_PATH=''])
if test -n "$LIBCLC_PATH"; then
AC_MSG_ERROR([The --with-libclc-path option has been deprecated.
Please review the updated build instructions for clover:
http://dri.freedesktop.org/wiki/GalliumCompute])
fi
AC_ARG_WITH([clang-libdir],
[AS_HELP_STRING([--with-clang-libdir],
[Path to Clang libraries @<:@default=llvm-config --libdir@:>@])],
@@ -1730,16 +1600,26 @@ if test "x$with_egl_platforms" != "x" -a "x$enable_egl" != xyes; then
AC_MSG_ERROR([cannot build egl state tracker without EGL library])
fi
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland_scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland_scanner`,
WAYLAND_SCANNER='')
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner])
fi
# Do per-EGL platform setups and checks
egl_platforms=`IFS=', '; echo $with_egl_platforms`
for plat in $egl_platforms; do
case "$plat" in
wayland)
test "x$have_libdrm" != xyes &&
AC_MSG_ERROR([EGL platform wayland requires libdrm >= $LIBDRM_REQUIRED])
PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED])
WAYLAND_PREFIX=`$PKG_CONFIG --variable=prefix wayland-client`
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner],,
[${WAYLAND_PREFIX}/bin$PATH_SEPARATOR$PATH])
if test "x$WAYLAND_SCANNER" = x; then
AC_MSG_ERROR([wayland-scanner is needed to compile the wayland egl platform])
fi
;;
x11)
@@ -1753,7 +1633,9 @@ for plat in $egl_platforms; do
AC_MSG_ERROR([EGL platform drm requires libdrm >= $LIBDRM_REQUIRED])
;;
android|fbdev|gdi|null)
surfaceless)
test "x$have_libdrm" != xyes &&
AC_MSG_ERROR([EGL platform surfaceless requires libdrm >= $LIBDRM_REQUIRED])
;;
*)
@@ -1770,19 +1652,16 @@ done
# libEGL wants to default to the first platform specified in
# ./configure. parse that here.
if test "x$egl_platforms" != "x"; then
FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr 'a-z' 'A-Z'`
FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr '[[a-z]]' '[[A-Z]]'`
EGL_NATIVE_PLATFORM="_EGL_PLATFORM_$FIRST_PLATFORM_CAPS"
else
EGL_NATIVE_PLATFORM="_EGL_INVALID_PLATFORM"
fi
if echo "$egl_platforms" | grep -q 'x11'; then
NEED_WINSYS_XLIB=yes
fi
AM_CONDITIONAL(HAVE_EGL_PLATFORM_X11, echo "$egl_platforms" | grep -q 'x11')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_WAYLAND, echo "$egl_platforms" | grep -q 'wayland')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_DRM, echo "$egl_platforms" | grep -q 'drm')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_FBDEV, echo "$egl_platforms" | grep -q 'fbdev')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_SURFACELESS, echo "$egl_platforms" | grep -q 'surfaceless')
AM_CONDITIONAL(HAVE_EGL_PLATFORM_NULL, echo "$egl_platforms" | grep -q 'null')
AM_CONDITIONAL(HAVE_EGL_DRIVER_DRI2, test "x$HAVE_EGL_DRIVER_DRI2" != "x")
@@ -1797,21 +1676,6 @@ if ! echo "$egl_platforms" | grep -q 'x11'; then
GL_PC_CFLAGS="$GL_PC_CFLAGS -DMESA_EGL_NO_X11_HEADERS"
fi
AC_ARG_WITH([max-width],
[AS_HELP_STRING([--with-max-width=N],
[Maximum framebuffer width (4096)])],
[DEFINES="${DEFINES} -DMAX_WIDTH=${withval}";
AS_IF([test "${withval}" -gt "4096"],
[AC_MSG_WARN([Large framebuffer: see s_tritemp.h comments.])])]
)
AC_ARG_WITH([max-height],
[AS_HELP_STRING([--with-max-height=N],
[Maximum framebuffer height (4096)])],
[DEFINES="${DEFINES} -DMAX_HEIGHT=${withval}";
AS_IF([test "${withval}" -gt "4096"],
[AC_MSG_WARN([Large framebuffer: see s_tritemp.h comments.])])]
)
dnl
dnl Gallium LLVM
dnl
@@ -1858,6 +1722,13 @@ strip_unwanted_llvm_flags() {
-e 's/-fstack-protector-strong\>//g'
}
llvm_check_version_for() {
if test "${LLVM_VERSION_INT}${LLVM_VERSION_PATCH}" -lt "${1}0${2}${3}"; then
AC_MSG_ERROR([LLVM $1.$2.$3 or newer is required for $4])
fi
}
if test -z "$with_gallium_drivers"; then
enable_gallium_llvm=no
@@ -1906,30 +1777,15 @@ if test "x$enable_gallium_llvm" = xyes; then
AC_MSG_ERROR([LLVM $LLVM_REQUIRED_VERSION_MAJOR.$LLVM_REQUIRED_VERSION_MINOR or newer is required])
fi
LLVM_COMPONENTS="engine bitwriter"
if $LLVM_CONFIG --components | grep -qw 'mcjit'; then
LLVM_COMPONENTS="${LLVM_COMPONENTS} mcjit"
fi
LLVM_COMPONENTS="engine bitwriter mcjit mcdisassembler"
if test "x$enable_opencl" = xyes; then
llvm_check_version_for "3" "5" "0" "opencl"
LLVM_COMPONENTS="${LLVM_COMPONENTS} all-targets ipo linker instrumentation"
# LLVM 3.3 >= 177971 requires IRReader
if $LLVM_CONFIG --components | grep -qw 'irreader'; then
LLVM_COMPONENTS="${LLVM_COMPONENTS} irreader"
fi
# LLVM 3.4 requires Option
if $LLVM_CONFIG --components | grep -qw 'option'; then
LLVM_COMPONENTS="${LLVM_COMPONENTS} option"
fi
# Current OpenCL/Clover and LLVM 3.5 require ObjCARCOpts and ProfileData
if $LLVM_CONFIG --components | grep -qw 'objcarcopts'; then
LLVM_COMPONENTS="${LLVM_COMPONENTS} objcarcopts"
fi
if $LLVM_CONFIG --components | grep -qw 'profiledata'; then
LLVM_COMPONENTS="${LLVM_COMPONENTS} profiledata"
fi
LLVM_COMPONENTS="${LLVM_COMPONENTS} irreader option objcarcopts profiledata"
fi
DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DLLVM_VERSION_PATCH=$LLVM_VERSION_PATCH"
DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DMESA_LLVM_VERSION_PATCH=$LLVM_VERSION_PATCH"
MESA_LLVM=1
dnl Check for Clang internal headers
@@ -2048,21 +1904,19 @@ require_egl_drm() {
}
radeon_llvm_check() {
if test ${LLVM_VERSION_INT} -lt 307; then
amdgpu_llvm_target_name='r600'
else
amdgpu_llvm_target_name='amdgpu'
fi
if test "x$enable_gallium_llvm" != "xyes"; then
AC_MSG_ERROR([--enable-gallium-llvm is required when building $1])
fi
LLVM_REQUIRED_VERSION_MAJOR="3"
LLVM_REQUIRED_VERSION_MINOR="4"
LLVM_REQUIRED_VERSION_PATCH="2"
if test "${LLVM_VERSION_INT}${LLVM_VERSION_PATCH}" -lt "${LLVM_REQUIRED_VERSION_MAJOR}0${LLVM_REQUIRED_VERSION_MINOR}${LLVM_REQUIRED_VERSION_PATCH}"; then
AC_MSG_ERROR([LLVM $LLVM_REQUIRED_VERSION_MAJOR.$LLVM_REQUIRED_VERSION_MINOR.$LLVM_REQUIRED_VERSION_PATCH or newer is required for $1])
llvm_check_version_for "3" "4" "2" $1
if test true && $LLVM_CONFIG --targets-built | grep -iqvw $amdgpu_llvm_target_name ; then
AC_MSG_ERROR([LLVM $amdgpu_llvm_target_name not enabled in your LLVM build.])
fi
if test true && $LLVM_CONFIG --targets-built | grep -qvw 'R600' ; then
AC_MSG_ERROR([LLVM R600 Target not enabled. You can enable it when building the LLVM
sources with the --enable-experimental-targets=R600
configure flag])
fi
LLVM_COMPONENTS="${LLVM_COMPONENTS} r600 bitreader ipo"
LLVM_COMPONENTS="${LLVM_COMPONENTS} $amdgpu_llvm_target_name bitreader ipo"
NEED_RADEON_LLVM=yes
if test "x$have_libelf" != xyes; then
AC_MSG_ERROR([$1 requires libelf when using llvm])
@@ -2117,6 +1971,7 @@ if test -n "$with_gallium_drivers"; then
xradeonsi)
HAVE_GALLIUM_RADEONSI=yes
PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([AMDGPU], [libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
gallium_require_drm "radeonsi"
gallium_require_drm_loader
radeon_llvm_check "radeonsi"
@@ -2227,31 +2082,15 @@ AM_CONDITIONAL(HAVE_GALLIUM_STATIC_TARGETS, test "x$enable_shared_pipe_drivers"
# use by XA tracker in particular, but could be used in any case
# where communication with xserver is not desired).
if test "x$enable_gallium_loader" = xyes; then
if test "x$NEED_WINSYS_XLIB" = xyes; then
GALLIUM_PIPE_LOADER_DEFINES="$GALLIUM_PIPE_LOADER_DEFINES -DHAVE_PIPE_LOADER_XLIB"
fi
if test "x$enable_dri" = xyes; then
GALLIUM_PIPE_LOADER_DEFINES="$GALLIUM_PIPE_LOADER_DEFINES -DHAVE_PIPE_LOADER_DRI"
fi
if test "x$enable_gallium_drm_loader" = xyes; then
GALLIUM_PIPE_LOADER_DEFINES="$GALLIUM_PIPE_LOADER_DEFINES -DHAVE_PIPE_LOADER_DRM"
PKG_CHECK_MODULES([GALLIUM_PIPE_LOADER_XCB], [xcb xcb-dri2],
pipe_loader_have_xcb=yes, pipe_loader_have_xcb=no)
if test "x$pipe_loader_have_xcb" = xyes; then
GALLIUM_PIPE_LOADER_CLIENT_DEFINES="$GALLIUM_PIPE_LOADER_CLIENT_DEFINES -DHAVE_PIPE_LOADER_XCB"
GALLIUM_PIPE_LOADER_CLIENT_LIBS="$GALLIUM_PIPE_LOADER_CLIENT_LIBS $GALLIUM_PIPE_LOADER_XCB_LIBS $LIBDRM_LIBS"
fi
fi
GALLIUM_PIPE_LOADER_CLIENT_DEFINES="$GALLIUM_PIPE_LOADER_CLIENT_DEFINES $GALLIUM_PIPE_LOADER_DEFINES"
GALLIUM_PIPE_LOADER_CLIENT_LIBS="$GALLIUM_PIPE_LOADER_CLIENT_LIBS $GALLIUM_PIPE_LOADER_LIBS"
AC_SUBST([GALLIUM_PIPE_LOADER_DEFINES])
AC_SUBST([GALLIUM_PIPE_LOADER_LIBS])
AC_SUBST([GALLIUM_PIPE_LOADER_CLIENT_DEFINES])
AC_SUBST([GALLIUM_PIPE_LOADER_CLIENT_LIBS])
fi
AM_CONDITIONAL(HAVE_I915_DRI, test x$HAVE_I915_DRI = xyes)
@@ -2278,7 +2117,6 @@ fi
AC_SUBST([ELF_LIB])
AM_CONDITIONAL(DRICOMMON_NEED_LIBDRM, test "x$DRICOMMON_NEED_LIBDRM" = xyes)
AM_CONDITIONAL(HAVE_LIBDRM, test "x$have_libdrm" = xyes)
AM_CONDITIONAL(HAVE_X11_DRIVER, test "x$enable_xlib_glx" = xyes)
AM_CONDITIONAL(HAVE_OSMESA, test "x$enable_osmesa" = xyes)
@@ -2331,8 +2169,7 @@ CXXFLAGS="$CXXFLAGS $USER_CXXFLAGS"
dnl Substitute the config
AC_CONFIG_FILES([Makefile
src/Makefile
src/egl/drivers/dri2/Makefile
src/egl/main/Makefile
src/egl/Makefile
src/egl/main/egl.pc
src/egl/wayland/wayland-drm/Makefile
src/egl/wayland/wayland-egl/Makefile
@@ -2341,9 +2178,7 @@ AC_CONFIG_FILES([Makefile
src/gallium/auxiliary/Makefile
src/gallium/auxiliary/pipe-loader/Makefile
src/gallium/drivers/freedreno/Makefile
src/gallium/drivers/galahad/Makefile
src/gallium/drivers/i915/Makefile
src/gallium/drivers/identity/Makefile
src/gallium/drivers/ilo/Makefile
src/gallium/drivers/llvmpipe/Makefile
src/gallium/drivers/noop/Makefile
@@ -2357,7 +2192,6 @@ AC_CONFIG_FILES([Makefile
src/gallium/drivers/svga/Makefile
src/gallium/drivers/trace/Makefile
src/gallium/drivers/vc4/Makefile
src/gallium/drivers/vc4/kernel/Makefile
src/gallium/state_trackers/clover/Makefile
src/gallium/state_trackers/dri/Makefile
src/gallium/state_trackers/glx/xlib/Makefile
@@ -2366,7 +2200,6 @@ AC_CONFIG_FILES([Makefile
src/gallium/state_trackers/osmesa/Makefile
src/gallium/state_trackers/va/Makefile
src/gallium/state_trackers/vdpau/Makefile
src/gallium/state_trackers/vega/Makefile
src/gallium/state_trackers/xa/Makefile
src/gallium/state_trackers/xvmc/Makefile
src/gallium/targets/d3dadapter9/Makefile
@@ -2375,6 +2208,7 @@ AC_CONFIG_FILES([Makefile
src/gallium/targets/libgl-xlib/Makefile
src/gallium/targets/omx/Makefile
src/gallium/targets/opencl/Makefile
src/gallium/targets/opencl/mesa.icd
src/gallium/targets/osmesa/Makefile
src/gallium/targets/osmesa/osmesa.pc
src/gallium/targets/pipe-loader/Makefile
@@ -2390,12 +2224,11 @@ AC_CONFIG_FILES([Makefile
src/gallium/winsys/intel/drm/Makefile
src/gallium/winsys/nouveau/drm/Makefile
src/gallium/winsys/radeon/drm/Makefile
src/gallium/winsys/amdgpu/drm/Makefile
src/gallium/winsys/svga/drm/Makefile
src/gallium/winsys/sw/dri/Makefile
src/gallium/winsys/sw/fbdev/Makefile
src/gallium/winsys/sw/kms-dri/Makefile
src/gallium/winsys/sw/null/Makefile
src/gallium/winsys/sw/wayland/Makefile
src/gallium/winsys/sw/wrapper/Makefile
src/gallium/winsys/sw/xlib/Makefile
src/gallium/winsys/vc4/drm/Makefile
@@ -2444,7 +2277,6 @@ echo " includedir: $includedir"
dnl API info
echo ""
echo " OpenGL: $enable_opengl (ES1: $enable_gles1 ES2: $enable_gles2)"
echo " OpenVG: $enable_openvg"
dnl Driver info
echo ""
@@ -2513,12 +2345,6 @@ else
echo " Gallium: no"
fi
dnl Shader cache
echo ""
echo " Shader cache: $enable_shader_cache"
if test "x$enable_shader_cache" = "xyes"; then
echo " With SHA1 from: $with_sha1"
fi
dnl Libraries
echo ""
@@ -2542,6 +2368,7 @@ if test "x$MESA_LLVM" = x1; then
echo " LLVM_CFLAGS: $LLVM_CFLAGS"
echo " LLVM_CXXFLAGS: $LLVM_CXXFLAGS"
echo " LLVM_CPPFLAGS: $LLVM_CPPFLAGS"
echo " LLVM_LDFLAGS: $LLVM_LDFLAGS"
echo ""
fi
echo " PYTHON2: $PYTHON2"

View File

@@ -21,23 +21,23 @@ Feature Status
GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe
glBindFragDataLocation, glGetFragDataLocation DONE
Conditional rendering (GL_NV_conditional_render) DONE (r300, swrast)
Map buffer subranges (GL_ARB_map_buffer_range) DONE (r300, swrast)
Clamping controls (GL_ARB_color_buffer_float) DONE (r300)
Float textures, renderbuffers (GL_ARB_texture_float) DONE (r300)
Conditional rendering (GL_NV_conditional_render) DONE ()
Map buffer subranges (GL_ARB_map_buffer_range) DONE ()
Clamping controls (GL_ARB_color_buffer_float) DONE ()
Float textures, renderbuffers (GL_ARB_texture_float) DONE ()
GL_EXT_packed_float DONE ()
GL_EXT_texture_shared_exponent DONE (swrast)
GL_EXT_texture_shared_exponent DONE ()
Float depth buffers (GL_ARB_depth_buffer_float) DONE ()
Framebuffer objects (GL_ARB_framebuffer_object) DONE (r300, swrast)
Framebuffer objects (GL_ARB_framebuffer_object) DONE ()
GL_ARB_half_float_pixel DONE (all drivers)
GL_ARB_half_float_vertex DONE (r300, swrast)
GL_ARB_half_float_vertex DONE ()
GL_EXT_texture_integer DONE ()
GL_EXT_texture_array DONE ()
Per-buffer blend and masks (GL_EXT_draw_buffers2) DONE (swrast)
GL_EXT_texture_compression_rgtc DONE (r300, swrast)
GL_ARB_texture_rg DONE (r300, swrast)
Per-buffer blend and masks (GL_EXT_draw_buffers2) DONE ()
GL_EXT_texture_compression_rgtc DONE ()
GL_ARB_texture_rg DONE ()
Transform feedback (GL_EXT_transform_feedback) DONE ()
Vertex array objects (GL_ARB_vertex_array_object) DONE (all drivers)
Vertex array objects (GL_ARB_vertex_array_object) DONE ()
sRGB framebuffer format (GL_EXT_framebuffer_sRGB) DONE ()
glClearBuffer commands DONE
glGetStringi command DONE
@@ -45,7 +45,7 @@ GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
glVertexAttribI commands DONE
Depth format cube textures DONE ()
GLX_ARB_create_context (GLX 1.4 is required) DONE
Multisample anti-aliasing DONE (llvmpipe (*), softpipe (*), r300)
Multisample anti-aliasing DONE (llvmpipe (*), softpipe (*))
(*) llvmpipe and softpipe have fake Multisample anti-aliasing support
@@ -53,28 +53,28 @@ GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
GL 3.1, GLSL 1.40 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe
Forward compatible context support/deprecations DONE ()
Instanced drawing (GL_ARB_draw_instanced) DONE (swrast)
Buffer copying (GL_ARB_copy_buffer) DONE (r300, swrast)
Primitive restart (GL_NV_primitive_restart) DONE (r300)
Instanced drawing (GL_ARB_draw_instanced) DONE ()
Buffer copying (GL_ARB_copy_buffer) DONE ()
Primitive restart (GL_NV_primitive_restart) DONE ()
16 vertex texture image units DONE ()
Texture buffer objs (GL_ARB_texture_buffer_object) DONE for OpenGL 3.1 contexts ()
Rectangular textures (GL_ARB_texture_rectangle) DONE (r300, swrast)
Uniform buffer objs (GL_ARB_uniform_buffer_object) DONE (swrast)
Signed normalized textures (GL_EXT_texture_snorm) DONE (r300)
Rectangular textures (GL_ARB_texture_rectangle) DONE ()
Uniform buffer objs (GL_ARB_uniform_buffer_object) DONE ()
Signed normalized textures (GL_EXT_texture_snorm) DONE ()
GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe
Core/compatibility profiles DONE
Geometry shaders DONE ()
BGRA vertex order (GL_ARB_vertex_array_bgra) DONE (r300, swrast)
Base vertex offset(GL_ARB_draw_elements_base_vertex) DONE (r300, swrast)
Frag shader coord (GL_ARB_fragment_coord_conventions) DONE (r300, swrast)
Provoking vertex (GL_ARB_provoking_vertex) DONE (r300, swrast)
BGRA vertex order (GL_ARB_vertex_array_bgra) DONE ()
Base vertex offset(GL_ARB_draw_elements_base_vertex) DONE ()
Frag shader coord (GL_ARB_fragment_coord_conventions) DONE ()
Provoking vertex (GL_ARB_provoking_vertex) DONE ()
Seamless cubemaps (GL_ARB_seamless_cube_map) DONE ()
Multisample textures (GL_ARB_texture_multisample) DONE ()
Frag depth clamp (GL_ARB_depth_clamp) DONE (swrast)
Fence objects (GL_ARB_sync) DONE (r300, swrast)
Frag depth clamp (GL_ARB_depth_clamp) DONE ()
Fence objects (GL_ARB_sync) DONE ()
GLX_ARB_create_context_profile DONE
@@ -82,53 +82,53 @@ GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
GL_ARB_blend_func_extended DONE ()
GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL)
GL_ARB_occlusion_query2 DONE (r300, swrast)
GL_ARB_occlusion_query2 DONE ()
GL_ARB_sampler_objects DONE (all drivers)
GL_ARB_shader_bit_encoding DONE ()
GL_ARB_texture_rgb10_a2ui DONE ()
GL_ARB_texture_swizzle DONE (r300, swrast)
GL_ARB_texture_swizzle DONE ()
GL_ARB_timer_query DONE ()
GL_ARB_instanced_arrays DONE (r300)
GL_ARB_instanced_arrays DONE ()
GL_ARB_vertex_type_2_10_10_10_rev DONE ()
GL 4.0, GLSL 4.00:
GL 4.0, GLSL 4.00 --- all DONE: nvc0, radeonsi
GL_ARB_draw_buffers_blend DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_draw_indirect DONE (i965, nvc0, radeonsi, llvmpipe, softpipe)
GL_ARB_gpu_shader5 DONE (i965, nvc0)
GL_ARB_draw_buffers_blend DONE (i965, nv50, r600, llvmpipe, softpipe)
GL_ARB_draw_indirect DONE (i965, r600, llvmpipe, softpipe)
GL_ARB_gpu_shader5 DONE (i965)
- 'precise' qualifier DONE
- Dynamically uniform sampler array indices DONE (r600)
- Dynamically uniform sampler array indices DONE (r600, softpipe)
- Dynamically uniform UBO array indices DONE (r600)
- Implicit signed -> unsigned conversions DONE
- Fused multiply-add DONE ()
- Packing/bitfield/conversion functions DONE (r600)
- Enhanced textureGather DONE (r600, radeonsi)
- Geometry shader instancing DONE (r600)
- Packing/bitfield/conversion functions DONE (r600, softpipe)
- Enhanced textureGather DONE (r600, softpipe)
- Geometry shader instancing DONE (r600, llvmpipe, softpipe)
- Geometry shader multiple streams DONE ()
- Enhanced per-sample shading DONE (r600)
- Interpolation functions DONE (r600)
- New overload resolution rules DONE
GL_ARB_gpu_shader_fp64 started (Dave)
GL_ARB_sample_shading DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_shader_subroutine not started
GL_ARB_tessellation_shader started (Chris, Ilia)
GL_ARB_texture_buffer_object_rgb32 DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_texture_cube_map_array DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_texture_gather DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_texture_query_lod DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_transform_feedback2 DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_transform_feedback3 DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_gpu_shader_fp64 DONE (llvmpipe, softpipe)
GL_ARB_sample_shading DONE (i965, nv50, r600)
GL_ARB_shader_subroutine DONE (i965, nv50, r600, llvmpipe, softpipe)
GL_ARB_tessellation_shader DONE ()
GL_ARB_texture_buffer_object_rgb32 DONE (i965, r600, llvmpipe, softpipe)
GL_ARB_texture_cube_map_array DONE (i965, nv50, r600, llvmpipe, softpipe)
GL_ARB_texture_gather DONE (i965, nv50, r600, llvmpipe, softpipe)
GL_ARB_texture_query_lod DONE (i965, nv50, r600)
GL_ARB_transform_feedback2 DONE (i965, nv50, r600, llvmpipe, softpipe)
GL_ARB_transform_feedback3 DONE (i965, nv50, r600, llvmpipe, softpipe)
GL 4.1, GLSL 4.10:
GL 4.1, GLSL 4.10 --- all DONE: nvc0, radeonsi
GL_ARB_ES2_compatibility DONE (i965, nv50, nvc0, r300, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_ES2_compatibility DONE (i965, nv50, r600, llvmpipe, softpipe)
GL_ARB_get_program_binary DONE (0 binary formats)
GL_ARB_separate_shader_objects DONE (all drivers)
GL_ARB_shader_precision started (Micah)
GL_ARB_vertex_attrib_64bit started (Dave)
GL_ARB_viewport_array DONE (i965, nv50, nvc0, r600, llvmpipe)
GL_ARB_shader_precision DONE (all drivers that support GLSL 4.10)
GL_ARB_vertex_attrib_64bit DONE (llvmpipe, softpipe)
GL_ARB_viewport_array DONE (i965, nv50, r600, llvmpipe)
GL 4.2, GLSL 4.20:
@@ -137,12 +137,13 @@ GL 4.2, GLSL 4.20:
GL_ARB_compressed_texture_pixel_storage DONE (all drivers)
GL_ARB_shader_atomic_counters DONE (i965)
GL_ARB_texture_storage DONE (all drivers)
GL_ARB_transform_feedback_instanced DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_transform_feedback_instanced DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_base_instance DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_shader_image_load_store in progress (curro)
GL_ARB_shader_image_load_store DONE (i965)
GL_ARB_conservative_depth DONE (all drivers that support GLSL 1.30)
GL_ARB_shading_language_420pack DONE (all drivers that support GLSL 1.30)
GL_ARB_internalformat_query DONE (i965, nv50, nvc0, r300, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_shading_language_packing DONE (all drivers)
GL_ARB_internalformat_query DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_map_buffer_alignment DONE (all drivers)
@@ -152,79 +153,80 @@ GL 4.3, GLSL 4.30:
GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30)
GL_ARB_clear_buffer_object DONE (all drivers)
GL_ARB_compute_shader in progress (jljusten)
GL_ARB_copy_image DONE (i965)
GL_ARB_copy_image DONE (i965) (gallium - in progress, VMware)
GL_KHR_debug DONE (all drivers)
GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL)
GL_ARB_fragment_layer_viewport DONE (nv50, nvc0, r600, llvmpipe)
GL_ARB_framebuffer_no_attachments not started
GL_ARB_fragment_layer_viewport DONE (nv50, nvc0, r600, radeonsi, llvmpipe)
GL_ARB_framebuffer_no_attachments DONE (i965)
GL_ARB_internalformat_query2 not started
GL_ARB_invalidate_subdata DONE (all drivers)
GL_ARB_multi_draw_indirect DONE (i965, nvc0, radeonsi, llvmpipe, softpipe)
GL_ARB_program_interface_query not started
GL_ARB_multi_draw_indirect DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_program_interface_query DONE (all drivers)
GL_ARB_robust_buffer_access_behavior not started
GL_ARB_shader_image_size not started
GL_ARB_shader_storage_buffer_object not started
GL_ARB_shader_image_size DONE (i965)
GL_ARB_shader_storage_buffer_object in progress (Iago Toral, Samuel Iglesias)
GL_ARB_stencil_texturing DONE (i965/gen8+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_texture_buffer_range DONE (nv50, nvc0, i965, r600, radeonsi, llvmpipe)
GL_ARB_texture_query_levels DONE (all drivers that support GLSL 1.30)
GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample)
GL_ARB_texture_view DONE (i965, nv50, nvc0)
GL_ARB_texture_view DONE (i965, nv50, nvc0, llvmpipe, softpipe)
GL_ARB_vertex_attrib_binding DONE (all drivers)
GL 4.4, GLSL 4.40:
GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drivers)
GL_ARB_buffer_storage DONE (i965, nv30, nv50, nvc0, r300, r600, radeonsi)
GL_ARB_clear_texture DONE (i965)
GL_ARB_buffer_storage DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_clear_texture DONE (i965) (gallium - in progress, VMware)
GL_ARB_enhanced_layouts not started
GL_ARB_multi_bind DONE (all drivers)
GL_ARB_query_buffer_object not started
GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv30, nv50, nvc0, r300, r600, radeonsi, swrast, llvmpipe, softpipe)
GL_ARB_texture_stencil8 not started
GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_texture_stencil8 DONE (nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_vertex_type_10f_11f_11f_rev DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL 4.5, GLSL 4.50:
GL_ARB_ES3_1_compatibility not started
GL_ARB_clip_control DONE (nv50, nvc0, r300, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_conditional_render_inverted DONE (i965, nv50, nvc0, llvmpipe, softpipe)
GL_ARB_cull_distance not started
GL_ARB_derivative_control DONE (i965, nv50, nvc0, r600)
GL_ARB_direct_state_access started
- Transform Feedback object started (Martin Peres)
- Buffer object started (Laura Ekstrand)
- Framebuffer object started (Laura Ekstrand)
- Renderbuffer object not started
- Texture object started (Laura Ekstrand)
- Vertex array object started (Fredrik Höglund)
- Sampler object not started
- Program Pipeline object not started
- Query object started (Martin Peres)
GL_ARB_get_texture_sub_image started (Brian Paul)
GL_ARB_clip_control DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_conditional_render_inverted DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_cull_distance in progress (Tobias)
GL_ARB_derivative_control DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_direct_state_access DONE (all drivers)
GL_ARB_get_texture_sub_image DONE (all drivers)
GL_ARB_shader_texture_image_samples not started
GL_ARB_texture_barrier DONE (nv50, nvc0, r300, r600, radeonsi)
GL_ARB_texture_barrier DONE (nv50, nvc0, r600, radeonsi)
GL_KHR_context_flush_control DONE (all - but needs GLX/EXT extension to be useful)
GL_KHR_robust_buffer_access_behavior not started
GL_KHR_robustness 90% done (the ARB variant)
GL_EXT_shader_integer_mix DONE (all drivers that support GLSL)
These are the extensions cherry-picked to make GLES 3.1
GLES3.1, GLSL ES 3.1
GL_ARB_arrays_of_arrays started (Timothy)
GL_ARB_compute_shader in progress (jljusten)
GL_ARB_draw_indirect DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL)
GL_ARB_framebuffer_no_attachments not started
GL_ARB_program_interface_query not started
GL_ARB_framebuffer_no_attachments DONE (i965)
GL_ARB_program_interface_query DONE (all drivers)
GL_ARB_shader_atomic_counters DONE (i965)
GL_ARB_shader_image_load_store in progress (curro)
GL_ARB_shader_storage_buffer_object not started
GL_ARB_shader_image_load_store DONE (i965)
GL_ARB_shader_image_size DONE (i965)
GL_ARB_shader_storage_buffer_object in progress (Iago Toral, Samuel Iglesias)
GL_ARB_shading_language_packing DONE (all drivers)
GL_ARB_separate_shader_objects DONE (all drivers)
GL_ARB_stencil_texturing DONE (i965/gen8+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
Multisample textures (GL_ARB_texture_multisample) DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample)
GL_ARB_vertex_attrib_binding DONE (all drivers)
GS5 Enhanced textureGather DONE (i965, nvc0, r600, radeonsi)
GS5 Packing/bitfield/conversion functions DONE (i965, nvc0, r600)
GS5 Packing/bitfield/conversion functions DONE (i965, nvc0, r600, radeonsi)
GL_EXT_shader_integer_mix DONE (all drivers that support GLSL)
Additional functions not covered above:
glMemoryBarrierByRegion
glGetTexLevelParameter[fi]v - needs updates to restrict to GLES enums
glGetBooleani_v - needs updates to restrict to GLES enums
More info about these features and the work involved can be found at
http://dri.freedesktop.org/wiki/MissingFunctionality

View File

@@ -11,10 +11,6 @@ no longer shipped or supported.
Run
scons osmesa mesagdi
to build classic mesa Windows GDI drivers; or
scons libgl-gdi
to build gallium based GDI driver.

View File

@@ -103,7 +103,7 @@ Mesa Version History
- Stencil-related functions now work in display lists
Changes:
- renamed aux.h as glaux.h (MS-DOS names can't start with aux)
- most filenames are in 8.3 format to accomodate MS-DOS
- most filenames are in 8.3 format to accommodate MS-DOS
- use GLubytes to store arrays of colors instead of GLints
1.2.2 August 2, 1995
@@ -1007,7 +1007,7 @@ Mesa Version History
- glGetTexImage was using pixel unpacking instead of packing params
- auto-mipmap generation for cube maps was incorrect
Changes:
- max texture units reduced to six to accomodate texture rectangles
- max texture units reduced to six to accommodate texture rectangles
- removed unfinished GL_MESA_sprite_point extension code

View File

@@ -61,7 +61,6 @@
<li><a href="shading.html" target="_parent">Shading Language</a>
<li><a href="egl.html" target="_parent">EGL</a>
<li><a href="opengles.html" target="_parent">OpenGL ES</a>
<li><a href="openvg.html" target="_parent">OpenVG / Vega</a>
<li><a href="envvars.html" target="_parent">Environment Variables</a>
<li><a href="osmesa.html" target="_parent">Off-Screen Rendering</a>
<li><a href="debugging.html" target="_parent">Debugging Tips</a>

View File

@@ -17,158 +17,240 @@
<h1>Development Notes</h1>
<h2>Adding Extensions</h2>
<p>
To add a new GL extension to Mesa you have to do at least the following.
<ul>
<li>
If glext.h doesn't define the extension, edit include/GL/gl.h and add
code like this:
<pre>
#ifndef GL_EXT_the_extension_name
#define GL_EXT_the_extension_name 1
/* declare the new enum tokens */
/* prototype the new functions */
/* TYPEDEFS for the new functions */
#endif
</pre>
</li>
<li>
In the src/mapi/glapi/gen/ directory, add the new extension functions and
enums to the gl_API.xml file.
Then, a bunch of source files must be regenerated by executing the
corresponding Python scripts.
</li>
<li>
Add a new entry to the <code>gl_extensions</code> struct in mtypes.h
</li>
<li>
Update the <code>extensions.c</code> file.
</li>
<li>
From this point, the best way to proceed is to find another extension,
similar to the new one, that's already implemented in Mesa and use it
as an example.
</li>
<li>
If the new extension adds new GL state, the functions in get.c, enable.c
and attrib.c will most likely require new code.
</li>
<li>
The dispatch tests check_table.cpp and dispatch_sanity.cpp
should be updated with details about the new extensions functions. These
tests are run using 'make check'
</li>
<li><a href="#style">Coding Style</a>
<li><a href="#submitting">Submitting Patches</a>
<li><a href="#release">Making a New Mesa Release</a>
<li><a href="#extensions">Adding Extensions</a>
</ul>
<h2>Coding Style</h2>
<h2 id="style">Coding Style</h2>
<p>
Mesa's code style has changed over the years. Here's the latest.
Mesa is over 20 years old and the coding style has evolved over time.
Some old parts use a style that's a bit out of date.
If the guidelines below don't cover something, try following the format of
existing, neighboring code.
</p>
<p>
Comment your code! It's extremely important that open-source code be
well documented. Also, strive to write clean, easily understandable code.
Basic formatting guidelines
</p>
<p>
3-space indentation
</p>
<p>
If you use tabs, set them to 8 columns
</p>
<p>
Line width: the preferred width to fill comments and code in Mesa is 78
columns. Exceptions are sometimes made for clarity (e.g. tabular data is
sometimes filled to a much larger width so that extraneous carriage returns
don't obscure the table).
</p>
<p>
Brace example:
</p>
<ul>
<li>3-space indentation, no tabs.
<li>Limit lines to 78 or fewer characters. The idea is to prevent line
wrapping in 80-column editors and terminals. There are exceptions, such
as if you're defining a large, static table of information.
<li>Opening braces go on the same line as the if/for/while statement.
For example:
<pre>
if (condition) {
foo;
}
else {
bar;
}
switch (condition) {
case 0:
foo();
break;
case 1: {
...
break;
}
default:
...
break;
}
if (condition) {
foo;
} else {
bar;
}
</pre>
<p>
Here's the GNU indent command which will best approximate my preferred style:
(Note that it won't format switch statements in the preferred way)
</p>
<li>Put a space before/after operators. For example, <tt>a = b + c;</tt>
and not <tt>a=b+c;</tt>
<li>This GNU indent command generally does the right thing for formatting:
<pre>
indent -br -i3 -npcs --no-tabs infile.c -o outfile.c
indent -br -i3 -npcs --no-tabs infile.c -o outfile.c
</pre>
<p>
Local variable name example: localVarName (no underscores)
</p>
<p>
Constants and macros are ALL_UPPERCASE, with _ between words
</p>
<p>
Global variables are not allowed.
</p>
<p>
Function name examples:
</p>
<li>Use comments wherever you think it would be helpful for other developers.
Several specific cases and style examples follow. Note that we roughly
follow <a href="http://www.stack.nl/~dimitri/doxygen/">Doxygen</a> conventions.
<br>
<br>
Single-line comments:
<pre>
glFooBar() - a public GL entry point (in glapi_dispatch.c)
_mesa_FooBar() - the internal immediate mode function
save_FooBar() - retained mode (display list) function in dlist.c
foo_bar() - a static (private) function
_mesa_foo_bar() - an internal non-static Mesa function
/* null-out pointer to prevent dangling reference below */
bufferObj = NULL;
</pre>
Or,
<pre>
bufferObj = NULL; /* prevent dangling reference below */
</pre>
Multi-line comment:
<pre>
/* If this is a new buffer object id, or one which was generated but
* never used before, allocate a buffer object now.
*/
</pre>
We try to quote the OpenGL specification where prudent:
<pre>
/* Page 38 of the PDF of the OpenGL ES 3.0 spec says:
*
* "An INVALID_OPERATION error is generated for any of the following
* conditions:
*
* * <length> is zero."
*
* Additionally, page 94 of the PDF of the OpenGL 4.5 core spec
* (30.10.2014) also says this, so it's no longer allowed for desktop GL,
* either.
*/
</pre>
Function comment example:
<pre>
/**
* Create and initialize a new buffer object. Called via the
* ctx->Driver.CreateObject() driver callback function.
* \param name integer name of the object
* \param type one of GL_FOO, GL_BAR, etc.
* \return pointer to new object or NULL if error
*/
struct gl_object *
_mesa_create_object(GLuint name, GLenum type)
{
/* function body */
}
</pre>
<p>
Places that are not directly visible to the GL API should prefer the use
of <tt>bool</tt>, <tt>true</tt>, and
<li>Put the function return type and qualifiers on one line and the function
name and parameters on the next, as seen above. This makes it easy to use
<code>grep ^function_name dir/*</code> to find function definitions. Also,
the opening brace goes on the next line by itself (see above.)
<li>Function names follow various conventions depending on the type of function:
<pre>
glFooBar() - a public GL entry point (in glapi_dispatch.c)
_mesa_FooBar() - the internal immediate mode function
save_FooBar() - retained mode (display list) function in dlist.c
foo_bar() - a static (private) function
_mesa_foo_bar() - an internal non-static Mesa function
</pre>
<li>Constants, macros and enumerant names are ALL_UPPERCASE, with _ between
words.
<li>Mesa usually uses camel case for local variables (Ex: "localVarname")
while gallium typically uses underscores (Ex: "local_var_name").
<li>Global variables are almost never used because Mesa should be thread-safe.
<li>Booleans. Places that are not directly visible to the GL API
should prefer the use of <tt>bool</tt>, <tt>true</tt>, and
<tt>false</tt> over <tt>GLboolean</tt>, <tt>GL_TRUE</tt>, and
<tt>GL_FALSE</tt>. In C code, this may mean that
<tt>#include &lt;stdbool.h&gt;</tt> needs to be added. The
<tt>try_emit_</tt>* methods in src/mesa/program/ir_to_mesa.cpp and
src/mesa/state_tracker/st_glsl_to_tgsi.cpp can serve as examples.
</p>
<h2>Submitting patches</h2>
</ul>
<h2 id="submitting">Submitting patches</h2>
<p>
You should always run the Mesa Testsuite before submitting patches.
The Testsuite can be run using the 'make check' command. All tests
The basic guidelines for submitting patches are:
</p>
<ul>
<li>Patches should be sufficiently tested before submitting.
<li>Code patches should follow Mesa coding conventions.
<li>Whenever possible, patches should only effect individual Mesa/Gallium
components.
<li>Patches should never introduce build breaks and should be bisectable (see
<code>git bisect</code>.)
<li>Patches should be properly formatted (see below).
<li>Patches should be submitted to mesa-dev for review using
<code>git send-email</code>.
<li>Patches should not mix code changes with code formatting changes (except,
perhaps, in very trivial cases.)
</ul>
<h3>Patch formatting</h3>
<p>
The basic rules for patch formatting are:
</p>
<ul>
<li>Lines should be limited to 75 characters or less so that git logs
displayed in 80-column terminals avoid line wrapping. Note that git
log uses 4 spaces of indentation (4 + 75 &lt; 80).
<li>The first line should be a short, concise summary of the change prefixed
with a module name. Examples:
<pre>
mesa: Add support for querying GL_VERTEX_ATTRIB_ARRAY_LONG
gallium: add PIPE_CAP_DEVICE_RESET_STATUS_QUERY
i965: Fix missing type in local variable declaration.
</pre>
<li>Subsequent patch comments should describe the change in more detail,
if needed. For example:
<pre>
i965: Remove end-of-thread SEND alignment code.
This was present in Eric's initial implementation of the compaction code
for Sandybridge (commit 077d01b6). There is no documentation saying this
is necessary, and removing it causes no regressions in piglit on any
platform.
</pre>
<li>A "Signed-off-by:" line is not required, but not discouraged either.
<li>If a patch address a bugzilla issue, that should be noted in the
patch comment. For example:
<pre>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
</pre>
<li>If there have been several revisions to a patch during the review
process, they should be noted such as in this example:
<pre>
st/mesa: add ARB_texture_stencil8 support (v4)
if we support stencil texturing, enable texture_stencil8
there is no requirement to support native S8 for this,
the texture can be converted to x24s8 fine.
v2: fold fixes from Marek in:
a) put S8 last in the list
b) fix renderable to always test for d/s renderable
fixup the texture case to use a stencil only format
for picking the format for the texture view.
v3: hit fallback for getteximage
v4: put s8 back in front, it shouldn't get picked now (Ilia)
</pre>
<li>If someone tested your patch, document it with a line like this:
<pre>
Tested-by: Joe Hacker &lt;jhacker@foo.com&gt;
</pre>
<li>If the patch was reviewed (usually the case) or acked by someone,
that should be documented with:
<pre>
Reviewed-by: Joe Hacker &lt;jhacker@foo.com&gt;
Acked-by: Joe Hacker &lt;jhacker@foo.com&gt;
</pre>
</ul>
<h3>Testing Patches</h3>
<p>
It should go without saying that patches must be tested. In general,
do whatever testing is prudent.
</p>
<p>
You should always run the Mesa test suite before submitting patches.
The test suite can be run using the 'make check' command. All tests
must pass before patches will be accepted, this may mean you have
to update the tests themselves.
</p>
<p>
Whenever possible and applicable, test the patch with
<a href="http://piglit.freedesktop.org">Piglit</a> to
check for regressions.
</p>
<h3>Mailing Patches</h3>
<p>
Patches should be sent to the Mesa mailing list for review.
When submitting a patch make sure to use git send-email rather than attaching
@@ -184,7 +266,38 @@ re-sending the whole series). Using --in-reply-to makes
it harder for reviewers to accidentally review old patches.
</p>
<h2>Marking a commit as a candidate for a stable branch</h2>
<p>
When submitting follow-up patches you should also login to
<a href="https://patchwork.freedesktop.org">patchwork</a> and change the
state of your old patches to Superseded.
</p>
<h3>Reviewing Patches</h3>
<p>
When you've reviewed a patch on the mailing list, please be unambiguous
about your review. That is, state either
<pre>
Reviewed-by: Joe Hacker &lt;jhacker@foo.com&gt;
</pre>
or
<pre>
Acked-by: Joe Hacker &lt;jhacker@foo.com&gt;
</pre>
Rather than saying just "LGTM" or "Seems OK".
</p>
<p>
If small changes are suggested, it's OK to say something like:
<pre>
With the above fixes, Reviewed-by: Joe Hacker &lt;jhacker@foo.com&gt;
</pre>
which tells the patch author that the patch can be committed, as long
as the issues are resolved first.
</p>
<h3>Marking a commit as a candidate for a stable branch</h3>
<p>
If you want a commit to be applied to a stable branch,
@@ -221,7 +334,7 @@ the upcoming stable release can always be seen on the
<a href="http://cworth.org/~cworth/mesa-stable-queue/">Mesa Stable Queue</a>
page.
<h2>Criteria for accepting patches to the stable branch</h2>
<h3>Criteria for accepting patches to the stable branch</h3>
Mesa has a designated release manager for each stable branch, and the release
manager is the only developer that should be pushing changes to these
@@ -306,7 +419,8 @@ be rejected:
regression that is unaacceptable for the stable branch.</li>
</ul>
<h2>Making a New Mesa Release</h2>
<h2 id="release">Making a New Mesa Release</h2>
<p>
These are the instructions for making a new Mesa release.
@@ -456,7 +570,7 @@ Edit docs/relnotes/X.Y.Z.html to add the sha256sums printed as part of "make
tarballs" in the previous step. Commit this change.
</p>
<h3>Push all commits and the tag creates above</h3>
<h3>Push all commits and the tag created above</h3>
<p>
This is the first step that cannot easily be undone. The release is going
@@ -483,7 +597,7 @@ signatures to the freedesktop.org server:
mv ~/MesaLib-X.Y.Z* .
</pre>
<h3>Back on mesa master, andd the new release notes into the tree</h3>
<h3>Back on mesa master, add the new release notes into the tree</h3>
<p>
Something like the following steps will do the trick:
@@ -543,6 +657,56 @@ release announcement:
</pre>
</p>
<h2 id="extensions">Adding Extensions</h2>
<p>
To add a new GL extension to Mesa you have to do at least the following.
<ul>
<li>
If glext.h doesn't define the extension, edit include/GL/gl.h and add
code like this:
<pre>
#ifndef GL_EXT_the_extension_name
#define GL_EXT_the_extension_name 1
/* declare the new enum tokens */
/* prototype the new functions */
/* TYPEDEFS for the new functions */
#endif
</pre>
</li>
<li>
In the src/mapi/glapi/gen/ directory, add the new extension functions and
enums to the gl_API.xml file.
Then, a bunch of source files must be regenerated by executing the
corresponding Python scripts.
</li>
<li>
Add a new entry to the <code>gl_extensions</code> struct in mtypes.h
</li>
<li>
Update the <code>extensions.c</code> file.
</li>
<li>
From this point, the best way to proceed is to find another extension,
similar to the new one, that's already implemented in Mesa and use it
as an example.
</li>
<li>
If the new extension adds new GL state, the functions in get.c, enable.c
and attrib.c will most likely require new code.
</li>
<li>
The dispatch tests check_table.cpp and dispatch_sanity.cpp
should be updated with details about the new extensions functions. These
tests are run using 'make check'
</li>
</ul>
</div>
</body>
</html>

View File

@@ -204,9 +204,8 @@ terribly relevant.</p>
few preprocessor defines.</p>
<ul>
<li>If <tt>GLX_USE_TLS</tt> is defined, method #4 is used.</li>
<li>If <tt>HAVE_PTHREAD</tt> is defined, method #3 is used.</li>
<li>If <tt>WIN32_THREADS</tt> is defined, method #2 is used.</li>
<li>If <tt>GLX_USE_TLS</tt> is defined, method #3 is used.</li>
<li>If <tt>HAVE_PTHREAD</tt> is defined, method #2 is used.</li>
<li>If none of the preceding are defined, method #1 is used.</li>
</ul>

View File

@@ -88,8 +88,11 @@ types such as <code>EGLNativeDisplayType</code> or
<code>EGLNativeWindowType</code> defined for.</p>
<p>The available platforms are <code>x11</code>, <code>drm</code>,
<code>fbdev</code>, and <code>gdi</code>. The <code>gdi</code> platform can
only be built with SCons. Unless for special needs, the build system should
<code>wayland</code>, <code>surfaceless</code>, <code>android</code>,
and <code>haiku</code>. The <code>android</code> platform
can only be built as a system component, part of AOSP, while the
<code>haiku</code> platform can only be built with SCons.
Unless for special needs, the build system should
select the right platforms automatically.</p>
</dd>
@@ -112,13 +115,6 @@ is required if applications mix OpenGL and OpenGL ES.</p>
</dd>
<dt><code>--enable-openvg</code></dt>
<dd>
<p>OpenVG must be explicitly enabled by this option.</p>
</dd>
</dl>
<h2>Use EGL</h2>
@@ -187,14 +183,6 @@ probably required only for some of the demos found in mesa/demo repository.</p>
values are: <code>debug</code>, <code>info</code>, <code>warning</code>, and
<code>fatal</code>.</p>
</dd>
<dt><code>EGL_SOFTWARE</code></dt>
<dd>
<p>For drivers that support both hardware and software rendering, setting this
variable to true forces the use of software rendering.</p>
</dd>
</dl>
@@ -212,38 +200,15 @@ the X server directly using (XCB-)DRI2 protocol.</p>
</dd>
<dt><code>egl_gallium</code></dt>
<dd>
<p>This driver is based on Gallium3D. It supports all rendering APIs and
hardware supported by Gallium3D. It is the only driver that supports OpenVG.
The supported platforms are X11, DRM, FBDEV, and GDI.</p>
<p>This driver comes with its own hardware drivers
(<code>pipe_&lt;hw&gt;</code>) and client API modules
(<code>st_&lt;api&gt;</code>).</p>
</dd>
<h2>Packaging</h2>
<p>The ABI between the main library and its drivers are not stable. Nor is
there a plan to stabilize it at the moment. Of the EGL drivers,
<code>egl_gallium</code> has its own hardware drivers and client API modules.
They are considered internal to <code>egl_gallium</code> and there is also no
stable ABI between them. These should be kept in mind when packaging for
distribution.</p>
<p>Generally, <code>egl_dri2</code> is preferred over <code>egl_gallium</code>
when the system already has DRI drivers. As <code>egl_gallium</code> is loaded
before <code>egl_dri2</code> when both are available, <code>egl_gallium</code>
is disabled by default.</p>
there a plan to stabilize it at the moment.</p>
<h2>Developers</h2>
<p>The sources of the main library and the classic drivers can be found at
<code>src/egl/</code>. The sources of the <code>egl</code> state tracker can
be found at <code>src/gallium/state_trackers/egl/</code>.</p>
<p>The sources of the main library and drivers can be found at
<code>src/egl/</code>.</p>
<h3>Lifetime of Display Resources</h3>

View File

@@ -34,6 +34,7 @@ sometimes be useful for debugging end-user issues.
<li>LIBGL_NO_DRAWARRAYS - if set do not use DrawArrays GLX protocol (for debugging)
<li>LIBGL_SHOW_FPS - print framerate to stdout based on the number of glXSwapBuffers
calls per second.
<li>LIBGL_DRI3_DISABLE - disable DRI3 if set (the value does not matter)
</ul>

View File

@@ -327,19 +327,6 @@ Basically, applying a translation of (0.375, 0.375, 0.0) to your coordinates
will fix the problem.
</p>
<h2>3.6 How can I change the maximum framebuffer size in Mesa's
<tt>swrast</tt> backend?</h2>
<p>
These can be overridden by using the <tt>--with-max-width</tt> and
<tt>--with-max-height</tt> options. The two need not be equal.
</p><p>
Do note that Mesa uses these values to size some internal buffers,
so increasing these sizes will cause Mesa to require additional
memory. Furthermore, increasing these limits beyond <tt>4096</tt>
may introduce rasterization artifacts; see the leading comments in
<tt>src/mesa/swrast/s_tritemp.h</tt>.
</p>
<br>
<br>

View File

@@ -16,6 +16,126 @@
<h1>News</h1>
<h2>August 22 2015</h2>
<p>
<a href="relnotes/10.6.5.html">Mesa 10.6.5</a> is released.
This is a bug-fix release.
</p>
<h2>August 11 2015</h2>
<p>
<a href="relnotes/10.6.4.html">Mesa 10.6.4</a> is released.
This is a bug-fix release.
</p>
<h2>July 26 2015</h2>
<p>
<a href="relnotes/10.6.3.html">Mesa 10.6.3</a> is released.
This is a bug-fix release.
</p>
<h2>July 11 2015</h2>
<p>
<a href="relnotes/10.6.2.html">Mesa 10.6.2</a> is released.
This is a bug-fix release.
</p>
<h2>July 04, 2015</h2>
<p>
<a href="relnotes/10.5.9.html">Mesa 10.5.9</a> is released.
This is a bug-fix release.
<br>
NOTE: It is anticipated that 10.5.9 will be the final release in the 10.5
series. Users of 10.5 are encouraged to migrate to the 10.6 series in order
to obtain future fixes.
</p>
<h2>June 29, 2015</h2>
<p>
<a href="relnotes/10.6.1.html">Mesa 10.6.1</a> is released.
This is a bug-fix release.
</p>
<h2>June 20, 2015</h2>
<p>
<a href="relnotes/10.5.8.html">Mesa 10.5.8</a> is released.
This is a bug-fix release.
</p>
<h2>June 14, 2015</h2>
<p>
<a href="relnotes/10.6.0.html">Mesa 10.6.0</a> is released. This is a new
development release. See the release notes for more information about
the release.
</p>
<h2>June 07, 2015</h2>
<p>
<a href="relnotes/10.5.7.html">Mesa 10.5.7</a> is released.
This is a bug-fix release.
</p>
<h2>May 23, 2015</h2>
<p>
<a href="relnotes/10.5.6.html">Mesa 10.5.6</a> is released.
This is a bug-fix release.
</p>
<h2>May 11, 2015</h2>
<p>
<a href="relnotes/10.5.5.html">Mesa 10.5.5</a> is released.
This is a bug-fix release.
</p>
<h2>April 24, 2015</h2>
<p>
<a href="relnotes/10.5.4.html">Mesa 10.5.4</a> is released.
This is a bug-fix release.
</p>
<h2>April 12, 2015</h2>
<p>
<a href="relnotes/10.5.3.html">Mesa 10.5.3</a> is released.
This is a bug-fix release.
</p>
<h2>March 28, 2015</h2>
<p>
<a href="relnotes/10.5.2.html">Mesa 10.5.2</a> is released.
This is a bug-fix release.
</p>
<h2>March 20, 2015</h2>
<p>
<a href="relnotes/10.4.7.html">Mesa 10.4.7</a> is released.
This is a bug-fix release.
</p>
<h2>March 13, 2015</h2>
<p>
<a href="relnotes/10.5.1.html">Mesa 10.5.1</a> is released.
This is a bug-fix release.
</p>
<h2>March 06, 2015</h2>
<p>
<a href="relnotes/10.5.0.html">Mesa 10.5.0</a> is released. This is a new
development release. See the release notes for more information about
the release.
</p>
<h2>March 06, 2015</h2>
<p>
<a href="relnotes/10.4.6.html">Mesa 10.4.6</a> is released.
This is a bug-fix release.
</p>
<h2>February 21, 2015</h2>
<p>
<a href="relnotes/10.4.5.html">Mesa 10.4.5</a> is released.
This is a bug-fix release.
</p>
<h2>February 06, 2015</h2>
<p>
<a href="relnotes/10.4.4.html">Mesa 10.4.4</a> is released.
@@ -1317,7 +1437,7 @@ The <a href="faq.html">Mesa FAQ</a> has been rewritten.
- glGetTexImage was using pixel unpacking instead of packing params
- auto-mipmap generation for cube maps was incorrect
Changes:
- max texture units reduced to six to accomodate texture rectangles
- max texture units reduced to six to accommodate texture rectangles
- removed unfinished GL_MESA_sprite_point extension code
</pre>

View File

@@ -55,8 +55,8 @@ Versions 2.5.35 and 2.4.1, respectively, (or later) should work.
<br>
On Windows with MinGW, install flex and bison with:
<pre>mingw-get install msys-flex msys-bison</pre>
For MSVC on Windows, you can find flex/bison programs on the
<a href="ftp://ftp.freedesktop.org/pub/mesa/windows-utils/">Mesa ftp site</a>.
For MSVC on Windows, install
<a href="http://winflexbison.sourceforge.net/">Win flex-bison</a>.
</li>
</ul>
@@ -127,14 +127,13 @@ by -debug for debug builds.
To build Mesa with SCons for Windows on Linux using the MinGW crosscompiler toolchain do
</p>
<pre>
scons platform=windows toolchain=crossmingw machine=x86 mesagdi libgl-gdi
scons platform=windows toolchain=crossmingw machine=x86 libgl-gdi
</pre>
<p>
This will create:
</p>
<ul>
<li>build/windows-x86-debug/mesa/drivers/windows/gdi/opengl32.dll &mdash; Mesa + swrast, binary compatible with Windows's opengl32.dll
<li>build/windows-x86-debug/gallium/targets/libgl-gdi/opengl32.dll &mdash; Mesa + Gallium + softpipe, binary compatible with Windows's opengl32.dll
<li>build/windows-x86-debug/gallium/targets/libgl-gdi/opengl32.dll &mdash; Mesa + Gallium + softpipe (or llvmpipe), binary compatible with Windows's opengl32.dll
</ul>
<p>
Put them all in the same directory to test them.

View File

@@ -49,7 +49,7 @@ stderr if the LIBGL_DEBUG environment variable is defined.
libGL.so is thread safe. The overhead of thread safety for common,
single-thread clients is negligible. However, the overhead of thread
safety for multi-threaded clients is significant. Each GL API call
requires two calls to pthread_get_specific() which can noticably
requires two calls to pthread_get_specific() which can noticeably
impact performance. Warning: libGL.so is thread safe but individual
DRI drivers may not be. Please consult the documentation for a driver
to learn if it is thread safe.

View File

@@ -58,15 +58,37 @@ It's the fastest software rasterizer for Mesa.
</pre>
<p>
For Windows you will need to build LLVM from source with MSVC or MINGW
(either natively or through cross compilers) and CMake, and set the LLVM
environment variable to the directory you installed it to.
For Windows you will need to build LLVM from source with MSVC or MINGW
(either natively or through cross compilers) and CMake, and set the LLVM
environment variable to the directory you installed it to.
LLVM will be statically linked, so when building on MSVC it needs to be
built with a matching CRT as Mesa, and you'll need to pass
-DLLVM_USE_CRT_RELEASE=MTd for debug and checked builds,
-DLLVM_USE_CRT_RELEASE=MTd for profile and release builds.
<code>-DLLVM_USE_CRT_xxx=yyy</code> as described below.
</p>
<table border="1">
<tr>
<th rowspan="2">LLVM build-type</th>
<th colspan="2" align="center">Mesa build-type</th>
</tr>
<tr>
<th>debug,checked</th>
<th>release,profile</th>
</tr>
<tr>
<th>Debug</th>
<td><code>-DLLVM_USE_CRT_DEBUG=MTd</code></td>
<td><code>-DLLVM_USE_CRT_DEBUG=MT</code></td>
</tr>
<tr>
<th>Release</th>
<td><code>-DLLVM_USE_CRT_RELEASE=MTd</code></td>
<td><code>-DLLVM_USE_CRT_RELEASE=MT</code></td>
</tr>
</table>
<p>
You can build only the x86 target by passing -DLLVM_TARGETS_TO_BUILD=X86
to cmake.
</p>

View File

@@ -1,59 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>OpenVG State Tracker</title>
<link rel="stylesheet" type="text/css" href="mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="contents.html"></iframe>
<div class="content">
<h1>OpenVG State Tracker</h1>
<p>
The current version of the OpenVG state tracker implements OpenVG 1.1.
</p>
<p>
More information about OpenVG can be found at
<a href="http://www.khronos.org/openvg/">
http://www.khronos.org/openvg/</a> .
</p>
<p>
The OpenVG state tracker depends on the Gallium architecture and a working EGL implementation.
Please refer to <a href="egl.html">Mesa EGL</a> for more information about EGL.
</p>
<h2>Building the library</h2>
<ol>
<li>Run <code>configure</code> with <code>--enable-openvg</code> and
<code>--enable-gallium-egl</code>. If you do not need OpenGL, you can add
<code>--disable-opengl</code> to save the compilation time.</li>
<li>Build and install Mesa as usual.</li>
</ol>
<h3>Sample build</h3>
A sample build looks as follows:
<pre>
$ ./configure --disable-opengl --enable-openvg --enable-gallium-egl
$ make
$ make install
</pre>
<p>It will install <code>libOpenVG.so</code>, <code>libEGL.so</code>, and one
or more EGL drivers.</p>
<h2>OpenVG Demos</h2>
<p>OpenVG demos can be found in mesa/demos repository.</p>
</div>
</body>
</html>

View File

@@ -21,6 +21,25 @@ The release notes summarize what's new or changed in each Mesa release.
</p>
<ul>
<li><a href="relnotes/10.6.5.html">10.6.5 release notes</a>
<li><a href="relnotes/10.6.4.html">10.6.4 release notes</a>
<li><a href="relnotes/10.6.3.html">10.6.3 release notes</a>
<li><a href="relnotes/10.6.2.html">10.6.2 release notes</a>
<li><a href="relnotes/10.5.9.html">10.5.9 release notes</a>
<li><a href="relnotes/10.6.1.html">10.6.1 release notes</a>
<li><a href="relnotes/10.5.8.html">10.5.8 release notes</a>
<li><a href="relnotes/10.6.0.html">10.6.0 release notes</a>
<li><a href="relnotes/10.5.7.html">10.5.7 release notes</a>
<li><a href="relnotes/10.5.6.html">10.5.6 release notes</a>
<li><a href="relnotes/10.5.5.html">10.5.5 release notes</a>
<li><a href="relnotes/10.5.4.html">10.5.4 release notes</a>
<li><a href="relnotes/10.5.3.html">10.5.3 release notes</a>
<li><a href="relnotes/10.5.2.html">10.5.2 release notes</a>
<li><a href="relnotes/10.4.7.html">10.4.7 release notes</a>
<li><a href="relnotes/10.5.1.html">10.5.1 release notes</a>
<li><a href="relnotes/10.5.0.html">10.5.0 release notes</a>
<li><a href="relnotes/10.4.6.html">10.4.6 release notes</a>
<li><a href="relnotes/10.4.5.html">10.4.5 release notes</a>
<li><a href="relnotes/10.4.4.html">10.4.4 release notes</a>
<li><a href="relnotes/10.4.3.html">10.4.3 release notes</a>
<li><a href="relnotes/10.4.2.html">10.4.2 release notes</a>

View File

@@ -104,7 +104,7 @@ a07b4b6b9eb449b88a6cb5061e51c331 MesaLib-10.0.3.zip
<li>Add md5sums for 10.0.2. release.</li>
<li>cherry-ignore: Ignore several patches not yet ready for the stable branch</li>
<li>Drop another couple of patches.</li>
<li>cherry-ignore: Ignore 4 patches at teh request of the author, (Anuj).</li>
<li>cherry-ignore: Ignore 4 patches at the request of the author, (Anuj).</li>
<li>Update version to 10.0.3</li>
</ul>

114
docs/relnotes/10.4.5.html Normal file
View File

@@ -0,0 +1,114 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.4.5 Release Notes / February 21, 2015</h1>
<p>
Mesa 10.4.5 is a bug fix release which fixes bugs found since the 10.4.4 release.
</p>
<p>
Mesa 10.4.5 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
e12bbdaee9a758617e8ebd0bb0e987f72addd11db2e4da25ba695e386cd63843 MesaLib-10.4.5.tar.gz
bf60000700a9d58e3aca2bfeee7e781053b0d839e61a95b1883e05a2dee247a0 MesaLib-10.4.5.tar.bz2
3b926de8eee500bb67cf85332c51292f826cc539b8636382aadbb8e70c76527a MesaLib-10.4.5.zip
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82477">Bug 82477</a> - [softpipe] piglit fp-long-alu regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88658">Bug 88658</a> - (bisected) Slow video playback on Kabini</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89069">Bug 89069</a> - Lack of grass in The Talos Principle on radeonsi (native\wine\nine)</li>
</ul>
<h2>Changes</h2>
<p>Carl Worth (1):</p>
<ul>
<li>Revert use of Mesa IR optimizer for ARB_fragment_programs</li>
</ul>
<p>Emil Velikov (3):</p>
<ul>
<li>docs: Add sha256 sums for the 10.4.4 release</li>
<li>get-pick-list.sh: Require explicit "10.4" for nominating stable patches</li>
<li>Update version to 10.4.5</li>
</ul>
<p>Ilia Mirkin (3):</p>
<ul>
<li>nvc0: bail out of 2d blits with non-A8_UNORM alpha formats</li>
<li>st/mesa: treat resource-less xfb buffers as if they weren't there</li>
<li>nvc0: allow holes in xfb target lists</li>
</ul>
<p>Jeremy Huddleston Sequoia (2):</p>
<ul>
<li>darwin: build fix</li>
<li>darwin: build fix</li>
</ul>
<p>Kenneth Graunke (4):</p>
<ul>
<li>i965: Override swizzles for integer luminance formats.</li>
<li>i965: Use a gl_color_union for sampler border color.</li>
<li>i965: Fix integer border color on Haswell.</li>
<li>glsl: Reduce memory consumption of copy propagation passes.</li>
</ul>
<p>Laura Ekstrand (1):</p>
<ul>
<li>main: Fixed _mesa_GetCompressedTexImage_sw to copy slices correctly.</li>
</ul>
<p>Marek Olšák (5):</p>
<ul>
<li>r600g,radeonsi: don't append to streamout buffers that haven't been used yet</li>
<li>radeonsi: fix instanced arrays with non-zero start instance</li>
<li>radeonsi: small fix in SPI state</li>
<li>mesa: fix AtomicBuffer typo in _mesa_DeleteBuffers</li>
<li>radeonsi: fix a crash if a stencil ref state is set before a DSA state</li>
</ul>
<p>Michel Dänzer (2):</p>
<ul>
<li>st/mesa: Don't use PIPE_USAGE_STREAM for GL_PIXEL_UNPACK_BUFFER_ARB</li>
<li>Revert "radeon/llvm: enable unsafe math for graphics shaders"</li>
</ul>
</div>
</body>
</html>

143
docs/relnotes/10.4.6.html Normal file
View File

@@ -0,0 +1,143 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.4.6 Release Notes / March 06, 2015</h1>
<p>
Mesa 10.4.6 is a bug fix release which fixes bugs found since the 10.4.5 release.
</p>
<p>
Mesa 10.4.6 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
46c9082142e811c01e49a2c332a9ac0a1eb98f2908985fb9df216539d7eaeaf4 MesaLib-10.4.6.tar.gz
d8baedd20e79ccd98a5a7b05e23d59a30892e68de1fcc057ca6873dafca02735 MesaLib-10.4.6.tar.bz2
6aded6eac7f0d4d55117b8b581d8424710bbb4c768fc90f7b881f29311a751aa MesaLib-10.4.6.zip
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45348">Bug 45348</a> - [swrast] piglit fbo-drawbuffers-arbfp regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84613">Bug 84613</a> - [G965, bisected] piglit regressions : glslparsertest.glsl2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87516">Bug 87516</a> - glProgramBinary violates spec</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88885">Bug 88885</a> - Transform feedback uses incorrect interleaving if a previous draw did not write gl_Position</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89180">Bug 89180</a> - [IVB regression] Rendering issues in Mass Effect through VMware Workstation</li>
</ul>
<h2>Changes</h2>
<p>Abdiel Janulgue (2):</p>
<ul>
<li>glsl: Don't optimize min/max into saturate when EmitNoSat is set</li>
<li>st/mesa: For vertex shaders, don't emit saturate when SM 3.0 is unsupported</li>
</ul>
<p>Andreas Boll (1):</p>
<ul>
<li>glx: Fix returned values of GLX_RENDERER_PREFERRED_PROFILE_MESA</li>
</ul>
<p>Brian Paul (2):</p>
<ul>
<li>swrast: fix multiple color buffer writing</li>
<li>st/mesa: fix sampler view reference counting bug in glDraw/CopyPixels</li>
</ul>
<p>Chris Forbes (1):</p>
<ul>
<li>i965/gs: Check newly-generated GS-out VUE map against correct stage</li>
</ul>
<p>Eduardo Lima Mitev (1):</p>
<ul>
<li>mesa: Fix error validating args for TexSubImage3D</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: Add sha256 sums for the 10.4.5 release</li>
<li>install-lib-links: remove the .install-lib-links file</li>
<li>Revert "mesa: Correct backwards NULL check."</li>
<li>mesa: cherry-pick the second half of commit 2aa71e9485a</li>
<li>Revert "gallivm: Update for RTDyldMemoryManager becoming an unique_ptr."</li>
<li>Update version to 10.4.6</li>
</ul>
<p>Ian Romanick (3):</p>
<ul>
<li>mesa: Add missing error checks in _mesa_ProgramBinary</li>
<li>mesa: Ensure that length is set to zero in _mesa_GetProgramBinary</li>
<li>mesa: Always generate GL_INVALID_OPERATION in _mesa_GetProgramBinary</li>
</ul>
<p>Jonathan Gray (1):</p>
<ul>
<li>auxilary/os: correct sysctl use in os_get_total_physical_memory()</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>gallivm: Update for RTDyldMemoryManager becoming an unique_ptr.</li>
</ul>
<p>Leo Liu (1):</p>
<ul>
<li>st/omx/dec/h264: fix picture out-of-order with poc type 0 v2</li>
</ul>
<p>Lucas Stach (1):</p>
<ul>
<li>install-lib-links: don't depend on .libs directory</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>vbo: fix an unitialized-variable warning</li>
<li>radeonsi: fix point sprites</li>
</ul>
<p>Matt Turner (4):</p>
<ul>
<li>glsl: Rewrite and fix min/max to saturate optimization.</li>
<li>mesa: Correct backwards NULL check.</li>
<li>i965/fs: Don't use backend_visitor::instructions after creating the CFG.</li>
<li>mesa: Correct backwards NULL check.</li>
</ul>
</div>
</body>
</html>

134
docs/relnotes/10.4.7.html Normal file
View File

@@ -0,0 +1,134 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.4.7 Release Notes / March 20, 2015</h1>
<p>
Mesa 10.4.7 is a bug fix release which fixes bugs found since the 10.4.6 release.
</p>
<p>
Mesa 10.4.7 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
9e7b59267199658808f8b33e0410b86fbafbdcd52378658b9df65fac9d24947f MesaLib-10.4.7.tar.gz
2c351c98671f9a7ab3fd9c601bb7a255801b1580f5dd0992639f99152801b0d2 MesaLib-10.4.7.tar.bz2
d14ac578b5ce16560757b53fbd1cb4d6b34652f8e110e4b10a019adc82e67ffd MesaLib-10.4.7.zip
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79202">Bug 79202</a> - valgrind errors in glsl-fs-uniform-array-loop-unroll.shader_test; random code generation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89156">Bug 89156</a> - r300g: GL_COMPRESSED_RED_RGTC1 / ATI1N support broken</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89224">Bug 89224</a> - Incorrect rendering of Unigine Valley running in VM on VMware Workstation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89530">Bug 89530</a> - FTBFS in loader: missing fstat</li>
</ul>
<h2>Changes</h2>
<p>Andrey Sudnik (1):</p>
<ul>
<li>i965/vec4: Don't lose the saturate modifier in copy propagation.</li>
</ul>
<p>Daniel Stone (1):</p>
<ul>
<li>egl: Take alpha bits into account when selecting GBM formats</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: Add sha256 sums for the 10.4.6 release</li>
<li>cherry-ignore: add not applicable/rejected commits</li>
<li>mesa: rename format_info.c to format_info.h</li>
<li>loader: include &lt;sys/stat.h&gt; for non-sysfs builds</li>
<li>auxiliary/os: fix the android build - s/drm_munmap/os_munmap/</li>
<li>Update version to 10.4.7</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>i965: Fix out-of-bounds accesses into pull_constant_loc array</li>
</ul>
<p>Ilia Mirkin (4):</p>
<ul>
<li>freedreno: move fb state copy after checking for size change</li>
<li>freedreno/ir3: fix array count returned by TXQ</li>
<li>freedreno/ir3: get the # of miplevels from getinfo</li>
<li>freedreno: fix slice pitch calculations</li>
</ul>
<p>Marc-Andre Lureau (1):</p>
<ul>
<li>gallium/auxiliary/indices: fix start param</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>r300g: fix RGTC1 and LATC1 SNORM formats</li>
<li>r300g: fix a crash when resolving into an sRGB texture</li>
<li>r300g: fix sRGB-&gt;sRGB blits</li>
<li>radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords</li>
</ul>
<p>Mario Kleiner (1):</p>
<ul>
<li>glx: Handle out-of-sequence swap completion events correctly. (v2)</li>
</ul>
<p>Matt Turner (2):</p>
<ul>
<li>r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.</li>
<li>r300g: Check return value of snprintf().</li>
</ul>
<p>Rob Clark (2):</p>
<ul>
<li>freedreno/ir3: fix silly typo for binning pass shaders</li>
<li>freedreno: update generated headers</li>
</ul>
<p>Samuel Iglesias Gonsalvez (1):</p>
<ul>
<li>glsl: optimize (0 cmp x + y) into (-x cmp y).</li>
</ul>
<p>Stefan Dösinger (1):</p>
<ul>
<li>r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)</li>
</ul>
</div>
</body>
</html>

View File

@@ -14,7 +14,7 @@
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.0 Release Notes / TBD</h1>
<h1>Mesa 10.5.0 Release Notes / March 06, 2015</h1>
<p>
Mesa 10.5.0 is a new development release.
@@ -31,9 +31,10 @@ because compatibility contexts are not supported.
</p>
<h2>MD5 checksums</h2>
<h2>SHA256 checksums</h2>
<pre>
TBD.
2bb6e2e982ee4d8264d52d638c2a4e3f8a164190336d72d4e34ae1304d87ed91 mesa-10.5.0.tar.gz
d7ca9f9044bbdd674377e3eebceef1fae339c8817b9aa435c2053e4fea44e5d3 mesa-10.5.0.tar.xz
</pre>
@@ -55,7 +56,150 @@ Note: some of the new features are only available with certain drivers.
<h2>Bug fixes</h2>
TBD.
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=10370">Bug 10370</a> - Incorrect pixels read back if draw bitmap texture through Display list</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45348">Bug 45348</a> - [swrast] piglit fbo-drawbuffers-arbfp regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60879">Bug 60879</a> - [radeonsi] X11 can't start with acceleration enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67672">Bug 67672</a> - [llvmpipe] lp_test_arit fails on old CPUs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=77544">Bug 77544</a> - i965: Try to use LINE instructions to perform MAD with immediate arguments</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78770">Bug 78770</a> - [SNB bisected]Webglc conformance/textures/texture-size-limit.html fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80568">Bug 80568</a> - [gen4] GPU Crash During Google Chrome Operation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82477">Bug 82477</a> - [softpipe] piglit fp-long-alu regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82585">Bug 82585</a> - geometry shader with optional out variable segfaults</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82991">Bug 82991</a> - Inverted bumpmap in webgl applications</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83463">Bug 83463</a> - [swrast] piglit glsl-vs-clamp-1 regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83500">Bug 83500</a> - si_dma_copy_tile causes GPU hangs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83510">Bug 83510</a> - Graphical glitches in Unreal Engine 4</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83908">Bug 83908</a> - [i965] Incorrect icon colors in Steam Big Picture</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84212">Bug 84212</a> - [BSW]ES3-CTS.shaders.loops.do_while_dynamic_iterations.vector_counter_vertex fails and causes GPU hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84651">Bug 84651</a> - Distorted graphics or black window when running Battle.net app on Intel hardware via wine</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84777">Bug 84777</a> - [BSW]Piglit spec_glsl-1.50_execution_geometry-basic fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85367">Bug 85367</a> - [gen4] GPU hang in glmark-es2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85467">Bug 85467</a> - [llvmpipe] piglit gl-1.0-dlist-beginend failure with llvm-3.6.0svn</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85529">Bug 85529</a> - Surfaces not drawn in Unvanquished</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85647">Bug 85647</a> - Random radeonsi crashes with mesa 10.3.x</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85696">Bug 85696</a> - r600g+nine: Bioshock shader failure after 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86089">Bug 86089</a> - [r600g][mesa 10.4.0-dev] shader failure - r600_sb::bc_finalizer::cf_peephole() when starting Second Life</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86618">Bug 86618</a> - [NV96] neg modifiers not working in MIN and MAX operations</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86760">Bug 86760</a> - mesa doesn't build: recipe for target 'r600_llvm.lo' failed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86764">Bug 86764</a> - [SNB+ Bisected]Piglit glean/pointSprite fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86788">Bug 86788</a> - (bisected) 32bit UrbanTerror 4.1 timedemo sse4.1 segfault...</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86811">Bug 86811</a> - [BDW/BSW Bisected]Piglit spec_arb_shading_language_packing_execution_built-in-functions_vs-unpackSnorm4x8 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86837">Bug 86837</a> - kodi segfault since auxiliary/vl: rework the build of the VL code</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86939">Bug 86939</a> - test_vf_float_conversions.cpp:63:12: error: expected primary-expression before union</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86944">Bug 86944</a> - glsl_parser_extras.cpp&quot;, line 1455: Error: Badly formed expression. (Oracle Studio)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86958">Bug 86958</a> - lp_bld_misc.cpp:503:40: error: no matching function for call to llvm::EngineBuilder::setMCJITMemoryManager(ShaderMemoryManager*&amp;)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86969">Bug 86969</a> - _drm_intel_gem_bo_references() function takes half the CPU with Witcher2 game</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87076">Bug 87076</a> - Dead Island needs allow_glsl_extension_directive_midshader</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87516">Bug 87516</a> - glProgramBinary violates spec</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87619">Bug 87619</a> - Changes to state such as render targets change fragment shader without marking it dirty.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87658">Bug 87658</a> - [llvmpipe] SEGV in sse2_has_daz on ancient Pentium4-M</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87694">Bug 87694</a> - [SNB] Crash in brw_begin_transform_feedback</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87886">Bug 87886</a> - constant fps drops with Intel and Radeon</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87887">Bug 87887</a> - [i965 Bisected]ES2-CTS.gtf.GL.cos.cos_float_vert_xvary fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87913">Bug 87913</a> - CPU cacheline size of 0 can be returned by CPUID leaf 0x80000006 in some virtual machines</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88079">Bug 88079</a> - dEQP-GLES3.functional.fbo.completeness.renderable.renderbuffer.color0 tests fail due to enabling of GL_RGB and GL_RGBA</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88170">Bug 88170</a> - 32 bits opengl apps crash with latest llvm 3.6 git / mesa git / radeonsi</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88219">Bug 88219</a> - include/c11/threads_posix.h:197: undefined reference to `pthread_mutex_lock'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88227">Bug 88227</a> - Radeonsi: High GTT usage in Prison Architect large map</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88248">Bug 88248</a> - Calling glClear while there is an occlusion query in progress messes up the results</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88335">Bug 88335</a> - format_pack.c:9567:22: error: expected ')'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88385">Bug 88385</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels core dumped</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88467">Bug 88467</a> - nir.c:140: error: nir_src has no member named ssa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88478">Bug 88478</a> - #error &quot;&lt;malloc.h&gt; has been replaced by &lt;stdlib.h&gt;&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88519">Bug 88519</a> - sha1.c:210:22: error: 'grcy_md_hd_t' undeclared (first use in this function)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88523">Bug 88523</a> - sha1.c:37: error: 'SHA1_CTX' undeclared (first use in this function)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88561">Bug 88561</a> - [radeonsi][regression,bisected] Depth test/buffer issues in Portal</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88658">Bug 88658</a> - (bisected) Slow video playback on Kabini</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88662">Bug 88662</a> - unaligned access to gl_dlist_node</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88783">Bug 88783</a> - FTBFS: Clover: src/gallium/state_trackers/clover/llvm/invocation.cpp:335:49: error: no matching function for call to 'llvm::TargetLibraryInfo::TargetLibraryInfo(llvm::Triple)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88792">Bug 88792</a> - [BDW/BSW Bisected]Piglit spec_ARB_pixel_buffer_object_pbo-read-argb8888 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88806">Bug 88806</a> - nir/nir_constant_expressions.c:2754:15: error: controlling expression type 'unsigned int' not compatible with any generic association type</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88841">Bug 88841</a> - [SNB/IVB/HSW/BDW Bisected]Piglit spec_EGL_NOK_texture_from_pixmap_basic fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88852">Bug 88852</a> - macros.h(181) : error C2143: syntax error : missing '{' before 'enum [tag]'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88905">Bug 88905</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88930">Bug 88930</a> - [osmesa] osbuffer-&gt;textures should be indexed by attachment type</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88962">Bug 88962</a> - [osmesa] Crash on postprocessing if z buffer is NULL</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89032">Bug 89032</a> - [BDW/BSW/SKL Bisected]Piglit spec_OpenGL_1.1_infinite-spot-light fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89037">Bug 89037</a> - [SKL]Piglit spec_EXT_texture_array_copyteximage_1D_ARRAY_samples=2 sporadically causes GPU hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89068">Bug 89068</a> - glTexImage2D regression by texstore_rgba switch to _mesa_format_convert</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89069">Bug 89069</a> - Lack of grass in The Talos Principle on radeonsi (native\wine\nine)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89180">Bug 89180</a> - [IVB regression] Rendering issues in Mass Effect through VMware Workstation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86330">Bug 86330</a> - lp_bld_debug.cpp:112: multiple definition of `raw_debug_ostream::write_impl(char const*, unsigned long)'</li>
</ul>
<h2>Changes</h2>

217
docs/relnotes/10.5.1.html Normal file
View File

@@ -0,0 +1,217 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.1 Release Notes / March 13, 2015</h1>
<p>
Mesa 10.5.1 is a bug fix release which fixes bugs found since the 10.5.0 release.
</p>
<p>
Mesa 10.5.1 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
b5b6256a6d46023e16a675257fd11a0f94d7b3e60a76cf112952da3d0fef8e9b mesa-10.5.1.tar.gz
ffc51943d15c6812ee7611d053d8980a683fbd6a4986cff567b12cc66637d679 mesa-10.5.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79202">Bug 79202</a> - valgrind errors in glsl-fs-uniform-array-loop-unroll.shader_test; random code generation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84613">Bug 84613</a> - [G965, bisected] piglit regressions : glslparsertest.glsl2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86747">Bug 86747</a> - Noise in Football Manager 2014 textures</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86974">Bug 86974</a> - INTEL_DEBUG=shader_time always asserts in fs_generator::generate_code() when Mesa is built with --enable-debug (= with asserts)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88246">Bug 88246</a> - Commit 2881b12 causes 43 DrawElements test regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88793">Bug 88793</a> - [BDW/BSW Bisected]Piglit/shaders_glsl-max-varyings fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88883">Bug 88883</a> - ir-a2xx.c: variable changed in assert statement</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88885">Bug 88885</a> - Transform feedback uses incorrect interleaving if a previous draw did not write gl_Position</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89095">Bug 89095</a> - [SNB/IVB/BYT Bisected]Webglc conformance/glsl/functions/glsl-function-mix-float.html fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89156">Bug 89156</a> - r300g: GL_COMPRESSED_RED_RGTC1 / ATI1N support broken</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89224">Bug 89224</a> - Incorrect rendering of Unigine Valley running in VM on VMware Workstation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89292">Bug 89292</a> - [regression,bisected] incomplete screenshots in some cases</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89311">Bug 89311</a> - [regression, bisected] dEQP: Added entry points for glCompressedTextureSubImage*D.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89312">Bug 89312</a> - [regression, bisected] main: Added entry points for CopyTextureSubImage*D. (d6b7c40cecfe01)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89315">Bug 89315</a> - [HSW, regression, bisected] i965/fs: Emit MAD instructions when possible.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89317">Bug 89317</a> - [HSW, regression, bisected] i965: Add LINTERP/CINTERP to can_do_cmod() (d91390634)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89416">Bug 89416</a> - UE4Editor crash after load project</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89430">Bug 89430</a> - [g965][bisected] arb_copy_image-targets gl_texture* tests fail</li>
</ul>
<h2>Changes</h2>
<p>Andrey Sudnik (1):</p>
<ul>
<li>i965/vec4: Don't lose the saturate modifier in copy propagation.</li>
</ul>
<p>Chris Forbes (1):</p>
<ul>
<li>i965/gs: Check newly-generated GS-out VUE map against correct stage</li>
</ul>
<p>Daniel Stone (1):</p>
<ul>
<li>egl: Take alpha bits into account when selecting GBM formats</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>docs: Add sha256 sums for the 10.5.0 release</li>
<li>egl/main: no longer export internal function</li>
<li>cherry-ignore: ignore a few more commits picked without -x</li>
<li>mapi: fix commit 90411b56f6bc817e229d8801ac0adad6d4e3fb7a</li>
<li>Update version to 10.5.1</li>
</ul>
<p>Frank Henigman (1):</p>
<ul>
<li>intel: fix EGLImage renderbuffer _BaseFormat</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>i965: Fix out-of-bounds accesses into pull_constant_loc array</li>
</ul>
<p>Ian Romanick (1):</p>
<ul>
<li>i965/fs/nir: Use emit_math for nir_op_fpow</li>
</ul>
<p>Ilia Mirkin (3):</p>
<ul>
<li>freedreno: move fb state copy after checking for size change</li>
<li>freedreno/ir3: fix array count returned by TXQ</li>
<li>freedreno/ir3: get the # of miplevels from getinfo</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>meta/TexSubImage: Stash everything other than PIXEL_TRANSFER/store in meta_begin</li>
<li>main/base_tex_format: Properly handle STENCIL_INDEX1/4/16</li>
</ul>
<p>Kenneth Graunke (8):</p>
<ul>
<li>i965: Split Gen4-5 BlitFramebuffer code; prefer BLT over Meta.</li>
<li>glsl: Mark array access when copying to a temporary for the ?: operator.</li>
<li>i965/fs: Set force_writemask_all on shader_time instructions.</li>
<li>i965/fs: Set smear on shader_time diff register.</li>
<li>i965/fs: Make emit_shader_time_write return rather than emit.</li>
<li>i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.</li>
<li>i965/fs: Make emit_shader_time_end() insert before EOT.</li>
<li>i965/fs: Don't issue FB writes for bound but unwritten color targets.</li>
</ul>
<p>Laura Ekstrand (2):</p>
<ul>
<li>main: Fix target checking for CompressedTexSubImage*D.</li>
<li>main: Fix target checking for CopyTexSubImage*D.</li>
</ul>
<p>Marc-Andre Lureau (1):</p>
<ul>
<li>gallium/auxiliary/indices: fix start param</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>r300g: fix RGTC1 and LATC1 SNORM formats</li>
<li>r300g: fix a crash when resolving into an sRGB texture</li>
<li>r300g: fix sRGB-&gt;sRGB blits</li>
</ul>
<p>Matt Turner (12):</p>
<ul>
<li>i965/vec4: Fix implementation of i2b.</li>
<li>mesa: Indent break statements and add a missing one.</li>
<li>mesa: Free memory allocated for luminance in readpixels.</li>
<li>mesa: Correct backwards NULL check.</li>
<li>i965: Consider scratch writes to have side effects.</li>
<li>i965/fs: Don't use backend_visitor::instructions after creating the CFG.</li>
<li>r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.</li>
<li>r300g: Check return value of snprintf().</li>
<li>i965/fs: Don't propagate cmod to inst with different type.</li>
<li>i965: Tell intel_get_memcpy() which direction the memcpy() is going.</li>
<li>Revert SHA1 additions.</li>
<li>i965: Avoid applying negate to wrong MAD source.</li>
</ul>
<p>Neil Roberts (4):</p>
<ul>
<li>meta: In pbo_{Get,}TexSubImage don't repeatedly rebind the source tex</li>
<li>Revert "common: Fix PBOs for 1D_ARRAY."</li>
<li>meta: Allow GL_UN/PACK_IMAGE_HEIGHT in _mesa_meta_pbo_Get/TexSubImage</li>
<li>meta: Fix the y offset for 1D_ARRAY in _mesa_meta_pbo_TexSubImage</li>
</ul>
<p>Rob Clark (11):</p>
<ul>
<li>freedreno/ir3: fix silly typo for binning pass shaders</li>
<li>freedreno/a2xx: fix increment in assert</li>
<li>freedreno/a4xx: bit of cleanup</li>
<li>freedreno: update generated headers</li>
<li>freedreno/a4xx: set PC_PRIM_VTX_CNTL.VAROUT properly</li>
<li>freedreno: update generated headers</li>
<li>freedreno/a4xx: aniso filtering</li>
<li>freedreno/ir3: fix up cat6 instruction encodings</li>
<li>freedreno/ir3: add support for memory (cat6) instructions</li>
<li>freedreno/ir3: handle flat bypass for a4xx</li>
<li>freedreno/ir3: fix failed assert in grouping</li>
</ul>
<p>Stefan Dösinger (1):</p>
<ul>
<li>r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.2 Release Notes / March 28, 2015</h1>
<p>
Mesa 10.5.2 is a bug fix release which fixes bugs found since the 10.5.1 release.
</p>
<p>
Mesa 10.5.2 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
755220e160a9f22fda0dffd47746f997b6e196d03f8edc390df7793aecaaa541 mesa-10.5.2.tar.gz
2f4b6fb77c3e7d6f861558d0884a3073f575e1e673dad8d1b0624e78e9c4dd44 mesa-10.5.2.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88534">Bug 88534</a> - include/c11/threads_posix.h PTHREAD_MUTEX_RECURSIVE_NP not defined</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89328">Bug 89328</a> - python required to build Mesa release tarballs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89530">Bug 89530</a> - FTBFS in loader: missing fstat</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89590">Bug 89590</a> - Crash in glLinkProgram with shaders with multiple constant arrays</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89680">Bug 89680</a> - Hard link exist in Mesa 10.5.1 sources</li>
</ul>
<h2>Changes</h2>
<p>Anuj Phogat (1):</p>
<ul>
<li>glsl: Generate link error for non-matching gl_FragCoord redeclarations</li>
</ul>
<p>Emil Velikov (7):</p>
<ul>
<li>docs: Add sha256 sums for the 10.5.1 release</li>
<li>automake: add missing egl files to the tarball</li>
<li>st/egl: don't ship the dri2.c link at the tarball</li>
<li>loader: include &lt;sys/stat.h&gt; for non-sysfs builds</li>
<li>auxiliary/os: fix the android build - s/drm_munmap/os_munmap/</li>
<li>cherry-ignore: add commit non applicable for 10.5</li>
<li>Update version to 10.5.2</li>
</ul>
<p>Felix Janda (1):</p>
<ul>
<li>c11/threads: Use PTHREAD_MUTEX_RECURSIVE by default</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>i965: Set nr_params to the number of uniform components in the VS/GS path.</li>
</ul>
<p>Ilia Mirkin (2):</p>
<ul>
<li>freedreno/a3xx: use the same layer size for all slices</li>
<li>freedreno: fix slice pitch calculations</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords</li>
</ul>
<p>Mario Kleiner (2):</p>
<ul>
<li>glx: Handle out-of-sequence swap completion events correctly. (v2)</li>
<li>mapi: Make private copies of name strings provided by client.</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno: update generated headers</li>
</ul>
<p>Samuel Iglesias Gonsalvez (2):</p>
<ul>
<li>glsl: optimize (0 cmp x + y) into (-x cmp y).</li>
<li>configure: Introduce new output variable to ax_check_python_mako_module.m4</li>
</ul>
<p>Tapani Pälli (1):</p>
<ul>
<li>glsl: fix names in lower_constant_arrays_to_uniforms</li>
</ul>
<p>Tom Stellard (1):</p>
<ul>
<li>clover: Return 0 as storage size for local kernel args that are not set v2</li>
</ul>
</div>
</body>
</html>

125
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.3 Release Notes / April 12, 2015</h1>
<p>
Mesa 10.5.3 is a bug fix release which fixes bugs found since the 10.5.2 release.
</p>
<p>
Mesa 10.5.3 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
2371b8e210ccd19f61dd94b6664d612e5a479ba7d431a074512d87633bd6aeb4 mesa-10.5.3.tar.gz
8701ee1be4f5c03238f5e63c1a9bd4cc03a2f6c0155ed42a1ae7d58f18912ba2 mesa-10.5.3.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83962">Bug 83962</a> - [HSW/BYT]Piglit spec_ARB_gpu_shader5_arb_gpu_shader5-emitstreamvertex_nodraw fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89679">Bug 89679</a> - [NV50] Portal/Half-Life 2 will not start (native Steam)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89746">Bug 89746</a> - Mesa and LLVM 3.6+ break opengl for genymotion</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89754">Bug 89754</a> - vertexAttrib fails WebGL Conformance test with mesa drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89758">Bug 89758</a> - pow WebGL Conformance test with mesa drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89759">Bug 89759</a> - WebGL OGL ES GLSL conformance test with mesa drivers fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89905">Bug 89905</a> - scons build broken on 10.5.2 due to activated vega st</li>
</ul>
<h2>Changes</h2>
<p>Dave Airlie (1):</p>
<ul>
<li>st_glsl_to_tgsi: only do mov copy propagation on temps (v2)</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>docs: Add sha256 sums for the 10.5.2 release</li>
<li>xmlpool: don't forget to ship the MOS</li>
<li>configure.ac: error out if python/mako is not found when required</li>
<li>dist: add the VG depedencies into the tarball</li>
<li>Update version to 10.5.3</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>i965: Do not render primitives in non-zero streams then TF is disabled</li>
</ul>
<p>Ilia Mirkin (7):</p>
<ul>
<li>st/mesa: update arrays when the current attrib has been updated</li>
<li>nv50/ir: take postFactor into account when doing peephole optimizations</li>
<li>nv50/ir/gk110: fix offset flag position for TXD opcode</li>
<li>freedreno/a3xx: fix 3d texture layout</li>
<li>freedreno/a3xx: point size should not be divided by 2</li>
<li>nv50: allocate more offset space for occlusion queries</li>
<li>nv50,nvc0: limit the y-tiling of 3d textures to the first level's tiling</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>i965: Fix instanced geometry shaders on Gen8+.</li>
<li>i965: Add forgotten multi-stream code to Gen8 SOL state.</li>
</ul>
<p>Marcin Ślusarz (1):</p>
<ul>
<li>nouveau: synchronize "scratch runout" destruction with the command stream</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>radeonsi: Cache LLVMTargetMachineRef in context instead of in screen</li>
</ul>
<p>Tom Stellard (1):</p>
<ul>
<li>clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation fails v2</li>
</ul>
<p>Ville Syrjälä (1):</p>
<ul>
<li>i965: Fix URB size for CHV</li>
</ul>
</div>
</body>
</html>

125
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.4 Release Notes / April 24, 2015</h1>
<p>
Mesa 10.5.4 is a bug fix release which fixes bugs found since the 10.5.3 release.
</p>
<p>
Mesa 10.5.4 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
e1089567fc7bf8d9b2d8badcc9f2fc3b758701c8c0ccfe7af1805549fea53f11 mesa-10.5.4.tar.gz
b51e723f3a20d842c88a92d809435b229fc4744ca0dbec0317d9d4a3ac4c6803 mesa-10.5.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69226">Bug 69226</a> - Cannot enable basic shaders with Second Life aborts attempt</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71591">Bug 71591</a> - Second Life shaders fail to compile (extension declared in middle of shader)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81025">Bug 81025</a> - [IVB/BYT Bisected]Piglit spec_ARB_draw_indirect_arb_draw_indirect-draw-elements-prim-restart-ugly fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89457">Bug 89457</a> - [BSW Bisected]ogles3conform ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_vert fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89957">Bug 89957</a> - vm protection faults in piglit lest: texsubimage cube_map_array pbo</li>
</ul>
<h2>Changes</h2>
<p>Brian Paul (1):</p>
<ul>
<li>glsl: rewrite glsl_type::record_key_hash() to avoid buffer overflow</li>
</ul>
<p>Dave Airlie (2):</p>
<ul>
<li>st/mesa: convert sub image for cube map arrays to 2d arrays for upload</li>
<li>st/mesa: align cube map arrays layers</li>
</ul>
<p>Emil Velikov (11):</p>
<ul>
<li>docs: Add 256 sums for the 10.5.3 release</li>
<li>radeonsi: remove unused si_dump_key()</li>
<li>android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERS</li>
<li>android: add $(mesa_top)/src include to the whole of mesa</li>
<li>android: egl: add libsync_cflags to the build</li>
<li>android: dri/common: conditionally include drm_cflags/set __NOT_HAVE_DRM_H</li>
<li>android: add HAVE__BUILTIN_* and HAVE_FUNC_ATTRIBUTE_* defines</li>
<li>android: add $(mesa_top)/src/mesa/main to the includes list</li>
<li>android: dri: link against libmesa_util</li>
<li>android: mesa: fix the path of the SSE4_1 optimisations</li>
<li>Update version to 10.5.4</li>
</ul>
<p>Ian Romanick (1):</p>
<ul>
<li>nir: Fix typo in "ushr by 0" algebraic replacement</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>i965: Fix software primitive restart with indirect draws.</li>
<li>drirc: Add "Second Life" quirk (allow_glsl_extension_directive_midshader).</li>
</ul>
<p>Kristian Høgsberg (1):</p>
<ul>
<li>i965: Rewrite ir_tex to ir_txl with lod 0 for vertex shaders</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>glsl_to_tgsi: fix out-of-bounds constant access and crash for uniforms</li>
<li>glsl_to_tgsi: don't use a potentially-undefined immediate for ir_query_levels</li>
</ul>
<p>Mathias Froehlich (1):</p>
<ul>
<li>i965: Flush batchbuffer containing the query on glQueryCounter.</li>
</ul>
<p>Mauro Rossi (2):</p>
<ul>
<li>android: mesa: generate the format_{un,}pack.[ch] sources</li>
<li>android: add inital NIR build</li>
</ul>
</div>
</body>
</html>

95
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@@ -0,0 +1,95 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.5 Release Notes / May 11, 2015</h1>
<p>
Mesa 10.5.5 is a bug fix release which fixes bugs found since the 10.5.4 release.
</p>
<p>
Mesa 10.5.5 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
c10f00fd792b8290dd51ebcc48a9016c4cafab19ec205423c6fcadfd7f3a59f2 mesa-10.5.5.tar.gz
4ac4e4ea3414f1cadb1467f2f173f9e56170d31e8674f7953a46f0549d319f28 mesa-10.5.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88521">Bug 88521</a> - GLBenchmark 2.7 TRex renders with artifacts on Gen8 with !UXA</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89455">Bug 89455</a> - [NVC0/Gallium] Unigine Heaven black and white boxes</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89689">Bug 89689</a> - [Regression] Weston on DRM backend won't start with new version of mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90130">Bug 90130</a> - gl_PrimitiveId seems to reset at 340</li>
</ul>
<h2>Changes</h2>
<p>Boyan Ding (1):</p>
<ul>
<li>i965: Add XRGB8888 format to intel_screen_make_configs</li>
</ul>
<p>Emil Velikov (3):</p>
<ul>
<li>docs: Add sha256 sums for the 10.5.4 release</li>
<li>r300: do not link against libdrm_intel</li>
<li>Update version to 10.5.5</li>
</ul>
<p>Ilia Mirkin (4):</p>
<ul>
<li>nvc0/ir: flush denorms to zero in non-compute shaders</li>
<li>gk110/ir: fix set with a register dest to not auto-set the abs flag</li>
<li>nvc0/ir: fix predicated PFETCH emission</li>
<li>nv50/ir: fix asFlow() const helper for OP_JOIN</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.</li>
<li>i965: Disallow linear blits that are not cacheline aligned.</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>draw: fix prim ids when there's no gs</li>
</ul>
</div>
</body>
</html>

147
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.6 Release Notes / May 23, 2015</h1>
<p>
Mesa 10.5.6 is a bug fix release which fixes bugs found since the 10.5.5 release.
</p>
<p>
Mesa 10.5.6 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
89ff9cb08d0f6e3f34154864c3071253057cd21020759457c8ae27e0f70985d3 mesa-10.5.6.tar.gz
66017853bde5f7a6647db3eede30512a091a3491daa1708e0ad8027c328ba595 mesa-10.5.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86792">Bug 86792</a> - [NVC0] Portal 2 Crashes in Wine</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90147">Bug 90147</a> - swrast: build error undeclared _SC_PHYS_PAGES on osx</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90350">Bug 90350</a> - [G96] Portal's portal are incorrectly rendered</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90363">Bug 90363</a> - [nv50] HW state is not reset correctly when using a new GL context</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (1):</p>
<ul>
<li>radeonsi: add new bonaire pci id</li>
</ul>
<p>Axel Davy (2):</p>
<ul>
<li>egl/wayland: properly destroy wayland objects</li>
<li>glx/dri3: Add additional check for gpu offloading case</li>
</ul>
<p>Emil Velikov (4):</p>
<ul>
<li>docs: Add sha256 sums for the 10.5.5 release</li>
<li>egl/main: fix EGL_KHR_get_all_proc_addresses</li>
<li>targets/osmesa: drop the -module tag from LDFLAGS</li>
<li>Update version to 10.5.6</li>
</ul>
<p>Francisco Jerez (4):</p>
<ul>
<li>clover: Refactor event::trigger and ::abort to prevent deadlock and reentrancy issues.</li>
<li>clover: Wrap event::_status in a method to prevent unlocked access.</li>
<li>clover: Implement locking of the wait_count, _chain and _status members of event.</li>
<li>i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().</li>
</ul>
<p>Fredrik Höglund (2):</p>
<ul>
<li>main: Require that the texture exists in framebuffer_texture</li>
<li>mesa: Generate GL_INVALID_VALUE in framebuffer_texture when layer &lt; 0</li>
</ul>
<p>Ilia Mirkin (7):</p>
<ul>
<li>nv50/ir: only propagate saturate up if some actual folding took place</li>
<li>nv50: keep track of PGRAPH state in nv50_screen</li>
<li>nvc0: keep track of PGRAPH state in nvc0_screen</li>
<li>nvc0: reset the instanced elements state when doing blit using 3d engine</li>
<li>nv50/ir: only enable mul saturate on G200+</li>
<li>st/mesa: make sure to create a "clean" bool when doing i2b</li>
<li>nvc0: switch mechanism for shader eviction to be a while loop</li>
</ul>
<p>Jeremy Huddleston Sequoia (2):</p>
<ul>
<li>swrast: Build fix for darwin</li>
<li>darwin: Fix install name of libOSMesa</li>
</ul>
<p>Laura Ekstrand (2):</p>
<ul>
<li>main: Fix an error generated by FramebufferTexture</li>
<li>main: Complete error conditions for glInvalidate*Framebuffer.</li>
</ul>
<p>Marta Lofstedt (1):</p>
<ul>
<li>main: glGetIntegeri_v fails for GL_VERTEX_BINDING_STRIDE</li>
</ul>
<p>Rob Clark (2):</p>
<ul>
<li>freedreno: enable a306</li>
<li>freedreno: fix bug in tile/slot calculation</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>draw: (trivial) fix out-of-bounds vector initialization</li>
</ul>
<p>Tim Rowley (1):</p>
<ul>
<li>mesa: fix shininess check for ffvertex_prog v2</li>
</ul>
<p>Tom Stellard (2):</p>
<ul>
<li>clover: Add a mutex to guard queue::queued_events</li>
<li>clover: Fix a bug with multi-threaded events v2</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.7 Release Notes / June 07, 2015</h1>
<p>
Mesa 10.5.7 is a bug fix release which fixes bugs found since the 10.5.6 release.
</p>
<p>
Mesa 10.5.7 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
8f865ce497435fdf25d4e35f3b5551b2bcd5f9bc6570561183be82af20d18b82 mesa-10.5.7.tar.gz
04d06890cd69af8089d6ca76f40e46dcf9cacfe4a9788b32be620574d4638818 mesa-10.5.7.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89131">Bug 89131</a> - [Bisected] Graphical corruption in Weston, shows old framebuffer pieces</li>
</ul>
<h2>Changes</h2>
<p>Ben Widawsky (1):</p>
<ul>
<li>i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)</li>
</ul>
<p>Emil Velikov (4):</p>
<ul>
<li>docs: Add sha256sums for the 10.5.6 release</li>
<li>get-pick-list.sh: Require explicit "10.5" for nominating stable patches</li>
<li>cherry-ignore: add clover build fix not applicable for 10.5</li>
<li>Update version to 10.5.7</li>
</ul>
<p>Ilia Mirkin (18):</p>
<ul>
<li>nvc0/ir: set ftz when sources are floats, not just destinations</li>
<li>nv50/ir: guess that the constant offset is the starting slot of array</li>
<li>nvc0/ir: LOAD's can't be used for shader inputs</li>
<li>nvc0: a geometry shader can have up to 1024 vertices output</li>
<li>nv50/ir: avoid messing up arg1 of PFETCH</li>
<li>nv30: don't leak fragprog consts</li>
<li>nv30: avoid leaking render state and draw shaders</li>
<li>nv30: fix clip plane uploads and enable changes</li>
<li>nv30/draw: avoid leaving stale pointers in draw state</li>
<li>nv30/draw: draw expects constbuf size in bytes, not vec4 units</li>
<li>st/mesa: don't leak glsl_to_tgsi object on link failure</li>
<li>glsl: avoid leaking linked gl_shader when there's a late linker error</li>
<li>nv30/draw: fix indexed draws with swtnl path and a resource index buffer</li>
<li>nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAM</li>
<li>nv30/draw: allocate vertex buffers in gart</li>
<li>nv30/draw: switch varying hookup logic to know about texcoords</li>
<li>nv30: falling back to draw path for edgeflag does no good</li>
<li>nv30: avoid doing extra work on clear and hitting unexpected states</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>i965/fs: Fix implied_mrf_writes for scratch writes</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>st/dri: fix postprocessing crash when there's no depth buffer</li>
</ul>
</div>
</body>
</html>

112
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.8 Release Notes / June 20, 2015</h1>
<p>
Mesa 10.5.8 is a bug fix release which fixes bugs found since the 10.5.7 release.
</p>
<p>
Mesa 10.5.8 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
611ddcfa3c1bf13f7e6ccac785c8749c3b74c9a78452bac70f8372cf6b209aa0 mesa-10.5.8.tar.gz
2866b855c5299a4aed066338c77ff6467c389b2c30ada7647be8758663da2b54 mesa-10.5.8.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90310">Bug 90310</a> - Fails to build gallium_dri.so at linking stage with clang because of multiple redefinitions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90347">Bug 90347</a> - [NVE0+] Failure to insert texbar under some circumstances (causing bad colors in Terasology)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90520">Bug 90520</a> - Register spilling clobbers registers used elsewhere in the shader</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90905">Bug 90905</a> - mesa: Finish subdir-objects transition</li>
</ul>
<h2>Changes</h2>
<p>Ben Widawsky (1):</p>
<ul>
<li>i965: Disable compaction for EOT send messages</li>
</ul>
<p>Boyan Ding (1):</p>
<ul>
<li>egl/x11: Set version of swrastLoader to 2</li>
</ul>
<p>Emil Velikov (2):</p>
<ul>
<li>docs: Add sha256sums for the 10.5.7 release</li>
<li>Update version to 10.5.8</li>
</ul>
<p>Erik Faye-Lund (1):</p>
<ul>
<li>mesa: build xmlconfig to a separate static library</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>i965: Don't compact instructions with unmapped bits.</li>
</ul>
<p>Ilia Mirkin (3):</p>
<ul>
<li>nvc0/ir: fix collection of first uses for texture barrier insertion</li>
<li>nv50,nvc0: clamp uniform size to 64k</li>
<li>nvc0/ir: can't have a join on a load with an indirect source</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>i965/fs: Don't let the EOT send message interfere with the MRF hack</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>egl: fix setting context flags</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>draw: (trivial) fix NULL pointer dereference</li>
</ul>
</div>
</body>
</html>

140
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.5.9 Release Notes / July 04, 2015</h1>
<p>
Mesa 10.5.9 is a bug fix release which fixes bugs found since the 10.5.8 release.
</p>
<p>
Mesa 10.5.9 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
0c081b59572ee9732e7438d34adc3817fe8cc8d4b58abc0e71fd4b4c904945cb mesa-10.5.9.tar.gz
71c69f31d3dbc35cfa79950e58a01d27030378d8c7ef1259a0b31d4d0487f4ec mesa-10.5.9.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84225">Bug 84225</a> - Allow constant-index-expression sampler array indexing with GLSL-ES &lt; 300</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88999">Bug 88999</a> - [SKL] Compiz crashes after opening unity dash</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89118">Bug 89118</a> - [SKL Bisected]many Ogles3conform cases core dumped</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90537">Bug 90537</a> - radeonsi bo/va conflict on RADEON_GEM_VA (rscreen-&gt;ws-&gt;buffer_from_handle returns NULL)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90839">Bug 90839</a> - [10.5.5/10.6 regression, bisected] PBO glDrawPixels no longer using blit fastpath</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90873">Bug 90873</a> - Kernel hang, TearFree On, Mate desktop environment</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91056">Bug 91056</a> - The Bard's Tale (2005, native) has rendering issues</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91117">Bug 91117</a> - Nimbus (running in wine) has rendering issues, objects are semi-transparent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91124">Bug 91124</a> - Civilization V (in Wine) has rendering issues: text missing, menu bar corrupted</li>
</ul>
<h2>Changes</h2>
<p>Ben Widawsky (2):</p>
<ul>
<li>i965/gen9: Implement Push Constant Buffer workaround</li>
<li>i965/skl: Use 1 register for uniform pull constant payload</li>
</ul>
<p>Boyan Ding (1):</p>
<ul>
<li>egl/x11: Remove duplicate call to dri2_x11_add_configs_for_visuals</li>
</ul>
<p>Chris Wilson (3):</p>
<ul>
<li>i965: Fix HW blitter pitch limits</li>
<li>i915: Blit RGBX&lt;-&gt;RGBA drawpixels</li>
<li>i965: Export format comparison for blitting between miptrees</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: Add sha256sums for the 10.5.8 release</li>
<li>configure: warn about shared_glapi &amp; xlib-glx only when both are set</li>
<li>configure: error out when building backend-less libEGL</li>
<li>configure: error out when building libEGL without shared-glapi</li>
<li>gbm: do not (over)link against libglapi.so</li>
<li>Update version to 10.5.9</li>
</ul>
<p>Frank Henigman (1):</p>
<ul>
<li>gbm: dlopen libglapi so gbm_create_device works</li>
</ul>
<p>Ilia Mirkin (8):</p>
<ul>
<li>glsl: add version checks to conditionals for builtin variable enablement</li>
<li>mesa: add GL_PROGRAM_PIPELINE support in KHR_debug calls</li>
<li>glsl: binding point is a texture unit, which is a combined space</li>
<li>nvc0: always put all tfb bufs into bufctx</li>
<li>nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data</li>
<li>nv50/ir: propagate modifier to right arg when const-folding mad</li>
<li>nv50/ir: fix emission of address reg in 3rd source</li>
<li>nv50/ir: copy joinAt when splitting both before and after</li>
</ul>
<p>Mario Kleiner (2):</p>
<ul>
<li>nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.</li>
<li>winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>winsys/radeon: Unmap GPU VM address range when destroying BO</li>
</ul>
<p>Tapani Pälli (6):</p>
<ul>
<li>glsl: Allow dynamic sampler array indexing with GLSL ES &lt; 3.00</li>
<li>mesa/glsl: new compiler option EmitNoIndirectSampler</li>
<li>i915: use EmitNoIndirectSampler</li>
<li>mesa/st: use EmitNoIndirectSampler if !ARB_gpu_shader5</li>
<li>i965: use EmitNoIndirectSampler for gen &lt; 7</li>
<li>glsl: validate sampler array indexing for 'constant-index-expression'</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.6.0 Release Notes / June 14, 2015</h1>
<p>
Mesa 10.6.0 is a new development release.
People who are concerned with stability and reliability should stick
with a previous release or wait for Mesa 10.6.1.
</p>
<p>
Mesa 10.6.0 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
9bc659abdba26202509304f259723aaa4343dba6aac4bd87d5baea11d23c8c63 mesa-10.6.0.tar.gz
f37e2633978deed02ff0522abc36c709586e2b555fd439a82ab71dce2c866c76 mesa-10.6.0.tar.xz
</pre>
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>GL_AMD_pinned_memory on r600, radeonsi</li>
<li>GL_ARB_clip_control on i965</li>
<li>GL_ARB_depth_buffer_float on freedreno</li>
<li>GL_ARB_depth_clamp on freedreno</li>
<li>GL_ARB_direct_state_access on all drivers that support GL 2.0+</li>
<li>GL_ARB_draw_indirect, GL_ARB_multi_draw_indirect on r600</li>
<li>GL_ARB_draw_instanced on freedreno</li>
<li>GL_ARB_gpu_shader_fp64 on nvc0, softpipe</li>
<li>GL_ARB_gpu_shader5 on i965/gen8+</li>
<li>GL_ARB_instanced_arrays on freedreno</li>
<li>GL_ARB_pipeline_statistics_query on i965, nv50, nvc0, r600, radeonsi, softpipe</li>
<li>GL_ARB_program_interface_query (all drivers)</li>
<li>GL_ARB_texture_stencil8 on nv50, nvc0, r600, radeonsi, softpipe</li>
<li>GL_ARB_texture_view on llvmpipe, softpipe</li>
<li>GL_ARB_uniform_buffer_object on freedreno</li>
<li>GL_ARB_vertex_attrib_64bit on nvc0, softpipe</li>
<li>GL_ARB_viewport_array, GL_AMD_vertex_shader_viewport_index on i965/gen6</li>
<li>GL_EXT_draw_buffers2 on freedreno</li>
<li>GL_OES_EGL_sync on all drivers</li>
<li>EGL_KHR_fence_sync on i965, freedreno, nv50, nvc0, r600, radeonsi</li>
<li>EGL_KHR_wait_sync on i965, freedreno, nv50, nvc0, r600, radeonsi</li>
<li>EGL_KHR_cl_event2 on freedreno, nv50, nvc0, r600, radeonsi</li>
<li>GL_AMD_performance_monitor on nvc0</li>
</ul>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=15006">Bug 15006</a> - translate &amp; rotate the line cause Aliasing</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=27007">Bug 27007</a> - Lines disappear with GL_LINE_SMOOTH</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=28832">Bug 28832</a> - piglit/general/line-aa-width fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45348">Bug 45348</a> - [swrast] piglit fbo-drawbuffers-arbfp regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60797">Bug 60797</a> - 1px lines in octave plot aliased to 0</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67564">Bug 67564</a> - HiZ buffers are much larger than necessary</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69226">Bug 69226</a> - Cannot enable basic shaders with Second Life aborts attempt</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71591">Bug 71591</a> - Second Life shaders fail to compile (extension declared in middle of shader)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79202">Bug 79202</a> - valgrind errors in glsl-fs-uniform-array-loop-unroll.shader_test; random code generation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81025">Bug 81025</a> - [IVB/BYT Bisected]Piglit spec_ARB_draw_indirect_arb_draw_indirect-draw-elements-prim-restart-ugly fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82477">Bug 82477</a> - [softpipe] piglit fp-long-alu regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82668">Bug 82668</a> - Can't set int attributes to certain values on 32-bit</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82831">Bug 82831</a> - i965: Support GL_ARB_blend_func_extended in SIMD16</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83962">Bug 83962</a> - [HSW/BYT]Piglit spec_ARB_gpu_shader5_arb_gpu_shader5-emitstreamvertex_nodraw fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84613">Bug 84613</a> - [G965, bisected] piglit regressions : glslparsertest.glsl2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86747">Bug 86747</a> - Noise in Football Manager 2014 textures</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86792">Bug 86792</a> - [NVC0] Portal 2 Crashes in Wine</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86811">Bug 86811</a> - [BDW/BSW Bisected]Piglit spec_arb_shading_language_packing_execution_built-in-functions_vs-unpackSnorm4x8 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86837">Bug 86837</a> - kodi segfault since auxiliary/vl: rework the build of the VL code</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86944">Bug 86944</a> - glsl_parser_extras.cpp&quot;, line 1455: Error: Badly formed expression. (Oracle Studio)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86974">Bug 86974</a> - INTEL_DEBUG=shader_time always asserts in fs_generator::generate_code() when Mesa is built with --enable-debug (= with asserts)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86980">Bug 86980</a> - [swrast] piglit fp-rfl regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87258">Bug 87258</a> - [BDW/BSW Bisected]Piglit spec_ARB_shader_atomic_counters_array-indexing fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88246">Bug 88246</a> - Commit 2881b12 causes 43 DrawElements test regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88248">Bug 88248</a> - Calling glClear while there is an occlusion query in progress messes up the results</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88521">Bug 88521</a> - GLBenchmark 2.7 TRex renders with artifacts on Gen8 with !UXA</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88534">Bug 88534</a> - include/c11/threads_posix.h PTHREAD_MUTEX_RECURSIVE_NP not defined</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88561">Bug 88561</a> - [radeonsi][regression,bisected] Depth test/buffer issues in Portal</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88793">Bug 88793</a> - [BDW/BSW Bisected]Piglit/shaders_glsl-max-varyings fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88815">Bug 88815</a> - Incorrect handling of GLSL #line directive</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88883">Bug 88883</a> - ir-a2xx.c: variable changed in assert statement</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88885">Bug 88885</a> - Transform feedback uses incorrect interleaving if a previous draw did not write gl_Position</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88905">Bug 88905</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88999">Bug 88999</a> - [SKL] Compiz crashes after opening unity dash</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89014">Bug 89014</a> - PIPE_QUERY_GPU_FINISHED is not acting as expected on SI</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89026">Bug 89026</a> - Renderbuffer layered state used for framebuffer completeness test</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89032">Bug 89032</a> - [BDW/BSW/SKL Bisected]Piglit spec_OpenGL_1.1_infinite-spot-light fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89037">Bug 89037</a> - [SKL]Piglit spec_EXT_texture_array_copyteximage_1D_ARRAY_samples=2 sporadically causes GPU hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89039">Bug 89039</a> - [SKL]etqw system hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89058">Bug 89058</a> - [SKL]Render error in some games (etqw-demo, nexuiz, portal)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89068">Bug 89068</a> - glTexImage2D regression by texstore_rgba switch to _mesa_format_convert</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89069">Bug 89069</a> - Lack of grass in The Talos Principle on radeonsi (native\wine\nine)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89094">Bug 89094</a> - [SNB/IVB/HSW/BYT Bisected]Ogles3conform ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_vert fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89095">Bug 89095</a> - [SNB/IVB/BYT Bisected]Webglc conformance/glsl/functions/glsl-function-mix-float.html fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89112">Bug 89112</a> - u_atomic_test: u_atomic_test.c:124: test_atomic_8bits_bool: Assertion `r == 65 &amp;&amp; &quot;p_atomic_add&quot;' failed.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89118">Bug 89118</a> - [SKL Bisected]many Ogles3conform cases core dumped</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89131">Bug 89131</a> - [Bisected] Graphical corruption in Weston, shows old framebuffer pieces</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89156">Bug 89156</a> - r300g: GL_COMPRESSED_RED_RGTC1 / ATI1N support broken</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89180">Bug 89180</a> - [IVB regression] Rendering issues in Mass Effect through VMware Workstation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89210">Bug 89210</a> - GS statistics fail on SNB</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89218">Bug 89218</a> - lower_instructions.cpp:648:48: error: invalid suffix 'd' on floating constant</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89224">Bug 89224</a> - Incorrect rendering of Unigine Valley running in VM on VMware Workstation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89260">Bug 89260</a> - macros.h:34:25: fatal error: util/u_math.h: No such file or directory</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89292">Bug 89292</a> - [regression,bisected] incomplete screenshots in some cases</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89311">Bug 89311</a> - [regression, bisected] dEQP: Added entry points for glCompressedTextureSubImage*D.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89312">Bug 89312</a> - [regression, bisected] main: Added entry points for CopyTextureSubImage*D. (d6b7c40cecfe01)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89315">Bug 89315</a> - [HSW, regression, bisected] i965/fs: Emit MAD instructions when possible.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89317">Bug 89317</a> - [HSW, regression, bisected] i965: Add LINTERP/CINTERP to can_do_cmod() (d91390634)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89328">Bug 89328</a> - python required to build Mesa release tarballs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89342">Bug 89342</a> - main/light.c:159:62: error: 'M_PI' undeclared (first use in this function)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89343">Bug 89343</a> - compiler/tests/radeon_compiler_optimize_tests.c:43:3: error: implicit declaration of function fprintf [-Werror=implicit-function-declaration]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89345">Bug 89345</a> - imports.h:452:58: error: expected declaration specifiers or '...' before 'va_list'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89364">Bug 89364</a> - c99_alloca.h:40:22: fatal error: alloca.h: No such file or directory</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89372">Bug 89372</a> - [softpipe] piglit glsl-1.50 generate-zero-primitives regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89387">Bug 89387</a> - Double delete in lp_bld_misc.cpp</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89416">Bug 89416</a> - UE4Editor crash after load project</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89430">Bug 89430</a> - [g965][bisected] arb_copy_image-targets gl_texture* tests fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89433">Bug 89433</a> - GCC 4.2 does not support -Wvla</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89455">Bug 89455</a> - [NVC0/Gallium] Unigine Heaven black and white boxes</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89457">Bug 89457</a> - [BSW Bisected]ogles3conform ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_vert fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89477">Bug 89477</a> - include/no_extern_c.h:47:1: error: template with C linkage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89508">Bug 89508</a> - Bad int(floatBitsToInt(vec4))</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89530">Bug 89530</a> - FTBFS in loader: missing fstat</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89569">Bug 89569</a> - Papo &amp; Yo crash on startup [HSW]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89590">Bug 89590</a> - Crash in glLinkProgram with shaders with multiple constant arrays</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89662">Bug 89662</a> - context.c:943: undefined reference to `_glapi_new_nop_table'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89670">Bug 89670</a> - cmod_propagation_test.andnz_one regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89679">Bug 89679</a> - [NV50] Portal/Half-Life 2 will not start (native Steam)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89689">Bug 89689</a> - [Regression] Weston on DRM backend won't start with new version of mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89722">Bug 89722</a> - [ILK Bisected]Ogles2conform/ES2-CTS.gtf.GL.equal.equal_vec2_frag fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89726">Bug 89726</a> - [Bisected] dEQP-GLES3: uniform linking logic in the presence of structs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89746">Bug 89746</a> - Mesa and LLVM 3.6+ break opengl for genymotion</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89754">Bug 89754</a> - vertexAttrib fails WebGL Conformance test with mesa drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89758">Bug 89758</a> - pow WebGL Conformance test with mesa drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89759">Bug 89759</a> - WebGL OGL ES GLSL conformance test with mesa drivers fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89831">Bug 89831</a> - [r600] r600_asm.c:310:assign_alu_units: Assertion `0' failed.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89899">Bug 89899</a> - nir/nir_lower_tex_projector.c:112: error: unknown field ssa specified in initializer</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89957">Bug 89957</a> - vm protection faults in piglit lest: texsubimage cube_map_array pbo</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89960">Bug 89960</a> - [softpipe] piglit copy-pixels regreession</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89961">Bug 89961</a> - [BDW/BSW Bisected]Synmark2_v6 OglDrvRes/OglDrvShComp/OglDrvState/OglPSPom Image Validation fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89963">Bug 89963</a> - lp_bld_debug.cpp:100:31: error: no matching function for call to llvm::raw_ostream::raw_ostream()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90000">Bug 90000</a> - [i965 Bisected NIR] Piglit/gglean_fragprog1-z-write_test fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90109">Bug 90109</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.shaders.uniform_block.random.basic_arrays.3 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90114">Bug 90114</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.shaders.struct.uniform.sampler_array_fragment fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90130">Bug 90130</a> - gl_PrimitiveId seems to reset at 340</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90147">Bug 90147</a> - swrast: build error undeclared _SC_PHYS_PAGES on osx</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90149">Bug 90149</a> - [SNB+ Bisected]ES3-CTS.gtf.GL3Tests.uniform_buffer_object.uniform_buffer_object_getactiveuniformsiv_for_nonexistent_uniform_indices fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90153">Bug 90153</a> - [SKL Bisected]ES3-CTS.gtf.GL3Tests.uniform_buffer_object.uniform_buffer_object_all_valid_basic_types fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90167">Bug 90167</a> - [softpipe] piglit depthstencil-default_fb-drawpixels-32f_24_8_rev regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90207">Bug 90207</a> - [r600g, bisected] regression: NI/Turks crash on WebGL Water (most WebGL stuff)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90213">Bug 90213</a> - glDrawPixels with GL_COLOR_INDEX never returns.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90243">Bug 90243</a> - [bisected] regression: spec.!opengl 3_2.get-active-attrib-returns-all-inputs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90258">Bug 90258</a> - [IVB] spec.glsl-1_10.execution.fs-dfdy-accuracy fails intermittently</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90310">Bug 90310</a> - Fails to build gallium_dri.so at linking stage with clang because of multiple redefinitions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90350">Bug 90350</a> - [G96] Portal's portal are incorrectly rendered</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90363">Bug 90363</a> - [nv50] HW state is not reset correctly when using a new GL context</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90397">Bug 90397</a> - ARB_program_interface_query: glGetProgramResourceiv() returns wrong value for GL_REFERENCED_BY_*_SHADER prop for GL_UNIFORM for members of an interface block with an instance name</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90466">Bug 90466</a> - arm: linker error ndefined reference to `nir_metadata_preserve'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90520">Bug 90520</a> - Register spilling clobbers registers used elsewhere in the shader</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90547">Bug 90547</a> - [BDW/BSW/SKL Bisected]Piglit/glean&#64;vertprog1-rsq_test_2_(reciprocal_square_root_of_negative_value) fais</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90580">Bug 90580</a> - [HSW bisected] integer multiplication bug</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90629">Bug 90629</a> - [i965] SIMD16 dual_source_blend assertion `src[i].file != GRF || src[i].width == dst.width' failed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90749">Bug 90749</a> - [BDW Bisected]dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines_wide fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90830">Bug 90830</a> - [bsw bisected regression] GPU hang for spec.arb_gpu_shader5.execution.sampler_array_indexing.vs-nonzero-base</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90839">Bug 90839</a> - [10.5.5/10.6 regression, bisected] PBO glDrawPixels no longer using blit fastpath</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90905">Bug 90905</a> - mesa: Finish subdir-objects transition</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=9951">Bug 9951</a> - GL_LINE_SMOOTH and GL_POLYGON_SMOOTH with i965 driver</li>
</ul>
<h2>Changes</h2>
<ul>
<li>Removed classic Windows software rasterizer.</li>
<li>Removed egl_gallium EGL driver.</li>
<li>Removed gbm_gallium GBM driver.</li>
<li>Removed OpenVG support.</li>
<li>Removed the galahad gallium driver.</li>
<li>Removed the identity gallium driver.</li>
<li>Removed the EGL loader from the Windows SCons build.</li>
<li>Removed the classic osmesa from the Windows SCons build.</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.6.1 Release Notes / June 29, 2015</h1>
<p>
Mesa 10.6.1 is a bug fix release which fixes bugs found since the 10.6.0 release.
</p>
<p>
Mesa 10.6.1 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
b4cccd4d0eabcc2bca00c3175d3ad88fdda57ffdb883a7998525b873a21fe607 mesa-10.6.1.tar.gz
6c80a2b647e57c85dc36e609d9aed17f878f0d8e0cf9ace86d14cf604101e1eb mesa-10.6.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90347">Bug 90347</a> - [NVE0+] Failure to insert texbar under some circumstances (causing bad colors in Terasology)</li>
</ul>
<h2>Changes</h2>
<p>Anuj Phogat (4):</p>
<ul>
<li>mesa: Handle integer formats in need_rgb_to_luminance_conversion()</li>
<li>mesa: Use helper function need_rgb_to_luminance_conversion()</li>
<li>mesa: Turn need_rgb_to_luminance_conversion() in to a global function</li>
<li>meta: Abort meta path if ReadPixels need rgb to luminance conversion</li>
</ul>
<p>Ben Widawsky (1):</p>
<ul>
<li>i965/gen9: Implement Push Constant Buffer workaround</li>
</ul>
<p>Boyan Ding (2):</p>
<ul>
<li>egl/x11: Set version of swrastLoader to 2</li>
<li>egl/x11: Remove duplicate call to dri2_x11_add_configs_for_visuals</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: Add sha256sums for the 10.6.0 release</li>
<li>configure: warn about shared_glapi &amp; xlib-glx only when both are set</li>
<li>configure: error out when building backend-less libEGL</li>
<li>configure: error out when building libEGL without shared-glapi</li>
<li>gbm: do not (over)link against libglapi.so</li>
<li>Update version to 10.6.1</li>
</ul>
<p>Frank Henigman (1):</p>
<ul>
<li>gbm: dlopen libglapi so gbm_create_device works</li>
</ul>
<p>Ilia Mirkin (9):</p>
<ul>
<li>nvc0/ir: fix collection of first uses for texture barrier insertion</li>
<li>nv50,nvc0: clamp uniform size to 64k</li>
<li>nvc0/ir: can't have a join on a load with an indirect source</li>
<li>glsl: handle conversions to double when comparing param matches</li>
<li>glsl: add version checks to conditionals for builtin variable enablement</li>
<li>mesa: add GL_PROGRAM_PIPELINE support in KHR_debug calls</li>
<li>glsl: binding point is a texture unit, which is a combined space</li>
<li>nvc0: always put all tfb bufs into bufctx</li>
<li>nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.6.2 Release Notes / July 11, 2015</h1>
<p>
Mesa 10.6.2 is a bug fix release which fixes bugs found since the 10.6.1 release.
</p>
<p>
Mesa 10.6.2 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
9c7ab9300dda6c912faaaff97995ec1820ba21d114d9cf555f145cbad90995f4 mesa-10.6.2.tar.gz
05753d3db4212900927b9894221a1669a10f56786e86a7e818b6e18a0817dca9 mesa-10.6.2.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=73528">Bug 73528</a> - Deferred lighting in Second Life causes system hiccups and screen flickering</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80500">Bug 80500</a> - Flickering shadows in unreleased title trace</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82186">Bug 82186</a> - [r600g] BARTS GPU lockup with minecraft shaders</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84225">Bug 84225</a> - Allow constant-index-expression sampler array indexing with GLSL-ES &lt; 300</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90537">Bug 90537</a> - radeonsi bo/va conflict on RADEON_GEM_VA (rscreen-&gt;ws-&gt;buffer_from_handle returns NULL)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90873">Bug 90873</a> - Kernel hang, TearFree On, Mate desktop environment</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91022">Bug 91022</a> - [g45 g965 bisected] assertions generated from textureGrad cube samplers fix</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91047">Bug 91047</a> - [SNB Bisected] Messed up Fog in Super Smash Bros. Melee in Dolphin</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91056">Bug 91056</a> - The Bard's Tale (2005, native) has rendering issues</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91117">Bug 91117</a> - Nimbus (running in wine) has rendering issues, objects are semi-transparent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91124">Bug 91124</a> - Civilization V (in Wine) has rendering issues: text missing, menu bar corrupted</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91173">Bug 91173</a> - Oddworld: Stranger's Wrath HD: disfigured models in wrong colors</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91226">Bug 91226</a> - Crash in glLinkProgram (NEW)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91231">Bug 91231</a> - [NV92] Psychonauts (native) segfaults on start when DRI3 enabled</li>
</ul>
<h2>Changes</h2>
<p>Chris Wilson (1):</p>
<ul>
<li>loader: Look for any version of currently linked libudev.so</li>
</ul>
<p>Emil Velikov (2):</p>
<ul>
<li>docs: Add sha256 checksums for the 10.6.1 release</li>
<li>Update version to 10.6.2</li>
</ul>
<p>Ilia Mirkin (8):</p>
<ul>
<li>nv50/ir: propagate modifier to right arg when const-folding mad</li>
<li>nv50/ir: fix emission of address reg in 3rd source</li>
<li>nv50/ir: copy joinAt when splitting both before and after</li>
<li>mesa: reset the source packing when creating temp transfer image</li>
<li>nv50/ir: don't emit src2 in immediate form</li>
<li>mesa/prog: relative offsets into constbufs are not constant</li>
<li>nv50/ir: UCMP arguments are float, so make sure modifiers are applied</li>
<li>nvc0: turn sample counts off during blit</li>
</ul>
<p>Kenneth Graunke (5):</p>
<ul>
<li>i965/fs: Fix ir_txs in emit_texture_gen4_simd16().</li>
<li>i965: Reserve more batch space to accomodate Gen6 perfmonitors.</li>
<li>i965/vs: Fix matNxM vertex attributes where M != 4.</li>
<li>Revert "glsl: clone inputs and outputs during linking"</li>
<li>Revert "i965: Delete linked GLSL IR when using NIR."</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>r600g: disable single-sample fast color clear due to hangs</li>
<li>radeonsi: fix a hang with DrawTransformFeedback on 4 SE chips</li>
<li>st/dri: don't set PIPE_BIND_SCANOUT for MSAA surfaces</li>
</ul>
<p>Mario Kleiner (2):</p>
<ul>
<li>nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.</li>
<li>winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.</li>
</ul>
<p>Matt Turner (2):</p>
<ul>
<li>i965/fs: Don't mess up stride for uniform integer multiplication.</li>
<li>Revert SHA1 additions.</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>winsys/radeon: Unmap GPU VM address range when destroying BO</li>
</ul>
<p>Mike Stroyan (2):</p>
<ul>
<li>meta: Only change and restore viewport 0 in mesa meta mode</li>
<li>i965: allocate at least 1 BLEND_STATE element</li>
</ul>
<p>Neil Roberts (4):</p>
<ul>
<li>i965/skl: Set the pulls bary bit in 3DSTATE_PS_EXTRA</li>
<li>glsl: Add missing check for whether an expression is an add operation</li>
<li>glsl: Make sure not to dereference NULL</li>
<li>i965: Don't try to print the GLSL IR if it has been freed</li>
</ul>
<p>Tapani Pälli (8):</p>
<ul>
<li>glsl: clone inputs and outputs during linking</li>
<li>i965: Delete linked GLSL IR when using NIR.</li>
<li>glsl: Allow dynamic sampler array indexing with GLSL ES &lt; 3.00</li>
<li>mesa/glsl: new compiler option EmitNoIndirectSampler</li>
<li>i965: use EmitNoIndirectSampler for gen &lt; 7</li>
<li>i915: use EmitNoIndirectSampler</li>
<li>mesa/st: use EmitNoIndirectSampler if !ARB_gpu_shader5</li>
<li>glsl: validate sampler array indexing for 'constant-index-expression'</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.6.3 Release Notes / July 26, 2015</h1>
<p>
Mesa 10.6.3 is a bug fix release which fixes bugs found since the 10.6.2 release.
</p>
<p>
Mesa 10.6.3 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
c27e1e33798e69a6d2d2425aee8ac7b4c0b243066a65dd76cbb182ea31b1c7f2 mesa-10.6.3.tar.gz
58592e07c350cd2e8969b73fa83048c657a39fe2f13f3b88f5e5818fe2e4676d mesa-10.6.3.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90728">Bug 90728</a> - dvd playback with vlc and vdpau causes segmentation fault</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91337">Bug 91337</a> - OSMesaGetProcAdress(&quot;OSMesaPixelStore&quot;) returns nil</li>
</ul>
<h2>Changes</h2>
<p>Brian Paul (1):</p>
<ul>
<li>osmesa: fix OSMesaPixelsStore typo</li>
</ul>
<p>Chad Versace (1):</p>
<ul>
<li>mesa: Fix generation of git_sha1.h.tmp for gitlinks</li>
</ul>
<p>Christian König (2):</p>
<ul>
<li>vl: cleanup video buffer private when the decoder is destroyed</li>
<li>st/vdpau: fix mixer size checks</li>
</ul>
<p>Emil Velikov (3):</p>
<ul>
<li>docs: Add sha256 checksums for the 10.6.2 release</li>
<li>auxiliary/vl: use the correct screen index</li>
<li>Update version to 10.6.3</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>i965/gen9: Use custom MOCS entries set up by the kernel.</li>
</ul>
<p>Ilia Mirkin (5):</p>
<ul>
<li>nv50, nvc0: enable at least one color RT if alphatest is enabled</li>
<li>nvc0/ir: fix txq on indirect samplers</li>
<li>nvc0/ir: don't worry about sampler in txq handling</li>
<li>gm107/ir: fix indirect txq emission</li>
<li>nv50: fix max level clamping on G80</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>program: Allow redundant OPTION ARB_fog_* directives.</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>xa: don't leak fences</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.6.4 Release Notes / August 11, 2015</h1>
<p>
Mesa 10.6.4 is a bug fix release which fixes bugs found since the 10.6.3 release.
</p>
<p>
Mesa 10.6.4 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
4960bf17d8b5d6a6503c6954ec6cf480b5cd930797bac901c60bea192675f85e mesa-10.6.4.tar.gz
8f5ac103f0f503de2f7a985b0df349bd4ecdfe7f51c714be146fa5a9a3c07b77 mesa-10.6.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=73512">Bug 73512</a> - [clover] mesa.icd. should contain full path</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91290">Bug 91290</a> - SIGSEGV glcpp/glcpp-parse.y:1077</li>
</ul>
<h2>Changes</h2>
<p>Anuj Phogat (6):</p>
<ul>
<li>mesa: Turn get_readpixels_transfer_ops() in to a global function</li>
<li>meta: Fix transfer operations check in meta pbo path for readpixels</li>
<li>meta: Abort meta pbo path if readpixels need signed-unsigned conversion</li>
<li>meta: Don't do fragment color clamping in _mesa_meta_pbo_GetTexSubImage</li>
<li>mesa: Add a helper function _mesa_need_luminance_to_rgb_conversion()</li>
<li>meta: Fix reading luminance texture as rgba in _mesa_meta_pbo_GetTexSubImage()</li>
</ul>
<p>Ben Widawsky (1):</p>
<ul>
<li>i965/skl: Add production thread counts and URB size</li>
</ul>
<p>Eduardo Lima Mitev (3):</p>
<ul>
<li>mesa: Fix errors values returned by glShaderBinary()</li>
<li>mesa: Validate target before resolving tex obj in glTex(ture)SubImageXD</li>
<li>mesa: Fix error returned by glCopyTexImage2D() upon an invalid internal format</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: Add checksums for mesa 10.6.3 tarballs</li>
<li>configure.ac: do not set HAVE_DRI(23) when libdrm is missing</li>
<li>egl/wayland: libdrm is a hard requirement, treat it as such</li>
<li>winsys/radeon: don't leak the fd when it is 0</li>
<li>bugzilla_mesa.sh: sort the bugs list by number</li>
<li>Update version to 10.6.4</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>i965/fs: Fix fs_inst::regs_read() for sources in the ATTR file.</li>
</ul>
<p>Frank Binns (2):</p>
<ul>
<li>egl/dri: Add error info needed for EGL_EXT_image_dma_buf_import extension</li>
<li>egl: Add eglQuerySurface surface type check for EGL_LARGEST_PBUFFER attrib</li>
</ul>
<p>Igor Gnatenko (1):</p>
<ul>
<li>opencl: use versioned .so in mesa.icd</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nvc0: fix geometry program revalidation of clipping params</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>glsl: Fix a bug where LHS swizzles of swizzles were too small.</li>
</ul>
<p>Marek Olšák (6):</p>
<ul>
<li>st/mesa: don't call st_validate_state in BlitFramebuffer</li>
<li>radeonsi: upload shader rodata after updating scratch relocations</li>
<li>st/mesa: don't ignore texture buffer state changes</li>
<li>radeonsi: rework how shader pointers to descriptors are set</li>
<li>radeonsi: completely rework updating descriptors without CP DMA</li>
<li>r600g: fix the CB_SHADER_MASK setup</li>
</ul>
<p>Samuel Iglesias Gonsalvez (1):</p>
<ul>
<li>glsl/glcpp: fix SIGSEGV when checking error condition for macro redefinition</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>nv50: avoid segfault with enabled but unbound vertex attrib</li>
</ul>
</div>
</body>
</html>

124
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.6.5 Release Notes / August 22, 2015</h1>
<p>
Mesa 10.6.5 is a bug fix release which fixes bugs found since the 10.6.4 release.
</p>
<p>
Mesa 10.6.5 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
afe290fc7af75a25df5ee52396a9f09e5dba85fb3e159304bdda265b8564b0d4 mesa-10.6.5.tar.gz
fb6fac3c85bcfa9d06b8dd439169f23f0c0924a88e44362e738b99b1feff762f mesa-10.6.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85252">Bug 85252</a> - Segfault in compiler while processing ternary operator with void arguments</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91570">Bug 91570</a> - Upgrading mesa to 10.6 causes segfault in OpenGL applications with GeForce4 MX 440 / AGP 8X</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91610">Bug 91610</a> - [BSW] GPU hang for spec.shaders.point-vertex-id gl_instanceid divisor</li>
</ul>
<h2>Changes</h2>
<p>Adam Jackson (1):</p>
<ul>
<li>glx: Fix __glXWireToEvent for BufferSwapComplete</li>
</ul>
<p>Alex Deucher (2):</p>
<ul>
<li>radeonsi: add new OLAND pci id</li>
<li>radeonsi: properly set the raster_config for KV</li>
</ul>
<p>Emil Velikov (4):</p>
<ul>
<li>docs: add sha256 checksums for 10.6.4</li>
<li>vc4: add missing nir include, to fix the build</li>
<li>Revert "radeonsi: properly set the raster_config for KV"</li>
<li>Update version to 10.6.5</li>
</ul>
<p>Frank Binns (1):</p>
<ul>
<li>egl/x11: don't abort when creating a DRI2 drawable fails</li>
</ul>
<p>Ilia Mirkin (3):</p>
<ul>
<li>nouveau: no need to do tnl wakeup, state updates are always hooked up</li>
<li>gm107/ir: indirect handle goes first on maxwell also</li>
<li>nv50,nvc0: take level into account when doing eng2d multi-layer blits</li>
</ul>
<p>Jason Ekstrand (4):</p>
<ul>
<li>meta/copy_image: Stash off the scissor</li>
<li>mesa/formats: Only do byteswapping for packed formats</li>
<li>mesa/formats: Fix swizzle flipping for big-endian targets</li>
<li>mesa/formats: Don't flip channels of null array formats</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>radeonsi: fix polygon offset scale</li>
<li>r600g: fix polygon offset scale</li>
<li>r600g: allow setting geometry shader sampler states</li>
</ul>
<p>Neil Roberts (1):</p>
<ul>
<li>i965/bdw: Fix setting the instancing state for the SGVS element</li>
</ul>
<p>Oded Gabbay (2):</p>
<ul>
<li>mesa: clear existing swizzle info before bitwise-OR</li>
<li>mesa/formats: don't byteswap when building array formats</li>
</ul>
<p>Renaud Gaubert (1):</p>
<ul>
<li>glsl: avoid compiler's segfault when processing operators with void arguments</li>
</ul>
</div>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 11.0.0 Release Notes / September 12, 2015</h1>
<p>
Mesa 11.0.0 is a new development release.
People who are concerned with stability and reliability should stick
with a previous release or wait for Mesa 11.0.1.
</p>
<p>
Mesa 11.0.0 implements the OpenGL 4.1 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.1. OpenGL
4.1 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD.
</pre>
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>New hardware support for AMD GCN 1.2 GPUs: Tonga, Iceland, Carrizo, Fiji</li>
<li>OpenGL 4.1 on radeonsi, nvc0</li>
<li>OpenGL ES 3.0 on freedreno (a3xx, a4xx)
<li>GL_AMD_vertex_shader_viewport_index on radeonsi</li>
<li>GL_ARB_conditional_render_inverted on r600, radeonsi</li>
<li>GL_ARB_depth_buffer_float on a4xx</li>
<li>GL_ARB_derivative_control on radeonsi</li>
<li>GL_ARB_draw_buffers, GL_ARB_draw_buffers_blend on a4xx</li>
<li>GL_ARB_fragment_layer_viewport on radeonsi</li>
<li>GL_ARB_framebuffer_no_attachments on i965</li>
<li>GL_ARB_get_texture_sub_image for all drivers</li>
<li>GL_ARB_gpu_shader5 on radeonsi</li>
<li>GL_ARB_gpu_shader_fp64 on llvmpipe, radeonsi</li>
<li>GL_ARB_shader_image_load_store on i965</li>
<li>GL_ARB_shader_precision on radeonsi, nvc0</li>
<li>GL_ARB_shader_image_size on i965</li>
<li>GL_ARB_shader_stencil_export on llvmpipe</li>
<li>GL_ARB_shader_subroutine on core profile all drivers</li>
<li>GL_ARB_tessellation_shader on nvc0, radeonsi</li>
<li>GL_ARB_transform_feedback2, GL_ARB_transform_feedback_instanced, GL_EXT_transform_feedback on a3xx, a4xx</li>
<li>GL_ARB_vertex_attrib_64bit on llvmpipe, radeonsi</li>
<li>GL_ARB_viewport_array on radeonsi</li>
<li>GL_EXT_depth_bounds_test on radeonsi, nv30, nv50, nvc0</li>
<li>GL_EXT_texture_compression_s3tc on freedreno (a3xx)</li>
<li>GL_NV_read_depth (GLES) on all drivers</li>
<li>GL_NV_read_depth_stencil (GLES) on all drivers</li>
<li>GL_NV_read_stencil (GLES) on all drivers</li>
<li>GL_OES_texture_float on all r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe</li>
<li>GL_OES_texture_half_float on all r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe</li>
<li>GL_OES_texture_float_linear on all r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe</li>
<li>GL_OES_texture_half_float_linear on all r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe</li>
<li>GL_EXT_draw_buffers2 on a4xx</li>
<li>GLX_ARB_create_context_robustness on r600, radeonsi</li>
<li>EGL_EXT_create_context_robustness on r600, radeonsi</li>
<li>EGL_KHR_gl_colorspace on r600, radeonsi, nv50, nvc0</li>
<li>EGL_KHR_gl_texture_3D_image on r600, radeonsi, nv50, nvc0</li>
<li>EGL 1.5 on r600, radeonsi, nv50, nvc0</li>
</ul>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=51658">Bug 51658</a> - r200 (&amp; possibly radeon) DRI fixes for gnome shell on Mesa 8.0.3</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=65525">Bug 65525</a> - [llvmpipe] lp_scene.h:210:lp_scene_alloc: Assertion `size &lt;= (64 * 1024)' failed.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66346">Bug 66346</a> - shader_query.cpp:49: error: invalid conversion from 'void*' to 'GLuint'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=73512">Bug 73512</a> - [clover] mesa.icd. should contain full path</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=73528">Bug 73528</a> - Deferred lighting in Second Life causes system hiccups and screen flickering</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74329">Bug 74329</a> - Please expose OES_texture_float and OES_texture_half_float on the ES3 context</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80500">Bug 80500</a> - Flickering shadows in unreleased title trace</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82186">Bug 82186</a> - [r600g] BARTS GPU lockup with minecraft shaders</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84225">Bug 84225</a> - Allow constant-index-expression sampler array indexing with GLSL-ES &lt; 300</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84677">Bug 84677</a> - Triangle disappears with glPolygonMode GL_LINE</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85252">Bug 85252</a> - Segfault in compiler while processing ternary operator with void arguments</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89131">Bug 89131</a> - [Bisected] Graphical corruption in Weston, shows old framebuffer pieces</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90000">Bug 90000</a> - [i965 Bisected NIR] Piglit/gglean_fragprog1-z-write_test fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90073">Bug 90073</a> - Leaks in xcb_dri3_open_reply_fds() and get_render_node_from_id_path_tag</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90249">Bug 90249</a> - Fails to build egl_dri2 on osx</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90310">Bug 90310</a> - Fails to build gallium_dri.so at linking stage with clang because of multiple redefinitions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90347">Bug 90347</a> - [NVE0+] Failure to insert texbar under some circumstances (causing bad colors in Terasology)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90466">Bug 90466</a> - arm: linker error ndefined reference to `nir_metadata_preserve'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90520">Bug 90520</a> - Register spilling clobbers registers used elsewhere in the shader</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90537">Bug 90537</a> - radeonsi bo/va conflict on RADEON_GEM_VA (rscreen-&gt;ws-&gt;buffer_from_handle returns NULL)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90547">Bug 90547</a> - [BDW/BSW/SKL Bisected]Piglit/glean&#64;vertprog1-rsq_test_2_(reciprocal_square_root_of_negative_value) fais</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90580">Bug 90580</a> - [HSW bisected] integer multiplication bug</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90600">Bug 90600</a> - IOError: [Errno 2] No such file or directory: 'gl_API.xml'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90621">Bug 90621</a> - Mesa fail to build from git</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90629">Bug 90629</a> - [i965] SIMD16 dual_source_blend assertion `src[i].file != GRF || src[i].width == dst.width' failed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90691">Bug 90691</a> - [BSW]Piglit/spec/nv_conditional_render/dlist fails intermittently</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90728">Bug 90728</a> - dvd playback with vlc and vdpau causes segmentation fault</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90734">Bug 90734</a> - glBufferSubData is corrupting data when buffer is &gt; 32k</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90748">Bug 90748</a> - [BDW Bisected]dEQP-GLES3.functional.fbo.completeness.renderable.texture.depth.rg_half_float_oes fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90749">Bug 90749</a> - [BDW Bisected]dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines_wide fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90751">Bug 90751</a> - [BDW Bisected]dEQP-GLES3.functional.fbo.completeness.renderable.texture.stencil.stencil_index8 fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90797">Bug 90797</a> - [ALL bisected] Mesa change cause performance case manhattan fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90817">Bug 90817</a> - swrast fails to load with certain remote X servers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90830">Bug 90830</a> - [bsw bisected regression] GPU hang for spec.arb_gpu_shader5.execution.sampler_array_indexing.vs-nonzero-base</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90839">Bug 90839</a> - [10.5.5/10.6 regression, bisected] PBO glDrawPixels no longer using blit fastpath</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90873">Bug 90873</a> - Kernel hang, TearFree On, Mate desktop environment</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90887">Bug 90887</a> - PhiMovesPass in register allocator broken</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90895">Bug 90895</a> - [IVB/HSW/BDW/BSW Bisected] GLB2.7 Egypt, GfxBench3.0 T-Rex &amp; ALU and many SynMark cases performance reduced by 10-23%</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90902">Bug 90902</a> - [bsw][regression] dEQP: &quot;Found invalid pixel values&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90903">Bug 90903</a> - egl_dri2.c:dri2_load fails to load libglapi on osx</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90904">Bug 90904</a> - OSX: EXC_BAD_ACCESS when using translate_sse + gallium + softpipe/llvmpipe</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90905">Bug 90905</a> - mesa: Finish subdir-objects transition</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90925">Bug 90925</a> - &quot;high fidelity&quot;: Segfault in _mesa_program_resource_find_name</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91022">Bug 91022</a> - [g45 g965 bisected] assertions generated from textureGrad cube samplers fix</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91047">Bug 91047</a> - [SNB Bisected] Messed up Fog in Super Smash Bros. Melee in Dolphin</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91056">Bug 91056</a> - The Bard's Tale (2005, native) has rendering issues</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91077">Bug 91077</a> - dri2_glx.c:1186: undefined reference to `loader_open_device'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91099">Bug 91099</a> - [llvmpipe] piglit glsl-max-varyings &gt;max_varying_components regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91101">Bug 91101</a> - [softpipe] piglit glsl-1.50&#64;execution&#64;geometry&#64;max-input-components regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91117">Bug 91117</a> - Nimbus (running in wine) has rendering issues, objects are semi-transparent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91124">Bug 91124</a> - Civilization V (in Wine) has rendering issues: text missing, menu bar corrupted</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91173">Bug 91173</a> - Oddworld: Stranger's Wrath HD: disfigured models in wrong colors</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91193">Bug 91193</a> - [290x] Dota2 reborn ingame rendering breaks with git-af4b9c7</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91222">Bug 91222</a> - lp_test_format regression on CentOS 7</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91226">Bug 91226</a> - Crash in glLinkProgram (NEW)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91231">Bug 91231</a> - [NV92] Psychonauts (native) segfaults on start when DRI3 enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91254">Bug 91254</a> - (regresion) video using VA-API on Intel slow and freeze system with mesa 10.6 or 10.6.1</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91290">Bug 91290</a> - SIGSEGV glcpp/glcpp-parse.y:1077</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91292">Bug 91292</a> - [BDW+] glVertexAttribDivisor not working in combination with glPolygonMode</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91337">Bug 91337</a> - OSMesaGetProcAdress(&quot;OSMesaPixelStore&quot;) returns nil</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91418">Bug 91418</a> - Visual Studio 2015 vsnprintf build error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91425">Bug 91425</a> - [regression, bisected] Piglit spec/ext_packed_float/ getteximage-invalid-format-for-packed-type fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91441">Bug 91441</a> - make check DispatchSanity_test.GL30 regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91444">Bug 91444</a> - regression bisected radeonsi: don't change pipe_resource in resource_copy_region</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91461">Bug 91461</a> - gl_TessLevel* writes have no effect for all but the last TCS invocation</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91513">Bug 91513</a> - [IVB/HSW/BDW/SKL Bisected] Lightsmark performance reduced by 7%-10%</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91526">Bug 91526</a> - World of Warcraft (on Wine) has UI corruption with nouveau</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91544">Bug 91544</a> - [i965, regression, bisected] regression of several tests in 93977d3a151675946c03e</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91551">Bug 91551</a> - DXTn compressed normal maps produce severe artifacts on all NV5x and NVDx chipsets</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91570">Bug 91570</a> - Upgrading mesa to 10.6 causes segfault in OpenGL applications with GeForce4 MX 440 / AGP 8X</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91591">Bug 91591</a> - rounding.h:102:2: error: #error &quot;Unsupported or undefined LONG_BIT&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91610">Bug 91610</a> - [BSW] GPU hang for spec.shaders.point-vertex-id gl_instanceid divisor</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91673">Bug 91673</a> - Segfault when calling glTexSubImage2D on storage texture to bound FBO</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91726">Bug 91726</a> - R600 asserts in tgsi_cmp/make_src_for_op3</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91847">Bug 91847</a> - glGenerateTextureMipmap not working (no errors) unless glActiveTexture(GL_TEXTURE1) is called before</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91857">Bug 91857</a> - Mesa 10.6.3 linker is slow</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91881">Bug 91881</a> - regression: GPU lockups since mesa-11.0.0_rc1 on RV620 (r600) driver</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91890">Bug 91890</a> - [nve7] witcher2: blurry image &amp; DATA_ERRORs (class 0xa097 mthd 0x2380/0x238c)</li>
</ul>
<h2>Changes</h2>
<li>Removed the EGL loader from the Linux SCons build.</li>
</div>
</body>
</html>

View File

@@ -1693,7 +1693,7 @@ bc644be551ed585fc4f66c16b64a91c9 MesaGLUT-7.10.tar.gz
<li>llvmpipe: Special case complementary and identify blend factors in SoA.</li>
<li>llvmpipe: Make rgb/alpha bland func/factors match, when there is no alpha.</li>
<li>draw: Prevent clipped vertices overflow.</li>
<li>draw: Fullfil the new min_lod/max_lod/lod_bias/border_color dynamic state</li>
<li>draw: Fulfil the new min_lod/max_lod/lod_bias/border_color dynamic state</li>
<li>gallivm: Fetch the lod from the dynamic state when min_lod == max_lod.</li>
<li>gallivm: Remove dead experimental code.</li>
<li>llvmpipe: Decouple sampler view and sampler state updates.</li>

View File

@@ -48,7 +48,7 @@ c49c19c2bbef4f3b7f1389974dff25f4 MesaGLUT-7.6.zip
<h2>New features</h2>
<ul>
<li><a href="../openvg.html">OpenVG</a> front-end (state tracker for Gallium).
<li>OpenVG front-end (state tracker for Gallium).
This was written by Zack Rusin at Tungsten Graphics.
<li>GL_ARB_vertex_array_object and GL_APPLE_vertex_array_object extensions
(supported in Gallium drivers, Intel DRI drivers, and software drivers)</li>

View File

@@ -133,10 +133,8 @@ each directory.
<ul>
<li><b>clover</b> - OpenCL state tracker
<li><b>dri</b> - Meta state tracker for DRI drivers
<li><b>egl</b> - Meta state tracker for EGL drivers
<li><b>glx</b> - Meta state tracker for GLX
<li><b>vdpau</b> - VDPAU state tracker
<li><b>vega</b> - OpenVG 1.x state tracker
<li><b>wgl</b> -
<li><b>xorg</b> - Meta state tracker for Xorg video drivers
<li><b>xvmc</b> - XvMC state tracker

View File

@@ -0,0 +1,147 @@
Name
MESA_image_dma_buf_export
Name Strings
EGL_MESA_image_dma_buf_export
Contributors
Dave Airlie
Contact
Dave Airlie (airlied 'at' redhat 'dot' com)
Status
Complete, shipping.
Version
Version 3, May 5, 2015
Number
EGL Extension #87
Dependencies
Requires EGL 1.4 or later. This extension is written against the
wording of the EGL 1.4 specification.
EGL_KHR_base_image is required.
The EGL implementation must be running on a Linux kernel supporting the
dma_buf buffer sharing mechanism.
Overview
This extension provides entry points for integrating EGLImage with the
dma-buf infrastructure. The extension allows creating a Linux dma_buf
file descriptor or multiple file descriptors, in the case of multi-plane
YUV image, from an EGLImage.
It is designed to provide the complementary functionality to
EGL_EXT_image_dma_buf_import.
IP Status
Open-source; freely implementable.
New Types
This extension uses the 64-bit unsigned integer type EGLuint64KHR
first introduced by the EGL_KHR_stream extension, but does not
depend on that extension. The typedef may be reproduced separately
for this extension, if not already present in eglext.h.
typedef khronos_uint64_t EGLuint64KHR;
New Procedures and Functions
EGLBoolean eglExportDMABUFImageQueryMESA(EGLDisplay dpy,
EGLImageKHR image,
int *fourcc,
int *num_planes,
EGLuint64KHR *modifiers);
EGLBoolean eglExportDMABUFImageMESA(EGLDisplay dpy,
EGLImageKHR image,
int *fds,
EGLint *strides,
EGLint *offsets);
New Tokens
None
Additions to the EGL 1.4 Specification:
To mirror the import extension, this extension attempts to return
enough information to enable an exported dma-buf to be imported
via eglCreateImageKHR and EGL_LINUX_DMA_BUF_EXT token.
Retrieving the information is a two step process, so two APIs
are required.
The first entrypoint
EGLBoolean eglExportDMABUFImageQueryMESA(EGLDisplay dpy,
EGLImageKHR image,
int *fourcc,
int *num_planes,
EGLuint64KHR *modifiers);
is used to retrieve the pixel format of the buffer, as specified by
drm_fourcc.h, the number of planes in the image and the Linux
drm modifiers. <fourcc>, <num_planes> and <modifiers> may be NULL,
in which case no value is retrieved.
The second entrypoint retrieves the dma_buf file descriptors,
strides and offsets for the image. The caller should pass
arrays sized according to the num_planes values retrieved previously.
Passing arrays of the wrong size will have undefined results.
If the number of fds is less than the number of planes, then
subsequent fd slots should contain -1.
EGLBoolean eglExportDMABUFImageMESA(EGLDisplay dpy,
EGLImageKHR image,
int *fds,
EGLint *strides,
EGLint *offsets);
<fds>, <strides>, <offsets> can be NULL if the infomatation isn't
required by the caller.
Issues
1. Should the API look more like an attribute getting API?
ANSWER: No, from a user interface pov, having to iterate across calling
the API up to 12 times using attribs seems like the wrong solution.
2. Should the API take a plane and just get the fd/stride/offset for that
plane?
ANSWER: UNKNOWN,this might be just as valid an API.
3. Does ownership of the file descriptor remain with the app?
ANSWER: Yes, the app is responsible for closing any fds retrieved.
4. If number of planes and number of fds differ what should we do?
ANSWER: Return -1 for the secondary slots, as this avoids having
to dup the fd extra times to make the interface sane.
Revision History
Version 3, May, 2015
Just use the KHR 64-bit type.
Version 2, March, 2015
Add a query interface (Dave Airlie)
Version 1, June 3, 2014
Initial draft (Dave Airlie)

View File

@@ -150,7 +150,7 @@ New features:
Changes:
<ul>
<li>renamed aux.h as glaux.h (MS-DOS names can't start with aux)
<li>most filenames are in 8.3 format to accomodate MS-DOS
<li>most filenames are in 8.3 format to accommodate MS-DOS
<li>use GLubytes to store arrays of colors instead of GLints
</ul>
@@ -1224,7 +1224,7 @@ Bug fixes:
</ul>
Changes:
<ul>
<li>max texture units reduced to six to accomodate texture rectangles
<li>max texture units reduced to six to accommodate texture rectangles
<li>removed unfinished GL_MESA_sprite_point extension code
</ul>

View File

@@ -19,6 +19,7 @@
<p>
This page lists known issues with
<a href="http://www.spec.org/gwpg/gpc.static/vp11info.html" target="_main">SPEC Viewperf 11</a>
and <a href="https://www.spec.org/gwpg/gpc.static/vp12info.html" target="_main">SPEC Viewperf 12</a>
when running on Mesa-based drivers.
</p>
@@ -40,13 +41,15 @@ These issues have been reported to the SPEC organization in the hope that
they'll be fixed in the future.
</p>
<h2><u>Viewperf 11</u></h2>
<p>
Some of the Viewperf tests use a lot of memory.
Some of the Viewperf 11 tests use a lot of memory.
At least 2GB of RAM is recommended.
</p>
<h2>Catia-03 test 2</h2>
<h3>Catia-03 test 2</h3>
<p>
This test creates over 38000 vertex buffer objects. On some systems
@@ -59,7 +62,7 @@ either in Viewperf or the Mesa driver.
<h2>Catia-03 tests 3, 4, 8</h2>
<h3>Catia-03 tests 3, 4, 8</h3>
<p>
These tests use features of the
@@ -79,7 +82,7 @@ Subsequent drawing calls become no-ops and the rendering is incorrect.
<h2>sw-02 tests 1, 2, 4, 6</h2>
<h3>sw-02 tests 1, 2, 4, 6</h3>
<p>
These tests depend on the
@@ -99,7 +102,7 @@ color. This is probably due to some uninitialized state somewhere.
<h2>sw-02 test 6</h2>
<h3>sw-02 test 6</h3>
<p>
The lines drawn in this test appear in a random color.
@@ -111,7 +114,7 @@ situation, we get a random color.
<h2>Lightwave-01 test 3</h2>
<h3>Lightwave-01 test 3</h3>
<p>
This test uses a number of mipmapped textures, but the textures are
@@ -172,7 +175,7 @@ However, we have no plans to implement this work-around in Mesa.
</p>
<h2>Maya-03 test 2</h2>
<h3>Maya-03 test 2</h3>
<p>
This test makes some unusual calls to glRotate. For example:
@@ -204,7 +207,7 @@ and with a semi-random color (between white and black) since GL_FOG is enabled.
</p>
<h2>Proe-05 test 1</h2>
<h3>Proe-05 test 1</h3>
<p>
This uses depth testing but there's two problems:
@@ -232,7 +235,7 @@ glClear is called so clearing the depth buffer would be a no-op anyway.
</p>
<h2>Proe-05 test 6</h2>
<h3>Proe-05 test 6</h3>
<p>
This test draws an engine model with a two-pass algorithm.
@@ -261,6 +264,86 @@ blending with appropriate patterns/modes to ensure the same fragments
are produced in both passes.
</p>
<h2><u>Viewperf 12</u></h2>
<p>
Note that Viewperf 12 only runs on 64-bit Windows 7 or later.
</p>
<h3>catia-04</h3>
<p>
One of the catia tests calls wglGetProcAddress() to get some
GL_EXT_direct_state_access functions (such as glBindMultiTextureEXT) and some
GL_NV_half_float functions (such as glMultiTexCoord3hNV).
If the extension/function is not supported, wglGetProcAddress() can return NULL.
Unfortunately, Viewperf doesn't check for null pointers and crashes when it
later tries to use the pointer.
</p>
<p>
Another catia test uses OpenGL 3.1's primitive restart feature.
But when Viewperf creates an OpenGL context, it doesn't request version 3.1
If the driver returns version 3.0 or earlier all the calls related to primitive
restart generate an OpenGL error.
Some of the rendering is then incorrect.
</p>
<h3>energy-01</h3>
<p>
This test creates a 3D luminance texture of size 1K x 1K x 1K.
If the OpenGL driver/device doesn't support a texture of this size
the glTexImage3D() call will fail with GL_INVALID_VALUE or GL_OUT_OF_MEMORY
and all that's rendered is plain white polygons.
Ideally, the test would use a proxy texture to determine the max 3D
texture size. But it does not do that.
</p>
<h3>maya-04</h3>
<p>
This test generates many GL_INVALID_OPERATION errors in its calls to
glUniform().
Causes include:
<ul>
<li> Trying to set float uniforms with glUniformi()
<li> Trying to set float uniforms with glUniform3f()
<li> Trying to set matrix uniforms with glUniform() instead of glUniformMatrix().
</ul>
<p>
Apparently, the indexes returned by glGetUniformLocation() were hard-coded
into the application trace when it was created.
Since different implementations of glGetUniformLocation() may return different
values for any given uniform name, subsequent calls to glUniform() will be
invalid since they refer to the wrong uniform variables.
This causes many OpenGL errors and leads to incorrect rendering.
</p>
<h3>medical-01</h3>
<p>
This test uses a single GLSL fragment shader which contains a GLSL 1.20
array initializer statement, but it neglects to specify
<code>#version 120</code> at the top of the shader code.
So, the shader does not compile and all that's rendered is plain white polygons.
</p>
<p>
Also, the test tries to create a very large 3D texture that may exceed
the device driver's limit.
When this happens, the glTexImage3D call fails and all that's rendered is
a white box.
</p>
<h3>showcase-01</h3>
<p>
This is actually a DX11 test based on Autodesk's Showcase product.
As such, it won't run with Mesa.
</p>
</div>
</body>

1
doxygen/.gitignore vendored
View File

@@ -1,3 +1,4 @@
*.db
*.tag
*.tmp
agpgart

View File

@@ -33,3 +33,4 @@ subset: $(SUBSET:.doxy=.tag)
clean:
-rm -rf $(FULL:.doxy=) $(SUBSET:.doxy=)
-rm -rf *.tag
-rm -rf *.db

View File

@@ -1,11 +1,12 @@
/* -*- mode: c; tab-width: 8; -*- */
/* vi: set sw=4 ts=8: */
/* Reference version of egl.h for EGL 1.4.
* $Revision: 9356 $ on $Date: 2009-10-21 02:52:25 -0700 (Wed, 21 Oct 2009) $
*/
#ifndef __egl_h_
#define __egl_h_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2007-2009 The Khronos Group Inc.
** Copyright (c) 2013-2014 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -26,304 +27,277 @@
** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
*/
/*
** This header is generated from the Khronos OpenGL / OpenGL ES XML
** API Registry. The current version of the Registry, generator scripts
** used to make the header, and the header can be found at
** http://www.opengl.org/registry/
**
** Khronos $Revision: 31039 $ on $Date: 2015-05-04 17:01:57 -0700 (Mon, 04 May 2015) $
*/
#ifndef __egl_h_
#define __egl_h_
/* All platform-dependent types and macro boilerplate (such as EGLAPI
* and EGLAPIENTRY) should go in eglplatform.h.
*/
#include <EGL/eglplatform.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Generated on date 20150504 */
/* EGL Types */
/* EGLint is defined in eglplatform.h */
/* Generated C header for:
* API: egl
* Versions considered: .*
* Versions emitted: .*
* Default extensions included: None
* Additional extensions included: _nomatch_^
* Extensions removed: _nomatch_^
*/
#ifndef EGL_VERSION_1_0
#define EGL_VERSION_1_0 1
typedef unsigned int EGLBoolean;
typedef unsigned int EGLenum;
typedef void *EGLConfig;
typedef void *EGLContext;
typedef void *EGLDisplay;
#include <KHR/khrplatform.h>
#include <EGL/eglplatform.h>
typedef void *EGLConfig;
typedef void *EGLSurface;
typedef void *EGLClientBuffer;
/* EGL Versioning */
#define EGL_VERSION_1_0 1
#define EGL_VERSION_1_1 1
#define EGL_VERSION_1_2 1
#define EGL_VERSION_1_3 1
#define EGL_VERSION_1_4 1
/* EGL Enumerants. Bitmasks and other exceptional cases aside, most
* enums are assigned unique values starting at 0x3000.
*/
/* EGL aliases */
#define EGL_FALSE 0
#define EGL_TRUE 1
/* Out-of-band handle values */
#define EGL_DEFAULT_DISPLAY ((EGLNativeDisplayType)0)
#define EGL_NO_CONTEXT ((EGLContext)0)
#define EGL_NO_DISPLAY ((EGLDisplay)0)
#define EGL_NO_SURFACE ((EGLSurface)0)
/* Out-of-band attribute value */
#define EGL_DONT_CARE ((EGLint)-1)
/* Errors / GetError return values */
#define EGL_SUCCESS 0x3000
#define EGL_NOT_INITIALIZED 0x3001
#define EGL_BAD_ACCESS 0x3002
#define EGL_BAD_ALLOC 0x3003
#define EGL_BAD_ATTRIBUTE 0x3004
#define EGL_BAD_CONFIG 0x3005
#define EGL_BAD_CONTEXT 0x3006
#define EGL_BAD_CURRENT_SURFACE 0x3007
#define EGL_BAD_DISPLAY 0x3008
#define EGL_BAD_MATCH 0x3009
#define EGL_BAD_NATIVE_PIXMAP 0x300A
#define EGL_BAD_NATIVE_WINDOW 0x300B
#define EGL_BAD_PARAMETER 0x300C
#define EGL_BAD_SURFACE 0x300D
#define EGL_CONTEXT_LOST 0x300E /* EGL 1.1 - IMG_power_management */
/* Reserved 0x300F-0x301F for additional errors */
/* Config attributes */
#define EGL_BUFFER_SIZE 0x3020
#define EGL_ALPHA_SIZE 0x3021
#define EGL_BLUE_SIZE 0x3022
#define EGL_GREEN_SIZE 0x3023
#define EGL_RED_SIZE 0x3024
#define EGL_DEPTH_SIZE 0x3025
#define EGL_STENCIL_SIZE 0x3026
#define EGL_CONFIG_CAVEAT 0x3027
#define EGL_CONFIG_ID 0x3028
#define EGL_LEVEL 0x3029
#define EGL_MAX_PBUFFER_HEIGHT 0x302A
#define EGL_MAX_PBUFFER_PIXELS 0x302B
#define EGL_MAX_PBUFFER_WIDTH 0x302C
#define EGL_NATIVE_RENDERABLE 0x302D
#define EGL_NATIVE_VISUAL_ID 0x302E
#define EGL_NATIVE_VISUAL_TYPE 0x302F
#define EGL_SAMPLES 0x3031
#define EGL_SAMPLE_BUFFERS 0x3032
#define EGL_SURFACE_TYPE 0x3033
#define EGL_TRANSPARENT_TYPE 0x3034
#define EGL_TRANSPARENT_BLUE_VALUE 0x3035
#define EGL_TRANSPARENT_GREEN_VALUE 0x3036
#define EGL_TRANSPARENT_RED_VALUE 0x3037
#define EGL_NONE 0x3038 /* Attrib list terminator */
#define EGL_BIND_TO_TEXTURE_RGB 0x3039
#define EGL_BIND_TO_TEXTURE_RGBA 0x303A
#define EGL_MIN_SWAP_INTERVAL 0x303B
#define EGL_MAX_SWAP_INTERVAL 0x303C
#define EGL_LUMINANCE_SIZE 0x303D
#define EGL_ALPHA_MASK_SIZE 0x303E
#define EGL_COLOR_BUFFER_TYPE 0x303F
#define EGL_RENDERABLE_TYPE 0x3040
#define EGL_MATCH_NATIVE_PIXMAP 0x3041 /* Pseudo-attribute (not queryable) */
#define EGL_CONFORMANT 0x3042
/* Reserved 0x3041-0x304F for additional config attributes */
/* Config attribute values */
#define EGL_SLOW_CONFIG 0x3050 /* EGL_CONFIG_CAVEAT value */
#define EGL_NON_CONFORMANT_CONFIG 0x3051 /* EGL_CONFIG_CAVEAT value */
#define EGL_TRANSPARENT_RGB 0x3052 /* EGL_TRANSPARENT_TYPE value */
#define EGL_RGB_BUFFER 0x308E /* EGL_COLOR_BUFFER_TYPE value */
#define EGL_LUMINANCE_BUFFER 0x308F /* EGL_COLOR_BUFFER_TYPE value */
/* More config attribute values, for EGL_TEXTURE_FORMAT */
#define EGL_NO_TEXTURE 0x305C
#define EGL_TEXTURE_RGB 0x305D
#define EGL_TEXTURE_RGBA 0x305E
#define EGL_TEXTURE_2D 0x305F
/* Config attribute mask bits */
#define EGL_PBUFFER_BIT 0x0001 /* EGL_SURFACE_TYPE mask bits */
#define EGL_PIXMAP_BIT 0x0002 /* EGL_SURFACE_TYPE mask bits */
#define EGL_WINDOW_BIT 0x0004 /* EGL_SURFACE_TYPE mask bits */
#define EGL_VG_COLORSPACE_LINEAR_BIT 0x0020 /* EGL_SURFACE_TYPE mask bits */
#define EGL_VG_ALPHA_FORMAT_PRE_BIT 0x0040 /* EGL_SURFACE_TYPE mask bits */
#define EGL_MULTISAMPLE_RESOLVE_BOX_BIT 0x0200 /* EGL_SURFACE_TYPE mask bits */
#define EGL_SWAP_BEHAVIOR_PRESERVED_BIT 0x0400 /* EGL_SURFACE_TYPE mask bits */
#define EGL_OPENGL_ES_BIT 0x0001 /* EGL_RENDERABLE_TYPE mask bits */
#define EGL_OPENVG_BIT 0x0002 /* EGL_RENDERABLE_TYPE mask bits */
#define EGL_OPENGL_ES2_BIT 0x0004 /* EGL_RENDERABLE_TYPE mask bits */
#define EGL_OPENGL_BIT 0x0008 /* EGL_RENDERABLE_TYPE mask bits */
/* QueryString targets */
#define EGL_VENDOR 0x3053
#define EGL_VERSION 0x3054
#define EGL_EXTENSIONS 0x3055
#define EGL_CLIENT_APIS 0x308D
/* QuerySurface / SurfaceAttrib / CreatePbufferSurface targets */
#define EGL_HEIGHT 0x3056
#define EGL_WIDTH 0x3057
#define EGL_LARGEST_PBUFFER 0x3058
#define EGL_TEXTURE_FORMAT 0x3080
#define EGL_TEXTURE_TARGET 0x3081
#define EGL_MIPMAP_TEXTURE 0x3082
#define EGL_MIPMAP_LEVEL 0x3083
#define EGL_RENDER_BUFFER 0x3086
#define EGL_VG_COLORSPACE 0x3087
#define EGL_VG_ALPHA_FORMAT 0x3088
#define EGL_HORIZONTAL_RESOLUTION 0x3090
#define EGL_VERTICAL_RESOLUTION 0x3091
#define EGL_PIXEL_ASPECT_RATIO 0x3092
#define EGL_SWAP_BEHAVIOR 0x3093
#define EGL_MULTISAMPLE_RESOLVE 0x3099
/* EGL_RENDER_BUFFER values / BindTexImage / ReleaseTexImage buffer targets */
#define EGL_BACK_BUFFER 0x3084
#define EGL_SINGLE_BUFFER 0x3085
/* OpenVG color spaces */
#define EGL_VG_COLORSPACE_sRGB 0x3089 /* EGL_VG_COLORSPACE value */
#define EGL_VG_COLORSPACE_LINEAR 0x308A /* EGL_VG_COLORSPACE value */
/* OpenVG alpha formats */
#define EGL_VG_ALPHA_FORMAT_NONPRE 0x308B /* EGL_ALPHA_FORMAT value */
#define EGL_VG_ALPHA_FORMAT_PRE 0x308C /* EGL_ALPHA_FORMAT value */
/* Constant scale factor by which fractional display resolutions &
* aspect ratio are scaled when queried as integer values.
*/
#define EGL_DISPLAY_SCALING 10000
/* Unknown display resolution/aspect ratio */
#define EGL_UNKNOWN ((EGLint)-1)
/* Back buffer swap behaviors */
#define EGL_BUFFER_PRESERVED 0x3094 /* EGL_SWAP_BEHAVIOR value */
#define EGL_BUFFER_DESTROYED 0x3095 /* EGL_SWAP_BEHAVIOR value */
/* CreatePbufferFromClientBuffer buffer types */
#define EGL_OPENVG_IMAGE 0x3096
/* QueryContext targets */
#define EGL_CONTEXT_CLIENT_TYPE 0x3097
/* CreateContext attributes */
#define EGL_CONTEXT_CLIENT_VERSION 0x3098
/* Multisample resolution behaviors */
#define EGL_MULTISAMPLE_RESOLVE_DEFAULT 0x309A /* EGL_MULTISAMPLE_RESOLVE value */
#define EGL_MULTISAMPLE_RESOLVE_BOX 0x309B /* EGL_MULTISAMPLE_RESOLVE value */
/* BindAPI/QueryAPI targets */
#define EGL_OPENGL_ES_API 0x30A0
#define EGL_OPENVG_API 0x30A1
#define EGL_OPENGL_API 0x30A2
/* GetCurrentSurface targets */
#define EGL_DRAW 0x3059
#define EGL_READ 0x305A
/* WaitNative engines */
#define EGL_CORE_NATIVE_ENGINE 0x305B
/* EGL 1.2 tokens renamed for consistency in EGL 1.3 */
#define EGL_COLORSPACE EGL_VG_COLORSPACE
#define EGL_ALPHA_FORMAT EGL_VG_ALPHA_FORMAT
#define EGL_COLORSPACE_sRGB EGL_VG_COLORSPACE_sRGB
#define EGL_COLORSPACE_LINEAR EGL_VG_COLORSPACE_LINEAR
#define EGL_ALPHA_FORMAT_NONPRE EGL_VG_ALPHA_FORMAT_NONPRE
#define EGL_ALPHA_FORMAT_PRE EGL_VG_ALPHA_FORMAT_PRE
/* EGL extensions must request enum blocks from the Khronos
* API Registrar, who maintains the enumerant registry. Submit
* a bug in Khronos Bugzilla against task "Registry".
*/
/* EGL Functions */
EGLAPI EGLint EGLAPIENTRY eglGetError(void);
EGLAPI EGLDisplay EGLAPIENTRY eglGetDisplay(EGLNativeDisplayType display_id);
EGLAPI EGLBoolean EGLAPIENTRY eglInitialize(EGLDisplay dpy, EGLint *major, EGLint *minor);
EGLAPI EGLBoolean EGLAPIENTRY eglTerminate(EGLDisplay dpy);
EGLAPI const char * EGLAPIENTRY eglQueryString(EGLDisplay dpy, EGLint name);
EGLAPI EGLBoolean EGLAPIENTRY eglGetConfigs(EGLDisplay dpy, EGLConfig *configs,
EGLint config_size, EGLint *num_config);
EGLAPI EGLBoolean EGLAPIENTRY eglChooseConfig(EGLDisplay dpy, const EGLint *attrib_list,
EGLConfig *configs, EGLint config_size,
EGLint *num_config);
EGLAPI EGLBoolean EGLAPIENTRY eglGetConfigAttrib(EGLDisplay dpy, EGLConfig config,
EGLint attribute, EGLint *value);
EGLAPI EGLSurface EGLAPIENTRY eglCreateWindowSurface(EGLDisplay dpy, EGLConfig config,
EGLNativeWindowType win,
const EGLint *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePbufferSurface(EGLDisplay dpy, EGLConfig config,
const EGLint *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePixmapSurface(EGLDisplay dpy, EGLConfig config,
EGLNativePixmapType pixmap,
const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroySurface(EGLDisplay dpy, EGLSurface surface);
EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurface(EGLDisplay dpy, EGLSurface surface,
EGLint attribute, EGLint *value);
EGLAPI EGLBoolean EGLAPIENTRY eglBindAPI(EGLenum api);
EGLAPI EGLenum EGLAPIENTRY eglQueryAPI(void);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitClient(void);
EGLAPI EGLBoolean EGLAPIENTRY eglReleaseThread(void);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePbufferFromClientBuffer(
EGLDisplay dpy, EGLenum buftype, EGLClientBuffer buffer,
EGLConfig config, const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglSurfaceAttrib(EGLDisplay dpy, EGLSurface surface,
EGLint attribute, EGLint value);
EGLAPI EGLBoolean EGLAPIENTRY eglBindTexImage(EGLDisplay dpy, EGLSurface surface, EGLint buffer);
EGLAPI EGLBoolean EGLAPIENTRY eglReleaseTexImage(EGLDisplay dpy, EGLSurface surface, EGLint buffer);
EGLAPI EGLBoolean EGLAPIENTRY eglSwapInterval(EGLDisplay dpy, EGLint interval);
EGLAPI EGLContext EGLAPIENTRY eglCreateContext(EGLDisplay dpy, EGLConfig config,
EGLContext share_context,
const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroyContext(EGLDisplay dpy, EGLContext ctx);
EGLAPI EGLBoolean EGLAPIENTRY eglMakeCurrent(EGLDisplay dpy, EGLSurface draw,
EGLSurface read, EGLContext ctx);
EGLAPI EGLContext EGLAPIENTRY eglGetCurrentContext(void);
EGLAPI EGLSurface EGLAPIENTRY eglGetCurrentSurface(EGLint readdraw);
EGLAPI EGLDisplay EGLAPIENTRY eglGetCurrentDisplay(void);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryContext(EGLDisplay dpy, EGLContext ctx,
EGLint attribute, EGLint *value);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitGL(void);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitNative(EGLint engine);
EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffers(EGLDisplay dpy, EGLSurface surface);
EGLAPI EGLBoolean EGLAPIENTRY eglCopyBuffers(EGLDisplay dpy, EGLSurface surface,
EGLNativePixmapType target);
/* This is a generic function pointer type, whose name indicates it must
* be cast to the proper type *and calling convention* before use.
*/
typedef void *EGLContext;
typedef void (*__eglMustCastToProperFunctionPointerType)(void);
#define EGL_ALPHA_SIZE 0x3021
#define EGL_BAD_ACCESS 0x3002
#define EGL_BAD_ALLOC 0x3003
#define EGL_BAD_ATTRIBUTE 0x3004
#define EGL_BAD_CONFIG 0x3005
#define EGL_BAD_CONTEXT 0x3006
#define EGL_BAD_CURRENT_SURFACE 0x3007
#define EGL_BAD_DISPLAY 0x3008
#define EGL_BAD_MATCH 0x3009
#define EGL_BAD_NATIVE_PIXMAP 0x300A
#define EGL_BAD_NATIVE_WINDOW 0x300B
#define EGL_BAD_PARAMETER 0x300C
#define EGL_BAD_SURFACE 0x300D
#define EGL_BLUE_SIZE 0x3022
#define EGL_BUFFER_SIZE 0x3020
#define EGL_CONFIG_CAVEAT 0x3027
#define EGL_CONFIG_ID 0x3028
#define EGL_CORE_NATIVE_ENGINE 0x305B
#define EGL_DEPTH_SIZE 0x3025
#define EGL_DONT_CARE ((EGLint)-1)
#define EGL_DRAW 0x3059
#define EGL_EXTENSIONS 0x3055
#define EGL_FALSE 0
#define EGL_GREEN_SIZE 0x3023
#define EGL_HEIGHT 0x3056
#define EGL_LARGEST_PBUFFER 0x3058
#define EGL_LEVEL 0x3029
#define EGL_MAX_PBUFFER_HEIGHT 0x302A
#define EGL_MAX_PBUFFER_PIXELS 0x302B
#define EGL_MAX_PBUFFER_WIDTH 0x302C
#define EGL_NATIVE_RENDERABLE 0x302D
#define EGL_NATIVE_VISUAL_ID 0x302E
#define EGL_NATIVE_VISUAL_TYPE 0x302F
#define EGL_NONE 0x3038
#define EGL_NON_CONFORMANT_CONFIG 0x3051
#define EGL_NOT_INITIALIZED 0x3001
#define EGL_NO_CONTEXT ((EGLContext)0)
#define EGL_NO_DISPLAY ((EGLDisplay)0)
#define EGL_NO_SURFACE ((EGLSurface)0)
#define EGL_PBUFFER_BIT 0x0001
#define EGL_PIXMAP_BIT 0x0002
#define EGL_READ 0x305A
#define EGL_RED_SIZE 0x3024
#define EGL_SAMPLES 0x3031
#define EGL_SAMPLE_BUFFERS 0x3032
#define EGL_SLOW_CONFIG 0x3050
#define EGL_STENCIL_SIZE 0x3026
#define EGL_SUCCESS 0x3000
#define EGL_SURFACE_TYPE 0x3033
#define EGL_TRANSPARENT_BLUE_VALUE 0x3035
#define EGL_TRANSPARENT_GREEN_VALUE 0x3036
#define EGL_TRANSPARENT_RED_VALUE 0x3037
#define EGL_TRANSPARENT_RGB 0x3052
#define EGL_TRANSPARENT_TYPE 0x3034
#define EGL_TRUE 1
#define EGL_VENDOR 0x3053
#define EGL_VERSION 0x3054
#define EGL_WIDTH 0x3057
#define EGL_WINDOW_BIT 0x0004
EGLAPI EGLBoolean EGLAPIENTRY eglChooseConfig (EGLDisplay dpy, const EGLint *attrib_list, EGLConfig *configs, EGLint config_size, EGLint *num_config);
EGLAPI EGLBoolean EGLAPIENTRY eglCopyBuffers (EGLDisplay dpy, EGLSurface surface, EGLNativePixmapType target);
EGLAPI EGLContext EGLAPIENTRY eglCreateContext (EGLDisplay dpy, EGLConfig config, EGLContext share_context, const EGLint *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePbufferSurface (EGLDisplay dpy, EGLConfig config, const EGLint *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePixmapSurface (EGLDisplay dpy, EGLConfig config, EGLNativePixmapType pixmap, const EGLint *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreateWindowSurface (EGLDisplay dpy, EGLConfig config, EGLNativeWindowType win, const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroyContext (EGLDisplay dpy, EGLContext ctx);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroySurface (EGLDisplay dpy, EGLSurface surface);
EGLAPI EGLBoolean EGLAPIENTRY eglGetConfigAttrib (EGLDisplay dpy, EGLConfig config, EGLint attribute, EGLint *value);
EGLAPI EGLBoolean EGLAPIENTRY eglGetConfigs (EGLDisplay dpy, EGLConfig *configs, EGLint config_size, EGLint *num_config);
EGLAPI EGLDisplay EGLAPIENTRY eglGetCurrentDisplay (void);
EGLAPI EGLSurface EGLAPIENTRY eglGetCurrentSurface (EGLint readdraw);
EGLAPI EGLDisplay EGLAPIENTRY eglGetDisplay (EGLNativeDisplayType display_id);
EGLAPI EGLint EGLAPIENTRY eglGetError (void);
EGLAPI __eglMustCastToProperFunctionPointerType EGLAPIENTRY eglGetProcAddress (const char *procname);
EGLAPI EGLBoolean EGLAPIENTRY eglInitialize (EGLDisplay dpy, EGLint *major, EGLint *minor);
EGLAPI EGLBoolean EGLAPIENTRY eglMakeCurrent (EGLDisplay dpy, EGLSurface draw, EGLSurface read, EGLContext ctx);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryContext (EGLDisplay dpy, EGLContext ctx, EGLint attribute, EGLint *value);
EGLAPI const char *EGLAPIENTRY eglQueryString (EGLDisplay dpy, EGLint name);
EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurface (EGLDisplay dpy, EGLSurface surface, EGLint attribute, EGLint *value);
EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffers (EGLDisplay dpy, EGLSurface surface);
EGLAPI EGLBoolean EGLAPIENTRY eglTerminate (EGLDisplay dpy);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitGL (void);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitNative (EGLint engine);
#endif /* EGL_VERSION_1_0 */
/* Now, define eglGetProcAddress using the generic function ptr. type */
EGLAPI __eglMustCastToProperFunctionPointerType EGLAPIENTRY
eglGetProcAddress(const char *procname);
#ifndef EGL_VERSION_1_1
#define EGL_VERSION_1_1 1
#define EGL_BACK_BUFFER 0x3084
#define EGL_BIND_TO_TEXTURE_RGB 0x3039
#define EGL_BIND_TO_TEXTURE_RGBA 0x303A
#define EGL_CONTEXT_LOST 0x300E
#define EGL_MIN_SWAP_INTERVAL 0x303B
#define EGL_MAX_SWAP_INTERVAL 0x303C
#define EGL_MIPMAP_TEXTURE 0x3082
#define EGL_MIPMAP_LEVEL 0x3083
#define EGL_NO_TEXTURE 0x305C
#define EGL_TEXTURE_2D 0x305F
#define EGL_TEXTURE_FORMAT 0x3080
#define EGL_TEXTURE_RGB 0x305D
#define EGL_TEXTURE_RGBA 0x305E
#define EGL_TEXTURE_TARGET 0x3081
EGLAPI EGLBoolean EGLAPIENTRY eglBindTexImage (EGLDisplay dpy, EGLSurface surface, EGLint buffer);
EGLAPI EGLBoolean EGLAPIENTRY eglReleaseTexImage (EGLDisplay dpy, EGLSurface surface, EGLint buffer);
EGLAPI EGLBoolean EGLAPIENTRY eglSurfaceAttrib (EGLDisplay dpy, EGLSurface surface, EGLint attribute, EGLint value);
EGLAPI EGLBoolean EGLAPIENTRY eglSwapInterval (EGLDisplay dpy, EGLint interval);
#endif /* EGL_VERSION_1_1 */
#ifndef EGL_VERSION_1_2
#define EGL_VERSION_1_2 1
typedef unsigned int EGLenum;
typedef void *EGLClientBuffer;
#define EGL_ALPHA_FORMAT 0x3088
#define EGL_ALPHA_FORMAT_NONPRE 0x308B
#define EGL_ALPHA_FORMAT_PRE 0x308C
#define EGL_ALPHA_MASK_SIZE 0x303E
#define EGL_BUFFER_PRESERVED 0x3094
#define EGL_BUFFER_DESTROYED 0x3095
#define EGL_CLIENT_APIS 0x308D
#define EGL_COLORSPACE 0x3087
#define EGL_COLORSPACE_sRGB 0x3089
#define EGL_COLORSPACE_LINEAR 0x308A
#define EGL_COLOR_BUFFER_TYPE 0x303F
#define EGL_CONTEXT_CLIENT_TYPE 0x3097
#define EGL_DISPLAY_SCALING 10000
#define EGL_HORIZONTAL_RESOLUTION 0x3090
#define EGL_LUMINANCE_BUFFER 0x308F
#define EGL_LUMINANCE_SIZE 0x303D
#define EGL_OPENGL_ES_BIT 0x0001
#define EGL_OPENVG_BIT 0x0002
#define EGL_OPENGL_ES_API 0x30A0
#define EGL_OPENVG_API 0x30A1
#define EGL_OPENVG_IMAGE 0x3096
#define EGL_PIXEL_ASPECT_RATIO 0x3092
#define EGL_RENDERABLE_TYPE 0x3040
#define EGL_RENDER_BUFFER 0x3086
#define EGL_RGB_BUFFER 0x308E
#define EGL_SINGLE_BUFFER 0x3085
#define EGL_SWAP_BEHAVIOR 0x3093
#define EGL_UNKNOWN ((EGLint)-1)
#define EGL_VERTICAL_RESOLUTION 0x3091
EGLAPI EGLBoolean EGLAPIENTRY eglBindAPI (EGLenum api);
EGLAPI EGLenum EGLAPIENTRY eglQueryAPI (void);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePbufferFromClientBuffer (EGLDisplay dpy, EGLenum buftype, EGLClientBuffer buffer, EGLConfig config, const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglReleaseThread (void);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitClient (void);
#endif /* EGL_VERSION_1_2 */
#ifndef EGL_VERSION_1_3
#define EGL_VERSION_1_3 1
#define EGL_CONFORMANT 0x3042
#define EGL_CONTEXT_CLIENT_VERSION 0x3098
#define EGL_MATCH_NATIVE_PIXMAP 0x3041
#define EGL_OPENGL_ES2_BIT 0x0004
#define EGL_VG_ALPHA_FORMAT 0x3088
#define EGL_VG_ALPHA_FORMAT_NONPRE 0x308B
#define EGL_VG_ALPHA_FORMAT_PRE 0x308C
#define EGL_VG_ALPHA_FORMAT_PRE_BIT 0x0040
#define EGL_VG_COLORSPACE 0x3087
#define EGL_VG_COLORSPACE_sRGB 0x3089
#define EGL_VG_COLORSPACE_LINEAR 0x308A
#define EGL_VG_COLORSPACE_LINEAR_BIT 0x0020
#endif /* EGL_VERSION_1_3 */
#ifndef EGL_VERSION_1_4
#define EGL_VERSION_1_4 1
#define EGL_DEFAULT_DISPLAY ((EGLNativeDisplayType)0)
#define EGL_MULTISAMPLE_RESOLVE_BOX_BIT 0x0200
#define EGL_MULTISAMPLE_RESOLVE 0x3099
#define EGL_MULTISAMPLE_RESOLVE_DEFAULT 0x309A
#define EGL_MULTISAMPLE_RESOLVE_BOX 0x309B
#define EGL_OPENGL_API 0x30A2
#define EGL_OPENGL_BIT 0x0008
#define EGL_SWAP_BEHAVIOR_PRESERVED_BIT 0x0400
EGLAPI EGLContext EGLAPIENTRY eglGetCurrentContext (void);
#endif /* EGL_VERSION_1_4 */
#ifndef EGL_VERSION_1_5
#define EGL_VERSION_1_5 1
typedef void *EGLSync;
typedef intptr_t EGLAttrib;
typedef khronos_utime_nanoseconds_t EGLTime;
typedef void *EGLImage;
#define EGL_CONTEXT_MAJOR_VERSION 0x3098
#define EGL_CONTEXT_MINOR_VERSION 0x30FB
#define EGL_CONTEXT_OPENGL_PROFILE_MASK 0x30FD
#define EGL_CONTEXT_OPENGL_RESET_NOTIFICATION_STRATEGY 0x31BD
#define EGL_NO_RESET_NOTIFICATION 0x31BE
#define EGL_LOSE_CONTEXT_ON_RESET 0x31BF
#define EGL_CONTEXT_OPENGL_CORE_PROFILE_BIT 0x00000001
#define EGL_CONTEXT_OPENGL_COMPATIBILITY_PROFILE_BIT 0x00000002
#define EGL_CONTEXT_OPENGL_DEBUG 0x31B0
#define EGL_CONTEXT_OPENGL_FORWARD_COMPATIBLE 0x31B1
#define EGL_CONTEXT_OPENGL_ROBUST_ACCESS 0x31B2
#define EGL_OPENGL_ES3_BIT 0x00000040
#define EGL_CL_EVENT_HANDLE 0x309C
#define EGL_SYNC_CL_EVENT 0x30FE
#define EGL_SYNC_CL_EVENT_COMPLETE 0x30FF
#define EGL_SYNC_PRIOR_COMMANDS_COMPLETE 0x30F0
#define EGL_SYNC_TYPE 0x30F7
#define EGL_SYNC_STATUS 0x30F1
#define EGL_SYNC_CONDITION 0x30F8
#define EGL_SIGNALED 0x30F2
#define EGL_UNSIGNALED 0x30F3
#define EGL_SYNC_FLUSH_COMMANDS_BIT 0x0001
#define EGL_FOREVER 0xFFFFFFFFFFFFFFFFull
#define EGL_TIMEOUT_EXPIRED 0x30F5
#define EGL_CONDITION_SATISFIED 0x30F6
#define EGL_NO_SYNC ((EGLSync)0)
#define EGL_SYNC_FENCE 0x30F9
#define EGL_GL_COLORSPACE 0x309D
#define EGL_GL_COLORSPACE_SRGB 0x3089
#define EGL_GL_COLORSPACE_LINEAR 0x308A
#define EGL_GL_RENDERBUFFER 0x30B9
#define EGL_GL_TEXTURE_2D 0x30B1
#define EGL_GL_TEXTURE_LEVEL 0x30BC
#define EGL_GL_TEXTURE_3D 0x30B2
#define EGL_GL_TEXTURE_ZOFFSET 0x30BD
#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_X 0x30B3
#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_X 0x30B4
#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Y 0x30B5
#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Y 0x30B6
#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Z 0x30B7
#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Z 0x30B8
#define EGL_IMAGE_PRESERVED 0x30D2
#define EGL_NO_IMAGE ((EGLImage)0)
EGLAPI EGLSync EGLAPIENTRY eglCreateSync (EGLDisplay dpy, EGLenum type, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroySync (EGLDisplay dpy, EGLSync sync);
EGLAPI EGLint EGLAPIENTRY eglClientWaitSync (EGLDisplay dpy, EGLSync sync, EGLint flags, EGLTime timeout);
EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttrib (EGLDisplay dpy, EGLSync sync, EGLint attribute, EGLAttrib *value);
EGLAPI EGLImage EGLAPIENTRY eglCreateImage (EGLDisplay dpy, EGLContext ctx, EGLenum target, EGLClientBuffer buffer, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroyImage (EGLDisplay dpy, EGLImage image);
EGLAPI EGLDisplay EGLAPIENTRY eglGetPlatformDisplay (EGLenum platform, void *native_display, const EGLAttrib *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePlatformWindowSurface (EGLDisplay dpy, EGLConfig config, void *native_window, const EGLAttrib *attrib_list);
EGLAPI EGLSurface EGLAPIENTRY eglCreatePlatformPixmapSurface (EGLDisplay dpy, EGLConfig config, void *native_pixmap, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglWaitSync (EGLDisplay dpy, EGLSync sync, EGLint flags);
#endif /* EGL_VERSION_1_5 */
#ifdef __cplusplus
}
#endif
#endif /* __egl_h_ */
#endif

View File

@@ -6,7 +6,7 @@ extern "C" {
#endif
/*
** Copyright (c) 2013 The Khronos Group Inc.
** Copyright (c) 2013-2014 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -33,12 +33,12 @@ extern "C" {
** used to make the header, and the header can be found at
** http://www.opengl.org/registry/
**
** Khronos $Revision: 24567 $ on $Date: 2013-12-18 09:50:17 -0800 (Wed, 18 Dec 2013) $
** Khronos $Revision$ on $Date$
*/
#include <EGL/eglplatform.h>
#define EGL_EGLEXT_VERSION 20131218
#define EGL_EGLEXT_VERSION 20150508
/* Generated C header for:
* API: egl
@@ -94,12 +94,28 @@ EGLAPI EGLSyncKHR EGLAPIENTRY eglCreateSync64KHR (EGLDisplay dpy, EGLenum type,
#define EGL_OPENGL_ES3_BIT_KHR 0x00000040
#endif /* EGL_KHR_create_context */
#ifndef EGL_KHR_create_context_no_error
#define EGL_KHR_create_context_no_error 1
#define EGL_CONTEXT_OPENGL_NO_ERROR_KHR 0x31B3
#endif /* EGL_KHR_create_context_no_error */
#ifndef EGL_KHR_fence_sync
#define EGL_KHR_fence_sync 1
typedef khronos_utime_nanoseconds_t EGLTimeKHR;
#ifdef KHRONOS_SUPPORT_INT64
#define EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR 0x30F0
#define EGL_SYNC_CONDITION_KHR 0x30F8
#define EGL_SYNC_FENCE_KHR 0x30F9
typedef EGLSyncKHR (EGLAPIENTRYP PFNEGLCREATESYNCKHRPROC) (EGLDisplay dpy, EGLenum type, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync);
typedef EGLint (EGLAPIENTRYP PFNEGLCLIENTWAITSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLint flags, EGLTimeKHR timeout);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETSYNCATTRIBKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLint attribute, EGLint *value);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLSyncKHR EGLAPIENTRY eglCreateSyncKHR (EGLDisplay dpy, EGLenum type, const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroySyncKHR (EGLDisplay dpy, EGLSyncKHR sync);
EGLAPI EGLint EGLAPIENTRY eglClientWaitSyncKHR (EGLDisplay dpy, EGLSyncKHR sync, EGLint flags, EGLTimeKHR timeout);
EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttribKHR (EGLDisplay dpy, EGLSyncKHR sync, EGLint attribute, EGLint *value);
#endif
#endif /* KHRONOS_SUPPORT_INT64 */
#endif /* EGL_KHR_fence_sync */
@@ -207,9 +223,38 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurface64KHR (EGLDisplay dpy, EGLSurface s
#endif
#endif /* EGL_KHR_lock_surface3 */
#ifndef EGL_KHR_partial_update
#define EGL_KHR_partial_update 1
#define EGL_BUFFER_AGE_KHR 0x313D
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSETDAMAGEREGIONKHRPROC) (EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglSetDamageRegionKHR (EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
#endif
#endif /* EGL_KHR_partial_update */
#ifndef EGL_KHR_platform_android
#define EGL_KHR_platform_android 1
#define EGL_PLATFORM_ANDROID_KHR 0x3141
#endif /* EGL_KHR_platform_android */
#ifndef EGL_KHR_platform_gbm
#define EGL_KHR_platform_gbm 1
#define EGL_PLATFORM_GBM_KHR 0x31D7
#endif /* EGL_KHR_platform_gbm */
#ifndef EGL_KHR_platform_wayland
#define EGL_KHR_platform_wayland 1
#define EGL_PLATFORM_WAYLAND_KHR 0x31D8
#endif /* EGL_KHR_platform_wayland */
#ifndef EGL_KHR_platform_x11
#define EGL_KHR_platform_x11 1
#define EGL_PLATFORM_X11_KHR 0x31D5
#define EGL_PLATFORM_X11_SCREEN_KHR 0x31D6
#endif /* EGL_KHR_platform_x11 */
#ifndef EGL_KHR_reusable_sync
#define EGL_KHR_reusable_sync 1
typedef khronos_utime_nanoseconds_t EGLTimeKHR;
#ifdef KHRONOS_SUPPORT_INT64
#define EGL_SYNC_STATUS_KHR 0x30F1
#define EGL_SIGNALED_KHR 0x30F2
@@ -221,17 +266,9 @@ typedef khronos_utime_nanoseconds_t EGLTimeKHR;
#define EGL_SYNC_FLUSH_COMMANDS_BIT_KHR 0x0001
#define EGL_FOREVER_KHR 0xFFFFFFFFFFFFFFFFull
#define EGL_NO_SYNC_KHR ((EGLSyncKHR)0)
typedef EGLSyncKHR (EGLAPIENTRYP PFNEGLCREATESYNCKHRPROC) (EGLDisplay dpy, EGLenum type, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync);
typedef EGLint (EGLAPIENTRYP PFNEGLCLIENTWAITSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLint flags, EGLTimeKHR timeout);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSIGNALSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLenum mode);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETSYNCATTRIBKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLint attribute, EGLint *value);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLSyncKHR EGLAPIENTRY eglCreateSyncKHR (EGLDisplay dpy, EGLenum type, const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroySyncKHR (EGLDisplay dpy, EGLSyncKHR sync);
EGLAPI EGLint EGLAPIENTRY eglClientWaitSyncKHR (EGLDisplay dpy, EGLSyncKHR sync, EGLint flags, EGLTimeKHR timeout);
EGLAPI EGLBoolean EGLAPIENTRY eglSignalSyncKHR (EGLDisplay dpy, EGLSyncKHR sync, EGLenum mode);
EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttribKHR (EGLDisplay dpy, EGLSyncKHR sync, EGLint attribute, EGLint *value);
#endif
#endif /* KHRONOS_SUPPORT_INT64 */
#endif /* EGL_KHR_reusable_sync */
@@ -333,6 +370,14 @@ EGLAPI EGLSurface EGLAPIENTRY eglCreateStreamProducerSurfaceKHR (EGLDisplay dpy,
#define EGL_KHR_surfaceless_context 1
#endif /* EGL_KHR_surfaceless_context */
#ifndef EGL_KHR_swap_buffers_with_damage
#define EGL_KHR_swap_buffers_with_damage 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSWITHDAMAGEKHRPROC) (EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersWithDamageKHR (EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
#endif
#endif /* EGL_KHR_swap_buffers_with_damage */
#ifndef EGL_KHR_vg_parent_image
#define EGL_KHR_vg_parent_image 1
#define EGL_VG_PARENT_IMAGE_KHR 0x30BA
@@ -389,6 +434,12 @@ EGLAPI EGLint EGLAPIENTRY eglDupNativeFenceFDANDROID (EGLDisplay dpy, EGLSyncKHR
#define EGL_D3D_TEXTURE_2D_SHARE_HANDLE_ANGLE 0x3200
#endif /* EGL_ANGLE_d3d_share_handle_client_buffer */
#ifndef EGL_ANGLE_device_d3d
#define EGL_ANGLE_device_d3d 1
#define EGL_D3D9_DEVICE_ANGLE 0x33A0
#define EGL_D3D11_DEVICE_ANGLE 0x33A1
#endif /* EGL_ANGLE_device_d3d */
#ifndef EGL_ANGLE_query_surface_pointer
#define EGL_ANGLE_query_surface_pointer 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSURFACEPOINTERANGLEPROC) (EGLDisplay dpy, EGLSurface surface, EGLint attribute, void **value);
@@ -401,6 +452,11 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
#define EGL_ANGLE_surface_d3d_texture_2d_share_handle 1
#endif /* EGL_ANGLE_surface_d3d_texture_2d_share_handle */
#ifndef EGL_ANGLE_window_fixed_size
#define EGL_ANGLE_window_fixed_size 1
#define EGL_FIXED_SIZE_ANGLE 0x3201
#endif /* EGL_ANGLE_window_fixed_size */
#ifndef EGL_ARM_pixmap_multisample_discard
#define EGL_ARM_pixmap_multisample_discard 1
#define EGL_DISCARD_SAMPLES_ARM 0x3286
@@ -423,6 +479,42 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
#define EGL_LOSE_CONTEXT_ON_RESET_EXT 0x31BF
#endif /* EGL_EXT_create_context_robustness */
#ifndef EGL_EXT_device_base
#define EGL_EXT_device_base 1
typedef void *EGLDeviceEXT;
#define EGL_NO_DEVICE_EXT ((EGLDeviceEXT)(0))
#define EGL_BAD_DEVICE_EXT 0x322B
#define EGL_DEVICE_EXT 0x322C
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDEVICEATTRIBEXTPROC) (EGLDeviceEXT device, EGLint attribute, EGLAttrib *value);
typedef const char *(EGLAPIENTRYP PFNEGLQUERYDEVICESTRINGEXTPROC) (EGLDeviceEXT device, EGLint name);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDEVICESEXTPROC) (EGLint max_devices, EGLDeviceEXT *devices, EGLint *num_devices);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDISPLAYATTRIBEXTPROC) (EGLDisplay dpy, EGLint attribute, EGLAttrib *value);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglQueryDeviceAttribEXT (EGLDeviceEXT device, EGLint attribute, EGLAttrib *value);
EGLAPI const char *EGLAPIENTRY eglQueryDeviceStringEXT (EGLDeviceEXT device, EGLint name);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryDevicesEXT (EGLint max_devices, EGLDeviceEXT *devices, EGLint *num_devices);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryDisplayAttribEXT (EGLDisplay dpy, EGLint attribute, EGLAttrib *value);
#endif
#endif /* EGL_EXT_device_base */
#ifndef EGL_EXT_device_drm
#define EGL_EXT_device_drm 1
#define EGL_DRM_DEVICE_FILE_EXT 0x3233
#endif /* EGL_EXT_device_drm */
#ifndef EGL_EXT_device_enumeration
#define EGL_EXT_device_enumeration 1
#endif /* EGL_EXT_device_enumeration */
#ifndef EGL_EXT_device_openwf
#define EGL_EXT_device_openwf 1
#define EGL_OPENWF_DEVICE_ID_EXT 0x3237
#endif /* EGL_EXT_device_openwf */
#ifndef EGL_EXT_device_query
#define EGL_EXT_device_query 1
#endif /* EGL_EXT_device_query */
#ifndef EGL_EXT_image_dma_buf_import
#define EGL_EXT_image_dma_buf_import 1
#define EGL_LINUX_DMA_BUF_EXT 0x3270
@@ -454,6 +546,48 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
#define EGL_MULTIVIEW_VIEW_COUNT_EXT 0x3134
#endif /* EGL_EXT_multiview_window */
#ifndef EGL_EXT_output_base
#define EGL_EXT_output_base 1
typedef void *EGLOutputLayerEXT;
typedef void *EGLOutputPortEXT;
#define EGL_NO_OUTPUT_LAYER_EXT ((EGLOutputLayerEXT)0)
#define EGL_NO_OUTPUT_PORT_EXT ((EGLOutputPortEXT)0)
#define EGL_BAD_OUTPUT_LAYER_EXT 0x322D
#define EGL_BAD_OUTPUT_PORT_EXT 0x322E
#define EGL_SWAP_INTERVAL_EXT 0x322F
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETOUTPUTLAYERSEXTPROC) (EGLDisplay dpy, const EGLAttrib *attrib_list, EGLOutputLayerEXT *layers, EGLint max_layers, EGLint *num_layers);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETOUTPUTPORTSEXTPROC) (EGLDisplay dpy, const EGLAttrib *attrib_list, EGLOutputPortEXT *ports, EGLint max_ports, EGLint *num_ports);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLOUTPUTLAYERATTRIBEXTPROC) (EGLDisplay dpy, EGLOutputLayerEXT layer, EGLint attribute, EGLAttrib value);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYOUTPUTLAYERATTRIBEXTPROC) (EGLDisplay dpy, EGLOutputLayerEXT layer, EGLint attribute, EGLAttrib *value);
typedef const char *(EGLAPIENTRYP PFNEGLQUERYOUTPUTLAYERSTRINGEXTPROC) (EGLDisplay dpy, EGLOutputLayerEXT layer, EGLint name);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLOUTPUTPORTATTRIBEXTPROC) (EGLDisplay dpy, EGLOutputPortEXT port, EGLint attribute, EGLAttrib value);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYOUTPUTPORTATTRIBEXTPROC) (EGLDisplay dpy, EGLOutputPortEXT port, EGLint attribute, EGLAttrib *value);
typedef const char *(EGLAPIENTRYP PFNEGLQUERYOUTPUTPORTSTRINGEXTPROC) (EGLDisplay dpy, EGLOutputPortEXT port, EGLint name);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglGetOutputLayersEXT (EGLDisplay dpy, const EGLAttrib *attrib_list, EGLOutputLayerEXT *layers, EGLint max_layers, EGLint *num_layers);
EGLAPI EGLBoolean EGLAPIENTRY eglGetOutputPortsEXT (EGLDisplay dpy, const EGLAttrib *attrib_list, EGLOutputPortEXT *ports, EGLint max_ports, EGLint *num_ports);
EGLAPI EGLBoolean EGLAPIENTRY eglOutputLayerAttribEXT (EGLDisplay dpy, EGLOutputLayerEXT layer, EGLint attribute, EGLAttrib value);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryOutputLayerAttribEXT (EGLDisplay dpy, EGLOutputLayerEXT layer, EGLint attribute, EGLAttrib *value);
EGLAPI const char *EGLAPIENTRY eglQueryOutputLayerStringEXT (EGLDisplay dpy, EGLOutputLayerEXT layer, EGLint name);
EGLAPI EGLBoolean EGLAPIENTRY eglOutputPortAttribEXT (EGLDisplay dpy, EGLOutputPortEXT port, EGLint attribute, EGLAttrib value);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryOutputPortAttribEXT (EGLDisplay dpy, EGLOutputPortEXT port, EGLint attribute, EGLAttrib *value);
EGLAPI const char *EGLAPIENTRY eglQueryOutputPortStringEXT (EGLDisplay dpy, EGLOutputPortEXT port, EGLint name);
#endif
#endif /* EGL_EXT_output_base */
#ifndef EGL_EXT_output_drm
#define EGL_EXT_output_drm 1
#define EGL_DRM_CRTC_EXT 0x3234
#define EGL_DRM_PLANE_EXT 0x3235
#define EGL_DRM_CONNECTOR_EXT 0x3236
#endif /* EGL_EXT_output_drm */
#ifndef EGL_EXT_output_openwf
#define EGL_EXT_output_openwf 1
#define EGL_OPENWF_PIPELINE_ID_EXT 0x3238
#define EGL_OPENWF_PORT_ID_EXT 0x3239
#endif /* EGL_EXT_output_openwf */
#ifndef EGL_EXT_platform_base
#define EGL_EXT_platform_base 1
typedef EGLDisplay (EGLAPIENTRYP PFNEGLGETPLATFORMDISPLAYEXTPROC) (EGLenum platform, void *native_display, const EGLint *attrib_list);
@@ -466,6 +600,11 @@ EGLAPI EGLSurface EGLAPIENTRY eglCreatePlatformPixmapSurfaceEXT (EGLDisplay dpy,
#endif
#endif /* EGL_EXT_platform_base */
#ifndef EGL_EXT_platform_device
#define EGL_EXT_platform_device 1
#define EGL_PLATFORM_DEVICE_EXT 0x313F
#endif /* EGL_EXT_platform_device */
#ifndef EGL_EXT_platform_wayland
#define EGL_EXT_platform_wayland 1
#define EGL_PLATFORM_WAYLAND_EXT 0x31D8
@@ -477,6 +616,19 @@ EGLAPI EGLSurface EGLAPIENTRY eglCreatePlatformPixmapSurfaceEXT (EGLDisplay dpy,
#define EGL_PLATFORM_X11_SCREEN_EXT 0x31D6
#endif /* EGL_EXT_platform_x11 */
#ifndef EGL_EXT_protected_surface
#define EGL_EXT_protected_surface 1
#define EGL_PROTECTED_CONTENT_EXT 0x32C0
#endif /* EGL_EXT_protected_surface */
#ifndef EGL_EXT_stream_consumer_egloutput
#define EGL_EXT_stream_consumer_egloutput 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMEROUTPUTEXTPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLOutputLayerEXT layer);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerOutputEXT (EGLDisplay dpy, EGLStreamKHR stream, EGLOutputLayerEXT layer);
#endif
#endif /* EGL_EXT_stream_consumer_egloutput */
#ifndef EGL_EXT_swap_buffers_with_damage
#define EGL_EXT_swap_buffers_with_damage 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSWITHDAMAGEEXTPROC) (EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
@@ -485,6 +637,35 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersWithDamageEXT (EGLDisplay dpy, EGLSu
#endif
#endif /* EGL_EXT_swap_buffers_with_damage */
#ifndef EGL_EXT_yuv_surface
#define EGL_EXT_yuv_surface 1
#define EGL_YUV_ORDER_EXT 0x3301
#define EGL_YUV_NUMBER_OF_PLANES_EXT 0x3311
#define EGL_YUV_SUBSAMPLE_EXT 0x3312
#define EGL_YUV_DEPTH_RANGE_EXT 0x3317
#define EGL_YUV_CSC_STANDARD_EXT 0x330A
#define EGL_YUV_PLANE_BPP_EXT 0x331A
#define EGL_YUV_BUFFER_EXT 0x3300
#define EGL_YUV_ORDER_YUV_EXT 0x3302
#define EGL_YUV_ORDER_YVU_EXT 0x3303
#define EGL_YUV_ORDER_YUYV_EXT 0x3304
#define EGL_YUV_ORDER_UYVY_EXT 0x3305
#define EGL_YUV_ORDER_YVYU_EXT 0x3306
#define EGL_YUV_ORDER_VYUY_EXT 0x3307
#define EGL_YUV_ORDER_AYUV_EXT 0x3308
#define EGL_YUV_SUBSAMPLE_4_2_0_EXT 0x3313
#define EGL_YUV_SUBSAMPLE_4_2_2_EXT 0x3314
#define EGL_YUV_SUBSAMPLE_4_4_4_EXT 0x3315
#define EGL_YUV_DEPTH_RANGE_LIMITED_EXT 0x3318
#define EGL_YUV_DEPTH_RANGE_FULL_EXT 0x3319
#define EGL_YUV_CSC_STANDARD_601_EXT 0x330B
#define EGL_YUV_CSC_STANDARD_709_EXT 0x330C
#define EGL_YUV_CSC_STANDARD_2020_EXT 0x330D
#define EGL_YUV_PLANE_BPP_0_EXT 0x331B
#define EGL_YUV_PLANE_BPP_8_EXT 0x331C
#define EGL_YUV_PLANE_BPP_10_EXT 0x331D
#endif /* EGL_EXT_yuv_surface */
#ifndef EGL_HI_clientpixmap
#define EGL_HI_clientpixmap 1
struct EGLClientPixmapHI {
@@ -533,11 +714,42 @@ EGLAPI EGLBoolean EGLAPIENTRY eglExportDRMImageMESA (EGLDisplay dpy, EGLImageKHR
#endif
#endif /* EGL_MESA_drm_image */
#ifndef EGL_MESA_image_dma_buf_export
#define EGL_MESA_image_dma_buf_export 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLEXPORTDMABUFIMAGEQUERYMESAPROC) (EGLDisplay dpy, EGLImageKHR image, int *fourcc, int *num_planes, EGLuint64KHR *modifiers);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLEXPORTDMABUFIMAGEMESAPROC) (EGLDisplay dpy, EGLImageKHR image, int *fds, EGLint *strides, EGLint *offsets);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglExportDMABUFImageQueryMESA (EGLDisplay dpy, EGLImageKHR image, int *fourcc, int *num_planes, EGLuint64KHR *modifiers);
EGLAPI EGLBoolean EGLAPIENTRY eglExportDMABUFImageMESA (EGLDisplay dpy, EGLImageKHR image, int *fds, EGLint *strides, EGLint *offsets);
#endif
#endif /* EGL_MESA_image_dma_buf_export */
#ifndef EGL_MESA_platform_gbm
#define EGL_MESA_platform_gbm 1
#define EGL_PLATFORM_GBM_MESA 0x31D7
#endif /* EGL_MESA_platform_gbm */
#ifndef EGL_NOK_swap_region
#define EGL_NOK_swap_region 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSREGIONNOKPROC) (EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint *rects);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersRegionNOK (EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint *rects);
#endif
#endif /* EGL_NOK_swap_region */
#ifndef EGL_NOK_swap_region2
#define EGL_NOK_swap_region2 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSREGION2NOKPROC) (EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint *rects);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersRegion2NOK (EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint *rects);
#endif
#endif /* EGL_NOK_swap_region2 */
#ifndef EGL_NOK_texture_from_pixmap
#define EGL_NOK_texture_from_pixmap 1
#define EGL_Y_INVERTED_NOK 0x307F
#endif /* EGL_NOK_texture_from_pixmap */
#ifndef EGL_NV_3dvision_surface
#define EGL_NV_3dvision_surface 1
#define EGL_AUTO_STEREO_NV 0x3136
@@ -556,6 +768,13 @@ EGLAPI EGLBoolean EGLAPIENTRY eglExportDRMImageMESA (EGLDisplay dpy, EGLImageKHR
#define EGL_COVERAGE_SAMPLE_RESOLVE_NONE_NV 0x3133
#endif /* EGL_NV_coverage_sample_resolve */
#ifndef EGL_NV_cuda_event
#define EGL_NV_cuda_event 1
#define EGL_CUDA_EVENT_HANDLE_NV 0x323B
#define EGL_SYNC_CUDA_EVENT_NV 0x323C
#define EGL_SYNC_CUDA_EVENT_COMPLETE_NV 0x323D
#endif /* EGL_NV_cuda_event */
#ifndef EGL_NV_depth_nonlinear
#define EGL_NV_depth_nonlinear 1
#define EGL_DEPTH_ENCODING_NV 0x30E2
@@ -563,6 +782,11 @@ EGLAPI EGLBoolean EGLAPIENTRY eglExportDRMImageMESA (EGLDisplay dpy, EGLImageKHR
#define EGL_DEPTH_ENCODING_NONLINEAR_NV 0x30E3
#endif /* EGL_NV_depth_nonlinear */
#ifndef EGL_NV_device_cuda
#define EGL_NV_device_cuda 1
#define EGL_CUDA_DEVICE_NV 0x323A
#endif /* EGL_NV_device_cuda */
#ifndef EGL_NV_native_query
#define EGL_NV_native_query 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYNATIVEDISPLAYNVPROC) (EGLDisplay dpy, EGLNativeDisplayType *display_id);
@@ -645,6 +869,16 @@ EGLAPI EGLuint64NV EGLAPIENTRY eglGetSystemTimeNV (void);
#endif /* KHRONOS_SUPPORT_INT64 */
#endif /* EGL_NV_system_time */
#ifndef EGL_TIZEN_image_native_buffer
#define EGL_TIZEN_image_native_buffer 1
#define EGL_NATIVE_BUFFER_TIZEN 0x32A0
#endif /* EGL_TIZEN_image_native_buffer */
#ifndef EGL_TIZEN_image_native_surface
#define EGL_TIZEN_image_native_surface 1
#define EGL_NATIVE_SURFACE_TIZEN 0x32A1
#endif /* EGL_TIZEN_image_native_surface */
#include <EGL/eglmesaext.h>
#include <EGL/eglextchromium.h>

View File

@@ -34,63 +34,6 @@ extern "C" {
#include <EGL/eglplatform.h>
/* EGL_MESA_screen extension >>> PRELIMINARY <<< */
#ifndef EGL_MESA_screen_surface
#define EGL_MESA_screen_surface 1
#define EGL_BAD_SCREEN_MESA 0x4000
#define EGL_BAD_MODE_MESA 0x4001
#define EGL_SCREEN_COUNT_MESA 0x4002
#define EGL_SCREEN_POSITION_MESA 0x4003
#define EGL_SCREEN_POSITION_GRANULARITY_MESA 0x4004
#define EGL_MODE_ID_MESA 0x4005
#define EGL_REFRESH_RATE_MESA 0x4006
#define EGL_OPTIMAL_MESA 0x4007
#define EGL_INTERLACED_MESA 0x4008
#define EGL_SCREEN_BIT_MESA 0x08
typedef khronos_uint32_t EGLScreenMESA;
typedef khronos_uint32_t EGLModeMESA;
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglChooseModeMESA(EGLDisplay dpy, EGLScreenMESA screen, const EGLint *attrib_list, EGLModeMESA *modes, EGLint modes_size, EGLint *num_modes);
EGLAPI EGLBoolean EGLAPIENTRY eglGetModesMESA(EGLDisplay dpy, EGLScreenMESA screen, EGLModeMESA *modes, EGLint modes_size, EGLint *num_modes);
EGLAPI EGLBoolean EGLAPIENTRY eglGetModeAttribMESA(EGLDisplay dpy, EGLModeMESA mode, EGLint attribute, EGLint *value);
EGLAPI EGLBoolean EGLAPIENTRY eglGetScreensMESA(EGLDisplay dpy, EGLScreenMESA *screens, EGLint max_screens, EGLint *num_screens);
EGLAPI EGLSurface EGLAPIENTRY eglCreateScreenSurfaceMESA(EGLDisplay dpy, EGLConfig config, const EGLint *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglShowScreenSurfaceMESA(EGLDisplay dpy, EGLint screen, EGLSurface surface, EGLModeMESA mode);
EGLAPI EGLBoolean EGLAPIENTRY eglScreenPositionMESA(EGLDisplay dpy, EGLScreenMESA screen, EGLint x, EGLint y);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryScreenMESA(EGLDisplay dpy, EGLScreenMESA screen, EGLint attribute, EGLint *value);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryScreenSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, EGLSurface *surface);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryScreenModeMESA(EGLDisplay dpy, EGLScreenMESA screen, EGLModeMESA *mode);
EGLAPI const char * EGLAPIENTRY eglQueryModeStringMESA(EGLDisplay dpy, EGLModeMESA mode);
#endif /* EGL_EGLEXT_PROTOTYPES */
typedef EGLBoolean (EGLAPIENTRYP PFNEGLCHOOSEMODEMESA) (EGLDisplay dpy, EGLScreenMESA screen, const EGLint *attrib_list, EGLModeMESA *modes, EGLint modes_size, EGLint *num_modes);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETMODESMESA) (EGLDisplay dpy, EGLScreenMESA screen, EGLModeMESA *modes, EGLint modes_size, EGLint *num_modes);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGetModeATTRIBMESA) (EGLDisplay dpy, EGLModeMESA mode, EGLint attribute, EGLint *value);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETSCRREENSMESA) (EGLDisplay dpy, EGLScreenMESA *screens, EGLint max_screens, EGLint *num_screens);
typedef EGLSurface (EGLAPIENTRYP PFNEGLCREATESCREENSURFACEMESA) (EGLDisplay dpy, EGLConfig config, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSHOWSCREENSURFACEMESA) (EGLDisplay dpy, EGLint screen, EGLSurface surface, EGLModeMESA mode);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSCREENPOSIITONMESA) (EGLDisplay dpy, EGLScreenMESA screen, EGLint x, EGLint y);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSCREENMESA) (EGLDisplay dpy, EGLScreenMESA screen, EGLint attribute, EGLint *value);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSCREENSURFACEMESA) (EGLDisplay dpy, EGLScreenMESA screen, EGLSurface *surface);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSCREENMODEMESA) (EGLDisplay dpy, EGLScreenMESA screen, EGLModeMESA *mode);
typedef const char * (EGLAPIENTRYP PFNEGLQUERYMODESTRINGMESA) (EGLDisplay dpy, EGLModeMESA mode);
#endif /* EGL_MESA_screen_surface */
#ifndef EGL_MESA_copy_context
#define EGL_MESA_copy_context 1
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglCopyContextMESA(EGLDisplay dpy, EGLContext source, EGLContext dest, EGLint mask);
#endif /* EGL_EGLEXT_PROTOTYPES */
typedef EGLBoolean (EGLAPIENTRYP PFNEGLCOPYCONTEXTMESA) (EGLDisplay dpy, EGLContext source, EGLContext dest, EGLint mask);
#endif /* EGL_MESA_copy_context */
#ifndef EGL_MESA_drm_display
#define EGL_MESA_drm_display 1
@@ -144,26 +87,8 @@ typedef struct wl_buffer * (EGLAPIENTRYP PFNEGLCREATEWAYLANDBUFFERFROMIMAGEWL) (
#endif
#ifndef EGL_NOK_swap_region
#define EGL_NOK_swap_region 1
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersRegionNOK(EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint* rects);
#endif
/* remnant of EGL_NOK_swap_region kept for compatibility because of a non-standard type name */
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSREGIONNOK) (EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint* rects);
#endif
#ifndef EGL_NOK_texture_from_pixmap
#define EGL_NOK_texture_from_pixmap 1
#define EGL_Y_INVERTED_NOK 0x307F
#endif /* EGL_NOK_texture_from_pixmap */
#ifndef EGL_ANDROID_image_native_buffer
#define EGL_ANDROID_image_native_buffer 1
#define EGL_NATIVE_BUFFER_ANDROID 0x3140 /* eglCreateImageKHR target */
#endif
#ifndef EGL_MESA_configless_context
#define EGL_MESA_configless_context 1

View File

@@ -2,7 +2,7 @@
#define __eglplatform_h_
/*
** Copyright (c) 2007-2009 The Khronos Group Inc.
** Copyright (c) 2007-2013 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -25,7 +25,7 @@
*/
/* Platform-specific types and definitions for egl.h
* $Revision: 12306 $ on $Date: 2010-08-25 09:51:28 -0700 (Wed, 25 Aug 2010) $
* $Revision: 30994 $ on $Date: 2015-04-30 13:36:48 -0700 (Thu, 30 Apr 2015) $
*
* Adopters may modify khrplatform.h and this file to suit their platform.
* You are encouraged to submit all modifications to the Khronos group so that
@@ -95,16 +95,17 @@ typedef struct gbm_device *EGLNativeDisplayType;
typedef struct gbm_bo *EGLNativePixmapType;
typedef void *EGLNativeWindowType;
#elif defined(ANDROID) /* Android */
#elif defined(__ANDROID__) || defined(ANDROID)
#include <android/native_window.h>
struct ANativeWindow;
struct egl_native_pixmap_t;
typedef struct ANativeWindow *EGLNativeWindowType;
typedef struct egl_native_pixmap_t *EGLNativePixmapType;
typedef void *EGLNativeDisplayType;
typedef struct ANativeWindow* EGLNativeWindowType;
typedef struct egl_native_pixmap_t* EGLNativePixmapType;
typedef void* EGLNativeDisplayType;
#elif defined(__unix__)
#elif defined(__unix__) || defined(__APPLE__)
#if defined(MESA_EGL_NO_X11_HEADERS)
@@ -131,9 +132,7 @@ typedef khronos_uintptr_t EGLNativePixmapType;
typedef khronos_uintptr_t EGLNativeWindowType;
#else
#error "Platform not recognized"
#endif
/* EGL 1.2 types, renamed for consistency in EGL 1.3 */

View File

@@ -6,7 +6,7 @@ extern "C" {
#endif
/*
** Copyright (c) 2013-2014 The Khronos Group Inc.
** Copyright (c) 2013-2015 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -33,7 +33,7 @@ extern "C" {
** used to make the header, and the header can be found at
** http://www.opengl.org/registry/
**
** Khronos $Revision: 29735 $ on $Date: 2015-02-02 19:00:01 -0800 (Mon, 02 Feb 2015) $
** Khronos $Revision: 31811 $ on $Date: 2015-08-10 17:01:11 +1000 (Mon, 10 Aug 2015) $
*/
#if defined(_WIN32) && !defined(APIENTRY) && !defined(__CYGWIN__) && !defined(__SCITECH_SNAP__)
@@ -53,7 +53,7 @@ extern "C" {
#define GLAPI extern
#endif
#define GL_GLEXT_VERSION 20150202
#define GL_GLEXT_VERSION 20150809
/* Generated C header for:
* API: gl
@@ -1041,6 +1041,22 @@ typedef unsigned short GLhalf;
#define GL_COLOR_ATTACHMENT13 0x8CED
#define GL_COLOR_ATTACHMENT14 0x8CEE
#define GL_COLOR_ATTACHMENT15 0x8CEF
#define GL_COLOR_ATTACHMENT16 0x8CF0
#define GL_COLOR_ATTACHMENT17 0x8CF1
#define GL_COLOR_ATTACHMENT18 0x8CF2
#define GL_COLOR_ATTACHMENT19 0x8CF3
#define GL_COLOR_ATTACHMENT20 0x8CF4
#define GL_COLOR_ATTACHMENT21 0x8CF5
#define GL_COLOR_ATTACHMENT22 0x8CF6
#define GL_COLOR_ATTACHMENT23 0x8CF7
#define GL_COLOR_ATTACHMENT24 0x8CF8
#define GL_COLOR_ATTACHMENT25 0x8CF9
#define GL_COLOR_ATTACHMENT26 0x8CFA
#define GL_COLOR_ATTACHMENT27 0x8CFB
#define GL_COLOR_ATTACHMENT28 0x8CFC
#define GL_COLOR_ATTACHMENT29 0x8CFD
#define GL_COLOR_ATTACHMENT30 0x8CFE
#define GL_COLOR_ATTACHMENT31 0x8CFF
#define GL_DEPTH_ATTACHMENT 0x8D00
#define GL_STENCIL_ATTACHMENT 0x8D20
#define GL_FRAMEBUFFER 0x8D40
@@ -2859,6 +2875,17 @@ GLAPI void APIENTRY glTextureBarrier (void);
#define GL_ARB_ES3_1_compatibility 1
#endif /* GL_ARB_ES3_1_compatibility */
#ifndef GL_ARB_ES3_2_compatibility
#define GL_ARB_ES3_2_compatibility 1
#define GL_PRIMITIVE_BOUNDING_BOX_ARB 0x92BE
#define GL_MULTISAMPLE_LINE_WIDTH_RANGE_ARB 0x9381
#define GL_MULTISAMPLE_LINE_WIDTH_GRANULARITY_ARB 0x9382
typedef void (APIENTRYP PFNGLPRIMITIVEBOUNDINGBOXARBPROC) (GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glPrimitiveBoundingBoxARB (GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW);
#endif
#endif /* GL_ARB_ES3_2_compatibility */
#ifndef GL_ARB_ES3_compatibility
#define GL_ARB_ES3_compatibility 1
#endif /* GL_ARB_ES3_compatibility */
@@ -3272,6 +3299,10 @@ GLAPI GLboolean APIENTRY glIsProgramARB (GLuint program);
#define GL_FRAGMENT_SHADER_DERIVATIVE_HINT_ARB 0x8B8B
#endif /* GL_ARB_fragment_shader */
#ifndef GL_ARB_fragment_shader_interlock
#define GL_ARB_fragment_shader_interlock 1
#endif /* GL_ARB_fragment_shader_interlock */
#ifndef GL_ARB_framebuffer_no_attachments
#define GL_ARB_framebuffer_no_attachments 1
#endif /* GL_ARB_framebuffer_no_attachments */
@@ -3332,6 +3363,91 @@ GLAPI void APIENTRY glFramebufferTextureFaceARB (GLenum target, GLenum attachmen
#define GL_ARB_gpu_shader_fp64 1
#endif /* GL_ARB_gpu_shader_fp64 */
#ifndef GL_ARB_gpu_shader_int64
#define GL_ARB_gpu_shader_int64 1
#define GL_INT64_ARB 0x140E
#define GL_INT64_VEC2_ARB 0x8FE9
#define GL_INT64_VEC3_ARB 0x8FEA
#define GL_INT64_VEC4_ARB 0x8FEB
#define GL_UNSIGNED_INT64_VEC2_ARB 0x8FF5
#define GL_UNSIGNED_INT64_VEC3_ARB 0x8FF6
#define GL_UNSIGNED_INT64_VEC4_ARB 0x8FF7
typedef void (APIENTRYP PFNGLUNIFORM1I64ARBPROC) (GLint location, GLint64 x);
typedef void (APIENTRYP PFNGLUNIFORM2I64ARBPROC) (GLint location, GLint64 x, GLint64 y);
typedef void (APIENTRYP PFNGLUNIFORM3I64ARBPROC) (GLint location, GLint64 x, GLint64 y, GLint64 z);
typedef void (APIENTRYP PFNGLUNIFORM4I64ARBPROC) (GLint location, GLint64 x, GLint64 y, GLint64 z, GLint64 w);
typedef void (APIENTRYP PFNGLUNIFORM1I64VARBPROC) (GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM2I64VARBPROC) (GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM3I64VARBPROC) (GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM4I64VARBPROC) (GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM1UI64ARBPROC) (GLint location, GLuint64 x);
typedef void (APIENTRYP PFNGLUNIFORM2UI64ARBPROC) (GLint location, GLuint64 x, GLuint64 y);
typedef void (APIENTRYP PFNGLUNIFORM3UI64ARBPROC) (GLint location, GLuint64 x, GLuint64 y, GLuint64 z);
typedef void (APIENTRYP PFNGLUNIFORM4UI64ARBPROC) (GLint location, GLuint64 x, GLuint64 y, GLuint64 z, GLuint64 w);
typedef void (APIENTRYP PFNGLUNIFORM1UI64VARBPROC) (GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM2UI64VARBPROC) (GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM3UI64VARBPROC) (GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLUNIFORM4UI64VARBPROC) (GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLGETUNIFORMI64VARBPROC) (GLuint program, GLint location, GLint64 *params);
typedef void (APIENTRYP PFNGLGETUNIFORMUI64VARBPROC) (GLuint program, GLint location, GLuint64 *params);
typedef void (APIENTRYP PFNGLGETNUNIFORMI64VARBPROC) (GLuint program, GLint location, GLsizei bufSize, GLint64 *params);
typedef void (APIENTRYP PFNGLGETNUNIFORMUI64VARBPROC) (GLuint program, GLint location, GLsizei bufSize, GLuint64 *params);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM1I64ARBPROC) (GLuint program, GLint location, GLint64 x);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM2I64ARBPROC) (GLuint program, GLint location, GLint64 x, GLint64 y);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM3I64ARBPROC) (GLuint program, GLint location, GLint64 x, GLint64 y, GLint64 z);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM4I64ARBPROC) (GLuint program, GLint location, GLint64 x, GLint64 y, GLint64 z, GLint64 w);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM1I64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM2I64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM3I64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM4I64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM1UI64ARBPROC) (GLuint program, GLint location, GLuint64 x);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM2UI64ARBPROC) (GLuint program, GLint location, GLuint64 x, GLuint64 y);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM3UI64ARBPROC) (GLuint program, GLint location, GLuint64 x, GLuint64 y, GLuint64 z);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM4UI64ARBPROC) (GLuint program, GLint location, GLuint64 x, GLuint64 y, GLuint64 z, GLuint64 w);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM1UI64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM2UI64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM3UI64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
typedef void (APIENTRYP PFNGLPROGRAMUNIFORM4UI64VARBPROC) (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glUniform1i64ARB (GLint location, GLint64 x);
GLAPI void APIENTRY glUniform2i64ARB (GLint location, GLint64 x, GLint64 y);
GLAPI void APIENTRY glUniform3i64ARB (GLint location, GLint64 x, GLint64 y, GLint64 z);
GLAPI void APIENTRY glUniform4i64ARB (GLint location, GLint64 x, GLint64 y, GLint64 z, GLint64 w);
GLAPI void APIENTRY glUniform1i64vARB (GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glUniform2i64vARB (GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glUniform3i64vARB (GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glUniform4i64vARB (GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glUniform1ui64ARB (GLint location, GLuint64 x);
GLAPI void APIENTRY glUniform2ui64ARB (GLint location, GLuint64 x, GLuint64 y);
GLAPI void APIENTRY glUniform3ui64ARB (GLint location, GLuint64 x, GLuint64 y, GLuint64 z);
GLAPI void APIENTRY glUniform4ui64ARB (GLint location, GLuint64 x, GLuint64 y, GLuint64 z, GLuint64 w);
GLAPI void APIENTRY glUniform1ui64vARB (GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glUniform2ui64vARB (GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glUniform3ui64vARB (GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glUniform4ui64vARB (GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glGetUniformi64vARB (GLuint program, GLint location, GLint64 *params);
GLAPI void APIENTRY glGetUniformui64vARB (GLuint program, GLint location, GLuint64 *params);
GLAPI void APIENTRY glGetnUniformi64vARB (GLuint program, GLint location, GLsizei bufSize, GLint64 *params);
GLAPI void APIENTRY glGetnUniformui64vARB (GLuint program, GLint location, GLsizei bufSize, GLuint64 *params);
GLAPI void APIENTRY glProgramUniform1i64ARB (GLuint program, GLint location, GLint64 x);
GLAPI void APIENTRY glProgramUniform2i64ARB (GLuint program, GLint location, GLint64 x, GLint64 y);
GLAPI void APIENTRY glProgramUniform3i64ARB (GLuint program, GLint location, GLint64 x, GLint64 y, GLint64 z);
GLAPI void APIENTRY glProgramUniform4i64ARB (GLuint program, GLint location, GLint64 x, GLint64 y, GLint64 z, GLint64 w);
GLAPI void APIENTRY glProgramUniform1i64vARB (GLuint program, GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glProgramUniform2i64vARB (GLuint program, GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glProgramUniform3i64vARB (GLuint program, GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glProgramUniform4i64vARB (GLuint program, GLint location, GLsizei count, const GLint64 *value);
GLAPI void APIENTRY glProgramUniform1ui64ARB (GLuint program, GLint location, GLuint64 x);
GLAPI void APIENTRY glProgramUniform2ui64ARB (GLuint program, GLint location, GLuint64 x, GLuint64 y);
GLAPI void APIENTRY glProgramUniform3ui64ARB (GLuint program, GLint location, GLuint64 x, GLuint64 y, GLuint64 z);
GLAPI void APIENTRY glProgramUniform4ui64ARB (GLuint program, GLint location, GLuint64 x, GLuint64 y, GLuint64 z, GLuint64 w);
GLAPI void APIENTRY glProgramUniform1ui64vARB (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glProgramUniform2ui64vARB (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glProgramUniform3ui64vARB (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
GLAPI void APIENTRY glProgramUniform4ui64vARB (GLuint program, GLint location, GLsizei count, const GLuint64 *value);
#endif
#endif /* GL_ARB_gpu_shader_int64 */
#ifndef GL_ARB_half_float_pixel
#define GL_ARB_half_float_pixel 1
typedef unsigned short GLhalfARB;
@@ -3711,6 +3827,16 @@ GLAPI void APIENTRY glGetQueryObjectuivARB (GLuint id, GLenum pname, GLuint *par
#define GL_ARB_occlusion_query2 1
#endif /* GL_ARB_occlusion_query2 */
#ifndef GL_ARB_parallel_shader_compile
#define GL_ARB_parallel_shader_compile 1
#define GL_MAX_SHADER_COMPILER_THREADS_ARB 0x91B0
#define GL_COMPLETION_STATUS_ARB 0x91B1
typedef void (APIENTRYP PFNGLMAXSHADERCOMPILERTHREADSARBPROC) (GLuint count);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glMaxShaderCompilerThreadsARB (GLuint count);
#endif
#endif /* GL_ARB_parallel_shader_compile */
#ifndef GL_ARB_pipeline_statistics_query
#define GL_ARB_pipeline_statistics_query 1
#define GL_VERTICES_SUBMITTED_ARB 0x82EE
@@ -3753,6 +3879,10 @@ GLAPI void APIENTRY glPointParameterfvARB (GLenum pname, const GLfloat *params);
#define GL_COORD_REPLACE_ARB 0x8862
#endif /* GL_ARB_point_sprite */
#ifndef GL_ARB_post_depth_coverage
#define GL_ARB_post_depth_coverage 1
#endif /* GL_ARB_post_depth_coverage */
#ifndef GL_ARB_program_interface_query
#define GL_ARB_program_interface_query 1
#endif /* GL_ARB_program_interface_query */
@@ -3826,6 +3956,26 @@ GLAPI void APIENTRY glGetnMinmaxARB (GLenum target, GLboolean reset, GLenum form
#define GL_ARB_robustness_isolation 1
#endif /* GL_ARB_robustness_isolation */
#ifndef GL_ARB_sample_locations
#define GL_ARB_sample_locations 1
#define GL_SAMPLE_LOCATION_SUBPIXEL_BITS_ARB 0x933D
#define GL_SAMPLE_LOCATION_PIXEL_GRID_WIDTH_ARB 0x933E
#define GL_SAMPLE_LOCATION_PIXEL_GRID_HEIGHT_ARB 0x933F
#define GL_PROGRAMMABLE_SAMPLE_LOCATION_TABLE_SIZE_ARB 0x9340
#define GL_SAMPLE_LOCATION_ARB 0x8E50
#define GL_PROGRAMMABLE_SAMPLE_LOCATION_ARB 0x9341
#define GL_FRAMEBUFFER_PROGRAMMABLE_SAMPLE_LOCATIONS_ARB 0x9342
#define GL_FRAMEBUFFER_SAMPLE_LOCATION_PIXEL_GRID_ARB 0x9343
typedef void (APIENTRYP PFNGLFRAMEBUFFERSAMPLELOCATIONSFVARBPROC) (GLenum target, GLuint start, GLsizei count, const GLfloat *v);
typedef void (APIENTRYP PFNGLNAMEDFRAMEBUFFERSAMPLELOCATIONSFVARBPROC) (GLuint framebuffer, GLuint start, GLsizei count, const GLfloat *v);
typedef void (APIENTRYP PFNGLEVALUATEDEPTHVALUESARBPROC) (void);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glFramebufferSampleLocationsfvARB (GLenum target, GLuint start, GLsizei count, const GLfloat *v);
GLAPI void APIENTRY glNamedFramebufferSampleLocationsfvARB (GLuint framebuffer, GLuint start, GLsizei count, const GLfloat *v);
GLAPI void APIENTRY glEvaluateDepthValuesARB (void);
#endif
#endif /* GL_ARB_sample_locations */
#ifndef GL_ARB_sample_shading
#define GL_ARB_sample_shading 1
#define GL_SAMPLE_SHADING_ARB 0x8C36
@@ -3852,14 +4002,26 @@ GLAPI void APIENTRY glMinSampleShadingARB (GLfloat value);
#define GL_ARB_separate_shader_objects 1
#endif /* GL_ARB_separate_shader_objects */
#ifndef GL_ARB_shader_atomic_counter_ops
#define GL_ARB_shader_atomic_counter_ops 1
#endif /* GL_ARB_shader_atomic_counter_ops */
#ifndef GL_ARB_shader_atomic_counters
#define GL_ARB_shader_atomic_counters 1
#endif /* GL_ARB_shader_atomic_counters */
#ifndef GL_ARB_shader_ballot
#define GL_ARB_shader_ballot 1
#endif /* GL_ARB_shader_ballot */
#ifndef GL_ARB_shader_bit_encoding
#define GL_ARB_shader_bit_encoding 1
#endif /* GL_ARB_shader_bit_encoding */
#ifndef GL_ARB_shader_clock
#define GL_ARB_shader_clock 1
#endif /* GL_ARB_shader_clock */
#ifndef GL_ARB_shader_draw_parameters
#define GL_ARB_shader_draw_parameters 1
#endif /* GL_ARB_shader_draw_parameters */
@@ -3879,7 +4041,12 @@ GLAPI void APIENTRY glMinSampleShadingARB (GLfloat value);
#ifndef GL_ARB_shader_objects
#define GL_ARB_shader_objects 1
#ifdef __APPLE__
#ifdef BUILDING_MESA
/* Avoid uint <-> void* warnings */
typedef unsigned long GLhandleARB;
#else
typedef void *GLhandleARB;
#endif
#else
typedef unsigned int GLhandleARB;
#endif
@@ -4024,6 +4191,10 @@ GLAPI void APIENTRY glGetShaderSourceARB (GLhandleARB obj, GLsizei maxLength, GL
#define GL_ARB_shader_texture_lod 1
#endif /* GL_ARB_shader_texture_lod */
#ifndef GL_ARB_shader_viewport_layer_array
#define GL_ARB_shader_viewport_layer_array 1
#endif /* GL_ARB_shader_viewport_layer_array */
#ifndef GL_ARB_shading_language_100
#define GL_ARB_shading_language_100 1
#define GL_SHADING_LANGUAGE_VERSION_ARB 0x8B8C
@@ -4097,12 +4268,20 @@ GLAPI void APIENTRY glNamedBufferPageCommitmentARB (GLuint buffer, GLintptr offs
#define GL_MAX_SPARSE_3D_TEXTURE_SIZE_ARB 0x9199
#define GL_MAX_SPARSE_ARRAY_TEXTURE_LAYERS_ARB 0x919A
#define GL_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS_ARB 0x91A9
typedef void (APIENTRYP PFNGLTEXPAGECOMMITMENTARBPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean resident);
typedef void (APIENTRYP PFNGLTEXPAGECOMMITMENTARBPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean commit);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glTexPageCommitmentARB (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean resident);
GLAPI void APIENTRY glTexPageCommitmentARB (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean commit);
#endif
#endif /* GL_ARB_sparse_texture */
#ifndef GL_ARB_sparse_texture2
#define GL_ARB_sparse_texture2 1
#endif /* GL_ARB_sparse_texture2 */
#ifndef GL_ARB_sparse_texture_clamp
#define GL_ARB_sparse_texture_clamp 1
#endif /* GL_ARB_sparse_texture_clamp */
#ifndef GL_ARB_stencil_texturing
#define GL_ARB_stencil_texturing 1
#endif /* GL_ARB_stencil_texturing */
@@ -4255,6 +4434,12 @@ GLAPI void APIENTRY glGetCompressedTexImageARB (GLenum target, GLint level, void
#define GL_DOT3_RGBA_ARB 0x86AF
#endif /* GL_ARB_texture_env_dot3 */
#ifndef GL_ARB_texture_filter_minmax
#define GL_ARB_texture_filter_minmax 1
#define GL_TEXTURE_REDUCTION_MODE_ARB 0x9366
#define GL_WEIGHTED_AVERAGE_ARB 0x9367
#endif /* GL_ARB_texture_filter_minmax */
#ifndef GL_ARB_texture_float
#define GL_ARB_texture_float 1
#define GL_TEXTURE_RED_TYPE_ARB 0x8C10
@@ -4749,6 +4934,11 @@ GLAPI void APIENTRY glBlendBarrierKHR (void);
#define GL_KHR_debug 1
#endif /* GL_KHR_debug */
#ifndef GL_KHR_no_error
#define GL_KHR_no_error 1
#define GL_CONTEXT_FLAG_NO_ERROR_BIT_KHR 0x00000008
#endif /* GL_KHR_no_error */
#ifndef GL_KHR_robust_buffer_access_behavior
#define GL_KHR_robust_buffer_access_behavior 1
#endif /* GL_KHR_robust_buffer_access_behavior */
@@ -4891,7 +5081,6 @@ typedef void (APIENTRYP PFNGLPOINTPARAMETERXVOESPROC) (GLenum pname, const GLfix
typedef void (APIENTRYP PFNGLPOINTSIZEXOESPROC) (GLfixed size);
typedef void (APIENTRYP PFNGLPOLYGONOFFSETXOESPROC) (GLfixed factor, GLfixed units);
typedef void (APIENTRYP PFNGLROTATEXOESPROC) (GLfixed angle, GLfixed x, GLfixed y, GLfixed z);
typedef void (APIENTRYP PFNGLSAMPLECOVERAGEOESPROC) (GLfixed value, GLboolean invert);
typedef void (APIENTRYP PFNGLSCALEXOESPROC) (GLfixed x, GLfixed y, GLfixed z);
typedef void (APIENTRYP PFNGLTEXENVXOESPROC) (GLenum target, GLenum pname, GLfixed param);
typedef void (APIENTRYP PFNGLTEXENVXVOESPROC) (GLenum target, GLenum pname, const GLfixed *params);
@@ -4996,7 +5185,6 @@ GLAPI void APIENTRY glPointParameterxvOES (GLenum pname, const GLfixed *params);
GLAPI void APIENTRY glPointSizexOES (GLfixed size);
GLAPI void APIENTRY glPolygonOffsetxOES (GLfixed factor, GLfixed units);
GLAPI void APIENTRY glRotatexOES (GLfixed angle, GLfixed x, GLfixed y, GLfixed z);
GLAPI void APIENTRY glSampleCoverageOES (GLfixed value, GLboolean invert);
GLAPI void APIENTRY glScalexOES (GLfixed x, GLfixed y, GLfixed z);
GLAPI void APIENTRY glTexEnvxOES (GLenum target, GLenum pname, GLfixed param);
GLAPI void APIENTRY glTexEnvxvOES (GLenum target, GLenum pname, const GLfixed *params);
@@ -6710,7 +6898,7 @@ typedef void (APIENTRYP PFNGLVERTEXARRAYVERTEXATTRIBLFORMATEXTPROC) (GLuint vaob
typedef void (APIENTRYP PFNGLVERTEXARRAYVERTEXATTRIBBINDINGEXTPROC) (GLuint vaobj, GLuint attribindex, GLuint bindingindex);
typedef void (APIENTRYP PFNGLVERTEXARRAYVERTEXBINDINGDIVISOREXTPROC) (GLuint vaobj, GLuint bindingindex, GLuint divisor);
typedef void (APIENTRYP PFNGLVERTEXARRAYVERTEXATTRIBLOFFSETEXTPROC) (GLuint vaobj, GLuint buffer, GLuint index, GLint size, GLenum type, GLsizei stride, GLintptr offset);
typedef void (APIENTRYP PFNGLTEXTUREPAGECOMMITMENTEXTPROC) (GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean resident);
typedef void (APIENTRYP PFNGLTEXTUREPAGECOMMITMENTEXTPROC) (GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean commit);
typedef void (APIENTRYP PFNGLVERTEXARRAYVERTEXATTRIBDIVISOREXTPROC) (GLuint vaobj, GLuint index, GLuint divisor);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glMatrixLoadfEXT (GLenum mode, const GLfloat *m);
@@ -6966,7 +7154,7 @@ GLAPI void APIENTRY glVertexArrayVertexAttribLFormatEXT (GLuint vaobj, GLuint at
GLAPI void APIENTRY glVertexArrayVertexAttribBindingEXT (GLuint vaobj, GLuint attribindex, GLuint bindingindex);
GLAPI void APIENTRY glVertexArrayVertexBindingDivisorEXT (GLuint vaobj, GLuint bindingindex, GLuint divisor);
GLAPI void APIENTRY glVertexArrayVertexAttribLOffsetEXT (GLuint vaobj, GLuint buffer, GLuint index, GLint size, GLenum type, GLsizei stride, GLintptr offset);
GLAPI void APIENTRY glTexturePageCommitmentEXT (GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean resident);
GLAPI void APIENTRY glTexturePageCommitmentEXT (GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLboolean commit);
GLAPI void APIENTRY glVertexArrayVertexAttribDivisorEXT (GLuint vaobj, GLuint index, GLuint divisor);
#endif
#endif /* GL_EXT_direct_state_access */
@@ -8630,6 +8818,14 @@ GLAPI void APIENTRY glBlendFuncSeparateINGR (GLenum sfactorRGB, GLenum dfactorRG
#define GL_INTEL_fragment_shader_ordering 1
#endif /* GL_INTEL_fragment_shader_ordering */
#ifndef GL_INTEL_framebuffer_CMAA
#define GL_INTEL_framebuffer_CMAA 1
typedef void (APIENTRYP PFNGLAPPLYFRAMEBUFFERATTACHMENTCMAAINTELPROC) (void);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glApplyFramebufferAttachmentCMAAINTEL (void);
#endif
#endif /* GL_INTEL_framebuffer_CMAA */
#ifndef GL_INTEL_map_texture
#define GL_INTEL_map_texture 1
#define GL_TEXTURE_MEMORY_LAYOUT_INTEL 0x83FF
@@ -8934,6 +9130,65 @@ GLAPI void APIENTRY glBlendBarrierNV (void);
#define GL_NV_blend_square 1
#endif /* GL_NV_blend_square */
#ifndef GL_NV_command_list
#define GL_NV_command_list 1
#define GL_TERMINATE_SEQUENCE_COMMAND_NV 0x0000
#define GL_NOP_COMMAND_NV 0x0001
#define GL_DRAW_ELEMENTS_COMMAND_NV 0x0002
#define GL_DRAW_ARRAYS_COMMAND_NV 0x0003
#define GL_DRAW_ELEMENTS_STRIP_COMMAND_NV 0x0004
#define GL_DRAW_ARRAYS_STRIP_COMMAND_NV 0x0005
#define GL_DRAW_ELEMENTS_INSTANCED_COMMAND_NV 0x0006
#define GL_DRAW_ARRAYS_INSTANCED_COMMAND_NV 0x0007
#define GL_ELEMENT_ADDRESS_COMMAND_NV 0x0008
#define GL_ATTRIBUTE_ADDRESS_COMMAND_NV 0x0009
#define GL_UNIFORM_ADDRESS_COMMAND_NV 0x000A
#define GL_BLEND_COLOR_COMMAND_NV 0x000B
#define GL_STENCIL_REF_COMMAND_NV 0x000C
#define GL_LINE_WIDTH_COMMAND_NV 0x000D
#define GL_POLYGON_OFFSET_COMMAND_NV 0x000E
#define GL_ALPHA_REF_COMMAND_NV 0x000F
#define GL_VIEWPORT_COMMAND_NV 0x0010
#define GL_SCISSOR_COMMAND_NV 0x0011
#define GL_FRONT_FACE_COMMAND_NV 0x0012
typedef void (APIENTRYP PFNGLCREATESTATESNVPROC) (GLsizei n, GLuint *states);
typedef void (APIENTRYP PFNGLDELETESTATESNVPROC) (GLsizei n, const GLuint *states);
typedef GLboolean (APIENTRYP PFNGLISSTATENVPROC) (GLuint state);
typedef void (APIENTRYP PFNGLSTATECAPTURENVPROC) (GLuint state, GLenum mode);
typedef GLuint (APIENTRYP PFNGLGETCOMMANDHEADERNVPROC) (GLenum tokenID, GLuint size);
typedef GLushort (APIENTRYP PFNGLGETSTAGEINDEXNVPROC) (GLenum shadertype);
typedef void (APIENTRYP PFNGLDRAWCOMMANDSNVPROC) (GLenum primitiveMode, GLuint buffer, const GLintptr *indirects, const GLsizei *sizes, GLuint count);
typedef void (APIENTRYP PFNGLDRAWCOMMANDSADDRESSNVPROC) (GLenum primitiveMode, const GLuint64 *indirects, const GLsizei *sizes, GLuint count);
typedef void (APIENTRYP PFNGLDRAWCOMMANDSSTATESNVPROC) (GLuint buffer, const GLintptr *indirects, const GLsizei *sizes, const GLuint *states, const GLuint *fbos, GLuint count);
typedef void (APIENTRYP PFNGLDRAWCOMMANDSSTATESADDRESSNVPROC) (const GLuint64 *indirects, const GLsizei *sizes, const GLuint *states, const GLuint *fbos, GLuint count);
typedef void (APIENTRYP PFNGLCREATECOMMANDLISTSNVPROC) (GLsizei n, GLuint *lists);
typedef void (APIENTRYP PFNGLDELETECOMMANDLISTSNVPROC) (GLsizei n, const GLuint *lists);
typedef GLboolean (APIENTRYP PFNGLISCOMMANDLISTNVPROC) (GLuint list);
typedef void (APIENTRYP PFNGLLISTDRAWCOMMANDSSTATESCLIENTNVPROC) (GLuint list, GLuint segment, const void **indirects, const GLsizei *sizes, const GLuint *states, const GLuint *fbos, GLuint count);
typedef void (APIENTRYP PFNGLCOMMANDLISTSEGMENTSNVPROC) (GLuint list, GLuint segments);
typedef void (APIENTRYP PFNGLCOMPILECOMMANDLISTNVPROC) (GLuint list);
typedef void (APIENTRYP PFNGLCALLCOMMANDLISTNVPROC) (GLuint list);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glCreateStatesNV (GLsizei n, GLuint *states);
GLAPI void APIENTRY glDeleteStatesNV (GLsizei n, const GLuint *states);
GLAPI GLboolean APIENTRY glIsStateNV (GLuint state);
GLAPI void APIENTRY glStateCaptureNV (GLuint state, GLenum mode);
GLAPI GLuint APIENTRY glGetCommandHeaderNV (GLenum tokenID, GLuint size);
GLAPI GLushort APIENTRY glGetStageIndexNV (GLenum shadertype);
GLAPI void APIENTRY glDrawCommandsNV (GLenum primitiveMode, GLuint buffer, const GLintptr *indirects, const GLsizei *sizes, GLuint count);
GLAPI void APIENTRY glDrawCommandsAddressNV (GLenum primitiveMode, const GLuint64 *indirects, const GLsizei *sizes, GLuint count);
GLAPI void APIENTRY glDrawCommandsStatesNV (GLuint buffer, const GLintptr *indirects, const GLsizei *sizes, const GLuint *states, const GLuint *fbos, GLuint count);
GLAPI void APIENTRY glDrawCommandsStatesAddressNV (const GLuint64 *indirects, const GLsizei *sizes, const GLuint *states, const GLuint *fbos, GLuint count);
GLAPI void APIENTRY glCreateCommandListsNV (GLsizei n, GLuint *lists);
GLAPI void APIENTRY glDeleteCommandListsNV (GLsizei n, const GLuint *lists);
GLAPI GLboolean APIENTRY glIsCommandListNV (GLuint list);
GLAPI void APIENTRY glListDrawCommandsStatesClientNV (GLuint list, GLuint segment, const void **indirects, const GLsizei *sizes, const GLuint *states, const GLuint *fbos, GLuint count);
GLAPI void APIENTRY glCommandListSegmentsNV (GLuint list, GLuint segments);
GLAPI void APIENTRY glCompileCommandListNV (GLuint list);
GLAPI void APIENTRY glCallCommandListNV (GLuint list);
#endif
#endif /* GL_NV_command_list */
#ifndef GL_NV_compute_program5
#define GL_NV_compute_program5 1
#define GL_COMPUTE_PROGRAM_NV 0x90FB
@@ -8966,6 +9221,17 @@ GLAPI void APIENTRY glSubpixelPrecisionBiasNV (GLuint xbits, GLuint ybits);
#endif
#endif /* GL_NV_conservative_raster */
#ifndef GL_NV_conservative_raster_dilate
#define GL_NV_conservative_raster_dilate 1
#define GL_CONSERVATIVE_RASTER_DILATE_NV 0x9379
#define GL_CONSERVATIVE_RASTER_DILATE_RANGE_NV 0x937A
#define GL_CONSERVATIVE_RASTER_DILATE_GRANULARITY_NV 0x937B
typedef void (APIENTRYP PFNGLCONSERVATIVERASTERPARAMETERFNVPROC) (GLenum pname, GLfloat value);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glConservativeRasterParameterfNV (GLenum pname, GLfloat value);
#endif
#endif /* GL_NV_conservative_raster_dilate */
#ifndef GL_NV_copy_depth_to_color
#define GL_NV_copy_depth_to_color 1
#define GL_DEPTH_STENCIL_TO_RGBA_NV 0x886E
@@ -10845,6 +11111,21 @@ GLAPI void APIENTRY glVideoCaptureStreamParameterdvNV (GLuint video_capture_slot
#define GL_FORMAT_SUBSAMPLE_244_244_OML 0x8983
#endif /* GL_OML_subsample */
#ifndef GL_OVR_multiview
#define GL_OVR_multiview 1
#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_NUM_VIEWS_OVR 0x9630
#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_BASE_VIEW_INDEX_OVR 0x9632
#define GL_MAX_VIEWS_OVR 0x9631
typedef void (APIENTRYP PFNGLFRAMEBUFFERTEXTUREMULTIVIEWOVRPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint baseViewIndex, GLsizei numViews);
#ifdef GL_GLEXT_PROTOTYPES
GLAPI void APIENTRY glFramebufferTextureMultiviewOVR (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint baseViewIndex, GLsizei numViews);
#endif
#endif /* GL_OVR_multiview */
#ifndef GL_OVR_multiview2
#define GL_OVR_multiview2 1
#endif /* GL_OVR_multiview2 */
#ifndef GL_PGI_misc_hints
#define GL_PGI_misc_hints 1
#define GL_PREFER_DOUBLEBUFFER_HINT_PGI 0x1A1F8

View File

@@ -368,18 +368,6 @@ extern Bool glXDrawableAttribARB(Display *dpy, GLXDrawable draw, const int *attr
#endif /* GLX_ARB_render_texture */
/*
* Remove this when glxext.h is updated.
*/
#ifndef GLX_NV_float_buffer
#define GLX_NV_float_buffer 1
#define GLX_FLOAT_COMPONENTS_NV 0x20B0
#endif /* GLX_NV_float_buffer */
/*
* #?. GLX_MESA_swap_frame_usage
*/
@@ -415,86 +403,6 @@ typedef int (*PFNGLXGETSWAPINTERVALMESAPROC)(void);
#endif /* GLX_MESA_swap_control */
/*
* #?. GLX_EXT_texture_from_pixmap
* XXX not finished?
*/
#ifndef GLX_EXT_texture_from_pixmap
#define GLX_EXT_texture_from_pixmap 1
#define GLX_BIND_TO_TEXTURE_RGB_EXT 0x20D0
#define GLX_BIND_TO_TEXTURE_RGBA_EXT 0x20D1
#define GLX_BIND_TO_MIPMAP_TEXTURE_EXT 0x20D2
#define GLX_BIND_TO_TEXTURE_TARGETS_EXT 0x20D3
#define GLX_Y_INVERTED_EXT 0x20D4
#define GLX_TEXTURE_FORMAT_EXT 0x20D5
#define GLX_TEXTURE_TARGET_EXT 0x20D6
#define GLX_MIPMAP_TEXTURE_EXT 0x20D7
#define GLX_TEXTURE_FORMAT_NONE_EXT 0x20D8
#define GLX_TEXTURE_FORMAT_RGB_EXT 0x20D9
#define GLX_TEXTURE_FORMAT_RGBA_EXT 0x20DA
#define GLX_TEXTURE_1D_BIT_EXT 0x00000001
#define GLX_TEXTURE_2D_BIT_EXT 0x00000002
#define GLX_TEXTURE_RECTANGLE_BIT_EXT 0x00000004
#define GLX_TEXTURE_1D_EXT 0x20DB
#define GLX_TEXTURE_2D_EXT 0x20DC
#define GLX_TEXTURE_RECTANGLE_EXT 0x20DD
#define GLX_FRONT_LEFT_EXT 0x20DE
#define GLX_FRONT_RIGHT_EXT 0x20DF
#define GLX_BACK_LEFT_EXT 0x20E0
#define GLX_BACK_RIGHT_EXT 0x20E1
#define GLX_FRONT_EXT GLX_FRONT_LEFT_EXT
#define GLX_BACK_EXT GLX_BACK_LEFT_EXT
#define GLX_AUX0_EXT 0x20E2
#define GLX_AUX1_EXT 0x20E3
#define GLX_AUX2_EXT 0x20E4
#define GLX_AUX3_EXT 0x20E5
#define GLX_AUX4_EXT 0x20E6
#define GLX_AUX5_EXT 0x20E7
#define GLX_AUX6_EXT 0x20E8
#define GLX_AUX7_EXT 0x20E9
#define GLX_AUX8_EXT 0x20EA
#define GLX_AUX9_EXT 0x20EB
extern void glXBindTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer, const int *attrib_list);
extern void glXReleaseTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer);
#endif /* GLX_EXT_texture_from_pixmap */
#ifndef GLX_MESA_query_renderer
#define GLX_MESA_query_renderer 1
#define GLX_RENDERER_VENDOR_ID_MESA 0x8183
#define GLX_RENDERER_DEVICE_ID_MESA 0x8184
#define GLX_RENDERER_VERSION_MESA 0x8185
#define GLX_RENDERER_ACCELERATED_MESA 0x8186
#define GLX_RENDERER_VIDEO_MEMORY_MESA 0x8187
#define GLX_RENDERER_UNIFIED_MEMORY_ARCHITECTURE_MESA 0x8188
#define GLX_RENDERER_PREFERRED_PROFILE_MESA 0x8189
#define GLX_RENDERER_OPENGL_CORE_PROFILE_VERSION_MESA 0x818A
#define GLX_RENDERER_OPENGL_COMPATIBILITY_PROFILE_VERSION_MESA 0x818B
#define GLX_RENDERER_OPENGL_ES_PROFILE_VERSION_MESA 0x818C
#define GLX_RENDERER_OPENGL_ES2_PROFILE_VERSION_MESA 0x818D
#define GLX_RENDERER_ID_MESA 0x818E
Bool glXQueryRendererIntegerMESA(Display *dpy, int screen, int renderer, int attribute, unsigned int *value);
Bool glXQueryCurrentRendererIntegerMESA(int attribute, unsigned int *value);
const char *glXQueryRendererStringMESA(Display *dpy, int screen, int renderer, int attribute);
const char *glXQueryCurrentRendererStringMESA(int attribute);
typedef Bool (*PFNGLXQUERYRENDERERINTEGERMESAPROC) (Display *dpy, int screen, int renderer, int attribute, unsigned int *value);
typedef Bool (*PFNGLXQUERYCURRENTRENDERERINTEGERMESAPROC) (int attribute, unsigned int *value);
typedef const char *(*PFNGLXQUERYRENDERERSTRINGMESAPROC) (Display *dpy, int screen, int renderer, int attribute);
typedef const char *(*PFNGLXQUERYCURRENTRENDERERSTRINGMESAPROC) (int attribute);
#endif /* GLX_MESA_query_renderer */
/*** Should these go here, or in another header? */
/*
** GLX Events

View File

@@ -40,14 +40,7 @@
#ifndef DRI_INTERFACE_H
#define DRI_INTERFACE_H
/* For archs with no drm.h */
#if defined(__APPLE__) || defined(__CYGWIN__) || defined(__GNU__)
#ifndef __NOT_HAVE_DRM_H
#define __NOT_HAVE_DRM_H
#endif
#endif
#ifndef __NOT_HAVE_DRM_H
#ifdef HAVE_LIBDRM
#include <drm.h>
#else
typedef unsigned int drm_context_t;
@@ -85,6 +78,7 @@ typedef struct __DRIdri2ExtensionRec __DRIdri2Extension;
typedef struct __DRIdri2LoaderExtensionRec __DRIdri2LoaderExtension;
typedef struct __DRI2flushExtensionRec __DRI2flushExtension;
typedef struct __DRI2throttleExtensionRec __DRI2throttleExtension;
typedef struct __DRI2fenceExtensionRec __DRI2fenceExtension;
typedef struct __DRIimageLoaderExtensionRec __DRIimageLoaderExtension;
@@ -339,6 +333,65 @@ struct __DRI2throttleExtensionRec {
enum __DRI2throttleReason reason);
};
/**
* Extension for fences / synchronization objects.
*/
#define __DRI2_FENCE "DRI2_Fence"
#define __DRI2_FENCE_VERSION 1
#define __DRI2_FENCE_TIMEOUT_INFINITE 0xffffffffffffffffllu
#define __DRI2_FENCE_FLAG_FLUSH_COMMANDS (1 << 0)
struct __DRI2fenceExtensionRec {
__DRIextension base;
/**
* Create and insert a fence into the command stream of the context.
*/
void *(*create_fence)(__DRIcontext *ctx);
/**
* Get a fence associated with the OpenCL event object.
* This can be NULL, meaning that OpenCL interoperability is not supported.
*/
void *(*get_fence_from_cl_event)(__DRIscreen *screen, intptr_t cl_event);
/**
* Destroy a fence.
*/
void (*destroy_fence)(__DRIscreen *screen, void *fence);
/**
* This function waits and doesn't return until the fence is signalled
* or the timeout expires. It returns true if the fence has been signaled.
*
* \param ctx the context where commands are flushed
* \param fence the fence
* \param flags a combination of __DRI2_FENCE_FLAG_xxx flags
* \param timeout the timeout in ns or __DRI2_FENCE_TIMEOUT_INFINITE
*/
GLboolean (*client_wait_sync)(__DRIcontext *ctx, void *fence,
unsigned flags, uint64_t timeout);
/**
* This function enqueues a wait command into the command stream of
* the context and then returns. When the execution reaches the wait
* command, no further execution will be done in the context until
* the fence is signaled. This is a no-op if the device doesn't support
* parallel execution of contexts.
*
* \param ctx the context where the waiting is done
* \param fence the fence
* \param flags a combination of __DRI2_FENCE_FLAG_xxx flags that make
* sense with this function (right now there are none)
*/
void (*server_wait_sync)(__DRIcontext *ctx, void *fence, unsigned flags);
};
/*@}*/
/**
@@ -1006,7 +1059,7 @@ struct __DRIdri2ExtensionRec {
* extensions.
*/
#define __DRI_IMAGE "DRI_IMAGE"
#define __DRI_IMAGE_VERSION 10
#define __DRI_IMAGE_VERSION 11
/**
* These formats correspond to the similarly named MESA_FORMAT_*
@@ -1041,12 +1094,15 @@ struct __DRIdri2ExtensionRec {
/**
* Four CC formats that matches with WL_DRM_FORMAT_* from wayland_drm.h
* and GBM_FORMAT_* from gbm.h, used with createImageFromNames.
* Four CC formats that matches with WL_DRM_FORMAT_* from wayland_drm.h,
* GBM_FORMAT_* from gbm.h, and DRM_FORMAT_* from drm_fourcc.h. Used with
* createImageFromNames.
*
* \since 5
*/
#define __DRI_IMAGE_FOURCC_R8 0x20203852
#define __DRI_IMAGE_FOURCC_GR88 0x38385247
#define __DRI_IMAGE_FOURCC_RGB565 0x36314752
#define __DRI_IMAGE_FOURCC_ARGB8888 0x34325241
#define __DRI_IMAGE_FOURCC_XRGB8888 0x34325258
@@ -1081,6 +1137,8 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_COMPONENTS_Y_U_V 0x3003
#define __DRI_IMAGE_COMPONENTS_Y_UV 0x3004
#define __DRI_IMAGE_COMPONENTS_Y_XUXV 0x3005
#define __DRI_IMAGE_COMPONENTS_R 0x3006
#define __DRI_IMAGE_COMPONENTS_RG 0x3007
/**
@@ -1097,6 +1155,8 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_ATTRIB_FD 0x2007 /* available in versions
* 7+. Each query will return a
* new fd. */
#define __DRI_IMAGE_ATTRIB_FOURCC 0x2008 /* available in versions 11 */
#define __DRI_IMAGE_ATTRIB_NUM_PLANES 0x2009 /* available in versions 11 */
enum __DRIYUVColorSpace {
__DRI_YUV_COLOR_SPACE_UNDEFINED = 0,
@@ -1118,7 +1178,8 @@ enum __DRIChromaSiting {
};
/**
* \name Reasons that __DRIimageExtensionRec::createImageFromTexture might fail
* \name Reasons that __DRIimageExtensionRec::createImageFromTexture or
* __DRIimageExtensionRec::createImageFromDmaBufs might fail
*/
/*@{*/
/** Success! */
@@ -1127,11 +1188,14 @@ enum __DRIChromaSiting {
/** Memory allocation failure */
#define __DRI_IMAGE_ERROR_BAD_ALLOC 1
/** Client requested an invalid attribute for a texture object */
/** Client requested an invalid attribute */
#define __DRI_IMAGE_ERROR_BAD_MATCH 2
/** Client requested an invalid texture object */
#define __DRI_IMAGE_ERROR_BAD_PARAMETER 3
/** Client requested an invalid pitch and/or offset */
#define __DRI_IMAGE_ERROR_BAD_ACCESS 4
/*@}*/
/**
@@ -1382,6 +1446,11 @@ typedef struct __DRIDriverVtableExtensionRec {
#define __DRI2_RENDERER_OPENGL_COMPATIBILITY_PROFILE_VERSION 0x0008
#define __DRI2_RENDERER_OPENGL_ES_PROFILE_VERSION 0x0009
#define __DRI2_RENDERER_OPENGL_ES2_PROFILE_VERSION 0x000a
#define __DRI2_RENDERER_HAS_TEXTURE_3D 0x000b
/* Whether there is an sRGB format support for every supported 32-bit UNORM
* color format.
*/
#define __DRI2_RENDERER_HAS_FRAMEBUFFER_SRGB 0x000c
typedef struct __DRI2rendererQueryExtensionRec __DRI2rendererQueryExtension;
struct __DRI2rendererQueryExtensionRec {

View File

@@ -41,10 +41,8 @@
* OSMesaGetIntegerv - return OSMesa state parameters
*
*
* The limits on the width and height of an image buffer are MAX_WIDTH and
* MAX_HEIGHT as defined in Mesa/src/config.h. Defaults are 1280 and 1024.
* You can increase them as needed but beware that many temporary arrays in
* Mesa are dimensioned by MAX_WIDTH or MAX_HEIGHT.
* The limits on the width and height of an image buffer can be retrieved
* via OSMesaGetIntegerv(OSMESA_MAX_WIDTH/OSMESA_MAX_HEIGHT).
*/

View File

@@ -1,140 +0,0 @@
/*
* Mesa 3-D graphics library
* Copyright (C) 1995-1998 Brian Paul
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Library General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Library General Public License for more details.
*
* You should have received a copy of the GNU Library General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
/*
* Windows driver by: Mark E. Peterson (markp@ic.mankato.mn.us)
* Updated by Li Wei (liwei@aiar.xjtu.edu.cn)
*
*
***************************************************************
* WMesa *
* version 2.3 *
* *
* By *
* Li Wei *
* Institute of Artificial Intelligence & Robotics *
* Xi'an Jiaotong University *
* Email: liwei@aiar.xjtu.edu.cn *
* Web page: http://sun.aiar.xjtu.edu.cn *
* *
* July 7th, 1997 *
***************************************************************
*/
#ifndef WMESA_H
#define WMESA_H
#ifdef __cplusplus
extern "C" {
#endif
#include "GL/gl.h"
#if defined(_MSV_VER) && !defined(__GNUC__)
# pragma warning (disable:4273)
# pragma warning( disable : 4244 ) /* '=' : conversion from 'const double ' to 'float ', possible loss of data */
# pragma warning( disable : 4018 ) /* '<' : signed/unsigned mismatch */
# pragma warning( disable : 4305 ) /* '=' : truncation from 'const double ' to 'float ' */
# pragma warning( disable : 4013 ) /* 'function' undefined; assuming extern returning int */
# pragma warning( disable : 4761 ) /* integral size mismatch in argument; conversion supplied */
# pragma warning( disable : 4273 ) /* 'identifier' : inconsistent DLL linkage. dllexport assumed */
# if (MESA_WARNQUIET>1)
# pragma warning( disable : 4146 ) /* unary minus operator applied to unsigned type, result still unsigned */
# endif
#endif
/*
* This is the WMesa context 'handle':
*/
typedef struct wmesa_context *WMesaContext;
/*
* Create a new WMesaContext for rendering into a window. You must
* have already created the window of correct visual type and with an
* appropriate colormap.
*
* Input:
* hDC - Windows device or memory context
* Pal - Palette to use
* rgb_flag - GL_TRUE = RGB mode,
* GL_FALSE = color index mode
* db_flag - GL_TRUE = double-buffered,
* GL_FALSE = single buffered
* alpha_flag - GL_TRUE = create software alpha buffer,
* GL_FALSE = no software alpha buffer
*
* Note: Indexed mode requires double buffering under Windows.
*
* Return: a WMesa_context or NULL if error.
*/
extern WMesaContext WMesaCreateContext(HDC hDC,HPALETTE* pPal,
GLboolean rgb_flag,
GLboolean db_flag,
GLboolean alpha_flag);
/*
* Destroy a rendering context as returned by WMesaCreateContext()
*/
extern void WMesaDestroyContext( WMesaContext ctx );
/*
* Make the specified context the current one.
*/
extern void WMesaMakeCurrent( WMesaContext ctx, HDC hdc );
/*
* Return a handle to the current context.
*/
extern WMesaContext WMesaGetCurrentContext( void );
/*
* Swap the front and back buffers for the current context. No action
* taken if the context is not double buffered.
*/
extern void WMesaSwapBuffers(HDC hdc);
/*
* In indexed color mode we need to know when the palette changes.
*/
extern void WMesaPaletteChange(HPALETTE Pal);
extern void WMesaMove(void);
void WMesaShareLists(WMesaContext ctx_to_share, WMesaContext ctx);
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -26,7 +26,7 @@
/* Khronos platform-specific types and definitions.
*
* $Revision: 9356 $ on $Date: 2009-10-21 02:52:25 -0700 (Wed, 21 Oct 2009) $
* $Revision: 23298 $ on $Date: 2013-09-30 17:07:13 -0700 (Mon, 30 Sep 2013) $
*
* Adopters may modify this file to suit their platform. Adopters are
* encouraged to submit platform specific modifications to the Khronos
@@ -106,9 +106,9 @@
#elif defined (__SYMBIAN32__)
# define KHRONOS_APICALL IMPORT_C
#elif (defined(__GNUC__) && (__GNUC__ * 100 + __GNUC_MINOR__) >= 303) \
|| (defined(__SUNPRO_C) && (__SUNPRO_C >= 0x590))
|| (defined(__SUNPRO_C) && (__SUNPRO_C >= 0x590))
/* KHRONOS_APIATTRIBUTES is not used by the client API headers yet */
# define KHRONOS_APICALL __attribute__((visibility("default")))
# define KHRONOS_APICALL __attribute__((visibility("default")))
#else
# define KHRONOS_APICALL
#endif
@@ -229,10 +229,23 @@ typedef signed char khronos_int8_t;
typedef unsigned char khronos_uint8_t;
typedef signed short int khronos_int16_t;
typedef unsigned short int khronos_uint16_t;
/*
* Types that differ between LLP64 and LP64 architectures - in LLP64,
* pointers are 64 bits, but 'long' is still 32 bits. Win64 appears
* to be the only LLP64 architecture in current use.
*/
#ifdef _WIN64
typedef signed long long int khronos_intptr_t;
typedef unsigned long long int khronos_uintptr_t;
typedef signed long long int khronos_ssize_t;
typedef unsigned long long int khronos_usize_t;
#else
typedef signed long int khronos_intptr_t;
typedef unsigned long int khronos_uintptr_t;
typedef signed long int khronos_ssize_t;
typedef unsigned long int khronos_usize_t;
#endif
#if KHRONOS_SUPPORT_FLOAT
/*

View File

@@ -1,746 +0,0 @@
/* $Revision: 9203 $ on $Date:: 2009-10-07 02:21:52 -0700 #$ */
/*------------------------------------------------------------------------
*
* OpenVG 1.1 Reference Implementation
* -------------------------------------
*
* Copyright (c) 2008 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and /or associated documentation files
* (the "Materials "), to deal in the Materials without restriction,
* including without limitation the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Materials,
* and to permit persons to whom the Materials are furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE MATERIALS OR
* THE USE OR OTHER DEALINGS IN THE MATERIALS.
*
*//**
* \file
* \brief OpenVG 1.1 API.
*//*-------------------------------------------------------------------*/
#ifndef _OPENVG_H
#define _OPENVG_H
#include <VG/vgplatform.h>
#ifdef __cplusplus
extern "C" {
#endif
#define OPENVG_VERSION_1_0 1
#define OPENVG_VERSION_1_0_1 1
#define OPENVG_VERSION_1_1 2
#ifndef VG_MAXSHORT
#define VG_MAXSHORT 0x7FFF
#endif
#ifndef VG_MAXINT
#define VG_MAXINT 0x7FFFFFFF
#endif
#ifndef VG_MAX_ENUM
#define VG_MAX_ENUM 0x7FFFFFFF
#endif
typedef VGuint VGHandle;
typedef VGHandle VGPath;
typedef VGHandle VGImage;
typedef VGHandle VGMaskLayer;
typedef VGHandle VGFont;
typedef VGHandle VGPaint;
#define VG_INVALID_HANDLE ((VGHandle)0)
typedef enum {
VG_FALSE = 0,
VG_TRUE = 1,
VG_BOOLEAN_FORCE_SIZE = VG_MAX_ENUM
} VGboolean;
typedef enum {
VG_NO_ERROR = 0,
VG_BAD_HANDLE_ERROR = 0x1000,
VG_ILLEGAL_ARGUMENT_ERROR = 0x1001,
VG_OUT_OF_MEMORY_ERROR = 0x1002,
VG_PATH_CAPABILITY_ERROR = 0x1003,
VG_UNSUPPORTED_IMAGE_FORMAT_ERROR = 0x1004,
VG_UNSUPPORTED_PATH_FORMAT_ERROR = 0x1005,
VG_IMAGE_IN_USE_ERROR = 0x1006,
VG_NO_CONTEXT_ERROR = 0x1007,
VG_ERROR_CODE_FORCE_SIZE = VG_MAX_ENUM
} VGErrorCode;
typedef enum {
/* Mode settings */
VG_MATRIX_MODE = 0x1100,
VG_FILL_RULE = 0x1101,
VG_IMAGE_QUALITY = 0x1102,
VG_RENDERING_QUALITY = 0x1103,
VG_BLEND_MODE = 0x1104,
VG_IMAGE_MODE = 0x1105,
/* Scissoring rectangles */
VG_SCISSOR_RECTS = 0x1106,
/* Color Transformation */
VG_COLOR_TRANSFORM = 0x1170,
VG_COLOR_TRANSFORM_VALUES = 0x1171,
/* Stroke parameters */
VG_STROKE_LINE_WIDTH = 0x1110,
VG_STROKE_CAP_STYLE = 0x1111,
VG_STROKE_JOIN_STYLE = 0x1112,
VG_STROKE_MITER_LIMIT = 0x1113,
VG_STROKE_DASH_PATTERN = 0x1114,
VG_STROKE_DASH_PHASE = 0x1115,
VG_STROKE_DASH_PHASE_RESET = 0x1116,
/* Edge fill color for VG_TILE_FILL tiling mode */
VG_TILE_FILL_COLOR = 0x1120,
/* Color for vgClear */
VG_CLEAR_COLOR = 0x1121,
/* Glyph origin */
VG_GLYPH_ORIGIN = 0x1122,
/* Enable/disable alpha masking and scissoring */
VG_MASKING = 0x1130,
VG_SCISSORING = 0x1131,
/* Pixel layout information */
VG_PIXEL_LAYOUT = 0x1140,
VG_SCREEN_LAYOUT = 0x1141,
/* Source format selection for image filters */
VG_FILTER_FORMAT_LINEAR = 0x1150,
VG_FILTER_FORMAT_PREMULTIPLIED = 0x1151,
/* Destination write enable mask for image filters */
VG_FILTER_CHANNEL_MASK = 0x1152,
/* Implementation limits (read-only) */
VG_MAX_SCISSOR_RECTS = 0x1160,
VG_MAX_DASH_COUNT = 0x1161,
VG_MAX_KERNEL_SIZE = 0x1162,
VG_MAX_SEPARABLE_KERNEL_SIZE = 0x1163,
VG_MAX_COLOR_RAMP_STOPS = 0x1164,
VG_MAX_IMAGE_WIDTH = 0x1165,
VG_MAX_IMAGE_HEIGHT = 0x1166,
VG_MAX_IMAGE_PIXELS = 0x1167,
VG_MAX_IMAGE_BYTES = 0x1168,
VG_MAX_FLOAT = 0x1169,
VG_MAX_GAUSSIAN_STD_DEVIATION = 0x116A,
VG_PARAM_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGParamType;
typedef enum {
VG_RENDERING_QUALITY_NONANTIALIASED = 0x1200,
VG_RENDERING_QUALITY_FASTER = 0x1201,
VG_RENDERING_QUALITY_BETTER = 0x1202, /* Default */
VG_RENDERING_QUALITY_FORCE_SIZE = VG_MAX_ENUM
} VGRenderingQuality;
typedef enum {
VG_PIXEL_LAYOUT_UNKNOWN = 0x1300,
VG_PIXEL_LAYOUT_RGB_VERTICAL = 0x1301,
VG_PIXEL_LAYOUT_BGR_VERTICAL = 0x1302,
VG_PIXEL_LAYOUT_RGB_HORIZONTAL = 0x1303,
VG_PIXEL_LAYOUT_BGR_HORIZONTAL = 0x1304,
VG_PIXEL_LAYOUT_FORCE_SIZE = VG_MAX_ENUM
} VGPixelLayout;
typedef enum {
VG_MATRIX_PATH_USER_TO_SURFACE = 0x1400,
VG_MATRIX_IMAGE_USER_TO_SURFACE = 0x1401,
VG_MATRIX_FILL_PAINT_TO_USER = 0x1402,
VG_MATRIX_STROKE_PAINT_TO_USER = 0x1403,
VG_MATRIX_GLYPH_USER_TO_SURFACE = 0x1404,
VG_MATRIX_MODE_FORCE_SIZE = VG_MAX_ENUM
} VGMatrixMode;
typedef enum {
VG_CLEAR_MASK = 0x1500,
VG_FILL_MASK = 0x1501,
VG_SET_MASK = 0x1502,
VG_UNION_MASK = 0x1503,
VG_INTERSECT_MASK = 0x1504,
VG_SUBTRACT_MASK = 0x1505,
VG_MASK_OPERATION_FORCE_SIZE = VG_MAX_ENUM
} VGMaskOperation;
#define VG_PATH_FORMAT_STANDARD 0
typedef enum {
VG_PATH_DATATYPE_S_8 = 0,
VG_PATH_DATATYPE_S_16 = 1,
VG_PATH_DATATYPE_S_32 = 2,
VG_PATH_DATATYPE_F = 3,
VG_PATH_DATATYPE_FORCE_SIZE = VG_MAX_ENUM
} VGPathDatatype;
typedef enum {
VG_ABSOLUTE = 0,
VG_RELATIVE = 1,
VG_PATH_ABS_REL_FORCE_SIZE = VG_MAX_ENUM
} VGPathAbsRel;
typedef enum {
VG_CLOSE_PATH = ( 0 << 1),
VG_MOVE_TO = ( 1 << 1),
VG_LINE_TO = ( 2 << 1),
VG_HLINE_TO = ( 3 << 1),
VG_VLINE_TO = ( 4 << 1),
VG_QUAD_TO = ( 5 << 1),
VG_CUBIC_TO = ( 6 << 1),
VG_SQUAD_TO = ( 7 << 1),
VG_SCUBIC_TO = ( 8 << 1),
VG_SCCWARC_TO = ( 9 << 1),
VG_SCWARC_TO = (10 << 1),
VG_LCCWARC_TO = (11 << 1),
VG_LCWARC_TO = (12 << 1),
VG_PATH_SEGMENT_FORCE_SIZE = VG_MAX_ENUM
} VGPathSegment;
typedef enum {
VG_MOVE_TO_ABS = VG_MOVE_TO | VG_ABSOLUTE,
VG_MOVE_TO_REL = VG_MOVE_TO | VG_RELATIVE,
VG_LINE_TO_ABS = VG_LINE_TO | VG_ABSOLUTE,
VG_LINE_TO_REL = VG_LINE_TO | VG_RELATIVE,
VG_HLINE_TO_ABS = VG_HLINE_TO | VG_ABSOLUTE,
VG_HLINE_TO_REL = VG_HLINE_TO | VG_RELATIVE,
VG_VLINE_TO_ABS = VG_VLINE_TO | VG_ABSOLUTE,
VG_VLINE_TO_REL = VG_VLINE_TO | VG_RELATIVE,
VG_QUAD_TO_ABS = VG_QUAD_TO | VG_ABSOLUTE,
VG_QUAD_TO_REL = VG_QUAD_TO | VG_RELATIVE,
VG_CUBIC_TO_ABS = VG_CUBIC_TO | VG_ABSOLUTE,
VG_CUBIC_TO_REL = VG_CUBIC_TO | VG_RELATIVE,
VG_SQUAD_TO_ABS = VG_SQUAD_TO | VG_ABSOLUTE,
VG_SQUAD_TO_REL = VG_SQUAD_TO | VG_RELATIVE,
VG_SCUBIC_TO_ABS = VG_SCUBIC_TO | VG_ABSOLUTE,
VG_SCUBIC_TO_REL = VG_SCUBIC_TO | VG_RELATIVE,
VG_SCCWARC_TO_ABS = VG_SCCWARC_TO | VG_ABSOLUTE,
VG_SCCWARC_TO_REL = VG_SCCWARC_TO | VG_RELATIVE,
VG_SCWARC_TO_ABS = VG_SCWARC_TO | VG_ABSOLUTE,
VG_SCWARC_TO_REL = VG_SCWARC_TO | VG_RELATIVE,
VG_LCCWARC_TO_ABS = VG_LCCWARC_TO | VG_ABSOLUTE,
VG_LCCWARC_TO_REL = VG_LCCWARC_TO | VG_RELATIVE,
VG_LCWARC_TO_ABS = VG_LCWARC_TO | VG_ABSOLUTE,
VG_LCWARC_TO_REL = VG_LCWARC_TO | VG_RELATIVE,
VG_PATH_COMMAND_FORCE_SIZE = VG_MAX_ENUM
} VGPathCommand;
typedef enum {
VG_PATH_CAPABILITY_APPEND_FROM = (1 << 0),
VG_PATH_CAPABILITY_APPEND_TO = (1 << 1),
VG_PATH_CAPABILITY_MODIFY = (1 << 2),
VG_PATH_CAPABILITY_TRANSFORM_FROM = (1 << 3),
VG_PATH_CAPABILITY_TRANSFORM_TO = (1 << 4),
VG_PATH_CAPABILITY_INTERPOLATE_FROM = (1 << 5),
VG_PATH_CAPABILITY_INTERPOLATE_TO = (1 << 6),
VG_PATH_CAPABILITY_PATH_LENGTH = (1 << 7),
VG_PATH_CAPABILITY_POINT_ALONG_PATH = (1 << 8),
VG_PATH_CAPABILITY_TANGENT_ALONG_PATH = (1 << 9),
VG_PATH_CAPABILITY_PATH_BOUNDS = (1 << 10),
VG_PATH_CAPABILITY_PATH_TRANSFORMED_BOUNDS = (1 << 11),
VG_PATH_CAPABILITY_ALL = (1 << 12) - 1,
VG_PATH_CAPABILITIES_FORCE_SIZE = VG_MAX_ENUM
} VGPathCapabilities;
typedef enum {
VG_PATH_FORMAT = 0x1600,
VG_PATH_DATATYPE = 0x1601,
VG_PATH_SCALE = 0x1602,
VG_PATH_BIAS = 0x1603,
VG_PATH_NUM_SEGMENTS = 0x1604,
VG_PATH_NUM_COORDS = 0x1605,
VG_PATH_PARAM_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGPathParamType;
typedef enum {
VG_CAP_BUTT = 0x1700,
VG_CAP_ROUND = 0x1701,
VG_CAP_SQUARE = 0x1702,
VG_CAP_STYLE_FORCE_SIZE = VG_MAX_ENUM
} VGCapStyle;
typedef enum {
VG_JOIN_MITER = 0x1800,
VG_JOIN_ROUND = 0x1801,
VG_JOIN_BEVEL = 0x1802,
VG_JOIN_STYLE_FORCE_SIZE = VG_MAX_ENUM
} VGJoinStyle;
typedef enum {
VG_EVEN_ODD = 0x1900,
VG_NON_ZERO = 0x1901,
VG_FILL_RULE_FORCE_SIZE = VG_MAX_ENUM
} VGFillRule;
typedef enum {
VG_STROKE_PATH = (1 << 0),
VG_FILL_PATH = (1 << 1),
VG_PAINT_MODE_FORCE_SIZE = VG_MAX_ENUM
} VGPaintMode;
typedef enum {
/* Color paint parameters */
VG_PAINT_TYPE = 0x1A00,
VG_PAINT_COLOR = 0x1A01,
VG_PAINT_COLOR_RAMP_SPREAD_MODE = 0x1A02,
VG_PAINT_COLOR_RAMP_PREMULTIPLIED = 0x1A07,
VG_PAINT_COLOR_RAMP_STOPS = 0x1A03,
/* Linear gradient paint parameters */
VG_PAINT_LINEAR_GRADIENT = 0x1A04,
/* Radial gradient paint parameters */
VG_PAINT_RADIAL_GRADIENT = 0x1A05,
/* Pattern paint parameters */
VG_PAINT_PATTERN_TILING_MODE = 0x1A06,
VG_PAINT_PARAM_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGPaintParamType;
typedef enum {
VG_PAINT_TYPE_COLOR = 0x1B00,
VG_PAINT_TYPE_LINEAR_GRADIENT = 0x1B01,
VG_PAINT_TYPE_RADIAL_GRADIENT = 0x1B02,
VG_PAINT_TYPE_PATTERN = 0x1B03,
VG_PAINT_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGPaintType;
typedef enum {
VG_COLOR_RAMP_SPREAD_PAD = 0x1C00,
VG_COLOR_RAMP_SPREAD_REPEAT = 0x1C01,
VG_COLOR_RAMP_SPREAD_REFLECT = 0x1C02,
VG_COLOR_RAMP_SPREAD_MODE_FORCE_SIZE = VG_MAX_ENUM
} VGColorRampSpreadMode;
typedef enum {
VG_TILE_FILL = 0x1D00,
VG_TILE_PAD = 0x1D01,
VG_TILE_REPEAT = 0x1D02,
VG_TILE_REFLECT = 0x1D03,
VG_TILING_MODE_FORCE_SIZE = VG_MAX_ENUM
} VGTilingMode;
typedef enum {
/* RGB{A,X} channel ordering */
VG_sRGBX_8888 = 0,
VG_sRGBA_8888 = 1,
VG_sRGBA_8888_PRE = 2,
VG_sRGB_565 = 3,
VG_sRGBA_5551 = 4,
VG_sRGBA_4444 = 5,
VG_sL_8 = 6,
VG_lRGBX_8888 = 7,
VG_lRGBA_8888 = 8,
VG_lRGBA_8888_PRE = 9,
VG_lL_8 = 10,
VG_A_8 = 11,
VG_BW_1 = 12,
VG_A_1 = 13,
VG_A_4 = 14,
/* {A,X}RGB channel ordering */
VG_sXRGB_8888 = 0 | (1 << 6),
VG_sARGB_8888 = 1 | (1 << 6),
VG_sARGB_8888_PRE = 2 | (1 << 6),
VG_sARGB_1555 = 4 | (1 << 6),
VG_sARGB_4444 = 5 | (1 << 6),
VG_lXRGB_8888 = 7 | (1 << 6),
VG_lARGB_8888 = 8 | (1 << 6),
VG_lARGB_8888_PRE = 9 | (1 << 6),
/* BGR{A,X} channel ordering */
VG_sBGRX_8888 = 0 | (1 << 7),
VG_sBGRA_8888 = 1 | (1 << 7),
VG_sBGRA_8888_PRE = 2 | (1 << 7),
VG_sBGR_565 = 3 | (1 << 7),
VG_sBGRA_5551 = 4 | (1 << 7),
VG_sBGRA_4444 = 5 | (1 << 7),
VG_lBGRX_8888 = 7 | (1 << 7),
VG_lBGRA_8888 = 8 | (1 << 7),
VG_lBGRA_8888_PRE = 9 | (1 << 7),
/* {A,X}BGR channel ordering */
VG_sXBGR_8888 = 0 | (1 << 6) | (1 << 7),
VG_sABGR_8888 = 1 | (1 << 6) | (1 << 7),
VG_sABGR_8888_PRE = 2 | (1 << 6) | (1 << 7),
VG_sABGR_1555 = 4 | (1 << 6) | (1 << 7),
VG_sABGR_4444 = 5 | (1 << 6) | (1 << 7),
VG_lXBGR_8888 = 7 | (1 << 6) | (1 << 7),
VG_lABGR_8888 = 8 | (1 << 6) | (1 << 7),
VG_lABGR_8888_PRE = 9 | (1 << 6) | (1 << 7),
VG_IMAGE_FORMAT_FORCE_SIZE = VG_MAX_ENUM
} VGImageFormat;
typedef enum {
VG_IMAGE_QUALITY_NONANTIALIASED = (1 << 0),
VG_IMAGE_QUALITY_FASTER = (1 << 1),
VG_IMAGE_QUALITY_BETTER = (1 << 2),
VG_IMAGE_QUALITY_FORCE_SIZE = VG_MAX_ENUM
} VGImageQuality;
typedef enum {
VG_IMAGE_FORMAT = 0x1E00,
VG_IMAGE_WIDTH = 0x1E01,
VG_IMAGE_HEIGHT = 0x1E02,
VG_IMAGE_PARAM_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGImageParamType;
typedef enum {
VG_DRAW_IMAGE_NORMAL = 0x1F00,
VG_DRAW_IMAGE_MULTIPLY = 0x1F01,
VG_DRAW_IMAGE_STENCIL = 0x1F02,
VG_IMAGE_MODE_FORCE_SIZE = VG_MAX_ENUM
} VGImageMode;
typedef enum {
VG_RED = (1 << 3),
VG_GREEN = (1 << 2),
VG_BLUE = (1 << 1),
VG_ALPHA = (1 << 0),
VG_IMAGE_CHANNEL_FORCE_SIZE = VG_MAX_ENUM
} VGImageChannel;
typedef enum {
VG_BLEND_SRC = 0x2000,
VG_BLEND_SRC_OVER = 0x2001,
VG_BLEND_DST_OVER = 0x2002,
VG_BLEND_SRC_IN = 0x2003,
VG_BLEND_DST_IN = 0x2004,
VG_BLEND_MULTIPLY = 0x2005,
VG_BLEND_SCREEN = 0x2006,
VG_BLEND_DARKEN = 0x2007,
VG_BLEND_LIGHTEN = 0x2008,
VG_BLEND_ADDITIVE = 0x2009,
VG_BLEND_MODE_FORCE_SIZE = VG_MAX_ENUM
} VGBlendMode;
typedef enum {
VG_FONT_NUM_GLYPHS = 0x2F00,
VG_FONT_PARAM_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGFontParamType;
typedef enum {
VG_IMAGE_FORMAT_QUERY = 0x2100,
VG_PATH_DATATYPE_QUERY = 0x2101,
VG_HARDWARE_QUERY_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGHardwareQueryType;
typedef enum {
VG_HARDWARE_ACCELERATED = 0x2200,
VG_HARDWARE_UNACCELERATED = 0x2201,
VG_HARDWARE_QUERY_RESULT_FORCE_SIZE = VG_MAX_ENUM
} VGHardwareQueryResult;
typedef enum {
VG_VENDOR = 0x2300,
VG_RENDERER = 0x2301,
VG_VERSION = 0x2302,
VG_EXTENSIONS = 0x2303,
VG_STRING_ID_FORCE_SIZE = VG_MAX_ENUM
} VGStringID;
/* Function Prototypes */
#ifndef VG_API_CALL
# error VG_API_CALL must be defined
#endif
#ifndef VG_API_ENTRY
# error VG_API_ENTRY must be defined
#endif
#ifndef VG_API_EXIT
# error VG_API_EXIT must be defined
#endif
VG_API_CALL VGErrorCode VG_API_ENTRY vgGetError(void) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgFlush(void) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgFinish(void) VG_API_EXIT;
/* Getters and Setters */
VG_API_CALL void VG_API_ENTRY vgSetf (VGParamType type, VGfloat value) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSeti (VGParamType type, VGint value) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetfv(VGParamType type, VGint count,
const VGfloat * values) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetiv(VGParamType type, VGint count,
const VGint * values) VG_API_EXIT;
VG_API_CALL VGfloat VG_API_ENTRY vgGetf(VGParamType type) VG_API_EXIT;
VG_API_CALL VGint VG_API_ENTRY vgGeti(VGParamType type) VG_API_EXIT;
VG_API_CALL VGint VG_API_ENTRY vgGetVectorSize(VGParamType type) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetfv(VGParamType type, VGint count, VGfloat * values) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetiv(VGParamType type, VGint count, VGint * values) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetParameterf(VGHandle object,
VGint paramType,
VGfloat value) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetParameteri(VGHandle object,
VGint paramType,
VGint value) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetParameterfv(VGHandle object,
VGint paramType,
VGint count, const VGfloat * values) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetParameteriv(VGHandle object,
VGint paramType,
VGint count, const VGint * values) VG_API_EXIT;
VG_API_CALL VGfloat VG_API_ENTRY vgGetParameterf(VGHandle object,
VGint paramType) VG_API_EXIT;
VG_API_CALL VGint VG_API_ENTRY vgGetParameteri(VGHandle object,
VGint paramType);
VG_API_CALL VGint VG_API_ENTRY vgGetParameterVectorSize(VGHandle object,
VGint paramType) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetParameterfv(VGHandle object,
VGint paramType,
VGint count, VGfloat * values) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetParameteriv(VGHandle object,
VGint paramType,
VGint count, VGint * values) VG_API_EXIT;
/* Matrix Manipulation */
VG_API_CALL void VG_API_ENTRY vgLoadIdentity(void) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgLoadMatrix(const VGfloat * m) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetMatrix(VGfloat * m) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgMultMatrix(const VGfloat * m) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgTranslate(VGfloat tx, VGfloat ty) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgScale(VGfloat sx, VGfloat sy) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgShear(VGfloat shx, VGfloat shy) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgRotate(VGfloat angle) VG_API_EXIT;
/* Masking and Clearing */
VG_API_CALL void VG_API_ENTRY vgMask(VGHandle mask, VGMaskOperation operation,
VGint x, VGint y,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgRenderToMask(VGPath path,
VGbitfield paintModes,
VGMaskOperation operation) VG_API_EXIT;
VG_API_CALL VGMaskLayer VG_API_ENTRY vgCreateMaskLayer(VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDestroyMaskLayer(VGMaskLayer maskLayer) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgFillMaskLayer(VGMaskLayer maskLayer,
VGint x, VGint y,
VGint width, VGint height,
VGfloat value) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgCopyMask(VGMaskLayer maskLayer,
VGint dx, VGint dy,
VGint sx, VGint sy,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgClear(VGint x, VGint y, VGint width, VGint height) VG_API_EXIT;
/* Paths */
VG_API_CALL VGPath VG_API_ENTRY vgCreatePath(VGint pathFormat,
VGPathDatatype datatype,
VGfloat scale, VGfloat bias,
VGint segmentCapacityHint,
VGint coordCapacityHint,
VGbitfield capabilities) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgClearPath(VGPath path, VGbitfield capabilities) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDestroyPath(VGPath path) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgRemovePathCapabilities(VGPath path,
VGbitfield capabilities) VG_API_EXIT;
VG_API_CALL VGbitfield VG_API_ENTRY vgGetPathCapabilities(VGPath path) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgAppendPath(VGPath dstPath, VGPath srcPath) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgAppendPathData(VGPath dstPath,
VGint numSegments,
const VGubyte * pathSegments,
const void * pathData) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgModifyPathCoords(VGPath dstPath, VGint startIndex,
VGint numSegments,
const void * pathData) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgTransformPath(VGPath dstPath, VGPath srcPath) VG_API_EXIT;
VG_API_CALL VGboolean VG_API_ENTRY vgInterpolatePath(VGPath dstPath,
VGPath startPath,
VGPath endPath,
VGfloat amount) VG_API_EXIT;
VG_API_CALL VGfloat VG_API_ENTRY vgPathLength(VGPath path,
VGint startSegment, VGint numSegments) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgPointAlongPath(VGPath path,
VGint startSegment, VGint numSegments,
VGfloat distance,
VGfloat * x, VGfloat * y,
VGfloat * tangentX, VGfloat * tangentY) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgPathBounds(VGPath path,
VGfloat * minX, VGfloat * minY,
VGfloat * width, VGfloat * height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgPathTransformedBounds(VGPath path,
VGfloat * minX, VGfloat * minY,
VGfloat * width, VGfloat * height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDrawPath(VGPath path, VGbitfield paintModes) VG_API_EXIT;
/* Paint */
VG_API_CALL VGPaint VG_API_ENTRY vgCreatePaint(void) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDestroyPaint(VGPaint paint) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetPaint(VGPaint paint, VGbitfield paintModes) VG_API_EXIT;
VG_API_CALL VGPaint VG_API_ENTRY vgGetPaint(VGPaintMode paintMode) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetColor(VGPaint paint, VGuint rgba) VG_API_EXIT;
VG_API_CALL VGuint VG_API_ENTRY vgGetColor(VGPaint paint) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgPaintPattern(VGPaint paint, VGImage pattern) VG_API_EXIT;
/* Images */
VG_API_CALL VGImage VG_API_ENTRY vgCreateImage(VGImageFormat format,
VGint width, VGint height,
VGbitfield allowedQuality) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDestroyImage(VGImage image) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgClearImage(VGImage image,
VGint x, VGint y, VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgImageSubData(VGImage image,
const void * data, VGint dataStride,
VGImageFormat dataFormat,
VGint x, VGint y, VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetImageSubData(VGImage image,
void * data, VGint dataStride,
VGImageFormat dataFormat,
VGint x, VGint y,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL VGImage VG_API_ENTRY vgChildImage(VGImage parent,
VGint x, VGint y, VGint width, VGint height) VG_API_EXIT;
VG_API_CALL VGImage VG_API_ENTRY vgGetParent(VGImage image) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgCopyImage(VGImage dst, VGint dx, VGint dy,
VGImage src, VGint sx, VGint sy,
VGint width, VGint height,
VGboolean dither) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDrawImage(VGImage image) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetPixels(VGint dx, VGint dy,
VGImage src, VGint sx, VGint sy,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgWritePixels(const void * data, VGint dataStride,
VGImageFormat dataFormat,
VGint dx, VGint dy,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGetPixels(VGImage dst, VGint dx, VGint dy,
VGint sx, VGint sy,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgReadPixels(void * data, VGint dataStride,
VGImageFormat dataFormat,
VGint sx, VGint sy,
VGint width, VGint height) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgCopyPixels(VGint dx, VGint dy,
VGint sx, VGint sy,
VGint width, VGint height) VG_API_EXIT;
/* Text */
VG_API_CALL VGFont VG_API_ENTRY vgCreateFont(VGint glyphCapacityHint) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDestroyFont(VGFont font) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetGlyphToPath(VGFont font,
VGuint glyphIndex,
VGPath path,
VGboolean isHinted,
const VGfloat glyphOrigin [2],
const VGfloat escapement[2]) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSetGlyphToImage(VGFont font,
VGuint glyphIndex,
VGImage image,
const VGfloat glyphOrigin [2],
const VGfloat escapement[2]) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgClearGlyph(VGFont font,VGuint glyphIndex) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDrawGlyph(VGFont font,
VGuint glyphIndex,
VGbitfield paintModes,
VGboolean allowAutoHinting) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgDrawGlyphs(VGFont font,
VGint glyphCount,
const VGuint *glyphIndices,
const VGfloat *adjustments_x,
const VGfloat *adjustments_y,
VGbitfield paintModes,
VGboolean allowAutoHinting) VG_API_EXIT;
/* Image Filters */
VG_API_CALL void VG_API_ENTRY vgColorMatrix(VGImage dst, VGImage src,
const VGfloat * matrix) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgConvolve(VGImage dst, VGImage src,
VGint kernelWidth, VGint kernelHeight,
VGint shiftX, VGint shiftY,
const VGshort * kernel,
VGfloat scale,
VGfloat bias,
VGTilingMode tilingMode) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgSeparableConvolve(VGImage dst, VGImage src,
VGint kernelWidth,
VGint kernelHeight,
VGint shiftX, VGint shiftY,
const VGshort * kernelX,
const VGshort * kernelY,
VGfloat scale,
VGfloat bias,
VGTilingMode tilingMode) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgGaussianBlur(VGImage dst, VGImage src,
VGfloat stdDeviationX,
VGfloat stdDeviationY,
VGTilingMode tilingMode) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgLookup(VGImage dst, VGImage src,
const VGubyte * redLUT,
const VGubyte * greenLUT,
const VGubyte * blueLUT,
const VGubyte * alphaLUT,
VGboolean outputLinear,
VGboolean outputPremultiplied) VG_API_EXIT;
VG_API_CALL void VG_API_ENTRY vgLookupSingle(VGImage dst, VGImage src,
const VGuint * lookupTable,
VGImageChannel sourceChannel,
VGboolean outputLinear,
VGboolean outputPremultiplied) VG_API_EXIT;
/* Hardware Queries */
VG_API_CALL VGHardwareQueryResult VG_API_ENTRY vgHardwareQuery(VGHardwareQueryType key,
VGint setting) VG_API_EXIT;
/* Renderer and Extension Information */
VG_API_CALL const VGubyte * VG_API_ENTRY vgGetString(VGStringID name) VG_API_EXIT;
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* _OPENVG_H */

View File

@@ -1,233 +0,0 @@
/* $Revision: 6810 $ on $Date:: 2008-10-29 07:31:37 -0700 #$ */
/*------------------------------------------------------------------------
*
* VG extensions Reference Implementation
* -------------------------------------
*
* Copyright (c) 2008 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and /or associated documentation files
* (the "Materials "), to deal in the Materials without restriction,
* including without limitation the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Materials,
* and to permit persons to whom the Materials are furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE MATERIALS OR
* THE USE OR OTHER DEALINGS IN THE MATERIALS.
*
*//**
* \file
* \brief VG extensions
*//*-------------------------------------------------------------------*/
#ifndef _VGEXT_H
#define _VGEXT_H
#ifdef __cplusplus
extern "C" {
#endif
#include <VG/openvg.h>
#include <VG/vgu.h>
#ifndef VG_API_ENTRYP
# define VG_API_ENTRYP VG_API_ENTRY*
#endif
#ifndef VGU_API_ENTRYP
# define VGU_API_ENTRYP VGU_API_ENTRY*
#endif
/*-------------------------------------------------------------------------------
* KHR extensions
*------------------------------------------------------------------------------*/
typedef enum {
#ifndef VG_KHR_iterative_average_blur
VG_MAX_AVERAGE_BLUR_DIMENSION_KHR = 0x116B,
VG_AVERAGE_BLUR_DIMENSION_RESOLUTION_KHR = 0x116C,
VG_MAX_AVERAGE_BLUR_ITERATIONS_KHR = 0x116D,
#endif
VG_PARAM_TYPE_KHR_FORCE_SIZE = VG_MAX_ENUM
} VGParamTypeKHR;
#ifndef VG_KHR_EGL_image
#define VG_KHR_EGL_image 1
/* VGEGLImageKHR is an opaque handle to an EGLImage */
typedef void* VGeglImageKHR;
#ifdef VG_VGEXT_PROTOTYPES
VG_API_CALL VGImage VG_API_ENTRY vgCreateEGLImageTargetKHR(VGeglImageKHR image);
#endif
typedef VGImage (VG_API_ENTRYP PFNVGCREATEEGLIMAGETARGETKHRPROC) (VGeglImageKHR image);
#endif
#ifndef VG_KHR_iterative_average_blur
#define VG_KHR_iterative_average_blur 1
#ifdef VG_VGEXT_PROTOTYPES
VG_API_CALL void vgIterativeAverageBlurKHR(VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGTilingMode tilingMode);
#endif
typedef void (VG_API_ENTRYP PFNVGITERATIVEAVERAGEBLURKHRPROC) (VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGTilingMode tilingMode);
#endif
#ifndef VG_KHR_advanced_blending
#define VG_KHR_advanced_blending 1
typedef enum {
VG_BLEND_OVERLAY_KHR = 0x2010,
VG_BLEND_HARDLIGHT_KHR = 0x2011,
VG_BLEND_SOFTLIGHT_SVG_KHR = 0x2012,
VG_BLEND_SOFTLIGHT_KHR = 0x2013,
VG_BLEND_COLORDODGE_KHR = 0x2014,
VG_BLEND_COLORBURN_KHR = 0x2015,
VG_BLEND_DIFFERENCE_KHR = 0x2016,
VG_BLEND_SUBTRACT_KHR = 0x2017,
VG_BLEND_INVERT_KHR = 0x2018,
VG_BLEND_EXCLUSION_KHR = 0x2019,
VG_BLEND_LINEARDODGE_KHR = 0x201a,
VG_BLEND_LINEARBURN_KHR = 0x201b,
VG_BLEND_VIVIDLIGHT_KHR = 0x201c,
VG_BLEND_LINEARLIGHT_KHR = 0x201d,
VG_BLEND_PINLIGHT_KHR = 0x201e,
VG_BLEND_HARDMIX_KHR = 0x201f,
VG_BLEND_CLEAR_KHR = 0x2020,
VG_BLEND_DST_KHR = 0x2021,
VG_BLEND_SRC_OUT_KHR = 0x2022,
VG_BLEND_DST_OUT_KHR = 0x2023,
VG_BLEND_SRC_ATOP_KHR = 0x2024,
VG_BLEND_DST_ATOP_KHR = 0x2025,
VG_BLEND_XOR_KHR = 0x2026,
VG_BLEND_MODE_KHR_FORCE_SIZE= VG_MAX_ENUM
} VGBlendModeKHR;
#endif
#ifndef VG_KHR_parametric_filter
#define VG_KHR_parametric_filter 1
typedef enum {
VG_PF_OBJECT_VISIBLE_FLAG_KHR = (1 << 0),
VG_PF_KNOCKOUT_FLAG_KHR = (1 << 1),
VG_PF_OUTER_FLAG_KHR = (1 << 2),
VG_PF_INNER_FLAG_KHR = (1 << 3),
VG_PF_TYPE_KHR_FORCE_SIZE = VG_MAX_ENUM
} VGPfTypeKHR;
typedef enum {
VGU_IMAGE_IN_USE_ERROR = 0xF010,
VGU_ERROR_CODE_KHR_FORCE_SIZE = VG_MAX_ENUM
} VGUErrorCodeKHR;
#ifdef VG_VGEXT_PROTOTYPES
VG_API_CALL void VG_API_ENTRY vgParametricFilterKHR(VGImage dst,VGImage src,VGImage blur,VGfloat strength,VGfloat offsetX,VGfloat offsetY,VGbitfield filterFlags,VGPaint highlightPaint,VGPaint shadowPaint);
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguDropShadowKHR(VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint shadowColorRGBA);
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguGlowKHR(VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint glowColorRGBA) ;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguBevelKHR(VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint highlightColorRGBA,VGuint shadowColorRGBA);
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguGradientGlowKHR(VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint stopsCount,const VGfloat* glowColorRampStops);
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguGradientBevelKHR(VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint stopsCount,const VGfloat* bevelColorRampStops);
#endif
typedef void (VG_API_ENTRYP PFNVGPARAMETRICFILTERKHRPROC) (VGImage dst,VGImage src,VGImage blur,VGfloat strength,VGfloat offsetX,VGfloat offsetY,VGbitfield filterFlags,VGPaint highlightPaint,VGPaint shadowPaint);
typedef VGUErrorCode (VGU_API_ENTRYP PFNVGUDROPSHADOWKHRPROC) (VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint shadowColorRGBA);
typedef VGUErrorCode (VGU_API_ENTRYP PFNVGUGLOWKHRPROC) (VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint glowColorRGBA);
typedef VGUErrorCode (VGU_API_ENTRYP PFNVGUBEVELKHRPROC) (VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint highlightColorRGBA,VGuint shadowColorRGBA);
typedef VGUErrorCode (VGU_API_ENTRYP PFNVGUGRADIENTGLOWKHRPROC) (VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint stopsCount,const VGfloat* glowColorRampStops);
typedef VGUErrorCode (VGU_API_ENTRYP PFNVGUGRADIENTBEVELKHRPROC) (VGImage dst,VGImage src,VGfloat dimX,VGfloat dimY,VGuint iterative,VGfloat strength,VGfloat distance,VGfloat angle,VGbitfield filterFlags,VGbitfield allowedQuality,VGuint stopsCount,const VGfloat* bevelColorRampStops);
#endif
/*-------------------------------------------------------------------------------
* NDS extensions
*------------------------------------------------------------------------------*/
#ifndef VG_NDS_paint_generation
#define VG_NDS_paint_generation 1
typedef enum {
VG_PAINT_COLOR_RAMP_LINEAR_NDS = 0x1A10,
VG_COLOR_MATRIX_NDS = 0x1A11,
VG_PAINT_COLOR_TRANSFORM_LINEAR_NDS = 0x1A12,
VG_PAINT_PARAM_TYPE_NDS_FORCE_SIZE = VG_MAX_ENUM
} VGPaintParamTypeNds;
typedef enum {
VG_DRAW_IMAGE_COLOR_MATRIX_NDS = 0x1F10,
VG_IMAGE_MODE_NDS_FORCE_SIZE = VG_MAX_ENUM
} VGImageModeNds;
#endif
#ifndef VG_NDS_projective_geometry
#define VG_NDS_projective_geometry 1
typedef enum {
VG_CLIP_MODE_NDS = 0x1180,
VG_CLIP_LINES_NDS = 0x1181,
VG_MAX_CLIP_LINES_NDS = 0x1182,
VG_PARAM_TYPE_NDS_FORCE_SIZE = VG_MAX_ENUM
} VGParamTypeNds;
typedef enum {
VG_CLIPMODE_NONE_NDS = 0x3000,
VG_CLIPMODE_CLIP_CLOSED_NDS = 0x3001,
VG_CLIPMODE_CLIP_OPEN_NDS = 0x3002,
VG_CLIPMODE_CULL_NDS = 0x3003,
VG_CLIPMODE_NDS_FORCE_SIZE = VG_MAX_ENUM
} VGClipModeNds;
typedef enum {
VG_RQUAD_TO_NDS = ( 13 << 1 ),
VG_RCUBIC_TO_NDS = ( 14 << 1 ),
VG_PATH_SEGMENT_NDS_FORCE_SIZE = VG_MAX_ENUM
} VGPathSegmentNds;
typedef enum {
VG_RQUAD_TO_ABS_NDS = (VG_RQUAD_TO_NDS | VG_ABSOLUTE),
VG_RQUAD_TO_REL_NDS = (VG_RQUAD_TO_NDS | VG_RELATIVE),
VG_RCUBIC_TO_ABS_NDS = (VG_RCUBIC_TO_NDS | VG_ABSOLUTE),
VG_RCUBIC_TO_REL_NDS = (VG_RCUBIC_TO_NDS | VG_RELATIVE),
VG_PATH_COMMAND_NDS_FORCE_SIZE = VG_MAX_ENUM
} VGPathCommandNds;
#ifdef VG_VGEXT_PROTOTYPES
VG_API_CALL void VG_API_ENTRY vgProjectiveMatrixNDS(VGboolean enable) ;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguTransformClipLineNDS(const VGfloat Ain,const VGfloat Bin,const VGfloat Cin,const VGfloat* matrix,const VGboolean inverse,VGfloat* Aout,VGfloat* Bout,VGfloat* Cout);
#endif
typedef void (VG_API_ENTRYP PFNVGPROJECTIVEMATRIXNDSPROC) (VGboolean enable) ;
typedef VGUErrorCode (VGU_API_ENTRYP PFNVGUTRANSFORMCLIPLINENDSPROC) (const VGfloat Ain,const VGfloat Bin,const VGfloat Cin,const VGfloat* matrix,const VGboolean inverse,VGfloat* Aout,VGfloat* Bout,VGfloat* Cout);
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* _VGEXT_H */

View File

@@ -1,92 +0,0 @@
/* $Revision: 6810 $ on $Date:: 2008-10-29 07:31:37 -0700 #$ */
/*------------------------------------------------------------------------
*
* VG platform specific header Reference Implementation
* ----------------------------------------------------
*
* Copyright (c) 2008 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and /or associated documentation files
* (the "Materials "), to deal in the Materials without restriction,
* including without limitation the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Materials,
* and to permit persons to whom the Materials are furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE MATERIALS OR
* THE USE OR OTHER DEALINGS IN THE MATERIALS.
*
*//**
* \file
* \brief VG platform specific header
*//*-------------------------------------------------------------------*/
#ifndef _VGPLATFORM_H
#define _VGPLATFORM_H
#include <KHR/khrplatform.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef VG_API_CALL
#if defined(OPENVG_STATIC_LIBRARY)
# define VG_API_CALL
#else
# define VG_API_CALL KHRONOS_APICALL
#endif /* defined OPENVG_STATIC_LIBRARY */
#endif /* ifndef VG_API_CALL */
#ifndef VGU_API_CALL
#if defined(OPENVG_STATIC_LIBRARY)
# define VGU_API_CALL
#else
# define VGU_API_CALL KHRONOS_APICALL
#endif /* defined OPENVG_STATIC_LIBRARY */
#endif /* ifndef VGU_API_CALL */
#ifndef VG_API_ENTRY
#define VG_API_ENTRY
#endif
#ifndef VG_API_EXIT
#define VG_API_EXIT
#endif
#ifndef VGU_API_ENTRY
#define VGU_API_ENTRY
#endif
#ifndef VGU_API_EXIT
#define VGU_API_EXIT
#endif
typedef float VGfloat;
typedef signed char VGbyte;
typedef unsigned char VGubyte;
typedef signed short VGshort;
typedef signed int VGint;
typedef unsigned int VGuint;
typedef unsigned int VGbitfield;
#ifndef VG_VGEXT_PROTOTYPES
#define VG_VGEXT_PROTOTYPES
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* _VGPLATFORM_H */

View File

@@ -1,131 +0,0 @@
/* $Revision: 6810 $ on $Date:: 2008-10-29 07:31:37 -0700 #$ */
/*------------------------------------------------------------------------
*
* VGU 1.1 Reference Implementation
* -------------------------------------
*
* Copyright (c) 2008 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and /or associated documentation files
* (the "Materials "), to deal in the Materials without restriction,
* including without limitation the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Materials,
* and to permit persons to whom the Materials are furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE MATERIALS OR
* THE USE OR OTHER DEALINGS IN THE MATERIALS.
*
*//**
* \file
* \brief VGU 1.1 API.
*//*-------------------------------------------------------------------*/
#ifndef _VGU_H
#define _VGU_H
#ifdef __cplusplus
extern "C" {
#endif
#include <VG/openvg.h>
#define VGU_VERSION_1_0 1
#define VGU_VERSION_1_1 2
#ifndef VGU_API_CALL
# error VGU_API_CALL must be defined
#endif
#ifndef VGU_API_ENTRY
# error VGU_API_ENTRY must be defined
#endif
#ifndef VGU_API_EXIT
# error VGU_API_EXIT must be defined
#endif
typedef enum {
VGU_NO_ERROR = 0,
VGU_BAD_HANDLE_ERROR = 0xF000,
VGU_ILLEGAL_ARGUMENT_ERROR = 0xF001,
VGU_OUT_OF_MEMORY_ERROR = 0xF002,
VGU_PATH_CAPABILITY_ERROR = 0xF003,
VGU_BAD_WARP_ERROR = 0xF004,
VGU_ERROR_CODE_FORCE_SIZE = VG_MAX_ENUM
} VGUErrorCode;
typedef enum {
VGU_ARC_OPEN = 0xF100,
VGU_ARC_CHORD = 0xF101,
VGU_ARC_PIE = 0xF102,
VGU_ARC_TYPE_FORCE_SIZE = VG_MAX_ENUM
} VGUArcType;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguLine(VGPath path,
VGfloat x0, VGfloat y0,
VGfloat x1, VGfloat y1) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguPolygon(VGPath path,
const VGfloat * points, VGint count,
VGboolean closed) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguRect(VGPath path,
VGfloat x, VGfloat y,
VGfloat width, VGfloat height) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguRoundRect(VGPath path,
VGfloat x, VGfloat y,
VGfloat width, VGfloat height,
VGfloat arcWidth, VGfloat arcHeight) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguEllipse(VGPath path,
VGfloat cx, VGfloat cy,
VGfloat width, VGfloat height) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguArc(VGPath path,
VGfloat x, VGfloat y,
VGfloat width, VGfloat height,
VGfloat startAngle, VGfloat angleExtent,
VGUArcType arcType) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguComputeWarpQuadToSquare(VGfloat sx0, VGfloat sy0,
VGfloat sx1, VGfloat sy1,
VGfloat sx2, VGfloat sy2,
VGfloat sx3, VGfloat sy3,
VGfloat * matrix) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguComputeWarpSquareToQuad(VGfloat dx0, VGfloat dy0,
VGfloat dx1, VGfloat dy1,
VGfloat dx2, VGfloat dy2,
VGfloat dx3, VGfloat dy3,
VGfloat * matrix) VGU_API_EXIT;
VGU_API_CALL VGUErrorCode VGU_API_ENTRY vguComputeWarpQuadToQuad(VGfloat dx0, VGfloat dy0,
VGfloat dx1, VGfloat dy1,
VGfloat dx2, VGfloat dy2,
VGfloat dx3, VGfloat dy3,
VGfloat sx0, VGfloat sy0,
VGfloat sx1, VGfloat sy1,
VGfloat sx2, VGfloat sy2,
VGfloat sx3, VGfloat sy3,
VGfloat * matrix) VGU_API_EXIT;
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* #ifndef _VGU_H */

View File

@@ -177,13 +177,8 @@ mtx_init(mtx_t *mtx, int type)
&& type != (mtx_try|mtx_recursive))
return thrd_error;
pthread_mutexattr_init(&attr);
if ((type & mtx_recursive) != 0) {
#if defined(__linux__) || defined(__linux)
pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE_NP);
#else
if ((type & mtx_recursive) != 0)
pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE);
#endif
}
pthread_mutex_init(mtx, &attr);
pthread_mutexattr_destroy(&attr);
return thrd_success;

View File

@@ -1,6 +1,6 @@
/**************************************************************************
*
* Copyright 2009 VMware, Inc.
* Copyright 2015 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -25,13 +25,25 @@
*
**************************************************************************/
#ifndef ID_PUBLIC_H
#define ID_PUBLIC_H
#ifndef _C99_ALLOCA_H_
#define _C99_ALLOCA_H_
struct pipe_screen;
struct pipe_context;
struct pipe_screen *
identity_screen_create(struct pipe_screen *screen);
#if defined(_MSC_VER)
#endif /* ID_PUBLIC_H */
# include <malloc.h>
# define alloca _alloca
#elif defined(__sun) || defined(__CYGWIN__)
# include <alloca.h>
#else /* !defined(_MSC_VER) */
# include <stdlib.h>
#endif /* !defined(_MSC_VER) */
#endif

View File

@@ -25,6 +25,8 @@
*
**************************************************************************/
#include "no_extern_c.h"
#ifndef _C99_COMPAT_H_
#define _C99_COMPAT_H_
@@ -33,6 +35,11 @@
* MSVC hacks.
*/
#if defined(_MSC_VER)
# if _MSC_VER < 1500
# error "Microsoft Visual Studio 2008 or higher required"
# endif
/*
* Visual Studio 2012 will complain if we define the `inline` keyword, but
* actually it only supports the keyword on C++.
@@ -116,11 +123,7 @@
# elif defined(__GNUC__)
# define __func__ __FUNCTION__
# elif defined(_MSC_VER)
# if _MSC_VER >= 1300
# define __func__ __FUNCTION__
# else
# define __func__ "<unknown>"
# endif
# define __func__ __FUNCTION__
# else
# define __func__ "<unknown>"
# endif

227
include/c99_math.h Normal file
View File

@@ -0,0 +1,227 @@
/**************************************************************************
*
* Copyright 2007-2015 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
/**
* Wrapper for math.h which makes sure we have definitions of all the c99
* functions.
*/
#ifndef _C99_MATH_H_
#define _C99_MATH_H_
#include <math.h>
#include "c99_compat.h"
#if defined(_MSC_VER)
/* This is to ensure that we get M_PI, etc. definitions */
#if !defined(_USE_MATH_DEFINES)
#error _USE_MATH_DEFINES define required when building with MSVC
#endif
#if _MSC_VER < 1800
#define isfinite(x) _finite((double)(x))
#define isnan(x) _isnan((double)(x))
#endif /* _MSC_VER < 1800 */
#if _MSC_VER < 1800
static inline double log2( double x )
{
const double invln2 = 1.442695041;
return log( x ) * invln2;
}
static inline double
round(double x)
{
return x >= 0.0 ? floor(x + 0.5) : ceil(x - 0.5);
}
static inline float
roundf(float x)
{
return x >= 0.0f ? floorf(x + 0.5f) : ceilf(x - 0.5f);
}
#endif
#ifndef INFINITY
#include <float.h> // DBL_MAX
#define INFINITY (DBL_MAX + DBL_MAX)
#endif
#ifndef NAN
#define NAN (INFINITY - INFINITY)
#endif
#endif /* _MSC_VER */
#if (defined(_MSC_VER) && _MSC_VER < 1800) || \
(!defined(_MSC_VER) && \
__STDC_VERSION__ < 199901L && \
(!defined(_XOPEN_SOURCE) || _XOPEN_SOURCE < 600) && \
!defined(__cplusplus))
static inline long int
lrint(double d)
{
long int rounded = (long int)(d + 0.5);
if (d - floor(d) == 0.5) {
if (rounded % 2 != 0)
rounded += (d > 0) ? -1 : 1;
}
return rounded;
}
static inline long int
lrintf(float f)
{
long int rounded = (long int)(f + 0.5f);
if (f - floorf(f) == 0.5f) {
if (rounded % 2 != 0)
rounded += (f > 0) ? -1 : 1;
}
return rounded;
}
static inline long long int
llrint(double d)
{
long long int rounded = (long long int)(d + 0.5);
if (d - floor(d) == 0.5) {
if (rounded % 2 != 0)
rounded += (d > 0) ? -1 : 1;
}
return rounded;
}
static inline long long int
llrintf(float f)
{
long long int rounded = (long long int)(f + 0.5f);
if (f - floorf(f) == 0.5f) {
if (rounded % 2 != 0)
rounded += (f > 0) ? -1 : 1;
}
return rounded;
}
static inline float
exp2f(float f)
{
return powf(2.0f, f);
}
static inline double
exp2(double d)
{
return pow(2.0, d);
}
#endif /* C99 */
/*
* signbit() is a macro on Linux. Not available on Windows.
*/
#ifndef signbit
#define signbit(x) ((x) < 0.0f)
#endif
#ifndef M_PI
#define M_PI (3.14159265358979323846)
#endif
#ifndef M_E
#define M_E (2.7182818284590452354)
#endif
#ifndef M_LOG2E
#define M_LOG2E (1.4426950408889634074)
#endif
#ifndef FLT_MAX_EXP
#define FLT_MAX_EXP 128
#endif
#if defined(fpclassify)
/* ISO C99 says that fpclassify is a macro. Assume that any implementation
* of fpclassify, whether it's in a C99 compiler or not, will be a macro.
*/
#elif defined(__cplusplus)
/* For C++, fpclassify() should be defined in <cmath> */
#elif defined(_MSC_VER)
/* Not required on VS2013 and above. Oddly, the fpclassify() function
* doesn't exist in such a form on MSVC. This is an implementation using
* slightly different lower-level Windows functions.
*/
#include <float.h>
static inline enum {FP_NAN, FP_INFINITE, FP_ZERO, FP_SUBNORMAL, FP_NORMAL}
fpclassify(double x)
{
switch(_fpclass(x)) {
case _FPCLASS_SNAN: /* signaling NaN */
case _FPCLASS_QNAN: /* quiet NaN */
return FP_NAN;
case _FPCLASS_NINF: /* negative infinity */
case _FPCLASS_PINF: /* positive infinity */
return FP_INFINITE;
case _FPCLASS_NN: /* negative normal */
case _FPCLASS_PN: /* positive normal */
return FP_NORMAL;
case _FPCLASS_ND: /* negative denormalized */
case _FPCLASS_PD: /* positive denormalized */
return FP_SUBNORMAL;
case _FPCLASS_NZ: /* negative zero */
case _FPCLASS_PZ: /* positive zero */
return FP_ZERO;
default:
/* Should never get here; but if we do, this will guarantee
* that the pattern is not treated like a number.
*/
return FP_NAN;
}
}
#else
#error "Need to include or define an fpclassify function"
#endif
#endif /* #define _C99_MATH_H_ */

48
include/no_extern_c.h Normal file
View File

@@ -0,0 +1,48 @@
/**************************************************************************
*
* Copyright 2014 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
/*
* Including system's headers inside `extern "C" { ... }` is not safe, as system
* headers may have C++ code in them, and C++ code inside extern "C"
* leads to syntatically incorrect code.
*
* This is because putting code inside extern "C" won't make __cplusplus define
* go away, that is, the system header being included thinks is free to use C++
* as it sees fits.
*
* Including non-system headers inside extern "C" is not safe either, because
* non-system headers end up including system headers, hence fall in the above
* case too.
*
* Conclusion, includes inside extern "C" is simply not portable.
*
*
* This header helps surface these issues.
*/
#ifdef __cplusplus
template<class T> class _IncludeInsideExternCNotPortable;
#endif

View File

@@ -11,5 +11,5 @@ CHIPSET(0x27AE, I945_GME, "Intel(R) 945GME")
CHIPSET(0x29B2, Q35_G, "Intel(R) Q35")
CHIPSET(0x29C2, G33_G, "Intel(R) G33")
CHIPSET(0x29D2, Q33_G, "Intel(R) Q33")
CHIPSET(0xA011, IGD_GM, "Intel(R) IGD")
CHIPSET(0xA001, IGD_G, "Intel(R) IGD")
CHIPSET(0xA011, PNV_GM, "Intel(R) Pineview M")
CHIPSET(0xA001, PNV_G, "Intel(R) Pineview")

View File

@@ -124,7 +124,10 @@ CHIPSET(0x1921, skl_gt2, "Intel(R) Skylake ULT GT2F")
CHIPSET(0x1926, skl_gt3, "Intel(R) Skylake ULT GT3")
CHIPSET(0x192A, skl_gt3, "Intel(R) Skylake SRV GT3")
CHIPSET(0x192B, skl_gt3, "Intel(R) Skylake Halo GT3")
CHIPSET(0x22B0, chv, "Intel(R) Cherryview")
CHIPSET(0x22B1, chv, "Intel(R) Cherryview")
CHIPSET(0x22B2, chv, "Intel(R) Cherryview")
CHIPSET(0x22B3, chv, "Intel(R) Cherryview")
CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x22B1, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x22B3, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x0A84, bxt, "Intel(R) HD Graphics (Broxton)")
CHIPSET(0x1A84, bxt, "Intel(R) HD Graphics (Broxton)")
CHIPSET(0x5A84, bxt, "Intel(R) HD Graphics (Broxton)")

View File

@@ -63,6 +63,7 @@ CHIPSET(0x6608, OLAND_6608, OLAND)
CHIPSET(0x6610, OLAND_6610, OLAND)
CHIPSET(0x6611, OLAND_6611, OLAND)
CHIPSET(0x6613, OLAND_6613, OLAND)
CHIPSET(0x6617, OLAND_6617, OLAND)
CHIPSET(0x6620, OLAND_6620, OLAND)
CHIPSET(0x6621, OLAND_6621, OLAND)
CHIPSET(0x6623, OLAND_6623, OLAND)
@@ -85,6 +86,7 @@ CHIPSET(0x6651, BONAIRE_6651, BONAIRE)
CHIPSET(0x6658, BONAIRE_6658, BONAIRE)
CHIPSET(0x665C, BONAIRE_665C, BONAIRE)
CHIPSET(0x665D, BONAIRE_665D, BONAIRE)
CHIPSET(0x665F, BONAIRE_665F, BONAIRE)
CHIPSET(0x9830, KABINI_9830, KABINI)
CHIPSET(0x9831, KABINI_9831, KABINI)
@@ -155,3 +157,27 @@ CHIPSET(0x67B8, HAWAII_67B8, HAWAII)
CHIPSET(0x67B9, HAWAII_67B9, HAWAII)
CHIPSET(0x67BA, HAWAII_67BA, HAWAII)
CHIPSET(0x67BE, HAWAII_67BE, HAWAII)
CHIPSET(0x6900, ICELAND_, ICELAND)
CHIPSET(0x6901, ICELAND_, ICELAND)
CHIPSET(0x6902, ICELAND_, ICELAND)
CHIPSET(0x6903, ICELAND_, ICELAND)
CHIPSET(0x6907, ICELAND_, ICELAND)
CHIPSET(0x6920, TONGA_, TONGA)
CHIPSET(0x6921, TONGA_, TONGA)
CHIPSET(0x6928, TONGA_, TONGA)
CHIPSET(0x6929, TONGA_, TONGA)
CHIPSET(0x692B, TONGA_, TONGA)
CHIPSET(0x692F, TONGA_, TONGA)
CHIPSET(0x6930, TONGA_, TONGA)
CHIPSET(0x6938, TONGA_, TONGA)
CHIPSET(0x6939, TONGA_, TONGA)
CHIPSET(0x9870, CARRIZO_, CARRIZO)
CHIPSET(0x9874, CARRIZO_, CARRIZO)
CHIPSET(0x9875, CARRIZO_, CARRIZO)
CHIPSET(0x9876, CARRIZO_, CARRIZO)
CHIPSET(0x9877, CARRIZO_, CARRIZO)
CHIPSET(0x7300, FIJI_, FIJI)

View File

@@ -3,9 +3,9 @@
if BUILD_SHARED
if HAVE_COMPAT_SYMLINKS
all-local : .libs/install-mesa-links
all-local : .install-mesa-links
.libs/install-mesa-links : $(lib_LTLIBRARIES)
.install-mesa-links : $(lib_LTLIBRARIES)
$(AM_V_GEN)$(MKDIR_P) $(top_builddir)/$(LIB_DIR); \
for f in $(join $(addsuffix .libs/,$(dir $(lib_LTLIBRARIES))),$(notdir $(lib_LTLIBRARIES:%.la=%.$(LIB_EXT)*))); do \
if test -h .libs/$$f; then \
@@ -19,6 +19,7 @@ clean-local:
for f in $(notdir $(lib_LTLIBRARIES:%.la=.libs/%.$(LIB_EXT)*)); do \
$(RM) $(top_builddir)/$(LIB_DIR)/$$f; \
done;
$(RM) .install-mesa-links
endif
endif

View File

@@ -54,8 +54,10 @@ else:
" | $PYTHON2 -
if test $? -ne 0 ; then
AC_MSG_ERROR(mako $1 or later is required.)
AC_MSG_RESULT(no)
AC_SUBST(acv_mako_found, 'no')
else
AC_MSG_RESULT(yes)
AC_MSG_RESULT(yes)
AC_SUBST(acv_mako_found, 'yes')
fi
])

View File

@@ -35,7 +35,7 @@ import os
import os.path
import re
import subprocess
import platform as _platform
import platform as host_platform
import sys
import tempfile
@@ -87,6 +87,25 @@ def createInstallMethods(env):
env.AddMethod(install_shared_library, 'InstallSharedLibrary')
def msvc2013_compat(env):
if env['gcc']:
env.Append(CCFLAGS = [
'-Werror=vla',
'-Werror=pointer-arith',
])
def msvc2008_compat(env):
msvc2013_compat(env)
if env['gcc']:
env.Append(CFLAGS = [
'-Werror=declaration-after-statement',
])
def createMSVCCompatMethods(env):
env.AddMethod(msvc2013_compat, 'MSVC2013Compat')
env.AddMethod(msvc2008_compat, 'MSVC2008Compat')
def num_jobs():
try:
return int(os.environ['NUMBER_OF_PROCESSORS'])
@@ -128,6 +147,17 @@ def check_cc(env, cc, expr, cpp_opt = '-E'):
return result
def check_prog(env, prog):
"""Check whether this program exists."""
sys.stdout.write('Checking for %s ... ' % prog)
result = env.Detect(prog)
sys.stdout.write(' %s\n' % ['no', 'yes'][int(bool(result))])
return result
def generate(env):
"""Common environment generation code"""
@@ -167,7 +197,7 @@ def generate(env):
env['gcc'] = 0
env['clang'] = 0
env['msvc'] = 0
if _platform.system() == 'Windows':
if host_platform.system() == 'Windows':
env['msvc'] = check_cc(env, 'MSVC', 'defined(_MSC_VER)', '/E')
if not env['msvc']:
env['gcc'] = check_cc(env, 'GCC', 'defined(__GNUC__) && !defined(__clang__)')
@@ -191,10 +221,10 @@ def generate(env):
# Determine whether we are cross compiling; in particular, whether we need
# to compile code generators with a different compiler as the target code.
host_platform = _platform.system().lower()
if host_platform.startswith('cygwin'):
host_platform = 'cygwin'
host_machine = os.environ.get('PROCESSOR_ARCHITEW6432', os.environ.get('PROCESSOR_ARCHITECTURE', _platform.machine()))
hosthost_platform = host_platform.system().lower()
if hosthost_platform.startswith('cygwin'):
hosthost_platform = 'cygwin'
host_machine = os.environ.get('PROCESSOR_ARCHITEW6432', os.environ.get('PROCESSOR_ARCHITECTURE', host_platform.machine()))
host_machine = {
'x86': 'x86',
'i386': 'x86',
@@ -205,7 +235,7 @@ def generate(env):
'AMD64': 'x86_64',
'x86_64': 'x86_64',
}.get(host_machine, 'generic')
env['crosscompile'] = platform != host_platform
env['crosscompile'] = platform != hosthost_platform
if machine == 'x86_64' and host_machine != 'x86_64':
env['crosscompile'] = True
env['hostonly'] = False
@@ -270,6 +300,7 @@ def generate(env):
# C preprocessor options
cppdefines = []
cppdefines += ['__STDC_LIMIT_MACROS']
if env['build'] in ('debug', 'checked'):
cppdefines += ['DEBUG']
else:
@@ -283,6 +314,7 @@ def generate(env):
'_SVID_SOURCE',
'_BSD_SOURCE',
'_GNU_SOURCE',
'_DEFAULT_SOURCE',
'HAVE_PTHREAD',
'HAVE_POSIX_MEMALIGN',
]
@@ -331,6 +363,7 @@ def generate(env):
'_SCL_SECURE_NO_WARNINGS',
'_SCL_SECURE_NO_DEPRECATE',
'_ALLOW_KEYWORD_MACROS',
'_HAS_EXCEPTIONS=0', # Tell C++ STL to not use exceptions
]
if env['build'] in ('debug', 'checked'):
cppdefines += ['_DEBUG']
@@ -342,6 +375,26 @@ def generate(env):
print 'warning: Floating-point textures enabled.'
print 'warning: Please consult docs/patents.txt with your lawyer before building Mesa.'
cppdefines += ['TEXTURE_FLOAT_ENABLED']
if gcc_compat:
ccversion = env['CCVERSION']
cppdefines += [
'HAVE___BUILTIN_EXPECT',
'HAVE___BUILTIN_FFS',
'HAVE___BUILTIN_FFSLL',
'HAVE_FUNC_ATTRIBUTE_FLATTEN',
'HAVE_FUNC_ATTRIBUTE_UNUSED',
# GCC 3.0
'HAVE_FUNC_ATTRIBUTE_FORMAT',
'HAVE_FUNC_ATTRIBUTE_PACKED',
# GCC 3.4
'HAVE___BUILTIN_CTZ',
'HAVE___BUILTIN_POPCOUNT',
'HAVE___BUILTIN_POPCOUNTLL',
'HAVE___BUILTIN_CLZ',
'HAVE___BUILTIN_CLZLL',
]
if distutils.version.LooseVersion(ccversion) >= distutils.version.LooseVersion('4.5'):
cppdefines += ['HAVE___BUILTIN_UNREACHABLE']
env.Append(CPPDEFINES = cppdefines)
# C compiler options
@@ -377,8 +430,7 @@ def generate(env):
'-m32',
#'-march=pentium4',
]
if distutils.version.LooseVersion(ccversion) >= distutils.version.LooseVersion('4.2') \
and platform != 'haiku':
if platform != 'haiku':
# NOTE: We need to ensure stack is realigned given that we
# produce shared objects, and have no control over the stack
# alignment policy of the application. Therefore we need
@@ -419,13 +471,6 @@ def generate(env):
'-Wmissing-prototypes',
'-std=gnu99',
]
if distutils.version.LooseVersion(ccversion) >= distutils.version.LooseVersion('4.2'):
ccflags += [
'-Wpointer-arith',
]
cflags += [
'-Wdeclaration-after-statement',
]
if icc:
cflags += [
'-std=gnu99',
@@ -462,8 +507,13 @@ def generate(env):
]
ccflags += [
'/W3', # warning level
'/wd4018', # signed/unsigned mismatch
'/wd4056', # overflow in floating-point constant arithmetic
'/wd4244', # conversion from 'type1' to 'type2', possible loss of data
'/wd4267', # 'var' : conversion from 'size_t' to 'type', possible loss of data
'/wd4305', # truncation from 'type1' to 'type2'
'/wd4351', # new behavior: elements of array 'array' will be default initialized
'/wd4756', # overflow in constant arithmetic
'/wd4800', # forcing value to bool 'true' or 'false' (performance warning)
'/wd4996', # disable deprecated POSIX name warnings
]
@@ -500,6 +550,7 @@ def generate(env):
env.Append(CCFLAGS = [
'/analyze',
#'/analyze:log', '${TARGET.base}.xml',
'/wd28251', # Inconsistent annotation for function
])
if env['clang']:
# scan-build will produce more comprehensive output
@@ -584,39 +635,46 @@ def generate(env):
env.Append(CCFLAGS = ['-fopenmp'])
env.Append(LIBS = ['gomp'])
if gcc_compat:
ccversion = env['CCVERSION']
cppdefines += [
'HAVE___BUILTIN_EXPECT',
'HAVE___BUILTIN_FFS',
'HAVE___BUILTIN_FFSLL',
'HAVE_FUNC_ATTRIBUTE_FLATTEN',
]
if distutils.version.LooseVersion(ccversion) >= distutils.version.LooseVersion('3'):
cppdefines += [
'HAVE_FUNC_ATTRIBUTE_FORMAT',
'HAVE_FUNC_ATTRIBUTE_PACKED',
]
if distutils.version.LooseVersion(ccversion) >= distutils.version.LooseVersion('3.4'):
cppdefines += [
'HAVE___BUILTIN_CTZ',
'HAVE___BUILTIN_POPCOUNT',
'HAVE___BUILTIN_POPCOUNTLL',
'HAVE___BUILTIN_CLZ',
'HAVE___BUILTIN_CLZLL',
]
if distutils.version.LooseVersion(ccversion) >= distutils.version.LooseVersion('4.5'):
cppdefines += ['HAVE___BUILTIN_UNREACHABLE']
# Load tools
env.Tool('lex')
if env['msvc']:
env.Append(LEXFLAGS = [
# Force flex to use const keyword in prototypes, as relies on
# __cplusplus or __STDC__ macro to determine whether it's safe to
# use const keyword, but MSVC never defines __STDC__ unless we
# disable all MSVC extensions.
'-DYY_USE_CONST=',
])
# Flex relies on __STDC_VERSION__>=199901L to decide when to include
# C99 inttypes.h. We always have inttypes.h available with MSVC
# (either the one bundled with MSVC 2013, or the one we bundle
# ourselves), but we can't just define __STDC_VERSION__ without
# breaking stuff, as MSVC doesn't fully support C99. There's also no
# way to premptively include stdint.
env.Append(CCFLAGS = ['-FIinttypes.h'])
if host_platform.system() == 'Windows':
# Prefer winflexbison binaries, as not only they are easier to install
# (no additional dependencies), but also better Windows support.
if check_prog(env, 'win_flex'):
env["LEX"] = 'win_flex'
env.Append(LEXFLAGS = [
# windows compatibility (uses <io.h> instead of <unistd.h> and
# _isatty, _fileno functions)
'--wincompat'
])
env.Tool('yacc')
if host_platform.system() == 'Windows':
if check_prog(env, 'win_bison'):
env["YACC"] = 'win_bison'
if env['llvm']:
env.Tool('llvm')
# Custom builders and methods
env.Tool('custom')
createInstallMethods(env)
createMSVCCompatMethods(env)
env.PkgCheckModules('X11', ['x11', 'xext', 'xdamage', 'xfixes', 'glproto >= 1.4.13'])
env.PkgCheckModules('XCB', ['x11-xcb', 'xcb-glx >= 1.8.1', 'xcb-dri2 >= 1.8'])

View File

@@ -72,18 +72,25 @@ def generate(env):
return
# Try to determine the LLVM version from llvm/Config/config.h
llvm_config = os.path.join(llvm_dir, 'include/llvm/Config/config.h')
llvm_config = os.path.join(llvm_dir, 'include/llvm/Config/llvm-config.h')
if not os.path.exists(llvm_config):
print 'scons: could not find %s' % llvm_config
return
llvm_version_re = re.compile(r'^#define PACKAGE_VERSION "([^"]*)"')
llvm_version_major_re = re.compile(r'^#define LLVM_VERSION_MAJOR ([0-9]+)')
llvm_version_minor_re = re.compile(r'^#define LLVM_VERSION_MINOR ([0-9]+)')
llvm_version = None
llvm_version_major = None
llvm_version_minor = None
for line in open(llvm_config, 'rt'):
mo = llvm_version_re.match(line)
mo = llvm_version_major_re.match(line)
if mo:
llvm_version = mo.group(1)
llvm_version = distutils.version.LooseVersion(llvm_version)
break
llvm_version_major = mo.group(1)
mo = llvm_version_minor_re.match(line)
if mo:
llvm_version_minor = mo.group(1)
if llvm_version_major is not None and llvm_version_minor is not None:
llvm_version = distutils.version.LooseVersion('%s.%s' % (llvm_version_major, llvm_version_minor))
if llvm_version is None:
print 'scons: could not determine the LLVM version from %s' % llvm_config
return
@@ -99,8 +106,21 @@ def generate(env):
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
# LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter`
if llvm_version >= distutils.version.LooseVersion('3.5'):
if llvm_version >= distutils.version.LooseVersion('3.6'):
env.Prepend(LIBS = [
'LLVMBitWriter', 'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
'LLVMCodeGen', 'LLVMScalarOpts', 'LLVMProfileData',
'LLVMInstCombine', 'LLVMTransformUtils', 'LLVMipa',
'LLVMAnalysis', 'LLVMX86Desc', 'LLVMMCDisassembler',
'LLVMX86Info', 'LLVMX86AsmPrinter', 'LLVMX86Utils',
'LLVMMCJIT', 'LLVMTarget', 'LLVMExecutionEngine',
'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser',
'LLVMBitReader', 'LLVMMC', 'LLVMCore', 'LLVMSupport'
])
elif llvm_version >= distutils.version.LooseVersion('3.5'):
env.Prepend(LIBS = [
'LLVMMCDisassembler',
'LLVMBitWriter', 'LLVMMCJIT', 'LLVMRuntimeDyld',
'LLVMX86Disassembler', 'LLVMX86AsmParser', 'LLVMX86CodeGen',
'LLVMSelectionDAG', 'LLVMAsmPrinter', 'LLVMX86Desc',
@@ -113,6 +133,7 @@ def generate(env):
])
else:
env.Prepend(LIBS = [
'LLVMMCDisassembler',
'LLVMBitWriter', 'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMX86Desc', 'LLVMSelectionDAG',
'LLVMAsmPrinter', 'LLVMMCParser', 'LLVMX86AsmPrinter',
@@ -132,6 +153,11 @@ def generate(env):
# Some of the LLVM C headers use the inline keyword without
# defining it.
env.Append(CPPDEFINES = [('inline', '__inline')])
# Match some of the warning options from llvm/cmake/modules/HandleLLVMOptions.cmake
env.AppendUnique(CXXFLAGS = [
'/wd4355', # 'this' : used in base member initializer list
'/wd4624', # 'derived class' : destructor could not be generated because a base class destructor is inaccessible
])
if env['build'] in ('debug', 'checked'):
# LLVM libraries are static, build with /MT, and they
# automatically link agains LIBCMT. When we're doing a
@@ -165,7 +191,7 @@ def generate(env):
if '-fno-rtti' in cxxflags:
env.Append(CXXFLAGS = ['-fno-rtti'])
components = ['engine', 'mcjit', 'bitwriter', 'x86asmprinter']
components = ['engine', 'mcjit', 'bitwriter', 'x86asmprinter', 'mcdisassembler']
env.ParseConfig('llvm-config --libs ' + ' '.join(components))
env.ParseConfig('llvm-config --ldflags')

View File

@@ -19,8 +19,6 @@
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
AUTOMAKE_OPTIONS = subdir-objects
SUBDIRS = . gtest util mapi/glapi/gen mapi
if NEED_OPENGL_COMMON
@@ -37,23 +35,23 @@ if HAVE_EGL_PLATFORM_WAYLAND
SUBDIRS += egl/wayland/wayland-egl egl/wayland/wayland-drm
endif
if HAVE_EGL_DRIVER_DRI2
SUBDIRS += egl/drivers/dri2
endif
if HAVE_GBM
SUBDIRS += gbm
endif
if HAVE_EGL
SUBDIRS += egl/main
SUBDIRS += egl
endif
if HAVE_GALLIUM
SUBDIRS += gallium
endif
EXTRA_DIST = egl/docs getopt hgl SConscript
EXTRA_DIST = \
getopt hgl SConscript
AM_CFLAGS = $(VISIBILITY_CFLAGS)
AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS)
AM_CPPFLAGS = \
-I$(top_srcdir)/include/ \
@@ -66,4 +64,5 @@ noinst_LTLIBRARIES = libglsl_util.la
libglsl_util_la_SOURCES = \
mesa/main/imports.c \
mesa/program/prog_hash_table.c \
mesa/program/symbol_table.c
mesa/program/symbol_table.c \
mesa/program/dummy_errors.c

View File

@@ -12,7 +12,8 @@ if env['hostonly']:
# compilation
Return()
SConscript('loader/SConscript')
if env['platform'] != 'windows':
SConscript('loader/SConscript')
# When env['gles'] is set, the targets defined in mapi/glapi/SConscript are not
# used. libgl-xlib and libgl-gdi adapt themselves to use the targets defined
@@ -27,18 +28,11 @@ if env['platform'] in ['haiku']:
SConscript('mesa/SConscript')
SConscript('mapi/vgapi/SConscript')
if not env['embedded']:
if env['platform'] not in ('cygwin', 'darwin', 'freebsd', 'haiku', 'windows'):
SConscript('glx/SConscript')
if env['platform'] not in ['darwin', 'haiku', 'sunos']:
if env['dri']:
SConscript('egl/drivers/dri2/SConscript')
SConscript('egl/main/SConscript')
if env['platform'] == 'haiku':
SConscript('egl/drivers/haiku/SConscript')
SConscript('egl/main/SConscript')
SConscript('egl/SConscript')
if env['gles']:
SConscript('mapi/shared-glapi/SConscript')

97
src/egl/Android.mk Normal file
View File

@@ -0,0 +1,97 @@
# Mesa 3-D graphics library
#
# Copyright (C) 2010-2011 Chia-I Wu <olvaffe@gmail.com>
# Copyright (C) 2010-2011 LunarG Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
# Android.mk for libGLES_mesa
LOCAL_PATH := $(call my-dir)
include $(LOCAL_PATH)/Makefile.sources
# ---------------------------------------
# Build libGLES_mesa
# ---------------------------------------
include $(CLEAR_VARS)
LOCAL_SRC_FILES := \
$(LIBEGL_C_FILES) \
$(dri2_backend_core_FILES) \
drivers/dri2/platform_android.c
LOCAL_CFLAGS := \
-D_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_ANDROID \
-D_EGL_BUILT_IN_DRIVER_DRI2 \
-DHAVE_ANDROID_PLATFORM
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_CFLAGS_arm := -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\"
LOCAL_CFLAGS_x86 := -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\"
LOCAL_CFLAGS_x86_64 := -DDEFAULT_DRIVER_DIR=\"/system/lib64/dri\"
else
LOCAL_CFLAGS += -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\"
endif
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/egl/main \
$(MESA_TOP)/src/egl/drivers/dri2 \
LOCAL_STATIC_LIBRARIES := \
libmesa_loader
LOCAL_SHARED_LIBRARIES := \
libdl \
libhardware \
liblog \
libcutils \
libgralloc_drm \
ifeq ($(shell echo "$(MESA_ANDROID_VERSION) >= 4.2" | bc),1)
LOCAL_SHARED_LIBRARIES += libsync
endif
# add libdrm if there are hardware drivers
ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),)
LOCAL_CFLAGS += -DHAVE_LIBDRM
LOCAL_SHARED_LIBRARIES += libdrm
endif
ifeq ($(strip $(MESA_BUILD_CLASSIC)),true)
# require i915_dri and/or i965_dri
LOCAL_REQUIRED_MODULES += \
$(addsuffix _dri, $(filter i915 i965, $(MESA_GPU_DRIVERS)))
endif # MESA_BUILD_CLASSIC
ifeq ($(strip $(MESA_BUILD_GALLIUM)),true)
LOCAL_REQUIRED_MODULES += gallium_dri
endif # MESA_BUILD_GALLIUM
LOCAL_MODULE := libGLES_mesa
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_MODULE_RELATIVE_PATH := egl
else
LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/egl
endif
include $(MESA_COMMON_MK)
include $(BUILD_SHARED_LIBRARY)

View File

@@ -23,18 +23,19 @@ include Makefile.sources
AM_CFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src/egl/main \
-I$(top_srcdir)/src/gbm/main \
-I$(top_srcdir)/src \
$(DEFINES) \
$(VISIBILITY_CFLAGS) \
$(LIBDRM_CFLAGS) \
$(EGL_CFLAGS) \
-D_EGL_NATIVE_PLATFORM=$(EGL_NATIVE_PLATFORM) \
-D_EGL_DRIVER_SEARCH_DIR=\"$(libdir)/egl\" \
-D_EGL_OS_UNIX=1
-D_EGL_NATIVE_PLATFORM=$(EGL_NATIVE_PLATFORM)
lib_LTLIBRARIES = libEGL.la
libEGL_la_SOURCES = \
${LIBEGL_C_FILES}
$(LIBEGL_C_FILES)
libEGL_la_LIBADD = \
$(EGL_LIB_DEPS)
@@ -45,10 +46,13 @@ libEGL_la_LDFLAGS = \
$(GC_SECTIONS) \
$(LD_NO_UNDEFINED)
dri2_backend_FILES =
if HAVE_EGL_PLATFORM_X11
AM_CFLAGS += -DHAVE_X11_PLATFORM
AM_CFLAGS += $(XCB_DRI2_CFLAGS)
libEGL_la_LIBADD += $(XCB_DRI2_LIBS)
dri2_backend_FILES += drivers/dri2/platform_x11.c
endif
if HAVE_EGL_PLATFORM_WAYLAND
@@ -56,26 +60,37 @@ AM_CFLAGS += -DHAVE_WAYLAND_PLATFORM
AM_CFLAGS += $(WAYLAND_CFLAGS)
libEGL_la_LIBADD += $(WAYLAND_LIBS)
libEGL_la_LIBADD += $(LIBDRM_LIBS)
libEGL_la_LIBADD += ../wayland/wayland-drm/libwayland-drm.la
libEGL_la_LIBADD += $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la
dri2_backend_FILES += drivers/dri2/platform_wayland.c
endif
if HAVE_EGL_PLATFORM_DRM
AM_CFLAGS += -DHAVE_DRM_PLATFORM
libEGL_la_LIBADD += ../../gbm/libgbm.la
libEGL_la_LIBADD += $(top_builddir)/src/gbm/libgbm.la
dri2_backend_FILES += drivers/dri2/platform_drm.c
endif
if HAVE_EGL_PLATFORM_FBDEV
AM_CFLAGS += -DHAVE_FBDEV_PLATFORM
endif
if HAVE_EGL_PLATFORM_NULL
AM_CFLAGS += -DHAVE_NULL_PLATFORM
if HAVE_EGL_PLATFORM_SURFACELESS
AM_CFLAGS += -DHAVE_SURFACELESS_PLATFORM
dri2_backend_FILES += drivers/dri2/platform_surfaceless.c
endif
if HAVE_EGL_DRIVER_DRI2
AM_CFLAGS += -D_EGL_BUILT_IN_DRIVER_DRI2
AM_CFLAGS += -DHAVE_XCB_DRI2
libEGL_la_LIBADD += ../drivers/dri2/libegl_dri2.la
AM_CFLAGS += \
-I$(top_srcdir)/src/loader \
-I$(top_srcdir)/src/egl/drivers/dri2 \
-I$(top_srcdir)/src/gbm/backends/dri \
-I$(top_srcdir)/src/egl/wayland/wayland-egl \
-I$(top_srcdir)/src/egl/wayland/wayland-drm \
-I$(top_builddir)/src/egl/wayland/wayland-drm \
-DDEFAULT_DRIVER_DIR=\"$(DRI_DRIVER_SEARCH_DIR)\" \
-D_EGL_BUILT_IN_DRIVER_DRI2
libEGL_la_SOURCES += \
$(dri2_backend_core_FILES) \
$(dri2_backend_FILES)
libEGL_la_LIBADD += $(top_builddir)/src/loader/libloader.la
libEGL_la_LIBADD += $(DLOPEN_LIBS) $(LIBDRM_LIBS)
endif
@@ -83,7 +98,7 @@ include $(top_srcdir)/install-lib-links.mk
pkgconfigdir = $(libdir)/pkgconfig
pkgconfig_DATA = egl.pc
pkgconfig_DATA = main/egl.pc
khrdir = $(includedir)/KHR
khr_HEADERS = $(top_srcdir)/include/KHR/khrplatform.h
@@ -97,6 +112,8 @@ egl_HEADERS = \
$(top_srcdir)/include/EGL/eglplatform.h
EXTRA_DIST = \
egl.def \
README.txt \
SConscript
SConscript \
drivers/haiku \
docs \
main/egl.def \
main/README.txt

34
src/egl/Makefile.sources Normal file
View File

@@ -0,0 +1,34 @@
LIBEGL_C_FILES := \
main/eglapi.c \
main/eglapi.h \
main/eglarray.c \
main/eglarray.h \
main/eglcompiler.h \
main/eglconfig.c \
main/eglconfig.h \
main/eglcontext.c \
main/eglcontext.h \
main/eglcurrent.c \
main/eglcurrent.h \
main/egldefines.h \
main/egldisplay.c \
main/egldisplay.h \
main/egldriver.c \
main/egldriver.h \
main/eglfallbacks.c \
main/eglglobals.c \
main/eglglobals.h \
main/eglimage.c \
main/eglimage.h \
main/egllog.c \
main/egllog.h \
main/eglsurface.c \
main/eglsurface.h \
main/eglsync.c \
main/eglsync.h \
main/egltypedefs.h
dri2_backend_core_FILES := \
drivers/dri2/egl_dri2.c \
drivers/dri2/egl_dri2.h \
drivers/dri2/egl_dri2_fallbacks.h

33
src/egl/SConscript Normal file
View File

@@ -0,0 +1,33 @@
#######################################################################
# SConscript for EGL
Import('*')
env = env.Clone()
env.Append(CPPPATH = [
'#/include',
'#/src/egl/main',
'#/src',
])
# parse Makefile.sources
egl_sources = env.ParseSourceList('Makefile.sources', 'LIBEGL_C_FILES')
env.Append(CPPDEFINES = [
'_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_HAIKU',
'_EGL_BUILT_IN_DRIVER_HAIKU',
'HAVE_HAIKU_PLATFORM',
])
egl_sources.append('drivers/haiku/egl_haiku.cpp')
egl = env.SharedLibrary(
target = 'EGL',
source = egl_sources,
)
egl = env.InstallSharedLibrary(egl, version=(1, 0, 0))
env.Alias('egl', egl)

View File

@@ -1,66 +0,0 @@
# Copyright © 2012 Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
AM_CFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src/egl/main \
-I$(top_srcdir)/src/loader \
-I$(top_srcdir)/src/gbm/main \
-I$(top_srcdir)/src/gbm/backends/dri \
-I$(top_srcdir)/src/egl/wayland/wayland-egl \
-I$(top_srcdir)/src/egl/wayland/wayland-drm \
-I$(top_builddir)/src/egl/wayland/wayland-drm \
$(DEFINES) \
$(VISIBILITY_CFLAGS) \
$(LIBDRM_CFLAGS) \
-DDEFAULT_DRIVER_DIR=\"$(DRI_DRIVER_SEARCH_DIR)\"
noinst_LTLIBRARIES = libegl_dri2.la
libegl_dri2_la_SOURCES = \
egl_dri2.c \
egl_dri2.h \
egl_dri2_fallbacks.h
libegl_dri2_la_LIBADD = \
$(top_builddir)/src/loader/libloader.la \
$(EGL_LIB_DEPS)
if HAVE_SHARED_GLAPI
AM_CFLAGS += -DHAVE_SHARED_GLAPI
endif
if HAVE_EGL_PLATFORM_X11
libegl_dri2_la_SOURCES += platform_x11.c
AM_CFLAGS += -DHAVE_X11_PLATFORM
AM_CFLAGS += $(XCB_DRI2_CFLAGS)
endif
if HAVE_EGL_PLATFORM_WAYLAND
libegl_dri2_la_SOURCES += platform_wayland.c
AM_CFLAGS += -DHAVE_WAYLAND_PLATFORM
AM_CFLAGS += $(WAYLAND_CFLAGS)
endif
if HAVE_EGL_PLATFORM_DRM
libegl_dri2_la_SOURCES += platform_drm.c
AM_CFLAGS += -DHAVE_DRM_PLATFORM
endif

View File

@@ -1,40 +0,0 @@
Import('*')
env = env.Clone()
env.Append(CPPDEFINES = [
'DEFAULT_DRIVER_DIR=\\"\\"'
])
env.Append(CPPPATH = [
'#/include',
'#/src/egl/main',
'#/src/loader',
])
sources = [
'egl_dri2.c',
]
if env['x11']:
sources.append('platform_x11.c')
env.Append(CPPDEFINES = [
'HAVE_X11_PLATFORM',
])
#env.Append(CPPPATH = [
# 'XCB_DRI2_CFLAGS',
#])
if env['drm']:
env.PkgUseModules('DRM')
env.Prepend(LIBS = [
libloader,
])
egl_dri2 = env.ConvenienceLibrary(
target = 'egl_dri2',
source = sources,
)
Export('egl_dri2')

View File

@@ -27,6 +27,8 @@
#define WL_HIDE_DEPRECATED
#include <stdint.h>
#include <stdbool.h>
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
@@ -50,6 +52,23 @@
#endif
#include "egl_dri2.h"
#include "util/u_atomic.h"
/* The kernel header drm_fourcc.h defines the DRM formats below. We duplicate
* some of the definitions here so that building Mesa won't bleeding-edge
* kernel headers.
*/
#ifndef DRM_FORMAT_R8
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
#endif
#ifndef DRM_FORMAT_RG88
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#endif
#ifndef DRM_FORMAT_GR88
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
#endif
const __DRIuseInvalidateExtension use_invalidate = {
.base = { __DRI_USE_INVALIDATE, 1 }
@@ -107,6 +126,18 @@ EGLint dri2_to_egl_attribute_map[] = {
0, /* __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE */
};
const __DRIconfig *
dri2_get_dri_config(struct dri2_egl_config *conf, EGLint surface_type,
EGLenum colorspace)
{
if (colorspace == EGL_GL_COLORSPACE_SRGB_KHR)
return surface_type == EGL_WINDOW_BIT ? conf->dri_srgb_double_config :
conf->dri_srgb_single_config;
else
return surface_type == EGL_WINDOW_BIT ? conf->dri_double_config :
conf->dri_single_config;
}
static EGLBoolean
dri2_match_config(const _EGLConfig *conf, const _EGLConfig *criteria)
{
@@ -128,6 +159,7 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
struct dri2_egl_display *dri2_dpy;
_EGLConfig base;
unsigned int attrib, value, double_buffer;
bool srgb = false;
EGLint key, bind_to_texture_rgb, bind_to_texture_rgba;
unsigned int dri_masks[4] = { 0, 0, 0, 0 };
_EGLConfig *matching_config;
@@ -137,7 +169,7 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
dri2_dpy = disp->DriverData;
_eglInitConfig(&base, disp, id);
i = 0;
double_buffer = 0;
bind_to_texture_rgb = 0;
@@ -153,7 +185,7 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
else
return NULL;
_eglSetConfigKey(&base, EGL_COLOR_BUFFER_TYPE, value);
break;
break;
case __DRI_ATTRIB_CONFIG_CAVEAT:
if (value & __DRI_ATTRIB_NON_CONFORMANT_CONFIG)
@@ -193,6 +225,19 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
dri_masks[3] = value;
break;
case __DRI_ATTRIB_ACCUM_RED_SIZE:
case __DRI_ATTRIB_ACCUM_GREEN_SIZE:
case __DRI_ATTRIB_ACCUM_BLUE_SIZE:
case __DRI_ATTRIB_ACCUM_ALPHA_SIZE:
/* Don't expose visuals with the accumulation buffer. */
if (value > 0)
return NULL;
break;
case __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE:
srgb = value != 0;
break;
default:
key = dri2_to_egl_attribute_map[attrib];
if (key != 0)
@@ -238,28 +283,35 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
if (num_configs == 1) {
conf = (struct dri2_egl_config *) matching_config;
if (double_buffer && !conf->dri_double_config)
if (double_buffer && srgb && !conf->dri_srgb_double_config)
conf->dri_srgb_double_config = dri_config;
else if (double_buffer && !srgb && !conf->dri_double_config)
conf->dri_double_config = dri_config;
else if (!double_buffer && !conf->dri_single_config)
else if (!double_buffer && srgb && !conf->dri_srgb_single_config)
conf->dri_srgb_single_config = dri_config;
else if (!double_buffer && !srgb && !conf->dri_single_config)
conf->dri_single_config = dri_config;
else
/* a similar config type is already added (unlikely) => discard */
return NULL;
}
else if (num_configs == 0) {
conf = malloc(sizeof *conf);
conf = calloc(1, sizeof *conf);
if (conf == NULL)
return NULL;
memcpy(&conf->base, &base, sizeof base);
if (double_buffer) {
conf->dri_double_config = dri_config;
conf->dri_single_config = NULL;
if (srgb)
conf->dri_srgb_double_config = dri_config;
else
conf->dri_double_config = dri_config;
} else {
conf->dri_single_config = dri_config;
conf->dri_double_config = NULL;
if (srgb)
conf->dri_srgb_single_config = dri_config;
else
conf->dri_single_config = dri_config;
}
conf->base.SurfaceType = 0;
conf->base.ConfigID = config_id;
_eglLinkConfig(&conf->base);
@@ -354,7 +406,7 @@ dri2_bind_extensions(struct dri2_egl_display *dri2_dpy,
}
}
}
for (j = 0; matches[j].name; j++) {
field = ((char *) dri2_dpy + matches[j].offset);
if (*(const __DRIextension **) field == NULL) {
@@ -386,7 +438,7 @@ dri2_open_driver(_EGLDisplay *disp)
dri2_dpy->driver = NULL;
end = search_paths + strlen(search_paths);
for (p = search_paths; p < end && dri2_dpy->driver == NULL; p = next + 1) {
for (p = search_paths; p < end; p = next + 1) {
int len;
next = strchr(p, ':');
if (next == NULL)
@@ -408,6 +460,15 @@ dri2_open_driver(_EGLDisplay *disp)
/* not need continue to loop all paths once the driver is found */
if (dri2_dpy->driver != NULL)
break;
#ifdef ANDROID
snprintf(path, sizeof path, "%.*s/gallium_dri.so", len, p);
dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL);
if (dri2_dpy->driver == NULL)
_eglLog(_EGL_DEBUG, "failed to open %s: %s\n", path, dlerror());
else
break;
#endif
}
if (dri2_dpy->driver == NULL) {
@@ -480,6 +541,19 @@ dri2_load_driver_swrast(_EGLDisplay *disp)
return EGL_TRUE;
}
static unsigned
dri2_renderer_query_integer(struct dri2_egl_display *dri2_dpy, int param)
{
const __DRI2rendererQueryExtension *rendererQuery = dri2_dpy->rendererQuery;
unsigned int value = 0;
if (!rendererQuery ||
rendererQuery->queryInteger(dri2_dpy->dri_screen, param, &value) == -1)
return 0;
return value;
}
void
dri2_setup_screen(_EGLDisplay *disp)
{
@@ -510,6 +584,10 @@ dri2_setup_screen(_EGLDisplay *disp)
disp->Extensions.KHR_surfaceless_context = EGL_TRUE;
disp->Extensions.MESA_configless_context = EGL_TRUE;
if (dri2_renderer_query_integer(dri2_dpy,
__DRI2_RENDERER_HAS_FRAMEBUFFER_SRGB))
disp->Extensions.KHR_gl_colorspace = EGL_TRUE;
if (dri2_dpy->dri2 && dri2_dpy->dri2->base.version >= 3) {
disp->Extensions.KHR_create_context = EGL_TRUE;
@@ -517,6 +595,13 @@ dri2_setup_screen(_EGLDisplay *disp)
disp->Extensions.EXT_create_context_robustness = EGL_TRUE;
}
if (dri2_dpy->fence) {
disp->Extensions.KHR_fence_sync = EGL_TRUE;
disp->Extensions.KHR_wait_sync = EGL_TRUE;
if (dri2_dpy->fence->get_fence_from_cl_event)
disp->Extensions.KHR_cl_event2 = EGL_TRUE;
}
if (dri2_dpy->image) {
if (dri2_dpy->image->base.version >= 10 &&
dri2_dpy->image->getCapabilities != NULL) {
@@ -524,8 +609,14 @@ dri2_setup_screen(_EGLDisplay *disp)
capabilities = dri2_dpy->image->getCapabilities(dri2_dpy->dri_screen);
disp->Extensions.MESA_drm_image = (capabilities & __DRI_IMAGE_CAP_GLOBAL_NAMES) != 0;
} else
if (dri2_dpy->image->base.version >= 11)
disp->Extensions.MESA_image_dma_buf_export = EGL_TRUE;
} else {
disp->Extensions.MESA_drm_image = EGL_TRUE;
if (dri2_dpy->image->base.version >= 11)
disp->Extensions.MESA_image_dma_buf_export = EGL_TRUE;
}
disp->Extensions.KHR_image_base = EGL_TRUE;
disp->Extensions.KHR_gl_renderbuffer_image = EGL_TRUE;
@@ -534,7 +625,10 @@ dri2_setup_screen(_EGLDisplay *disp)
disp->Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
disp->Extensions.KHR_gl_texture_cubemap_image = EGL_TRUE;
}
#ifdef HAVE_DRM_PLATFORM
if (dri2_renderer_query_integer(dri2_dpy,
__DRI2_RENDERER_HAS_TEXTURE_3D))
disp->Extensions.KHR_gl_texture_3D_image = EGL_TRUE;
#ifdef HAVE_LIBDRM
if (dri2_dpy->image->base.version >= 8 &&
dri2_dpy->image->createImageFromDmaBufs) {
disp->Extensions.EXT_image_dma_buf_import = EGL_TRUE;
@@ -552,6 +646,7 @@ dri2_create_screen(_EGLDisplay *disp)
{
const __DRIextension **extensions;
struct dri2_egl_display *dri2_dpy;
unsigned i;
dri2_dpy = disp->DriverData;
@@ -590,27 +685,31 @@ dri2_create_screen(_EGLDisplay *disp)
dri2_dpy->own_dri_screen = 1;
extensions = dri2_dpy->core->getExtensions(dri2_dpy->dri_screen);
if (dri2_dpy->dri2) {
unsigned i;
if (dri2_dpy->dri2) {
if (!dri2_bind_extensions(dri2_dpy, dri2_core_extensions, extensions))
goto cleanup_dri_screen;
for (i = 0; extensions[i]; i++) {
if (strcmp(extensions[i]->name, __DRI2_ROBUSTNESS) == 0) {
dri2_dpy->robustness = (__DRIrobustnessExtension *) extensions[i];
}
if (strcmp(extensions[i]->name, __DRI2_CONFIG_QUERY) == 0) {
dri2_dpy->config = (__DRI2configQueryExtension *) extensions[i];
}
}
} else {
assert(dri2_dpy->swrast);
if (!dri2_bind_extensions(dri2_dpy, swrast_core_extensions, extensions))
goto cleanup_dri_screen;
}
for (i = 0; extensions[i]; i++) {
if (strcmp(extensions[i]->name, __DRI2_ROBUSTNESS) == 0) {
dri2_dpy->robustness = (__DRIrobustnessExtension *) extensions[i];
}
if (strcmp(extensions[i]->name, __DRI2_CONFIG_QUERY) == 0) {
dri2_dpy->config = (__DRI2configQueryExtension *) extensions[i];
}
if (strcmp(extensions[i]->name, __DRI2_FENCE) == 0) {
dri2_dpy->fence = (__DRI2fenceExtension *) extensions[i];
}
if (strcmp(extensions[i]->name, __DRI2_RENDERER_QUERY) == 0) {
dri2_dpy->rendererQuery = (__DRI2rendererQueryExtension *) extensions[i];
}
}
dri2_setup_screen(disp);
return EGL_TRUE;
@@ -632,6 +731,13 @@ dri2_initialize(_EGLDriver *drv, _EGLDisplay *disp)
return EGL_FALSE;
switch (disp->Platform) {
#ifdef HAVE_SURFACELESS_PLATFORM
case _EGL_PLATFORM_SURFACELESS:
if (disp->Options.TestOnly)
return EGL_TRUE;
return dri2_initialize_surfaceless(drv, disp);
#endif
#ifdef HAVE_X11_PLATFORM
case _EGL_PLATFORM_X11:
if (disp->Options.TestOnly)
@@ -702,7 +808,12 @@ dri2_terminate(_EGLDriver *drv, _EGLDisplay *disp)
#endif
#ifdef HAVE_WAYLAND_PLATFORM
case _EGL_PLATFORM_WAYLAND:
wl_drm_destroy(dri2_dpy->wl_drm);
if (dri2_dpy->wl_drm)
wl_drm_destroy(dri2_dpy->wl_drm);
if (dri2_dpy->wl_shm)
wl_shm_destroy(dri2_dpy->wl_shm);
wl_registry_destroy(dri2_dpy->wl_registry);
wl_event_queue_destroy(dri2_dpy->wl_queue);
if (dri2_dpy->own_device) {
wl_display_disconnect(dri2_dpy->wl_dpy);
}
@@ -1225,7 +1336,8 @@ dri2_bind_tex_image(_EGLDriver *drv,
format = __DRI_TEXTURE_FORMAT_RGBA;
break;
default:
assert(0);
assert(!"Unexpected texture format in dri2_bind_tex_image()");
format = __DRI_TEXTURE_FORMAT_RGBA;
}
switch (dri2_surf->base.TextureTarget) {
@@ -1233,7 +1345,8 @@ dri2_bind_tex_image(_EGLDriver *drv,
target = GL_TEXTURE_2D;
break;
default:
assert(0);
target = GL_TEXTURE_2D;
assert(!"Unexpected texture target in dri2_bind_tex_image()");
}
(*dri2_dpy->tex_buffer->setTexBuffer2)(dri2_ctx->dri_context,
@@ -1335,53 +1448,6 @@ dri2_create_image_khr_renderbuffer(_EGLDisplay *disp, _EGLContext *ctx,
return dri2_create_image_from_dri(disp, dri_image);
}
#ifdef HAVE_DRM_PLATFORM
static _EGLImage *
dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, _EGLContext *ctx,
EGLClientBuffer buffer, const EGLint *attr_list)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
EGLint format, name, pitch, err;
_EGLImageAttribs attrs;
__DRIimage *dri_image;
name = (EGLint) (uintptr_t) buffer;
err = _eglParseImageAttribList(&attrs, disp, attr_list);
if (err != EGL_SUCCESS)
return NULL;
if (attrs.Width <= 0 || attrs.Height <= 0 ||
attrs.DRMBufferStrideMESA <= 0) {
_eglError(EGL_BAD_PARAMETER,
"bad width, height or stride");
return NULL;
}
switch (attrs.DRMBufferFormatMESA) {
case EGL_DRM_BUFFER_FORMAT_ARGB32_MESA:
format = __DRI_IMAGE_FORMAT_ARGB8888;
pitch = attrs.DRMBufferStrideMESA;
break;
default:
_eglError(EGL_BAD_PARAMETER,
"dri2_create_image_khr: unsupported pixmap depth");
return NULL;
}
dri_image =
dri2_dpy->image->createImageFromName(dri2_dpy->dri_screen,
attrs.Width,
attrs.Height,
format,
name,
pitch,
NULL);
return dri2_create_image_from_dri(disp, dri_image);
}
#endif
#ifdef HAVE_WAYLAND_PLATFORM
/* This structure describes how a wl_buffer maps to one or more
@@ -1479,6 +1545,10 @@ dri2_create_image_khr_texture_error(int dri_error)
egl_error = EGL_BAD_PARAMETER;
break;
case __DRI_IMAGE_ERROR_BAD_ACCESS:
egl_error = EGL_BAD_ACCESS;
break;
default:
assert(0);
egl_error = EGL_BAD_MATCH;
@@ -1517,9 +1587,15 @@ dri2_create_image_khr_texture(_EGLDisplay *disp, _EGLContext *ctx,
gl_target = GL_TEXTURE_2D;
break;
case EGL_GL_TEXTURE_3D_KHR:
depth = attrs.GLTextureZOffset;
gl_target = GL_TEXTURE_3D;
break;
if (disp->Extensions.KHR_gl_texture_3D_image) {
depth = attrs.GLTextureZOffset;
gl_target = GL_TEXTURE_3D;
break;
}
else {
_eglError(EGL_BAD_PARAMETER, "dri2_create_image_khr");
return EGL_NO_IMAGE_KHR;
}
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_X_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_X_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Y_KHR:
@@ -1571,7 +1647,52 @@ dri2_create_wayland_buffer_from_image(_EGLDriver *drv, _EGLDisplay *dpy,
return dri2_dpy->vtbl->create_wayland_buffer_from_image(drv, dpy, img);
}
#ifdef HAVE_DRM_PLATFORM
#ifdef HAVE_LIBDRM
static _EGLImage *
dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, _EGLContext *ctx,
EGLClientBuffer buffer, const EGLint *attr_list)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
EGLint format, name, pitch, err;
_EGLImageAttribs attrs;
__DRIimage *dri_image;
name = (EGLint) (uintptr_t) buffer;
err = _eglParseImageAttribList(&attrs, disp, attr_list);
if (err != EGL_SUCCESS)
return NULL;
if (attrs.Width <= 0 || attrs.Height <= 0 ||
attrs.DRMBufferStrideMESA <= 0) {
_eglError(EGL_BAD_PARAMETER,
"bad width, height or stride");
return NULL;
}
switch (attrs.DRMBufferFormatMESA) {
case EGL_DRM_BUFFER_FORMAT_ARGB32_MESA:
format = __DRI_IMAGE_FORMAT_ARGB8888;
pitch = attrs.DRMBufferStrideMESA;
break;
default:
_eglError(EGL_BAD_PARAMETER,
"dri2_create_image_khr: unsupported pixmap depth");
return NULL;
}
dri_image =
dri2_dpy->image->createImageFromName(dri2_dpy->dri_screen,
attrs.Width,
attrs.Height,
format,
name,
pitch,
NULL);
return dri2_create_image_from_dri(disp, dri_image);
}
static EGLBoolean
dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
{
@@ -1624,6 +1745,9 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
unsigned i, plane_n;
switch (attrs->DMABufFourCC.Value) {
case DRM_FORMAT_R8:
case DRM_FORMAT_RG88:
case DRM_FORMAT_GR88:
case DRM_FORMAT_RGB332:
case DRM_FORMAT_BGR233:
case DRM_FORMAT_XRGB4444:
@@ -1801,59 +1925,6 @@ dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx,
return res;
}
#endif
_EGLImage *
dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
_EGLContext *ctx, EGLenum target,
EGLClientBuffer buffer, const EGLint *attr_list)
{
(void) drv;
switch (target) {
case EGL_GL_TEXTURE_2D_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_X_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_X_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Y_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Z_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_KHR:
return dri2_create_image_khr_texture(disp, ctx, target, buffer, attr_list);
case EGL_GL_RENDERBUFFER_KHR:
return dri2_create_image_khr_renderbuffer(disp, ctx, buffer, attr_list);
#ifdef HAVE_DRM_PLATFORM
case EGL_DRM_BUFFER_MESA:
return dri2_create_image_mesa_drm_buffer(disp, ctx, buffer, attr_list);
#endif
#ifdef HAVE_WAYLAND_PLATFORM
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer, attr_list);
#endif
#ifdef HAVE_DRM_PLATFORM
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
default:
_eglError(EGL_BAD_PARAMETER, "dri2_create_image_khr");
return EGL_NO_IMAGE_KHR;
}
}
static EGLBoolean
dri2_destroy_image_khr(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *image)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img = dri2_egl_image(image);
(void) drv;
dri2_dpy->image->destroyImage(dri2_img->dri_image);
free(dri2_img);
return EGL_TRUE;
}
#ifdef HAVE_DRM_PLATFORM
static _EGLImage *
dri2_create_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp,
const EGLint *attr_list)
@@ -1921,7 +1992,7 @@ dri2_create_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp,
if (attrs.DRMBufferUseMESA & EGL_DRM_BUFFER_USE_CURSOR_MESA)
dri_use |= __DRI_IMAGE_USE_CURSOR;
dri2_img->dri_image =
dri2_img->dri_image =
dri2_dpy->image->createImage(dri2_dpy->dri_screen,
attrs.Width, attrs.Height,
format, dri_use, dri2_img);
@@ -1964,8 +2035,114 @@ dri2_export_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *img,
return EGL_TRUE;
}
static EGLBoolean
dri2_export_dma_buf_image_query_mesa(_EGLDriver *drv, _EGLDisplay *disp,
_EGLImage *img,
EGLint *fourcc, EGLint *nplanes,
EGLuint64KHR *modifiers)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img = dri2_egl_image(img);
(void) drv;
if (nplanes)
dri2_dpy->image->queryImage(dri2_img->dri_image,
__DRI_IMAGE_ATTRIB_NUM_PLANES, nplanes);
if (fourcc)
dri2_dpy->image->queryImage(dri2_img->dri_image,
__DRI_IMAGE_ATTRIB_FOURCC, fourcc);
if (modifiers)
*modifiers = 0;
return EGL_TRUE;
}
static EGLBoolean
dri2_export_dma_buf_image_mesa(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *img,
int *fds, EGLint *strides, EGLint *offsets)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img = dri2_egl_image(img);
(void) drv;
/* rework later to provide multiple fds/strides/offsets */
if (fds)
dri2_dpy->image->queryImage(dri2_img->dri_image,
__DRI_IMAGE_ATTRIB_FD, fds);
if (strides)
dri2_dpy->image->queryImage(dri2_img->dri_image,
__DRI_IMAGE_ATTRIB_STRIDE, strides);
if (offsets)
offsets[0] = 0;
return EGL_TRUE;
}
#endif
_EGLImage *
dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
_EGLContext *ctx, EGLenum target,
EGLClientBuffer buffer, const EGLint *attr_list)
{
(void) drv;
switch (target) {
case EGL_GL_TEXTURE_2D_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_X_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_X_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Y_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Z_KHR:
case EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_KHR:
return dri2_create_image_khr_texture(disp, ctx, target, buffer, attr_list);
case EGL_GL_TEXTURE_3D_KHR:
if (disp->Extensions.KHR_gl_texture_3D_image) {
return dri2_create_image_khr_texture(disp, ctx, target, buffer, attr_list);
}
else {
_eglError(EGL_BAD_PARAMETER, "dri2_create_image_khr");
return EGL_NO_IMAGE_KHR;
}
case EGL_GL_RENDERBUFFER_KHR:
return dri2_create_image_khr_renderbuffer(disp, ctx, buffer, attr_list);
#ifdef HAVE_LIBDRM
case EGL_DRM_BUFFER_MESA:
return dri2_create_image_mesa_drm_buffer(disp, ctx, buffer, attr_list);
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
#ifdef HAVE_WAYLAND_PLATFORM
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer, attr_list);
#endif
default:
_eglError(EGL_BAD_PARAMETER, "dri2_create_image_khr");
return EGL_NO_IMAGE_KHR;
}
}
static EGLBoolean
dri2_destroy_image_khr(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *image)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img = dri2_egl_image(image);
(void) drv;
dri2_dpy->image->destroyImage(dri2_img->dri_image);
free(dri2_img);
return EGL_TRUE;
}
#ifdef HAVE_WAYLAND_PLATFORM
static void
@@ -2043,13 +2220,11 @@ dri2_bind_wayland_display_wl(_EGLDriver *drv, _EGLDisplay *disp,
wl_drm_callbacks.authenticate =
(int(*)(void *, uint32_t)) dri2_dpy->vtbl->authenticate;
#ifdef HAVE_LIBDRM
if (drmGetCap(dri2_dpy->fd, DRM_CAP_PRIME, &cap) == 0 &&
cap == (DRM_PRIME_CAP_IMPORT | DRM_PRIME_CAP_EXPORT) &&
dri2_dpy->image->base.version >= 7 &&
dri2_dpy->image->createImageFromFds != NULL)
flags |= WAYLAND_DRM_PRIME;
#endif
dri2_dpy->wl_server_drm =
wayland_drm_init(wl_dpy, dri2_dpy->device_name,
@@ -2115,6 +2290,130 @@ dri2_query_wayland_buffer_wl(_EGLDriver *drv, _EGLDisplay *disp,
}
#endif
static void
dri2_egl_ref_sync(struct dri2_egl_sync *sync)
{
p_atomic_inc(&sync->refcount);
}
static void
dri2_egl_unref_sync(struct dri2_egl_display *dri2_dpy,
struct dri2_egl_sync *dri2_sync)
{
if (p_atomic_dec_zero(&dri2_sync->refcount)) {
dri2_dpy->fence->destroy_fence(dri2_dpy->dri_screen, dri2_sync->fence);
free(dri2_sync);
}
}
static _EGLSync *
dri2_create_sync(_EGLDriver *drv, _EGLDisplay *dpy,
EGLenum type, const EGLint *attrib_list,
const EGLAttrib *attrib_list64)
{
_EGLContext *ctx = _eglGetCurrentContext();
struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy);
struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx);
struct dri2_egl_sync *dri2_sync;
dri2_sync = calloc(1, sizeof(struct dri2_egl_sync));
if (!dri2_sync) {
_eglError(EGL_BAD_ALLOC, "eglCreateSyncKHR");
return NULL;
}
if (!_eglInitSync(&dri2_sync->base, dpy, type, attrib_list,
attrib_list64)) {
free(dri2_sync);
return NULL;
}
switch (type) {
case EGL_SYNC_FENCE_KHR:
dri2_sync->fence = dri2_dpy->fence->create_fence(dri2_ctx->dri_context);
if (!dri2_sync->fence) {
/* Why did it fail? DRI doesn't return an error code, so we emit
* a generic EGL error that doesn't communicate user error.
*/
_eglError(EGL_BAD_ALLOC, "eglCreateSyncKHR");
free(dri2_sync);
return NULL;
}
break;
case EGL_SYNC_CL_EVENT_KHR:
dri2_sync->fence = dri2_dpy->fence->get_fence_from_cl_event(
dri2_dpy->dri_screen,
dri2_sync->base.CLEvent);
/* this can only happen if the cl_event passed in is invalid. */
if (!dri2_sync->fence) {
_eglError(EGL_BAD_ATTRIBUTE, "eglCreateSyncKHR");
free(dri2_sync);
return NULL;
}
/* the initial status must be "signaled" if the cl_event is signaled */
if (dri2_dpy->fence->client_wait_sync(dri2_ctx->dri_context,
dri2_sync->fence, 0, 0))
dri2_sync->base.SyncStatus = EGL_SIGNALED_KHR;
break;
}
p_atomic_set(&dri2_sync->refcount, 1);
return &dri2_sync->base;
}
static EGLBoolean
dri2_destroy_sync(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy);
struct dri2_egl_sync *dri2_sync = dri2_egl_sync(sync);
dri2_egl_unref_sync(dri2_dpy, dri2_sync);
return EGL_TRUE;
}
static EGLint
dri2_client_wait_sync(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync,
EGLint flags, EGLTime timeout)
{
_EGLContext *ctx = _eglGetCurrentContext();
struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy);
struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx);
struct dri2_egl_sync *dri2_sync = dri2_egl_sync(sync);
unsigned wait_flags = 0;
EGLint ret = EGL_CONDITION_SATISFIED_KHR;
if (flags & EGL_SYNC_FLUSH_COMMANDS_BIT_KHR)
wait_flags |= __DRI2_FENCE_FLAG_FLUSH_COMMANDS;
/* the sync object should take a reference while waiting */
dri2_egl_ref_sync(dri2_sync);
if (dri2_dpy->fence->client_wait_sync(dri2_ctx->dri_context,
dri2_sync->fence, wait_flags,
timeout))
dri2_sync->base.SyncStatus = EGL_SIGNALED_KHR;
else
ret = EGL_TIMEOUT_EXPIRED_KHR;
dri2_egl_unref_sync(dri2_dpy, dri2_sync);
return ret;
}
static EGLint
dri2_server_wait_sync(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync)
{
_EGLContext *ctx = _eglGetCurrentContext();
struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy);
struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx);
struct dri2_egl_sync *dri2_sync = dri2_egl_sync(sync);
dri2_dpy->fence->server_wait_sync(dri2_ctx->dri_context,
dri2_sync->fence, 0);
return EGL_TRUE;
}
static void
dri2_unload(_EGLDriver *drv)
{
@@ -2129,18 +2428,12 @@ static EGLBoolean
dri2_load(_EGLDriver *drv)
{
struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv);
#ifdef HAVE_SHARED_GLAPI
#ifdef HAVE_ANDROID_PLATFORM
const char *libname = "libglapi.so";
#elif defined(__APPLE__)
const char *libname = "libglapi.0.dylib";
#else
const char *libname = "libglapi.so.0";
#endif
#else
/*
* Both libGL.so and libglapi.so are glapi providers. There is no way to
* tell which one to load.
*/
const char *libname = NULL;
#endif
void *handle;
@@ -2215,9 +2508,11 @@ _eglBuiltInDriverDRI2(const char *args)
dri2_drv->base.API.CreateImageKHR = dri2_create_image;
dri2_drv->base.API.DestroyImageKHR = dri2_destroy_image_khr;
dri2_drv->base.API.CreateWaylandBufferFromImageWL = dri2_create_wayland_buffer_from_image;
#ifdef HAVE_DRM_PLATFORM
#ifdef HAVE_LIBDRM
dri2_drv->base.API.CreateDRMImageMESA = dri2_create_drm_image_mesa;
dri2_drv->base.API.ExportDRMImageMESA = dri2_export_drm_image_mesa;
dri2_drv->base.API.ExportDMABUFImageQueryMESA = dri2_export_dma_buf_image_query_mesa;
dri2_drv->base.API.ExportDMABUFImageMESA = dri2_export_dma_buf_image_mesa;
#endif
#ifdef HAVE_WAYLAND_PLATFORM
dri2_drv->base.API.BindWaylandDisplayWL = dri2_bind_wayland_display_wl;
@@ -2225,6 +2520,10 @@ _eglBuiltInDriverDRI2(const char *args)
dri2_drv->base.API.QueryWaylandBufferWL = dri2_query_wayland_buffer_wl;
#endif
dri2_drv->base.API.GetSyncValuesCHROMIUM = dri2_get_sync_values_chromium;
dri2_drv->base.API.CreateSyncKHR = dri2_create_sync;
dri2_drv->base.API.ClientWaitSyncKHR = dri2_client_wait_sync;
dri2_drv->base.API.WaitSyncKHR = dri2_server_wait_sync;
dri2_drv->base.API.DestroySyncKHR = dri2_destroy_sync;
dri2_drv->base.Name = "DRI2";
dri2_drv->base.Unload = dri2_unload;

View File

@@ -28,6 +28,8 @@
#ifndef EGL_DRI2_INCLUDED
#define EGL_DRI2_INCLUDED
#include <stdint.h>
#ifdef HAVE_X11_PLATFORM
#include <xcb/xcb.h>
#include <xcb/dri2.h>
@@ -72,6 +74,7 @@
#include "egllog.h"
#include "eglsurface.h"
#include "eglimage.h"
#include "eglsync.h"
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
@@ -117,9 +120,9 @@ struct dri2_egl_display_vtbl {
EGLBoolean (*swap_buffers)(_EGLDriver *drv, _EGLDisplay *dpy,
_EGLSurface *surf);
EGLBoolean (*swap_buffers_with_damage)(_EGLDriver *drv, _EGLDisplay *dpy,
_EGLSurface *surface,
const EGLint *rects, EGLint n_rects);
EGLBoolean (*swap_buffers_with_damage)(_EGLDriver *drv, _EGLDisplay *dpy,
_EGLSurface *surface,
const EGLint *rects, EGLint n_rects);
EGLBoolean (*swap_buffers_region)(_EGLDriver *drv, _EGLDisplay *dpy,
_EGLSurface *surf, EGLint numRects,
@@ -162,6 +165,8 @@ struct dri2_egl_display
const __DRIimageExtension *image;
const __DRIrobustnessExtension *robustness;
const __DRI2configQueryExtension *config;
const __DRI2fenceExtension *fence;
const __DRI2rendererQueryExtension *rendererQuery;
int fd;
int own_device;
@@ -192,10 +197,13 @@ struct dri2_egl_display
struct wl_registry *wl_registry;
struct wl_drm *wl_server_drm;
struct wl_drm *wl_drm;
struct wl_shm *wl_shm;
struct wl_event_queue *wl_queue;
int authenticated;
int formats;
uint32_t capabilities;
int is_render_node;
int is_different_gpu;
#endif
};
@@ -249,6 +257,11 @@ struct dri2_egl_surface
#ifdef HAVE_WAYLAND_PLATFORM
struct wl_buffer *wl_buffer;
__DRIimage *dri_image;
/* for is_different_gpu case. NULL else */
__DRIimage *linear_copy;
/* for swrast */
void *data;
int data_size;
#endif
#ifdef HAVE_DRM_PLATFORM
struct gbm_bo *bo;
@@ -273,6 +286,8 @@ struct dri2_egl_config
_EGLConfig base;
const __DRIconfig *dri_single_config;
const __DRIconfig *dri_double_config;
const __DRIconfig *dri_srgb_single_config;
const __DRIconfig *dri_srgb_double_config;
};
struct dri2_egl_image
@@ -281,6 +296,12 @@ struct dri2_egl_image
__DRIimage *dri_image;
};
struct dri2_egl_sync {
_EGLSync base;
int refcount;
void *fence;
};
/* From xmlpool/options.h, user exposed so should be stable */
#define DRI_CONF_VBLANK_NEVER 0
#define DRI_CONF_VBLANK_DEF_INTERVAL_0 1
@@ -290,6 +311,7 @@ struct dri2_egl_image
/* standard typecasts */
_EGL_DRIVER_STANDARD_TYPECASTS(dri2_egl)
_EGL_DRIVER_TYPECAST(dri2_egl_image, _EGLImage, obj)
_EGL_DRIVER_TYPECAST(dri2_egl_sync, _EGLSync, obj)
extern const __DRIimageLookupExtension image_lookup_extension;
extern const __DRIuseInvalidateExtension use_invalidate;
@@ -332,7 +354,14 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp);
EGLBoolean
dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *disp);
EGLBoolean
dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay *disp);
void
dri2_flush_drawable_for_swapbuffers(_EGLDisplay *disp, _EGLSurface *draw);
const __DRIconfig *
dri2_get_dri_config(struct dri2_egl_config *conf, EGLint surface_type,
EGLenum colorspace);
#endif /* EGL_DRI2_INCLUDED */

View File

@@ -45,6 +45,15 @@ dri2_fallback_create_pbuffer_surface(_EGLDriver *drv, _EGLDisplay *disp,
return NULL;
}
static inline _EGLImage*
dri2_fallback_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
_EGLContext *ctx, EGLenum target,
EGLClientBuffer buffer,
const EGLint *attr_list)
{
return NULL;
}
static inline EGLBoolean
dri2_fallback_swap_interval(_EGLDriver *drv, _EGLDisplay *dpy,
_EGLSurface *surf, EGLint interval)

View File

@@ -199,6 +199,7 @@ droid_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
struct dri2_egl_config *dri2_conf = dri2_egl_config(conf);
struct dri2_egl_surface *dri2_surf;
struct ANativeWindow *window = native_window;
const __DRIconfig *config;
dri2_surf = calloc(1, sizeof *dri2_surf);
if (!dri2_surf) {
@@ -230,9 +231,11 @@ droid_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
window->query(window, NATIVE_WINDOW_HEIGHT, &dri2_surf->base.Height);
}
config = dri2_get_dri_config(dri2_conf, EGL_WINDOW_BIT,
dri2_surf->base.GLColorspace);
dri2_surf->dri_drawable =
(*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen,
dri2_conf->dri_double_config,
(*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config,
dri2_surf);
if (dri2_surf->dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, "dri2->createNewDrawable");
@@ -707,10 +710,6 @@ dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *dpy)
dpy->Extensions.ANDROID_image_native_buffer = EGL_TRUE;
dpy->Extensions.KHR_image_base = EGL_TRUE;
/* we're supporting EGL 1.4 */
dpy->VersionMajor = 1;
dpy->VersionMinor = 4;
/* Fill vtbl last to prevent accidentally calling virtual function during
* initialization.
*/

View File

@@ -25,6 +25,7 @@
* Kristian Høgsberg <krh@bitplanet.net>
*/
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
@@ -67,7 +68,7 @@ release_buffer(struct gbm_surface *_surf, struct gbm_bo *bo)
{
struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
struct dri2_egl_surface *dri2_surf = surf->dri_private;
int i;
unsigned i;
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
if (dri2_surf->color_buffers[i].bo == bo) {
@@ -81,7 +82,7 @@ has_free_buffers(struct gbm_surface *_surf)
{
struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
struct dri2_egl_surface *dri2_surf = surf->dri_private;
int i;
unsigned i;
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
if (!dri2_surf->color_buffers[i].locked)
@@ -114,8 +115,11 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
switch (type) {
case EGL_WINDOW_BIT:
if (!window)
return NULL;
if (!window) {
_eglError(EGL_BAD_NATIVE_WINDOW, "dri2_create_surface");
goto cleanup_surf;
}
surf = gbm_dri_surface(window);
dri2_surf->gbm_surf = surf;
dri2_surf->base.Width = surf->base.width;
@@ -127,10 +131,13 @@ dri2_drm_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
}
if (dri2_dpy->dri2) {
const __DRIconfig *config =
dri2_get_dri_config(dri2_conf, EGL_WINDOW_BIT,
dri2_surf->base.GLColorspace);
dri2_surf->dri_drawable =
(*dri2_dpy->dri2->createNewDrawable) (dri2_dpy->dri_screen,
dri2_conf->dri_double_config,
dri2_surf->gbm_surf);
(*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config,
dri2_surf->gbm_surf);
} else {
assert(dri2_dpy->swrast != NULL);
@@ -182,7 +189,7 @@ dri2_drm_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
int i;
unsigned i;
if (!_eglPutSurface(surf))
return EGL_TRUE;
@@ -211,7 +218,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
struct dri2_egl_display *dri2_dpy =
dri2_egl_display(dri2_surf->base.Resource.Display);
struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
int i;
unsigned i;
if (dri2_surf->back == NULL) {
for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
@@ -407,7 +414,7 @@ dri2_drm_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *draw)
{
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw);
int i;
unsigned i;
if (dri2_dpy->swrast) {
(*dri2_dpy->core->swapBuffers)(dri2_surf->dri_drawable);
@@ -610,9 +617,9 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
char buf[64];
int n = snprintf(buf, sizeof(buf), DRM_DEV_NAME, DRM_DIR_NAME, 0);
if (n != -1 && n < sizeof(buf))
fd = open(buf, O_RDWR);
fd = loader_open_device(buf);
if (fd < 0)
fd = open("/dev/dri/card0", O_RDWR);
fd = loader_open_device("/dev/dri/card0");
dri2_dpy->own_device = 1;
gbm = gbm_create_device(fd);
if (gbm == NULL)
@@ -631,7 +638,7 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
}
if (fd < 0) {
fd = dup(gbm_device_get_fd(gbm));
fd = fcntl(gbm_device_get_fd(gbm), F_DUPFD_CLOEXEC, 3);
if (fd < 0) {
free(dri2_dpy);
return EGL_FALSE;
@@ -668,15 +675,21 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
for (i = 0; dri2_dpy->driver_configs[i]; i++) {
EGLint format, attr_list[3];
unsigned int mask;
unsigned int red, alpha;
dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i],
__DRI_ATTRIB_RED_MASK, &mask);
if (mask == 0x3ff00000)
__DRI_ATTRIB_RED_MASK, &red);
dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i],
__DRI_ATTRIB_ALPHA_MASK, &alpha);
if (red == 0x3ff00000 && alpha == 0x00000000)
format = GBM_FORMAT_XRGB2101010;
else if (mask == 0x00ff0000)
else if (red == 0x3ff00000 && alpha == 0xc0000000)
format = GBM_FORMAT_ARGB2101010;
else if (red == 0x00ff0000 && alpha == 0x00000000)
format = GBM_FORMAT_XRGB8888;
else if (mask == 0xf800)
else if (red == 0x00ff0000 && alpha == 0xff000000)
format = GBM_FORMAT_ARGB8888;
else if (red == 0xf800)
format = GBM_FORMAT_RGB565;
else
continue;
@@ -708,10 +721,6 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
}
#endif
/* we're supporting EGL 1.4 */
disp->VersionMajor = 1;
disp->VersionMinor = 4;
/* Fill vtbl last to prevent accidentally calling virtual function during
* initialization.
*/

View File

@@ -0,0 +1,162 @@
/*
* Mesa 3-D graphics library
*
* Copyright (c) 2014 The Chromium OS Authors.
* Copyright © 2011 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <xf86drm.h>
#include <dlfcn.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#include "egl_dri2.h"
#include "egl_dri2_fallbacks.h"
#include "loader.h"
static struct dri2_egl_display_vtbl dri2_surfaceless_display_vtbl = {
.create_pixmap_surface = dri2_fallback_create_pixmap_surface,
.create_image = dri2_create_image_khr,
.swap_interval = dri2_fallback_swap_interval,
.swap_buffers_with_damage = dri2_fallback_swap_buffers_with_damage,
.swap_buffers_region = dri2_fallback_swap_buffers_region,
.post_sub_buffer = dri2_fallback_post_sub_buffer,
.copy_buffers = dri2_fallback_copy_buffers,
.query_buffer_age = dri2_fallback_query_buffer_age,
.create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image,
.get_sync_values = dri2_fallback_get_sync_values,
};
static void
surfaceless_flush_front_buffer(__DRIdrawable *driDrawable, void *loaderPrivate)
{
}
static __DRIbuffer *
surfaceless_get_buffers_with_format(__DRIdrawable * driDrawable,
int *width, int *height,
unsigned int *attachments, int count,
int *out_count, void *loaderPrivate)
{
struct dri2_egl_surface *dri2_surf = loaderPrivate;
dri2_surf->buffer_count = 1;
if (width)
*width = dri2_surf->base.Width;
if (height)
*height = dri2_surf->base.Height;
*out_count = dri2_surf->buffer_count;;
return dri2_surf->buffers;
}
#define DRM_RENDER_DEV_NAME "%s/renderD%d"
EGLBoolean
dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay *disp)
{
struct dri2_egl_display *dri2_dpy;
const char* err;
int i;
int driver_loaded = 0;
loader_set_logger(_eglLog);
dri2_dpy = calloc(1, sizeof *dri2_dpy);
if (!dri2_dpy)
return _eglError(EGL_BAD_ALLOC, "eglInitialize");
disp->DriverData = (void *) dri2_dpy;
const int limit = 64;
const int base = 128;
for (i = 0; i < limit; ++i) {
char *card_path;
if (asprintf(&card_path, DRM_RENDER_DEV_NAME, DRM_DIR_NAME, base + i) < 0)
continue;
dri2_dpy->fd = loader_open_device(card_path);
free(card_path);
if (dri2_dpy->fd < 0)
continue;
dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0);
if (dri2_dpy->driver_name) {
if (dri2_load_driver(disp)) {
driver_loaded = 1;
break;
}
free(dri2_dpy->driver_name);
}
close(dri2_dpy->fd);
}
if (!driver_loaded) {
err = "DRI2: failed to load driver";
goto cleanup_display;
}
dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER;
dri2_dpy->dri2_loader_extension.base.version = 3;
dri2_dpy->dri2_loader_extension.getBuffers = NULL;
dri2_dpy->dri2_loader_extension.flushFrontBuffer =
surfaceless_flush_front_buffer;
dri2_dpy->dri2_loader_extension.getBuffersWithFormat =
surfaceless_get_buffers_with_format;
dri2_dpy->extensions[0] = &dri2_dpy->dri2_loader_extension.base;
dri2_dpy->extensions[1] = &image_lookup_extension.base;
dri2_dpy->extensions[2] = &use_invalidate.base;
dri2_dpy->extensions[3] = NULL;
if (!dri2_create_screen(disp)) {
err = "DRI2: failed to create screen";
goto cleanup_driver;
}
for (i = 0; dri2_dpy->driver_configs[i]; i++) {
dri2_add_config(disp, dri2_dpy->driver_configs[i],
i + 1, EGL_WINDOW_BIT, NULL, NULL);
}
disp->Extensions.KHR_image_base = EGL_TRUE;
/* Fill vtbl last to prevent accidentally calling virtual function during
* initialization.
*/
dri2_dpy->vtbl = &dri2_surfaceless_display_vtbl;
return EGL_TRUE;
cleanup_driver:
dlclose(dri2_dpy->driver);
free(dri2_dpy->driver_name);
close(dri2_dpy->fd);
cleanup_display:
free(dri2_dpy);
return _eglError(EGL_NOT_INITIALIZED, err);
}

File diff suppressed because it is too large Load Diff

View File

@@ -26,6 +26,7 @@
*/
#include <stdbool.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
@@ -42,6 +43,7 @@
#include "egl_dri2.h"
#include "egl_dri2_fallbacks.h"
#include "loader.h"
static EGLBoolean
dri2_x11_swap_interval(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf,
@@ -54,7 +56,7 @@ swrastCreateDrawable(struct dri2_egl_display * dri2_dpy,
uint32_t mask;
const uint32_t function = GXcopy;
uint32_t valgc[2];
/* create GC's */
dri2_surf->gc = xcb_generate_id(dri2_dpy->conn);
mask = XCB_GC_FUNCTION;
@@ -224,7 +226,7 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn));
screen = get_xcb_screen(s, dri2_dpy->screen);
if (!screen) {
_eglError(EGL_BAD_NATIVE_WINDOW, "dri2_create_surface");
_eglError(EGL_BAD_ALLOC, "failed to get xcb screen");
goto cleanup_surf;
}
@@ -233,16 +235,23 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
dri2_surf->drawable, screen->root,
dri2_surf->base.Width, dri2_surf->base.Height);
} else {
if (!drawable) {
if (type == EGL_WINDOW_BIT)
_eglError(EGL_BAD_NATIVE_WINDOW, "dri2_create_surface");
else
_eglError(EGL_BAD_NATIVE_PIXMAP, "dri2_create_surface");
goto cleanup_surf;
}
dri2_surf->drawable = drawable;
}
if (dri2_dpy->dri2) {
dri2_surf->dri_drawable =
(*dri2_dpy->dri2->createNewDrawable) (dri2_dpy->dri_screen,
type == EGL_WINDOW_BIT ?
dri2_conf->dri_double_config :
dri2_conf->dri_single_config,
dri2_surf);
const __DRIconfig *config =
dri2_get_dri_config(dri2_conf, type, dri2_surf->base.GLColorspace);
dri2_surf->dri_drawable =
(*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config,
dri2_surf);
} else {
assert(dri2_dpy->swrast);
dri2_surf->dri_drawable =
@@ -259,10 +268,18 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
if (type != EGL_PBUFFER_BIT) {
cookie = xcb_get_geometry (dri2_dpy->conn, dri2_surf->drawable);
reply = xcb_get_geometry_reply (dri2_dpy->conn, cookie, &error);
if (reply == NULL || error != NULL) {
_eglError(EGL_BAD_ALLOC, "xcb_get_geometry");
free(error);
goto cleanup_dri_drawable;
if (error != NULL) {
if (error->error_code == BadAlloc)
_eglError(EGL_BAD_ALLOC, "xcb_get_geometry");
else if (type == EGL_WINDOW_BIT)
_eglError(EGL_BAD_NATIVE_WINDOW, "xcb_get_geometry");
else
_eglError(EGL_BAD_NATIVE_PIXMAP, "xcb_get_geometry");
free(error);
goto cleanup_dri_drawable;
} else if (reply == NULL) {
_eglError(EGL_BAD_ALLOC, "xcb_get_geometry");
goto cleanup_dri_drawable;
}
dri2_surf->base.Width = reply->width;
@@ -272,7 +289,25 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
}
if (dri2_dpy->dri2) {
xcb_dri2_create_drawable (dri2_dpy->conn, dri2_surf->drawable);
xcb_void_cookie_t cookie;
int conn_error;
cookie = xcb_dri2_create_drawable_checked(dri2_dpy->conn,
dri2_surf->drawable);
error = xcb_request_check(dri2_dpy->conn, cookie);
conn_error = xcb_connection_has_error(dri2_dpy->conn);
if (conn_error || error != NULL) {
if (type == EGL_PBUFFER_BIT || conn_error || error->error_code == BadAlloc)
_eglError(EGL_BAD_ALLOC, "xcb_dri2_create_drawable_checked");
else if (type == EGL_WINDOW_BIT)
_eglError(EGL_BAD_NATIVE_WINDOW,
"xcb_dri2_create_drawable_checked");
else
_eglError(EGL_BAD_NATIVE_PIXMAP,
"xcb_dri2_create_drawable_checked");
free(error);
goto cleanup_dri_drawable;
}
} else {
if (type == EGL_PBUFFER_BIT) {
dri2_surf->depth = _eglGetConfigKey(conf, EGL_BUFFER_SIZE);
@@ -513,7 +548,7 @@ dri2_x11_connect(struct dri2_egl_display *dri2_dpy)
xcb_generic_error_t *error;
xcb_screen_iterator_t s;
xcb_screen_t *screen;
char *driver_name, *device_name;
char *driver_name, *loader_driver_name, *device_name;
const xcb_query_extension_reply_t *extension;
xcb_prefetch_extension_data (dri2_dpy->conn, &xcb_xfixes_id);
@@ -538,7 +573,7 @@ dri2_x11_connect(struct dri2_egl_display *dri2_dpy)
s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn));
screen = get_xcb_screen(s, dri2_dpy->screen);
if (!screen) {
_eglError(EGL_BAD_NATIVE_WINDOW, "dri2_x11_connect");
_eglLog(_EGL_WARNING, "DRI2: failed to get xcb screen");
return EGL_FALSE;
}
connect_cookie = xcb_dri2_connect_unchecked(dri2_dpy->conn, screen->root,
@@ -573,18 +608,38 @@ dri2_x11_connect(struct dri2_egl_display *dri2_dpy)
return EGL_FALSE;
}
driver_name = xcb_dri2_connect_driver_name (connect);
dri2_dpy->driver_name =
strndup(driver_name,
xcb_dri2_connect_driver_name_length(connect));
device_name = xcb_dri2_connect_device_name (connect);
dri2_dpy->device_name =
strndup(device_name,
xcb_dri2_connect_device_name_length(connect));
dri2_dpy->fd = loader_open_device(dri2_dpy->device_name);
if (dri2_dpy->fd == -1) {
_eglLog(_EGL_WARNING,
"DRI2: could not open %s (%s)", dri2_dpy->device_name,
strerror(errno));
free(dri2_dpy->device_name);
free(connect);
return EGL_FALSE;
}
driver_name = xcb_dri2_connect_driver_name (connect);
/* If Mesa knows about the appropriate driver for this fd, then trust it.
* Otherwise, default to the server's value.
*/
loader_driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0);
if (loader_driver_name) {
dri2_dpy->driver_name = loader_driver_name;
} else {
dri2_dpy->driver_name =
strndup(driver_name,
xcb_dri2_connect_driver_name_length(connect));
}
if (dri2_dpy->device_name == NULL || dri2_dpy->driver_name == NULL) {
close(dri2_dpy->fd);
free(dri2_dpy->device_name);
free(dri2_dpy->driver_name);
free(connect);
@@ -609,7 +664,7 @@ dri2_x11_authenticate(_EGLDisplay *disp, uint32_t id)
screen = get_xcb_screen(s, dri2_dpy->screen);
if (!screen) {
_eglError(EGL_BAD_NATIVE_WINDOW, "dri2_x11_authenticate");
_eglLog(_EGL_WARNING, "DRI2: failed to get xcb screen");
return -1;
}
@@ -1016,15 +1071,6 @@ dri2_x11_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
}
}
static _EGLImage*
dri2_x11_swrast_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
_EGLContext *ctx, EGLenum target,
EGLClientBuffer buffer,
const EGLint *attr_list)
{
return NULL;
}
static EGLBoolean
dri2_x11_get_sync_values(_EGLDisplay *display, _EGLSurface *surface,
EGLuint64KHR *ust, EGLuint64KHR *msc,
@@ -1057,7 +1103,7 @@ static struct dri2_egl_display_vtbl dri2_x11_swrast_display_vtbl = {
.create_pixmap_surface = dri2_x11_create_pixmap_surface,
.create_pbuffer_surface = dri2_x11_create_pbuffer_surface,
.destroy_surface = dri2_x11_destroy_surface,
.create_image = dri2_x11_swrast_create_image_khr,
.create_image = dri2_fallback_create_image_khr,
.swap_interval = dri2_fallback_swap_interval,
.swap_buffers = dri2_x11_swap_buffers,
.swap_buffers_region = dri2_fallback_swap_buffers_region,
@@ -1106,7 +1152,7 @@ dri2_initialize_x11_swrast(_EGLDriver *drv, _EGLDisplay *disp)
dri2_dpy->screen = DefaultScreen(dpy);
}
if (xcb_connection_has_error(dri2_dpy->conn)) {
if (!dri2_dpy->conn || xcb_connection_has_error(dri2_dpy->conn)) {
_eglLog(_EGL_WARNING, "DRI2: xcb_connect failed");
goto cleanup_dpy;
}
@@ -1120,7 +1166,7 @@ dri2_initialize_x11_swrast(_EGLDriver *drv, _EGLDisplay *disp)
goto cleanup_conn;
dri2_dpy->swrast_loader_extension.base.name = __DRI_SWRAST_LOADER;
dri2_dpy->swrast_loader_extension.base.version = __DRI_SWRAST_LOADER_VERSION;
dri2_dpy->swrast_loader_extension.base.version = 2;
dri2_dpy->swrast_loader_extension.getDrawableInfo = swrastGetDrawableInfo;
dri2_dpy->swrast_loader_extension.putImage = swrastPutImage;
dri2_dpy->swrast_loader_extension.getImage = swrastGetImage;
@@ -1132,14 +1178,8 @@ dri2_initialize_x11_swrast(_EGLDriver *drv, _EGLDisplay *disp)
if (!dri2_create_screen(disp))
goto cleanup_driver;
if (dri2_dpy->conn) {
if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp))
goto cleanup_configs;
}
/* we're supporting EGL 1.4 */
disp->VersionMajor = 1;
disp->VersionMinor = 4;
if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp))
goto cleanup_configs;
/* Fill vtbl last to prevent accidentally calling virtual function during
* initialization.
@@ -1229,40 +1269,19 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp)
dri2_dpy->screen = DefaultScreen(dpy);
}
if (xcb_connection_has_error(dri2_dpy->conn)) {
if (!dri2_dpy->conn || xcb_connection_has_error(dri2_dpy->conn)) {
_eglLog(_EGL_WARNING, "DRI2: xcb_connect failed");
goto cleanup_dpy;
}
if (dri2_dpy->conn) {
if (!dri2_x11_connect(dri2_dpy))
goto cleanup_conn;
}
if (!dri2_load_driver(disp))
if (!dri2_x11_connect(dri2_dpy))
goto cleanup_conn;
#ifdef O_CLOEXEC
dri2_dpy->fd = open(dri2_dpy->device_name, O_RDWR | O_CLOEXEC);
if (dri2_dpy->fd == -1 && errno == EINVAL)
#endif
{
dri2_dpy->fd = open(dri2_dpy->device_name, O_RDWR);
if (dri2_dpy->fd != -1)
fcntl(dri2_dpy->fd, F_SETFD, fcntl(dri2_dpy->fd, F_GETFD) |
FD_CLOEXEC);
}
if (dri2_dpy->fd == -1) {
_eglLog(_EGL_WARNING,
"DRI2: could not open %s (%s)", dri2_dpy->device_name,
strerror(errno));
goto cleanup_driver;
}
if (!dri2_x11_local_authenticate(disp))
goto cleanup_fd;
if (dri2_dpy->conn) {
if (!dri2_x11_local_authenticate(disp))
goto cleanup_fd;
}
if (!dri2_load_driver(disp))
goto cleanup_fd;
if (dri2_dpy->dri2_minor >= 1) {
dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER;
@@ -1287,15 +1306,10 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp)
dri2_dpy->invalidate_available = (dri2_dpy->dri2_minor >= 3);
if (!dri2_create_screen(disp))
goto cleanup_fd;
goto cleanup_driver;
dri2_x11_setup_swap_interval(dri2_dpy);
if (dri2_dpy->conn) {
if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp))
goto cleanup_configs;
}
disp->Extensions.KHR_image_pixmap = EGL_TRUE;
disp->Extensions.NOK_swap_region = EGL_TRUE;
disp->Extensions.NOK_texture_from_pixmap = EGL_TRUE;
@@ -1306,14 +1320,8 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp)
disp->Extensions.WL_bind_wayland_display = EGL_TRUE;
#endif
if (dri2_dpy->conn) {
if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp))
goto cleanup_configs;
}
/* we're supporting EGL 1.4 */
disp->VersionMajor = 1;
disp->VersionMinor = 4;
if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp))
goto cleanup_configs;
/* Fill vtbl last to prevent accidentally calling virtual function during
* initialization.
@@ -1325,10 +1333,10 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp)
cleanup_configs:
_eglCleanupDisplay(disp);
dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen);
cleanup_fd:
close(dri2_dpy->fd);
cleanup_driver:
dlclose(dri2_dpy->driver);
cleanup_fd:
close(dri2_dpy->fd);
cleanup_conn:
if (disp->PlatformDisplay == NULL)
xcb_disconnect(dri2_dpy->conn);

View File

@@ -1,34 +0,0 @@
Import('*')
env = env.Clone()
env.Append(CPPDEFINES = [
'DEFAULT_DRIVER_DIR=\\"\\"',
])
env.Append(CPPPATH = [
'#/include',
'#/src/egl/main',
'#/src/loader',
])
sources = [
'egl_haiku.cpp'
]
if env['platform'] == 'haiku':
env.Append(CPPDEFINES = [
'HAVE_HAIKU_PLATFORM',
'_EGL_NATIVE_PLATFORM=haiku',
])
env.Prepend(LIBS = [
libloader,
])
egl_haiku = env.ConvenienceLibrary(
target = 'egl_haiku',
source = sources,
)
Export('egl_haiku')

View File

@@ -24,10 +24,9 @@
#include <errno.h>
#include <dlfcn.h>
#include <stdint.h>
#include <stdio.h>
extern "C" {
#include "loader.h"
#include "eglconfig.h"
#include "eglcontext.h"
#include "egldisplay.h"
@@ -37,13 +36,19 @@ extern "C" {
#include "eglsurface.h"
#include "eglimage.h"
#include "egltypedefs.h"
}
#include <InterfaceKit.h>
#include <OpenGLKit.h>
#define CALLOC_STRUCT(T) (struct T *) calloc(1, sizeof(struct T))
#ifdef DEBUG
# define TRACE(x...) printf("egl_haiku: " x)
# define CALLED() TRACE("CALLED: %s\n", __PRETTY_FUNCTION__)
#else
# define TRACE(x...)
# define CALLED()
#endif
#define ERROR(x...) printf("egl_haiku: " x)
_EGL_DRIVER_STANDARD_TYPECASTS(haiku_egl)
@@ -52,10 +57,6 @@ _EGL_DRIVER_STANDARD_TYPECASTS(haiku_egl)
struct haiku_egl_driver
{
_EGLDriver base;
void *handle;
_EGLProc (*get_proc_address)(const char *procname);
void (*glFlush)(void);
};
struct haiku_egl_config
@@ -75,81 +76,6 @@ struct haiku_egl_surface
};
/*
static void
swrastCreateDrawable(struct dri2_egl_display * dri2_dpy,
struct dri2_egl_surface * dri2_surf, int depth)
{
}
static void
swrastDestroyDrawable(struct dri2_egl_display * dri2_dpy,
struct dri2_egl_surface * dri2_surf)
{
}
static void
swrastGetDrawableInfo(__DRIdrawable * draw, int *x, int *y,
int *w, int *h, void *loaderPrivate)
{
}
static void
swrastPutImage(__DRIdrawable * draw, int op, int x, int y,
int w, int h, char *data, void *loaderPrivate)
{
}
static void
swrastGetImage(__DRIdrawable * read, int x, int y,
int w, int h, char *data, void *loaderPrivate)
{
}
*/
static void
haiku_log(EGLint level, const char *msg)
{
switch (level) {
case _EGL_DEBUG:
fprintf(stderr,"%s", msg);
break;
case _EGL_INFO:
fprintf(stderr,"%s", msg);
break;
case _EGL_WARNING:
fprintf(stderr,"%s", msg);
break;
case _EGL_FATAL:
fprintf(stderr,"%s", msg);
break;
default:
break;
}
}
/**
* Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface().
*/
static _EGLSurface *
haiku_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
_EGLConfig *conf, void *native_surface, const EGLint *attrib_list)
{
return NULL;
}
/**
* Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface().
*/
@@ -157,23 +83,34 @@ static _EGLSurface *
haiku_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
_EGLConfig *conf, void *native_window, const EGLint *attrib_list)
{
struct haiku_egl_surface* surface;
surface = (struct haiku_egl_surface*)calloc(1,sizeof (*surface));
CALLED();
struct haiku_egl_surface* surface;
surface = (struct haiku_egl_surface*) calloc(1, sizeof (*surface));
if (!surface) {
_eglError(EGL_BAD_ALLOC, "haiku_create_window_surface");
return NULL;
}
if (!_eglInitSurface(&surface->surf, disp, EGL_WINDOW_BIT,
conf, attrib_list)) {
free(surface);
return NULL;
}
_eglInitSurface(&surface->surf, disp, EGL_WINDOW_BIT, conf, attrib_list);
(&surface->surf)->SwapInterval = 1;
_eglLog(_EGL_DEBUG, "Creating window");
TRACE("Creating window\n");
BWindow* win = (BWindow*)native_window;
_eglLog(_EGL_DEBUG, "Creating GL view");
TRACE("Creating GL view\n");
surface->gl = new BGLView(win->Bounds(), "OpenGL", B_FOLLOW_ALL_SIDES, 0,
BGL_RGB | BGL_DOUBLE | BGL_ALPHA);
_eglLog(_EGL_DEBUG, "Adding GL");
TRACE("Adding GL\n");
win->AddChild(surface->gl);
_eglLog(_EGL_DEBUG, "Showing window");
TRACE("Showing window\n");
win->Show();
return &surface->surf;
}
@@ -198,6 +135,10 @@ haiku_create_pbuffer_surface(_EGLDriver *drv, _EGLDisplay *disp,
static EGLBoolean
haiku_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
{
if (_eglPutSurface(surf)) {
// XXX: detach haiku_egl_surface::gl from the native window and destroy it
free(surf);
}
return EGL_TRUE;
}
@@ -205,20 +146,25 @@ haiku_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf)
static EGLBoolean
haiku_add_configs_for_visuals(_EGLDisplay *dpy)
{
printf("Adding configs\n");
CALLED();
struct haiku_egl_config* conf;
conf = CALLOC_STRUCT(haiku_egl_config);
conf = (struct haiku_egl_config*) calloc(1, sizeof (*conf));
if (!conf) {
_eglError(EGL_BAD_ALLOC, "haiku_add_configs_for_visuals");
return EGL_FALSE;
}
_eglInitConfig(&conf->base, dpy, 1);
_eglLog(_EGL_DEBUG,"Config inited\n");
TRACE("Config inited\n");
_eglSetConfigKey(&conf->base, EGL_RED_SIZE, 8);
_eglSetConfigKey(&conf->base, EGL_BLUE_SIZE, 8);
_eglSetConfigKey(&conf->base, EGL_GREEN_SIZE, 8);
_eglSetConfigKey(&conf->base, EGL_LUMINANCE_SIZE, 0);
_eglSetConfigKey(&conf->base, EGL_ALPHA_SIZE, 8);
_eglSetConfigKey(&conf->base, EGL_COLOR_BUFFER_TYPE, EGL_RGB_BUFFER);
EGLint r = (_eglGetConfigKey(&conf->base, EGL_RED_SIZE)
EGLint r = (_eglGetConfigKey(&conf->base, EGL_RED_SIZE)
+ _eglGetConfigKey(&conf->base, EGL_GREEN_SIZE)
+ _eglGetConfigKey(&conf->base, EGL_BLUE_SIZE)
+ _eglGetConfigKey(&conf->base, EGL_ALPHA_SIZE));
@@ -242,76 +188,41 @@ haiku_add_configs_for_visuals(_EGLDisplay *dpy)
_eglSetConfigKey(&conf->base, EGL_MAX_PBUFFER_PIXELS, 0); // TODO: How to get the right value ?
_eglSetConfigKey(&conf->base, EGL_SURFACE_TYPE, EGL_WINDOW_BIT /*| EGL_PIXMAP_BIT | EGL_PBUFFER_BIT*/);
printf("Config configuated\n");
TRACE("Config configuated\n");
if (!_eglValidateConfig(&conf->base, EGL_FALSE)) {
_eglLog(_EGL_DEBUG, "Haiku failed to validate config");
return EGL_FALSE;
_eglLog(_EGL_DEBUG, "Haiku: failed to validate config");
goto cleanup;
}
printf("Validated config\n");
TRACE("Validated config\n");
_eglLinkConfig(&conf->base);
if (!_eglGetArraySize(dpy->Configs)) {
_eglLog(_EGL_WARNING, "Haiku: failed to create any config");
return EGL_FALSE;
goto cleanup;
}
printf("Config successful!\n");
TRACE("Config successfull\n");
return EGL_TRUE;
cleanup:
free(conf);
return EGL_FALSE;
}
extern "C"
EGLBoolean
init_haiku(_EGLDriver *drv, _EGLDisplay *dpy)
{
_eglLog(_EGL_DEBUG,"\nInitializing Haiku EGL\n");
//_EGLDisplay* egl_dpy;
CALLED();
printf("Initializing Haiku EGL\n");
_eglSetLogProc(haiku_log);
TRACE("Add configs\n");
if (!haiku_add_configs_for_visuals(dpy))
return EGL_FALSE;
loader_set_logger(_eglLog);
dpy->Version = 14;
/*egl_dpy = (_EGLDisplay*) calloc(1, sizeof(_EGLDisplay));
if (!egl_dpy)
return _eglError(EGL_BAD_ALLOC, "eglInitialize");
dpy->DriverData=(void*) egl_dpy;
if (!dpy->PlatformDisplay) {
// OPEN DEVICE
//dri2_dpy->bwindow = (void*)haiku_create_window();
//dri2_dpy->own_device = true;
} else {
//dri2_dpy->bwindow = (BWindow*)dpy->PlatformDisplay;
}*/
//dri2_dpy->driver_name = strdup("swrast");
//if (!dri2_load_driver_swrast(dpy))
// goto cleanup_conn;
/*dri2_dpy->swrast_loader_extension.base.name = __DRI_SWRAST_LOADER;
dri2_dpy->swrast_loader_extension.base.version = __DRI_SWRAST_LOADER_VERSION;
dri2_dpy->swrast_loader_extension.getDrawableInfo = swrastGetDrawableInfo;
dri2_dpy->swrast_loader_extension.putImage = swrastPutImage;
dri2_dpy->swrast_loader_extension.getImage = swrastGetImage;
dri2_dpy->extensions[0] = &dri2_dpy->swrast_loader_extension.base;
dri2_dpy->extensions[1] = NULL;
dri2_dpy->extensions[2] = NULL;*/
/*if (dri2_dpy->bwindow) {
if (!dri2_haiku_add_configs_for_visuals(dri2_dpy, dpy))
goto cleanup_configs;
}*/
_eglLog(_EGL_DEBUG,"Add configs");
haiku_add_configs_for_visuals(dpy);
dpy->VersionMajor=1;
dpy->VersionMinor=4;
//dpy->Extensions.KHR_create_context = true;
//dri2_dpy->vtbl = &dri2_haiku_display_vtbl;
_eglLog(_EGL_DEBUG, "Initialization finished");
TRACE("Initialization finished\n");
return EGL_TRUE;
}
@@ -330,13 +241,24 @@ _EGLContext*
haiku_create_context(_EGLDriver *drv, _EGLDisplay *disp, _EGLConfig *conf,
_EGLContext *share_list, const EGLint *attrib_list)
{
_eglLog(_EGL_DEBUG,"Creating context");
CALLED();
struct haiku_egl_context* context;
context=(struct haiku_egl_context*)calloc(1,sizeof (*context));
if(!_eglInitContext(&context->ctx, disp, conf, attrib_list))
printf("ERROR creating context");
_eglLog(_EGL_DEBUG, "Context created");
context = (struct haiku_egl_context*) calloc(1, sizeof (*context));
if (!context) {
_eglError(EGL_BAD_ALLOC, "haiku_create_context");
return NULL;
}
if (!_eglInitContext(&context->ctx, disp, conf, attrib_list))
goto cleanup;
TRACE("Context created\n");
return &context->ctx;
cleanup:
free(context);
return NULL;
}
@@ -344,7 +266,13 @@ extern "C"
EGLBoolean
haiku_destroy_context(_EGLDriver* drv, _EGLDisplay *disp, _EGLContext* ctx)
{
ctx=NULL;
struct haiku_egl_context* context = haiku_egl_context(ctx);
if (_eglPutContext(ctx)) {
// XXX: teardown the context ?
free(context);
ctx = NULL;
}
return EGL_TRUE;
}
@@ -352,13 +280,18 @@ haiku_destroy_context(_EGLDriver* drv, _EGLDisplay *disp, _EGLContext* ctx)
extern "C"
EGLBoolean
haiku_make_current(_EGLDriver* drv, _EGLDisplay* dpy, _EGLSurface *dsurf,
_EGLSurface *rsurf, _EGLContext *ctx)
_EGLSurface *rsurf, _EGLContext *ctx)
{
struct haiku_egl_context* cont=haiku_egl_context(ctx);
struct haiku_egl_surface* surf=haiku_egl_surface(dsurf);
CALLED();
struct haiku_egl_context* cont = haiku_egl_context(ctx);
struct haiku_egl_surface* surf = haiku_egl_surface(dsurf);
_EGLContext *old_ctx;
_EGLSurface *old_dsurf, *old_rsurf;
_eglBindContext(ctx, dsurf, rsurf, &old_ctx, &old_dsurf, &old_rsurf);
_EGLSurface *old_dsurf, *old_rsurf;
if (!_eglBindContext(ctx, dsurf, rsurf, &old_ctx, &old_dsurf, &old_rsurf))
return EGL_FALSE;
//cont->ctx.DrawSurface=&surf->surf;
surf->gl->LockGL();
return EGL_TRUE;
@@ -369,7 +302,8 @@ extern "C"
EGLBoolean
haiku_swap_buffers(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf)
{
struct haiku_egl_surface* surface=haiku_egl_surface(surf);
struct haiku_egl_surface* surface = haiku_egl_surface(surf);
surface->gl->SwapBuffers();
//gl->Render();
return EGL_TRUE;
@@ -380,7 +314,7 @@ extern "C"
void
haiku_unload(_EGLDriver* drv)
{
}
@@ -392,9 +326,15 @@ extern "C"
_EGLDriver*
_eglBuiltInDriverHaiku(const char *args)
{
_eglLog(_EGL_DEBUG,"Driver loaded");
CALLED();
struct haiku_egl_driver* driver;
driver=(struct haiku_egl_driver*)calloc(1,sizeof(*driver));
driver = (struct haiku_egl_driver*) calloc(1, sizeof(*driver));
if (!driver) {
_eglError(EGL_BAD_ALLOC, "_eglBuiltInDriverHaiku");
return NULL;
}
_eglInitDriverFallbacks(&driver->base);
driver->base.API.Initialize = init_haiku;
driver->base.API.Terminate = haiku_terminate;
@@ -405,32 +345,13 @@ _eglBuiltInDriverHaiku(const char *args)
driver->base.API.CreatePixmapSurface = haiku_create_pixmap_surface;
driver->base.API.CreatePbufferSurface = haiku_create_pbuffer_surface;
driver->base.API.DestroySurface = haiku_destroy_surface;
/*
driver->API.GetProcAddress = dri2_get_proc_address;
driver->API.WaitClient = dri2_wait_client;
driver->API.WaitNative = dri2_wait_native;
driver->API.BindTexImage = dri2_bind_tex_image;
driver->API.ReleaseTexImage = dri2_release_tex_image;
driver->API.SwapInterval = dri2_swap_interval;
*/
driver->base.API.SwapBuffers = haiku_swap_buffers;
/*
driver->API.SwapBuffersWithDamageEXT = dri2_swap_buffers_with_damage;
driver->API.SwapBuffersRegionNOK = dri2_swap_buffers_region;
driver->API.PostSubBufferNV = dri2_post_sub_buffer;
driver->API.CopyBuffers = dri2_copy_buffers,
driver->API.QueryBufferAge = dri2_query_buffer_age;
driver->API.CreateImageKHR = dri2_create_image;
driver->API.DestroyImageKHR = dri2_destroy_image_khr;
driver->API.CreateWaylandBufferFromImageWL = dri2_create_wayland_buffer_from_image;
driver->API.GetSyncValuesCHROMIUM = dri2_get_sync_values_chromium;
*/
driver->base.Name = "Haiku";
driver->base.Unload = haiku_unload;
_eglLog(_EGL_DEBUG, "API Calls defined");
TRACE("API Calls defined\n");
return &driver->base;
}

View File

@@ -1,162 +0,0 @@
# Mesa 3-D graphics library
#
# Copyright (C) 2010-2011 Chia-I Wu <olvaffe@gmail.com>
# Copyright (C) 2010-2011 LunarG Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
# Android.mk for libGLES_mesa
LOCAL_PATH := $(call my-dir)
include $(LOCAL_PATH)/Makefile.sources
SOURCES := \
${LIBEGL_C_FILES}
# ---------------------------------------
# Build libGLES_mesa
# ---------------------------------------
include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(SOURCES)
LOCAL_CFLAGS := \
-D_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_ANDROID \
-D_EGL_DRIVER_SEARCH_DIR=\"/system/lib/egl\" \
-D_EGL_OS_UNIX=1
LOCAL_STATIC_LIBRARIES :=
LOCAL_SHARED_LIBRARIES := \
libglapi \
libdl \
libhardware \
liblog \
libcutils \
libgralloc_drm \
ifeq ($(shell echo "$(MESA_ANDROID_VERSION) >= 4.2" | bc),1)
LOCAL_SHARED_LIBRARIES += libsync
endif
# add libdrm if there are hardware drivers
ifneq ($(MESA_GPU_DRIVERS),swrast)
LOCAL_SHARED_LIBRARIES += libdrm
endif
ifeq ($(strip $(MESA_BUILD_CLASSIC)),true)
LOCAL_CFLAGS += -D_EGL_BUILT_IN_DRIVER_DRI2
LOCAL_STATIC_LIBRARIES += libmesa_egl_dri2
# require i915_dri and/or i965_dri
LOCAL_REQUIRED_MODULES += \
$(addsuffix _dri, $(filter i915 i965, $(MESA_GPU_DRIVERS)))
endif # MESA_BUILD_CLASSIC
ifeq ($(strip $(MESA_BUILD_GALLIUM)),true)
LOCAL_CFLAGS += -D_EGL_BUILT_IN_DRIVER_GALLIUM
gallium_DRIVERS :=
# swrast
gallium_DRIVERS += libmesa_pipe_softpipe libmesa_winsys_sw_android
# freedreno
ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_freedreno libmesa_pipe_freedreno
LOCAL_SHARED_LIBRARIES += libdrm_freedreno
endif
# i915g
ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_i915 libmesa_pipe_i915
LOCAL_SHARED_LIBRARIES += libdrm_intel
endif
# ilo
ifneq ($(filter ilo, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_intel libmesa_pipe_ilo
LOCAL_SHARED_LIBRARIES += libdrm_intel
endif
# nouveau
ifneq ($(filter nouveau, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_nouveau libmesa_pipe_nouveau
LOCAL_SHARED_LIBRARIES += libdrm_nouveau
LOCAL_SHARED_LIBRARIES += libstlport
endif
# r300g/r600g/radeonsi
ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_radeon
LOCAL_SHARED_LIBRARIES += libdrm_radeon
ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_r300
endif # r300g
ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),)
ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_r600
LOCAL_SHARED_LIBRARIES += libstlport
endif # r600g
ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_radeonsi
endif # radeonsi
gallium_DRIVERS += libmesa_pipe_radeon
endif # r600g || radeonsi
endif # r300g || r600g || radeonsi
# vmwgfx
ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_svga libmesa_pipe_svga
endif
#
# Notes about the order here:
#
# * libmesa_st_egl depends on libmesa_winsys_sw_android in $(gallium_DRIVERS)
# * libmesa_pipe_r300 in $(gallium_DRIVERS) depends on libmesa_st_mesa and
# libmesa_glsl
# * libmesa_st_mesa depends on libmesa_glsl
# * libmesa_glsl depends on libmesa_glsl_utils
#
LOCAL_STATIC_LIBRARIES := \
libmesa_egl_gallium \
libmesa_st_egl \
$(gallium_DRIVERS) \
libmesa_st_mesa \
libmesa_util \
libmesa_glsl \
libmesa_glsl_utils \
libmesa_gallium \
$(LOCAL_STATIC_LIBRARIES)
endif # MESA_BUILD_GALLIUM
LOCAL_STATIC_LIBRARIES := \
$(LOCAL_STATIC_LIBRARIES) \
libmesa_loader
LOCAL_MODULE := libGLES_mesa
LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/egl
include $(MESA_COMMON_MK)
include $(BUILD_SHARED_LIBRARY)

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@@ -1,38 +0,0 @@
LIBEGL_C_FILES := \
eglapi.c \
eglapi.h \
eglarray.c \
eglarray.h \
eglcompiler.h \
eglconfig.c \
eglconfig.h \
eglcontext.c \
eglcontext.h \
eglcurrent.c \
eglcurrent.h \
egldefines.h \
egldisplay.c \
egldisplay.h \
egldriver.c \
egldriver.h \
eglfallbacks.c \
eglglobals.c \
eglglobals.h \
eglimage.c \
eglimage.h \
egllog.c \
egllog.h \
eglmisc.c \
eglmisc.h \
eglmode.c \
eglmode.h \
eglmutex.h \
eglscreen.c \
eglscreen.h \
eglstring.c \
eglstring.h \
eglsurface.c \
eglsurface.h \
eglsync.c \
eglsync.h \
egltypedefs.h

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