Compare commits

..

211 Commits

Author SHA1 Message Date
Emil Velikov
8fee1d348c docs: add release notes for 17.0.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-04 15:44:59 +00:00
Emil Velikov
e895bc6158 Update version to 17.0.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-04 15:32:34 +00:00
Daniel Stone
cc545ebeab egl/wayland: Don't use DRM format codes for SHM
The wl_drm interface (akin to X11's DRI2) uses the standard set of DRM
FourCC format codes. wl_shm copies this, except for ARGB8888/XRGB8888,
which use their own definitions.

Make sure we only use wl_shm format codes when we're working with
wl_shm. Otherwise, using swrast with 32bpp formats would fail with an
error.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Daniel Stone <daniels@collabora.com> (v1)
Fixes: cb5e799448 ("egl/wayland: unify dri2_wl_create_surface implementations")

v2: [Emil Velikov: move to dri2_wl_create_window_surface]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> (IRC)
(cherry picked from commit a1727aa75e)
2017-03-04 15:31:23 +00:00
Michel Dänzer
9ab1704f42 configure.ac: Drop LLVM compiler flags more radically
Drop all -m*, -W*, -O*, -g* and -f* flags, with the exception of
-fno-rtti, which must be used if it's part of the llvm-config --cxxflags
output. We don't want LLVM to dictate the flags we use, and it can even
cause build failures, e.g. if LLVM and Mesa are built with different
compilers.

While we're at it, eat any whitespace preceding dropped flags as well.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 0f53404565)
Nominated-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/100028
2017-03-04 15:30:35 +00:00
Grazvydas Ignotas
cfdda19397 gallium/u_queue: set num_threads correctly if not all threads start
If i-th thread could not be created it means we have i threads,
not i+1, because we start from 0.

Fixes: 404d0d5 "gallium/u_queue: add an option to have multiple worker threads"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 7f268cf12b)
2017-03-01 13:38:49 +00:00
Grazvydas Ignotas
6b8c9e115e gallium/u_queue: fix a crash with atexit handlers
Commit 4aea8fe ("gallium/u_queue: fix random crashes when the app calls
exit()") added a atexit handler which calls
util_queue_killall_and_wait() for each queue to stop the threads.
However the app is also free to use atexit handlers to clean up things,
leading to util_queue_destroy() call which will also call
util_queue_killall_and_wait() for the same queue again, causing threads
being joined twice, and that is undefined. This happens with libglut,
for example. A simple fix is to just set num_threads to 0 as there are
no more valid threads after util_queue_killall_and_wait() returns.

Fixes: 4aea8fe "gallium/u_queue: fix random crashes when the app calls exit()"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 9936121935)
2017-03-01 13:38:27 +00:00
Dave Airlie
21e3f2f24c radv: fix txs for sampler buffers
I messed this up when I wrote it, this fixes:
dEQP-VK.memory.pipeline_barrier.*uniform_texel_buffer.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit e66be3d3bb)
2017-03-01 13:37:30 +00:00
Marek Olšák
bc07622467 amd/common: fix ASICREV_IS_POLARIS11_M for Polaris12
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8c838730d0)
2017-03-01 13:37:27 +00:00
Brendan King
5aa38832f0 egl/dri3: implement query surface hook
This is a DRI3 version of a change made for DRI2
(4d6d4f939e, "egl/dri2: implement query surface hook"),
that fixed failures in dEQP-EGL.functional.resize.surface_size.grow
and dEQP-EGL.functional.resize.surface_size.shrink.

Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Cc: Chad Versace <chadversary@chromium.org>
Signed-off-by: Brendan King <Brendan.King@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 884f65e185)
2017-03-01 13:37:24 +00:00
Dave Airlie
2e46d4121e radv: fix depth format in blit2d.
For blitting we need to use the depth or stencil format, never
the combined.

This fixes:
dEQP-VK.texture.shadow.2d.nearest.less_or_equal_d32_sfloat_s8_uint
and a few others.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 800b82ea13)
2017-03-01 13:37:20 +00:00
Bas Nieuwenhuizen
d735682eb8 radv: Use correct size for availability flag.
Per spec, VK_QUERY_RESULT_64_BIT specifies the integer size and the
availability flag is an integer. We apparently handled this correctly
already for the copy to buffer case.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 43d833ae97)
2017-03-01 13:37:17 +00:00
Bas Nieuwenhuizen
95b09980e9 radv: Only use PKT3_OCCLUSION_QUERY when it doesn't hang.
PKT3_OCCLUSION_QUERY hangs when used in a nested IB. This only
calls it when in a primary command buffer and we change
GetQueryPoolResults to not need it. CmdCopyQueryPoolResults
still needs it so we break that behavior for secondary command buffers.
However, that would hang already and using an unitialized value is
better than a hang.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 8ea34a98c0)
2017-03-01 13:37:13 +00:00
Bas Nieuwenhuizen
3169c9818b radv: Reset emitted compute pipeline when calling secondary cmd buffer.
Otherwise if the new compute pipeline is the same as the last used
pipeline before the call, we don't emit it again.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit bb878db7eb)
2017-03-01 13:37:09 +00:00
Marek Olšák
03982603f0 radeonsi: fix broken tessellation on Carrizo and Stoney
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99850

Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 35915af6c9)
2017-03-01 13:36:57 +00:00
Leo Liu
0a8df0685e configure.ac: check require_basic_egl only if egl enabled
Otherwise the configuration fails when building independant libs
like vdpau, vaapi or omx

Fixes: 1ac40173c2 ("configure.ac: simplify EGL requirements for
drivers dependent on EGL")

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 5398d006de)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	configure.ac
2017-03-01 13:35:45 +00:00
Grazvydas Ignotas
b75c0bf73a r300g: only allow byteswapped formats on big endian
They cause regressions on little endian.

Fixes: 172bfdaa9e ("r300g: add support for PIPE_FORMAT_x8R8G8B8_*")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98869
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 66d1cb587a)
2017-03-01 13:34:42 +00:00
Mauro Rossi
eba32b351f android: glsl: build shader cache sources
Fixes the following building errors:

external/mesa/src/compiler/glsl/linker.cpp:4642: error: undefined reference
 to 'shader_cache_read_program_metadata(gl_context*, gl_shader_program*)'
external/mesa/src/mesa/program/ir_to_mesa.cpp:3135: error: undefined reference
 to 'shader_cache_write_program_metadata(gl_context*, gl_shader_program*)'
clang++: error: linker command failed with exit code 1
...
external/mesa/src/mesa/program/ir_to_mesa.cpp:3135: error: undefined reference
 to 'shader_cache_write_program_metadata(gl_context*, gl_shader_program*)'
external/mesa/src/compiler/glsl/linker.cpp:4642: error: undefined reference
 to 'shader_cache_read_program_metadata(gl_context*, gl_shader_program*)'
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
ninja: build stopped: subcommand failed.
build/core/ninja.mk:148: recipe for target 'ninja_wrapper' failed
make: *** [ninja_wrapper] Error 1

Fixes: 9f8dc3bf03 ("utils: build sha1/disk cache only with
Android/Autoconf")
Acked-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 9e3d66c1e5)
2017-03-01 13:34:42 +00:00
Mauro Rossi
2e6737fa88 android: radeonsi: fix sid_table.h generated header include path
generated-sources-dir-for macro replaces intermediates-dir-for
and LOCAL_MODULE_CLASS is defined as required by new macro,
in order to avoid the following building error:

external/mesa/src/gallium/drivers/radeonsi/si_debug.c:29:10: fatal error: 'sid_tables.h' file not found
         ^
1 error generated.

Fixes: 730574c58e ("android: ac/debug: move sid_tables.h generation and
IB decode to amd/common")
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 933988901a)
2017-03-01 13:34:42 +00:00
Tapani Pälli
ace01b0459 android: fix droid_create_image_from_prime_fd_yuv for YV12
Earlier changes introduced is_ycrcb flag which checks the component
order of u and v components. Condition for setting the flag was
incorrect, with ycrcb we are supposed to have cr before cb.

This patch (together with a fix in our gralloc) fixes corrupted
rendering from 'test-opengl-gl2_yuvtex' native test and corrupted
gallery thumbnail in application switcher on Android-IA.

Fixes: 51727b1cf5
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
(cherry picked from commit 0a2dcd3a8a)
2017-03-01 13:34:42 +00:00
Samuel Iglesias Gonsálvez
c20881661f glsl: fix heap-use-after-free in ast_declarator_list::hir()
The get_variable_being_redeclared() function can free 'var' because
a re-declaration of an unsized array variable can establish the size, so
we set the array type to the 'earlier' declaration and free 'var' as it is
not needed anymore.

However, the same 'var' is referenced later in ast_declarator_list::hir().

This patch fixes it by picking the ir_variable_mode from the proper
ir_variable.

This error was detected by Address Sanitizer.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99677
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a73a618933)
2017-03-01 13:34:42 +00:00
Marek Olšák
6d2c4e940e gallium/u_queue: fix random crashes when the app calls exit()
This fixes:
    vdpauinfo: ../lib/CodeGen/TargetPassConfig.cpp:579: virtual void
    llvm::TargetPassConfig::addMachinePasses(): Assertion `TPI && IPI &&
    "Pass ID not registered!"' failed.

v2: use list_head, switch the call order in destroy

Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 4aea8fe7e0)
2017-03-01 13:34:41 +00:00
Jason Ekstrand
e7a8f2e908 intel/blorp: Explicitly flush all allocated state
Found by inspection.  However, I expect it fixes real bugs when using
blorp from Vulkan on little-core platforms.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 075ed20614)
2017-03-01 13:34:41 +00:00
Jason Ekstrand
c23c6db9aa anv/query: Perform CmdResetQueryPool on the GPU
This fixes a some rendering corruption in The Talos Principle

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 40087bcb51)
2017-03-01 13:34:41 +00:00
Jason Ekstrand
bf8ef879c6 genxml: Make MI_STORE_DATA_IMM more consistent
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit dc9abd0e6b)
2017-03-01 13:34:41 +00:00
Jason Ekstrand
fafffc64a2 anv/query: clflush the bo map on non-LLC platforms
Found by inspection

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 3788cd3239)
2017-03-01 13:34:41 +00:00
Jason Ekstrand
0516a99923 anv: Add an invalidate_range helper
This is similar to clflush_range except that it puts the mfence on the
other side to ensure caches are flushed prior to reading.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 8582ab2d6e)
2017-03-01 13:34:41 +00:00
Christian Gmeiner
87fb61fad7 etnaviv: remove number of pixel pipes validation
This validation was added before the etnaviv drm driver landed in
the linux kernel. Due some pre-merge API changes we had to fix-up
this value but with a mainline kernel this is not a problem anymore.

Lets remove that validation which also gets rid of problem caught
by Coverity, reported to me by imirkin.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit e8d600710c)
2017-03-01 13:34:41 +00:00
Christian Gmeiner
6e3da9c81c etnaviv: move pctx initialisation to avoid a null dereference
In case ctx->stream == NULL the fail label gets executed where
pctx gets dereferenced - too bad pctx is NULL in that case.

Caught by Coverity, reported to me by imirkin.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit a0b16a0890)
2017-03-01 13:34:41 +00:00
Nicolai Hähnle
42b7395580 radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
The same PS epilog workaround as for 8-bit integer formats is required,
since the CB doesn't do clamping.

Fixes GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels*.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 066a117be7)
2017-03-01 13:34:41 +00:00
Nicolai Hähnle
7cb353520d radeonsi: handle MultiDrawIndirect in si_get_draw_start_count
Also handle the GL_ARB_indirect_parameters case where the count itself
is in a buffer.

Use transfers rather than mapping the buffers directly. This anticipates
the possibility that the buffers are sparse (once ARB_sparse_buffer is
implemented), in which case they cannot be mapped directly.

Fixes GL45-CTS.gtf43.GL3Tests.multi_draw_indirect.multi_draw_indirect_type
on <= CIK.

v2:
- unmap the indirect buffer correctly
- handle the corner case where we have indirect draws, but all of them
  have count 0.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
(cherry picked from commit 6a1d9684f4)
2017-03-01 13:34:41 +00:00
Ben Crocker
c47f1d6350 gallivm: Override getHostCPUName() "generic" w/ "pwr8" (v4)
If llvm::sys::getHostCPUName() returns "generic", override
it with "pwr8" (on PPC64LE).

This is a work-around for a bug in LLVM: a table entry for "POWER8NVL"
is missing, resulting in (big-endian) "generic" being returned on
little-endian Power8NVL systems.  The result is that code that
attempts to load the least significant 32 bits of a 64-bit quantity in
memory loads the wrong half.

This omission should be fixed in the next version of LLVM (4.0),
but this work-around should be left in place in case some
future version of POWER<n> also ends up unrepresented in LLVM's table.

This workaround fixes failures in the Piglit arb_gpu_shader_fp64 conversion
tests on POWER8NVL processors.

(V4: add similar comment in the code.)

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Cc: 12.0 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b934aae364)
2017-03-01 13:34:41 +00:00
Ben Crocker
c8e345aa9c gallivm: Improve debug output (V2)
Improve debug output from gallivm_compile_module and
lp_build_create_jit_compiler_for_module, printing the
-mcpu and -mattr options passed to LLC.

V2: enclose MAttrs debug_printf block and llc -mcpu debug_printf
in "if (gallivm_debug & <flags>)..."

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Cc: 12.0 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v2)
[Emil Velikov: rebase]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit a8e9c630f3)
2017-03-01 13:34:40 +00:00
Nicolai Hähnle
b8d23715f5 winsys/amdgpu: reduce max_alloc_size based on GTT limits
Allocating huge buffers in VRAM is not a problem, but when those buffers
start being migrated, the kernel runs into errors because it cannot split
those buffer up for moving through GTT.

This should fix intermittent failures of
GL45-CTS.texture_buffer.texture_buffer_max_size

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 550125e1e7)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
2017-03-01 13:34:40 +00:00
Marek Olšák
bc8d047068 gallium/u_index_modify: don't add PIPE_TRANSFER_UNSYNCHRONIZED unconditionally
It's OK for r300g (because r300g can't write to buffers via the GPU), but
not later hardware. This issue was spotted randomly.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit c8ef512398)
2017-03-01 13:34:40 +00:00
Marek Olšák
91b3b54286 gallium/util: remove unused u_index_modify helpers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 42297c862f)
[Emil Velikov: Nominate as a requirement for next commit]
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-01 13:34:40 +00:00
Marek Olšák
9c80a8133f radeonsi: fix UNSIGNED_BYTE index buffer fallback with non-zero start (v2)
start can only be non-zero with MultiDrawElements, which is unlikely
to occur with UNSIGNED_BYTE indices.

v2: Also fix the util_shorten_ubyte_elts_to_userptr call.
    Tested with the new piglit.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit a264fee624)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/drivers/radeonsi/si_state_draw.c
2017-03-01 13:34:40 +00:00
Lionel Landwerlin
e1ba82d559 i965/fs: fix uninitialized memory access
Found while running shader-db under valgrind.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a0ac118398)
2017-03-01 13:34:40 +00:00
Bas Nieuwenhuizen
b4880ea2eb radv: Never try to create more than max_sets descriptor sets.
We only use the freed ones after all free space has been used. If
the app only allocates small descriptor sets, we might go over
max_sets before the memory is full.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
CC: <mesa-stable@lists.freedesktop.org>
Fixes: f4e499ec79
(cherry picked from commit f448701622)
2017-03-01 13:34:40 +00:00
Jason Ekstrand
a594bd19dc i965/fs: Fix the inline nir_op_pack_double optimization
We can only do the optimization if the source *is* SSA.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a4393bd97f)

Squashed with commit:

i965/fs: Remove the inline pack_double_2x32 optimization

It's broken in a number of ways.  In particular, a bunch of the
conditions are backwards so it doesn't actually detect what it's
supposed to detect.  Since it's been broken, it hasn't actually been
helping anything so just deleting it isn't a regression.

This (and removing another optimization) were done on master in commit
b073811617.

Cc: "Kenneth Grunke" <kenneth@whitecape.org>
Cc: "Mark Janes" <mark.a.janes@intel.com>

[Emil Velikov: patch is a backport of the below "cherry pick"]
Fixes: a4393bd97f ("i965/fs: Fix the inline nir_op_pack_double optimization")

(cherry picked from commit b073811617)
2017-03-01 13:34:17 +00:00
Emil Velikov
63ef132059 bin/get-fixes-pick-list.sh: add new script
The script parses the "Fixes" tags and nominates respective commit if
applicable.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 389478c4e9)
2017-02-23 19:34:59 +00:00
Emil Velikov
13f1fb0d8c bin/get-pick-list.sh: remove ancient way of nominating patches
The old way of nominating patches [NOTE: .*[Cc]andidate] was
deprecated and has been unused for approx. 3 years.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit f1b0b75099)
2017-02-23 19:34:59 +00:00
Emil Velikov
61d9475a0c bin/get-pick-list.sh: limit `git grep ...' only as needed
Analogous to previous commit.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit d6b1d11d4f)
2017-02-23 19:34:59 +00:00
Emil Velikov
a5f3255d67 bin/get-typod-pick-list.sh: limit `git grep ...' to only as needed
The currently used range HEAD..origin/master is far too broad. It looks
for nominations within the already_landed list (branchpoint..HEAD).

Similarly we look for already_landed whiting the [possible] nominations
Rand branchpoint..origin/master.

Improve things by limiting the look ups to the branch point.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit d292f12d94)
2017-02-23 19:34:59 +00:00
Emil Velikov
227db8dd03 bin/get-extra-pick-list: rework to use already_picked list
Currently we loop (git log --grep) to check if the fix has landed. We
can simplify and make things faster by storing the already_picked list
and grep ping through it.

Slim down the message while we're here.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 71e00d62ed)
2017-02-23 19:34:59 +00:00
Emil Velikov
a57d1af090 bin/get-extra-pick-list: use git merge-base to get the branchpoint
Since mesa development history is linear and the only diversion is at
the branchpoint. Thus we can drop the ad-hoc parsing and use git
merge-base to retrieve it.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit cb1947eac7)
2017-02-23 19:34:59 +00:00
Lionel Landwerlin
173a2ab5c7 anv: wsi: report presentation error per image request
vkQueuePresentKHR() takes VkPresentInfoKHR pointer and includes a
pResults fields which must holds the results of all the images
requested to be presented. Currently we're not filling this field.

Also as a side effect we probably want to go through all the images
rather than stopping on the first error.

This commit also makes the QueuePresentKHR() implementation return the
first error encountered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0fcb92c17d)
2017-02-23 19:34:59 +00:00
Hans de Goede
3c93076e8c glx/glvnd: Fix GLXdispatchIndex sorting
Commit 8bca8d89ef ("glx/glvnd: Fix dispatch function names and indices")
fixed the sorting of the array initializers in g_glxglvnddispatchfuncs.c
because FindGLXFunction's binary search needs these to be sorted
alphabetically.

That commit also mostly fixed the sorting of the DI_foo defines in
g_glxglvnddispatchindices.h, which is what actually matters as the
arrays are initialized using "[DI_foo] = glXfoo," but a small error
crept in which at least causes glXGetVisualFromFBConfigSGIX to not
resolve, breaking games such as "The Binding of Isaac: Rebirth" and
"Crypt of the NecroDancer" from Steam not working and possible causes
other problems too.

This commit fixes the last of the sorting errors, fixing these mentioned
games not working.

Fixes: 8bca8d89ef ("glx/glvnd: Fix dispatch function names and indices")
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 4c66f529a8)
2017-02-23 19:34:59 +00:00
Connor Abbott
3b524138e6 anv: fix Get*MemoryRequirements for !LLC
Even though we supported both coherent and non-coherent memory types, we
effectively forced apps to use the coherent types by accident. Found by
inspection, only compile tested.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6319bfc2a6)
2017-02-23 19:34:59 +00:00
Dave Airlie
e179a60c77 radv: adopt some init config workarounds from radeonsi.
Just one bonaire fix.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 09bf5491c4)
2017-02-23 19:34:58 +00:00
Dave Airlie
3b972998bc radv: fix cik macroModeIndex.
This just a CIK fix ported from radeonsi.

Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0f1a4220a6)
2017-02-23 19:34:58 +00:00
Dave Airlie
e42f43b62b radv: change base aligmment for allocated memory.
On some CIK (Hawaii) this needs to be at least 64k, I'm not 100% sure
it doesn't need to be 128k.

This was causing fast clear eliminate to overwrite the previous buffer,
which since my gfx init code, was the indirect buffer.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99692
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 06ffd29925)
2017-02-23 19:34:58 +00:00
Ilia Mirkin
2416481a01 nvc0: disable linked tsc mode in compute launch descriptor
Empirically, this makes things work. Presumably this was originally
copied from the blob, which does make use of linked tsc mode.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99532
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 956556b3c3)
2017-02-23 19:34:58 +00:00
Dave Airlie
bd25bc66bd tgsi: fix memory leak in tgsi sanity check
This just fixes this without repeating the code.

Reported-by: Li Qiang
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 69fc7a2c82)
2017-02-23 19:34:58 +00:00
Jason Ekstrand
4d40f721d1 intel/blorp: Swizzle clear colors on the CPU
It's trivial to swizzle clear colors on the CPU, easily deals with the
hardware restrictions for render target swizzles, and makes swizzled
clears work on all hardware as opposed to just HSW+.

Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e233db6e93)
2017-02-23 19:34:58 +00:00
Kenneth Graunke
84a2f46cac mesa: Do (TCS && !TES) draw time validation in ES as well.
Now that we have OES_tessellation_shader, the same situation can occur
in ES too, not just GL core profile.

Having a TCS but no TES may confuse drivers - i965 crashes, for example.

This prevents regressions in
ES31-CTS.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
with some SSO pipeline validation changes I'm making.

v2: Add an ES spec citation (suggested by Alejandro)

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
(cherry picked from commit 05a56893aa)
2017-02-23 19:34:58 +00:00
Jason Ekstrand
1db3cebcbd i965/sampler_state: Set the "Base Mip Level" field on Sandy Bridge
Fixes two GL ES 3.0 CTS tests on Sandy Bridge:

ES3-CTS.functional.texture.mipmap.cube.base_level.linear_linear
ES3-CTS.functional.texture.mipmap.cube.base_level.linear_nearest

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c59d1ea51b)
2017-02-23 19:34:58 +00:00
Jason Ekstrand
bcd58a918b i965/sampler_state: Pass texObj into update_sampler_state
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c4f8f395b2)
2017-02-23 19:34:58 +00:00
Jason Ekstrand
d5859cbcc0 i965/sampler_state: Clamp min/max LOD to 14 on gen7+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 9df3778016)
2017-02-23 19:34:58 +00:00
Ilia Mirkin
eb5a044ce7 st/mesa: don't pass compare mode for stencil-sampled textures
Fixes dEQP-GLES31.functional.stencil_texturing.misc.compare_mode_effect

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 3970257cef)
2017-02-23 19:34:58 +00:00
Ilia Mirkin
8d7110e552 nvc0: set the render condition in the compute object
Fixes GL45-CTS.compute_shader.conditional-dispatching

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 48f04862c1)
2017-02-23 19:34:58 +00:00
Ilia Mirkin
138be7ed9f gm107/ir: fix address offset bitfield for ATOMS
Fixes GL45-CTS.compute_shader.atomic-case1 on Maxwell

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 7e75f0913a)
2017-02-23 19:34:57 +00:00
Jose Maria Casanova Crespo
1f76523596 glsl: non-last member unsized array on SSBO must fail compilation on GLSL ES 3.1
From GLSL ES 3.10 spec, section 4.1.9 "Arrays":

"If an array is declared as the last member of a shader storage block
 and the size is not specified at compile-time, it is sized at run-time.
 In all other cases, arrays are sized only at compile-time."

In desktop GLSL it is allowed to have unsized-arrays that are
not last, as long as we can determine that they are implicitly
sized, which is detected at link-time.

With this patch Mesa reports a compilation error as glslang does with
the following shader:

buffer SSBO { vec4 data[]; vec4 moreData;};
void main (void)
{
}

Fixes:
dEQP-GLES31.functional.debug.negative_coverage.log.shader.compile_compute_shader
dEQP-GLES31.functional.debug.negative_coverage.callbacks.shader.compile_compute_shader
dEQP-GLES31.functional.debug.negative_coverage.get_error.shader.compile_compute_shader

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 5bc222ebaf)
2017-02-23 19:34:57 +00:00
Eric Anholt
ce0eebc935 vc4: Avoid emitting small immediates for UBO indirect load address guards.
The kernel will reject our shader if we emit one here, and having 4, 8, or
12 as the top end of our UBO clamp rare is enough that it's not worth
making the kernel let us.

Fixes piglit fs-const-array-of-struct and
fs-const-array-of-struct-of-array since recent GLSL linking changes made
us get this as an indirect load of a uniform, instead of a tempoary.

Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b230939303)
2017-02-23 19:34:57 +00:00
Ben Crocker
548fe31742 gallivm: Reenable PPC VSX (v3)
Reenable the PPC64LE Vector-Scalar Extension for LLVM versions >= 3.8.1,
now that LLVM bug 26775 and its corollary, 25503, are fixed.

Amendment: remove extraneous spaces in macro def & invocations.

We would prefer a runtime check, e.g. via an LLVMQueryString
(analogous to glGetString, eglQueryString) or LLVMGetVersion API,
but no such API exists at this time.

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
[Emil Velikov: remove LLVM_VERSION macro]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 3f1b6ef2aa)
2017-02-23 19:34:57 +00:00
Emil Velikov
80b41d9899 docs: add sha256 checksums for 17.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-13 12:02:19 +00:00
Emil Velikov
683462e680 docs: Update 17.0.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-13 11:53:28 +00:00
Emil Velikov
8088ffa12a Update version to 17.0.0(final)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-13 11:46:24 +00:00
Timothy Arceri
2692663599 util/disk_cache: use stat() to check if entry is a directory
d_type is not supported on all systems.

Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97967
(cherry picked from commit d7b3707c61)

Squashed with commit:

util/disk_cache: correctly use stat(3)

I forgot to error check stat() and also I wasn't using the subdir in
is_two_character_sub_directory().

Fixes: d7b3707c61 "util/disk_cache: use stat() to check if entry is a directory"
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 0cbde643eb)
2017-02-13 10:20:41 +00:00
Emil Velikov
e81e284611 configure.ac: correctly manage llvm auto-detection
Earlier refactoring commits changed from one, dare I say it, broken
behaviour to another. Namely:

Before, as you explicitly --enable-gallium-llvm your selection was
ignored when llvm-config was not present/detected.
Today, the "auto" heuristics enables gallium llvm regardless if you have
llvm/llvm-config available or not.

Rework the auto-detection to attribute for llvm's presence.

v2: Set enable_gallium_llvm=no when LLVM is not found.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
Reported-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d4840c0c26)
2017-02-10 13:58:02 +00:00
Emil Velikov
edecfda23f configure.ac: disable enable_gallium_llvm in the !x86 case
Already implicitly handled throughout, but keep it clear and disable
gallium-llvm. This change should be a no-op.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit ce65cc1f1f)
2017-02-10 13:57:55 +00:00
Emil Velikov
d0c7c6a8cc configure.ac: set LLVM_{C, CXX, LD}FLAGS only as needed
Earlier refactoring commits started setting the above regardless if LLVM
is used or not. Move them to the respective section to restore the
original functionality.

Since we require the preprocessor flags (includes in particular) for the
header version parsing keep those as-is. They are not used outside of
configure.ac thus should not cause any side-effects.

As-is adding the C/CXXFLAGS can lead to build issues on when
cross-compiling.

Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit 4d8bb9cf8c)

Conflicts:
	configure.ac
2017-02-10 13:55:59 +00:00
Tobias Droste
619b102ecb configure.ac: Only define HAVE_LLVM if LLVM is used
Make sure that HAVE_LLVM compiler define is only set if LLVM is
actually used.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99010
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tobias Droste <tdroste@gmx.de>
v2 [Emil] fold within the existing conditional
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit 143c566a81)
2017-02-10 13:55:12 +00:00
Tobias Droste
b90405d565 configure.ac: Rework MESA_LLVM and LLVM detection
Set FOUND_LLVM only when LLVM is present (checking for exact version/etc
is deferred) and use enable-gallium-llvm to indicate the global LLVM
status.

Renaming the latter is not appropriate for stable patches, so we'll
address it with a later commit.

Loosely based on work by Tobias.

v2: Check FOUND_LLVM if enable_gallium_llvm is set.

Cc: Dave Airlie <airlied@redhat.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit 04377cbdcf)
2017-02-10 13:55:10 +00:00
Emil Velikov
d6e8489069 configure.ac: move enable-gallium-llvm dependency with-gallium-drivers
... to where it's applicable.

Since we effectively made --enable-gallium-llvm mean --enable-llvm with
earlier commits, we need to move the requirement to guard the compnents
added for the LLVM draw.

Otherwise we'll error (as below) when building RADV w/o gallium drivers.

configure: error: --enable-gallium-llvm is required when building radv

v2: Don't remove but move the dependency (Tobias).

Cc: Dave Airlie <airlied@redhat.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit 5869a7db75)
2017-02-10 13:55:07 +00:00
Emil Velikov
fbc28af6e5 configure.ac: Mandate --enable-gallium-llvm when checking LLVM version
With this change we effectively require --enable-gallium-llvm when
building RADV. This should be perfectly safe since the gallium radeonsi
driver already explicitly requires it.

The "gallium" part in --enable-gallium-llvm is about to be removed soon
(not in stable), but until then make sure that things can build.

To reflect the requirement (as opposed to check previously) we rename
llvm_check_version_for to llvm_require_version

Cc: Dave Airlie <airlied@redhat.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit a66ffcd736)
2017-02-10 13:55:05 +00:00
Emil Velikov
8ae5b0b567 configure.ac: Rename the gallium_require_llvm helper
Drop the gallium prefix since we're about it use it throughout the
configure.

Note we do want to check for enable_gallium_llvm check since (as
explicitly requested) the toggle should mean --enable-llvm. Latter of
which to be resolved with later patches.

Cc: Dave Airlie <airlied@redhat.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit 514a494415)
2017-02-10 13:55:03 +00:00
Tobias Droste
7265963007 configure.ac: Don't check LLVM version in require_llvm
This is actually not needed because the version is checked later.

Around line 2380
if test "x$enable_gallium_llvm" == "xyes"; then
    llvm_check_version_for $LLVM_REQUIRED_GALLIUM "gallium"
    llvm_add_default_components "gallium"
fi

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Cc: Tobias Droste <tdroste@gmx.de>
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (v1)
v2: [Emil Velikov: rebase/respin series order]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit f64d4d82bd)
2017-02-10 13:55:00 +00:00
Emil Velikov
ba43238abf configure.ac: move AC_ARG_ENABLE([gallium-llvm] hunk further up
With next commits we'll require --enable-gallium-llvm (en route to a
greater good later on) for RADV. The latter is required to ensure that
as otherwise we'll fail to build.

Cc: Dave Airlie <airlied@redhat.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tobias Droste <tdroste@gmx.de>
(cherry picked from commit 38abcdba8a)
2017-02-10 13:54:57 +00:00
Nanley Chery
7e6b4a2dd7 anv/blorp: Disable resolves for transparent black clears
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 84dbf68378)
2017-02-10 12:37:49 +00:00
Marek Olšák
72156aa100 gallium/radeon: fix performance of buffer readbacks
We want cached GTT for all non-persistent read mappings.
Set level = 0 on purpose.

Use dma_copy, because resource_copy_region causes a failure in the PBO
read of piglit/getteximage-luminance.

If Rocket League used the READ flag, it should get cached GTT.

v2: mask out UNSYNCHRONIZED

Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit d86099df0a)
2017-02-10 11:14:25 +00:00
Marc-André Lureau
32d0dc50a0 tgsi-dump: dump label if instruction has one
The instruction has an associated label when Instruction.Label == 1,
as can be seen in ureg_emit_label() or tgsi_build_full_instruction().

This fixes dump generating extra :0 labels on conditionals, and virgl
parsing more than the expected tokens and eventually reaching "Illegal
command buffer" (when parsing more than a safety margin of 10 we
currently have).

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit dc2d9b8da1)
2017-02-10 11:14:23 +00:00
Ilia Mirkin
8ca2e38abb nvc0/ir: fix ubo max clamp, reset file index
We just increased the max UBO, so we should also increase the clamp that
we do for robustness. Similarly, as we're including the fileIndex in the
new indirect value, we should reset fileIndex to 0 so that it is not
added in a second time.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c95f821cb4)
2017-02-10 11:14:20 +00:00
Ilia Mirkin
40281fcaf9 nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ compute
Kepler and up unfortunately only support up to 8 constbufs. We work
around this by loading from constbufs as if they were storage buffers.
However we were not consistently applying limits to loads from these
buffers. Make sure to do the same thing we do for storage buffers.

Fixes GL45-CTS.robust_buffer_access_behavior.uniform_buffer

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 1acdd62847)
2017-02-10 11:14:17 +00:00
Ilia Mirkin
73b1570dc1 nvc0: increase number of ubo binding points
Apparently GL 4.5 requires 14 of these (there's a "*" in the spec, but
it's unclear what it refers to). We need to expose an extra binding
point for the "program parameters", which means this must be 15. Remove
the last vestige of the "use c14 for immediates" idea.

Fixes GL45-CTS.shading_language_420pack.binding_uniform_block_array

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 59ca352fc5)
2017-02-10 11:14:14 +00:00
Marc Di Luzio
06128bdc21 glsl: correct compute shader checks for memoryBarrier functions
As per the spec -
"The functions memoryBarrierShared() and groupMemoryBarrier() are
available only in compute shaders; the other functions are available
in all shader types."

Conform to this by adding another delegate to check for compute
shader support instead of only whether the current stage is compute

This allows some fragment shaders in Dirt Rally to compile

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 21efe2528c)
2017-02-10 11:13:48 +00:00
Kenneth Graunke
05abd64cae Revert "i965: Disable guardband clipping in the smaller-than-viewport case."
This reverts commit 0bac2551e4.

Now that we position the guardband correctly (applying translations
in addition to scaling) and made it as large (or larger) than the
render target, this shouldn't be necessary.

Now we leave guardband clipping enabled 100% of the time, like the
Windows driver does.

Fixes GL45-CTS.gtf21.GL2FixedTests.clip.clip.  It tries to draw a
16384x64 rectangle, and it appears that some kind of numerical
imprecisions in the clipper result in some edge pixels going missing.
The Windows driver passes this test because of guardband clipping.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit ce8a63de6d)
2017-02-10 11:13:48 +00:00
Kenneth Graunke
09468226b4 i965: Always scissor on Gen6-7.5 instead of disabling guardband.
Previously we disabled the guardband when the viewport was smaller than
the framebuffer on Gen6-7.5, to prevent portions of primitives from
being draw outside of the viewport.  On Gen8+, we relied on the viewport
extents test to effectively scissor this away for us.

We can simply always enable scissoring instead.  We already include the
viewport in the scissor rectangle, so this will effectively do the
viewport extents test for us.  (The only difference is that the scissor
rectangle doesn't support sub-pixel values.  I think that's okay.)

Given that the viewport extents test is essentially a second scissor,
and is enabled for basically all 3D drawing on Gen8+, it stands to
reason that scissoring is cheap.  Enabling the guardband reduces the
cost of clipping, which is expensive.

The Windows driver appears to never disable guardband clipping, and
appears to use scissoring in this case.  I don't know if they leave
it on universally though.

This fixes misrendering in Blender, where the "floor plane" grid lines
started rendering at wrong angles after I disabled XY clipping of line
primitives.  Enabling the guardband seems to solve the issue.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99339
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit ece0e535a4)
2017-02-10 11:08:42 +00:00
Jason Ekstrand
d44a881ba6 i965: Use a better guardband calculation.
(Patch co-authored by Jason and Ken.)

We scaled the guardband based on the viewport size, but failed to
take into account the translation portion of the viewport transform.

This meant the guardband was always centered around the origin.
We want it to be centered around the screen-space drawing area,
which is the intersection of the viewport and the render target.

At best, getting this wrong would reduce the guardband's effectiveness
in some cases.  At worst, it might break things - objects outside of the
guardband are trivially rejected, so getting the guardband in the wrong
place and leaving guardband clipping enabled could cause problems.

v2: drop clamping of positive maximums.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit f3c068c5c8)
2017-02-10 11:06:59 +00:00
Kenneth Graunke
726c32790e i965: Combine the Gen6 SF and Clip viewport atoms.
The next patch will make the guardband calculation dependent on the
transformation matrix.  Instead of computing it in both atoms, just
combine them into a single atom.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 89ad7f1be6)
2017-02-10 11:06:59 +00:00
Dave Airlie
dc398d94f0 radv: pass FMASK alignment to application
As was done for dcc and cmask.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 90ac2285f0)
2017-02-10 11:06:59 +00:00
Bas Nieuwenhuizen
d424194455 radv: Pass DCC alignment to application.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
(cherry picked from commit 47ca0f537d)
2017-02-10 11:06:59 +00:00
Bas Nieuwenhuizen
27b6f7413c radv: Pass CMASK alignment to application.
CMASK alignment can be greater than image data alignment, so pass
it to the app so that it knows what alignment to backing memory
should have.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit eb01b20cc4)
2017-02-10 11:06:59 +00:00
Dave Airlie
1e868de450 radv/ac: avoid the fmask path when doing txs.
This fixes the vulkan samples deferredmultisampling test.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a864ef7f48)
2017-02-10 11:06:59 +00:00
Bruce Cherniak
be48168be9 swr: [rasterizer core] Remove dead code Clipper::ClipScalar()
Clipper::ClipScalar() is dead code and should be removed.  It is causing
an error with gcc-7 because it references a now defunct member.

v2: includes bugzilla reference, same code change

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99633
CC: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
(cherry picked from commit bf29495dcd)
2017-02-10 11:06:59 +00:00
Nicolai Hähnle
cdc5bb81ff dri/common: clear the loaderPrivate pointer in driDestroyDrawable
The GLX specification says about glXDestroyPixmap:

    "The storage for the GLX pixmap will be freed when it is not current
     to any client."

We're not really following this language to the letter: some of the storage
is freed immediately (in particular, the dri3_drawable, which contains both
GLXDRIdrawable and loader_dri3_drawable). So we NULL out the pointers to
that freed storage; the previous patches added the corresponding NULL-pointer
checks.

This fixes memory corruption in piglit
./bin/glx-visuals-depth/stencil -pixmap -auto

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7be0e602ed)
2017-02-10 11:06:59 +00:00
Nicolai Hähnle
e4bb5be7b2 glx: guard swap-interval functions against destroyed drawables
The GLX specification says about glXDestroyPixmap:

    "The storage for the GLX pixmap will be freed when it is not current
     to any client."

So arguably, functions like glXSwapIntervalMESA can be called after
glXDestroyPixmap has been called for the currently bound GLXPixmap.
In that case, the GLXDRIDrawable no longer exists, and so we just skip
those calls.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit f446f3fb33)
2017-02-10 11:06:58 +00:00
Nicolai Hähnle
48d5cf36a1 glx/dri3: guard in_current_context against a disappeared drawable
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 21ec35566b)
2017-02-10 11:06:58 +00:00
Nicolai Hähnle
b3bc9b4b52 glx/dri3: handle NULL pointers in loader-to-DRI3 drawable conversion
With a subsequent patch, we might see NULL loaderPrivates, e.g. when
a DRIdrawable is flushed whose corresponding GLXDRIdrawable was destroyed.
This resulted in a crash, since the loader vs. DRI3 drawable structures
have a non-zero offset.

Fixes glx-visuals-{depth,stencil} -pixmap

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 40c304fc06)
2017-02-10 11:06:58 +00:00
Dave Airlie
241e0b7068 radv: fix shared memory load/stores.
If we have an indirect index here we need to scale it by attribute slots
e.g. is this is vec2[256] then we get an indir_index in the 0.255 range
but the vec2 are aligned inside vec4 slots. So scale the indir index,
then extract the channels.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 106a51440d)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
2017-02-10 11:05:58 +00:00
Dave Airlie
e789af4a9f radv/ac: correctly size shared memory usage.
We count the number of slots used, but slots are vec4 sized,
so we have to scale by 16 not 4.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a1a8aef4c9)
2017-02-08 14:32:41 +00:00
Samuel Pitoiset
f02f17f133 winsys/amdgpu: avoid potential segfault in amdgpu_bo_map()
cs can be NULL when it comes from r600_buffer_map_sync_with_rings()
to avoid doing the same checks. It was checked for write mappings
but not for read mappings.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit af303abcdb)
2017-02-08 14:30:50 +00:00
Ilia Mirkin
d4f1ed6215 st/mesa: MAX_VARYING is the max supported number of patch varyings, not min
This fixes
GL45-CTS.tessellation_shader.tessellation_shader_tessellation.max_in_out_attributes
on nouveau. We only support 30 patch varyings (as 2 vec4 slots end up
being used for tess level settings), but were getting 32 exposed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 7d3f9ed71c)
2017-02-08 14:29:09 +00:00
Ilia Mirkin
d936b576d6 vbo: process buffer binding state changes on draw when recording
The VBO module keeps track of any vbo buffers. It updates this list when
receiving an InvalidateState call, however this never happens when
recording draws right now. Make sure that we do all the usual state
updates when recording draws so that the VBO list may be kept up to
date.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99631
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e73f87fcbd)
2017-02-08 14:27:26 +00:00
Marek Olšák
539afe4e33 Revert "radeonsi: decrease the number of texture slots to 24"
This reverts commit bdd860e307.

Requested by a game developer.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit dfe111368d)
2017-02-08 14:25:21 +00:00
Nanley Chery
19f029ce63 anv/pass: Store the depth-stencil attachment's last subpass index
Commit 968ffd6c86 stored the last subpass
index of all the attachments but that of the depth-stencil attachment.
This could cause depth buffers used in multiple subpasses not to be in
the requested final layout. Fix this error.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 043d92fef9)
2017-02-08 14:03:28 +00:00
Matt Turner
ebbca2f7bb vulkan: Don't install vk_platform.h or vulkan.h.
These files belong to the vulkan loader.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 045f38a507)
2017-02-07 23:56:32 +00:00
Tapani Pälli
40fc6e7c2d android: correct typo in build
Fixes: 63c58dfc65
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 4148881513)
2017-02-07 23:55:55 +00:00
Emil Velikov
07571cd8cc Update version to 17.0.0-rc3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-06 13:18:13 +00:00
Lucas Stach
2fc362f147 etnaviv: force vertex buffers through the MMU
This fixes a vertex data corruption issue if some of the vertex streams
go through the MMU and some don't.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit e158b74971)
Nominated-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-02-03 11:18:53 +00:00
Christian König
89b51c7e43 st/va: make sure that we call begin_frame() only once v2
This fixes "st/va: delay calling begin_frame until we have all parameters".

v2: call begin frame after decoder (re)creation as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
(cherry picked from commit 1338d912f5)
2017-02-03 11:12:16 +00:00
Nayan Deshmukh
ac2337ee38 st/vdpau: only send buffers with B8G8R8A8 format to X
PresentPixmap only works if the pixmap depth matches with the
window depth, otherwise it returns a BadMatch protocol error.
Even if the depths match, the result won't look correctly
if the VDPAU RGB component order doesn't match the X11 one so
we only allow the X11 format.
For other buffers we copy them to a buffer which is send to X.

v2: only send buffers with format VDP_RGBA_FORMAT_B8G8R8A8
v3: reword commit message
v4: add comment explaining the code

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 31908d6a4a)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99637
Nominated-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Nominated-by: Michel Dänzer <michel.daenzer@amd.com> (IRC)
2017-02-03 11:09:00 +00:00
Mauro Rossi
77ec080710 android: fix llvm, elf dependencies for M, N releases
These changes set the correct llvm version and elf include path
which differ for Marshmallow and Nougat

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9c45bb731c)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	Android.common.mk
2017-02-03 11:08:59 +00:00
Jason Ekstrand
eadbc95d64 anv: Improve flushing around STATE_BASE_ADDRESS
It is not clear from the docs exactly how pipelined STATE_BASE_ADDRESS
actually is.  We know from experimentation that we need to flush the
render cache prior to emitting STATE_BASE_ADDRESS and invalidate the
texture cache afterwards.  The only thing the PRM says is that, on gen8+
we're supposed to invalidate the state cache after STATE_BASE_ADDRESS
but experimentation has indicated that doing so does nothing whatsoever.

Since we don't really know, let's do just a bit more flushing in the
hopes that this won't be a problem again.  In particular:

 1) Do a CS stall before we emit STATE_BASE_ADDRESS since we don't
    really know whether or not it's pipelined.

 2) Do a data cache flush in case what runs before STATE_BASE_ADDRESS
    is a compute shader.

 3) Invalidate the state and constant caches after STATE_BASE_ADDRESS
    because the state may be getting cached there (we don't really know).

Reported-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 92128590bc)
2017-02-03 11:08:59 +00:00
Jason Ekstrand
69ec90ad24 anv: Flush render cache before STATE_BASE_ADDRESS on gen7
We had no good reason for *not* doing this on gen7 before but we didn't
know it was needed.  Recently, when trying update to Vulkan CTS version
1.0.2 in our CI system, Mark discovered GPU hangs on Haswell that appear
to be STATE_BASE_ADDRESS related.  This commit fixes them.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f1f9794118)
2017-02-03 11:08:59 +00:00
Jason Ekstrand
7abecef5c3 isl/formats: Only advertise sampling for A4B4G4R4 on Broadwell
This causes hangs on Broadwell if you try to render to it.  I have no
idea how we managed to not hit this earlier.

Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4871930451)
2017-02-03 11:08:59 +00:00
Jason Ekstrand
5d470a68e6 intel/blorp: Handle clearing of A4B4G4R4 on all platforms
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a0348b5a0b)
2017-02-03 11:08:59 +00:00
Wladimir J. van der Laan
3df060d953 etnaviv: Set SE.CLIP registers, add margins for scissor/clip registers
This fixes rendering of full-screen quads (and other screen-filling
geometry, e.g. ioquake3 walls up-close) on gc3000. It should be a no-op
on other hardware.

- It looks like SE_CLIP registers were not set at all.
  I'm amazed that rendering worked without them. Emit them to
  avoid issues on gc3000.

- Define constants
  ETNA_SE_SCISSOR_MARGIN_RIGHT (0x1119)
  ETNA_SE_SCISSOR_MARGIN_BOTTOM (0x1111)
  ETNA_SE_CLIP_MARGIN_RIGHT (0xffff)
  ETNA_SE_CLIP_MARGIN_BOTTOM (0xffff)

  These demarcate the margin (fixp16) between the computed sizes and the
  value sent to the chip. I have set these to the numbers used by the
  Vivante driver for gc2000. I am not sure whether any old hardware was
  relying on the old numbers, or whether those were just a guess. But if
  so, these need to be moved to the _specs structure.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 56314f5baf)
2017-02-03 11:08:59 +00:00
Wladimir J. van der Laan
34cd53ca8c etnaviv: Generate new sin/cos instructions on GC3000
Shaders using sin/cos instructions were not working on GC3000.

The reason for this turns out to be that these chips implement sin/cos
in a different way (but using the same opcodes):

- Need their input scaled by 1/pi instead of 2/pi.

- Output an x and y component, which need to be multiplied to
  get the result.

- tex_amode needs to be set to 1.

Add a new bit to the compiler specs and generate these instructions
as necessary.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit fe3bb8cdb5)
2017-02-03 11:08:59 +00:00
Nanley Chery
05d1c8aa02 anv/cmd_buffer: Use the proper depth input attachment surface state
Commit 2852efcda4 moved the location of
the depth input attachment surface state from the render pass to the
image view, but failed to update the surface state location used when
emitting the binding table. Fix this by loading the surface state from
the correct location.

Fixes:
dEQP-VK.renderpass.formats.d16_unorm.input.*
dEQP-VK.renderpass.formats.d24_unorm_s8_uint.input.*
dEQP-VK.renderpass.formats.d32_sfloat.input.*
dEQP-VK.renderpass.formats.x8_d24_unorm_pack32.input.*
dEQP-VK.renderpass.attachment_allocation.input_output.93
dEQP-VK.renderpass.attachment_allocation.input_output.92
dEQP-VK.renderpass.attachment_allocation.input_output.82
dEQP-VK.renderpass.attachment_allocation.input_output.46

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 33e0c5d003)
2017-02-03 11:08:59 +00:00
Bartosz Tomczyk
ca222b7c18 glsl: fix heap-buffer-overflow
The `end+1` skips the ']', whereas the `strlen+1` includes the final
'\0' in the move to terminate the string.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit fc27181f9e)
2017-02-03 11:08:59 +00:00
Wladimir J. van der Laan
6c89a728d9 etnaviv: Cannot render to rb-swapped formats
Exposing rb swapped (or other swizzled) formats for rendering would
involve swizzing in the pixel shader. This is not the case at the
moment, so reject requests for creating such surfaces.

(GPUs that need an extra resolve step anyway due to multiple pixel
pipes, such as gc2000, might also do this swap in the resolve operation.
But this would be tricky to keep track of)

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 658568941d)
2017-02-03 11:08:59 +00:00
Christian Gmeiner
f3b7a51383 etnaviv: Avoid infinite loop in find_frame()
Use of unsigned loop control variable with '>= 0' would lead
to infinite loop.

Reported by clang:

etnaviv_compiler.c:1024:39: warning: comparison of unsigned expression
>= 0 is always true [-Wtautological-compare]
   for (unsigned sp = c->frame_sp; sp >= 0; sp--)
                                   ~~ ^  ~

v2: Simply use the same datatype as c->frame_sp is using.

CC: <mesa-stable@lists.freedesktop.org>
Reported-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
(cherry picked from commit 82fe240a99)
2017-02-03 11:08:59 +00:00
Dave Airlie
9ecfbafedb radv/ac: apply slice rounding to 1d arrays as well.
Fixes:
dEQP-VK.glsl.texture_functions.texture.*1darray*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8477aa71d9)
2017-02-03 11:08:58 +00:00
Dave Airlie
eaf311d90d radv/ac: implement txs for buffer textures.
This fixes a bunch of buffer related:
dEQP-VK.memory.pipeline_barrier.*
tests, that were crashing in LLVM due to this being missing.

Reviewed-by: Andres Rodriguez<andresx7@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0ecd426490)
2017-02-03 11:08:58 +00:00
Dave Airlie
bbb4562def radv/ac: handle nir irem opcode.
This fixes:
dEQP-VK.spirv_assembly.instruction.compute.opsrem.*

Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org"
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit ecc3fa3ba3)
2017-02-03 11:08:58 +00:00
Dave Airlie
7083ca2625 radv/ac: fix multisample subpass image.
We weren't adding the fragment position properly.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 059dd17175)
2017-02-03 11:08:58 +00:00
Dave Airlie
8917af11f7 radv: handle transfer_write as a dst flag.
It appears we can get image barriers like:
    srcStageMask:                   VkPipelineStageFlags = 4096 (VK_PIPELINE_STAGE_TRANSFER_BIT)
    dstStageMask:                   VkPipelineStageFlags = 4096 (VK_PIPELINE_STAGE_TRANSFER_BIT)
    dependencyFlags:                VkDependencyFlags = 0
    memoryBarrierCount:             uint32_t = 0
    pMemoryBarriers:                const VkMemoryBarrier* = NULL
    bufferMemoryBarrierCount:       uint32_t = 0
    pBufferMemoryBarriers:          const VkBufferMemoryBarrier* = NULL
    imageMemoryBarrierCount:        uint32_t = 1
    pImageMemoryBarriers:           const VkImageMemoryBarrier* = 0x7ffc882367b0
        pImageMemoryBarriers[0]:        const VkImageMemoryBarrier = 0x7ffc882367b0:
            sType:                          VkStructureType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER (45)
            pNext:                          const void* = NULL
            srcAccessMask:                  VkAccessFlags = 4096 (VK_ACCESS_TRANSFER_WRITE_BIT)
            dstAccessMask:                  VkAccessFlags = 4096 (VK_ACCESS_TRANSFER_WRITE_BIT)
            oldLayout:                      VkImageLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL (7)
            newLayout:                      VkImageLayout = VK_IMAGE_LAYOUT_GENERAL (1)
            srcQueueFamilyIndex:            uint32_t = 4294967295
            dstQueueFamilyIndex:            uint32_t = 4294967295
            image:                          VkImage = 0x2df55e0
            subresourceRange:               VkImageSubresourceRange = 0x7ffc882367e0:
                aspectMask:                     VkImageAspectFlags = 1 (VK_IMAGE_ASPECT_COLOR_BIT)
                baseMipLevel:                   uint32_t = 0
                levelCount:                     uint32_t = 1
                baseArrayLayer:                 uint32_t = 0
                layerCount:                     uint32_t = 1

This fixes all the CTS dEQP-VK.memory.pipeline_barrier.transfer_dst tests here,
not sure if this is a too large hammer.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a1c1ba7d56)
2017-02-03 11:08:58 +00:00
Marek Olšák
b7f7dc7231 radeonsi: don't invoke DCC decompression in update_all_texture_descriptors
This fixes a bug uncovered by the 17-part patch series, specifically:
  "gallium/radeon: merge dirty_fb_counter and dirty_tex_descriptor_counter"

If dirty_tex_counter has been updated and set_shader_image invokes DCC
decompression, the DCC decompression itself checks the counter and updates
descriptors, which in turn invokes the same DCC decompression. The blitter
can't handle the recursion and the driver eventually crashes.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit a0740d59aa)
2017-02-03 11:08:58 +00:00
Bartosz Tomczyk
301c9b96f2 r600: Fix stack overflow
Commit 7b5878ee04 increased number of
outputs to 64, but left output array intact. This caused stack overflow
when number of outputs is bigger then 32. Found by ASAN.

Cc: "12.0 13.0 17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit a41f2527ae)
2017-02-03 11:08:58 +00:00
Kenneth Graunke
06b9bc66d5 i965: Support the force_glsl_version driconf option.
Gallium drivers have had this for a while.  It makes sense to support
it consistently across drivers, so expose it in i965 as well.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
(cherry picked from commit 2f7a7ae131)
2017-02-03 11:08:58 +00:00
Kenneth Graunke
270597d13f i965: Fix check for negative pitch in can_do_fast_copy_blit().
At this point, the pitch is in bytes.  We haven't yet divided the pitch
by 4 for tiled surfaces, so abs(pitch) may be larger than 32K.  This
means the bit 15 trick won't work.

The caller now has signed integers anyway, so just pass those through
and do the obvious check.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 02216a1ddf)
2017-02-03 11:08:58 +00:00
Kenneth Graunke
671dfe51a0 i965: Unbind deleted shaders from brw_context, fixing malloc heisenbug.
Applications may delete a shader program, create a new one, and bind it
before the next draw.  With terrible luck, malloc may randomly return a
chunk of memory for the new gl_program that happened to be the exact
same pointer as our previously bound gl_program.  In this case, our
logic to detect new programs in brw_upload_pipeline_state() would break:

      if (brw->vertex_program != ctx->VertexProgram._Current) {
         brw->vertex_program = ctx->VertexProgram._Current;
         brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM;
      }

Because the pointer is the same, we'd think it was the same program.
But it could be wildly different - a different stage altogether,
different sets of resources, and so on.  This causes utter chaos.

As unlikely as this seems, I believe I hit this when running a subset
of the CTS in a loop, in a group of tests that churns through simple
programs, deleting and rebuilding them.  Presumably malloc uses a
bucketing cache of sorts, and so freeing up a gl_program and allocating
a new one fairly quickly causes it to reuse that memory.

The result was that brw->vertex_program->info.num_ssbos claimed the
program had SSBOs, while brw->vs.base.prog_data.binding_table claimed
that there were none.  This was crazy, because the binding table is
calculated from info.num_ssbos - the shader info appeared to change
between shader compile time and draw time.  Careful use of watchpoints
revealed that it was being clobbered by rzalloc's memset when building
an entirely different program...

Fortunately, our 0xd0d0d0d0 canary for unused binding table entries
caused us to crash out of bounds when trying to upload SSBOs, or we
may have never discovered this heisenbug.

Fixes crashes in GL45-CTS.compute_shader.sso-case2 when using a hacked
cts-runner that only runs GL45-CTS.compute_shader.s* in EGL config ID 5
at 64x64 in a loop with 100 iterations.

Cc: "17.0 13.0 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 7c5629a269)
2017-02-03 11:08:58 +00:00
Bas Nieuwenhuizen
d7d772f903 radv/ac: Use base in push constant loads.
Apparently the source is not an address but an offset, so we actually
need to use the base.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 96c60b7f07)
2017-02-03 11:08:57 +00:00
Emil Velikov
522ee2cd7d configure.ac: list radeon in --with-vulkan-drivers help string
Analogous to what we do for the dri and gallium drivers.

Cc: 17.0 13.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@colllabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit cb6be5c8c0)
2017-02-03 11:08:57 +00:00
Emil Velikov
929b3bb6fe radv: automake: Don't install vk_platform.h or vulkan.h.
These files belong to the vulkan loader.

Identical to
045f38a507 vulkan: Don't install vk_platform.h or vulkan.h.

Cc: Dave Airlie <airlied@redhat.com>
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 6f2dec0a23)
2017-02-03 11:08:57 +00:00
Emil Velikov
e6ea92b263 mesa/tests: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 091f2b8c98)
2017-02-03 11:08:57 +00:00
Emil Velikov
27e7e7e7e3 dri/osmesa: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6ba96bdcab)
2017-02-03 11:08:57 +00:00
Emil Velikov
3919feee55 dri/swrast: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ede4ff9adc)
2017-02-03 11:08:57 +00:00
Emil Velikov
6ee946862c radeon, r200: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 5a0ba1e5de)
2017-02-03 11:08:57 +00:00
Emil Velikov
4e20356a6c mapi: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ee5de93269)
2017-02-03 11:08:57 +00:00
Emil Velikov
5236ab7bac loader: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit af860850a0)
2017-02-03 11:08:57 +00:00
Emil Velikov
4ea4e19ccb glx/windows: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Jon Turney <jon.turney@dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 912b4f5472)
2017-02-03 11:08:57 +00:00
Emil Velikov
fad44e6aea glx/apple: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jeremy Sequoia <jeremyhu@apple.com>
(cherry picked from commit 5b874cee09)
2017-02-03 11:08:57 +00:00
Emil Velikov
a817d1e227 glx: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d66f9e6d93)
2017-02-03 11:08:57 +00:00
Emil Velikov
44ba34817c d3dadapter9: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d221bf9b91)
2017-02-03 11:08:56 +00:00
Emil Velikov
586b009cfe st/dri: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 517f34b4be)
2017-02-03 11:08:56 +00:00
Emil Velikov
89ce0721eb clover: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Aaron Watry <awatry@gmail.com>
Cc: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 65d5a60cac)
2017-02-03 11:08:56 +00:00
Emil Velikov
87fc95c94c egl: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c5921ae0d2)
2017-02-03 11:08:56 +00:00
Emil Velikov
042b3445b2 i915: automake: include builddir prior to srcdir
Analogous to previous commit.

Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 90ac5c339e)
2017-02-03 11:08:56 +00:00
Emil Velikov
0a1ad5c916 i965: automake: include builddir prior to srcdir
The latter can contain stale generated file, which, as-is, we'll end up
using.

Fixes: bfd17c76c1 "i965: Port INTEL_PRECISE_TRIG=1 to NIR."
Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 4622c75dfb)
2017-02-03 11:08:56 +00:00
Emil Velikov
fe1b2f7341 freedreno: automake: correctly set MKDIR_GEN
Analogous to previous commit.

Fixes: 4610e5ef28 "freedreno/ir3: fix sin/cos"
Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Rob Clark <robclark@freedesktop.org>
Cc: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
(cherry picked from commit a922c82125)
2017-02-03 11:08:56 +00:00
Emil Velikov
c22ee800d2 i965: automake: correctly set MKDIR_GEN
Otherwise we might end up w/o the respective folder (depending on
autotools version) and fail at build time.

Fixes: bfd17c76c1 "i965: Port INTEL_PRECISE_TRIG=1 to NIR."
Cc: "12.0 13.0" <mesa-dev@lists.freedesktop.org>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 5eed48d237)
2017-02-03 11:08:56 +00:00
Jason Ekstrand
e79043bbb9 vulkan/wsi: Lower the maximum image sizes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.0" <mesa-dev@lists.freedesktop.org>
(cherry picked from commit d6397dd625)
2017-02-03 11:08:56 +00:00
Jason Ekstrand
f14926027c vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetPresentModes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.0" <mesa-dev@lists.freedesktop.org>
(cherry picked from commit 659edd9f5c)
2017-02-03 11:08:56 +00:00
Jason Ekstrand
23ffeed7e0 vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetFormats
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.0" <mesa-dev@lists.freedesktop.org>
(cherry picked from commit dc578ef060)
2017-02-03 11:08:56 +00:00
Emil Velikov
1e03b5e566 mesa: move variable declaration to where its used
The variable replacement was unused when building w/o
ENABLE_SHADER_CACHE. Since we can mix variable declarations and code,
move it to where its used.

Fixes: 9f8dc3bf03 "utils: build sha1/disk cache only with
Android/Autoconf"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

(cherry picked from commit 6a5850b04a)
2017-02-03 11:08:56 +00:00
Andreas Boll
58952675f6 configure.ac: Require LLVM for r300 only on x86 and x86_64
b3119a3 introduced a strict LLVM requirement for r300 on all
architectures and thus configure fails on architectures where LLVM is
not available or buggy.

r300 doesn't strictly require LLVM, but for performance reasons we
highly recommend LLVM usage. So require it at least on x86 and x86_64
architectures as we have done before b3119a3.

Fixes: b3119a3 ("configure.ac: Check gallium LLVM version in gallium_require_llvm")
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 1f2a890ace)
2017-02-03 11:08:55 +00:00
Lionel Landwerlin
fe44c532b2 spirv: handle undefined components for OpVectorShuffle
Fixes:
   dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.vector_related
   dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.vector_related*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit bbe8705c57)
2017-02-03 11:08:55 +00:00
Lionel Landwerlin
939c0c82e5 spirv: handle OpUndef as part of the variable parsing pass
Looking at the following bit of SPIRV shader :

...
%zero        = OpConstant %i32 0
%ivec3_0     = OpConstantComposite %ivec3 %zero %zero %zero
%vec3_undef  = OpUndef %ivec3
%sc_0        = OpSpecConstant %i32 0
%sc_1        = OpSpecConstant %i32 0
%sc_2        = OpSpecConstant %i32 0
...

Our compiler currently stops parsing variables & types on the OpUndef
and switches to instructions, leaving the following sc_[0-2] variables
untreated.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit df7063cba3)
2017-02-03 11:08:55 +00:00
Lionel Landwerlin
7c663b1d5e anv: fix descriptor pool internal size allocation
The size of the pool is slightly smaller than the size of the
structure containing the whole pool. We need to take that into account
on when setting up the internals.

Fixes a crash due to out of bound memory access in:
   dEQP-VK.api.descriptor_pool.out_of_pool_memory

v2: Drop debug traces (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c3421106ec)
2017-02-03 11:08:55 +00:00
Kenneth Graunke
2554c98d70 i965: Make intelEmitCopyBlit not truncate large strides.
When trying to blit larger tiled surfaces, the pitch can be larger than
32768 bytes, which means it won't fit in a GLshort.  Passing it in will
truncate the stride to 0, which has...surprising results.

The pitch can be up to 32,768 DWords, or 128kB.  We measure it in bytes,
but divide by 4 when programming it.  So we need to handle values up to
131,072.  Switch from GLshort to int32_t to avoid the truncation.

Fixes GL45-CTS.gtf30.GL3Tests.depth_texture.depth_texture_copyteximage
at widths greater than 8192.

v2: Use int32_t as negative values can be used (Jason).

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit f8f7ea508b)
2017-02-03 11:08:55 +00:00
Kenneth Graunke
31715781c6 i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.
SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message,
using a source of g127 for the single register.  With a UD type, this
supposedly could read g128, which doesn't exist, causing the simulator
to get cranky.  Use a UW type to avoid this.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
(cherry picked from commit fcf723b647)
2017-02-03 11:08:55 +00:00
Iago Toral Quiroga
ebfe5e17ee anv/lower_input_attachments: honor sample index parameter to subpassLoad()
According to GL_KHR_vulkan_glsl, the signature of subpassLoad() is:

gvec4 subpassLoad(gsubpassInput   subpass);
gvec4 subpassLoad(gsubpassInputMS subpass, int sample);

So the multisampled case always receives an explicit sample index that we
should use. The current implementation was ignoring this parameter
and using gl_SampleID value instead.

Fixes:
dEQP-VK.pipeline.multisample_shader_builtin.sample_id.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 9b25769da6)
2017-02-03 11:08:55 +00:00
Kenneth Graunke
dcb3b24b86 i965: Fix fast depth clears for surfaces with a dimension of 16384.
I hadn't bothered to set this bit because I figured it would just
paper over us getting the rectangle wrong.  But it turns out that
there is a legitimate reason to use it, so let's do so.

The alternative would be to chop up 16k clears to multiple 8k clears,
which is pointlessly painful.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 5106df85da)
2017-02-03 11:08:55 +00:00
Lionel Landwerlin
5a806f7def anv: set command buffer to NULL when allocations fail
The spec section 5.2 says:

   "vkAllocateCommandBuffers can be used to create multiple command
   buffers. If the creation of any of those command buffers fails, the
   implementation must destroy all successfully created command buffer
   objects from this command, set all entries of the pCommandBuffers
   array to VK_NULL_HANDLE and return the error."

Fixes:
   dEQP-VK.api.object_management.alloc_callback_fail_multiple.command_buffer_primary
   dEQP-VK.api.object_management.alloc_callback_fail_multiple.command_buffer_secondary

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 25e21cb8d0)
2017-02-03 11:08:55 +00:00
Dave Airlie
c63652b8ac radv: program a default point size.
Along the lines of what
3b804819 anv: Default PointSize to 1.0 if not written by the shader
does for anv, program a default point size in the hw of 1.0.

This preempt fixes a bunch of geom shader tests.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 2ab2be092d)
2017-02-03 11:08:55 +00:00
Marek Olšák
651861d862 radeonsi: handle first_non_void correctly in si_create_vertex_elements
This fixes R11G11B10_FLOAT, because it's in the category of "OTHER",
meaning that it doesn't have any channel description.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit eac7df43ca)
2017-02-03 11:08:55 +00:00
Marek Olšák
d701877fb0 st/mesa: destroy pipe_context before destroying st_context (v2)
If radeonsi starts compiling an optimized shader variant asynchronously
with a GL debug callback set and the application destroys the GL context,
radeonsi crashes when trying to write shader stats into the debug output
of a non-existent context after compilation, because st/mesa was destroyed
before pipe_context.

Firefox with WebGL2 enabled hits this bug.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99456

v2: protect against a double destroy in st_create_context_priv and callers.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit d9ef549238)
2017-02-03 11:08:54 +00:00
Ian Romanick
b2bbfca79f mesa: Don't advertise GL_OES_read_format in core profile
OpenGL ES implementations are not allowed to ship ARB extensions, and
OpenGL implementations are not allowed to ship OES extensions.

The functionality is also included in GL_ARB_ES2_compatibility.  Ever
OpenGL core-profile driver currently exposes both extensions.  I don't
know of any applications that explicitly check for GL_OES_read_format,
so removing it seems very unlikely to cause problems.  No functionality
is removed.

I have left this extension in place for compatibility profile.  There
are still OpenGL 1.x drivers in Mesa, and adding code to check for
compatibility profile and not GL_ARB_ES2_compatibility for
GL_IMPLEMENTATION_COLOR_READ_TYPE and GL_IMPLEMENTATION_COLOR_READ_FORMAT
just feels dumb.

Three other other alternatives considered:

 - Remove the string from compatibility profile drivers but leave the
   functionality in place.

 - Add a flag to expose the extension string, and set it in every OpenGL
   driver that does not expose GL_ARB_ES2_compatibility (and those
   drivers only).  I tried this.  You can't have two instances of an
   extension in the extension table (one dummy_true for ES1 and one with
   a flag for compatibility profile), so the implementation requires a
   bit of effort.

 - Only expose the extension in compatibility if the version is less
   than 2.0.  I didn't see an easy way to do this.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c4a0c1efff)
2017-02-03 11:08:54 +00:00
Roland Scheidegger
140ad270c8 gallivm: (trivial) fix ddiv cpu implementation
we can't use the cpu implementation of fdiv, as this one uses different
lp_build_context, which causes assertion failure.
Just use default fdiv action (there is no fast rcp for doubles which we
could potentially use anyway).

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 25208949d7)
2017-02-03 11:08:54 +00:00
Roland Scheidegger
517fc3ef78 tgsi: implement ddiv opcode
softpipe (along with llvmpipe) claims to support arb_gpu_shader_fp64,
so we really need to support that opcode.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 3b575a955c)
2017-02-03 11:08:54 +00:00
Jason Ekstrand
450f6aa5b2 i965/blorp: Use the correct ISL format for combined depth/stencil
In brw_blorp_copyteximage, we use the format from the render buffer.
This could be a combined depth/stencil format.  In this case, we handle
stencil properly but we give blorp the wrong ISL format.  Specifically,
we would give blorp ISL_FORMAT_R32G32B32A32_FLOAT which is the wrong
size was causing GPU hangs.

Fixes: GL45-CTS.gtf30.GL3Tests.packed_depth_stencil.packed_depth_stencil_copyteximage

Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4c180f9633)
2017-02-03 11:08:54 +00:00
Topi Pohjolainen
d940b91f94 i965/blorp: Add also depth and stencil buffers to render cache
v2 (Jason, Curro): Add stencil also even though it is not
                   enabled yet.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit ba6399df94)
2017-02-03 11:08:54 +00:00
Emil Velikov
63f169d5d0 configure.ac: move require_dri_shared_libs_and_glapi() before its users
Otherwise we'll get a lovely message as below:
"require_dri_shared_libs_and_glapi: command not found"

Cc: Steven Newbury <steve@snewbury.org.uk>
Reported-by: Steven Newbury <steve@snewbury.org.uk>
Fixes: da410e6afa "configure: explicitly require shared glapi for
enable-dri"
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Steven Newbury <steve@snewbury.org.uk>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

(cherry picked from commit 5872850b88)
2017-02-03 11:08:54 +00:00
Emil Velikov
d283ec0a7b Update version to 17.0.0-rc2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-01-25 13:24:27 +00:00
Topi Pohjolainen
9577977266 i965/blorp: Make post draw flush more explicit
Blits do not need any special treatment as the target buffer
object is added to render cache just as one does for normal draw.
Color clears and resolves in turn require explicit "end of pipe
synchronization". It is not clear what this means exactly but the
assumption is that render cache flush with command stream stall
should be sufficient.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 180653c357)
2017-01-24 17:18:18 +00:00
Topi Pohjolainen
8621961d43 i965/gen6: Issue direct depth stall and flush after depth clear
instead of calling unconditionally brw_emit_mi_flush() which
does:

   brw_emit_pipe_control_flush(brw,
                                PIPE_CONTROL_DEPTH_CACHE_FLUSH |
                                PIPE_CONTROL_RENDER_TARGET_FLUSH |
                                PIPE_CONTROL_CS_STALL);

   brw_emit_pipe_control_flush(brw,
                                PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
                                PIPE_CONTROL_CONST_CACHE_INVALIDATE);

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 46b346899d)
2017-01-24 17:17:53 +00:00
Topi Pohjolainen
7d5a98f106 i965: Make depth clear flushing more explicit
Current blorp logic issues unconditional "flush everything"
(see brw_emit_mi_flush()) after each render. For example, all
blits issue this unconditionally which shouldn't be needed if
they set render cache properly so that subsequent renders do
necessary flushing before drawing.

In case of piglit:

ext_framebuffer_multisample-accuracy all_samples depth_draw small

intel_hiz_exec() is always preceded by blorb blit and the
unconditional flush looks to hide the lack of stall and flushes
in depth clears. By removing the brw_emit_mi_flush() I get gpu
hangs.

This patch adds the stalls and flushes mandated by the spec
and gets rid of those hangs.

v2 (Jason, Ken): Document the rational for separating
                 depth cache flush and stall on Gen7.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit e6da6943fe)
2017-01-24 17:17:22 +00:00
Topi Pohjolainen
4e6445caa9 i965/blorp: Use the render cache mechanism instead of explicit flushing
by replacing brw_emit_mi_flush() with brw_render_cache_set_check_flush().
The latter splits the flush in two:

   brw_emit_pipe_control_flush(brw,
                               PIPE_CONTROL_DEPTH_CACHE_FLUSH |
                               PIPE_CONTROL_RENDER_TARGET_FLUSH |
                               PIPE_CONTROL_CS_STALL);

   brw_emit_pipe_control_flush(brw,
                               PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
                               PIPE_CONTROL_CONST_CACHE_INVALIDATE);

instead of

   int flags = PIPE_CONTROL_NO_WRITE | PIPE_CONTROL_RENDER_TARGET_FLUSH;
   if (brw->gen >= 6) {
      flags |= PIPE_CONTROL_INSTRUCTION_INVALIDATE |
               PIPE_CONTROL_CONST_CACHE_INVALIDATE |
               PIPE_CONTROL_DEPTH_CACHE_FLUSH |
               PIPE_CONTROL_VF_CACHE_INVALIDATE |
               PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
               PIPE_CONTROL_CS_STALL;
   }
   brw_emit_pipe_control_flush(brw, flags);

v2 (Jason): Check that destination exists before trying to add to
            render cache. Depth clears and resolves don't have it.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 4840a53e90)
2017-01-24 17:17:02 +00:00
Marek Olšák
e405d0d3c6 radeonsi: always set the TCL1_ACTION_ENA when invalidating L2
Some CIK-VI docs say this is the default behavior on SI. That doesn't
answer whether it's also the default behavior on CIK-VI.

Cc: 17.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 573bf0940a)
2017-01-24 02:28:55 +00:00
Grazvydas Ignotas
0c4b8c75e2 radv: don't resubmit the same cs over and over while tracing
Fixes: 97dfff54 ("radv: Dump command buffer on hang.")
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f65b3641c3)
2017-01-24 02:26:52 +00:00
George Kyriazis
e35cfa15cf swr: Align query results allocation
Some query results struct contents are declared as cache line aligned.
Use aligned malloc, and align the whole struct, to be safe.

Fixes crash when compiling with clang.

CC: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit 00847e4f14)
2017-01-24 02:24:38 +00:00
Bruce Cherniak
34f902e17e swr: Prune empty nodes in CalculateProcessorTopology.
CalculateProcessorTopology tries to figure out system topology by
parsing /proc/cpuinfo to determine the number of threads, cores, and
NUMA nodes.  There are some architectures where the "physical id" begins
with 1 rather than 0, which was creating and empty "0" node and causing a
crash in CreateThreadPool.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97102
Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b829206b07)
2017-01-24 02:22:31 +00:00
Nicolai Hähnle
e4cf4690d1 st/glsl_to_tgsi: use DDIV instead of DRCP + DMUL
Fixes GL45-CTS.gpu_shader_fp64.built_in_functions.

v2: use DDIV unconditionally (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Tested-by: Glenn Kennard <glenn.kennard@gmail.com>
Tested-by: James Harvey <lothmordor@gmail.com>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit cfabbbcfd7)
2017-01-24 02:20:31 +00:00
Nicolai Hähnle
7f6c6b9101 glsl: split DIV_TO_MUL_RCP into single- and double-precision flags
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Tested-by: Glenn Kennard <glenn.kennard@gmail.com>
Tested-by: James Harvey <lothmordor@gmail.com>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b71c415c3d)
2017-01-24 02:18:17 +00:00
Nicolai Hähnle
23ead4c7b2 r600: implement DDIV
Tested-by: Glenn Kennard <glenn.kennard@gmail.com>
Tested-by: James Harvey <lothmordor@gmail.com>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e4f8f9a638)
2017-01-24 02:16:04 +00:00
Nicolai Hähnle
7856dfdbab r600: factor out cayman_emit_unary_double_raw
We will use it for DDIV.

Tested-by: Glenn Kennard <glenn.kennard@gmail.com>
Tested-by: James Harvey <lothmordor@gmail.com>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 488560cfe6)
2017-01-24 02:13:45 +00:00
Nicolai Hähnle
41b93b1fe0 r600: double multiply can handle only one multiply at a time
It seems clear that trying to multiply two pairs of doubles would result
in the temporary register getting overwritten by the second pair. So
make the code more explicit.

Tested-by: Glenn Kennard <glenn.kennard@gmail.com>
Tested-by: James Harvey <lothmordor@gmail.com>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 76b02d2fe1)
2017-01-24 02:11:28 +00:00
Rob Clark
8857256214 freedreno/a5xx: set frag shader threadsize
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 31daeb5bf1)
2017-01-24 02:09:27 +00:00
Rob Clark
516b34908d freedreno/a5xx: set fragcoordxy properly
What a3xx docs call IJPERSPCENTERREGID.. the xy coord passed into
bary.f.  We were incorrectly setting both this and gl_FragCoord.xy to
the same register resulting in all sorts of hilarity.

Fixes stk, vdrift, 0ad, probably a bunch others.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 8d6af93e76)
2017-01-24 02:07:25 +00:00
Rob Clark
0645c0e0d4 freedreno/a5xx: fix psize
Note spritelist (POINTLIST_PSIZE) seems not to be a thing anymore on
a5xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6cc93bedc1)
2017-01-24 02:05:21 +00:00
Rob Clark
6aade42111 freedreno/a5xx: srgb fix
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 141a4f86d6)
2017-01-24 02:03:15 +00:00
Rob Clark
4dc6ed53c1 freedreno/a5xx: fix int vbos
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 69fbb458cf)
2017-01-24 02:01:11 +00:00
Rob Clark
cfe14ab39c freedreno/a5xx: fix clear for uint/sint formats
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 16671e9704)
2017-01-24 01:59:17 +00:00
Rob Clark
250b1cad3b freedreno/a5xx: fix cull state
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4d9aa4f67d)
2017-01-24 01:57:10 +00:00
Rob Clark
9318d81574 freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4c39458460)
2017-01-24 01:54:34 +00:00
Jason Ekstrand
00cdbfe6ef nir/search: Use the correct bit size for integer comparisons
The previous code always compared integers as 64-bit.  Due to variations
in sign-extension in the code generated by nir_opt_algebraic.py, this
meant that nir_search doesn't always do what you want.  Instead, 32-bit
values should be matched as 32-bit and 64-bit values should be matched
as 64-bit.  While we're here we unify the unsigned and signed paths.
Now that we're using the right bit size, they should be the same since
the only difference we had before was sign extension.

This gets the UE4 bitfield_extract optimization working again.  It had
stopped working due to the constant 0xff00ff00 getting sign-extended
when it shouldn't have.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit bb96b03461)
2017-01-24 01:52:20 +00:00
Jason Ekstrand
83deab2f6a intel/blorp/copy: Properly handle clear colors for CCS_E images
In order to handle CCS_E, we stomp the image format to a UINT format and
then do some bitcasting logic in the shader.  This works fine since SKL
render compression only considers the channel layout of the format and
not the format itself.  In order for this to work on images that have
been fast-cleared, we need to also convert the clear color so that, when
interpreted as UINT, it provides the same bit value as it would have in
the original format.  This fixes a bunch of OpenGL ES CTS tests for
copy_image when we start using CCS more aggressively.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 817f9e3b17)
2017-01-24 01:15:47 +00:00
Andres Rodriguez
de2dfa1dc3 radv: fix include order for installed headers v2
In situations where libdrm_amdgpu and mesa are installed to the same
location, the mesa installed headers will take precedence over the git
source headers.

This is due to the AMDGPU_CFLAGS containing the install directory.

This situation can cause build errors if the git version of a header is
newer than the currently installed version of a header (e.g. git pull
updates vulkan.h)

Note: using the same install prefix for mesa and libdrm is probably a
common occurrence since it is described in the radeonBuildHowTo wiki:
https://www.x.org/wiki/radeonBuildHowTo/

v2: added sign-off

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit a3ad6a34c6)
2017-01-20 23:45:57 +00:00
Andres Rodriguez
5c2951c7f9 vulkan/wsi: clarify the severity of lack of DRI3 v2
The current message sounds like a small warning, clarify that it can
result in lack of presentation support and application crashes.

v2: add "if they do" (Bas)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98263
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Jason ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e0674e740b)
2017-01-20 23:45:50 +00:00
Lionel Landwerlin
e3bfa959a8 anv: don't require render target isl bit for depth/stencil surfaces
Blorp can deal with depth/stencil surfaces blits/copies without the
render target requirement. Also having both render target and
depth/stencil requirement is incompatible from isl's point of view.

This fixes an image creation issue in the high level quality settings
of the Unity3D player, which requires a depth texture with src/dst
transfer & 4x multisampling.

v2: Simply aspect checking condition (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 74c23bde5b)
2017-01-20 23:31:40 +00:00
Lionel Landwerlin
a259b800df spirv: don't assert with location decorations on non i/o variables
Some applications might add location decoration to samplers. Rather
than raising an error it seems it would make more sense to just
discard these decorations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 8a28e764d0)
2017-01-20 23:29:48 +00:00
Samuel Pitoiset
45f13c2be0 gallium/hud: add missing break in hud_cpufreq_graph_install()
Fixes: e99b9395be "gallium/hud: Add support for CPU frequency monitoring"
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 383fc8e9f3)
2017-01-20 23:27:54 +00:00
Marek Olšák
b72f8de873 radeonsi: don't forget to add HTILE to the buffer list for texturing
This fixes VM faults. Discovered by Samuel Pitoiset.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98975
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99450

Cc: 17.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
(cherry picked from commit e490b7812c)
2017-01-20 23:26:03 +00:00
Nicolai Hähnle
1cc5774e5e radeonsi: fix texture gather on stencil textures
At least on VI, texture gather doesn't work with a 24_8 data format, so
use 8_8_8_8 and a modified swizzle instead.

A bit of background: When creating a GL_STENCIL_INDEX8 texture, we select
the X24S8 pipe format because we don't support stencil-only render targets
properly. With mip-mapping this can lead to a setup where the tiling is
incompatible with stencil texturing, and a flushed stencil texture is
used. For the flushed stencil, a literal X24S8 is used because there were
issues with an 8bpp DB->CB copy.

Longer term, it would be good if we could get away from these workarounds,
i.e. properly support an S8 format for stencil-only rendering and flushed
stencil. Since stencil texturing is somewhat rare, it's not a high
priority.

Fixes GL45-CTS.texture_cube_map_array.sampling.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
(cherry picked from commit 3cd092c415)
2017-01-20 23:24:17 +00:00
Zachary Michaels
50a607cf70 radeonsi: Always leave poly_offset in a valid state
This commit makes si_update_poly_offset set poly_offset to NULL if
uses_poly_offset is false. This way poly_offset either points into the
currently queued rasterizer, or it is NULL.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99451
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit d7d32b3bfe)
2017-01-20 23:22:41 +00:00
Nicolai Hähnle
613154fc8f mesa/main: fix meta caller of _mesa_ClampColor
Since _mesa_ClampColor properly checks for support of the API function
now, it's meta callers need to check support as well.

Fixes: 963311b71f ("mesa/main: fix version/extension checks in _mesa_ClampColor")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99401
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a7c635ec65)
2017-01-20 23:21:06 +00:00
Dave Airlie
ff81869f0d gallivm: use #ifdef not #if for PIPE_ARCH_BIG_ENDIAN
This fixes the build on ppc/s390.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit ef71b867ee)
2017-01-20 23:19:04 +00:00
Emil Velikov
9cb066601c Update version to 17.0.0-rc1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-01-18 20:12:04 +00:00
Emil Velikov
45297f7e4a utils: really remove the __END_DECLS macro
Fixes: d1efa09d34 "util: import sha1 implementation from OpenBSD"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ea8b2624c8)
2017-01-18 20:11:22 +00:00
Emil Velikov
acc7837799 utils: build sha1/disk cache only with Android/Autoconf
Earlier commit imported a SHA1 implementation and relaxed the SHA1 and
disk cache handling, broking the Windows builds.

Restrict things for now until we get to a proper fix.

Fixes: d1efa09d34 "util: import sha1 implementation from OpenBSD"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 9f8dc3bf03)
2017-01-18 20:11:20 +00:00
1793 changed files with 108074 additions and 135710 deletions

View File

@@ -1,6 +1,6 @@
language: c
sudo: required
sudo: true
dist: trusty
cache:
@@ -15,9 +15,11 @@ addons:
- libexpat1-dev
- libxcb-dri2-0-dev
- libx11-xcb-dev
# LLVM packaging is broken and misses these dependencies
- llvm-3.5-dev
# llvm-config is not in the dev package?
- llvm-3.5
# LLVM packaging is broken and misses this dep.
- libedit-dev
- libelf-dev
- scons
env:
@@ -27,16 +29,14 @@ env:
- XORGMACROS_VERSION=util-macros-1.19.0
- GLPROTO_VERSION=glproto-1.4.17
- DRI2PROTO_VERSION=dri2proto-2.8
- DRI3PROTO_VERSION=dri3proto-1.0
- PRESENTPROTO_VERSION=presentproto-1.0
- LIBPCIACCESS_VERSION=libpciaccess-0.13.4
- LIBDRM_VERSION=libdrm-2.4.74
- XCBPROTO_VERSION=xcb-proto-1.11
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LLVM_VERSION=3.9
- LLVM_PACKAGE="llvm-${LLVM_VERSION} llvm-${LLVM_VERSION}-dev"
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- MAKEFLAGS=-j2
matrix:
- BUILD=make
- BUILD=scons
@@ -47,7 +47,7 @@ install:
# Since libdrm gets updated in configure.ac regularly, try to pick up the
# latest version from there.
- for line in `grep "^LIBDRM.*_REQUIRED=" configure.ac`; do
- for line in `grep "^LIBDRM_.*_REQUIRED=" configure.ac`; do
old_ver=`echo $LIBDRM_VERSION | sed 's/libdrm-//'`;
new_ver=`echo $line | sed 's/.*REQUIRED=//'`;
if `echo "$old_ver,$new_ver" | tr ',' '\n' | sort -Vc 2> /dev/null`; then
@@ -70,6 +70,14 @@ install:
- tar -jxvf $DRI2PROTO_VERSION.tar.bz2
- (cd $DRI2PROTO_VERSION && ./configure --prefix=$HOME/prefix && make install)
- wget $XORG_RELEASES/proto/$DRI3PROTO_VERSION.tar.bz2
- tar -jxvf $DRI3PROTO_VERSION.tar.bz2
- (cd $DRI3PROTO_VERSION && ./configure --prefix=$HOME/prefix && make install)
- wget $XORG_RELEASES/proto/$PRESENTPROTO_VERSION.tar.bz2
- tar -jxvf $PRESENTPROTO_VERSION.tar.bz2
- (cd $PRESENTPROTO_VERSION && ./configure --prefix=$HOME/prefix && make install)
- wget $XCB_RELEASES/$XCBPROTO_VERSION.tar.bz2
- tar -jxvf $XCBPROTO_VERSION.tar.bz2
- (cd $XCBPROTO_VERSION && ./configure --prefix=$HOME/prefix && make install)
@@ -84,31 +92,21 @@ install:
- wget http://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
- tar -jxvf $LIBDRM_VERSION.tar.bz2
- (cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-freedreno --enable-etnaviv-experimental-api && make install)
- (cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-etnaviv-experimental-api && make install)
- wget $XORG_RELEASES/lib/$LIBXSHMFENCE_VERSION.tar.bz2
- tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
- (cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make install)
# Install LLVM directly via apt-get (not Travis-CI's apt addon)
# See https://github.com/travis-ci/apt-source-whitelist/pull/205#issuecomment-216054237
- wget -nv -O - http://llvm.org/apt/llvm-snapshot.gpg.key | sudo apt-key add -
- sudo apt-add-repository -y 'deb http://llvm.org/apt/trusty llvm-toolchain-trusty-3.9 main'
- sudo apt-add-repository -y 'deb http://llvm.org/apt/trusty llvm-toolchain-trusty main'
- sudo apt-get update -qq
- sudo apt-get install -qq -y $LLVM_PACKAGE
script:
- if test "x$BUILD" = xmake; then
./autogen.sh --enable-debug
--with-platforms=x11,drm
--with-egl-platforms=x11,drm
--with-dri-drivers=i915,i965,radeon,r200,swrast,nouveau
--with-gallium-drivers=i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx
--with-vulkan-drivers=radeon
--with-gallium-drivers=svga,swrast,vc4,virgl,r300,r600,etnaviv,imx
--disable-llvm-shared-libs
;
make && make check;
elif test x$BUILD = xscons; then
scons llvm=1 && scons llvm=1 check;
scons;
fi

View File

@@ -30,6 +30,7 @@ LOCAL_C_INCLUDES += \
$(MESA_TOP)/include
MESA_VERSION := $(shell cat $(MESA_TOP)/VERSION)
# define ANDROID_VERSION (e.g., 4.0.x => 0x0400)
LOCAL_CFLAGS += \
-Wno-unused-parameter \
-Wno-date-time \
@@ -38,10 +39,12 @@ LOCAL_CFLAGS += \
-Wno-initializer-overrides \
-Wno-mismatched-tags \
-DPACKAGE_VERSION=\"$(MESA_VERSION)\" \
-DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa\"
-DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa\" \
-DANDROID_VERSION=0x0$(MESA_ANDROID_MAJOR_VERSION)0$(MESA_ANDROID_MINOR_VERSION)
LOCAL_CFLAGS += \
-DENABLE_SHADER_CACHE \
-D__STDC_LIMIT_MACROS \
-DHAVE___BUILTIN_EXPECT \
-DHAVE___BUILTIN_FFS \
-DHAVE___BUILTIN_FFSLL \
@@ -58,17 +61,9 @@ LOCAL_CFLAGS += \
-DHAVE___BUILTIN_UNREACHABLE \
-DHAVE_PTHREAD=1 \
-DHAVE_DLOPEN \
-DHAVE_DL_ITERATE_PHDR \
-fvisibility=hidden \
-Wno-sign-compare
LOCAL_CPPFLAGS += \
-D__STDC_CONSTANT_MACROS \
-D__STDC_FORMAT_MACROS \
-D__STDC_LIMIT_MACROS \
-Wno-error=non-virtual-dtor \
-Wno-non-virtual-dtor
# mesa requires at least c99 compiler
LOCAL_CONLYFLAGS += \
-std=c99
@@ -76,12 +71,17 @@ LOCAL_CONLYFLAGS += \
ifeq ($(strip $(MESA_ENABLE_ASM)),true)
ifeq ($(TARGET_ARCH),x86)
LOCAL_CFLAGS += \
-DUSE_X86_ASM
-DUSE_X86_ASM \
endif
endif
ifeq ($(MESA_ENABLE_LLVM),true)
LOCAL_CFLAGS += \
-D__STDC_CONSTANT_MACROS \
-D__STDC_FORMAT_MACROS \
-D__STDC_LIMIT_MACROS
ifeq ($(MESA_ANDROID_MAJOR_VERSION),5)
LOCAL_CFLAGS += -DHAVE_LLVM=0x0305 -DMESA_LLVM_VERSION_PATCH=2
ELF_INCLUDES := external/elfutils/0.153/libelf
@@ -104,8 +104,17 @@ LOCAL_SHARED_LIBRARIES += libdrm
endif
endif
LOCAL_CFLAGS_32 += -DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\"
LOCAL_CFLAGS_64 += -DDEFAULT_DRIVER_DIR=\"/system/lib64/$(MESA_DRI_MODULE_REL_PATH)\"
LOCAL_CPPFLAGS += \
$(if $(filter true,$(MESA_LOLLIPOP_BUILD)),-D_USING_LIBCXX) \
-Wno-error=non-virtual-dtor \
-Wno-non-virtual-dtor
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_CFLAGS_32 += -DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\"
LOCAL_CFLAGS_64 += -DDEFAULT_DRIVER_DIR=\"/system/lib64/$(MESA_DRI_MODULE_REL_PATH)\"
else
LOCAL_CFLAGS += -DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\"
endif
# uncomment to keep the debug symbols
#LOCAL_STRIP_MODULE := false
@@ -116,7 +125,3 @@ endif
# Quiet down the build system and remove any .h files from the sources
LOCAL_SRC_FILES := $(patsubst %.h, , $(LOCAL_SRC_FILES))
ifneq ($(LOCAL_IS_HOST_MODULE),true)
LOCAL_SHARED_LIBRARIES += libz
endif

View File

@@ -24,7 +24,7 @@
# BOARD_GPU_DRIVERS should be defined. The valid values are
#
# classic drivers: i915 i965
# gallium drivers: swrast freedreno i915g nouveau r300g r600g radeonsi vc4 virgl vmwgfx
# gallium drivers: swrast freedreno i915g ilo nouveau r300g r600g radeonsi vc4 virgl vmwgfx
#
# The main target is libGLES_mesa. For each classic driver enabled, a DRI
# module will also be built. DRI modules will be loaded by libGLES_mesa.
@@ -32,6 +32,15 @@
MESA_TOP := $(call my-dir)
MESA_ANDROID_MAJOR_VERSION := $(word 1, $(subst ., , $(PLATFORM_VERSION)))
MESA_ANDROID_MINOR_VERSION := $(word 2, $(subst ., , $(PLATFORM_VERSION)))
MESA_ANDROID_VERSION := $(MESA_ANDROID_MAJOR_VERSION).$(MESA_ANDROID_MINOR_VERSION)
ifeq ($(filter 1 2 3 4,$(MESA_ANDROID_MAJOR_VERSION)),)
MESA_LOLLIPOP_BUILD := true
else
define local-generated-sources-dir
$(call local-intermediates-dir)
endef
endif
MESA_DRI_MODULE_REL_PATH := dri
MESA_DRI_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/$(MESA_DRI_MODULE_REL_PATH)
@@ -41,7 +50,7 @@ MESA_COMMON_MK := $(MESA_TOP)/Android.common.mk
MESA_PYTHON2 := python
classic_drivers := i915 i965
gallium_drivers := swrast freedreno i915g nouveau r300g r600g radeonsi vmwgfx vc4 virgl
gallium_drivers := swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx vc4 virgl
MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS))
@@ -88,8 +97,7 @@ SUBDIRS := \
src/egl \
src/amd \
src/intel \
src/mesa/drivers/dri \
src/vulkan
src/mesa/drivers/dri
INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS))

View File

@@ -27,7 +27,7 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-egl \
--enable-gallium-tests \
--enable-gallium-osmesa \
--enable-llvm \
--enable-gallium-llvm \
--enable-gbm \
--enable-gles1 \
--enable-gles2 \
@@ -41,9 +41,9 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-xa \
--enable-xvmc \
--enable-llvm-shared-libs \
--with-platforms=x11,wayland,drm,surfaceless \
--with-egl-platforms=x11,wayland,drm,surfaceless \
--with-dri-drivers=i915,i965,nouveau,radeon,r200,swrast \
--with-gallium-drivers=i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr,etnaviv,imx \
--with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr,etnaviv,imx \
--with-vulkan-drivers=intel,radeon
ACLOCAL_AMFLAGS = -I m4

View File

@@ -58,7 +58,6 @@ F: src/compiler/nir/
DOCUMENTATION
R: Emil Velikov <emil.l.velikov@gmail.com>
R: Eric Engestrom <eric@engestrom.ch>
F: docs/
F: doxygen/
@@ -70,10 +69,6 @@ DRI LOADER
R: Emil Velikov <emil.l.velikov@gmail.com>
F: src/loader/
EGL
R: Eric Engestrom <eric@engestrom.ch>
F: src/egl/
GALLIUM LOADER
R: Emil Velikov <emil.l.velikov@gmail.com>
F: src/gallium/auxiliary/pipe-loader/
@@ -85,7 +80,6 @@ F: src/gallium/targets/
AUTOCONF BUILD
R: Emil Velikov <emil.l.velikov@gmail.com>
F: autogen.sh
F: configure.ac
F: */Automake.inc
F: */Makefile.*am

View File

@@ -1 +1 @@
17.1.0-rc2
17.0.1

View File

@@ -34,13 +34,13 @@ branches:
clone_depth: 100
cache:
- win_flex_bison-2.5.9.zip
- win_flex_bison-2.4.5.zip
- llvm-3.3.1-msvc2013-mtd.7z
os: Visual Studio 2013
environment:
WINFLEXBISON_ARCHIVE: win_flex_bison-2.5.9.zip
WINFLEXBISON_ARCHIVE: win_flex_bison-2.4.5.zip
LLVM_ARCHIVE: llvm-3.3.1-msvc2013-mtd.7z
install:
@@ -48,13 +48,11 @@ install:
- python --version
- python -m pip --version
# Install Mako
- python -m pip install Mako==1.0.6
- python -m pip install --egg Mako
# Install pywin32 extensions, needed by SCons
- python -m pip install pypiwin32
# Install python wheels, necessary to install SCons via pip
- python -m pip install wheel
# Install SCons
- python -m pip install scons==2.5.1
- python -m pip install --egg scons==2.4.1
- scons --version
# Install flex/bison
- if not exist "%WINFLEXBISON_ARCHIVE%" appveyor DownloadFile "https://downloads.sourceforge.net/project/winflexbison/old_versions/%WINFLEXBISON_ARCHIVE%"

View File

@@ -1,4 +1,4 @@
#!/bin/sh
#!/bin/bash
# This script is used to generate the list of fixed bugs that
# appears in the release notes files, with HTML formatting.
@@ -11,6 +11,8 @@
# $ bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3
# $ bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 > bugfixes
# $ bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 | tee bugfixes
# $ DRYRUN=yes bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3
# $ DRYRUN=yes bin/bugzilla_mesa.sh mesa-9.0.2..mesa-9.0.3 | wc -l
# regex pattern: trim before bug number
@@ -19,17 +21,29 @@ trim_before='s/.*show_bug.cgi?id=\([0-9]*\).*/\1/'
# regex pattern: reconstruct the url
use_after='s,^,https://bugs.freedesktop.org/show_bug.cgi?id=,'
echo "<ul>"
echo ""
# extract fdo urls from commit log
git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before | sort -n -u | sed -e $use_after |\
while read url
do
id=$(echo $url | cut -d'=' -f2)
summary=$(wget --quiet -O - $url | grep -e '<title>.*</title>' | sed -e 's/ *<title>[0-9]\+ &ndash; \(.*\)<\/title>/\1/')
echo "<li><a href=\"$url\">Bug $id</a> - $summary</li>"
echo ""
done
urls=$(git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before | sort -n -u | sed -e $use_after)
echo "</ul>"
# if DRYRUN is set to "yes", simply print the URLs and don't fetch the
# details from fdo bugzilla.
#DRYRUN=yes
if [ "x$DRYRUN" = xyes ]; then
for i in $urls
do
echo $i
done
else
echo "<ul>"
echo ""
for i in $urls
do
id=$(echo $i | cut -d'=' -f2)
summary=$(wget --quiet -O - $i | grep -e '<title>.*</title>' | sed -e 's/ *<title>[0-9]\+ &ndash; \(.*\)<\/title>/\1/')
echo "<li><a href=\"$i\">Bug $id</a> - $summary</li>"
echo ""
done
echo "</ul>"
fi

View File

@@ -1,4 +1,4 @@
#!/bin/sh
#!/bin/bash
# Script for generating a list of candidates [referenced by a Fixes tag] for
# cherry-picking to a stable branch
@@ -27,7 +27,7 @@ do
# For each one try to extract the tag
fixes_count=`git show $sha | grep -i "fixes:" | wc -l`
if [ "x$fixes_count" != x1 ] ; then
echo WARNING: Commit $sha has more than one Fixes tag
echo WARNING: Commit $sha has nore than one Fixes tag
fi
fixes=`git show $sha | grep -i "fixes:" | head -n 1`
# The following sed/cut combination is borrowed from GregKH

View File

@@ -1,4 +1,4 @@
#!/bin/sh
#!/bin/bash
# This script is used to generate the list of changes that
# appears in the release notes files, with HTML formatting.
@@ -10,7 +10,7 @@
# $ bin/shortlog_mesa.sh mesa-9.0.2..mesa-9.0.3 | tee changes
in_log=0
typeset -i in_log=0
git shortlog $* | while read l
do

View File

@@ -66,24 +66,19 @@ AC_SUBST([OSMESA_VERSION])
OPENCL_VERSION=1
AC_SUBST([OPENCL_VERSION])
# The idea is that libdrm is distributed as one cohesive package, even
# though it is composed of multiple libraries. However some drivers
# may have different version requirements than others. This list
# codifies which drivers need which version of libdrm. Any libdrm
# version dependencies in non-driver-specific code should be reflected
# in the first entry.
LIBDRM_REQUIRED=2.4.75
LIBDRM_RADEON_REQUIRED=2.4.71
LIBDRM_AMDGPU_REQUIRED=2.4.79
LIBDRM_INTEL_REQUIRED=2.4.75
dnl Versions for external dependencies
LIBDRM_REQUIRED=2.4.66
LIBDRM_RADEON_REQUIRED=2.4.56
LIBDRM_AMDGPU_REQUIRED=2.4.63
LIBDRM_INTEL_REQUIRED=2.4.61
LIBDRM_NVVIEUX_REQUIRED=2.4.66
LIBDRM_NOUVEAU_REQUIRED=2.4.66
LIBDRM_FREEDRENO_REQUIRED=2.4.74
LIBDRM_VC4_REQUIRED=2.4.69
LIBDRM_ETNAVIV_REQUIRED=2.4.80
dnl Versions for external dependencies
DRI2PROTO_REQUIRED=2.8
LIBDRM_ETNAVIV_REQUIRED=2.4.74
DRI2PROTO_REQUIRED=2.6
DRI3PROTO_REQUIRED=1.0
PRESENTPROTO_REQUIRED=1.0
GLPROTO_REQUIRED=1.4.14
LIBOMXIL_BELLAGIO_REQUIRED=0.0
LIBVA_REQUIRED=0.38.0
@@ -92,20 +87,18 @@ WAYLAND_REQUIRED=1.11
XCB_REQUIRED=1.9.3
XCBDRI2_REQUIRED=1.8
XCBGLX_REQUIRED=1.8.1
XDAMAGE_REQUIRED=1.1
XSHMFENCE_REQUIRED=1.1
XVMC_REQUIRED=1.0.6
PYTHON_MAKO_REQUIRED=0.8.0
LIBSENSORS_REQUIRED=4.0.0
ZLIB_REQUIRED=1.2.8
dnl LLVM versions
LLVM_REQUIRED_GALLIUM=3.3.0
LLVM_REQUIRED_OPENCL=3.6.0
LLVM_REQUIRED_R600=3.8.0
LLVM_REQUIRED_RADEONSI=3.8.0
LLVM_REQUIRED_R600=3.6.0
LLVM_REQUIRED_RADEONSI=3.6.0
LLVM_REQUIRED_RADV=3.9.0
LLVM_REQUIRED_SWR=3.9.0
LLVM_REQUIRED_SWR=3.6.0
dnl Check for progs
AC_PROG_CPP
@@ -124,6 +117,7 @@ LT_PREREQ([2.2])
LT_INIT([disable-static])
AC_CHECK_PROG(RM, rm, [rm -f])
AC_CHECK_PROG(XXD, xxd, [xxd])
AX_PROG_BISON([],
AS_IF([test ! -f "$srcdir/src/compiler/glsl/glcpp/glcpp-parse.c"],
@@ -265,7 +259,7 @@ _SAVE_LDFLAGS="$LDFLAGS"
_SAVE_CPPFLAGS="$CPPFLAGS"
dnl Compiler macros
DEFINES="-D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS"
DEFINES="-D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS"
AC_SUBST([DEFINES])
android=no
case "$host_os" in
@@ -303,7 +297,7 @@ if test "x$GCC" = xyes; then
AC_LINK_IFELSE([AC_LANG_PROGRAM()],
AC_MSG_RESULT([yes]),
[CFLAGS="$save_CFLAGS -Wmissing-prototypes";
AC_MSG_RESULT([no])])
AC_MSG_RESULT([no])]);
# Enable -fvisibility=hidden if using a gcc that supports it
save_CFLAGS="$CFLAGS"
@@ -311,7 +305,7 @@ if test "x$GCC" = xyes; then
VISIBILITY_CFLAGS="-fvisibility=hidden"
CFLAGS="$CFLAGS $VISIBILITY_CFLAGS"
AC_LINK_IFELSE([AC_LANG_PROGRAM()], AC_MSG_RESULT([yes]),
[VISIBILITY_CFLAGS=""; AC_MSG_RESULT([no])])
[VISIBILITY_CFLAGS=""; AC_MSG_RESULT([no])]);
# Restore CFLAGS; VISIBILITY_CFLAGS are added to it where needed.
CFLAGS=$save_CFLAGS
@@ -336,7 +330,7 @@ if test "x$GCC" = xyes; then
[MSVC2013_COMPAT_CFLAGS="$MSVC2013_COMPAT_CFLAGS -Werror=vla";
MSVC2013_COMPAT_CXXFLAGS="$MSVC2013_COMPAT_CXXFLAGS -Werror=vla";
AC_MSG_RESULT([yes])],
AC_MSG_RESULT([no]))
AC_MSG_RESULT([no]));
CFLAGS="$save_CFLAGS"
fi
if test "x$GXX" = xyes; then
@@ -349,7 +343,7 @@ if test "x$GXX" = xyes; then
CXXFLAGS="$CXXFLAGS $VISIBILITY_CXXFLAGS"
AC_LANG_PUSH([C++])
AC_LINK_IFELSE([AC_LANG_PROGRAM()], AC_MSG_RESULT([yes]),
[VISIBILITY_CXXFLAGS="" ; AC_MSG_RESULT([no])])
[VISIBILITY_CXXFLAGS="" ; AC_MSG_RESULT([no])]);
AC_LANG_POP([C++])
# Restore CXXFLAGS; VISIBILITY_CXXFLAGS are added to it where needed.
@@ -413,20 +407,6 @@ if test "x$GCC_ATOMIC_BUILTINS_SUPPORTED" = x1; then
fi
AM_CONDITIONAL([GCC_ATOMIC_BUILTINS_SUPPORTED], [test x$GCC_ATOMIC_BUILTINS_SUPPORTED = x1])
dnl Check if host supports 64-bit atomics
dnl note that lack of support usually results in link (not compile) error
AC_MSG_CHECKING(whether __sync_add_and_fetch_8 is supported)
AC_LINK_IFELSE([AC_LANG_SOURCE([[
#include <stdint.h>
uint64_t v;
int main() {
return __sync_add_and_fetch(&v, (uint64_t)1);
}]])], GCC_64BIT_ATOMICS_SUPPORTED=yes, GCC_64BIT_ATOMICS_SUPPORTED=no)
if test "x$GCC_64BIT_ATOMICS_SUPPORTED" != xyes; then
DEFINES="$DEFINES -DMISSING_64BIT_ATOMICS"
fi
AC_MSG_RESULT($GCC_64BIT_ATOMICS_SUPPORTED)
dnl Check for Endianness
AC_C_BIGENDIAN(
little_endian=no,
@@ -455,7 +435,7 @@ int main () {
CFLAGS=$save_CFLAGS
AC_ARG_ENABLE(pwr8,
[AS_HELP_STRING([--disable-pwr8-inst],
[AC_HELP_STRING([--disable-pwr8-inst],
[disable POWER8-specific instructions])],
[enable_pwr8=$enableval], [enable_pwr8=auto])
@@ -513,12 +493,6 @@ AC_ARG_ENABLE([profile],
[enable_profile=no]
)
AC_ARG_ENABLE([sanitize],
[AS_HELP_STRING([--enable-sanitize@<:@=address|undefined@:>@],
[enable code sanitizer @<:@default=disabled@:>@])],
[enable_sanitize="$enableval"],
[enable_sanitize=no])
if test "x$enable_profile" = xyes; then
DEFINES="$DEFINES -DPROFILE"
if test "x$GCC" = xyes; then
@@ -554,20 +528,7 @@ else
DEFINES="$DEFINES -DNDEBUG"
fi
if test "x$enable_sanitize" != xno; then
if test "x$enable_profile" = xyes; then
AC_MSG_WARN([Sanitize and Profile are enabled at the same time])
fi
CFLAGS="$CFLAGS -fsanitize=$enable_sanitize"
CXXFLAGS="$CXXFLAGS -fsanitize=$enable_sanitize"
LDFLAGS="$LDFLAGS -fsanitize=$enable_sanitize"
AC_LINK_IFELSE(
[AC_LANG_SOURCE([int main(){return 0;}])],
[],
[AC_MSG_FAILURE([sanitize flags '$enable_sanitize' not supported])])
fi
DEFAULT_GL_LIB_NAME=GL
dnl
dnl Check if linker supports -Bsymbolic
@@ -609,12 +570,7 @@ case "$host_os" in
openbsd* | darwin* )
LD_NO_UNDEFINED="" ;;
*)
if test "x$enable_sanitize" = xno; then
LD_NO_UNDEFINED="-Wl,--no-undefined"
else
LD_NO_UNDEFINED=""
fi
;;
LD_NO_UNDEFINED="-Wl,--no-undefined" ;;
esac
AC_SUBST([LD_NO_UNDEFINED])
@@ -671,6 +627,23 @@ esac
AM_CONDITIONAL(HAVE_COMPAT_SYMLINKS, test "x$HAVE_COMPAT_SYMLINKS" = xyes)
DEFAULT_GL_LIB_NAME=GL
dnl
dnl Libglvnd configuration
dnl
AC_ARG_ENABLE([libglvnd],
[AS_HELP_STRING([--enable-libglvnd],
[Build for libglvnd @<:@default=disabled@:>@])],
[enable_libglvnd="$enableval"],
[enable_libglvnd=no])
AM_CONDITIONAL(USE_LIBGLVND_GLX, test "x$enable_libglvnd" = xyes)
#AM_COND_IF([USE_LIBGLVND_GLX], [DEFINES="${DEFINES} -DUSE_LIBGLVND_GLX=1"])
if test "x$enable_libglvnd" = xyes ; then
DEFINES="${DEFINES} -DUSE_LIBGLVND_GLX=1"
DEFAULT_GL_LIB_NAME=GLX_mesa
fi
dnl
dnl library names
dnl
@@ -704,6 +677,36 @@ esac
AC_SUBST([LIB_EXT])
AC_ARG_WITH([gl-lib-name],
[AS_HELP_STRING([--with-gl-lib-name@<:@=NAME@:>@],
[specify GL library name @<:@default=GL@:>@])],
[GL_LIB=$withval],
[GL_LIB="$DEFAULT_GL_LIB_NAME"])
AC_ARG_WITH([osmesa-lib-name],
[AS_HELP_STRING([--with-osmesa-lib-name@<:@=NAME@:>@],
[specify OSMesa library name @<:@default=OSMesa@:>@])],
[OSMESA_LIB=$withval],
[OSMESA_LIB=OSMesa])
AS_IF([test "x$GL_LIB" = xyes], [GL_LIB="$DEFAULT_GL_LIB_NAME"])
AS_IF([test "x$OSMESA_LIB" = xyes], [OSMESA_LIB=OSMesa])
dnl
dnl Mangled Mesa support
dnl
AC_ARG_ENABLE([mangling],
[AS_HELP_STRING([--enable-mangling],
[enable mangled symbols and library name @<:@default=disabled@:>@])],
[enable_mangling="${enableval}"],
[enable_mangling=no]
)
if test "x${enable_mangling}" = "xyes" ; then
DEFINES="${DEFINES} -DUSE_MGL_NAMESPACE"
GL_LIB="Mangled${GL_LIB}"
OSMESA_LIB="Mangled${OSMESA_LIB}"
fi
AC_SUBST([GL_LIB])
AC_SUBST([OSMESA_LIB])
dnl
dnl potentially-infringing-but-nobody-knows-for-sure stuff
dnl
@@ -724,7 +727,7 @@ dnl Arch/platform-specific settings
dnl
AC_ARG_ENABLE([asm],
[AS_HELP_STRING([--disable-asm],
[disable assembly usage @<:@default=enabled on supported platforms@:>@])],
[disable assembly usage @<:@default=enabled on supported plaforms@:>@])],
[enable_asm="$enableval"],
[enable_asm=yes]
)
@@ -806,8 +809,6 @@ LIBS="$LIBS $DLOPEN_LIBS"
AC_CHECK_FUNCS([dladdr])
LIBS="$save_LIBS"
AC_CHECK_FUNC([dl_iterate_phdr], [DEFINES="$DEFINES -DHAVE_DL_ITERATE_PHDR"])
case "$host_os" in
darwin*)
;;
@@ -822,9 +823,6 @@ esac
dnl See if posix_memalign is available
AC_CHECK_FUNC([posix_memalign], [DEFINES="$DEFINES -DHAVE_POSIX_MEMALIGN"])
dnl Check for zlib
PKG_CHECK_MODULES([ZLIB], [zlib >= $ZLIB_REQUIRED])
dnl Check for pthreads
AX_PTHREAD
if test "x$ax_pthread_ok" = xno; then
@@ -838,10 +836,9 @@ if test "x$android" = xno; then
test -z "$PTHREAD_LIBS" && PTHREAD_LIBS="-lpthread"
fi
dnl pthread-stubs is mandatory on BSD platforms, due to the nature of the
dnl project. Even then there's a notable issue as described in the project README
dnl pthread-stubs is mandatory on targets where it exists
case "$host_os" in
linux* | cygwin* | darwin* | solaris* | *-gnu* | gnu*)
cygwin* )
pthread_stubs_possible="no"
;;
* )
@@ -850,7 +847,7 @@ linux* | cygwin* | darwin* | solaris* | *-gnu* | gnu*)
esac
if test "x$pthread_stubs_possible" = xyes; then
PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs >= 0.4)
PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs)
AC_SUBST(PTHREADSTUBS_CFLAGS)
AC_SUBST(PTHREADSTUBS_LIBS)
fi
@@ -945,24 +942,25 @@ llvm_add_target() {
# Call this inside ` ` to get the return value.
# $1 is the llvm-config command with arguments.
strip_unwanted_llvm_flags() {
echo " `$1` " | sed -E \
-e 's/[[[:space:]]]+-m[[^[:space:]]]*//g' \
-e 's/[[[:space:]]]+-DNDEBUG[[[:space:]]]/ /g' \
-e 's/[[[:space:]]]+-D_GNU_SOURCE[[[:space:]]]/ /g' \
-e 's/[[[:space:]]]+-pedantic[[[:space:]]]/ /g' \
-e 's/[[[:space:]]]+-W[[^[:space:]]]*//g' \
-e 's/[[[:space:]]]+-O[[^[:space:]]]*//g' \
-e 's/[[[:space:]]]+-g[[^[:space:]]]*//g' \
-e 's/-fno-rtti[[[:space:]]]/-Fno-rtti /g' \
-e 's/[[[:space:]]]+-f[[^[:space:]]]*//g' \
-e 's/-Fno-rtti[[[:space:]]]/-fno-rtti /g' \
-e 's/^[[[:space:]]]//' \
-e 's/[[[:space:]]]$//'
# Use \> (marks the end of the word)
echo " `$1`" | sed \
-e 's/\s\+-m\S*//g' \
-e 's/\s\+-DNDEBUG\>//g' \
-e 's/\s\+-D_GNU_SOURCE\>//g' \
-e 's/\s\+-pedantic\>//g' \
-e 's/\s\+-W\S*//g' \
-e 's/\s\+-O\S*//g' \
-e 's/\s\+-g\S*//g' \
-e 's/-fno-rtti\>/-Fno-rtti/g' \
-e 's/\s\+-f\S*//g' \
-e 's/-Fno-rtti\>/-fno-rtti/g' \
-e 's/^ //'
}
llvm_set_environment_variables() {
if test "x$LLVM_CONFIG" != xno; then
LLVM_VERSION=`$LLVM_CONFIG --version | egrep -o '^[[0-9.]]+'`
LLVM_BINDIR=`$LLVM_CONFIG --bindir`
LLVM_CPPFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cppflags"`
LLVM_INCLUDEDIR=`$LLVM_CONFIG --includedir`
LLVM_LIBDIR=`$LLVM_CONFIG --libdir`
@@ -985,7 +983,11 @@ llvm_set_environment_variables() {
LLVM_VERSION_PATCH=0
fi
LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}"
if test "$LLVM_VERSION_MINOR" -lt 10; then
LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}"
else
LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}${LLVM_VERSION_MINOR}"
fi
FOUND_LLVM=yes
else
@@ -995,8 +997,8 @@ llvm_set_environment_variables() {
}
require_llvm() {
if test "x$enable_llvm" != "xyes"; then
AC_MSG_ERROR([--enable-llvm is required when building $1])
if test "x$enable_gallium_llvm" != "xyes"; then
AC_MSG_ERROR([--enable-gallium-llvm is required when building $1])
fi
}
@@ -1050,43 +1052,24 @@ radeon_llvm_check() {
llvm_add_component "bitreader" $2
llvm_add_component "ipo" $2
NEED_RADEON_LLVM=yes
if test "x$have_libelf" != xyes; then
AC_MSG_ERROR([$2 requires libelf when using llvm])
AC_MSG_ERROR([$1 requires libelf when using llvm])
fi
}
llvm_set_environment_variables
AC_SUBST([MESA_LLVM])
AC_SUBST([LLVM_BINDIR])
AC_SUBST([LLVM_CFLAGS])
AC_SUBST([LLVM_CPPFLAGS])
AC_SUBST([LLVM_CXXFLAGS])
AC_SUBST([LLVM_LIBDIR])
AC_SUBST([LLVM_LIBS])
AC_SUBST([LLVM_LDFLAGS])
AC_SUBST([LLVM_INCLUDEDIR])
dnl
dnl libunwind
dnl
AC_ARG_ENABLE([libunwind],
[AS_HELP_STRING([--enable-libunwind],
[Use libunwind for backtracing (default: auto)])],
[LIBUNWIND="$enableval"],
[LIBUNWIND="auto"])
PKG_CHECK_EXISTS(libunwind, [HAVE_LIBUNWIND=yes], [HAVE_LIBUNWIND=no])
if test "x$LIBUNWIND" = "xauto"; then
LIBUNWIND="$HAVE_LIBUNWIND"
fi
if test "x$LIBUNWIND" = "xyes"; then
PKG_CHECK_MODULES(LIBUNWIND, libunwind)
if test "x$HAVE_LIBUNWIND" != "xyes"; then
AC_MSG_ERROR([libunwind requested but not installed.])
fi
AC_DEFINE(HAVE_LIBUNWIND, 1, [Have libunwind support])
fi
AM_CONDITIONAL(HAVE_LIBUNWIND, [test "x$LIBUNWIND" = xyes])
AC_SUBST([LLVM_VERSION])
dnl Options for APIs
AC_ARG_ENABLE([opengl],
@@ -1245,7 +1228,7 @@ GALLIUM_DRIVERS_DEFAULT="r300,r600,svga,swrast"
AC_ARG_WITH([gallium-drivers],
[AS_HELP_STRING([--with-gallium-drivers@<:@=DIRS...@:>@],
[comma delimited Gallium drivers list, e.g.
"i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,swr,vc4,virgl,etnaviv,imx"
"i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
@<:@default=r300,r600,svga,swrast@:>@])],
[with_gallium_drivers="$withval"],
[with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT"])
@@ -1339,18 +1322,15 @@ AM_CONDITIONAL(HAVE_DRI_GLX, test "x$enable_glx" = xdri)
AM_CONDITIONAL(HAVE_XLIB_GLX, test "x$enable_glx" = xxlib)
AM_CONDITIONAL(HAVE_GALLIUM_XLIB_GLX, test "x$enable_glx" = xgallium-xlib)
DEFAULT_GL_LIB_NAME=GL
dnl
dnl Libglvnd configuration
dnl
AC_ARG_ENABLE([libglvnd],
[AS_HELP_STRING([--enable-libglvnd],
[Build GLX and EGL for libglvnd @<:@default=disabled@:>@])],
[Build for libglvnd @<:@default=disabled@:>@])],
[enable_libglvnd="$enableval"],
[enable_libglvnd=no])
AM_CONDITIONAL(USE_LIBGLVND, test "x$enable_libglvnd" = xyes)
AM_CONDITIONAL(USE_LIBGLVND_GLX, test "x$enable_libglvnd" = xyes)
if test "x$enable_libglvnd" = xyes ; then
dnl XXX: update once we can handle more than libGL/glx.
dnl Namely: we should error out if neither of the glvnd enabled libraries
@@ -1366,44 +1346,11 @@ if test "x$enable_libglvnd" = xyes ; then
;;
esac
PKG_CHECK_MODULES([GLVND], libglvnd >= 0.2.0)
LIBGLVND_DATADIR=`$PKG_CONFIG --variable=datadir libglvnd`
AC_SUBST([LIBGLVND_DATADIR])
DEFINES="${DEFINES} -DUSE_LIBGLVND=1"
PKG_CHECK_MODULES([GLVND], libglvnd >= 0.1.0)
DEFINES="${DEFINES} -DUSE_LIBGLVND_GLX=1"
DEFAULT_GL_LIB_NAME=GLX_mesa
fi
AC_ARG_WITH([gl-lib-name],
[AS_HELP_STRING([--with-gl-lib-name@<:@=NAME@:>@],
[specify GL library name @<:@default=GL@:>@])],
[GL_LIB=$withval],
[GL_LIB="$DEFAULT_GL_LIB_NAME"])
AC_ARG_WITH([osmesa-lib-name],
[AS_HELP_STRING([--with-osmesa-lib-name@<:@=NAME@:>@],
[specify OSMesa library name @<:@default=OSMesa@:>@])],
[OSMESA_LIB=$withval],
[OSMESA_LIB=OSMesa])
AS_IF([test "x$GL_LIB" = xyes], [GL_LIB="$DEFAULT_GL_LIB_NAME"])
AS_IF([test "x$OSMESA_LIB" = xyes], [OSMESA_LIB=OSMesa])
dnl
dnl Mangled Mesa support
dnl
AC_ARG_ENABLE([mangling],
[AS_HELP_STRING([--enable-mangling],
[enable mangled symbols and library name @<:@default=disabled@:>@])],
[enable_mangling="${enableval}"],
[enable_mangling=no]
)
if test "x${enable_mangling}" = "xyes" ; then
DEFINES="${DEFINES} -DUSE_MGL_NAMESPACE"
GL_LIB="Mangled${GL_LIB}"
OSMESA_LIB="Mangled${OSMESA_LIB}"
fi
AC_SUBST([GL_LIB])
AC_SUBST([OSMESA_LIB])
# Check for libdrm
PKG_CHECK_MODULES([LIBDRM], [libdrm >= $LIBDRM_REQUIRED],
[have_libdrm=yes], [have_libdrm=no])
@@ -1532,7 +1479,7 @@ xdri)
# DRI-based GLX
# find the DRI deps for libGL
dri_modules="x11 xext xdamage >= $XDAMAGE_REQUIRED xfixes x11-xcb xcb xcb-glx >= $XCBGLX_REQUIRED"
dri_modules="x11 xext xdamage xfixes x11-xcb xcb xcb-glx >= $XCBGLX_REQUIRED"
if test x"$driglx_direct" = xyes; then
if test x"$dri_platform" = xdrm ; then
@@ -1541,6 +1488,11 @@ xdri)
PKG_CHECK_MODULES([DRI2PROTO], [dri2proto >= $DRI2PROTO_REQUIRED])
GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV libdrm >= $LIBDRM_REQUIRED"
if test x"$enable_dri3" = xyes; then
PKG_CHECK_MODULES([DRI3PROTO], [dri3proto >= $DRI3PROTO_REQUIRED])
PKG_CHECK_MODULES([PRESENTPROTO], [presentproto >= $PRESENTPROTO_REQUIRED])
fi
if test x"$enable_dri" = xyes; then
dri_modules="$dri_modules xcb-dri2 >= $XCBDRI2_REQUIRED"
fi
@@ -1659,7 +1611,7 @@ dnl Which drivers to build - default is chosen by platform
AC_ARG_WITH([dri-drivers],
[AS_HELP_STRING([--with-dri-drivers@<:@=DIRS...@:>@],
[comma delimited classic DRI drivers list, e.g.
"i915,i965,nouveau,radeon,r200,swrast" @<:@default=auto@:>@])],
"swrast,i965,radeon" @<:@default=auto@:>@])],
[with_dri_drivers="$withval"],
[with_dri_drivers=auto])
@@ -1738,32 +1690,27 @@ if test -n "$with_dri_drivers"; then
DRI_DIRS="$DRI_DIRS $driver"
case "x$driver" in
xi915)
require_libdrm "i915"
HAVE_I915_DRI=yes
PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
HAVE_I915_DRI=yes;
PKG_CHECK_MODULES([INTEL], [libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
;;
xi965)
require_libdrm "i965"
HAVE_I965_DRI=yes
PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
HAVE_I965_DRI=yes;
PKG_CHECK_MODULES([INTEL], [libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
;;
xnouveau)
require_libdrm "nouveau"
HAVE_NOUVEAU_DRI=yes
PKG_CHECK_MODULES([NVVIEUX], [libdrm >= $LIBDRM_NVVIEUX_REQUIRED libdrm_nouveau >= $LIBDRM_NVVIEUX_REQUIRED])
HAVE_NOUVEAU_DRI=yes;
PKG_CHECK_MODULES([NVVIEUX], [libdrm_nouveau >= $LIBDRM_NVVIEUX_REQUIRED])
;;
xradeon)
require_libdrm "radeon"
HAVE_RADEON_DRI=yes;
PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
;;
xr200)
require_libdrm "r200"
HAVE_R200_DRI=yes
PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
HAVE_R200_DRI=yes;
PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
;;
xswrast)
HAVE_SWRAST_DRI=yes
HAVE_SWRAST_DRI=yes;
;;
*)
AC_MSG_ERROR([classic DRI driver '$driver' does not exist])
@@ -1776,41 +1723,30 @@ fi
dnl
dnl Gallium LLVM
dnl Deprecated: kept for backwards compatibility
dnl
dnl With follow-up commits we'll rework --enable-gallium-llvm to --enable-llvm
dnl Since that is too invasive to stable, do the more conservative thing for now
dnl and consider it as a global LLVM toggle.
dnl
AC_ARG_ENABLE([gallium-llvm],
[AS_HELP_STRING([--enable-gallium-llvm],
[DEPRECATED: use --enable-llvm instead])],
[build gallium LLVM support @<:@default=enabled on x86/x86_64@:>@])],
[enable_gallium_llvm="$enableval"],
[enable_gallium_llvm=auto])
if test "x$enable_gallium_llvm" != xauto; then
AC_MSG_WARN([The --enable-gallium-llvm option has been deprecated. Use --enable-llvm instead.])
enable_llvm=$enable_gallium_llvm
fi
dnl
dnl LLVM
dnl
AC_ARG_ENABLE([llvm],
[AS_HELP_STRING([--enable-llvm],
[build with LLVM support @<:@default=enabled on x86/x86_64@:>@])],
[enable_llvm="$enableval"],
[enable_llvm=auto])
if test "x$enable_llvm" = xauto -a "x$FOUND_LLVM" = xyes; then
if test "x$enable_gallium_llvm" = xauto; then
if test "x$FOUND_LLVM" = xyes; then
case "$host_cpu" in
i*86|x86_64|amd64) enable_llvm=yes;;
*) enable_llvm=no;;
i*86|x86_64|amd64) enable_gallium_llvm=yes;;
*) enable_gallium_llvm=no;;
esac
else
enable_llvm=no
enable_gallium_llvm=no
fi
fi
if test "x$enable_llvm" = xyes -a "x$FOUND_LLVM" = xno; then
AC_MSG_ERROR([--enable-llvm selected but llvm-config is not found])
if test "x$enable_gallium_llvm" = xyes -a "x$FOUND_LLVM" = xno; then
AC_MSG_ERROR([--enable-gallium-llvm selected but llvm-config is not found])
fi
#
@@ -1840,23 +1776,20 @@ AC_ARG_WITH([vulkan-icddir],
AC_SUBST([VULKAN_ICD_INSTALL_DIR])
if test -n "$with_vulkan_drivers"; then
if test "x$ac_cv_func_dl_iterate_phdr" = xno; then
AC_MSG_ERROR([Vulkan drivers require the dl_iterate_phdr function])
fi
VULKAN_DRIVERS=`IFS=', '; echo $with_vulkan_drivers`
for driver in $VULKAN_DRIVERS; do
case "x$driver" in
xintel)
require_libdrm "ANV"
PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
HAVE_INTEL_VULKAN=yes
if test "x$HAVE_I965_DRI" != xyes; then
AC_MSG_ERROR([Intel Vulkan driver requires the i965 dri driver])
fi
HAVE_INTEL_VULKAN=yes;
;;
xradeon)
require_libdrm "radv"
PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
PKG_CHECK_MODULES([AMDGPU], [libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
radeon_llvm_check $LLVM_REQUIRED_RADV "radv"
HAVE_RADEON_VULKAN=yes
HAVE_RADEON_VULKAN=yes;
;;
*)
AC_MSG_ERROR([Vulkan driver '$driver' does not exist])
@@ -2097,20 +2030,6 @@ if test "x$enable_opencl" = xyes; then
AC_MSG_ERROR([Clover requires libelf])
fi
if test "x${ac_cv_cxx_compiler_gnu}" = xyes; then
altivec_enabled=no
AC_COMPILE_IFELSE([AC_LANG_SOURCE([
#if !defined(__VEC__) || !defined(__ALTIVEC__)
#error "AltiVec not enabled"
#endif
])], altivec_enabled=yes)
if test "$altivec_enabled" = yes; then
CLOVER_STD_OVERRIDE="-std=gnu++11"
fi
AC_SUBST([CLOVER_STD_OVERRIDE])
fi
llvm_require_version $LLVM_REQUIRED_OPENCL "opencl"
llvm_add_default_components "opencl"
@@ -2142,16 +2061,14 @@ dnl
AM_CONDITIONAL(HAVE_GALLIUM, test -n "$with_gallium_drivers")
dnl
dnl DEPRECATED: EGL Platforms configuration
dnl EGL Platforms configuration
dnl
AC_ARG_WITH([egl-platforms],
[AS_HELP_STRING([--with-egl-platforms@<:@=DIRS...@:>@],
[DEPRECATED: use --with-platforms instead@<:@default=auto@:>@])],
[comma delimited native platforms libEGL supports, e.g.
"x11,drm" @<:@default=auto@:>@])],
[with_egl_platforms="$withval"],
[with_egl_platforms=auto])
if test "x$with_egl_platforms" = xauto; then
if test "x$enable_egl" = xyes; then
[if test "x$enable_egl" = xyes; then
if test "x$enable_gbm" = xyes; then
with_egl_platforms="x11,drm"
else
@@ -2159,31 +2076,17 @@ if test "x$with_egl_platforms" = xauto; then
fi
else
with_egl_platforms=""
fi
else
AC_MSG_WARN([--with-egl-platforms is deprecated. Use --with-platforms instead.])
fi
fi])
dnl
dnl Platforms configuration
dnl
AC_ARG_WITH([platforms],
[AS_HELP_STRING([--with-platforms@<:@=DIRS...@:>@],
[comma delimited native platforms libEGL/Vulkan/other supports, e.g.
"x11,drm,wayland,surfaceless..." @<:@default=auto@:>@])],
[with_platforms="$withval"],
[with_platforms=auto])
# For the time being, we still reuse the EGL named variables/defines.
if test "x$with_platforms" != xauto; then
with_egl_platforms=$with_platforms
if test "x$with_egl_platforms" != "x" -a "x$enable_egl" != xyes; then
AC_MSG_ERROR([cannot build egl state tracker without EGL library])
fi
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
WAYLAND_SCANNER='')
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner])
fi
# Do per-EGL platform setups and checks
@@ -2194,7 +2097,7 @@ for plat in $egl_platforms; do
PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED])
if test "x$WAYLAND_SCANNER" = "x:"; then
if test "x$WAYLAND_SCANNER" = x; then
AC_MSG_ERROR([wayland-scanner is needed to compile the wayland egl platform])
fi
;;
@@ -2279,8 +2182,7 @@ AC_ARG_WITH([omx-libdir],
[AS_HELP_STRING([--with-omx-libdir=DIR],
[directory for the OMX libraries])],
[OMX_LIB_INSTALL_DIR="$withval"],
[OMX_LIB_INSTALL_DIR=`$PKG_CONFIG --exists libomxil-bellagio && \
$PKG_CONFIG --define-variable=libdir=\$libdir --variable=pluginsdir libomxil-bellagio`])
[OMX_LIB_INSTALL_DIR=`$PKG_CONFIG --define-variable=libdir=\$libdir --variable=pluginsdir libomxil-bellagio`])
AC_SUBST([OMX_LIB_INSTALL_DIR])
dnl Directory for VA libs
@@ -2322,13 +2224,20 @@ require_basic_egl() {
;;
*)
AC_MSG_ERROR([$1 requires one of these:
1) --with-platforms=drm (X, Wayland, offscreen rendering based on DRM)
2) --with-platforms=surfaceless (offscreen only)
1) --with-egl-platforms=drm (X, Wayland, offscreen rendering based on DRM)
2) --with-egl-platforms=surfaceless (offscreen only)
Recommended options: drm,x11])
;;
esac
}
radeon_gallium_llvm_check() {
if test "x$enable_gallium_llvm" != "xyes"; then
AC_MSG_ERROR([--enable-gallium-llvm is required when building $2])
fi
radeon_llvm_check $*
}
swr_require_cxx_feature_flags() {
feature_name="$1"
preprocessor_test="$2"
@@ -2379,21 +2288,26 @@ if test -n "$with_gallium_drivers"; then
;;
xi915)
HAVE_GALLIUM_I915=yes
PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
PKG_CHECK_MODULES([INTEL], [libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
require_libdrm "Gallium i915"
;;
xilo)
HAVE_GALLIUM_ILO=yes
PKG_CHECK_MODULES([INTEL], [libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
require_libdrm "Gallium i965/ilo"
;;
xr300)
HAVE_GALLIUM_R300=yes
PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
require_libdrm "r300"
r300_require_llvm "r300"
;;
xr600)
HAVE_GALLIUM_R600=yes
PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
require_libdrm "r600"
if test "x$enable_llvm" = xyes; then
radeon_llvm_check $LLVM_REQUIRED_R600 "r600"
if test "x$enable_opencl" = xyes; then
radeon_gallium_llvm_check $LLVM_REQUIRED_R600 "r600"
llvm_add_component "asmparser" "r600"
llvm_add_component "bitreader" "r600"
@@ -2401,27 +2315,27 @@ if test -n "$with_gallium_drivers"; then
;;
xradeonsi)
HAVE_GALLIUM_RADEONSI=yes
PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([AMDGPU], [libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
require_libdrm "radeonsi"
radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
radeon_gallium_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
if test "x$enable_egl" = xyes; then
require_basic_egl "radeonsi"
fi
;;
xnouveau)
HAVE_GALLIUM_NOUVEAU=yes
PKG_CHECK_MODULES([NOUVEAU], [libdrm >= $LIBDRM_NOUVEAU_REQUIRED libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
PKG_CHECK_MODULES([NOUVEAU], [libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
require_libdrm "nouveau"
;;
xfreedreno)
HAVE_GALLIUM_FREEDRENO=yes
PKG_CHECK_MODULES([FREEDRENO], [libdrm >= $LIBDRM_FREEDRENO_REQUIRED libdrm_freedreno >= $LIBDRM_FREEDRENO_REQUIRED])
PKG_CHECK_MODULES([FREEDRENO], [libdrm_freedreno >= $LIBDRM_FREEDRENO_REQUIRED])
require_libdrm "freedreno"
;;
xetnaviv)
HAVE_GALLIUM_ETNAVIV=yes
PKG_CHECK_MODULES([ETNAVIV], [libdrm >= $LIBDRM_ETNAVIV_REQUIRED libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED])
PKG_CHECK_MODULES([ETNAVIV], [libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED])
require_libdrm "etnaviv"
;;
ximx)
@@ -2429,17 +2343,17 @@ if test -n "$with_gallium_drivers"; then
;;
xswrast)
HAVE_GALLIUM_SOFTPIPE=yes
if test "x$enable_llvm" = xyes; then
if test "x$enable_gallium_llvm" = xyes; then
HAVE_GALLIUM_LLVMPIPE=yes
fi
;;
xswr)
llvm_require_version $LLVM_REQUIRED_SWR "swr"
swr_require_cxx_feature_flags "C++14" "__cplusplus >= 201402L" \
"-std=c++14" \
SWR_CXX14_CXXFLAGS
AC_SUBST([SWR_CXX14_CXXFLAGS])
swr_require_cxx_feature_flags "C++11" "__cplusplus >= 201103L" \
",-std=c++11" \
SWR_CXX11_CXXFLAGS
AC_SUBST([SWR_CXX11_CXXFLAGS])
swr_require_cxx_feature_flags "AVX" "defined(__AVX__)" \
",-mavx,-march=core-avx" \
@@ -2455,7 +2369,7 @@ if test -n "$with_gallium_drivers"; then
;;
xvc4)
HAVE_GALLIUM_VC4=yes
PKG_CHECK_MODULES([VC4], [libdrm >= $LIBDRM_VC4_REQUIRED libdrm_vc4 >= $LIBDRM_VC4_REQUIRED])
PKG_CHECK_MODULES([VC4], [libdrm_vc4 >= $LIBDRM_VC4_REQUIRED])
require_libdrm "vc4"
PKG_CHECK_MODULES([SIMPENROSE], [simpenrose],
@@ -2466,9 +2380,7 @@ if test -n "$with_gallium_drivers"; then
xvirgl)
HAVE_GALLIUM_VIRGL=yes
require_libdrm "virgl"
if test "x$enable_egl" = xyes; then
require_basic_egl "virgl"
fi
require_basic_egl "virgl"
;;
*)
AC_MSG_ERROR([Unknown Gallium driver: $driver])
@@ -2477,21 +2389,21 @@ if test -n "$with_gallium_drivers"; then
done
fi
if test "x$enable_llvm" = "xyes" -a "$with_gallium_drivers"; then
if test "x$enable_gallium_llvm" == "xyes" -a "$with_gallium_drivers"; then
llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium"
llvm_add_default_components "gallium"
fi
dnl We need to validate some needed dependencies for renderonly drivers.
if test "x$HAVE_GALLIUM_ETNAVIV" != xyes -a "x$HAVE_GALLIUM_IMX" = xyes ; then
AC_MSG_ERROR([Building with imx requires etnaviv])
if test "x$HAVE_GALLIUM_ETNAVIV" != xyes -a "x$HAVE_GALLIUM_IMX" == xyes ; then
AC_ERROR([Building with imx requires etnaviv])
fi
dnl
dnl Set defines and buildtime variables only when using LLVM.
dnl
if test "x$enable_llvm" = xyes; then
if test "x$enable_gallium_llvm" = xyes; then
DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DMESA_LLVM_VERSION_PATCH=$LLVM_VERSION_PATCH"
LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags`
@@ -2552,6 +2464,7 @@ fi
AM_CONDITIONAL(HAVE_GALLIUM_SVGA, test "x$HAVE_GALLIUM_SVGA" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_I915, test "x$HAVE_GALLIUM_I915" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_ILO, test "x$HAVE_GALLIUM_ILO" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_R300, test "x$HAVE_GALLIUM_R300" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_R600, test "x$HAVE_GALLIUM_R600" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_RADEONSI, test "x$HAVE_GALLIUM_RADEONSI" = xyes)
@@ -2602,9 +2515,13 @@ AM_CONDITIONAL(NEED_RADEON_DRM_WINSYS, test "x$HAVE_GALLIUM_R300" = xyes -o \
"x$HAVE_GALLIUM_R600" = xyes -o \
"x$HAVE_GALLIUM_RADEONSI" = xyes)
AM_CONDITIONAL(NEED_WINSYS_XLIB, test "x$enable_glx" = xgallium-xlib)
AM_CONDITIONAL(NEED_RADEON_LLVM, test x$NEED_RADEON_LLVM = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_COMPUTE, test x$enable_opencl = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_LLVM, test "x$enable_llvm" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_LLVM, test "x$enable_gallium_llvm" = xyes)
AM_CONDITIONAL(USE_VC4_SIMULATOR, test x$USE_VC4_SIMULATOR = xyes)
if test "x$USE_VC4_SIMULATOR" = xyes -a "x$HAVE_GALLIUM_ILO" = xyes; then
AC_MSG_ERROR([VC4 simulator on x86 replaces i965 driver build, so ilo must be disabled.])
fi
AM_CONDITIONAL(HAVE_LIBDRM, test "x$have_libdrm" = xyes)
AM_CONDITIONAL(HAVE_OSMESA, test "x$enable_osmesa" = xyes)
@@ -2624,10 +2541,8 @@ AC_SUBST([NINE_VERSION], "$NINE_MAJOR.$NINE_MINOR.$NINE_TINY")
AC_SUBST([VDPAU_MAJOR], 1)
AC_SUBST([VDPAU_MINOR], 0)
if test "x$enable_va" = xyes; then
VA_MAJOR=`$PKG_CONFIG --modversion libva | $SED -n 's/\([[^\.]]*\)\..*$/\1/p'`
VA_MINOR=`$PKG_CONFIG --modversion libva | $SED -n 's/.*\.\(.*\)\..*$/\1/p'`
fi
VA_MAJOR=`$PKG_CONFIG --modversion libva | $SED -n 's/\([[^\.]]*\)\..*$/\1/p'`
VA_MINOR=`$PKG_CONFIG --modversion libva | $SED -n 's/.*\.\(.*\)\..*$/\1/p'`
AC_SUBST([VA_MAJOR], $VA_MAJOR)
AC_SUBST([VA_MINOR], $VA_MINOR)
@@ -2698,6 +2613,7 @@ AC_CONFIG_FILES([Makefile
src/gallium/drivers/freedreno/Makefile
src/gallium/drivers/ddebug/Makefile
src/gallium/drivers/i915/Makefile
src/gallium/drivers/ilo/Makefile
src/gallium/drivers/llvmpipe/Makefile
src/gallium/drivers/noop/Makefile
src/gallium/drivers/nouveau/Makefile
@@ -2745,6 +2661,7 @@ AC_CONFIG_FILES([Makefile
src/gallium/winsys/imx/drm/Makefile
src/gallium/winsys/freedreno/drm/Makefile
src/gallium/winsys/i915/drm/Makefile
src/gallium/winsys/intel/drm/Makefile
src/gallium/winsys/nouveau/drm/Makefile
src/gallium/winsys/radeon/drm/Makefile
src/gallium/winsys/amdgpu/drm/Makefile
@@ -2766,6 +2683,8 @@ AC_CONFIG_FILES([Makefile
src/glx/windows/windowsdriproto.pc
src/gtest/Makefile
src/intel/Makefile
src/intel/tools/Makefile
src/intel/vulkan/Makefile
src/loader/Makefile
src/mapi/Makefile
src/mapi/es1api/glesv1_cm.pc
@@ -2789,7 +2708,7 @@ AC_CONFIG_FILES([Makefile
src/mesa/main/tests/Makefile
src/util/Makefile
src/util/tests/hash_table/Makefile
src/vulkan/Makefile])
src/vulkan/wsi/Makefile])
AC_OUTPUT
@@ -2855,6 +2774,7 @@ dnl EGL
echo ""
echo " EGL: $enable_egl"
if test "$enable_egl" = yes; then
echo " EGL platforms: $egl_platforms"
egl_drivers=""
if test "x$enable_dri" != "xno"; then
@@ -2872,8 +2792,6 @@ else
echo " GBM: no"
fi
echo " EGL/Vulkan/VL platforms: $egl_platforms"
# Vulkan
echo ""
if test "x$VULKAN_DRIVERS" != x; then
@@ -2884,7 +2802,7 @@ else
fi
echo ""
if test "x$enable_llvm" = xyes; then
if test "x$enable_gallium_llvm" = xyes; then
echo " llvm: yes"
echo " llvm-config: $LLVM_CONFIG"
echo " llvm-version: $LLVM_VERSION"
@@ -2931,7 +2849,7 @@ echo " CFLAGS: $cflags"
echo " CXXFLAGS: $cxxflags"
echo " Macros: $defines"
echo ""
if test "x$enable_llvm" = xyes; then
if test "x$enable_gallium_llvm" = xyes; then
echo " LLVM_CFLAGS: $LLVM_CFLAGS"
echo " LLVM_CXXFLAGS: $LLVM_CXXFLAGS"
echo " LLVM_CPPFLAGS: $LLVM_CPPFLAGS"

View File

@@ -39,7 +39,7 @@ steps that work as of this writing.
get pywin32-218.4.win-amd64-py2.7.exe
- install git
- download mesa from git
see https://www.mesa3d.org/repository.html
see http://www.mesa3d.org/repository.html
- run scons
General

View File

@@ -33,7 +33,7 @@ without a depth buffer.
<p>
Mesa 9.1.2 and later (will) support a DRI configuration option to work around
this issue.
Using the <a href="https://dri.freedesktop.org/wiki/DriConf">driconf</a> tool,
Using the <a href="http://dri.freedesktop.org/wiki/DriConf">driconf</a> tool,
set the "Create all visuals with a depth buffer" option before running Topogun.
Then, all GLX visuals will be created with a depth buffer.
</p>

View File

@@ -118,7 +118,7 @@ directories. For example, <code>LDFLAGS="-L/usr/X11R6/lib"</code>.</p>
<dt><code>PKG_CONFIG_PATH</code></dt>
<dd><p>The
<code>pkg-config</code> utility is a hard requirement for configuring and
<code>pkg-config</code> utility is a hard requirement for cofiguring and
building mesa. It is used to search for external libraries
on the system. This environment variable is used to control the search
path for <code>pkg-config</code>. For instance, setting
@@ -137,7 +137,7 @@ There are also a few general options for altering the Mesa build:
hasn't already set them via the CFLAGS/CXXFLAGS) and macros to aid in
debugging the Mesa libraries.</p>
<p>Note that enabling this option can lead to noticeable loss of performance.</p>
<p>Note that enabling this option can lead to noticable loss of performance.</p>
<dt><code>--disable-asm</code></dt>
<dd><p>There are assembly routines

View File

@@ -18,7 +18,7 @@
<p>
The Mesa bug database is hosted on
<a href="https://freedesktop.org">freedesktop.org</a>.
<a href="http://freedesktop.org">freedesktop.org</a>.
The old bug database on SourceForge is no longer used.
</p>

View File

@@ -58,7 +58,7 @@ and not <tt>a=b+c;</tt>
<li>Use comments wherever you think it would be helpful for other developers.
Several specific cases and style examples follow. Note that we roughly
follow <a href="https://www.stack.nl/~dimitri/doxygen/">Doxygen</a> conventions.
follow <a href="http://www.stack.nl/~dimitri/doxygen/">Doxygen</a> conventions.
<br>
<br>
Single-line comments:
@@ -120,7 +120,7 @@ the opening brace goes on the next line by itself (see above.)
_mesa_foo_bar() - an internal non-static Mesa function
</pre>
<li>Constants, macros and enum names are ALL_UPPERCASE, with _ between
<li>Constants, macros and enumerant names are ALL_UPPERCASE, with _ between
words.
<li>Mesa usually uses camel case for local variables (Ex: "localVarname")
while gallium typically uses underscores (Ex: "local_var_name").

View File

@@ -53,7 +53,7 @@
<li><a href="lists.html" target="_parent">Mailing Lists</a>
<li><a href="bugs.html" target="_parent">Bug Database</a>
<li><a href="webmaster.html" target="_parent">Webmaster</a>
<li><a href="https://dri.freedesktop.org/" target="_parent">Mesa/DRI Wiki</a>
<li><a href="http://dri.freedesktop.org/" target="_parent">Mesa/DRI Wiki</a>
</ul>
<b>User Topics</b>
@@ -83,23 +83,23 @@
<li><a href="devinfo.html" target="_parent">Development Notes</a>
<li><a href="codingstyle.html" target="_parent">Coding Style</a>
<li><a href="submittingpatches.html" target="_parent">Submitting patches</a>
<li><a href="releasing.html" target="_parent">Releasing process</a>
<li><a href="sourcedocs.html" target="_parent">Source Documentation</a>
<li><a href="dispatch.html" target="_parent">GL Dispatch</a>
</ul>
<b>Links</b>
<ul>
<li><a href="https://www.opengl.org" target="_parent">OpenGL website</a>
<li><a href="https://dri.freedesktop.org" target="_parent">DRI website</a>
<li><a href="https://www.freedesktop.org" target="_parent">freedesktop.org</a>
<li><a href="https://planet.freedesktop.org" target="_parent">Developer blogs</a>
<li><a href="http://www.opengl.org" target="_parent">OpenGL website</a>
<li><a href="http://dri.freedesktop.org" target="_parent">DRI website</a>
<li><a href="http://www.freedesktop.org" target="_parent">freedesktop.org</a>
<li><a href="http://planet.freedesktop.org" target="_parent">Developer blogs</a>
</ul>
<b>Hosted by:</b>
<br>
<blockquote>
<a href="https://freedesktop.org" target="_parent">freedesktop.org</a>
<a href="http://sourceforge.net"
target="_parent">sourceforge.net</a>
</blockquote>
</body>

View File

@@ -20,7 +20,7 @@
Both professional and volunteer developers contribute to Mesa.
</p>
<p>
<a href="https://www.vmware.com/">VMware</a>
<a href="http://www.vmware.com/">VMware</a>
employs several of the main Mesa developers including Brian Paul
and Keith Whitwell.
</p>
@@ -44,7 +44,7 @@ Intel has recently contributed the new GLSL compiler in Mesa 7.9.
</p>
<p>
<a href="https://www.lunarg.com/">LunarG</a> can be contacted
<a href="http://www.lunarg.com/">LunarG</a> can be contacted
for custom Mesa / 3D graphics development.
</p>

View File

@@ -23,37 +23,44 @@ or <a href="https://mesa.freedesktop.org/archive/">mesa.freedesktop.org</a>
(HTTP).
</p>
<p>
Starting with the first release of 2017, Mesa's version scheme is
year-based. Filenames are in the form <tt>mesa-Y.N.P.tar.gz</tt>, where
<tt>Y</tt> is the year (two digits), <tt>N</tt> is an incremental number
(starting at 0) and <tt>P</tt> is the patch number (0 for the first
release, 1 for the first patch after that).
</p>
<p>
When a new release is coming, release candidates (betas) may be found
in the same directory, and are recognisable by the
<tt>mesa-Y.N.P-<b>rc</b>X.tar.gz</tt> filename.
<a href="ftp://ftp.freedesktop.org/pub/mesa/beta/">here</a>.
</p>
<h1>Unpacking</h1>
<p>
Mesa releases are available in two formats: <tt>.tar.xz</tt> and <tt>.tar.gz</tt>.
Mesa releases are available in three formats: .tar.bz2, .tar.gz, and .zip
</p>
<p>
To unpack the tarball:
To unpack .tar.gz files:
</p>
<pre>
tar xf mesa-Y.N.P.tar.xz
tar zxf MesaLib-x.y.z.tar.gz
</pre>
or
<pre>
tar xf mesa-Y.N.P.tar.gz
gzcat MesaLib-x.y.z.tar.gz | tar xf -
</pre>
or
<pre>
gunzip MesaLib-x.y.z.tar.gz ; tar xf MesaLib-x.y.z.tar
</pre>
<p>
To unpack .tar.bz2 files:
</p>
<pre>
bunzip2 -c MesaLib-x.y.z.tar.gz | tar xf -
</pre>
<p>
To unpack .zip files:
</p>
<pre>
unzip MesaLib-x.y.z.zip
</pre>
<h1>Contents</h1>
@@ -62,8 +69,8 @@ or
After unpacking you'll have these files and directories (among others):
</p>
<pre>
autogen.sh - Autoconf script for *nix systems
scons/ - SCons script for Windows builds
Makefile - top-level Makefile for most systems
configs/ - makefile parameter files for various systems
include/ - GL header (include) files
bin/ - shell scripts for making shared libraries, etc
docs/ - documentation
@@ -102,9 +109,9 @@ In the past, GLUT, GLU and the Mesa demos were released in conjunction with
Mesa releases. But since GLUT, GLU and the demos change infrequently, they
were split off into their own git repositories:
<a href="https://cgit.freedesktop.org/mesa/glut/">GLUT</a>,
<a href="https://cgit.freedesktop.org/mesa/glu/">GLU</a> and
<a href="https://cgit.freedesktop.org/mesa/demos/">Demos</a>,
<a href="http://cgit.freedesktop.org/mesa/glut/">GLUT</a>,
<a href="http://cgit.freedesktop.org/mesa/glu/">GLU</a> and
<a href="http://cgit.freedesktop.org/mesa/demos/">Demos</a>,
</p>
</div>

View File

@@ -18,8 +18,8 @@
<p>The current version of EGL in Mesa implements EGL 1.4. More information
about EGL can be found at
<a href="https://www.khronos.org/egl/">
https://www.khronos.org/egl/</a>.</p>
<a href="http://www.khronos.org/egl/">
http://www.khronos.org/egl/</a>.</p>
<p>The Mesa's implementation of EGL uses a driver architecture. The main
library (<code>libEGL</code>) is window system neutral. It provides the EGL
@@ -44,7 +44,7 @@ the driver for your hardware. For example</p>
<p>The main library and OpenGL is enabled by default. The first two options
above enables <a href="opengles.html">OpenGL ES 1.x and 2.x</a>. The last two
options enables the listed classic and Gallium drivers respectively.</p>
options enables the listed classic and and Gallium drivers respectively.</p>
</li>
@@ -83,9 +83,9 @@ drivers will be installed to <code>${libdir}/egl</code>.</p>
<p>List the platforms (window systems) to support. Its argument is a comma
separated string such as <code>--with-egl-platforms=x11,drm</code>. It decides
the platforms a driver may support. The first listed platform is also used by
the main library to decide the native platform: this defines EGL native
the main library to decide the native platform: the platform the EGL native
types such as <code>EGLNativeDisplayType</code> or
<code>EGLNativeWindowType</code>.</p>
<code>EGLNativeWindowType</code> defined for.</p>
<p>The available platforms are <code>x11</code>, <code>drm</code>,
<code>wayland</code>, <code>surfaceless</code>, <code>android</code>,

View File

@@ -114,20 +114,6 @@ glGetString(GL_VERSION) for OpenGL ES.
glGetString(GL_SHADING_LANGUAGE_VERSION). Valid values are integers, such as
"130". Mesa will not really implement all the features of the given language version
if it's higher than what's normally reported. (for developers only)
<li>MESA_GLSL_CACHE_DISABLE - if set, disables the GLSL shader cache
<li>MESA_GLSL_CACHE_MAX_SIZE - if set, determines the maximum size of
the on-disk cache of compiled GLSL programs. Should be set to a number
optionally followed by 'K', 'M', or 'G' to specify a size in
kilobytes, megabytes, or gigabytes. By default, gigabytes will be
assumed. And if unset, a maximum size of 1GB will be used. Note: A separate
cache might be created for each architecture that Mesa is installed for on
your system. For example under the default settings you may end up with a 1GB
cache for x86_64 and another 1GB cache for i386.
<li>MESA_GLSL_CACHE_DIR - if set, determines the directory to be used
for the on-disk cache of compiled GLSL programs. If this variable is
not set, then the cache will be stored in $XDG_CACHE_HOME/mesa (if
that variable is set), or else within .cache/mesa within the user's
home directory.
<li>MESA_GLSL - <a href="shading.html#envvars">shading language compiler options</a>
<li>MESA_NO_MINMAX_CACHE - when set, the minmax index cache is globally disabled.
</ul>
@@ -160,7 +146,6 @@ See the <a href="xlibdriver.html">Xlib software driver page</a> for details.
This is useful for debugging hangs, etc.</li>
<li>INTEL_DEBUG - a comma-separated list of named flags, which do various things:
<ul>
<li>color - use color in output</li>
<li>tex - emit messages about textures.</li>
<li>state - emit messages about state flag tracking</li>
<li>blit - emit messages about blit operations</li>

View File

@@ -41,7 +41,7 @@ Last updated: 9 October 2012
<p>
Mesa is an open-source implementation of the OpenGL specification.
OpenGL is a programming library for writing interactive 3D applications.
See the <a href="https://www.opengl.org/">OpenGL website</a> for more
See the <a href="http://www.opengl.org/">OpenGL website</a> for more
information.
</p>
<p>
@@ -55,13 +55,13 @@ Yes. Specifically, Mesa serves as the OpenGL core for the open-source DRI
drivers for X.org.
</p>
<ul>
<li>See the <a href="https://dri.freedesktop.org/">DRI website</a>
<li>See the <a href="http://dri.freedesktop.org/">DRI website</a>
for more information.</li>
<li>See <a href="https://01.org/linuxgraphics">01.org</a>
for more information about Intel drivers.</li>
<li>See <a href="https://nouveau.freedesktop.org">nouveau.freedesktop.org</a>
<li>See <a href="http://nouveau.freedesktop.org">nouveau.freedesktop.org</a>
for more information about Nouveau drivers.</li>
<li>See <a href="https://www.x.org/wiki/RadeonFeature">www.x.org/wiki/RadeonFeature</a>
<li>See <a href="http://www.x.org/wiki/RadeonFeature">www.x.org/wiki/RadeonFeature</a>
for more information about Radeon drivers.</li>
</ul>
@@ -144,7 +144,7 @@ Mesa is much more up to date with modern features and extensions.
</p>
<p>
<a href="https://sourceforge.net/projects/ogl-es/">Vincent</a> is
<a href="http://sourceforge.net/projects/ogl-es/">Vincent</a> is
an open-source implementation of OpenGL ES for mobile devices.
<p>
@@ -157,7 +157,7 @@ is a subset of OpenGL.
</p>
<p>
<a href="https://sourceforge.net/projects/softgl/">SoftGL</a>
<a href="http://sourceforge.net/projects/softgl/">SoftGL</a>
is an OpenGL subset for mobile devices.
</p>
@@ -213,7 +213,7 @@ If you don't already have GLUT installed, you should grab
<h2>2.4 Where is the GLw library?</h2>
<p>
GLw (OpenGL widget library) is now available from a separate <a href="https://cgit.freedesktop.org/mesa/glw/">git repository</a>. Unless you're using very old Xt/Motif applications with OpenGL, you shouldn't need it.
GLw (OpenGL widget library) is now available from a separate <a href="http://cgit.freedesktop.org/mesa/glw/">git repository</a>. Unless you're using very old Xt/Motif applications with OpenGL, you shouldn't need it.
</p>
@@ -276,7 +276,7 @@ If you're using a hardware accelerated driver you want <code>direct rendering: Y
</p>
<p>
If your DRI-based driver isn't working, go to the
<a href="https://dri.freedesktop.org/">DRI website</a> for trouble-shooting information.
<a href="http://dri.freedesktop.org/">DRI website</a> for trouble-shooting information.
</p>
@@ -284,7 +284,7 @@ If your DRI-based driver isn't working, go to the
<p>
Make sure the ratio of the far to near clipping planes isn't too great.
Look
<a href="https://www.opengl.org/resources/faq/technical/depthbuffer.htm#0040">here</a>
<a href="http://www.opengl.org/resources/faq/technical/depthbuffer.htm#0040">here</a>
for details.
</p>
<p>
@@ -339,7 +339,7 @@ First, join the <a href="lists.html">mesa-dev mailing list</a>.
That's where Mesa development is discussed.
</p>
<p>
The <a href="https://www.opengl.org/documentation">
The <a href="http://www.opengl.org/documentation">
OpenGL Specification</a> is the bible for OpenGL implementation work.
You should read it.
</p>
@@ -383,7 +383,7 @@ implement the extension (specifically the compression/decompression
algorithms).
</p>
<p>
In the mean time, a 3rd party <a href="https://dri.freedesktop.org/wiki/S3TC">
In the mean time, a 3rd party <a href="http://dri.freedesktop.org/wiki/S3TC">
plug-in library</a> is available.
</p>

View File

@@ -78,18 +78,18 @@ GL 3.1, GLSL 1.40 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llv
GL_EXT_texture_snorm (Signed normalized textures) DONE ()
GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr
GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe
Core/compatibility profiles DONE
Geometry shaders DONE ()
GL_ARB_vertex_array_bgra (BGRA vertex order) DONE (freedreno)
GL_ARB_draw_elements_base_vertex (Base vertex offset) DONE (freedreno)
GL_ARB_fragment_coord_conventions (Frag shader coord) DONE (freedreno)
GL_ARB_provoking_vertex (Provoking vertex) DONE (freedreno)
GL_ARB_seamless_cube_map (Seamless cubemaps) DONE (freedreno)
GL_ARB_texture_multisample (Multisample textures) DONE ()
GL_ARB_depth_clamp (Frag depth clamp) DONE (freedreno)
GL_ARB_sync (Fence objects) DONE (freedreno)
GL_ARB_vertex_array_bgra (BGRA vertex order) DONE (freedreno, swr)
GL_ARB_draw_elements_base_vertex (Base vertex offset) DONE (freedreno, swr)
GL_ARB_fragment_coord_conventions (Frag shader coord) DONE (freedreno, swr)
GL_ARB_provoking_vertex (Provoking vertex) DONE (freedreno, swr)
GL_ARB_seamless_cube_map (Seamless cubemaps) DONE (freedreno, swr)
GL_ARB_texture_multisample (Multisample textures) DONE (swr)
GL_ARB_depth_clamp (Frag depth clamp) DONE (freedreno, swr)
GL_ARB_sync (Fence objects) DONE (freedreno, swr)
GLX_ARB_create_context_profile DONE
@@ -107,7 +107,7 @@ GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
GL_ARB_vertex_type_2_10_10_10_rev DONE (freedreno, swr)
GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL 4.0, GLSL 4.00 --- all DONE: i965/hsw+, nvc0, r600, radeonsi
GL_ARB_draw_buffers_blend DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr)
GL_ARB_draw_indirect DONE (i965/gen7+, llvmpipe, softpipe, swr)
@@ -124,7 +124,7 @@ GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
- Enhanced per-sample shading DONE ()
- Interpolation functions DONE ()
- New overload resolution rules DONE
GL_ARB_gpu_shader_fp64 DONE (i965/gen7+, llvmpipe, softpipe)
GL_ARB_gpu_shader_fp64 DONE (i965/hsw+, llvmpipe, softpipe)
GL_ARB_sample_shading DONE (i965/gen6+, nv50)
GL_ARB_shader_subroutine DONE (i965/gen6+, nv50, llvmpipe, softpipe, swr)
GL_ARB_tessellation_shader DONE (i965/gen7+)
@@ -132,21 +132,21 @@ GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL_ARB_texture_cube_map_array DONE (i965/gen6+, nv50, llvmpipe, softpipe)
GL_ARB_texture_gather DONE (i965/gen6+, nv50, llvmpipe, softpipe, swr)
GL_ARB_texture_query_lod DONE (i965, nv50, softpipe)
GL_ARB_transform_feedback2 DONE (i965/gen6+, nv50, llvmpipe, softpipe, swr)
GL_ARB_transform_feedback2 DONE (i965/gen7+, nv50, llvmpipe, softpipe, swr)
GL_ARB_transform_feedback3 DONE (i965/gen7+, llvmpipe, softpipe, swr)
GL 4.1, GLSL 4.10 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL 4.1, GLSL 4.10 --- all DONE: i965/hsw+, nvc0, r600, radeonsi
GL_ARB_ES2_compatibility DONE (i965, nv50, llvmpipe, softpipe, swr)
GL_ARB_get_program_binary DONE (0 binary formats)
GL_ARB_separate_shader_objects DONE (all drivers)
GL_ARB_shader_precision DONE (i965/gen7+, all drivers that support GLSL 4.10)
GL_ARB_vertex_attrib_64bit DONE (i965/gen7+, llvmpipe, softpipe)
GL_ARB_shader_precision DONE (i965/hsw+, all drivers that support GLSL 4.10)
GL_ARB_vertex_attrib_64bit DONE (i965/hsw+, llvmpipe, softpipe)
GL_ARB_viewport_array DONE (i965, nv50, llvmpipe, softpipe)
GL 4.2, GLSL 4.20 -- all DONE: i965/gen7+, nvc0, radeonsi
GL 4.2, GLSL 4.20 -- all DONE: i965/hsw+, nvc0, radeonsi
GL_ARB_texture_compression_bptc DONE (i965, r600)
GL_ARB_compressed_texture_pixel_storage DONE (all drivers)
@@ -191,8 +191,8 @@ GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, radeonsi
GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, radeonsi
GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drivers)
GL_ARB_buffer_storage DONE (i965, nv50, r600, llvmpipe, swr)
GL_ARB_clear_texture DONE (i965, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_buffer_storage DONE (i965, nv50, r600)
GL_ARB_clear_texture DONE (i965, nv50, r600)
GL_ARB_enhanced_layouts DONE (i965, nv50, llvmpipe, softpipe)
- compile-time constant expressions DONE
- explicit byte offsets for blocks DONE
@@ -283,7 +283,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_ARB_ES3_2_compatibility DONE (i965/gen8+)
GL_ARB_fragment_shader_interlock not started
GL_ARB_gl_spirv not started
GL_ARB_gpu_shader_int64 DONE (i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe)
GL_ARB_gpu_shader_int64 started (airlied for core and Gallium, idr for i965)
GL_ARB_indirect_parameters DONE (nvc0, radeonsi)
GL_ARB_parallel_shader_compile not started, but Chia-I Wu did some related work in 2014
GL_ARB_pipeline_statistics_query DONE (i965, nvc0, radeonsi, softpipe, swr)
@@ -291,19 +291,19 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_ARB_robustness_isolation not started
GL_ARB_sample_locations not started
GL_ARB_seamless_cubemap_per_texture DONE (i965, nvc0, radeonsi, r600, softpipe, swr)
GL_ARB_shader_atomic_counter_ops DONE (i965/gen7+, nvc0, radeonsi, softpipe)
GL_ARB_shader_ballot DONE (nvc0, radeonsi)
GL_ARB_shader_clock DONE (i965/gen7+, nv50, nvc0, radeonsi)
GL_ARB_shader_atomic_counter_ops DONE (nvc0, radeonsi, softpipe)
GL_ARB_shader_ballot not started
GL_ARB_shader_clock DONE (i965/gen7+)
GL_ARB_shader_draw_parameters DONE (i965, nvc0, radeonsi)
GL_ARB_shader_group_vote DONE (nvc0, radeonsi)
GL_ARB_shader_group_vote DONE (nvc0)
GL_ARB_shader_stencil_export DONE (i965/gen9+, radeonsi, softpipe, llvmpipe, swr)
GL_ARB_shader_viewport_layer_array DONE (i965/gen6+, radeonsi)
GL_ARB_sparse_buffer DONE (radeonsi/CIK+)
GL_ARB_shader_viewport_layer_array DONE (i965/gen6+)
GL_ARB_sparse_buffer not started
GL_ARB_sparse_texture not started
GL_ARB_sparse_texture2 not started
GL_ARB_sparse_texture_clamp not started
GL_ARB_texture_filter_minmax not started
GL_ARB_transform_feedback_overflow_query DONE (i965/gen6+)
GL_ARB_transform_feedback_overflow_query not started
GL_KHR_blend_equation_advanced_coherent DONE (i965/gen9+)
GL_KHR_no_error not started
GL_KHR_texture_compression_astc_hdr DONE (core only)
@@ -333,6 +333,5 @@ we DO NOT WANT implementations of these extensions for Mesa.
GL_ARB_shadow_ambient Superseded by GL_ARB_fragment_program
GL_ARB_vertex_blend Superseded by GL_ARB_vertex_program
A graphical representation of this information can be found at
https://mesamatrix.net/
More info about these features and the work involved can be found at
http://dri.freedesktop.org/wiki/MissingFunctionality

View File

@@ -24,7 +24,7 @@ Here are some specific ideas and areas where help would be appreciated:
<ol>
<li>
<b>Driver patching and testing.</b>
Patches are often posted to the <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev">mesa-dev mailing list</a>, but aren't
Patches are often posted to the <a href="http://lists.freedesktop.org/mailman/listinfo/mesa-dev">mesa-dev mailing list</a>, but aren't
immediately checked into git because not enough people are testing them.
Just applying patches, testing and reporting back is helpful.
<li>
@@ -39,7 +39,7 @@ issues in the code.
Fixing MSVC builds.
<li>
<b>Contribute more tests to
<a href="https://piglit.freedesktop.org/">Piglit</a>.</b>
<a href="http://piglit.freedesktop.org/">Piglit</a>.</b>
<li>
<b>Automatic testing.
</b>
@@ -56,9 +56,9 @@ You can find some further To-do lists here:
<b>Common To-Do lists:</b>
</p>
<ul>
<li><a href="https://cgit.freedesktop.org/mesa/mesa/tree/docs/features.txt">
<li><a href="http://cgit.freedesktop.org/mesa/mesa/tree/docs/features.txt">
<b>features.txt</b></a> - Status of OpenGL 3.x / 4.x features in Mesa.</li>
<li><a href="https://dri.freedesktop.org/wiki/MissingFunctionality">
<li><a href="http://dri.freedesktop.org/wiki/MissingFunctionality">
<b>MissingFunctionality</b></a> - Detailed information about missing OpenGL features.</li>
</ul>
@@ -66,15 +66,15 @@ You can find some further To-do lists here:
<b>Driver specific To-Do lists:</b>
</p>
<ul>
<li><a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/docs/llvm-todo.txt">
<li><a href="http://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/docs/llvm-todo.txt">
<b>LLVMpipe</b></a> - Software driver using LLVM for runtime code generation.</li>
<li><a href="https://dri.freedesktop.org/wiki/RadeonsiToDo">
<li><a href="http://dri.freedesktop.org/wiki/RadeonsiToDo">
<b>radeonsi</b></a> - Driver for AMD Southern Island.</li>
<li><a href="https://dri.freedesktop.org/wiki/R600ToDo">
<li><a href="http://dri.freedesktop.org/wiki/R600ToDo">
<b>r600g</b></a> - Driver for ATI/AMD R600 - Northern Island.</li>
<li><a href="https://dri.freedesktop.org/wiki/R300ToDo">
<li><a href="http://dri.freedesktop.org/wiki/R300ToDo">
<b>r300g</b></a> - Driver for ATI R300 - R500.</li>
<li><a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/i915/TODO">
<li><a href="http://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/i915/TODO">
<b>i915g</b></a> - Driver for Intel i915/i945.</li>
</ul>

View File

@@ -16,60 +16,6 @@
<h1>News</h1>
<h2>April 1, 2017</h2>
<p>
<a href="relnotes/17.0.3.html">Mesa 17.0.3</a> is released.
This is a bug-fix release.
</p>
<h2>March 20, 2017</h2>
<p>
<a href="relnotes/13.0.6.html">Mesa 13.0.6</a> and
<a href="relnotes/17.0.2.html">Mesa 17.0.2</a> are released.
These are bug-fix releases from the 13.0 and 17.0 branches, respectively.
<br>
NOTE: It is anticipated that 13.0.6 will be the final release in the 13.0
series. Users of 13.0 are encouraged to migrate to the 17.0 series in order
to obtain future fixes.
</p>
<h2>March 4, 2017</h2>
<p>
<a href="relnotes/17.0.1.html">Mesa 17.0.1</a> is released.
This is a bug-fix release.
</p>
<h2>February 20, 2017</h2>
<p>
<a href="relnotes/13.0.5.html">Mesa 13.0.5</a> is released.
This is a bug-fix release.
</p>
<h2>February 13, 2017</h2>
<p>
<a href="relnotes/17.0.0.html">Mesa 17.0.0</a> is released. This is a
new development release. See the release notes for more information
about the release.
</p>
<h2>February 1, 2017</h2>
<p>
<a href="relnotes/13.0.4.html">Mesa 13.0.4</a> is released.
This is a bug-fix release.
</p>
<h2>January 23, 2017</h2>
<p>
<a href="relnotes/12.0.6.html">Mesa 12.0.6</a> is released.
This is a bug-fix release.
<br>
NOTE: This is an extra release for the 12.0 stable branch, as per developers'
feedback. It is anticipated that 12.0.6 will be the final release in the 12.0
series. Users of 12.0 are encouraged to migrate to the 13.0 series in order
to obtain future fixes.
</p>
<h2>January 5, 2017</h2>
<p>
<a href="relnotes/13.0.3.html">Mesa 13.0.3</a> is released.
@@ -205,7 +151,7 @@ This is a bug-fix release.
</p>
<p>
Mesa demos 8.3.0 is also released.
See the <a href="https://lists.freedesktop.org/archives/mesa-announce/2015-December/000191.html">announcement</a> for more information about the release.
See the <a href="http://lists.freedesktop.org/archives/mesa-announce/2015-December/000191.html">announcement</a> for more information about the release.
You can download it from <a href="ftp://ftp.freedesktop.org/pub/mesa/demos/8.3.0/">ftp.freedesktop.org/pub/mesa/demos/8.3.0/</a>.
</p>
@@ -520,7 +466,7 @@ This is a bug-fix release.
<p>
Mesa demos 8.2.0 is released.
See the <a href="https://lists.freedesktop.org/archives/mesa-announce/2014-July/000100.html">announcement</a> for more information about the release.
See the <a href="http://lists.freedesktop.org/archives/mesa-announce/2014-July/000100.html">announcement</a> for more information about the release.
You can download it from <a href="ftp://ftp.freedesktop.org/pub/mesa/demos/8.2.0/">ftp.freedesktop.org/pub/mesa/demos/8.2.0/</a>.
</p>
@@ -699,7 +645,7 @@ This is a bug fix release.
<p>
Mesa demos 8.1.0 is released.
See the <a href="https://lists.freedesktop.org/archives/mesa-dev/2013-February/035180.html">announcement</a> for more information about the release.
See the <a href="http://lists.freedesktop.org/archives/mesa-dev/2013-February/035180.html">announcement</a> for more information about the release.
You can download it from <a href="ftp://ftp.freedesktop.org/pub/mesa/demos/8.1.0/">ftp.freedesktop.org/pub/mesa/demos/8.1.0/</a>.
</p>
@@ -1395,7 +1341,7 @@ and primarily just incorporates bug fixes.
<h2>December 28, 2003</h2>
<p>
The Mesa CVS server has been moved to <a href="https://www.freedesktop.org">
The Mesa CVS server has been moved to <a href="http://www.freedesktop.org">
freedesktop.org</a> because of problems with SourceForge's anonymous
CVS service.
</p>
@@ -1967,7 +1913,7 @@ Here's what's new:</p>
</pre>
<h2>March 23, 2000</h2>
<p>I've just upload the Mesa 3.2 beta 1 files to SourceForge at <a href="https://sourceforge.net/project/showfiles.php?group_id=3">https://sourceforge.net/project/filelist.php?group_id=3</a></p>
<p>I've just upload the Mesa 3.2 beta 1 files to SourceForge at <a href="http://sourceforge.net/project/showfiles.php?group_id=3">http://sourceforge.net/project/filelist.php?group_id=3</a></p>
<p>3.2 (note even number) is a stabilization release of Mesa 3.1 meaning it's mainly
just bug fixes.</p>
<p>Here's what's changed:</p>
@@ -2015,7 +1961,7 @@ After 3.2 is wrapped up I hope to release 3.3 beta 1 soon afterward.</p>
<h2>December 17, 1999</h2>
<p>A Slashdot interview with Brian about Mesa (questions submitted by Slashdot readers)
can be found at <a href="https://slashdot.org/interviews/99/12/17/0927212.shtml">https://slashdot.org/interviews/99/12/17/0927212.shtml</a>.</p>
can be found at <a href="http://slashdot.org/interviews/99/12/17/0927212.shtml">http://slashdot.org/interviews/99/12/17/0927212.shtml</a>.</p>
<h2>December 14, 1999</h2>
<p>Mesa 3.1 is released!</p>
@@ -2049,7 +1995,7 @@ BOF meeting is now available.</p>
<p>-Brian</p>
<h2>August 14, 1999</h2>
<p><a href="https://www.mesa3d.org">www.mesa3d.org</a> is having
<p><a href="http://www.mesa3d.org">www.mesa3d.org</a> is having
technical problems due to hardware failures at VA Linux systems. The Mac pages,
ftp, and CVS services aren't fully restored yet. Please be patient.</p>
<p>-Brian</p>
@@ -2058,9 +2004,9 @@ ftp, and CVS services aren't fully restored yet. Please be patient.</p>
<p>RPMS of the nVidia RIVA server can be found at <code>ftp://ftp.mesa3d.org/mesa/misc/nVidia/</code>.</p>
<h2>June 2, 1999</h2>
<p><a href="https://www.nvidia.com/">nVidia</a> has released some Linux binaries for
<p><a href="http://www.nvidia.com/">nVidia</a> has released some Linux binaries for
xfree86 3.3.3.1, along with the <b>full source</b>, which includes GLX acceleration
based on Mesa 3.0. They can be downloaded from <code>https://www.nvidia.com/Products.nsf/htmlmedia/software_drivers.html</code>.</p>
based on Mesa 3.0. They can be downloaded from <code>http://www.nvidia.com/Products.nsf/htmlmedia/software_drivers.html</code>.</p>
<h2>May 24, 1999</h2>
<p>Beta 2 of Mesa 3.1 has been make available at <code>ftp://ftp.mesa3d.org/mesa/beta/</code>.
@@ -2108,11 +2054,11 @@ grateful.
<p>The new webpages are now online. Enjoy, and let me know if you find any errors.
<h2>February 16, 1999</h2>
<p><a href="https://www.sgi.com/">SGI</a> releases its
<a href="https://www.sgi.com/software/opensource/glx/">GLX source code</a>.</p>
<p><a href="http://www.sgi.com/">SGI</a> releases its
<a href="http://www.sgi.com/software/opensource/glx/">GLX source code</a>.</p>
<h2>January 22, 1999</h2>
<p><a href="https://www.mesa3d.org">www.mesa3d.org</a> established</p>
<p><a href="http://www.mesa3d.org">www.mesa3d.org</a> established</p>
</div>
</body>

View File

@@ -71,7 +71,7 @@ you think you've spotted a bug let developers know by filing a
<ul>
<li><a href="https://www.python.org/">Python</a> - Python is required.
<li><a href="http://www.python.org/">Python</a> - Python is required.
Version 2.6.4 or later should work.
</li>
<li><a href="http://www.makotemplates.org/">Python Mako module</a> -
@@ -178,7 +178,7 @@ your experience might vary.
<p>
In order to achieve that one should update their local manifest to point to the
upstream repo, set the appropriate BOARD_GPU_DRIVERS and build the
upstream repo, set the approapriate BOARD_GPU_DRIVERS and build the
libGLES_mesa library.
</p>

View File

@@ -17,34 +17,22 @@
<h1>Introduction</h1>
<p>
The Mesa project began as an open-source implementation of the
<a href="https://www.opengl.org/">OpenGL</a> specification -
Mesa is an open-source implementation of the
<a href="http://www.opengl.org/">OpenGL</a> specification -
a system for rendering interactive 3D graphics.
</p>
<p>
Over the years the project has grown to implement more graphics APIs,
including
<a href="https://www.khronos.org/opengles/">OpenGL ES</a> (versions 1, 2, 3),
<a href="https://www.khronos.org/opencl/">OpenCL</a>,
<a href="https://www.khronos.org/openmax/">OpenMAX</a>,
<a href="https://en.wikipedia.org/wiki/VDPAU">VDPAU</a>,
<a href="https://en.wikipedia.org/wiki/Video_Acceleration_API">VA API</a>,
<a href="https://en.wikipedia.org/wiki/X-Video_Motion_Compensation">XvMC</a> and
<a href="https://www.khronos.org/vulkan/">Vulkan</a>.
A variety of device drivers allows Mesa to be used in many different
environments ranging from software emulation to complete hardware acceleration
for modern GPUs.
</p>
<p>
A variety of device drivers allows the Mesa libraries to be used in many
different environments ranging from software emulation to complete hardware
acceleration for modern GPUs.
</p>
<p>
Mesa ties into several other open-source projects: the
<a href="https://dri.freedesktop.org/">Direct Rendering
Infrastructure</a> and <a href="https://x.org">X.org</a> to
provide OpenGL support on Linux, FreeBSD and other operating
Mesa ties into several other open-source projects: the
<a href="http://dri.freedesktop.org/">Direct Rendering
Infrastructure</a> and <a href="http://x.org">X.org</a> to
provide OpenGL support to users of X on Linux, FreeBSD and other operating
systems.
</p>
@@ -97,7 +85,7 @@ the OpenGL API, so they didn't feel threatened by the project.
1995-1996: I continue working on Mesa both during my spare time and during
my work hours at the Space Science and Engineering Center at the University
of Wisconsin in Madison. My supervisor, Bill Hibbard, lets me do this because
Mesa is now being using for the <a href="https://www.ssec.wisc.edu/%7Ebillh/vis.html">Vis5D</a> project.
Mesa is now being using for the <a href="http://www.ssec.wisc.edu/%7Ebillh/vis.html">Vis5D</a> project.
</p><p>
October 1996: Mesa 2.0 is released. It implements the OpenGL 1.1 specification.
</p>
@@ -154,7 +142,7 @@ and OpenGL Shading Language.
<p>
2008: Keith Whitwell and other Tungsten Graphics employees develop
<a href="https://en.wikipedia.org/wiki/Gallium3D">Gallium</a>
<a href="http://en.wikipedia.org/wiki/Gallium3D">Gallium</a>
- a new GPU abstraction layer. The latest Mesa drivers are based on
Gallium and other APIs such as OpenVG are implemented on top of Gallium.
</p>
@@ -165,22 +153,13 @@ and version 1.30 of the OpenGL Shading Language.
</p>
<p>
July 2016: Mesa 12.0 is released, including OpenGL 4.3 support and initial
support for Vulkan for Intel GPUs. Plus, there's another gallium software
driver ("swr") based on LLVM and developed by Intel.
</p>
<p>
Ongoing: Mesa is the OpenGL implementation for devices designed by
Intel, AMD, NVIDIA, Qualcomm, Broadcom, Vivante, plus the VMware and
VirGL virtual GPUs.
Ongoing: Mesa is the OpenGL implementation for several types of hardware
made by Intel, AMD and NVIDIA, plus the VMware virtual GPU.
There's also several software-based renderers: swrast (the legacy
Mesa rasterizer), softpipe (a gallium reference driver), llvmpipe
(LLVM/JIT-based high-speed rasterizer) and swr (another LLVM-based driver).
</p>
<p>
Mesa rasterizer), softpipe (a gallium reference driver) and llvmpipe
(LLVM/JIT-based high-speed rasterizer).
Work continues on the drivers and core Mesa to implement newer versions
of the OpenGL, OpenGL ES and Vulkan specifications.
of the OpenGL specification.
</p>
@@ -199,9 +178,6 @@ of the OpenGL specification is implemented.
Version 12.x of Mesa implements the OpenGL 4.3 API, but not all drivers
support OpenGL 4.3.
</p>
<p>
Initial support for Vulkan is also included.
</p>
<h2>Version 11.x features</h2>
@@ -283,7 +259,7 @@ GL_SRC2_ALPHA GL_SOURCE2_ALPHA
</pre>
<p>
See the
<a href="https://www.opengl.org/documentation/spec.html">
<a href="http://www.opengl.org/documentation/spec.html">
OpenGL specification</a> for more details.
</p>

View File

@@ -18,10 +18,10 @@
<p>
Mesa is a 3-D graphics library with an API which is very similar to
that of <a href="https://www.opengl.org/">OpenGL</a>.*
that of <a href="http://www.opengl.org/">OpenGL</a>.*
To the extent that Mesa utilizes the OpenGL command syntax or state
machine, it is being used with authorization from <a
href="https://www.sgi.com/">Silicon Graphics,
href="http://www.sgi.com/">Silicon Graphics,
Inc.</a>(SGI). However, the author does not possess an OpenGL license
from SGI, and makes no claim that Mesa is in any way a compatible
replacement for OpenGL or associated with SGI. Those who want a
@@ -36,7 +36,7 @@ library</em>. <br>
</p>
<p>
* OpenGL is a trademark of <a href="https://www.sgi.com/"
* OpenGL is a trademark of <a href="http://www.sgi.com/"
>Silicon Graphics Incorporated</a>.
</p>

View File

@@ -21,23 +21,23 @@
</p>
<ul>
<li><p><a href="https://lists.freedesktop.org/mailman/listinfo/mesa-users">mesa-users</a>
<li><p><a href="http://lists.freedesktop.org/mailman/listinfo/mesa-users">mesa-users</a>
- intended for end-users of Mesa and DRI drivers. Newbie questions are OK,
but please try the general OpenGL resources and Mesa/DRI documentation first.</p>
</li>
<li><p><a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev">mesa-dev</a>
<li><p><a href="http://lists.freedesktop.org/mailman/listinfo/mesa-dev">mesa-dev</a>
- for Mesa, Gallium and DRI development
discussion. Not for beginners.</p>
</li>
<li><p><a href="https://lists.freedesktop.org/mailman/listinfo/mesa-commit">mesa-commit</a>
<li><p><a href="http://lists.freedesktop.org/mailman/listinfo/mesa-commit">mesa-commit</a>
- relays git check-in messages (for developers).
In general, people should not post to this list.</p>
</li>
<li><p><a href="https://lists.freedesktop.org/mailman/listinfo/mesa-announce">mesa-announce</a>
<li><p><a href="http://lists.freedesktop.org/mailman/listinfo/mesa-announce">mesa-announce</a>
- announcements of new Mesa
versions are sent to this list. Very low traffic.</p>
</li>
<li><p><a href="https://lists.freedesktop.org/mailman/listinfo/piglit">piglit</a>
<li><p><a href="http://lists.freedesktop.org/mailman/listinfo/piglit">piglit</a>
- for Piglit (OpenGL driver testing framework) discussion.</p>
</li>
</ul>
@@ -56,22 +56,22 @@ Follow the links above for list archives.
<p>
The old Mesa lists hosted at SourceForge are no longer in use.
The archives are still available, however:
<a href="https://sourceforge.net/mailarchive/forum.php?forum_name=mesa3d-announce">mesa3d-announce</a>,
<a href="https://sourceforge.net/mailarchive/forum.php?forum_name=mesa3d-users">mesa3d-users</a>,
<a href="https://sourceforge.net/mailarchive/forum.php?forum_name=mesa3d-dev">mesa3d-dev</a>.
<a href="http://sourceforge.net/mailarchive/forum.php?forum_name=mesa3d-announce">mesa3d-announce</a>,
<a href="http://sourceforge.net/mailarchive/forum.php?forum_name=mesa3d-users">mesa3d-users</a>,
<a href="http://sourceforge.net/mailarchive/forum.php?forum_name=mesa3d-dev">mesa3d-dev</a>.
</p>
<p>For mailing lists about Direct Rendering Modules (drm) in Linux/BSD
kernels, see the
<a href="https://dri.freedesktop.org/wiki/MailingLists">DRI wiki</a>.
<a href="http://dri.freedesktop.org/wiki/MailingLists">DRI wiki</a>.
</p>
<h1>IRC</h1>
<p>join <a href="irc://chat.freenode.net#dri-devel">#dri-devel channel</a>
on <a href="https://webchat.freenode.net/">irc.freenode.net</a>
on <a href="http://webchat.freenode.net/">irc.freenode.net</a>
</p>
@@ -82,7 +82,7 @@ Here are some other OpenGL-related forums you might find useful:
</p>
<ul>
<li><a href="https://www.opengl.org/discussion_boards/">OpenGL discussion forums</a>
<li><a href="http://www.opengl.org/cgi-bin/ubb/ultimatebb.cgi">OpenGL discussion forums</a>
at www.opengl.org</li>
<li>Usenet newsgroups:
<ul>

View File

@@ -34,7 +34,7 @@ It's the fastest software rasterizer for Mesa.
<li>
<p>An x86 or amd64 processor; 64-bit mode recommended.</p>
<p>
Support for SSE2 is strongly encouraged. Support for SSE3 and SSE4.1 will
Support for SSE2 is strongly encouraged. Support for SSSE3 and SSE4.1 will
yield the most efficient code. The fewer features the CPU has the more
likely is that you run into underperforming, buggy, or incomplete code.
</p>
@@ -165,8 +165,8 @@ any OpenGL drivers):
<li><p>load this registry settings:</p>
<pre>REGEDIT4
; https://technet.microsoft.com/en-us/library/cc749368.aspx
; https://www.msfn.org/board/topic/143241-portable-windows-7-build-from-winpe-30/page-5#entry942596
; http://technet.microsoft.com/en-us/library/cc749368.aspx
; http://www.msfn.org/board/topic/143241-portable-windows-7-build-from-winpe-30/page-5#entry942596
[HKEY_LOCAL_MACHINE\SOFTWARE\Wow6432Node\Microsoft\Windows NT\CurrentVersion\OpenGLDrivers\MSOGL]
"DLL"="mesadrv.dll"
"DriverVersion"=dword:00000001
@@ -195,7 +195,7 @@ that no tail call optimizations are done by gcc.
<h2>Linux perf integration</h2>
<p>
On Linux, it is possible to have symbol resolution of JIT code with <a href="https://perf.wiki.kernel.org/">Linux perf</a>:
On Linux, it is possible to have symbol resolution of JIT code with <a href="http://perf.wiki.kernel.org/">Linux perf</a>:
</p>
<pre>
@@ -206,12 +206,12 @@ On Linux, it is possible to have symbol resolution of JIT code with <a href="htt
<p>
When run inside Linux perf, llvmpipe will create a /tmp/perf-XXXXX.map file with
symbol address table. It also dumps assembly code to /tmp/perf-XXXXX.map.asm,
which can be used by the bin/perf-annotate-jit.py script to produce disassembly of
which can be used by the bin/perf-annotate-jit script to produce disassembly of
the generated code annotated with the samples.
</p>
<p>You can obtain a call graph via
<a href="https://github.com/jrfonseca/gprof2dot#linux-perf">Gprof2Dot</a>.</p>
<a href="http://code.google.com/p/jrfonseca/wiki/Gprof2Dot#linux_perf">Gprof2Dot</a>.</p>
<h1>Unit testing</h1>
@@ -253,7 +253,7 @@ for posterior analysis, e.g.:
We use LLVM-C bindings for now. They are not documented, but follow the C++
interfaces very closely, and appear to be complete enough for code
generation. See
<a href="https://npcontemplation.blogspot.com/2008/06/secret-of-llvm-c-bindings.html">
<a href="http://npcontemplation.blogspot.com/2008/06/secret-of-llvm-c-bindings.html">
this stand-alone example</a>. See the llvm-c/Core.h file for reference.
</li>
</ul>
@@ -264,18 +264,18 @@ for posterior analysis, e.g.:
<li>
<p>Rasterization</p>
<ul>
<li><a href="https://www.cs.unc.edu/~olano/papers/2dh-tri/">Triangle Scan Conversion using 2D Homogeneous Coordinates</a></li>
<li><a href="http://www.cs.unc.edu/~olano/papers/2dh-tri/">Triangle Scan Conversion using 2D Homogeneous Coordinates</a></li>
<li><a href="http://www.drdobbs.com/parallel/rasterization-on-larrabee/217200602">Rasterization on Larrabee</a> (<a href="http://devmaster.net/posts/2887/rasterization-on-larrabee">DevMaster copy</a>)</li>
<li><a href="http://devmaster.net/posts/6133/rasterization-using-half-space-functions">Rasterization using half-space functions</a></li>
<li><a href="http://devmaster.net/posts/6145/advanced-rasterization">Advanced Rasterization</a></li>
<li><a href="https://fgiesen.wordpress.com/2013/02/17/optimizing-sw-occlusion-culling-index/">Optimizing Software Occlusion Culling</a></li>
<li><a href="http://fgiesen.wordpress.com/2013/02/17/optimizing-sw-occlusion-culling-index/">Optimizing Software Occlusion Culling</a></li>
</ul>
</li>
<li>
<p>Texture sampling</p>
<ul>
<li><a href="http://chrishecker.com/Miscellaneous_Technical_Articles#Perspective_Texture_Mapping">Perspective Texture Mapping</a></li>
<li><a href="https://www.flipcode.com/archives/Texturing_As_In_Unreal.shtml">Texturing As In Unreal</a></li>
<li><a href="http://www.flipcode.com/archives/Texturing_As_In_Unreal.shtml">Texturing As In Unreal</a></li>
<li><a href="http://www.gamasutra.com/view/feature/3301/runtime_mipmap_filtering.php">Run-Time MIP-Map Filtering</a></li>
<li><a href="http://alt.3dcenter.org/artikel/2003/10-26_a_english.php">Will "brilinear" filtering persist?</a></li>
<li><a href="http://ixbtlabs.com/articles2/gffx/nv40-rx800-3.html">Trilinear filtering</a></li>
@@ -294,21 +294,21 @@ for posterior analysis, e.g.:
<li><a href="http://www.drdobbs.com/optimizing-pixomatic-for-modern-x86-proc/184405807">Optimizing Pixomatic For Modern x86 Processors</a></li>
<li><a href="http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html">Intel 64 and IA-32 Architectures Optimization Reference Manual</a></li>
<li><a href="http://www.agner.org/optimize/">Software optimization resources</a></li>
<li><a href="https://software.intel.com/en-us/articles/intel-intrinsics-guide">Intel Intrinsics Guide</a><li>
<li><a href="http://software.intel.com/en-us/articles/intel-intrinsics-guide">Intel Intrinsics Guide</a><li>
</ul>
</li>
<li>
<p>LLVM</p>
<ul>
<li><a href="http://llvm.org/docs/LangRef.html">LLVM Language Reference Manual</a></li>
<li><a href="https://npcontemplation.blogspot.co.uk/2008/06/secret-of-llvm-c-bindings.html">The secret of LLVM C bindings</a></li>
<li><a href="http://npcontemplation.blogspot.co.uk/2008/06/secret-of-llvm-c-bindings.html">The secret of LLVM C bindings</a></li>
</ul>
</li>
<li>
<p>General</p>
<ul>
<li><a href="https://fgiesen.wordpress.com/2011/07/09/a-trip-through-the-graphics-pipeline-2011-index/">A trip through the Graphics Pipeline</a></li>
<li><a href="https://msdn.microsoft.com/en-us/library/gg615082.aspx#architecture">WARP Architecture and Performance</a></li>
<li><a href="http://fgiesen.wordpress.com/2011/07/09/a-trip-through-the-graphics-pipeline-2011-index/">A trip through the Graphics Pipeline</a></li>
<li><a href="http://msdn.microsoft.com/en-us/library/gg615082.aspx#architecture">WARP Architecture and Performance</a></li>
</ul>
</li>
</ul>

View File

@@ -17,8 +17,8 @@
<h1>OpenGL ES</h1>
<p>Mesa implements OpenGL ES 1.1 and OpenGL ES 2.0. More information about
OpenGL ES can be found at <a href="https://www.khronos.org/opengles/">
https://www.khronos.org/opengles/</a>.</p>
OpenGL ES can be found at <a href="http://www.khronos.org/opengles/">
http://www.khronos.org/opengles/</a>.</p>
<p>OpenGL ES depends on a working EGL implementation. Please refer to
<a href="egl.html">Mesa EGL</a> for more information about EGL.</p>

View File

@@ -27,5 +27,5 @@ ARB_texture_float:
enable this extension.
[1] https://www.google.com/patents/about?id=mIIOAAAAEBAJ&dq=6650327
[2] https://www.opengl.org/registry/specs/ARB/texture_float.txt
[1] http://www.google.com/patents/about?id=mIIOAAAAEBAJ&dq=6650327
[2] http://www.opengl.org/registry/specs/ARB/texture_float.txt

View File

@@ -45,7 +45,7 @@ Multiple filters can be used together.
<li>pp_nored, pp_nogreen, pp_noblue - set to 1 to remove the corresponding color channel.
These are basic filters for easy testing of the PP queue.
<li>pp_jimenezmlaa, pp_jimenezmlaa_color -
<a href="https://www.iryokufx.com/mlaa/" target=_blank>Jimenez's MLAA</a>
<a href="http://www.iryokufx.com/mlaa/" target=_blank>Jimenez's MLAA</a>
is a morphological antialiasing filter.
The two versions use depth and color data, respectively.
Which works better depends on the app - depth will not blur text, but it will

View File

@@ -20,14 +20,8 @@
In general, precompiled Mesa libraries are not available.
</p>
<p>
Some Linux distributions closely follow the latest Mesa releases. On others one
has to use unofficial channels.
<br>
There are some general directions:
<li>Debian/Ubuntu based distros - PPA: xorg-edgers, oibaf and padoka</li>
<li>Fedora - Corp: erp and che</li>
<li>OpenSuse/SLES - OBS: X11:XOrg and pontostroy:X11</li>
<li>Gentoo/Archlinux - officially provided/supported</li>
However, some Linux distros (such as Ubuntu) seem to closely track
Mesa and often have the latest Mesa release available as an update.
</p>
</div>

View File

@@ -57,11 +57,11 @@ to a minimum.
<h2>Feature releases</h2>
<ul>
<li>Available approximately every three months.
<li>Available approximatelly every three months.
<li>Initial timeplan available 2-4 weeks before the planned branchpoint (rc1)
on the mesa-announce@ mailing list.
<li>A <a href="#prerelease">pre-release</a> announcement should be available
approximately 24 hours before the final (non-rc) release.
approximatelly 24 hours before the final (non-rc) release.
</ul>
<h2>Stable releases</h2>
@@ -69,7 +69,7 @@ approximately 24 hours before the final (non-rc) release.
<li>Normally available once every two weeks.
<li>Only the latest branch has releases. See note below.
<li>A <a href="#prerelease">pre-release</a> announcement should be available
approximately 48 hours before the actual release.
approximatelly 48 hours before the actual release.
</ul>
<p>
@@ -115,38 +115,6 @@ performed where possible.
Achieved by combination of local ad-hoc scripts and AppVeyor plus Travis-CI,
the latter as part of their Github integration.
</p>
<p>
<strong>Note:</strong> If a patch in the current queue needs any additional
fix(es), then they should be squashed together.
<br>
The commit messages and the <code>cherry picked from</code> tags must be preserved.
</p>
<p>
This should be noted in the <a href="#prerelease">pre-announce</a> email.
<pre>
git show b10859ec41d09c57663a258f43fe57c12332698e
commit b10859ec41d09c57663a258f43fe57c12332698e
Author: Jonas Pfeil &ltpfeiljonas@gmx.de&gt
Date: Wed Mar 1 18:11:10 2017 +0100
ralloc: Make sure ralloc() allocations match malloc()'s alignment.
The header of ralloc needs to be aligned, because the compiler assumes
...
(cherry picked from commit cd2b55e536dc806f9358f71db438dd9c246cdb14)
Squashed with commit:
ralloc: don't leave out the alignment factor
Experimentation shows that without alignment factor gcc and clang choose
...
(cherry picked from commit ff494fe999510ea40e3ed5827e7818550b6de126)
</pre>
</p>
<h2>Regression/functionality testing</h2>
@@ -190,11 +158,6 @@ To setup the branchpoint:
git checkout master # make sure we're in master first
git tag -s X.Y-branchpoint -m "Mesa X.Y branchpoint"
git checkout -b X.Y
git checkout master
$EDITOR VERSION # bump the version number
git commit -as
cp docs/relnotes/{X.Y,X.Y+1}.html # copy/create relnotes template
git commit -as
git push origin X.Y-branchpoint X.Y
</pre>
@@ -203,9 +166,9 @@ Now go to
<a href="https://bugs.freedesktop.org/editversions.cgi?action=add&amp;product=Mesa" target="_parent">Bugzilla</a> and add the new Mesa version X.Y.
</p>
<p>
Check that there are no distribution breaking changes and revert them if needed.
For example: files being overwritten on install, etc. Happens extremely rarely -
we had only one case so far (see commit 2ced8eb136528914e1bf4e000dea06a9d53c7e04).
Check for rare that there are no distribution breaking changes and revert them
if needed. Extremely rare - we had only one case so far (see
commit 2ced8eb136528914e1bf4e000dea06a9d53c7e04).
</p>
<p>
Proceed to <a href="#release">release</a> -rc1.
@@ -322,12 +285,6 @@ Queued (NUMBER)
AUTHOR (NUMBER):
COMMIT SUMMARY
For example:
Jonas Pfeil (1):
ralloc: Make sure ralloc() allocations match malloc()'s alignment.
Squashed with
ralloc: don't leave out the alignment factor
Rejected (NUMBER)
=================
@@ -379,53 +336,43 @@ Here is one solution that I've been using.
chmod 755 -fR $__build_root; rm -rf $__build_root
mkdir -p $__build_root &amp;&amp; cd $__build_root
$__mesa_root/autogen.sh &amp;&amp; make -j2 distcheck
$__mesa_root/autogen.sh --enable-llvm-shared-libs &amp;&amp; make -j2 distcheck
# Build check the tarballs (scons, linux)
tar -xaf mesa-$__version.tar.xz &amp;&amp; cd mesa-$__version
scons
cd .. &amp;&amp; rm -rf mesa-$__version
# Build check the tarballs (scons, windows/mingw)
tar -xaf mesa-$__version.tar.xz &amp;&amp; cd mesa-$__version
scons platform=windows toolchain=crossmingw
cd .. &amp;&amp; rm -rf mesa-$__version
# Build check the tarballs (scons)
tar -xaf mesa-$__version.tar.xz &amp;&amp; cd mesa-$__version &amp;&amp; scons &amp;&amp; cd ..
# Test the automake binaries
rm -rf cd mesa-$__version
tar -xaf mesa-$__version.tar.xz &amp;&amp; cd mesa-$__version
./configure \
--with-dri-drivers=i965,swrast \
--with-gallium-drivers=swrast \
--with-vulkan-drivers=intel \
--enable-llvm-shared-libs \
--enable-llvm \
--enable-gallium-llvm \
--enable-glx-tls \
--enable-gbm \
--enable-egl \
--with-egl-platforms=x11,drm,wayland
make -j2 &amp;&amp; DESTDIR=`pwd`/test make -j6 install
__glxinfo_cmd='glxinfo 2>&amp;1 | egrep -o "Mesa.*|Gallium.*|.*dri\.so"'
__glxgears_cmd='glxgears 2>&amp;1 | grep -v "configuration file"'
__es2info_cmd='es2_info 2>&amp;1 | egrep "GL_VERSION|GL_RENDERER|.*dri\.so"'
__es2gears_cmd='es2gears_x11 2>&amp;1 | grep -v "configuration file"'
export LD_LIBRARY_PATH=`pwd`/test/usr/local/lib/
export LIBGL_DRIVERS_PATH=`pwd`/test/usr/local/lib/dri/
export LIBGL_DEBUG=verbose
eval $__glxinfo_cmd
eval $__glxgears_cmd
eval $__es2info_cmd
eval $__es2gears_cmd
glxinfo | egrep -o "Mesa.*"
glxgears
es2_info | egrep "GL_VERSION|GL_RENDERER"
es2gears_x11
export LIBGL_ALWAYS_SOFTWARE=1
eval $__glxinfo_cmd
eval $__glxgears_cmd
eval $__es2info_cmd
eval $__es2gears_cmd
glxinfo | egrep -o "Mesa.*|Gallium.*"
glxgears
es2_info | egrep "GL_VERSION|GL_RENDERER"
es2gears_x11
export LIBGL_ALWAYS_SOFTWARE=1
export GALLIUM_DRIVER=softpipe
eval $__glxinfo_cmd
eval $__glxgears_cmd
eval $__es2info_cmd
eval $__es2gears_cmd
glxinfo | egrep -o "Mesa.*|Gallium.*"
glxgears
es2_info | egrep "GL_VERSION|GL_RENDERER"
es2gears_x11
# Smoke test DOTA2
unset LD_LIBRARY_PATH
unset LIBGL_DRIVERS_PATH
@@ -473,10 +420,11 @@ Commit these changes and push the branch.
</pre>
<h3>Use the release.sh script from xorg <a href="https://cgit.freedesktop.org/xorg/util/modular/">util-modular</a></h3>
<h3>Use the release.sh script from xorg util-macros</h3>
<p>
Start the release process.
Ensure that the mesa git tree is clean via <code>git clean -fXd</code> and
start the release process.
</p>
<pre>
../relative/path/to/release.sh . # append --dist if you've already done distcheck above
@@ -490,7 +438,7 @@ and SSH passphrase(s) to sign and upload the files, respectively.
<h3>Add the sha256sums to the release notes</h3>
<p>
Edit docs/relnotes/X.Y.Z.html to add the sha256sums as available in the mesa-X.Y.Z.announce template. Commit this change.
Edit docs/relnotes/X.Y.Z.html to add the sha256sums as availabe in the mesa-X.Y.Z.announce template. Commit this change.
</p>
<h3>Back on mesa master, add the new release notes into the tree</h3>
@@ -524,10 +472,23 @@ Use the generated template during the releasing process.
<h1 id="website">Update the mesa3d.org website</h1>
<p>
As the hosting was moved to freedesktop, git hooks are deployed to update the
website. Manually check that it is updated 5-10 minutes after the final <code>git push</code>
NOTE: The recent release managers have not been performing this step
themselves, but leaving this to Brian Paul, (who has access to the
sourceforge.net hosting for mesa3d.org). Brian is more than willing to grant
the permission necessary to future release managers to do this step on their
own.
</p>
<p>
Update the web site by copying the docs/ directory's files to
/home/users/b/br/brianp/mesa-www/htdocs/ with:
<br>
<code>
sftp USERNAME,mesa3d@web.sourceforge.net
</code>
</p>
<h1 id="bugzilla">Update Bugzilla</h1>
<p>

View File

@@ -21,14 +21,6 @@ The release notes summarize what's new or changed in each Mesa release.
</p>
<ul>
<li><a href="relnotes/17.0.3.html">17.0.3 release notes</a>
<li><a href="relnotes/17.0.2.html">17.0.2 release notes</a>
<li><a href="relnotes/13.0.6.html">13.0.6 release notes</a>
<li><a href="relnotes/17.0.1.html">17.0.1 release notes</a>
<li><a href="relnotes/13.0.5.html">13.0.5 release notes</a>
<li><a href="relnotes/17.0.0.html">17.0.0 release notes</a>
<li><a href="relnotes/13.0.4.html">13.0.4 release notes</a>
<li><a href="relnotes/12.0.6.html">12.0.6 release notes</a>
<li><a href="relnotes/13.0.3.html">13.0.3 release notes</a>
<li><a href="relnotes/12.0.5.html">12.0.5 release notes</a>
<li><a href="relnotes/13.0.2.html">13.0.2 release notes</a>

View File

@@ -1,148 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 12.0.6 Release Notes / January 23, 2017</h1>
<p>
Mesa 12.0.6 is a bug fix release which fixes bugs found since the 12.0.5 release.
</p>
<p>
Mesa 12.0.6 implements the OpenGL 4.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.3. OpenGL
4.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
65339ba5d76a45225b8b56f9a1da9db15c569e1d163760faa2921da0a8461741 mesa-12.0.6.tar.gz
7d6da9744c1022a4c2ab6ad01a206984d00443fb691568011d01b3dd97e36448 mesa-12.0.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=92234">Bug 92234</a> - [BDW] GPU hang in Shogun2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=95130">Bug 95130</a> - Derivatives of gl_Color wrong when helper pixels used</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98329">Bug 98329</a> - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99030">Bug 99030</a> - [HSW, regression] transform feedback fails on Linux 4.8</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99354">Bug 99354</a> - [G71] &quot;Assertion `bkref' failed&quot; reproducible with glmark2</li>
</ul>
<h2>Changes</h2>
<p>Chad Versace (3):</p>
<ul>
<li>i965/mt: Disable aux surfaces after making miptree shareable</li>
<li>i965/mt: Disable HiZ when sharing depth buffer externally (v2)</li>
<li>anv: Handle vkGetPhysicalDeviceQueueFamilyProperties with count == 0</li>
</ul>
<p>Emil Velikov (5):</p>
<ul>
<li>docs: add sha256 checksums for 12.0.5</li>
<li>get-typod-pick-list.sh: add new script</li>
<li>automake: use shared llvm libs for make distcheck</li>
<li>egl/wayland: use the destroy_window_callback for swrast</li>
<li>Update version to 12.0.6</li>
</ul>
<p>Fredrik Höglund (1):</p>
<ul>
<li>dri3: Fix MakeCurrent without a default framebuffer</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nouveau: take extra push space into account for pushbuf_space calls</li>
</ul>
<p>Jason Ekstrand (19):</p>
<ul>
<li>spirv/nir: Fix some texture opcode asserts</li>
<li>spirv/nir: Add support for shadow samplers that return vec4</li>
<li>spirv/nir: Properly handle gather components</li>
<li>anv/pipeline: Set binding_table.gather_texture_start</li>
<li>nir: Add a helper for determining the type of a texture source</li>
<li>nir/lower_tex: Add some helpers for working with tex sources</li>
<li>nir/lower_tex: Add support for lowering coordinate offsets</li>
<li>i965/nir: Enable NIR lowering of txf and rect offsets</li>
<li>i965: Get rid of the do_lower_unnormalized_offsets pass</li>
<li>spirv/nir: Don't increment coord_components for array lod queries</li>
<li>anv/image: Assert that the image format is actually supported</li>
<li>spirv/nir: Move opcode selection higher up in handle_texture</li>
<li>spirv/nir: Refactor type handling in handle_texture</li>
<li>nir/spirv: Refactor coordinate handling in handle_texture</li>
<li>spirv/nir: Handle texture projectors</li>
<li>spirv/nir: Add support for ImageQuerySamples</li>
<li>anv/device: Return the right error for failed maps</li>
<li>anv/device: Implicitly unmap memory objects in FreeMemory</li>
<li>anv/descriptor_set: Write the state offset in the surface state free list.</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.</li>
<li>i965: Properly flush in hsw_pause_transform_feedback().</li>
</ul>
<p>Marek Olšák (6):</p>
<ul>
<li>cso: don't release sampler states that are bound</li>
<li>radeonsi: always restore sampler states when unbinding sampler views</li>
<li>radeonsi: fix incorrect FMASK checking in bind_sampler_states</li>
<li>radeonsi: disable CE on SI + AMDGPU</li>
<li>radeonsi: disable the constant engine (CE) on Carrizo and Stoney</li>
<li>gallium/radeon: fix the draw-calls HUD query</li>
</ul>
<p>Matt Turner (3):</p>
<ul>
<li>i965/fs: Rename opt_copy_propagate -&gt; opt_copy_propagation.</li>
<li>i965/fs: Add unit tests for copy propagation pass.</li>
<li>i965/fs: Reject copy propagation into SEL if not min/max.</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>cso: Don't restore nr_samplers in cso_restore_fragment_samplers</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>radeonsi: enable WQM in PS prolog when needed</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,255 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 13.0.4 Release Notes / February 1, 2017</h1>
<p>
Mesa 13.0.4 is a bug fix release which fixes bugs found since the 13.0.3 release.
</p>
<p>
Mesa 13.0.4 implements the OpenGL 4.4 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.4. OpenGL
4.4 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
a78518030b0b7d77a6c426ac3ff40f4b27fb0e2cdb0dfbe685024a46cae59bad mesa-13.0.4.tar.gz
a95d7ce8f7bd5f88585e4be3144a341236d8c0fc91f6feaec59bb8ba3120e726 mesa-13.0.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=92634">Bug 92634</a> - gallium's vl_mpeg12_decoder does not work with st/va</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=94512">Bug 94512</a> - X segfaults with glx-tls enabled in a x32 environment</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=94900">Bug 94900</a> - HD6950 GPU lockup loop with various steam games (octodad[always], saints row 4[always], dead island[always], grid autosport[sometimes])</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98263">Bug 98263</a> - [radv] The Talos Principle fails to launch with &quot;Fatal error: Cannot set display mode.&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98914">Bug 98914</a> - mesa-vdpau-drivers: breaks vdpau for mpeg2video</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98975">Bug 98975</a> - Wasteland 2 Directors Cut: Hangs. GPU fault</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99030">Bug 99030</a> - [HSW, regression] transform feedback fails on Linux 4.8</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99085">Bug 99085</a> - [EGL] dEQP-EGL.functional.sharing.gles2.multithread intermittent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99097">Bug 99097</a> - [vulkancts] dEQP-VK.image.store regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99100">Bug 99100</a> - [SKL,BDW,BSW,KBL] dEQP-VK.glsl.return.return_in_dynamic_loop_dynamic_vertex regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99144">Bug 99144</a> - Incorrect rendering using glDrawArraysInstancedBaseInstance and first != 0 on Skylake</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99154">Bug 99154</a> - Link time error when using multiple builtin functions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99158">Bug 99158</a> - vdpau segfaults and gpu locks with kodi on R9285</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99185">Bug 99185</a> - dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99188">Bug 99188</a> - dEQP-EGL.functional.create_context_ext.robust_gl_30.rgb565_no_depth_no_stencil</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99210">Bug 99210</a> - ES3-CTS.functional.texture.mipmap.cube.generate.rgba5551_*</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99354">Bug 99354</a> - [G71] &quot;Assertion `bkref' failed&quot; reproducible with glmark2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99450">Bug 99450</a> - [amdgpu] Payday 2 visual glitches on some models</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99451">Bug 99451</a> - polygon offset use after free</li>
</ul>
<h2>Changes</h2>
<p>Andres Rodriguez (2):</p>
<ul>
<li>vulkan/wsi: clarify the severity of lack of DRI3 v2</li>
<li>radv: fix include order for installed headers v2</li>
</ul>
<p>Arda Coskunses (2):</p>
<ul>
<li>vulkan/wsi/x11: don't crash on null visual</li>
<li>vulkan/wsi/x11: don't crash on null wsi x11 connection</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: Support loader interface version 3.</li>
</ul>
<p>Chad Versace (10):</p>
<ul>
<li>egl: Check config's surface types in eglCreate*Surface()</li>
<li>dri: Add __DRI_IMAGE_FORMAT_ARGB1555</li>
<li>mesa/texformat: Handle GL_RGBA + GL_UNSIGNED_SHORT_5_5_5_1</li>
<li>egl: Emit correct error when robust context creation fails</li>
<li>anv: Handle vkGetPhysicalDeviceQueueFamilyProperties with count == 0</li>
<li>mesa/shaderobj: Fix races on refcounts</li>
<li>meta: Disable dithering during glGenerateMipmap</li>
<li>vulkan: Add new cast macros for VkIcd types</li>
<li>vulkan: Update vk_icd.h to interface version 3</li>
<li>anv: Support loader interface version 3 (patch v2)</li>
</ul>
<p>Christian König (1):</p>
<ul>
<li>vl/zscan: fix "Fix trivial sign compare warnings"</li>
</ul>
<p>Chuck Atkins (1):</p>
<ul>
<li>glx: Add missing glproto dependency for gallium-xlib glx</li>
</ul>
<p>Damien Grassart (1):</p>
<ul>
<li>anv: return count of queue families written</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>radv: flush smem for uniform buffer bit.</li>
</ul>
<p>Emil Velikov (10):</p>
<ul>
<li>docs: add sha256 checksums for 13.0.3</li>
<li>cherry-ignore: add couple of intel_miptree_copy related patches</li>
<li>cherry-ignore: add radv: Call nir_lower_constant_initializers."</li>
<li>get-typod-pick-list.sh: add new script</li>
<li>cherry-ignore: add "_mesa_ClampColor extension/version fix"</li>
<li>cherry-ignore: add wayland race condition fix</li>
<li>egl/wayland: use the destroy_window_callback for swrast</li>
<li>automake: use shared llvm libs for make distcheck</li>
<li>get-pick-list.sh: Require explicit "13.0" for nominating stable patches</li>
<li>Update version to 13.0.4</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>anv: Fix uniform and storage buffer offset alignment limits.</li>
</ul>
<p>Fredrik Höglund (2):</p>
<ul>
<li>radv: fix dual source blending</li>
<li>dri3: Fix MakeCurrent without a default framebuffer</li>
</ul>
<p>Grazvydas Ignotas (1):</p>
<ul>
<li>mapi: update the asm code to support x32</li>
</ul>
<p>Heiko Przybyl (1):</p>
<ul>
<li>r600/sb: Fix loop optimization related hangs on eg</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nouveau: take extra push space into account for pushbuf_space calls</li>
</ul>
<p>Jason Ekstrand (4):</p>
<ul>
<li>i965/generator/tex: Handle an immediate sampler with an indirect texture</li>
<li>anv/formats: Use the real format for B4G4R4A4_UNORM_PACK16 on gen8</li>
<li>nir/search: Only allow matching SSA values</li>
<li>isl: Mark A4B4G4R4_UNORM as supported on gen8</li>
</ul>
<p>Jonas Ådahl (1):</p>
<ul>
<li>egl/wayland: Cleanup private display connection when init fails</li>
</ul>
<p>Kenneth Graunke (7):</p>
<ul>
<li>i965: Don't bail on vertex element processing if we need draw params.</li>
<li>i965: Fix last slot calculations</li>
<li>i965: Fix texturing in the vec4 TCS and GS backends.</li>
<li>spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.</li>
<li>i965: Make BLORP disable the NP Z PMA stall fix.</li>
<li>glsl: Use ir_var_temporary when generating inline functions.</li>
<li>i965: Properly flush in hsw_pause_transform_feedback().</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>vdpau: call texture_get_handle while the mutex is being held</li>
<li>va: call texture_get_handle while the mutex is being held</li>
<li>radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+</li>
<li>radeonsi: don't forget to add HTILE to the buffer list for texturing</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>cso: Don't restore nr_samplers in cso_restore_fragment_samplers</li>
</ul>
<p>Nanley Chery (3):</p>
<ul>
<li>anv/cmd_buffer: Fix arrayed depth/stencil attachments</li>
<li>anv/cmd_buffer: Fix programmed HiZ qpitch</li>
<li>anv/image: Disable HiZ for depth buffer arrays</li>
</ul>
<p>Nayan Deshmukh (1):</p>
<ul>
<li>st/va: delay calling begin_frame until we have all parameters</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno: some fence cleanup</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>gallium/hud: add missing break in hud_cpufreq_graph_install()</li>
</ul>
<p>Timothy Arceri (3):</p>
<ul>
<li>nir: Turn imov/fmov of undef into undef</li>
<li>glsl: fix opt_minmax redundancy checks against baserange</li>
<li>util: fix list_is_singular()</li>
</ul>
<p>Zachary Michaels (1):</p>
<ul>
<li>radeonsi: Always leave poly_offset in a valid state</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,210 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 13.0.5 Release Notes / February 20, 2017</h1>
<p>
Mesa 13.0.5 is a bug fix release which fixes bugs found since the 13.0.4 release.
</p>
<p>
Mesa 13.0.5 implements the OpenGL 4.4 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.4. OpenGL
4.4 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
7e45e3812078726eabca6d9384364bf035a3c4279024ec9090dd1b19a8989926 mesa-13.0.5.tar.gz
bfcea7e2c801525a60895c8aff11aa68457ee9aa35d01a4638e1f310a3f5ef87 mesa-13.0.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98329">Bug 98329</a> - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98421">Bug 98421</a> - src/loader/loader.c:111:40: error: unknown type name drmDevicePtr</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98526">Bug 98526</a> - glsl/tests/general-ir-test regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99532">Bug 99532</a> - Compute shader doesn't give right result under some circumstances</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99631">Bug 99631</a> - segfault with OSVRTrackerView and openscenegraph git master</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99633">Bug 99633</a> - rasterizer/core/clip.h:279:49: error: const struct API_STATE has no member named linkageCount</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99692">Bug 99692</a> - [radv] Mostly broken on Hawaii PRO/CIK ASICs</li>
</ul>
<h2>Changes</h2>
<p>Bartosz Tomczyk (2):</p>
<ul>
<li>r600: Fix stack overflow</li>
<li>r600/sb: Fix memory leak</li>
</ul>
<p>Bruce Cherniak (1):</p>
<ul>
<li>swr: [rasterizer core] Remove dead code Clipper::ClipScalar()</li>
</ul>
<p>Chad Versace (1):</p>
<ul>
<li>i965/mt: Disable HiZ when sharing depth buffer externally (v2)</li>
</ul>
<p>Dave Airlie (3):</p>
<ul>
<li>radv: change base aligmment for allocated memory.</li>
<li>radv: fix cik macroModeIndex.</li>
<li>radv: adopt some init config workarounds from radeonsi.</li>
</ul>
<p>Derek Foreman (1):</p>
<ul>
<li>egl/dri2: add image_loader_extension back into loader extensions for wayland</li>
</ul>
<p>Emil Velikov (26):</p>
<ul>
<li>docs: add sha256 checksums for 13.0.4</li>
<li>configure.ac: list radeon in --with-vulkan-drivers help string</li>
<li>i965: automake: correctly set MKDIR_GEN</li>
<li>freedreno: automake: correctly set MKDIR_GEN</li>
<li>i965: automake: include builddir prior to srcdir</li>
<li>i915: automake: include builddir prior to srcdir</li>
<li>egl: automake: include builddir prior to srcdir</li>
<li>clover: automake: include builddir prior to srcdir</li>
<li>st/dri: automake: include builddir prior to srcdir</li>
<li>d3dadapter9: automake: include builddir prior to srcdir</li>
<li>glx: automake: include builddir prior to srcdir</li>
<li>glx/apple: automake: include builddir prior to srcdir</li>
<li>glx/windows: automake: include builddir prior to srcdir</li>
<li>loader: automake: include builddir prior to srcdir</li>
<li>mapi: automake: include builddir prior to srcdir</li>
<li>radeon, r200: automake: include builddir prior to srcdir</li>
<li>dri/swrast: automake: include builddir prior to srcdir</li>
<li>dri/osmesa: automake: include builddir prior to srcdir</li>
<li>mesa/tests: automake: include builddir prior to srcdir</li>
<li>bin/get-extra-pick-list: use git merge-base to get the branchpoint</li>
<li>bin/get-extra-pick-list: rework to use already_picked list</li>
<li>bin/get-typod-pick-list.sh: limit `git grep ...' to only as needed</li>
<li>bin/get-pick-list.sh: limit `git grep ...' only as needed</li>
<li>bin/get-pick-list.sh: remove ancient way of nominating patches</li>
<li>bin/get-fixes-pick-list.sh: add new script</li>
<li>Update version to 13.0.5</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>vc4: Avoid emitting small immediates for UBO indirect load address guards.</li>
</ul>
<p>Hans de Goede (1):</p>
<ul>
<li>glx/glvnd: Fix GLXdispatchIndex sorting</li>
</ul>
<p>Ian Romanick (11):</p>
<ul>
<li>linker: Slight code rearrange to prevent duplication in the next commit</li>
<li>linker: Accurately track gl_uniform_block::stageref</li>
<li>glsl: Split process_block_array into two functions</li>
<li>glsl: Fix wonkey indentation left from previous commit</li>
<li>glsl: Track the linearized array index for each UBO instance array element</li>
<li>glsl: Use simpler visitor to determine which UBO and SSBO blocks are used</li>
<li>glsl: Add tracking for elements of an array-of-arrays that have been accessed</li>
<li>glsl: Add structures to track accessed elements of a single array</li>
<li>glsl: Mark a set of array elements as accessed using a list of array_deref_range</li>
<li>glsl: Walk a list of ir_dereference_array to mark array elements as accessed</li>
<li>linker: Accurately mark a uniform block instance array element as used in a stage</li>
</ul>
<p>Ilia Mirkin (3):</p>
<ul>
<li>vbo: process buffer binding state changes on draw when recording</li>
<li>st/mesa: MAX_VARYING is the max supported number of patch varyings, not min</li>
<li>nvc0: disable linked tsc mode in compute launch descriptor</li>
</ul>
<p>Jason Ekstrand (11):</p>
<ul>
<li>nir/search: Use the correct bit size for integer comparisons</li>
<li>i965/blorp: Use the correct ISL format for combined depth/stencil</li>
<li>intel/blorp: Handle clearing of A4B4G4R4 on all platforms</li>
<li>isl/formats: Only advertise sampling for A4B4G4R4 on Broadwell</li>
<li>anv: Flush render cache before STATE_BASE_ADDRESS on gen7</li>
<li>anv: Improve flushing around STATE_BASE_ADDRESS</li>
<li>vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetFormats</li>
<li>vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetPresentModes</li>
<li>vulkan/wsi: Lower the maximum image sizes</li>
<li>i965/sampler_state: Pass texObj into update_sampler_state</li>
<li>i965/sampler_state: Set the "Base Mip Level" field on Sandy Bridge</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965: Unbind deleted shaders from brw_context, fixing malloc heisenbug.</li>
</ul>
<p>Lionel Landwerlin (5):</p>
<ul>
<li>anv: don't require render target isl bit for depth/stencil surfaces</li>
<li>anv: set command buffer to NULL when allocations fail</li>
<li>anv: fix descriptor pool internal size allocation</li>
<li>spirv: handle OpUndef as part of the variable parsing pass</li>
<li>spirv: handle undefined components for OpVectorShuffle</li>
</ul>
<p>Marc-André Lureau (1):</p>
<ul>
<li>tgsi-dump: dump label if instruction has one</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>radeonsi: always set the TCL1_ACTION_ENA when invalidating L2</li>
<li>gallium/radeon: fix performance of buffer readbacks</li>
</ul>
<p>Topi Pohjolainen (2):</p>
<ul>
<li>i965: Make depth clear flushing more explicit</li>
<li>i965/gen6: Issue direct depth stall and flush after depth clear</li>
</ul>
<p>Vinson Lee (2):</p>
<ul>
<li>scons: Require libdrm &gt;= 2.4.66 for DRM.</li>
<li>util: Fix Clang trivial destructor check.</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,287 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 13.0.6 Release Notes / March 20, 2017</h1>
<p>
Mesa 13.0.6 is a bug fix release which fixes bugs found since the 13.0.5 release.
</p>
<p>
Mesa 13.0.6 implements the OpenGL 4.4 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.4. OpenGL
4.4 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
1076590f29103f022a2cd87e6dff6ae77072013745603d06b0410c373ab2bb1a mesa-13.0.6.tar.gz
29ef104a7fc082d352b1599bd6cb1d040be424ccd22f5e0eb7ee9b0e9acd3597 mesa-13.0.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68504">Bug 68504</a> - 9.2-rc1 workaround for clover build failure on ppc/altivec: cannot convert 'bool' to '__vector(4) __bool int' in return</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97102">Bug 97102</a> - [dri][swr] stack overflow / infinite loop with GALLIUM_DRIVER=swr</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98869">Bug 98869</a> - Electronic Super Joy graphic artefacts (regression,bisected)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99401">Bug 99401</a> - [g33] regression: piglit.spec.!opengl 1_0.gl-1_0-beginend-coverage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99456">Bug 99456</a> - Firefox crashing when opening about:support with WebGL2 enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99677">Bug 99677</a> - heap-use-after-free in glsl</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99715">Bug 99715</a> - Don't print: &quot;Note: Buggy applications may crash, if they do please report to vendor&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99850">Bug 99850</a> - Tessellation bug on Carrizo</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100049">Bug 100049</a> - &quot;ralloc: Make sure ralloc() allocations match malloc()'s alignment.&quot; causes seg fault in 32bit build</li>
</ul>
<h2>Changes</h2>
<p>Alex Smith (2):</p>
<ul>
<li>radv: Emit pending flushes before executing a secondary command buffer</li>
<li>radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer</li>
</ul>
<p>Bartosz Tomczyk (1):</p>
<ul>
<li>glsl: fix heap-buffer-overflow</li>
</ul>
<p>Bas Nieuwenhuizen (8):</p>
<ul>
<li>radv: Pass CMASK alignment to application.</li>
<li>radv: Pass DCC alignment to application.</li>
<li>radv: Never try to create more than max_sets descriptor sets.</li>
<li>radv: Reset emitted compute pipeline when calling secondary cmd buffer.</li>
<li>radv: Only use PKT3_OCCLUSION_QUERY when it doesn't hang.</li>
<li>radv: Use correct size for availability flag.</li>
<li>radv: Disable HTILE for textures with multiple layers/levels.</li>
<li>radv: Emit cache flushes before CP DMA.</li>
</ul>
<p>Ben Crocker (3):</p>
<ul>
<li>gallivm: Improve debug output (V2)</li>
<li>gallivm: Override getHostCPUName() "generic" w/ "pwr8" (v4)</li>
<li>gallivm: Reenable PPC VSX (v3)</li>
</ul>
<p>Brendan King (1):</p>
<ul>
<li>egl/dri3: implement query surface hook</li>
</ul>
<p>Bruce Cherniak (1):</p>
<ul>
<li>swr: Prune empty nodes in CalculateProcessorTopology.</li>
</ul>
<p>Connor Abbott (1):</p>
<ul>
<li>anv: fix Get*MemoryRequirements for !LLC</li>
</ul>
<p>Dave Airlie (13):</p>
<ul>
<li>radv: program a default point size.</li>
<li>radv: handle transfer_write as a dst flag.</li>
<li>radv/ac: handle nir irem opcode.</li>
<li>radv/ac: implement txs for buffer textures.</li>
<li>radv/ac: correctly size shared memory usage.</li>
<li>radv/ac: avoid the fmask path when doing txs.</li>
<li>radv: pass FMASK alignment to application</li>
<li>tgsi: fix memory leak in tgsi sanity check</li>
<li>radv: fix depth format in blit2d.</li>
<li>radv: fix txs for sampler buffers</li>
<li>radv: drop Z24 support.</li>
<li>radv: disable mip point pre clamping.</li>
<li>radv: setup llvm target data layout</li>
</ul>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: add sha256 checksums for 13.0.5</li>
<li>Revert "get-pick-list.sh: Require explicit "13.0" for nominating stable patches"</li>
<li>cherry-ignore: don't pick nir_op_pack_double optimisation fix</li>
<li>i965: move brw_define.h ifndef guard to the top</li>
<li>cherry-ignore: add ANV fast clears related fixes</li>
<li>Update version to 13.0.6</li>
</ul>
<p>Fredrik Höglund (2):</p>
<ul>
<li>radv: fix the dynamic buffer index in vkCmdBindDescriptorSets</li>
<li>radv/ac: fix multiple descriptor sets with dynamic buffers</li>
</ul>
<p>George Kyriazis (1):</p>
<ul>
<li>swr: Align query results allocation</li>
</ul>
<p>Grazvydas Ignotas (3):</p>
<ul>
<li>r300g: only allow byteswapped formats on big endian</li>
<li>gallium/u_queue: fix a crash with atexit handlers</li>
<li>gallium/u_queue: set num_threads correctly if not all threads start</li>
</ul>
<p>Gregory Hainaut (1):</p>
<ul>
<li>glapi: fix typo in count_scale</li>
</ul>
<p>Ian Romanick (1):</p>
<ul>
<li>mesa: Don't advertise GL_OES_read_format in core profile</li>
</ul>
<p>Ilia Mirkin (8):</p>
<ul>
<li>nvc0: increase number of ubo binding points</li>
<li>nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ compute</li>
<li>nvc0/ir: fix ubo max clamp, reset file index</li>
<li>gm107/ir: fix address offset bitfield for ATOMS</li>
<li>nvc0: set the render condition in the compute object</li>
<li>st/mesa: don't pass compare mode for stencil-sampled textures</li>
<li>nvc0: take extra pushbuf space into account for pushbuf_space calls</li>
<li>nvc0: increase alignment to 256 for texture buffers on fermi</li>
</ul>
<p>Jacob Lifshay (1):</p>
<ul>
<li>vulkan/wsi: Improve the DRI3 error message</li>
</ul>
<p>Jason Ekstrand (11):</p>
<ul>
<li>i965: Use a better guardband calculation.</li>
<li>intel/blorp: Swizzle clear colors on the CPU</li>
<li>i965/fs: Remove the inline pack_double_2x32 optimization</li>
<li>anv: Add an invalidate_range helper</li>
<li>anv/query: clflush the bo map on non-LLC platforms</li>
<li>genxml: Make MI_STORE_DATA_IMM more consistent</li>
<li>anv/query: Perform CmdResetQueryPool on the GPU</li>
<li>blorp/exec: Use uint32_t for copying varying data</li>
<li>intel/blorp: Explicitly flush all allocated state</li>
<li>anv: Accurately advertise dynamic descriptor limits</li>
<li>anv: Properly handle destroying NULL devices and instances</li>
</ul>
<p>Jonas Pfeil (1):</p>
<ul>
<li>ralloc: Make sure ralloc() allocations match malloc()'s alignment.</li>
</ul>
<p>Jose Maria Casanova Crespo (1):</p>
<ul>
<li>glsl: non-last member unsized array on SSBO must fail compilation on GLSL ES 3.1</li>
</ul>
<p>Kenneth Graunke (7):</p>
<ul>
<li>i965: Fix fast depth clears for surfaces with a dimension of 16384.</li>
<li>i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.</li>
<li>i965: Fix check for negative pitch in can_do_fast_copy_blit().</li>
<li>i965: Support the force_glsl_version driconf option.</li>
<li>i965: Combine the Gen6 SF and Clip viewport atoms.</li>
<li>mesa: Do (TCS &amp;&amp; !TES) draw time validation in ES as well.</li>
<li>egl: Ensure ResetNotificationStrategy matches for shared contexts.</li>
</ul>
<p>Lionel Landwerlin (3):</p>
<ul>
<li>spirv: don't assert with location decorations on non i/o variables</li>
<li>anv: wsi: report presentation error per image request</li>
<li>i965/fs: fix uninitialized memory access</li>
</ul>
<p>Marc Di Luzio (1):</p>
<ul>
<li>glsl: correct compute shader checks for memoryBarrier functions</li>
</ul>
<p>Marek Olšák (10):</p>
<ul>
<li>st/mesa: destroy pipe_context before destroying st_context (v2)</li>
<li>radeonsi: don't invoke DCC decompression in update_all_texture_descriptors</li>
<li>radeonsi: fix UNSIGNED_BYTE index buffer fallback with non-zero start (v2)</li>
<li>gallium/util: remove unused u_index_modify helpers</li>
<li>gallium/u_index_modify: don't add PIPE_TRANSFER_UNSYNCHRONIZED unconditionally</li>
<li>gallium/u_queue: fix random crashes when the app calls exit()</li>
<li>st/mesa: reset sample_mask, min_sample, and render_condition for PBO ops</li>
<li>st/mesa: set blend state for PBO readbacks</li>
<li>radeonsi: fix broken tessellation on Carrizo and Stoney</li>
<li>radeonsi: mark all bound shader buffer ranges as initialized</li>
</ul>
<p>Matt Turner (1):</p>
<ul>
<li>clover: Work around build failure with AltiVec.</li>
</ul>
<p>Nicolai Hähnle (12):</p>
<ul>
<li>mesa/main: fix meta caller of _mesa_ClampColor</li>
<li>radeonsi: fix texture gather on stencil textures</li>
<li>glsl: split DIV_TO_MUL_RCP into single- and double-precision flags</li>
<li>glx/dri3: handle NULL pointers in loader-to-DRI3 drawable conversion</li>
<li>glx/dri3: guard in_current_context against a disappeared drawable</li>
<li>glx: guard swap-interval functions against destroyed drawables</li>
<li>dri/common: clear the loaderPrivate pointer in driDestroyDrawable</li>
<li>winsys/amdgpu: reduce max_alloc_size based on GTT limits</li>
<li>radeonsi: handle MultiDrawIndirect in si_get_draw_start_count</li>
<li>radeonsi: fix UINT/SINT clamping for 10-bit formats on &lt;= CIK</li>
<li>st/glsl_to_tgsi: avoid iterating past the head of the instruction list</li>
<li>st/mesa: inform the driver of framebuffer changes before compute dispatches</li>
</ul>
<p>Samuel Iglesias Gonsálvez (6):</p>
<ul>
<li>glsl: fix heap-use-after-free in ast_declarator_list::hir()</li>
<li>i965/fs: mark last DF uniform array element as 64 bit live one</li>
<li>i965/fs: detect different bit size accesses to uniforms to push them in proper locations</li>
<li>i965/fs: fix indirect load DF uniforms on BSW/BXT</li>
<li>i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles</li>
<li>i965/fs: emit MOV_INDIRECT with the source with the right register type</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>winsys/amdgpu: avoid potential segfault in amdgpu_bo_map()</li>
</ul>
</div>
</body>
</html>

View File

@@ -31,8 +31,7 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
e819bd3e515dac26faf9836d8f27a4ddf05323b9b23afb6c06536d4ac82e2743 mesa-17.0.1.tar.gz
96fd70ef5f31d276a17e424e7e1bb79447ccbbe822b56844213ef932e7ad1b0c mesa-17.0.1.tar.xz
TBD
</pre>

View File

@@ -1,185 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.2 Release Notes / March 20, 2017</h1>
<p>
Mesa 17.0.2 is a bug fix release which fixes bugs found since the 17.0.1 release.
</p>
<p>
Mesa 17.0.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
2e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5 mesa-17.0.2.tar.gz
f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4 mesa-17.0.2.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68504">Bug 68504</a> - 9.2-rc1 workaround for clover build failure on ppc/altivec: cannot convert 'bool' to '__vector(4) __bool int' in return</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97988">Bug 97988</a> - [radeonsi] playing back videos with VDPAU exhibits deinterlacing/anti-aliasing issues not visible with VA-API</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99484">Bug 99484</a> - Crusader Kings 2 - Loading bars, siege bars, morale bars, etc. do not render correctly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99715">Bug 99715</a> - Don't print: &quot;Note: Buggy applications may crash, if they do please report to vendor&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100049">Bug 100049</a> - &quot;ralloc: Make sure ralloc() allocations match malloc()'s alignment.&quot; causes seg fault in 32bit build</li>
</ul>
<h2>Changes</h2>
<p>Alex Smith (3):</p>
<ul>
<li>radv: Emit pending flushes before executing a secondary command buffer</li>
<li>radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer</li>
<li>radv/ac: Fix shared memory offset calculation</li>
</ul>
<p>Bas Nieuwenhuizen (3):</p>
<ul>
<li>radv: Disable HTILE for textures with multiple layers/levels.</li>
<li>radv: Emit cache flushes before CP DMA.</li>
<li>Revert "radv: Emit cache flushes before CP DMA."</li>
</ul>
<p>Dave Airlie (3):</p>
<ul>
<li>radv: drop Z24 support.</li>
<li>radv: disable mip point pre clamping.</li>
<li>radv: setup llvm target data layout</li>
</ul>
<p>Emil Velikov (4):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.1</li>
<li>cherry-ignore: add the swizzle blorp_clear fix</li>
<li>i965: move brw_define.h ifndef guard to the top</li>
<li>Update version to 17.0.2</li>
</ul>
<p>Fredrik Höglund (2):</p>
<ul>
<li>radv: fix the dynamic buffer index in vkCmdBindDescriptorSets</li>
<li>radv/ac: fix multiple descriptor sets with dynamic buffers</li>
</ul>
<p>Gregory Hainaut (1):</p>
<ul>
<li>glapi: fix typo in count_scale</li>
</ul>
<p>Ilia Mirkin (2):</p>
<ul>
<li>nvc0: take extra pushbuf space into account for pushbuf_space calls</li>
<li>nvc0: increase alignment to 256 for texture buffers on fermi</li>
</ul>
<p>Jacob Lifshay (1):</p>
<ul>
<li>vulkan/wsi: Improve the DRI3 error message</li>
</ul>
<p>James Legg (1):</p>
<ul>
<li>radv: Fix using more than 4 bound descriptor sets</li>
</ul>
<p>Jason Ekstrand (7):</p>
<ul>
<li>anv/blorp/clear_subpass: Only set surface clear color for fast clears</li>
<li>anv: Accurately advertise dynamic descriptor limits</li>
<li>anv: Stall before fast-clear operations</li>
<li>anv: Properly handle destroying NULL devices and instances</li>
<li>anv/blorp: Turn off AUX after doing a CCS_D resolve</li>
<li>anv/blorp: Only set a clear color for resolves if fast-cleared</li>
<li>nir/intrinsics: Make load_barycentric_input take a 2-component coor</li>
</ul>
<p>Jonas Pfeil (1):</p>
<ul>
<li>ralloc: Make sure ralloc() allocations match malloc()'s alignment.</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>egl: Ensure ResetNotificationStrategy matches for shared contexts.</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>st/mesa: reset sample_mask, min_sample, and render_condition for PBO ops</li>
<li>st/mesa: set blend state for PBO readbacks</li>
<li>radeonsi: mark all bound shader buffer ranges as initialized</li>
</ul>
<p>Matt Turner (1):</p>
<ul>
<li>clover: Work around build failure with AltiVec.</li>
</ul>
<p>Nanley Chery (2):</p>
<ul>
<li>anv/pass: Avoid accessing attachment array out of bounds</li>
<li>anv/image: Remove extra dependency on HiZ-specific variable</li>
</ul>
<p>Nicolai Hähnle (2):</p>
<ul>
<li>st/glsl_to_tgsi: avoid iterating past the head of the instruction list</li>
<li>st/mesa: inform the driver of framebuffer changes before compute dispatches</li>
</ul>
<p>Robert Foss (1):</p>
<ul>
<li>mesa: Avoid read of uninitialized variable</li>
</ul>
<p>Samuel Iglesias Gonsálvez (5):</p>
<ul>
<li>i965/fs: mark last DF uniform array element as 64 bit live one</li>
<li>i965/fs: detect different bit size accesses to uniforms to push them in proper locations</li>
<li>i965/fs: fix indirect load DF uniforms on BSW/BXT</li>
<li>i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles</li>
<li>i965/fs: emit MOV_INDIRECT with the source with the right register type</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radeonsi: disable sinking common instructions down to the end block</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,189 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.0.3 Release Notes / April 1, 2017</h1>
<p>
Mesa 17.0.3 is a bug fix release which fixes bugs found since the 17.0.2 release.
</p>
<p>
Mesa 17.0.3 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
8253edf1bdd7b14ab63d5982349143a5c9ac3767f39a63257cc9d7e7d92f60f1 mesa-17.0.3.tar.gz
ca646f5075a002d60ef9123c8a4331cede155c01712ef945a65c59a5e69fe7ed mesa-17.0.3.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=96743">Bug 96743</a> - [BYT, HSW, SKL, BXT, KBL] GPU hangs with GfxBench 4.0 CarChase</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99246">Bug 99246</a> - [d3dadapter+radeonsi &amp; bisect] EVE-Online : hang on wormhole sight</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100061">Bug 100061</a> - LODQ instruction generated with invalid dst mask</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100182">Bug 100182</a> - Flickering in The Talos Principle on Sky Lake GT4.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100201">Bug 100201</a> - Windows scons build with MSVC toolchain and LLVM 4.0 fails</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (1):</p>
<ul>
<li>radeonsi: add new polaris12 pci id</li>
</ul>
<p>Andres Gomez (5):</p>
<ul>
<li>glsl: on UBO/SSBOs link error reset the number of active blocks to 0</li>
<li>cherry-ignore: add the Invalidate L2 for TRANSFER_WRITE barriers fix</li>
<li>cherry-ignore: add the Flush after unmap in gbm/dri fix</li>
<li>cherry-ignore: corrected typo in the Flush after unmap in gbm/dri fix</li>
<li>Update version to 17.0.3</li>
</ul>
<p>Axel Davy (2):</p>
<ul>
<li>st/nine: Resolve deadlock in surface/volume dtors when using csmt</li>
<li>st/nine: Use atomics for available_texture_mem</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: flush DB cache before and after HTILE decompress.</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>radv: fix primitive reset index emission</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.0.2</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>st/mesa: set result writemask based on ir type</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>clover: use pipe_resource references</li>
</ul>
<p>Jason Ekstrand (9):</p>
<ul>
<li>anv/query: Invalidate the correct range</li>
<li>anv/GetQueryPoolResults: Actually implement the spec</li>
<li>anv/image: Return early when unbinding an image</li>
<li>anv/query: Fix the location of timestamp availability</li>
<li>anv: Make anv_get_layerCount a macro</li>
<li>anv/blorp: Use anv_get_layerCount everywhere</li>
<li>anv/cmd_buffer: Apply flush operations prior to executing secondaries</li>
<li>anv/cmd_buffer: Fix bad indentation</li>
<li>anv: Flush caches prior to PIPELINE_SELECT on all gens</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>c11/threads: Include thr/xtimec.h for xtime definition when building with MSVC.</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>tests/cache_test: allow crossing mount points</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nvc0/ir: treat FMA like MAD for operand propagation</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi: don't hang on shader compile failure</li>
</ul>
<p>Matt Turner (1):</p>
<ul>
<li>i965/fs: Don't emit SEL instructions for type-converting MOVs.</li>
</ul>
<p>Nanley Chery (1):</p>
<ul>
<li>intel: Correct the BDW surface state size</li>
</ul>
<p>Nicolai Hähnle (1):</p>
<ul>
<li>mesa/main: fix MultiDrawElements[BaseVertex] validation of primcount</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno: fix memory leak</li>
</ul>
<p>Tim Rowley (1):</p>
<ul>
<li>swr: [rasterizer jitter] fix llvm &gt;= 5.0 build break</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>glsl: fix lower jumps for returns when loop is inside an if</li>
<li>mesa: update lower_jumps tests after bug fix</li>
</ul>
<p>Topi Pohjolainen (1):</p>
<ul>
<li>i965/gen8+: Do full stall when switching pipeline</li>
</ul>
<p>Xu Randy (2):</p>
<ul>
<li>anv/blorp: Fix a crash in CmdClearColorImage</li>
<li>anv/genX: Solve the vkCreateGraphicsPipelines crash</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,81 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.1.0 Release Notes / TBD</h1>
<p>
Mesa 17.1.0 is a new development release.
People who are concerned with stability and reliability should stick
with a previous release or wait for Mesa 17.1.1.
</p>
<p>
Mesa 17.1.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD.
</pre>
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>OpenGL 4.2 on i965/ivb</li>
<li>GL_ARB_gpu_shader_fp64 on i965/ivybridge</li>
<li>GL_ARB_gpu_shader_int64 on i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe</li>
<li>GL_ARB_shader_ballot on nvc0, radeonsi</li>
<li>GL_ARB_shader_clock on nv50, nvc0, radeonsi</li>
<li>GL_ARB_shader_group_vote on radeonsi</li>
<li>GL_ARB_shader_precision on i965/ivb</li>
<li>GL_ARB_shader_viewport_layer_array on radeonsi</li>
<li>GL_ARB_sparse_buffer on radeonsi/CIK+</li>
<li>GL_ARB_transform_feedback2 on i965/gen6</li>
<li>GL_ARB_transform_feedback_overflow_query on i965/gen6+</li>
<li>GL_ARB_vertex_attrib_64bit on i965/ivb</li>
<li>GL_NV_fill_rectangle on nvc0</li>
<li>Geometry shaders enabled on swr</li>
</ul>
<h2>Bug fixes</h2>
<ul>
</ul>
<h2>Changes</h2>
<ul>
<li>Removed the ilo gallium driver.</li>
<li>The configure option --enable-gallium-llvm is superseded by --enable-llvm.</li>
<li>The swr driver now requires LLVM &gt;= 3.9.0 and a C++14 capable compiler.</li>
<li>The radeonsi driver now requires LLVM 3.8.0.</li>
<li>The MESA_GLSL=opt and MESA_GLSL=no_opt environment vars have been removed.</li>
<li>The --with-egl-platforms configure option is deprecated. Use --with-platforms instead.</li>
</ul>
</div>
</body>
</html>

View File

@@ -57,7 +57,7 @@ copy texturing).
<li>New Intel i965 DRI driver
<li>New <code>minstall</code> script to replace normal install program
<li>Faster fragment program execution in software
<li>Added (or fixed) support for <a href="https://www.khronos.org/registry/OpenGL/extensions/SGI/GLX_SGI_make_current_read.txt">
<li>Added (or fixed) support for <a href="http://www.opengl.org/registry/specs/SGI/make_current_read.txt">
GLX_SGI_make_current_read</a> to the following drivers:
<ul>
<li>radeon</li>

View File

@@ -226,7 +226,7 @@ did not exist in the 7.10 release series at all.</p>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=36086">Bug 36086</a> - [wine] Segfault r300_resource_copy_region with some wine apps and RADEON_HYPERZ</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=36182">Bug 36182</a> - Game Trine from https://www.humblebundle.com/ needs ATI_draw_buffers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=36182">Bug 36182</a> - Game Trine from http://www.humblebundle.com/ needs ATI_draw_buffers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=36268">Bug 36268</a> - [r300g, bisected] minor flickering in Unigine Sanctuary</li>

View File

@@ -21,7 +21,7 @@ Mesa 7.5.1 is a bug-fix release fixing issues found since the 7.5 release.
</p>
<p>
The main new feature of Mesa 7.5.x is the
<a href="https://www.freedesktop.org/wiki/Software/gallium">Gallium3D</a> infrastructure.
<a href="http://wiki.freedesktop.org/wiki/Software/gallium">Gallium3D</a> infrastructure.
</p>
<p>
Mesa 7.5.1 implements the OpenGL 2.1 API, but the version reported by

View File

@@ -21,7 +21,7 @@ Mesa 7.5.2 is a bug-fix release fixing issues found since the 7.5.1 release.
</p>
<p>
The main new feature of Mesa 7.5.x is the
<a href="https://www.freedesktop.org/wiki/Software/gallium">Gallium3D</a> infrastructure.
<a href="http://wiki.freedesktop.org/wiki/Software/gallium">Gallium3D</a> infrastructure.
</p>
<p>
Mesa 7.5.2 implements the OpenGL 2.1 API, but the version reported by

View File

@@ -23,7 +23,7 @@ with the 7.4.x branch or wait for Mesa 7.5.1.
</p>
<p>
The main new feature of Mesa 7.5 is the
<a href="https://www.freedesktop.org/wiki/Software/gallium">Gallium3D</a> infrastructure.
<a href="http://wiki.freedesktop.org/wiki/Software/gallium">Gallium3D</a> infrastructure.
</p>
<p>
Mesa 7.5 implements the OpenGL 2.1 API, but the version reported by

View File

@@ -90,7 +90,7 @@ The two supported build methods are now autoconf/automake and SCons.
<li>Removed support for GL_ARB_shadow_ambient extension</li>
<li>Removed Gallium3D - nvfx driver (use nv30 instead)</li>
<li>
libGLU has been moved into its own repository, found at <a href="https://cgit.freedesktop.org/mesa/glu/">https://cgit.freedesktop.org/mesa/glu/</a>
libGLU has been moved into its own repository, found at <a href="http://cgit.freedesktop.org/mesa/glu/">http://cgit.freedesktop.org/mesa/glu/</a>
</li>
</ul>

View File

@@ -68,9 +68,9 @@ b1ae5a4d9255953980bc9254f5323420 MesaLib-9.1.2.zip
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=62434">Bug 62434</a> - [bisected] 3284.073] (EE) AIGLX error: dlopen of /usr/lib/xorg/modules/dri/r600_dri.so failed (/usr/lib/libllvmradeon9.2.0.so: undefined symbol: lp_build_tgsi_intrinsic)</li>
<li><a href="https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=349437">Debian bug #349437</a> - mesa - FTBFS: error: 'IEEE_ONE' undeclared</li>
<li><a href="http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=349437">Debian bug #349437</a> - mesa - FTBFS: error: 'IEEE_ONE' undeclared</li>
<li><a href="https://bugzilla.redhat.com/show_bug.cgi?id=918661">Redhat bug #918661</a> - crash in routine Avogadro UI manipulation</li>
<li><a href="http://bugzilla.redhat.com/show_bug.cgi?id=918661">Redhat bug #918661</a> - crash in routine Avogadro UI manipulation</li>
</ul>

View File

@@ -17,13 +17,13 @@
<h1>Code Repository</h1>
<p>
Mesa uses <a href="https://git-scm.com">git</a>
Mesa uses <a href="http://git-scm.com">git</a>
as its source code management system.
</p>
<p>
The master git repository is hosted on
<a href="https://www.freedesktop.org">freedesktop.org</a>.
<a href="http://www.freedesktop.org">freedesktop.org</a>.
</p>
<p>
@@ -35,9 +35,9 @@ You may access the repository either as an
<p>
You may also
<a href="https://cgit.freedesktop.org/mesa/mesa/"
<a href="http://cgit.freedesktop.org/mesa/mesa/"
>browse the main Mesa git repository</a> and the
<a href="https://cgit.freedesktop.org/mesa/demos"
<a href="http://cgit.freedesktop.org/mesa/demos"
>Mesa demos and tests git repository</a>.
</p>
@@ -73,7 +73,7 @@ follow this procedure:
</p>
<ol>
<li>Subscribe to the
<a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev">mesa-dev</a>
<a href="http://lists.freedesktop.org/mailman/listinfo/mesa-dev">mesa-dev</a>
mailing list.
<li>Start contributing to the project by
<a href="submittingpatches.html" target="_parent">submitting patches</a> to
@@ -92,7 +92,7 @@ only if they're being supervised by another Mesa developer at the same
organization and planning to work in a limited area of the code or on a
separate branch.
<li>To apply for an account, follow
<a href="https://www.freedesktop.org/wiki/AccountRequests">these directions</a>.
<a href="http://www.freedesktop.org/wiki/AccountRequests">these directions</a>.
It's also appreciated if you briefly describe what you intend to do (work
on a particular driver, add a new extension, etc.) in the bugzilla record.
</ol>
@@ -121,7 +121,7 @@ Once your account is established:
<h2>Windows Users</h2>
<p>
If you're <a href="https://git.wiki.kernel.org/index.php/WindowsInstall">
If you're <a href="http://git.wiki.kernel.org/index.php/WindowsInstall">
using git on Windows</a> you'll want to enable automatic CR/LF conversion in
your local copy of the repository:
</p>
@@ -144,7 +144,7 @@ Unix users don't need to set this option.
<p>
At any given time, there may be several active branches in Mesa's
repository.
Generally, <tt>master</tt> contains the latest development (unstable)
Generally, the trunk contains the latest development (unstable)
code while a branch has the latest stable code.
</p>
@@ -235,7 +235,7 @@ If you want the rebase action to be the default action, then
git config --global branch.autosetuprebase=always
</pre>
<p>
See <a href="https://www.eecs.harvard.edu/~cduan/technical/git/">Understanding Git Conceptually</a> for a fairly clear explanation about all of this.
See <a href="http://www.eecs.harvard.edu/~cduan/technical/git/">Understanding Git Conceptually</a> for a fairly clear explanation about all of this.
</p>
</ol>

View File

@@ -18,7 +18,7 @@
<p>
This page describes the features and status of Mesa's support for the
<a href="https://opengl.org/documentation/glsl/">
<a href="http://opengl.org/documentation/glsl/">
OpenGL Shading Language</a>.
</p>
@@ -49,7 +49,8 @@ execution. These are generally used for debugging.
<li><b>log</b> - log all GLSL shaders to files.
The filenames will be "shader_X.vert" or "shader_X.frag" where X
the shader ID.
<li><b>cache_info</b> - print debug information about shader cache
<li><b>nopt</b> - disable compiler optimizations
<li><b>opt</b> - force compiler optimizations
<li><b>uniform</b> - print message to stdout when glUniform is called
<li><b>nopvert</b> - force vertex shaders to be a simple shader that just transforms
the vertex position with ftransform() and passes through the color and
@@ -220,7 +221,7 @@ regressions.
</p>
<p>
The <a href="https://piglit.freedesktop.org/">Piglit</a> project
The <a href="http://piglit.freedesktop.org/">Piglit</a> project
has many GLSL tests.
</p>

View File

@@ -31,7 +31,7 @@ the <code>doxygen</code> directory and run <code>make</code>.
<p>
For an example of Doxygen usage in Mesa, see a recent source file
such as <a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/main/bufferobj.c">bufferobj.c</a>.
such as <a href="http://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/main/bufferobj.c">bufferobj.c</a>.
</p>
@@ -41,11 +41,6 @@ run the doxygen scripts, you can read the documentation
<a href="../doxygen/main/index.html">here</a>
</p>
<p>
Gallium is also documented using Sphinx. The generated output can be found
<a href="https://gallium.readthedocs.io">on Gallium.ReadTheDocs.io</a>.
</p>
</div>
</body>
</html>

View File

@@ -31,7 +31,7 @@ each directory.
<ul>
<li><b>glsl</b> - the GLSL IR and compiler
<li><b>nir</b> - the NIR IR and compiler
<li><b>spirv</b> - the SPIR-V compiler
<li><b>spriv</b> - the SPIR-V compiler
</ul>
<li><b>egl</b> - EGL library sources
<ul>

View File

@@ -1,98 +0,0 @@
Name
MESA_drm_image_formats
Name Strings
EGL_MESA_drm_image_formats
Contributors
Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Qiang Yu <Qiang.Yu@amd.com>
Contact
Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Status
Proposal
Version
Version 1, January 26, 2017
Number
EGL Extension #??
Dependencies
This extension requires the EGL_MESA_drm_image extension.
This extension is written against the wording of EGL_MESA_drm_image
specification.
Overview
This extension extends the functionality of EGL_MESA_drm_image by adding
additional formats required by Glamor for use with DRM buffers.
IP Status
Open-source; freely implementable.
New Procedures and Functions
None
New Tokens
Accepted as values for the EGL_IMAGE_FORMAT_MESA attribute:
EGL_DRM_BUFFER_FORMAT_ARGB2101010_MESA 0x3290
EGL_DRM_BUFFER_FORMAT_ARGB1555_MESA 0x3291
EGL_DRM_BUFFER_FORMAT_RGB565_MESA 0x3292
Additions to the EGL_MESA_drm_image Specification:
Remove the sentence "The only format specified ..." from the paragraph
describing eglCreateDRMImageMESA and add the following paragraph:
The formats specified for use with EGL_DRM_BUFFER_FORMAT_MESA are:
* EGL_DRM_BUFFER_FORMAT_ARGB32_MESA, where each pixel is a CPU-endian
32-bit quantity, with alpha in the upper 8 bits, then red, then green,
then blue,
* EGL_DRM_BUFFER_FORMAT_ARGB2101010_MESA, where each pixel is a CPU-
endian, 32-bit quantity, with alpha in the most significant 2 bits,
followed by 10 bits each for red, green, and blue,
* EGL_DRM_BUFFER_FORMAT_ARGB1555_MESA, where each pixel is a CPU-endian
16-bit quantity, with alpha in the most significant bit, followed by
5 bits each for red, green, and blue, and
* EGL_DRM_BUFFER_FORMAT_RGB565_MESA, where each pixel is a CPU-endian
16-bit quantity, with red in the 5 most significant bits, followed by
6 bits of green and 5 bits of blue.
Issues
1. Should we expose the full set of channel permutations for the formats,
e.g. ABGR2101010, RGBA1010102, and BGRA1010102 in addition to
ARGB2101010?
RESOLVED: No.
DISCUSSION: The original extension sets a precedent of only exposing one
of the possible permutations of 8-bit channel formats. It is also not
clear where the additional permutations would be used. For example,
Glamor has a fixed mapping from pixmap/screen depth to format that
doesn't allow for the other permutations.
Revision History
Version 1, January, 2017
Initial draft (Nicolai Hähnle)

View File

@@ -20,11 +20,11 @@ Status
Version
Version 3, March 31, 2017
Version 2, July 7, 2016
Number
OpenGL Extension #495
TBD
Dependencies
@@ -34,7 +34,7 @@ Dependencies
This extension is written against Version 1.50 (Revision 09) of the OpenGL
Shading Language Specification.
GLSL 1.30 (OpenGL) or GLSL ES 3.00 (OpenGL ES) is required.
GLSL 1.30 is required.
This extension interacts with ARB_gpu_shader5.
@@ -51,10 +51,9 @@ Overview
calculations).
This extension provides a set of new features to the OpenGL Shading
Language to support capabilities of these GPUs, extending the
capabilities of version 1.30 of the OpenGL Shading Language and version
3.00 of the OpenGL ES Shading Language. Shaders using the new
functionality provided by this extension should enable this
Language to support capabilities of these GPUs, extending the capabilities
of version 1.30 of the OpenGL Shading Language. Shaders
using the new functionality provided by this extension should enable this
functionality via the construct
#extension GL_MESA_shader_integer_functions : require (or enable)
@@ -517,6 +516,5 @@ Revision History
Rev. Date Author Changes
---- ----------- -------- -----------------------------------------
3 31-Mar-2017 Jon Leech Add ES support (OpenGL-Registry/issues/3)
2 7-Jul-2016 idr Fix typo in #extension line
1 20-Jun-2016 idr Initial version based on GL_ARB_gpu_shader5.

View File

@@ -76,9 +76,9 @@ Overview
References:
https://www.opengl.org/discussion_boards/cgi_directory/ultimatebb.cgi?ubb=get_topic;f=3;t=011557
https://www.opengl.org/discussion_boards/cgi_directory/ultimatebb.cgi?ubb=get_topic;f=3;t=000516
https://www.opengl.org/discussion_boards/cgi_directory/ultimatebb.cgi?ubb=get_topic;f=3;t=011903
http://www.opengl.org/discussion_boards/cgi_directory/ultimatebb.cgi?ubb=get_topic;f=3;t=011557
http://www.opengl.org/discussion_boards/cgi_directory/ultimatebb.cgi?ubb=get_topic;f=3;t=000516
http://www.opengl.org/discussion_boards/cgi_directory/ultimatebb.cgi?ubb=get_topic;f=3;t=011903
http://www.delphi3d.net/articles/viewarticle.php?article=terraintex.htm
New Procedures and Functions

View File

@@ -1,10 +1,10 @@
The definitive source for enum values and reserved ranges are the XML files in
the Khronos registry:
https://github.com/KhronosGroup/EGL-Registry/blob/master/api/egl.xml
https://github.com/KhronosGroup/OpenGL-Registry/blob/master/xml/gl.xml
https://github.com/KhronosGroup/OpenGL-Registry/blob/master/xml/glx.xml
https://github.com/KhronosGroup/OpenGL-Registry/blob/master/xml/wgl.xml
https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/egl.xml
https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/gl.xml
https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/glx.xml
https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/wgl.xml
GL blocks allocated to Mesa:
0x8750-0x875F
@@ -76,11 +76,6 @@ EGL_MESA_platform_gbm
EGL_MESA_platform_surfaceless
EGL_PLATFORM_SURFACELESS_MESA 0x31DD
EGL_MESA_drm_image
EGL_DRM_BUFFER_FORMAT_ARGB2101010_MESA 0x3290
EGL_DRM_BUFFER_FORMAT_ARGB1555_MESA 0x3291
EGL_DRM_BUFFER_FORMAT_RGB565_MESA 0x3292
EGL_WL_bind_wayland_display
EGL_TEXTURE_FORMAT 0x3080
EGL_WAYLAND_BUFFER_WL 0x31D5

View File

@@ -25,7 +25,6 @@
<li><a href="#reviewing">Reviewing Patches</a>
<li><a href="#nominations">Nominating a commit for a stable branch</a>
<li><a href="#criteria">Criteria for accepting patches to the stable branch</a>
<li><a href="#backports">Sending backports for the stable branch</a>
<li><a href="#gittips">Git tips</a>
</ul>
@@ -73,16 +72,11 @@ if needed. For example:
platform.
</pre>
<li>A "Signed-off-by:" line is not required, but not discouraged either.
<li>If a patch addresses a bugzilla issue, that should be noted in the
<li>If a patch address a bugzilla issue, that should be noted in the
patch comment. For example:
<pre>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
</pre>
<li>If a patch addresses a issue introduced with earlier commit, that should be
noted in the patch comment. For example:
<pre>
Fixes: d7b3707c612 "util/disk_cache: use stat() to check if entry is a directory"
</pre>
<li>If there have been several revisions to a patch during the review
process, they should be noted such as in this example:
<pre>
@@ -120,7 +114,7 @@ them in the CC list.
Please use common sense and do <strong>not</strong> blindly add everyone.
<br>
<pre>
$ scripts/get_reviewer.pl --help # to get the help screen
$ scripts/get_reviewer.pl --help # to get the the help screen
$ scripts/get_reviewer.pl -f src/egl/drivers/dri2/platform_android.c
Rob Herring <robh@kernel.org> (reviewer:ANDROID EGL SUPPORT,added_lines:188/700=27%,removed_lines:58/283=20%)
Tomasz Figa <tfiga@chromium.org> (reviewer:ANDROID EGL SUPPORT,authored:12/41=29%,added_lines:308/700=44%,removed_lines:115/283=41%)
@@ -146,7 +140,7 @@ to update the tests themselves.
<p>
Whenever possible and applicable, test the patch with
<a href="https://piglit.freedesktop.org">Piglit</a> and/or
<a href="http://piglit.freedesktop.org">Piglit</a> and/or
<a href="https://android.googlesource.com/platform/external/deqp/">dEQP</a>
to check for regressions.
</p>
@@ -179,16 +173,6 @@ When submitting follow-up patches you should also login to
state of your old patches to Superseded.
</p>
<p>
Some companies' mail server automatically append a legal disclaimer,
usually containing something along the lines of "The information in this
email is confidential" and "distribution is strictly prohibited".<br/>
These legal notices prevent us from being able to accept your patch,
rendering the whole process pointless. Please make sure these are
disabled before sending your patches. (Note that you may need to contact
your email administrator for this.)
</p>
<h2 id="reviewing">Reviewing Patches</h2>
<p>
@@ -221,7 +205,7 @@ as the issues are resolved first.
<h2 id="nominations">Nominating a commit for a stable branch</h2>
<p>
There are three ways to nominate a patch for inclusion in the stable branch and
There are three ways to nominate patch for inclusion of the stable branch and
release.
</p>
<ul>
@@ -248,16 +232,22 @@ Here are some examples of such a note:
</p>
<ul>
<li>CC: &lt;mesa-stable@lists.freedesktop.org&gt;</li>
<li>CC: "9.2 10.0" &lt;mesa-stable@lists.freedesktop.org&gt;</li>
<li>CC: "10.0" &lt;mesa-stable@lists.freedesktop.org&gt;</li>
</ul>
Simply adding the CC to the mesa-stable list address is adequate to nominate
the commit for all the active stable branches. If the commit is not applicable
for said branch the stable-release manager will reply stating so.
the commit for the most-recently-created stable branch. It is only necessary
to specify a specific branch name, (such as "9.2 10.0" or "10.0" in the
examples above), if you want to nominate the commit for an older stable
branch. And, as in these examples, you can nominate the commit for the older
branch in addition to the more recent branch, or nominate the commit
exclusively for the older branch.
This "CC" syntax for patch nomination will cause patches to automatically be
copied to the mesa-stable@ mailing list when you use "git send-email" to send
patches to the mesa-dev@ mailing list. If you prefer using --suppress-cc that
won't have any negative effect on the patch nomination.
won't have any effect negative effect on the patch nomination.
<p>
Note: by removing the tag [as the commit is pushed] the patch is
@@ -266,60 +256,18 @@ Note: by removing the tag [as the commit is pushed] the patch is
Thus, drop the line <strong>only</strong> if you want to cancel the nomination.
</p>
Alternatively, if one uses the "Fixes" tag as described in the "Patch formatting"
section, it nominates a commit for all active stable branches that include the
commit that is referred to.
<h2 id="criteria">Criteria for accepting patches to the stable branch</h2>
Mesa has a designated release manager for each stable branch, and the release
manager is the only developer that should be pushing changes to these branches.
Everyone else should nominate patches using the mechanism described above.
manager is the only developer that should be pushing changes to these
branches. Everyone else should simply nominate patches using the mechanism
described above.
The following rules define which patches are accepted and which are not. The
stable-release manager is also given broad discretion in rejecting patches
that have been nominated.
<ul>
<li>Patch must conform with the <a href="#guidelines">Basic guidelines</a></li>
<li>Patch must have landed in master first. In case where the original
patch is too large and/or otherwise contradicts with the rules set within, a
backport is appropriate.</li>
<li>It must not introduce a regression - be that build or runtime wise.
Note: If the regression is due to faulty piglit/dEQP/CTS/other test the
latter must be fixed first. A reference to the offending test(s) and
respective fix(es) should be provided in the nominated patch.</li>
<li>Patch cannot be larger than 100 lines.</li>
<li>Patches that move code around with no functional change should be
rejected.</li>
<li>Patch must be a bug fix and not a new feature.
Note: An exception to this rule, are hardware-enabling "features". For
example, <a href="#backports">backports</a> of new code to support a
newly-developed hardware product can be accepted if they can be reasonably
determined not to have effects on other hardware.</li>
<li>Patch must be reviewed, For example, the commit message has Reviewed-by,
Signed-off-by, or Tested-by tags from someone but the author.</li>
<li>Performance patches are considered only if they provide information
about the hardware, program in question and observed improvement. Use numbers
to represent your measurements.</li>
</ul>
If the patch complies with the rules it will be
<a href="releasing.html#pickntest">cherry-picked</a>. Alternatively the release
manager will reply to the patch in question stating why the patch has been
rejected or would request a backport.
A summary of all the picked/rejected patches will be presented in the
<a href="releasing.html#prerelease">pre-release</a> announcement.
The stable-release manager will work with the list of nominated patches, and
for each patch that meets the criteria below will cherry-pick the patch with:
<code>git cherry-pick -x &lt;commit&gt;</code>. The <code>-x</code> option is
important so that the picked patch references the commit ID of the original
patch.
The stable-release manager may at times need to force-push changes to the
stable branches, for example, to drop a previously-picked patch that was later
@@ -327,15 +275,71 @@ identified as causing a regression). These force-pushes may cause changes to
be lost from the stable branch if developers push things directly. Consider
yourself warned.
<h2 id="backports">Sending backports for the stable branch</h2>
By default merge conflicts are resolved by the stable-release manager. In which
case he/she should provide a comment about the changes required, alongside the
<code>Conflicts</code> section. Summary of which will be provided in the
<a href="releasing.html#prerelease">pre-release</a> announcement.
<br>
Developers are interested in sending backports are recommended to use either a
<code>[BACKPORT #branch]</code> subject prefix or provides similar information
within the commit summary.
The stable-release manager is also given broad discretion in rejecting patches
that have been nominated for the stable branch. The most basic rule is that
the stable branch is for bug fixes only, (no new features, no
regressions). Here is a non-exhaustive list of some reasons that a patch may
be rejected:
<ul>
<li>Patch introduces a regression. Any reported build breakage or other
regression caused by a particular patch, (game no longer work, piglit test
changes from PASS to FAIL), is justification for rejecting a patch.</li>
<li>Patch is too large, (say, larger than 100 lines)</li>
<li>Patch is not a fix. For example, a commit that moves code around with no
functional change should be rejected.</li>
<li>Patch fix is not clearly described. For example, a commit message
of only a single line, no description of the bug, no mention of bugzilla,
etc.</li>
<li>Patch has not obviously been reviewed, For example, the commit message
has no Reviewed-by, Signed-off-by, nor Tested-by tags from anyone but the
author.</li>
<li>Patch has not already been merged to the master branch. As a rule, bug
fixes should never be applied first to a stable branch. Patches should land
first on the master branch and then be cherry-picked to a stable
branch. (This is to avoid future releases causing regressions if the patch
is not also applied to master.) The only things that might look like
exceptions would be backports of patches from master that happen to look
significantly different.</li>
<li>Patch depends on too many other patches. Ideally, all stable-branch
patches should be self-contained. It sometimes occurs that a single, logical
bug-fix occurs as two separate patches on master, (such as an original
patch, then a subsequent fix-up to that patch). In such a case, these two
patches should be squashed into a single, self-contained patch for the
stable branch. (Of course, if the squashing makes the patch too large, then
that could be a reason to reject the patch.)</li>
<li>Patch includes new feature development, not bug fixes. New OpenGL
features, extensions, etc. should be applied to Mesa master and included in
the next major release. Stable releases are intended only for bug fixes.
Note: As an exception to this rule, the stable-release manager may accept
hardware-enabling "features". For example, backports of new code to support
a newly-developed hardware product can be accepted if they can be reasonably
determined to not have effects on other hardware.</li>
<li>Patch is a performance optimization. As a rule, performance patches are
not candidates for the stable branch. The only exception might be a case
where an application's performance was recently severely impacted so as to
become unusable. The fix for this performance regression could then be
considered for a stable branch. The optimization must also be
non-controversial and the patches still need to meet the other criteria of
being simple and self-contained</li>
<li>Patch introduces a new failure mode (such as an assert). While the new
assert might technically be correct, for example to make Mesa more
conformant, this is not the kind of "bug fix" we want in a stable
release. The potential problem here is that an OpenGL program that was
previously working, (even if technically non-compliant with the
specification), could stop working after this patch. So that would be a
regression that is unacceptable for the stable branch.</li>
</ul>
<h2 id="gittips">Git tips</h2>

View File

@@ -36,10 +36,10 @@ Hardware drivers include:
<li>Intel i965, i945, i915.
See <a href="https://01.org/linuxgraphics">Intel's website</a></li>
<li>AMD Radeon series.
See <a href="https://www.x.org/wiki/RadeonFeature">RadeonFeature</a></li>
See <a href="http://www.x.org/wiki/RadeonFeature">RadeonFeature</a></li>
<li>NVIDIA GPUs.
See <a href="https://nouveau.freedesktop.org">Nouveau Wiki</a></li>
<li><a href="https://www.x.org/wiki/vmware">VMware virtual GPU</a></li>
See <a href="http://nouveau.freedesktop.org">Nouveau Wiki</a></li>
<li><a href="http://www.x.org/wiki/vmware">VMware virtual GPU</a></li>
</ul>
<p>
@@ -57,7 +57,7 @@ Additional driver information:
</p>
<ul>
<li><a href="https://dri.freedesktop.org/"> DRI hardware
<li><a href="http://dri.freedesktop.org/"> DRI hardware
drivers</a> for the X Window System
<li><a href="xlibdriver.html">Xlib / swrast driver</a> for the X Window System
and Unix-like operating systems

View File

@@ -24,7 +24,7 @@ This list is far from complete and somewhat dated, unfortunately.
<ul>
<li>Early Mesa development was done while Brian was part of the
<a href="https://www.ssec.wisc.edu/~billh/vis.html">
<a href="http://www.ssec.wisc.edu/~billh/vis.html">
SSEC Visualization Project</a> at the University of
Wisconsin. He'd like to thank Bill Hibbard for letting him work on
Mesa as part of that project.
@@ -40,9 +40,14 @@ Tungsten Graphics, Inc. have supported the ongoing development of Mesa.
<br>
<br>
<li>The
<a href="https://www.mesa3d.org">Mesa</a>
website and git repository are hosted by
<a href="https://freedesktop.org/">freedesktop.org</a>.
<a href="http://www.mesa3d.org">Mesa</a>
website is hosted by
<a href="http://sourceforge.net">sourceforge.net</a>.
<br>
<br>
<li>The Mesa git repository is hosted by
<a href="http://freedesktop.org/">freedesktop.org</a>.
<br>
<br>

View File

@@ -17,11 +17,11 @@
<h1>Development Utilities</h1>
<dl>
<dt><a href="https://cgit.freedesktop.org/mesa/demos">Mesa demos collection</a></dt>
<dt><a href="http://cgit.freedesktop.org/mesa/demos">Mesa demos collection</a></dt>
<dd>includes several utility routines in the <code>src/util/</code>
directory.</dd>
<dt><a href="https://piglit.freedesktop.org">Piglit</a></dt>
<dt><a href="http://piglit.freedesktop.org">Piglit</a></dt>
<dd>is an open-source test suite for OpenGL implementations.</dd>
<dt><a href="https://github.com/apitrace/apitrace">ApiTrace</a></dt>
@@ -31,7 +31,7 @@
<dd>is a very useful tool for tracking down
memory-related problems in your code.</dd>
<dt><a href="https://scan.coverity.com/projects/mesa">Coverity</a><dt>
<dt><a href="http://scan.coverity.com/projects/mesa">Coverity</a><dt>
<dd>provides static code analysis of Mesa. If you create an account
you can see the results and try to fix outstanding issues.</dd>
</dl>

View File

@@ -18,7 +18,7 @@
<p>
This page lists known issues with
<a href="https://www.spec.org/gwpg/gpc.static/vp11info.html" target="_main">SPEC Viewperf 11</a>
<a href="http://www.spec.org/gwpg/gpc.static/vp11info.html" target="_main">SPEC Viewperf 11</a>
and <a href="https://www.spec.org/gwpg/gpc.static/vp12info.html" target="_main">SPEC Viewperf 12</a>
when running on Mesa-based drivers.
</p>
@@ -66,10 +66,10 @@ either in Viewperf or the Mesa driver.
<p>
These tests use features of the
<a href="https://www.opengl.org/registry/specs/NV/fragment_program2.txt"
<a href="http://www.opengl.org/registry/specs/NV/fragment_program2.txt"
target="_main">
GL_NV_fragment_program2</a> and
<a href="https://www.opengl.org/registry/specs/NV/vertex_program3.txt"
<a href="http://www.opengl.org/registry/specs/NV/vertex_program3.txt"
target="_main">
GL_NV_vertex_program3</a> extensions without checking if the driver supports
them.
@@ -86,7 +86,7 @@ Subsequent drawing calls become no-ops and the rendering is incorrect.
<p>
These tests depend on the
<a href="https://www.opengl.org/registry/specs/NV/primitive_restart.txt"
<a href="http://www.opengl.org/registry/specs/NV/primitive_restart.txt"
target="_main">GL_NV_primitive_restart</a> extension.
</p>

View File

@@ -18,7 +18,7 @@
<p>
This page describes how to build, install and use the
<a href="https://www.vmware.com/">VMware</a> guest GL driver
<a href="http://www.vmware.com/">VMware</a> guest GL driver
(aka the SVGA or SVGA3D driver) for Linux using the latest source code.
This driver gives a Linux virtual machine access to the host's GPU for
hardware-accelerated 3D.
@@ -62,9 +62,9 @@ these instructions explain what to do.
For more information about the X components see these wiki pages at x.org:
</p>
<ul>
<li><a href="https://wiki.x.org/wiki/vmware">
<li><a href="http://wiki.x.org/wiki/vmware">
Driver Overview</a>
<li><a href="https://wiki.x.org/wiki/vmware/vmware3D">
<li><a href="http://wiki.x.org/wiki/vmware/vmware3D">
xf86-video-vmware Details</a>
</ul>
@@ -82,8 +82,8 @@ The components involved in this include:
<p>
All of these components reside in the guest Linux virtual machine.
On the host, all you're doing is running VMware
<a href="https://www.vmware.com/products/workstation/">Workstation</a> or
<a href="https://www.vmware.com/products/fusion/">Fusion</a>.
<a href="http://www.vmware.com/products/workstation/">Workstation</a> or
<a href="http://www.vmware.com/products/fusion/">Fusion</a>.
</p>

View File

@@ -171,8 +171,9 @@ drawn with glDrawPixels.
</p>
<p>
For more information about gamma correction, see the
<a href="https://en.wikipedia.org/wiki/Gamma_correction">Wikipedia article</a>
For more information about gamma correction see:
<a href="http://www.inforamp.net/~poynton/notes/colour_and_gamma/GammaFAQ.html">
the Gamma FAQ</a>
</p>

View File

@@ -6,7 +6,7 @@ extern "C" {
#endif
/*
** Copyright (c) 2013-2017 The Khronos Group Inc.
** Copyright (c) 2013-2014 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -31,14 +31,14 @@ extern "C" {
** This header is generated from the Khronos OpenGL / OpenGL ES XML
** API Registry. The current version of the Registry, generator scripts
** used to make the header, and the header can be found at
** http://www.opengl.org/registry/egl
** http://www.opengl.org/registry/
**
** Khronos $Revision$ on $Date$
** Khronos $Revision: 31039 $ on $Date: 2015-05-04 17:01:57 -0700 (Mon, 04 May 2015) $
*/
#include <EGL/eglplatform.h>
/* Generated on date 20161230 */
/* Generated on date 20150504 */
/* Generated C header for:
* API: egl
@@ -78,7 +78,7 @@ typedef void (*__eglMustCastToProperFunctionPointerType)(void);
#define EGL_CONFIG_ID 0x3028
#define EGL_CORE_NATIVE_ENGINE 0x305B
#define EGL_DEPTH_SIZE 0x3025
#define EGL_DONT_CARE EGL_CAST(EGLint,-1)
#define EGL_DONT_CARE ((EGLint)-1)
#define EGL_DRAW 0x3059
#define EGL_EXTENSIONS 0x3055
#define EGL_FALSE 0
@@ -95,9 +95,9 @@ typedef void (*__eglMustCastToProperFunctionPointerType)(void);
#define EGL_NONE 0x3038
#define EGL_NON_CONFORMANT_CONFIG 0x3051
#define EGL_NOT_INITIALIZED 0x3001
#define EGL_NO_CONTEXT EGL_CAST(EGLContext,0)
#define EGL_NO_DISPLAY EGL_CAST(EGLDisplay,0)
#define EGL_NO_SURFACE EGL_CAST(EGLSurface,0)
#define EGL_NO_CONTEXT ((EGLContext)0)
#define EGL_NO_DISPLAY ((EGLDisplay)0)
#define EGL_NO_SURFACE ((EGLSurface)0)
#define EGL_PBUFFER_BIT 0x0001
#define EGL_PIXMAP_BIT 0x0002
#define EGL_READ 0x305A
@@ -197,7 +197,7 @@ typedef void *EGLClientBuffer;
#define EGL_RGB_BUFFER 0x308E
#define EGL_SINGLE_BUFFER 0x3085
#define EGL_SWAP_BEHAVIOR 0x3093
#define EGL_UNKNOWN EGL_CAST(EGLint,-1)
#define EGL_UNKNOWN ((EGLint)-1)
#define EGL_VERTICAL_RESOLUTION 0x3091
EGLAPI EGLBoolean EGLAPIENTRY eglBindAPI (EGLenum api);
EGLAPI EGLenum EGLAPIENTRY eglQueryAPI (void);
@@ -224,7 +224,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglWaitClient (void);
#ifndef EGL_VERSION_1_4
#define EGL_VERSION_1_4 1
#define EGL_DEFAULT_DISPLAY EGL_CAST(EGLNativeDisplayType,0)
#define EGL_DEFAULT_DISPLAY ((EGLNativeDisplayType)0)
#define EGL_MULTISAMPLE_RESOLVE_BOX_BIT 0x0200
#define EGL_MULTISAMPLE_RESOLVE 0x3099
#define EGL_MULTISAMPLE_RESOLVE_DEFAULT 0x309A
@@ -266,7 +266,7 @@ typedef void *EGLImage;
#define EGL_FOREVER 0xFFFFFFFFFFFFFFFFull
#define EGL_TIMEOUT_EXPIRED 0x30F5
#define EGL_CONDITION_SATISFIED 0x30F6
#define EGL_NO_SYNC EGL_CAST(EGLSync,0)
#define EGL_NO_SYNC ((EGLSync)0)
#define EGL_SYNC_FENCE 0x30F9
#define EGL_GL_COLORSPACE 0x309D
#define EGL_GL_COLORSPACE_SRGB 0x3089
@@ -283,7 +283,7 @@ typedef void *EGLImage;
#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Z 0x30B7
#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Z 0x30B8
#define EGL_IMAGE_PRESERVED 0x30D2
#define EGL_NO_IMAGE EGL_CAST(EGLImage,0)
#define EGL_NO_IMAGE ((EGLImage)0)
EGLAPI EGLSync EGLAPIENTRY eglCreateSync (EGLDisplay dpy, EGLenum type, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglDestroySync (EGLDisplay dpy, EGLSync sync);
EGLAPI EGLint EGLAPIENTRY eglClientWaitSync (EGLDisplay dpy, EGLSync sync, EGLint flags, EGLTime timeout);

View File

@@ -6,7 +6,7 @@ extern "C" {
#endif
/*
** Copyright (c) 2013-2017 The Khronos Group Inc.
** Copyright (c) 2013-2016 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -31,14 +31,14 @@ extern "C" {
** This header is generated from the Khronos OpenGL / OpenGL ES XML
** API Registry. The current version of the Registry, generator scripts
** used to make the header, and the header can be found at
** http://www.opengl.org/registry/egl
** http://www.opengl.org/registry/
**
** Khronos $Revision$ on $Date$
*/
#include <EGL/eglplatform.h>
#define EGL_EGLEXT_VERSION 20161230
#define EGL_EGLEXT_VERSION 20160809
/* Generated C header for:
* API: egl
@@ -77,13 +77,6 @@ EGLAPI EGLSyncKHR EGLAPIENTRY eglCreateSync64KHR (EGLDisplay dpy, EGLenum type,
#define EGL_VG_ALPHA_FORMAT_PRE_BIT_KHR 0x0040
#endif /* EGL_KHR_config_attribs */
#ifndef EGL_KHR_context_flush_control
#define EGL_KHR_context_flush_control 1
#define EGL_CONTEXT_RELEASE_BEHAVIOR_NONE_KHR 0
#define EGL_CONTEXT_RELEASE_BEHAVIOR_KHR 0x2097
#define EGL_CONTEXT_RELEASE_BEHAVIOR_FLUSH_KHR 0x2098
#endif /* EGL_KHR_context_flush_control */
#ifndef EGL_KHR_create_context
#define EGL_KHR_create_context 1
#define EGL_CONTEXT_MAJOR_VERSION_KHR 0x3098
@@ -195,7 +188,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttribKHR (EGLDisplay dpy, EGLSyncKHR sy
#define EGL_KHR_image 1
typedef void *EGLImageKHR;
#define EGL_NATIVE_PIXMAP_KHR 0x30B0
#define EGL_NO_IMAGE_KHR EGL_CAST(EGLImageKHR,0)
#define EGL_NO_IMAGE_KHR ((EGLImageKHR)0)
typedef EGLImageKHR (EGLAPIENTRYP PFNEGLCREATEIMAGEKHRPROC) (EGLDisplay dpy, EGLContext ctx, EGLenum target, EGLClientBuffer buffer, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYIMAGEKHRPROC) (EGLDisplay dpy, EGLImageKHR image);
#ifdef EGL_EGLEXT_PROTOTYPES
@@ -264,7 +257,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurface64KHR (EGLDisplay dpy, EGLSurface s
#ifndef EGL_KHR_no_config_context
#define EGL_KHR_no_config_context 1
#define EGL_NO_CONFIG_KHR EGL_CAST(EGLConfig,0)
#define EGL_NO_CONFIG_KHR ((EGLConfig)0)
#endif /* EGL_KHR_no_config_context */
#ifndef EGL_KHR_partial_update
@@ -309,7 +302,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSetDamageRegionKHR (EGLDisplay dpy, EGLSurface
#define EGL_SYNC_REUSABLE_KHR 0x30FA
#define EGL_SYNC_FLUSH_COMMANDS_BIT_KHR 0x0001
#define EGL_FOREVER_KHR 0xFFFFFFFFFFFFFFFFull
#define EGL_NO_SYNC_KHR EGL_CAST(EGLSyncKHR,0)
#define EGL_NO_SYNC_KHR ((EGLSyncKHR)0)
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSIGNALSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLenum mode);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglSignalSyncKHR (EGLDisplay dpy, EGLSyncKHR sync, EGLenum mode);
@@ -322,7 +315,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSignalSyncKHR (EGLDisplay dpy, EGLSyncKHR sync,
typedef void *EGLStreamKHR;
typedef khronos_uint64_t EGLuint64KHR;
#ifdef KHRONOS_SUPPORT_INT64
#define EGL_NO_STREAM_KHR EGL_CAST(EGLStreamKHR,0)
#define EGL_NO_STREAM_KHR ((EGLStreamKHR)0)
#define EGL_CONSUMER_LATENCY_USEC_KHR 0x3210
#define EGL_PRODUCER_FRAME_KHR 0x3212
#define EGL_CONSUMER_FRAME_KHR 0x3213
@@ -350,24 +343,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamu64KHR (EGLDisplay dpy, EGLStreamKHR
#endif /* KHRONOS_SUPPORT_INT64 */
#endif /* EGL_KHR_stream */
#ifndef EGL_KHR_stream_attrib
#define EGL_KHR_stream_attrib 1
#ifdef KHRONOS_SUPPORT_INT64
typedef EGLStreamKHR (EGLAPIENTRYP PFNEGLCREATESTREAMATTRIBKHRPROC) (EGLDisplay dpy, const EGLAttrib *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSETSTREAMATTRIBKHRPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLAttrib value);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSTREAMATTRIBKHRPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLAttrib *value);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERACQUIREATTRIBKHRPROC) (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERRELEASEATTRIBKHRPROC) (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLStreamKHR EGLAPIENTRY eglCreateStreamAttribKHR (EGLDisplay dpy, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglSetStreamAttribKHR (EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLAttrib value);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamAttribKHR (EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLAttrib *value);
EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerAcquireAttribKHR (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerReleaseAttribKHR (EGLDisplay dpy, EGLStreamKHR stream, const EGLAttrib *attrib_list);
#endif
#endif /* KHRONOS_SUPPORT_INT64 */
#endif /* EGL_KHR_stream_attrib */
#ifndef EGL_KHR_stream_consumer_gltexture
#define EGL_KHR_stream_consumer_gltexture 1
#ifdef EGL_KHR_stream
@@ -387,7 +362,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerReleaseKHR (EGLDisplay dpy, EGLSt
#define EGL_KHR_stream_cross_process_fd 1
typedef int EGLNativeFileDescriptorKHR;
#ifdef EGL_KHR_stream
#define EGL_NO_FILE_DESCRIPTOR_KHR EGL_CAST(EGLNativeFileDescriptorKHR,-1)
#define EGL_NO_FILE_DESCRIPTOR_KHR ((EGLNativeFileDescriptorKHR)(-1))
typedef EGLNativeFileDescriptorKHR (EGLAPIENTRYP PFNEGLGETSTREAMFILEDESCRIPTORKHRPROC) (EGLDisplay dpy, EGLStreamKHR stream);
typedef EGLStreamKHR (EGLAPIENTRYP PFNEGLCREATESTREAMFROMFILEDESCRIPTORKHRPROC) (EGLDisplay dpy, EGLNativeFileDescriptorKHR file_descriptor);
#ifdef EGL_EGLEXT_PROTOTYPES
@@ -545,11 +520,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
#define EGL_FIXED_SIZE_ANGLE 0x3201
#endif /* EGL_ANGLE_window_fixed_size */
#ifndef EGL_ARM_implicit_external_sync
#define EGL_ARM_implicit_external_sync 1
#define EGL_SYNC_PRIOR_COMMANDS_IMPLICIT_EXTERNAL_ARM 0x328A
#endif /* EGL_ARM_implicit_external_sync */
#ifndef EGL_ARM_pixmap_multisample_discard
#define EGL_ARM_pixmap_multisample_discard 1
#define EGL_DISCARD_SAMPLES_ARM 0x3286
@@ -575,7 +545,7 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurfacePointerANGLE (EGLDisplay dpy, EGLSu
#ifndef EGL_EXT_device_base
#define EGL_EXT_device_base 1
typedef void *EGLDeviceEXT;
#define EGL_NO_DEVICE_EXT EGL_CAST(EGLDeviceEXT,0)
#define EGL_NO_DEVICE_EXT ((EGLDeviceEXT)(0))
#define EGL_BAD_DEVICE_EXT 0x322B
#define EGL_DEVICE_EXT 0x322C
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDEVICEATTRIBEXTPROC) (EGLDeviceEXT device, EGLint attribute, EGLAttrib *value);
@@ -608,21 +578,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryDisplayAttribEXT (EGLDisplay dpy, EGLint a
#define EGL_EXT_device_query 1
#endif /* EGL_EXT_device_query */
#ifndef EGL_EXT_gl_colorspace_bt2020_linear
#define EGL_EXT_gl_colorspace_bt2020_linear 1
#define EGL_GL_COLORSPACE_BT2020_LINEAR_EXT 0x333F
#endif /* EGL_EXT_gl_colorspace_bt2020_linear */
#ifndef EGL_EXT_gl_colorspace_bt2020_pq
#define EGL_EXT_gl_colorspace_bt2020_pq 1
#define EGL_GL_COLORSPACE_BT2020_PQ_EXT 0x3340
#endif /* EGL_EXT_gl_colorspace_bt2020_pq */
#ifndef EGL_EXT_gl_colorspace_scrgb_linear
#define EGL_EXT_gl_colorspace_scrgb_linear 1
#define EGL_GL_COLORSPACE_SCRGB_LINEAR_EXT 0x3350
#endif /* EGL_EXT_gl_colorspace_scrgb_linear */
#ifndef EGL_EXT_image_dma_buf_import
#define EGL_EXT_image_dma_buf_import 1
#define EGL_LINUX_DMA_BUF_EXT 0x3270
@@ -649,27 +604,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryDisplayAttribEXT (EGLDisplay dpy, EGLint a
#define EGL_YUV_CHROMA_SITING_0_5_EXT 0x3285
#endif /* EGL_EXT_image_dma_buf_import */
#ifndef EGL_EXT_image_dma_buf_import_modifiers
#define EGL_EXT_image_dma_buf_import_modifiers 1
#define EGL_DMA_BUF_PLANE3_FD_EXT 0x3440
#define EGL_DMA_BUF_PLANE3_OFFSET_EXT 0x3441
#define EGL_DMA_BUF_PLANE3_PITCH_EXT 0x3442
#define EGL_DMA_BUF_PLANE0_MODIFIER_LO_EXT 0x3443
#define EGL_DMA_BUF_PLANE0_MODIFIER_HI_EXT 0x3444
#define EGL_DMA_BUF_PLANE1_MODIFIER_LO_EXT 0x3445
#define EGL_DMA_BUF_PLANE1_MODIFIER_HI_EXT 0x3446
#define EGL_DMA_BUF_PLANE2_MODIFIER_LO_EXT 0x3447
#define EGL_DMA_BUF_PLANE2_MODIFIER_HI_EXT 0x3448
#define EGL_DMA_BUF_PLANE3_MODIFIER_LO_EXT 0x3449
#define EGL_DMA_BUF_PLANE3_MODIFIER_HI_EXT 0x344A
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDMABUFFORMATSEXTPROC) (EGLDisplay dpy, EGLint max_formats, EGLint *formats, EGLint *num_formats);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDMABUFMODIFIERSEXTPROC) (EGLDisplay dpy, EGLint format, EGLint max_modifiers, EGLuint64KHR *modifiers, EGLBoolean *external_only, EGLint *num_modifiers);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglQueryDmaBufFormatsEXT (EGLDisplay dpy, EGLint max_formats, EGLint *formats, EGLint *num_formats);
EGLAPI EGLBoolean EGLAPIENTRY eglQueryDmaBufModifiersEXT (EGLDisplay dpy, EGLint format, EGLint max_modifiers, EGLuint64KHR *modifiers, EGLBoolean *external_only, EGLint *num_modifiers);
#endif
#endif /* EGL_EXT_image_dma_buf_import_modifiers */
#ifndef EGL_EXT_multiview_window
#define EGL_EXT_multiview_window 1
#define EGL_MULTIVIEW_VIEW_COUNT_EXT 0x3134
@@ -679,8 +613,8 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryDmaBufModifiersEXT (EGLDisplay dpy, EGLint
#define EGL_EXT_output_base 1
typedef void *EGLOutputLayerEXT;
typedef void *EGLOutputPortEXT;
#define EGL_NO_OUTPUT_LAYER_EXT EGL_CAST(EGLOutputLayerEXT,0)
#define EGL_NO_OUTPUT_PORT_EXT EGL_CAST(EGLOutputPortEXT,0)
#define EGL_NO_OUTPUT_LAYER_EXT ((EGLOutputLayerEXT)0)
#define EGL_NO_OUTPUT_PORT_EXT ((EGLOutputPortEXT)0)
#define EGL_BAD_OUTPUT_LAYER_EXT 0x322D
#define EGL_BAD_OUTPUT_PORT_EXT 0x322E
#define EGL_SWAP_INTERVAL_EXT 0x322F
@@ -717,13 +651,6 @@ EGLAPI const char *EGLAPIENTRY eglQueryOutputPortStringEXT (EGLDisplay dpy, EGLO
#define EGL_OPENWF_PORT_ID_EXT 0x3239
#endif /* EGL_EXT_output_openwf */
#ifndef EGL_EXT_pixel_format_float
#define EGL_EXT_pixel_format_float 1
#define EGL_COLOR_COMPONENT_TYPE_EXT 0x3339
#define EGL_COLOR_COMPONENT_TYPE_FIXED_EXT 0x333A
#define EGL_COLOR_COMPONENT_TYPE_FLOAT_EXT 0x333B
#endif /* EGL_EXT_pixel_format_float */
#ifndef EGL_EXT_platform_base
#define EGL_EXT_platform_base 1
typedef EGLDisplay (EGLAPIENTRYP PFNEGLGETPLATFORMDISPLAYEXTPROC) (EGLenum platform, void *native_display, const EGLint *attrib_list);
@@ -769,20 +696,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerOutputEXT (EGLDisplay dpy, EGLStr
#endif
#endif /* EGL_EXT_stream_consumer_egloutput */
#ifndef EGL_EXT_surface_SMPTE2086_metadata
#define EGL_EXT_surface_SMPTE2086_metadata 1
#define EGL_SMPTE2086_DISPLAY_PRIMARY_RX_EXT 0x3341
#define EGL_SMPTE2086_DISPLAY_PRIMARY_RY_EXT 0x3342
#define EGL_SMPTE2086_DISPLAY_PRIMARY_GX_EXT 0x3343
#define EGL_SMPTE2086_DISPLAY_PRIMARY_GY_EXT 0x3344
#define EGL_SMPTE2086_DISPLAY_PRIMARY_BX_EXT 0x3345
#define EGL_SMPTE2086_DISPLAY_PRIMARY_BY_EXT 0x3346
#define EGL_SMPTE2086_WHITE_POINT_X_EXT 0x3347
#define EGL_SMPTE2086_WHITE_POINT_Y_EXT 0x3348
#define EGL_SMPTE2086_MAX_LUMINANCE_EXT 0x3349
#define EGL_SMPTE2086_MIN_LUMINANCE_EXT 0x334A
#endif /* EGL_EXT_surface_SMPTE2086_metadata */
#ifndef EGL_EXT_swap_buffers_with_damage
#define EGL_EXT_swap_buffers_with_damage 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSWITHDAMAGEEXTPROC) (EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
@@ -889,11 +802,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglExportDMABUFImageMESA (EGLDisplay dpy, EGLImage
#define EGL_PLATFORM_GBM_MESA 0x31D7
#endif /* EGL_MESA_platform_gbm */
#ifndef EGL_MESA_platform_surfaceless
#define EGL_MESA_platform_surfaceless 1
#define EGL_PLATFORM_SURFACELESS_MESA 0x31DD
#endif /* EGL_MESA_platform_surfaceless */
#ifndef EGL_NOK_swap_region
#define EGL_NOK_swap_region 1
typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSREGIONNOKPROC) (EGLDisplay dpy, EGLSurface surface, EGLint numRects, const EGLint *rects);
@@ -993,48 +901,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDi
#endif
#endif /* EGL_NV_stream_consumer_gltexture_yuv */
#ifndef EGL_NV_stream_cross_display
#define EGL_NV_stream_cross_display 1
#define EGL_STREAM_CROSS_DISPLAY_NV 0x334E
#endif /* EGL_NV_stream_cross_display */
#ifndef EGL_NV_stream_cross_object
#define EGL_NV_stream_cross_object 1
#define EGL_STREAM_CROSS_OBJECT_NV 0x334D
#endif /* EGL_NV_stream_cross_object */
#ifndef EGL_NV_stream_cross_partition
#define EGL_NV_stream_cross_partition 1
#define EGL_STREAM_CROSS_PARTITION_NV 0x323F
#endif /* EGL_NV_stream_cross_partition */
#ifndef EGL_NV_stream_cross_process
#define EGL_NV_stream_cross_process 1
#define EGL_STREAM_CROSS_PROCESS_NV 0x3245
#endif /* EGL_NV_stream_cross_process */
#ifndef EGL_NV_stream_cross_system
#define EGL_NV_stream_cross_system 1
#define EGL_STREAM_CROSS_SYSTEM_NV 0x334F
#endif /* EGL_NV_stream_cross_system */
#ifndef EGL_NV_stream_fifo_next
#define EGL_NV_stream_fifo_next 1
#define EGL_PENDING_FRAME_NV 0x3329
#define EGL_STREAM_TIME_PENDING_NV 0x332A
#endif /* EGL_NV_stream_fifo_next */
#ifndef EGL_NV_stream_fifo_synchronous
#define EGL_NV_stream_fifo_synchronous 1
#define EGL_STREAM_FIFO_SYNCHRONOUS_NV 0x3336
#endif /* EGL_NV_stream_fifo_synchronous */
#ifndef EGL_NV_stream_frame_limits
#define EGL_NV_stream_frame_limits 1
#define EGL_PRODUCER_MAX_FRAME_HINT_NV 0x3337
#define EGL_CONSUMER_MAX_FRAME_HINT_NV 0x3338
#endif /* EGL_NV_stream_frame_limits */
#ifndef EGL_NV_stream_metadata
#define EGL_NV_stream_metadata 1
#define EGL_MAX_STREAM_METADATA_BLOCKS_NV 0x3250
@@ -1061,45 +927,6 @@ EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamMetadataNV (EGLDisplay dpy, EGLStrea
#endif
#endif /* EGL_NV_stream_metadata */
#ifndef EGL_NV_stream_remote
#define EGL_NV_stream_remote 1
#define EGL_STREAM_STATE_INITIALIZING_NV 0x3240
#define EGL_STREAM_TYPE_NV 0x3241
#define EGL_STREAM_PROTOCOL_NV 0x3242
#define EGL_STREAM_ENDPOINT_NV 0x3243
#define EGL_STREAM_LOCAL_NV 0x3244
#define EGL_STREAM_PRODUCER_NV 0x3247
#define EGL_STREAM_CONSUMER_NV 0x3248
#define EGL_STREAM_PROTOCOL_FD_NV 0x3246
#endif /* EGL_NV_stream_remote */
#ifndef EGL_NV_stream_reset
#define EGL_NV_stream_reset 1
#define EGL_SUPPORT_RESET_NV 0x3334
#define EGL_SUPPORT_REUSE_NV 0x3335
typedef EGLBoolean (EGLAPIENTRYP PFNEGLRESETSTREAMNVPROC) (EGLDisplay dpy, EGLStreamKHR stream);
#ifdef EGL_EGLEXT_PROTOTYPES
EGLAPI EGLBoolean EGLAPIENTRY eglResetStreamNV (EGLDisplay dpy, EGLStreamKHR stream);
#endif
#endif /* EGL_NV_stream_reset */
#ifndef EGL_NV_stream_socket
#define EGL_NV_stream_socket 1
#define EGL_STREAM_PROTOCOL_SOCKET_NV 0x324B
#define EGL_SOCKET_HANDLE_NV 0x324C
#define EGL_SOCKET_TYPE_NV 0x324D
#endif /* EGL_NV_stream_socket */
#ifndef EGL_NV_stream_socket_inet
#define EGL_NV_stream_socket_inet 1
#define EGL_SOCKET_TYPE_INET_NV 0x324F
#endif /* EGL_NV_stream_socket_inet */
#ifndef EGL_NV_stream_socket_unix
#define EGL_NV_stream_socket_unix 1
#define EGL_SOCKET_TYPE_UNIX_NV 0x324E
#endif /* EGL_NV_stream_socket_unix */
#ifndef EGL_NV_stream_sync
#define EGL_NV_stream_sync 1
#define EGL_SYNC_NEW_FRAME_NV 0x321F
@@ -1126,7 +953,7 @@ typedef khronos_utime_nanoseconds_t EGLTimeNV;
#define EGL_SYNC_TYPE_NV 0x30ED
#define EGL_SYNC_CONDITION_NV 0x30EE
#define EGL_SYNC_FENCE_NV 0x30EF
#define EGL_NO_SYNC_NV EGL_CAST(EGLSyncNV,0)
#define EGL_NO_SYNC_NV ((EGLSyncNV)0)
typedef EGLSyncNV (EGLAPIENTRYP PFNEGLCREATEFENCESYNCNVPROC) (EGLDisplay dpy, EGLenum condition, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSYNCNVPROC) (EGLSyncNV sync);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLFENCENVPROC) (EGLSyncNV sync);

View File

@@ -85,12 +85,10 @@ typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSREGIONNOK) (EGLDisplay dpy, EG
#define EGL_NO_CONFIG_MESA ((EGLConfig)0)
#endif
#ifndef EGL_MESA_drm_image_formats
#define EGL_MESA_drm_image_formats 1
#define EGL_DRM_BUFFER_FORMAT_ARGB2101010_MESA 0x3290
#define EGL_DRM_BUFFER_FORMAT_ARGB1555_MESA 0x3291
#define EGL_DRM_BUFFER_FORMAT_RGB565_MESA 0x3292
#endif /* EGL_MESA_drm_image_formats */
#ifndef EGL_MESA_platform_surfaceless
#define EGL_MESA_platform_surfaceless 1
#define EGL_PLATFORM_SURFACELESS_MESA 0x31DD
#endif /* EGL_MESA_platform_surfaceless */
#ifdef __cplusplus
}

View File

@@ -2,7 +2,7 @@
#define __eglplatform_h_
/*
** Copyright (c) 2007-2016 The Khronos Group Inc.
** Copyright (c) 2007-2013 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -150,12 +150,4 @@ typedef EGLNativeWindowType NativeWindowType;
*/
typedef khronos_int32_t EGLint;
/* C++ / C typecast macros for special EGL handle values */
#if defined(__cplusplus)
#define EGL_CAST(type, value) (static_cast<type>(value))
#else
#define EGL_CAST(type, value) ((type) (value))
#endif
#endif /* __eglplatform_h */

View File

@@ -1136,7 +1136,7 @@ struct __DRIdri2ExtensionRec {
* extensions.
*/
#define __DRI_IMAGE "DRI_IMAGE"
#define __DRI_IMAGE_VERSION 14
#define __DRI_IMAGE_VERSION 13
/**
* These formats correspond to the similarly named MESA_FORMAT_*
@@ -1164,8 +1164,6 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_FORMAT_ARGB2101010 0x100a
#define __DRI_IMAGE_FORMAT_SARGB8 0x100b
#define __DRI_IMAGE_FORMAT_ARGB1555 0x100c
#define __DRI_IMAGE_FORMAT_R16 0x100d
#define __DRI_IMAGE_FORMAT_GR1616 0x100e
#define __DRI_IMAGE_USE_SHARE 0x0001
#define __DRI_IMAGE_USE_SCANOUT 0x0002
@@ -1194,8 +1192,6 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_FOURCC_R8 0x20203852
#define __DRI_IMAGE_FOURCC_GR88 0x38385247
#define __DRI_IMAGE_FOURCC_ARGB1555 0x35315241
#define __DRI_IMAGE_FOURCC_R16 0x20363152
#define __DRI_IMAGE_FOURCC_GR1616 0x32335247
#define __DRI_IMAGE_FOURCC_RGB565 0x36314752
#define __DRI_IMAGE_FOURCC_ARGB8888 0x34325241
#define __DRI_IMAGE_FOURCC_XRGB8888 0x34325258
@@ -1257,8 +1253,6 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_ATTRIB_NUM_PLANES 0x2009 /* available in versions 11 */
#define __DRI_IMAGE_ATTRIB_OFFSET 0x200A /* available in versions 13 */
#define __DRI_IMAGE_ATTRIB_MODIFIER_LOWER 0x200B /* available in versions 14 */
#define __DRI_IMAGE_ATTRIB_MODIFIER_UPPER 0x200C /* available in versions 14 */
enum __DRIYUVColorSpace {
__DRI_YUV_COLOR_SPACE_UNDEFINED = 0,
@@ -1470,29 +1464,6 @@ struct __DRIimageExtensionRec {
*/
void (*unmapImage)(__DRIcontext *context, __DRIimage *image, void *data);
/**
* Creates an image with implementation's favorite modifiers.
*
* This acts like createImage except there is a list of modifiers passed in
* which the implementation may selectively use to create the DRIimage. The
* result should be the implementation selects one modifier (perhaps it would
* hold on to a few and later pick).
*
* The created image should be destroyed with destroyImage().
*
* Returns the new DRIimage. The chosen modifier can be obtained later on
* and passed back to things like the kernel's AddFB2 interface.
*
* \sa __DRIimageRec::createImage
*
* \since 14
*/
__DRIimage *(*createImageWithModifiers)(__DRIscreen *screen,
int width, int height, int format,
const uint64_t *modifiers,
const unsigned int modifier_count,
void *loaderPrivate);
};
@@ -1683,43 +1654,4 @@ struct __DRIimageDriverExtensionRec {
__DRIgetAPIMaskFunc getAPIMask;
};
/**
* Background callable loader extension.
*
* Loaders expose this extension to indicate to drivers that they are capable
* of handling callbacks from the driver's background drawing threads.
*/
#define __DRI_BACKGROUND_CALLABLE "DRI_BackgroundCallable"
#define __DRI_BACKGROUND_CALLABLE_VERSION 1
typedef struct __DRIbackgroundCallableExtensionRec __DRIbackgroundCallableExtension;
struct __DRIbackgroundCallableExtensionRec {
__DRIextension base;
/**
* Indicate that this thread is being used by the driver as a background
* drawing thread which may make callbacks to the loader.
*
* \param loaderPrivate is the value that was passed to to the driver when
* the context was created. This can be used by the loader to identify
* which context any callbacks are associated with.
*
* If this function is called more than once from any given thread, each
* subsequent call overrides the loaderPrivate data that was passed in the
* previous call. The driver can take advantage of this to re-use a
* background thread to perform drawing on behalf of multiple contexts.
*
* It is permissible for the driver to call this function from a
* non-background thread (i.e. a thread that has already been bound to a
* context using __DRIcoreExtensionRec::bindContext()); when this happens,
* the \c loaderPrivate pointer must be equal to the pointer that was
* passed to the driver when the currently bound context was created.
*
* This call should execute quickly enough that the driver can call it with
* impunity whenever a background thread starts performing drawing
* operations (e.g. it should just set a thread-local variable).
*/
void (*setBackgroundContext)(void *loaderPrivate);
};
#endif

View File

@@ -30,9 +30,6 @@
#define EMULATED_THREADS_H_INCLUDED_
#include <time.h>
#ifdef _MSC_VER
#include <thr/xtimec.h> // for xtime
#endif
#ifndef TIME_UTC
#define TIME_UTC 1
@@ -44,13 +41,11 @@
typedef void (*tss_dtor_t)(void*);
typedef int (*thrd_start_t)(void*);
#ifndef _MSC_VER
struct xtime {
time_t sec;
long nsec;
};
typedef struct xtime xtime;
#endif
/*-------------------- enumeration constants --------------------*/

View File

@@ -143,8 +143,8 @@ CHIPSET(0x1A84, bxt, "Intel(R) HD Graphics (Broxton)")
CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)")
CHIPSET(0x5A84, bxt, "Intel(R) HD Graphics 505 (Broxton)")
CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics 500 (Broxton 2x6)")
CHIPSET(0x5902, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
CHIPSET(0x5906, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
CHIPSET(0x5902, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x5906, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x590A, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x5908, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1")
@@ -152,16 +152,16 @@ CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
CHIPSET(0x5915, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
CHIPSET(0x5917, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
CHIPSET(0x591B, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
CHIPSET(0x5912, kbl_gt2, "Intel(R) Kabylake GT2")
CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kabylake GT2)")
CHIPSET(0x591A, kbl_gt2, "Intel(R) Kabylake GT2")
CHIPSET(0x591B, kbl_gt2, "Intel(R) Kabylake GT2")
CHIPSET(0x591D, kbl_gt2, "Intel(R) Kabylake GT2")
CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kabylake GT2)")
CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")
CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3")
CHIPSET(0x5926, kbl_gt3, "Intel(R) Iris Plus Graphics 640 (Kaby Lake GT3)")
CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3)")
CHIPSET(0x5926, kbl_gt3, "Intel(R) Kabylake GT3")
CHIPSET(0x5927, kbl_gt3, "Intel(R) Kabylake GT3")
CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)")
CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")

View File

@@ -202,7 +202,6 @@ CHIPSET(0x67C9, POLARIS10_, POLARIS10)
CHIPSET(0x67CA, POLARIS10_, POLARIS10)
CHIPSET(0x67CC, POLARIS10_, POLARIS10)
CHIPSET(0x67CF, POLARIS10_, POLARIS10)
CHIPSET(0x67D0, POLARIS10_, POLARIS10)
CHIPSET(0x67DF, POLARIS10_, POLARIS10)
CHIPSET(0x98E4, STONEY_, STONEY)
@@ -212,13 +211,4 @@ CHIPSET(0x6981, POLARIS12_, POLARIS12)
CHIPSET(0x6985, POLARIS12_, POLARIS12)
CHIPSET(0x6986, POLARIS12_, POLARIS12)
CHIPSET(0x6987, POLARIS12_, POLARIS12)
CHIPSET(0x6995, POLARIS12_, POLARIS12)
CHIPSET(0x699F, POLARIS12_, POLARIS12)
CHIPSET(0x6860, VEGA10_, VEGA10)
CHIPSET(0x6861, VEGA10_, VEGA10)
CHIPSET(0x6862, VEGA10_, VEGA10)
CHIPSET(0x6863, VEGA10_, VEGA10)
CHIPSET(0x6867, VEGA10_, VEGA10)
CHIPSET(0x687F, VEGA10_, VEGA10)
CHIPSET(0x686C, VEGA10_, VEGA10)

File diff suppressed because it is too large Load Diff

View File

@@ -291,9 +291,8 @@ def generate(env):
# C preprocessor options
cppdefines = []
cppdefines += [
'__STDC_CONSTANT_MACROS',
'__STDC_FORMAT_MACROS',
'__STDC_LIMIT_MACROS',
'__STDC_CONSTANT_MACROS',
'HAVE_NO_AUTOCONF',
]
if env['build'] in ('debug', 'checked'):
@@ -645,10 +644,10 @@ def generate(env):
env.AddMethod(msvc2013_compat, 'MSVC2013Compat')
env.AddMethod(unit_test, 'UnitTest')
env.PkgCheckModules('X11', ['x11', 'xext', 'xdamage >= 1.1', 'xfixes', 'glproto >= 1.4.13', 'dri2proto >= 2.8'])
env.PkgCheckModules('X11', ['x11', 'xext', 'xdamage', 'xfixes', 'glproto >= 1.4.13'])
env.PkgCheckModules('XCB', ['x11-xcb', 'xcb-glx >= 1.8.1', 'xcb-dri2 >= 1.8'])
env.PkgCheckModules('XF86VIDMODE', ['xxf86vm'])
env.PkgCheckModules('DRM', ['libdrm >= 2.4.75'])
env.PkgCheckModules('DRM', ['libdrm >= 2.4.66'])
if env['x11']:
env.Append(CPPPATH = env['X11_CPPPATH'])

View File

@@ -100,6 +100,8 @@ def generate(env):
env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')])
env.AppendUnique(CPPDEFINES = [
'__STDC_LIMIT_MACROS',
'__STDC_CONSTANT_MACROS',
'HAVE_STDINT_H',
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])

View File

@@ -75,16 +75,6 @@ endif
# include only conditionally ?
SUBDIRS += compiler
## Optionally required by GBM, EGL and Vulkan
if HAVE_PLATFORM_WAYLAND
SUBDIRS += egl/wayland/wayland-drm
endif
if HAVE_VULKAN_COMMON
SUBDIRS += vulkan
endif
EXTRA_DIST += vulkan/registry/vk.xml
if HAVE_AMD_DRIVERS
SUBDIRS += amd
endif
@@ -103,6 +93,11 @@ if HAVE_DRI_GLX
SUBDIRS += glx
endif
## Optionally required by GBM and EGL
if HAVE_PLATFORM_WAYLAND
SUBDIRS += egl/wayland/wayland-drm
endif
## Optionally required by EGL (aka PLATFORM_GBM)
if HAVE_GBM
SUBDIRS += gbm
@@ -117,6 +112,20 @@ if HAVE_EGL
SUBDIRS += egl
endif
if HAVE_INTEL_DRIVERS
SUBDIRS += intel/tools
endif
if HAVE_VULKAN_COMMON
SUBDIRS += vulkan/wsi
endif
EXTRA_DIST += vulkan/registry/vk.xml
## Requires the i965 compiler (part of mesa) and wayland-drm
if HAVE_INTEL_VULKAN
SUBDIRS += intel/vulkan
endif
# Requires wayland-drm
if HAVE_RADEON_VULKAN
SUBDIRS += amd/vulkan

View File

@@ -37,9 +37,7 @@ LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/amd/common \
$(MESA_TOP)/src/amd/addrlib \
$(MESA_TOP)/src/amd/addrlib/core \
$(MESA_TOP)/src/amd/addrlib/inc/chip/gfx9 \
$(MESA_TOP)/src/amd/addrlib/inc/chip/r800 \
$(MESA_TOP)/src/amd/addrlib/gfx9/chip \
$(MESA_TOP)/src/amd/addrlib/r800/chip
include $(MESA_COMMON_MK)

View File

@@ -26,9 +26,7 @@ addrlib_libamdgpu_addrlib_la_CPPFLAGS = \
-I$(srcdir)/common \
-I$(srcdir)/addrlib \
-I$(srcdir)/addrlib/core \
-I$(srcdir)/addrlib/inc/chip/gfx9 \
-I$(srcdir)/addrlib/inc/chip/r800 \
-I$(srcdir)/addrlib/gfx9/chip \
-I$(srcdir)/addrlib/r800/chip \
-DBRAHMA_BUILD=1

View File

@@ -19,7 +19,7 @@
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
if HAVE_GALLIUM_LLVM
if NEED_RADEON_LLVM
COMMON_LIBS = common/libamd_common.la
@@ -65,8 +65,8 @@ common_libamd_common_la_SOURCES += $(AMD_NIR_FILES)
endif
endif
common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h
common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h
$(AM_V_at)$(MKDIR_P) $(@D)
$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h $(srcdir)/common/gfx9d.h > $@
$(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h > $@
BUILT_SOURCES = $(AMD_GENERATED_FILES)

View File

@@ -1,5 +1,4 @@
COMMON_HEADER_FILES = \
common/gfx9d.h \
common/sid.h \
common/r600d_common.h \
common/amd_family.h \
@@ -15,20 +14,8 @@ ADDRLIB_FILES = \
addrlib/core/addrelemlib.h \
addrlib/core/addrlib.cpp \
addrlib/core/addrlib.h \
addrlib/core/addrlib1.cpp \
addrlib/core/addrlib1.h \
addrlib/core/addrlib2.cpp \
addrlib/core/addrlib2.h \
addrlib/core/addrobject.cpp \
addrlib/core/addrobject.h \
addrlib/gfx9/chip/gfx9_enum.h \
addrlib/gfx9/coord.cpp \
addrlib/gfx9/coord.h \
addrlib/gfx9/gfx9addrlib.cpp \
addrlib/gfx9/gfx9addrlib.h \
addrlib/gfx9/rbmap.cpp \
addrlib/gfx9/rbmap.h \
addrlib/inc/chip/gfx9/gfx9_gb_reg.h \
addrlib/inc/chip/r800/si_gb_reg.h \
addrlib/inc/lnx_common_defs.h \
addrlib/r800/chip/si_ci_vi_merged_enum.h \
@@ -42,8 +29,6 @@ ADDRLIB_FILES = \
AMD_COMPILER_FILES = \
common/ac_binary.c \
common/ac_binary.h \
common/ac_llvm_build.c \
common/ac_llvm_build.h \
common/ac_llvm_helper.cpp \
common/ac_llvm_util.c \
common/ac_llvm_util.h

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -25,16 +25,16 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrtypes.h
* @brief Contains the helper function and constants
****************************************************************************************************
***************************************************************************************************
*/
#ifndef __ADDR_TYPES_H__
#define __ADDR_TYPES_H__
#if defined(__APPLE__) && !defined(HAVE_TSERVER)
// External definitions header maintained by Apple driver team, but not for diag team under Mac.
#if defined(__APPLE__) || defined(TCORE_BUILD)
// External definitions header maintained by Mac driver team (and TCORE team)
// Helps address compilation issues & reduces code covered by NDA
#include "addrExtDef.h"
@@ -59,12 +59,12 @@ typedef int INT;
#include <stdarg.h> // va_list...etc need this header
#endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
#endif // defined (__APPLE__)
/**
****************************************************************************************************
***************************************************************************************************
* Calling conventions
****************************************************************************************************
***************************************************************************************************
*/
#ifndef ADDR_CDECL
#if defined(__GNUC__)
@@ -121,9 +121,9 @@ typedef int INT;
#define ADDR_API ADDR_FASTCALL //default call convention is fast call
/**
****************************************************************************************************
***************************************************************************************************
* Global defines used by other modules
****************************************************************************************************
***************************************************************************************************
*/
#if !defined(TILEINDEX_INVALID)
#define TILEINDEX_INVALID -1
@@ -138,9 +138,9 @@ typedef int INT;
#endif
/**
****************************************************************************************************
***************************************************************************************************
* Return codes
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _ADDR_E_RETURNCODE
{
@@ -159,14 +159,14 @@ typedef enum _ADDR_E_RETURNCODE
} ADDR_E_RETURNCODE;
/**
****************************************************************************************************
***************************************************************************************************
* @brief
* Neutral enums that define tile modes for all H/W
* @note
* R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
* ADDR_TM_2D_TILED_XTHICK
*
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrTileMode
{
@@ -195,154 +195,17 @@ typedef enum _AddrTileMode
ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
ADDR_TM_COUNT = 25, ///< Must be the value of the last tile mode
} AddrTileMode;
/**
****************************************************************************************************
* @brief
* Neutral enums that define swizzle modes for Gfx9 ASIC
* @note
*
* ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resouce
* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resouce
* ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resouce
* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resouce
* ADDR_SW_VAR_* addressing block aligned size is ASIC specific, for 2D/3D resouce
*
* ADDR_SW_*_Z For 2D resouce, represents Z-order swizzle mode for depth/stencil/FMask
For 3D resouce, represents a swizzle mode similar to legacy thick tile mode
* ADDR_SW_*_S represents standard swizzle mode defined by MS
* ADDR_SW_*_D For 2D resouce, represents a swizzle mode for displayable resource
* For 3D resouce, represents a swizzle mode which places each slice in order & pixel
within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
* ADDR_SW_*_R For 2D resouce only, represents a swizzle mode for rotated displayable resource
*
****************************************************************************************************
*/
typedef enum _AddrSwizzleMode
{
ADDR_SW_LINEAR = 0,
ADDR_SW_256B_S = 1,
ADDR_SW_256B_D = 2,
ADDR_SW_256B_R = 3,
ADDR_SW_4KB_Z = 4,
ADDR_SW_4KB_S = 5,
ADDR_SW_4KB_D = 6,
ADDR_SW_4KB_R = 7,
ADDR_SW_64KB_Z = 8,
ADDR_SW_64KB_S = 9,
ADDR_SW_64KB_D = 10,
ADDR_SW_64KB_R = 11,
ADDR_SW_VAR_Z = 12,
ADDR_SW_VAR_S = 13,
ADDR_SW_VAR_D = 14,
ADDR_SW_VAR_R = 15,
ADDR_SW_64KB_Z_T = 16,
ADDR_SW_64KB_S_T = 17,
ADDR_SW_64KB_D_T = 18,
ADDR_SW_64KB_R_T = 19,
ADDR_SW_4KB_Z_X = 20,
ADDR_SW_4KB_S_X = 21,
ADDR_SW_4KB_D_X = 22,
ADDR_SW_4KB_R_X = 23,
ADDR_SW_64KB_Z_X = 24,
ADDR_SW_64KB_S_X = 25,
ADDR_SW_64KB_D_X = 26,
ADDR_SW_64KB_R_X = 27,
ADDR_SW_VAR_Z_X = 28,
ADDR_SW_VAR_S_X = 29,
ADDR_SW_VAR_D_X = 30,
ADDR_SW_VAR_R_X = 31,
ADDR_SW_LINEAR_GENERAL = 32,
ADDR_SW_MAX_TYPE = 33,
// Used for represent block with identical size
ADDR_SW_256B = ADDR_SW_256B_S,
ADDR_SW_4KB = ADDR_SW_4KB_S_X,
ADDR_SW_64KB = ADDR_SW_64KB_S_X,
ADDR_SW_VAR = ADDR_SW_VAR_S_X,
} AddrSwizzleMode;
/**
****************************************************************************************************
* @brief
* Neutral enums that define image type
* @note
* this is new for address library interface version 2
*
****************************************************************************************************
*/
typedef enum _AddrResourceType
{
ADDR_RSRC_TEX_1D = 0,
ADDR_RSRC_TEX_2D = 1,
ADDR_RSRC_TEX_3D = 2,
ADDR_RSRC_MAX_TYPE = 3,
} AddrResourceType;
/**
****************************************************************************************************
* @brief
* Neutral enums that define resource heap location
* @note
* this is new for address library interface version 2
*
****************************************************************************************************
*/
typedef enum _AddrResrouceLocation
{
ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown
ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap
ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap
ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap
ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only
ADDR_RSRC_LOC_MAX_TYPE = 5,
} AddrResrouceLocation;
/**
****************************************************************************************************
* @brief
* Neutral enums that define resource basic swizzle mode
* @note
* this is new for address library interface version 2
*
****************************************************************************************************
*/
typedef enum _AddrSwType
{
ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder
ADDR_SW_S = 1, // Resource basic swizzle mode is Standard
ADDR_SW_D = 2, // Resource basic swizzle mode is Display
ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated
} AddrSwType;
/**
****************************************************************************************************
* @brief
* Neutral enums that define mipmap major mode
* @note
* this is new for address library interface version 2
*
****************************************************************************************************
*/
typedef enum _AddrMajorMode
{
ADDR_MAJOR_X = 0,
ADDR_MAJOR_Y = 1,
ADDR_MAJOR_Z = 2,
ADDR_MAJOR_MAX_TYPE = 3,
} AddrMajorMode;
/**
****************************************************************************************************
***************************************************************************************************
* AddrFormat
*
* @brief
* Neutral enum for SurfaceFormat
*
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrFormat {
ADDR_FMT_INVALID = 0x00000000,
@@ -409,32 +272,16 @@ typedef enum _AddrFormat {
ADDR_FMT_APC7 = 0x0000003d,
ADDR_FMT_CTX1 = 0x0000003e,
ADDR_FMT_RESERVED_63 = 0x0000003f,
ADDR_FMT_ASTC_4x4 = 0x00000040,
ADDR_FMT_ASTC_5x4 = 0x00000041,
ADDR_FMT_ASTC_5x5 = 0x00000042,
ADDR_FMT_ASTC_6x5 = 0x00000043,
ADDR_FMT_ASTC_6x6 = 0x00000044,
ADDR_FMT_ASTC_8x5 = 0x00000045,
ADDR_FMT_ASTC_8x6 = 0x00000046,
ADDR_FMT_ASTC_8x8 = 0x00000047,
ADDR_FMT_ASTC_10x5 = 0x00000048,
ADDR_FMT_ASTC_10x6 = 0x00000049,
ADDR_FMT_ASTC_10x8 = 0x0000004a,
ADDR_FMT_ASTC_10x10 = 0x0000004b,
ADDR_FMT_ASTC_12x10 = 0x0000004c,
ADDR_FMT_ASTC_12x12 = 0x0000004d,
ADDR_FMT_ETC2_64BPP = 0x0000004e,
ADDR_FMT_ETC2_128BPP = 0x0000004f,
} AddrFormat;
/**
****************************************************************************************************
***************************************************************************************************
* AddrDepthFormat
*
* @brief
* Neutral enum for addrFlt32ToDepthPixel
*
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrDepthFormat
{
@@ -450,13 +297,13 @@ typedef enum _AddrDepthFormat
} AddrDepthFormat;
/**
****************************************************************************************************
***************************************************************************************************
* AddrColorFormat
*
* @brief
* Neutral enum for ColorFormat
*
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrColorFormat
{
@@ -499,13 +346,13 @@ typedef enum _AddrColorFormat
} AddrColorFormat;
/**
****************************************************************************************************
***************************************************************************************************
* AddrSurfaceNumber
*
* @brief
* Neutral enum for SurfaceNumber
*
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrSurfaceNumber {
ADDR_NUMBER_UNORM = 0x00000000,
@@ -519,13 +366,13 @@ typedef enum _AddrSurfaceNumber {
} AddrSurfaceNumber;
/**
****************************************************************************************************
***************************************************************************************************
* AddrSurfaceSwap
*
* @brief
* Neutral enum for SurfaceSwap
*
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrSurfaceSwap {
ADDR_SWAP_STD = 0x00000000,
@@ -535,12 +382,12 @@ typedef enum _AddrSurfaceSwap {
} AddrSurfaceSwap;
/**
****************************************************************************************************
***************************************************************************************************
* AddrHtileBlockSize
*
* @brief
* Size of HTILE blocks, valid values are 4 or 8 for now
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrHtileBlockSize
{
@@ -550,7 +397,7 @@ typedef enum _AddrHtileBlockSize
/**
****************************************************************************************************
***************************************************************************************************
* AddrPipeCfg
*
* @brief
@@ -563,7 +410,7 @@ typedef enum _AddrHtileBlockSize
* For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
* the number of ROP units(? TODO: which registers??)
* The enum value = hw enum + 1 which is to reserve 0 for requesting default.
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrPipeCfg
{
@@ -586,12 +433,12 @@ typedef enum _AddrPipeCfg
} AddrPipeCfg;
/**
****************************************************************************************************
***************************************************************************************************
* AddrTileType
*
* @brief
* Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
****************************************************************************************************
***************************************************************************************************
*/
typedef enum _AddrTileType
{
@@ -602,13 +449,13 @@ typedef enum _AddrTileType
ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
} AddrTileType;
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
//
// Type definitions: short system-independent names for address library types
//
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
#if !defined(__APPLE__) || defined(HAVE_TSERVER)
#if !defined(__APPLE__)
#ifndef BOOL_32 // no bool type in C
/// @brief Boolean type, since none is defined in C
@@ -684,7 +531,7 @@ typedef enum _AddrTileType
#define UINT_64 unsigned long long OR unsigned __int64
#endif
#endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
#endif // #if !defined(__APPLE__)
// ADDR64X is used to print addresses in hex form on both Windows and Linux
//
@@ -727,11 +574,11 @@ typedef union {
} ADDR_FLT_32;
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
//
// Macros for controlling linking and building on multiple systems
//
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
#if defined(_MSC_VER)
#if defined(va_copy)
#undef va_copy //redefine va_copy to support VC2013

View File

@@ -25,10 +25,10 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrcommon.h
* @brief Contains the helper function and constants.
****************************************************************************************************
* @brief Contains the helper function and constants
***************************************************************************************************
*/
#ifndef __ADDR_COMMON_H__
@@ -41,14 +41,108 @@
// Moved from addrinterface.h so __KERNEL__ is not needed any more
#if ADDR_LNX_KERNEL_BUILD // || (defined(__GNUC__) && defined(__KERNEL__))
#include "lnx_common_defs.h" // ported from cmmqs
#elif !defined(__APPLE__) || defined(HAVE_TSERVER)
#elif !defined(__APPLE__)
#include <stdlib.h>
#include <string.h>
#endif
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
// Common constants
///////////////////////////////////////////////////////////////////////////////////////////////////
static const UINT_32 MicroTileWidth = 8; ///< Micro tile width, for 1D and 2D tiling
static const UINT_32 MicroTileHeight = 8; ///< Micro tile height, for 1D and 2D tiling
static const UINT_32 ThickTileThickness = 4; ///< Micro tile thickness, for THICK modes
static const UINT_32 XThickTileThickness = 8; ///< Extra thick tiling thickness
static const UINT_32 PowerSaveTileBytes = 64; ///< Nuber of bytes per tile for power save 64
static const UINT_32 CmaskCacheBits = 1024; ///< Number of bits for CMASK cache
static const UINT_32 CmaskElemBits = 4; ///< Number of bits for CMASK element
static const UINT_32 HtileCacheBits = 16384; ///< Number of bits for HTILE cache 512*32
static const UINT_32 MicroTilePixels = MicroTileWidth * MicroTileHeight;
static const INT_32 TileIndexInvalid = TILEINDEX_INVALID;
static const INT_32 TileIndexLinearGeneral = TILEINDEX_LINEAR_GENERAL;
static const INT_32 TileIndexNoMacroIndex = -3;
///////////////////////////////////////////////////////////////////////////////////////////////////
// Common macros
///////////////////////////////////////////////////////////////////////////////////////////////////
#define BITS_PER_BYTE 8
#define BITS_TO_BYTES(x) ( ((x) + (BITS_PER_BYTE-1)) / BITS_PER_BYTE )
#define BYTES_TO_BITS(x) ( (x) * BITS_PER_BYTE )
/// Helper macros to select a single bit from an int (undefined later in section)
#define _BIT(v,b) (((v) >> (b) ) & 1)
/**
***************************************************************************************************
* @brief Enums to identify AddrLib type
***************************************************************************************************
*/
enum AddrLibClass
{
BASE_ADDRLIB = 0x0,
R600_ADDRLIB = 0x6,
R800_ADDRLIB = 0x8,
SI_ADDRLIB = 0xa,
CI_ADDRLIB = 0xb,
};
/**
***************************************************************************************************
* AddrChipFamily
*
* @brief
* Neutral enums that specifies chip family.
*
***************************************************************************************************
*/
enum AddrChipFamily
{
ADDR_CHIP_FAMILY_IVLD, ///< Invalid family
ADDR_CHIP_FAMILY_R6XX,
ADDR_CHIP_FAMILY_R7XX,
ADDR_CHIP_FAMILY_R8XX,
ADDR_CHIP_FAMILY_NI,
ADDR_CHIP_FAMILY_SI,
ADDR_CHIP_FAMILY_CI,
ADDR_CHIP_FAMILY_VI,
};
/**
***************************************************************************************************
* ADDR_CONFIG_FLAGS
*
* @brief
* This structure is used to set addr configuration flags.
***************************************************************************************************
*/
union ADDR_CONFIG_FLAGS
{
struct
{
/// Clients do not need to set these flags except forceLinearAligned.
/// There flags are set up by AddrLib inside thru AddrInitGlobalParamsFromRegister
UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only
UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps
UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and
/// output structure
UINT_32 ignoreTileInfo : 1; ///< Don't use tile info structure
UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid
UINT_32 useCombinedSwizzle : 1; ///< Use combined swizzle
UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level
UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment
UINT_32 degradeBaseLevel : 1; ///< Degrade to 1D modes automatically for base level
UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize
UINT_32 reserved : 22; ///< Reserved bits for future use
};
UINT_32 value;
};
///////////////////////////////////////////////////////////////////////////////////////////////////
// Platform specific debug break defines
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
#if DEBUG
#if defined(__GNUC__)
#define ADDR_DBG_BREAK()
@@ -60,40 +154,30 @@
#else
#define ADDR_DBG_BREAK()
#endif
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
// Debug assertions used in AddrLib
////////////////////////////////////////////////////////////////////////////////////////////////////
#if defined(_WIN32) && (_MSC_VER >= 1400)
#define ADDR_ANALYSIS_ASSUME(expr) __analysis_assume(expr)
#else
#define ADDR_ANALYSIS_ASSUME(expr) do { (void)(expr); } while (0)
#endif
///////////////////////////////////////////////////////////////////////////////////////////////////
#if DEBUG
#define ADDR_ASSERT(__e) \
do { \
ADDR_ANALYSIS_ASSUME(__e); \
if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } \
} while (0)
#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK()
#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case")
#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented");
#define ADDR_ASSERT(__e) if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); }
#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK()
#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case")
#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented");
#else //DEBUG
#define ADDR_ASSERT(__e) ADDR_ANALYSIS_ASSUME(__e)
#define ADDR_ASSERT_ALWAYS()
#define ADDR_UNHANDLED_CASE()
#define ADDR_NOT_IMPLEMENTED()
#define ADDR_ASSERT(__e)
#define ADDR_ASSERT_ALWAYS()
#define ADDR_UNHANDLED_CASE()
#define ADDR_NOT_IMPLEMENTED()
#endif //DEBUG
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
// Debug print macro from legacy address library
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
#if DEBUG
#define ADDR_PRNT(a) Object::DebugPrint a
#define ADDR_PRNT(a) AddrObject::DebugPrint a
/// @brief Macro for reporting informational messages
/// @ingroup util
@@ -161,130 +245,19 @@
#define ADDR_EXIT(cond, a)
#endif // DEBUG
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
namespace Addr
{
namespace V1
{
////////////////////////////////////////////////////////////////////////////////////////////////////
// Common constants
////////////////////////////////////////////////////////////////////////////////////////////////////
static const UINT_32 MicroTileWidth = 8; ///< Micro tile width, for 1D and 2D tiling
static const UINT_32 MicroTileHeight = 8; ///< Micro tile height, for 1D and 2D tiling
static const UINT_32 ThickTileThickness = 4; ///< Micro tile thickness, for THICK modes
static const UINT_32 XThickTileThickness = 8; ///< Extra thick tiling thickness
static const UINT_32 PowerSaveTileBytes = 64; ///< Nuber of bytes per tile for power save 64
static const UINT_32 CmaskCacheBits = 1024; ///< Number of bits for CMASK cache
static const UINT_32 CmaskElemBits = 4; ///< Number of bits for CMASK element
static const UINT_32 HtileCacheBits = 16384; ///< Number of bits for HTILE cache 512*32
static const UINT_32 MicroTilePixels = MicroTileWidth * MicroTileHeight;
static const INT_32 TileIndexInvalid = TILEINDEX_INVALID;
static const INT_32 TileIndexLinearGeneral = TILEINDEX_LINEAR_GENERAL;
static const INT_32 TileIndexNoMacroIndex = -3;
} // V1
namespace V2
{
////////////////////////////////////////////////////////////////////////////////////////////////////
// Common constants
////////////////////////////////////////////////////////////////////////////////////////////////////
static const UINT_32 MaxSurfaceHeight = 16384;
} // V2
////////////////////////////////////////////////////////////////////////////////////////////////////
// Common macros
////////////////////////////////////////////////////////////////////////////////////////////////////
#define BITS_PER_BYTE 8
#define BITS_TO_BYTES(x) ( ((x) + (BITS_PER_BYTE-1)) / BITS_PER_BYTE )
#define BYTES_TO_BITS(x) ( (x) * BITS_PER_BYTE )
/// Helper macros to select a single bit from an int (undefined later in section)
#define _BIT(v,b) (((v) >> (b) ) & 1)
/**
****************************************************************************************************
* @brief Enums to identify AddrLib type
****************************************************************************************************
*/
enum LibClass
{
BASE_ADDRLIB = 0x0,
R600_ADDRLIB = 0x6,
R800_ADDRLIB = 0x8,
SI_ADDRLIB = 0xa,
CI_ADDRLIB = 0xb,
AI_ADDRLIB = 0xd,
};
/**
****************************************************************************************************
* ChipFamily
*
* @brief
* Neutral enums that specifies chip family.
*
****************************************************************************************************
*/
enum ChipFamily
{
ADDR_CHIP_FAMILY_IVLD, ///< Invalid family
ADDR_CHIP_FAMILY_R6XX,
ADDR_CHIP_FAMILY_R7XX,
ADDR_CHIP_FAMILY_R8XX,
ADDR_CHIP_FAMILY_NI,
ADDR_CHIP_FAMILY_SI,
ADDR_CHIP_FAMILY_CI,
ADDR_CHIP_FAMILY_VI,
ADDR_CHIP_FAMILY_AI,
};
/**
****************************************************************************************************
* ConfigFlags
*
* @brief
* This structure is used to set configuration flags.
****************************************************************************************************
*/
union ConfigFlags
{
struct
{
/// These flags are set up internally thru AddrLib::Create() based on ADDR_CREATE_FLAGS
UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only
UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps
UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and
/// output structure
UINT_32 ignoreTileInfo : 1; ///< Don't use tile info structure
UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid
UINT_32 useCombinedSwizzle : 1; ///< Use combined swizzle
UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level
UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment
UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize
UINT_32 disableLinearOpt : 1; ///< Disallow tile modes to be optimized to linear
UINT_32 reserved : 22; ///< Reserved bits for future use
};
UINT_32 value;
};
////////////////////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////////////////
// Misc helper functions
////////////////////////////////////////////////////////////////////////////////////////////////////
/**
****************************************************************************************************
***************************************************************************************************
* AddrXorReduce
*
* @brief
* Xor the right-side numberOfBits bits of x.
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 XorReduce(
UINT_32 x,
@@ -302,12 +275,12 @@ static inline UINT_32 XorReduce(
}
/**
****************************************************************************************************
***************************************************************************************************
* IsPow2
*
* @brief
* Check if the size (UINT_32) is pow 2
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 IsPow2(
UINT_32 dim) ///< [in] dimension of miplevel
@@ -317,12 +290,12 @@ static inline UINT_32 IsPow2(
}
/**
****************************************************************************************************
***************************************************************************************************
* IsPow2
*
* @brief
* Check if the size (UINT_64) is pow 2
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_64 IsPow2(
UINT_64 dim) ///< [in] dimension of miplevel
@@ -332,12 +305,12 @@ static inline UINT_64 IsPow2(
}
/**
****************************************************************************************************
***************************************************************************************************
* ByteAlign
*
* @brief
* Align UINT_32 "x" to "align" alignment, "align" should be power of 2
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 PowTwoAlign(
UINT_32 x,
@@ -351,12 +324,12 @@ static inline UINT_32 PowTwoAlign(
}
/**
****************************************************************************************************
***************************************************************************************************
* ByteAlign
*
* @brief
* Align UINT_64 "x" to "align" alignment, "align" should be power of 2
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_64 PowTwoAlign(
UINT_64 x,
@@ -370,12 +343,12 @@ static inline UINT_64 PowTwoAlign(
}
/**
****************************************************************************************************
***************************************************************************************************
* Min
*
* @brief
* Get the min value between two unsigned values
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 Min(
UINT_32 value1,
@@ -385,12 +358,12 @@ static inline UINT_32 Min(
}
/**
****************************************************************************************************
***************************************************************************************************
* Min
*
* @brief
* Get the min value between two signed values
****************************************************************************************************
***************************************************************************************************
*/
static inline INT_32 Min(
INT_32 value1,
@@ -400,12 +373,12 @@ static inline INT_32 Min(
}
/**
****************************************************************************************************
***************************************************************************************************
* Max
*
* @brief
* Get the max value between two unsigned values
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 Max(
UINT_32 value1,
@@ -415,12 +388,12 @@ static inline UINT_32 Max(
}
/**
****************************************************************************************************
***************************************************************************************************
* Max
*
* @brief
* Get the max value between two signed values
****************************************************************************************************
***************************************************************************************************
*/
static inline INT_32 Max(
INT_32 value1,
@@ -430,17 +403,19 @@ static inline INT_32 Max(
}
/**
****************************************************************************************************
***************************************************************************************************
* NextPow2
*
* @brief
* Compute the mipmap's next level dim size
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 NextPow2(
UINT_32 dim) ///< [in] dimension of miplevel
{
UINT_32 newDim = 1;
UINT_32 newDim;
newDim = 1;
if (dim > 0x7fffffff)
{
@@ -459,18 +434,23 @@ static inline UINT_32 NextPow2(
}
/**
****************************************************************************************************
* Log2NonPow2
***************************************************************************************************
* Log2
*
* @brief
* Compute log of base 2 no matter the target is power of 2 or not
****************************************************************************************************
* Compute log of base 2
***************************************************************************************************
*/
static inline UINT_32 Log2NonPow2(
static inline UINT_32 Log2(
UINT_32 x) ///< [in] the value should calculate log based 2
{
UINT_32 y;
//
// Assert that x is a power of two.
//
ADDR_ASSERT(IsPow2(x));
y = 0;
while (x > 1)
{
@@ -482,29 +462,12 @@ static inline UINT_32 Log2NonPow2(
}
/**
****************************************************************************************************
* Log2
*
* @brief
* Compute log of base 2
****************************************************************************************************
*/
static inline UINT_32 Log2(
UINT_32 x) ///< [in] the value should calculate log based 2
{
// Assert that x is a power of two.
ADDR_ASSERT(IsPow2(x));
return Log2NonPow2(x);
}
/**
****************************************************************************************************
***************************************************************************************************
* QLog2
*
* @brief
* Compute log of base 2 quickly (<= 16)
****************************************************************************************************
***************************************************************************************************
*/
static inline UINT_32 QLog2(
UINT_32 x) ///< [in] the value should calculate log based 2
@@ -538,12 +501,12 @@ static inline UINT_32 QLog2(
}
/**
****************************************************************************************************
***************************************************************************************************
* SafeAssign
*
* @brief
* NULL pointer safe assignment
****************************************************************************************************
***************************************************************************************************
*/
static inline VOID SafeAssign(
UINT_32* pLVal, ///< [in] Pointer to left val
@@ -556,12 +519,12 @@ static inline VOID SafeAssign(
}
/**
****************************************************************************************************
***************************************************************************************************
* SafeAssign
*
* @brief
* NULL pointer safe assignment for 64bit values
****************************************************************************************************
***************************************************************************************************
*/
static inline VOID SafeAssign(
UINT_64* pLVal, ///< [in] Pointer to left val
@@ -574,12 +537,12 @@ static inline VOID SafeAssign(
}
/**
****************************************************************************************************
***************************************************************************************************
* SafeAssign
*
* @brief
* NULL pointer safe assignment for AddrTileMode
****************************************************************************************************
***************************************************************************************************
*/
static inline VOID SafeAssign(
AddrTileMode* pLVal, ///< [in] Pointer to left val
@@ -591,341 +554,5 @@ static inline VOID SafeAssign(
}
}
/**
****************************************************************************************************
* RoundHalf
*
* @brief
* return (x + 1) / 2
****************************************************************************************************
*/
static inline UINT_32 RoundHalf(
UINT_32 x) ///< [in] input value
{
ADDR_ASSERT(x != 0);
#if 1
return (x >> 1) + (x & 1);
#else
return (x + 1) >> 1;
#endif
}
/**
****************************************************************************************************
* SumGeo
*
* @brief
* Calculate sum of a geometric progression whose ratio is 1/2
****************************************************************************************************
*/
static inline UINT_32 SumGeo(
UINT_32 base, ///< [in] First term in the geometric progression
UINT_32 num) ///< [in] Number of terms to be added into sum
{
ADDR_ASSERT(base > 0);
UINT_32 sum = 0;
UINT_32 i = 0;
for (; (i < num) && (base > 1); i++)
{
sum += base;
base = RoundHalf(base);
}
sum += num - i;
return sum;
}
/**
****************************************************************************************************
* GetBit
*
* @brief
* Extract bit N value (0 or 1) of a UINT32 value.
****************************************************************************************************
*/
static inline UINT_32 GetBit(
UINT_32 u32, ///< [in] UINT32 value
UINT_32 pos) ///< [in] bit position from LSB, valid range is [0..31]
{
ADDR_ASSERT(pos <= 31);
return (u32 >> pos) & 0x1;
}
/**
****************************************************************************************************
* GetBits
*
* @brief
* Copy 'bitsNum' bits from src start from srcStartPos into destination from dstStartPos
* srcStartPos: 0~31 for UINT_32
* bitsNum : 1~32 for UINT_32
* srcStartPos: 0~31 for UINT_32
* src start position
* |
* src : b[31] b[30] b[29] ... ... ... ... ... ... ... ... b[end]..b[beg] ... b[1] b[0]
* || Bits num || copy length || Bits num ||
* dst : b[31] b[30] b[29] ... b[end]..b[beg] ... ... ... ... ... ... ... ... b[1] b[0]
* |
* dst start position
****************************************************************************************************
*/
static inline UINT_32 GetBits(
UINT_32 src,
UINT_32 srcStartPos,
UINT_32 bitsNum,
UINT_32 dstStartPos)
{
ADDR_ASSERT((srcStartPos < 32) && (dstStartPos < 32) && (bitsNum > 0));
ADDR_ASSERT((bitsNum + dstStartPos <= 32) && (bitsNum + srcStartPos <= 32));
return ((src >> srcStartPos) << (32 - bitsNum)) >> (32 - bitsNum - dstStartPos);
}
/**
****************************************************************************************************
* MortonGen2d
*
* @brief
* Generate 2D Morton interleave code with num lowest bits in each channel
****************************************************************************************************
*/
static inline UINT_32 MortonGen2d(
UINT_32 x, ///< [in] First channel
UINT_32 y, ///< [in] Second channel
UINT_32 num) ///< [in] Number of bits extracted from each channel
{
UINT_32 mort = 0;
for (UINT_32 i = 0; i < num; i++)
{
mort |= (GetBit(y, i) << (2 * i));
mort |= (GetBit(x, i) << (2 * i + 1));
}
return mort;
}
/**
****************************************************************************************************
* MortonGen3d
*
* @brief
* Generate 3D Morton interleave code with num lowest bits in each channel
****************************************************************************************************
*/
static inline UINT_32 MortonGen3d(
UINT_32 x, ///< [in] First channel
UINT_32 y, ///< [in] Second channel
UINT_32 z, ///< [in] Third channel
UINT_32 num) ///< [in] Number of bits extracted from each channel
{
UINT_32 mort = 0;
for (UINT_32 i = 0; i < num; i++)
{
mort |= (GetBit(z, i) << (3 * i));
mort |= (GetBit(y, i) << (3 * i + 1));
mort |= (GetBit(x, i) << (3 * i + 2));
}
return mort;
}
/**
****************************************************************************************************
* ReverseBitVector
*
* @brief
* Return reversed lowest num bits of v: v[0]v[1]...v[num-2]v[num-1]
****************************************************************************************************
*/
static inline UINT_32 ReverseBitVector(
UINT_32 v, ///< [in] Reverse operation base value
UINT_32 num) ///< [in] Number of bits used in reverse operation
{
UINT_32 reverse = 0;
for (UINT_32 i = 0; i < num; i++)
{
reverse |= (GetBit(v, num - 1 - i) << i);
}
return reverse;
}
/**
****************************************************************************************************
* FoldXor2d
*
* @brief
* Xor bit vector v[num-1]v[num-2]...v[1]v[0] with v[num]v[num+1]...v[2*num-2]v[2*num-1]
****************************************************************************************************
*/
static inline UINT_32 FoldXor2d(
UINT_32 v, ///< [in] Xor operation base value
UINT_32 num) ///< [in] Number of bits used in fold xor operation
{
return (v & ((1 << num) - 1)) ^ ReverseBitVector(v >> num, num);
}
/**
****************************************************************************************************
* DeMort
*
* @brief
* Return v[0] | v[2] | v[4] | v[6]... | v[2*num - 2]
****************************************************************************************************
*/
static inline UINT_32 DeMort(
UINT_32 v, ///< [in] DeMort operation base value
UINT_32 num) ///< [in] Number of bits used in fold DeMort operation
{
UINT_32 d = 0;
for (UINT_32 i = 0; i < num; i++)
{
d |= ((v & (1 << (i << 1))) >> i);
}
return d;
}
/**
****************************************************************************************************
* FoldXor3d
*
* @brief
* v[0]...v[num-1] ^ v[3*num-1]v[3*num-3]...v[num+2]v[num] ^ v[3*num-2]...v[num+1]v[num-1]
****************************************************************************************************
*/
static inline UINT_32 FoldXor3d(
UINT_32 v, ///< [in] Xor operation base value
UINT_32 num) ///< [in] Number of bits used in fold xor operation
{
UINT_32 t = v & ((1 << num) - 1);
t ^= ReverseBitVector(DeMort(v >> num, num), num);
t ^= ReverseBitVector(DeMort(v >> (num + 1), num), num);
return t;
}
/**
****************************************************************************************************
* InitChannel
*
* @brief
* Set channel initialization value via a return value
****************************************************************************************************
*/
static inline ADDR_CHANNEL_SETTING InitChannel(
UINT_32 valid, ///< [in] valid setting
UINT_32 channel, ///< [in] channel setting
UINT_32 index) ///< [in] index setting
{
ADDR_CHANNEL_SETTING t;
t.valid = valid;
t.channel = channel;
t.index = index;
return t;
}
/**
****************************************************************************************************
* InitChannel
*
* @brief
* Set channel initialization value via channel pointer
****************************************************************************************************
*/
static inline VOID InitChannel(
UINT_32 valid, ///< [in] valid setting
UINT_32 channel, ///< [in] channel setting
UINT_32 index, ///< [in] index setting
ADDR_CHANNEL_SETTING *pChanSet) ///< [out] channel setting to be initialized
{
pChanSet->valid = valid;
pChanSet->channel = channel;
pChanSet->index = index;
}
/**
****************************************************************************************************
* InitChannel
*
* @brief
* Set channel initialization value via another channel
****************************************************************************************************
*/
static inline VOID InitChannel(
ADDR_CHANNEL_SETTING *pChanDst, ///< [in] channel setting to be copied from
ADDR_CHANNEL_SETTING *pChanSrc) ///< [out] channel setting to be initialized
{
pChanDst->valid = pChanSrc->valid;
pChanDst->channel = pChanSrc->channel;
pChanDst->index = pChanSrc->index;
}
/**
****************************************************************************************************
* GetMaxValidChannelIndex
*
* @brief
* Get max valid index for a specific channel
****************************************************************************************************
*/
static inline UINT_32 GetMaxValidChannelIndex(
const ADDR_CHANNEL_SETTING *pChanSet, ///< [in] channel setting to be initialized
UINT_32 searchCount,///< [in] number of channel setting to be searched
UINT_32 channel) ///< [in] channel to be searched
{
UINT_32 index = 0;
for (UINT_32 i = 0; i < searchCount; i++)
{
if (pChanSet[i].valid && (pChanSet[i].channel == channel))
{
index = Max(index, static_cast<UINT_32>(pChanSet[i].index));
}
}
return index;
}
/**
****************************************************************************************************
* GetCoordActiveMask
*
* @brief
* Get bit mask which indicates which positions in the equation match the target coord
****************************************************************************************************
*/
static inline UINT_32 GetCoordActiveMask(
const ADDR_CHANNEL_SETTING *pChanSet, ///< [in] channel setting to be initialized
UINT_32 searchCount,///< [in] number of channel setting to be searched
UINT_32 channel, ///< [in] channel to be searched
UINT_32 index) ///< [in] index to be searched
{
UINT_32 mask = 0;
for (UINT_32 i = 0; i < searchCount; i++)
{
if ((pChanSet[i].valid == TRUE) &&
(pChanSet[i].channel == channel) &&
(pChanSet[i].index == index))
{
mask |= (1 << i);
}
}
return mask;
}
} // Addr
#endif // __ADDR_COMMON_H__

View File

@@ -25,36 +25,33 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrelemlib.cpp
* @brief Contains the class implementation for element/pixel related functions.
****************************************************************************************************
* @brief Contains the class implementation for element/pixel related functions
***************************************************************************************************
*/
#include "addrelemlib.h"
#include "addrlib.h"
namespace Addr
{
/**
****************************************************************************************************
* ElemLib::ElemLib
***************************************************************************************************
* AddrElemLib::AddrElemLib
*
* @brief
* constructor
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
ElemLib::ElemLib(
Lib* pAddrLib) ///< [in] Parent addrlib instance pointer
:
Object(pAddrLib->GetClient()),
AddrElemLib::AddrElemLib(
AddrLib* const pAddrLib) : ///< [in] Parent addrlib instance pointer
AddrObject(pAddrLib->GetClient()),
m_pAddrLib(pAddrLib)
{
switch (m_pAddrLib->GetChipFamily())
switch (m_pAddrLib->GetAddrChipFamily())
{
case ADDR_CHIP_FAMILY_R6XX:
m_depthPlanarType = ADDR_DEPTH_PLANAR_R600;
@@ -78,62 +75,58 @@ ElemLib::ElemLib(
}
/**
****************************************************************************************************
* ElemLib::~ElemLib
***************************************************************************************************
* AddrElemLib::~AddrElemLib
*
* @brief
* destructor
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
ElemLib::~ElemLib()
AddrElemLib::~AddrElemLib()
{
}
/**
****************************************************************************************************
* ElemLib::Create
***************************************************************************************************
* AddrElemLib::Create
*
* @brief
* Creates and initializes AddrLib object.
*
* @return
* Returns point to ADDR_CREATEINFO if successful.
****************************************************************************************************
***************************************************************************************************
*/
ElemLib* ElemLib::Create(
const Lib* pAddrLib) ///< [in] Pointer of parent AddrLib instance
AddrElemLib* AddrElemLib::Create(
const AddrLib* const pAddrLib) ///< [in] Pointer of parent AddrLib instance
{
ElemLib* pElemLib = NULL;
AddrElemLib* pElemLib = NULL;
if (pAddrLib)
{
VOID* pObj = Object::ClientAlloc(sizeof(ElemLib), pAddrLib->GetClient());
if (pObj)
{
pElemLib = new(pObj) ElemLib(const_cast<Lib* const>(pAddrLib));
}
pElemLib = new(pAddrLib->GetClient()) AddrElemLib(const_cast<AddrLib* const>(pAddrLib));
}
return pElemLib;
}
/**************************************************************************************************
* ElemLib::Flt32sToInt32s
* AddrElemLib::Flt32sToInt32s
*
* @brief
* Convert a ADDR_FLT_32 value to Int32 value
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::Flt32sToInt32s(
VOID AddrElemLib::Flt32sToInt32s(
ADDR_FLT_32 value, ///< [in] ADDR_FLT_32 value
UINT_32 bits, ///< [in] nubmer of bits in value
NumberType numberType, ///< [in] the type of number
AddrNumberType numberType, ///< [in] the type of number
UINT_32* pResult) ///< [out] Int32 value
{
UINT_8 round = 128; //ADDR_ROUND_BY_HALF
@@ -310,8 +303,8 @@ VOID ElemLib::Flt32sToInt32s(
}
/**
****************************************************************************************************
* ElemLib::Int32sToPixel
***************************************************************************************************
* AddrElemLib::Int32sToPixel
*
* @brief
* Pack 32-bit integer values into an uncompressed pixel,
@@ -325,14 +318,14 @@ VOID ElemLib::Flt32sToInt32s(
* an uncompressed pixel. The pixel values are specifies in
* standard order, e.g. depth/stencil. This routine asserts
* if called on compressed pixel.
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::Int32sToPixel(
VOID AddrElemLib::Int32sToPixel(
UINT_32 numComps, ///< [in] number of components
UINT_32* pComps, ///< [in] compnents
UINT_32* pCompBits, ///< [in] total bits in each component
UINT_32* pCompStart, ///< [in] the first bit position of each component
ComponentFlags properties, ///< [in] properties about byteAligned, exportNorm
ADDR_COMPONENT_FLAGS properties, ///< [in] properties about byteAligned, exportNorm
UINT_32 resultBits, ///< [in] result bits: total bpp after decompression
UINT_8* pPixel) ///< [out] a depth/stencil pixel value
{
@@ -383,7 +376,7 @@ VOID ElemLib::Int32sToPixel(
}
/**
****************************************************************************************************
***************************************************************************************************
* Flt32ToDepthPixel
*
* @brief
@@ -391,9 +384,9 @@ VOID ElemLib::Int32sToPixel(
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::Flt32ToDepthPixel(
VOID AddrElemLib::Flt32ToDepthPixel(
AddrDepthFormat format, ///< [in] Depth format
const ADDR_FLT_32 comps[2], ///< [in] two components of depth
UINT_8* pPixel ///< [out] depth pixel value
@@ -401,10 +394,10 @@ VOID ElemLib::Flt32ToDepthPixel(
{
UINT_32 i;
UINT_32 values[2];
ComponentFlags properties; // byteAligned, exportNorm
UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression
ADDR_COMPONENT_FLAGS properties; // byteAligned, exportNorm
UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression
PixelFormatInfo fmt;
ADDR_PIXEL_FORMATINFO fmt;
// get type for each component
PixGetDepthCompInfo(format, &fmt);
@@ -452,7 +445,7 @@ VOID ElemLib::Flt32ToDepthPixel(
}
/**
****************************************************************************************************
***************************************************************************************************
* Flt32ToColorPixel
*
* @brief
@@ -460,9 +453,9 @@ VOID ElemLib::Flt32ToDepthPixel(
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::Flt32ToColorPixel(
VOID AddrElemLib::Flt32ToColorPixel(
AddrColorFormat format, ///< [in] Color format
AddrSurfaceNumber surfNum, ///< [in] Surface number
AddrSurfaceSwap surfSwap, ///< [in] Surface swap
@@ -470,14 +463,14 @@ VOID ElemLib::Flt32ToColorPixel(
UINT_8* pPixel ///< [out] a red/green/blue/alpha pixel value
) const
{
PixelFormatInfo pixelInfo;
ADDR_PIXEL_FORMATINFO pixelInfo;
UINT_32 i;
UINT_32 values[4];
ComponentFlags properties; // byteAligned, exportNorm
UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression
ADDR_COMPONENT_FLAGS properties; // byteAligned, exportNorm
UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression
memset(&pixelInfo, 0, sizeof(PixelFormatInfo));
memset(&pixelInfo, 0, sizeof(ADDR_PIXEL_FORMATINFO));
PixGetColorCompInfo(format, surfNum, surfSwap, &pixelInfo);
@@ -538,8 +531,8 @@ VOID ElemLib::Flt32ToColorPixel(
}
/**
****************************************************************************************************
* ElemLib::GetCompType
***************************************************************************************************
* AddrElemLib::GetCompType
*
* @brief
* Fill per component info
@@ -547,12 +540,12 @@ VOID ElemLib::Flt32ToColorPixel(
* @return
* N/A
*
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::GetCompType(
AddrColorFormat format, ///< [in] surface format
AddrSurfaceNumber numType, ///< [in] number type
PixelFormatInfo* pInfo) ///< [in][out] per component info out
VOID AddrElemLib::GetCompType(
AddrColorFormat format, ///< [in] surface format
AddrSurfaceNumber numType, ///< [in] number type
ADDR_PIXEL_FORMATINFO* pInfo) ///< [in][out] per component info out
{
BOOL_32 handled = FALSE;
@@ -711,8 +704,8 @@ VOID ElemLib::GetCompType(
}
/**
****************************************************************************************************
* ElemLib::GetCompSwap
***************************************************************************************************
* AddrElemLib::GetCompSwap
*
* @brief
* Get components swapped for color surface
@@ -720,11 +713,11 @@ VOID ElemLib::GetCompType(
* @return
* N/A
*
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::GetCompSwap(
AddrSurfaceSwap swap, ///< [in] swap mode
PixelFormatInfo* pInfo) ///< [in,out] output per component info
VOID AddrElemLib::GetCompSwap(
AddrSurfaceSwap swap, ///< [in] swap mode
ADDR_PIXEL_FORMATINFO* pInfo) ///< [in/out] output per component info
{
switch (pInfo->comps)
{
@@ -801,8 +794,8 @@ VOID ElemLib::GetCompSwap(
}
/**
****************************************************************************************************
* ElemLib::GetCompSwap
***************************************************************************************************
* AddrElemLib::GetCompSwap
*
* @brief
* Get components swapped for color surface
@@ -810,12 +803,12 @@ VOID ElemLib::GetCompSwap(
* @return
* N/A
*
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::SwapComps(
UINT_32 c0, ///< [in] component index 0
UINT_32 c1, ///< [in] component index 1
PixelFormatInfo* pInfo) ///< [in,out] output per component info
VOID AddrElemLib::SwapComps(
UINT_32 c0, ///< [in] component index 0
UINT_32 c1, ///< [in] component index 1
ADDR_PIXEL_FORMATINFO* pInfo) ///< [in/out] output per component info
{
UINT_32 start;
UINT_32 bits;
@@ -830,8 +823,8 @@ VOID ElemLib::SwapComps(
}
/**
****************************************************************************************************
* ElemLib::PixGetColorCompInfo
***************************************************************************************************
* AddrElemLib::PixGetColorCompInfo
*
* @brief
* Get per component info for color surface
@@ -839,13 +832,13 @@ VOID ElemLib::SwapComps(
* @return
* N/A
*
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::PixGetColorCompInfo(
AddrColorFormat format, ///< [in] surface format, read from register
AddrSurfaceNumber number, ///< [in] pixel number type
AddrSurfaceSwap swap, ///< [in] component swap mode
PixelFormatInfo* pInfo ///< [out] output per component info
VOID AddrElemLib::PixGetColorCompInfo(
AddrColorFormat format, ///< [in] surface format, read from register
AddrSurfaceNumber number, ///< [in] pixel number type
AddrSurfaceSwap swap, ///< [in] component swap mode
ADDR_PIXEL_FORMATINFO* pInfo ///< [out] output per component info
) const
{
// 1. Get componet bits
@@ -967,8 +960,8 @@ VOID ElemLib::PixGetColorCompInfo(
}
/**
****************************************************************************************************
* ElemLib::PixGetDepthCompInfo
***************************************************************************************************
* AddrElemLib::PixGetDepthCompInfo
*
* @brief
* Get per component info for depth surface
@@ -976,11 +969,11 @@ VOID ElemLib::PixGetColorCompInfo(
* @return
* N/A
*
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::PixGetDepthCompInfo(
AddrDepthFormat format, ///< [in] surface format, read from register
PixelFormatInfo* pInfo ///< [out] output per component bits and type
VOID AddrElemLib::PixGetDepthCompInfo(
AddrDepthFormat format, ///< [in] surface format, read from register
ADDR_PIXEL_FORMATINFO* pInfo ///< [out] output per component bits and type
) const
{
if (m_depthPlanarType == ADDR_DEPTH_PLANAR_R800)
@@ -1065,8 +1058,8 @@ VOID ElemLib::PixGetDepthCompInfo(
}
/**
****************************************************************************************************
* ElemLib::PixGetExportNorm
***************************************************************************************************
* AddrElemLib::PixGetExportNorm
*
* @brief
* Check if fp16 export norm can be enabled.
@@ -1074,9 +1067,9 @@ VOID ElemLib::PixGetDepthCompInfo(
* @return
* TRUE if this can be enabled.
*
****************************************************************************************************
***************************************************************************************************
*/
BOOL_32 ElemLib::PixGetExportNorm(
BOOL_32 AddrElemLib::PixGetExportNorm(
AddrColorFormat colorFmt, ///< [in] surface format, read from register
AddrSurfaceNumber numberFmt, ///< [in] pixel number type
AddrSurfaceSwap swap ///< [in] components swap type
@@ -1084,7 +1077,7 @@ BOOL_32 ElemLib::PixGetExportNorm(
{
BOOL_32 enabled = TRUE;
PixelFormatInfo formatInfo;
ADDR_PIXEL_FORMATINFO formatInfo;
PixGetColorCompInfo(colorFmt, numberFmt, swap, &formatInfo);
@@ -1117,24 +1110,24 @@ BOOL_32 ElemLib::PixGetExportNorm(
}
/**
****************************************************************************************************
* ElemLib::AdjustSurfaceInfo
***************************************************************************************************
* AddrElemLib::AdjustSurfaceInfo
*
* @brief
* Adjust bpp/base pitch/width/height according to elemMode and expandX/Y
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::AdjustSurfaceInfo(
ElemMode elemMode, ///< [in] element mode
VOID AddrElemLib::AdjustSurfaceInfo(
AddrElemMode elemMode, ///< [in] element mode
UINT_32 expandX, ///< [in] decompression expansion factor in X
UINT_32 expandY, ///< [in] decompression expansion factor in Y
UINT_32* pBpp, ///< [in,out] bpp
UINT_32* pBasePitch, ///< [in,out] base pitch
UINT_32* pWidth, ///< [in,out] width
UINT_32* pHeight) ///< [in,out] height
UINT_32* pBpp, ///< [in/out] bpp
UINT_32* pBasePitch, ///< [in/out] base pitch
UINT_32* pWidth, ///< [in/out] width
UINT_32* pHeight) ///< [in/out] height
{
UINT_32 packedBits;
UINT_32 basePitch;
@@ -1172,14 +1165,8 @@ VOID ElemLib::AdjustSurfaceInfo(
case ADDR_PACKED_BC3: // Fall through
case ADDR_PACKED_BC5: // Fall through
bBCnFormat = TRUE;
// fall through
case ADDR_PACKED_ASTC:
case ADDR_PACKED_ETC2_128BPP:
packedBits = 128;
break;
case ADDR_PACKED_ETC2_64BPP:
packedBits = 64;
break;
case ADDR_ROUND_BY_HALF: // Fall through
case ADDR_ROUND_TRUNCATE: // Fall through
case ADDR_ROUND_DITHER: // Fall through
@@ -1212,7 +1199,7 @@ VOID ElemLib::AdjustSurfaceInfo(
else
{
// Evergreen family workaround
if (bBCnFormat && (m_pAddrLib->GetChipFamily() == ADDR_CHIP_FAMILY_R8XX))
if (bBCnFormat && (m_pAddrLib->GetAddrChipFamily() == ADDR_CHIP_FAMILY_R8XX))
{
// For BCn we now pad it to POW2 at the beginning so it is safe to
// divide by 4 directly
@@ -1248,23 +1235,23 @@ VOID ElemLib::AdjustSurfaceInfo(
}
/**
****************************************************************************************************
* ElemLib::RestoreSurfaceInfo
***************************************************************************************************
* AddrElemLib::RestoreSurfaceInfo
*
* @brief
* Reverse operation of AdjustSurfaceInfo
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::RestoreSurfaceInfo(
ElemMode elemMode, ///< [in] element mode
VOID AddrElemLib::RestoreSurfaceInfo(
AddrElemMode elemMode, ///< [in] element mode
UINT_32 expandX, ///< [in] decompression expansion factor in X
UINT_32 expandY, ///< [out] decompression expansion factor in Y
UINT_32* pBpp, ///< [in,out] bpp
UINT_32* pWidth, ///< [in,out] width
UINT_32* pHeight) ///< [in,out] height
UINT_32* pBpp, ///< [in/out] bpp
UINT_32* pWidth, ///< [in/out] width
UINT_32* pHeight) ///< [in/out] height
{
UINT_32 originalBits;
UINT_32 width;
@@ -1289,14 +1276,7 @@ VOID ElemLib::RestoreSurfaceInfo(
break;
case ADDR_PACKED_GBGR:
case ADDR_PACKED_BGRG:
if (m_pAddrLib->GetChipFamily() >= ADDR_CHIP_FAMILY_AI)
{
originalBits = bpp / expandX;
}
else
{
originalBits = bpp; // 32-bit packed ==> 2 32-bit result
}
originalBits = bpp; // 32-bit packed ==> 2 32-bit result
break;
case ADDR_PACKED_BC1: // Fall through
case ADDR_PACKED_BC4:
@@ -1304,15 +1284,9 @@ VOID ElemLib::RestoreSurfaceInfo(
break;
case ADDR_PACKED_BC2: // Fall through
case ADDR_PACKED_BC3: // Fall through
case ADDR_PACKED_BC5:
// fall through
case ADDR_PACKED_ASTC:
case ADDR_PACKED_ETC2_128BPP:
case ADDR_PACKED_BC5:
originalBits = 128;
break;
case ADDR_PACKED_ETC2_64BPP:
originalBits = 64;
break;
case ADDR_ROUND_BY_HALF: // Fall through
case ADDR_ROUND_TRUNCATE: // Fall through
case ADDR_ROUND_DITHER: // Fall through
@@ -1353,8 +1327,8 @@ VOID ElemLib::RestoreSurfaceInfo(
}
/**
****************************************************************************************************
* ElemLib::GetBitsPerPixel
***************************************************************************************************
* AddrElemLib::GetBitsPerPixel
*
* @brief
* Compute the total bits per element according to a format
@@ -1363,11 +1337,11 @@ VOID ElemLib::RestoreSurfaceInfo(
*
* @return
* Bits per pixel
****************************************************************************************************
***************************************************************************************************
*/
UINT_32 ElemLib::GetBitsPerPixel(
UINT_32 AddrElemLib::GetBitsPerPixel(
AddrFormat format, ///< [in] surface format code
ElemMode* pElemMode, ///< [out] element mode
AddrElemMode* pElemMode, ///< [out] element mode
UINT_32* pExpandX, ///< [out] decompression expansion factor in X
UINT_32* pExpandY, ///< [out] decompression expansion factor in Y
UINT_32* pUnusedBits) ///< [out] bits unused
@@ -1376,7 +1350,7 @@ UINT_32 ElemLib::GetBitsPerPixel(
UINT_32 expandX = 1;
UINT_32 expandY = 1;
UINT_32 bitUnused = 0;
ElemMode elemMode = ADDR_UNCOMPRESSED; // default value
AddrElemMode elemMode = ADDR_UNCOMPRESSED; // default value
switch (format)
{
@@ -1394,27 +1368,11 @@ UINT_32 ElemLib::GetBitsPerPixel(
break;
case ADDR_FMT_GB_GR: // treat as FMT_8_8
elemMode = ADDR_PACKED_GBGR;
if (m_pAddrLib->GetChipFamily() >= ADDR_CHIP_FAMILY_AI)
{
bpp = 32;
expandX = 2;
}
else
{
bpp = 16;
}
bpp = 16;
break;
case ADDR_FMT_BG_RG: // treat as FMT_8_8
elemMode = ADDR_PACKED_BGRG;
if (m_pAddrLib->GetChipFamily() >= ADDR_CHIP_FAMILY_AI)
{
bpp = 32;
expandX = 2;
}
else
{
bpp = 16;
}
bpp = 16;
break;
case ADDR_FMT_8_8_8_8:
case ADDR_FMT_2_10_10_10:
@@ -1522,119 +1480,6 @@ UINT_32 ElemLib::GetBitsPerPixel(
expandY = 4;
bpp = 128;
break;
case ADDR_FMT_ETC2_64BPP:
elemMode = ADDR_PACKED_ETC2_64BPP;
expandX = 4;
expandY = 4;
bpp = 64;
break;
case ADDR_FMT_ETC2_128BPP:
elemMode = ADDR_PACKED_ETC2_128BPP;
expandX = 4;
expandY = 4;
bpp = 128;
break;
case ADDR_FMT_ASTC_4x4:
elemMode = ADDR_PACKED_ASTC;
expandX = 4;
expandY = 4;
bpp = 128;
break;
case ADDR_FMT_ASTC_5x4:
elemMode = ADDR_PACKED_ASTC;
expandX = 5;
expandY = 4;
bpp = 128;
break;
case ADDR_FMT_ASTC_5x5:
elemMode = ADDR_PACKED_ASTC;
expandX = 5;
expandY = 5;
bpp = 128;
break;
case ADDR_FMT_ASTC_6x5:
elemMode = ADDR_PACKED_ASTC;
expandX = 6;
expandY = 5;
bpp = 128;
break;
case ADDR_FMT_ASTC_6x6:
elemMode = ADDR_PACKED_ASTC;
expandX = 6;
expandY = 6;
bpp = 128;
break;
case ADDR_FMT_ASTC_8x5:
elemMode = ADDR_PACKED_ASTC;
expandX = 8;
expandY = 5;
bpp = 128;
break;
case ADDR_FMT_ASTC_8x6:
elemMode = ADDR_PACKED_ASTC;
expandX = 8;
expandY = 6;
bpp = 128;
break;
case ADDR_FMT_ASTC_8x8:
elemMode = ADDR_PACKED_ASTC;
expandX = 8;
expandY = 8;
bpp = 128;
break;
case ADDR_FMT_ASTC_10x5:
elemMode = ADDR_PACKED_ASTC;
expandX = 10;
expandY = 5;
bpp = 128;
break;
case ADDR_FMT_ASTC_10x6:
elemMode = ADDR_PACKED_ASTC;
expandX = 10;
expandY = 6;
bpp = 128;
break;
case ADDR_FMT_ASTC_10x8:
elemMode = ADDR_PACKED_ASTC;
expandX = 10;
expandY = 8;
bpp = 128;
break;
case ADDR_FMT_ASTC_10x10:
elemMode = ADDR_PACKED_ASTC;
expandX = 10;
expandY = 10;
bpp = 128;
break;
case ADDR_FMT_ASTC_12x10:
elemMode = ADDR_PACKED_ASTC;
expandX = 12;
expandY = 10;
bpp = 128;
break;
case ADDR_FMT_ASTC_12x12:
elemMode = ADDR_PACKED_ASTC;
expandX = 12;
expandY = 12;
bpp = 128;
break;
default:
bpp = 0;
ADDR_ASSERT_ALWAYS();
@@ -1651,23 +1496,23 @@ UINT_32 ElemLib::GetBitsPerPixel(
}
/**
****************************************************************************************************
* ElemLib::GetCompBits
***************************************************************************************************
* AddrElemLib::GetCompBits
*
* @brief
* Set each component's bit size and bit start. And set element mode and number type
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::GetCompBits(
UINT_32 c0, ///< [in] bits of component 0
UINT_32 c1, ///< [in] bits of component 1
UINT_32 c2, ///< [in] bits of component 2
UINT_32 c3, ///< [in] bits of component 3
PixelFormatInfo* pInfo, ///< [out] per component info out
ElemMode elemMode) ///< [in] element mode
VOID AddrElemLib::GetCompBits(
UINT_32 c0, ///< [in] bits of component 0
UINT_32 c1, ///< [in] bits of component 1
UINT_32 c2, ///< [in] bits of component 2
UINT_32 c3, ///< [in] bits of component 3
ADDR_PIXEL_FORMATINFO* pInfo, ///< [out] per component info out
AddrElemMode elemMode) ///< [in] element mode
{
pInfo->comps = 0;
@@ -1698,8 +1543,8 @@ VOID ElemLib::GetCompBits(
}
/**
****************************************************************************************************
* ElemLib::GetCompBits
***************************************************************************************************
* AddrElemLib::GetCompBits
*
* @brief
* Set the clear color (or clear depth/stencil) for a surface
@@ -1710,10 +1555,10 @@ VOID ElemLib::GetCompBits(
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID ElemLib::SetClearComps(
ADDR_FLT_32 comps[4], ///< [in,out] components
VOID AddrElemLib::SetClearComps(
ADDR_FLT_32 comps[4], ///< [in/out] components
BOOL_32 clearColor, ///< [in] TRUE if clear color is set (CLEAR_COLOR)
BOOL_32 float32) ///< [in] TRUE if float32 component (BLEND_FLOAT32)
{
@@ -1754,8 +1599,8 @@ VOID ElemLib::SetClearComps(
}
/**
****************************************************************************************************
* ElemLib::IsBlockCompressed
***************************************************************************************************
* AddrElemLib::IsBlockCompressed
*
* @brief
* TRUE if this is block compressed format
@@ -1764,19 +1609,18 @@ VOID ElemLib::SetClearComps(
*
* @return
* BOOL_32
****************************************************************************************************
***************************************************************************************************
*/
BOOL_32 ElemLib::IsBlockCompressed(
BOOL_32 AddrElemLib::IsBlockCompressed(
AddrFormat format) ///< [in] Format
{
return (((format >= ADDR_FMT_BC1) && (format <= ADDR_FMT_BC7)) ||
((format >= ADDR_FMT_ASTC_4x4) && (format <= ADDR_FMT_ETC2_128BPP)));
return format >= ADDR_FMT_BC1 && format <= ADDR_FMT_BC7;
}
/**
****************************************************************************************************
* ElemLib::IsCompressed
***************************************************************************************************
* AddrElemLib::IsCompressed
*
* @brief
* TRUE if this is block compressed format or 1 bit format
@@ -1785,17 +1629,17 @@ BOOL_32 ElemLib::IsBlockCompressed(
*
* @return
* BOOL_32
****************************************************************************************************
***************************************************************************************************
*/
BOOL_32 ElemLib::IsCompressed(
BOOL_32 AddrElemLib::IsCompressed(
AddrFormat format) ///< [in] Format
{
return IsBlockCompressed(format) || format == ADDR_FMT_BC1 || format == ADDR_FMT_BC7;
}
/**
****************************************************************************************************
* ElemLib::IsExpand3x
***************************************************************************************************
* AddrElemLib::IsExpand3x
*
* @brief
* TRUE if this is 3x expand format
@@ -1804,9 +1648,9 @@ BOOL_32 ElemLib::IsCompressed(
*
* @return
* BOOL_32
****************************************************************************************************
***************************************************************************************************
*/
BOOL_32 ElemLib::IsExpand3x(
BOOL_32 AddrElemLib::IsExpand3x(
AddrFormat format) ///< [in] Format
{
BOOL_32 is3x = FALSE;
@@ -1827,35 +1671,4 @@ BOOL_32 ElemLib::IsExpand3x(
return is3x;
}
/**
****************************************************************************************************
* ElemLib::IsMacroPixelPacked
*
* @brief
* TRUE if this is a macro-pixel-packed format.
*
* @note
*
* @return
* BOOL_32
****************************************************************************************************
*/
BOOL_32 ElemLib::IsMacroPixelPacked(
AddrFormat format) ///< [in] Format
{
BOOL_32 isMacroPixelPacked = FALSE;
switch (format)
{
case ADDR_FMT_BG_RG:
case ADDR_FMT_GB_GR:
isMacroPixelPacked = TRUE;
break;
default:
break;
}
return isMacroPixelPacked;
}
}

View File

@@ -25,10 +25,10 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrelemlib.h
* @brief Contains the class for element/pixel related functions.
****************************************************************************************************
* @brief Contains the class for element/pixel related functions
***************************************************************************************************
*/
#ifndef __ELEM_LIB_H__
@@ -38,13 +38,10 @@
#include "addrobject.h"
#include "addrcommon.h"
namespace Addr
{
class Lib;
class AddrLib;
// The masks for property bits within the Properties INT_32
union ComponentFlags
union ADDR_COMPONENT_FLAGS
{
struct
{
@@ -56,8 +53,8 @@ union ComponentFlags
UINT_32 value;
};
// Copy from legacy lib's NumberType
enum NumberType
// Copy from legacy lib's AddrNumberType
enum AddrNumberType
{
// The following number types have the range [-1..1]
ADDR_NO_NUMBER, // This component doesn't exist and has no default value
@@ -112,38 +109,35 @@ enum NumberType
};
// Copy from legacy lib's AddrElement
enum ElemMode
enum AddrElemMode
{
// These formats allow both packing an unpacking
ADDR_ROUND_BY_HALF, // add 1/2 and truncate when packing this element
ADDR_ROUND_TRUNCATE, // truncate toward 0 for sign/mag, else toward neg
ADDR_ROUND_DITHER, // Pack by dithering -- requires (x,y) position
ADDR_ROUND_BY_HALF, // add 1/2 and truncate when packing this element
ADDR_ROUND_TRUNCATE, // truncate toward 0 for sign/mag, else toward neg
ADDR_ROUND_DITHER, // Pack by dithering -- requires (x,y) position
// These formats only allow unpacking, no packing
ADDR_UNCOMPRESSED, // Elements are not compressed: one data element per pixel/texel
ADDR_EXPANDED, // Elements are split up and stored in multiple data elements
ADDR_PACKED_STD, // Elements are compressed into ExpandX by ExpandY data elements
ADDR_PACKED_REV, // Like ADDR_PACKED, but X order of pixels is reverved
ADDR_PACKED_GBGR, // Elements are compressed 4:2:2 in G1B_G0R order (high to low)
ADDR_PACKED_BGRG, // Elements are compressed 4:2:2 in BG1_RG0 order (high to low)
ADDR_PACKED_BC1, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC2, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC3, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC4, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC5, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_ETC2_64BPP, // ETC2 formats that use 64bpp to represent each 4x4 block
ADDR_PACKED_ETC2_128BPP, // ETC2 formats that use 128bpp to represent each 4x4 block
ADDR_PACKED_ASTC, // Various ASTC formats, all are 128bpp with varying block sizes
ADDR_UNCOMPRESSED, // Elements are not compressed: one data element per pixel/texel
ADDR_EXPANDED, // Elements are split up and stored in multiple data elements
ADDR_PACKED_STD, // Elements are compressed into ExpandX by ExpandY data elements
ADDR_PACKED_REV, // Like ADDR_PACKED, but X order of pixels is reverved
ADDR_PACKED_GBGR, // Elements are compressed 4:2:2 in G1B_G0R order (high to low)
ADDR_PACKED_BGRG, // Elements are compressed 4:2:2 in BG1_RG0 order (high to low)
ADDR_PACKED_BC1, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC2, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC3, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC4, // Each data element is uncompressed to a 4x4 pixel/texel array
ADDR_PACKED_BC5, // Each data element is uncompressed to a 4x4 pixel/texel array
// These formats provide various kinds of compression
ADDR_ZPLANE_R5XX, // Compressed Zplane using r5xx architecture format
ADDR_ZPLANE_R6XX, // Compressed Zplane using r6xx architecture format
ADDR_ZPLANE_R5XX, // Compressed Zplane using r5xx architecture format
ADDR_ZPLANE_R6XX, // Compressed Zplane using r6xx architecture format
//@@ Fill in the compression modes
ADDR_END_ELEMENT // Used for range comparisons
ADDR_END_ELEMENT // Used for range comparisons
};
enum DepthPlanarType
enum AddrDepthPlanarType
{
ADDR_DEPTH_PLANAR_NONE = 0, // No plane z/stencl
ADDR_DEPTH_PLANAR_R600 = 1, // R600 z and stencil planes are store within a tile
@@ -151,40 +145,40 @@ enum DepthPlanarType
};
/**
****************************************************************************************************
* PixelFormatInfo
***************************************************************************************************
* ADDR_PIXEL_FORMATINFO
*
* @brief
* Per component info
*
****************************************************************************************************
***************************************************************************************************
*/
struct PixelFormatInfo
struct ADDR_PIXEL_FORMATINFO
{
UINT_32 compBit[4];
NumberType numType[4];
AddrNumberType numType[4];
UINT_32 compStart[4];
ElemMode elemMode;
AddrElemMode elemMode;
UINT_32 comps; ///< Number of components
};
/**
****************************************************************************************************
***************************************************************************************************
* @brief This class contains asic indepentent element related attributes and operations
****************************************************************************************************
***************************************************************************************************
*/
class ElemLib : public Object
class AddrElemLib : public AddrObject
{
protected:
ElemLib(Lib* pAddrLib);
AddrElemLib(AddrLib* const pAddrLib);
public:
/// Makes this class virtual
virtual ~ElemLib();
virtual ~AddrElemLib();
static ElemLib* Create(
const Lib* pAddrLib);
static AddrElemLib *Create(
const AddrLib* const pAddrLib);
/// The implementation is only for R6xx/R7xx, so make it virtual in case we need for R8xx
BOOL_32 PixGetExportNorm(
@@ -202,32 +196,32 @@ public:
const ADDR_FLT_32 comps[4], UINT_8 *pPixel) const;
static VOID Flt32sToInt32s(
ADDR_FLT_32 value, UINT_32 bits, NumberType numberType, UINT_32* pResult);
ADDR_FLT_32 value, UINT_32 bits, AddrNumberType numberType, UINT_32* pResult);
static VOID Int32sToPixel(
UINT_32 numComps, UINT_32* pComps, UINT_32* pCompBits, UINT_32* pCompStart,
ComponentFlags properties, UINT_32 resultBits, UINT_8* pPixel);
ADDR_COMPONENT_FLAGS properties, UINT_32 resultBits, UINT_8* pPixel);
VOID PixGetColorCompInfo(
AddrColorFormat format, AddrSurfaceNumber number, AddrSurfaceSwap swap,
PixelFormatInfo* pInfo) const;
ADDR_PIXEL_FORMATINFO* pInfo) const;
VOID PixGetDepthCompInfo(
AddrDepthFormat format, PixelFormatInfo* pInfo) const;
AddrDepthFormat format, ADDR_PIXEL_FORMATINFO* pInfo) const;
UINT_32 GetBitsPerPixel(
AddrFormat format, ElemMode* pElemMode = NULL,
AddrFormat format, AddrElemMode* pElemMode,
UINT_32* pExpandX = NULL, UINT_32* pExpandY = NULL, UINT_32* pBitsUnused = NULL);
static VOID SetClearComps(
ADDR_FLT_32 comps[4], BOOL_32 clearColor, BOOL_32 float32);
VOID AdjustSurfaceInfo(
ElemMode elemMode, UINT_32 expandX, UINT_32 expandY,
AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY,
UINT_32* pBpp, UINT_32* pBasePitch, UINT_32* pWidth, UINT_32* pHeight);
VOID RestoreSurfaceInfo(
ElemMode elemMode, UINT_32 expandX, UINT_32 expandY,
AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY,
UINT_32* pBpp, UINT_32* pWidth, UINT_32* pHeight);
/// Checks if depth and stencil are planar inside a tile
@@ -237,7 +231,7 @@ public:
}
/// Sets m_configFlags, copied from AddrLib
VOID SetConfigFlags(ConfigFlags flags)
VOID SetConfigFlags(ADDR_CONFIG_FLAGS flags)
{
m_configFlags = flags;
}
@@ -245,35 +239,32 @@ public:
static BOOL_32 IsCompressed(AddrFormat format);
static BOOL_32 IsBlockCompressed(AddrFormat format);
static BOOL_32 IsExpand3x(AddrFormat format);
static BOOL_32 IsMacroPixelPacked(AddrFormat format);
protected:
static VOID GetCompBits(
UINT_32 c0, UINT_32 c1, UINT_32 c2, UINT_32 c3,
PixelFormatInfo* pInfo,
ElemMode elemMode = ADDR_ROUND_BY_HALF);
ADDR_PIXEL_FORMATINFO* pInfo,
AddrElemMode elemMode = ADDR_ROUND_BY_HALF);
static VOID GetCompType(
AddrColorFormat format, AddrSurfaceNumber numType,
PixelFormatInfo* pInfo);
ADDR_PIXEL_FORMATINFO* pInfo);
static VOID GetCompSwap(
AddrSurfaceSwap swap, PixelFormatInfo* pInfo);
AddrSurfaceSwap swap, ADDR_PIXEL_FORMATINFO* pInfo);
static VOID SwapComps(
UINT_32 c0, UINT_32 c1, PixelFormatInfo* pInfo);
UINT_32 c0, UINT_32 c1, ADDR_PIXEL_FORMATINFO* pInfo);
private:
UINT_32 m_fp16ExportNorm; ///< If allow FP16 to be reported as EXPORT_NORM
DepthPlanarType m_depthPlanarType;
AddrDepthPlanarType m_depthPlanarType;
ConfigFlags m_configFlags; ///< Copy of AddrLib's configFlags
Addr::Lib* const m_pAddrLib; ///< Pointer to parent addrlib instance
ADDR_CONFIG_FLAGS m_configFlags; ///< Copy of AddrLib's configFlags
AddrLib* const m_pAddrLib; ///< Pointer to parent addrlib instance
};
} //Addr
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -25,15 +25,16 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrlib.h
* @brief Contains the Addr::Lib base class definition.
****************************************************************************************************
* @brief Contains the AddrLib base class definition.
***************************************************************************************************
*/
#ifndef __ADDR_LIB_H__
#define __ADDR_LIB_H__
#include "addrinterface.h"
#include "addrobject.h"
#include "addrelemlib.h"
@@ -56,32 +57,26 @@
#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A
#endif
#ifndef CIASICIDGFXENGINE_ARCTICISLAND
#define CIASICIDGFXENGINE_ARCTICISLAND 0x0000000D
#ifndef CIASICIDGFXENGINE_SEAISLAND
#define CIASICIDGFXENGINE_SEAISLAND 0x0000000B
#endif
namespace Addr
{
/**
****************************************************************************************************
***************************************************************************************************
* @brief Neutral enums that define pipeinterleave
****************************************************************************************************
***************************************************************************************************
*/
enum PipeInterleave
enum AddrPipeInterleave
{
ADDR_PIPEINTERLEAVE_256B = 256,
ADDR_PIPEINTERLEAVE_512B = 512,
ADDR_PIPEINTERLEAVE_1KB = 1024,
ADDR_PIPEINTERLEAVE_2KB = 2048,
};
/**
****************************************************************************************************
***************************************************************************************************
* @brief Neutral enums that define DRAM row size
****************************************************************************************************
***************************************************************************************************
*/
enum RowSize
enum AddrRowSize
{
ADDR_ROWSIZE_1KB = 1024,
ADDR_ROWSIZE_2KB = 2048,
@@ -90,11 +85,11 @@ enum RowSize
};
/**
****************************************************************************************************
***************************************************************************************************
* @brief Neutral enums that define bank interleave
****************************************************************************************************
***************************************************************************************************
*/
enum BankInterleave
enum AddrBankInterleave
{
ADDR_BANKINTERLEAVE_1 = 1,
ADDR_BANKINTERLEAVE_2 = 2,
@@ -103,22 +98,35 @@ enum BankInterleave
};
/**
****************************************************************************************************
* @brief Neutral enums that define shader engine tile size
****************************************************************************************************
***************************************************************************************************
* @brief Neutral enums that define MGPU chip tile size
***************************************************************************************************
*/
enum ShaderEngineTileSize
enum AddrChipTileSize
{
ADDR_CHIPTILESIZE_16 = 16,
ADDR_CHIPTILESIZE_32 = 32,
ADDR_CHIPTILESIZE_64 = 64,
ADDR_CHIPTILESIZE_128 = 128,
};
/**
***************************************************************************************************
* @brief Neutral enums that define shader engine tile size
***************************************************************************************************
*/
enum AddrEngTileSize
{
ADDR_SE_TILESIZE_16 = 16,
ADDR_SE_TILESIZE_32 = 32,
};
/**
****************************************************************************************************
***************************************************************************************************
* @brief Neutral enums that define bank swap size
****************************************************************************************************
***************************************************************************************************
*/
enum BankSwapSize
enum AddrBankSwapSize
{
ADDR_BANKSWAP_128B = 128,
ADDR_BANKSWAP_256B = 256,
@@ -127,14 +135,44 @@ enum BankSwapSize
};
/**
****************************************************************************************************
* @brief This class contains asic independent address lib functionalities
****************************************************************************************************
***************************************************************************************************
* @brief Neutral enums that define bank swap size
***************************************************************************************************
*/
class Lib : public Object
enum AddrSampleSplitSize
{
ADDR_SAMPLESPLIT_1KB = 1024,
ADDR_SAMPLESPLIT_2KB = 2048,
ADDR_SAMPLESPLIT_4KB = 4096,
ADDR_SAMPLESPLIT_8KB = 8192,
};
/**
***************************************************************************************************
* @brief Flags for AddrTileMode
***************************************************************************************************
*/
struct AddrTileModeFlags
{
UINT_32 thickness : 4;
UINT_32 isLinear : 1;
UINT_32 isMicro : 1;
UINT_32 isMacro : 1;
UINT_32 isMacro3d : 1;
UINT_32 isPrt : 1;
UINT_32 isPrtNoRotation : 1;
UINT_32 isBankSwapped : 1;
};
/**
***************************************************************************************************
* @brief This class contains asic independent address lib functionalities
***************************************************************************************************
*/
class AddrLib : public AddrObject
{
public:
virtual ~Lib();
virtual ~AddrLib();
static ADDR_E_RETURNCODE Create(
const ADDR_CREATE_INPUT* pCreateInfo, ADDR_CREATE_OUTPUT* pCreateOut);
@@ -145,7 +183,8 @@ public:
delete this;
}
static Lib* GetLib(ADDR_HANDLE hLib);
static AddrLib* GetAddrLib(
ADDR_HANDLE hLib);
/// Returns AddrLib version (from compiled binary instead include file)
UINT_32 GetVersion()
@@ -154,11 +193,114 @@ public:
}
/// Returns asic chip family name defined by AddrLib
ChipFamily GetChipFamily()
AddrChipFamily GetAddrChipFamily()
{
return m_chipFamily;
}
/// Returns tileIndex support
BOOL_32 UseTileIndex(INT_32 index) const
{
return m_configFlags.useTileIndex && (index != TileIndexInvalid);
}
/// Returns combined swizzle support
BOOL_32 UseCombinedSwizzle() const
{
return m_configFlags.useCombinedSwizzle;
}
//
// Interface stubs
//
ADDR_E_RETURNCODE ComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSliceTileSwizzle(
const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ExtractBankPipeSwizzle(
const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE CombineBankPipeSwizzle(
const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeBaseSwizzle(
const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeFmaskInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ConvertTileInfoToHW(
const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ConvertTileIndex(
const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ConvertTileIndex1(
const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE GetTileIndex(
const ADDR_GET_TILEINDEX_INPUT* pIn,
ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileInfo(
const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskInfo(
const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputePrtInfo(
const ADDR_PRT_INFO_INPUT* pIn,
ADDR_PRT_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE Flt32ToDepthPixel(
const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const;
@@ -167,104 +309,387 @@ public:
const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const;
BOOL_32 GetExportNorm(const ELEM_GETEXPORTNORM_INPUT* pIn) const;
ADDR_E_RETURNCODE GetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
BOOL_32 GetExportNorm(
const ELEM_GETEXPORTNORM_INPUT* pIn) const;
protected:
Lib(); // Constructor is protected
Lib(const Client* pClient);
AddrLib(); // Constructor is protected
AddrLib(const AddrClient* pClient);
/// Pure virtual function to get max alignments
virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface info
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface address from coord
virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord(
const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface coord from address
virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr(
const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface tile swizzle
virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle(
const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b
virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle(
const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl combining bank/pipe swizzle
virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle(
UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0;
/// Pure Virtual function for Hwl computing base swizzle
virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle(
const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing HTILE base align
virtual UINT_32 HwlComputeHtileBaseAlign(
BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
/// Pure Virtual function for Hwl computing HTILE bpp
virtual UINT_32 HwlComputeHtileBpp(
BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0;
/// Pure Virtual function for Hwl computing HTILE bytes
virtual UINT_64 HwlComputeHtileBytes(
UINT_32 pitch, UINT_32 height, UINT_32 bpp,
BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0;
/// Pure Virtual function for Hwl computing FMASK info
virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0;
/// Pure Virtual function for Hwl FMASK address from coord
virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord(
const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl FMASK coord from address
virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr(
const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl convert tile info from real value to HW value
virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl compute mipmap info
virtual BOOL_32 HwlComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
/// Pure Virtual function for Hwl compute max cmask blockMax value
virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0;
/// Pure Virtual function for Hwl compute fmask bits
virtual UINT_32 HwlComputeFmaskBits(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
UINT_32* pNumSamples) const = 0;
/// Virtual function to get index (not pure then no need to implement this in all hwls
virtual ADDR_E_RETURNCODE HwlGetTileIndex(
const ADDR_GET_TILEINDEX_INPUT* pIn,
ADDR_GET_TILEINDEX_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
/// Virtual function for Hwl to compute Dcc info
virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
/// Virtual function to get cmask address for tc compatible cmask
virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
// Compute attributes
// HTILE
UINT_32 ComputeHtileInfo(
ADDR_HTILE_FLAGS flags,
UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices,
BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
ADDR_TILEINFO* pTileInfo,
UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes,
UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL,
UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const;
// CMASK
ADDR_E_RETURNCODE ComputeCmaskInfo(
ADDR_CMASK_FLAGS flags,
UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear,
ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL,
UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const;
virtual VOID HwlComputeTileDataWidthAndHeightLinear(
UINT_32* pMacroWidth, UINT_32* pMacroHeight,
UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
// CMASK & HTILE addressing
virtual UINT_64 HwlComputeXmaskAddrFromCoord(
UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice,
UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8,
BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
UINT_32* bitPosition) const;
virtual VOID HwlComputeXmaskCoordFromAddr(
UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
// Surface mipmap
VOID ComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
/// Pure Virtual function for Hwl checking degrade for base level
virtual BOOL_32 HwlDegradeBaseLevel(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
virtual BOOL_32 HwlOverrideTileMode(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
AddrTileMode* pTileMode,
AddrTileType* pTileType) const
{
// not supported in hwl layer, FALSE for not-overrided
return FALSE;
}
AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const;
VOID PadDimensions(
AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
UINT_32* pSlices, UINT_32 sliceAlign) const;
virtual VOID HwlPadDimensions(
AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
UINT_32* pSlices, UINT_32 sliceAlign) const
{
}
//
// Addressing shared for linear/1D tiling
//
UINT_64 ComputeSurfaceAddrFromCoordLinear(
UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample,
UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
UINT_32* pBitPosition) const;
VOID ComputeSurfaceCoordFromAddrLinear(
UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp,
UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const;
VOID ComputeSurfaceCoordFromAddrMicroTiled(
UINT_64 addr, UINT_32 bitPosition,
UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const;
UINT_32 ComputePixelIndexWithinMicroTile(
UINT_32 x, UINT_32 y, UINT_32 z,
UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const;
/// Pure Virtual function for Hwl computing coord from offset inside micro tile
virtual VOID HwlComputePixelCoordFromOffset(
UINT_32 offset, UINT_32 bpp, UINT_32 numSamples,
AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0;
//
// Addressing shared by all
//
virtual UINT_32 HwlGetPipes(
const ADDR_TILEINFO* pTileInfo) const;
UINT_32 ComputePipeFromAddr(
UINT_64 addr, UINT_32 numPipes) const;
/// Pure Virtual function for Hwl computing pipe from coord
virtual UINT_32 ComputePipeFromCoord(
UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode,
UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0;
/// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile
virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
UINT_32 pipe, UINT_32 x) const = 0;
//
// Initialization
//
/// Pure Virtual function for Hwl computing internal global parameters from h/w registers
virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn) = 0;
virtual BOOL_32 HwlInitGlobalParams(
const ADDR_CREATE_INPUT* pCreateIn) = 0;
/// Pure Virtual function for Hwl converting chip family
virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) = 0;
/// Get equation table pointer and number of equations
virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const
{
*ppEquationTable = NULL;
return 0;
}
virtual AddrChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) = 0;
//
// Misc helper
//
static UINT_32 Bits2Number(UINT_32 bitNum, ...);
static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT];
static UINT_32 ComputeSurfaceThickness(
AddrTileMode tileMode);
// Checking tile mode
static BOOL_32 IsMacroTiled(AddrTileMode tileMode);
static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode);
static BOOL_32 IsLinear(AddrTileMode tileMode);
static BOOL_32 IsMicroTiled(AddrTileMode tileMode);
static BOOL_32 IsPrtTileMode(AddrTileMode tileMode);
static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode);
static UINT_32 Bits2Number(UINT_32 bitNum,...);
static UINT_32 GetNumFragments(UINT_32 numSamples, UINT_32 numFrags)
{
return (numFrags != 0) ? numFrags : Max(1u, numSamples);
return numFrags != 0 ? numFrags : Max(1u, numSamples);
}
/// Returns pointer of ElemLib
ElemLib* GetElemLib() const
/// Returns pointer of AddrElemLib
AddrElemLib* GetElemLib() const
{
return m_pElemLib;
}
/// Return TRUE if tile info is needed
BOOL_32 UseTileInfo() const
{
return !m_configFlags.ignoreTileInfo;
}
/// Returns fillSizeFields flag
UINT_32 GetFillSizeFieldsFlags() const
{
return m_configFlags.fillSizeFields;
}
/// Adjusts pitch alignment for flipping surface
VOID AdjustPitchAlignment(
ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const;
/// Overwrite tile config according to tile index
virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
INT_32 index, INT_32 macroModeIndex,
ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const;
/// Overwrite macro tile config according to tile index
virtual INT_32 HwlComputeMacroModeIndex(
INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL
) const
{
return TileIndexNoMacroIndex;
}
/// Pre-handler of 3x pitch (96 bit) adjustment
virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
/// Post-handler of 3x pitch adjustment
virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
/// Check miplevel after surface adjustment
ADDR_E_RETURNCODE PostComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
/// Quad buffer stereo support, has its implementation in ind. layer
virtual BOOL_32 ComputeQbStereoInfo(
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
/// Pure virutual function to compute stereo bank swizzle for right eye
virtual UINT_32 HwlComputeQbStereoRightSwizzle(
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
private:
// Disallow the copy constructor
Lib(const Lib& a);
AddrLib(const AddrLib& a);
// Disallow the assignment operator
Lib& operator=(const Lib& a);
AddrLib& operator=(const AddrLib& a);
VOID SetChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision);
VOID SetAddrChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision);
UINT_32 ComputeCmaskBaseAlign(
ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const;
UINT_64 ComputeCmaskBytes(
UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const;
//
// CMASK/HTILE shared methods
//
VOID ComputeTileDataWidthAndHeight(
UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo,
UINT_32* pMacroWidth, UINT_32* pMacroHeight) const;
UINT_32 ComputeXmaskCoordYFromPipe(
UINT_32 pipe, UINT_32 x) const;
VOID SetMinPitchAlignPixels(UINT_32 minPitchAlignPixels);
BOOL_32 DegradeBaseLevel(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const;
protected:
LibClass m_class; ///< Store class type (HWL type)
AddrLibClass m_class; ///< Store class type (HWL type)
ChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h
AddrChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h
UINT_32 m_chipRevision; ///< Revision id from xxx_id.h
UINT_32 m_chipRevision; ///< Revision id from xxx_id.h
UINT_32 m_version; ///< Current version
UINT_32 m_version; ///< Current version
//
// Global parameters
//
ConfigFlags m_configFlags; ///< Global configuration flags. Note this is setup by
ADDR_CONFIG_FLAGS m_configFlags; ///< Global configuration flags. Note this is setup by
/// AddrLib instead of Client except forceLinearAligned
UINT_32 m_pipes; ///< Number of pipes
UINT_32 m_banks; ///< Number of banks
UINT_32 m_pipes; ///< Number of pipes
UINT_32 m_banks; ///< Number of banks
/// For r800 this is MC_ARB_RAMCFG.NOOFBANK
/// Keep it here to do default parameter calculation
UINT_32 m_pipeInterleaveBytes;
UINT_32 m_pipeInterleaveBytes;
///< Specifies the size of contiguous address space
/// within each tiling pipe when making linear
/// accesses. (Formerly Group Size)
UINT_32 m_rowSize; ///< DRAM row size, in bytes
UINT_32 m_rowSize; ///< DRAM row size, in bytes
UINT_32 m_minPitchAlignPixels; ///< Minimum pitch alignment in pixels
UINT_32 m_maxSamples; ///< Max numSamples
UINT_32 m_minPitchAlignPixels; ///< Minimum pitch alignment in pixels
UINT_32 m_maxSamples; ///< Max numSamples
private:
ElemLib* m_pElemLib; ///< Element Lib pointer
AddrElemLib* m_pElemLib; ///< Element Lib pointer
};
Lib* SiHwlInit (const Client* pClient);
Lib* CiHwlInit (const Client* pClient);
Lib* Gfx9HwlInit (const Client* pClient);
} // Addr
AddrLib* AddrSIHwlInit (const AddrClient* pClient);
AddrLib* AddrCIHwlInit (const AddrClient* pClient);
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,545 +0,0 @@
/*
* Copyright © 2016 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
/**
****************************************************************************************************
* @file addrlib1.h
* @brief Contains the Addr::V1::Lib class definition.
****************************************************************************************************
*/
#ifndef __ADDR_LIB1_H__
#define __ADDR_LIB1_H__
#include "addrlib.h"
namespace Addr
{
namespace V1
{
/**
****************************************************************************************************
* @brief Neutral enums that define bank swap size
****************************************************************************************************
*/
enum SampleSplitSize
{
ADDR_SAMPLESPLIT_1KB = 1024,
ADDR_SAMPLESPLIT_2KB = 2048,
ADDR_SAMPLESPLIT_4KB = 4096,
ADDR_SAMPLESPLIT_8KB = 8192,
};
/**
****************************************************************************************************
* @brief Flags for AddrTileMode
****************************************************************************************************
*/
struct TileModeFlags
{
UINT_32 thickness : 4;
UINT_32 isLinear : 1;
UINT_32 isMicro : 1;
UINT_32 isMacro : 1;
UINT_32 isMacro3d : 1;
UINT_32 isPrt : 1;
UINT_32 isPrtNoRotation : 1;
UINT_32 isBankSwapped : 1;
};
static const UINT_32 Block64K = 0x10000;
static const UINT_32 PrtTileSize = Block64K;
/**
****************************************************************************************************
* @brief This class contains asic independent address lib functionalities
****************************************************************************************************
*/
class Lib : public Addr::Lib
{
public:
virtual ~Lib();
static Lib* GetLib(
ADDR_HANDLE hLib);
/// Returns tileIndex support
BOOL_32 UseTileIndex(INT_32 index) const
{
return m_configFlags.useTileIndex && (index != TileIndexInvalid);
}
/// Returns combined swizzle support
BOOL_32 UseCombinedSwizzle() const
{
return m_configFlags.useCombinedSwizzle;
}
//
// Interface stubs
//
ADDR_E_RETURNCODE ComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSliceTileSwizzle(
const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ExtractBankPipeSwizzle(
const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE CombineBankPipeSwizzle(
const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeBaseSwizzle(
const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeFmaskInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ConvertTileInfoToHW(
const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ConvertTileIndex(
const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE GetMacroModeIndex(
const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ConvertTileIndex1(
const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE GetTileIndex(
const ADDR_GET_TILEINDEX_INPUT* pIn,
ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileInfo(
const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskInfo(
const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputePrtInfo(
const ADDR_PRT_INFO_INPUT* pIn,
ADDR_PRT_INFO_OUTPUT* pOut) const;
protected:
Lib(); // Constructor is protected
Lib(const Client* pClient);
/// Pure Virtual function for Hwl computing surface info
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface address from coord
virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord(
const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface coord from address
virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr(
const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing surface tile swizzle
virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle(
const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b
virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle(
const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl combining bank/pipe swizzle
virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle(
UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0;
/// Pure Virtual function for Hwl computing base swizzle
virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle(
const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl computing HTILE base align
virtual UINT_32 HwlComputeHtileBaseAlign(
BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
/// Pure Virtual function for Hwl computing HTILE bpp
virtual UINT_32 HwlComputeHtileBpp(
BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0;
/// Pure Virtual function for Hwl computing HTILE bytes
virtual UINT_64 HwlComputeHtileBytes(
UINT_32 pitch, UINT_32 height, UINT_32 bpp,
BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0;
/// Pure Virtual function for Hwl computing FMASK info
virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0;
/// Pure Virtual function for Hwl FMASK address from coord
virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord(
const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl FMASK coord from address
virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr(
const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl convert tile info from real value to HW value
virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0;
/// Pure Virtual function for Hwl compute mipmap info
virtual BOOL_32 HwlComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
/// Pure Virtual function for Hwl compute max cmask blockMax value
virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0;
/// Pure Virtual function for Hwl compute fmask bits
virtual UINT_32 HwlComputeFmaskBits(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
UINT_32* pNumSamples) const = 0;
/// Virtual function to get index (not pure then no need to implement this in all hwls
virtual ADDR_E_RETURNCODE HwlGetTileIndex(
const ADDR_GET_TILEINDEX_INPUT* pIn,
ADDR_GET_TILEINDEX_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
/// Virtual function for Hwl to compute Dcc info
virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
/// Virtual function to get cmask address for tc compatible cmask
virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
/// Virtual function to get htile address for tc compatible htile
virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const
{
return ADDR_NOTSUPPORTED;
}
// Compute attributes
// HTILE
UINT_32 ComputeHtileInfo(
ADDR_HTILE_FLAGS flags,
UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices,
BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
ADDR_TILEINFO* pTileInfo,
UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes,
UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL,
UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const;
// CMASK
ADDR_E_RETURNCODE ComputeCmaskInfo(
ADDR_CMASK_FLAGS flags,
UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear,
ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL,
UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const;
virtual VOID HwlComputeTileDataWidthAndHeightLinear(
UINT_32* pMacroWidth, UINT_32* pMacroHeight,
UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
// CMASK & HTILE addressing
virtual UINT_64 HwlComputeXmaskAddrFromCoord(
UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice,
UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8,
BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
UINT_32* bitPosition) const;
virtual VOID HwlComputeXmaskCoordFromAddr(
UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
// Surface mipmap
VOID ComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
/// Pure Virtual function for Hwl to get macro tiled alignment info
virtual BOOL_32 HwlGetAlignmentInfoMacroTiled(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0;
virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
{
// not supported in hwl layer
}
virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
{
// not supported in hwl layer
}
virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
{
// not supported in hwl layer
}
AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const;
VOID PadDimensions(
AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
UINT_32* pSlices, UINT_32 sliceAlign) const;
virtual VOID HwlPadDimensions(
AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel,
UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign) const
{
}
//
// Addressing shared for linear/1D tiling
//
UINT_64 ComputeSurfaceAddrFromCoordLinear(
UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample,
UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
UINT_32* pBitPosition) const;
VOID ComputeSurfaceCoordFromAddrLinear(
UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp,
UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const;
VOID ComputeSurfaceCoordFromAddrMicroTiled(
UINT_64 addr, UINT_32 bitPosition,
UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const;
ADDR_E_RETURNCODE ComputeMicroTileEquation(
UINT_32 bpp, AddrTileMode tileMode,
AddrTileType microTileType, ADDR_EQUATION* pEquation) const;
UINT_32 ComputePixelIndexWithinMicroTile(
UINT_32 x, UINT_32 y, UINT_32 z,
UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const;
/// Pure Virtual function for Hwl computing coord from offset inside micro tile
virtual VOID HwlComputePixelCoordFromOffset(
UINT_32 offset, UINT_32 bpp, UINT_32 numSamples,
AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0;
//
// Addressing shared by all
//
virtual UINT_32 HwlGetPipes(
const ADDR_TILEINFO* pTileInfo) const;
UINT_32 ComputePipeFromAddr(
UINT_64 addr, UINT_32 numPipes) const;
virtual ADDR_E_RETURNCODE ComputePipeEquation(
UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const
{
return ADDR_NOTSUPPORTED;
}
/// Pure Virtual function for Hwl computing pipe from coord
virtual UINT_32 ComputePipeFromCoord(
UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode,
UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0;
/// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile
virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
UINT_32 pipe, UINT_32 x) const = 0;
//
// Misc helper
//
static const TileModeFlags ModeFlags[ADDR_TM_COUNT];
static UINT_32 Thickness(
AddrTileMode tileMode);
// Checking tile mode
static BOOL_32 IsMacroTiled(AddrTileMode tileMode);
static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode);
static BOOL_32 IsLinear(AddrTileMode tileMode);
static BOOL_32 IsMicroTiled(AddrTileMode tileMode);
static BOOL_32 IsPrtTileMode(AddrTileMode tileMode);
static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode);
/// Return TRUE if tile info is needed
BOOL_32 UseTileInfo() const
{
return !m_configFlags.ignoreTileInfo;
}
/// Adjusts pitch alignment for flipping surface
VOID AdjustPitchAlignment(
ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const;
/// Overwrite tile config according to tile index
virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const;
/// Overwrite macro tile config according to tile index
virtual INT_32 HwlComputeMacroModeIndex(
INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL
) const
{
return TileIndexNoMacroIndex;
}
/// Pre-handler of 3x pitch (96 bit) adjustment
virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
/// Post-handler of 3x pitch adjustment
virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
/// Check miplevel after surface adjustment
ADDR_E_RETURNCODE PostComputeMipLevel(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
/// Quad buffer stereo support, has its implementation in ind. layer
VOID ComputeQbStereoInfo(
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
/// Pure virutual function to compute stereo bank swizzle for right eye
virtual UINT_32 HwlComputeQbStereoRightSwizzle(
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
VOID OptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
/// Overwrite tile setting to PRT
virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
{
}
static BOOL_32 DegradeTo1D(
UINT_32 width, UINT_32 height,
UINT_32 macroTilePitchAlign, UINT_32 macroTileHeightAlign);
private:
// Disallow the copy constructor
Lib(const Lib& a);
// Disallow the assignment operator
Lib& operator=(const Lib& a);
UINT_32 ComputeCmaskBaseAlign(
ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const;
UINT_64 ComputeCmaskBytes(
UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const;
//
// CMASK/HTILE shared methods
//
VOID ComputeTileDataWidthAndHeight(
UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo,
UINT_32* pMacroWidth, UINT_32* pMacroHeight) const;
UINT_32 ComputeXmaskCoordYFromPipe(
UINT_32 pipe, UINT_32 x) const;
};
} // V1
} // Addr
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,788 +0,0 @@
/*
* Copyright © 2017 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
/**
************************************************************************************************************************
* @file addrlib2.h
* @brief Contains the Addr::V2::Lib class definition.
************************************************************************************************************************
*/
#ifndef __ADDR2_LIB2_H__
#define __ADDR2_LIB2_H__
#include "addrlib.h"
namespace Addr
{
namespace V2
{
/**
************************************************************************************************************************
* @brief Flags for SwizzleModeTable
************************************************************************************************************************
*/
struct SwizzleModeFlags
{
// Swizzle mode
UINT_32 isLinear : 1; // Linear
// Block size
UINT_32 is256b : 1; // Block size is 256B
UINT_32 is4kb : 1; // Block size is 4KB
UINT_32 is64kb : 1; // Block size is 64KB
UINT_32 isVar : 1; // Block size is variable
UINT_32 isZ : 1; // Z order swizzle mode
UINT_32 isStd : 1; // Standard swizzle mode
UINT_32 isDisp : 1; // Display swizzle mode
UINT_32 isRot : 1; // Rotate swizzle mode
// XOR mode
UINT_32 isXor : 1; // XOR after swizzle if set
UINT_32 isT : 1; // T mode
UINT_32 isRtOpt : 1; // mode opt for render target
};
struct Dim2d
{
UINT_32 w;
UINT_32 h;
};
struct Dim3d
{
UINT_32 w;
UINT_32 h;
UINT_32 d;
};
/**
************************************************************************************************************************
* @brief This class contains asic independent address lib functionalities
************************************************************************************************************************
*/
class Lib : public Addr::Lib
{
public:
virtual ~Lib();
static Lib* GetLib(
ADDR_HANDLE hLib);
//
// Interface stubs
//
// For data surface
ADDR_E_RETURNCODE ComputeSurfaceInfo(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
// For HTile
ADDR_E_RETURNCODE ComputeHtileInfo(
const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
// For CMask
ADDR_E_RETURNCODE ComputeCmaskInfo(
const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn,
ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const;
// For FMask
ADDR_E_RETURNCODE ComputeFmaskInfo(
const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut);
ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const;
// For DCC key
ADDR_E_RETURNCODE ComputeDccInfo(
const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) const;
// Misc
ADDR_E_RETURNCODE ComputePipeBankXor(
const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut);
ADDR_E_RETURNCODE ComputeSlicePipeBankXor(
const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut);
ADDR_E_RETURNCODE ComputeSubResourceOffsetForSwizzlePattern(
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut);
ADDR_E_RETURNCODE Addr2GetPreferredSurfaceSetting(
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const;
protected:
Lib(); // Constructor is protected
Lib(const Client* pClient);
static const UINT_32 MaxNumOfBpp = 5;
static const Dim2d Block256_2d[MaxNumOfBpp];
static const Dim3d Block1K_3d[MaxNumOfBpp];
static const UINT_32 PrtAlignment = 64 * 1024;
static const UINT_32 MaxMacroBits = 20;
// Checking block size
BOOL_32 IsBlock256b(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].is256b;
}
BOOL_32 IsBlock4kb(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].is4kb;
}
BOOL_32 IsBlock64kb(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].is64kb;
}
BOOL_32 IsBlockVariable(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isVar;
}
// Checking swizzle mode
BOOL_32 IsLinear(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isLinear;
}
BOOL_32 IsRtOptSwizzle(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isRtOpt;
}
BOOL_32 IsZOrderSwizzle(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isZ;
}
BOOL_32 IsStandardSwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
{
return HwlIsStandardSwizzle(resourceType, swizzleMode);
}
BOOL_32 IsDisplaySwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
{
return HwlIsDisplaySwizzle(resourceType, swizzleMode);
}
BOOL_32 IsRotateSwizzle(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isRot;
}
BOOL_32 IsXor(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isXor;
}
BOOL_32 IsPrt(AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isT;
}
BOOL_32 IsNonPrtXor(AddrSwizzleMode swizzleMode) const
{
return (IsXor(swizzleMode) && (IsPrt(swizzleMode) == FALSE));
}
// Checking resource type
static BOOL_32 IsTex1d(AddrResourceType resourceType)
{
return (resourceType == ADDR_RSRC_TEX_1D);
}
static BOOL_32 IsTex2d(AddrResourceType resourceType)
{
return (resourceType == ADDR_RSRC_TEX_2D);
}
static BOOL_32 IsTex3d(AddrResourceType resourceType)
{
return (resourceType == ADDR_RSRC_TEX_3D);
}
BOOL_32 IsThick(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
{
return HwlIsThick(resourceType, swizzleMode);
}
BOOL_32 IsThin(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
{
return HwlIsThin(resourceType, swizzleMode);
}
UINT_32 GetBlockSizeLog2(AddrSwizzleMode swizzleMode) const
{
UINT_32 blockSizeLog2 = 0;
if (IsBlock256b(swizzleMode) || IsLinear(swizzleMode))
{
blockSizeLog2 = 8;
}
else if (IsBlock4kb(swizzleMode))
{
blockSizeLog2 = 12;
}
else if (IsBlock64kb(swizzleMode))
{
blockSizeLog2 = 16;
}
else if (IsBlockVariable(swizzleMode))
{
blockSizeLog2 = m_blockVarSizeLog2;
}
else
{
ADDR_ASSERT_ALWAYS();
}
return blockSizeLog2;
}
UINT_32 GetBlockSize(AddrSwizzleMode swizzleMode) const
{
return (1 << GetBlockSizeLog2(swizzleMode));
}
static UINT_32 GetFmaskBpp(UINT_32 sample, UINT_32 frag)
{
sample = (sample == 0) ? 1 : sample;
frag = (frag == 0) ? sample : frag;
UINT_32 fmaskBpp = QLog2(frag);
if (sample > frag)
{
fmaskBpp++;
}
if (fmaskBpp == 3)
{
fmaskBpp = 4;
}
fmaskBpp = Max(8u, fmaskBpp * sample);
return fmaskBpp;
}
virtual BOOL_32 HwlIsStandardSwizzle(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
ADDR_NOT_IMPLEMENTED();
return FALSE;
}
virtual BOOL_32 HwlIsDisplaySwizzle(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
ADDR_NOT_IMPLEMENTED();
return FALSE;
}
virtual BOOL_32 HwlIsThin(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
ADDR_NOT_IMPLEMENTED();
return FALSE;
}
virtual BOOL_32 HwlIsThick(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
ADDR_NOT_IMPLEMENTED();
return FALSE;
}
virtual ADDR_E_RETURNCODE HwlComputeHtileInfo(
const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeCmaskInfo(
const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn,
ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr(
const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeBlock256Equation(
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2,
ADDR_EQUATION* pEquation) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeThinEquation(
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2,
ADDR_EQUATION* pEquation) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeThickEquation(
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2,
ADDR_EQUATION* pEquation) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual UINT_32 HwlGetEquationIndex(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_INVALID_EQUATION_INDEX;
}
UINT_32 GetEquationIndex(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const
{
return HwlGetEquationIndex(pIn, pOut);
}
virtual UINT_32 HwlComputeSurfaceBaseAlign(AddrSwizzleMode swizzleMode) const
{
ADDR_NOT_IMPLEMENTED();
return 0;
}
virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor(
const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern(
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTIMPLEMENTED;
}
virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTIMPLEMENTED;
}
ADDR_E_RETURNCODE ComputeBlock256Equation(
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2,
ADDR_EQUATION* pEquation) const;
ADDR_E_RETURNCODE ComputeThinEquation(
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2,
ADDR_EQUATION* pEquation) const;
ADDR_E_RETURNCODE ComputeThickEquation(
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2,
ADDR_EQUATION* pEquation) const;
ADDR_E_RETURNCODE ComputeSurfaceInfoSanityCheck(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
ADDR_E_RETURNCODE ComputeSurfaceInfoLinear(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceLinearPadding(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32* pMipmap0PaddedWidth,
UINT_32* pSlice0PaddedHeight,
ADDR2_MIP_INFO* pMipInfo = NULL) const;
ADDR_E_RETURNCODE ComputeSurfaceInfoTiled(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordLinear(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordTiled(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddrLinear(
const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddrTiled(
const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
UINT_32 ComputeSurface2DMicroBlockOffset(
const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const;
UINT_32 ComputeSurface3DMicroBlockOffset(
const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const;
// Misc
ADDR_E_RETURNCODE ComputeBlockDimensionForSurf(
UINT_32* pWidth,
UINT_32* pHeight,
UINT_32* pDepth,
UINT_32 bpp,
UINT_32 numSamples,
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const;
ADDR_E_RETURNCODE ComputeBlockDimension(
UINT_32* pWidth,
UINT_32* pHeight,
UINT_32* pDepth,
UINT_32 bpp,
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const;
static UINT_64 ComputePadSize(
const Dim3d* pBlkDim,
UINT_32 width,
UINT_32 height,
UINT_32 numSlices,
Dim3d* pPadDim)
{
pPadDim->w = PowTwoAlign(width ,pBlkDim->w);
pPadDim->h = PowTwoAlign(height ,pBlkDim->h);
pPadDim->d = PowTwoAlign(numSlices, pBlkDim->d);
return static_cast<UINT_64>(pPadDim->w) * pPadDim->h * pPadDim->d;
}
static ADDR_E_RETURNCODE ExtractPipeBankXor(
UINT_32 pipeBankXor,
UINT_32 bankBits,
UINT_32 pipeBits,
UINT_32* pBankX,
UINT_32* pPipeX);
static BOOL_32 Valid3DMipSliceIdConstraint(
UINT_32 numSlices,
UINT_32 mipId,
UINT_32 slice)
{
return (Max((numSlices >> mipId), 1u) > slice);
}
Dim3d GetMipTailDim(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 blockWidth,
UINT_32 blockHeight,
UINT_32 blockDepth) const;
BOOL_32 IsInMipTail(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
Dim3d mipTailDim,
UINT_32 width,
UINT_32 height,
UINT_32 depth) const
{
BOOL_32 inTail = ((width <= mipTailDim.w) &&
(height <= mipTailDim.h) &&
(IsThin(resourceType, swizzleMode) || (depth <= mipTailDim.d)));
return inTail;
}
static BOOL_32 IsLocalHeap(AddrResrouceLocation resourceType)
{
return ((resourceType == ADDR_RSRC_LOC_LOCAL) ||
(resourceType == ADDR_RSRC_LOC_INVIS));
}
static BOOL_32 IsInvisibleHeap(AddrResrouceLocation resourceType)
{
return (resourceType == ADDR_RSRC_LOC_INVIS);
}
static BOOL_32 IsNonlocalHeap(AddrResrouceLocation resourceType)
{
return ((resourceType == ADDR_RSRC_LOC_USWC) ||
(resourceType == ADDR_RSRC_LOC_CACHED));
}
UINT_32 GetPipeLog2ForMetaAddressing(BOOL_32 pipeAligned, AddrSwizzleMode swizzleMode) const
{
UINT_32 numPipeLog2 = pipeAligned ? Min(m_pipesLog2 + m_seLog2, 5u) : 0;
if (IsXor(swizzleMode))
{
UINT_32 maxPipeLog2 = GetBlockSizeLog2(swizzleMode) - m_pipeInterleaveLog2;
numPipeLog2 = Min(numPipeLog2, maxPipeLog2);
}
return numPipeLog2;
}
UINT_32 GetPipeNumForMetaAddressing(BOOL_32 pipeAligned, AddrSwizzleMode swizzleMode) const
{
return (1 << GetPipeLog2ForMetaAddressing(pipeAligned, swizzleMode));
}
VOID VerifyMipLevelInfo(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const
{
#if DEBUG
if (pIn->numMipLevels > 1)
{
UINT_32 actualMipLevels = 1;
switch (pIn->resourceType)
{
case ADDR_RSRC_TEX_3D:
// Fall through to share 2D case
actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->numSlices) + 1);
case ADDR_RSRC_TEX_2D:
// Fall through to share 1D case
actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->height) + 1);
case ADDR_RSRC_TEX_1D:
// Base 1D case
actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->width) + 1);
break;
default:
ADDR_ASSERT_ALWAYS();
break;
}
// Client pass wrong number of MipLevels to addrlib and result will be bad.
// Not sure if we should fail this calling instead of putting an assertion here.
ADDR_ASSERT(actualMipLevels >= pIn->numMipLevels);
}
#endif
}
ADDR_E_RETURNCODE ApplyCustomerPipeBankXor(
AddrSwizzleMode swizzleMode,
UINT_32 pipeBankXor,
UINT_32 bankBits,
UINT_32 pipeBits,
UINT_32* pBlockOffset) const
{
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (IsXor(swizzleMode))
{
// Apply driver set bankPipeXor
UINT_32 bankX = 0;
UINT_32 pipeX = 0;
returnCode = ExtractPipeBankXor(pipeBankXor, bankBits, pipeBits, &bankX, &pipeX);
*pBlockOffset ^= (pipeX << m_pipeInterleaveLog2);
*pBlockOffset ^= (bankX << (m_pipeInterleaveLog2 + pipeBits));
}
return returnCode;
}
UINT_32 GetPipeXorBits(UINT_32 macroBlockBits) const;
UINT_32 GetBankXorBits(UINT_32 macroBlockBits) const;
ADDR_E_RETURNCODE ApplyCustomizedPitchHeight(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32 elementBytes,
UINT_32 pitchAlignInElement,
UINT_32* pPitch,
UINT_32* pHeight) const;
VOID ComputeQbStereoInfo(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
UINT_32 m_se; ///< Number of shader engine
UINT_32 m_rbPerSe; ///< Number of render backend per shader engine
UINT_32 m_maxCompFrag; ///< Number of max compressed fragment
UINT_32 m_banksLog2; ///< Number of bank Log2
UINT_32 m_pipesLog2; ///< Number of pipe per shader engine Log2
UINT_32 m_seLog2; ///< Number of shader engine Log2
UINT_32 m_rbPerSeLog2; ///< Number of render backend per shader engine Log2
UINT_32 m_maxCompFragLog2; ///< Number of max compressed fragment Log2
UINT_32 m_pipeInterleaveLog2; ///< Log2 of pipe interleave bytes
UINT_32 m_blockVarSizeLog2; ///< Log2 of block var size
SwizzleModeFlags m_swizzleModeTable[ADDR_SW_MAX_TYPE]; ///< Swizzle mode table
private:
// Disallow the copy constructor
Lib(const Lib& a);
// Disallow the assignment operator
Lib& operator=(const Lib& a);
};
} // V2
} // Addr
#endif

View File

@@ -25,27 +25,24 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrobject.cpp
* @brief Contains the Object base class implementation.
****************************************************************************************************
* @brief Contains the AddrObject base class implementation.
***************************************************************************************************
*/
#include "addrinterface.h"
#include "addrobject.h"
namespace Addr
{
/**
****************************************************************************************************
* Object::Object
***************************************************************************************************
* AddrObject::AddrObject
*
* @brief
* Constructor for the Object class.
****************************************************************************************************
* Constructor for the AddrObject class.
***************************************************************************************************
*/
Object::Object()
AddrObject::AddrObject()
{
m_client.handle = NULL;
m_client.callbacks.allocSysMem = NULL;
@@ -54,41 +51,41 @@ Object::Object()
}
/**
****************************************************************************************************
* Object::Object
***************************************************************************************************
* AddrObject::AddrObject
*
* @brief
* Constructor for the Object class.
****************************************************************************************************
* Constructor for the AddrObject class.
***************************************************************************************************
*/
Object::Object(const Client* pClient)
AddrObject::AddrObject(const AddrClient* pClient)
{
m_client = *pClient;
}
/**
****************************************************************************************************
* Object::~Object
***************************************************************************************************
* AddrObject::~AddrObject
*
* @brief
* Destructor for the Object class.
****************************************************************************************************
* Destructor for the AddrObject class.
***************************************************************************************************
*/
Object::~Object()
AddrObject::~AddrObject()
{
}
/**
****************************************************************************************************
* Object::ClientAlloc
***************************************************************************************************
* AddrObject::ClientAlloc
*
* @brief
* Calls instanced allocSysMem inside Client
****************************************************************************************************
* Calls instanced allocSysMem inside AddrClient
***************************************************************************************************
*/
VOID* Object::ClientAlloc(
size_t objSize, ///< [in] Size to allocate
const Client* pClient) ///< [in] Client pointer
VOID* AddrObject::ClientAlloc(
size_t objSize, ///< [in] Size to allocate
const AddrClient* pClient) ///< [in] Client pointer
{
VOID* pObjMem = NULL;
@@ -108,31 +105,30 @@ VOID* Object::ClientAlloc(
}
/**
****************************************************************************************************
* Object::Alloc
***************************************************************************************************
* AddrObject::AddrMalloc
*
* @brief
* A wrapper of ClientAlloc
****************************************************************************************************
***************************************************************************************************
*/
VOID* Object::Alloc(
size_t objSize ///< [in] Size to allocate
) const
VOID* AddrObject::AddrMalloc(
size_t objSize) const ///< [in] Size to allocate
{
return ClientAlloc(objSize, &m_client);
}
/**
****************************************************************************************************
* Object::ClientFree
***************************************************************************************************
* AddrObject::ClientFree
*
* @brief
* Calls freeSysMem inside Client
****************************************************************************************************
* Calls freeSysMem inside AddrClient
***************************************************************************************************
*/
VOID Object::ClientFree(
VOID* pObjMem, ///< [in] User virtual address to free.
const Client* pClient) ///< [in] Client pointer
VOID AddrObject::ClientFree(
VOID* pObjMem, ///< [in] User virtual address to free.
const AddrClient* pClient) ///< [in] Client pointer
{
if (pClient->callbacks.freeSysMem != NULL)
{
@@ -150,68 +146,82 @@ VOID Object::ClientFree(
}
/**
****************************************************************************************************
* Object::Free
***************************************************************************************************
* AddrObject::AddrFree
*
* @brief
* A wrapper of ClientFree
****************************************************************************************************
***************************************************************************************************
*/
VOID Object::Free(
VOID* pObjMem ///< [in] User virtual address to free.
) const
VOID AddrObject::AddrFree(
VOID* pObjMem) const ///< [in] User virtual address to free.
{
ClientFree(pObjMem, &m_client);
}
/**
****************************************************************************************************
* Object::operator new
***************************************************************************************************
* AddrObject::operator new
*
* @brief
* Placement new operator. (with pre-allocated memory pointer)
* Allocates memory needed for AddrObject object. (with ADDR_CLIENT_HANDLE)
*
* @return
* Returns pre-allocated memory pointer.
****************************************************************************************************
* Returns NULL if unsuccessful.
***************************************************************************************************
*/
VOID* Object::operator new(
size_t objSize, ///< [in] Size to allocate
VOID* pMem) ///< [in] Pre-allocated pointer
VOID* AddrObject::operator new(
size_t objSize, ///< [in] Size to allocate
const AddrClient* pClient) ///< [in] Client pointer
{
return pMem;
return ClientAlloc(objSize, pClient);
}
/**
***************************************************************************************************
* AddrObject::operator delete
*
* @brief
* Frees AddrObject object memory.
***************************************************************************************************
*/
VOID AddrObject::operator delete(
VOID* pObjMem, ///< [in] User virtual address to free.
const AddrClient* pClient) ///< [in] Client handle
{
ClientFree(pObjMem, pClient);
}
/**
****************************************************************************************************
* Object::operator delete
***************************************************************************************************
* AddrObject::operator delete
*
* @brief
* Frees Object object memory.
****************************************************************************************************
* Frees AddrObject object memory.
***************************************************************************************************
*/
VOID Object::operator delete(
VOID* pObjMem) ///< [in] User virtual address to free.
VOID AddrObject::operator delete(
VOID* pObjMem) ///< [in] User virtual address to free.
{
Object* pObj = static_cast<Object*>(pObjMem);
AddrObject* pObj = static_cast<AddrObject*>(pObjMem);
ClientFree(pObjMem, &pObj->m_client);
}
/**
****************************************************************************************************
* Object::DebugPrint
***************************************************************************************************
* AddrObject::DebugPrint
*
* @brief
* Print debug message
*
* @return
* N/A
****************************************************************************************************
***************************************************************************************************
*/
VOID Object::DebugPrint(
VOID AddrObject::DebugPrint(
const CHAR* pDebugString, ///< [in] Debug string
...
) const
...) const
{
#if DEBUG
if (m_client.callbacks.debugPrint != NULL)
@@ -234,4 +244,3 @@ VOID Object::DebugPrint(
#endif
}
} // Addr

View File

@@ -25,10 +25,10 @@
*/
/**
****************************************************************************************************
***************************************************************************************************
* @file addrobject.h
* @brief Contains the Object base class definition.
****************************************************************************************************
* @brief Contains the AddrObject base class definition.
***************************************************************************************************
*/
#ifndef __ADDR_OBJECT_H__
@@ -37,59 +37,53 @@
#include "addrtypes.h"
#include "addrcommon.h"
namespace Addr
{
/**
****************************************************************************************************
***************************************************************************************************
* @brief This structure contains client specific data
****************************************************************************************************
***************************************************************************************************
*/
struct Client
struct AddrClient
{
ADDR_CLIENT_HANDLE handle;
ADDR_CALLBACKS callbacks;
};
/**
****************************************************************************************************
***************************************************************************************************
* @brief This class is the base class for all ADDR class objects.
****************************************************************************************************
***************************************************************************************************
*/
class Object
class AddrObject
{
public:
Object();
Object(const Client* pClient);
virtual ~Object();
AddrObject();
AddrObject(const AddrClient* pClient);
virtual ~AddrObject();
VOID* operator new(size_t size, VOID* pMem);
VOID* operator new(size_t size, const AddrClient* pClient);
VOID operator delete(VOID* pObj, const AddrClient* pClient);
VOID operator delete(VOID* pObj);
/// Microsoft compiler requires a matching delete implementation, which seems to be called when
/// bad_alloc is thrown. But currently C++ exception isn't allowed so a dummy implementation is
/// added to eliminate the warning.
VOID operator delete(VOID* pObj, VOID* pMem) { ADDR_ASSERT_ALWAYS(); }
VOID* AddrMalloc(size_t size) const;
VOID AddrFree(VOID* pObj) const;
VOID* Alloc(size_t size) const;
VOID Free(VOID* pObj) const;
VOID DebugPrint(
const CHAR* pDebugString,
...) const;
VOID DebugPrint(const CHAR* pDebugString, ...) const;
const Client* GetClient() const {return &m_client;}
const AddrClient* GetClient() const {return &m_client;}
protected:
Client m_client;
static VOID* ClientAlloc(size_t size, const Client* pClient);
static VOID ClientFree(VOID* pObj, const Client* pClient);
AddrClient m_client;
private:
static VOID* ClientAlloc(size_t size, const AddrClient* pClient);
static VOID ClientFree(VOID* pObj, const AddrClient* pClient);
// disallow the copy constructor
Object(const Object& a);
AddrObject(const AddrObject& a);
// disallow the assignment operator
Object& operator=(const Object& a);
AddrObject& operator=(const AddrObject& a);
};
} // Addr
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,707 +0,0 @@
/*
* Copyright © 2017 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
// Coordinate class implementation
#include "addrcommon.h"
#include "coord.h"
Coordinate::Coordinate()
{
dim = 'x';
ord = 0;
}
Coordinate::Coordinate(INT_8 c, UINT_32 n)
{
set(c,n);
}
VOID Coordinate::set(INT_8 c, UINT_32 n)
{
dim = c;
ord = static_cast<INT_8>(n);
}
UINT_32 Coordinate::ison(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s, UINT_32 m)
{
UINT_32 bit = 1 << (UINT_32)ord;
UINT_32 out = 0;
switch (dim)
{
case 'm': out = m & bit; break;
case 's': out = s & bit; break;
case 'x': out = x & bit; break;
case 'y': out = y & bit; break;
case 'z': out = z & bit; break;
}
return (out != 0) ? 1 : 0;
}
INT_8 Coordinate::getdim()
{
return dim;
}
INT_8 Coordinate::getord()
{
return ord;
}
BOOL_32 Coordinate::operator==(const Coordinate& b)
{
return (dim == b.dim) && (ord == b.ord);
}
BOOL_32 Coordinate::operator<(const Coordinate& b)
{
BOOL_32 ret;
if (dim == b.dim)
{
ret = ord < b.ord;
}
else
{
if (dim == 's' || b.dim == 'm')
{
ret = TRUE;
}
else if (b.dim == 's' || dim == 'm')
{
ret = FALSE;
}
else if (ord == b.ord)
{
ret = dim < b.dim;
}
else
{
ret = ord < b.ord;
}
}
return ret;
}
BOOL_32 Coordinate::operator>(const Coordinate& b)
{
BOOL_32 lt = *this < b;
BOOL_32 eq = *this == b;
return !lt && !eq;
}
BOOL_32 Coordinate::operator<=(const Coordinate& b)
{
return (*this < b) || (*this == b);
}
BOOL_32 Coordinate::operator>=(const Coordinate& b)
{
return !(*this < b);
}
BOOL_32 Coordinate::operator!=(const Coordinate& b)
{
return !(*this == b);
}
Coordinate& Coordinate::operator++(INT_32)
{
ord++;
return *this;
}
// CoordTerm
CoordTerm::CoordTerm()
{
num_coords = 0;
}
VOID CoordTerm::Clear()
{
num_coords = 0;
}
VOID CoordTerm::add(Coordinate& co)
{
// This function adds a coordinate INT_32o the list
// It will prevent the same coordinate from appearing,
// and will keep the list ordered from smallest to largest
UINT_32 i;
for (i = 0; i < num_coords; i++)
{
if (m_coord[i] == co)
{
break;
}
if (m_coord[i] > co)
{
for (UINT_32 j = num_coords; j > i; j--)
{
m_coord[j] = m_coord[j - 1];
}
m_coord[i] = co;
num_coords++;
break;
}
}
if (i == num_coords)
{
m_coord[num_coords] = co;
num_coords++;
}
}
VOID CoordTerm::add(CoordTerm& cl)
{
for (UINT_32 i = 0; i < cl.num_coords; i++)
{
add(cl.m_coord[i]);
}
}
BOOL_32 CoordTerm::remove(Coordinate& co)
{
BOOL_32 remove = FALSE;
for (UINT_32 i = 0; i < num_coords; i++)
{
if (m_coord[i] == co)
{
remove = TRUE;
num_coords--;
}
if (remove)
{
m_coord[i] = m_coord[i + 1];
}
}
return remove;
}
BOOL_32 CoordTerm::Exists(Coordinate& co)
{
BOOL_32 exists = FALSE;
for (UINT_32 i = 0; i < num_coords; i++)
{
if (m_coord[i] == co)
{
exists = TRUE;
break;
}
}
return exists;
}
VOID CoordTerm::copyto(CoordTerm& cl)
{
cl.num_coords = num_coords;
for (UINT_32 i = 0; i < num_coords; i++)
{
cl.m_coord[i] = m_coord[i];
}
}
UINT_32 CoordTerm::getsize()
{
return num_coords;
}
UINT_32 CoordTerm::getxor(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s, UINT_32 m)
{
UINT_32 out = 0;
for (UINT_32 i = 0; i < num_coords; i++)
{
out = out ^ m_coord[i].ison(x, y, z, s, m);
}
return out;
}
VOID CoordTerm::getsmallest(Coordinate& co)
{
co = m_coord[0];
}
UINT_32 CoordTerm::Filter(INT_8 f, Coordinate& co, UINT_32 start, INT_8 axis)
{
for (UINT_32 i = start; i < num_coords;)
{
if (((f == '<' && m_coord[i] < co) ||
(f == '>' && m_coord[i] > co) ||
(f == '=' && m_coord[i] == co)) &&
(axis == '\0' || axis == m_coord[i].getdim()))
{
for (UINT_32 j = i; j < num_coords - 1; j++)
{
m_coord[j] = m_coord[j + 1];
}
num_coords--;
}
else
{
i++;
}
}
return num_coords;
}
Coordinate& CoordTerm::operator[](UINT_32 i)
{
return m_coord[i];
}
BOOL_32 CoordTerm::operator==(const CoordTerm& b)
{
BOOL_32 ret = TRUE;
if (num_coords != b.num_coords)
{
ret = FALSE;
}
else
{
for (UINT_32 i = 0; i < num_coords; i++)
{
// Note: the lists will always be in order, so we can compare the two lists at time
if (m_coord[i] != b.m_coord[i])
{
ret = FALSE;
break;
}
}
}
return ret;
}
BOOL_32 CoordTerm::operator!=(const CoordTerm& b)
{
return !(*this == b);
}
BOOL_32 CoordTerm::exceedRange(UINT_32 xRange, UINT_32 yRange, UINT_32 zRange, UINT_32 sRange)
{
BOOL_32 exceed = FALSE;
for (UINT_32 i = 0; (i < num_coords) && (exceed == FALSE); i++)
{
UINT_32 subject;
switch (m_coord[i].getdim())
{
case 'x':
subject = xRange;
break;
case 'y':
subject = yRange;
break;
case 'z':
subject = zRange;
break;
case 's':
subject = sRange;
break;
case 'm':
subject = 0;
break;
default:
// Invalid input!
ADDR_ASSERT_ALWAYS();
subject = 0;
break;
}
exceed = ((1u << m_coord[i].getord()) <= subject);
}
return exceed;
}
// coordeq
CoordEq::CoordEq()
{
m_numBits = 0;
}
VOID CoordEq::remove(Coordinate& co)
{
for (UINT_32 i = 0; i < m_numBits; i++)
{
m_eq[i].remove(co);
}
}
BOOL_32 CoordEq::Exists(Coordinate& co)
{
BOOL_32 exists = FALSE;
for (UINT_32 i = 0; i < m_numBits; i++)
{
if (m_eq[i].Exists(co))
{
exists = TRUE;
}
}
return exists;
}
VOID CoordEq::resize(UINT_32 n)
{
if (n > m_numBits)
{
for (UINT_32 i = m_numBits; i < n; i++)
{
m_eq[i].Clear();
}
}
m_numBits = n;
}
UINT_32 CoordEq::getsize()
{
return m_numBits;
}
UINT_64 CoordEq::solve(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s, UINT_32 m)
{
UINT_64 out = 0;
for (UINT_32 i = 0; i < m_numBits; i++)
{
if (m_eq[i].getxor(x, y, z, s, m) != 0)
{
out |= (1ULL << i);
}
}
return out;
}
VOID CoordEq::solveAddr(
UINT_64 addr, UINT_32 sliceInM,
UINT_32& x, UINT_32& y, UINT_32& z, UINT_32& s, UINT_32& m)
{
UINT_32 xBitsValid = 0;
UINT_32 yBitsValid = 0;
UINT_32 zBitsValid = 0;
UINT_32 sBitsValid = 0;
UINT_32 mBitsValid = 0;
CoordEq temp = *this;
x = y = z = s = m = 0;
UINT_32 bitsLeft = 0;
for (UINT_32 i = 0; i < temp.m_numBits; i++)
{
UINT_32 termSize = temp.m_eq[i].getsize();
if (termSize == 1)
{
INT_8 bit = (addr >> i) & 1;
INT_8 dim = temp.m_eq[i][0].getdim();
INT_8 ord = temp.m_eq[i][0].getord();
ADDR_ASSERT((ord < 32) || (bit == 0));
switch (dim)
{
case 'x':
xBitsValid |= (1 << ord);
x |= (bit << ord);
break;
case 'y':
yBitsValid |= (1 << ord);
y |= (bit << ord);
break;
case 'z':
zBitsValid |= (1 << ord);
z |= (bit << ord);
break;
case 's':
sBitsValid |= (1 << ord);
s |= (bit << ord);
break;
case 'm':
mBitsValid |= (1 << ord);
m |= (bit << ord);
break;
default:
break;
}
temp.m_eq[i].Clear();
}
else if (termSize > 1)
{
bitsLeft++;
}
}
if (bitsLeft > 0)
{
if (sliceInM != 0)
{
z = m / sliceInM;
zBitsValid = 0xffffffff;
}
do
{
bitsLeft = 0;
for (UINT_32 i = 0; i < temp.m_numBits; i++)
{
UINT_32 termSize = temp.m_eq[i].getsize();
if (termSize == 1)
{
INT_8 bit = (addr >> i) & 1;
INT_8 dim = temp.m_eq[i][0].getdim();
INT_8 ord = temp.m_eq[i][0].getord();
ADDR_ASSERT((ord < 32) || (bit == 0));
switch (dim)
{
case 'x':
xBitsValid |= (1 << ord);
x |= (bit << ord);
break;
case 'y':
yBitsValid |= (1 << ord);
y |= (bit << ord);
break;
case 'z':
zBitsValid |= (1 << ord);
z |= (bit << ord);
break;
case 's':
ADDR_ASSERT_ALWAYS();
break;
case 'm':
ADDR_ASSERT_ALWAYS();
break;
default:
break;
}
temp.m_eq[i].Clear();
}
else if (termSize > 1)
{
CoordTerm tmpTerm = temp.m_eq[i];
for (UINT_32 j = 0; j < termSize; j++)
{
INT_8 dim = temp.m_eq[i][j].getdim();
INT_8 ord = temp.m_eq[i][j].getord();
switch (dim)
{
case 'x':
if (xBitsValid & (1 << ord))
{
UINT_32 v = (((x >> ord) & 1) << i);
addr ^= static_cast<UINT_64>(v);
tmpTerm.remove(temp.m_eq[i][j]);
}
break;
case 'y':
if (yBitsValid & (1 << ord))
{
UINT_32 v = (((y >> ord) & 1) << i);
addr ^= static_cast<UINT_64>(v);
tmpTerm.remove(temp.m_eq[i][j]);
}
break;
case 'z':
if (zBitsValid & (1 << ord))
{
UINT_32 v = (((z >> ord) & 1) << i);
addr ^= static_cast<UINT_64>(v);
tmpTerm.remove(temp.m_eq[i][j]);
}
break;
case 's':
ADDR_ASSERT_ALWAYS();
break;
case 'm':
ADDR_ASSERT_ALWAYS();
break;
default:
break;
}
}
temp.m_eq[i] = tmpTerm;
bitsLeft++;
}
}
} while (bitsLeft > 0);
}
}
VOID CoordEq::copy(CoordEq& o, UINT_32 start, UINT_32 num)
{
o.m_numBits = (num == 0xFFFFFFFF) ? m_numBits : num;
for (UINT_32 i = 0; i < o.m_numBits; i++)
{
m_eq[start + i].copyto(o.m_eq[i]);
}
}
VOID CoordEq::reverse(UINT_32 start, UINT_32 num)
{
UINT_32 n = (num == 0xFFFFFFFF) ? m_numBits : num;
for (UINT_32 i = 0; i < n / 2; i++)
{
CoordTerm temp;
m_eq[start + i].copyto(temp);
m_eq[start + n - 1 - i].copyto(m_eq[start + i]);
temp.copyto(m_eq[start + n - 1 - i]);
}
}
VOID CoordEq::xorin(CoordEq& x, UINT_32 start)
{
UINT_32 n = ((m_numBits - start) < x.m_numBits) ? (m_numBits - start) : x.m_numBits;
for (UINT_32 i = 0; i < n; i++)
{
m_eq[start + i].add(x.m_eq[i]);
}
}
UINT_32 CoordEq::Filter(INT_8 f, Coordinate& co, UINT_32 start, INT_8 axis)
{
for (UINT_32 i = start; i < m_numBits;)
{
UINT_32 m = m_eq[i].Filter(f, co, 0, axis);
if (m == 0)
{
for (UINT_32 j = i; j < m_numBits - 1; j++)
{
m_eq[j] = m_eq[j + 1];
}
m_numBits--;
}
else
{
i++;
}
}
return m_numBits;
}
VOID CoordEq::shift(INT_32 amount, INT_32 start)
{
if (amount != 0)
{
INT_32 numBits = static_cast<INT_32>(m_numBits);
amount = -amount;
INT_32 inc = (amount < 0) ? -1 : 1;
INT_32 i = (amount < 0) ? numBits - 1 : start;
INT_32 end = (amount < 0) ? start - 1 : numBits;
for (; (inc > 0) ? i < end : i > end; i += inc)
{
if ((i + amount < start) || (i + amount >= numBits))
{
m_eq[i].Clear();
}
else
{
m_eq[i + amount].copyto(m_eq[i]);
}
}
}
}
CoordTerm& CoordEq::operator[](UINT_32 i)
{
return m_eq[i];
}
VOID CoordEq::mort2d(Coordinate& c0, Coordinate& c1, UINT_32 start, UINT_32 end)
{
if (end == 0)
{
ADDR_ASSERT(m_numBits > 0);
end = m_numBits - 1;
}
for (UINT_32 i = start; i <= end; i++)
{
UINT_32 select = (i - start) % 2;
Coordinate& c = (select == 0) ? c0 : c1;
m_eq[i].add(c);
c++;
}
}
VOID CoordEq::mort3d(Coordinate& c0, Coordinate& c1, Coordinate& c2, UINT_32 start, UINT_32 end)
{
if (end == 0)
{
ADDR_ASSERT(m_numBits > 0);
end = m_numBits - 1;
}
for (UINT_32 i = start; i <= end; i++)
{
UINT_32 select = (i - start) % 3;
Coordinate& c = (select == 0) ? c0 : ((select == 1) ? c1 : c2);
m_eq[i].add(c);
c++;
}
}
BOOL_32 CoordEq::operator==(const CoordEq& b)
{
BOOL_32 ret = TRUE;
if (m_numBits != b.m_numBits)
{
ret = FALSE;
}
else
{
for (UINT_32 i = 0; i < m_numBits; i++)
{
if (m_eq[i] != b.m_eq[i])
{
ret = FALSE;
break;
}
}
}
return ret;
}
BOOL_32 CoordEq::operator!=(const CoordEq& b)
{
return !(*this == b);
}

View File

@@ -1,114 +0,0 @@
/*
* Copyright © 2017 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
// Class used to define a coordinate bit
#ifndef __COORD_H
#define __COORD_H
class Coordinate
{
public:
Coordinate();
Coordinate(INT_8 c, UINT_32 n);
VOID set(INT_8 c, UINT_32 n);
UINT_32 ison(UINT_32 x, UINT_32 y, UINT_32 z = 0, UINT_32 s = 0, UINT_32 m = 0);
INT_8 getdim();
INT_8 getord();
BOOL_32 operator==(const Coordinate& b);
BOOL_32 operator<(const Coordinate& b);
BOOL_32 operator>(const Coordinate& b);
BOOL_32 operator<=(const Coordinate& b);
BOOL_32 operator>=(const Coordinate& b);
BOOL_32 operator!=(const Coordinate& b);
Coordinate& operator++(INT_32);
private:
INT_8 dim;
INT_8 ord;
};
class CoordTerm
{
public:
CoordTerm();
VOID Clear();
VOID add(Coordinate& co);
VOID add(CoordTerm& cl);
BOOL_32 remove(Coordinate& co);
BOOL_32 Exists(Coordinate& co);
VOID copyto(CoordTerm& cl);
UINT_32 getsize();
UINT_32 getxor(UINT_32 x, UINT_32 y, UINT_32 z = 0, UINT_32 s = 0, UINT_32 m = 0);
VOID getsmallest(Coordinate& co);
UINT_32 Filter(INT_8 f, Coordinate& co, UINT_32 start = 0, INT_8 axis = '\0');
Coordinate& operator[](UINT_32 i);
BOOL_32 operator==(const CoordTerm& b);
BOOL_32 operator!=(const CoordTerm& b);
BOOL_32 exceedRange(UINT_32 xRange, UINT_32 yRange = 0, UINT_32 zRange = 0, UINT_32 sRange = 0);
private:
static const UINT_32 MaxCoords = 8;
UINT_32 num_coords;
Coordinate m_coord[MaxCoords];
};
class CoordEq
{
public:
CoordEq();
VOID remove(Coordinate& co);
BOOL_32 Exists(Coordinate& co);
VOID resize(UINT_32 n);
UINT_32 getsize();
virtual UINT_64 solve(UINT_32 x, UINT_32 y, UINT_32 z = 0, UINT_32 s = 0, UINT_32 m = 0);
virtual VOID solveAddr(UINT_64 addr, UINT_32 sliceInM,
UINT_32& x, UINT_32& y, UINT_32& z, UINT_32& s, UINT_32& m);
VOID copy(CoordEq& o, UINT_32 start = 0, UINT_32 num = 0xFFFFFFFF);
VOID reverse(UINT_32 start = 0, UINT_32 num = 0xFFFFFFFF);
VOID xorin(CoordEq& x, UINT_32 start = 0);
UINT_32 Filter(INT_8 f, Coordinate& co, UINT_32 start = 0, INT_8 axis = '\0');
VOID shift(INT_32 amount, INT_32 start = 0);
virtual CoordTerm& operator[](UINT_32 i);
VOID mort2d(Coordinate& c0, Coordinate& c1, UINT_32 start = 0, UINT_32 end = 0);
VOID mort3d(Coordinate& c0, Coordinate& c1, Coordinate& c2, UINT_32 start = 0, UINT_32 end = 0);
BOOL_32 operator==(const CoordEq& b);
BOOL_32 operator!=(const CoordEq& b);
private:
static const UINT_32 MaxEqBits = 64;
UINT_32 m_numBits;
CoordTerm m_eq[MaxEqBits];
};
#endif

Some files were not shown because too many files have changed in this diff Show More