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Author SHA1 Message Date
Juan A. Suarez Romero
aba161e63a docs: add sha256 checksums for 18.0.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-06-03 10:11:25 +00:00
Juan A. Suarez Romero
ca0037aaef docs: add release notes for 18.0.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-06-03 09:26:20 +00:00
Juan A. Suarez Romero
3f4da760f9 Update version to 18.0.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-06-03 09:20:57 +00:00
Juan A. Suarez Romero
7c644f48a1 cherry-ignore: nv30: ensure that displayable formats are marked accordingly
stable: Explicit 18.1 only nomination.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-30 10:06:43 +02:00
Juan A. Suarez Romero
dfa3a7ee37 cherry-ignore: st/mesa: fix assertion failures with GL_UNSIGNED_INT64_ARB (v2)
stable: The commit requires earlier commit 19a91841c3 which did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-30 10:06:43 +02:00
Marek Olšák
81bd117b3c mesa: handle GL_UNSIGNED_INT64_ARB properly (v2)
Bindless texture handles can be passed via vertex attribs using this type.
This fixes a bunch of bindless piglit tests on radeonsi.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit a8e1413876)
[Juan A. Suarez: resolve trivial conflict]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/mesa/vbo/vbo_private.h
2018-05-30 10:06:43 +02:00
Juan A. Suarez Romero
714dabe317 cherry-ignore: Tegra is not supported
stable: Tegra support was not added in the current branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-30 10:06:43 +02:00
Jason Ekstrand
aac580f7bb intel/blorp: Support blits and clears on surfaces with offsets
For certain EGLImage cases, we represent a single slice or LOD of an
image with a byte offset to a tile and X/Y intratile offsets to the
given slice.  Most of i965 is fine with this but it breaks blorp.  This
is a terrible way to represent slices of a surface in EGL and we should
stop some day but that's a very scary and thorny path.  This gets blorp
to start working with those surfaces and fixes some dEQP EGL test bugs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106629
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit ae514ca695)
2018-05-28 10:39:48 +02:00
Marek Olšák
38aeeee511 radeonsi: fix incorrect parentheses around VS-PS varying elimination
I don't know if it caused issues.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 92ea9329e5)
2018-05-28 10:39:48 +02:00
Marek Olšák
8cf02769f5 st/mesa: simplify lastLevel determination in st_finalize_texture
This fixes shader images where we always bind stObj->pt and not individual
gl_texture_images.

Roughly based on i965 commit 845ad2667a
which does a similar thing but for a different reason.

This fixes GL CTS assertion failures introduced by Ilia.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit a4ba7cd6a2)
2018-05-28 10:39:48 +02:00
Jose Dapena Paz
1939affe51 mesa: do not leak ctx->Shader.ReferencedProgram references
When glUseProgram is used, references to the included shaders are
added in ctx->Shader.ReferencedProgram. But those references are not
decreased when the shader data is deallocated. Thus, those shaders
are leaked.

Explicitely remove the pending references to these shaders.

Fixes: e6506b3cd2 ("mesa: retain gl_shader_programs after glDeleteProgram if they are in use")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 6c61c31dc2)
2018-05-25 09:59:18 +02:00
Francisco Jerez
42fa7cf2bb i965: Use intel_bufferobj_buffer() wrapper in image surface state setup.
Instead of directly using intel_obj->buffer.  Among other things
intel_bufferobj_buffer() will update intel_buffer_object::
gpu_active_start/end, which are used by glBufferSubData() to decide
which path to take.  Fixes a failure in the Piglit
ARB_shader_image_load_store-host-mem-barrier Buffer Update/WaW tests,
which could be reproduced with a non-standard glGetTexSubImage
implementation (see bug report).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105351
Reported-by: Nanley Chery <nanleychery@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 936cd3c87a)
2018-05-24 10:35:26 +00:00
Francisco Jerez
86e749a96e i965: Handle non-zero texture buffer offsets in buffer object range calculation.
Otherwise the specified surface state will allow the GPU to access
memory up to BufferOffset bytes past the end of the buffer.  Found by
inspection.

v2: Protect against out-of-range BufferOffset (Nanley).
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit e989acb03b)
2018-05-24 10:35:26 +00:00
Francisco Jerez
03eaee1529 i965: Move buffer texture size calculation into a common helper function.
The buffer texture size calculations (should be easy enough, right?)
are repeated in three different places, each of them subtly broken in
a different way.  E.g. the image load/store path was never fixed to
clamp to MaxTextureBufferSize, and none of them are taking into
account the buffer offset correctly.  It's easier to fix it all in one
place.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106481
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 156d2c6e62)
2018-05-24 10:35:26 +00:00
Francisco Jerez
8d5f09e8ef Revert "mesa: simplify _mesa_is_image_unit_valid for buffers"
This reverts commit c0ed52f614.  It was
preventing the image format validation from being done on buffer
textures, which is required to ensure that the application doesn't
attempt to bind a buffer texture with an internal format incompatible
with the image unit format (e.g. of different texel size), which is
not allowed by the spec (it's not allowed for *any* texture target,
whether or not there is spec wording restricting this behavior
specifically for buffer textures) and will cause the driver to
calculate texel bounds incorrectly and potentially crash instead of
the expected behavior.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106465
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 5a68147803)
2018-05-24 10:35:26 +00:00
Jason Ekstrand
a93a86a434 intel/eu: Set EXECUTE_1 when setting the rounding mode in cr0
Fixes: d6cd14f213 "i965/fs: Define new shader opcode to..."
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
(cherry picked from commit 417b9e5770)
2018-05-23 16:28:02 +02:00
Dave Airlie
6a0c2860e7 tgsi/scan: add hw atomic to the list of memory accessing files
This fixes 4 out of 5 cases in:
arb_framebuffer_no_attachments-atomic on cayman.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "18.0 18.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f2f464de57)
2018-05-23 16:28:02 +02:00
Michel Dänzer
b582b8fc93 dri3: Stricter SBC wraparound handling
Prevents corrupting the upper 32 bits of draw->recv_sbc when
draw->send_sbc resets to 0 (which currently happens when the window is
unbound from a context and bound to one again), which in turn caused
loader_dri3_swap_buffers_msc to calculate target_msc with corrupted
upper 32 bits. This resulted in hangs with the Xorg modesetting driver
as of xserver 1.20 (older versions and other drivers ignored the upper
32 bits of the target MSC, which is why this wasn't noticed earlier).

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/106351
Tested-by: Mike Lothian <mike@fireburn.co.uk>
(cherry picked from commit fe2edb25dd)
[Juan A. Suarez: resolve trivial conflicts]

Conflicts:
	src/loader/loader_dri3_helper.c
2018-05-23 16:28:02 +02:00
Samuel Pitoiset
96b1ac39d5 radv: fix centroid interpolation
It's legal to set the centroid and sample interpolation modes
when MSAA disabled. So, we have to initialize the centroid
inputs because the hardware doesn't.

This fixes rendering issues with DXVK and The Witness, World of
Warcraft, Trackmania and probably more games.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106315
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102390
CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 73df16dcee)
[Juan A. Suarez: apply change in src/amd/common/ac_nir_to_llvm.c]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_nir_to_llvm.c
2018-05-22 13:03:34 +02:00
Anuj Phogat
f844591ee3 i965/glk: Add l3 banks count for 2x6 configuration
2x6 configuration with pci-id 0x3185 has same number of
banks (2) as 3x6 configuration (pci-id 0x3184).

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: eb23be1d97 "i965: Add and initialize l3_banks field for gen7+"
Cc: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 0748383a60)
2018-05-22 13:03:34 +02:00
Timothy Arceri
620be4d431 mesa: add glUniform*ui{v} support to display lists
Fixes: a017c7ecb7 "mesa: display list support for uint uniforms"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78097
(cherry picked from commit f71714022b)
2018-05-22 13:03:34 +02:00
Juan A. Suarez Romero
5443d85870 cherry-ignore: mesa/st: handle vert_attrib_mask in nir case too
fixes: The commit fixes earlier commits 19a91841c3 and 9987a072cb which
did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-22 13:03:34 +02:00
Bas Nieuwenhuizen
5cef37e909 radv: Fix SRGB compute copies.
SRGB stores are broken. We had compensation code in the
resolve path but none in the copy path. Since we don't
want any conversion and it does not matter for DCC,
just make everything UNORM instead.

This happened to cause wrong colors for the PRIME path, as
that uses image->buffer copies which always use the compute
path.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106587
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a63a0960e3)
2018-05-22 13:03:34 +02:00
Juan A. Suarez Romero
e7b5064045 cherry-ignore: add explicit 18.1 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-22 13:03:34 +02:00
Bas Nieuwenhuizen
6ce8a775a7 amd/addrlib: Use defines in autotools build.
Otherwise stuff like NDEBUG would not be passed through.

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106479
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 62e0e089d7)
2018-05-22 13:03:34 +02:00
Nanley Chery
3b7134c535 i965/miptree: Zero-initialize CCS_D buffers
Before this patch, the aux_state was actually AUX_INVALID because the BO
was never defined. This was fine on single slice miptrees because we
would fast-clear the resource right after creation. For multi-slice
miptrees on SKL+ however, this results in undefined behavior when
accessing a non-base slice. Here's a specific example:

1) Fast clear level 0
   * Undefined CCS_D buffer allocated in "PASS_THROUGH" state.
   * Level 0 transitions to the CLEAR state.
2) Render to level 1
   * Level 1 may have a 2-bit pattern of 2's.
   * Rendering with a 2 in the CCS is undefined.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 8a9491058d)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/intel_mipmap_tree.c
2018-05-22 13:03:34 +02:00
Juan A. Suarez Romero
544a383858 cherry-ignore: i965/miptree: Fix handling of uninitialized MCS buffers
stable: The commit requires earlier commit af4e9295fe which did not land
in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-22 13:03:34 +02:00
Stuart Young
f084db8870 etnaviv: Fix missing rnndb file in tarballs
Seems that when the rnndb files for etniviv were updated/included back
in Nov 2017, hw/texdesc_3d.xml.h was missed from Makefile.sources and
meson.build. This was all during the conversion to meson, so it apears
to have slipped through the cracks. As such, this file has been missing
from the official tarballs since inclusion in Mesa, so the git trees
and tarballs differ.

Found due to lintian errors in the Debian packages.

Fixes: f1e1c60ff6 ("etnaviv: Update from rnndb")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit f806cc9eb6)
2018-05-22 13:03:34 +02:00
Jan Vesely
712456cb38 eg/compute: Use reference counting to handle compute memory pool.
Use pipe_reference to release old RAT surfaces.
RAT surface adds a reference to pool bo, so use reference counting for pool->bo
as well.

v2: Use the same pattern for both defrag paths
    Drop confusing comment

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f3521ce2c4)
2018-05-22 13:03:34 +02:00
Samuel Pitoiset
0f7b29aa93 spirv: fix visiting inner loops with same break/continue block
We should stop walking through the CFG when the inner loop's
break block ends up as the same block as the outer loop's
continue block because we are already going to visit it.

This fixes the following assertion which ends up by crashing
in RADV or ANV:

SPIR-V parsing FAILED:
In file ../src/compiler/spirv/vtn_cfg.c:381
block->node.link.next == NULL
0 bytes into the SPIR-V binary

This also fixes a crash with a camera shader from SteamVR.

v2: make use of vtn_get_branch_type() and add an assertion

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106090
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106504
CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 6bde8c5608)
2018-05-22 13:03:34 +02:00
Juan A. Suarez Romero
69ef6e4a75 docs: add sha256 checksums for 18.0.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-17 18:40:11 +00:00
Juan A. Suarez Romero
3b49ab6219 docs: add release notes for 18.0.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-17 18:15:18 +00:00
Juan A. Suarez Romero
a7f75b9487 Update version to 18.0.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-17 18:09:37 +00:00
Kai Wasserbäch
0f9bd67c4b opencl: autotools: Fix linking order for OpenCL target
Otherwise the build fails with an undefined reference to
clang::FrontendTimesIsEnabled.

Bugzilla: https://bugs.freedesktop.org/106209
Cc: Jan Vesely <jan.vesely@rutgers.edu>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Acked-by: Jan Vesely <jan.vesely@rutgers.edu>
Tested-by: Aaron Watry <awatry@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit b691d9192c)
2018-05-15 11:15:21 +02:00
Bas Nieuwenhuizen
0fa8cdfd13 radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.
The hardware always interprets the alpha as unsigned and fixing it
in the shader is going to add unacceptable overheads.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106480
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit f944a59996)
2018-05-15 11:15:21 +02:00
Bas Nieuwenhuizen
9a4b915517 radv: Fix up 2_10_10_10 alpha sign.
Pre-Vega HW always interprets the alpha for this format as unsigned,
so we have to implement a fixup to do the sign correctly for signed
formats.

v2: Improve indexing mess.

CC: 18.0 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106480
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(Backport of 3d4d388e39 "radv: Fix up 2_10_10_10 alpha sign.")
2018-05-15 11:15:21 +02:00
Bas Nieuwenhuizen
1b0406f465 radv: Translate logic ops.
radeonsi could pass them through but the enum changed between
Gallium and Vulkan, so we have to translate.

In progress I made the register defines a bit more readable.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100430
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit dd102405de)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_pipeline.c
2018-05-15 11:15:21 +02:00
Dave Airlie
33a8aad459 radv: use compute path for multi-layer images.
I don't think the hw resolve path can't handle multi-layer images.

This fixes all the:
dEQP-VK.renderpass.multisample_resolve.layers_*
tests on my VI card.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 5978d54a09)
2018-05-15 11:14:49 +02:00
Dave Airlie
4a4a51bdfb radv: resolve all layers in compute resolve path.
This path should iterate across all layers, I've some ideas
for doing this in a single pass, but this is simpler for now.

This passes the tests because we don't use the fragment path
unless we have DCC, and we don't have DCC on layered images.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 98dbaa445a)
2018-05-15 11:14:49 +02:00
Juan A. Suarez Romero
9a537aad11 cherry-ignore: radv/resolve: do fmask decompress on all layers.
stable: The commit requires earlier commits ab0e625a67 and 62510846b6
which did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-15 11:14:49 +02:00
Jan Vesely
538022adf8 winsys/amdgpu: Destroy dev_hash table when the last winsys is removed.
Fixes memory leak on module unload.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 58272c1ad7)
2018-05-15 11:14:49 +02:00
Juan A. Suarez Romero
4788977798 cherry-ignore: mesa: revert GL_[SECONDARY_]COLOR_ARRAY_SIZE glGet type to TYPE_INT
stable: The commit fixes earlier commit d07466fe18 which did not land
in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-15 11:14:49 +02:00
Juan A. Suarez Romero
5cd442e589 cherry-ignore: mesa: fix glGetInteger/Float/etc queries for vertex arrays attribs
stable: The commit fixes earlier commit d5f42f96e1 which did not land
in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-15 11:14:49 +02:00
Jason Ekstrand
81a733214a i965,anv: Set the CS stall bit on the ISP disable PIPE_CONTROL
From the bspec docs for "Indirect State Pointers Disable":

    "At the completion of the post-sync operation associated with this
    pipe control packet, the indirect state pointers in the hardware are
    considered invalid"

So the ISP disable is a post-sync type of operation which means that it
should be combined with a CS stall.  Without this, the simulator throws
an error.

Fixes: 766d801ca "anv: emit pixel scoreboard stall before ISP disable"
Fixes: f536097f6 "i965: require pixel scoreboard stall prior to ISP disable"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit a8a740f272)
2018-05-15 11:14:49 +02:00
Lionel Landwerlin
c78a265f75 anv: emit pixel scoreboard stall before ISP disable
We want to make sure that all indirect state data has been loaded into
the EUs before disable the pointers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Fixes: 78c125af39 ("anv/gen10: Ignore push constant packets during context restore.")
(cherry picked from commit 766d801ca3)
2018-05-15 11:14:49 +02:00
Lionel Landwerlin
430bca7d89 i965: require pixel scoreboard stall prior to ISP disable
Invalidating the indirect state pointers might affect a previously
scheduled & still running 3DPRIMITIVE (causing page fault). So stall
on pixel scoreboard before that.

v2: Fix compile issue :(

v3: Stall on pixel scoreboard

v4: Drop the post sync operation (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Fixes: ca19ee33d7 ("i965/gen10: Ignore push constant packets during context restore.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106243
(cherry picked from commit f536097f67)
2018-05-15 11:14:49 +02:00
Jan Vesely
876c7c7006 winsys/radeon: Destroy fd_hash table when the last winsys is removed.
Fixes memory leak on module unload.
v2: Use util_hash_table helper function

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
(cherry picked from commit 45dfa6f4e7)
2018-05-15 11:14:49 +02:00
Jan Vesely
d2632fc765 gallium/auxiliary: Add helper function to count the number of entries in hash table
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
(cherry picked from commit d146768d13)
2018-05-15 11:14:49 +02:00
Dave Airlie
83e543e9fa r600: fix constant buffer bounds.
If you have an indirect access to a constant buffer on r600/eg
use a vertex fetch in the shader. However apps have expected
behaviour on those out of bounds accessess (even if illegal).

If the constants were being uploaded as part of a larger
upload buffer, we'd set the range of allowed access to a lot
larger than required so apps would get values back from
other parts of the upload buffer instead of the expected out
of bounds access.

This fixes rendering bugs in Trine and Witcher 1, thanks
to iive for nagging me effectively until I figured it out :-)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91808
Cc: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit ce027ac5c7)
2018-05-15 11:14:49 +02:00
Ross Burton
3c0ca29ff0 src/intel/Makefile.vulkan.am: add missing MKDIR_GEN
Out of tree builds can try to write into a directory that doesn't exist yet:

| Traceback (most recent call last):
|   File "../../../mesa-18.0.2/src/intel/vulkan/anv_icd.py", line 46, in <module>
|     with open(args.out, 'w') as f:
| IOError: [Errno 2] No such file or directory: 'vulkan/intel_icd.x86_64.json'
| Makefile:4882: recipe for target 'vulkan/intel_icd.x86_64.json' failed

Add missing MKDIR_GEN calls to solve this.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 1755654d9f)
2018-05-15 11:14:49 +02:00
Rhys Perry
4368854260 mesa: fix error handling in get_framebuffer_parameteriv
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 5ac16ed047)
2018-05-15 11:14:49 +02:00
Jan Vesely
5f0c3879e6 pipe-loader: Free driver_name in error path
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 0783399d79)
2018-05-15 11:14:49 +02:00
Juan A. Suarez Romero
eeaad26ff2 cherry-ignore: glsl: change ast_type_qualifier bitset size to work around GCC 5.4 bug
stable: The commit requires earlier commit ba79a90fb5 which did not
land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-15 11:14:45 +02:00
Jan Vesely
42229106b3 eg/compute: Drop reference to kernel_param bo in destructor
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit a9e4be9212)
2018-05-15 11:14:11 +02:00
Jan Vesely
c013960afd r600: Cleanup constant buffers on context destruction
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit a1e8fcce3e)
2018-05-15 11:14:11 +02:00
Jan Vesely
8d728f903e eg/compute: Drop reference on code_bo in destructor.
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit ea1fff4416)
2018-05-15 11:14:11 +02:00
Kenneth Graunke
7d0f1d676a i965: Don't leak blorp on Gen4-5.
We used to only initialize BLORP on Gen6+.  When we added it on Gen4-5,
we forgot to destroy it unconditionally.

Fixes: 752d7af77a (i965: Add blorp support for gen4-5)
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 2dc29e095f)

Squashed with:

i965: silence unused variable

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2dc29e095f ("i965: Don't leak blorp on Gen4-5.")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 3853f1c6f4)
2018-05-15 11:14:11 +02:00
Jan Vesely
54c208e48e clover: Add explicit virtual destructor to argument class
It is needed to destroy the v vector in scalar_argument
Fixes memory leaks on parameter set/bind.

v2: Drop redundant sclara_argument destructor

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 2f1ad72ac1)
2018-05-15 11:14:11 +02:00
Neil Roberts
23cd0c1598 spirv: Apply OriginUpperLeft to FragCoord
This behaviour was changed in 1e5b09f42f. The commit message
for that says it is just a “tidy up” so my assumption is that the
behaviour change was a mistake. It’s a little hard to decipher looking
at the diff, but the previous code before that patch was:

  if (builtin == SpvBuiltInFragCoord || builtin == SpvBuiltInSamplePosition)
     nir_var->data.origin_upper_left = b->origin_upper_left;

  if (builtin == SpvBuiltInFragCoord)
     nir_var->data.pixel_center_integer = b->pixel_center_integer;

After the patch the code was:

  case SpvBuiltInSamplePosition:
     nir_var->data.origin_upper_left = b->origin_upper_left;
     /* fallthrough */
  case SpvBuiltInFragCoord:
     nir_var->data.pixel_center_integer = b->pixel_center_integer;
     break;

Before the patch origin_upper_left affected both builtins and
pixel_center_integer only affected FragCoord. After the patch
origin_upper_left only affects SamplePosition and pixel_center_integer
affects both variables.

This patch tries to restore the previous behaviour by changing the
code to:

  case SpvBuiltInFragCoord:
     nir_var->data.pixel_center_integer = b->pixel_center_integer;
     /* fallthrough */
  case SpvBuiltInSamplePosition:
     nir_var->data.origin_upper_left = b->origin_upper_left;
     break;

This change will be important for ARB_gl_spirv which is meant to
support OriginLowerLeft.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Fixes: 1e5b09f42f "spirv: Tidy some repeated if checks..."
(cherry picked from commit e17d0ccbbd)
2018-05-15 11:14:11 +02:00
Ian Romanick
aecf2e1319 mesa: Add missing support for glFogiv(GL_FOG_DISTANCE_MODE_NV)
Found by inspection, so I made a piglit test too.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit f2db3be620)
2018-05-15 11:14:11 +02:00
Deepak Rawat
749626c473 egl/x11: Send invalidate to driver on copy_region path in swap_buffer
Similar to swap_available path send invalidate to the driver because
egl/X11 is not watching for for server's invalidate events. The
dri2_copy_region path is trigerred when server supports DRI2 version
minor 1.

Tested with piglit egl tests for regression.

V2: Move invalidate from dri2_copy_region to swap_buffer common.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 9a21c96126)
2018-05-15 11:14:11 +02:00
Jose Maria Casanova Crespo
ee99f7deaf intel/compiler: fix brw_imm_w for negative 16-bit integers
16-bit immediates need to replicate the 16-bit immediate value
in both words of the 32-bit value. This needs to be careful
to avoid sign-extension, which the previous implementation was
not handling properly.

For example, with the previous implementation, storing the value
-3 would generate imm.d = 0xfffffffd due to signed integer sign
extension, which is not correct. Instead, we should cast to
uint16_t, which gives us the correct result: imm.ud = 0xfffdfffd.

We only had a couple of cases hitting this path in the driver
until now, one with value -1, which would work since all bits are
one in this case, and another with value -2 in brw_clip_tri(),
which would hit the aforementioned issue (this case only affects
gen4 although we are not aware of whether this was causing an
actual bug somewhere).

v2: Make explicit uint32_t casting for left shift (Jason Ekstrand)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

Cc: "18.0 18.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f0e6dacee5)
2018-05-15 11:14:11 +02:00
Jose Maria Casanova Crespo
bbd5c75d7d intel/compiler: fix 16-bit int brw_negate_immediate and brw_abs_immediate
From Intel Skylake PRM, vol 07, "Immediate" section (page 768):

"For a word, unsigned word, or half-float immediate data,
software must replicate the same 16-bit immediate value to both
the lower word and the high word of the 32-bit immediate field
in a GEN instruction."

This fixes the int16/uint16 negate and abs immediates that weren't
taking into account the replication in lower and upper words.

v2: Integer cases are different to Float cases. (Jason Ekstrand)
    Included reference to PRM (Jose Maria Casanova)
v3: Make explicit uint32_t casting for left shift (Jason Ekstrand)
    Split half float implementation. (Jason Ekstrand)
    Fix brw_abs_immediate (Jose Maria Casanova)

Cc: "18.0 18.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 2a76f03c90)
2018-05-15 11:14:11 +02:00
Juan A. Suarez Romero
6ca758f6b6 cherry-ignore: add explicit 18.1 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-15 11:14:09 +02:00
Matthew Nicholls
2e97e1ea02 radv: fix multisample image copies
Previously before fb077b0728, the LOD parameter was being used in place of the
sample index, which would only copy the first sample to all samples in the
destination image. After that multisample image copies wouldn't copy anything
from my observations.

This fixes some copy_and_blit CTS tests.

v3.1: - set lod to 0 for nir_txf_ms (Samuel)
v2: - use GLSL_SAMPLER_DIM_MS instead of 2D (Samuel)
    - updated commit description (Samuel)

Fix this properly by copying each sample in a separate radv_CmdDraw and using a
pipeline with the correct rasterizationSamples for the destination image.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 97d57ef917)
2018-05-07 16:32:54 +02:00
Juan A. Suarez Romero
ae12c5e990 docs: add sha256 checksums for 18.0.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-07 11:18:19 +00:00
Juan A. Suarez Romero
6dc2658fd6 docs: add sha256 checksums for 18.0.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-07 10:19:36 +00:00
Juan A. Suarez Romero
5831836987 Update version to 18.0.3
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-07 10:09:56 +00:00
Boyuan Zhang
5d3caa1ca4 radeon/vcn: fix mpeg4 msg buffer settings
Previous bit-fields assignments are incorrect and will result certain mpeg4
decode failed due to wrong flag values. This patch fixes these assignments.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
(cherry picked from commit deba56accf)
2018-05-02 12:15:05 +02:00
Nanley Chery
8f97e56947 i965/tex_image: Avoid the ASTC LDR workaround on gen9lp
Both the internal documentation and the results of testing this in the
CI suggest that this is unnecessary. Add the fixes tag because this
reduces an internal benchmark's startup time by about 17 seconds
(reported by Eero).

Fixes: 710b1d2e66 "i965/tex_image: Flush certain subnormal ASTC channel values"
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 3e56e4642f)
2018-05-02 12:15:05 +02:00
Samuel Pitoiset
97841a8f02 radv: compute the number of subpass attachments correctly
Only count color attachments twice if resolves are used, also
account for the depth stencil attachment if present.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d8db5986ce)
2018-05-02 12:15:05 +02:00
Andres Rodriguez
5a7de46492 radv/winsys: fix leaking resources from bo's imported by fd
A bo's ref_count was not being initialized when imported from an fd.
Therefore, we would fail to free the resource during VkFreeMemory().

This patch fixes applications like hifi VR in threaded mode, which
perform frequent imports/releases of IPC shared memory.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f56e22e496)
2018-05-02 12:15:05 +02:00
Leo Liu
1a23971b49 st/omx/enc: fix blit setup for YUV LoadImage
The blit here involves scaling since it's copying from I8 format to R8G8 format.
Half of source will be filtered out with PIPE_TEX_FILTER_NEAREST instruction, it
looks that GPU always uses the second half as source. Currently we use "1" as
the start point of x for R, then causing 1 source pixel of U component shift to
right. So "-1" should be the start point for U component.

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 1c5f4f4e17)
[Juan A. Suarez: apply patch in
src/gallium/state_trackers/omx_bellagio/vid_enc.c]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/gallium/state_trackers/omx/vid_enc_common.c
2018-04-30 18:42:39 +02:00
Eric Anholt
c0aeac1536 gallium/util: Fix incorrect refcounting of separate stencil.
The driver may have a reference on the separate stencil buffer for some
reason (like an unflushed job using it), so we can't directly free the
resource and should instead just decrement the refcount that we own.
Fixes double-free in KHR-GLES3.packed_depth_stencil.blit.depth32f_stencil8
on vc5.

Fixes: e94eb5e600 ("gallium/util: add u_transfer_helper")
Reviewed-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 069c409f43)
2018-04-30 18:42:39 +02:00
Marek Olšák
1fccd6736a radeonsi/gfx9: workaround for INTERP with indirect indexing
and clean up the conditions.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6d19120da8)
2018-04-30 18:42:39 +02:00
Marek Olšák
001f7ac65c util/u_queue: fix a deadlock in util_queue_finish
Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 7083ac7290)
2018-04-30 18:42:39 +02:00
Jason Ekstrand
3e5dfc0537 anv/allocator: Don't shrink either end of the block pool
Previously, we only tried to ensure that we didn't shrink either end
below what was already handed out.  However, due to the way we handle
relocations with block pools, we can't shrink the back end at all.  It's
probably best to not shrink in either direction.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105374
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106147
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 3db93f9128)
2018-04-30 18:42:38 +02:00
Juan A. Suarez Romero
16a3264c32 cherry-ignore: add explicit 18.1 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-30 18:42:38 +02:00
Juan A. Suarez Romero
b3eed3ad03 docs: add sha256 checksums for 18.0.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-28 16:57:30 +00:00
Juan A. Suarez Romero
d38da7bd2d docs: add release notes for 18.0.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-28 16:22:11 +00:00
Juan A. Suarez Romero
ff629ffcd3 Update version to 18.0.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-28 16:16:16 +00:00
Dylan Baker
53ff157c33 meson: don't build classic mesa tests without dri_drivers
Since mesa_classic is build-on-demand the tests will create a demand and
add a bunch of extra compilation.

Fixes: 43a6e84927
       ("meson: build mesa test.")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit aaab624245)
2018-04-25 14:04:53 +02:00
Samuel Pitoiset
3b9b66560a radv/winsys: allow to submit up to 4 IBs for chips without chaining
The SI family doesn't support chaining which means the maximum
size in dwords per CS is limited. When that limit was reached
we failed to submit the CS and the application crashed.

This patch allows to submit up to 4 IBs which is currently the
limit, but recent amdgpu supports more than that.

Please note that we can reach the limit of 4 IBs per submit
but currently we can't improve that. The only solution is to
upgrade libdrm. That will be improved later but for now this
should fix crashes on SI or when using RADV_DEBUG=noibs.

Fixes: 36cb5508e8 ("radv/winsys: Fail early on overgrown cs.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105775
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-04-25 14:04:53 +02:00
Ian Romanick
60c5cf011d intel/compiler: Add scheduler deps for instructions that implicitly read g0
Otherwise the scheduler can move the writes after the reads.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95009
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95012
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Cc: Clayton A Craft <clayton.a.craft@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 0d5ce25c1c)
2018-04-25 14:04:53 +02:00
Dylan Baker
95d88ba0da bin/install_megadrivers: fix DESTDIR and -D*-path
This fixes -Ddri-drivers-path, -Dvdpau-libs-path, etc. with DESTDIR when
those paths are absolute. Currently due to the way python's os.path.join
handles absolute paths these will ignore DESTDIR, which is bad. This
fixes them to be relative to DESTDIR if that is set.

Fixes: 3218056e0e
       ("meson: Build i965 and dri stack")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
(cherry picked from commit ae3f45c11e)
2018-04-24 11:02:38 +02:00
Marek Olšák
6bd2fba19d Revert "st/dri: Fix dangling pointer to a destroyed dri_drawable"
This reverts commit dab02dea34.

It causes crashes of qtcreator and firefox.

Fixes: dab02de "st/dri: Fix dangling pointer to a destroyed dri_drawable"

Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4559aefb5c)
2018-04-24 11:02:38 +02:00
Jason Ekstrand
ead5bf4f6a i965/fs: Return mlen * 8 for size_read() for INTERPOLATE_AT_*
They are send messages and this makes size_read() and mlen agree.  For
both of these opcodes, the payload is just a dummy so mlen == 1 and this
should decrease register pressure a bit.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit de1f22d595)
2018-04-24 11:02:38 +02:00
Juan A. Suarez Romero
d45bb9f505 cherry-ignore: add explicit 18.1 only nominations
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-24 11:02:37 +02:00
Johan Klokkhammer Helsing
d75054d0d0 st/dri: Fix dangling pointer to a destroyed dri_drawable
If an EGLSurface is created, made current and destroyed, and then a second
EGLSurface is created. Then the second malloc in driCreateNewDrawable may
return the same pointer address the first surface's drawable had.
Consequently, when dri_make_current later tries to determine if it should
update the texture_stamp it compares the surface's drawable pointer against
the drawable in the last call to dri_make_current and assumes it's the same
surface (which it isn't).

When texture_stamp is left unset, then dri_st_framebuffer_validate thinks
it has already called update_drawable_info for that drawable, leaving it
unvalidated and this is when bad things starts to happen. In my case it
manifested itself by the width and height of the surface being unset.

This is fixed this by setting the pointer to NULL before freeing the
surface.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106126
Signed-off-by: Johan Klokkhammer Helsing <johan.helsing@qt.io>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit dab02dea34)
2018-04-23 12:18:53 +02:00
Lucas Stach
7673c72f3d etnaviv: fix texture_format_needs_swiz
memcmp returns 0 when both swizzles are the same, which means we don't
need any hardware swizzling. texture_format_needs_swiz should return
true when the return value of the memcmp is non-zero.

Fixes: 751ae6afbe ("etnaviv: add support for swizzled texture formats")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
(cherry picked from commit 52e93e309f)
2018-04-23 12:18:53 +02:00
Bas Nieuwenhuizen
264cda58ab radv: Mark GTT memory as device local for APUs.
Otherwise a lot of games complain about not having enough memory,
and it is sort of local so this seems reasonable to me.

CC: 18.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit e1df849c3c)
2018-04-23 12:18:53 +02:00
Juan A. Suarez Romero
40ed4b0285 travis: radv needs LLVM 4.0
This is a backport for 18.0 from 6ce400782c ("travis: radeonsi and radv
need LLVM 4.0") that fixes Travis build with meson + vulkan.

CC: 18.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Andres Gomez <agomez@igalia.com>
2018-04-23 09:56:53 +00:00
Kenneth Graunke
251a36d629 i965: Fix shadow batches to be the same size as the real BO.
brw_bo_alloc may round up our allocation size to the next bucket size.
In this case, we would malloc a shadow buffer that was the original
intended size, but use bo->size (the larger size) for all of our checks.

This could cause us to run off the end of the shadow buffer.

v2: Actually use the new BO size (caught by Lionel)

Reported-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c7dcee58b5 (i965: Avoid problems from referencing orphaned BOs after growing.)
(cherry picked from commit da25ae92be)
2018-04-23 09:56:53 +00:00
Samuel Pitoiset
b62b3eb259 radv: fix scissor computation when using half-pixel viewport offset
'scale[i]' can be non-integer.

Original patch by Philip Rebohle.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106074
Fixes: 0f3de89a56 ("radv: Use the guard band.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Niuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 893e19efb7)
2018-04-23 09:56:53 +00:00
Lionel Landwerlin
f581dc608b anv: fix number of planes for depth & stencil
We're not counting correctly with depth & stencil images.

Additionally we need to move an assert that is meant just for color
attachments.

v2: Move an assert() (Reported by Craig)
    Change aspect mask checks (Francesco)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a62a979335 ("anv: enable multiple planes per image/imageView")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105994
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 0a6547014f)
2018-04-23 09:56:53 +00:00
Timothy Arceri
e1b87631a9 mesa: free debug messages when destroying the debug state
Fixes: 04a8baad37 "mesa: refactor _mesa_PopDebugGroup and _mesa_free_errors_data"

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98281
(cherry picked from commit a63e69f5f0)
2018-04-23 09:56:53 +00:00
Thomas Hellstrom
279c628560 svga: Fix incorrect advertizing of EGL_KHR_gl_colorspace
When advertizing this extension, egl_dri2 uses the DRI2_RENDERER_QUERY
extension to query whether an sRGB format is supported. That extension will
query our driver with the BIND flag PIPE_BIND_RENDER_TARGET rather than
PIPE_BIND_DISPLAY_TARGET which is used when building the configs.
We only return the correct value for PIPE_BIND_DISPLAY_TARGET.

The inconsistency causes EGL to crash at surface initialization if sRGB is
not supported. Fix this by supporting both bind flags.

Testing done:
piglit egl_gl_colorspace srgb

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
(cherry picked from commit e0c08183fb)
2018-04-23 09:56:53 +00:00
Marek Olšák
e7709adf7a glsl_to_tgsi: try harder to lower unsupported ir_binop_vector_extract
This fixes some piglits.

Cc: 18.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 7bd24d951a)
2018-04-23 09:56:53 +00:00
Marek Olšák
cd52573fac radeonsi/gfx9: fix a hang with an empty first IB
This packet causes the no-op IB detection to fail, so the IB is always
submitted. Also fix the no-op IB detection by moving the begin call.

Cc: 18.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-04-23 09:53:45 +00:00
Bas Nieuwenhuizen
5edd3192e7 ac/nir: Make the GFX9 buffer size fix apply to image loads/atomics too.
No clue how I missed those ...

Fixes: 4503ff760c "ac/nir: Add workaround for GFX9 buffer views."
CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105320
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit b0e3a9b19f)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
2018-04-23 11:19:32 +02:00
Juan A. Suarez Romero
a1c421c638 docs: add sha256 checksums for 18.0.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-18 15:25:00 +00:00
Juan A. Suarez Romero
8bd719e3fa docs: add release notes for 18.0.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-18 14:44:49 +00:00
Juan A. Suarez Romero
4a0d3a68a7 Update version to 18.0.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-18 14:37:59 +00:00
Mark Thompson
19db663cf0 st/va: Enable vaExportSurfaceHandle()
It is present from libva 2.1 (VAAPI 1.1.0 or higher).

Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 768f1487b0)
2018-04-17 14:32:34 +00:00
Marc Dietrich
825e950aea meson: fix HAVE_LLVM version define in meson build
LLVM patch level is not included in HAVE_LLVM.

Fixes: e6418ab156 ("meson: build "radv" vulkan driver for radeon hardware")
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
(cherry picked from commit a2a1b0e75e)
2018-04-14 16:15:56 +02:00
Samuel Pitoiset
a989e999b4 radv: fix radv_layout_dcc_compressed() when image doesn't have DCC
num_dcc_levels means that DCC is supported, but this doesn't
mean that it's enabled by the driver. Instead, we should rely
on radv_image_has_dcc().

This fixes some multisample regressions since 0babc8e5d6
("radv: fix picking the method for resolve subpass") on Vega.
This is because the resolve method changed from HW to FS, but
those fails are totally unexpected, so there might some
differences between Polaris and Vega here.

Fixes: 44fcf58744 ("radv: Disable DCC for GENERAL layout and compute transfer dest.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 9eac49246c)
[Juan A. Suarez: do not call radv_image_has_dcc(), as it is not defined]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-12 21:49:32 +02:00
Samuel Pitoiset
1d44ea348e radv: fix picking the method for resolve subpass
The source and destination image parameters were swapped.

No CTS changes on Polaris10, but I suspect this might
fix something.

Fixes: 2a04f5481d ("radv/meta: select resolve paths")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 0babc8e5d6)
2018-04-12 21:49:31 +02:00
Bas Nieuwenhuizen
362c4f4c72 radv: Always reset draw user SGPRs after secondary command buffer.
As we sometimes reset them to -1, -1 does not mean that they are
not written by the secondary command buffer.

Fixes: ad11fc3571 "radv: don't emit unneeded vertex state."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 41fbcc7901)
2018-04-12 21:49:31 +02:00
Bas Nieuwenhuizen
d2991fc2c6 radv: Don't set instance count using predication.
The packet can sometimes be skipped, but we still think the change takes effect.

This just makes the packet always take effect.

Fixes: ad11fc3571 "radv: don't emit unneeded vertex state."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105942
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 74b0b869dd)
2018-04-12 21:49:31 +02:00
Andres Gomez
66964df17a mesa: adds some comments regarding MESA_GLES_VERSION_OVERRIDE usage
Fixes: 03fd6704db ("mesa: Add support for a new override string
MESA_GLES_VERSION_OVERRIDE")

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7cf3932098)
2018-04-12 21:49:31 +02:00
Marek Olšák
5eef557ddd mesa: simplify MESA_GL_VERSION_OVERRIDE behavior of API override
v2:
 - Provide a correct explanation on the envvars documentation (Ian).
 - Provide a more correct explanation on the function comments (Andres).
v3:
 - Homogenize documentation and inline comments (Emil).
 - Correct a typo (Emil).

Fixes: 2599b92eb9 ("mesa: allow forcing >=3.1 compatibility contexts
with MESA_GL_VERSION_OVERRIDE")

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Cc: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 806ab42c0f)
2018-04-12 21:49:31 +02:00
Andres Gomez
7711ae2987 dri_util: when overriding, always reset the core version
This way we won't fail when validating just because we may have a non
overriden core version that is lower than the requested one, even when
the compat version is high enough.

For example, running glcts from VK-GL-CTS with i965, this will
succeed:

$ MESA_GL_VERSION_OVERRIDE=4.6 ./glcts --deqp-case=KHR-GL46.info.vendor

While, this will fail:

$ MESA_GL_VERSION_OVERRIDE=4.6COMPAT ./glcts --deqp-case=KHR-GL46.info.vendor

Fixes: 464c56d3d5 ("dri_util: Use
_mesa_override_gl_version_contextless")

Cc: Ian Romanick <ian.d.romanick@intel.com>
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 044acd3569)
2018-04-12 21:49:31 +02:00
Dylan Baker
5f4009079c meson: fix megadriver symlinking
Which should be relative instead of absolute.

Fixes: f7f1b30f81
       ("meson: extend install_megadrivers script to handle symmlinking")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105567
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-and-Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6ac87c1769)
2018-04-12 21:49:31 +02:00
Dylan Baker
c9b6960f34 meson: Set .so version for xa like autotools does
Fixes: 0ba909f0f1
       ("meson: build gallium xa state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 19dbed6477)
2018-04-12 21:49:31 +02:00
Jason Ekstrand
e49d7abf87 nir/lower_vec_to_movs: Only coalesce if the vec had a SSA destination
Otherwise we may end up trying to coalesce in a case such as

ssa_1 = fadd r1, r2
r3.x = fneg(r2);
r3 = vec4(ssa_1, ssa_1.y, ...)

and that would cause us to move the writes to r3 from the vec to the
fadd which would re-order them with respect to the write from the fneg.
In order to solve this, we just don't coalesce if the destination of the
vec is not SSA.  We could try to get clever and still coalesce if there
are no writes to the destination of the vec between the vec and the ALU
source.  However, since registers only come from phi webs and indirects,
the chances of having a vec with a register destination that is actually
coalescable into its source is very slim.

Shader-db results on Haswell:

    total instructions in shared programs: 13657906 -> 13659101 (<.01%)
    instructions in affected programs: 149291 -> 150486 (0.80%)
    helped: 0
    HURT: 592

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105440
Fixes: 2458ea95c5 "nir/lower_vec_to_movs: Coalesce movs on-the-fly when possible"
Reported-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Tested-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 800df942ea)
2018-04-12 21:49:31 +02:00
Timothy Arceri
1ec9166598 glsl: always call do_lower_jumps() after loop unrolling
This fixes a bug in radeonsi where LLVM cannot handle the case where
a break exists but its not the last instruction in the block.

LLVM would fail with:
Terminator found in the middle of a basic block!
LLVM ERROR: Broken function found, compilation aborted!

Fixes: 96fe8834f5 "glsl_to_tgsi: do fewer optimizations with GLSLOptimizeConservatively"

Reviewed-by: Matt Turner <mattst88@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105317
(cherry picked from commit b42633db8e)
2018-04-12 21:49:31 +02:00
Timothy Arceri
f1604f69c2 gallium/pipebuffer: fix parenthesis location
Without this the return value will never get set to -1. This
was first added in 49866c8f34 and copied in 2b396eeed9.

Fixes: 2b396eeed9 "gallium/pb_cache: add a copy of cache bufmgr independent of pb_manager"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102342
(cherry picked from commit 7e9b7ec094)
2018-04-12 21:49:31 +02:00
Daniel Stone
44c7d1aa2e st/dri: Initialise modifier to INVALID for DRI2
When allocating a buffer for DRI2, set the modifier to INVALID to inform
the backend that we have no supplied modifiers and it should do its own
thing. The missed initialisation forced linear, even if the
implementation had made other decisions.

This resulted in VC4 DRI2 clients failing with:
  Modifier 0x0 vs. tiling (0x700000000000001) mismatch

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reported-by: Andreas Müller <schnitzeltony@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Fixes: 3f8513172f ("gallium/winsys/drm: introduce modifier field to winsys_handle")
(cherry picked from commit 4cbecb6168)
2018-04-12 21:49:31 +02:00
Jason Ekstrand
f2a13363cf intel/vec4: Set channel_sizes for MOV_INDIRECT sources
Otherwise, any indirect push constant access results in an assertion
failure when we start digging through the channel_sizes array.  This
fixes dEQP-VK.pipeline.push_constant.graphics_pipeline.dynamic_index_vert
on Haswell.  It should be a harmless no-op for GL since indirect push
constants aren't used there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: e69e5c7006 "i965/vec4: load dvec3/4 uniforms first in the..."
(cherry picked from commit 2b977989f3)
2018-04-12 21:49:30 +02:00
Bas Nieuwenhuizen
df6c2bef90 ac/nir: Add workaround for GFX9 buffer views.
On GFX9 whether the buffer size is interpreted as elements or bytes
depends on whether IDXEN is enabled in the instruction. If the index
is a constant zero, LLVM optimizes IDXEN to 0.

Now the size in elements is interpreted in bytes which of course
results in out of bounds accesses.

The correct fix is most likely to disable the LLVM optimization,
but we need something to work with LLVM <= 6.0.

radeonsi does the max between stride and element count on the CPU
but that results in the size intrinsics returning the wrong size
for the buffer. This would cause CTS errors for radv.

v2: Also include the store changes.

Fixes: e38685cc62 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 4503ff760c)
[Juan A. Suarez: partially backported from 908a0cd1dbe5, a backport for
17.3 stable branch; resolved trivial conflicts]

Conflicts:
        src/amd/common/ac_nir_to_llvm.c
        src/amd/vulkan/radv_nir_to_llvm.c
2018-04-12 21:49:30 +02:00
Dylan Baker
1550c67a3a autotools: include meson_get_version
Otherwise meson won't read the VERSION file and won't set a version.
That means that pkg-config files will have version unset as well.

Fixes: 3e9533d9b8
       ("meson: Add script to use VERSION file for getting version")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit bc2fdb9759)
2018-04-12 21:49:30 +02:00
Eric Engestrom
92cb895316 gbm: remove never-implemented function
I assume this was implemented in a previous version of that commit, but
was removed in the version that actually landed.

Fixes: 8430af5ebe "Add support for swrast to the DRM EGL platform"
Cc: Giovanni Campagna <gcampagna@src.gnome.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 431a1d12cc)
2018-04-12 21:49:30 +02:00
Timothy Arceri
9710a7042c nir: fix crash in loop unroll corner case
When an if nesting inside anouther if is optimised away we can
end up with a loop terminator and following block that looks like
this:

        if ssa_596 {
                block block_5:
                /* preds: block_4 */
                vec1 32 ssa_601 = load_const (0xffffffff /* -nan */)
                break
                /* succs: block_8 */
        } else {
                block block_6:
                /* preds: block_4 */
                /* succs: block_7 */
        }
        block block_7:
        /* preds: block_6 */
        vec1 32 ssa_602 = phi block_6: ssa_552
        vec1 32 ssa_603 = phi block_6: ssa_553
        vec1 32 ssa_604 = iadd ssa_551, ssa_66

The problem is the phis. Loop unrolling expects the last block in
the loop to be empty once we splice the instructions in the last
block into the continue branch. The problem is we cant move phis
so here we lower the phis to regs when preparing the loop for
unrolling. As it could be possible to have multiple additional
blocks/ifs following the terminator we just convert all phis at
the top level of the loop body for simplicity.

We also add some comments to loop_prepare_for_unroll() while we
are here.

Fixes: 51daccb289 "nir: add a loop unrolling pass"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670
(cherry picked from commit 629ee690ad)
2018-04-12 21:49:30 +02:00
Timothy Arceri
7fe3731e9f glsl: fix infinite loop caused by bug in loop unrolling pass
Just checking for 2 jumps is not enough to be sure we can do a
complex loop unroll. We need to make sure we also have also found
2 loop terminators.

Without this we were attempting to unroll a loop where the second
jump was nested inside multiple ifs which loop analysis is unable
to detect as a terminator. We ended up splicing out the first
terminator but failed to actually unroll the loop, this resulted
in the creation of a possible infinite loop.

Fixes: 646621c66d "glsl: make loop unrolling more like the nir unrolling path"

Tested-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670
(cherry picked from commit 56b867395d)

Squashed with:

glsl: remove unreachable assert()

Earlier commit enforced that we'll bail out if the number of terminators
is different than 2. With that in mind, the assert() will never trigger.

Fixes: 56b867395d ("glsl: fix infinite loop caused by bug in loop
unrolling pass")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 8eceac9de7)
2018-04-12 21:49:30 +02:00
Lionel Landwerlin
4cfb3553eb i965/perf: fix config registration when uploading to kernel
When registring configurations to the kernel for the first time, we
run into an issue where the id number is not properly set (we're using
the wrong variable). As a result when trying to use that id later on,
we get an error.

This issue manifest itself the first time you use frameretrace after
reboot, subsequent runs are fine.

Fixes: 27ee83eaf7 ("i965: perf: add support for userspace configurations")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 1603ce1921)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_performance_query.c
2018-04-12 21:49:30 +02:00
Juan A. Suarez Romero
31f323165c cherry-ignore: omx: always define ENABLE_ST_OMX_{BELLAGIO,TIZONIA}
fixes: The commit fixes earlier commits 83d4a5d5ae,
b2f2236dc5 and c62cf1f165 which did not land in
branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-12 21:49:30 +02:00
Caio Marcelo de Oliveira Filho
7279b0c5ce anv/pipeline: fail if TCS/TES compile fail
v2: Add Fixes tag. (Lionel)

Fixes: e50d4807a3 ("anv: Compile TCS/TES shaders.")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 318073ce66)
2018-04-12 21:49:30 +02:00
Juan A. Suarez Romero
08b7ec9b20 cherry-ignore: radv: handle exporting view index to fragment shader. (v1.1)
fixes: The commit requieres earlier commits 639c4f2b54 and
2cfba40eea which did not land in branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-12 21:49:29 +02:00
Juan A. Suarez Romero
e26892d902 cherry-ignore: ac/shader: fix vertex input with components.
fixes: The commit fixes earlier commit 1c57a6da5e which did not land in
branch.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-12 21:49:29 +02:00
Timothy Arceri
c9e2de3398 ac: make use of if/loop build helpers
These helpers insert the basic block in the same order as they
appear in NIR making it easier to follow LLVM IR dumps. The helpers
also insert more useful labels onto the blocks.

TGSI use the line number of the corresponding opcode in the TGSI
dump as the label id, here we use the corresponding block index
from NIR.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 99cdc019bf)
2018-04-12 21:49:29 +02:00
Timothy Arceri
7a02062da5 radeonsi: make use of if/loop build helpers in ac
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 6e1a142863)
2018-04-12 21:49:29 +02:00
Timothy Arceri
48cbac76a6 ac: add if/loop build helpers
These have been ported over from radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 42627dabb4)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/common/ac_llvm_build.c
	src/amd/common/ac_llvm_build.h
2018-04-12 21:49:29 +02:00
Dylan Baker
42cf180fb5 meson: don't use compiler.has_header
Meson's compiler.has_header is completely useless, it only checks that a
header exists, not whether it's usable. This creates problems if a
header contains a conditional #error declaration, like so:

> #if __x86_64__
> # error "Doesn't work with x86_64!"
> #endif

Compiler.has_header will return true in this case, even when compiling
for x86_64. This is useless.

Instead, we'll do a compile check so that any #error declarations will
be treated as errors, and compilation will work.

Fixes compilation on x32 architecture.

Gentoo Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=649746
meson bug: https://github.com/mesonbuild/meson/issues/2246
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 8247a30838)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	meson.build
2018-04-12 21:49:29 +02:00
Derek Foreman
50e3fb590c egl/wayland: Make swrast display_sync the correct queue
commit 03dd9a88b0 introduced per surface
queues, but the display_sync for swrast_commit_backbuffer remained on
the old queue.  This is likely to break when dispatching the correct
queue at the top of function (which can't dispatch the sync callback
we're waiting for).

The easiest known reproduction case is running weston-subsurfaces under
weston --use-pixman

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit aa18a63512)
2018-04-12 21:49:29 +02:00
Xiong, James
9776580d97 i965: return the fourcc saved in __DRIimage when possible
When creating a image from a texture, the image's dri_format is
set to the first plane's format, and used to look up for the
fourcc. e.g. for FOURCC_NV12 texture, the dri_format is set to
__DRI_IMAGE_FORMAT_R8, we end up with a wrong entry in function
intel_lookup_fourcc():
   { __DRI_IMAGE_FOURCC_R8, __DRI_IMAGE_COMPONENTS_R, 1,
     { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, } },
instead of the correct one:
   { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
     { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
       { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
as a result, a wrong fourcc __DRI_IMAGE_FOURCC_R8 was returned.

To fix this bug, the image inherits the texture's planar_format that
has the original fourcc; Upon querying, if planar_format is set,
return the saved fourcc; Otherwise fall back to the old way.

v3: add a bug description and "cc mesa-stable" tag (Jason)
  remove redundant null pointer check (Tapani)
  squash 2 patches into one (James)
v2: fall back to intel_lookup_fourcc() when planar_format is NULL
  (Dongwon & Matt Roper)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Xiong, James <james.xiong@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit f23b45dce3)
2018-04-12 21:49:29 +02:00
Axel Davy
2165cc0a17 st/nine: Do not use scratch for face register
Scratch registers are reused every instructions.
Since vFace is reused, a new temporary register
should be used.

Fixes: https://github.com/iXit/Mesa-3D/issues/311

Signed-off-by: Axel Davy <davyaxel0@gmail.com>

CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d899826733)
2018-04-12 21:49:29 +02:00
Axel Davy
8521e00b5c st/nine: Declare lighting consts for ff shaders
The lighting constants were not declared previously,
but were accessed with indirect addressing, which is
illegal.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105442

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 39240926cd)
2018-04-12 21:49:29 +02:00
Iago Toral Quiroga
0007574c41 compiler/spirv: set is_shadow for depth comparitor sampling opcodes
From the SPIR-V spec, OpTypeImage:

"Depth is whether or not this image is a depth image. (Note that
 whether or not depth comparisons are actually done is a property of
 the sampling opcode, not of this type declaration.)"

The sampling opcodes that specify depth comparisons are
OpImageSample{Proj}Dref{Explicit,Implicit}Lod, so we should set
is_shadow only for these (we were using the deph property of the
image until now).

v2:
 - Do the same for OpImageDrefGather.
 - Set is_shadow to false if the sampling opcode is not one of these (Jason)
 - Reuse an existing switch statement instead of adding a new one (Jason)

Fixes crashes in:
dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.depth_property.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 41ac0b1443)
2018-04-12 21:49:29 +02:00
Sergii Romantsov
755d07c269 i965: Extend the negative 32-bit deltas to 64-bits
Gen8+ use 48-bit address relocations so need to extend the sign
to 64-bit return value. Without it we have higher bits zeroed
and missing the negavive values.
Haswell and older use 32-bit deltas so are unaffected by this issue.

v2:
  used int32_t fucntion parameter instead of explicit type conversion.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101408
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Tested-by: Andriy Khulap <andriy.khulap@globallogic.com>
Tested-by: Stuart Young <cefiar@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "18.0 17.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 98b860e311)
2018-04-12 21:49:28 +02:00
Rob Clark
b44df1d118 freedreno/a5xx: don't align height for PIPE_BUFFER
Buffers can be large, so we probably don't want to make them all 32x
bigger.  But they can't be rendered to (at least in GL) so we don't
need this workaround to prevent page faults on mem<->gmem.

Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 2f175bfe5d)
2018-04-12 21:49:28 +02:00
Rob Clark
b582a4e910 freedreno/a5xx: fix page faults on last level
We could alternatively fall back to using "old style" draw's for
mem<->gmem (ie. what <= a4xx do) when height is not aligned to 32,
but that is somewhat more work (and not really something that could
be applied to stable)

Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit 1866f76f7b)
2018-04-12 21:49:28 +02:00
Jason Ekstrand
ab520c95bd nir/lower_indirect_derefs: Support interp_var_at intrinsics
This fixes the fs-interpolateAtCentroid-block-array piglit test on i965.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 6018f5b079)
2018-04-12 21:49:28 +02:00
Jason Ekstrand
490c34281c nir/vars_to_ssa: Remove copies from the correct set
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 0517d65f96)
2018-04-12 21:49:28 +02:00
Henri Verbeet
510f4f3362 mesa: Inherit texture view multi-sample information from the original texture images.
Found running "The Witness" in Wine. Without this patch, texture views created
on multi-sample textures would have a GL_TEXTURE_SAMPLES of 0. All things
considered such views actually work surprisingly well, but when combined with
(plain) multi-sample textures in a framebuffer object, the resulting FBO is
incomplete because the sample counts don't match.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 0b73c86b80)
2018-04-12 21:49:28 +02:00
Eric Engestrom
51265b844b docs: fix 18.0 release note version
Fixes: 839fb3a696 "docs: Update 18.0.0 release notes"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d77844a529)
2018-04-12 21:49:28 +02:00
Rob Clark
b3343407a8 nir: fix per_vertex_output intrinsic
This is supposed to have both BASE and COMPONENT but num_indices was
inadvertantly set to 1.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit cc3a88e81d)
2018-04-12 21:49:28 +02:00
Ian Romanick
af4f8d426a i965/vec4: Fix null destination register in 3-source instructions
A recent commit (see below) triggered some cases where conditional
modifier propagation and dead code elimination would cause a MAD
instruction like the following to be generated:

    mad.l.f0  null, ...

Matt pointed out that fs_visitor::fixup_3src_null_dest() fixes cases
like this in the scalar backend.  This commit basically ports that code
to the vec4 backend.

NOTE: I have sent a couple tests to the piglit list that reproduce this
bug *without* the commit mentioned below.  This commit fixes those
tests.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Fixes: ee63933a7 ("nir: Distribute binary operations with constants into bcsel")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105704
(cherry picked from commit 91225cb33f)
2018-04-12 21:49:28 +02:00
Eric Engestrom
a602ef9352 meson/configure: detect endian.h instead of trying to guess when it's available
Cc: Maxin B. John <maxin.john@gmail.com>
Cc: Khem Raj <raj.khem@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Suggested-by: Jon Turney <jon.turney@dronecode.org.uk>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit cbee1bfb34)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	meson.build

Squashed with:

configure: use AC_CHECK_HEADERS to check for endian.h

The currently we use the singular CHECK_HEADER combined with explicit
append to the DEFINES variable. That is a legacy misnomer, since it
requires us to add $DEFINES to every piece that we build.

Using the plural version of the helper sets the HAVE_ macro for us, plus
ensures it's passed to the compiler - if config.h is available in there
(not in the case of mesa) otherwise on the command line.

In hindsight, we should replace all the AC_CHECK_{FUNC,HEADER} instances
with the plural version (or even the _ONCE suffixed version) and drop
the DEFINES hacks.

Fixes: cbee1bfb34 ("meson/configure: detect endian.h instead of trying
to guess when it's available")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105717
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
(cherry picked from commit 5a75019ad0)
2018-04-12 21:49:28 +02:00
Leo Liu
fd6ded8f9c radeon/vce: move feedback command inside of destroy function
On the CI family, firmware requires the destory command have to be the
last command in the IB, moving feedback command after destroy is causing
issues on CI cards, so we have to keep the previous logic that moves
destroy back to the last command.

But as the original issue fixed previously, with the newer family like Vega10,
feedback command have to be included inside of the task info command along
with destroy command.

Fixes: 6d74cb25("radeon/vce: move destroy command before feedback command")

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c4de2f0880)
2018-04-12 21:49:28 +02:00
Axel Davy
bcdbcfca6e st/nine: Fix non inversible matrix check
There was a missing absolute value when
checking if the determinant was big enough.

Fixes: https://github.com/iXit/Mesa-3D/issues/292

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit dbc24835d7)
2018-04-12 21:49:28 +02:00
Axel Davy
9ea807c8ee st/nine: Fixes warning about implicit conversion
Makes the conversion explicit.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102542

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f61e9a958b)
2018-04-12 21:49:27 +02:00
Axel Davy
25bf9b2bb7 st/nine: Fix bad tracking of vs textures for NINESBT_ALL
Stateblocks with NINESBT_ALL should track all textures.
For better performance they have a faster path which
copies all the required.

This path was only tracking ps textures.

Fixes: https://github.com/iXit/Mesa-3D/issues/303

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 71eae7940e)
2018-04-12 21:49:27 +02:00
Juan A. Suarez Romero
85a862949d cherry-ignore anv: Be more careful about fast-clear colors
stable: There is a specific version for this patch for stable branches,
but it is causing regressions.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-04-12 21:49:19 +02:00
Emil Velikov
fb64913d19 docs: add sha256 checksums for 18.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-27 19:02:59 +01:00
Emil Velikov
dceb1ce807 docs: Update 18.0.0 release notes
Note: the file was originally 17.4.0, yet git stuggles to detect the
move :-\

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-27 17:20:22 +01:00
Emil Velikov
e28e8c0ffa Update version to 18.0.0(final)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-27 17:12:42 +01:00
Emil Velikov
15f1b50cee Update version to 18.0.0-rc5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-21 14:17:29 +00:00
Marek Olšák
05ae1d463f radeonsi: prevent a negative buffer offset in si_upload_descriptors
(cherry picked from commit 16856a1ee8)
2018-03-20 16:57:26 +00:00
Marek Olšák
3d4383f139 radeonsi: fix vertex buffer address computation with full 64-bit addresses
(cherry picked from commit 2a47660754)
2018-03-20 16:57:26 +00:00
Andres Gomez
3fec971d71 travis: keep meson version below 0.45.0
Recently Meson upgraded to 0.45.0 and it needs python 3.5+, which is
not available in Trusty.

Cc: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Jon Turney <jon.turney@dronecode.org.uk>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 72552012c7)
2018-03-20 16:57:26 +00:00
Andres Gomez
9f86aee1d1 travis: make Meson find the proper llvm-config
Travis CI has moved to LLVM 5.0, and meson is detecting automatically
the available version in /usr/local/bin based on the PATH env variable
order preference.

As for 0.44.x, Meson cannot receive the path to the llvm-config binary
as a configuration parameter. See
https://github.com/mesonbuild/meson/issues/2887 and
7c8b6ee3fa

We want to use the custom (APT) installed version. Therefore, let's
make Meson find our wanted version sooner than the one at
/usr/local/bin

Once this is corrected, we would still need a patch similar to:
https://lists.freedesktop.org/archives/mesa-dev/2017-December/180217.html

v2: Create the link only to the specificly wanted LLVM version (Gert).

Cc: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: Gert Wollny <gw.fossdev@gmail.com>
Cc: Jon Turney <jon.turney@dronecode.org.uk>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-and-Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-By: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b5b912dfee)
2018-03-20 16:57:26 +00:00
Vadym Shovkoplias
282591dd00 mesa: add glsl version query (v4)
Add support for GL_NUM_SHADING_LANGUAGE_VERSIONS
and glGetStringi for GL_SHADING_LANGUAGE_VERSION

v2:
  - Combine similar functionality into
    _mesa_get_shading_language_version() function.
  - Change GLSL version return mechanism.
v3:
  - Add return of empty string for GLSL ver 1.10.
  - Move _mesa_get_shading_language_version() function
    to src/mesa/main/version.c.
v4:
  - Add OpenGL version check.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104915
Signed-off-by: Andriy Khulap <andriy.khulap@globallogic.com>
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit a553c54abf)
2018-03-20 16:57:26 +00:00
Eric Anholt
4f49caf17a i965: Silence compiler warning about promoted_constants.
We only have a cfg != NULL if we went through one of the paths that set
it, but my compiler doesn't figure that out.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 6411defdcd ("intel/cs: Re-run final NIR optimizations for each SIMD size")
(cherry picked from commit d25640c3a3)
2018-03-20 16:57:26 +00:00
Dave Airlie
876880b752 radv: mark all tess output for an indirect access.
If a shader does a tcs store with an indirect access, we
were only marking the first spot as used. For indirect access
we always now mark all slots used by the variable.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 27a5e5366e)
Emil Velikov: move hunks {radv,ac}_nir_to_llvm.c]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_nir_to_llvm.c
2018-03-20 16:57:26 +00:00
Dave Airlie
14f55a8221 ac/nir: pass the nir variable through tcs loading.
I was going to have to add another parameter to this monster,
so we should just pass the nir_variable in, I can't find any
reason this would be a bad idea.

This needed for the next fix.

Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 4f0c89d66c)
[Emil Velikov: move hunk {radv,ac}_nir_to_llvm.c]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
	src/amd/common/ac_shader_abi.h
	src/amd/vulkan/radv_nir_to_llvm.c
2018-03-20 16:57:26 +00:00
Dave Airlie
82a426af5f radv: get correct offset into LDS for indexed vars.
This seems more correct to me, since if we have an array
of floats they'll be vec4 aligned, and if we do af[2],
we want the const index to increase by 2 slots in the non
compact case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f9de2d409b)
[Emil Velikov: hunk belongs to another file {radv,ac}_nir_to_llvm.c]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_nir_to_llvm.c
2018-03-20 16:57:26 +00:00
Jason Ekstrand
a3602cdfe7 i965: Emit texture cache invalidates around blorp_copy
This is a terrible hack but it fixes CTS regressions.  It's still
incredibly unclear exactly what is going wrong in the hardware to cause
this to be an issue so this isn't a good fix by any means.  However, it
does fix tests so there is that.

Fixes: fb0e9b5197 "i965: Track the depth and render caches separately"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103746
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 8379bff6c4)
2018-03-20 16:57:26 +00:00
Dylan Baker
16eb9feca7 meson: Add moduledir to d3d.pc
This is required to build wine with the nine patchset

Fixes: 6b4c7047d5
       ("meson: build gallium nine state_tracker")
Reported-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit b7c6870f87)
2018-03-20 16:57:26 +00:00
Ian Romanick
582cae39bd mesa: Don't write to user buffer in glGetTexParameterIuiv on error
With some sets of optimization flags, GCC will generate warnings like
this:

src/mesa/main/texparam.c:2327:27: warning: ‘*((void *)&ip+12)’ may be used uninitialized in this function [-Wmaybe-uninitialized]
             params[3] = ip[3];
                         ~~^~~
src/mesa/main/texparam.c:2320:16: note: ‘*((void *)&ip+12)’ was declared here
          GLint ip[4];
                ^~

ip is not initialized in cases where a GL error is generated.  In these
cases, we should *not* write to the user's buffer, so this is actually a
bug.  I wrote a new piglit test gl-3.0-texparameteri to show this bug.

I suspect that Coverity also detected this, but the scan site is
currently down.

Fixes: c2c507786 "main: Added entry points for glGetTextureParameteriv, Iiv, and Iuiv."
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit def0030e64)
2018-03-20 16:57:26 +00:00
Marek Olšák
676af78077 st/dri: fix OpenGL-OpenCL interop for GL_TEXTURE_BUFFER
Tested by our OpenCL team.

Fixes: 9c499e6759 "st/mesa: don't invoke st_finalize_texture & st_convert_sampler for TBOs"

Acked-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit db495b8962)
2018-03-20 16:57:26 +00:00
Dylan Baker
dd36f7f2f7 autotools: include all meson.build files
Otherwise SWR cannot be built with meson from an autotools generated
tarball, such as the 18.0.0-rc4 tarball.

Fixes: 16bf813830 ("meson/swr: re-shuffle generated files")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7258be91c5)
2018-03-20 16:57:25 +00:00
Bas Nieuwenhuizen
d007df9e9b radv: Fix copying from 3D images starting at non-zero depth.
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit eea20d59ab)
2018-03-20 16:57:25 +00:00
Vinson Lee
e2f8a6503d swr/rast: Fix macOS macro.
Fixes: a25093de71 ("swr/rast: Implement JIT shader caching to disk")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
(cherry picked from commit bb742b6ebf)
2018-03-20 16:57:25 +00:00
Dylan Baker
9f8e6c1efa meson: install vulkan_intel.h header
Fixes: d1992255bb
       ("meson: Add build Intel "anv" vulkan driver")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e23192022a)
2018-03-20 16:57:25 +00:00
Andriy Khulap
0a62b02c05 i965: Fix RELOC_WRITE typo in brw_store_data_imm64()
Fixes: 6c530ad116
("i965: Reduce passing 2x32b of reloc_domains to 2 bits")

Signed-off-by: Andriy Khulap <andriy.khulap@globallogic.com>
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 7859701920)
2018-03-20 16:57:25 +00:00
Iago Toral Quiroga
7064c88793 i965/sbe: fix number of inputs for active components
In 16631ca30e we fixed gen9 active components to account for padded
inputs in the URB, which we can have with SSO programs. To do that,
instead of going through the bitfield of inputs (which doesn't include
padding information), we compute the number of inputs from the size
of the URB entry.

Unfortunately, there are some special inputs that are not stored in
the URB and that we also need to account for. These special inputs
are identified and handled during calculate_attr_overrides().

Instead of keeping track of the exact number of inputs, we just
program active components for all possible inputs like we do in
anvil.

This fixes a regression in a WebGL program that uses Point Sprite
functionality (specifically, VARYING_SLOT_PNTC).

v2:
 - Add 'Fixes' tag (Mark Janes)
 - make no_vue_inputs int instead of uint32_t, and add const qualifier
   to num_inputs variable (Ian)

v3:
 - Do not try to count inputs correctly, just program all input
   slots like we do in anvil (Ken)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105224
Fixes: 16631ca30e (i965/sbe: fix active components for SSO programs with over 16 inputs)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit bc73016703)
2018-03-20 16:57:25 +00:00
Bas Nieuwenhuizen
2f0d53d417 radv: Implement waiting on non-submitted fences.
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 6968d782d3)
2018-03-20 16:57:25 +00:00
Bas Nieuwenhuizen
8f9d123b76 radv: Implement WaitForFences with !waitAll.
Nothing to do except using a busy wait loop. At least for old kernels.

A better implementation for newer kernels to come later.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105255
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 2a404c6f92)
2018-03-20 16:57:25 +00:00
Dave Airlie
369d279f86 ac/nir: don't apply slice rounding on txf_ms
This matches the tgsi code.

Fixes arb_texture_multisample texelFetch piglit tests.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: f4e499ec79 (radv: add initial non-conformant radv vulkan driver)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 69495b30a3)
[Emil Velikov: trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
2018-03-20 16:57:25 +00:00
Simon Hausmann
2f5c2135d5 glsl: Fix memory leak with known glsl_type instances
When looking up known glsl_type instances in the various hash tables, we
end up leaking the key instances used for the lookup, as the glsl_type
constructor allocates memory on the global mem_ctx. This patch changes
glsl_type to manage its own memory, which fixes the leak and also allows
getting rid of the global mem_ctx and its mutex.

v2: remove lambda usage (Tapani)
    (+keep ASSERT_BITFIELD_SIZE, modify dummy ctor to initialize mem_ctx)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104884
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Simon Hausmann <simon.hausmann@qt.io>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit fb5825e7ce)
2018-03-20 16:57:25 +00:00
Anuj Phogat
e8f95b5cfc intel/compiler: Memory fence commit must always be enabled for gen10+
Commit bit in the message descriptor (Bit 13) must be always set
to true in CNL+ for memory fence messages. It also fixes a piglit
GPU hang on cnl+ in simulation environment.
Piglit test: arb_shader_image_load_store-shader-mem-barrier
See HSD ES # 1404612949

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit 56dc9f9f49)
2018-03-20 16:57:25 +00:00
Samuel Pitoiset
cdf1f44242 radv: do not set pending_reset_query in BeginCommandBuffer()
This is just useless for two reasons:
1) flush_bits is not set accordingly, so nothing will be flushed
   in BeginQuery().
2) we always flush caches in EndCommandBuffer(), so if a reset
   is done in a previous command buffer we are safe.

Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit c133a3411b)
2018-03-20 16:57:25 +00:00
Dave Airlie
6083211d8a r600/cayman: fix fragcood loading recip generation.
This fixes some hangs seen where the recip_ieee opcodes would
end up split across the wrong slots.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit bf2af063c3)
2018-03-20 16:57:25 +00:00
Jason Ekstrand
6ce732c500 intel/fs: Set up sampler message headers in the visitor on gen7+
This gives the scheduler visibility into the headers which should
improve scheduling.  More importantly, however, it lets the scheduler
know that the header gets written.  As-is, the scheduler thinks that a
texture instruction only reads it's payload and is unaware that it may
write to the first register so it may reorder it with respect to a read
from that register.  This is causing issues in a couple of Dota 2 vertex
shaders.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104923
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
(cherry picked from commit ff4726077d)
2018-03-20 16:57:25 +00:00
Dylan Baker
795a3e10be meson: radeonsi cannot be built with drm 2.4.90
Cc: 18.0 17.3 17.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
[Emil Velikov: use correct version in commit message]
Signed-off-by: Emil Vilikov <emil.velikov@collabora.com>
2018-03-20 16:57:25 +00:00
Samuel Pitoiset
f2480c9f16 Revert "mesa: do not trigger _NEW_TEXTURE_STATE in glActiveTexture()"
This reverts commit f314a532fd.

This appears to introduce some blinking textures in UT2004. Not
sure exactly what's the root cause because we don't have much
information about the issue.

Anyway, this was just a micro optimization that actually breaks,
at least, one app almost one year later.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105436
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit f02f1ad13f)
2018-03-20 16:57:25 +00:00
Marek Olšák
d1c4153427 configure.ac: blacklist libdrm 2.4.90
Cc: 18.0 17.3 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 5d0acff39e)
2018-03-20 16:57:25 +00:00
Alex Smith
faffba77d6 radv: Fix CmdCopyImage between uncompressed and compressed images
From the spec:

    "When copying between compressed and uncompressed formats the
     extent members represent the texel dimensions of the source
     image and not the destination."

However, as per 7b890a36, we must still use the destination image type
when clamping the extent so that we copy the correct number of layers
for 2D to 3D copies.

Fixes: 7b890a36 "radv: Fix vkCmdCopyImage for 2d slices into 3d Images"
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit fcf267ba08)
2018-03-20 16:57:25 +00:00
Bas Nieuwenhuizen
1dc10f1309 radv: Increase the number of dynamic uniform buffers.
The vulkan API is not ideal as it does not allow us have a
shared limit.

Feral needs 15+6 for one of their games, and I'm not a fan
of overcommitting the limits, so increase the number of
dynamic uniform buffers to 16.

CC: <mesa-stable@lists.freedesktop.org>
CC: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 997306c031)
2018-03-20 16:57:25 +00:00
Dave Airlie
2faad178ed r600: implement callstack workaround for evergreen.
This is ported from the sb backend, there are some issues with
evergreen stacks on the boundary between entries and ALU_PUSH_BEFORE
instructions.

Whenever we are going to use a push before, we check the stack
usage and if we have to use the workaround, then we switch to
a separate push.

I noticed this problem dealing with some of the soft fp64 shaders,
in nosb mode, they are quite stack happy.

This fixes all the glitches and inconsistencies I've seen with them

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Elie Tournier <elie.tournier@collabora.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 5d4fbc2b54)
2018-03-20 16:57:25 +00:00
Jordan Justen
611a88d4a6 intel/vulkan: Hard code CS scratch_ids_per_subslice for Cherryview
Ken suggested that we might be underallocating scratch space on HD
400. Allocating scratch space as though there was actually 8 EUs
seems to help with a GPU hang seen on synmark CSDof.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 24b415270f)
2018-03-20 16:57:25 +00:00
Jordan Justen
412ea8789e i965: Hard code CS scratch_ids_per_subslice for Cherryview
Ken suggested that we might be underallocating scratch space on HD
400. Allocating scratch space as though there was actually 8 EUs
seems to help with a GPU hang seen on synmark CSDof.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104636
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105290
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
(cherry picked from commit 06e3bd02c0)
2018-03-20 16:57:25 +00:00
Marek Olšák
31506bbad5 radeonsi: add a workaround for GFX9 hang with init_config alignment
Fixes: 75c5d25f0f "radeonsi: align command buffer starting address to fix some Raven hangs"
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 2bdb54bce7)
2018-03-20 16:57:25 +00:00
Marek Olšák
ba47865d7d radeonsi: align command buffer starting address to fix some Raven hangs
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 75c5d25f0f)
[Emil Velikov: remove uvd_enc hunk - missing in branch]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/common/ac_gpu_info.c
2018-03-20 16:57:25 +00:00
Marek Olšák
3894eab901 st/mesa: expose 0 shader binary formats for compat profiles for Qt
Bugzilla: https://bugreports.qt.io/browse/QTBUG-66420
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105065
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
(cherry picked from commit 55376cb31e)
2018-03-20 16:57:24 +00:00
Samuel Pitoiset
ea43ba4e93 radv: make sure to emit cache flushes before starting a query
If the query pool has been previously resetted using the compute
shader path.

Fixes: a41e2e9cf5 ("radv: allow to use a compute shader for resetting the query pool")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105292
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit c956d0f406)
2018-03-20 16:57:24 +00:00
George Kyriazis
3a9454f9d4 swr/rast: Fix index buffer overfetch issue for non-indexed draws
Populate pLastIndex, even for the non-indexed case.  An zero pLastIndex
can cause the index offsets inside the fetcher to have non-sensical values
that can be either very large positive or very large negative numbers.

cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

(cherry picked from commit 539de78633)
[George Kyriazis: patch is a backport for 18.0 of the cherry-pick above]
2018-03-20 16:57:24 +00:00
Samuel Iglesias Gonsálvez
682a859dbe glsl/linker: fix bug when checking precision qualifier
According to GLSL ES 3.2 spec, see table in 9.2.1 "Linked Shaders"
section, the precision qualifier should match for uniform variables.
This also applies to previous GLSL ES 3.x specs.

This 'if' checks the condition for uniform variables, while for UBOs
it is checked in link_interface_blocks.cpp.

Fixes: b50b82b8a5
("glsl/es31: precision qualifier doesn't need to match in shader interface block members")

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit e207b2e2c8)
2018-03-20 16:57:24 +00:00
Dave Airlie
3016b79076 r600: partly revert disabling tiling for 1d texture.
Previously we had a check for 1d of narrow 2D textures, however
narrow 2d textures caused gpu hangs, but it was correct for 1d
textures.

This fixes a bunch of 1D image piglits for me.

Fixes: 7b8e1c089d (r600/texture: drop lowering 1d/2d images to linear.)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a5853a3333)
2018-03-20 16:57:24 +00:00
Timothy Arceri
f5599cc17a nir: fix interger divide by zero crash during constant folding
From the GLSL 4.60 spec Section 5.9 (Expressions):

   "Dividing by zero does not cause an exception but does result in
    an unspecified value."

Fixes: 89285e4d47 "nir: add new constant folding infrastructure"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105271
(cherry picked from commit 0c1f37cc2d)
2018-03-20 16:57:24 +00:00
Dylan Baker
36ac4550cf meson: fix building without GL
libgl will be undefined _glx, so move that check inside the
`if with_glx != 'disabled'` block.

v2: - Simplify commit message (Eric, Emil)

Fixes: 5c460337fd ("meson: Fix GL and EGL pkg-config files with glvnd")
Reported-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
CC: Daniel Stone <daniels@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Untested-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b9636fe38a)
2018-03-20 16:57:24 +00:00
Dave Airlie
10d6f10a2e r600: fix tgsi clock last setting
On cayman this was hitting an assert later, which probably wasn't
see on non-cayman due to having the t slot.

Fixes: 9041730d1 (r600: add support for ARB_shader_clock.)
(cherry picked from commit 0cc5be7741)
2018-03-20 16:57:24 +00:00
Dylan Baker
32add84fce meson: Fix GL and EGL pkg-config files with glvnd
Currently meson will generate a pkg-config that links to EGL_mesa (or
GLX_mesa), but this isn't correct, it should always link to EGL or GL.
Probably the "right" solution is to have glvnd itself provide the pkg
config files for GL and EGL, but that also means that glvnd needs to
provide many of the header files, which makes it a more involved job.

Fixes: a47c525f32 ("meson: build glx")
Fixes: 035ec7a2bb ("meson: Add support for EGL glvnd")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 5c460337fd)
2018-03-20 16:57:24 +00:00
Frank Binns
e3b13ef0a9 egl/dri2: fix segfault when display initialisation fails
dri2_display_destroy() is called when platform specific display
initialisation fails. However, this would typically lead to a
segfault due to the dri2_egl_display vbtl not having been set up.

Fixes: 2db9548296 ("loader_dri3/glx/egl: Optionally use a blit
context for blitting operations")
Signed-off-by: Frank Binns <francisbinns@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6160bf97db)
2018-03-20 16:57:24 +00:00
Samuel Pitoiset
c03f382fff ac/nir: use ordered float comparisons except for not equal
Original patch from Timothy Arceri, I have just fixed the
not equal case locally.

This fixes one important rendering issue in Wolfenstein 2
(the cutscene transition issue).

RadeonSI uses the same ordered comparisons, so I guess that
what we should do as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104302
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104905
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
(cherry picked from commit e05507a427)
2018-03-20 16:57:24 +00:00
Mauro Rossi
987ed51ec1 android: vulkan/util: add dependency on libnativewindow for O and later
Similar to 90dd6e5 ("Android: egl: add dependency on libnativewindow")

Fixes the following building error:

In file included from out/target/product/x86_64/obj_x86/STATIC_LIBRARIES/libmesa_vulkan_util_intermediates/util/vk_enum_to_str.c:26:
external/mesa/include/vulkan/vk_android_native_buffer.h:22:10: fatal error: 'system/window.h' file not found
         ^~~~~~~~~~~~~~~~~
1 error generated.

Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 6451b0703f)
2018-03-20 16:57:24 +00:00
Mauro Rossi
c6859103ba android: anv: add dependency on libnativewindow for O and later
Similar to 90dd6e5 ("Android: egl: add dependency on libnativewindow")

Fixes the following building errors:

In file included from external/mesa/src/intel/vulkan/gen7_cmd_buffer.c:30:
In file included from external/mesa/src/intel/vulkan/anv_private.h:72:
external/mesa/include/vulkan/vk_android_native_buffer.h:22:10: fatal
error: 'system/window.h' file not found
         ^~~~~~~~~~~~~~~~~
1 error generated.
...
In file included from external/mesa/src/intel/vulkan/anv_gem.c:32:
In file included from external/mesa/src/intel/vulkan/anv_private.h:72:
external/mesa/include/vulkan/vk_android_native_buffer.h:22:10: fatal
error: 'system/window.h' file not found
         ^~~~~~~~~~~~~~~~~
1 error generated.

Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit d448954228)
[Emil Velikov: drop gen11 hunk]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/intel/Android.vulkan.mk
2018-03-20 16:57:24 +00:00
Mauro Rossi
18349ccf30 android: anv/extensions: fix generated sources build
Building rules are aligned to automake ones

The correct script to build anv_extensions.{c,h} is anv_extensions_gen.py
Generation rules for anv_extensions.c requires --out-c option
Generation rules for anv_extensions.h were missing
Necessary include paths are added to avoid following build errors:

cp: cannot stat '.../gen/STATIC_LIBRARIES/libmesa_vulkan_common_intermediates/vulkan/anv_extensions.c':
No such file or directory

In file included from external/mesa/src/intel/vulkan/anv_gem.c:32:
external/mesa/src/intel/vulkan/anv_private.h:75:10: fatal error: 'anv_extensions.h' file not found
         ^~~~~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/intel/vulkan/anv_batch_chain.c:30:
external/mesa/src/intel/vulkan/anv_private.h:75:10: fatal error: 'anv_extensions.h' file not found
         ^~~~~~~~~~~~~~~~~~
1 error generated.

Fixes: dd088d4bec ("anv/extensions: Generate a header file with extension tables")
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 9a508b719b)
2018-03-20 16:57:24 +00:00
Gert Wollny
45f4a85f99 r600: Take ALU_EXTENDED into account when evaluating jump offsets
ALU_EXTENDED needs 4 DWORDS instead of the usual 2, hence if the last ALU
clause within a IF-JUMP or ELSE branch is ALU_EXTENDED the target jump
offset needs to be adjusted accordingly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104654
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit c7cadcbda4)
2018-03-20 16:57:24 +00:00
Francisco Jerez
30a63012b4 i965: Fix KHR_blend_equation_advanced with some render targets.
This reverts two bogus and seemingly useless changes from the commits
referenced below, which broke KHR_blend_equation_advanced (and
EXT_shader_framebuffer_fetch_non_coherent which wasn't exposed yet)
for any kind of render target surface that would cause the
get_isl_surf() call in brw_emit_surface_state() to do anything useful
(notice how the result of get_isl_surf() is completely ignored by the
caller right now), as was the case while using those extensions with
1D array or 3D framebuffers in particular.

Fixes: f5859b45b1 "i965/miptree: Switch remaining surfaces to isl"
Fixes: bf24c3539e "i965/miptree: Clean-up unused"
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
(cherry picked from commit 27c829da28)
2018-03-20 16:57:24 +00:00
James Legg
046145ae81 radv: Really use correct HTILE expanded words.
When transitioning to an htile compressed depth format, Set the full
depth range, so later rasterization can pass HiZ. Previously, for depth
only formats, the depth range was set to 0 to 0. This caused unwanted
HiZ rejections with a VK_FORMAT_D16_UNORM depth buffer
(VK_FORMAT_D32_SFLOAT was not affected somehow).

These values are derived from PAL [0], since I can't find the
specification describing the htile values.

[0] 5cba4ecbda/src/core/hw/gfxip/gfx9/gfx9MaskRam.cpp (L1500)

CC: Dave Airlie <airlied@redhat.com>
CC: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Fixes: 5158603182 "radv: Use correct HTILE expanded words."
(cherry picked from commit afd8fd0656)
2018-03-20 16:57:24 +00:00
Lionel Landwerlin
bb51eb5355 i965: perf: ensure reading config IDs from sysfs isn't interrupted
Fixes: 458468c136 "i965: Expose OA counters via INTEL_performance_query"
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit bd9672695b)
2018-03-20 16:57:24 +00:00
George Kyriazis
e6b583b7d8 swr/rast: blend_epi32() should return Integer, not Float
fix gcc8 compiler error for KNL.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105029
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit f1fbeb1a53)
Fixes: fc4f6c44c4 ("swr/rast: Switch intrinsic usage to SIMDLib")
2018-03-20 16:57:24 +00:00
Karol Herbst
9b9e67f5b7 nvir/nvc0: fix legalizing of ld unlock c0[0x10000]
We have to increase the file index also for 0x10000 not just for values
greater than 0x10000.

Fixes: 37b67db6ae
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 7319311a50)
2018-03-20 16:57:24 +00:00
Eric Anholt
387b90a5a5 glsl/tests: Fix a compiler warning about signed/unsigned loop comparison.
Fixes: d32956935e ("glsl: Walk a list of ir_dereference_array to mark array elements as accessed")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 4636ce362d)
2018-03-20 16:57:24 +00:00
Eric Anholt
d8bd466702 glsl: Silence warnings in the uniform initializer test about 16-bit types
They should probably get unit tests implemented, but this cleans up a
bunch of warnings in my build for now.

Fixes: 59f458cd87 ("glsl: Add 16-bit types")
Cc: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 1b313eedb5)
2018-03-20 16:57:24 +00:00
Daniel Stone
ba5d7b18d0 i965: Fix aux-surface size check
The previous commit reworked the checks intel_from_planar() to check the
right individual cases for regular/planar/aux buffers, and do size
checks in all cases.

Unfortunately, the aux size check was broken, and required the aux
surface to be allocated with the correct aux stride, but full image
height (!).

As the ISL aux surface is not recorded in the DRIimage, we cannot easily
access it to check. Instead, store the aux size from when we do have the
ISL surface to hand, and check against that later when we go to access
the aux surface.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: c2c4e5bae3 ("i965: Fix bugs in intel_from_planar")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 9d21dbeb88)
2018-03-20 16:57:24 +00:00
Dylan Baker
ca222a64b0 meson: freedreno depends on nir
This fixes a race condition in building targets that link in freedreno.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105120
Fixes: 0bbecc5a85 ("meson: define driver dependencies")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit 03ab40b1f7)
2018-03-20 16:57:24 +00:00
Daniel Stone
654a881a51 egl/wayland: Always use in-tree wayland-egl-backend.h
A recent patchset to Wayland[0] migrated Mesa's libwayland-egl backend
into Wayland itself, so implementations could provide backends. Mesa
still uses its own, and the two have already diverged[1].

The include from egl_dri2.h could pick up either the installed Wayland
wayland-egl-backend.h (with a 'driver_private' member), or the Mesa
internal wayland-egl-backend.h (with a 'private' member), failing the
build in the first instance.

Add an explicit directory prefix to the include, so we always get our
in-tree version.

[0]: https://patchwork.freedesktop.org/series/31663/
[1]: https://cgit.freedesktop.org/wayland/wayland/commit/?id=9fa60983b579

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105103
Fixes: 198af27c67 ("wayland-egl: rename wayland-egl-{priv,backend}.h")
(cherry picked from commit ff5432dc50)
2018-03-20 16:57:24 +00:00
Dave Airlie
972c9a08cc virgl: remap query types to hw support.
The gallium query types changed, so we need to remap from the
gallium ones to the virgl ones.

Fixes:
dEQP-GLES3.functional.transform_feedback.basic_types*

"This also fixes:

dEQP-GLES3.functional.transform_feedback.array.separate*
dEQP-GLES3.functional.transform_feedback.array_element*
dEQP-GLES3.functional.transform_feedback.interpolation.*

Gallium's p_defines.h and virglrenderer's p_defines.h have diverged
quite a bit, so not including
PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE there makes sense for now."
 - Gurchetan Singh

Fixes: 3f6b3d9db (gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 60c14a0db2)
2018-03-20 16:57:23 +00:00
Dylan Baker
5402319d57 meson: fix xvmc target linkage
This needs to link the state tracker with --whole-archive to expose the
right symbols.

v4: - Always add libswdri and libswkmsdri to the link_with list

Fixes: 22a817af8a ("meson: build gallium xvmc state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 2ab1ce30c4)
2018-03-20 16:57:23 +00:00
Dylan Baker
a81d907a6c meson: Fix xa target linkage
This needs to use --whole-archive (link_whole in meson) to properly
expose symbols.

v4: - Always add libswdri and libswkmsdri to link_with list

Fixes: 0ba909f0f1 ("meson: build gallium xa state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 0b73c329bc)
2018-03-20 16:57:23 +00:00
Dylan Baker
7bc6404bbc meson: Fix omx-bellagio target linkage
This needs to use --whole-archive (link_whole in meson) to properly
expose symbols.

v4: - Always add libswdri and libswkmsdri to link_with

Fixes: 1d36dc674d ("meson: build gallium omx state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 91a59b6287)
2018-03-20 16:57:23 +00:00
Dylan Baker
66f2e7801b meson: fix va target linkage
The state tracker needs to be linked with whole-archive (like
autotools). As a result there are symbols from libswdri and libswkmsdri
that are needed, so link those as well.

v4: - Always add libswdri and libswkmsdri to link_with list

Fixes: 5a785d51a6 ("meson: build gallium va state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 2e4be28fb2)
2018-03-20 16:57:23 +00:00
Dylan Baker
9d1499af33 meson: fix vdpau target linkage
The VDPAU state tracker needs to be linked with whole-archive (autotools
does this). Because we are linking the whole archive we alos need to
link with libswdri and libswkmsdri if those have been enabled.

v4: - Always add libswdri and libswkmsdri to link_with list

Fixes: 68076b8747 ("meson: build gallium vdpau state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 90d361753c)
2018-03-20 16:57:23 +00:00
Dylan Baker
8069a71465 meson: Actually link xvmc target with libxvmc
Unlike vdpau this is required.

Fixes: 22a817af8a ("meson: build gallium xvmc state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 3403055768)
2018-03-20 16:57:23 +00:00
Dylan Baker
0a12090b4e meson: actually link with libomxil-bellagio
This state tracker actually needs to link, unlike vdpau.

Fixes: 1d36dc674d ("meson: build gallium omx state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7708103857)
2018-03-20 16:57:23 +00:00
Dylan Baker
c620eff8e2 meson: link dri3 xcb libs into vlwinsys instead of into each target
This makes the dependencies easier to manage, since each media target
doesn't need to worry about linking to half a dozen libraries.

Fixes: b1b65397d0 ("meson: Build gallium auxiliary")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7023b373ec)
2018-03-20 16:57:23 +00:00
Dylan Baker
fc1f9c41b8 meson: use va-api version reported by pkg-config
Fixes: 5a785d51a6 ("meson: build gallium va state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 424e654cb0)
2018-03-20 16:57:23 +00:00
Eric Engestrom
b33937ab13 meson: dedup gallium-xa logic
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 2f0db33527)
2018-03-20 16:57:23 +00:00
Eric Engestrom
a731133c91 meson: dedup gallium-va logic
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit fa5d616bf9)
2018-03-20 16:57:23 +00:00
Eric Engestrom
672467cb59 meson: dedup gallium-omx logic
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 86168ed31c)
2018-03-20 16:57:23 +00:00
Eric Engestrom
ec91477aa7 meson: dedup gallium-xvmc logic
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 724916c8a8)
2018-03-20 16:57:23 +00:00
Eric Engestrom
eb1aac3f4f meson: dedup gallium-vdpau logic
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 992af0a4b8)
2018-03-20 16:57:23 +00:00
Dylan Baker
96d3fbc966 meson: add libswdri and libswkmsdri to dri link_with
Fixes: b154b44ae3 ("meson: build radeonsi gallium driver")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 8eb608df61)
2018-03-20 16:57:23 +00:00
Dylan Baker
2665a124e8 meson: add libswdri and libswkmsdri to d3dadaptor link_with
v5: - Fix libswdi -> libswdri typo

Fixes: 6b4c7047d5 ("meson: build gallium nine state_tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit be879f9f29)
2018-03-20 16:57:23 +00:00
Dylan Baker
a77e6f4313 meson: define empty variables for libswdri and libswkmsdri
This allows these variables to unconditionally included in `link_with`
lists, even if they're not used. This allows deleting duplicated logic
in nearly every gallium target implemented in meson today. This also
removes the now useless `build_by_default` flag from swdri and swkmsdri.

v4: - add this patch

Fixes: 66c94b9313
       ("meson: build gallium winsys for dri, null, and wrapper")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d672084ba2)
2018-03-20 16:57:23 +00:00
Dylan Baker
61e47c158d meson: use depend_files for adding extra file dependencies
cc: Jason Ekstrand <jason.ekstrand@intel.com>
Fixes: dd088d4bec ("anv/extensions: Generate a header file with extension tables")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 0e617c04f1)
2018-03-20 16:57:23 +00:00
Dylan Baker
411a13d455 meson: use depend_files to track extra file dependencies
cc: Jason Ekstrand <jason.ekstrand@intel.com>
Fixes: f939940809 ("anv: Split anv_extensions.py into two files")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit b03969a5ad)
2018-03-20 16:57:23 +00:00
Dylan Baker
daba407e80 Revert "anv/meson: Make anv_entrypoints_gen.py depend on anv_extensions.py"
This reverts commit 10d1b0be8e.

This is unnecessary, the depend_files argument is for adding
dependencies on files that are not part of the input, which is already
done.

cc: Jason Ekstrand <jason.ekstrand@intel.com>
Fixes: 10d1b0be8e
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
(cherry picked from commit 384bff13e0)
2018-03-20 16:57:23 +00:00
Dylan Baker
17d1c9dc18 meson: use a custom target instead of a generator for i965 oa
Generators really are never the thing you want. The problem in this case
is that a generator must create a file that contains any file that the
generated target depends on. Since brw_oa.py doesn't generate such a
file the generated sources are not regenerated even if the xml files
they should depend on changes.

While we could change brw_oa.py to write such a file, that's silly, it
depends on itself and the xml file. So we'll just use a custom target
instead, which will have the correct dependency behavior and doesn't
really add that much code.

Fixes: 3218056e0e ("meson: Build i965 and dri stack")
CC: Ian Romanick <idr@freedesktop.org>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 5317211fa0)
2018-03-20 16:57:23 +00:00
Brian Paul
398477a30d mesa: add missing switch case for EXTRA_VERSION_40 in check_extra()
The EXTRA_VERSION_40 predicate is tested as part of
extra_gl40_ARB_sample_shading but there was no switch case for it.

Fixes: 77b440e42d ("mesa: Add new functions and enums required
by GL_ARB_sample_shading")
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

(cherry picked from commit b08d718703)
2018-03-20 16:57:23 +00:00
Eric Anholt
87c9aaa1d5 glsl/tests: Fix strict aliasing warning about int64/double.
Fixes: 4bf9862747 ("glsl/tests: Add UINT64 and INT64 types")
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
(cherry picked from commit 21670f8208)
2018-03-20 16:57:23 +00:00
Eric Anholt
9c8707957e ac/nir: Fix compiler warning about uninitialized dw_addr.
Even switching the def's condition to be the same chip revision check as
the use, the compiler doesn't figure it out.  Just NULL-init it.

Fixes: ec53e52742 ("ac/nir: Add ES output to LDS for GFX9.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 091bff8317)
2018-03-20 16:57:23 +00:00
Daniel Stone
d025543236 egl/wayland: Fix ARGB/XRGB transposition in config map
When 0b2b719121 moved from an if tree to a struct to map between
wl_drm formats and EGLConfigs, it transposed the mapping between XRGB
and ARGB. Luckily, everyone exposes both formats, so this is harmless.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: 0b2b719121 ("egl/wayland: introduce dri2_wl_add_configs_for_visuals() helper")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 4fbd2d50b1)
2018-03-20 16:57:23 +00:00
Grazvydas Ignotas
c86fee1b2c gallium/hud: update some query functions
It seems these were missed when struct pipe_context * argument was
added to hud_graph::query_new_value.

Fixes: 3132afdf4c "gallium/hud: pass pipe_context explicitly to most functions"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 13ada91740)
2018-03-20 16:57:23 +00:00
Dylan Baker
d658dc8f4d glapi: fix check_table test for non-shared glapi with meson
v2: - Add glapitable_h generated source to requirements

Fixes: 3218056e0e ("meson: Build i965 and dri stack")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (v1)
(cherry picked from commit c74719cf4a)
2018-03-20 16:57:23 +00:00
Dylan Baker
ada6af7330 glapi: remove APPLE extensions from test
Fixes: 7009955281 ("mesa: Remove GL_APPLE_vertex_array_object stubs")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 0316aa432d)
2018-03-20 16:57:22 +00:00
Dylan Baker
b26d2238ea glapi/check_table: Remove 'extern "C"' block
Using 'extern "C"' around includes is always incorrect, as the header may
contain C++ symbols (as it does in this case), which means it cannot use
C linkage. In this case the header has a template in it, which obviously
cannot be linked with C linkage rules.

Fixes: a29ad2b421 ("mesa/tests: Add tests for the generated dispatch table")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit a4f1fc5dd1)
2018-03-20 16:57:22 +00:00
Dylan Baker
08135dcbc0 meson: fix test source name for static glapi
fixes: 43a6e84927 ("meson: build mesa test.")
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 105178db8f)
2018-03-20 16:57:22 +00:00
Bas Nieuwenhuizen
3a3e55e5f7 vulkan/wsi: Fix OOM behavior with prime images.
Fixes: d50937f137 "vulkan/wsi: Implement prime in a completely generic way"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a3e42e7a69)
2018-03-20 16:57:22 +00:00
Dave Airlie
fcb04fee1c radv: don't support tc-compat on multisample d32s8 at all.
RX550 fails
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_2

So increase the range of the workaround.

Fixes: f4c534ef6 (radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1))

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit e7e81f362d)
2018-03-20 16:57:22 +00:00
Chuck Atkins
faebf98275 glx: Properly handle cases where screen creation fails
This fixes a segfault exposed by a29d63ecf7 which occurs when swr is
used on an unsupported architecture.

v2: re-work to place logic in xmesa_init_display

Signed-off-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Cc: George Kyriazis <george.kyriazis@intel.com>
Cc: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit 540e49e105)
2018-03-20 16:57:22 +00:00
Jason Ekstrand
dd8e9517ef vulkan/wsi/x11: Set OUT_OF_DATE if wait_for_special_event fails
This most likely means we lost our connection to the X server so
OUT_OF_DATE is reasonable.  This was also the one case where we pushed a
UINT32_MAX into the queue without setting an error condition.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 6937c61324)
2018-03-20 16:57:22 +00:00
Dave Airlie
72796340e4 ac/nir: to integer the args to bcsel.
dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
was hitting an llvm assert due to one value being an int and the
other a float.

This just casts both values to integer and fixes the test.

Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit d5b2d7ed67)
2018-03-20 16:57:22 +00:00
Jason Ekstrand
5b6b4e4f38 intel/isl: Add an isl_color_value_is_zero helper
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 4796025ba5)
2018-02-28 20:15:05 +00:00
Jonathan Gray
03d801a176 configure.ac: pthread-stubs not present on OpenBSD
pthread-stubs is no longer required on OpenBSD and has been removed.
libpthread parts involved moved to libc.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 9401d90a53)
2018-02-28 20:15:04 +00:00
Thomas Hellstrom
f4e01dd223 loader_dri3/glx/egl: Reinstate the loader_dri3_vtable get_dri_screen callback
Removing this callback caused rendering corruption in some multi-screen cases,
so it is reinstated but without the drawable argument which was never used
by implementations and was confusing since the drawable could have been
created with another screen.

Cc: "17.3 18.0" mesa-stable@lists.freedesktop.org
Fixes: 5198e48a0d (loader_dri3/glx/egl: Remove the loader_dri3_vtable get_dri_screen callback)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105013
Reported-by: Daniel van Vugt <daniel.van.vugt@canonical.com>
Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit f386776ea5)
2018-02-28 20:15:04 +00:00
Thomas Hellstrom
f75a99501b svga: Fix a leftover debug hack
Fix what appears to be a leftover debug hack.
The hack would force the driver to take a different blit path; possibly,
although unverified, reverting to software blits.

Tested using piglit tests/quick. No related regressions.

Cc: "17.2 17.3 18.0" <mesa-stable@lists.freedesktop.org>
Fixes: 9d81ab7376 (svga: Relax the format checks for copy_region_vgpu10 somewhat)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104625
Reported-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 80c31f7837)
2018-02-28 20:15:04 +00:00
Bas Nieuwenhuizen
98dd3e1bf1 radv: Always lower indirect derefs after nir_lower_global_vars_to_local.
Otherwise new local variables can cause hangs on vega.

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105098
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 05d84ed68a)
2018-02-28 20:15:04 +00:00
Gurchetan Singh
b2966d5693 mesa: don't clamp just based on ARB_viewport_array extension
The ARB_viewport_array spec says:

"Dependencies
    OpenGL 1.0 is required.

    OpenGL 3.2 or the EXT_geometry_shader4 or ARB_geometry_shader4 extensions
    are required.

    This extension is written against the OpenGL 3.2 (Compatibility)
    Specification."

As such, we should ignore it for GLES2 contexts.

Fixes:
dEQP-GLES2.functional.state_query.integers.viewport_getinteger
dEQP-GLES2.functional.state_query.integers.viewport_getfloat

on llvmpipe and virgl.

v2: Use _mesa_has_* (Ilia)

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c6694793e1)
2018-02-28 20:15:04 +00:00
Anuj Phogat
91fe956683 isl: Don't use surface format R32_FLOAT for typed atomic integer operations
From Skylake PRM Surface Formats section:

   "The surface format for the typed atomic integer operations must
    be R32_UINT or R32_SINT."

Fixes an error and a piglit GPU hang in simulation environment.
Piglit test: gl45-imageAtomicExchange-float.shader_test

Suggested-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.co
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "18.0 17.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0cd37f9178)
2018-02-28 20:15:04 +00:00
Rafael Antognolli
767c97583d docs: Add Cannonlake support to 18.0 release notes.
17.4 is actually 18.0.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: "18.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit eb2e17e2d1)
2018-02-28 20:14:59 +00:00
Rafael Antognolli
bf972691cc anv/gen10: Remove warning message.
Gen10 seems pretty stable so far, remove "alpha support" message.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: "18.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit fcae3d1a9a)
2018-02-28 20:14:25 +00:00
Rafael Antognolli
8d56352851 i965/gen10: Remove warning message.
Gen10 seems pretty stable so far, so there's no reason to keep this
message.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: "18.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit bf1577fe09)
2018-02-28 20:14:25 +00:00
Jason Ekstrand
e4820a9837 anv: Move setting current_pipeline to cmd_state_init
We were setting current_pipeline to UINT32_MAX and then calling
cmd_cmd_state_reset which memsets the entire state struct to 0 which
implicitly resets current_pipeline to 3D.  I have no idea how this
hasn't caused everything to explode.

Fixes: cd3feea745 "anv/cmd_buffer: Rework anv_cmd_state_reset"
cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 4c77e21c81)
2018-02-28 20:14:25 +00:00
Daniel Stone
524fa503d1 i965: Fix bugs in intel_from_planar
This commit fixes two bugs in intel_from_planar.  First, if the planar
format was non-NULL but only had a single plane, we were falling through
to the planar case.  If we had a CCS modifier and plane == 1, we would
return NULL instead of the CCS plane.  Second, if we did end up in the
planar_format == NULL case and the modifier was DRM_FORMAT_MOD_INVALID,
we would end up segfaulting in isl_drm_modifier_has_aux.

Cc: mesa-stable@lists.freedesktop.org
Fixes: 8f6e54c929
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit c2c4e5bae3)
2018-02-28 20:14:25 +00:00
Lionel Landwerlin
c0d3b2db86 i965: perf: use drmIoctl() instead of ioctl()
ioctl() might be interrupted, use drmIoctl() instead as it'll retry
automatically.

Fixes: 27ee83eaf7 "i965: perf: add support for userspace configurations"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit bd6c0cab60)
2018-02-28 20:14:25 +00:00
Dave Airlie
d2fcdaf504 r600: fix xfb stream check.
This fixes:
KHR-GL45.enhanced_layouts.xfb_vertex_streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f292eceae1)
2018-02-28 20:14:25 +00:00
Dave Airlie
ec2b454d86 r600/compute: only mark buffer/image state dirty for fragment shaders
The compute emission path always emits this currently, and emitting
it on the fragment path breaks the blitter.

This fixes gpu hangs in KHR-GL45.compute_shader.resource-texture

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit ab5cee4c24)
2018-02-28 20:14:25 +00:00
Dave Airlie
dd2ea3a3e9 r600/sb/cayman: fix indirect ubo access on cayman
With sb enabled on cayman, this was overwriting the proper
cf index value with random ones if the dst gpr was 2 or 3,
only save the value for a MOVA instruction.

Fixes:
KHR-GL45.gpu_shader5.uniform_blocks_array_indexing
(on cayman with sb)

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8bdad9fa1f)
2018-02-28 20:14:25 +00:00
Dave Airlie
e8f3951e2e r600/eg: use texture target to pick array size not view target (v2)
This fixes a few CTS cases in :
KHR-GL45.texture_view.view_sampling

some multisample cases are still broken, but not sure this is
the same problem.

v2: fix more cases

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 012100b809)
2018-02-28 20:14:25 +00:00
Michal Navratil
8d186473ea winsys/amdgpu: allow non page-aligned size bo creation from pointer
Fix INVALID_OPERATION caused by BufferData with target
EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD when the buffer size is
not page aligned.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4081e08896)
2018-02-28 20:14:25 +00:00
Iago Toral Quiroga
758355b34c anv/device: initialize the list of enabled extensions properly
The loop goes through the list of enabled extensions marking them as
enabled in the list, but this relies on every other extension being
initialized to false by default.

This bug would make us, for example, advertise certain device extension
entry points as available even when the corresponding extensions had
not been enabled.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: abc62282b5 "anv: Add a per-device table of enabled extensions"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a5053ba27e)
2018-02-28 20:14:24 +00:00
Juan A. Suarez Romero
7adc454c94 glsl/linker: check same name is not used in block and outside
According with OpenGL GLSL 3.20 spec, section 4.3.9:

  "It is a link-time error if any particular shader interface
   contains:
     - two different blocks, each having no instance name, and each
       having a member of the same name, or
     - a variable outside a block, and a block with no instance name,
       where the variable has the same name as a member in the block."

This fixes a previous commit 9b894c8 ("glsl/linker: link-error using the
same name in unnamed block and outside") that covered this case, but
did not take in account that precision qualifiers are ignored when
comparing blocks with no instance name.

With this commit, the original tests
KHR-GL*.shaders.uniform_block.common.name_matching keep fixed, and also
dEQP-GLES31.functional.shaders.linkage.uniform.block.differing_precision
regression is fixed, which was broken by previous commit.

v2: use helper varibles (Matteo Bruni)

Fixes: 9b894c8 ("glsl/linker: link-error using the same name in unnamed block and outside")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104668
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104777
CC: Mark Janes <mark.a.janes@intel.com>
CC: "18.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Matteo Bruni <matteo.mystral@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 4195eed961)
2018-02-28 20:14:24 +00:00
Emil Velikov
0354ff27e7 cherry-ignore: reference correct SHA for the VK_KHX_multiview commit
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-28 20:14:24 +00:00
Jordan Justen
719f2c9340 i965: Support 0 ARB_get_program_binary formats for compat profiles
The QT framework has a bug in their shader program cache, which is
built on GL_ARB_get_program_binary.

To give QT and distributions time to fix the bug and roll the fix out
to users, for the 18.0 release we will advertise support for 0 binary
formats for compatibility profiles.

This is only being done on the 18.0 release branch.

Ref: https://bugreports.qt.io/browse/QTBUG-66420
Ref: https://bugs.freedesktop.org/show_bug.cgi?id=105065
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2018-02-23 10:51:40 -08:00
Emil Velikov
1e1734634b Update version to 18.0.0-rc4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 02:15:14 +00:00
Roland Scheidegger
0c0d6d7751 r600: don't do stack workarounds for hemlock
By the looks of it it seems hemlock is treated separately to cypress, but
certainly it won't need the stack workarounds cedar/redwood (and
seemingly every other eg chip except cypress/juniper) need.
(Discovered by accident.)

Acked-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit c2f0e08857)
2018-02-05 19:06:03 +00:00
Jon Turney
f90ba6c1e0 travis: add osx autotools build
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b3a1d9588e)
2018-02-05 19:06:03 +00:00
Jon Turney
f009ba1fd7 travis: pip -> pip2
On travis, for OSX, python2 from homebrew is pre-installed. per [1]:

 python points to the macOS system Python (with no manual PATH modification)
 python2 points to Homebrew’s Python 2.7.x (if installed)
 python3 points to Homebrew’s Python 3.x (if installed)
 pip doesn't exist
 pip2 points to Homebrew’s Python 2.7.x’s pip (if installed)
 pip3 points to Homebrew’s Python 3.x’s pip (if installed)

We will end up using 'python2' for building mesa.

Just use 'pip2' instead of 'pip', as that seems to work for all platforms on
travis.

[1] https://docs.brew.sh/Homebrew-and-Python.html

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 4701379d96)
2018-02-05 19:06:03 +00:00
Jon Turney
331bea12db travis: conditionalize building of prerequisites on if OS=linux
Use a '|' YAML literal block to avoid the convoluted syntax needed to put
the entire conditional on a single line.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7d1ec6d6a9)
2018-02-05 19:06:03 +00:00
Jon Turney
937b151e4f glx/test: fix building for osx
An additional stub for applegl_create_context() is needed
Cannot test indirect API as it's not built on osx, currently

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 63041ba613)
2018-02-05 19:06:02 +00:00
Jon Turney
9d7a80f4ae glx/apple: locate dispatch table functions to wrap by name
Avoid reaching into the dispatch table internals (and thus having to deal
with the complexities of remap etc.) by identifying functions to wrap by
name.

See:
https://lists.freedesktop.org/archives/mesa-dev/2015-June/086721.html et seq.
https://bugs.freedesktop.org/show_bug.cgi?id=90311

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d3540b405b)
2018-02-05 19:06:02 +00:00
Jon Turney
ac08cc6873 glx/apple: include util/debug.h for env_var_as_boolean prototype
mesa/src/glx/glxcmds.c:1295:21: error: implicit declaration of function 'env_var_as_boolean' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
mesa/src/glx/apple/apple_visual.c:85:28: error: implicit declaration of function 'env_var_as_boolean' is invalid in C99 [-Werror,-Wimplicit-function-declaration]

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b37b7b42dc)
2018-02-05 19:06:02 +00:00
Jon Turney
53f8d524a0 osx: ld doesn't support --build-id
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit f8ed9f24d5)
2018-02-05 19:06:02 +00:00
Jon Turney
eeee001d78 configure: Default to gbm=no on osx
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 7ad7a07c88)
2018-02-05 19:06:02 +00:00
Eric Anholt
6fb0121e2c mesa: Drop incorrect A4B4G4R4 _mesa_format_matches_format_and_type() cases.
swapBytes operates on bytes, not 4-bit channels, so you can't just take
non-swapBytes cases and flip the REV flag.

Avoids piglit texture-packed-formats regressions when enabling the
ABGR4444 format.

Fixes: c5a5c9a7db ("mesa/formats: add new mesa formats and their pack/unpack functions.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 1429cd74c2)
2018-02-05 19:06:02 +00:00
Dylan Baker
7769005a12 meson: Check for actual LLVM required versions
Currently we always check for 3.9.0, which is pretty safe since
everything except radv work with >= 3.9 and 3.9 is pretty old at this
point. However, radv actually requires 4.0, and there is a patch for
radeonsi to do the same.

Fixes: 673dda8330 ("meson: build "radv" vulkan driver for radeon hardware")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit c75a4e5b46)
2018-02-05 19:06:02 +00:00
Dylan Baker
2a99c5211b meson: Don't confuse the install and search paths for dri drivers
Currently there is not a separate option for setting the search path of
DRI drivers in meson, like there is in scons and autotools. This is an
oversight and needs to be fixed. This adds an extra option
`dri-search-path`, which will default to the value of
`dri-drivers-path`, like autotools does.

v2: - Split input list before joining.
v3: - use : instead of ; as the delimiter. The autotools help string
      incorrectly says ; but the code uses :
v4: - Take list in pre : delimited form (Ilia)
    - Ensure that the dri-search-path is absolute when using
      dri_drivers_path

Fixes: db9788420d ("meson: Add support for configuring dri drivers directory.")
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net> (v2)
Reviewed-by: Eric Engestrom <eric@engestrom.ch> (v3)
(cherry picked from commit d7235ef83b)
2018-02-05 19:06:02 +00:00
Kenneth Graunke
d6a8939225 i965: Bump official kernel requirement to Linux v3.9.
In commit 3f353342a6 (present in 17.3.0)
we started unconditionally using I915_EXEC_NO_RELOC, which was
introduced in Linux v3.9.  ChromeOS kernel 3.8 has backported this,
so it should work too.

Running on older kernels would likely result in every single batch
being rejected by the kernel, which is pretty catastrophic.  Yet, it
appears that nobody noticed.  So, let's just bump the official
requirement and move forward ever so slowly.

Fixes: 3f353342a6 ("i965: Use I915_EXEC_NO_RELOC")
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c3cd2aac27)
2018-02-05 19:06:02 +00:00
Marc Dietrich
a445cba84d meson: don't install windows headers on non-windows platforms
Only dive into the windows subdir if windows platform is selected.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Fixes: 5ef75cb02b "meson: build src/glx/windows"
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 4c5f0b4fd4)
2018-02-05 19:06:02 +00:00
Andres Gomez
f4ac792671 i965: perform 2 uploads with dual slot *64*PASSTHRU formats on gen<8
The emission of vertex attributes corresponding to dvec3 and dvec4
vertex shader input variables was not correct when the <size> passed
to the VertexAttribL* commands was <= 2.

In 61a8a55f55 ("i965/gen8: Fix vertex attrib upload for dvec3/4
shader inputs"), for gen8+ we needed to determine if the attrib was
dual slot to emit 128 or 256-bit, independently of the VAO size.

Similarly, for gen < 8 we also need to determine whether the attrib is
dual slot to force the emission of 256-bits through 2 uploads.

Additionally, we make use of the ISL_FORMAT_R32_FLOAT format in this
second upload to fill these unspecified components with zeros, as we
also do for gen8+.

Fixes the following test on Haswell:
KHR-GL46.vertex_attrib_binding.basic-inputL-case1

v2: Added more inline comments to explain why we are using
    ISL_FORMAT_R32_FLOAT and its consequences, as requested by
    Alejandro and Antía.

Fixes: 75968a668e ("i965/gen7: expose OpenGL 4.2 on Haswell when
supported")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103006
Cc: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: Antia Puentes <apuentes@igalia.com>
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 5a7aba2e0a)
2018-02-05 19:06:02 +00:00
Michel Dänzer
25583470fc winsys/radeon: Compute is_displayable in surf_drm_to_winsys
It was always 0, breaking (at least) DRI3 with Xwayland.

Bugzilla: https://bugs.freedesktop.org/104306
Fixes: 5f2073be32 ("ac/surface: add ac_surface::is_displayable")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 1cf1bf32ef)
2018-02-05 19:06:02 +00:00
Matthew Nicholls
7eaa4049f1 radv: remove predication on cache flushes
This can lead to a situation where cache flushes could get conditionally
disabled while still clearing the flush_bits, and thus flushes due to
application pipeline barriers may never get executed.

Fixes: a6c2001ace (radv: add support for cmd predication.)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit ef272b161e)
[Emil Velikov: trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
2018-02-05 19:06:02 +00:00
Dave Airlie
15ef35052c virgl: also remove dimension on indirect.
This fixes some dEQP tests that generated bad shaders.

Fixes: b6f6ead19 (virgl: drop const dimensions on first block.)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 49c61d8b84)
2018-02-05 19:06:02 +00:00
Dave Airlie
1c68826323 radv/gfx9: fix block compression texture views. (v2)
This ports a fix from amdvlk, to fix the sizing for mip levels
when block compressed images are viewed using uncompressed views.

My original fix didn't power the clamping, but it looks like
the clamping is required to stop the sizing going too large.

Fixes:
dEQP-VK.image.texel_view_compatible.graphic.extended*bc*
Doesn't crash DOW3 anymore.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: e38685cc62 'Revert "radv: disable support for VEGA for now."'
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f6cc15dccd)
2018-02-05 19:06:02 +00:00
Bas Nieuwenhuizen
0a26b54725 radv: Signal fence correctly after sparse binding.
It did not signal syncobjs in the fence, and also signalled too early
if there was work on the queue already, as we have to wait till that
work is done.

Fixes: d27aaae4d2 "radv: Add external fence support."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 0347a83bbf)
2018-02-05 19:06:02 +00:00
Jon Turney
8c827600ed meson: libdrm shouldn't appear in Requires.private: if it wasn't found
Otherwise, using pkg-config to retrieve flags will fail, e.g.

$ pkg-config gl --cflags
Package libdrm was not found in the pkg-config search path.
Perhaps you should add the directory containing `libdrm.pc'
to the PKG_CONFIG_PATH environment variable
Package 'libdrm', required by 'gl', not found

Fixes: 3218056e0e ("meson: Build i965 and dri stack")

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
(cherry picked from commit 4a0bab1d7f)
2018-02-05 19:06:01 +00:00
Timothy Arceri
c369ec95d9 st/shader_cache: restore num_tgsi_tokens when loading from cache
Without this we will fail to correctly serialise programs when
using glGetProgramBinary() if the program was retrieved from
the disk cache rather than freshly compiled.

Fixes: c69b0dd681 "st/glsl_to_tgsi: store num_tgsi_tokens in st_*_program"

Reviewed-by: Gert Wollny <gw.fossdev@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104762
(cherry picked from commit 041b18cf23)
2018-02-05 19:06:01 +00:00
Rafael Antognolli
626c84edb3 i965/gen10: Use CS Stall instead of WriteImmediate.
Fixes: ca19ee33d7
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 131e871385)
2018-02-05 19:06:01 +00:00
Rafael Antognolli
657817030b anv/gen10: Emit CS stall and mark push constants dirty.
I got reviews and fixed the patches locally, but ended up merging the
ones that I sent originally to the list. This patch fixes those
mistakes.

Fixes: 78c125af39
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 20578f81a6)
2018-02-05 19:06:01 +00:00
Stephan Gerhold
e6018eceb9 util/build-id: Fix address comparison for binaries with LOAD vaddr > 0
build_id_find_nhdr_for_addr() fails to find the build-id if the first LOAD
segment has a virtual address other than 0x0.

For most shared libraries, the first LOAD segment has vaddr=0x0:

    Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
    LOAD           0x000000 0x00000000 0x00000000 0x2d2e26 0x2d2e26 R E 0x1000
    LOAD           0x2d2e54 0x002d3e54 0x002d3e54 0x2e248 0x2f148 RW  0x1000

However, compiling the Intel Vulkan driver as 32-bit binary on Android produces
the following ELF header with vaddr=0x8000 instead:

    Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
    PHDR           0x000034 0x00008034 0x00008034 0x00100 0x00100 R   0x4
    LOAD           0x000000 0x00008000 0x00008000 0x224a04 0x224a04 R E 0x1000
    LOAD           0x225710 0x0022e710 0x0022e710 0x25988 0x27364 RW  0x1000

build_id_find_nhdr_callback() compares the address of dli_fbase from dladdr()
and dlpi_addr from dl_iterate_phdr(). With vaddr > 0, these point to a
different memory address, e.g.:

    dli_fbase=0xd8395000 (offset 0x8000)
    dlpi_addr=0xd838d000

At least on glibc and bionic (Android) dli_fbase refers to the address where
the shared object is mapped into the process space, whereas dlpi_addr is just
the base address for the vaddrs declared in the ELF header.

To compare them correctly, we need to calculate the start of the mapping
by adding the vaddr of the first LOAD segment to the base address.

Note: musl users will need the following patch.
https://git.musl-libc.org/cgit/musl/commit/?id=b3ae7beabb9f0c219bb8a8b63567a01c6530c1ac

Cc: Chad Versace <chadversary@chromium.org>
Cc: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104642
Fixes: 5c98d38 "util: Query build-id by symbol address, not library name"
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 02e2009b92)
2018-02-05 19:06:01 +00:00
Jordan Justen
227e0fb0a4 i965: Create new program cache bo when clearing the program cache
When the disk shader cache CI testing was enabled, we started noticing
occasional failures on deqp test runs. (Mainly SNB, rarely HSW)

Before this change, when we cleared the (in memory) program cache we
reused the same bo. Since the disk shader cache quickly restores
programs, it appears that this would lead to overwrites of the older
program binaries in the in memory program cache that apparently were
still executing in some cases. If these programs were still executing,
this could cause a GPU hang.

This issue is probably not disk shader cache specific, but may have
been hidden due to the compiler taking time to recompile programs
after the cache was cleared.

v2:
 * Don't add `copy` param to brw_cache_new_bo (Ken)
 * Call from brw_program_cache_check_size (Ken)

Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 83e60ce927)
2018-02-05 19:06:01 +00:00
George Kyriazis
28097758a8 meson/swr: Updated copyright dates
cc: mesa-stable@lists.freedesktop.org
cc: dylan@pnwbakers.com

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit bbef9474fa)
2018-02-05 19:06:01 +00:00
George Kyriazis
5afeb68c7e meson/swr: re-shuffle generated files
Move generated files from codegen/meson.build to other directories, in order
to satisfy generated include file dependencies

Add correct file lists for architecture-specific libraries.

cc: mesa-stable@lists.freedesktop.org
cc: dylan@pnwbakers.com

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 16bf813830)
2018-02-05 19:06:01 +00:00
Jason Ekstrand
c4d9ceecf8 i965: Call prepare_external after implicit window-system MSAA resolves
This fixes some rendering corruption in a couple of Android apps that
use window-system MSAA.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104741
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 2f7205be47)
2018-02-05 19:06:01 +00:00
Emil Velikov
133aa8c9f7 cherry-ignore: radv: Don't expose VK_KHX_multiview on android.
stable: The KHX extension is disabled all together in the stable
branches.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-05 19:04:56 +00:00
Emil Velikov
a307f06969 radv: Stop advertising VK_KHX_multiview
We don't want to advertise experimental extensions in actual releases.
However, there's no harm in leaving the code lying around in the tree.

[Emil Velikov: port from equivalent ANV commit]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-05 19:01:44 +00:00
Jason Ekstrand
d50d11f84b anv: Stop advertising VK_KHX_multiview
We don't want to advertise experimental extensions in actual releases.
However, there's no harm in leaving the code lying around in the tree.

(cherry picked from commit e4371d14f1)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/intel/vulkan/anv_device.c
2018-02-05 18:57:38 +00:00
Lucas Stach
0c2caeb441 renderonly: fix dumb BO allocation for non 32bpp formats
Take into account the resource format, instead of applying a hardcoded
32bpp. This not only over-allocates 16bpp formats, but also results in
a wrong stride being filled into the handle.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 0c71a19fe4)
2018-02-05 16:41:19 +00:00
Jason Ekstrand
b3cfa244e1 anv/cmd_buffer: Re-emit the pipeline at every subpass
If we ever hit this edge-case, it can theoretically cause problem for
CNL because we could end up changing render targets without re-emitting
3DSTATE_MULTISAMPLE which is part of the pipeline.  Just get rid of the
edge case.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 97938dac36)
2018-02-05 16:41:15 +00:00
Dave Airlie
446187287a r600/sb: insert the else clause when we might depart from a loop
If there is a break inside the else clause and this means we
are breaking from a loop, the loop finalise will want to insert
the LOOP_BREAK/CONTINUE instruction, however if we don't emit
the else there is no where for these to end up, so they will end
up in the wrong place.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101442
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8d633f067b)
2018-02-05 16:41:12 +00:00
Tapani Pälli
af748138eb nir: mark unused space in packed_tex_data
This change cleans following scary warnings in valgrind output
when disk cache is being written:

   ==6532== Uninitialised byte(s) found during client check request
   ==6532==    at 0x14423FAD: blob_write_bytes (blob.c:152)
   ==6532==    by 0x144240FB: blob_write_uint32 (blob.c:194)
   ==6532==    by 0x144001A5: write_tex (nir_serialize.c:613)

and later (loads of):

   ==6532== Use of uninitialised value of size 8
   ==6532==    at 0x62FCD9E: crc32_z (in /usr/lib64/libz.so.1.2.11)
   ==6532==    by 0x13F65014: util_hash_crc32 (crc32.c:127)
   ==6532==    by 0x13F5DABA: cache_put (disk_cache.c:947)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d0343bef66)
2018-02-05 16:41:09 +00:00
Tapani Pälli
753e9d6dd2 i965: fix disk_cache leak when destroying context
==2780== 1,024 bytes in 1 blocks are possibly lost in loss record 180 of 205
   ==2780==    at 0x4C31A1E: calloc (vg_replace_malloc.c:711)
   ==2780==    by 0x13F6467E: util_queue_init (u_queue.c:309)
   ==2780==    by 0x13F5C9F6: disk_cache_create (disk_cache.c:369)
   ==2780==    by 0x13F05406: brw_disk_cache_init (brw_disk_cache.c:428)
   ==2780==    by 0x13F01E78: brwCreateContext (brw_context.c:1068)

Fixes: 1a61a8b9a7 ("i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
(cherry picked from commit b99c88037b)
2018-02-05 16:41:05 +00:00
Tapani Pälli
62e8b651b1 i965: fix prog_data leak in brw_disk_cache
==25481== 576 bytes in 1 blocks are definitely lost in loss record 179 of 208
   ==25481==    at 0x4C2FB6B: malloc (vg_replace_malloc.c:299)
   ==25481==    by 0x1404E2CC: ralloc_size (ralloc.c:121)
   ==25481==    by 0x14119F82: read_and_upload (brw_disk_cache.c:176)
   ==25481==    by 0x1411A5C9: brw_disk_cache_upload_program (brw_disk_cache.c:271)
   ==25481==    by 0x1412FCA4: brw_upload_wm_prog (brw_wm.c:597)

Fixes: 516d50db31 ("i965: add initial implementation of on disk shader cache")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 28db950b51)
2018-02-05 16:41:02 +00:00
Dave Airlie
412c850120 r600/eg: construct proper rat mask for image/buffers.
If the images/buffer bindings had a gap, this produced the wrong values,
this should fix that to generate the correct rat mask for mixes of
images/buffers/cbs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit e0e23ea69c)
2018-02-05 16:40:59 +00:00
Marek Olšák
61c42583d9 winsys/amdgpu: fix assertion failure with UVD and VCE rings
Cc: 18.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 17423c993d)
2018-02-05 16:40:56 +00:00
Emil Velikov
17c0e248d7 Update version to 18.0.0-rc3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 11:27:18 +00:00
Emil Velikov
92a332ed1a cherry-ignore: add patches picked without -x
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-26 19:53:02 +00:00
Maxin B. John
74b39c0bbf anv_icd.py: improve reproducible builds
Sort the output to ensure build reproducibility

Signed-off-by: Maxin B. John <maxin.john@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 0ab04ba979 ("anv: Use python to generate ICD json files")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 8116b9170b)
2018-01-26 19:53:02 +00:00
Bas Nieuwenhuizen
a5bdf2abf9 radeonsi: Export signalled sync file instead of -1.
-1 is considered an error for EGL_ANDROID_native_fence_sync, so
we need to actually create a sync file.

Fixes: f536f45250 "radeonsi: implement sync_file import/export"
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 5a3404d443)
2018-01-26 19:53:02 +00:00
Dave Airlie
305b0b1356 radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1)
This seems to be broken, at least the cts tests fail.

This fixes:
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_4
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_8

2 samples seems to pass fine, amdvlk doesn't appear to enable TC for
possibly some other reasons here.

This is most likely a hack.

v1.1: add a bit of explaination text. (Samuel)
Fixes: ad3d98da9 (radv: enable tc compatible htile for d32s8 also.)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit f4c534ef68)
2018-01-26 19:53:02 +00:00
Emil Velikov
28680e72b8 configure.ac: correct driglx-direct help text
The default was toggled a while back, but the text wasn't updated.

Fixes: bd526ec9e1 ("configure: Always default to
--enable-driglx-direct")
Cc: Jon TURNEY <jon.turney@dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 6aeef54644)
2018-01-26 19:53:02 +00:00
Roland Scheidegger
32b2c0da59 gallivm: fix crash with seamless cube filtering with different min/mag filter
We are not allowed to modify the incoming coords values, or things may
crash (as we may be inside a llvm conditional and the values may be used
in another branch).
I recently broke this when fixing an issue with NaNs and seamless cube
map filtering, and it causes crashes when doing cubemap filtering
if the min and mag filters are different.
Add const to the pointers passed in to prevent this mishap in the future.

Fixes: a485ad0bcd ("gallivm: fix an issue with NaNs with seamless cube filtering")

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 4fe662c58f)
2018-01-26 19:53:02 +00:00
Greg V
b01ea9701e meson: handle LLVM 'x.x.xgit-revision' versions
When LLVM is built inside of a git repo (even way below, e.g. /usr/ports/.git
exists, and LLVM is built in /usr/ports/devel/llvm50/work), its version
becomes something like 5.0.0git-f8ab206b2176.

New meson versions already handle this, but we support older versions too.

Fixes: 673dda8330 ("meson: build "radv" vulkan driver for radeon hardware")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 8fae5eddd9)
2018-01-26 19:53:02 +00:00
Greg V
bf22d563f5 meson: fix getting cflags from pkg-config
get_pkgconfig_variable('cflags') always returns an empty list, it's a
function for getting *custom* variables.

Meson does not yet support asking for cflags, so explicitly invoke
pkg-config for now.

Fixes: 68076b8747 ("meson: build gallium vdpau state tracker")
Fixes: a817af8a89eb ("meson: build gallium xvmc state tracker")
Fixes: 1d36dc674d ("meson: build gallium omx state tracker")
Fixes: 5a785d51a6 ("meson: build gallium va state tracker")
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
(cherry picked from commit 53f9131205)
2018-01-26 19:53:02 +00:00
Greg V
af8c66ba6b meson: fix missing dependencies
Fixes: 66f97f6640 ("meson: build radeonsi")
Reviewed-by: Emil Velikov <emil.velikov@colalbora.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
(cherry picked from commit 7c8cfe2d59)
2018-01-26 19:53:02 +00:00
Dylan Baker
a807ad2f7c meson: correctly set SYSCONFDIR for loading dirrc
Fixes: d1992255bb ("meson: Add build Intel "anv" vulkan driver")
Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 5781c3d1db)
2018-01-26 19:53:01 +00:00
Dave Airlie
90e4f15053 radv: move spi_baryc_cntl to pipeline
We need to enable the pos float location 2 mode anytime we have
persample not just when forced by the frag shader.

This fixes:
dEQP-VK.pipeline.multisample.min_sample_shading*

Fixes: 58c97a079 (radv: enable location at sample when persample is forced.)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 298554541d)
2018-01-26 19:53:01 +00:00
Scott D Phillips
12afb389d6 meson: Fix define for USE_SSE41
Before we were adding -DHAVE_SSE41 which isn't what the code is
looking for, so some uses of the sse4.1 code were always being
skipped.

v2: Don't add any compile check for the quite old -msse4.1 option (Dylan)

Fixes: 84486f6462 ("meson: Enable SSE4.1 optimizations")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 0b8d38bd48)
2018-01-26 19:53:01 +00:00
Brian Paul
2d7035ee48 vbo: fix incorrect min/max_index values in display list draw call
This fixes another regression from commit 8e4efdc895 ("vbo: optimize
some display list drawing").  The problem was the min_index, max_index
values passed to the vbo drawing function were not computed to compensate
for the biased prim::start values.

https://bugs.freedesktop.org/show_bug.cgi?id=104746
https://bugs.freedesktop.org/show_bug.cgi?id=104742
https://bugs.freedesktop.org/show_bug.cgi?id=104690
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Fixes: 8e4efdc895 ("vbo: optimize some display list drawing")
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
(cherry picked from commit 365a48abdd)
2018-01-26 19:53:01 +00:00
Dave Airlie
80ca933e68 radv: fix sample_mask_in loading. (v3.1)
This is ported from radeonsi and fixes:
dEQP-VK.pipeline.multisample_shader_builtin.sample_mask.bit_*

v2: don't call this path for radeonsi, it does it in the epilog.
use the radeonsi code path.
v3: handle NULL pCreateInfo->pMultisampleState properly (Samuel)
v3.1: set ps_iter_samples default to 1 (Bas)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: bdcbe7c76 (radv: add sample mask input support)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 766589d89a)
2018-01-26 19:53:01 +00:00
Dave Airlie
05e6e669bd radv: don't use hw resolves for r16g16 norm formats.
radeonsi has a workaround for this, but it uses a R16A16 format,
which vulkan doesn't have, we could probably come up with a work
around but for now just avoid hw resolves.

Fixes:
dEQP-VK.renderpass.suballocation.multisample.r16g16_*norm*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 2a04f5481d (radv/meta: select resolve paths)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit c727ea9370)
2018-01-26 19:53:01 +00:00
Dave Airlie
62803e022e radv: don't use hw resolve for integer image formats
From reading AMDVLK it currently never uses hw resolve paths.

This patch takes from radeonsi which doesn't use hw resolve
for integer formats, and does the same for radv.

This fixes:
dEQP-VK.renderpass.suballocation.multisample*uint tests.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 2a04f5481d (radv/meta: select resolve paths)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 4df414bbd2)
2018-01-26 19:53:01 +00:00
Dave Airlie
e76f0abed8 radv: add fs_key meta format support to resolve passes.
Some of the hw resolve passes need the SPI color format setup
correctly.

This fixes lots of 16-bit and 32-bit format tests in
dEQP-VK.renderpass.suballocation.multisample*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 316d762186)
2018-01-26 19:53:01 +00:00
Christoph Haag
eaf9500651 meson: remove lib prefix from libd3dadapter9.so
Fixes: 6b4c7047d5 ("meson: build gallium nine state_tracker")
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
(cherry picked from commit 4b4d929c27)
2018-01-26 19:53:01 +00:00
Eric Engestrom
3ca5ace19d radeon: remove left over dead code
Fixes: 4e0d99a635 "r100: Use shared debug code"
Cc: Pauli Nieminen <suokkos@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit eee8dd7c33)
2018-01-26 19:53:01 +00:00
Rafael Antognolli
e1ac54507e i965/gen10: Re-enable push constants.
The GPU hang caused by push constants is apparently fixed, so let's
enable them again.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit bcfd78e448)
2018-01-26 19:53:01 +00:00
Rafael Antognolli
dcdeb6a33e anv/gen10: Ignore push constant packets during context restore.
Similar to the GL driver, ignore 3DSTATE_CONSTANT_* packets when doing a
context restore.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 78c125af39)
2018-01-26 19:53:01 +00:00
Rafael Antognolli
8452d0f466 i965/gen10: Ignore push constant packets during context restore.
These packets were causing GPU hangs when the context was restored,
possibly because they were pointing to BO's that were already
unreferenced. So we tell the hardware to ignore such packets after the
batch buffer ends, since we know those BO's are not around anymore.

This change fixes GPU hangs on CNL. The (partial) solution to this
problem so far was to entirely disable push constants on this platform.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit ca19ee33d7)
2018-01-26 19:53:01 +00:00
Eleni Maria Stea
123a39cd6a mesa: Fix function pointers initialization in status tracker
We assigned the function that gets the device uuid to the GetDriverUuid
function pointer and the function that gets the driver uuid to the
GetDeviceUuid function pointer inside the state tracker. Exchanged the
pointers.

cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 8096b558a7)
2018-01-26 19:53:01 +00:00
Samuel Pitoiset
639d95e93f ac/nir: set amdgpu.uniform and invariant.load for UBOs
UBOs are constants buffers.

Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Fixes: 41c36c45 ("amd/common: use ac_build_buffer_load() for emitting UBO loads")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 49b0a140a7)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
70814af14f anv/pipeline: Don't look at blend state unless we have an attachment
Without this, we may end up dereferencing blend before we check for
binding->index != UINT32_MAX.  However, Vulkan allows the blend state to
be NULL so long as you don't have any color attachments.  This fixes a
segfault when running The Talos Principal.

Fixes: 12f4e00b69
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit c8949e2498)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
ca6942c672 i965/fs: Reset the register file to VGRF in lower_integer_multiplication
18fde36ced changed the way temporary
registers were allocated in lower_integer_multiplication so that we
allocate regs_written(inst) space and keep the stride of the original
destination register.  This was to ensure that any MUL which originally
followed the CHV/BXT integer multiply regioning restrictions would
continue to follow those restrictions even after lowering.  This works
fine except that I forgot to reset the register file to VGRF so, even
though they were assigned a number from alloc.allocate(), they had the
wrong register file.  This caused some GLES 3.0 CTS tests to start
failing on Sandy Bridge due to attempted reads from the MRF:

    ES3-CTS.functional.shaders.precision.int.highp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.int.mediump_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.int.lowp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.highp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.mediump_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.lowp_mul_fragment.snbm64

This commit remedies this problem by, instead of copying inst->dst and
overwriting nr, just make a new register and set the region to match
inst->dst.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103626
Fixes: 18fde36ced
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit db682b8f0e)
2018-01-26 19:53:01 +00:00
Chuck Atkins
9550852086 configure.ac: add missing llvm dependencies to .pc files
v2: Only add as dependencies for gallium-osmesa and gallium-xlib

CC: <mesa-stable@lists.freedesktop.org>
Signed-of-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6ac5e851f1)
2018-01-26 19:53:01 +00:00
George Kyriazis
2594045132 swr/rast: support llvm 3.9 type declarations
LLVM 3.9 was not taken into account in initial check-in.

Fixes: 01ab218bbc ("swr/rast: Initial work for debugging support.")
cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104749
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit 0e879aad2f)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
b62cefdef8 i965/draw: Set NEW_AUX_STATE when draw aux changes
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383
Fixes: ea0d2e98ec
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 20f70ae385)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
521d5b4dcc i965: Replace draw_aux_buffer_disabled with draw_aux_usage
Instead of keeping an array of booleans, we now hang onto an array of
isl_aux_usage enums.  This means that the thing we are passing from
brw_draw.c to surface state setup is the thing that surface state setup
actually needs instead of an input to compute what it needs.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit e52a9f18d6)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
85c18bb410 i965/surface_state: Drop brw_aux_surface_disabled
The only purpose of this function is to disable aux on texture surfaces
when the corresponding renderbuffer has aux disabled.  However, the act
of disabling aux on the renderbuffer will cause it to be resolved and
intel_miptree_texture_aux_usage will already check the resolved status
of a texture and return ISL_AUX_USAGE_NONE for it.  Even if we used CCS
for it, that wouldn't really be a problem because the CCS will be in the
pass-through state and so it would effectively be ignored.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 468ea3cc45)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
d2e9fe8351 i965/miptree: Add an aux_disabled parameter to render_aux_usage
Only one of the callers of intel_miptree_render_aux_usage actually took
brw->draw_aux_buffer_disabled into account.  This was causing us to
ignore draw_aux_buffer_disabled for the intel_miptree_prepare_render.
This isn't a problem because the draw_aux_buffer_disabled entry was set
during texture preparation and we already did the resolve at that time.
However, this also meant that the aux_usage we were passing to
brw_cache_flush_for_render and brw_render_cache_add_bo was wrong so our
automatic cache flushing around aux_usage changes wasn't happening.
This was causing GPU hangs in Oxenfree.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104711
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383
Fixes: ea0d2e98ec
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit d38ec24f53)
2018-01-26 19:53:01 +00:00
Jason Ekstrand
a6f4d96a1a i965/miptree: Take an aux_usage in prepare/finish_render
Both callers of intel_miptree_prepare/finish_render have to call
intel_miptree_render_aux_usage anyway for other reasons.  They may as
well pass the result in instead of us calling it again.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit dfe0217905)
2018-01-26 19:53:01 +00:00
Greg V
658e9e442c meson: fix BSD build
CC: 18.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit c38c60a63c)
2018-01-26 19:53:01 +00:00
Marek Olšák
48510dccc4 radeonsi: don't ignore pitch for imported textures
Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 022c5b22fe)
2018-01-26 19:53:00 +00:00
Topi Pohjolainen
f6f43e6a4c i965: Don't try to disable render aux buffers for compute
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104546
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit ec4bb693a0)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
90b00bf766 anv/cmd_buffer: Move gen7 index buffer state to graphics state
Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4064fe59e7)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
19b3e2b781 anv/cmd_buffer: Move num_workgroups to compute state
While we're here, make it an anv_address.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 38ec78049f)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
81a740b941 anv/cmd_buffer: Move dynamic state to graphics state
Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 95ff232294)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
f310f42ed3 anv/cmd_buffer: Use a temporary variable for dynamic state
We were already doing this for some packets to keep the lines shorter.
We may as well just do it for all of them.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 24caee8975)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
8c93db854c anv/cmd_buffer: Move vb_dirty bits into anv_cmd_graphics_state
Vertex buffers are entirely a graphics pipeline thing.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 8bd5ec5b86)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
76e7324b79 anv/cmd_buffer: Move dirty bits into anv_cmd_*_state
Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e85aaec148)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
66d17b545f anv: Separate compute and graphics descriptor sets
The Vulkan spec says:

    "pipelineBindPoint is a VkPipelineBindPoint indicating whether the
    descriptors will be used by graphics pipelines or compute pipelines.
    There is a separate set of bind points for each of graphics and
    compute, so binding one does not disturb the other."

Up until now, we've been ignoring the pipeline bind point and had just
one bind point for everything.  This commit separates things out into
separate bind points.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102897
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 97f96610c8)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
144a300204 anv/cmd_buffer: Use anv_descriptor_for_binding for samplers
Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 31b2144c83)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
2dec9ce687 anv/cmd_buffer: Add a helper for binding descriptor sets
This lets us unify some code between push descriptors and regular
descriptors.  It doesn't do much for us yet but it will.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b9e1ca16f8)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
bde35c09de anv/cmd_buffer: Refactor ensure_push_descriptor_set
It's now a function which returns the push descriptor set.  Since we set
the error on the command buffer, returning the error is a little
redundant.  Returning the descriptor set (or NULL on error) is more
convenient.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 90cceaa9dd)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
064fbf7180 anv: Remove semicolons from vk_error[f] definitions
With the semicolons, they can't be used in a function argument without
throwing syntax errors.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d5592e2fda)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
cb5abcd715 anv/cmd_buffer: Add substructs to anv_cmd_state for graphics and compute
Initially, these just contain the pipeline in a base struct.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 9af5379228)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
f0a1c2c69e anv/cmd_buffer: Use some pre-existing pipeline temporaries
There are several places where we'd already saved the pipeline off to a
temporary variable but, due to an artifact of history, weren't actually
using that temporary everywhere.  No functional change.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit ddc2d28548)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
3c85e8c8e3 anv/cmd_buffer: Rework anv_cmd_state_reset
This splits anv_cmd_state_reset into separate init and finish functions.
This lets us share init code with cmd_buffer_create.  This potentially
fixes subtle bugs where we may have missed some bit of state that needs
to get initialized on command buffer creation.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit cd3feea745)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
2ecc2f85fe anv/cmd_buffer: Get rid of the meta query workaround
Meta has been gone for a long time.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d6c9a89d13)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
f4f0838d31 anv/cmd_state: Drop the scratch_size field
This is a legacy left-over from the mechanism we used to use to handle
scratch.  The new (and better) mechanism doesn't use this.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit bc0a21e348)
2018-01-26 19:53:00 +00:00
Jason Ekstrand
44b15816bb anv/pipeline: Don't assert on more than 32 samplers
This prevents an assert when running one unreleased Vulkan game.

Tested-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4b69ba3817)
2018-01-26 19:53:00 +00:00
Marc Dietrich
4d0b43117d meson: fix some defines misspelled errors in meson.build
Defines
- HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL
- HAVE_FUNC_ATTRIBUTE_VISIBILITY
were misspelled.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 911ca587f8)
2018-01-26 19:53:00 +00:00
Emil Velikov
99a48002a2 Update version to 18.0.0-rc2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-23 18:07:37 +00:00
Emil Velikov
e91e68d6a8 Update version to 18.0.0-rc1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-23 16:39:33 +00:00
Emil Velikov
a9db8ac935 automake: small cleanup after the meson.build inclusion
Namely extend the EXTRA_DIST list, instead of re-assigning it and bring
back a file dropped by mistake.

Fixes: 436ed65d38 ("autotools: include meson build files in tarball")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-23 14:25:34 +00:00
Emil Velikov
41e48eac87 automake: anv: ship anv_extensions_gen.py in the tarball
Fixes: dd088d4bec ("anv/extensions: Generate a header file with
extension tables")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-23 14:25:34 +00:00
Emil Velikov
90002ba41e automake: vc5: remove non-applicable v3dx_simulator.h
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-23 14:25:32 +00:00
2197 changed files with 96581 additions and 189741 deletions

View File

@@ -148,8 +148,6 @@ Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@collabora.com>
Eric Anholt <eric@anholt.net> Eric Anholt <anholt@FreeBSD.org>
Eric Engestrom <eric@engestrom.ch> <eric.engestrom@imgtec.com>
Eugeni Dodonov <eugeni.dodonov@intel.com> <eugeni@mandriva.com>
Fabian Bieler <der.fabe@gmx.net> <fabianbieler@fastmail.fm>

View File

@@ -17,14 +17,12 @@ env:
- DRI2PROTO_VERSION=dri2proto-2.8
- LIBPCIACCESS_VERSION=libpciaccess-0.13.4
- LIBDRM_VERSION=libdrm-2.4.74
- XCBPROTO_VERSION=xcb-proto-1.13
- RANDRPROTO_VERSION=randrproto-1.3.0
- LIBXRANDR_VERSION=libXrandr-1.3.0
- LIBXCB_VERSION=libxcb-1.13
- XCBPROTO_VERSION=xcb-proto-1.11
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LIBVDPAU_VERSION=libvdpau-1.1
- LIBVA_VERSION=libva-1.7.0
- LIBWAYLAND_VERSION=wayland-1.15.0
- LIBVA_VERSION=libva-1.6.2
- LIBWAYLAND_VERSION=wayland-1.11.1
- WAYLAND_PROTOCOLS_VERSION=wayland-protocols-1.8
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig:$HOME/prefix/share/pkgconfig
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
@@ -35,18 +33,18 @@ matrix:
- env:
- LABEL="meson Vulkan"
- BUILD=meson
- MESON_OPTIONS="-Ddri-drivers=[] -Dgallium-drivers=[]"
- LLVM_VERSION=5.0
- MESON_OPTIONS="-Ddri-drivers= -Dgallium-drivers="
- LLVM_VERSION=4.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
addons:
apt:
sources:
- llvm-toolchain-trusty-5.0
- llvm-toolchain-trusty-4.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-5.0-dev
- llvm-4.0-dev
# Common
- xz-utils
- libexpat1-dev
@@ -55,7 +53,7 @@ matrix:
- env:
- LABEL="meson loaders/classic DRI"
- BUILD=meson
- MESON_OPTIONS="-Dvulkan-drivers=[] -Dgallium-drivers=[]"
- MESON_OPTIONS="-Dvulkan-drivers= -Dgallium-drivers="
addons:
apt:
packages:
@@ -94,10 +92,12 @@ matrix:
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=5.0
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC="gcc-4.8"
- OVERRIDE_CXX="g++-4.8"
# New binutils linker is required for llvm-3.9
- OVERRIDE_PATH=/usr/lib/binutils-2.26/bin
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
@@ -107,41 +107,13 @@ matrix:
addons:
apt:
sources:
- llvm-toolchain-trusty-5.0
- llvm-toolchain-trusty-3.9
packages:
- binutils-2.26
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-5.0-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- env:
- LABEL="make Gallium Drivers RadeonSI"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=5.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="radeonsi"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
apt:
sources:
- llvm-toolchain-trusty-5.0
packages:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-5.0-dev
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
@@ -161,7 +133,7 @@ matrix:
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="i915,nouveau,pl111,r300,r600,freedreno,svga,swrast,v3d,vc4,virgl,etnaviv,imx"
- GALLIUM_DRIVERS="i915,nouveau,pl111,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
@@ -196,7 +168,7 @@ matrix:
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="r600"
- GALLIUM_DRIVERS="r600,radeonsi"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
@@ -233,7 +205,7 @@ matrix:
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="r600"
- GALLIUM_DRIVERS="r600,radeonsi"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
@@ -292,39 +264,6 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- env:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover LLVM-6.0"
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=6.0
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd --enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
- GALLIUM_DRIVERS="r600,radeonsi"
- VULKAN_DRIVERS=""
- LIBUNWIND_FLAGS="--enable-libunwind"
addons:
apt:
sources:
- llvm-toolchain-trusty-6.0
# llvm-6 depends on gcc-4.9 which is not in main repo
- ubuntu-toolchain-r-test
packages:
- libclc-dev
# From sources above
- llvm-6.0-dev
- clang-6.0
- libclang-6.0-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
- libunwind8-dev
- env:
- LABEL="make Gallium ST Other"
- BUILD=make
@@ -366,8 +305,10 @@ matrix:
- BUILD=make
- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel check"
- LLVM_VERSION=5.0
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# New binutils linker is required for llvm-3.9
- OVERRIDE_PATH=/usr/lib/binutils-2.26/bin
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl --with-platforms=x11,wayland"
- DRI_DRIVERS=""
- GALLIUM_ST="--enable-dri --enable-dri3 --disable-opencl --disable-xa --disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx-bellagio --disable-gallium-osmesa"
@@ -377,12 +318,13 @@ matrix:
addons:
apt:
sources:
- llvm-toolchain-trusty-5.0
- llvm-toolchain-trusty-3.9
packages:
- binutils-2.26
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-5.0-dev
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
@@ -400,6 +342,7 @@ matrix:
addons:
apt:
packages:
- scons
# Common
- xz-utils
- x11proto-xf86vidmode-dev
@@ -418,6 +361,7 @@ matrix:
addons:
apt:
packages:
- scons
# LLVM packaging is broken and misses these dependencies
- libedit-dev
- llvm-3.3-dev
@@ -432,7 +376,7 @@ matrix:
- BUILD=scons
- SCONSFLAGS="-j4"
- SCONS_TARGET="swr=1"
- LLVM_VERSION=5.0
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# Keep it symmetrical to the make build. There's no actual SWR, yet.
- SCONS_CHECK_COMMAND="true"
@@ -441,12 +385,13 @@ matrix:
addons:
apt:
sources:
- llvm-toolchain-trusty-5.0
- llvm-toolchain-trusty-3.9
packages:
- scons
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# From sources above
- llvm-5.0-dev
- llvm-3.9-dev
# Common
- xz-utils
- x11proto-xf86vidmode-dev
@@ -460,11 +405,6 @@ matrix:
- MAKE_CHECK_COMMAND="make check"
- DRI_LOADERS="--with-platforms=x11 --disable-egl"
os: osx
- env:
- LABEL="macOS meson"
- BUILD=meson
- MESON_OPTIONS="-Degl=false"
os: osx
before_install:
- |
@@ -499,11 +439,6 @@ install:
pip3 install --user "meson<0.45.0";
fi
# Install a more modern scons from pip.
- if test "x$BUILD" = xscons; then
pip2 install --user "scons>=2.4";
fi
# Since libdrm gets updated in configure.ac regularly, try to pick up the
# latest version from there.
- for line in `grep "^LIBDRM.*_REQUIRED=" configure.ac`; do
@@ -547,14 +482,6 @@ install:
tar -jxvf $LIBDRM_VERSION.tar.bz2
(cd $LIBDRM_VERSION && ./configure --prefix=$HOME/prefix --enable-vc4 --enable-freedreno --enable-etnaviv-experimental-api && make install)
wget $XORG_RELEASES/proto/$RANDRPROTO_VERSION.tar.bz2
tar -jxvf $RANDRPROTO_VERSION.tar.bz2
(cd $RANDRPROTO_VERSION && ./configure --prefix=$HOME/prefix && make install)
wget $XORG_RELEASES/lib/$LIBXRANDR_VERSION.tar.bz2
tar -jxvf $LIBXRANDR_VERSION.tar.bz2
(cd $LIBXRANDR_VERSION && ./configure --prefix=$HOME/prefix && make install)
wget $XORG_RELEASES/lib/$LIBXSHMFENCE_VERSION.tar.bz2
tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
(cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make install)
@@ -586,34 +513,13 @@ install:
"#ifndef _LINUX_MEMFD_H" \
"#define _LINUX_MEMFD_H" \
"" \
"#define __NR_memfd_create 319" \
"#define SYS_memfd_create __NR_memfd_create" \
"" \
"#define MFD_CLOEXEC 0x0001U" \
"#define MFD_ALLOW_SEALING 0x0002U" \
"" \
"#endif /* _LINUX_MEMFD_H */" > linux/memfd.h
# Generate this header, including the missing SYS_memfd_create
# macro, which is not provided by the header in the Travis
# instance
mkdir -p sys
printf "%s\n" \
"#ifndef _SYSCALL_H" \
"#define _SYSCALL_H 1" \
"" \
"#include <asm/unistd.h>" \
"" \
"#ifndef _LIBC" \
"# include <bits/syscall.h>" \
"#endif" \
"" \
"#ifndef __NR_memfd_create" \
"# define __NR_memfd_create 319 /* Taken from <asm/unistd_64.h> */" \
"#endif" \
"" \
"#ifndef SYS_memfd_create" \
"# define SYS_memfd_create __NR_memfd_create" \
"#endif" \
"" \
"#endif" > sys/syscall.h
fi
script:
@@ -624,9 +530,7 @@ script:
export CFLAGS="$CFLAGS -isystem`pwd`";
mkdir build &&
cd build &&
../autogen.sh --enable-debug
./autogen.sh --enable-debug
$LIBUNWIND_FLAGS
$DRI_LOADERS
--with-dri-drivers=$DRI_DRIVERS

View File

@@ -52,7 +52,6 @@ LOCAL_CFLAGS += \
-DHAVE___BUILTIN_EXPECT \
-DHAVE___BUILTIN_FFS \
-DHAVE___BUILTIN_FFSLL \
-DHAVE_DLFCN_H \
-DHAVE_FUNC_ATTRIBUTE_FLATTEN \
-DHAVE_FUNC_ATTRIBUTE_UNUSED \
-DHAVE_FUNC_ATTRIBUTE_FORMAT \
@@ -74,7 +73,6 @@ LOCAL_CFLAGS += \
-DHAVE_ENDIAN_H \
-DHAVE_ZLIB \
-DMAJOR_IN_SYSMACROS \
-DVK_USE_PLATFORM_ANDROID_KHR \
-fvisibility=hidden \
-Wno-sign-compare

View File

@@ -45,7 +45,7 @@ AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-libunwind \
--with-platforms=x11,wayland,drm,surfaceless \
--with-dri-drivers=i915,i965,nouveau,radeon,r200,swrast \
--with-gallium-drivers=i915,nouveau,r300,pl111,r600,radeonsi,freedreno,svga,swrast,vc4,tegra,virgl,swr,etnaviv,imx \
--with-gallium-drivers=i915,nouveau,r300,pl111,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr,etnaviv,imx \
--with-vulkan-drivers=intel,radeon
ACLOCAL_AMFLAGS = -I m4
@@ -76,15 +76,12 @@ noinst_HEADERS = \
include/drm-uapi/drm_fourcc.h \
include/drm-uapi/drm_mode.h \
include/drm-uapi/i915_drm.h \
include/drm-uapi/tegra_drm.h \
include/drm-uapi/v3d_drm.h \
include/drm-uapi/vc4_drm.h \
include/D3D9 \
include/GL/wglext.h \
include/HaikuGL \
include/no_extern_c.h \
include/pci_ids \
include/vulkan
include/pci_ids
# We list some directories in EXTRA_DIST, but don't actually want to include
# the .gitignore files in the tarball.

View File

@@ -1,79 +0,0 @@
`Mesa <https://mesa3d.org>`_ - The 3D Graphics Library
======================================================
Source
------
This repository lives at https://gitlab.freedesktop.org/mesa/mesa.
Other repositories are likely forks, and code found there is not supported.
Build status
------------
Travis:
.. image:: https://travis-ci.org/mesa3d/mesa.svg?branch=master
:target: https://travis-ci.org/mesa3d/mesa
Appveyor:
.. image:: https://img.shields.io/appveyor/ci/mesa3d/mesa.svg
:target: https://ci.appveyor.com/project/mesa3d/mesa
Coverity:
.. image:: https://scan.coverity.com/projects/139/badge.svg?flat=1
:target: https://scan.coverity.com/projects/mesa
Build & install
---------------
You can find more information in our documentation (`docs/install.html
<https://mesa3d.org/install.html>`_), but the recommended way is to use
Meson (`docs/meson.html <https://mesa3d.org/meson.html>`_):
.. code-block:: sh
$ mkdir build
$ cd build
$ meson ..
$ sudo ninja install
Support
-------
Many Mesa devs hang on IRC; if you're not sure which channel is
appropriate, you should ask your question on `Freenode's #dri-devel
<irc://chat.freenode.net#dri-devel>`_, someone will redirect you if
necessary.
Remember that not everyone is in the same timezone as you, so it might
take a while before someone qualified sees your question.
To figure out who you're talking to, or which nick to ping for your
question, check out `Who's Who on IRC
<https://dri.freedesktop.org/wiki/WhosWho/>`_.
The next best option is to ask your question in an email to the
mailing lists: `mesa-dev\@lists.freedesktop.org
<https://lists.freedesktop.org/mailman/listinfo/mesa-dev>`_
Bug reports
-----------
If you think something isn't working properly, please file a bug report
(`docs/bugs.html <https://mesa3d.org/bugs.html>`_).
Contributing
------------
Contributions are welcome, and step-by-step instructions can be found in our
documentation (`docs/submittingpatches.html
<https://mesa3d.org/submittingpatches.html>`_).
Note that Mesa uses email mailing-lists for patches submission, review and
discussions.

View File

@@ -116,7 +116,6 @@ MESON BUILD
R: Dylan Baker <dylan@pnwbakers.com>
R: Eric Engestrom <eric@engestrom.ch>
F: */meson.build
F: meson.build
F: meson_options.txt
ANDROID EGL SUPPORT

View File

@@ -27,12 +27,6 @@ import SCons.Util
import common
#######################################################################
# Minimal scons version
EnsureSConsVersion(2, 4)
#######################################################################
# Configuration options

View File

@@ -1 +1 @@
18.2.0-rc2
18.0.5

View File

@@ -35,13 +35,13 @@ clone_depth: 100
cache:
- win_flex_bison-2.5.9.zip
- llvm-5.0.1-msvc2015-mtd.7z
- llvm-3.3.1-msvc2013-mtd.7z
os: Visual Studio 2015
os: Visual Studio 2013
environment:
WINFLEXBISON_ARCHIVE: win_flex_bison-2.5.9.zip
LLVM_ARCHIVE: llvm-5.0.1-msvc2015-mtd.7z
LLVM_ARCHIVE: llvm-3.3.1-msvc2013-mtd.7z
install:
# Check pip
@@ -69,10 +69,10 @@ install:
- set LLVM=%CD%\llvm
build_script:
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.0 llvm=1
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=12.0 llvm=1
after_build:
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=14.0 llvm=1 check
- scons -j%NUMBER_OF_PROCESSORS% MSVC_VERSION=12.0 llvm=1 check
# It's possible to setup notification here, as described in

90
bin/.cherry-ignore Normal file
View File

@@ -0,0 +1,90 @@
# fixes: The following commits were applied without the "cherry-picked from" tag
50265cd9ee4caffee853700bdcd75b92eedc0e7b automake: anv: ship anv_extensions_gen.py in the tarball
ac4437b20b87c7285b89466f05b51518ae616873 automake: small cleanup after the meson.build inclusion
# stable: The KHX extension is disabled all together in the stable branches.
2ffe395cba0f7b3c1f1c41062f4376eae3a188b5 radv: Don't expose VK_KHX_multiview on android.
# stable: There is a specific version for this patch for stable branches, but
# it is causing regressions.
85d0bec9616bc1ffa8e4ab5e7c5d12ff4e414872 anv: Be more careful about fast-clear colors
# fixes: The commit fixes earlier commit 1c57a6da5e3 which did not land in
# branch.
3401b028df1074a06a7fbc3fb1cda949646ef75d ac/shader: fix vertex input with components.
# fixes: The commit requires earlier commits 639c4f2b54a6 and 2cfba40eea4c
# which did not land in branch.
8f052a3e257a61240cb311032497d016278117a8 radv: handle exporting view index to fragment shader. (v1.1)
# fixes: The commit fixes earlier commits 83d4a5d5aea5a8a05be2,
# b2f2236dc565dd1460f0 and c62cf1f165919bc74296 which did not land in
# branch.
880c1718b6d14b33fe5ba918af70fea5be890c6b omx: always define ENABLE_ST_OMX_{BELLAGIO,TIZONIA}
# stable: There is a specific port for this patch for stable branch.
d15fb766aa3c98ffbe16d050b2af4804e4b12c57 radeonsi/gfx9: fix a hang with an empty first IB
# stable: Explicit 18.1 only nominations
0e945fdf23bac5a62c15edfcbfd9d6ac4eee592f nir: Do not use progress for unreachable code in return lowering.
84fef802fb16cef68ec358cbfed1cac9c3bfa410 ac/nir: add missing round_slice for 1D arrays
d136a5fad9c7e67c1362453388914ecc60420883 ac: fix the number of coordinates for ac_image_get_lod and arrays
# stable: There is a specific port for this patch for stable branch.
fedd0a4215bcd387525000d76b77993ca38916ae radv/winsys: allow to submit up to 4 IBs for chips without chaining
# stable: Explicit 18.1 only nominations
413c5ca3727898fdb4fa1d2849d0c2defdd77b48 travis: update libva required version
a6fbefa67b5b0ed1ee42a9034ee74dfaed1c389a radv: fix DCC enablement since partial MSAA implementation
d7ffe3b384f4d1c15a9364768cf405d416522e60 radv: set ac_surf_info::num_channels correctly
d38425ce872c4a00cfb691ae9dceca6a07afc516 ac: fix texture query LOD for 1D textures on GFX9
4d449c94e450c33d7b2b09c1c263322042503893 autotools, meson: bump up required VA version
# stable: Explicit 18.1 only nominations
9267ff9883f749dd1708c573c0df4b46687ff973 radv: Allow vkEnumerateInstanceVersion ProcAddr without instance.
467c562a292b4424f24381932b90bcb9869c3d73 radv: Don't check the incoming apiVersion on CreateInstance.
b17cfb08a3fc9a599eff64fffe48daba398a672f vulkan/wsi: Only use LINEAR modifier for prime if supported.
597b9e881083533b987dbcbb8f679ca1eefff974 radeonsi/gfx9: work around a GPU hang due to broken indirect indexing in LLVM
62f50df7b79c273a0eb9bf769eded76933bddc3a radv: Fix multiview queries.
# stable: The commit requires earlier commit ba79a90fb52 which did not land in
# branch.
901db25d5b7cd2ac2dd648b370c4bddf23dd5c44 glsl: change ast_type_qualifier bitset size to work around GCC 5.4 bug
# stable: The commit fixes earlier commit d5f42f96e16 which did not land in
# branch.
d07466fe18522cde1acadfc597583f80b69c15b7 mesa: fix glGetInteger/Float/etc queries for vertex arrays attribs
# stable: The commit fixes earlier commit d07466fe18522 which did not land in
# branch.
e4211b36bba4acde3e56ce1e22b12759e820a241 mesa: revert GL_[SECONDARY_]COLOR_ARRAY_SIZE glGet type to TYPE_INT
# stable: The commit requires earlier commits ab0e625a671 and 62510846b6e which
# did not land in branch.
b16fc6cda11576a4dd6c8d95f7bee94121c4b8e7 radv/resolve: do fmask decompress on all layers.
# stable: There is a specific port for this patch for stable branch.
3d4d388e3929d7948b62d90867357aecbfba5aeb radv: Fix up 2_10_10_10 alpha sign.
# stable: The commit requires earlier commit af4e9295fe which did not land in
# branch.
816f2dc67da72be8993e724aeda4c2ec2f5a2978 i965/miptree: Fix handling of uninitialized MCS buffers
# stable: Explicit 18.1 only nominations
549e54270ba3a519b46a1fbffa4aa6b628a052d3 radv: fix VK_EXT_descriptor_indexing
# fixes: The commit fixes earlier commits 19a91841c3 and 9987a072cb which did
# not land in branch.
d89f58a6b8436b59dcf3b896c0ccddabed3f78fd mesa/st: handle vert_attrib_mask in nir case too
# stable: Tegra support is not part of the current branch
bd3e97e5aad7800b8e17ed10d34a070926691945 tegra: Remove usage of non-stable UAPI
9603d81df05105857b676f20dff964ef3ab0ecff tegra: Fix scanout resources without modifiers
9e539012dfaa848fc4cfde83c3f3a83fee274ca4 tegra: Treat resources with modifiers as scanout
# stable: The commit requires earlier commit 19a91841c3 which did not land in
# branch.
a7d0c53ab89ca86b705014925214101f5bc4187f st/mesa: fix assertion failures with GL_UNSIGNED_INT64_ARB (v2)
# stable: Explicit 18.1 only nomination
30918b77ac82ba1da7764c0375233656e0ebf9f9 nv30: ensure that displayable formats are marked accordingly

View File

@@ -23,7 +23,7 @@ echo "<ul>"
echo ""
# extract fdo urls from commit log
git log --pretty=medium $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before | sort -n -u | sed -e $use_after |\
git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e $trim_before | sort -n -u | sed -e $use_after |\
while read url
do
id=$(echo $url | cut -d'=' -f2)

View File

@@ -16,7 +16,7 @@ latest_branchpoint=`git merge-base origin/master HEAD`
git log --reverse --pretty=%H $latest_branchpoint > already_landed
# ... and the ones cherry-picked.
git log --reverse --pretty=medium --grep="cherry picked from commit" $latest_branchpoint..HEAD |\
git log --reverse --grep="cherry picked from commit" $latest_branchpoint..HEAD |\
grep "cherry picked from commit" |\
sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked
@@ -38,7 +38,7 @@ do
# Place every "fixes:" tag on its own line and join with the next word
# on its line or a later one.
fixes=`git show --pretty=medium -s $sha | tr -d "\n" | sed -e 's/fixes:[[:space:]]*/\nfixes:/Ig' | grep "fixes:" | sed -e 's/\(fixes:[a-zA-Z0-9]*\).*$/\1/'`
fixes=`git show -s $sha | tr -d "\n" | sed -e 's/fixes:[[:space:]]*/\nfixes:/Ig' | grep "fixes:" | sed -e 's/\(fixes:[a-zA-Z0-9]*\).*$/\1/'`
# For each one try to extract the tag
fixes_count=`echo "$fixes" | wc -l`

View File

@@ -12,7 +12,7 @@
latest_branchpoint=`git merge-base origin/master HEAD`
# Grep for commits with "cherry picked from commit" in the commit message.
git log --reverse --pretty=medium --grep="cherry picked from commit" $latest_branchpoint..HEAD |\
git log --reverse --grep="cherry picked from commit" $latest_branchpoint..HEAD |\
grep "cherry picked from commit" |\
sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked

View File

@@ -43,28 +43,26 @@ def main():
master = os.path.join(to, os.path.basename(args.megadriver))
if not os.path.exists(to):
if os.path.lexists(to):
os.unlink(to)
os.makedirs(to)
shutil.copy(args.megadriver, master)
for driver in args.drivers:
abs_driver = os.path.join(to, driver)
for each in args.drivers:
driver = os.path.join(to, each)
if os.path.lexists(abs_driver):
os.unlink(abs_driver)
print('installing {} to {}'.format(args.megadriver, abs_driver))
os.link(master, abs_driver)
if os.path.exists(driver):
os.unlink(driver)
print('installing {} to {}'.format(args.megadriver, driver))
os.link(master, driver)
try:
ret = os.getcwd()
os.chdir(to)
name, ext = os.path.splitext(driver)
name, ext = os.path.splitext(each)
while ext != '.so':
if os.path.lexists(name):
if os.path.exists(name):
os.unlink(name)
os.symlink(driver, name)
os.symlink(each, name)
name, ext = os.path.splitext(name)
finally:
os.chdir(ret)

View File

@@ -74,29 +74,24 @@ AC_SUBST([OPENCL_VERSION])
# in the first entry.
LIBDRM_REQUIRED=2.4.75
LIBDRM_RADEON_REQUIRED=2.4.71
LIBDRM_AMDGPU_REQUIRED=2.4.91
LIBDRM_AMDGPU_REQUIRED=2.4.89
LIBDRM_INTEL_REQUIRED=2.4.75
LIBDRM_NVVIEUX_REQUIRED=2.4.66
LIBDRM_NOUVEAU_REQUIRED=2.4.66
LIBDRM_FREEDRENO_REQUIRED=2.4.92
LIBDRM_ETNAVIV_REQUIRED=2.4.89
LIBDRM_VC4_REQUIRED=2.4.89
LIBDRM_FREEDRENO_REQUIRED=2.4.89
LIBDRM_ETNAVIV_REQUIRED=2.4.82
dnl Versions for external dependencies
DRI2PROTO_REQUIRED=2.8
GLPROTO_REQUIRED=1.4.14
LIBOMXIL_BELLAGIO_REQUIRED=0.0
LIBOMXIL_TIZONIA_REQUIRED=0.10.0
LIBVA_REQUIRED=0.39.0
LIBVA_REQUIRED=0.38.0
VDPAU_REQUIRED=1.1
WAYLAND_REQUIRED=1.11
WAYLAND_EGL_BACKEND_REQUIRED=3
WAYLAND_PROTOCOLS_REQUIRED=1.8
XCB_REQUIRED=1.9.3
XCBDRI2_REQUIRED=1.8
XCBDRI3_MODIFIERS_REQUIRED=1.13
XCBGLX_REQUIRED=1.8.1
XCBPRESENT_MODIFIERS_REQUIRED=1.13
XDAMAGE_REQUIRED=1.1
XSHMFENCE_REQUIRED=1.1
XVMC_REQUIRED=1.0.6
@@ -108,9 +103,9 @@ dnl LLVM versions
LLVM_REQUIRED_GALLIUM=3.3.0
LLVM_REQUIRED_OPENCL=3.9.0
LLVM_REQUIRED_R600=3.9.0
LLVM_REQUIRED_RADEONSI=5.0.0
LLVM_REQUIRED_RADV=5.0.0
LLVM_REQUIRED_SWR=5.0.0
LLVM_REQUIRED_RADEONSI=3.9.0
LLVM_REQUIRED_RADV=3.9.0
LLVM_REQUIRED_SWR=3.9.0
dnl Check for progs
AC_PROG_CPP
@@ -121,8 +116,6 @@ dnl other CC/CXX flags related help
AC_ARG_VAR([CXX11_CXXFLAGS], [Compiler flag to enable C++11 support (only needed if not
enabled by default and different from -std=c++11)])
AM_PROG_CC_C_O
AC_PROG_GREP
AC_PROG_NM
AM_PROG_AS
AX_CHECK_GNU_MAKE
AC_CHECK_PROGS([PYTHON2], [python2.7 python2 python])
@@ -302,10 +295,7 @@ AX_CHECK_COMPILE_FLAG([-Wall], [CFLAGS="$CFLAGS
AX_CHECK_COMPILE_FLAG([-Werror=implicit-function-declaration], [CFLAGS="$CFLAGS -Werror=implicit-function-declaration"])
AX_CHECK_COMPILE_FLAG([-Werror=missing-prototypes], [CFLAGS="$CFLAGS -Werror=missing-prototypes"])
AX_CHECK_COMPILE_FLAG([-Wmissing-prototypes], [CFLAGS="$CFLAGS -Wmissing-prototypes"])
dnl Dylan Baker: gcc and clang always accepr -Wno-*, hence check for the original warning, then set the no-* flag
AX_CHECK_COMPILE_FLAG([-Wmissing-field-initializers], [CFLAGS="$CFLAGS -Wno-missing-field-initializers"])
AX_CHECK_COMPILE_FLAG([-fno-math-errno], [CFLAGS="$CFLAGS -fno-math-errno"])
AX_CHECK_COMPILE_FLAG([-fno-trapping-math], [CFLAGS="$CFLAGS -fno-trapping-math"])
AX_CHECK_COMPILE_FLAG([-fvisibility=hidden], [VISIBILITY_CFLAGS="-fvisibility=hidden"])
@@ -317,7 +307,6 @@ AX_CHECK_COMPILE_FLAG([-Wall], [CXXFLAGS="$CXXFL
AX_CHECK_COMPILE_FLAG([-fno-math-errno], [CXXFLAGS="$CXXFLAGS -fno-math-errno"])
AX_CHECK_COMPILE_FLAG([-fno-trapping-math], [CXXFLAGS="$CXXFLAGS -fno-trapping-math"])
AX_CHECK_COMPILE_FLAG([-fvisibility=hidden], [VISIBILITY_CXXFLAGS="-fvisibility=hidden"])
AX_CHECK_COMPILE_FLAG([-Wmissing-field-initializers], [CXXFLAGS="$CXXFLAGS -Wno-missing-field-initializers"])
AC_LANG_POP([C++])
# Flags to help ensure that certain portions of the code -- and only those
@@ -440,41 +429,28 @@ fi
AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1])
AC_SUBST([SSE41_CFLAGS], $SSE41_CFLAGS)
dnl Check for new-style atomic builtins. We first check without linking to
dnl -latomic.
AC_MSG_CHECKING(whether __atomic_load_n is supported)
AC_LINK_IFELSE([AC_LANG_SOURCE([[
#include <stdint.h>
dnl Check for new-style atomic builtins
AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
int main() {
struct {
uint64_t *v;
} x;
return (int)__atomic_load_n(x.v, __ATOMIC_ACQUIRE) &
(int)__atomic_add_fetch(x.v, (uint64_t)1, __ATOMIC_ACQ_REL);
}]])], GCC_ATOMIC_BUILTINS_SUPPORTED=yes, GCC_ATOMIC_BUILTINS_SUPPORTED=no)
dnl If that didn't work, we try linking with -latomic, which is needed on some
dnl platforms.
if test "x$GCC_ATOMIC_BUILTINS_SUPPORTED" != xyes; then
save_LDFLAGS=$LDFLAGS
LDFLAGS="$LDFLAGS -latomic"
AC_LINK_IFELSE([AC_LANG_SOURCE([[
#include <stdint.h>
int main() {
struct {
uint64_t *v;
} x;
return (int)__atomic_load_n(x.v, __ATOMIC_ACQUIRE) &
(int)__atomic_add_fetch(x.v, (uint64_t)1, __ATOMIC_ACQ_REL);
}]])], GCC_ATOMIC_BUILTINS_SUPPORTED=yes LIBATOMIC_LIBS="-latomic",
GCC_ATOMIC_BUILTINS_SUPPORTED=no)
LDFLAGS=$save_LDFLAGS
fi
AC_MSG_RESULT($GCC_ATOMIC_BUILTINS_SUPPORTED)
if test "x$GCC_ATOMIC_BUILTINS_SUPPORTED" = xyes; then
int n;
return __atomic_load_n(&n, __ATOMIC_ACQUIRE);
}]])], GCC_ATOMIC_BUILTINS_SUPPORTED=1)
if test "x$GCC_ATOMIC_BUILTINS_SUPPORTED" = x1; then
DEFINES="$DEFINES -DUSE_GCC_ATOMIC_BUILTINS"
dnl On some platforms, new-style atomics need a helper library
AC_MSG_CHECKING(whether -latomic is needed)
AC_LINK_IFELSE([AC_LANG_SOURCE([[
#include <stdint.h>
uint64_t v;
int main() {
return (int)__atomic_load_n(&v, __ATOMIC_ACQUIRE);
}]])], GCC_ATOMIC_BUILTINS_NEED_LIBATOMIC=no, GCC_ATOMIC_BUILTINS_NEED_LIBATOMIC=yes)
AC_MSG_RESULT($GCC_ATOMIC_BUILTINS_NEED_LIBATOMIC)
if test "x$GCC_ATOMIC_BUILTINS_NEED_LIBATOMIC" = xyes; then
LIBATOMIC_LIBS="-latomic"
fi
fi
AM_CONDITIONAL([GCC_ATOMIC_BUILTINS_SUPPORTED], [test x$GCC_ATOMIC_BUILTINS_SUPPORTED = x1])
AC_SUBST([LIBATOMIC_LIBS])
dnl Check if host supports 64-bit atomics
@@ -767,6 +743,21 @@ esac
AC_SUBST([LIB_EXT])
dnl
dnl potentially-infringing-but-nobody-knows-for-sure stuff
dnl
AC_ARG_ENABLE([texture-float],
[AS_HELP_STRING([--enable-texture-float],
[enable floating-point textures and renderbuffers @<:@default=disabled@:>@])],
[enable_texture_float="$enableval"],
[enable_texture_float=no]
)
if test "x$enable_texture_float" = xyes; then
AC_MSG_WARN([Floating-point textures enabled.])
AC_MSG_WARN([Please consult docs/patents.txt with your lawyer before building Mesa.])
DEFINES="$DEFINES -DTEXTURE_FLOAT_ENABLED"
fi
dnl
dnl Arch/platform-specific settings
dnl
@@ -872,7 +863,6 @@ AC_HEADER_MAJOR
AC_CHECK_HEADER([xlocale.h], [DEFINES="$DEFINES -DHAVE_XLOCALE_H"])
AC_CHECK_HEADER([sys/sysctl.h], [DEFINES="$DEFINES -DHAVE_SYS_SYSCTL_H"])
AC_CHECK_HEADERS([endian.h])
AC_CHECK_HEADER([dlfcn.h], [DEFINES="$DEFINES -DHAVE_DLFCN_H"])
AC_CHECK_FUNC([strtof], [DEFINES="$DEFINES -DHAVE_STRTOF"])
AC_CHECK_FUNC([mkostemp], [DEFINES="$DEFINES -DHAVE_MKOSTEMP"])
AC_CHECK_FUNC([timespec_get], [DEFINES="$DEFINES -DHAVE_TIMESPEC_GET"])
@@ -1322,19 +1312,14 @@ AC_ARG_ENABLE([vdpau],
[enable_vdpau=auto])
AC_ARG_ENABLE([omx],
[AS_HELP_STRING([--enable-omx],
[DEPRECATED: Use --enable-omx-bellagio or --enable-omx-tizonia instead @<:@default=auto@:>@])],
[AC_MSG_ERROR([--enable-omx is deprecated. Use --enable-omx-bellagio or --enable-omx-tizonia instead.])],
[DEPRECATED: Use --enable-omx-bellagio instead @<:@default=auto@:>@])],
[AC_MSG_ERROR([--enable-omx is deprecated. Use --enable-omx-bellagio instead.])],
[])
AC_ARG_ENABLE([omx-bellagio],
[AS_HELP_STRING([--enable-omx-bellagio],
[enable OpenMAX Bellagio library @<:@default=disabled@:>@])],
[enable_omx_bellagio="$enableval"],
[enable_omx_bellagio=no])
AC_ARG_ENABLE([omx-tizonia],
[AS_HELP_STRING([--enable-omx-tizonia],
[enable OpenMAX Tizonia library @<:@default=disabled@:>@])],
[enable_omx_tizonia="$enableval"],
[enable_omx_tizonia=no])
AC_ARG_ENABLE([va],
[AS_HELP_STRING([--enable-va],
[enable va library @<:@default=auto@:>@])],
@@ -1366,7 +1351,7 @@ GALLIUM_DRIVERS_DEFAULT="r300,r600,svga,swrast"
AC_ARG_WITH([gallium-drivers],
[AS_HELP_STRING([--with-gallium-drivers@<:@=DIRS...@:>@],
[comma delimited Gallium drivers list, e.g.
"i915,nouveau,r300,r600,radeonsi,freedreno,pl111,svga,swrast,swr,tegra,v3d,vc4,virgl,etnaviv,imx"
"i915,nouveau,r300,r600,radeonsi,freedreno,pl111,svga,swrast,swr,vc4,vc5,virgl,etnaviv,imx"
@<:@default=r300,r600,svga,swrast@:>@])],
[with_gallium_drivers="$withval"],
[with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT"])
@@ -1386,17 +1371,11 @@ if test "x$enable_opengl" = xno -a \
"x$enable_xvmc" = xno -a \
"x$enable_vdpau" = xno -a \
"x$enable_omx_bellagio" = xno -a \
"x$enable_omx_tizonia" = xno -a \
"x$enable_va" = xno -a \
"x$enable_opencl" = xno; then
AC_MSG_ERROR([at least one API should be enabled])
fi
if test "x$enable_omx_bellagio" = xyes -a \
"x$enable_omx_tizonia" = xyes; then
AC_MSG_ERROR([Can't enable both bellagio and tizonia at same time])
fi
# Building OpenGL ES1 and/or ES2 without OpenGL is not supported on mesa 9.0.x
if test "x$enable_opengl" = xno -a \
"x$enable_gles1" = xyes; then
@@ -1569,7 +1548,6 @@ AM_CONDITIONAL(HAVE_APPLEDRI, test "x$enable_dri" = xyes -a "x$dri_platform" = x
AM_CONDITIONAL(HAVE_LMSENSORS, test "x$enable_lmsensors" = xyes )
AM_CONDITIONAL(HAVE_GALLIUM_EXTRA_HUD, test "x$enable_gallium_extra_hud" = xyes )
AM_CONDITIONAL(HAVE_WINDOWSDRI, test "x$enable_dri" = xyes -a "x$dri_platform" = xwindows )
AM_CONDITIONAL(HAVE_XLEASE, test "x$have_xlease" = xyes )
AC_ARG_ENABLE([shared-glapi],
[AS_HELP_STRING([--enable-shared-glapi],
@@ -1793,6 +1771,19 @@ if test "x$with_platforms" = xauto; then
with_platforms=$with_egl_platforms
fi
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
WAYLAND_SCANNER='')
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
fi
PKG_CHECK_EXISTS([wayland-protocols >= $WAYLAND_PROTOCOLS_REQUIRED], [have_wayland_protocols=yes], [have_wayland_protocols=no])
if test "x$have_wayland_protocols" = xyes; then
ac_wayland_protocols_pkgdatadir=`$PKG_CONFIG --variable=pkgdatadir wayland-protocols`
fi
AC_SUBST(WAYLAND_PROTOCOLS_DATADIR, $ac_wayland_protocols_pkgdatadir)
# Do per platform setups and checks
platforms=`IFS=', '; echo $with_platforms`
for plat in $platforms; do
@@ -1801,22 +1792,13 @@ for plat in $platforms; do
PKG_CHECK_MODULES([WAYLAND_CLIENT], [wayland-client >= $WAYLAND_REQUIRED])
PKG_CHECK_MODULES([WAYLAND_SERVER], [wayland-server >= $WAYLAND_REQUIRED])
PKG_CHECK_MODULES([WAYLAND_PROTOCOLS], [wayland-protocols >= $WAYLAND_PROTOCOLS_REQUIRED])
if test "x$enable_egl" = xyes; then
PKG_CHECK_MODULES([WAYLAND_EGL], [wayland-egl-backend >= $WAYLAND_EGL_BACKEND_REQUIRED])
fi
WAYLAND_PROTOCOLS_DATADIR=`$PKG_CONFIG --variable=pkgdatadir wayland-protocols`
PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland-scanner],
WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland-scanner`,
WAYLAND_SCANNER='')
if test "x$WAYLAND_SCANNER" = x; then
AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner], [:])
fi
if test "x$WAYLAND_SCANNER" = "x:"; then
AC_MSG_ERROR([wayland-scanner is needed to compile the wayland platform])
fi
if test "x$have_wayland_protocols" = xno; then
AC_MSG_ERROR([wayland-protocols >= $WAYLAND_PROTOCOLS_REQUIRED is needed to compile the wayland platform])
fi
DEFINES="$DEFINES -DHAVE_WAYLAND_PLATFORM -DWL_HIDE_DEPRECATED"
;;
@@ -1837,9 +1819,6 @@ for plat in $platforms; do
android)
PKG_CHECK_MODULES([ANDROID], [cutils hardware sync])
if test -n "$with_gallium_drivers"; then
PKG_CHECK_MODULES([BACKTRACE], [backtrace])
fi
DEFINES="$DEFINES -DHAVE_ANDROID_PLATFORM"
;;
@@ -1854,7 +1833,6 @@ for plat in $platforms; do
;;
esac
done
AC_SUBST([WAYLAND_PROTOCOLS_DATADIR])
if test "x$enable_glx" != xno; then
if ! echo "$platforms" | grep -q 'x11'; then
@@ -1867,26 +1845,6 @@ if test x"$enable_dri3" = xyes; then
dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED xcb-present >= $XCBPRESENT_MODIFIERS_REQUIRED"
PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], [have_dri3_modifiers=yes], [have_dri3_modifiers=no])
if test "x$have_dri3_modifiers" == xyes; then
DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
fi
fi
if echo "$platforms" | grep -q 'x11' && echo "$platforms" | grep -q 'drm'; then
have_xlease=yes
else
have_xlease=no
fi
if test x"$have_xlease" = xyes; then
randr_modules="x11-xcb xcb-randr"
PKG_CHECK_MODULES([XCB_RANDR], [$randr_modules])
xlib_randr_modules="xrandr"
PKG_CHECK_MODULES([XLIB_RANDR], [$xlib_randr_modules])
fi
AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
@@ -1895,25 +1853,6 @@ AM_CONDITIONAL(HAVE_PLATFORM_DRM, echo "$platforms" | grep -q 'drm')
AM_CONDITIONAL(HAVE_PLATFORM_SURFACELESS, echo "$platforms" | grep -q 'surfaceless')
AM_CONDITIONAL(HAVE_PLATFORM_ANDROID, echo "$platforms" | grep -q 'android')
AC_ARG_ENABLE(xlib-lease,
[AS_HELP_STRING([--enable-xlib-lease]
[enable VK_acquire_xlib_display using X leases])],
[enable_xlib_lease=$enableval], [enable_xlib_lease=auto])
case "x$enable_xlib_lease" in
xyes)
;;
xno)
;;
*)
if echo "$platforms" | grep -q 'x11' && echo "$platforms" | grep -q 'drm'; then
enable_xlib_lease=yes
else
enable_xlib_lease=no
fi
esac
AM_CONDITIONAL(HAVE_XLIB_LEASE, test "x$enable_xlib_lease" = xyes)
dnl
dnl More DRI setup
dnl
@@ -2132,9 +2071,6 @@ if test -n "$with_vulkan_drivers"; then
PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
radeon_llvm_check $LLVM_REQUIRED_RADV "radv"
require_x11_dri3 "radv"
if test "x$acv_mako_found" = xno; then
AC_MSG_ERROR([Python mako module v$PYTHON_MAKO_REQUIRED or higher not found])
fi
HAVE_RADEON_VULKAN=yes
;;
*)
@@ -2252,13 +2188,13 @@ else
have_vdpau_platform=no
fi
if echo $platforms | egrep -q "x11|drm"; then
if echo $platforms | grep -q "x11\|drm"; then
have_omx_platform=yes
else
have_omx_platform=no
fi
if echo $platforms | egrep -q "x11|drm|wayland"; then
if echo $platforms | grep -q "x11\|drm\|wayland"; then
have_va_platform=yes
else
have_va_platform=no
@@ -2280,10 +2216,6 @@ if test -n "$with_gallium_drivers" -a "x$with_gallium_drivers" != xswrast; then
PKG_CHECK_EXISTS([libomxil-bellagio >= $LIBOMXIL_BELLAGIO_REQUIRED], [enable_omx_bellagio=yes], [enable_omx_bellagio=no])
fi
if test "x$enable_omx_tizonia" = xauto -a "x$have_omx_platform" = xyes; then
PKG_CHECK_EXISTS([libtizonia >= $LIBOMXIL_TIZONIA_REQUIRED], [enable_omx_tizonia=yes], [enable_omx_tizonia=no])
fi
if test "x$enable_va" = xauto -a "x$have_va_platform" = xyes; then
PKG_CHECK_EXISTS([libva >= $LIBVA_REQUIRED], [enable_va=yes], [enable_va=no])
fi
@@ -2293,7 +2225,6 @@ if test "x$enable_dri" = xyes -o \
"x$enable_xvmc" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx_bellagio" = xyes -o \
"x$enable_omx_tizonia" = xyes -o \
"x$enable_va" = xyes; then
need_gallium_vl=yes
fi
@@ -2302,7 +2233,6 @@ AM_CONDITIONAL(NEED_GALLIUM_VL, test "x$need_gallium_vl" = xyes)
if test "x$enable_xvmc" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx_bellagio" = xyes -o \
"x$enable_omx_tizonia" = xyes -o \
"x$enable_va" = xyes; then
if echo $platforms | grep -q "x11"; then
PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
@@ -2336,27 +2266,9 @@ if test "x$enable_omx_bellagio" = xyes; then
fi
PKG_CHECK_MODULES([OMX_BELLAGIO], [libomxil-bellagio >= $LIBOMXIL_BELLAGIO_REQUIRED])
gallium_st="$gallium_st omx_bellagio"
AC_DEFINE([ENABLE_ST_OMX_BELLAGIO], 1, [Use Bellagio for OMX IL])
else
AC_DEFINE([ENABLE_ST_OMX_BELLAGIO], 0)
fi
AM_CONDITIONAL(HAVE_ST_OMX_BELLAGIO, test "x$enable_omx_bellagio" = xyes)
if test "x$enable_omx_tizonia" = xyes; then
if test "x$have_omx_platform" != xyes; then
AC_MSG_ERROR([OMX requires at least one of the x11 or drm platforms])
fi
PKG_CHECK_MODULES([OMX_TIZONIA],
[libtizonia >= $LIBOMXIL_TIZONIA_REQUIRED
tizilheaders >= $LIBOMXIL_TIZONIA_REQUIRED
libtizplatform >= $LIBOMXIL_TIZONIA_REQUIRED])
gallium_st="$gallium_st omx_tizonia"
AC_DEFINE([ENABLE_ST_OMX_TIZONIA], 1, [Use Tizoina for OMX IL])
else
AC_DEFINE([ENABLE_ST_OMX_TIZONIA], 0)
fi
AM_CONDITIONAL(HAVE_ST_OMX_TIZONIA, test "x$enable_omx_tizonia" = xyes)
if test "x$enable_va" = xyes; then
if test "x$have_va_platform" != xyes; then
AC_MSG_ERROR([VA requires at least one of the x11 drm or wayland platforms])
@@ -2530,15 +2442,6 @@ AC_ARG_WITH([omx-bellagio-libdir],
$PKG_CONFIG --define-variable=libdir=\$libdir --variable=pluginsdir libomxil-bellagio`])
AC_SUBST([OMX_BELLAGIO_LIB_INSTALL_DIR])
dnl Directory for OMX_TIZONIA libs
AC_ARG_WITH([omx-tizonia-libdir],
[AS_HELP_STRING([--with-omx-tizonia-libdir=DIR],
[directory for the OMX_TIZONIA libraries])],
[OMX_TIZONIA_LIB_INSTALL_DIR="$withval"],
[OMX_TIZONIA_LIB_INSTALL_DIR=`$PKG_CONFIG --define-variable=libdir=\$libdir --variable=pluginsdir libtizcore`])
AC_SUBST([OMX_TIZONIA_LIB_INSTALL_DIR])
dnl Directory for VA libs
AC_ARG_WITH([va-libdir],
@@ -2669,6 +2572,14 @@ if test -n "$with_gallium_drivers"; then
HAVE_GALLIUM_RADEONSI=yes
PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
# Blacklist libdrm_amdgpu 2.4.90 because it causes a crash in older
# radeonsi with pretty much any app.
libdrm_version=`pkg-config libdrm_amdgpu --modversion`
if test "x$libdrm_version" = x2.4.90; then
AC_MSG_ERROR([radeonsi can't use libdrm 2.4.90 due to a compatibility issue. Use a newer or older version.])
fi
require_libdrm "radeonsi"
radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
if test "x$enable_egl" = xyes; then
@@ -2693,10 +2604,6 @@ if test -n "$with_gallium_drivers"; then
ximx)
HAVE_GALLIUM_IMX=yes
;;
xtegra)
HAVE_GALLIUM_TEGRA=yes
require_libdrm "tegra"
;;
xswrast)
HAVE_GALLIUM_SOFTPIPE=yes
if test "x$enable_llvm" = xyes; then
@@ -2764,20 +2671,20 @@ if test -n "$with_gallium_drivers"; then
;;
xvc4)
HAVE_GALLIUM_VC4=yes
PKG_CHECK_MODULES([VC4], [libdrm >= $LIBDRM_VC4_REQUIRED])
require_libdrm "vc4"
PKG_CHECK_MODULES([SIMPENROSE], [simpenrose],
[USE_VC4_SIMULATOR=yes;
DEFINES="$DEFINES -DUSE_VC4_SIMULATOR"],
[USE_VC4_SIMULATOR=no])
;;
xv3d)
HAVE_GALLIUM_V3D=yes
xvc5)
HAVE_GALLIUM_VC5=yes
PKG_CHECK_MODULES([V3D_SIMULATOR], [v3dv3],
[USE_V3D_SIMULATOR=yes;
DEFINES="$DEFINES -DUSE_V3D_SIMULATOR"],
[USE_V3D_SIMULATOR=no])
PKG_CHECK_MODULES([VC5_SIMULATOR], [v3dv3],
[USE_VC5_SIMULATOR=yes;
DEFINES="$DEFINES -DUSE_VC5_SIMULATOR"],
[AC_MSG_ERROR([vc5 requires the simulator])])
;;
xpl111)
HAVE_GALLIUM_PL111=yes
@@ -2797,9 +2704,8 @@ if test -n "$with_gallium_drivers"; then
fi
# XXX: Keep in sync with LLVM_REQUIRED_SWR
AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x5.0.0 -a \
"x$LLVM_VERSION" != x5.0.1 -a \
"x$LLVM_VERSION" != x5.0.2)
AM_CONDITIONAL(SWR_INVALID_LLVM_VERSION, test "x$LLVM_VERSION" != x3.9.0 -a \
"x$LLVM_VERSION" != x3.9.1)
if test "x$enable_llvm" = "xyes" -a "$with_gallium_drivers"; then
llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium"
@@ -2822,9 +2728,6 @@ if test "x$HAVE_GALLIUM_VC4" != xyes -a "x$HAVE_GALLIUM_PL111" = xyes ; then
AC_MSG_ERROR([Building with pl111 requires vc4])
fi
if test "x$HAVE_GALLIUM_NOUVEAU" != xyes -a "x$HAVE_GALLIUM_TEGRA" = xyes; then
AC_MSG_ERROR([Building with tegra requires nouveau])
fi
detect_old_buggy_llvm() {
dnl llvm-config may not give the right answer when llvm is a built as a
@@ -2919,19 +2822,19 @@ AM_CONDITIONAL(HAVE_GALLIUM_PL111, test "x$HAVE_GALLIUM_PL111" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_R300, test "x$HAVE_GALLIUM_R300" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_R600, test "x$HAVE_GALLIUM_R600" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_RADEONSI, test "x$HAVE_GALLIUM_RADEONSI" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_RADEON_COMMON, test "x$HAVE_GALLIUM_RADEONSI" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_NOUVEAU, test "x$HAVE_GALLIUM_NOUVEAU" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_FREEDRENO, test "x$HAVE_GALLIUM_FREEDRENO" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_ETNAVIV, test "x$HAVE_GALLIUM_ETNAVIV" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_IMX, test "x$HAVE_GALLIUM_IMX" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_TEGRA, test "x$HAVE_GALLIUM_TEGRA" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_SOFTPIPE, test "x$HAVE_GALLIUM_SOFTPIPE" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_LLVMPIPE, test "x$HAVE_GALLIUM_LLVMPIPE" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_SWR, test "x$HAVE_GALLIUM_SWR" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_SWRAST, test "x$HAVE_GALLIUM_SOFTPIPE" = xyes -o \
"x$HAVE_GALLIUM_LLVMPIPE" = xyes -o \
"x$HAVE_GALLIUM_SWR" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_V3D, test "x$HAVE_GALLIUM_V3D" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_VC4, test "x$HAVE_GALLIUM_VC4" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_VC5, test "x$HAVE_GALLIUM_VC5" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_VIRGL, test "x$HAVE_GALLIUM_VIRGL" = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_STATIC_TARGETS, test "x$enable_shared_pipe_drivers" = xno)
@@ -2959,7 +2862,7 @@ AM_CONDITIONAL(HAVE_AMD_DRIVERS, test "x$HAVE_GALLIUM_RADEONSI" = xyes -o \
"x$HAVE_RADEON_VULKAN" = xyes)
AM_CONDITIONAL(HAVE_BROADCOM_DRIVERS, test "x$HAVE_GALLIUM_VC4" = xyes -o \
"x$HAVE_GALLIUM_V3D" = xyes)
"x$HAVE_GALLIUM_VC5" = xyes)
AM_CONDITIONAL(HAVE_INTEL_DRIVERS, test "x$HAVE_INTEL_VULKAN" = xyes -o \
"x$HAVE_I965_DRI" = xyes)
@@ -2970,8 +2873,8 @@ AM_CONDITIONAL(NEED_RADEON_DRM_WINSYS, test "x$HAVE_GALLIUM_R300" = xyes -o \
AM_CONDITIONAL(NEED_WINSYS_XLIB, test "x$enable_glx" = xgallium-xlib)
AM_CONDITIONAL(HAVE_GALLIUM_COMPUTE, test x$enable_opencl = xyes)
AM_CONDITIONAL(HAVE_GALLIUM_LLVM, test "x$enable_llvm" = xyes)
AM_CONDITIONAL(USE_V3D_SIMULATOR, test x$USE_V3D_SIMULATOR = xyes)
AM_CONDITIONAL(USE_VC4_SIMULATOR, test x$USE_VC4_SIMULATOR = xyes)
AM_CONDITIONAL(USE_VC5_SIMULATOR, test x$USE_VC5_SIMULATOR = xyes)
AM_CONDITIONAL(HAVE_LIBDRM, test "x$have_libdrm" = xyes)
AM_CONDITIONAL(HAVE_OSMESA, test "x$enable_osmesa" = xyes)
@@ -3007,7 +2910,7 @@ AC_SUBST([XVMC_MAJOR], 1)
AC_SUBST([XVMC_MINOR], 0)
AC_SUBST([XA_MAJOR], 2)
AC_SUBST([XA_MINOR], 4)
AC_SUBST([XA_MINOR], 3)
AC_SUBST([XA_PATCH], 0)
AC_SUBST([XA_VERSION], "$XA_MAJOR.$XA_MINOR.$XA_PATCH")
@@ -3056,33 +2959,37 @@ AC_CONFIG_FILES([Makefile
src/egl/Makefile
src/egl/main/egl.pc
src/egl/wayland/wayland-drm/Makefile
src/egl/wayland/wayland-egl/Makefile
src/egl/wayland/wayland-egl/wayland-egl.pc
src/gallium/Makefile
src/gallium/auxiliary/Makefile
src/gallium/auxiliary/pipe-loader/Makefile
src/gallium/drivers/freedreno/Makefile
src/gallium/drivers/ddebug/Makefile
src/gallium/drivers/i915/Makefile
src/gallium/drivers/llvmpipe/Makefile
src/gallium/drivers/noop/Makefile
src/gallium/drivers/nouveau/Makefile
src/gallium/drivers/pl111/Makefile
src/gallium/drivers/r300/Makefile
src/gallium/drivers/r600/Makefile
src/gallium/drivers/radeon/Makefile
src/gallium/drivers/radeonsi/Makefile
src/gallium/drivers/rbug/Makefile
src/gallium/drivers/softpipe/Makefile
src/gallium/drivers/svga/Makefile
src/gallium/drivers/swr/Makefile
src/gallium/drivers/tegra/Makefile
src/gallium/drivers/trace/Makefile
src/gallium/drivers/etnaviv/Makefile
src/gallium/drivers/imx/Makefile
src/gallium/drivers/v3d/Makefile
src/gallium/drivers/vc4/Makefile
src/gallium/drivers/vc5/Makefile
src/gallium/drivers/virgl/Makefile
src/gallium/state_trackers/clover/Makefile
src/gallium/state_trackers/dri/Makefile
src/gallium/state_trackers/glx/xlib/Makefile
src/gallium/state_trackers/nine/Makefile
src/gallium/state_trackers/omx/Makefile
src/gallium/state_trackers/omx/bellagio/Makefile
src/gallium/state_trackers/omx/tizonia/Makefile
src/gallium/state_trackers/omx_bellagio/Makefile
src/gallium/state_trackers/osmesa/Makefile
src/gallium/state_trackers/va/Makefile
src/gallium/state_trackers/vdpau/Makefile
@@ -3093,7 +3000,7 @@ AC_CONFIG_FILES([Makefile
src/gallium/targets/d3dadapter9/d3d.pc
src/gallium/targets/dri/Makefile
src/gallium/targets/libgl-xlib/Makefile
src/gallium/targets/omx/Makefile
src/gallium/targets/omx-bellagio/Makefile
src/gallium/targets/opencl/Makefile
src/gallium/targets/opencl/mesa.icd
src/gallium/targets/osmesa/Makefile
@@ -3120,9 +3027,8 @@ AC_CONFIG_FILES([Makefile
src/gallium/winsys/sw/null/Makefile
src/gallium/winsys/sw/wrapper/Makefile
src/gallium/winsys/sw/xlib/Makefile
src/gallium/winsys/tegra/drm/Makefile
src/gallium/winsys/v3d/drm/Makefile
src/gallium/winsys/vc4/drm/Makefile
src/gallium/winsys/vc5/drm/Makefile
src/gallium/winsys/virgl/drm/Makefile
src/gallium/winsys/virgl/vtest/Makefile
src/gbm/Makefile
@@ -3157,9 +3063,7 @@ AC_CONFIG_FILES([Makefile
src/mesa/state_tracker/tests/Makefile
src/util/Makefile
src/util/tests/hash_table/Makefile
src/util/tests/set/Makefile
src/util/tests/string_buffer/Makefile
src/util/tests/vma/Makefile
src/util/xmlpool/Makefile
src/vulkan/Makefile])
@@ -3172,9 +3076,6 @@ $SED -i -e 's/brw_blorp.cpp/brw_blorp.c/' src/mesa/drivers/dri/i965/.deps/brw_bl
rm -f src/compiler/spirv/spirv_info.lo
echo "# dummy" > src/compiler/spirv/.deps/spirv_info.Plo
rm -f src/compiler/nir/.deps/nir_intrinsics.Plo
echo "# dummy" > src/compiler/nir/.deps/nir_intrinsics.Plo
dnl
dnl Output some configuration info for the user
dnl

View File

@@ -83,7 +83,7 @@ We try to quote the OpenGL specification where prudent:
* "An INVALID_OPERATION error is generated for any of the following
* conditions:
*
* * &lt;length&gt; is zero."
* * <length> is zero."
*
* Additionally, page 94 of the PDF of the OpenGL 4.5 core spec
* (30.10.2014) also says this, so it's no longer allowed for desktop GL,
@@ -94,7 +94,7 @@ Function comment example:
<pre>
/**
* Create and initialize a new buffer object. Called via the
* ctx-&gt;Driver.CreateObject() driver callback function.
* ctx->Driver.CreateObject() driver callback function.
* \param name integer name of the object
* \param type one of GL_FOO, GL_BAR, etc.
* \return pointer to new object or NULL if error

View File

@@ -168,7 +168,6 @@ the X server directly using (XCB-)DRI2 protocol.</p>
<p>This driver can share DRI drivers with <code>libGL</code>.</p>
</dd>
</dl>
<h2>Packaging</h2>

View File

@@ -153,16 +153,6 @@ home directory.
<li>MESA_NO_MINMAX_CACHE - when set, the minmax index cache is globally disabled.
<li>MESA_SHADER_CAPTURE_PATH - see <a href="shading.html#capture">Capturing Shaders</a></li>
<li>MESA_SHADER_DUMP_PATH and MESA_SHADER_READ_PATH - see <a href="shading.html#replacement">Experimenting with Shader Replacements</a></li>
<li>MESA_VK_VERSION_OVERRIDE - changes the Vulkan physical device version
as returned in VkPhysicalDeviceProperties::apiVersion.
<ul>
<li>The format should be MAJOR.MINOR[.PATCH]</li>
<li>This will not let you force a version higher than the driver's
instance versionas advertised by vkEnumerateInstanceVersion</li>
<li>This can be very useful for debugging but some features may not be
implemented correctly. (For developers only)</li>
</ul>
</li>
</ul>
@@ -269,7 +259,7 @@ Mesa EGL supports different sets of environment variables. See the
Especially useful to toggle hud at specific points of application and
disable for unencumbered viewing the rest of the time. For example, set
GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_TOGGLE_SIGNAL to 10 (SIGUSR1).
Use kill -10 &lt;pid&gt; to toggle the hud as desired.
Use kill -10 <pid> to toggle the hud as desired.
<li>GALLIUM_HUD_DUMP_DIR - specifies a directory for writing the displayed
hud values into files.
<li>GALLIUM_DRIVER - useful in combination with LIBGL_ALWAYS_SOFTWARE=true for
@@ -341,12 +331,6 @@ such as the OpenGL program's name and command line arguments.
<li>See the driver code for other, lesser-used variables.
</ul>
<h3>WGL environment variables</h3>
<ul>
<li>WGL_SWAP_INTERVAL - to set a swap interval, equivalent to calling
wglSwapIntervalEXT() in an application. If this environment variable
is set, application calls to wglSwapIntervalEXT() will have no effect.
</ul>
<h3>VA-API state tracker environment variables</h3>
<ul>

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@@ -24,19 +24,16 @@ not started
# OpenGL Core and Compatibility context support
Some drivers do not support the Compatibility profile or the
ARB_compatibility extensions. If an application does not request a
specific version without the forward-compatiblity flag, such drivers
will be limited to OpenGL 3.0. If an application requests OpenGL 3.1,
it will get a context that may or may not have the ARB_compatibility
extension enabled. Some of the later GL features are exposed in the 3.0
context as extensions.
OpenGL 3.1 and later versions are only supported with the Core profile.
There are no plans to support GL_ARB_compatibility. The last supported OpenGL
version with all deprecated features is 3.0. Some of the later GL features
are exposed in the 3.0 context as extensions.
Feature Status
------------------------------------------------------- ------------------------
GL 3.0, GLSL 1.30 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr, virgl
GL 3.0, GLSL 1.30 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr
glBindFragDataLocation, glGetFragDataLocation DONE
GL_NV_conditional_render (Conditional rendering) DONE ()
@@ -63,12 +60,12 @@ GL 3.0, GLSL 1.30 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llv
glVertexAttribI commands DONE
Depth format cube textures DONE ()
GLX_ARB_create_context (GLX 1.4 is required) DONE
Multisample anti-aliasing DONE (freedreno/a5xx, freedreno (*), llvmpipe (*), softpipe (*), swr (*))
Multisample anti-aliasing DONE (freedreno (*), llvmpipe (*), softpipe (*), swr (*))
(*) freedreno (a2xx-a4xx), llvmpipe, softpipe, and swr have fake Multisample anti-aliasing support
(*) freedreno, llvmpipe, softpipe, and swr have fake Multisample anti-aliasing support
GL 3.1, GLSL 1.40 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr, virgl
GL 3.1, GLSL 1.40 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr
Forward compatible context support/deprecations DONE ()
GL_ARB_draw_instanced (Instanced drawing) DONE ()
@@ -81,7 +78,7 @@ GL 3.1, GLSL 1.40 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llv
GL_EXT_texture_snorm (Signed normalized textures) DONE ()
GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr, virgl
GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr
Core/compatibility profiles DONE
Geometry shaders DONE ()
@@ -90,13 +87,13 @@ GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
GL_ARB_fragment_coord_conventions (Frag shader coord) DONE (freedreno)
GL_ARB_provoking_vertex (Provoking vertex) DONE (freedreno)
GL_ARB_seamless_cube_map (Seamless cubemaps) DONE (freedreno)
GL_ARB_texture_multisample (Multisample textures) DONE (freedreno/a5xx)
GL_ARB_texture_multisample (Multisample textures) DONE ()
GL_ARB_depth_clamp (Frag depth clamp) DONE (freedreno)
GL_ARB_sync (Fence objects) DONE (freedreno)
GLX_ARB_create_context_profile DONE
GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, virgl
GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe
GL_ARB_blend_func_extended DONE (freedreno/a3xx, swr)
GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL)
@@ -110,18 +107,18 @@ GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, soft
GL_ARB_vertex_type_2_10_10_10_rev DONE (freedreno, swr)
GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi, virgl
GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL_ARB_draw_buffers_blend DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr)
GL_ARB_draw_indirect DONE (freedreno, i965/gen7+, llvmpipe, softpipe, swr)
GL_ARB_gpu_shader5 DONE (i965/gen7+)
- 'precise' qualifier DONE
- Dynamically uniform sampler array indices DONE (softpipe)
- Dynamically uniform UBO array indices DONE (freedreno)
- Dynamically uniform UBO array indices DONE ()
- Implicit signed -> unsigned conversions DONE
- Fused multiply-add DONE ()
- Packing/bitfield/conversion functions DONE (freedreno, softpipe)
- Enhanced textureGather DONE (freedreno, softpipe)
- Packing/bitfield/conversion functions DONE (softpipe)
- Enhanced textureGather DONE (softpipe)
- Geometry shader instancing DONE (llvmpipe, softpipe)
- Geometry shader multiple streams DONE ()
- Enhanced per-sample shading DONE ()
@@ -139,7 +136,7 @@ GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi, virgl
GL_ARB_transform_feedback3 DONE (i965/gen7+, llvmpipe, softpipe, swr)
GL 4.1, GLSL 4.10 --- all DONE: i965/gen7+, nvc0, r600, radeonsi, virgl
GL 4.1, GLSL 4.10 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL_ARB_ES2_compatibility DONE (freedreno, i965, nv50, llvmpipe, softpipe, swr)
GL_ARB_get_program_binary DONE (0 or 1 binary formats)
@@ -149,7 +146,7 @@ GL 4.1, GLSL 4.10 --- all DONE: i965/gen7+, nvc0, r600, radeonsi, virgl
GL_ARB_viewport_array DONE (i965, nv50, llvmpipe, softpipe)
GL 4.2, GLSL 4.20 -- all DONE: i965/gen7+, nvc0, r600, radeonsi, virgl
GL 4.2, GLSL 4.20 -- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL_ARB_texture_compression_bptc DONE (freedreno, i965)
GL_ARB_compressed_texture_pixel_storage DONE (all drivers)
@@ -165,7 +162,7 @@ GL 4.2, GLSL 4.20 -- all DONE: i965/gen7+, nvc0, r600, radeonsi, virgl
GL_ARB_map_buffer_alignment DONE (all drivers)
GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, r600, radeonsi, virgl
GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, r600, radeonsi
GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30)
GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30)
@@ -191,12 +188,12 @@ GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, r600, radeonsi, virgl
GL_ARB_vertex_attrib_binding DONE (all drivers)
GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, r600, radeonsi
GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, radeonsi
GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drivers)
GL_ARB_buffer_storage DONE (freedreno, i965, nv50, llvmpipe, swr)
GL_ARB_clear_texture DONE (i965, nv50, llvmpipe, softpipe, swr)
GL_ARB_enhanced_layouts DONE (i965, nv50, llvmpipe, softpipe)
GL_ARB_buffer_storage DONE (freedreno, i965, nv50, r600, llvmpipe, swr)
GL_ARB_clear_texture DONE (i965, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_enhanced_layouts DONE (i965, nv50, r600, llvmpipe, softpipe)
- compile-time constant expressions DONE
- explicit byte offsets for blocks DONE
- forced alignment within blocks DONE
@@ -205,20 +202,20 @@ GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, r600, radeonsi
- input/output block locations DONE
GL_ARB_multi_bind DONE (all drivers)
GL_ARB_query_buffer_object DONE (i965/hsw+)
GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv50, llvmpipe, softpipe, swr, virgl)
GL_ARB_texture_stencil8 DONE (freedreno, i965/hsw+, nv50, llvmpipe, softpipe, swr, virgl)
GL_ARB_vertex_type_10f_11f_11f_rev DONE (i965, nv50, llvmpipe, softpipe, swr, virgl)
GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_texture_stencil8 DONE (freedreno, i965/hsw+, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_vertex_type_10f_11f_11f_rev DONE (i965, nv50, r600, llvmpipe, softpipe, swr)
GL 4.5, GLSL 4.50 -- all DONE: nvc0, radeonsi
GL_ARB_ES3_1_compatibility DONE (i965/hsw+, r600, virgl)
GL_ARB_ES3_1_compatibility DONE (i965/hsw+, r600)
GL_ARB_clip_control DONE (freedreno, i965, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_conditional_render_inverted DONE (freedreno, i965, nv50, r600, llvmpipe, softpipe, swr, virgl)
GL_ARB_cull_distance DONE (i965, nv50, r600, llvmpipe, softpipe, swr, virgl)
GL_ARB_derivative_control DONE (i965, nv50, r600, virgl)
GL_ARB_conditional_render_inverted DONE (freedreno, i965, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_cull_distance DONE (i965, nv50, r600, llvmpipe, softpipe, swr)
GL_ARB_derivative_control DONE (i965, nv50, r600)
GL_ARB_direct_state_access DONE (all drivers)
GL_ARB_get_texture_sub_image DONE (all drivers)
GL_ARB_shader_texture_image_samples DONE (i965, nv50, r600, virgl)
GL_ARB_shader_texture_image_samples DONE (i965, nv50, r600)
GL_ARB_texture_barrier DONE (freedreno, i965, nv50, r600)
GL_KHR_context_flush_control DONE (all - but needs GLX/EGL extension to be useful)
GL_KHR_robustness DONE (i965)
@@ -229,19 +226,19 @@ GL 4.6, GLSL 4.60
GL_ARB_gl_spirv in progress (Nicolai Hähnle, Ian Romanick)
GL_ARB_indirect_parameters DONE (i965/gen7+, nvc0, radeonsi)
GL_ARB_pipeline_statistics_query DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe, swr)
GL_ARB_polygon_offset_clamp DONE (freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, swr, virgl)
GL_ARB_shader_atomic_counter_ops DONE (freedreno/a5xx, i965/gen7+, nvc0, r600, radeonsi, softpipe, virgl)
GL_ARB_polygon_offset_clamp DONE (freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, swr)
GL_ARB_shader_atomic_counter_ops DONE (freedreno/a5xx, i965/gen7+, nvc0, r600, radeonsi, softpipe)
GL_ARB_shader_draw_parameters DONE (i965, nvc0, radeonsi)
GL_ARB_shader_group_vote DONE (i965, nvc0, radeonsi)
GL_ARB_spirv_extensions in progress (Nicolai Hähnle, Ian Romanick)
GL_ARB_texture_filter_anisotropic DONE (freedreno, i965, nv50, nvc0, r600, radeonsi, softpipe (*), llvmpipe (*))
GL_ARB_transform_feedback_overflow_query DONE (i965/gen6+, nvc0, radeonsi, llvmpipe, softpipe, virgl)
GL_ARB_transform_feedback_overflow_query DONE (i965/gen6+, radeonsi, llvmpipe, softpipe)
GL_KHR_no_error DONE (all drivers)
(*) softpipe and llvmpipe advertise 16x anisotropy but simply ignore the setting
These are the extensions cherry-picked to make GLES 3.1
GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, r600, radeonsi, virgl
GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, r600, radeonsi
GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30)
GL_ARB_compute_shader DONE (freedreno/a5xx, i965/gen7+, softpipe)
@@ -256,11 +253,11 @@ GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, r600, radeonsi, virgl
GL_ARB_shading_language_packing DONE (all drivers)
GL_ARB_separate_shader_objects DONE (all drivers)
GL_ARB_stencil_texturing DONE (freedreno, nv50, llvmpipe, softpipe, swr)
GL_ARB_texture_multisample (Multisample textures) DONE (freedreno/a5xx, i965/gen7+, nv50, llvmpipe, softpipe)
GL_ARB_texture_multisample (Multisample textures) DONE (i965/gen7+, nv50, llvmpipe, softpipe)
GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample)
GL_ARB_vertex_attrib_binding DONE (all drivers)
GS5 Enhanced textureGather DONE (freedreno, i965/gen7+)
GS5 Packing/bitfield/conversion functions DONE (freedreno/a5xx, i965/gen6+)
GS5 Enhanced textureGather DONE (freedreno, i965/gen7+,)
GS5 Packing/bitfield/conversion functions DONE (i965/gen6+)
GL_EXT_shader_integer_mix DONE (all drivers that support GLSL)
Additional functionality not covered above:
@@ -269,28 +266,28 @@ GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, r600, radeonsi, virgl
glGetBooleani_v - restrict to GLES enums
gl_HelperInvocation support DONE (i965, r600)
GLES3.2, GLSL ES 3.2 -- all DONE: i965/gen9+, radeonsi, virgl
GLES3.2, GLSL ES 3.2 -- all DONE: i965/gen9+
GL_EXT_color_buffer_float DONE (all drivers)
GL_KHR_blend_equation_advanced DONE (i965, nvc0)
GL_KHR_debug DONE (all drivers)
GL_KHR_robustness DONE (i965, nvc0)
GL_KHR_robustness DONE (i965, nvc0, radeonsi)
GL_KHR_texture_compression_astc_ldr DONE (freedreno, i965/gen9+)
GL_OES_copy_image DONE (all drivers)
GL_OES_draw_buffers_indexed DONE (all drivers that support GL_ARB_draw_buffers_blend)
GL_OES_draw_elements_base_vertex DONE (all drivers)
GL_OES_geometry_shader DONE (i965/hsw+, nvc0)
GL_OES_geometry_shader DONE (i965/hsw+, nvc0, radeonsi)
GL_OES_gpu_shader5 DONE (all drivers that support GL_ARB_gpu_shader5)
GL_OES_primitive_bounding_box DONE (i965/gen7+, nvc0)
GL_OES_sample_shading DONE (i965, nvc0, r600)
GL_OES_sample_variables DONE (i965, nvc0, r600)
GL_OES_primitive_bounding_box DONE (i965/gen7+, nvc0, radeonsi)
GL_OES_sample_shading DONE (i965, nvc0, r600, radeonsi)
GL_OES_sample_variables DONE (i965, nvc0, r600, radeonsi)
GL_OES_shader_image_atomic DONE (all drivers that support GL_ARB_shader_image_load_store)
GL_OES_shader_io_blocks DONE (All drivers that support GLES 3.1)
GL_OES_shader_multisample_interpolation DONE (i965, nvc0, r600)
GL_OES_shader_multisample_interpolation DONE (i965, nvc0, r600, radeonsi)
GL_OES_tessellation_shader DONE (all drivers that support GL_ARB_tessellation_shader)
GL_OES_texture_border_clamp DONE (all drivers)
GL_OES_texture_buffer DONE (freedreno, i965, nvc0)
GL_OES_texture_cube_map_array DONE (i965/hsw+, nvc0)
GL_OES_texture_buffer DONE (i965, nvc0, radeonsi)
GL_OES_texture_cube_map_array DONE (i965/hsw+, nvc0, radeonsi)
GL_OES_texture_stencil8 DONE (all drivers that support GL_ARB_texture_stencil8)
GL_OES_texture_storage_multisample_2d_array DONE (all drivers that support GL_ARB_texture_multisample)
@@ -299,17 +296,17 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_ARB_bindless_texture DONE (nvc0, radeonsi)
GL_ARB_cl_event not started
GL_ARB_compute_variable_group_size DONE (nvc0, radeonsi)
GL_ARB_ES3_2_compatibility DONE (i965/gen8+, radeonsi, virgl)
GL_ARB_fragment_shader_interlock DONE (i965)
GL_ARB_ES3_2_compatibility DONE (i965/gen8+)
GL_ARB_fragment_shader_interlock not started
GL_ARB_gpu_shader_int64 DONE (i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe)
GL_ARB_parallel_shader_compile not started, but Chia-I Wu did some related work in 2014
GL_ARB_post_depth_coverage DONE (i965, nvc0)
GL_ARB_post_depth_coverage DONE (i965)
GL_ARB_robustness_isolation not started
GL_ARB_sample_locations DONE (nvc0)
GL_ARB_seamless_cubemap_per_texture DONE (freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl)
GL_ARB_sample_locations not started
GL_ARB_seamless_cubemap_per_texture DONE (i965, nvc0, radeonsi, r600, softpipe, swr)
GL_ARB_shader_ballot DONE (i965/gen8+, nvc0, radeonsi)
GL_ARB_shader_clock DONE (i965/gen7+, nv50, nvc0, r600, radeonsi)
GL_ARB_shader_stencil_export DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr, virgl)
GL_ARB_shader_stencil_export DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr)
GL_ARB_shader_viewport_layer_array DONE (i965/gen6+, nvc0, radeonsi)
GL_ARB_sparse_buffer DONE (radeonsi/CIK+)
GL_ARB_sparse_texture not started
@@ -319,17 +316,15 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_EXT_memory_object DONE (radeonsi)
GL_EXT_memory_object_fd DONE (radeonsi)
GL_EXT_memory_object_win32 not started
GL_EXT_semaphore DONE (radeonsi)
GL_EXT_semaphore_fd DONE (radeonsi)
GL_EXT_semaphore not started
GL_EXT_semaphore_fd not started
GL_EXT_semaphore_win32 not started
GL_EXT_texture_norm16 DONE (i965, r600, radeonsi, nvc0)
GL_KHR_blend_equation_advanced_coherent DONE (i965/gen9+)
GL_KHR_texture_compression_astc_hdr DONE (i965/bxt)
GL_KHR_texture_compression_astc_sliced_3d DONE (i965/gen9+)
GL_OES_depth_texture_cube_map DONE (all drivers that support GLSL 1.30+)
GL_OES_EGL_image DONE (all drivers)
GL_OES_EGL_image_external DONE (all drivers)
GL_OES_EGL_image_external_essl3 DONE (all drivers)
GL_OES_EGL_image_external_essl3 not started
GL_OES_required_internalformat DONE (all drivers)
GL_OES_surfaceless_context DONE (all drivers)
GL_OES_texture_compression_astc DONE (core only)
@@ -337,7 +332,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_OES_texture_float_linear DONE (freedreno, i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe)
GL_OES_texture_half_float DONE (freedreno, i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe)
GL_OES_texture_half_float_linear DONE (freedreno, i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe)
GL_OES_texture_view DONE (i965/gen8+)
GL_OES_texture_view not started - based on GL_ARB_texture_view
GL_OES_viewport_array DONE (i965, nvc0, radeonsi)
GLX_ARB_context_flush_control not started
GLX_ARB_robustness_application_isolation not started
@@ -354,55 +349,39 @@ we DO NOT WANT implementations of these extensions for Mesa.
Vulkan 1.0 -- all DONE: anv, radv
Vulkan 1.1 -- all DONE: anv, radv
Khronos extensions that are not part of any Vulkan version:
VK_KHR_16bit_storage in progress (Alejandro)
VK_KHR_bind_memory2 DONE (anv, radv)
VK_KHR_android_surface not started
VK_KHR_dedicated_allocation DONE (anv, radv)
VK_KHR_descriptor_update_template DONE (anv, radv)
VK_KHR_device_group not started
VK_KHR_device_group_creation not started
VK_KHR_external_fence DONE (anv, radv)
VK_KHR_external_fence_capabilities DONE (anv, radv)
VK_KHR_display not started
VK_KHR_display_swapchain not started
VK_KHR_external_fence not started
VK_KHR_external_fence_capabilities not started
VK_KHR_external_fence_fd not started
VK_KHR_external_fence_win32 not started
VK_KHR_external_memory DONE (anv, radv)
VK_KHR_external_memory_capabilities DONE (anv, radv)
VK_KHR_external_semaphore DONE (anv, radv)
VK_KHR_external_semaphore_capabilities DONE (anv, radv)
VK_KHR_get_memory_requirements2 DONE (anv, radv)
VK_KHR_get_physical_device_properties2 DONE (anv, radv)
VK_KHR_maintenance1 DONE (anv, radv)
VK_KHR_maintenance2 DONE (anv, radv)
VK_KHR_maintenance3 DONE (anv, radv)
VK_KHR_multiview DONE (anv, radv)
VK_KHR_relaxed_block_layout DONE (anv, radv)
VK_KHR_sampler_ycbcr_conversion DONE (anv)
VK_KHR_shader_draw_parameters DONE (anv, radv)
VK_KHR_storage_buffer_storage_class DONE (anv, radv)
VK_KHR_variable_pointers DONE (anv, radv)
Khronos extensions that are not part of any Vulkan version:
VK_KHR_8bit_storage DONE (anv)
VK_KHR_android_surface not started
VK_KHR_create_renderpass2 DONE (anv, radv)
VK_KHR_display DONE (anv, radv)
VK_KHR_display_swapchain DONE (anv, radv)
VK_KHR_draw_indirect_count DONE (radv)
VK_KHR_external_fence_fd DONE (anv, radv)
VK_KHR_external_fence_win32 not started
VK_KHR_external_memory_fd DONE (anv, radv)
VK_KHR_external_memory_win32 not started
VK_KHR_external_semaphore_fd DONE (anv, radv)
VK_KHR_external_semaphore DONE (radv)
VK_KHR_external_semaphore_capabilities DONE (radv)
VK_KHR_external_semaphore_fd DONE (radv)
VK_KHR_external_semaphore_win32 not started
VK_KHR_get_display_properties2 DONE (anv, radv)
VK_KHR_get_surface_capabilities2 DONE (anv, radv)
VK_KHR_image_format_list DONE (anv, radv)
VK_KHR_get_memory_requirements2 DONE (anv, radv)
VK_KHR_get_physical_device_properties2 DONE (anv, radv)
VK_KHR_get_surface_capabilities2 DONE (anv)
VK_KHR_incremental_present DONE (anv, radv)
VK_KHR_maintenance1 DONE (anv, radv)
VK_KHR_mir_surface not started
VK_KHR_push_descriptor DONE (anv, radv)
VK_KHR_sampler_mirror_clamp_to_edge DONE (anv, radv)
VK_KHR_shader_draw_parameters DONE (anv, radv)
VK_KHR_shared_presentable_image not started
VK_KHR_storage_buffer_storage_class DONE (anv, radv)
VK_KHR_surface DONE (anv, radv)
VK_KHR_swapchain DONE (anv, radv)
VK_KHR_variable_pointers DONE (anv, radv)
VK_KHR_wayland_surface DONE (anv, radv)
VK_KHR_win32_keyed_mutex not started
VK_KHR_win32_surface not started

View File

@@ -16,124 +16,6 @@
<h1>News</h1>
<h2>July 27, 2018</h2>
<p>
<a href="relnotes/18.1.5.html">Mesa 18.1.5</a> is released.
This is a bug-fix release.
</p>
<h2>July 13, 2018</h2>
<p>
<a href="relnotes/18.1.4.html">Mesa 18.1.4</a> is released.
This is a bug-fix release.
</p>
<h2>June 29, 2018</h2>
<p>
<a href="relnotes/18.1.3.html">Mesa 18.1.3</a> is released.
This is a bug-fix release.
</p>
<h2>June 15, 2018</h2>
<p>
<a href="relnotes/18.1.2.html">Mesa 18.1.2</a> is released.
This is a bug-fix release.
</p>
<h2>June 3, 2018</h2>
<p>
<a href="relnotes/18.0.5.html">Mesa 18.0.5</a> is released.
This is a bug-fix release.
<br>
NOTE: It is anticipated that 18.0.5 will be the final release in the
18.0 series. Users of 18.0 are encouraged to migrate to the 18.1
series in order to obtain future fixes.
</p>
<h2>June 1, 2018</h2>
<p>
<a href="relnotes/18.1.1.html">Mesa 18.1.1</a> is released.
This is a bug-fix release.
</p>
<h2>May 18, 2018</h2>
<p>
<a href="relnotes/18.1.0.html">Mesa 18.1.0</a> is released. This is a
new development release. See the release notes for more information
about the release.
</p>
<h2>May 17, 2018</h2>
<p>
<a href="relnotes/18.0.4.html">Mesa 18.0.4</a> is released.
This is a bug-fix release.
</p>
<h2>May 7, 2018</h2>
<p>
<a href="relnotes/18.0.3.html">Mesa 18.0.3</a> is released.
This is a bug-fix release.
</p>
<h2>April 28, 2018</h2>
<p>
<a href="relnotes/18.0.2.html">Mesa 18.0.2</a> is released.
This is a bug-fix release.
</p>
<h2>April 18, 2018</h2>
<p>
<a href="relnotes/18.0.1.html">Mesa 18.0.1</a> is released.
This is a bug-fix release.
</p>
<h2>April 18, 2018</h2>
<p>
<a href="relnotes/17.3.9.html">Mesa 17.3.9</a> is released.
This is a bug-fix release.
<br>
NOTE: It is anticipated that 17.3.9 will be the final release in the
17.3 series. Users of 17.3 are encouraged to migrate to the 18.0
series in order to obtain future fixes.
</p>
<h2>April 03, 2018</h2>
<p>
<a href="relnotes/17.3.8.html">Mesa 17.3.8</a> is released.
This is a bug-fix release.
</p>
<h2>March 27, 2018</h2>
<p>
<a href="relnotes/18.0.0.html">Mesa 18.0.0</a> is released. This is a
new development release. See the release notes for more information
about the release.
</p>
<h2>March 21, 2018</h2>
<p>
<a href="relnotes/17.3.7.html">Mesa 17.3.7</a> is released.
This is a bug-fix release.
</p>
<h2>February 26, 2018</h2>
<p>
<a href="relnotes/17.3.6.html">Mesa 17.3.6</a> is released.
This is a bug-fix release.
</p>
<h2>February 19, 2018</h2>
<p>
<a href="relnotes/17.3.5.html">Mesa 17.3.5</a> is released.
This is a bug-fix release.
</p>
<h2>February 15, 2018</h2>
<p>
<a href="relnotes/17.3.4.html">Mesa 17.3.4</a> is released.
This is a bug-fix release.
</p>
<h2>January 18, 2018</h2>
<p>
<a href="relnotes/17.3.3.html">Mesa 17.3.3</a> is released.

View File

@@ -18,22 +18,16 @@
<h2 id="basic">1. Basic Usage</h2>
<p><strong>The Meson build system is generally considered stable and ready
for production</strong></p>
<p><strong>The Meson build system for Mesa is still under active development,
and should not be used in production environments.</strong></p>
<p>The meson build is tested on on Linux, macOS, Cygwin and Haiku, it should
work on FreeBSD, DragonflyBSD, NetBSD, and OpenBSD.</p>
<p><strong>Mesa requires Meson >= 0.44.1 to build.</strong>
Some older versions of meson do not check that they are too old and will error
out in odd ways.
</p>
<p>The meson build is currently only tested on linux, and is known to not work
on macOS, Windows, and haiku. This will be fixed.</p>
<p>
The meson program is used to configure the source directory and generates
either a ninja build file or Visual Studio® build files. The latter must
be enabled via the <code>--backend</code> switch, as ninja is the default backend on all
be enabled via the --backend switch, as ninja is the default backend on all
operating systems. Meson only supports out-of-tree builds, and must be passed a
directory to put built and generated sources into. We'll call that directory
"build" for examples.
@@ -49,7 +43,7 @@ along with a build directory to view the selected options for. This will show
your meson global arguments and project arguments, along with their defaults
and your local settings.
Meson does not currently support listing options before configure a build
Moes does not currently support listing options before configure a build
directory, but this feature is being discussed upstream.
</p>
@@ -60,21 +54,13 @@ directory, but this feature is being discussed upstream.
<p>
With additional arguments <code>meson configure</code> is used to change
options on already configured build directory. All options passed to this
command are in the form <code>-D "command"="value"</code>.
command are in the form -D "command"="value".
</p>
<pre>
meson configure build/ -Dprefix=/tmp/install -Dglx=true
</pre>
<p>
Note that options taking lists (such as <code>platforms</code>) are
<a href="http://mesonbuild.com/Build-options.html#using-build-options">a bit
more complicated</a>, but the simplest form compatible with Mesa options
is to use a comma to separate values (<code>-D platforms=drm,wayland</code>)
and brackets to represent an empty list (<code>-D platforms=[]</code>).
</p>
<p>
Once you've run the initial <code>meson</code> command successfully you can use
your configured backend to build the project. With ninja, the -C option can be
@@ -90,14 +76,13 @@ Without arguments, it will produce libGL.so and/or several other libraries
depending on the options you have chosen. Later, if you want to rebuild for a
different configuration, you should run <code>ninja clean</code> before
changing the configuration, or create a new out of tree build directory for
each configuration you want to build
<a href="http://mesonbuild.com/Using-multiple-build-directories.html">as
recommended in the documentation</a>
each configuration you want to build.
http://mesonbuild.com/Using-multiple-build-directories.html
</p>
<dl>
<dt><code>Environment Variables</code></dt>
<dd><p>Meson supports the standard CC and CXX environment variables for
<dd><p>Meson supports the standard CC and CXX envrionment variables for
changing the default compiler, and CFLAGS, CXXFLAGS, and LDFLAGS for setting
options to the compiler and linker.
@@ -108,9 +93,9 @@ the popular compilers, a complete list is available
These arguments are consumed and stored by meson when it is initialized or
re-initialized. Therefore passing them to meson configure will not do anything,
and passing them to ninja will only do something if ninja decides to
re-initialize meson, for example, if a meson.build file has been changed.
re-initialze meson, for example, if a meson.build file has been changed.
Changing these variables will not cause all targets to be rebuilt, so running
ninja clean is recommended when changing CFLAGS or CXXFLAGS. Meson will never
ninja clean is recomended when changing CFLAGS or CXXFLAGS. meson will never
change compiler in a configured build directory.
</p>
@@ -122,27 +107,27 @@ change compiler in a configured build directory.
CFLAGS=-Wno-typedef-redefinition ninja -C build-clang
</pre>
<p>Meson also honors <code>DESTDIR</code> for installs</p>
<p>Meson also honors DESTDIR for installs</p>
</dd>
<dt><code>LLVM</code></dt>
<dd><p>Meson includes upstream logic to wrap llvm-config using it's standard
dependency interface. It will search <code>$PATH</code> (or <code>%PATH%</code> on windows) for
dependncy interface. It will search $PATH (or %PATH% on windows) for
llvm-config, so using an LLVM from a non-standard path is as easy as
<code>PATH=/path/with/llvm-config:$PATH meson build</code>.
</p></dd>
</dl>
<dl>
<dt><code>PKG_CONFIG_PATH</code></dt>
<dd><p>The
<code>pkg-config</code> utility is a hard requirement for configuring and
building Mesa on Unix-like systems. It is used to search for external libraries
on the system. This environment variable is used to control the search path for
<code>pkg-config</code>. For instance, setting
<code>PKG_CONFIG_PATH=/usr/X11R6/lib/pkgconfig</code> will search for package
metadata in <code>/usr/X11R6</code> before the standard directories.</p>
building Mesa on Linux and *BSD. It is used to search for external libraries
on the system. This environment variable is used to control the search
path for <code>pkg-config</code>. For instance, setting
<code>PKG_CONFIG_PATH=/usr/X11R6/lib/pkgconfig</code> will search for
package metadata in <code>/usr/X11R6</code> before the standard
directories.</p>
</dd>
</dl>
@@ -151,7 +136,7 @@ One of the oddities of meson is that some options are different when passed to
the <code>meson</code> than to <code>meson configure</code>. These options are
passed as --option=foo to <code>meson</code>, but -Doption=foo to <code>meson
configure</code>. Mesa defined options are always passed as -Doption=foo.
</p>
<p>
<p>For those coming from autotools be aware of the following:</p>
@@ -160,28 +145,24 @@ configure</code>. Mesa defined options are always passed as -Doption=foo.
<dd><p>This option will set the compiler debug/optimisation levels to aid
debugging the Mesa libraries.</p>
<p>Note that in meson this defaults to <code>debugoptimized</code>, and
not setting it to <code>release</code> will yield non-optimal
performance and binary size. Not using <code>debug</code> may interfere
with debugging as some code and validation will be optimized away.
<p>Note that in meson this defaults to "debugoptimized", and not setting it to
"release" will yield non-optimal performance and binary size. Not using "debug"
may interfer with debbugging as some code and validation will be optimized
away.
</p>
<p> For those wishing to pass their own optimization flags, use the <code>plain</code>
buildtype, which causes meson to inject no additional compiler arguments, only
those in the C/CXXFLAGS and those that mesa itself defines.</p>
<p> For those wishing to pass their own -O option, use the "plain" buildtype,
which cuases meson to inject no additional compiler arguments, only those in
the C/CXXFLAGS and those that mesa itself defines.</p>
</dd>
</dl>
<dl>
<dt><code>-Db_ndebug</code></dt>
<dd><p>This option controls assertions in meson projects. When set to <code>false</code>
<dd><p>This option controls assertions in meson projects. When set to false
(the default) assertions are enabled, when set to true they are disabled. This
is unrelated to the <code>buildtype</code>; setting the latter to
<code>release</code> will not turn off assertions.
</p>
</dd>
</dl>
</div>
</body>
</html>

31
docs/patents.txt Normal file
View File

@@ -0,0 +1,31 @@
ARB_texture_float:
Silicon Graphics, Inc. owns US Patent #6,650,327, issued November 18,
2003 [1].
SGI believes this patent contains necessary IP for graphics systems
implementing floating point rasterization and floating point
framebuffer capabilities described in ARB_texture_float extension, and
will discuss licensing on RAND terms, on an individual basis with
companies wishing to use this IP in the context of conformant OpenGL
implementations [2].
The source code to implement ARB_texture_float extension is included
and can be toggled on at compile time, for those who purchased a
license from SGI, or are in a country where the patent does not apply,
etc.
The software is provided "as is", without warranty of any kind, express
or implied, including but not limited to the warranties of
merchantability, fitness for a particular purpose and noninfringement.
In no event shall the authors or copyright holders be liable for any
claim, damages or other liability, whether in an action of contract,
tort or otherwise, arising from, out of or in connection with the
software or the use or other dealings in the software.
You should contact a lawyer or SGI's legal department if you want to
enable this extension.
[1] https://www.google.com/patents/about?id=mIIOAAAAEBAJ&dq=6650327
[2] https://www.opengl.org/registry/specs/ARB/texture_float.txt

View File

@@ -24,12 +24,10 @@ Some Linux distributions closely follow the latest Mesa releases. On others one
has to use unofficial channels.
<br>
There are some general directions:
<ul>
<li>Debian/Ubuntu based distros - PPA: xorg-edgers, oibaf and padoka</li>
<li>Fedora - Corp: erp and che</li>
<li>OpenSuse/SLES - OBS: X11:XOrg and pontostroy:X11</li>
<li>Gentoo/Archlinux - officially provided/supported</li>
</ul>
</p>
</div>

View File

@@ -39,49 +39,67 @@ if you'd like to nominate a patch in the next stable release.
<th>Notes</th>
</tr>
<tr>
<td rowspan="3">18.1</td>
<td>2018-08-10</td>
<td>18.1.6</td>
<td>Dylan Baker</td>
<td rowspan="3">17.3</td>
<td>2018-01-26</td>
<td>17.3.4</td>
<td>Emil Velikov</td>
<td></td>
</tr>
<tr>
<td>2018-08-24</td>
<td>18.1.7</td>
<td>Dylan Baker</td>
<td>2018-02-09</td>
<td>17.3.5</td>
<td>Juan A. Suarez Romero</td>
<td></td>
</tr>
<tr>
<td>2018-09-07</td>
<td>18.1.8</td>
<td>Dylan Baker</td>
<td>Last planned 18.1.x release</td>
<td>2018-02-23</td>
<td>17.3.6</td>
<td>Juan A. Suarez Romero</td>
<td>Final planned release for the 17.3 series</td>
</tr>
<tr>
<td rowspan="4">18.2</td>
<td>2018-08-01</td>
<td>18.2.0rc1</td>
<td rowspan="7">18.0</td>
<td>2018-01-19</td>
<td>18.0.0-rc1</td>
<td>Emil Velikov</td>
<td></td>
</tr>
<tr>
<td>2018-01-26</td>
<td>18.0.0-rc2</td>
<td>Emil Velikov</td>
<td></td>
</tr>
<tr>
<td>2018-02-02</td>
<td>18.0.0-rc3</td>
<td>Emil Velikov</td>
<td></td>
</tr>
<tr>
<td>2018-02-09</td>
<td>18.0.0-rc4</td>
<td>Emil Velikov</td>
<td>May be promoted to 18.0.0 final</td>
</tr>
<tr>
<td>2018-02-23</td>
<td>18.0.1</td>
<td>Andres Gomez</td>
<td></td>
</tr>
<tr>
<td>2018-08-08</td>
<td>18.2.0rc2</td>
<td>2018-03-09</td>
<td>18.0.2</td>
<td>Andres Gomez</td>
<td></td>
</tr>
<tr>
<td>2018-08-15</td>
<td>18.2.0rc3</td>
<td>2018-03-23</td>
<td>18.0.3</td>
<td>Andres Gomez</td>
<td></td>
</tr>
<tr>
<td>2018-08-22</td>
<td>18.2.0rc4</td>
<td>Andres Gomez</td>
<td>Last planned RC/Final release</td>
</tr>
</table>
</div>

View File

@@ -54,8 +54,8 @@ For example:
<h1 id="schedule">Release schedule</h1>
<p>
Releases should happen on Wednesdays. Delays can occur although those
should be keep to a minimum.
Releases should happen on Fridays. Delays can occur although those should be keep
to a minimum.
<br>
See our <a href="release-calendar.html" target="_parent">calendar</a> for the
date and other details for individual releases.

View File

@@ -21,25 +21,7 @@ The release notes summarize what's new or changed in each Mesa release.
</p>
<ul>
<li><a href="relnotes/18.1.5.html">18.1.5 release notes</a>
<li><a href="relnotes/18.1.4.html">18.1.4 release notes</a>
<li><a href="relnotes/18.1.3.html">18.1.3 release notes</a>
<li><a href="relnotes/18.1.2.html">18.1.2 release notes</a>
<li><a href="relnotes/18.0.5.html">18.0.5 release notes</a>
<li><a href="relnotes/18.1.1.html">18.1.1 release notes</a>
<li><a href="relnotes/18.1.0.html">18.1.0 release notes</a>
<li><a href="relnotes/18.0.4.html">18.0.4 release notes</a>
<li><a href="relnotes/18.0.3.html">18.0.3 release notes</a>
<li><a href="relnotes/18.0.2.html">18.0.2 release notes</a>
<li><a href="relnotes/18.0.1.html">18.0.1 release notes</a>
<li><a href="relnotes/17.3.9.html">17.3.9 release notes</a>
<li><a href="relnotes/17.3.8.html">17.3.8 release notes</a>
<li><a href="relnotes/18.0.0.html">18.0.0 release notes</a>
<li><a href="relnotes/17.3.7.html">17.3.7 release notes</a>
<li><a href="relnotes/17.3.6.html">17.3.6 release notes</a>
<li><a href="relnotes/17.3.5.html">17.3.5 release notes</a>
<li><a href="relnotes/17.3.4.html">17.3.4 release notes</a>
<li><a href="relnotes/17.3.3.html">17.3.3 release notes</a>
<li><a href="relnotes/17.3.2.html">17.3.3 release notes</a>
<li><a href="relnotes/17.3.2.html">17.3.2 release notes</a>
<li><a href="relnotes/17.2.8.html">17.2.8 release notes</a>
<li><a href="relnotes/17.3.1.html">17.3.1 release notes</a>

View File

@@ -1,275 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.3.4 Release Notes / January 15, 2018</h1>
<p>
Mesa 17.3.4 is a bug fix release which fixes bugs found since the 17.3.3 release.
</p>
<p>
Mesa 17.3.4 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
2d3a4c3cbc995b3e192361dce710d8c749e046e7575aa1b7d8fc9e6b4df28f84 mesa-17.3.4.tar.gz
71f995e233bc5df1a0dd46c980d1720106e7f82f02d61c1ca50854b5e02590d0 mesa-17.3.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90311">Bug 90311</a> - Fail to build libglx with clang at linking stage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101442">Bug 101442</a> - Piglit shaders&#64;ssa&#64;fs-if-def-else-break fails with sb but passes with R600_DEBUG=nosb</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102435">Bug 102435</a> - [skl,kbl] [drm] GPU HANG: ecode 9:0:0x86df7cf9, in csgo_linux64 [4947], reason: Hang on rcs, action: reset</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103006">Bug 103006</a> - [OpenGL CTS] [HSW] KHR-GL45.vertex_attrib_binding.basic-inputL-case1</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103626">Bug 103626</a> - [SNB] ES3-CTS.functional.shaders.precision</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104163">Bug 104163</a> - [GEN9+] 2-3% perf drop in GfxBench Manhattan 3.1 from &quot;i965: Disable regular fast-clears (CCS_D) on gen9+&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104383">Bug 104383</a> - [KBL] Intel GPU hang with firefox</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104411">Bug 104411</a> - [CCS] lemonbar-xft GPU hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104487">Bug 104487</a> - [KBL] portal2_linux GPU hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104711">Bug 104711</a> - [skl CCS] Oxenfree (unity engine game) hangs GPU</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104741">Bug 104741</a> - Graphic corruption for Android apps Telegram and KineMaster</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104745">Bug 104745</a> - HEVC VDPAU decoding broken on RX 460 with UVD Firmware v1.130</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104818">Bug 104818</a> - mesa fails to build on ia64</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (1):</p>
<ul>
<li>i965: perform 2 uploads with dual slot *64*PASSTHRU formats on gen&lt;8</li>
</ul>
<p>Bas Nieuwenhuizen (10):</p>
<ul>
<li>radv: Fix ordering issue in meta memory allocation failure path.</li>
<li>radv: Fix memory allocation failure path in compute resolve init.</li>
<li>radv: Fix freeing meta state if the device pipeline cache fails to allocate.</li>
<li>radv: Fix fragment resolve init memory allocation failure paths.</li>
<li>radv: Fix bufimage failure deallocation.</li>
<li>radv: Init variant entry with memset.</li>
<li>radv: Don't allow 3d or 1d depth/stencil textures.</li>
<li>ac/nir: Use instance_rate_inputs per attribute, not per variable.</li>
<li>ac/nir: Use correct 32-bit component writemask for 64-bit SSBO stores.</li>
<li>ac/nir: Fix vector extraction if source vector has &gt;4 elements.</li>
</ul>
<p>Boyuan Zhang (2):</p>
<ul>
<li>radeon/vcn: add and manage render picture list</li>
<li>radeon/uvd: add and manage render picture list</li>
</ul>
<p>Chuck Atkins (1):</p>
<ul>
<li>configure.ac: add missing llvm dependencies to .pc files</li>
</ul>
<p>Dave Airlie (10):</p>
<ul>
<li>r600/sb: fix a bug emitting ar load from a constant.</li>
<li>ac/nir: account for view index in the user sgpr allocation.</li>
<li>radv: add fs_key meta format support to resolve passes.</li>
<li>radv: don't use hw resolve for integer image formats</li>
<li>radv: don't use hw resolves for r16g16 norm formats.</li>
<li>radv: move spi_baryc_cntl to pipeline</li>
<li>r600/sb: insert the else clause when we might depart from a loop</li>
<li>radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1)</li>
<li>radv/gfx9: fix block compression texture views. (v2)</li>
<li>virgl: also remove dimension on indirect.</li>
</ul>
<p>Eleni Maria Stea (1):</p>
<ul>
<li>mesa: Fix function pointers initialization in status tracker</li>
</ul>
<p>Emil Velikov (18):</p>
<ul>
<li>cherry-ignore: i965: Accept CONTEXT_ATTRIB_PRIORITY for brwCreateContext</li>
<li>cherry-ignore: swr: refactor swr_create_screen to allow for proper cleanup on error</li>
<li>cherry-ignore: anv: add explicit 18.0 only nominations</li>
<li>cherry-ignore: radv: fix sample_mask_in loading. (v3.1)</li>
<li>cherry-ignore: meson: multiple fixes</li>
<li>cherry-ignore: swr/rast: support llvm 3.9 type declarations</li>
<li>Revert "cherry-ignore: intel/fs: Use the original destination region for int MUL lowering"</li>
<li>cherry-ignore: ac/nir: set amdgpu.uniform and invariant.load for UBOs</li>
<li>cherry-ignore: add gen10 fixes</li>
<li>cherry-ignore: add r600/amdgpu 18.0 nominations</li>
<li>cherry-ignore: add i965 shader cache fixes</li>
<li>cherry-ignore: nir: mark unused space in packed_tex_data</li>
<li>radv: Stop advertising VK_KHX_multiview</li>
<li>cherry-ignore: radv: Don't expose VK_KHX_multiview on android.</li>
<li>configure.ac: correct driglx-direct help text</li>
<li>cherry-ignore: add meson fix</li>
<li>cherry-ignore: add a few more meson fixes</li>
<li>Update version to 17.3.4</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>radeon: remove left over dead code</li>
</ul>
<p>Gert Wollny (1):</p>
<ul>
<li>r600/shader: Initialize max_driver_temp_used correctly for the first time</li>
</ul>
<p>Grazvydas Ignotas (2):</p>
<ul>
<li>st/va: release held locks in error paths</li>
<li>st/vdpau: release held lock in error path</li>
</ul>
<p>Igor Gnatenko (1):</p>
<ul>
<li>link mesautil with pthreads</li>
</ul>
<p>Indrajit Das (4):</p>
<ul>
<li>st/omx_bellagio: Update default intra matrix per MPEG2 spec</li>
<li>radeon/uvd: update quantiser matrices only when requested</li>
<li>radeon/vcn: update quantiser matrices only when requested</li>
<li>st/va: clear pointers for mpeg2 quantiser matrices</li>
</ul>
<p>Jason Ekstrand (19):</p>
<ul>
<li>i965: Call brw_cache_flush_for_render in predraw_resolve_framebuffer</li>
<li>i965: Add more precise cache tracking helpers</li>
<li>i965/blorp: Add more destination flushing</li>
<li>i965: Track the depth and render caches separately</li>
<li>i965: Track format and aux usage in the render cache</li>
<li>Re-enable regular fast-clears (CCS_D) on gen9+</li>
<li>i965/miptree: Refactor CCS_E and CCS_D cases in render_aux_usage</li>
<li>i965/miptree: Add an explicit tiling parameter to create_for_bo</li>
<li>i965/miptree: Use the tiling from the modifier instead of the BO</li>
<li>i965/bufmgr: Add a create_from_prime_tiled function</li>
<li>i965: Set tiling on BOs imported with modifiers</li>
<li>i965/miptree: Take an aux_usage in prepare/finish_render</li>
<li>i965/miptree: Add an aux_disabled parameter to render_aux_usage</li>
<li>i965/surface_state: Drop brw_aux_surface_disabled</li>
<li>intel/fs: Use the original destination region for int MUL lowering</li>
<li>anv/pipeline: Don't look at blend state unless we have an attachment</li>
<li>anv/cmd_buffer: Re-emit the pipeline at every subpass</li>
<li>anv: Stop advertising VK_KHX_multiview</li>
<li>i965: Call prepare_external after implicit window-system MSAA resolves</li>
</ul>
<p>Jon Turney (3):</p>
<ul>
<li>configure: Default to gbm=no on osx</li>
<li>glx/apple: include util/debug.h for env_var_as_boolean prototype</li>
<li>glx/apple: locate dispatch table functions to wrap by name</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>svga: Prevent use after free.</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.3.3</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>i965: Bind null render targets for shadow sampling + color.</li>
<li>i965: Bump official kernel requirement to Linux v3.9.</li>
</ul>
<p>Lucas Stach (2):</p>
<ul>
<li>etnaviv: dirty TS state when framebuffer has changed</li>
<li>renderonly: fix dumb BO allocation for non 32bpp formats</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi: don't ignore pitch for imported textures</li>
</ul>
<p>Matthew Nicholls (2):</p>
<ul>
<li>radv: restore previous stencil reference after depth-stencil clear</li>
<li>radv: remove predication on cache flushes</li>
</ul>
<p>Maxin B. John (1):</p>
<ul>
<li>anv_icd.py: improve reproducible builds</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>winsys/radeon: Compute is_displayable in surf_drm_to_winsys</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>r600: don't do stack workarounds for hemlock</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: create pipeline layout objects for all meta operations</li>
</ul>
<p>Samuel Thibault (1):</p>
<ul>
<li>glx: fix non-dri build</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>ac: fix buffer overflow bug in 64bit SSBO loads</li>
<li>ac: fix visit_ssa_undef() for doubles</li>
</ul>
</div>
</body>
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<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.3.5 Release Notes / February 19, 2018</h1>
<p>
Mesa 17.3.5 is a bug fix release which fixes bugs found since the 17.3.4 release.
</p>
<p>
Mesa 17.3.5 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
bc1ee20366aae2affc37c89228f871f438136f70252005e9f842169bde976788 mesa-17.3.5.tar.gz
eb9228fc8aaa71e0205c1481c5b157752ebaec9b646b030d27478e25a6d7936a mesa-17.3.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
</ul>
<h2>Changes</h2>
<p>Emil Velikov (2):</p>
<ul>
<li>docs: add sha256 checksums for 17.3.4</li>
<li>Update version to 17.3.5</li>
</ul>
<p>James Legg (1):</p>
<ul>
<li>ac/nir: Fix conflict resolution typo in handle_vs_input_decl</li>
</ul>
</div>
</body>
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<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.3.6 Release Notes / February 27, 2018</h1>
<p>
Mesa 17.3.6 is a bug fix release which fixes bugs found since the 17.3.5 release.
</p>
<p>
Mesa 17.3.6 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
d5e10ea3f0d11b06d2b0b235bba372a04278c39bc0e712090bda1f61842db188 mesa-17.3.6.tar.gz
e5915680d44ac9d05defdec529db7459ac9edd441c9845266eff2e2d3e57fbf8 mesa-17.3.6.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104383">Bug 104383</a> - [KBL] Intel GPU hang with firefox</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104411">Bug 104411</a> - [CCS] lemonbar-xft GPU hang</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104546">Bug 104546</a> - Crash happens when running compute pipeline after calling glxMakeCurrent two times</li>
</ul>
<h2>Changes</h2>
<p>Emil Velikov (2):</p>
<ul>
<li>docs: add sha256 checksums for 17.3.5</li>
<li>Update version to 17.3.6</li>
</ul>
<p>Jason Ekstrand (4):</p>
<ul>
<li>i965/draw: Do resolves properly for textures used by TXF</li>
<li>i965: Replace draw_aux_buffer_disabled with draw_aux_usage</li>
<li>i965/draw: Set NEW_AUX_STATE when draw aux changes</li>
<li>i965: Stop disabling aux during texture preparation</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965: Don't disable CCS for RT dependencies when dispatching compute.</li>
</ul>
<p>Topi Pohjolainen (1):</p>
<ul>
<li>i965: Don't try to disable render aux buffers for compute</li>
</ul>
</div>
</body>
</html>

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@@ -1,312 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.3.7 Release Notes / March 21, 2018</h1>
<p>
Mesa 17.3.7 is a bug fix release which fixes bugs found since the 17.3.7 release.
</p>
<p>
Mesa 17.3.7 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
f08de6d0ccb3dbca04b44790d85c3ff9e7b1cc4189d1b7c7167e5ba7d98736c0 mesa-17.3.7.tar.gz
0595904a8fba65a8fe853a84ad3c940205503b94af41e8ceed245fada777ac1e mesa-17.3.7.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103007">Bug 103007</a> - [OpenGL CTS] [HSW] KHR-GL45.gpu_shader_fp64.fp64.max_uniform_components fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103988">Bug 103988</a> - Intermittent piglit failures with shader cache enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104302">Bug 104302</a> - Wolfenstein 2 (2017) under wine graphical artifacting on RADV</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104381">Bug 104381</a> - swr fails to build since llvm-svn r321257</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104625">Bug 104625</a> - semicolon after if</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104642">Bug 104642</a> - Android: NULL pointer dereference with i965 mesa-dev, seems build_id_length related</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104654">Bug 104654</a> - r600/sb: Alien Isolation GPU lock</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104905">Bug 104905</a> - SpvOpFOrdEqual doesn't return correct results for NaNs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104915">Bug 104915</a> - Indexed SHADING_LANGUAGE_VERSION query not supported</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104923">Bug 104923</a> - anv: Dota2 rendering corruption</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105013">Bug 105013</a> - [regression] GLX+VA-API+clutter-gst video playback is corrupt with Mesa 17.3 (but is fine with 17.2)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105029">Bug 105029</a> - simdlib_512_avx512.inl:371:57: error: could not convert _mm512_mask_blend_epi32((__mmask16)(ImmT), a, b) from __m512i {aka __vector(8) long long int} to SIMDImpl::SIMD512Impl::Float</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105098">Bug 105098</a> - [RADV] GPU freeze with simple Vulkan App</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105103">Bug 105103</a> - Wayland master causes Mesa to fail to compile</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105224">Bug 105224</a> - Webgl Pointclouds flickers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105255">Bug 105255</a> - Waiting for fences without waitAll is not implemented</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105271">Bug 105271</a> - WebGL2 shader crashes i965_dri.so 17.3.3</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105436">Bug 105436</a> - Blinking textures in UT2004 [bisected]</li>
</ul>
<h2>Changes</h2>
<p>Alex Smith (1):</p>
<ul>
<li>radv: Fix CmdCopyImage between uncompressed and compressed images</li>
</ul>
<p>Andriy Khulap (1):</p>
<ul>
<li>i965: Fix RELOC_WRITE typo in brw_store_data_imm64()</li>
</ul>
<p>Anuj Phogat (1):</p>
<ul>
<li>isl: Don't use surface format R32_FLOAT for typed atomic integer operations</li>
</ul>
<p>Bas Nieuwenhuizen (6):</p>
<ul>
<li>radv: Always lower indirect derefs after nir_lower_global_vars_to_local.</li>
<li>radeonsi: Export signalled sync file instead of -1.</li>
<li>radv: Implement WaitForFences with !waitAll.</li>
<li>radv: Implement waiting on non-submitted fences.</li>
<li>radv: Fix copying from 3D images starting at non-zero depth.</li>
<li>radv: Increase the number of dynamic uniform buffers.</li>
</ul>
<p>Brian Paul (1):</p>
<ul>
<li>mesa: add missing switch case for EXTRA_VERSION_40 in check_extra()</li>
</ul>
<p>Chuck Atkins (1):</p>
<ul>
<li>glx: Properly handle cases where screen creation fails</li>
</ul>
<p>Daniel Stone (3):</p>
<ul>
<li>i965: Fix bugs in intel_from_planar</li>
<li>egl/wayland: Fix ARGB/XRGB transposition in config map</li>
<li>egl/wayland: Always use in-tree wayland-egl-backend.h</li>
</ul>
<p>Dave Airlie (9):</p>
<ul>
<li>r600: fix cubemap arrays</li>
<li>r600/sb/cayman: fix indirect ubo access on cayman</li>
<li>r600: fix xfb stream check.</li>
<li>ac/nir: to integer the args to bcsel.</li>
<li>r600/cayman: fix fragcood loading recip generation.</li>
<li>radv: don't support tc-compat on multisample d32s8 at all.</li>
<li>virgl: remap query types to hw support.</li>
<li>ac/nir: don't apply slice rounding on txf_ms</li>
<li>r600: implement callstack workaround for evergreen.</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>glapi/check_table: Remove 'extern "C"' block</li>
<li>glapi: remove APPLE extensions from test</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>docs: add sha256 checksums for 17.3.6</li>
</ul>
<p>Eric Anholt (4):</p>
<ul>
<li>mesa: Drop incorrect A4B4G4R4 _mesa_format_matches_format_and_type() cases.</li>
<li>ac/nir: Fix compiler warning about uninitialized dw_addr.</li>
<li>glsl/tests: Fix strict aliasing warning about int64/double.</li>
<li>glsl/tests: Fix a compiler warning about signed/unsigned loop comparison.</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>i965: Fix KHR_blend_equation_advanced with some render targets.</li>
</ul>
<p>Frank Binns (1):</p>
<ul>
<li>egl/dri2: fix segfault when display initialisation fails</li>
</ul>
<p>George Kyriazis (1):</p>
<ul>
<li>swr/rast: blend_epi32() should return Integer, not Float</li>
</ul>
<p>Gert Wollny (1):</p>
<ul>
<li>r600: Take ALU_EXTENDED into account when evaluating jump offsets</li>
</ul>
<p>Gurchetan Singh (1):</p>
<ul>
<li>mesa: don't clamp just based on ARB_viewport_array extension</li>
</ul>
<p>Iago Toral Quiroga (2):</p>
<ul>
<li>i965/sbe: fix number of inputs for active components</li>
<li>i965/vec4: use a temp register to compute offsets for pull loads</li>
</ul>
<p>James Legg (1):</p>
<ul>
<li>radv: Really use correct HTILE expanded words.</li>
</ul>
<p>Jason Ekstrand (3):</p>
<ul>
<li>intel/isl: Add an isl_color_value_is_zero helper</li>
<li>vulkan/wsi/x11: Set OUT_OF_DATE if wait_for_special_event fails</li>
<li>intel/fs: Set up sampler message headers in the visitor on gen7+</li>
</ul>
<p>Jonathan Gray (1):</p>
<ul>
<li>configure.ac: pthread-stubs not present on OpenBSD</li>
</ul>
<p>Jordan Justen (3):</p>
<ul>
<li>i965: Create new program cache bo when clearing the program cache</li>
<li>program: Don't reset SamplersValidated when restoring from shader cache</li>
<li>intel/vulkan: Hard code CS scratch_ids_per_subslice for Cherryview</li>
</ul>
<p>Juan A. Suarez Romero (14):</p>
<ul>
<li>cherry-ignore: Explicit 18.0 only nominations</li>
<li>cherry-ignore: r600/compute: only mark buffer/image state dirty for fragment shaders</li>
<li>cherry-ignore: anv: Move setting current_pipeline to cmd_state_init</li>
<li>cherry-ignore: anv: Be more careful about fast-clear colors</li>
<li>cherry-ignore: Add patches that has a specific version for 17.3</li>
<li>cherry-ignore: r600: Take ALU_EXTENDED into account when evaluating jump offsets</li>
<li>cherry-ignore: intel/compiler: Memory fence commit must always be enabled for gen10+</li>
<li>cherry-ignore: i965: Avoid problems from referencing orphaned BOs after growing.</li>
<li>cherry-ignore: include all Meson related fixes</li>
<li>cherry-ignore: ac/shader: fix vertex input with components.</li>
<li>cherry-ignore: i965: Use absolute addressing for constant buffer 0 on Kernel 4.16+.</li>
<li>cherry-ignore: anv/image: Separate modifiers from legacy scanout</li>
<li>cherry-ignore: glsl: Fix memory leak with known glsl_type instances</li>
<li>Update version to 17.3.7</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nvir/nvc0: fix legalizing of ld unlock c0[0x10000]</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>i965: Emit CS stall before MEDIA_VFE_STATE.</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>i965: perf: ensure reading config IDs from sysfs isn't interrupted</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>radeonsi: align command buffer starting address to fix some Raven hangs</li>
<li>configure.ac: blacklist libdrm 2.4.90</li>
</ul>
<p>Michal Navratil (1):</p>
<ul>
<li>winsys/amdgpu: allow non page-aligned size bo creation from pointer</li>
</ul>
<p>Samuel Iglesias Gonsálvez (1):</p>
<ul>
<li>glsl/linker: fix bug when checking precision qualifier</li>
</ul>
<p>Samuel Pitoiset (2):</p>
<ul>
<li>ac/nir: use ordered float comparisons except for not equal</li>
<li>Revert "mesa: do not trigger _NEW_TEXTURE_STATE in glActiveTexture()"</li>
</ul>
<p>Stephan Gerhold (1):</p>
<ul>
<li>util/build-id: Fix address comparison for binaries with LOAD vaddr &gt; 0</li>
</ul>
<p>Thomas Hellstrom (2):</p>
<ul>
<li>svga: Fix a leftover debug hack</li>
<li>loader_dri3/glx/egl: Reinstate the loader_dri3_vtable get_dri_screen callback</li>
</ul>
<p>Tim Rowley (1):</p>
<ul>
<li>swr/rast: fix MemoryBuffer build break for llvm-6</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>nir: fix interger divide by zero crash during constant folding</li>
</ul>
<p>Tobias Droste (1):</p>
<ul>
<li>gallivm: Use new LLVM fast-math-flags API</li>
</ul>
<p>Vadym Shovkoplias (1):</p>
<ul>
<li>mesa: add glsl version query (v4)</li>
</ul>
<p>Vinson Lee (1):</p>
<ul>
<li>swr/rast: Fix macOS macro.</li>
</ul>
</div>
</body>
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@@ -1,147 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.3.8 Release Notes / April 03, 2018</h1>
<p>
Mesa 17.3.8 is a bug fix release which fixes bugs found since the 17.3.7 release.
</p>
<p>
Mesa 17.3.8 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
175d2ca9be2af3a8db6cd603986096d75da70f59699528d7b6675d542a305e23 mesa-17.3.8.tar.gz
8f9d9bf281c48e4a8f5228816577263b4c655248dc7666e75034ab422951a6b1 mesa-17.3.8.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102542">Bug 102542</a> - mesa-17.2.0/src/gallium/state_trackers/nine/nine_ff.c:1938: bad assignment ?</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103746">Bug 103746</a> - [BDW BSW SKL KBL] dEQP-GLES31.functional.copy_image regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104636">Bug 104636</a> - [BSW/HD400] Aztec Ruins GL version GPU hangs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105290">Bug 105290</a> - [BSW/HD400] SynMark OglCSDof GPU hangs when shaders come from cache</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105464">Bug 105464</a> - Reading per-patch outputs in Tessellation Control Shader returns undefined values</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105670">Bug 105670</a> - [regression][hang] Trine1EE hangs GPU after loading screen on Mesa3D-17.3 and later</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105704">Bug 105704</a> - compiler assertion hit</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105717">Bug 105717</a> - [bisected] Mesa build tests fails: BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined</li>
</ul>
<h2>Changes</h2>
<p>Axel Davy (3):</p>
<ul>
<li>st/nine: Fix bad tracking of vs textures for NINESBT_ALL</li>
<li>st/nine: Fixes warning about implicit conversion</li>
<li>st/nine: Fix non inversible matrix check</li>
</ul>
<p>Caio Marcelo de Oliveira Filho (1):</p>
<ul>
<li>anv/pipeline: fail if TCS/TES compile fail</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>radv: get correct offset into LDS for indexed vars.</li>
</ul>
<p>Derek Foreman (1):</p>
<ul>
<li>egl/wayland: Make swrast display_sync the correct queue</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>meson/configure: detect endian.h instead of trying to guess when it's available</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>mesa: Don't write to user buffer in glGetTexParameterIuiv on error</li>
<li>i965/vec4: Fix null destination register in 3-source instructions</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>i965: Emit texture cache invalidates around blorp_copy</li>
</ul>
<p>Jordan Justen (2):</p>
<ul>
<li>i965: Calculate thread_count in brw_alloc_stage_scratch</li>
<li>i965: Hard code CS scratch_ids_per_subslice for Cherryview</li>
</ul>
<p>Juan A. Suarez Romero (6):</p>
<ul>
<li>docs: add sha256 checksums for 17.3.7</li>
<li>cherry-ignore: ac/nir: pass the nir variable through tcs loading.</li>
<li>cherry-ignore: radv: handle exporting view index to fragment shader. (v1.1)</li>
<li>cherry-ignore: omx: always define ENABLE_ST_OMX_{BELLAGIO,TIZONIA}</li>
<li>cherry-ignore: docs: fix 18.0 release note version</li>
<li>Update version to 17.3.8</li>
</ul>
<p>Leo Liu (1):</p>
<ul>
<li>radeon/vce: move feedback command inside of destroy function</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>st/dri: fix OpenGL-OpenCL interop for GL_TEXTURE_BUFFER</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>nir: fix per_vertex_output intrinsic</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>glsl: fix infinite loop caused by bug in loop unrolling pass</li>
<li>nir: fix crash in loop unroll corner case</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,162 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.3.9 Release Notes / April 18, 2018</h1>
<p>
Mesa 17.3.9 is a bug fix release which fixes bugs found since the 17.3.8 release.
</p>
<p>
Mesa 17.3.9 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
4d625f65a1ff4cd8cfeb39e38f047507c6dea047502a0d53113c96f54588f340 mesa-17.3.9.tar.gz
c5beb5fc05f0e0c294fefe1a393ee118cb67e27a4dca417d77c297f7d4b6e479 mesa-17.3.9.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98281">Bug 98281</a> - 'message's in ctx-&gt;Debug.LogMessages[] seem to leak.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101408">Bug 101408</a> - [Gen8+] Xonotic fails to render one of the weapons</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102342">Bug 102342</a> - mesa-17.1.7/src/gallium/auxiliary/pipebuffer/pb_cache.c:169]: (style) Suspicious condition</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105317">Bug 105317</a> - The GPU Vega 56 was hang while try to pass #GraphicsFuzz shader15 test</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105440">Bug 105440</a> - GEN7: rendering issue on citra</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105442">Bug 105442</a> - Hang when running nine ff lighting shader with radeonsi</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105994">Bug 105994</a> - surface state leak when creating and destroying image views with aspectMask depth and stencil</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (2):</p>
<ul>
<li>dri_util: when overriding, always reset the core version</li>
<li>mesa: adds some comments regarding MESA_GLES_VERSION_OVERRIDE usage</li>
</ul>
<p>Axel Davy (2):</p>
<ul>
<li>st/nine: Declare lighting consts for ff shaders</li>
<li>st/nine: Do not use scratch for face register</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>ac/nir: Add workaround for GFX9 buffer views.</li>
</ul>
<p>Daniel Stone (1):</p>
<ul>
<li>st/dri: Initialise modifier to INVALID for DRI2</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>glsl: remove unreachable assert()</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>gbm: remove never-implemented function</li>
</ul>
<p>Henri Verbeet (1):</p>
<ul>
<li>mesa: Inherit texture view multi-sample information from the original texture images.</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>compiler/spirv: set is_shadow for depth comparitor sampling opcodes</li>
</ul>
<p>Jason Ekstrand (4):</p>
<ul>
<li>nir/vars_to_ssa: Remove copies from the correct set</li>
<li>nir/lower_indirect_derefs: Support interp_var_at intrinsics</li>
<li>intel/vec4: Set channel_sizes for MOV_INDIRECT sources</li>
<li>nir/lower_vec_to_movs: Only coalesce if the vec had a SSA destination</li>
</ul>
<p>Juan A. Suarez Romero (3):</p>
<ul>
<li>docs: add sha256 checksums for 17.3.8</li>
<li>cherry-ignore: Explicit 18.0 only nominations</li>
<li>Update version to 17.3.9</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>anv: fix number of planes for depth &amp; stencil</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>mesa: simplify MESA_GL_VERSION_OVERRIDE behavior of API override</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: fix picking the method for resolve subpass</li>
</ul>
<p>Sergii Romantsov (1):</p>
<ul>
<li>i965: Extend the negative 32-bit deltas to 64-bits</li>
</ul>
<p>Timothy Arceri (6):</p>
<ul>
<li>gallium/pipebuffer: fix parenthesis location</li>
<li>glsl: always call do_lower_jumps() after loop unrolling</li>
<li>ac: add if/loop build helpers</li>
<li>radeonsi: make use of if/loop build helpers in ac</li>
<li>ac: make use of if/loop build helpers</li>
<li>mesa: free debug messages when destroying the debug state</li>
</ul>
<p>Xiong, James (1):</p>
<ul>
<li>i965: return the fourcc saved in __DRIimage when possible</li>
</ul>
</div>
</body>
</html>

View File

@@ -48,8 +48,8 @@ Note: some of the new features are only available with certain drivers.
<li>Disk shader cache support for i965 when MESA_GLSL_CACHE_DISABLE environment variable is set to "0" or "false"</li>
<li>GL_ARB_shader_atomic_counters and GL_ARB_shader_atomic_counter_ops on r600/evergreen+</li>
<li>GL_ARB_shader_image_load_store and GL_ARB_shader_image_size on r600/evergreen+</li>
<li>GL_ARB_shader_storage_buffer_object on r600/evergreen+</li>
<li>GL_ARB_compute_shader on r600/evergreen+</li>
<li>GL_ARB_shader_storage_buffer_object on r600/evergreen+<li>
<li>GL_ARB_compute_shader on r600/evergreen+<li>
<li>GL_ARB_cull_distance on r600/evergreen+</li>
<li>GL_ARB_enhanced_layouts on r600/evergreen+</li>
<li>GL_ARB_bindless_texture on nvc0/kepler</li>

View File

@@ -1,268 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.0 Release Notes / May 18 2018</h1>
<p>
Mesa 18.1.0 is a new development release. People who are concerned
with stability and reliability should stick with a previous release or
wait for Mesa 18.1.1.
</p>
<p>
Mesa 18.1.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
b1c1dbb42597190503d3abc518b12de880623f097c6cb6c293ecf69ae87e6fbf mesa-18.1.0.tar.gz
c855c5b67ef993b7621f76d8b120769ec0415f1c3616eaff44ef7f7f300aceba mesa-18.1.0.tar.xz
</pre>
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>OpenGL 3.1 with ARB_compatibility on nv50, nvc0, r600, radeonsi, softpipe, llvmpipe, svga</li>
<li>GL_ARB_bindless_texture on nvc0/maxwell+</li>
<li>GL_ARB_transform_feedback_overflow_query on nvc0</li>
<li>GL_EXT_semaphore on radeonsi</li>
<li>GL_EXT_semaphore_fd on radeonsi</li>
<li>GL_EXT_shader_framebuffer_fetch on i965 on desktop GL (GLES was already supported)</li>
<li>GL_EXT_shader_framebuffer_fetch_non_coherent on i965</li>
<li>GL_KHR_blend_equation_advanced on radeonsi</li>
<li>Disk shader cache support for i965 enabled by default</li>
</ul>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90311">Bug 90311</a> - Fail to build libglx with clang at linking stage</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91808">Bug 91808</a> - trine1 misrender r600g</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=95009">Bug 95009</a> - [SNB] amd_shader_trinary_minmax.execution.built-in-functions.gs-mid3-ivec2-ivec2-ivec2 intermittent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=95012">Bug 95012</a> - [SNB] glsl-1_50.execution.built-in-functions.gs-op tests intermittent</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=98281">Bug 98281</a> - 'message's in ctx-&gt;Debug.LogMessages[] seem to leak.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99549">Bug 99549</a> - pp: Failed to translate a shader</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100259">Bug 100259</a> - [EGL] [GBM] undefined reference to `gbm_bo_create_with_modifiers'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101408">Bug 101408</a> - [Gen8+] Xonotic fails to render one of the weapons</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=101442">Bug 101442</a> - Piglit shaders&#64;ssa&#64;fs-if-def-else-break fails with sb but passes with R600_DEBUG=nosb</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102342">Bug 102342</a> - mesa-17.1.7/src/gallium/auxiliary/pipebuffer/pb_cache.c:169]: (style) Suspicious condition</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102542">Bug 102542</a> - mesa-17.2.0/src/gallium/state_trackers/nine/nine_ff.c:1938: bad assignment ?</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102905">Bug 102905</a> - [R600] Miscompilation of TGSI to VLIW causes artifacts in Gallium Nine with Crysis2 bump mapping</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103006">Bug 103006</a> - [OpenGL CTS] [HSW] KHR-GL45.vertex_attrib_binding.basic-inputL-case1</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103142">Bug 103142</a> - R600g+sb: optimizer apparently stuck in an endless loop</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103626">Bug 103626</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103746">Bug 103746</a> - [BDW BSW SKL KBL] dEQP-GLES31.functional.copy_image regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104302">Bug 104302</a> - Wolfenstein 2 (2017) under wine graphical artifacting on RADV</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104335">Bug 104335</a> - [OpenGL CTS][SKL,KBL] KHR-GL45.vertex_attrib_64bit.limits_test occasionally fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104625">Bug 104625</a> - semicolon after if</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104636">Bug 104636</a> - [BSW/HD400] Aztec Ruins GL version GPU hangs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104642">Bug 104642</a> - Android: NULL pointer dereference with i965 mesa-dev, seems build_id_length related</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104654">Bug 104654</a> - r600/sb: Alien Isolation GPU lock</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104668">Bug 104668</a> - dEQP-GLES31.functional.shaders.linkage.uniform.block.differing_precision regression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104717">Bug 104717</a> - Rocket League: grass rendering broken with nir</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104732">Bug 104732</a> - [radv] Binding descriptor sets disturbs other pipeline bindings</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104741">Bug 104741</a> - Graphic corruption for Android apps Telegram and KineMaster</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104762">Bug 104762</a> - Various segfaults/problems in qt/plasma</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104777">Bug 104777</a> - Attaching multiple shader objects for the same stage to a GLSL program triggers a linker error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104794">Bug 104794</a> - piglit.spec.arb_internalformat_query2.samples and num_sample_counts pname checks</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104803">Bug 104803</a> - SIGSEGV in state_tracker/st_glsl_to_tgsi_temprename.cpp</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104863">Bug 104863</a> - 186 assertions in piglit</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104884">Bug 104884</a> - memory leak with intel i965 mesa when running android container in Ubuntu</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104905">Bug 104905</a> - SpvOpFOrdEqual doesn't return correct results for NaNs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104908">Bug 104908</a> - Texture Compression Hint not converted to enum16</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104915">Bug 104915</a> - Indexed SHADING_LANGUAGE_VERSION query not supported</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104923">Bug 104923</a> - anv: Dota2 rendering corruption</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104989">Bug 104989</a> - [r600] [bisected] OpenGL applications can't render anything at all</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105013">Bug 105013</a> - [regression] GLX+VA-API+clutter-gst video playback is corrupt with Mesa 17.3 (but is fine with 17.2)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105026">Bug 105026</a> - glxgears asserts with pp_jimenezmlaa=1</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105029">Bug 105029</a> - simdlib_512_avx512.inl:371:57: error: could not convert _mm512_mask_blend_epi32((__mmask16)(ImmT), a, b) from __m512i {aka __vector(8) long long int} to SIMDImpl::SIMD512Impl::Float</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105052">Bug 105052</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105065">Bug 105065</a> - Qt Programs occasionally fail to render with new Mesa (glGetProgramBinary)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105067">Bug 105067</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105088">Bug 105088</a> - brw_nir_uniforms.cpp:256:10: error: non-constant-expression cannot be narrowed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105098">Bug 105098</a> - [RADV] GPU freeze with simple Vulkan App</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105103">Bug 105103</a> - Wayland master causes Mesa to fail to compile</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105120">Bug 105120</a> - meson build broken</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105161">Bug 105161</a> - KHR_blend_equation_advanced doesn't work in GLSL 1.10-1.40 shaders</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105183">Bug 105183</a> - Weird assertion in NIR linker</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105211">Bug 105211</a> - build failure after zwp_dmabuf commit if wayland-protocols is not installed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105224">Bug 105224</a> - Webgl Pointclouds flickers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105229">Bug 105229</a> - [KBL SKL BDW HSW] [Regression] KHR-GLES31.core.shader_image_load_store.advanced-sso-simple failures</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105238">Bug 105238</a> - ast.h:648:16: error: union member 'i' has a non-trivial constructor</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105255">Bug 105255</a> - Waiting for fences without waitAll is not implemented</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105262">Bug 105262</a> - [R600] [BISECTED] ttf fonts are invisible in many programs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105271">Bug 105271</a> - WebGL2 shader crashes i965_dri.so 17.3.3</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105274">Bug 105274</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105290">Bug 105290</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105292">Bug 105292</a> - vkGetQueryPoolResults returns incorrect query status for large query buffers (bisected)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105317">Bug 105317</a> - The GPU Vega 56 was hang while try to pass #GraphicsFuzz shader15 test</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105320">Bug 105320</a> - Storage texel buffer access produces wrong results (RX Vega)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105374">Bug 105374</a> - texture3d, a SaschaWillems demo, assert fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105436">Bug 105436</a> - Blinking textures in UT2004 [bisected]</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105440">Bug 105440</a> - GEN7: rendering issue on citra</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105442">Bug 105442</a> - Hang when running nine ff lighting shader with radeonsi</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105444">Bug 105444</a> - Enable GL disk shader cache when transform feedback is enabled</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105464">Bug 105464</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105471">Bug 105471</a> - [g33] [bisected] dEQP-GLES2.functional.shaders failures</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105497">Bug 105497</a> - shader-db crashes on 72 core system after ast_type_qualifier bitset change</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105529">Bug 105529</a> - u_debug_stack.c:268: error: #pragma GCC diagnostic not allowed inside functions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105567">Bug 105567</a> - meson/ninja: 1. mesa/vdpau incorrect symlinks in DESTDIR and 2. Ddri-drivers-path Dvdpau-libs-path overrides DESTDIR</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105621">Bug 105621</a> - Build failure on GNOME Continuous</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105634">Bug 105634</a> - Android build test fails when building brw_oa_metrics.c</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105670">Bug 105670</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105704">Bug 105704</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105717">Bug 105717</a> - [bisected] Mesa build tests fails: BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105737">Bug 105737</a> - st_tests_common.cpp:140:42: error: no matching function for call to 'tgsi_get_opcode_info'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105738">Bug 105738</a> - commit f7ffa504a065dc2631fd38cc5fe885b277f4e7e7 causes artifacting in radv</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105740">Bug 105740</a> - glsl_types.cpp(524): error: a dynamically-initialized local static variable is not allowed inside of a statement expression</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105775">Bug 105775</a> - SI reaches the maximum IB size in dwords and fail to submit</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105807">Bug 105807</a> - [Regression, bisected]: 3D Rendering not working correctly in Warhammer 40k: Dawn of War II</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105817">Bug 105817</a> - scons build broken by glSpecializeShaderARB</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105820">Bug 105820</a> - [m32] piglit regressions relinking program without shaders</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105942">Bug 105942</a> - Graphical artefacts after update to mesa 18.0.0-2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105952">Bug 105952</a> - radv causes GPU hang on SI</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105960">Bug 105960</a> - [bisected] meson build test fails with: undefined reference to `etna_pm_create_query'</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105994">Bug 105994</a> - surface state leak when creating and destroying image views with aspectMask depth and stencil</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106074">Bug 106074</a> - radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106126">Bug 106126</a> - eglMakeCurrent does not always ensure dri_drawable-&gt;update_drawable_info has been called for a new EGLSurface if another has been created and destroyed first</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106131">Bug 106131</a> - meson/ninja build missing file gtest.h</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106133">Bug 106133</a> - make check &quot;OSError: [Errno 24] Too many open files&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106147">Bug 106147</a> - SIGBUS in write_reloc() when Sacha Willems' &quot;texture3d&quot; Vulkan demo starts</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106174">Bug 106174</a> - vulkan dota2 broken (segfaulting), found bug commit</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106180">Bug 106180</a> - [bisected] radv vulkan smoke test black screen (Add support for DRI3 v1.2)</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106243">Bug 106243</a> - [kbl] GPU HANG: 9:0:0x85dffffb, in Cinnamon</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106450">Bug 106450</a> - </li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106462">Bug 106462</a> - piglit.spec.arb_vertex_array_bgra.get regression</li>
</ul>
<h2>Changes</h2>
<ul>
<li>Remove incomplete GLX_SGIX_swap_barrier stubs from the Xlib libGL</li>
<li>Remove incomplete GLX_SGIX_swap_group stubs from the Xlib libGL</li>
</ul>
</div>
</body>
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<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.1 Release Notes / June 1 2018</h1>
<p>
Mesa 18.1.1 is a bug fix release which fixes bugs found since the 18.1.0 release.
</p>
<p>
Mesa 18.1.1 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
366a35f7530a016f2a8284fb0ee5759eeb216b4d6fa47f0e96b89ad2e43faf96 mesa-18.1.1.tar.gz
d3312a2ede5aac14a47476b208b8e3a401367838330197c4588ab8ad420d7781 mesa-18.1.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>None<p>
<h2>Changes</h2>
<p>Anuj Phogat (1):</p>
<ul>
<li>i965/glk: Add l3 banks count for 2x6 configuration</li>
</ul>
<p>Bas Nieuwenhuizen (7):</p>
<ul>
<li>radv: Fix multiview queries.</li>
<li>radv: Translate logic ops.</li>
<li>radv: Fix up 2_10_10_10 alpha sign.</li>
<li>radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.</li>
<li>amd/addrlib: Use defines in autotools build.</li>
<li>radv: Fix SRGB compute copies.</li>
<li>radv: Only expose subgroup shuffles on VI+.</li>
</ul>
<p>Christoph Haag (1):</p>
<ul>
<li>radv: fix VK_EXT_descriptor_indexing</li>
</ul>
<p>Dave Airlie (5):</p>
<ul>
<li>radv/resolve: do fmask decompress on all layers.</li>
<li>radv: resolve all layers in compute resolve path.</li>
<li>radv: use compute path for multi-layer images.</li>
<li>virgl: set texture buffer offset alignment to disable ARB_texture_buffer_range.</li>
<li>tgsi/scan: add hw atomic to the list of memory accessing files</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>docs: Add sha sums for release</li>
<li>VERSION: bump to 18.1.1 for next release</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>vulkan: don't free uninitialised memory</li>
</ul>
<p>Francisco Jerez (4):</p>
<ul>
<li>Revert "mesa: simplify _mesa_is_image_unit_valid for buffers"</li>
<li>i965: Move buffer texture size calculation into a common helper function.</li>
<li>i965: Handle non-zero texture buffer offsets in buffer object range calculation.</li>
<li>i965: Use intel_bufferobj_buffer() wrapper in image surface state setup.</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>nv30: ensure that displayable formats are marked accordingly</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>eg/compute: Use reference counting to handle compute memory pool.</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>intel/eu: Set EXECUTE_1 when setting the rounding mode in cr0</li>
<li>intel/blorp: Support blits and clears on surfaces with offsets</li>
</ul>
<p>Jose Dapena Paz (1):</p>
<ul>
<li>mesa: do not leak ctx-&gt;Shader.ReferencedProgram references</li>
</ul>
<p>Kai Wasserbäch (1):</p>
<ul>
<li>opencl: autotools: Fix linking order for OpenCL target</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>st/mesa: simplify lastLevel determination in st_finalize_texture</li>
<li>radeonsi: fix incorrect parentheses around VS-PS varying elimination</li>
<li>mesa: handle GL_UNSIGNED_INT64_ARB properly (v2)</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>dri3: Stricter SBC wraparound handling</li>
</ul>
<p>Nanley Chery (4):</p>
<ul>
<li>i965: Add and use a getter for the miptree aux buffer</li>
<li>i965: Add and use a single miptree aux_buf field</li>
<li>i965/miptree: Fix handling of uninitialized MCS buffers</li>
<li>i965/miptree: Zero-initialize CCS_D buffers</li>
</ul>
<p>Samuel Pitoiset (2):</p>
<ul>
<li>spirv: fix visiting inner loops with same break/continue block</li>
<li>radv: fix centroid interpolation</li>
</ul>
<p>Stuart Young (1):</p>
<ul>
<li>etnaviv: Fix missing rnndb file in tarballs</li>
</ul>
<p>Thierry Reding (3):</p>
<ul>
<li>tegra: Treat resources with modifiers as scanout</li>
<li>tegra: Fix scanout resources without modifiers</li>
<li>tegra: Remove usage of non-stable UAPI</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>mesa: add glUniform*ui{v} support to display lists</li>
</ul>
</div>
</body>
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<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.2 Release Notes / June 15 2018</h1>
<p>
Mesa 18.1.2 is a bug fix release which fixes bugs found since the 18.1.1 release.
</p>
<p>
Mesa 18.1.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
a644df23937f4078a2bd9a54349f6315c1955f5e3a4ac272832da51dea4d3c11 mesa-18.1.1.tar.gz
070bf0648ba5b242d7303ceed32aed80842f4c0ba16e5acc1a650a46eadfb1f9 mesa-18.1.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>None<p>
<h2>Changes</h2>
<p>Alex Smith (4):</p>
<ul>
<li>radv: Consolidate GFX9 merged shader lookup logic</li>
<li>radv: Handle GFX9 merged shaders in radv_flush_constants()</li>
<li>radeonsi: Fix crash on shaders using MSAA image load/store</li>
<li>radv: Set active_stages the same whether or not shaders were cached</li>
</ul>
<p>Andrew Galante (2):</p>
<ul>
<li>meson: Test for __atomic_add_fetch in atomic checks</li>
<li>configure.ac: Test for __atomic_add_fetch in atomic checks</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>radv: Don't pass a TESS_EVAL shader when tesselation is not enabled.</li>
</ul>
<p>Cameron Kumar (1):</p>
<ul>
<li>vulkan/wsi: Destroy swapchain images after terminating FIFO queues</li>
</ul>
<p>Dylan Baker (6):</p>
<ul>
<li>docs/relnotes: Add sha256 sums for mesa 18.1.1</li>
<li>cherry-ignore: add commits not to pull</li>
<li>cherry-ignore: Add patches from Jason that he rebased on 18.1</li>
<li>meson: work around gentoo applying -m32 to host compiler in cross builds</li>
<li>cherry-ignore: Add another patch</li>
<li>version: bump version for 18.1.2 release</li>
</ul>
<p>Eric Engestrom (3):</p>
<ul>
<li>autotools: add missing android file to package</li>
<li>configure: radv depends on mako</li>
<li>i965: fix resource leak</li>
</ul>
<p>Jason Ekstrand (10):</p>
<ul>
<li>intel/eu: Add some brw_get_default_ helpers</li>
<li>intel/eu: Copy fields manually in brw_next_insn</li>
<li>intel/eu: Set flag [sub]register number differently for 3src</li>
<li>intel/blorp: Don't vertex fetch directly from clear values</li>
<li>intel/isl: Add bounds-checking assertions in isl_format_get_layout</li>
<li>intel/isl: Add bounds-checking assertions for the format_info table</li>
<li>i965/screen: Refactor query_dma_buf_formats</li>
<li>i965/screen: Use RGBA non-sRGB formats for images</li>
<li>anv: Set fence/semaphore types to NONE in impl_cleanup</li>
<li>i965/screen: Return false for unsupported formats in query_modifiers</li>
</ul>
<p>Jordan Justen (1):</p>
<ul>
<li>mesa/program_binary: add implicit UseProgram after successful ProgramBinary</li>
</ul>
<p>Juan A. Suarez Romero (1):</p>
<ul>
<li>glsl: Add ir_binop_vector_extract in NIR</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>i965: Fix batch-last mode to properly swap BOs.</li>
<li>anv: Disable __gen_validate_value if NDEBUG is set.</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>r300g/swtcl: make pipe_context uploaders use malloc'd memory as before</li>
</ul>
<p>Matt Turner (1):</p>
<ul>
<li>meson: Fix -latomic check</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>glx: Fix number of property values to read in glXImportContextEXT</li>
</ul>
<p>Nicolas Boichat (1):</p>
<ul>
<li>configure.ac/meson.build: Fix -latomic test</li>
</ul>
<p>Philip Rebohle (1):</p>
<ul>
<li>radv: Use correct color format for fast clears</li>
</ul>
<p>Samuel Pitoiset (3):</p>
<ul>
<li>radv: fix a GPU hang when MRTs are sparse</li>
<li>radv: fix missing ZRANGE_PRECISION(1) for GFX9+</li>
<li>radv: add a workaround for DXVK hangs by setting amdgpu-skip-threshold</li>
</ul>
<p>Scott D Phillips (1):</p>
<ul>
<li>intel/tools: add intel_sanitize_gpu to EXTRA_DIST</li>
</ul>
<p>Thomas Petazzoni (1):</p>
<ul>
<li>configure.ac: rework -latomic check</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>ac: fix possible truncation of intrinsic name</li>
<li>radeonsi: fix possible truncation on renderer string</li>
</ul>
</div>
</body>
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.3 Release Notes / June 29 2018</h1>
<p>
Mesa 18.1.3 is a bug fix release which fixes bugs found since the 18.1.2 release.
</p>
<p>
Mesa 18.1.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
2a1e36280d01ad18ba6d5b3fbd653ceaa109eaa031b78eb5dfaa4df452742b66 mesa-18.1.3.tar.gz
54f08deeda0cd2f818e8d40140040ed013de7852573002453b7f50da9ea738ce mesa-18.1.3.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105396">Bug 105396</a> - tc compatible htile sets depth of htiles of discarded fragments to 1.0</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=105399">Bug 105399</a> - [snb] GPU hang: after geometry shader emits no geometry, the program hangs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106756">Bug 106756</a> - Wine 3.9 crashes with DXVK on Just Cause 3 and Quantum Break on VEGA but works ON POLARIS</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106774">Bug 106774</a> - GLSL IR copy propagates loads of SSBOs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106903">Bug 106903</a> - radv: Fragment shader output goes to wrong attachments when render targets are sparse</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106907">Bug 106907</a> - Correct Transform Feedback Varyings information is expected after using ProgramBinary</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106912">Bug 106912</a> - radv: 16-bit depth buffer causes artifacts in Shadow Warrior 2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106980">Bug 106980</a> - Basemark GPU vulkan benchmark fails.</li>
</ul>
<h2>Changes</h2>
<p>Andrii Simiklit (1):</p>
<ul>
<li>i965/gen6/gs: Handle case where a GS doesn't allocate VUE</li>
</ul>
<p>Bas Nieuwenhuizen (2):</p>
<ul>
<li>radv: Fix output for sparse MRTs.</li>
<li>ac/surface: Set compressZ for stencil-only surfaces.</li>
</ul>
<p>Christian Gmeiner (1):</p>
<ul>
<li>util/bitset: include util/macro.h</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>glsl: allow standalone semicolons outside main()</li>
</ul>
<p>Dylan Baker (8):</p>
<ul>
<li>docs: Add release notes for 18.1.2</li>
<li>cherry-ignore: Add 587e712eda95c31d88ea9d20e59ad0ae59afef4f</li>
<li>meson: Fix auto option for va</li>
<li>meson: Fix auto option for xvmc</li>
<li>meson: Correct behavior of vdpau=auto</li>
<li>cherry-ignore: Ignore cac7ab1192eefdd8d8b3f25053fb006b5c330eb8</li>
<li>cherry-ignore: add a2f5292c82ad07731d633b36a663e46adc181db9</li>
<li>VERSION: bump version to 18.1.3</li>
</ul>
<p>Emil Velikov (2):</p>
<ul>
<li>configure: use compliant grep regex checks</li>
<li>glsl/tests/glcpp: reinstate "error out if no tests found"</li>
</ul>
<p>Eric Engestrom (3):</p>
<ul>
<li>radv: fix reported number of available VGPRs</li>
<li>radv: fix bitwise check</li>
<li>meson: fix i965/anv/isl genX static lib names</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>glsl: Don't copy propagate from SSBO or shared variables either</li>
<li>glsl: Don't copy propagate elements from SSBO or shared variables either</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>nir: Handle call instructions in foreach_src</li>
<li>nir/validate: Use the type from the tail of call parameter derefs</li>
</ul>
<p>Lukas Rusak (2):</p>
<ul>
<li>meson: only build vl_winsys_dri.c when x11 platform is used</li>
<li>meson: fix private libs when building without glx</li>
</ul>
<p>Marek Olšák (5):</p>
<ul>
<li>radeonsi/gfx9: fix si_get_buffer_from_descriptors for 48-bit pointers</li>
<li>ac/gpu_info: report real total memory sizes</li>
<li>ac/gpu_info: add kernel_flushes_hdp_before_ib</li>
<li>radeonsi: always put persistent buffers into GTT on radeon</li>
<li>mesa: fix glGetInteger64v for arrays of integers</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>freedreno/ir3: fix base_vertex</li>
</ul>
<p>Samuel Pitoiset (6):</p>
<ul>
<li>radv: don't fast clear HTILE for 16-bit depth surfaces on GFX8</li>
<li>radv: update the ZRANGE_PRECISION value for the TC-compat bug</li>
<li>radv: fix emitting the TCS regs on GFX9</li>
<li>radv: fix HTILE metadata initialization in presence of subpass clears</li>
<li>radv: ignore pInheritanceInfo for primary command buffers</li>
<li>radv: use separate bind points for the dynamic buffers</li>
</ul>
<p>Tapani Pälli (1):</p>
<ul>
<li>glsl: serialize data from glTransformFeedbackVaryings</li>
</ul>
<p>Tomeu Vizoso (1):</p>
<ul>
<li>virgl: Remove debugging left-overs</li>
</ul>
</div>
</body>
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@@ -1,150 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.4 Release Notes / July 13 2018</h1>
<p>
Mesa 18.1.4 is a bug fix release which fixes bugs found since the 18.1.3 release.
</p>
<p>
Mesa 18.1.4 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
SHA256: 8acd42e4ac4d1e96ed22344073b3d4fef03d10f225f4eaf3f88c001dfc10e2db mesa-18.1.4.tar.gz
SHA256: 3061488b5d85504092cf4343816cfb2d96f2ad9bc2edec31fc96933d184cf58b mesa-18.1.4.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106906">Bug 106906</a> - Failed to recongnize keyword “sampler2DRect” and &quot;sampler2DRectShadow&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=106928">Bug 106928</a> - When starting a match Rocket League crashes on &quot;Go&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107193">Bug 107193</a> - piglit.spec.arb_compute_shader.linker.bug-93840 fails</li>
</ul>
<h2>Changes</h2>
<p>Adam Jackson (1):</p>
<ul>
<li>glx: Don't allow glXMakeContextCurrent() with only one valid drawable</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>r600/sb: cleanup if_conversion iterator to be legal C++</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>docs: Add SHA256 sums to notes for 18.1.3</li>
<li>Bump version for release</li>
</ul>
<p>Iago Toral Quiroga (3):</p>
<ul>
<li>anv/cmd_buffer: make descriptors dirty when emitting base state address</li>
<li>anv/cmd_buffer: clean dirty push constants flag after emitting push constants</li>
<li>anv/cmd_buffer: never shrink the push constant buffer size</li>
</ul>
<p>Ian Romanick (4):</p>
<ul>
<li>i965/vec4: Don't cmod propagate from CMP to ADD if the writemask isn't compatible</li>
<li>intel/compiler: Relax mixed type restriction for saturating immediates</li>
<li>i965/vec4: Properly handle sign(-abs(x))</li>
<li>i965/fs: Properly handle sign(-abs(x))</li>
</ul>
<p>Jason Ekstrand (3):</p>
<ul>
<li>intel/fs: Split instructions low to high in lower_simd_width</li>
<li>anv: Be more careful about hashing pipeline layouts</li>
<li>intel/fs: Mark LINTERP opcode as writing accumulator on platforms without PLN</li>
</ul>
<p>Jose Maria Casanova Crespo (3):</p>
<ul>
<li>i965/fs: Register allocator shoudn't use grf127 for sends dest</li>
<li>intel/compiler: grf127 can not be dest when src and dest overlap in send</li>
<li>i965/fs: unspills shoudn't use grf127 as dest since Gen8+</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>i965: fix clear color bo address relocation</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>radeonsi: fix memory exhaustion issue with DCC statistics gathering with DRI2</li>
<li>glsl/cache: save and restore ExternalSamplersUsed</li>
<li>st/dri: fix a crash in server_wait_sync</li>
</ul>
<p>Neil Roberts (1):</p>
<ul>
<li>i965: Fix output register sizes when variable ranges are interleaved</li>
</ul>
<p>Rhys Perry (1):</p>
<ul>
<li>nvc0/ir: fix TargetNVC0::insnCanLoadOffset()</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>r600/sb: fix crash in fold_alu_op3</li>
</ul>
<p>Ross Burton (1):</p>
<ul>
<li>egl: fix build race in automake</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: fix emitting the view index on GFX9</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>glsl: skip comparison opt when adding vars of different size</li>
<li>nir: fix selection of loop terminator when two or more have the same limit</li>
</ul>
<p>zhaowei yuan (1):</p>
<ul>
<li>glsl: Treat sampler2DRect and sampler2DRectShadow as reserved in ES2</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,183 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.1.4 Release Notes / July 13 2018</h1>
<p>
Mesa 18.1.5 is a bug fix release which fixes bugs found since the 18.1.4 release.
</p>
<p>
Mesa 18.1.5 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
SHA256: f966d5d5d373a5b8a16ed5036c1e7f05d4ad46d130f793bf9782c3ac9133a02e mesa-18.1.5.tar.gz
SHA256: 69dbe6f1a6660386f5beb85d4fcf003ee23023ed7b9a603de84e9a37e8d98dea mesa-18.1.5.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103274">Bug 103274</a> - BRW allocates too much heap memory</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107275">Bug 107275</a> - NIR segfaults after spirv-opt</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107295">Bug 107295</a> - Access violation on glDrawArrays with count &gt;= 2048</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107312">Bug 107312</a> - Mesa-git RPM build fails after commit 8cacf38f527d42e41441ef8c25d95d4b2f4e8602</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107366">Bug 107366</a> - NIR verification crashes on piglit tests</li>
</ul>
<h2>Changes</h2>
<p>Alex Smith (1):</p>
<ul>
<li>anv: Pay attention to VK_ACCESS_MEMORY_(READ|WRITE)_BIT</li>
</ul>
<p>Bas Nieuwenhuizen (7):</p>
<ul>
<li>radv: Select correct entries for binning.</li>
<li>radv: Fix number of samples used for binning.</li>
<li>radv: Disable disabled color buffers in rbplus opts.</li>
<li>nir: Do not use continue block after removing it.</li>
<li>util/disk_cache: Fix disk_cache_get_function_timestamp with disabled cache.</li>
<li>nir: Fix end of function without return warning/error.</li>
<li>radv: Still enable inmemory &amp; API level caching if disk cache is not enabled.</li>
</ul>
<p>Chad Versace (2):</p>
<ul>
<li>anv/android: Fix type error in call to vk_errorf()</li>
<li>anv/android: Fix Autotools build for VK_ANDROID_native_buffer</li>
</ul>
<p>Chih-Wei Huang (1):</p>
<ul>
<li>Android: fix a missing nir_intrinsics.h error</li>
</ul>
<p>Danylo Piliaiev (1):</p>
<ul>
<li>i965: Sweep NIR after linking phase to free held memory</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>r600: enable tess_input_info for TES</li>
</ul>
<p>Dylan Baker (5):</p>
<ul>
<li>docs: Add sha256 sums for 18.1.4 tarballs</li>
<li>cherry-ignore: add 4a67ce886a7b3def5f66c1aedf9e5436d157a03c</li>
<li>cherry-ignore: Add 1f616a840eac02241c585d28e9dac8f19a297f39</li>
<li>cherry-ignore: add 11712b9ca17e4e1a819dcb7d020e19c6da77bc90</li>
<li>bump version to 18.1.5</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>vc4: Don't automatically reallocate a PERSISTENT-mapped buffer.</li>
<li>meson: Move xvmc test tools from unit tests to installed tools.</li>
</ul>
<p>Harish Krupo (1):</p>
<ul>
<li>egl: Fix missing clamping in eglSetDamageRegionKHR</li>
</ul>
<p>Jan Vesely (3):</p>
<ul>
<li>radeonsi: Refuse to accept code with unhandled relocations</li>
<li>clover: Report error when pipe driver fails to create compute state</li>
<li>clover: Catch errors from executing event action</li>
</ul>
<p>Jason Ekstrand (6):</p>
<ul>
<li>anv: Stop setting 3DSTATE_PS_EXTRA::PixelShaderHasUAV</li>
<li>nir/serialize: Alloc constants off the variable</li>
<li>blorp: Handle the RGB workaround more like other workarounds</li>
<li>intel/blorp: Handle 3-component formats in clears</li>
<li>intel/compiler: Account for built-in uniforms in analyze_ubo_ranges</li>
<li>spirv: Fix a couple of image atomic load/store bugs</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>gallium/tests: Don't ignore S3TC errors.</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nir: fix printing of vec16 type</li>
</ul>
<p>Lepton Wu (1):</p>
<ul>
<li>virgl: Fix flush in virgl_encoder_inline_write.</li>
</ul>
<p>Lucas Stach (1):</p>
<ul>
<li>st/mesa: call resource_changed when binding a EGLImage to a texture</li>
</ul>
<p>Mauro Rossi (2):</p>
<ul>
<li>radv: winsys/amdgpu: include missing pthread.h header</li>
<li>android: util/disk_cache: fix building errors in gallium drivers</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>gallium: Check pipe_screen::resource_changed before dereferencing it</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>draw: force draw pipeline if there's more than 65535 vertices</li>
</ul>
<p>Samuel Iglesias Gonsálvez (1):</p>
<ul>
<li>anv: fix assert in anv_CmdBindDescriptorSets()</li>
</ul>
<p>Samuel Pitoiset (3):</p>
<ul>
<li>radv: make sure to wait for CP DMA when needed</li>
<li>radv: emit a dummy ZPASS_DONE to prevent GPU hangs on GFX9</li>
<li>radv: fix a memleak for merged shaders on GFX9</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,75 +0,0 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.0 Release Notes / TBD</h1>
<p>
Mesa 18.2.0 is a new development release. People who are concerned
with stability and reliability should stick with a previous release or
wait for Mesa 18.2.1.
</p>
<p>
Mesa 18.2.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<p>
libwayland-egl is now distributed by Wayland (since 1.15,
<a href="https://lists.freedesktop.org/archives/wayland-devel/2018-April/037767.html">see announcement</a>),
and has been removed from Mesa in this release. Make sure you're using
an up-to-date version of Wayland to keep the functionality.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD.
</pre>
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>OpenGL 4.3 on virgl</li>
<li>OpenGL 4.4 Compatibility profile on radeonsi</li>
<li>OpenGL ES 3.2 on radeonsi and virgl</li>
<li>GL_ARB_ES3_2_compatibility on radeonsi</li>
<li>GL_ARB_fragment_shader_interlock on i965</li>
<li>GL_ARB_sample_locations and GL_NV_sample_locations on nvc0 (GM200+)</li>
<li>GL_ANDROID_extension_pack_es31a on radeonsi.</li>
<li>GL_KHR_texture_compression_astc_ldr on radeonsi</li>
</ul>
<h2>Bug fixes</h2>
<h2>Changes</h2>
<ul>
<li>Removed GL_EXT_polygon_offset applications should use glPolygonOffset instead.</li>
<li>Removed libwayland-egl, now part of Wayland</li>
</ul>
</div>
</body>
</html>

View File

@@ -1,81 +0,0 @@
Name
MESA_framebuffer_flip_y
Name Strings
GL_MESA_framebuffer_flip_y
Contact
Fritz Koenig <frkoenig@google.com>
Contributors
Fritz Koenig, Google
Kristian Høgsberg, Google
Chad Versace, Google
Status
Proposal
Version
Version 1, June 7, 2018
Number
302
Dependencies
OpenGL ES 3.1 is required, for FramebufferParameteri.
Overview
This extension defines a new framebuffer parameter,
GL_FRAMEBUFFER_FLIP_Y_MESA, that changes the behavior of the reads and
writes to the framebuffer attachment points. When GL_FRAMEBUFFER_FLIP_Y_MESA
is GL_TRUE, render commands and pixel transfer operations access the
backing store of each attachment point with an y-inverted coordinate
system. This y-inversion is relative to the coordinate system set when
GL_FRAMEBUFFER_FLIP_Y_MESA is GL_FALSE.
Access through TexSubImage2D and similar calls will notice the effect of
the flip when they are not attached to framebuffer objects because
GL_FRAMEBUFFER_FLIP_Y_MESA is associated with the framebuffer object and
not the attachment points.
IP Status
None
Issues
None
New Procedures and Functions
None
New Types
None
New Tokens
Accepted by the <pname> argument of FramebufferParameteri and
GetFramebufferParameteriv:
GL_FRAMEBUFFER_FLIP_Y_MESA 0x8BBB
Errors
An INVALID_OPERATION error is generated by GetFramebufferParameteriv if the
default framebuffer is bound to <target> and <pname> is FRAMEBUFFER_FLIP_Y_MESA.
Revision History
Version 1, June, 2018
Initial draft (Fritz Koenig)

View File

@@ -71,9 +71,6 @@ GL_MESA_tile_raster_order
GL_TILE_RASTER_ORDER_INCREASING_X_MESA 0x8BB9
GL_TILE_RASTER_ORDER_INCREASING_Y_MESA 0x8BBA
GL_MESA_framebuffer_flip_y
GL_FRAMEBUFFER_FLIP_Y_MESA 0x8BBB
EGL_MESA_drm_image
EGL_DRM_BUFFER_FORMAT_MESA 0x31D0
EGL_DRM_BUFFER_USE_MESA 0x31D1

View File

@@ -36,7 +36,7 @@
perhaps, in very trivial cases.)
<li>Code patches should follow Mesa
<a href="codingstyle.html" target="_parent">coding conventions</a>.
<li>Whenever possible, patches should only affect individual Mesa/Gallium
<li>Whenever possible, patches should only effect individual Mesa/Gallium
components.
<li>Patches should never introduce build breaks and should be bisectable (see
<code>git bisect</code>.)
@@ -122,9 +122,9 @@ Please use common sense and do <strong>not</strong> blindly add everyone.
<pre>
$ scripts/get_reviewer.pl --help # to get the help screen
$ scripts/get_reviewer.pl -f src/egl/drivers/dri2/platform_android.c
Rob Herring &lt;robh@kernel.org&gt; (reviewer:ANDROID EGL SUPPORT,added_lines:188/700=27%,removed_lines:58/283=20%)
Tomasz Figa &lt;tfiga@chromium.org&gt; (reviewer:ANDROID EGL SUPPORT,authored:12/41=29%,added_lines:308/700=44%,removed_lines:115/283=41%)
Emil Velikov &lt;emil.l.velikov@gmail.com&gt; (authored:13/41=32%,removed_lines:76/283=27%)
Rob Herring <robh@kernel.org> (reviewer:ANDROID EGL SUPPORT,added_lines:188/700=27%,removed_lines:58/283=20%)
Tomasz Figa <tfiga@chromium.org> (reviewer:ANDROID EGL SUPPORT,authored:12/41=29%,added_lines:308/700=44%,removed_lines:115/283=41%)
Emil Velikov <emil.l.velikov@gmail.com> (authored:13/41=32%,removed_lines:76/283=27%)
</pre>
</ul>
@@ -246,10 +246,6 @@ release.
Note: resending patch identical to one on mesa-dev@ or one that differs only
by the extra mesa-stable@ tag is <strong>not</strong> recommended.
</p>
<p>
If you are not the author of the original patch, please Cc: them in your
nomination request.
</p>
<h3 id="thetag">The stable tag</h3>

View File

@@ -31,7 +31,7 @@
<dd>is a very useful tool for tracking down
memory-related problems in your code.</dd>
<dt><a href="https://scan.coverity.com/projects/mesa">Coverity</a></dt>
<dt><a href="https://scan.coverity.com/projects/mesa">Coverity</a><dt>
<dd>provides static code analysis of Mesa. If you create an account
you can see the results and try to fix outstanding issues.</dd>
</dl>

View File

@@ -18,8 +18,8 @@
<p>
This page lists known issues with
<a href="https://www.spec.org/gwpg/gpc.static/vp11info.html">SPEC Viewperf 11</a>
and <a href="https://www.spec.org/gwpg/gpc.static/vp12info.html">SPEC Viewperf 12</a>
<a href="https://www.spec.org/gwpg/gpc.static/vp11info.html" target="_main">SPEC Viewperf 11</a>
and <a href="https://www.spec.org/gwpg/gpc.static/vp12info.html" target="_main">SPEC Viewperf 12</a>
when running on Mesa-based drivers.
</p>
@@ -66,10 +66,13 @@ either in Viewperf or the Mesa driver.
<p>
These tests use features of the
<a href="https://www.opengl.org/registry/specs/NV/fragment_program2.txt">GL_NV_fragment_program2</a>
and
<a href="https://www.opengl.org/registry/specs/NV/vertex_program3.txt">GL_NV_vertex_program3</a>
extensions without checking if the driver supports them.
<a href="https://www.opengl.org/registry/specs/NV/fragment_program2.txt"
target="_main">
GL_NV_fragment_program2</a> and
<a href="https://www.opengl.org/registry/specs/NV/vertex_program3.txt"
target="_main">
GL_NV_vertex_program3</a> extensions without checking if the driver supports
them.
</p>
<p>
When Mesa tries to compile the vertex/fragment programs it generates errors
@@ -83,8 +86,8 @@ Subsequent drawing calls become no-ops and the rendering is incorrect.
<p>
These tests depend on the
<a href="https://www.opengl.org/registry/specs/NV/primitive_restart.txt">GL_NV_primitive_restart</a>
extension.
<a href="https://www.opengl.org/registry/specs/NV/primitive_restart.txt"
target="_main">GL_NV_primitive_restart</a> extension.
</p>
<p>
@@ -121,7 +124,7 @@ never specified.
<p>
A trace captured with
<a href="https://github.com/apitrace/apitrace">API trace</a>
<a href="https://github.com/apitrace/apitrace" target="_main">API trace</a>
shows this sequences of calls like this:
<pre>

View File

@@ -933,7 +933,6 @@ EGLAPI EGLSurface EGLAPIENTRY eglCreatePixmapSurfaceHI (EGLDisplay dpy, EGLConfi
#define EGL_DRM_BUFFER_STRIDE_MESA 0x31D4
#define EGL_DRM_BUFFER_USE_SCANOUT_MESA 0x00000001
#define EGL_DRM_BUFFER_USE_SHARE_MESA 0x00000002
#define EGL_DRM_BUFFER_USE_CURSOR_MESA 0x00000004
typedef EGLImageKHR (EGLAPIENTRYP PFNEGLCREATEDRMIMAGEMESAPROC) (EGLDisplay dpy, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLEXPORTDRMIMAGEMESAPROC) (EGLDisplay dpy, EGLImageKHR image, EGLint *name, EGLint *handle, EGLint *stride);
#ifdef EGL_EGLEXT_PROTOTYPES

View File

@@ -34,6 +34,13 @@ extern "C" {
#include <EGL/eglplatform.h>
#ifdef EGL_MESA_drm_image
/* Mesa's extension to EGL_MESA_drm_image... */
#ifndef EGL_DRM_BUFFER_USE_CURSOR_MESA
#define EGL_DRM_BUFFER_USE_CURSOR_MESA 0x0004
#endif
#endif
#ifndef EGL_WL_bind_wayland_display
#define EGL_WL_bind_wayland_display 1

View File

@@ -104,12 +104,6 @@ typedef struct ANativeWindow* EGLNativeWindowType;
typedef struct egl_native_pixmap_t* EGLNativePixmapType;
typedef void* EGLNativeDisplayType;
#elif defined(USE_OZONE)
typedef intptr_t EGLNativeDisplayType;
typedef intptr_t EGLNativeWindowType;
typedef intptr_t EGLNativePixmapType;
#elif defined(__unix__) || defined(__APPLE__)
#if defined(MESA_EGL_NO_X11_HEADERS)
@@ -130,13 +124,11 @@ typedef Window EGLNativeWindowType;
#endif /* MESA_EGL_NO_X11_HEADERS */
#elif defined(__HAIKU__)
#elif __HAIKU__
#include <kernel/image.h>
typedef void *EGLNativeDisplayType;
typedef khronos_uintptr_t EGLNativePixmapType;
typedef khronos_uintptr_t EGLNativeWindowType;
typedef void *EGLNativeDisplayType;
typedef khronos_uintptr_t EGLNativePixmapType;
typedef khronos_uintptr_t EGLNativeWindowType;
#else
#error "Platform not recognized"

View File

@@ -47,9 +47,9 @@
# define GLAPI __declspec(dllimport)
# else /* for use with static link lib build of Win32 edition only */
# define GLAPI extern
# endif
# endif /* _STATIC_MESA support */
# if defined(__MINGW32__) && defined(GL_NO_STDCALL) || defined(UNDER_CE) /* The generated DLLs by MingW with STDCALL are not compatible with the ones done by Microsoft's compilers */
# define GLAPIENTRY
# define GLAPIENTRY
# else
# define GLAPIENTRY __stdcall
# endif

View File

@@ -82,7 +82,7 @@ typedef struct __DRI2flushExtensionRec __DRI2flushExtension;
typedef struct __DRI2throttleExtensionRec __DRI2throttleExtension;
typedef struct __DRI2fenceExtensionRec __DRI2fenceExtension;
typedef struct __DRI2interopExtensionRec __DRI2interopExtension;
typedef struct __DRI2blobExtensionRec __DRI2blobExtension;
typedef struct __DRIimageLoaderExtensionRec __DRIimageLoaderExtension;
typedef struct __DRIimageDriverExtensionRec __DRIimageDriverExtension;
@@ -336,30 +336,6 @@ struct __DRI2throttleExtensionRec {
enum __DRI2throttleReason reason);
};
/**
* Extension for EGL_ANDROID_blob_cache
*/
#define __DRI2_BLOB "DRI2_Blob"
#define __DRI2_BLOB_VERSION 1
typedef void
(*__DRIblobCacheSet) (const void *key, signed long keySize,
const void *value, signed long valueSize);
typedef signed long
(*__DRIblobCacheGet) (const void *key, signed long keySize,
void *value, signed long valueSize);
struct __DRI2blobExtensionRec {
__DRIextension base;
/**
* Set cache functions for setting and getting cache entries.
*/
void (*set_cache_funcs) (__DRIscreen *screen,
__DRIblobCacheSet set, __DRIblobCacheGet get);
};
/**
* Extension for fences / synchronization objects.
@@ -589,7 +565,7 @@ struct __DRIdamageExtensionRec {
* SWRast Loader extension.
*/
#define __DRI_SWRAST_LOADER "DRI_SWRastLoader"
#define __DRI_SWRAST_LOADER_VERSION 4
#define __DRI_SWRAST_LOADER_VERSION 3
struct __DRIswrastLoaderExtensionRec {
__DRIextension base;
@@ -631,24 +607,6 @@ struct __DRIswrastLoaderExtensionRec {
void (*getImage2)(__DRIdrawable *readable,
int x, int y, int width, int height, int stride,
char *data, void *loaderPrivate);
/**
* Put shm image to drawable
*
* \since 4
*/
void (*putImageShm)(__DRIdrawable *drawable, int op,
int x, int y, int width, int height, int stride,
int shmid, char *shmaddr, unsigned offset,
void *loaderPrivate);
/**
* Get shm image from readable
*
* \since 4
*/
void (*getImageShm)(__DRIdrawable *readable,
int x, int y, int width, int height,
int shmid, void *loaderPrivate);
};
/**
@@ -1269,9 +1227,6 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_FORMAT_R16 0x100d
#define __DRI_IMAGE_FORMAT_GR1616 0x100e
#define __DRI_IMAGE_FORMAT_YUYV 0x100f
#define __DRI_IMAGE_FORMAT_XBGR2101010 0x1010
#define __DRI_IMAGE_FORMAT_ABGR2101010 0x1011
#define __DRI_IMAGE_FORMAT_SABGR8 0x1012
#define __DRI_IMAGE_USE_SHARE 0x0001
#define __DRI_IMAGE_USE_SCANOUT 0x0002
@@ -1308,7 +1263,6 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_FOURCC_ABGR8888 0x34324241
#define __DRI_IMAGE_FOURCC_XBGR8888 0x34324258
#define __DRI_IMAGE_FOURCC_SARGB8888 0x83324258
#define __DRI_IMAGE_FOURCC_SABGR8888 0x84324258
#define __DRI_IMAGE_FOURCC_ARGB2101010 0x30335241
#define __DRI_IMAGE_FOURCC_XRGB2101010 0x30335258
#define __DRI_IMAGE_FOURCC_ABGR2101010 0x30334241

View File

@@ -2334,11 +2334,6 @@ GL_APICALL void GL_APIENTRY glGetPerfQueryInfoINTEL (GLuint queryId, GLuint quer
#endif
#endif /* GL_INTEL_performance_query */
#ifndef GL_MESA_framebuffer_flip_y
#define GL_MESA_framebuffer_flip_y 1
#define GL_FRAMEBUFFER_FLIP_Y_MESA 0x8BBB
#endif /* GL_MESA_framebuffer_flip_y */
#ifndef GL_MESA_program_binary_formats
#define GL_MESA_program_binary_formats 1
#define GL_PROGRAM_BINARY_FORMAT_MESA 0x875F

View File

@@ -13,9 +13,9 @@ $ make headers_install INSTALL_HDR_PATH=/path/to/install
The last update was done at the following kernel commit :
commit 78230c46ec0a91dd4256c9e54934b3c7095a7ee3
Merge: b65bd4031156 037f03155b7d
commit ca797d29cd63e7b71b4eea29aff3b1cefd1ecb59
Merge: 2c1c55cb75a9 010d118c2061
Author: Dave Airlie <airlied@redhat.com>
Date: Wed Mar 21 14:07:03 2018 +1000
Date: Mon Dec 4 09:40:35 2017 +1000
Merge tag 'omapdrm-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next
Merge tag 'drm-intel-next-2017-11-17-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

View File

@@ -178,7 +178,7 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_NONE 0
#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
#define DRM_FORMAT_MOD_VENDOR_NVIDIA 0x03
#define DRM_FORMAT_MOD_VENDOR_NV 0x03
#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
@@ -188,7 +188,7 @@ extern "C" {
#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
#define fourcc_mod_code(vendor, val) \
((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | ((val) & 0x00ffffffffffffffULL))
((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))
/*
* Format Modifier tokens:
@@ -338,17 +338,29 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
/* NVIDIA frame buffer modifiers */
/* NVIDIA Tegra frame buffer modifiers */
/*
* Some modifiers take parameters, for example the number of vertical GOBs in
* a block. Reserve the lower 32 bits for parameters
*/
#define __fourcc_mod_tegra_mode_shift 32
#define fourcc_mod_tegra_code(val, params) \
fourcc_mod_code(NV, ((((__u64)val) << __fourcc_mod_tegra_mode_shift) | params))
#define fourcc_mod_tegra_mod(m) \
(m & ~((1ULL << __fourcc_mod_tegra_mode_shift) - 1))
#define fourcc_mod_tegra_param(m) \
(m & ((1ULL << __fourcc_mod_tegra_mode_shift) - 1))
/*
* Tegra Tiled Layout, used by Tegra 2, 3 and 4.
*
* Pixels are arranged in simple tiles of 16 x 16 bytes.
*/
#define DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED fourcc_mod_code(NVIDIA, 1)
#define NV_FORMAT_MOD_TEGRA_TILED fourcc_mod_tegra_code(1, 0)
/*
* 16Bx2 Block Linear layout, used by desktop GPUs, and Tegra K1 and later
* Tegra 16Bx2 Block Linear layout, used by TK1/TX1
*
* Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
* vertically by a power of 2 (1 to 32 GOBs) to form a block.
@@ -368,38 +380,7 @@ extern "C" {
* Chapter 20 "Pixel Memory Formats" of the Tegra X1 TRM describes this format
* in full detail.
*/
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) \
fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf))
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_ONE_GOB \
fourcc_mod_code(NVIDIA, 0x10)
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_TWO_GOB \
fourcc_mod_code(NVIDIA, 0x11)
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_FOUR_GOB \
fourcc_mod_code(NVIDIA, 0x12)
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_EIGHT_GOB \
fourcc_mod_code(NVIDIA, 0x13)
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB \
fourcc_mod_code(NVIDIA, 0x14)
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB \
fourcc_mod_code(NVIDIA, 0x15)
/*
* Some Broadcom modifiers take parameters, for example the number of
* vertical lines in the image. Reserve the lower 32 bits for modifier
* type, and the next 24 bits for parameters. Top 8 bits are the
* vendor code.
*/
#define __fourcc_mod_broadcom_param_shift 8
#define __fourcc_mod_broadcom_param_bits 48
#define fourcc_mod_broadcom_code(val, params) \
fourcc_mod_code(BROADCOM, ((((__u64)params) << __fourcc_mod_broadcom_param_shift) | val))
#define fourcc_mod_broadcom_param(m) \
((int)(((m) >> __fourcc_mod_broadcom_param_shift) & \
((1ULL << __fourcc_mod_broadcom_param_bits) - 1)))
#define fourcc_mod_broadcom_mod(m) \
((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << \
__fourcc_mod_broadcom_param_shift))
#define NV_FORMAT_MOD_TEGRA_16BX2_BLOCK(v) fourcc_mod_tegra_code(2, v)
/*
* Broadcom VC4 "T" format
@@ -422,69 +403,6 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1)
/*
* Broadcom SAND format
*
* This is the native format that the H.264 codec block uses. For VC4
* HVS, it is only valid for H.264 (NV12/21) and RGBA modes.
*
* The image can be considered to be split into columns, and the
* columns are placed consecutively into memory. The width of those
* columns can be either 32, 64, 128, or 256 pixels, but in practice
* only 128 pixel columns are used.
*
* The pitch between the start of each column is set to optimally
* switch between SDRAM banks. This is passed as the number of lines
* of column width in the modifier (we can't use the stride value due
* to various core checks that look at it , so you should set the
* stride to width*cpp).
*
* Note that the column height for this format modifier is the same
* for all of the planes, assuming that each column contains both Y
* and UV. Some SAND-using hardware stores UV in a separate tiled
* image from Y to reduce the column height, which is not supported
* with these modifiers.
*/
#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(2, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(3, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(4, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(5, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND32 \
DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0)
#define DRM_FORMAT_MOD_BROADCOM_SAND64 \
DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0)
#define DRM_FORMAT_MOD_BROADCOM_SAND128 \
DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0)
#define DRM_FORMAT_MOD_BROADCOM_SAND256 \
DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(0)
/* Broadcom UIF format
*
* This is the common format for the current Broadcom multimedia
* blocks, including V3D 3.x and newer, newer video codecs, and
* displays.
*
* The image consists of utiles (64b blocks), UIF blocks (2x2 utiles),
* and macroblocks (4x4 UIF blocks). Those 4x4 UIF block groups are
* stored in columns, with padding between the columns to ensure that
* moving from one column to the next doesn't hit the same SDRAM page
* bank.
*
* To calculate the padding, it is assumed that each hardware block
* and the software driving it knows the platform's SDRAM page size,
* number of banks, and XOR address, and that it's identical between
* all blocks using the format. This tiling modifier will use XOR as
* necessary to reduce the padding. If a hardware block can't do XOR,
* the assumption is that a no-XOR tiling modifier will be created.
*/
#define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6)
#if defined(__cplusplus)
}
#endif

View File

@@ -38,18 +38,14 @@ extern "C" {
#define DRM_DISPLAY_MODE_LEN 32
#define DRM_PROP_NAME_LEN 32
#define DRM_MODE_TYPE_BUILTIN (1<<0) /* deprecated */
#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
#define DRM_MODE_TYPE_BUILTIN (1<<0)
#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_PREFERRED (1<<3)
#define DRM_MODE_TYPE_DEFAULT (1<<4) /* deprecated */
#define DRM_MODE_TYPE_DEFAULT (1<<4)
#define DRM_MODE_TYPE_USERDEF (1<<5)
#define DRM_MODE_TYPE_DRIVER (1<<6)
#define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | \
DRM_MODE_TYPE_USERDEF | \
DRM_MODE_TYPE_DRIVER)
/* Video mode flags */
/* bit compatible with the xrandr RR_ definitions (bits 0-13)
*
@@ -70,8 +66,8 @@ extern "C" {
#define DRM_MODE_FLAG_PCSYNC (1<<7)
#define DRM_MODE_FLAG_NCSYNC (1<<8)
#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
#define DRM_MODE_FLAG_BCAST (1<<10) /* deprecated */
#define DRM_MODE_FLAG_PIXMUX (1<<11) /* deprecated */
#define DRM_MODE_FLAG_BCAST (1<<10)
#define DRM_MODE_FLAG_PIXMUX (1<<11)
#define DRM_MODE_FLAG_DBLCLK (1<<12)
#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
/*
@@ -103,20 +99,6 @@ extern "C" {
#define DRM_MODE_FLAG_PIC_AR_16_9 \
(DRM_MODE_PICTURE_ASPECT_16_9<<19)
#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \
DRM_MODE_FLAG_NHSYNC | \
DRM_MODE_FLAG_PVSYNC | \
DRM_MODE_FLAG_NVSYNC | \
DRM_MODE_FLAG_INTERLACE | \
DRM_MODE_FLAG_DBLSCAN | \
DRM_MODE_FLAG_CSYNC | \
DRM_MODE_FLAG_PCSYNC | \
DRM_MODE_FLAG_NCSYNC | \
DRM_MODE_FLAG_HSKEW | \
DRM_MODE_FLAG_DBLCLK | \
DRM_MODE_FLAG_CLKDIV2 | \
DRM_MODE_FLAG_3D_MASK)
/* DPMS flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_DPMS_ON 0
@@ -191,10 +173,6 @@ extern "C" {
DRM_MODE_REFLECT_X | \
DRM_MODE_REFLECT_Y)
/* Content Protection Flags */
#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0
#define DRM_MODE_CONTENT_PROTECTION_DESIRED 1
#define DRM_MODE_CONTENT_PROTECTION_ENABLED 2
struct drm_mode_modeinfo {
__u32 clock;
@@ -363,7 +341,7 @@ struct drm_mode_get_connector {
__u32 pad;
};
#define DRM_MODE_PROP_PENDING (1<<0) /* deprecated, do not use */
#define DRM_MODE_PROP_PENDING (1<<0)
#define DRM_MODE_PROP_RANGE (1<<1)
#define DRM_MODE_PROP_IMMUTABLE (1<<2)
#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
@@ -598,11 +576,8 @@ struct drm_mode_crtc_lut {
};
struct drm_color_ctm {
/*
* Conversion matrix in S31.32 sign-magnitude
* (not two's complement!) format.
*/
__u64 matrix[9];
/* Conversion matrix in S31.32 format. */
__s64 matrix[9];
};
struct drm_color_lut {

View File

@@ -102,46 +102,6 @@ enum drm_i915_gem_engine_class {
I915_ENGINE_CLASS_INVALID = -1
};
/**
* DOC: perf_events exposed by i915 through /sys/bus/event_sources/drivers/i915
*
*/
enum drm_i915_pmu_engine_sample {
I915_SAMPLE_BUSY = 0,
I915_SAMPLE_WAIT = 1,
I915_SAMPLE_SEMA = 2
};
#define I915_PMU_SAMPLE_BITS (4)
#define I915_PMU_SAMPLE_MASK (0xf)
#define I915_PMU_SAMPLE_INSTANCE_BITS (8)
#define I915_PMU_CLASS_SHIFT \
(I915_PMU_SAMPLE_BITS + I915_PMU_SAMPLE_INSTANCE_BITS)
#define __I915_PMU_ENGINE(class, instance, sample) \
((class) << I915_PMU_CLASS_SHIFT | \
(instance) << I915_PMU_SAMPLE_BITS | \
(sample))
#define I915_PMU_ENGINE_BUSY(class, instance) \
__I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY)
#define I915_PMU_ENGINE_WAIT(class, instance) \
__I915_PMU_ENGINE(class, instance, I915_SAMPLE_WAIT)
#define I915_PMU_ENGINE_SEMA(class, instance) \
__I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
#define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1)
#define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2)
#define I915_PMU_RC6_RESIDENCY __I915_PMU_OTHER(3)
#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY
/* Each region is a minimum of 16k, and there are at most 255 of them.
*/
#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
@@ -318,7 +278,6 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_PERF_OPEN 0x36
#define DRM_I915_PERF_ADD_CONFIG 0x37
#define DRM_I915_PERF_REMOVE_CONFIG 0x38
#define DRM_I915_QUERY 0x39
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -376,7 +335,6 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
#define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
#define DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
@@ -1360,9 +1318,7 @@ struct drm_intel_overlay_attrs {
* active on a given plane.
*/
#define I915_SET_COLORKEY_NONE (1<<0) /* Deprecated. Instead set
* flags==0 to disable colorkeying.
*/
#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */
#define I915_SET_COLORKEY_DESTINATION (1<<1)
#define I915_SET_COLORKEY_SOURCE (1<<2)
struct drm_intel_sprite_colorkey {
@@ -1608,115 +1564,15 @@ struct drm_i915_perf_oa_config {
__u32 n_flex_regs;
/*
* These fields are pointers to tuples of u32 values (register address,
* value). For example the expected length of the buffer pointed by
* mux_regs_ptr is (2 * sizeof(u32) * n_mux_regs).
* These fields are pointers to tuples of u32 values (register
* address, value). For example the expected length of the buffer
* pointed by mux_regs_ptr is (2 * sizeof(u32) * n_mux_regs).
*/
__u64 mux_regs_ptr;
__u64 boolean_regs_ptr;
__u64 flex_regs_ptr;
};
struct drm_i915_query_item {
__u64 query_id;
#define DRM_I915_QUERY_TOPOLOGY_INFO 1
/*
* When set to zero by userspace, this is filled with the size of the
* data to be written at the data_ptr pointer. The kernel sets this
* value to a negative value to signal an error on a particular query
* item.
*/
__s32 length;
/*
* Unused for now. Must be cleared to zero.
*/
__u32 flags;
/*
* Data will be written at the location pointed by data_ptr when the
* value of length matches the length of the data to be written by the
* kernel.
*/
__u64 data_ptr;
};
struct drm_i915_query {
__u32 num_items;
/*
* Unused for now. Must be cleared to zero.
*/
__u32 flags;
/*
* This points to an array of num_items drm_i915_query_item structures.
*/
__u64 items_ptr;
};
/*
* Data written by the kernel with query DRM_I915_QUERY_TOPOLOGY_INFO :
*
* data: contains the 3 pieces of information :
*
* - the slice mask with one bit per slice telling whether a slice is
* available. The availability of slice X can be queried with the following
* formula :
*
* (data[X / 8] >> (X % 8)) & 1
*
* - the subslice mask for each slice with one bit per subslice telling
* whether a subslice is available. The availability of subslice Y in slice
* X can be queried with the following formula :
*
* (data[subslice_offset +
* X * subslice_stride +
* Y / 8] >> (Y % 8)) & 1
*
* - the EU mask for each subslice in each slice with one bit per EU telling
* whether an EU is available. The availability of EU Z in subslice Y in
* slice X can be queried with the following formula :
*
* (data[eu_offset +
* (X * max_subslices + Y) * eu_stride +
* Z / 8] >> (Z % 8)) & 1
*/
struct drm_i915_query_topology_info {
/*
* Unused for now. Must be cleared to zero.
*/
__u16 flags;
__u16 max_slices;
__u16 max_subslices;
__u16 max_eus_per_subslice;
/*
* Offset in data[] at which the subslice masks are stored.
*/
__u16 subslice_offset;
/*
* Stride at which each of the subslice masks for each slice are
* stored.
*/
__u16 subslice_stride;
/*
* Offset in data[] at which the EU masks are stored.
*/
__u16 eu_offset;
/*
* Stride at which each of the EU masks for each subslice are stored.
*/
__u16 eu_stride;
__u8 data[];
};
#if defined(__cplusplus)
}
#endif

View File

@@ -1,209 +0,0 @@
/*
* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _TEGRA_DRM_H_
#define _TEGRA_DRM_H_
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
struct drm_tegra_gem_create {
__u64 size;
__u32 flags;
__u32 handle;
};
struct drm_tegra_gem_mmap {
__u32 handle;
__u32 pad;
__u64 offset;
};
struct drm_tegra_syncpt_read {
__u32 id;
__u32 value;
};
struct drm_tegra_syncpt_incr {
__u32 id;
__u32 pad;
};
struct drm_tegra_syncpt_wait {
__u32 id;
__u32 thresh;
__u32 timeout;
__u32 value;
};
#define DRM_TEGRA_NO_TIMEOUT (0xffffffff)
struct drm_tegra_open_channel {
__u32 client;
__u32 pad;
__u64 context;
};
struct drm_tegra_close_channel {
__u64 context;
};
struct drm_tegra_get_syncpt {
__u64 context;
__u32 index;
__u32 id;
};
struct drm_tegra_get_syncpt_base {
__u64 context;
__u32 syncpt;
__u32 id;
};
struct drm_tegra_syncpt {
__u32 id;
__u32 incrs;
};
struct drm_tegra_cmdbuf {
__u32 handle;
__u32 offset;
__u32 words;
__u32 pad;
};
struct drm_tegra_reloc {
struct {
__u32 handle;
__u32 offset;
} cmdbuf;
struct {
__u32 handle;
__u32 offset;
} target;
__u32 shift;
__u32 pad;
};
struct drm_tegra_waitchk {
__u32 handle;
__u32 offset;
__u32 syncpt;
__u32 thresh;
};
struct drm_tegra_submit {
__u64 context;
__u32 num_syncpts;
__u32 num_cmdbufs;
__u32 num_relocs;
__u32 num_waitchks;
__u32 waitchk_mask;
__u32 timeout;
__u64 syncpts;
__u64 cmdbufs;
__u64 relocs;
__u64 waitchks;
__u32 fence; /* Return value */
__u32 reserved[5]; /* future expansion */
};
#define DRM_TEGRA_GEM_TILING_MODE_PITCH 0
#define DRM_TEGRA_GEM_TILING_MODE_TILED 1
#define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2
struct drm_tegra_gem_set_tiling {
/* input */
__u32 handle;
__u32 mode;
__u32 value;
__u32 pad;
};
struct drm_tegra_gem_get_tiling {
/* input */
__u32 handle;
/* output */
__u32 mode;
__u32 value;
__u32 pad;
};
#define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0)
#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP)
struct drm_tegra_gem_set_flags {
/* input */
__u32 handle;
/* output */
__u32 flags;
};
struct drm_tegra_gem_get_flags {
/* input */
__u32 handle;
/* output */
__u32 flags;
};
#define DRM_TEGRA_GEM_CREATE 0x00
#define DRM_TEGRA_GEM_MMAP 0x01
#define DRM_TEGRA_SYNCPT_READ 0x02
#define DRM_TEGRA_SYNCPT_INCR 0x03
#define DRM_TEGRA_SYNCPT_WAIT 0x04
#define DRM_TEGRA_OPEN_CHANNEL 0x05
#define DRM_TEGRA_CLOSE_CHANNEL 0x06
#define DRM_TEGRA_GET_SYNCPT 0x07
#define DRM_TEGRA_SUBMIT 0x08
#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
#define DRM_TEGRA_GEM_SET_TILING 0x0a
#define DRM_TEGRA_GEM_GET_TILING 0x0b
#define DRM_TEGRA_GEM_SET_FLAGS 0x0c
#define DRM_TEGRA_GEM_GET_FLAGS 0x0d
#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
#define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
#define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
#define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
#define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
#define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling)
#define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling)
#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
#if defined(__cplusplus)
}
#endif
#endif

View File

@@ -42,9 +42,6 @@ extern "C" {
#define DRM_VC4_GET_TILING 0x09
#define DRM_VC4_LABEL_BO 0x0a
#define DRM_VC4_GEM_MADVISE 0x0b
#define DRM_VC4_PERFMON_CREATE 0x0c
#define DRM_VC4_PERFMON_DESTROY 0x0d
#define DRM_VC4_PERFMON_GET_VALUES 0x0e
#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
@@ -58,9 +55,6 @@ extern "C" {
#define DRM_IOCTL_VC4_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_TILING, struct drm_vc4_get_tiling)
#define DRM_IOCTL_VC4_LABEL_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_LABEL_BO, struct drm_vc4_label_bo)
#define DRM_IOCTL_VC4_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GEM_MADVISE, struct drm_vc4_gem_madvise)
#define DRM_IOCTL_VC4_PERFMON_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_PERFMON_CREATE, struct drm_vc4_perfmon_create)
#define DRM_IOCTL_VC4_PERFMON_DESTROY DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_PERFMON_DESTROY, struct drm_vc4_perfmon_destroy)
#define DRM_IOCTL_VC4_PERFMON_GET_VALUES DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_PERFMON_GET_VALUES, struct drm_vc4_perfmon_get_values)
struct drm_vc4_submit_rcl_surface {
__u32 hindex; /* Handle index, or ~0 if not present. */
@@ -179,22 +173,6 @@ struct drm_vc4_submit_cl {
* wait ioctl).
*/
__u64 seqno;
/* ID of the perfmon to attach to this job. 0 means no perfmon. */
__u32 perfmonid;
/* Syncobj handle to wait on. If set, processing of this render job
* will not start until the syncobj is signaled. 0 means ignore.
*/
__u32 in_sync;
/* Syncobj handle to export fence to. If set, the fence in the syncobj
* will be replaced with a fence that signals upon completion of this
* render job. 0 means ignore.
*/
__u32 out_sync;
__u32 pad2;
};
/**
@@ -330,7 +308,6 @@ struct drm_vc4_get_hang_state {
#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5
#define DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER 6
#define DRM_VC4_PARAM_SUPPORTS_MADVISE 7
#define DRM_VC4_PARAM_SUPPORTS_PERFMON 8
struct drm_vc4_get_param {
__u32 param;
@@ -375,66 +352,6 @@ struct drm_vc4_gem_madvise {
__u32 pad;
};
enum {
VC4_PERFCNT_FEP_VALID_PRIMS_NO_RENDER,
VC4_PERFCNT_FEP_VALID_PRIMS_RENDER,
VC4_PERFCNT_FEP_CLIPPED_QUADS,
VC4_PERFCNT_FEP_VALID_QUADS,
VC4_PERFCNT_TLB_QUADS_NOT_PASSING_STENCIL,
VC4_PERFCNT_TLB_QUADS_NOT_PASSING_Z_AND_STENCIL,
VC4_PERFCNT_TLB_QUADS_PASSING_Z_AND_STENCIL,
VC4_PERFCNT_TLB_QUADS_ZERO_COVERAGE,
VC4_PERFCNT_TLB_QUADS_NON_ZERO_COVERAGE,
VC4_PERFCNT_TLB_QUADS_WRITTEN_TO_COLOR_BUF,
VC4_PERFCNT_PLB_PRIMS_OUTSIDE_VIEWPORT,
VC4_PERFCNT_PLB_PRIMS_NEED_CLIPPING,
VC4_PERFCNT_PSE_PRIMS_REVERSED,
VC4_PERFCNT_QPU_TOTAL_IDLE_CYCLES,
VC4_PERFCNT_QPU_TOTAL_CLK_CYCLES_VERTEX_COORD_SHADING,
VC4_PERFCNT_QPU_TOTAL_CLK_CYCLES_FRAGMENT_SHADING,
VC4_PERFCNT_QPU_TOTAL_CLK_CYCLES_EXEC_VALID_INST,
VC4_PERFCNT_QPU_TOTAL_CLK_CYCLES_WAITING_TMUS,
VC4_PERFCNT_QPU_TOTAL_CLK_CYCLES_WAITING_SCOREBOARD,
VC4_PERFCNT_QPU_TOTAL_CLK_CYCLES_WAITING_VARYINGS,
VC4_PERFCNT_QPU_TOTAL_INST_CACHE_HIT,
VC4_PERFCNT_QPU_TOTAL_INST_CACHE_MISS,
VC4_PERFCNT_QPU_TOTAL_UNIFORM_CACHE_HIT,
VC4_PERFCNT_QPU_TOTAL_UNIFORM_CACHE_MISS,
VC4_PERFCNT_TMU_TOTAL_TEXT_QUADS_PROCESSED,
VC4_PERFCNT_TMU_TOTAL_TEXT_CACHE_MISS,
VC4_PERFCNT_VPM_TOTAL_CLK_CYCLES_VDW_STALLED,
VC4_PERFCNT_VPM_TOTAL_CLK_CYCLES_VCD_STALLED,
VC4_PERFCNT_L2C_TOTAL_L2_CACHE_HIT,
VC4_PERFCNT_L2C_TOTAL_L2_CACHE_MISS,
VC4_PERFCNT_NUM_EVENTS,
};
#define DRM_VC4_MAX_PERF_COUNTERS 16
struct drm_vc4_perfmon_create {
__u32 id;
__u32 ncounters;
__u8 events[DRM_VC4_MAX_PERF_COUNTERS];
};
struct drm_vc4_perfmon_destroy {
__u32 id;
};
/*
* Returns the values of the performance counters tracked by this
* perfmon (as an array of ncounters u64 values).
*
* No implicit synchronization is performed, so the user has to
* guarantee that any jobs using this perfmon have already been
* completed (probably by blocking on the seqno returned by the
* last exec that used the perfmon).
*/
struct drm_vc4_perfmon_get_values {
__u32 id;
__u64 values_ptr;
};
#if defined(__cplusplus)
}
#endif

View File

@@ -22,7 +22,6 @@ inc_drm_uapi = include_directories('drm-uapi')
inc_vulkan = include_directories('vulkan')
inc_d3d9 = include_directories('D3D9')
inc_gl_internal = include_directories('GL/internal')
inc_haikugl = include_directories('HaikuGL')
if with_gles1
install_headers(
@@ -81,13 +80,6 @@ if with_gallium_st_nine
)
endif
if with_platform_haiku
install_headers(
'HaikuGL/GLRenderer.h', 'HaikuGL/GLView.h', 'HaikuGL/OpenGLKit.h',
subdir : 'opengl',
)
endif
# Only install the headers if we are building a stand alone implementation and
# not an ICD enabled implementation
if with_gallium_opencl and not with_opencl_icd

View File

@@ -156,7 +156,6 @@ CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
CHIPSET(0x591B, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
CHIPSET(0x591C, kbl_gt2, "Intel(R) Kaby Lake GT2")
CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")
@@ -166,16 +165,16 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3e)")
CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
CHIPSET(0x3184, glk, "Intel(R) UHD Graphics 605 (Geminilake)")
CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3EA4, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E9A, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E9B, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3EA0, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3EA3, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
@@ -197,11 +196,3 @@ CHIPSET(0x5A50, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x5A51, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x5A52, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A51, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A52, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")

View File

@@ -216,9 +216,6 @@ CHIPSET(0x6995, POLARIS12)
CHIPSET(0x6997, POLARIS12)
CHIPSET(0x699F, POLARIS12)
CHIPSET(0x694C, VEGAM)
CHIPSET(0x694E, VEGAM)
CHIPSET(0x6860, VEGA10)
CHIPSET(0x6861, VEGA10)
CHIPSET(0x6862, VEGA10)
@@ -229,17 +226,4 @@ CHIPSET(0x6868, VEGA10)
CHIPSET(0x687F, VEGA10)
CHIPSET(0x686C, VEGA10)
CHIPSET(0x69A0, VEGA12)
CHIPSET(0x69A1, VEGA12)
CHIPSET(0x69A2, VEGA12)
CHIPSET(0x69A3, VEGA12)
CHIPSET(0x69AF, VEGA12)
CHIPSET(0x66A0, VEGA20)
CHIPSET(0x66A1, VEGA20)
CHIPSET(0x66A2, VEGA20)
CHIPSET(0x66A3, VEGA20)
CHIPSET(0x66A7, VEGA20)
CHIPSET(0x66AF, VEGA20)
CHIPSET(0x15DD, RAVEN)

View File

@@ -24,34 +24,13 @@
#define VKICD_H
#include "vulkan.h"
#include <stdbool.h>
// Loader-ICD version negotiation API. Versions add the following features:
// Version 0 - Initial. Doesn't support vk_icdGetInstanceProcAddr
// or vk_icdNegotiateLoaderICDInterfaceVersion.
// Version 1 - Add support for vk_icdGetInstanceProcAddr.
// Version 2 - Add Loader/ICD Interface version negotiation
// via vk_icdNegotiateLoaderICDInterfaceVersion.
// Version 3 - Add ICD creation/destruction of KHR_surface objects.
// Version 4 - Add unknown physical device extension qyering via
// vk_icdGetPhysicalDeviceProcAddr.
// Version 5 - Tells ICDs that the loader is now paying attention to the
// application version of Vulkan passed into the ApplicationInfo
// structure during vkCreateInstance. This will tell the ICD
// that if the loader is older, it should automatically fail a
// call for any API version > 1.0. Otherwise, the loader will
// manually determine if it can support the expected version.
#define CURRENT_LOADER_ICD_INTERFACE_VERSION 5
/*
* Loader-ICD version negotiation API
*/
#define CURRENT_LOADER_ICD_INTERFACE_VERSION 3
#define MIN_SUPPORTED_LOADER_ICD_INTERFACE_VERSION 0
#define MIN_PHYS_DEV_EXTENSION_ICD_INTERFACE_VERSION 4
typedef VkResult(VKAPI_PTR *PFN_vkNegotiateLoaderICDInterfaceVersion)(uint32_t *pVersion);
// This is defined in vk_layer.h which will be found by the loader, but if an ICD is building against this
// file directly, it won't be found.
#ifndef PFN_GetPhysicalDeviceProcAddr
typedef PFN_vkVoidFunction(VKAPI_PTR *PFN_GetPhysicalDeviceProcAddr)(VkInstance instance, const char *pName);
#endif
typedef VkResult (VKAPI_PTR *PFN_vkNegotiateLoaderICDInterfaceVersion)(uint32_t *pVersion);
/*
* The ICD must reserve space for a pointer for the loader's dispatch
* table, at the start of <each object>.
@@ -85,9 +64,6 @@ typedef enum {
VK_ICD_WSI_PLATFORM_WIN32,
VK_ICD_WSI_PLATFORM_XCB,
VK_ICD_WSI_PLATFORM_XLIB,
VK_ICD_WSI_PLATFORM_ANDROID,
VK_ICD_WSI_PLATFORM_MACOS,
VK_ICD_WSI_PLATFORM_IOS,
VK_ICD_WSI_PLATFORM_DISPLAY
} VkIcdWsiPlatform;
@@ -101,7 +77,7 @@ typedef struct {
MirConnection *connection;
MirSurface *mirSurface;
} VkIcdSurfaceMir;
#endif // VK_USE_PLATFORM_MIR_KHR
#endif // VK_USE_PLATFORM_MIR_KHR
#ifdef VK_USE_PLATFORM_WAYLAND_KHR
typedef struct {
@@ -109,7 +85,7 @@ typedef struct {
struct wl_display *display;
struct wl_surface *surface;
} VkIcdSurfaceWayland;
#endif // VK_USE_PLATFORM_WAYLAND_KHR
#endif // VK_USE_PLATFORM_WAYLAND_KHR
#ifdef VK_USE_PLATFORM_WIN32_KHR
typedef struct {
@@ -117,7 +93,7 @@ typedef struct {
HINSTANCE hinstance;
HWND hwnd;
} VkIcdSurfaceWin32;
#endif // VK_USE_PLATFORM_WIN32_KHR
#endif // VK_USE_PLATFORM_WIN32_KHR
#ifdef VK_USE_PLATFORM_XCB_KHR
typedef struct {
@@ -125,7 +101,7 @@ typedef struct {
xcb_connection_t *connection;
xcb_window_t window;
} VkIcdSurfaceXcb;
#endif // VK_USE_PLATFORM_XCB_KHR
#endif // VK_USE_PLATFORM_XCB_KHR
#ifdef VK_USE_PLATFORM_XLIB_KHR
typedef struct {
@@ -133,28 +109,13 @@ typedef struct {
Display *dpy;
Window window;
} VkIcdSurfaceXlib;
#endif // VK_USE_PLATFORM_XLIB_KHR
#endif // VK_USE_PLATFORM_XLIB_KHR
#ifdef VK_USE_PLATFORM_ANDROID_KHR
typedef struct {
VkIcdSurfaceBase base;
struct ANativeWindow *window;
ANativeWindow* window;
} VkIcdSurfaceAndroid;
#endif // VK_USE_PLATFORM_ANDROID_KHR
#ifdef VK_USE_PLATFORM_MACOS_MVK
typedef struct {
VkIcdSurfaceBase base;
const void *pView;
} VkIcdSurfaceMacOS;
#endif // VK_USE_PLATFORM_MACOS_MVK
#ifdef VK_USE_PLATFORM_IOS_MVK
typedef struct {
VkIcdSurfaceBase base;
const void *pView;
} VkIcdSurfaceIOS;
#endif // VK_USE_PLATFORM_IOS_MVK
#endif //VK_USE_PLATFORM_ANDROID_KHR
typedef struct {
VkIcdSurfaceBase base;
@@ -167,4 +128,4 @@ typedef struct {
VkExtent2D imageExtent;
} VkIcdSurfaceDisplay;
#endif // VKICD_H
#endif // VKICD_H

View File

@@ -89,4 +89,32 @@ extern "C"
} // extern "C"
#endif // __cplusplus
// Platform-specific headers required by platform window system extensions.
// These are enabled prior to #including "vulkan.h". The same enable then
// controls inclusion of the extension interfaces in vulkan.h.
#ifdef VK_USE_PLATFORM_ANDROID_KHR
#include <android/native_window.h>
#endif
#ifdef VK_USE_PLATFORM_MIR_KHR
#include <mir_toolkit/client_types.h>
#endif
#ifdef VK_USE_PLATFORM_WAYLAND_KHR
#include <wayland-client.h>
#endif
#ifdef VK_USE_PLATFORM_WIN32_KHR
#include <windows.h>
#endif
#ifdef VK_USE_PLATFORM_XLIB_KHR
#include <X11/Xlib.h>
#endif
#ifdef VK_USE_PLATFORM_XCB_KHR
#include <xcb/xcb.h>
#endif
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,126 +0,0 @@
#ifndef VULKAN_ANDROID_H_
#define VULKAN_ANDROID_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_KHR_android_surface 1
struct ANativeWindow;
#define VK_KHR_ANDROID_SURFACE_SPEC_VERSION 6
#define VK_KHR_ANDROID_SURFACE_EXTENSION_NAME "VK_KHR_android_surface"
typedef VkFlags VkAndroidSurfaceCreateFlagsKHR;
typedef struct VkAndroidSurfaceCreateInfoKHR {
VkStructureType sType;
const void* pNext;
VkAndroidSurfaceCreateFlagsKHR flags;
struct ANativeWindow* window;
} VkAndroidSurfaceCreateInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkCreateAndroidSurfaceKHR)(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateAndroidSurfaceKHR(
VkInstance instance,
const VkAndroidSurfaceCreateInfoKHR* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
#endif
#define VK_ANDROID_external_memory_android_hardware_buffer 1
struct AHardwareBuffer;
#define VK_ANDROID_EXTERNAL_MEMORY_ANDROID_HARDWARE_BUFFER_SPEC_VERSION 3
#define VK_ANDROID_EXTERNAL_MEMORY_ANDROID_HARDWARE_BUFFER_EXTENSION_NAME "VK_ANDROID_external_memory_android_hardware_buffer"
typedef struct VkAndroidHardwareBufferUsageANDROID {
VkStructureType sType;
void* pNext;
uint64_t androidHardwareBufferUsage;
} VkAndroidHardwareBufferUsageANDROID;
typedef struct VkAndroidHardwareBufferPropertiesANDROID {
VkStructureType sType;
void* pNext;
VkDeviceSize allocationSize;
uint32_t memoryTypeBits;
} VkAndroidHardwareBufferPropertiesANDROID;
typedef struct VkAndroidHardwareBufferFormatPropertiesANDROID {
VkStructureType sType;
void* pNext;
VkFormat format;
uint64_t externalFormat;
VkFormatFeatureFlags formatFeatures;
VkComponentMapping samplerYcbcrConversionComponents;
VkSamplerYcbcrModelConversion suggestedYcbcrModel;
VkSamplerYcbcrRange suggestedYcbcrRange;
VkChromaLocation suggestedXChromaOffset;
VkChromaLocation suggestedYChromaOffset;
} VkAndroidHardwareBufferFormatPropertiesANDROID;
typedef struct VkImportAndroidHardwareBufferInfoANDROID {
VkStructureType sType;
const void* pNext;
struct AHardwareBuffer* buffer;
} VkImportAndroidHardwareBufferInfoANDROID;
typedef struct VkMemoryGetAndroidHardwareBufferInfoANDROID {
VkStructureType sType;
const void* pNext;
VkDeviceMemory memory;
} VkMemoryGetAndroidHardwareBufferInfoANDROID;
typedef struct VkExternalFormatANDROID {
VkStructureType sType;
void* pNext;
uint64_t externalFormat;
} VkExternalFormatANDROID;
typedef VkResult (VKAPI_PTR *PFN_vkGetAndroidHardwareBufferPropertiesANDROID)(VkDevice device, const struct AHardwareBuffer* buffer, VkAndroidHardwareBufferPropertiesANDROID* pProperties);
typedef VkResult (VKAPI_PTR *PFN_vkGetMemoryAndroidHardwareBufferANDROID)(VkDevice device, const VkMemoryGetAndroidHardwareBufferInfoANDROID* pInfo, struct AHardwareBuffer** pBuffer);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkGetAndroidHardwareBufferPropertiesANDROID(
VkDevice device,
const struct AHardwareBuffer* buffer,
VkAndroidHardwareBufferPropertiesANDROID* pProperties);
VKAPI_ATTR VkResult VKAPI_CALL vkGetMemoryAndroidHardwareBufferANDROID(
VkDevice device,
const VkMemoryGetAndroidHardwareBufferInfoANDROID* pInfo,
struct AHardwareBuffer** pBuffer);
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,58 +0,0 @@
#ifndef VULKAN_IOS_H_
#define VULKAN_IOS_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_MVK_ios_surface 1
#define VK_MVK_IOS_SURFACE_SPEC_VERSION 2
#define VK_MVK_IOS_SURFACE_EXTENSION_NAME "VK_MVK_ios_surface"
typedef VkFlags VkIOSSurfaceCreateFlagsMVK;
typedef struct VkIOSSurfaceCreateInfoMVK {
VkStructureType sType;
const void* pNext;
VkIOSSurfaceCreateFlagsMVK flags;
const void* pView;
} VkIOSSurfaceCreateInfoMVK;
typedef VkResult (VKAPI_PTR *PFN_vkCreateIOSSurfaceMVK)(VkInstance instance, const VkIOSSurfaceCreateInfoMVK* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateIOSSurfaceMVK(
VkInstance instance,
const VkIOSSurfaceCreateInfoMVK* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,58 +0,0 @@
#ifndef VULKAN_MACOS_H_
#define VULKAN_MACOS_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_MVK_macos_surface 1
#define VK_MVK_MACOS_SURFACE_SPEC_VERSION 2
#define VK_MVK_MACOS_SURFACE_EXTENSION_NAME "VK_MVK_macos_surface"
typedef VkFlags VkMacOSSurfaceCreateFlagsMVK;
typedef struct VkMacOSSurfaceCreateInfoMVK {
VkStructureType sType;
const void* pNext;
VkMacOSSurfaceCreateFlagsMVK flags;
const void* pView;
} VkMacOSSurfaceCreateInfoMVK;
typedef VkResult (VKAPI_PTR *PFN_vkCreateMacOSSurfaceMVK)(VkInstance instance, const VkMacOSSurfaceCreateInfoMVK* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateMacOSSurfaceMVK(
VkInstance instance,
const VkMacOSSurfaceCreateInfoMVK* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,65 +0,0 @@
#ifndef VULKAN_MIR_H_
#define VULKAN_MIR_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_KHR_mir_surface 1
#define VK_KHR_MIR_SURFACE_SPEC_VERSION 4
#define VK_KHR_MIR_SURFACE_EXTENSION_NAME "VK_KHR_mir_surface"
typedef VkFlags VkMirSurfaceCreateFlagsKHR;
typedef struct VkMirSurfaceCreateInfoKHR {
VkStructureType sType;
const void* pNext;
VkMirSurfaceCreateFlagsKHR flags;
MirConnection* connection;
MirSurface* mirSurface;
} VkMirSurfaceCreateInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkCreateMirSurfaceKHR)(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
typedef VkBool32 (VKAPI_PTR *PFN_vkGetPhysicalDeviceMirPresentationSupportKHR)(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateMirSurfaceKHR(
VkInstance instance,
const VkMirSurfaceCreateInfoKHR* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
VKAPI_ATTR VkBool32 VKAPI_CALL vkGetPhysicalDeviceMirPresentationSupportKHR(
VkPhysicalDevice physicalDevice,
uint32_t queueFamilyIndex,
MirConnection* connection);
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,58 +0,0 @@
#ifndef VULKAN_VI_H_
#define VULKAN_VI_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_NN_vi_surface 1
#define VK_NN_VI_SURFACE_SPEC_VERSION 1
#define VK_NN_VI_SURFACE_EXTENSION_NAME "VK_NN_vi_surface"
typedef VkFlags VkViSurfaceCreateFlagsNN;
typedef struct VkViSurfaceCreateInfoNN {
VkStructureType sType;
const void* pNext;
VkViSurfaceCreateFlagsNN flags;
void* window;
} VkViSurfaceCreateInfoNN;
typedef VkResult (VKAPI_PTR *PFN_vkCreateViSurfaceNN)(VkInstance instance, const VkViSurfaceCreateInfoNN* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateViSurfaceNN(
VkInstance instance,
const VkViSurfaceCreateInfoNN* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,65 +0,0 @@
#ifndef VULKAN_WAYLAND_H_
#define VULKAN_WAYLAND_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_KHR_wayland_surface 1
#define VK_KHR_WAYLAND_SURFACE_SPEC_VERSION 6
#define VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME "VK_KHR_wayland_surface"
typedef VkFlags VkWaylandSurfaceCreateFlagsKHR;
typedef struct VkWaylandSurfaceCreateInfoKHR {
VkStructureType sType;
const void* pNext;
VkWaylandSurfaceCreateFlagsKHR flags;
struct wl_display* display;
struct wl_surface* surface;
} VkWaylandSurfaceCreateInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkCreateWaylandSurfaceKHR)(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
typedef VkBool32 (VKAPI_PTR *PFN_vkGetPhysicalDeviceWaylandPresentationSupportKHR)(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateWaylandSurfaceKHR(
VkInstance instance,
const VkWaylandSurfaceCreateInfoKHR* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
VKAPI_ATTR VkBool32 VKAPI_CALL vkGetPhysicalDeviceWaylandPresentationSupportKHR(
VkPhysicalDevice physicalDevice,
uint32_t queueFamilyIndex,
struct wl_display* display);
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,276 +0,0 @@
#ifndef VULKAN_WIN32_H_
#define VULKAN_WIN32_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_KHR_win32_surface 1
#define VK_KHR_WIN32_SURFACE_SPEC_VERSION 6
#define VK_KHR_WIN32_SURFACE_EXTENSION_NAME "VK_KHR_win32_surface"
typedef VkFlags VkWin32SurfaceCreateFlagsKHR;
typedef struct VkWin32SurfaceCreateInfoKHR {
VkStructureType sType;
const void* pNext;
VkWin32SurfaceCreateFlagsKHR flags;
HINSTANCE hinstance;
HWND hwnd;
} VkWin32SurfaceCreateInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkCreateWin32SurfaceKHR)(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
typedef VkBool32 (VKAPI_PTR *PFN_vkGetPhysicalDeviceWin32PresentationSupportKHR)(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateWin32SurfaceKHR(
VkInstance instance,
const VkWin32SurfaceCreateInfoKHR* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
VKAPI_ATTR VkBool32 VKAPI_CALL vkGetPhysicalDeviceWin32PresentationSupportKHR(
VkPhysicalDevice physicalDevice,
uint32_t queueFamilyIndex);
#endif
#define VK_KHR_external_memory_win32 1
#define VK_KHR_EXTERNAL_MEMORY_WIN32_SPEC_VERSION 1
#define VK_KHR_EXTERNAL_MEMORY_WIN32_EXTENSION_NAME "VK_KHR_external_memory_win32"
typedef struct VkImportMemoryWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
VkExternalMemoryHandleTypeFlagBits handleType;
HANDLE handle;
LPCWSTR name;
} VkImportMemoryWin32HandleInfoKHR;
typedef struct VkExportMemoryWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
const SECURITY_ATTRIBUTES* pAttributes;
DWORD dwAccess;
LPCWSTR name;
} VkExportMemoryWin32HandleInfoKHR;
typedef struct VkMemoryWin32HandlePropertiesKHR {
VkStructureType sType;
void* pNext;
uint32_t memoryTypeBits;
} VkMemoryWin32HandlePropertiesKHR;
typedef struct VkMemoryGetWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
VkDeviceMemory memory;
VkExternalMemoryHandleTypeFlagBits handleType;
} VkMemoryGetWin32HandleInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkGetMemoryWin32HandleKHR)(VkDevice device, const VkMemoryGetWin32HandleInfoKHR* pGetWin32HandleInfo, HANDLE* pHandle);
typedef VkResult (VKAPI_PTR *PFN_vkGetMemoryWin32HandlePropertiesKHR)(VkDevice device, VkExternalMemoryHandleTypeFlagBits handleType, HANDLE handle, VkMemoryWin32HandlePropertiesKHR* pMemoryWin32HandleProperties);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkGetMemoryWin32HandleKHR(
VkDevice device,
const VkMemoryGetWin32HandleInfoKHR* pGetWin32HandleInfo,
HANDLE* pHandle);
VKAPI_ATTR VkResult VKAPI_CALL vkGetMemoryWin32HandlePropertiesKHR(
VkDevice device,
VkExternalMemoryHandleTypeFlagBits handleType,
HANDLE handle,
VkMemoryWin32HandlePropertiesKHR* pMemoryWin32HandleProperties);
#endif
#define VK_KHR_win32_keyed_mutex 1
#define VK_KHR_WIN32_KEYED_MUTEX_SPEC_VERSION 1
#define VK_KHR_WIN32_KEYED_MUTEX_EXTENSION_NAME "VK_KHR_win32_keyed_mutex"
typedef struct VkWin32KeyedMutexAcquireReleaseInfoKHR {
VkStructureType sType;
const void* pNext;
uint32_t acquireCount;
const VkDeviceMemory* pAcquireSyncs;
const uint64_t* pAcquireKeys;
const uint32_t* pAcquireTimeouts;
uint32_t releaseCount;
const VkDeviceMemory* pReleaseSyncs;
const uint64_t* pReleaseKeys;
} VkWin32KeyedMutexAcquireReleaseInfoKHR;
#define VK_KHR_external_semaphore_win32 1
#define VK_KHR_EXTERNAL_SEMAPHORE_WIN32_SPEC_VERSION 1
#define VK_KHR_EXTERNAL_SEMAPHORE_WIN32_EXTENSION_NAME "VK_KHR_external_semaphore_win32"
typedef struct VkImportSemaphoreWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
VkSemaphore semaphore;
VkSemaphoreImportFlags flags;
VkExternalSemaphoreHandleTypeFlagBits handleType;
HANDLE handle;
LPCWSTR name;
} VkImportSemaphoreWin32HandleInfoKHR;
typedef struct VkExportSemaphoreWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
const SECURITY_ATTRIBUTES* pAttributes;
DWORD dwAccess;
LPCWSTR name;
} VkExportSemaphoreWin32HandleInfoKHR;
typedef struct VkD3D12FenceSubmitInfoKHR {
VkStructureType sType;
const void* pNext;
uint32_t waitSemaphoreValuesCount;
const uint64_t* pWaitSemaphoreValues;
uint32_t signalSemaphoreValuesCount;
const uint64_t* pSignalSemaphoreValues;
} VkD3D12FenceSubmitInfoKHR;
typedef struct VkSemaphoreGetWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
VkSemaphore semaphore;
VkExternalSemaphoreHandleTypeFlagBits handleType;
} VkSemaphoreGetWin32HandleInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkImportSemaphoreWin32HandleKHR)(VkDevice device, const VkImportSemaphoreWin32HandleInfoKHR* pImportSemaphoreWin32HandleInfo);
typedef VkResult (VKAPI_PTR *PFN_vkGetSemaphoreWin32HandleKHR)(VkDevice device, const VkSemaphoreGetWin32HandleInfoKHR* pGetWin32HandleInfo, HANDLE* pHandle);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkImportSemaphoreWin32HandleKHR(
VkDevice device,
const VkImportSemaphoreWin32HandleInfoKHR* pImportSemaphoreWin32HandleInfo);
VKAPI_ATTR VkResult VKAPI_CALL vkGetSemaphoreWin32HandleKHR(
VkDevice device,
const VkSemaphoreGetWin32HandleInfoKHR* pGetWin32HandleInfo,
HANDLE* pHandle);
#endif
#define VK_KHR_external_fence_win32 1
#define VK_KHR_EXTERNAL_FENCE_WIN32_SPEC_VERSION 1
#define VK_KHR_EXTERNAL_FENCE_WIN32_EXTENSION_NAME "VK_KHR_external_fence_win32"
typedef struct VkImportFenceWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
VkFence fence;
VkFenceImportFlags flags;
VkExternalFenceHandleTypeFlagBits handleType;
HANDLE handle;
LPCWSTR name;
} VkImportFenceWin32HandleInfoKHR;
typedef struct VkExportFenceWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
const SECURITY_ATTRIBUTES* pAttributes;
DWORD dwAccess;
LPCWSTR name;
} VkExportFenceWin32HandleInfoKHR;
typedef struct VkFenceGetWin32HandleInfoKHR {
VkStructureType sType;
const void* pNext;
VkFence fence;
VkExternalFenceHandleTypeFlagBits handleType;
} VkFenceGetWin32HandleInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkImportFenceWin32HandleKHR)(VkDevice device, const VkImportFenceWin32HandleInfoKHR* pImportFenceWin32HandleInfo);
typedef VkResult (VKAPI_PTR *PFN_vkGetFenceWin32HandleKHR)(VkDevice device, const VkFenceGetWin32HandleInfoKHR* pGetWin32HandleInfo, HANDLE* pHandle);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkImportFenceWin32HandleKHR(
VkDevice device,
const VkImportFenceWin32HandleInfoKHR* pImportFenceWin32HandleInfo);
VKAPI_ATTR VkResult VKAPI_CALL vkGetFenceWin32HandleKHR(
VkDevice device,
const VkFenceGetWin32HandleInfoKHR* pGetWin32HandleInfo,
HANDLE* pHandle);
#endif
#define VK_NV_external_memory_win32 1
#define VK_NV_EXTERNAL_MEMORY_WIN32_SPEC_VERSION 1
#define VK_NV_EXTERNAL_MEMORY_WIN32_EXTENSION_NAME "VK_NV_external_memory_win32"
typedef struct VkImportMemoryWin32HandleInfoNV {
VkStructureType sType;
const void* pNext;
VkExternalMemoryHandleTypeFlagsNV handleType;
HANDLE handle;
} VkImportMemoryWin32HandleInfoNV;
typedef struct VkExportMemoryWin32HandleInfoNV {
VkStructureType sType;
const void* pNext;
const SECURITY_ATTRIBUTES* pAttributes;
DWORD dwAccess;
} VkExportMemoryWin32HandleInfoNV;
typedef VkResult (VKAPI_PTR *PFN_vkGetMemoryWin32HandleNV)(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkGetMemoryWin32HandleNV(
VkDevice device,
VkDeviceMemory memory,
VkExternalMemoryHandleTypeFlagsNV handleType,
HANDLE* pHandle);
#endif
#define VK_NV_win32_keyed_mutex 1
#define VK_NV_WIN32_KEYED_MUTEX_SPEC_VERSION 1
#define VK_NV_WIN32_KEYED_MUTEX_EXTENSION_NAME "VK_NV_win32_keyed_mutex"
typedef struct VkWin32KeyedMutexAcquireReleaseInfoNV {
VkStructureType sType;
const void* pNext;
uint32_t acquireCount;
const VkDeviceMemory* pAcquireSyncs;
const uint64_t* pAcquireKeys;
const uint32_t* pAcquireTimeoutMilliseconds;
uint32_t releaseCount;
const VkDeviceMemory* pReleaseSyncs;
const uint64_t* pReleaseKeys;
} VkWin32KeyedMutexAcquireReleaseInfoNV;
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,66 +0,0 @@
#ifndef VULKAN_XCB_H_
#define VULKAN_XCB_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_KHR_xcb_surface 1
#define VK_KHR_XCB_SURFACE_SPEC_VERSION 6
#define VK_KHR_XCB_SURFACE_EXTENSION_NAME "VK_KHR_xcb_surface"
typedef VkFlags VkXcbSurfaceCreateFlagsKHR;
typedef struct VkXcbSurfaceCreateInfoKHR {
VkStructureType sType;
const void* pNext;
VkXcbSurfaceCreateFlagsKHR flags;
xcb_connection_t* connection;
xcb_window_t window;
} VkXcbSurfaceCreateInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkCreateXcbSurfaceKHR)(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
typedef VkBool32 (VKAPI_PTR *PFN_vkGetPhysicalDeviceXcbPresentationSupportKHR)(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateXcbSurfaceKHR(
VkInstance instance,
const VkXcbSurfaceCreateInfoKHR* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
VKAPI_ATTR VkBool32 VKAPI_CALL vkGetPhysicalDeviceXcbPresentationSupportKHR(
VkPhysicalDevice physicalDevice,
uint32_t queueFamilyIndex,
xcb_connection_t* connection,
xcb_visualid_t visual_id);
#endif
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,66 +0,0 @@
#ifndef VULKAN_XLIB_H_
#define VULKAN_XLIB_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_KHR_xlib_surface 1
#define VK_KHR_XLIB_SURFACE_SPEC_VERSION 6
#define VK_KHR_XLIB_SURFACE_EXTENSION_NAME "VK_KHR_xlib_surface"
typedef VkFlags VkXlibSurfaceCreateFlagsKHR;
typedef struct VkXlibSurfaceCreateInfoKHR {
VkStructureType sType;
const void* pNext;
VkXlibSurfaceCreateFlagsKHR flags;
Display* dpy;
Window window;
} VkXlibSurfaceCreateInfoKHR;
typedef VkResult (VKAPI_PTR *PFN_vkCreateXlibSurfaceKHR)(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
typedef VkBool32 (VKAPI_PTR *PFN_vkGetPhysicalDeviceXlibPresentationSupportKHR)(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkCreateXlibSurfaceKHR(
VkInstance instance,
const VkXlibSurfaceCreateInfoKHR* pCreateInfo,
const VkAllocationCallbacks* pAllocator,
VkSurfaceKHR* pSurface);
VKAPI_ATTR VkBool32 VKAPI_CALL vkGetPhysicalDeviceXlibPresentationSupportKHR(
VkPhysicalDevice physicalDevice,
uint32_t queueFamilyIndex,
Display* dpy,
VisualID visualID);
#endif
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,54 +0,0 @@
#ifndef VULKAN_XLIB_RANDR_H_
#define VULKAN_XLIB_RANDR_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2017 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_EXT_acquire_xlib_display 1
#define VK_EXT_ACQUIRE_XLIB_DISPLAY_SPEC_VERSION 1
#define VK_EXT_ACQUIRE_XLIB_DISPLAY_EXTENSION_NAME "VK_EXT_acquire_xlib_display"
typedef VkResult (VKAPI_PTR *PFN_vkAcquireXlibDisplayEXT)(VkPhysicalDevice physicalDevice, Display* dpy, VkDisplayKHR display);
typedef VkResult (VKAPI_PTR *PFN_vkGetRandROutputDisplayEXT)(VkPhysicalDevice physicalDevice, Display* dpy, RROutput rrOutput, VkDisplayKHR* pDisplay);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkAcquireXlibDisplayEXT(
VkPhysicalDevice physicalDevice,
Display* dpy,
VkDisplayKHR display);
VKAPI_ATTR VkResult VKAPI_CALL vkGetRandROutputDisplayEXT(
VkPhysicalDevice physicalDevice,
Display* dpy,
RROutput rrOutput,
VkDisplayKHR* pDisplay);
#endif
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,54 +0,0 @@
#ifndef VULKAN_XLIB_XRANDR_H_
#define VULKAN_XLIB_XRANDR_H_ 1
#ifdef __cplusplus
extern "C" {
#endif
/*
** Copyright (c) 2015-2018 The Khronos Group Inc.
**
** Licensed under the Apache License, Version 2.0 (the "License");
** you may not use this file except in compliance with the License.
** You may obtain a copy of the License at
**
** http://www.apache.org/licenses/LICENSE-2.0
**
** Unless required by applicable law or agreed to in writing, software
** distributed under the License is distributed on an "AS IS" BASIS,
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
** See the License for the specific language governing permissions and
** limitations under the License.
*/
/*
** This header is generated from the Khronos Vulkan XML API Registry.
**
*/
#define VK_EXT_acquire_xlib_display 1
#define VK_EXT_ACQUIRE_XLIB_DISPLAY_SPEC_VERSION 1
#define VK_EXT_ACQUIRE_XLIB_DISPLAY_EXTENSION_NAME "VK_EXT_acquire_xlib_display"
typedef VkResult (VKAPI_PTR *PFN_vkAcquireXlibDisplayEXT)(VkPhysicalDevice physicalDevice, Display* dpy, VkDisplayKHR display);
typedef VkResult (VKAPI_PTR *PFN_vkGetRandROutputDisplayEXT)(VkPhysicalDevice physicalDevice, Display* dpy, RROutput rrOutput, VkDisplayKHR* pDisplay);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR VkResult VKAPI_CALL vkAcquireXlibDisplayEXT(
VkPhysicalDevice physicalDevice,
Display* dpy,
VkDisplayKHR display);
VKAPI_ATTR VkResult VKAPI_CALL vkGetRandROutputDisplayEXT(
VkPhysicalDevice physicalDevice,
Display* dpy,
RROutput rrOutput,
VkDisplayKHR* pDisplay);
#endif
#ifdef __cplusplus
}
#endif
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,4 +1,4 @@
# Copyright © 2017-2018 Intel Corporation
# Copyright © 2017 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
@@ -20,11 +20,8 @@
option(
'platforms',
type : 'array',
value : ['auto'],
choices : [
'', 'auto', 'x11', 'wayland', 'drm', 'surfaceless', 'haiku', 'android',
],
type : 'string',
value : 'auto',
description : 'comma separated list of window systems to support. If this is set to auto all platforms applicable to the OS will be enabled.'
)
option(
@@ -36,10 +33,9 @@ option(
)
option(
'dri-drivers',
type : 'array',
value : ['auto'],
choices : ['', 'auto', 'i915', 'i965', 'r100', 'r200', 'nouveau', 'swrast'],
description : 'List of dri drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
type : 'string',
value : 'auto',
description : 'comma separated list of dri drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
)
option(
'dri-drivers-path',
@@ -55,14 +51,9 @@ option(
)
option(
'gallium-drivers',
type : 'array',
value : ['auto'],
choices : [
'', 'auto', 'pl111', 'radeonsi', 'r300', 'r600', 'nouveau', 'freedreno',
'swrast', 'v3d', 'vc4', 'etnaviv', 'imx', 'tegra', 'i915', 'svga', 'virgl',
'swr',
],
description : 'List of gallium drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
type : 'string',
value : 'auto',
description : 'comma separated list of gallium drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
)
option(
'gallium-extra-hud',
@@ -100,8 +91,8 @@ option(
'gallium-omx',
type : 'combo',
value : 'auto',
choices : ['auto', 'disabled', 'bellagio', 'tizonia'],
description : 'enable gallium omx state tracker.',
choices : ['auto', 'true', 'false'],
description : 'enable gallium omx bellagio state tracker.',
)
option(
'omx-libs-path',
@@ -150,10 +141,9 @@ option(
)
option(
'vulkan-drivers',
type : 'array',
value : ['auto'],
choices : ['', 'auto', 'amd', 'intel'],
description : 'List of vulkan drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
type : 'string',
value : 'auto',
description : 'comma separated list of vulkan drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
)
option(
'shader-cache',
@@ -224,12 +214,6 @@ option(
value : true,
description : 'Build assembly code if possible'
)
option(
'glx-read-only-text',
type : 'boolean',
value : false,
description : 'Disable writable .text section on x86 (decreases performance)'
)
option(
'llvm',
type : 'combo',
@@ -264,6 +248,12 @@ option(
value : false,
description : 'Build unit tests. Currently this will build *all* unit tests, which may build more than expected.'
)
option(
'texture-float',
type : 'boolean',
value : false,
description : 'Enable floating point textures and renderbuffers. This option may be patent encumbered, please read docs/patents.txt and consult with your lawyer before turning this on.'
)
option(
'selinux',
type : 'boolean',
@@ -286,29 +276,7 @@ option(
)
option(
'swr-arches',
type : 'array',
value : ['avx', 'avx2'],
choices : ['avx', 'avx2', 'knl', 'skx'],
description : 'Architectures to build SWR support for.',
)
option(
'tools',
type : 'array',
value : [],
choices : ['freedreno', 'glsl', 'intel', 'nir', 'nouveau', 'xvmc', 'all'],
description : 'List of tools to build.',
)
option(
'power8',
type : 'combo',
value : 'auto',
choices : ['auto', 'true', 'false'],
description : 'Enable power8 optimizations.',
)
option(
'xlib-lease',
type : 'combo',
value : 'auto',
choices : ['auto', 'true', 'false'],
description : 'Enable VK_EXT_acquire_xlib_display.'
type : 'string',
value : 'avx,avx2',
description : 'Comma delemited swr architectures. choices : avx,avx2,knl,skx'
)

View File

@@ -134,9 +134,7 @@ def check_cc(env, cc, expr, cpp_opt = '-E'):
source.write('#if !(%s)\n#error\n#endif\n' % expr)
source.close()
# sys.stderr.write('%r %s %s\n' % (env['CC'], cpp_opt, source.name));
pipe = SCons.Action._subproc(env, env.Split(env['CC']) + [cpp_opt, source.name],
pipe = SCons.Action._subproc(env, [env['CC'], cpp_opt, source.name],
stdin = 'devnull',
stderr = 'devnull',
stdout = 'devnull')
@@ -392,6 +390,10 @@ def generate(env):
cppdefines += ['PIPE_SUBSYSTEM_WINDOWS_USER']
if env['embedded']:
cppdefines += ['PIPE_SUBSYSTEM_EMBEDDED']
if env['texture_float']:
print('warning: Floating-point textures enabled.')
print('warning: Please consult docs/patents.txt with your lawyer before building Mesa.')
cppdefines += ['TEXTURE_FLOAT_ENABLED']
env.Append(CPPDEFINES = cppdefines)
# C compiler options

View File

@@ -123,10 +123,6 @@ def generate(env):
'LLVMDemangle', 'LLVMGlobalISel', 'LLVMDebugInfoMSF',
'LLVMBinaryFormat',
])
if env['platform'] == 'windows' and env['crosscompile']:
# LLVM 5.0 requires MinGW w/ pthreads due to use of std::thread and friends.
assert env['gcc']
env['CXX'] = env['CXX'] + '-posix'
elif llvm_version >= distutils.version.LooseVersion('4.0'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
@@ -215,11 +211,8 @@ def generate(env):
'imagehlp',
'psapi',
'shell32',
'advapi32',
'ole32',
'uuid',
'advapi32'
])
if env['msvc']:
# Some of the LLVM C headers use the inline keyword without
# defining it.

View File

@@ -67,6 +67,7 @@ SUBDIRS += vulkan
endif
EXTRA_DIST += vulkan/registry/vk.xml
EXTRA_DIST += vulkan/registry/vk_android_native_buffer.xml
if HAVE_AMD_DRIVERS
SUBDIRS += amd
@@ -95,6 +96,11 @@ if HAVE_GBM
SUBDIRS += gbm
endif
## Optionally required by EGL
if HAVE_PLATFORM_WAYLAND
SUBDIRS += egl/wayland/wayland-egl
endif
if HAVE_EGL
SUBDIRS += egl
endif

View File

@@ -27,6 +27,3 @@ include $(LOCAL_PATH)/Makefile.sources
include $(LOCAL_PATH)/Android.addrlib.mk
include $(LOCAL_PATH)/Android.common.mk
ifneq ($(filter radeonsi,$(BOARD_GPU_DRIVERS)),)
include $(LOCAL_PATH)/vulkan/Android.mk
endif

View File

@@ -45,6 +45,8 @@ AMD_COMPILER_FILES = \
common/ac_llvm_util.c \
common/ac_llvm_util.h \
common/ac_shader_abi.h \
common/ac_shader_info.c \
common/ac_shader_info.h \
common/ac_shader_util.c \
common/ac_shader_util.h

View File

@@ -1054,7 +1054,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
*/
ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
ADDR_HANDLE hLib, ///< address lib handle
ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) ///< [out] output structure
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) ///< [out] output structure
{
Addr::Lib* pLib = Lib::GetLib(hLib);
@@ -1072,36 +1072,6 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
return returnCode;
}
/**
****************************************************************************************************
* AddrGetMaxMetaAlignments
*
* @brief
* Convert maximum alignments for metadata
*
* @return
* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE
****************************************************************************************************
*/
ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
ADDR_HANDLE hLib, ///< address lib handle
ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) ///< [out] output structure
{
Addr::Lib* pLib = Lib::GetLib(hLib);
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (pLib != NULL)
{
returnCode = pLib->GetMaxMetaAlignments(pOut);
}
else
{
returnCode = ADDR_ERROR;
}
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////

View File

@@ -528,8 +528,7 @@ typedef union _ADDR_SURFACE_FLAGS
UINT_32 preferEquation : 1; ///< Return equation index without adjusting tile mode
UINT_32 matchStencilTileCfg : 1; ///< Select tile index of stencil as well as depth surface
/// to make sure they share same tile config parameters
UINT_32 disallowLargeThickDegrade : 1; ///< Disallow large thick tile degrade
UINT_32 reserved : 1; ///< Reserved bits
UINT_32 reserved : 2; ///< Reserved bits
};
UINT_32 value;
@@ -2274,7 +2273,7 @@ typedef struct _ADDR_COMPUTE_DCCINFO_INPUT
typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
{
UINT_32 size; ///< Size of this structure in bytes
UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key
UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key
UINT_64 dccRamSize; ///< Size of dcc key
UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared
BOOL_32 subLvlCompressible; ///< Whether sub resource is compressiable
@@ -2299,17 +2298,17 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
/**
****************************************************************************************************
* ADDR_GET_MAX_ALINGMENTS_OUTPUT
* ADDR_GET_MAX_ALIGNMENTS_OUTPUT
*
* @brief
* Output structure of AddrGetMaxAlignments
****************************************************************************************************
*/
typedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
typedef struct _ADDR_GET_MAX_ALIGNMENTS_OUTPUT
{
UINT_32 size; ///< Size of this structure in bytes
UINT_32 baseAlign; ///< Maximum base alignment in bytes
} ADDR_GET_MAX_ALINGMENTS_OUTPUT;
UINT_64 baseAlign; ///< Maximum base alignment in bytes
} ADDR_GET_MAX_ALIGNMENTS_OUTPUT;
/**
****************************************************************************************************
@@ -2321,19 +2320,9 @@ typedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
*/
ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
ADDR_HANDLE hLib,
ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut);
/**
****************************************************************************************************
* AddrGetMaxMetaAlignments
*
* @brief
* Gets maximnum alignments for metadata
****************************************************************************************************
*/
ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
ADDR_HANDLE hLib,
ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
/**
****************************************************************************************************
@@ -2377,25 +2366,22 @@ typedef union _ADDR2_SURFACE_FLAGS
{
struct
{
UINT_32 color : 1; ///< This resource is a color buffer, can be used with RTV
UINT_32 depth : 1; ///< Thie resource is a depth buffer, can be used with DSV
UINT_32 stencil : 1; ///< Thie resource is a stencil buffer, can be used with DSV
UINT_32 fmask : 1; ///< This is an fmask surface
UINT_32 overlay : 1; ///< This is an overlay surface
UINT_32 display : 1; ///< This resource is displable, can be used with DRV
UINT_32 prt : 1; ///< This is a partially resident texture
UINT_32 qbStereo : 1; ///< This is a quad buffer stereo surface
UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding
UINT_32 texture : 1; ///< This resource can be used with SRV
UINT_32 unordered : 1; ///< This resource can be used with UAV
UINT_32 rotated : 1; ///< This resource is rotated and displable
UINT_32 needEquation : 1; ///< This resource needs equation to be generated if possible
UINT_32 opt4space : 1; ///< This resource should be optimized for space
UINT_32 minimizeAlign : 1; ///< This resource should use minimum alignment
UINT_32 noMetadata : 1; ///< This resource has no metadata
UINT_32 metaRbUnaligned : 1; ///< This resource has rb unaligned metadata
UINT_32 metaPipeUnaligned : 1; ///< This resource has pipe unaligned metadata
UINT_32 reserved : 14; ///< Reserved bits
UINT_32 color : 1; ///< This resource is a color buffer, can be used with RTV
UINT_32 depth : 1; ///< Thie resource is a depth buffer, can be used with DSV
UINT_32 stencil : 1; ///< Thie resource is a stencil buffer, can be used with DSV
UINT_32 fmask : 1; ///< This is an fmask surface
UINT_32 overlay : 1; ///< This is an overlay surface
UINT_32 display : 1; ///< This resource is displable, can be used with DRV
UINT_32 prt : 1; ///< This is a partially resident texture
UINT_32 qbStereo : 1; ///< This is a quad buffer stereo surface
UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding
UINT_32 texture : 1; ///< This resource can be used with SRV
UINT_32 unordered : 1; ///< This resource can be used with UAV
UINT_32 rotated : 1; ///< This resource is rotated and displable
UINT_32 needEquation : 1; ///< This resource needs equation to be generated if possible
UINT_32 opt4space : 1; ///< This resource should be optimized for space
UINT_32 minimizeAlign : 1; ///< This resource should use minimum alignment
UINT_32 reserved : 17; ///< Reserved bits
};
UINT_32 value;

View File

@@ -76,7 +76,7 @@ typedef int INT;
#ifndef ADDR_STDCALL
#if defined(__GNUC__)
#if defined(__amd64__) || defined(__x86_64__)
#if defined(__AMD64__)
#define ADDR_STDCALL
#else
#define ADDR_STDCALL __attribute__((stdcall))
@@ -87,9 +87,7 @@ typedef int INT;
#endif
#ifndef ADDR_FASTCALL
#if defined(BRAHMA_ARM)
#define ADDR_FASTCALL
#elif defined(__GNUC__)
#if defined(__GNUC__)
#if defined(__i386__)
#define ADDR_FASTCALL __attribute__((regparm(0)))
#else

View File

@@ -79,15 +79,12 @@
#define AMDGPU_POLARIS10_RANGE 0x50, 0x5A
#define AMDGPU_POLARIS11_RANGE 0x5A, 0x64
#define AMDGPU_POLARIS12_RANGE 0x64, 0x6E
#define AMDGPU_VEGAM_RANGE 0x6E, 0xFF
#define AMDGPU_CARRIZO_RANGE 0x01, 0x21
#define AMDGPU_BRISTOL_RANGE 0x10, 0x21
#define AMDGPU_STONEY_RANGE 0x61, 0xFF
#define AMDGPU_VEGA10_RANGE 0x01, 0x14
#define AMDGPU_VEGA12_RANGE 0x14, 0x28
#define AMDGPU_VEGA20_RANGE 0x28, 0xFF
#define AMDGPU_RAVEN_RANGE 0x01, 0x81
@@ -119,7 +116,6 @@
#define ASICREV_IS_POLARIS10_P(r) ASICREV_IS(r, POLARIS10)
#define ASICREV_IS_POLARIS11_M(r) ASICREV_IS(r, POLARIS11)
#define ASICREV_IS_POLARIS12_V(r) ASICREV_IS(r, POLARIS12)
#define ASICREV_IS_VEGAM_P(r) ASICREV_IS(r, VEGAM)
#define ASICREV_IS_CARRIZO(r) ASICREV_IS(r, CARRIZO)
#define ASICREV_IS_CARRIZO_BRISTOL(r) ASICREV_IS(r, BRISTOL)
@@ -127,9 +123,6 @@
#define ASICREV_IS_VEGA10_M(r) ASICREV_IS(r, VEGA10)
#define ASICREV_IS_VEGA10_P(r) ASICREV_IS(r, VEGA10)
#define ASICREV_IS_VEGA12_P(r) ASICREV_IS(r, VEGA12)
#define ASICREV_IS_VEGA12_p(r) ASICREV_IS(r, VEGA12)
#define ASICREV_IS_VEGA20_P(r) ASICREV_IS(r, VEGA20)
#define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN)

View File

@@ -285,12 +285,10 @@ ADDR_E_RETURNCODE Lib::Create(
{
pCreateOut->numEquations =
pLib->HwlGetEquationTableInfo(&pCreateOut->pEquationTable);
pLib->SetMaxAlignments();
}
else if ((pLib == NULL) &&
(returnCode == ADDR_OK))
if ((pLib == NULL) &&
(returnCode == ADDR_OK))
{
// Unknown failures, we return the general error code
returnCode = ADDR_ERROR;
@@ -338,23 +336,6 @@ VOID Lib::SetMinPitchAlignPixels(
m_minPitchAlignPixels = (minPitchAlignPixels == 0) ? 1 : minPitchAlignPixels;
}
/**
****************************************************************************************************
* Lib::SetMaxAlignments
*
* @brief
* Set max alignments
*
* @return
* N/A
****************************************************************************************************
*/
VOID Lib::SetMaxAlignments()
{
m_maxBaseAlign = HwlComputeMaxBaseAlignments();
m_maxMetaBaseAlign = HwlComputeMaxMetaBaseAlignments();
}
/**
****************************************************************************************************
* Lib::GetLib
@@ -377,21 +358,21 @@ Lib* Lib::GetLib(
* Lib::GetMaxAlignments
*
* @brief
* Gets maximum alignments for data surface (include FMask)
* Gets maximum alignments
*
* @return
* ADDR_E_RETURNCODE
****************************************************************************************************
*/
ADDR_E_RETURNCODE Lib::GetMaxAlignments(
ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut ///< [out] output structure
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut ///< [out] output structure
) const
{
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (GetFillSizeFieldsFlags() == TRUE)
{
if (pOut->size != sizeof(ADDR_GET_MAX_ALINGMENTS_OUTPUT))
if (pOut->size != sizeof(ADDR_GET_MAX_ALIGNMENTS_OUTPUT))
{
returnCode = ADDR_PARAMSIZEMISMATCH;
}
@@ -399,54 +380,7 @@ ADDR_E_RETURNCODE Lib::GetMaxAlignments(
if (returnCode == ADDR_OK)
{
if (m_maxBaseAlign != 0)
{
pOut->baseAlign = m_maxBaseAlign;
}
else
{
returnCode = ADDR_NOTIMPLEMENTED;
}
}
return returnCode;
}
/**
****************************************************************************************************
* Lib::GetMaxMetaAlignments
*
* @brief
* Gets maximum alignments for metadata (CMask, DCC and HTile)
*
* @return
* ADDR_E_RETURNCODE
****************************************************************************************************
*/
ADDR_E_RETURNCODE Lib::GetMaxMetaAlignments(
ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut ///< [out] output structure
) const
{
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (GetFillSizeFieldsFlags() == TRUE)
{
if (pOut->size != sizeof(ADDR_GET_MAX_ALINGMENTS_OUTPUT))
{
returnCode = ADDR_PARAMSIZEMISMATCH;
}
}
if (returnCode == ADDR_OK)
{
if (m_maxMetaBaseAlign != 0)
{
pOut->baseAlign = m_maxMetaBaseAlign;
}
else
{
returnCode = ADDR_NOTIMPLEMENTED;
}
returnCode = HwlGetMaxAlignments(pOut);
}
return returnCode;

View File

@@ -282,38 +282,14 @@ public:
BOOL_32 GetExportNorm(const ELEM_GETEXPORTNORM_INPUT* pIn) const;
ADDR_E_RETURNCODE GetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
ADDR_E_RETURNCODE GetMaxMetaAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
ADDR_E_RETURNCODE GetMaxAlignments(ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const;
protected:
Lib(); // Constructor is protected
Lib(const Client* pClient);
/// Pure virtual function to get max base alignments
virtual UINT_32 HwlComputeMaxBaseAlignments() const = 0;
/// Gets maximum alignements for metadata
virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const
{
ADDR_NOT_IMPLEMENTED();
return 0;
}
VOID ValidBaseAlignments(UINT_32 alignment) const
{
#if DEBUG
ADDR_ASSERT(alignment <= m_maxBaseAlign);
#endif
}
VOID ValidMetaBaseAlignments(UINT_32 metaAlignment) const
{
#if DEBUG
ADDR_ASSERT(metaAlignment <= m_maxMetaBaseAlign);
#endif
}
/// Pure virtual function to get max alignments
virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const = 0;
//
// Initialization
@@ -365,8 +341,6 @@ private:
VOID SetMinPitchAlignPixels(UINT_32 minPitchAlignPixels);
VOID SetMaxAlignments();
protected:
LibClass m_class; ///< Store class type (HWL type)
@@ -396,10 +370,6 @@ protected:
UINT_32 m_minPitchAlignPixels; ///< Minimum pitch alignment in pixels
UINT_32 m_maxSamples; ///< Max numSamples
UINT_32 m_maxBaseAlign; ///< Max base alignment for data surface
UINT_32 m_maxMetaBaseAlign; ///< Max base alignment for metadata
private:
ElemLib* m_pElemLib; ///< Element Lib pointer
};

View File

@@ -428,8 +428,6 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo(
}
}
ValidBaseAlignments(pOut->baseAlign);
return returnCode;
}
@@ -897,8 +895,6 @@ ADDR_E_RETURNCODE Lib::ComputeFmaskInfo(
}
}
ValidBaseAlignments(pOut->baseAlign);
return returnCode;
}
@@ -1337,8 +1333,6 @@ ADDR_E_RETURNCODE Lib::ComputeHtileInfo(
}
}
ValidMetaBaseAlignments(pOut->baseAlign);
return returnCode;
}
@@ -1405,8 +1399,6 @@ ADDR_E_RETURNCODE Lib::ComputeCmaskInfo(
}
}
ValidMetaBaseAlignments(pOut->baseAlign);
return returnCode;
}
@@ -1451,11 +1443,9 @@ ADDR_E_RETURNCODE Lib::ComputeDccInfo(
pIn = &input;
}
if (ret == ADDR_OK)
if (ADDR_OK == ret)
{
ret = HwlComputeDccInfo(pIn, pOut);
ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
}
}
@@ -3662,7 +3652,7 @@ VOID Lib::OptimizeTileMode(
tileMode = (thickness == 1) ?
ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK;
}
else if ((thickness > 1) && (pInOut->flags.disallowLargeThickDegrade == 0))
else if (thickness > 1)
{
// As in the following HwlComputeSurfaceInfo, thick modes may be degraded to
// thinner modes, we should re-evaluate whether the corresponding

View File

@@ -295,8 +295,6 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo(
ADDR_ASSERT(pOut->surfSize != 0);
ValidBaseAlignments(pOut->baseAlign);
return returnCode;
}
@@ -449,8 +447,6 @@ ADDR_E_RETURNCODE Lib::ComputeHtileInfo(
else
{
returnCode = HwlComputeHtileInfo(pIn, pOut);
ValidMetaBaseAlignments(pOut->baseAlign);
}
return returnCode;
@@ -549,8 +545,6 @@ ADDR_E_RETURNCODE Lib::ComputeCmaskInfo(
else
{
returnCode = HwlComputeCmaskInfo(pIn, pOut);
ValidMetaBaseAlignments(pOut->baseAlign);
}
return returnCode;
@@ -694,8 +688,6 @@ ADDR_E_RETURNCODE Lib::ComputeFmaskInfo(
}
}
ValidBaseAlignments(pOut->baseAlign);
return returnCode;
}
@@ -772,8 +764,6 @@ ADDR_E_RETURNCODE Lib::ComputeDccInfo(
else
{
returnCode = HwlComputeDccInfo(pIn, pOut);
ValidMetaBaseAlignments(pOut->dccRamBaseAlign);
}
return returnCode;

View File

@@ -480,6 +480,12 @@ protected:
return HwlGetEquationIndex(pIn, pOut);
}
virtual UINT_32 HwlComputeSurfaceBaseAlign(AddrSwizzleMode swizzleMode) const
{
ADDR_NOT_IMPLEMENTED();
return 0;
}
virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const

View File

@@ -189,10 +189,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileInfo(
numCompressBlkPerMetaBlk = 1 << numCompressBlkPerMetaBlkLog2;
Dim3d metaBlkDim = {8, 8, 1};
Dim3d metaBlkDim = {8, 8, 1};
UINT_32 totalAmpBits = numCompressBlkPerMetaBlkLog2;
UINT_32 widthAmp = (pIn->numMipLevels > 1) ? (totalAmpBits >> 1) : RoundHalf(totalAmpBits);
UINT_32 heightAmp = totalAmpBits - widthAmp;
UINT_32 widthAmp = (pIn->numMipLevels > 1) ? (totalAmpBits >> 1) : RoundHalf(totalAmpBits);
UINT_32 heightAmp = totalAmpBits - widthAmp;
metaBlkDim.w <<= widthAmp;
metaBlkDim.h <<= heightAmp;
@@ -221,42 +221,39 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileInfo(
pIn->unalignedWidth, pIn->unalignedHeight, pIn->numSlices,
&numMetaBlkX, &numMetaBlkY, &numMetaBlkZ);
const UINT_32 metaBlkSize = numCompressBlkPerMetaBlk << 2;
UINT_32 align = numPipeTotal * numRbTotal * m_pipeInterleaveBytes;
if ((IsXor(pIn->swizzleMode) == FALSE) && (numPipeTotal > 2))
{
align *= (numPipeTotal >> 1);
}
align = Max(align, metaBlkSize);
if (m_settings.metaBaseAlignFix)
{
align = Max(align, GetBlockSize(pIn->swizzleMode));
}
UINT_32 sizeAlign = numPipeTotal * numRbTotal * m_pipeInterleaveBytes;
if (m_settings.htileAlignFix)
{
const INT_32 metaBlkSizeLog2 = numCompressBlkPerMetaBlkLog2 + 2;
const INT_32 htileCachelineSizeLog2 = 11;
const INT_32 maxNumOfRbMaskBits = 1 + Log2(numPipeTotal) + Log2(numRbTotal);
INT_32 rbMaskPadding = Max(0, htileCachelineSizeLog2 - (metaBlkSizeLog2 - maxNumOfRbMaskBits));
align <<= rbMaskPadding;
sizeAlign <<= 1;
}
pOut->pitch = numMetaBlkX * metaBlkDim.w;
pOut->height = numMetaBlkY * metaBlkDim.h;
pOut->sliceSize = numMetaBlkX * numMetaBlkY * metaBlkSize;
pOut->sliceSize = numMetaBlkX * numMetaBlkY * numCompressBlkPerMetaBlk * 4;
pOut->metaBlkWidth = metaBlkDim.w;
pOut->metaBlkHeight = metaBlkDim.h;
pOut->metaBlkWidth = metaBlkDim.w;
pOut->metaBlkHeight = metaBlkDim.h;
pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY;
pOut->baseAlign = align;
pOut->htileBytes = PowTwoAlign(pOut->sliceSize * numMetaBlkZ, align);
pOut->baseAlign = Max(numCompressBlkPerMetaBlk * 4, sizeAlign);
if (m_settings.metaBaseAlignFix)
{
pOut->baseAlign = Max(pOut->baseAlign, GetBlockSize(pIn->swizzleMode));
}
if ((IsXor(pIn->swizzleMode) == FALSE) && (numPipeTotal > 2))
{
UINT_32 additionalAlign = numPipeTotal * numCompressBlkPerMetaBlk * 2;
if (additionalAlign > sizeAlign)
{
sizeAlign = additionalAlign;
}
}
pOut->htileBytes = PowTwoAlign(pOut->sliceSize * numMetaBlkZ, sizeAlign);
return ADDR_OK;
}
@@ -336,17 +333,17 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskInfo(
UINT_32 sizeAlign = numPipeTotal * numRbTotal * m_pipeInterleaveBytes;
if (m_settings.metaBaseAlignFix)
{
sizeAlign = Max(sizeAlign, GetBlockSize(pIn->swizzleMode));
}
pOut->pitch = numMetaBlkX * metaBlkDim.w;
pOut->height = numMetaBlkY * metaBlkDim.h;
pOut->sliceSize = (numMetaBlkX * numMetaBlkY * numCompressBlkPerMetaBlk) >> 1;
pOut->cmaskBytes = PowTwoAlign(pOut->sliceSize * numMetaBlkZ, sizeAlign);
pOut->baseAlign = Max(numCompressBlkPerMetaBlk >> 1, sizeAlign);
if (m_settings.metaBaseAlignFix)
{
pOut->baseAlign = Max(pOut->baseAlign, GetBlockSize(pIn->swizzleMode));
}
pOut->metaBlkWidth = metaBlkDim.w;
pOut->metaBlkHeight = metaBlkDim.h;
@@ -641,16 +638,16 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccInfo(
sizeAlign *= (numFrags / m_maxCompFrag);
}
if (m_settings.metaBaseAlignFix)
{
sizeAlign = Max(sizeAlign, GetBlockSize(pIn->swizzleMode));
}
pOut->dccRamSize = numMetaBlkX * numMetaBlkY * numMetaBlkZ *
numCompressBlkPerMetaBlk * numFrags;
pOut->dccRamSize = PowTwoAlign(pOut->dccRamSize, sizeAlign);
pOut->dccRamBaseAlign = Max(numCompressBlkPerMetaBlk, sizeAlign);
if (m_settings.metaBaseAlignFix)
{
pOut->dccRamBaseAlign = Max(pOut->dccRamBaseAlign, GetBlockSize(pIn->swizzleMode));
}
pOut->pitch = numMetaBlkX * metaBlkDim.w;
pOut->height = numMetaBlkY * metaBlkDim.h;
pOut->depth = numMetaBlkZ * metaBlkDim.d;
@@ -673,78 +670,21 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccInfo(
/**
************************************************************************************************************************
* Gfx9Lib::HwlComputeMaxBaseAlignments
* Gfx9Lib::HwlGetMaxAlignments
*
* @brief
* Gets maximum alignments
* @return
* maximum alignments
* ADDR_E_RETURNCODE
************************************************************************************************************************
*/
UINT_32 Gfx9Lib::HwlComputeMaxBaseAlignments() const
ADDR_E_RETURNCODE Gfx9Lib::HwlGetMaxAlignments(
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut ///< [out] output structure
) const
{
return ComputeSurfaceBaseAlignTiled(ADDR_SW_64KB);
}
pOut->baseAlign = HwlComputeSurfaceBaseAlign(ADDR_SW_64KB);
/**
************************************************************************************************************************
* Gfx9Lib::HwlComputeMaxMetaBaseAlignments
*
* @brief
* Gets maximum alignments for metadata
* @return
* maximum alignments for metadata
************************************************************************************************************************
*/
UINT_32 Gfx9Lib::HwlComputeMaxMetaBaseAlignments() const
{
// Max base alignment for Htile
const UINT_32 maxNumPipeTotal = GetPipeNumForMetaAddressing(TRUE, ADDR_SW_64KB_Z);
const UINT_32 maxNumRbTotal = m_se * m_rbPerSe;
// If applyAliasFix was set, the extra bits should be MAX(10u, m_pipeInterleaveLog2),
// but we never saw any ASIC whose m_pipeInterleaveLog2 != 8, so just put an assertion and simply the logic.
ADDR_ASSERT((m_settings.applyAliasFix == FALSE) || (m_pipeInterleaveLog2 <= 10u));
const UINT_32 maxNumCompressBlkPerMetaBlk = 1u << (m_seLog2 + m_rbPerSeLog2 + 10u);
UINT_32 maxBaseAlignHtile = maxNumPipeTotal * maxNumRbTotal * m_pipeInterleaveBytes;
if (maxNumPipeTotal > 2)
{
maxBaseAlignHtile *= (maxNumPipeTotal >> 1);
}
maxBaseAlignHtile = Max(maxNumCompressBlkPerMetaBlk << 2, maxBaseAlignHtile);
if (m_settings.metaBaseAlignFix)
{
maxBaseAlignHtile = Max(maxBaseAlignHtile, GetBlockSize(ADDR_SW_64KB));
}
if (m_settings.htileAlignFix)
{
maxBaseAlignHtile *= maxNumPipeTotal;
}
// Max base alignment for Cmask will not be larger than that for Htile, no need to calculate
// Max base alignment for 2D Dcc will not be larger than that for 3D, no need to calculate
UINT_32 maxBaseAlignDcc3D = 65536;
if ((maxNumPipeTotal > 1) || (maxNumRbTotal > 1))
{
maxBaseAlignDcc3D = Min(m_se * m_rbPerSe * 262144, 65536 * 128u);
}
// Max base alignment for Msaa Dcc
UINT_32 maxBaseAlignDccMsaa = maxNumPipeTotal * maxNumRbTotal * m_pipeInterleaveBytes * (8 / m_maxCompFrag);
if (m_settings.metaBaseAlignFix)
{
maxBaseAlignDccMsaa = Max(maxBaseAlignDccMsaa, GetBlockSize(ADDR_SW_64KB));
}
return Max(maxBaseAlignHtile, Max(maxBaseAlignDccMsaa, maxBaseAlignDcc3D));
return ADDR_OK;
}
/**
@@ -784,11 +724,9 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskAddrFromCoord(
UINT_32 metaBlkWidthLog2 = Log2(output.metaBlkWidth);
UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight);
MetaEqParams metaEqParams = {0, fmaskElementBytesLog2, 0, pIn->cMaskFlags,
Gfx9DataFmask, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0};
const CoordEq* pMetaEq = GetMetaEquation(metaEqParams);
const CoordEq* pMetaEq = GetMetaEquation({0, fmaskElementBytesLog2, 0, pIn->cMaskFlags,
Gfx9DataFmask, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0});
UINT_32 xb = pIn->x / output.metaBlkWidth;
UINT_32 yb = pIn->y / output.metaBlkHeight;
@@ -860,11 +798,9 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileAddrFromCoord(
UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight);
UINT_32 numSamplesLog2 = Log2(pIn->numSamples);
MetaEqParams metaEqParams = {0, elementBytesLog2, numSamplesLog2, pIn->hTileFlags,
Gfx9DataDepthStencil, pIn->swizzleMode, ADDR_RSRC_TEX_2D,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0};
const CoordEq* pMetaEq = GetMetaEquation(metaEqParams);
const CoordEq* pMetaEq = GetMetaEquation({0, elementBytesLog2, numSamplesLog2, pIn->hTileFlags,
Gfx9DataDepthStencil, pIn->swizzleMode, ADDR_RSRC_TEX_2D,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0});
UINT_32 xb = pIn->x / output.metaBlkWidth;
UINT_32 yb = pIn->y / output.metaBlkHeight;
@@ -934,11 +870,9 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileCoordFromAddr(
UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight);
UINT_32 numSamplesLog2 = Log2(pIn->numSamples);
MetaEqParams metaEqParams = {0, elementBytesLog2, numSamplesLog2, pIn->hTileFlags,
Gfx9DataDepthStencil, pIn->swizzleMode, ADDR_RSRC_TEX_2D,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0};
const CoordEq* pMetaEq = GetMetaEquation(metaEqParams);
const CoordEq* pMetaEq = GetMetaEquation({0, elementBytesLog2, numSamplesLog2, pIn->hTileFlags,
Gfx9DataDepthStencil, pIn->swizzleMode, ADDR_RSRC_TEX_2D,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0});
UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->hTileFlags.pipeAligned,
pIn->swizzleMode);
@@ -1014,12 +948,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccAddrFromCoord(
UINT_32 compBlkHeightLog2 = Log2(output.compressBlkHeight);
UINT_32 compBlkDepthLog2 = Log2(output.compressBlkDepth);
MetaEqParams metaEqParams = {pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags,
Gfx9DataColor, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2,
compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2};
const CoordEq* pMetaEq = GetMetaEquation(metaEqParams);
const CoordEq* pMetaEq = GetMetaEquation({pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags,
Gfx9DataColor, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2,
compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2});
UINT_32 xb = pIn->x / output.metaBlkWidth;
UINT_32 yb = pIn->y / output.metaBlkHeight;
@@ -1123,10 +1055,6 @@ BOOL_32 Gfx9Lib::HwlInitGlobalParams(
break;
}
// Addr::V2::Lib::ComputePipeBankXor()/ComputeSlicePipeBankXor() requires pipe interleave to be exactly 8 bits,
// and any larger value requires a post-process (left shift) on the output pipeBankXor bits.
ADDR_ASSERT(m_pipeInterleaveBytes == ADDR_PIPEINTERLEAVE_256B);
switch (gbAddrConfig.bits.NUM_BANKS)
{
case ADDR_CONFIG_1_BANK:
@@ -1223,20 +1151,6 @@ BOOL_32 Gfx9Lib::HwlInitGlobalParams(
ADDR_ASSERT((m_blockVarSizeLog2 == 0) ||
((m_blockVarSizeLog2 >= 17u) && (m_blockVarSizeLog2 <= 20u)));
m_blockVarSizeLog2 = Min(Max(17u, m_blockVarSizeLog2), 20u);
if ((m_rbPerSeLog2 == 1) &&
(((m_pipesLog2 == 1) && ((m_seLog2 == 2) || (m_seLog2 == 3))) ||
((m_pipesLog2 == 2) && ((m_seLog2 == 1) || (m_seLog2 == 2)))))
{
ADDR_ASSERT(m_settings.isVega10 == FALSE);
ADDR_ASSERT(m_settings.isRaven == FALSE);
ADDR_ASSERT(m_settings.isVega20 == FALSE);
if (m_settings.isVega12)
{
m_settings.htileCacheRbConflict = 1;
}
}
}
else
{
@@ -1273,8 +1187,7 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily(
case FAMILY_AI:
m_settings.isArcticIsland = 1;
m_settings.isVega10 = ASICREV_IS_VEGA10_P(uChipRevision);
m_settings.isVega12 = ASICREV_IS_VEGA12_P(uChipRevision);
m_settings.isVega20 = ASICREV_IS_VEGA20_P(uChipRevision);
m_settings.isDce12 = 1;
if (m_settings.isVega10 == 0)
@@ -3366,11 +3279,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
addrPreferredSwSet.value = AddrSwSetZ;
addrValidSwSet.value = AddrSwSetZ;
if (pIn->flags.noMetadata == FALSE)
if (pIn->flags.depth && pIn->flags.texture)
{
if (pIn->flags.depth &&
pIn->flags.texture &&
(((bpp == 16) && (numFrags >= 4)) || ((bpp == 32) && (numFrags >= 2))))
if (((bpp == 16) && (numFrags >= 4)) ||
((bpp == 32) && (numFrags >= 2)))
{
// When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane
// equation from wrong address within memory range a tile covered and use the
@@ -3378,16 +3290,6 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
pOut->canXor = FALSE;
prtXor = FALSE;
}
if (m_settings.htileCacheRbConflict &&
(pIn->flags.depth || pIn->flags.stencil) &&
(slice > 1) &&
(pIn->flags.metaRbUnaligned == FALSE) &&
(pIn->flags.metaPipeUnaligned == FALSE))
{
// Z_X 2D array with Rb/Pipe aligned HTile won't have metadata cache coherency
pOut->canXor = FALSE;
}
}
}
else if (ElemLib::IsBlockCompressed(pIn->format))
@@ -3500,12 +3402,12 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
if (pIn->bpp == 64)
{
addrPreferredSwSet.value = AddrSwSetD;
addrValidSwSet.value = AddrSwSetS | AddrSwSetD;
addrValidSwSet.value = AddrSwSetD;
}
else
{
addrPreferredSwSet.value = AddrSwSetS;
addrValidSwSet.value = AddrSwSetS;
addrValidSwSet.value = AddrSwSetS | AddrSwSetD;
}
blockSet.micro = FALSE;
@@ -4135,7 +4037,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceInfoTiled(
pOut->sliceSize = static_cast<UINT_64>(pOut->mipChainPitch) * pOut->mipChainHeight *
(pIn->bpp >> 3) * pIn->numFrags;
pOut->surfSize = pOut->sliceSize * pOut->mipChainSlice;
pOut->baseAlign = ComputeSurfaceBaseAlignTiled(pIn->swizzleMode);
pOut->baseAlign = HwlComputeSurfaceBaseAlign(pIn->swizzleMode);
if (pIn->flags.prt)
{
@@ -4860,12 +4762,15 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceAddrFromCoordTiled(
UINT_32 pitchInMacroBlock = localOut.mipChainPitch / localOut.blockWidth;
UINT_32 paddedHeightInMacroBlock = localOut.mipChainHeight / localOut.blockHeight;
UINT_32 sliceSizeInMacroBlock = pitchInMacroBlock * paddedHeightInMacroBlock;
UINT_64 macroBlockIndex =
UINT_32 macroBlockIndex =
(pIn->slice + mipStartPos.d) * sliceSizeInMacroBlock +
((pIn->y / localOut.blockHeight) + mipStartPos.h) * pitchInMacroBlock +
((pIn->x / localOut.blockWidth) + mipStartPos.w);
pOut->addr = blockOffset | (macroBlockIndex << log2blkSize);
UINT_64 macroBlockOffset = (static_cast<UINT_64>(macroBlockIndex) <<
GetBlockSizeLog2(pIn->swizzleMode));
pOut->addr = blockOffset | macroBlockOffset;
}
else
{
@@ -4930,7 +4835,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceAddrFromCoordTiled(
UINT_32 pitchInBlock = localOut.mipChainPitch / localOut.blockWidth;
UINT_32 sliceSizeInBlock =
(localOut.mipChainHeight / localOut.blockHeight) * pitchInBlock;
UINT_64 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb;
UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb;
pOut->addr = blockOffset | (blockIndex << log2blkSize);
}

View File

@@ -55,20 +55,19 @@ struct Gfx9ChipSettings
UINT_32 isArcticIsland : 1;
UINT_32 isVega10 : 1;
UINT_32 isRaven : 1;
UINT_32 isVega12 : 1;
UINT_32 isVega20 : 1;
UINT_32 reserved0 : 29;
// Display engine IP version name
UINT_32 isDce12 : 1;
UINT_32 isDcn1 : 1;
UINT_32 reserved1 : 29;
// Misc configuration bits
UINT_32 metaBaseAlignFix : 1;
UINT_32 depthPipeXorDisable : 1;
UINT_32 htileAlignFix : 1;
UINT_32 applyAliasFix : 1;
UINT_32 htileCacheRbConflict: 1;
UINT_32 reserved2 : 27;
UINT_32 reserved2 : 28;
};
};
@@ -122,6 +121,9 @@ public:
return (pMem != NULL) ? new (pMem) Gfx9Lib(pClient) : NULL;
}
virtual BOOL_32 IsValidDisplaySwizzleMode(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
protected:
Gfx9Lib(const Client* pClient);
virtual ~Gfx9Lib();
@@ -222,7 +224,7 @@ protected:
AddrSwizzleMode swMode,
UINT_32 elementBytesLog2) const;
UINT_32 ComputeSurfaceBaseAlignTiled(AddrSwizzleMode swizzleMode) const
virtual UINT_32 HwlComputeSurfaceBaseAlign(AddrSwizzleMode swizzleMode) const
{
UINT_32 baseAlign;
@@ -398,11 +400,11 @@ protected:
static const UINT_32 MaxCachedMetaEq = 2;
private:
virtual UINT_32 HwlComputeMaxBaseAlignments() const;
virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const;
virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const;
virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn);
virtual BOOL_32 HwlInitGlobalParams(
const ADDR_CREATE_INPUT* pCreateIn);
VOID GetRbEquation(CoordEq* pRbEq, UINT_32 rbPerSeLog2, UINT_32 seLog2) const;
@@ -432,8 +434,6 @@ private:
UINT_32 mip0Width, UINT_32 mip0Height, UINT_32 mip0Depth,
UINT_32* pNumMetaBlkX, UINT_32* pNumMetaBlkY, UINT_32* pNumMetaBlkZ) const;
BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
ADDR_E_RETURNCODE ComputeSurfaceLinearPadding(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32* pMipmap0PaddedWidth,

View File

@@ -401,7 +401,6 @@ ChipFamily CiLib::HwlConvertChipFamily(
m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision);
m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision);
m_settings.isPolaris12 = ASICREV_IS_POLARIS12_V(uChipRevision);
m_settings.isVegaM = ASICREV_IS_VEGAM_P(uChipRevision);
family = ADDR_CHIP_FAMILY_VI;
break;
case FAMILY_CZ:
@@ -471,10 +470,6 @@ BOOL_32 CiLib::HwlInitGlobalParams(
{
m_pipes = 4;
}
else if (m_settings.isVegaM)
{
m_pipes = 16;
}
if (valid)
{
@@ -741,7 +736,7 @@ ADDR_E_RETURNCODE CiLib::HwlComputeSurfaceInfo(
SiLib::HwlComputeSurfaceInfo(&localIn, pOut);
ADDR_ASSERT((MinDepth2DThinIndex <= pOut->tileIndex) && (MaxDepth2DThinIndex >= pOut->tileIndex));
ADDR_ASSERT(((MinDepth2DThinIndex <= pOut->tileIndex) && (MaxDepth2DThinIndex >= pOut->tileIndex)) || pOut->tileIndex == Depth1DThinIndex);
depthStencil2DTileConfigMatch = DepthStencilTileCfgMatch(pIn, pOut);
}
@@ -2162,27 +2157,29 @@ VOID CiLib::HwlPadDimensions(
/**
****************************************************************************************************
* CiLib::HwlComputeMaxBaseAlignments
* CiLib::HwlGetMaxAlignments
*
* @brief
* Gets maximum alignments
* @return
* maximum alignments
* ADDR_E_RETURNCODE
****************************************************************************************************
*/
UINT_32 CiLib::HwlComputeMaxBaseAlignments() const
ADDR_E_RETURNCODE CiLib::HwlGetMaxAlignments(
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut ///< [out] output structure
) const
{
const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info);
// Initial size is 64 KiB for PRT.
UINT_32 maxBaseAlign = 64 * 1024;
UINT_64 maxBaseAlign = 64 * 1024;
for (UINT_32 i = 0; i < m_noOfMacroEntries; i++)
{
// The maximum tile size is 16 byte-per-pixel and either 8-sample or 8-slice.
UINT_32 tileSize = m_macroTileTable[i].tileSplitBytes;
UINT_32 baseAlign = tileSize * pipes * m_macroTileTable[i].banks *
UINT_64 baseAlign = tileSize * pipes * m_macroTileTable[i].banks *
m_macroTileTable[i].bankWidth * m_macroTileTable[i].bankHeight;
if (baseAlign > maxBaseAlign)
@@ -2191,32 +2188,12 @@ UINT_32 CiLib::HwlComputeMaxBaseAlignments() const
}
}
return maxBaseAlign;
}
/**
****************************************************************************************************
* CiLib::HwlComputeMaxMetaBaseAlignments
*
* @brief
* Gets maximum alignments for metadata
* @return
* maximum alignments for metadata
****************************************************************************************************
*/
UINT_32 CiLib::HwlComputeMaxMetaBaseAlignments() const
{
UINT_32 maxBank = 1;
for (UINT_32 i = 0; i < m_noOfMacroEntries; i++)
if (pOut != NULL)
{
if ((m_settings.isVolcanicIslands) && IsMacroTiled(m_tileTable[i].mode))
{
maxBank = Max(maxBank, m_macroTileTable[i].banks);
}
pOut->baseAlign = maxBaseAlign;
}
return SiLib::HwlComputeMaxMetaBaseAlignments() * maxBank;
return ADDR_OK;
}
/**

View File

@@ -137,9 +137,7 @@ protected:
const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
virtual UINT_32 HwlComputeMaxBaseAlignments() const;
virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const;
virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const;
virtual VOID HwlPadDimensions(
AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,

View File

@@ -100,13 +100,11 @@ BOOL_32 EgBasedLib::DispatchComputeSurfaceInfo(
ADDR_TILEINFO tileInfoDef = {0};
ADDR_TILEINFO* pTileInfo = &tileInfoDef;
UINT_32 padDims = 0;
UINT_32 padDims = 0;
BOOL_32 valid;
if (pIn->flags.disallowLargeThickDegrade == 0)
{
tileMode = DegradeLargeThickTile(tileMode, bpp);
}
tileMode = DegradeLargeThickTile(tileMode, bpp);
// Only override numSamples for NI above
if (m_chipFamily >= ADDR_CHIP_FAMILY_NI)

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@@ -611,29 +611,6 @@ ADDR_E_RETURNCODE SiLib::ComputePipeEquation(
break;
}
if (m_settings.isVegaM && (pEquation->numBits == 4))
{
ADDR_CHANNEL_SETTING addeMsb = pAddr[0];
ADDR_CHANNEL_SETTING xor1Msb = pXor1[0];
ADDR_CHANNEL_SETTING xor2Msb = pXor2[0];
pAddr[0] = pAddr[1];
pXor1[0] = pXor1[1];
pXor2[0] = pXor2[1];
pAddr[1] = pAddr[2];
pXor1[1] = pXor1[2];
pXor2[1] = pXor2[2];
pAddr[2] = pAddr[3];
pXor1[2] = pXor1[3];
pXor2[2] = pXor2[3];
pAddr[3] = addeMsb;
pXor1[3] = xor1Msb;
pXor2[3] = xor2Msb;
}
for (UINT_32 i = 0; i < pEquation->numBits; i++)
{
if (pAddr[i].value == 0)
@@ -777,16 +754,6 @@ UINT_32 SiLib::ComputePipeFromCoord(
ADDR_UNHANDLED_CASE();
break;
}
if (m_settings.isVegaM && (numPipes == 16))
{
UINT_32 pipeMsb = pipeBit0;
pipeBit0 = pipeBit1;
pipeBit1 = pipeBit2;
pipeBit2 = pipeBit3;
pipeBit3 = pipeMsb;
}
pipe = pipeBit0 | (pipeBit1 << 1) | (pipeBit2 << 2) | (pipeBit3 << 3);
UINT_32 microTileThickness = Thickness(tileMode);
@@ -3501,20 +3468,22 @@ VOID SiLib::HwlSelectTileMode(
/**
****************************************************************************************************
* SiLib::HwlComputeMaxBaseAlignments
* SiLib::HwlGetMaxAlignments
*
* @brief
* Gets maximum alignments
* @return
* maximum alignments
* ADDR_E_RETURNCODE
****************************************************************************************************
*/
UINT_32 SiLib::HwlComputeMaxBaseAlignments() const
ADDR_E_RETURNCODE SiLib::HwlGetMaxAlignments(
ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut ///< [out] output structure
) const
{
const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info);
// Initial size is 64 KiB for PRT.
UINT_32 maxBaseAlign = 64 * 1024;
UINT_64 maxBaseAlign = 64 * 1024;
for (UINT_32 i = 0; i < m_noOfEntries; i++)
{
@@ -3525,7 +3494,7 @@ UINT_32 SiLib::HwlComputeMaxBaseAlignments() const
UINT_32 tileSize = Min(m_tileTable[i].info.tileSplitBytes,
MicroTilePixels * 8 * 16);
UINT_32 baseAlign = tileSize * pipes * m_tileTable[i].info.banks *
UINT_64 baseAlign = tileSize * pipes * m_tileTable[i].info.banks *
m_tileTable[i].info.bankWidth * m_tileTable[i].info.bankHeight;
if (baseAlign > maxBaseAlign)
@@ -3535,29 +3504,12 @@ UINT_32 SiLib::HwlComputeMaxBaseAlignments() const
}
}
return maxBaseAlign;
}
/**
****************************************************************************************************
* SiLib::HwlComputeMaxMetaBaseAlignments
*
* @brief
* Gets maximum alignments for metadata
* @return
* maximum alignments for metadata
****************************************************************************************************
*/
UINT_32 SiLib::HwlComputeMaxMetaBaseAlignments() const
{
UINT_32 maxPipe = 1;
for (UINT_32 i = 0; i < m_noOfEntries; i++)
if (pOut != NULL)
{
maxPipe = Max(maxPipe, HwlGetPipes(&m_tileTable[i].info));
pOut->baseAlign = maxBaseAlign;
}
return m_pipeInterleaveBytes * maxPipe;
return ADDR_OK;
}
/**

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@@ -87,7 +87,6 @@ struct SiChipSettings
UINT_32 isPolaris10 : 1;
UINT_32 isPolaris11 : 1;
UINT_32 isPolaris12 : 1;
UINT_32 isVegaM : 1;
// VI fusion
UINT_32 isCarrizo : 1;
};
@@ -264,9 +263,7 @@ protected:
return TRUE;
}
virtual UINT_32 HwlComputeMaxBaseAlignments() const;
virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const;
virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const;
virtual VOID HwlComputeSurfaceAlignmentsMacroTiled(
AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,

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