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3305 Commits

Author SHA1 Message Date
Jonathan Marek
3e1b93ec4f turnip: fix wrong substream size in parse_multisample_and_color_blend
Missed updating this when adding tu6_emit_sample_locations

Fixes: a92d2e1109 ("turnip: implement VK_EXT_sample_locations")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4795>
2020-04-29 20:09:54 +00:00
Eric Anholt
05e6f763e7 util/ra: Improve ra_set_finalize() performance.
BITSET_FOR_EACH_SET can walk a sparse set (such as a register class's set
of registers) much faster than just iterating over individual bits.

Improves freedreno startup time (as measured by shader-db ./run
shaders/closed/gputest/triangle on my x86 system) by -4.12679% +/-
1.99006% (n=151)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
53ac2dabec util/ra: Use util_dynarray for handling the conflict lists.
Again, shortens the code significantly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
57088854e6 util/ra: Use util_dynarray for the adjacency list.
This make the code significantly more readable, I think (along with
shorter).  Also, using util_dynarray_delete_unordered() saves us a move of
the rest of the list when removing adjacency on a node.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
a1de267a21 util/ra: Sanity check that we're adding a valid reg to a class.
BITSET_SET might not segfault on you right away if you're just slightly
off, and an assert is nicer anyway.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Eric Anholt
5bcaf30aba util/ra: Sanity check that the driver selected a valid reg.
freedreno was returning -1 when it didn't pick a reg from the given bitset
due to an off-by-a-small-number error.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4537>
2020-04-29 19:46:08 +00:00
Konrad Dybcio
fc66800032 freedreno/a4xx: enable A405
This patch brings support for Adreno A405
as found on MSM8939. That chip is a cut-down
version of A4XX IP and requires no special handling.

Tested on Asus Zenfone 2 Laser (Z00T) smartphone.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4753>
2020-04-29 19:15:58 +00:00
Mike Blumenkrantz
328cc00d39 iris: handle PIPE_CAP_CLEAR_SCISSORED
this allows passing scissored clear calls through the driver where it can
be handled by a repclear shader

fix kwg/mesa#61

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4310>
2020-04-29 18:05:06 +00:00
Mike Blumenkrantz
1c8bcad81a gallium: add pipe cap for scissored clears and pass scissor state to clear() hook
this adds a new pipe cap that drivers can support which enables passing buffer
clears with scissor test enabled through to be handled by the driver instead
of having mesa draw a quad

also adjust all existing clear() hooks to have the new parameter

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4310>
2020-04-29 18:05:06 +00:00
Caio Marcelo de Oliveira Filho
882928dcaa i965: Use correct constant for max_variable_local_size
Fixes: 5664bd6db3 ("i965: Implement ARB_compute_variable_group_size")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4799>
2020-04-29 17:12:42 +00:00
Mike Blumenkrantz
91375f13ce iris: move iris_vtable to iris_screen
instead of inlining this into every context, now a struct is used in the screen
struct to reduce memory usage and simplify a couple of the methods

Closes: https://gitlab.freedesktop.org/kwg/mesa/-/issues/6
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4376>
2020-04-29 16:59:45 +00:00
Jason Ekstrand
e581ddeeee intel/fs: Don't delete coalesced MOVs if they have a cmod
Shader-db results on ICL:

    total instructions in shared programs: 17133088 -> 17133287 (<.01%)
    instructions in affected programs: 61300 -> 61499 (0.32%)
    helped: 0
    HURT: 199

This means it's likely fixing 199 bugs. :-)  All the changed shaders are
in Mad Max.  It's surprisingly difficult to get the back-end compiler to
generate a pattern that hits this we don't tend to emit a lot coalescable
MOVs.  The pattern in Mad Max that's able to hit is fsign(fsat(x)) under
the right conditions.

Closes: #2820
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4773>
2020-04-29 16:45:51 +00:00
Marek Olšák
6fe7d6758a st/mesa: expose more SPIR-V capabilities
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4760>
2020-04-29 16:25:06 +00:00
Marek Olšák
a2542deb63 mesa: report GL_INVALID_OPERATION for invalid glTextureBuffer target
This fixes:
    KHR-GL46.direct_state_access.textures_buffer_errors
    KHR-GL46.direct_state_access.textures_buffer_range_errors

Fixes: 98e64e538a - main: Added entry point for glTextureBuffer

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4759>
2020-04-29 15:58:45 +00:00
Alyssa Rosenzweig
ffa314eab3 pan/mdg: Replicate 16-bit swizzles
We don't support vec8 quite yet anyway, this fixes dot products.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
c571d31b8b pan/mdg: Ensure fdot is scalar out in disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
95664b177f pan/mdg: Move condense_writemask to disasm
The compiler should *never* use this. Packing should be 1 way.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
efc9ab6dcc pan/mdg: Pass through some types from scheduling
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
d8d7df6f09 pan/mdg: Don't crash on unknown branch target
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
e27fd4b3ec pan/mdg: Make some branch targets more explicit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
dfa7c26ff8 pan/mdg: Always print the mask
Meaningful for fp16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
459cf59c61 pan/mdg: Specialize swizzle to type
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
62768590d5 pan/mdg: Lower specials to 32-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
bb0e85fca4 pan/mdg: Move sampler_type emission to pack time
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
08af4c788d pan/mdg: Set texture full fields at pack time
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
4fb02174a3 pan/mdg: Track texture types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
53c183736e pan/mdg: Track v_mov type (force uint32 for now?)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
74fadc8859 pan/mdg: Denoise prints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
714eba8762 pan/mdg: Track a primary type for I/O
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
04f76ad8ae pan/mdg: Another goofy comment gone
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
ecf946638e pan/mdg: Track ALU dest type
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
6757c480ab pan/mdg: Track ALU src types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
742b272314 pan/mdg: Add type fields to IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
b9f7f06a61 pan/bi: Share ALU type printing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
6c08e294c8 pan/mdg: Set lower_flrp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
05f5267f23 pan/mdg: Remove old hack
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4793>
2020-04-29 15:35:54 +00:00
Alyssa Rosenzweig
d7f98a87f2 pan/mdg: Remove goofy 16-bit comment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
3b10bcd417 pan/mdg: Don't break SSA
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
23337fd590 pan/mdg: SSA_FIXED_MINIMUM already covered by PAN_IS_REG
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
63eec105b2 pan/mdg: Use PAN_IS_REG
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
d4600c4340 pan/mdg: Remove nir_alu_src_index
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
fbbe3d4b75 pan/bi: Use common IR indices
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
5860b18665 panfrost: Move Bifrost IR indexing to common
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Alyssa Rosenzweig
e3062edff4 panfrost: Fix BO reference counting
Typo.

Fixes: 3283c7f4da ("panfrost: Inline reference counting routines")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4792>
2020-04-29 15:18:38 +00:00
Marek Olšák
22a4cb4937 ac: enable displayable DCC on Navi12 & Navi14
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
3b45631d7a ac/surface: validate that DCC is enabled correctly on gfx9+
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
5e31e4b697 ac/surface: add code for gfx10 displayable DCC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
e2fbba7720 ac/surface: move non-displayable DCC to the end of the buffer
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
a3dc7fffbb ac/surface: don't compute DCC if it's unsupported by DCN on gfx9+
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
5d785f99b7 ac/surface: match get_display_flag() with expectations for is_displayable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
3dc2ccc14c ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
f6d87ec8a9 ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set
So that drivers can enable it without worrying how the texture was
allocated.

v2: reworked the mechanism, hopefully fixes now
    added Bas Nieuwenhuizen's diff to fix radv

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Marek Olšák
25d3cc293e ac/surface: rename micro tile mode enums like gfx10 uses them
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
2020-04-29 14:53:25 +00:00
Thomas Hellstrom
298e247776 winsys/svga: Optionally avoid caching buffer maps
Mapping of graphics kernel buffers is quite costly. Therefore the svga
drm winsys caches all kernel buffer maps. However, that may lead to
less testing coverage of the unmap paths and (possibly) processes running
out of virtual memory space. Introduce a possibility to avoid that caching
by setting the environment variable SVGA_FORCE_KERNEL_UNMAPS to 1.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Matthew McClure <mcclurem@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4804>
2020-04-29 13:45:12 +00:00
Thomas Hellstrom
422148de52 gallium/pipebuffer: Use persistent maps for slabs
Instead of the ugly practice of relying on the provider caching maps,
introduce and use persistent pipebuffer maps. Providers that can't handle
persistent maps can't use the slab manager.

The only current user is the svga drm winsys which always maps
persistently.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4804>
2020-04-29 13:45:12 +00:00
Timur Kristóf
e4e1a0ac13 radv: Use smaller esgs_itemsize for ACO.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
ee5f04c9c9 aco: Use new default driver locations.
The way the new locations are set up has much fewer gaps
between each I/O slot, so this results in a massive reduction
in the LDS usage of tessellation shaders.

Totals (GFX10):
VGPRS: 3976792 -> 3974864 (-0.05 %)
Code Size: 260552784 -> 260532860 (-0.01 %) bytes
LDS: 48723 -> 30179 (-38.06 %) blocks
Max Waves: 1053407 -> 1053583 (0.02 %)

Totals from affected shaders (1407 shaders on GFX10):
SGPRS: 59144 -> 59216 (0.12 %)
VGPRS: 63024 -> 61096 (-3.06 %)
Code Size: 2695508 -> 2675584 (-0.74 %) bytes
LDS: 47109 -> 28565 (-39.36 %) blocks
Max Waves: 12999 -> 13175 (1.35 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
efa4976709 radv: Use new linking helper to set default driver locations.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
7aa61c84fe nir: Add new linking helper to set linked driver locations.
This commit introduces a new function nir_assign_linked_io_var_locations
which is intended to help with assigning driver locations to shaders
during linking, primarily aimed at the VS->TCS->TES->GS stages.

It ensures that the linked shaders have the same driver locations,
and it also packs these as close to each other as possible.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
7056714f50 aco: Set config->lds_size when TES or VS is running on HW ESGS.
This doesn't fix anything, just reports the LDS size used by
merged ESGS shaders, such as vertex_geometry_gs and
tess_eval_geometry_gs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
baa46878d4 aco: Calculate workgroup size of legacy GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
fdbb296853 aco: Remember VS/TCS output driver locations.
Instead of relying on calling shader_io_get_unique_index repeatedly,
remember the which output driver location corresponds to which
varying slot.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
ab07c4ea70 aco: Use context variables instead of calculating TCS inputs/outputs.
VS needs the number of TCS inputs, and TES needs the number of TCS
outputs.

It is error-prone to repeat those calculations in both instruction
selection and setup. Just set them in one place instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Timur Kristóf
fd0248c37b radv: Refactor calculate_tess_lds_size and get_tcs_num_patches.
Previously these functions needed the bit mask of the TCS outputs
and patch outputs written, and concluded the number of outputs
from that.

Now, they take the number of outputs and patch outputs instead.
This will allow the backend compiler to better optimize the
LDS layout.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4388>
2020-04-29 11:51:04 +00:00
Rhys Perry
9392ddab43 aco: consider blocks unreachable if they are in the logical cfg
unreachable was true if the last block is unreachable in the linear cfg,
but it should also be true if it is unreachable in the logical cfg.

Fixes dEQP-VK.graphicsfuzz.for-with-ifs-and-return

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 8d8c864beb
    ('aco: improve check for unreachable loop continue blocks')

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4764>
2020-04-29 11:07:09 +00:00
Christopher James Halse Rogers
98675d34c1 egl/wayland: Fix zwp_linux_dmabuf usage
There's no guarantee that the formats advertised by wl_drm and the formats
advertised by zwp_linux_dmabuf_v1 are the same.

get_back_bo() handles this by falling back from createImageWithModifiers() to
createImage() when there's a wl_drm format but no corresponding linux_dmabuf
format, but create_wl_buffer() unconditionally tries to create a linux_dmabuf
buffer unless DRIimage has DRM_FORMAT_MOD_INVALID.

Fix this by always checking if the DRIimage modifier has been advertised
by zwp_linux_dmabuf_v1, and falling back to wl_drm if not.

If DRM_FORMAT_MOD_INVALID has been advertised then we trust the client
has allocated something appropriate and treat any modifier as matching.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2220
Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4294>
2020-04-29 11:29:40 +01:00
Danylo Piliaiev
8f0d387441 iris/bufmgr: Check if iris_bo_gem_mmap failed
After refactoring of iris_bo_map_cpu and iris_bo_map_wc - immediate
return of NULL on failure to mmap a buffer was lost.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2855
Fixes: 5bc3f52dd8
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4786>
2020-04-29 08:51:33 +00:00
Tapani Pälli
1a33358b27 anv: remove assert from GetImageMemoryRequirements[2]
This assert is actually correct but due to how android hardware buffer
support is implemented we should remove it, otherwise debug build of
mesa hits the assert with Android CTS tests.

Test creates VkImage with non-external format and sets up
VkExternalMemoryImageCreateInfo to indicate that image *may* be used
with Android hardwarebuffer handle. Then test attempts to get image
memory requirements. Problem with this is that we setup all android
supporting images as having external format and thus hit the assert as
the size has not been set yet. This is not a problem in practice since
android will bind ahw memory with the image later on.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2807
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4762>
2020-04-29 08:30:42 +00:00
Samuel Pitoiset
2f6648dc3c gitlab-ci: add a list of expected failures for FIJI with ACO
Timur has this chip now. The depth stencil resolve failures are
somehow unexpected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4805>
2020-04-29 09:53:48 +02:00
Samuel Pitoiset
0e6afbbe56 radv: advertise VK_EXT_robustness2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
0f1ead7b53 radv: handle NULL vertex bindings
With VK_EXT_robustness2, an element of pBuffers can be NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
c1ef225d18 radv: handle NULL descriptors
All fields must be zero, otherwise the HW hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
60cc065c7d aco: fix adjusting the sample index with FMASK if value is negative
The SPIR-V spec doesn't say explicitly that the sample index
must be an unsigned integer.

This fixes crashes with some new VK_EXT_robustness2 tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
a112ec4c11 aco: fix nir_texop_texture_samples with NULL descriptors
With VK_EXT_robustness2, descriptors can be NULL and the number of
samples returned by nir_texop_texture_samples should be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Samuel Pitoiset
aa94213781 ac/llvm: fix nir_texop_texture_samples with NULL descriptors
With VK_EXT_robustness2, descriptors can be NULL and the number of
samples returned by nir_texop_texture_samples should be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4775>
2020-04-29 07:29:54 +00:00
Caio Marcelo de Oliveira Filho
a3cba3c771 intel/fs: Only stall after sending all memory fence messages
In Gen11+, when emitting a fence for both L3 and SLM, the generated
code would look like

    SEND, MOV (for stall), SEND, MOV (for stall)

This commit change that so two SENDs are emitted before the MOVs for
stall.  This is similar to the approach used in Ivy Bridge for the
render fence.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3278>
2020-04-29 07:17:27 +00:00
Caio Marcelo de Oliveira Filho
f858fa26b4 intel/fs,vec4: Pull stall logic for memory fences up into the IR
Instead of emitting the stall MOV "inside" the
SHADER_OPCODE_MEMORY_FENCE generation, use the scheduling fences when
creating the IR.

For IvyBridge, every (data cache) fence is accompained by a render
cache fence, that now is explicit in the IR, two
SHADER_OPCODE_MEMORY_FENCEs are emitted (with different SFIDs).

Because Begin and End interlock intrinsics are effectively memory
barriers, move its handling alongside the other memory barrier
intrinsics.  The SHADER_OPCODE_INTERLOCK is still used to distinguish
if we are going to use a SENDC (for Begin) or regular SEND (for End).

This change is a preparation to allow emitting both SENDs in Gen11+
before we can stall on them.

Shader-db results for IVB (i965):

    total instructions in shared programs: 11971190 -> 11971200 (<.01%)
    instructions in affected programs: 11482 -> 11492 (0.09%)
    helped: 0
    HURT: 8
    HURT stats (abs)   min: 1 max: 3 x̄: 1.25 x̃: 1
    HURT stats (rel)   min: 0.03% max: 0.50% x̄: 0.14% x̃: 0.10%
    95% mean confidence interval for instructions value: 0.66 1.84
    95% mean confidence interval for instructions %-change: 0.01% 0.27%
    Instructions are HURT.

  Unlike the previous code, that used the `mov g1 g2` trick to force
  both `g1` and `g2` to stall, the scheduling fence will generate `mov
  null g1` and `mov null g2`.  During review it was decided it was not
  worth keeping the special codepath for the small effect will have.

Shader-db results for HSW (i965), BDW and SKL don't have a change
on instruction count, but do report changes in cycles count, showing
SKL results below

    total cycles in shared programs: 341738444 -> 341710570 (<.01%)
    cycles in affected programs: 7240002 -> 7212128 (-0.38%)
    helped: 46
    HURT: 5
    helped stats (abs) min: 14 max: 1940 x̄: 676.22 x̃: 154
    helped stats (rel) min: <.01% max: 2.62% x̄: 1.28% x̃: 0.95%
    HURT stats (abs)   min: 2 max: 1768 x̄: 646.40 x̃: 362
    HURT stats (rel)   min: <.01% max: 0.83% x̄: 0.28% x̃: 0.08%
    95% mean confidence interval for cycles value: -777.71 -315.38
    95% mean confidence interval for cycles %-change: -1.42% -0.83%
    Cycles are helped.

  This seems to be the effect of allocating two registers separatedly
  instead of a single one with size 2, which causes different register
  allocation, affecting the cycle estimates.

while ICL also has not change on instruction count but report changes
negative changes in cycles

    total cycles in shared programs: 352665369 -> 352707484 (0.01%)
    cycles in affected programs: 9608288 -> 9650403 (0.44%)
    helped: 4
    HURT: 104
    helped stats (abs) min: 24 max: 128 x̄: 88.50 x̃: 101
    helped stats (rel) min: <.01% max: 0.85% x̄: 0.46% x̃: 0.49%
    HURT stats (abs)   min: 2 max: 2016 x̄: 408.36 x̃: 48
    HURT stats (rel)   min: <.01% max: 3.31% x̄: 0.88% x̃: 0.45%
    95% mean confidence interval for cycles value: 256.67 523.24
    95% mean confidence interval for cycles %-change: 0.63% 1.03%
    Cycles are HURT.

  AFAICT this is the result of the case above.

Shader-db results for TGL have similar cycles result as ICL, but also
affect instructions

    total instructions in shared programs: 17690586 -> 17690597 (<.01%)
    instructions in affected programs: 64617 -> 64628 (0.02%)
    helped: 55
    HURT: 32
    helped stats (abs) min: 1 max: 16 x̄: 4.13 x̃: 3
    helped stats (rel) min: 0.05% max: 2.78% x̄: 0.86% x̃: 0.74%
    HURT stats (abs)   min: 1 max: 65 x̄: 7.44 x̃: 2
    HURT stats (rel)   min: 0.05% max: 4.58% x̄: 1.13% x̃: 0.69%
    95% mean confidence interval for instructions value: -2.03 2.28
    95% mean confidence interval for instructions %-change: -0.41% 0.15%
    Inconclusive result (value mean confidence interval includes 0).

  Now that more is done in the IR, more dependencies are visible and
  more SWSB annotations are emitted.  Mixed with different register
  allocation decisions like above, some shaders will see more `sync
  nops` while others able to avoid them.

  Most of the new `sync nops` are also redundant and could be dropped,
  which will be fixed in a separate change.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3278>
2020-04-29 07:17:27 +00:00
Caio Marcelo de Oliveira Filho
0e96b0d6dd intel/fs: Allow FS_OPCODE_SCHEDULING_FENCE stall on registers
It will generate the MOVs (or SYNC_NOP in Gen12+) needed for stall.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3278>
2020-04-29 07:17:27 +00:00
Bas Nieuwenhuizen
9248b04528 radv: Expose 4G element texel buffers.
Old value seems to be copied from anv.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4787>
2020-04-29 07:05:04 +00:00
Kenneth Graunke
506414e837 iris: Fix downcast of bound_vertex_buffers from uint64_t to int
This is the wrong data type, the original field - and the values we're
adding in - are both 64-bit unsigned.  Keep the original data type.

Thanks to Dave Airlie for finding this while reading the code.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4802>
2020-04-29 06:50:54 +00:00
Francisco Jerez
5e2a7e11b4 intel/ir: Remove scheduling-based cycle count estimates.
The cycle count estimation logic part of the scheduler is now
redundant with the shader performance modeling pass, and the estimates
can be consolidated into the brw::performance analysis result object
instead of being part of the CFG, which guarantees that the estimates
cannot be accessed without previously calling the
performance_analysis::require() method, which makes sure that the
right analysis pass is executed at the right time if we don't already
have up-to-date cached results.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
486f3b04a5 intel/ir: Pass block cycle count information explicitly to disassembler.
So we can eventually remove the cycle count estimates from the CFG
data structure and consolidate performance information in the
brw::performance object.

It would be cleaner to pass the brw::performance object directly to
the disassembler but that isn't straightforward since the disassembler
is built as a plain C file unlike the rest of the compiler back-end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
6579f562c3 intel/ir: Use brw::performance object instead of CFG cycle counts for codegen stats.
These should be more accurate than the current cycle counts, since
among other things they consider the effect of post-scheduling passes
like the software scoreboard on TGL.  In addition it will enable us to
clean up some of the now redundant cycle-count estimation
functionality in the instruction scheduler.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
65342be3ae intel/fs: Add INTEL_DEBUG=no32 debugging flag.
This is useful in order to identify codegen issues caused by SIMD32.
It doesn't currently have any effect on compute shaders since SIMD32
dispatch is only enabled for CS when it's strictly necessary to do so
in order to support the workgroup size requested for the shader --
That might change in the future though when we hook up the SIMD32
heuristic to CS compilation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
14f0a5cf64 intel/fs: Implement performance analysis-based SIMD32 heuristic for fragment shaders.
The heuristic enables the SIMD32 fragment shader based on whether the
IR performance modeling pass predicts it to have greater throughput
than the SIMD16 and SIMD8 variants of the same shader.  It would be
straightforward to do the same thing in order to control whether
SIMD16 dispatch is enabled, but it's pending additional performance
evaluation.

The INTEL_DEBUG=do32 option is left around in order to force the
SIMD32 shader to be used regardless of the result of the heuristic,
since it's useful as a debugging aid e.g. in order to identify
SIMD32-specific codegen issues which may be masked by the SIMD32
heuristic, or cases where the heuristic is incorrectly disabling
SIMD32 shaders that offer a performance advantage.

Currently this is only enabled on Gen6+, since SIMD32 codegen support
is incomplete on earlier platforms.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
d6aa0c261f intel/fs: Heap-allocate fs_visitors in brw_compile_fs().
This makes brw_compile_fs() look a bit more similar to
brw_compile_cs().  It saves us three v*_shader_stats local variables,
and will save us additional triplicated declarations as we start
tracking IR performance analysis results.

The triplicated cfg pointers are left around because they're set to
NULL to mark specific dispatch modes as disabled (e.g. in order to
enforce hardware restrictions).  Doing the same thing with the visitor
pointers would cause data leaks.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:27 -07:00
Francisco Jerez
188a3659ae intel/ir: Import shader performance analysis pass.
This introduces an analysis pass intended to estimate several
performance statistics of the shader, including cycle count latency
and throughput values, based on static modeling.  It has instruction
performance information more comprehensive than the current scheduling
pass for all platforms between Gen4-11, and works on both the FS and
VEC4 back-end.

The most immediate purpose of this pass is to implement a heuristic
meant to determine whether using SIMD32 dispatch for a fragment shader
can be expected to help more than it hurts.  In addition this will
allow the effect of passes run after scheduling (e.g. the TGL software
scoreboard pass and the VEC4 dependency control pass) to be visible in
shader-db statistics.

But that isn't the end of the story, other potential applications of
this pass (not part of this MR) I've been playing around with are:

 - Implement a similar SIMD16 heuristic allowing the identification of
   inefficient SIMD16 fragment shaders.

 - Implement similar SIMD16 and SIMD32 heuristics for the compute
   shader stage -- Currently compute shader builds always use the
   SIMD16 shader if available and never use the SIMD32 shader unless
   strictly necessary, which is suboptimal under certain conditions.

 - Hook up to the instruction scheduler in order to improve the
   accuracy of its timing information.

 - Use as heuristic in order to drive the selection of scheduling
   modes (Matt was experimenting with that).

 - Plug to the TGL software scoreboard pass in order to implement a
   more effective SBID token allocation algorithm, since in general
   the optimal token allocation depends on the timings of all
   instructions in the program.

 - Use its bottleneck detection functionality in order to implement a
   heuristic computing a more optimal bound for the number of fragment
   shader threads executed in parallel (by adjusting the
   MaximumNumberofThreadsPerPSD control of 3DSTATE_PS).

As a follow-up I'm planning to submit updated timing information for
Gen12 platforms -- Everything else required to support Gen12 like SWSB
handling is already included in this patch, but there were some IP
concerns regarding the TGL timing parameters since they cannot
currently be obtained with the documentation and hardware which is
publicly available.  The timing parameters for any previous Gen7-11
platforms can be obtained by anyone by sampling the timestamp register
using e.g. shader_time, though I have some more convenient
instrumentation coming up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:01:03 -07:00
Francisco Jerez
c8ce1cfc9c intel/vec4: Fix constness of vec4_instruction::reads_flag() and ::writes_flag().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
bda1d72dd9 intel/fs: Replace fs_visitor::bank_conflict_cycles() with stand-alone function.
This will be re-usable by the IR performance analysis pass.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
d2ed740795 intel/fs: Fix constness of argument of fs_instruction_scheduler::is_compressed().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
6310a05f68 intel/fs: Rename half() helpers to quarter(), allow index up to 3.
Makes more sense considering SIMD32.  Relaxing the assertion in
brw_ir_fs.h will be required in order to avoid assertion failures on
SNB with SIMD32 fragment shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
bdad7f429a intel/ir: Add missing initialization of backend_reg::offset during construction.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
e549e4f6c0 intel/fs/gen12: Fix Render Target Read header setup for new thread payload layout.
In Gen12 the Poly 0 Info DWORD containing the Viewport Index and
Render Target Index fields were moved from r0.0 to r1.1 in order to
make room for dual-polygon dispatch.  The render target message format
was updated to expect that information in the same location, so we
didn't need to make any changes for framebuffer fetch to work with
SIMD8 and SIMD16 dispatch.  Unfortunately that won't work with SIMD32,
since the render target message header is assembled from r0 and r2
instead of r1, and the r2 thread payload wasn't updated with an
additional copy of the same information.  We need to fix things up
manually instead.  This avoids a handful of
EXT_shader_framebuffer_fetch regressions in combination with SIMD32
fragment shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:29 -07:00
Francisco Jerez
72324035fb intel/fs/gen12: Work around dual-source blending hangs in combination with SIMD32.
This applies the same work-around I commited as b84fa0b31e
"intel/fs/gen11: Work around dual-source blending hangs in combination
with SIMD32." to Gen12, which seems to suffer from the same hardware
bug found empirically.  The failure mode seems to be identical.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:28 -07:00
Francisco Jerez
d6ae079771 intel/fs/gen12: Fix hangs with per-sample SIMD32 fragment shader dispatch.
The Gen12 docs are rather contradictory regarding the dispatch
configurations supported by the fragment shader -- The same table
present in previous generations seems to imply that only one dispatch
mode can be enabled when doing per-sample shading, but a restriction
documented in the 3DSTATE_PS_BODY page implies the opposite: That
SIMD32 can only be used in combination with some other dispatch mode.

The latter seems to match the behavior of real hardware as I could
tell from my testing: A bunch of multisample test-cases that do
per-sample shading hang if we only provide a SIMD32 shader.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-04-28 23:00:28 -07:00
Dylan Baker
35ee6b3d36 mesa: Follow OpenGL conversion rules for values that exceed storage size
Section 2.2.2 (Data Conversions For State Query Commands) of the
OpenGL 4.5 spec says:

  Following these steps, if a value is so large in magnitude that
  it cannot be represented by the returned data type, then the
  nearest value representable using that type is returned.

The current code doesn't do the correct thing, because it truncates a
long (potentially a 64bit values) to an int.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2828
Fixes: 53c36dfcfe
       ("replace IROUND with util functions")

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4673>
2020-04-29 04:26:41 +00:00
Alyssa Rosenzweig
76c5688018 pan/bit: Add BITWISE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
844c3f94b5 pan/bit: Interpret BI_BITWISE
No shifting yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
a077da6273 pan/bi: Handle iand/ior/ixor in NIR->BIR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
ef9582738e pan/bi: Pack BI_BITWISE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Alyssa Rosenzweig
9b415bf6a0 pan/bi: Add bitwise modifiers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4790>
2020-04-29 00:30:05 +00:00
Rob Clark
6de01faac5 freedreno/a6xx: invalidate tex state cache entries on rebind
When a resource's backing bo changes, its seqno will be incremented.
Which would result in a new tex state cache key, and nothing to clean
up the old tex state until the sampler view/state is destroyed.  But
in some games, that may never happen, or at least not happen before
we run out of memory.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2830
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
ca05e6b04d freedreno: rebind_resource() *before* bo changes
This will matter in the next patch, where we need the original
rsc->seqno.

It means slight shuffling of where we call rebind_resource() in the
`fd_try_shadow_resource()` path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
d9e56d8a69 freedreno: rebind resource in all contexts
If the resource is rebound, we need to invalidate in all contexts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
f12188ff52 freedreno: optimize rebind_resource()
Track how resources are used, ie. which state they may potentially dirty
if the backing bo is changed/reallocated, to optimize rebind_resource().

This will be more important in a later patch when we hook up eviction of
entries in a6xx tex state cache.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
1e18c58047 freedreno: mark more state dirty when rebinding resources
Plus a bonus typo fix.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
bf97cc9221 freedreno: don't realloc idle bo's
The `DISCARD_WHOLE_RESOURCE` is just a hint.  And `rebind_resource()` is
a bunch of faffing about (and going to get worse in a later patch), so
let's not bother when the bo is already idle.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Rob Clark
938b6ed645 freedreno: small whitespace fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4744>
2020-04-29 00:08:57 +00:00
Jan Zielinski
a93b728bc6 gallium/swr: Fix crashes and failures in vertex fetch
This commit fixes two problems:
- In some cases SWR does not correctly report to Gallium
  which formats are supported.
- Incorrect LLVM instructions are used in vertex fetch in some situations

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4788>
2020-04-28 23:53:08 +00:00
Rob Clark
de0d3d1726 freedreno/log-parser: support to read gzip'd logs
~50MB gzip'd log files are nicer than ~300MB uncompressed

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rob Clark
f561e516c8 freedreno/a6xx: pre-calculate expected vsc stream sizes
We should only rely on overflow detection for indirect draws, where we
have no other option.

This doesn't use quite the worst-possible-case sizes, which in practice
seem to be ~20x larger than what is required.  But instead uses roughly
half of that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rob Clark
99d802ccc7 freedreno: add helper to estimate # of bins per pipe
For vsc size calculation, we need to know the # of bins per pipe.  Or at
least the worst-case # of bins, assuming we don't eliminate an unused depth/
stencil buffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rob Clark
a9c255d70c freedreno/a6xx+tu: rename VSC_DATA/VSC_DATA2
These are the draw-stream and primitive-stream, so lets give them more
descriptive names.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4750>
2020-04-28 23:31:58 +00:00
Rhys Perry
3ee3ad561a aco: fix vgpr nir_op_vecn with sgpr operands
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
c5eda3c746 aco: improve clamped integer addition disassembly workaround
Make it work with 16-bit and GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
4ed83e2f94 aco: add various GFX10 int16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
43f2ba39ef aco: fix sub-dword overwrite check in RA validator
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
cca8d6ce06 aco: fix sub-dword out-of-bounds check in RA validator
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
307aca83a2 aco: add missing adjust_max_used_regs()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
99ca96fbf5 aco: improve RA for uneven p_split_vector
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
24116a8a56 aco: don't recurse in sub-dword get_reg_simple()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
09c584caeb aco: split self-intersecting copies instead of swapping
Example situation:
v1 = {v0.hi, v1.lo}
v0.hi = v1.hi

The 4-byte copy's definition is completely used, but swapping it makes no
sense. We have to split it to generate correct code:
swap(v0.hi, v1.lo)
swap(v0.hi, v1.hi)

Found in dEQP-VK.spirv_assembly.type.vec3.i16.constant_composite_vert

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
be4a34966c aco: fix neighboring register check in get_reg_simple()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
fb59ed6bb9 aco: check alignment of non-subdword registers in get_reg_specified()
When splitting a v6b vector into v1 and v2b components, we should ensure
the v1 definition doesn't start at the upper half.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Rhys Perry
916cc3e231 aco: make RegisterFile::block() take a regclass
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
2020-04-28 23:16:55 +00:00
Jason Ekstrand
b43366497b anv: Claim VK_EXT_robustness2 support
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
b07d26be65 anv: Handle null vertex buffer bindings
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
fd817291c7 anv: Handle NULL descriptors
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
ac581a06a4 nir/combine_stores: Handle volatile
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
cb9292091b nir/dead_write_vars: Handle volatile
We can't remove volatile writes and we can't combine them with other
volatile writes so all we can do is clear the unused bits.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
ed67717167 nir/copy_prop_vars: Report progress when deleting self-copies
Fixes: 62332d139c "nir: Add a local variable-based copy prop..."

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
d9af5277b3 nir/copy_prop_vars: Handle volatile better
For deref_store, we can still delete invalid stores that write to
statically OOB data.  For everything, we need to make sure that we kill
aliases of destinations even if it's volatile.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
118f045fb7 vulkan: Update Vulkan XML and headers to 1.2.139
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4767>
2020-04-28 22:55:25 +00:00
Jason Ekstrand
76d2772472 anv: Allow all clear colors for texturing on Gen11+
Starting with Gen11, we have two indirect clear colors: An unconverted
float/int version which is us used for rendering and a converted pixel
value version which is used for texturing.  Because the one used for
texturing is stored as a single pixel of that color, it works no matter
what format is being used.  Because it's a simple HW indirect and
doesn't involve copying surface states around, we can use it in the
sampler without having to worry about surface states having out-of-date
clear values.  The result is that we can now allow any clear color when
texturing.

This cuts the number of resolves in a RenderDoc trace of Dota2 by 95%
on Gen11+ (you read that right) and improves perf by 3.5%.  It improves
perf in a handful of other workloads by < 1%.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
e63c662c26 anv: Use anv_layout_to_aux_usage for color during render passes
Previously, we tried to treat color image layouts as a special case
during render passes.  This is largely an artifact of history as our
initial understanding of Vulkan placed much more emphasis on render
passes than our current understanding.  The only real practical use for
magic layouts in the middle of a render pass, as far as I can tell, is
to allow more clear colors to get passed through to input attachments.
However, most apps aren't very creative with their clear colors and very
few of them (none coming from DXVK) actually use render passes in any
interesting way.  Therefore, the risk of being able to pass fewer clear
colors through to input attachments should be minimal.

There are, however, three very big advantages to this change:

 1. We are now consistent in our handling of aux usage and layouts
    between color and depth/stencil.

 2. We are now actually following the layout guidelines from the app and
    aren't nearly as likely to see strange behavior due to us overriding
    the image layouts manually.

 3. It's more obviously correct.  While I think our old render pass code
    was probably correct, it was full of corner cases and it's very
    possible that it was behaving badly in weird ways.  This follows the
    Vulkan API much more blindly and, as such, is more likely to be
    correct and behave the same as other implementations.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
30016f6e82 anv: Split color_attachment_compute_aux_usage in two
In particular, we split out an anv_can_fast_clear_color_view helper
which only cares about fast-clear and not aux_usage itself.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
3fe45a9b6c anv: Rework depth_stencil_attachment_compute_aux_usage
Instead of making it a function that pretends to choose aux usage (which
isn't what it does at all), make it a function which returns whether or
not we want to do a fast clear.  This is far more accurate to the
purpose of the function.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
26e6da90ab anv: Refactor cmd_buffer_setup_attachments
This commit just renames some things so that we use names for temporary
variables which are more consistent with other places in the code-base.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
36a74835df anv: Stop allowing non-zero clear colors in input attachments
Previously, we bent over backwards to allow non-zero clear colors input
attachments whenever we could.  However, very few apps use input
attachments and very few use non-zero clear colors.  Getting rid of
support for non-zero clear colors input attachments will allow us to
treat them identically to textures which should help us simplify things
a good bit.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
bf92e96d9c anv: Disallow fast-clears which require format-reinterpretation
In order to actually hit this case you have to be using a very odd
color/view combination.  The common cases of clear-to-zero and 0/1 clear
colors with an sRGB view don't require any re-interpretation.  This is
probably better than always resolving whenever we have a format mismatch
like we are today because that hits the sRGB case every time.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
20e72e435c intel: Move swizzle_color_value from blorp to ISL
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
814dc66935 anv: Allocate surface states per-subpass
Instead of allocating surface states for attachments in BeginRenderPass,
we now allocate them in begin_subpass.  Also, since we're zeroing
things, we can be a bit cleaner about or implementation and just fill
out all those passes for which we have allocated surface states.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
a3d185d091 anv: Split command buffer attachment setup in three
This commit splits genX(cmd_buffer_setup_attachments)() into three
functions: one which sets up cmd_buffer->state.attachments, one which
allocates surface states, and one which fills out the surface states.
While we're here, we make both functions take the framebuffer (if any)
as an argument instead of pulling it from the command buffer so it's
more clear what things are inputs to the functions.  We also make the
render pass and framebuffer parameters const as those are immutable
objects.  The only functional change here should be that we now
vk_zalloc the attachments which should be a bit safer.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
c195d55161 anv: Mark images written in end_subpass
This makes a lot more sense than marking them written in begin_subpass
since, at that point, we haven't written them yet.  This should reduce
the chances of accidental extra resolves.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
d5e30872ca anv: Use ANV_FROM_HANDLE for pInheritanceInfo fields
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
7cbc5fde13 anv: Assert surface states are valid
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
eaa8f043cd anv: Stop filling out the clear color in compute_aux_usage
It's a pointless micro-optimization that just makes compute_aux_usage
unnecessarily entangled with setting up surface states.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
5808efdf40 anv: Add TRANSFER_SRC to pass usage not subpass usage
The subpass usage flags are supposed to always be one bit and never
multiple bits.  However, when adding in TRANSFER_SRC usage for resolve
attachments we were adding it to the subpass bits and not the render
pass bits.  This potentially is causing issues where images aren't
getting marked written properly.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Jason Ekstrand
513ed7542a anv: Return an error if allocating attachment memory fails
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4393>
2020-04-28 22:45:39 +00:00
Samuel Pitoiset
0549fba3cc radv: advertise VK_AMD_memory_overallocation_behavior
Doom Eternal explicitly allows overallocation via this extension
but that shouldn't change anything because it's the default RADV
behavior.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4785>
2020-04-28 21:03:26 +00:00
Samuel Pitoiset
5832f2b8a3 radv: track memory heaps usage if overallocation is explicitly disallowed
By default, RADV supports overallocation by the sense that it doesn't
reject an allocation if the target heap is full.

With VK_AMD_overallocation_behaviour, apps can disable overallocation
and the driver should account for all allocations explicitly made by
the application, and reject if the heap is full.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4785>
2020-04-28 21:03:26 +00:00
Samuel Pitoiset
32035cca3f radv: remove unused radv_device_memory::map_size field
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4785>
2020-04-28 21:03:25 +00:00
Ian Romanick
7b869710a1 nir/algebraic: Require operands to iand be 32-bit
With the mask value 0x80000000, the other operand must be 32-bit.  This
fixes failures in
dEQP-VK.subgroups.ballot_mask.ext_shader_subgroup_ballot.*.gl_subgroupgemaskarb_*
tests from Vulkan 1.2.2 CTS.

Checking one of the tests, it appears that the tests are doing 64-bit
iand with 0x0000000080000000, then comparing the result with zero.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2834
Fixes: 88eb8f190b ("nir/algebraic: Simplify logic to detect sign of an integer")
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4770>
2020-04-28 20:33:56 +00:00
Rob Clark
656051d735 freedreno/ir3/ra: only assign array base in first pass
In particular, we specifically don't want to let the base change between
passes, as it could end up conflicting with registers assigned in the
first pass.

Mostly-closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2838
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
3d8ec96762 freedreno/ir3/ra: split out helper for array assignment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
6313b8d881 freedreno/ir3/ra: use ir3_debug_print helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
8b3ac7084a freedreno/ir3/ra: remove unused variable
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Rob Clark
997828e31b freedreno/computer: add script to test widening/narrowing
Just something I hacked together to help figure out which instructions
can fold in a wideing/narrowing conversion.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4780>
2020-04-28 20:06:49 +00:00
Alyssa Rosenzweig
6b551d9f36 pan/bi: Add initial fcmp test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
778e27b5ac pan/bit: Interpret CMP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
71501972e9 pan/bit: Prepare condition evaluation for vectors
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
0b8724c340 pan/bi: Relax double-abs condition
Only if both ports (<==> registers) same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
81156ad55a pan/bi: Pack fma.fcmp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
7a689470d0 pan/bi: Factor out fp16 abs logic
Also used for fcmp16

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
c94d41ad7c pan/bi: Pack FMA 32 FCMP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
1520131d82 pan/bi: Fix source mod testing for CMP
Outputs u32.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
12ca99f2c1 pan/bi: Structify ADD ICMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
ddcefefa7d pan/bi: Structify FMA ICMP 16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
3d41468e7d pan/bi: Structify FMA ICMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
527d7303ca pan/bi: Structify ADD FCMP16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
74795dd328 pan/bi: Structify FMA FCMP16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
28afe3037a pan/bi Strucitfy ADD FCMP 32
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
c861292ce2 pan/bi: Structify FMA FCMP
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
7fe3c145d9 pan/bi: Remove bi_round_op
No purpose.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
95fc71ece2 pan/bi: Deduplicate csel/cmp cond
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
df486689c0 pan/bi(t): Fix SELECT tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
814f2f1d33 pan/bi: Add CSEL.8 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
e23d191245 pan/bi: Add FCMP.GL.v2f16 on ADD opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
b4f2d3a51c pan/bi: Add 64-bit int compares
Likewise.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
52cc7165c6 pan/bi: Add some 8-bit compares
Not all but enough to see the pattern.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
2f286eed2a pan/bi: Add CSEL.64 opcode
Chain twice for full 64-bit CSEL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig
100edfe26d pan/bi: Add bool->float opcodes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Samuel Pitoiset
523e9603d3 radv: enable FMASK for color attachments only
The reason behind this is that FMASK requires CMASK and also that
FMASK for non color attachments looks unnecessary. It's currently
much easier to add this simple check because the driver tries to
always enable DCC first and if we enable FMASK only if CMASK, we
might loose some FMASK compressions.

This helps fixing some new robustness2 tests which fails because
only FMASK is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4783>
2020-04-28 17:23:05 +02:00
Jason Ekstrand
81ac741f89 anv: Expose CS workgroup sizes based on a maximum of 64 threads
Otherwise, we'll hit asserts in brw_compile_cs.

Fixes: cf12faef61 "intel/compiler: Restrict cs_threads to 64"
Closes: #2835
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4746>
2020-04-28 14:51:08 +00:00
Jason Ekstrand
86f67952d3 intel/devinfo: Compute the correct L3$ size for Gen12
Fixes: 8125d7960b "intel/dev: Add preliminary device info for Tigerlake"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4782>
2020-04-28 14:34:17 +00:00
Bas Nieuwenhuizen
7262c743dc radv: Determine memory type for import based on fd.
This would be necessary for an application to figure out if the
memory was allocated using a memory type with VK_MEMORY_PROPERTY_PROTECTED_BIT.

It also allows one to determine VRAM vs. GTT etc.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:45:03 +02:00
Bas Nieuwenhuizen
f30983be3a radv/winsys: Add function to get domains/flags from fd.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:45:00 +02:00
Bas Nieuwenhuizen
bec9285027 radv: Stop using memory type indices.
Lots of extra coding was involved in managing them.

And for protected memory I was thinking of making a function that
goes from domain+flags to memory types, which can reuse this array.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:44:56 +02:00
Bas Nieuwenhuizen
4a8d172d3f radv: Use actual memory type count for setting app-visible bitset.
Otherwise we might make a bitset that is too large.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4751>
2020-04-28 15:44:27 +02:00
Bas Nieuwenhuizen
8e03cf15f9 radeonsi: Count planes for imported textures.
For the DRI2 lowered YUV import separate pipe_resources get created
but in the end the first resource just gets asked for NPLANES.

Since

1) (Almost) everything uses the first resource + a plane index in the
  Gallium interface.
2) This mirrors non-imported textures.

lets fix this in the driver.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4779>
2020-04-28 11:16:03 +00:00
Gert Wollny
6747a984f5 r600: Enable tesselation for NIR
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
b6d4452661 r600/sfn: Add tesselation shaders
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
d77b81ce50 r600/sfn: Add lowering passes for Tesselation IO
Lower the input and output intrinsics to r600 specific LDS intrinsics

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
1b3e103d0b r600/sfn: Move removing of unused variables
It doesn't make sense to do this in the optimization loop

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
74e0a0a723 r600/sfn: Handle LDS output in VS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
f102301cc4 r600/sfn: derive the GS from the vertex stage for a common interface
The GS can also provide the primid

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
f7df2c57a2 r600/sfn: extract class to handle the VS export to different stages
This code can be shared with the TESS_EVAL shader

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
38038b369f r600/sfn: Move some shader base methods to the public interface
This will be needed for handling the VS stage export better.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
93f5f9e584 r600/sfn: Add methods to valuepool to get a vector of values
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
7cbca9cf64 r600/sfn: Move emission of barrier from compute shader to shader base
Tess shaders also use these barriers.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
46a3033b43 r600/sfn: Emit some LDS instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
a122303711 r600/sfn: Handle umul24 and umad24
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
7e064659cb r600/sfn: Add IR instruction to fetch the TESS parameters
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
075ea32e48 r600/sfn: Add TF write instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
230beac5f8 r600/sfn: Add LDS instruction to assembly conversion
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
b9d175bed2 r600/sfn: Add LDS IO instructions to r600 IR
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
172868167e r600/sfn: Don't emit inline constants in the r600 IR
This can be handled when lowering to assembly, and it makes testing
for indirect buffer and sampler access easier.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
9bc6c135ac r600/sfn: simplify UBO lowering pass
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Gert Wollny
096a026354 r600: Handle texcoord semantics in LDS index evaluation
With NIR the texcoord semantic is enabled, and hence we have to handle
index evaluation differently here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4714>
2020-04-28 08:06:33 +00:00
Christian Gmeiner
7d476a1360 ci: bare-metal: power down device after tests
Helps to save electricity.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4754>
2020-04-28 07:17:24 +00:00
Icecream95
b4cc116339 panfrost: Fix GL_EXT_vertex_array_bgra
Previously, attributes would always use an RGBA swizzle, even if the
format was BGRA.

Fixes piglit tests bgra-sec-color-pointer and bgra-vert-attrib-pointer.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4752>
2020-04-28 00:20:53 +00:00
Dave Airlie
0e135ca227 ci: add llvmpipe paths to virgl rules
since llvmpipe changes will affect virgl

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4777>
2020-04-28 09:55:49 +10:00
Samuel Pitoiset
7a0a6a7180 radv: do not expose GTT as device local memory mostly for APUs
On APUs, the memory is unified (all heaps are equally fast) and
apps should count all memory heaps together. But some games like
Id Tech games (Youngblood and such) don't manage memory correctly
on APUs and they spill everything when one VRAM heap is full.

Instead of spilling buffers, they should just allocate new buffers
in the second heap but it seems like these games are confused if
two memory heaps have the DEVICE_LOCAL_BIT set.

This is probably a first step towards better memory management on
APUs but there is still some work to do if we want to run most apps
with a small dedicated VRAM (256MB or so).

This gives a huge boost for Id Tech games on APUs, and doesn't
seem to reduce Feral games performance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4771>
2020-04-27 22:41:41 +00:00
Jan Zielinski
4a523baa00 gallium/swr: Fix LLVM 11 compilation issues
Changes needed to adapt to LLVM API changes in vector
and pointer types.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4769>
2020-04-27 22:29:52 +00:00
Eric Anholt
5082ac007d ci/freedreno: Add a test run of a few driver options.
This lets us get coverage of corner cases of the driver that are tricky to
force a testcase to hit.  We don't want to do a full run of the CTS with
each option because that's a lot of runner time, so stack a bunch of
fractional runs in one test job to amortize the test run setup overhead.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
b8c66aeb93 ci: Clean up some excessive use of pipes in dEQP results processing.
Given that we use set -x in the script, this actually makes the user
experience of viewing logs nicer.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
951e101fec ci: Allow namespacing of dEQP run results files.
I want to do multiple runs of some bits of the CTS in one test job to test
some driver options, but I want to be able to see the results from any of
them.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
69c8dfd49f freedreno: Fix calculation of the const buffer cmdstream size.
The HW packet requires padding the number of pointers you emit, and we
would assertion fail about running out of buffer space if the number of
UBOs to be uploaded was odd.

Fixes: b4df115d3f ("freedreno/a6xx: pre-calculate userconst stateobj size")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
8b221e0914 ci: Add sanity checking that dEQP gets the expected GL_RENDERER.
It's easy to get something wrong in the driver build or container or
something that results in falling back to swrast, and then your only clue
was runtime and how your failure cases suspiciously match a swrast
driver's.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Eric Anholt
a9e6a3ecc7 ci: Enable --compact-display false on all dEQP runs.
We always want to see status updates happening in the logs, otherwise it
can like maybe your machine hung until the run actually completes.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4621>
2020-04-27 22:10:10 +00:00
Mike Blumenkrantz
acc56300dc zink: explicitly unref old fb object when setting new one
this object has a ref from being created, and its lifetime is expected to
be a single frame, so remove that initial ref when we expect to stop
using it

Closes: #2648
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4768>
2020-04-27 21:55:51 +00:00
Mike Blumenkrantz
d3f0022a43 zink: remove framebuffer cache
this can only match when re-rendering identical frames, which is not a
typical case. the lack of cache eviction also leads to memory ballooning.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4768>
2020-04-27 21:55:51 +00:00
Bas Nieuwenhuizen
afd9274d48 st/dri: Set next in template instead of after creation. (v2)
This should prevent horrors like Iris has with the delayed calls
to iris_resource_finish_aux_import just because info is not
available at allocation time.

AFAICT all drivers just copy the template except radeonsi/r600
which reset the next pointer.

AFAICT there is also no other place we get a state tracker setting
next ptrs on a resource.

v2: Updated Gallium docs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3792>
2020-04-27 21:08:01 +00:00
Erik Faye-Lund
a1e453f504 mesa/st: call _mesa_initialize() early
This allows drivers to reliably do things like using the GLSL
type-system during initialization.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
57f4c66028 mesa/main: one_time_init() -> _mesa_initialize()
This exposes the logic inside one_time_init() as _mesa_initialize(), so
drivers who needs to use functionality initialized in one_time_init
earlier if they need.

This means we can reliably use the GLSL type-system when compiling
driver built-in shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
6ff94735c9 mesa/main: Do not pass context to one_time_init
There's no longer any reason to pass the context down to one_time_init,
because we always do the same thing regardless of the context, and we
don't change the context.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
ac9d30431e mesa/main: do not init remap-table per api
This hasn't really been nessecary since 8386088e3d ("dispatch: stop
using _mesa_create_exec_table_es1() for GLES1."), when we stopped
diverging the logic here based on the context-API. So let's simplify the
code a bit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
9bc98778a4 mesa/main: do not pass context to one-time extension init
_mesa_problem doesn't use the ctx argument for anything, so there's no
reason to pass it. This saves us from needing a context passed down this
code-path in the first place.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Erik Faye-Lund
05c69752cf mesa/main: do not store unrecognized extensions in context
We process extension overrides only when we initialize the first
context, which means that unrecognized extensions only appear in the
first context created.

Let's instead store them in a global array, so we can apply them to all
contexts. This has the added benefit of making the initialization of the
first context less special, which allows us to clean up code a bit more.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4765>
2020-04-27 20:40:01 +00:00
Dave Airlie
9bc5b2d169 vulkan: add initial device selection layer. (v6.1)
This is code Bas has out of tree but I think mesa should be shipping it, and I've improved it.

Initially-written-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
v2: add infinite recursion fix (Bas)
v3: Fix wayland/xcb barrier, whitespace
v4: use a macro for getting apis, shorten some lines, use outarray
v5: rewrite in C, use hash_table/mutex.
v6: use once_init to init the mutex, fix freeing ht

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1766>
2020-04-27 19:57:49 +00:00
Eric Anholt
4a42a50585 freedreno/ir3: Add support for disasm of cat2 float32 immediates.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
292231596b freedreno/ir3: Refactor out print_reg_src().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
3bcf819b43 freedreno/ir3: Convert remaining disasm src prints to reginfo.
More lines of code, but they're much more intelligible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
1462b00391 freedreno/ir3: Add a unit test for our disassembler.
Makes sure that we can maintain consistent output from our disassembly as
we refactor.  I've only included stuff that matches qcom's disasm so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
90984ba853 freedreno/ir3: Print a space after nop counts, like qcom's disasm.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
916629f9d7 freedreno/ir3: Fix the disasm of half-float STG dests.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4736>
2020-04-27 19:35:00 +00:00
Eric Anholt
6c01152c92 ci: Enable GLES 3.1 testing on db820c (a530).
The driver exposes GLES3.1, so let's make sure we're not regressing its
featureset.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Eric Anholt
b34ee185f4 freedreno: Fix derivatives without texturing on a3xx-a5xx.
The shader variant tells us if we should set the PIXLODENABLE flag.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Eric Anholt
fa49a5032f ci: Enable GLES3 testing on db410c/db820c (freedreno a306 and a530).
We haven't had it enabled due tointermittent failures.  Those failures
are, as far as I can tell, due to GPU faults from buffer overflows where a
failing test in a thread stomps an otherwise passing thread's buffers.  By
running deqp single-threaded, we can get more consistent failures, at the
cost of needing to do a tiny subset of the tests to keep runtime down.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Eric Anholt
c259b3ea12 ci: Drop redundant freedreno stage specification.
The source rules give us the stage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
2020-04-27 19:06:57 +00:00
Jonathan Marek
065068c66a freedreno/ir3: run nir_lower_pack
This lowers pack_32_2x16/unpack_32_2x16 into the scalar versions of those
instructions.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4738>
2020-04-27 18:40:03 +00:00
Jonathan Marek
42093bb694 nir: add pack_32_2x16_split/unpack_32_2x16_split lowering
The new option replaces the two other _split lowering options, since
there's no need for separate options.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4738>
2020-04-27 18:40:03 +00:00
Bas Nieuwenhuizen
cbeda7f78e radv: Add WSI buffers to BO list only if they can be used.
Also reverse the BO list removal loop. This way typical WSI usage
should find the entry in O(active swapchains) iterations, which
should not be a performance issues. Tested with Doom(2106) which
found the entry in 1 iteration every time.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4306>
2020-04-27 18:01:24 +00:00
Bas Nieuwenhuizen
9a61f2a8a9 vulkan/wsi: Add callback to set ownership of buffer.
For radv BO list pruning.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4306>
2020-04-27 18:01:24 +00:00
Samuel Pitoiset
42b1696ef6 ac,radeonsi: fix compilations issues with LLVM 11
Latest LLVM replaced LLVMVectorTypeKind.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2826
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4755>
2020-04-27 17:13:36 +00:00
Jan Zielinski
52aa730d07 gallium/gallivm: remove unused header include for newer LLVM
In the top of the trunk LLVM (11) llvm/IR/CallSite.h header
has been removed. The file compiles without this include also
for LLVM 8, but I'm not sure about 9, 10, and older versions
so I disable it only for the latest LLVM

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4748>
2020-04-27 16:53:44 +00:00
Jan Zielinski
e2a7436dd1 gallium/gallivm: fix compilation issues with llvm 11
Top of the trunk LLVM removes old vector type
and introduces two new ones - one for fixed-width
and one for scalable vectors. This commit fixes
compilation issues by switching from LLVMVectorTypeKind
to LLVMFixedVectorTypeKind for new LLVM.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4748>
2020-04-27 16:53:44 +00:00
Alyssa Rosenzweig
6943eda5c9 ir3: Use shared mediump output lowering
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4716>
2020-04-27 16:32:24 +00:00
Alyssa Rosenzweig
42c9bbaeed nir: Move nir_lower_mediump_outputs from ir3
(Original code from ir3)

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4716>
2020-04-27 16:32:24 +00:00
Ian Romanick
ba8f7f3fa2 nir/algebraic: Detect some kinds of malformed variable names
I spent over an hour trying to debug a problem if a condition on a
variable not being applied.  The problem turned out to be
"a(is_not_negative" instead of "a(is_not_negative)".  This commit would
have detected that problem and failed to build.

v2: Just add $ to the end of the existing regex, and it will fail to
match a malformed string.  Suggested by Jason.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4720>
2020-04-27 09:08:34 -07:00
Alyssa Rosenzweig
fc4eb0714c pan/bi: Implement 16-bit COMBINE lowering
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
280b65126e pan/bi: Fix RA wrt 16-bit swizzles
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
64c33a459f pan/bit: Add SELECT tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
23ffaa16c7 pan/bit: Interpret BI_SELECT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
a5bfe59196 pan/bi: Force BI_SELECT arguments scalar
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
c12081dca1 pan/bi: Pack ADD SEL16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
d31e4879f0 pan/bi: Pack FMA SEL8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
7b31f04bac pan/bi: Pack FMA SEL16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
ee561f0e6b pan/bi: Rename BI_SWIZZLE to BI_SELECT
The select version is more general.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
b2c6cf2b6d pan/bi: Eliminate writemasks in the IR
Since the hardware doesn't support them, they're a burden to deal with,
so let's ensure we never get to a place where we would need to at all.

Disables COMBINE lowering for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
1622478fbd pan/bi: Fix ADD.v4i8 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
de12311431 pan/bi: Add missing BI_VECTOR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig
667190d38a pan/bi: Assign blend descriptor for BLEND op
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Alyssa Rosenzweig
1a8f1a324a pan/bi: Passthrough blend types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Alyssa Rosenzweig
5f953b8f50 pan/bi: Passthrough type for ATEST
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Alyssa Rosenzweig
462af10bb7 pan/bi: Pack fp16 ATEST
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:25 +00:00
Michel Dänzer
c50bbfa0ab mesa: Skip 3-byte array formats in _mesa_array_format_flip_channels
Byte swapping makes no sense for 3-byte formats: Swapping the order of 2
or 4 bytes at a time would inevitably result in bytes getting mixed up
between neighbouring pixels.

Fixes crash with a debugging build on a big endian machine due hitting
the unreachable() at the end of the function.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2665
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4735>
2020-04-27 14:14:00 +00:00
Marek Olšák
ad5da3e63e mesa: replace GLenum target with gl_shader_stage in NewProgram
So that the GLSL compiler doesn't have to use the GLenum conversion
functions.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4756>
2020-04-27 12:49:53 +00:00
Bas Nieuwenhuizen
531728d6cb drm-uapi,radv,radeonsi: Add amdgpu_drm.h header.
Use it instead of the libdrm provided amdgpu_drm.h header. I used
the kernel revision from the README to get the header so the
header versions should be consistent.

Tested by removing /usr/include/libdrm/amdgpu_drm.h from my dev-machine.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4749>
2020-04-27 12:27:02 +00:00
Marek Olšák
03ba57c6c5 mesa: extend _mesa_bind_vertex_buffer to take ownership of the buffer reference
This reduces overhead of _mesa_reference_buffer_object_ from 6% to 4%
with glthread when profiling the game "torcs" with non-VBO data uploaded
by glthread.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
e9afe045cf mesa: add offset_is_int32 param into _mesa_bind_vertex_buffer for glthread
glthread will pass signed integer offsets, so don't reset negative offsets
to 0 there.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
b8223244c3 mesa: add Const.BufferCreateMapUnsynchronizedThreadSafe & MESA_MAP_THREAD_SAFE
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
19eb89b0f3 gallium: add PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE for glthread
and add radeonsi support.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
6215465842 glthread: sort variables in marshal structures to pack them optimally
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
6f8a387b37 glthread: use GLenum16 in batch buffers to save space
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
b6b1ab8d54 glthread: reduce dereferences of the next batch
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
fc4b78f4cc glthread: use 32-bit align instead of 64-bit ALIGN
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
41671ec544 mesa: remove exec="dynamic" from Draw functions that are not really dynamic
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
00b5791541 mesa: reset primitive restart state in glClientAttribDefaultEXT
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
ee0263e03f mesa: replace _NEW_EVAL with vbo_exec_update_eval_maps
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
2020-04-27 11:56:06 +00:00
Marek Olšák
cf2f3c2753 ac: reassociate FP expressions for inexact instructions for radeonsi
Totals:
SGPRS: 2591784 -> 2590696 (-0.04 %)
VGPRS: 1666888 -> 1666736 (-0.01 %)
Spilled SGPRs: 4131 -> 4107 (-0.58 %)
Spilled VGPRs: 38 -> 38 (0.00 %)
Private memory VGPRs: 2176 -> 2176 (0.00 %)
Scratch size: 2228 -> 2228 (0.00 %) dwords per thread
Code Size: 52715468 -> 52693584 (-0.04 %) bytes
LDS: 92 -> 92 (0.00 %) blocks
Max Waves: 479897 -> 479892 (-0.00 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Marek Olšák
4b9370cb0f ac: generate FMA for inexact instructions for radeonsi
NIR mostly does this already.

Totals:
SGPRS: 2588520 -> 2591784 (0.13 %)
VGPRS: 1666984 -> 1666888 (-0.01 %)
Spilled SGPRs: 4074 -> 4131 (1.40 %)
Spilled VGPRs: 38 -> 38 (0.00 %)
Private memory VGPRs: 2176 -> 2176 (0.00 %)
Scratch size: 2228 -> 2228 (0.00 %) dwords per thread
Code Size: 52726872 -> 52715468 (-0.02 %) bytes
LDS: 92 -> 92 (0.00 %) blocks
Max Waves: 479872 -> 479897 (0.01 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Marek Olšák
f2c2a28073 ac: update and document fast math flags used by radeonsi
This should have no effect, because we never use FP division, but
it's safer for the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Marek Olšák
3bb65c0670 ac: force enable -structurizecfg-skip-uniform-regions for LLVM 11
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
2020-04-27 11:20:16 +00:00
Danylo Piliaiev
eeab9c93db st/mesa: Treat vertex inputs absent in inputMapping as zero in mesa_to_tgsi
After updating vertex inputs being read based on optimized NIR, they may go out
of sync with inputs in mesa IR. Which is translated to TGSI and used together
with NIR if draw doesn't have llvm.

It's much easier to treat such inputs as zero because there is no pass to
entirely get rid of them and they don't contribute to shader's output.

Fixes: d684fb37bf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2815
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4705>
2020-04-27 09:30:06 +00:00
Samuel Pitoiset
b785ad5853 gitlab-ci: add lists of expected failures for RADV CI
Currently only supports PITCAIRN, POLARIS10, VEGA10 and NAVI10
with ACO only, but it's a start.

Unfortunately, we have to duplicate and we will have to try to
keep these lists up-to-date, but it's better than nothing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4689>
2020-04-27 07:59:27 +00:00
Samuel Pitoiset
574196d5f6 radv: fix robust_buffer_access if enabled via VkPhysicalDeviceFeatures2
It can be enabled via pEnabledFeatures or via vkPhysicalDeviceFeatures2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4706>
2020-04-27 09:33:44 +02:00
Dave Airlie
8faa0e2c1b gallivm: fix stencil border
Fixes:
dEQP-GLES31.functional.texture.border_clamp.unused_channels.depth32f_stencil8_sample_stencil
dEQP-GLES31.functional.texture.border_clamp.sampler.uint_stencil

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
565df65651 llvmpipe: clamp color storage for integer types.
If storing to an integer for lower bit size (i.e. 16-bit uint to
10-bit uint), we need to clamp to the maximum value not truncate.

Fixes:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.r16_uint.a2b10g10r10_uint_pack32.optimal_optimal_nearest

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
024b5dfc1c llvmpipe: enable stencil only formats. (v2)
This fixes two bugs, one in clearing and one in sign extensions
for S8 only types, and enables it for use.

These are useful for vulkan support later.

v2: move casting to same place as Z casting.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
65906d1331 llvmpipe/setup: add point size clamping
Fixes
dEQP-GLES2.functional.rasterization.limits.points
dEQP-VK.rasterization.primitive_size.points.point_size*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
1f071db43a llvmpipe: fix d32 unorm depth conversions.
When the depth value was 1.0 and was being converted to Z32_UNORM
the conversion would scale it up to INT32_MAX + 1 which would
cause FPToSI to give incorrect results, changing it to use
FPToUI for the unsigned 32-bit case only fixes it.

Fixes:
GTF-GL45.gtf30.GL3Tests.depth_texture.depth_texture_fbo_clear

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
fe5a8e1ace draw/tess: fix TES patch vertices in.
Fixes CTS KHR-GL45.tessellation_shader.single.max_patch_vertices

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
7b4a7a1117 llvmpipe: fix ssbo alignment
KHR-GL45.geometry_shader.api.max_shader_storage_blocks

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
93b8d89275 llvmpipe: bump max images to 16
This is needed to make some tests run, and helps for vulkan later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
e1c006204f util/indirect: handle stride less than number of parameters.
It's legal to have a stride less than the num of parameters,
in this case no need to try and over map the buffer which asserts

Fixes:
GTF-GL45.gtf43.GL3Tests.multi_draw_indirect.multi_draw_indirect_stride

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:24 +10:00
Dave Airlie
23efd323aa gallivm/nir: add helper invocation support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 12:35:21 +10:00
Dave Airlie
13e5f331db gallivm/nir: fix image store conversions
This fixes a few of the image store paths, to do the
correct clamping of unsigned/signed values

Fixes: KHR-GLES31.core.layout_binding.block_layout_binding_block_ComputeShader
KHR-GL45.shader_image_load_store.basic-allFormats-store
KHR-GL46.shader_image_load_store.multiple-uniforms

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4574>
2020-04-27 10:06:00 +10:00
Connor Abbott
bf3c9d2770 tu: Don't invert point coords
We shouldn't need to invert them, and the Vulkan blob doesn't either.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4733>
2020-04-25 16:15:48 +00:00
Connor Abbott
180f98678f ir3: Remove VARYING_SLOT_PNTC remapping hack
The st now does this for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4732>
2020-04-25 15:52:05 +00:00
Connor Abbott
662e9c1801 st/nir: Fix assigning PointCoord location with !PIPE_CAP_TEXCOORD
This was trying to emulate the effect of mapping GL -> TGSI -> NIR,
but failed to handle VARYING_SLOT_PNTC which led to a kludgy workaround
in freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4732>
2020-04-25 15:52:05 +00:00
Connor Abbott
a64d266134 freedreno/a6xx: Implement PrimID passthrough
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Connor Abbott
a661d18a39 tu: Implement PrimID passthrough
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Connor Abbott
1f9839907a ir3: Skip missing VS outputs in VS out map when linking
The hardware is capable of automatically filling in certain values in
the VPC without writing them from the last geometry stage, like
gl_PointCoord or gl_PrimitiveID when there is no GS. However, we *do*
have to enable these outputs (i.e. set the VPC_VAR_DISABLE bit to 0) as
VPC_VAR_DISABLE is really about FS inputs rather than VS outputs. To do
this, we move the computation of the enable bits to ir3_link_add(),
which is also a nice refactor anyway. In addition we detect the PrimID
case specifically so that the driver can program the location.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Connor Abbott
cc530858c1 freedreno/a6xx: Document PrimID passthrough registers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4704>
2020-04-25 01:06:21 +00:00
Joshua Ashton
0b44582394 radv: Pass logical device to si_emit_graphics
We'll need this in order to retrieve the va of a bo for a future ext.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4728>
2020-04-25 00:32:20 +00:00
Kristian H. Kristensen
bf542484ea freedreno/ir3: Print @tex write mask using 0x%x
That way we can parse it again with the assembler.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
c801228f0d freedreno/ir3: Reset lex line number when we start parsing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
34e7179dfa freedreno/ir3: Parse, but ignore @in, @out and @tex headers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
da467817e3 freedreno/ir3: Move ir3 assembler to backend compiler
For easier reuse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen
869d86e664 freedreno/computerator: Decouple ir3 assembler
Specifically, don't include ir3_asm.h in the parser as that's
computerator specific.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Andres Gomez
375c7a3863 Revert "meson,ci: Disable sparse_array tests on windows"
The Wine version in the build image has been upgraded.

This reverts commit 6be65b0777.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4678>
2020-04-24 20:01:31 +00:00
Andres Gomez
cb055c6ca4 gitlab-ci: install winehq-stable to get 5.0 instead of 4.0
Additionally, purge the winehq-stable package and its dependencies to
avoid crashing when building for s390x.

v2:
  - Remove winehq-stable and dependencies for s390x.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2657
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> [v1]
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4678>
2020-04-24 20:01:31 +00:00
Marek Vasut
c8ccd63911 etnaviv: Fix depth stencil ops on GC880/GC2000
This patch fixes depth stencil ops on MX6S GC880 and MX6Q GC2000.
The following dEQPs now pass:
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_depth_funcs.*
  dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_ops.*
which is roughly 600 fixed dEQP tests.

The problem is that if the front-facing stencil has a value mask 0x00 and
the back-facing stencil has some non-zero value mask, then the stencil part
of the depth stencil buffer is written with 0x00 unconditionally. The blob
replicates the value mask of the back-facing stencil to the value mask of
the front-facing stencil to achieve correct rendering, replicate the same
behavior here.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4275>
2020-04-24 21:22:55 +02:00
Rhys Perry
5c5c2dd48f radv/aco: enable 8/16-bit storage and int8/int16 on GFX8+
With this, Doom Eternal should now run with ACO on GFX8+.

The generated 8/16-bit storage code is okay but the generated int8/int16
code is currently pretty bad but it works and apparently Doom Eternal
doesn't actually use it (even though it requires it).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4707>
2020-04-24 20:04:39 +01:00
Rhys Perry
eeccb1a941 aco: lower 8/16-bit integer arithmetic
dEQP-VK.spirv_assembly.type.* passes with the features and extensions
enabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4707>
2020-04-24 20:03:59 +01:00
Rhys Perry
bcd9467d5c aco: improve sub-dword emit_split_vector() with sgprs
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
a3dc1441f0 aco: clobber scc in s_bfe_u32 in get_alu_src()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
78389f4cbc aco: handle undef p_create_vector operands in the optimizer
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
deea4b7c5a aco: vectorize global loads/stores
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
7db7206631 aco: allow 8/16-bit shared loads
These should work now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
48b7beb7b0 aco: add and use get_buffer_store_op() helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
936b70c8cf aco: refactor visit_store_scratch() to use new helpers
Should support 8/16-bit stores now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
18817041f7 aco: refactor visit_store_global() to use new helpers
Should support 8/16-bit stores now

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
c7bd69b3ae aco: refactor visit_store_ssbo() to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
f75c830433 aco: refactor store_vmem_mubuf() to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
98b4cc7110 aco: refactor store_lds() to use new helpers
It should also work correctly for 8/16-bit stores

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
562353e1f1 aco: add helpers for splitting stores
split_store_data() splits a vector and p_as_uniforms it if needed.

scan_write_mask()/advance_write_mask() are similar to
u_bit_scan_consecutive_range(), but makes it easier to only clear part of
the range and will also give ranges for zero'd bits.

split_buffer_store() is a helper for splitting VMEM/SMEM stores.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
211a9f2057 aco: use emit_load helper for VMEM/SMEM loads
Also implements 8/16-bit loads for scratch/global.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
57e6886f98 aco: refactor load_lds to use new helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
542733dbbf aco: add emit_load helper
This helper is used for recombining split loads, passing the result to
p_as_uniform, aligning the offset down and shifting it right if needed and
handling large constant offsets.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
b77d638e1b aco: add and use RegClass::get() helper
Eventually, we'll probably want to replace the current
RegClass(type, size) constructor with this.

This has a functional change in that get_reg_class() now creates v1/v2
instead of v4b/v8b.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
69b92db131 aco: be more careful about using SMEM for load_global
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
03568249f9 radv: allocate larger shader memory slabs if needed
Fixes dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 hang with ACO
(features needed for the test are implemented in a later commit)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Rhys Perry
51363bd475 radv: align buffer descriptor sizes to dword
This is needed to prevent bounds checking issues when load 8/16-bit values
with dword loads.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
2020-04-24 18:52:54 +00:00
Timur Kristóf
62ff2ff808 aco: Move s_setprio to correct place after the gs_alloc_req.
Previously the setprio was inside the branch, so it would only reset
the priority on the first wave, but not the others.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
277f37d036 aco: Use 24-bit multiplication for NGG wave id and thread id.
Both of them should always fit 24 bits anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
eafc1e7365 aco: Use 24-bit multiplication in TCS I/O
The TCS inputs and outputs must always fit into the LDS,
which implies that their addresses also always fit 24 bits.

On AMD GPUs, 24-bit multiplication is much faster than 32-bit
multiplication, so we can take the opportunity to use that
for TCS I/O instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
64332a0937 aco: Const correctness for aco_print_ir.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
0c0691d43e aco: Const correctness for get_barrier_interaction.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
f321dc33c8 aco: Abort when RA can't find a register.
Previously, it was just unreachable, which means it will generate
invalid shaders when it encounters a situation when it can't allocate
registers for eg. a large load.

This commit makes it slightly easier to notice such problems without
triggering a GPU hang.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
f2e7aee244 aco: Increase barrier_count to 7 to include barrier_barrier.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
25775d346c aco: Only store TCS outputs to VMEM when they are read by TES.
Totals from affected shaders (GFX10):
Code Size: 10832 -> 10736 (-0.89 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Timur Kristóf
b779d05d71 radv: Add inputs read by TES to radv_shader_info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
2020-04-24 17:58:57 +00:00
Jonathan Marek
c3ef0275c4 turnip: add adreno 650
Tile alignment is 96, with gmem alignment of 0x6000

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Jonathan Marek
aa3624b8ab turnip: use RESOLVE_TS event
This is required on a650 to flush the GMEM store.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Jonathan Marek
f81e56c9a0 turnip: remove unused RB_UNKNOWN_8E04_blit
New blit code doesn't change this value, and different values seem to be
related to the driver version and not the GPU version.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
2020-04-24 17:42:01 +00:00
Mike Blumenkrantz
c683138689 zink: set UBO alignments in nir_intrinsic_load_uniform lowering
resolves this error
  error: nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr) (../src/compiler/nir/nir_validate.c:582)
in ext_packed_depth_stencil-readdrawpixels piglit test

port of f5b14d983e

Fixes: fb64954d9d ("nir: Validate that memory load/store ops work on whole bytes")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4711>
2020-04-24 17:27:30 +00:00
Fritz Koenig
155033bbb3 freedreno: allow FMT6_8_UNORM as a UBWC format
FMT6_8_UNORM is necessary for NV12 textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4722>
2020-04-24 17:10:39 +00:00
Jason Ekstrand
9c2a11430e spirv: Rewrite CFG construction
This commit completely rewrites the way we extract a structured CFG from
SPIR-V.  The new approach is different in a few ways:

 1. It does a breadth-first search instead of depth-first.  This means
    that we've visited the merge node for a construct before we visit
    any of the nodes inside the construct.  This makes it easier to
    validate things like loop and switch nesting.

 2. We record more information in the CFG.  Earlier commits added a
    parent pointer to vtn_cf_node but we now record all of the merge and
    other special blocks for each CFG node.  This lets us validate
    things more precisely.

 3. It makes heavy use of merge blocks for walking the CFG.  Previously,
    we sort of used them as hints for trying to guess the CFG structure
    but things got dicey whenever a merge was missing.  We had some
    heuristics for how to handle short-circuiting if statements but it
    was a bunch of special cases.

    Now, we make them a fundamental part of walking the CFG.  When we
    encounter a control-flow construct, we add the body components of
    the construct to the BFS work list and then jump to the merge block
    if one exists to continue scanning the current CFG nesting level.
    If no merge block exists, we assume that means that control-flow
    never re-converges in a normal way and that the only way to get back
    to normality is with a direct jump such as a loop break or continue.
    This should make things far more robust when trying to deal with the
    more creative placement (or lack thereof) of merge instructions.

Reviewed-by: Alan Baker <alanbaker@google.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
Closes: #2760
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4446>
2020-04-24 16:29:24 +00:00
Jason Ekstrand
80ffbe915f anv: Add support for HiZ+CCS
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
752eefdb3d intel/isl: Refactor isl_surf_get_ccs_surf
This refactor breaks out a new isl_surf_supports_ccs function which does
most of the validity checking.  The isl_surf_get_ccs_surf function calls
this function and then dives right into constructing the CCS aux_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
3eb1993625 intel/isl: Delete a misleading comment
Untyped messages are only use on Gen9+ for UBOs and SSBOs.  They will
never be used on anything using an isl_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
483a1d5e6c anv/cmd_buffer: Move anv_image_init_aux_tt higher
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
65e541ab16 anv: Simplify a case in layout_to_aux_usage
If it's depth, the only possible value of planes[plane].aux_usage is
ISL_AUX_USAGE_HIZ at least right now.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
5cb6c5d11d intel/blorp: Allow more HiZ usages in hiz_clear_depth_stencil
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
0d91dae7f0 anv: Generalize some aux usage checks
For the checks dealing with fast-clear values, we change them to check
for the depth aspect because the distinction there really is between
color and depth more than between HiZ and CCS.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:45 +00:00
Jason Ekstrand
86ded00c40 anv/blorp: Do less hard-coding of aux usages
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
54b525caf0 anv: Rework anv_layout_to_aux_state
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
eb0cede586 anv: Be more conservative about image view usage
We were ORing together the image and stencil usage rather than actually
following the formula in the spec.  This can lead to assertions in other
parts of the driver if we're not careful.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
d2f3576d33 anv: Move vk_image_layout_is_read_only higher
While we're at it, we drop some _KHR suffixes

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Jason Ekstrand
5de9f4409a anv: Add a vk_image_layout_to_usage_flags helper
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
2020-04-24 16:17:44 +00:00
Rafael Antognolli
e3ab86c599 anv: Enable HiZ on multi-layer depth buffers.
Improves The Witcher 3 fps by 2-10% on ICL (depending on the configs and
system).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4661>
2020-04-24 15:14:59 +00:00
Christian Gmeiner
709f26c47d etnaviv: support for using generic blit path
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1641>
2020-04-24 13:51:28 +00:00
Christian Gmeiner
b043c40edd etnaviv: call util_blitter_save_fragment_constant_buffer_slot(..)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1641>
2020-04-24 13:51:28 +00:00
Christian Gmeiner
e731740388 etnaviv: drop default state for FE_HALTI5_ID_CONFIG
It gets emitted when needed - see emit_halti5_only_state(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4729>
2020-04-24 13:39:58 +00:00
Christian Gmeiner
4b0a732db3 docs/features: mark GL_ARB_texture_filter_anisotropic as done for etnaviv
Needs GPUs with HALT0.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4725>
2020-04-24 13:36:56 +00:00
Jonathan Marek
73f7f73ef3 freedreno/ir3: fix incorrect conversion folding
Fixes dEQP-VK.glsl.builtin.function.pack_unpack.unpackhalf2x16_compute

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
2020-04-24 13:11:58 +00:00
Jonathan Marek
dd49a40410 freedreno/ir3: set even bit for f2f16_rtne
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
2020-04-24 13:11:58 +00:00
Jonathan Marek
edc35c1f54 freedreno/ir3: fix 16-bit ssbo access
Update cat6 instruction type, and shift 1 in lower_offset_for_ssbo.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
2020-04-24 13:11:58 +00:00
Rhys Perry
ede1c171c5 aco: fix outdated label_vec from p_create_vector labelling
Fixes random dEQP-VK.transform_feedback.fuzz.* crashes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2dc550202e
    ('aco: copy-propagate p_create_vector copies of vectors')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4730>
2020-04-24 12:21:15 +00:00
Jason Ekstrand
fdf9b674ee nir/lower_subgroups: Mask off unused bits in ballot ops
Thanks to VK_EXT_subgroup_size_control, we can end up with
gl_SubgroupSize being as low as 8 on Intel.

Fixes: d10de25309 "anv: Implement VK_EXT_subgroup_size_control"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4694>
2020-04-24 11:37:03 +00:00
Jason Ekstrand
9c009da208 anv: Drop an assert
Ever since Vulkan 1.2, this feature has been in core so enabling the
extension is no longer required.

Fixes: 4ef3f7e3d3 "anv: Enable Vulkan 1.2 support"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4694>
2020-04-24 11:37:03 +00:00
Marek Olšák
b520a58cc1 radeonsi: use pipe_blend_state::max_rt to update fewer blend registers
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
2020-04-24 10:38:55 +00:00
Marek Olšák
b4fd8f1919 ac,radeonsi: simplify checking for Navi1x chips
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
2020-04-24 10:38:54 +00:00
Marek Olšák
d8443b211e ac: out-of-order rasterization is not supported on gfx10
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
2020-04-24 10:38:54 +00:00
Jonathan Marek
e43fc003e0 turnip: divide cube map depth by 6
This matches the GL driver and fixes these tests:

dEQP-VK.glsl.texture_functions.query.texturesize.samplercubearray*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4709>
2020-04-24 10:24:55 +00:00
Jason Ekstrand
bc5c438289 spirv: Fix passing combined image/samplers through function calls
Fixes dEQP-VK.spirv_assembly.instruction.function_params.sampler_param

cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4684>
2020-04-24 09:43:21 +00:00
Jason Ekstrand
a1a08a5802 nir/opt_deref: Remove certain sampler type casts
The SPIR-V parser sometimes generates casts from specific sampler types
like sampler2D to the bare sampler type.  This results in a cast which
causes heartburn for drivers but is harmless to remove.

cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4684>
2020-04-24 09:43:21 +00:00
Jason Ekstrand
f4addfdde3 spirv: Use nir_const_value for spec constants
When we originally wrote spirv_to_nir we didn't have a good scalar value
union to handily use so we rolled our own thing for spec constants.  Now
that we have nir_const_value, we can use that and simplify a bunch of
the spec constant logic.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
6211e79ba5 turnip: Properly handle all sizes of specialization constants
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
a4885df9f8 radv: Properly handle all sizes of specialization constants
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
a44e63398b anv: Properly handle all sizes of specialization constants
Closes: #2812
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Jason Ekstrand
64e4297629 spirv: Allow constants and NULLs in SpvOpConvertUToPtr
We were accidentally asserting that the value had to be a vtn_ssa_value
which isn't true if it, for instance, comes from a spec constant.

Fixes: fb282a68bc "spirv: Implement OpConvertPtrToU and OpConvertUToPtr"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
2020-04-24 09:23:59 +00:00
Eduardo Lima Mitev
4dc7b76276 anv/radv: Resolving 'GetInstanceProcAddr' should not require a valid instance
Since vk_icdGetInstanceProcAddr() is wired through
vkGetInstanceProcAddr() in both drivers, we lost the ability for
'GetInstanceProcAddr' to resolve itself prior to having a valid
instance.

An upcoming spec change will fix that and allow
vkGetInstanceProcAddr() to resolve itself passing NULL as
instance. See https://gitlab.khronos.org/vulkan/vulkan/issues/2057
for details.

This patch implements the change in both radv and anvil.

CTS changes have already landed:
https://gitlab.khronos.org/Tracker/vk-gl-cts/issues/2278

vulkan-loader changes have also landed:
https://gitlab.khronos.org/Tracker/vk-gl-cts/issues/2278

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4273>
2020-04-24 09:09:14 +00:00
Rhys Perry
665250e830 aco: fix v_or(s_lshl) and v_add(s_lshl) optimizations
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: d1621834f3
    ('aco: combine VALU and SALU into various VOP3 instructions')

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2822
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4717>
2020-04-24 08:55:19 +00:00
Timothy Arceri
58b8fbb824 glsl: remove some duplicate code from the nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4721>
2020-04-24 08:31:01 +00:00
Timothy Arceri
ffbec55072 glsl: some nir uniform linker fixes
This fixes find_and_update_named_uniform_storage() for subroutines
and also updates num_shader_uniform_components for non opaque
uniforms.

The following patch will ensure this type of bug won't happen again.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4721>
2020-04-24 08:31:01 +00:00
Lionel Landwerlin
9df1d92bbd drm-shim: stub syncobj wait ioctl
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4726>
2020-04-24 10:19:43 +03:00
Lionel Landwerlin
53f151f422 drm-shim: provide a valid fake syncobj handle at creation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4726>
2020-04-24 10:19:43 +03:00
Quentin Glidic
00f5ea9fdc meson: Use dependency.partial_dependency()
It avoids calling pkg-config which was searched for in a wrong way, thus
breaking setup where unprefixed pkg-config was banned (e.g. on Exherbo).

Signed-off-by: Quentin Glidic <sardemff7+git@sardemff7.net>
Fixes: 53f9131205
       ("meson: fix getting cflags from pkg-config")

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4701>
2020-04-24 06:58:32 +00:00
Christian Gmeiner
7aaa0e5908 etnaviv: add anisotropic filter support
I have not seen any usage of TEXTURE_FILTER_ANISOTROPIC in the cmd streams
from the binary blob. Maybe it gets used on some model/rev combinations.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2888>
2020-04-24 06:46:00 +00:00
Christian Gmeiner
1d4c191572 etnaviv: update headers from rnndb
Update to etna_viv commit b40ec2a.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2888>
2020-04-24 06:46:00 +00:00
Christian Gmeiner
7d77295515 etnaviv: anisotropic filtering is supported starting with HALTI0
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2888>
2020-04-24 06:46:00 +00:00
Caio Marcelo de Oliveira Filho
7ee9f851e2 spirv: Update the headers from latest Khronos master
This corresponds to 2ad0492fb00919d99500f1da74abf5ad3c870e4e ("Discuss
generator magic number reservations.")  in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4682>
2020-04-24 05:56:05 +00:00
Caio Marcelo de Oliveira Filho
5620c3efd8 spirv: Handle instruction aliases in vtn_gather_types
Same solution as done in spirv_info generation.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4682>
2020-04-24 05:56:05 +00:00
Tomeu Vizoso
8cba1a13fa gitlab-ci: Test Virgl with traces
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Tomeu Vizoso
5a5316ee1b gitlab-ci: Test OpenGL ES 3.1 on virgl
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Tomeu Vizoso
9b7c20b315 gitlab-ci: Allow test jobs to add options to the dEQP invocation
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Tomeu Vizoso
34ed5fff5b gitlab-ci: Update virglrenderer in the x86_test-gl image
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4659>
2020-04-24 05:37:06 +00:00
Alyssa Rosenzweig
a3d2936a8e panfrost: The texture descriptor has a pointer to a trampoline
Not to the texture itself, and can have a stride right after for linear
textures.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:55:05 +02:00
Alyssa Rosenzweig
36d49b1fb1 panfrost: Identify texture layout field
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:55:02 +02:00
Alyssa Rosenzweig
ad4024968e pan/decode: Remove is_zs weirdness
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:54:36 +02:00
Tomeu Vizoso
e41894ba15 panfrost: Emit texture descriptor on bifrost
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:42 +02:00
Tomeu Vizoso
d3eb23adb5 panfrost: Emit sampler descriptor on bifrost
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:39 +02:00
Alyssa Rosenzweig
497977bbe6 panfrost: decode textures and samplers on bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:34 +02:00
Alyssa Rosenzweig
0167391a1a panfrost: Add tentative bifrost_texture_descriptor
It looks very similar to the Midgard texture descriptor, just with a
bunch of fields moved around and the whole descriptor flattened (so
basically just memory access optimizations, from what I can tell).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:30 +02:00
Alyssa Rosenzweig
81a31911dd panfrost: Set clear_color_[12] in the extra fb desc
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:26 +02:00
Tomeu Vizoso
0a0b670d63 panfrost: Clean up a bit the tiler structs for Bifrost
And set a fixed hierarchy mask for now that seems to generally work.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4680>
2020-04-24 06:53:21 +02:00
Eric Anholt
0d6019302e vc4: Use NIR shader's num_outputs for generating our new output.
Simplifies the code (we don't have struct or matrix varyings that would
have previously made this code break), and makes sure we keep
s->num_outputs accurate.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
5593d80a2c freedreno/ir3: Fix sizing of the inputs/outputs array.
If you have a struct, the var's base driver location is not the last
driver location that will be accessed in that var.  We have a shader
struct member with this number for us, already.  Fixes overflows in:

dEQP-GLES31.functional.program_interface_query.program_output.type.interface_blocks.out.named_block_explicit_location.struct.mat3x2

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
ac937bf878 freedreno/ir3: Fix driver_location of the added vertex_flags varying.
It was ignoring the sizes of the output variables and assuming
single-slot, and failing to update num_outputs.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
e82ce1852a gallium: Fix setup of pstipple frag coord var.
If the last input was a struct or matrix, we would have overlapped driver
locations for our new position var.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
035fd4fb9f nir/lower_clip: Fix picking of unused driver locations.
This fixes things when the last input/output is a struct or matrix.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Eric Anholt
91668ae839 nir/lower_two_sided_color: Fix picking of new driver location.
We have shader->num_inputs for "last used input + 1" already, which
respects struct/matrix varyings.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
2020-04-23 18:52:46 +00:00
Gert Wollny
49ce749d0e nir: Add umad24 and umul24 opcodes
So far only the singed versions are defined.

v2: Make umad24 and umul24 non-driver specific (Eric Anholt)

v3: Take care of nir_builder and automatic lowering of the
    opcodes if they are not supported by the backend.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4610>
2020-04-23 18:23:04 +00:00
Gert Wollny
42aa348dad nir: Add r600 specific intrinsics for tesselation shader IO
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4610>
2020-04-23 18:23:04 +00:00
Eric Anholt
e9add0c501 drm-shim: Let the driver choose to overwrite the first render node.
When I was writing drm-shim, I was focused on the v3d kmsro case -- use my
intel device as the kmsro display device and add on a simulator-based v3d
device that we could render with.  But for the noop backends we use for
shader-db, it's a lot more useful to just overwrite the first render node
in the system so that you don't have to pass a -d <how many render nodes I
already have in my system> argument.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4664>
2020-04-23 17:54:54 +00:00
Eric Anholt
5a8718f01b freedreno: Make the slice pitch be bytes, not pixels.
Back in a2xx, HW pitches were in pixels, so storing that was reasonable.
Ever since then, the HW wants pitches in bytes, and we have only one
instance of using pitch in pixels in the code (a3xx sysmem path).

Flip things around so that only a2xx has to worry about the cpp for
looking at pitches.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4558>
2020-04-23 16:37:50 +00:00
Eric Anholt
bd76a24fd1 freedreno: Introduce a "cpp_shift" value for cpp divs/muls.
This only converts part of the driver to use it, leaving the rest to the
following commit (which inspired this one).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4558>
2020-04-23 16:37:50 +00:00
Samuel Pitoiset
6a6e71524d radv: adjust the supported subgroup stages
VK_SHADER_STAGE_ALL now includes all ray-tracing related stages.
Noticed while comparing vulkaninfo with some other drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4679>
2020-04-23 16:16:09 +00:00
Lionel Landwerlin
efdb7fa9a8 anv: force whole EU array to be powered for perf queries
Because of functional requirements for Gen11, when perf is enabled we
only power half the EU array.

This change forces it to enable everything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Lionel Landwerlin
a7998371ed intel/perf: specify sseu configuration when supported
Because of functional requirements for Gen11, when perf is enabled we
only power half the EU array.

This change forces it to enable everything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Lionel Landwerlin
8f152ed101 intel/perf: store default sseu configuration
This is the powergating configuration of the EU array. The default is
everything powered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Lionel Landwerlin
ea8cb79742 include/drm-uapi: bump headers
From drm-next at the following commit :

  commit 1aa63ddf726ea049279989b93b69b57ce6efd75b
  Merge: 774f1eeb18b0 14d0066b8477
  Author: Dave Airlie <airlied@redhat.com>
  Date:   Wed Apr 22 10:40:34 2020 +1000

      Merge tag 'drm-misc-next-2020-04-14' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
2020-04-23 15:55:59 +00:00
Samuel Pitoiset
ff3f775476 radv: simplify checking for Navi1x chips
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4702>
2020-04-23 15:54:32 +02:00
Rhys Perry
0d9fe0405f aco: improve code for 32-bit isign
No shader-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
d1621834f3 aco: combine VALU and SALU into various VOP3 instructions
shader-db (Navi):
Totals from 2916 (2.28% of 127638) affected shaders:
SGPRs: 184427 -> 184283 (-0.08%); split: -0.10%, +0.02%
VGPRs: 143520 -> 143640 (+0.08%); split: -0.00%, +0.09%
CodeSize: 14913548 -> 14913288 (-0.00%); split: -0.00%, +0.00%
MaxWaves: 26034 -> 26012 (-0.08%)
Instrs: 2935435 -> 2930960 (-0.15%); split: -0.15%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
607fb4153d aco: move call to store_output_to_temps in store_ls_or_es_output earlier
Skips get_intrinsic_io_basic_offset()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
b497b774a5 aco: remove copy in load_input_from_temps()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
2dc550202e aco: copy-propagate p_create_vector copies of vectors
Instead of copying the operands of the other p_create_vector and labelling
the definition with label_vec, copy the operands and label it with
label_temp so that it can be copy-propagated.

This was found while removing a redundant copy in load_input_from_temps()
which removed duplicate p_create_vector instructions.

shader-db (Navi):
Totals from 139 (0.11% of 127638) affected shaders:
VGPRs: 8472 -> 7948 (-6.19%)
CodeSize: 514592 -> 512368 (-0.43%)
MaxWaves: 1089 -> 1195 (+9.73%)
Instrs: 100214 -> 99658 (-0.55%)
Cycles: 400856 -> 398632 (-0.55%)
VMEM: 15545 -> 15338 (-1.33%)
Copies: 5140 -> 4584 (-10.82%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4667>
2020-04-23 12:39:33 +00:00
Rhys Perry
e4383b5c7f aco: decrease the uses of other copy operations after splitting/removing
For copies like v[7:8] = v[8:9], what currently happens is:
- do_copy() will skip the second dword
- the uses of the second dword will be reduced to 0
- the copy operation will be removed from the map
and v8 will never be set to v9.

So just decrease the uses of other operations after splitting or removing
the current operation, so: "v8 = v9" will be split off, it's uses reduced
and then the new copy will be done in the next iteration.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4686>
2020-04-23 11:39:23 +00:00
Erik Faye-Lund
7f17a0a809 meson: correct windows-version define
The macro "_WINVER" does nothing, the macro definitions that matter for
windows API version selection are "_WIN32_WINNT" and "WINVER".

The header "sdkddkver.h" (which is included from thousands of
different windows-headers) defines "WINVER" to the same value as
"_WIN32_WINNT" of only the latter is defined, which explains why this
works right now. But we shouldn't depend on that kind of luck, and
instead define the right maco.

Fixes: 3aee462781 ("meson: add windows compiler checks and libraries")
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4681>
2020-04-23 11:19:52 +00:00
Rhys Perry
32d871b48f nir/algebraic: don't undo lowering of 8/16-bit comparisons to 32-bit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4387>
2020-04-23 10:57:38 +00:00
Rhys Perry
6d79298992 nir/lower_bit_size: fix lowering of {imul,umul}_high
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4387>
2020-04-23 10:57:38 +00:00
Rhys Perry
715ef95700 nir/lower_bit_size: fix lowering of shifts
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4387>
2020-04-23 10:57:38 +00:00
Joshua Ashton
58f25098a0 radv: Use TRUNC_COORD on samplers
The default behaviour (0) is: "round-nearest-even to n.6 and drop fraction when point sampling" whereas the Vulkan spec simply wants us to floor it (1) "truncate when point sampling".

See 15.6.1 in the Vulkan spec.
https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/vkspec.html#textures-normalized-operations

The Direct3D spec also mandates this (https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#7.18.7%20Point%20Sample%20Addressing)

This fixes some point-sampling texture precision issues in some Direct3D 9 titles such as Guild Wars 2 and htoL#NiQ: The Firefly Diary that are not present on other vendors.

Fixes dEQP-VK.pipeline.sampler.exact_sampling.*

https://github.com/Joshua-Ashton/d9vk/issues/450
https://github.com/doitsujin/dxvk/issues/1433

CC: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3951>
2020-04-23 09:57:08 +00:00
Samuel Pitoiset
7086b38c81 radv: make sure to export the viewport index if FS needs it
If FS reads gl_ViewportIndex but VS doesn't export it, it should
be zero to avoid reading garbage.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2818
Fixes: b424d49ac0 ("radv/llvm: fix exporting the viewport index if the fragment shader needs it")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4687>
2020-04-23 08:10:25 +00:00
Indrajit Kumar Das
133efa112d radeonsi: enable support for AlphaToCoverageDitherControlNV
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
2020-04-23 12:02:56 +05:30
Indrajit Kumar Das
ede36a2efe mesa: add support for AlphaToCoverageDitherControlNV
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
2020-04-23 12:02:45 +05:30
Indrajit Kumar Das
d82f057218 gallium: prepare framework for supporting AlphaToCoverageDitherControlNV
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
2020-04-23 11:58:49 +05:30
Hyunjun Ko
227df2a2ba turnip: Fix crashes when geometry shader constants aren't used
Fixes dEQP-VK.transform_feedback.fuzz.2_level_array.float.geometry, for
example.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4693>
2020-04-23 05:19:04 +00:00
Rob Clark
85f84ea148 gallium: add # of MRT to blend state
To make it possible for drivers to avoid unnecessary blend state change
for unused MRTs.  Otherwise the driver would have to manage different
blend CSOs for different potential #s of render targets.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4619>
2020-04-23 04:49:52 +00:00
Rob Clark
b88778e2de mesa/st: avoid u_vbuf for GLES
64b VBO types are not required for GLES.  So avoid u_vbuf if that was
otherwise the only reason it was used.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4619>
2020-04-23 04:49:52 +00:00
Rob Clark
7e1b57a6d9 mesa: avoid redundant VBO updates
Avoids re-emitting unchanged VBO state, which is a big chunk of the
state updates in gfxbench driver2

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4619>
2020-04-23 04:49:52 +00:00
Kenneth Graunke
155bb74ea9 nir: Actually do load/store vectorization beyond vec2
nir_opt_load_store_vectorize has an is_strided_vector() function that
looks for types with weird explicit strides.  It does so by comparing
the explicit stride against the type-size-derived typical stride.

This had a subtle bug.  Simple vector types (vec2/3/4) have no explicit
stride, so glsl_get_explicit_stride() returns 0.  This never matches the
typical stride for a vector, so is_strided_vector() would return true
for basically any vector type, causing the vectorizer to bail.

I found this by looking at a compute shader with scalar SSBO loads at
offsets 0x220, 0x224, 0x228, 0x22c.  nir_opt_load_store_vectorize would
properly vectorize the first two into a vec2 load, but would refuse to
extend it to a vec3 and ultimately vec4 load because is_strided_vector()
saw a vec2 and freaked out.

Neither ACO nor ANV do load/store vectorization before lowering derefs,
so this shouldn't affect them.  However, I'd like to fix this bug to
avoid the trap for anyone who decides to in the future.  In a branch
where anv used this lowering, this cut an additional 38% of the send
messages in the shader by properly vectorizing more things.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4255>
2020-04-22 21:22:36 -07:00
Simon Zeni
51c1c4d95a mesa: enable GL_EXT_draw_instanced for gles2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3204>
2020-04-23 03:56:03 +00:00
Hyunjun Ko
0edff5123c turnip: Skip unused regs when setting up streamout buffers
Fixes: 374406a7c4

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Hyunjun Ko
e892733b80 turnip : Fix wrong offset calculation for xfb buffer.
In vulkan, offsets are already provided through the api
vkCmdBindTransformFeedbackBuffersEXT, so this is duplicated
calculation.

Fixes : 9ff1959ca5

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Hyunjun Ko
e34b0d65f9 turnip: Implement and enable VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
Tested by
dEQP-VK.transform_feedback.simple.query*

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Hyunjun Ko
aff02dd76b turnip: make the struct slot_value of queries get 2 values
In case of transform feedback query, it writes two integer values,
which one is for primitives written and another is for primitives
generated.

To handle this, the second member of the struct slot_value is worth
to be presented not as a padding.

In addition, we also need to modify get/copy_result to access both
values.

This patch is the prep work for the transform feedback query support.

Tested with
dEQP-VK.pipeline.timestamp.*
dEQP-VK.query_pool.occlusion_query.*

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Brian Ho <brian@brkho.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4604>
2020-04-23 01:14:19 +00:00
Kenneth Graunke
259cae4442 intel/compiler: Don't create 64-bit src1 immediates in opt_peephole_sel
64-bit immediates are only allowed as src0.  Long ago, we decided to
avoid constructing such illegal situations in the IR, rather than
allowing them in the IR but then promoting bogus immediates to GRFs
later.  So, we need to fix opt_peephole_sel to not put 64-bit immediates
as src1 of the new SEL instruction.

Fixes: a4b36cd3dd ("intel/fs: Coalesce when the src live range is contained in the dst")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2816
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4692>
2020-04-23 00:53:14 +00:00
Kenneth Graunke
4459a70a6e intel/compiler: Delete abs/neg handling in fsign code
This should have gone away when removing source modifiers.  They won't
be set any longer, so this is simply dead code.

Fixes: b7c47c4f7c ("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4691>
2020-04-22 17:04:37 -07:00
Kenneth Graunke
220f0e10d8 intel/compiler: Don't copy prop source mods into PICK_HIGH_32BIT
VEC4_OPCODE_PICK_HIGH_32BIT performs 32-bit UD access on a 64-bit DF
value.  abs and negate make sense on DF, but break entirely when
trying to access pieces of the value as unsigned integer dwords.

Fixes an fsign Piglit test on Ivybridge:
tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/vs-sign-neg-abs

It had regressed when I removed nir_lower_to_source_modifiers, as that
caused us to start generating different code which provoked this bug.

Fixes: b7c47c4f7c ("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2817
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4691>
2020-04-22 17:03:18 -07:00
Dylan Baker
be33cf8ad0 docs: update calendar, add news item, and link releases notes for 20.0.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4688>
2020-04-22 22:10:31 +00:00
Dylan Baker
defc6400e1 docs: Add sha256 sums for 20.0.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4688>
2020-04-22 22:10:31 +00:00
Dylan Baker
c790e1c642 docs: Add relnotes for 20.0.5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4688>
2020-04-22 22:10:31 +00:00
Alejandro Piñeiro
ad460c5dd6 v3d: support for textureQueryLOD
Fixes all the ARB_texture_query_lod piglit tests, and needed to get
the Vulkan CTS textureQueryLOD passing with the ongoing Vulkan driver.

Note that LOD Query bit flag became only available on V42 of the hw,
but the v3d40_tex is using V41 as reference. In order to avoid setting
up the infrastructure to support both v41 and v42, we manually set the
bit if the device version is the correct one.

We also fix how the ARB_texture_query_lod (so EXT_texture_query_lod)
is exposed. Before this commit it was always exposed (wrongly as it
was not really supported). Now it is exposed for devinfo.ver >= 42.

v2: move _need_sampler helper to nir.h (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:43:23 +02:00
Alejandro Piñeiro
9fd180394b nir: add nir_tex_instr_need_sampler helper
That is basically nir_tex_instr sampler_index documentation comment
expressed as a helper.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:43:18 +02:00
Alejandro Piñeiro
41bfd0812b v3d/packet: fixing TMU_Config_Parameter_2 definition
v41 interchanged the size and start values for the Padding, and it
seems that v42 inherited it when adding the LOD Query bit.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:39:41 +02:00
Alejandro Piñeiro
9967c26ae6 v3d/tex: Configuration Parameter 1 can be only skipped if P2 can be skipped too
Configuration Parameter packets 1 and 2 are pointed as optional, but
it is not clearly stated if you can skip only P1 when P2 is needed.

In the practice, it seems that the situation P0 - non-P1 - P2 can
causes problems, and at least on the simulator, it seems that sampler
info are attempted to be accessed. So let's just be conservative, and
only skip P1 configuration if we can skip P2 configuration too.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:39:34 +02:00
Alejandro Piñeiro
d0b644d9f9 v3d/tex: don't configure tmu config 1 if not needed
TMU configuration parameter 1 configures the sampler for the texture
operation. But there are some texture operations that doesn't need a
sampler. Skipping the configuration could provide a small perf
improvement on OpenGL. On the incoming Vulkan driver, would allow us
to avoid to set up an unneeded sampler.

Note that we still need to add the sampler configuration parameter if
the output is a 32bit, as it is on the sampler where we configure that
info.

Also, note that for images this is done comparing against a unpacked
p1 default. But in order to do that it is needed to go through the
code that fills up the unpacked p1. We can skip that too.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
2020-04-22 23:38:18 +02:00
Jonathan Marek
c552b5fd1d turnip: implement VK_EXT_sampler_filter_minmax
Passes dEQP-VK.pipeline.sampler.view_type.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4662>
2020-04-22 20:12:14 +00:00
Jonathan Marek
a77e2ac835 turnip: enable cube arrays
Passes dEQP-VK.pipeline.sampler.view_type.cube_array.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4663>
2020-04-22 19:57:20 +00:00
Jonathan Marek
9daeb50454 turnip: implement VK_EXT_filter_cubic
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4672>
2020-04-22 19:03:58 +00:00
Jonathan Marek
a92d2e1109 turnip: implement VK_EXT_sample_locations
Passes tests in:

dEQP-VK.pipeline.multisample.sample_locations_ext.*

Note that these tests fail because of gl_PrimitiveID not working correctly:

dEQP-VK.pipeline.multisample.sample_locations_ext.verify_location.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4665>
2020-04-22 18:46:46 +00:00
Jonathan Marek
83b2f1d8cf turnip: set shader key msaa field
Fixes per-sample interpolation.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4665>
2020-04-22 18:46:46 +00:00
Daniel Schürmann
36e0d2f39b aco: coalesce v_mad's accumulator with definition's affinities
Totals from affected shaders:
Code Size: 8922676 -> 8915192 (-0.08 %) bytes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
d000d76f13 aco: use upper part of gap in register file if it is beneficial for striding
Totals from affected shaders:
SGPRS: 1717288 -> 1716984 (-0.02 %)
VGPRS: 1305924 -> 1304904 (-0.08 %)
Code Size: 138508892 -> 138420144 (-0.06 %) bytes
Max Waves: 115726 -> 115735 (0.01 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
d666d83be2 aco: try to always find a register with stride for even sizes
Totals from affected shaders:
SGPRS: 1162400 -> 1162400 (0.00 %)
VGPRS: 947364 -> 946960 (-0.04 %)
Code Size: 98399300 -> 98399004 (-0.00 %) bytes
Max Waves: 74665 -> 74682 (0.02 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
5a3c1f4f0b aco: stop get_reg_simple after reaching max_used_gpr
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
2796cb4c24 aco: refactor get_reg_simple() to return early on exact matches
in the best fit algorithm

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
6792e134f3 aco: don't create vector affinities for operands which are not killed or are duplicates
Totals from affected shaders:
SGPRS: 825184 -> 825184 (0.00 %)
VGPRS: 697640 -> 697240 (-0.06 %)
Code Size: 79244104 -> 79201072 (-0.05 %) bytes
Max Waves: 42388 -> 42386 (-0.00 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
edc2b57ac1 aco: allocate full register for subdword definitions if HW doesn't support it
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
97a870cf88 aco: move attempt to find strided register into get_reg_simple()
This simplifies code and helps some shaders

Totals from affected shaders:
Code Size: 51227172 -> 51202216 (-0.05 %) bytes
Max Waves: 19955 -> 19948 (-0.04 %)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
c7f97f110c aco: use DefInfo in more places to simplify RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
734f86db6b aco: create and use DefInfo struct in RA
for maintaining all information necessary to find a register.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
5b2f628da3 aco: create pseudo dummy instruction in RA to be used for live-range splits
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
d9f7d1d5cb aco: refactor get_reg() to also handle affinities
This simplifies definition handling and
helps a few shaders

Totals from affected shaders:
Code Size: 659540 -> 659376 (-0.02 %) bytes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:23 +00:00
Daniel Schürmann
7c8f4ebca9 aco: refactor get_reg() to take Temp instead of RegClass
This patch also moves get_reg_specified() and
get_reg_vec() before get_reg() to make use of it later.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:22 +00:00
Daniel Schürmann
0a9ed98178 aco: simplify operand handling in RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
2020-04-22 18:23:22 +00:00
Jonathan Marek
a5cce95280 turnip: enable VK_FORMAT_S8_UINT as stencil format
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4588>
2020-04-22 17:45:33 +00:00
Jonathan Marek
44c6c145da turnip: improve GMEM load/store logic
Determine load/store at renderpass creation time.

This also fixes behavior with S8_UINT.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4588>
2020-04-22 17:45:33 +00:00
Jonathan Marek
e72201c787 turnip: disable depth test for S8_UINT attachment
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4588>
2020-04-22 17:45:33 +00:00
Rhys Perry
f13049f48a aco: implement 64-bit sgpr swaps
In our pipeline-db, helps almost exclusively Detroit: Become Human.

Totals from 6726 (5.36% of 125503) affected shaders:
CodeSize: 74680952 -> 74102228 (-0.77%)
Instrs: 14551507 -> 14406001 (-1.00%)
Cycles: 1748272436 -> 1690173104 (-3.32%)
VMEM: 964671 -> 964058 (-0.06%)
Copies: 1993312 -> 1847806 (-7.30%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Rhys Perry
2ab45f41e0 aco: implement sub-dword swaps
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Rhys Perry
83fdb1ed3d aco: add VOP3P_instruction
The optimizer isn't yet updated to handle this, since lower_to_hw_instr
will be the only user for now.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Rhys Perry
8fc24f9a45 aco: fix copy statistic for 64-bit vgpr constant copy
The statistic is in units of instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4469>
2020-04-22 13:25:17 +00:00
Connor Abbott
4daa3917a3 ir3: Fix bug with shaders that only exit via discard
discard is supposed to be a terminator, killing the thread, so that it's
possible to exit main solely by a discard e.g. inside of an infinite
loop. However, it currently isn't treated as a terminator in NIR due to
workarounds turning it into demote (d3d-style kill) and even if that
were fixed, we probably wouldn't want to treat discard_if as a jump
since otherwise the scheduler wouldn't be able to schedule things around
it. So, add this workaround which inserts jump instructions as
necessary to guarantee that the program always terminates.

This fixes a hang in dEQP-VK.graphicsfuzz.while-inside-switch, which
conditionally does a discard inside an infinite loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4658>
2020-04-22 09:49:40 +00:00
Connor Abbott
8cfa60eab8 ir3: Don't double-insert the first block
The first block was being added to the list twice, once here and once in
emit_block(), leading to list corruption and infinite loops when trying
to traverse the list of blocks backwards.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4658>
2020-04-22 09:49:40 +00:00
Danylo Piliaiev
66229aa169 spirv: Expand workaround for OpControlBarrier on old GLSLang
In SPIRV of compute shader in Aztec Ruins benchmark there is:

OpControlBarrier %uint_1 %uint_1 %uint_0
// ControlBarrier(Device, Device, rdcspv::MemorySemantics(0));

which is an incorrect translation of glsl barrier().

GLSLang, prior to c3f1cdfa, emitted the OpControlBarrier with
Device instead of Workgroup for execution scope.

2365520c covers similar case but isn't applied when execution_scope
is SpvScopeDevice.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2742
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4660>
2020-04-22 08:46:12 +00:00
Lionel Landwerlin
f402b7c576 iris: fail screen creation when kernel support is not there
v2: Bump check to I915_PARAM_HAS_CONTEXT_ISOLATION (v4.16) (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2803
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4643>
2020-04-22 08:18:33 +00:00
Samuel Pitoiset
bca97abffa gitlab-ci: add a list of excluded tests for RADV
Exclude WSI related tests in CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4656>
2020-04-22 09:11:53 +02:00
Jason Ekstrand
f1a12d6855 meta,i965: Rip GL_EXT_texture_multisample_blit_scaled support out of meta
i965 is the only driver that ever linked to this code and it's been
doing it in BLORP for a long time now.  The only possible case where it
would have fallen back to meta was for depth/stencil but that should
have ended starting with 6cec618e82.  Rip out the dead code.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4622>
2020-04-22 03:02:23 +00:00
Alyssa Rosenzweig
c6244f9311 panfrost: Assert on unimplemented fragcoord etc
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
133c1aba05 panfrost: Fix crashes with small BOs
Affects Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
5c6952108c pan/bi: Assert out multiple textures
Only for a moment.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
3551c138de pan/bi: Pack TEX compact instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:18 +00:00
Alyssa Rosenzweig
cd5fe3b9e0 pan/bi: Generate TEX_COMPACT instruction
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
0769036a5c pan/bi: Stub out tex_compact logic
We may generate either texture type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
f85746af35 pan/bi: Add normal/compact/dual switch to IR
For tex.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
93be49b14b pan/bi: Feed data register to BI_TEX
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
76d1bb03d5 pan/bi: Include TEX_COMPACT f16 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
bfc06b10de pan/bi: Structify TEX compact
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
cf7b952308 pan/bi: Disassemble f16 dual tex
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
a2c735350f pan/bi: Document when dual-tex is triggered
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig
6fe41a12e3 pan/bi: Print tex_compact coordinates
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Kenneth Graunke
902c8731f4 intel/compiler: Put back saturate on [iu]add_sat opcodes
I deleted one too many inst->saturate = ... lines.  This one must stay.

Fixes: b7c47c4f7c ("intel/compiler: Drop nir_lower_to_source_mods() and related handling.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4669>
2020-04-22 00:47:40 +00:00
Roman Stratiienko
f699bb42af panfrost: Align Android makefiles with recent changes
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4634>
2020-04-22 00:27:15 +00:00
Eric Anholt
2f4a3c1ca0 freedreno/ir3: Drop handling FRAG_RESULT_DEPTH writing to .z
Since we consume NIR, we get FRAG_RESULT_DEPTH in .x.  Something must have
been working out for this code to not be trying to get an undefined value,
but go ahead and drop it now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4668>
2020-04-21 23:30:53 +00:00
Jonathan Marek
eab73799d1 turnip: fix GMEM resolve in CmdNextSubpass
The BLIT scissor must be set correctly for tu_store_gmem_attachment.

Fixes this deqp test:

dEQP-VK.pipeline.multisample_shader_builtin.sample_id.137_191_1.samples

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4666>
2020-04-21 23:04:34 +00:00
Andres Gomez
e4521aeafc gitlab-ci: adapt query_traces_yaml to gitlab specific changes
This change was missing after acf7e73be5 "(gitlab-ci: make explicit
tracie is gitlab specific)".

Fixes: acf7e73be5 "(gitlab-ci: make explicit tracie is gitlab specific)".
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4638>
2020-04-22 01:37:21 +03:00
Emil Velikov
0a884d7304 egl: simplify client/platform extension handling
For GLVND reasons the client/platform extensions strings should be
split. While in the non GLVND case they're one big string.

Currently we handle this distinction at run-time for not obvious reason.
Adding additional code and complexity.

Swap those with a few well placed #if USE_LIBGLVND guards.

As a side result this removes a minor memory leak due to the
concatenation in the non GLVND case.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4491>
2020-04-21 22:20:24 +00:00
Erik Faye-Lund
013d9e40fe mesa/gallium: do not use enum for bit-allocated member
The signedness of enums are undefined, so on platforms with signed
enums, this isn't going to work. One such platform is Microsoft Windows.

So let's just use an unsigned here instead.

Fixes: b1c4c4c7f5 ("mesa/gallium: automatically lower alpha-testing")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4648>
2020-04-21 21:56:21 +00:00
Jesse Natalie
a842dc154d util/ralloc: fix ralloc alignment on Win64
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4648>
2020-04-21 21:56:21 +00:00
Kenneth Graunke
b7c47c4f7c intel/compiler: Drop nir_lower_to_source_mods() and related handling.
I think we're unanimous in wanting to drop nir_lower_to_source_mods.
It's a bit of complexity to handle in the backend, but perhaps more
importantly, would be even more complexity to handle in nir_search.

And, it turns out that since we made other compiler improvements in the
last few years, they no longer appear to buy us anything of value.
Summarizing the results from shader-db from this patch:

 - Icelake (scalar mode)

   Instruction counts:

   - 411 helped, 598 hurt (out of 139,470 shaders)
   - 99.2% of shaders remain unaffected.  The average increase in
     instruction count in hurt programs is 1.78 instructions.
   - total instructions in shared programs: 17214951 -> 17215206 (<.01%)
   - instructions in affected programs: 1143879 -> 1144134 (0.02%)

   Cycles:

   - 1042 helped, 1357 hurt
   - total cycles in shared programs: 365613294 -> 365882263 (0.07%)
   - cycles in affected programs: 138155497 -> 138424466 (0.19%)

 - Haswell (both scalar and vector modes)

   Instruction counts:

   - 73 helped, 1680 hurt (out of 139,470 shaders)
   - 98.7% of shaders remain unaffected.  The average increase in
     instruction count in hurt programs is 1.9 instructions.
   - total instructions in shared programs: 14199527 -> 14202262 (0.02%)
   - instructions in affected programs: 446499 -> 449234 (0.61%)

   Cycles:

   - 5253 helped, 5559 hurt
   - total cycles in shared programs: 359996545 -> 360038731 (0.01%)
   - cycles in affected programs: 155897127 -> 155939313 (0.03%)

Given that ~99% of shader-db remains unaffected, and the affected
programs are hurt by about 1-2 instructions - which are all cheap
ALU instructions - this is unlikely to be measurable in terms of
any real performance impact that would affect users.

So, drop them and simplify the backend, and hopefully enable other
future simplifications in NIR.

Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4616>
2020-04-21 21:42:21 +00:00
Dylan Baker
fdd0ce12ac meson: update llvm dependency logic for meson 0.54.0
In meson 0.54.0 I fixed the llvm cmake dependency to return "not found"
if shared linking is requested. This means that for 0.54.0 and later we
don't need to do anything, and for earlier versions we only need to
change the logic to force the config-tool method if shared linking is
required.

Fixes: 821cf6942a
       ("meson: Use cmake to find LLVM when building for window")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4556>
2020-04-21 20:55:12 +00:00
Dylan Baker
8e3696137f remove final imports.h and imports.c bits
This moves the fi_types to a new mesa_private.h and removes the
imports.c file. The vast majority of this patch is just removing
pound includes of imports.h and fixing up the recursive includes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:04 -07:00
Dylan Baker
289f02d1d5 dri/nouveau: replace assert with unreachable
I don't know why removing imports.h suddenly makes clang realize that
this function can not return in a non-debug build, but it does.
Unreachable is better because it doesn't have this problem.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
c3db0936ef mesa: move ADD_POINTERS to macros.h
I'm not really sure where else to put it. Since imports.h only has two
things left in it (neither of which are abstractions for smoothing away
libc differences) I'd like to get them out of there. macros.h is the
only place I can think of to put this macro.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
bf188f3494 mesa|mapi: replace _mesa_[v]snprintf with [v]snprintf
MSVC 2015 and newer has perfectly valid snprintf and vsnprintf
implementations, let's just use those.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
c495c3af26 replace imports memory functions with utils memory functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
bb560f2d65 util: Add an aligned realloc function
Mesa has one of these in imports.h, so u_memory needs one as well. This
is the version from mesa ported.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
b85775900d replace malloc macros in imports.h with u_memory.h versions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
9ee6e78a87 Replace IS_INF_OR_NAN with util_is_inf_or_nan
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
369f002591 move windows strtok_r define to u_string
This makes more sense for it, it's only used in the glsl compiler
currently, so we could probably move it there, but this seems fine for a
header only #define.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
53c36dfcfe replace IROUND with util functions
This adds two new util functions to rounding.h, _mesa_iroundf and
mesa_lround, which are just wrappers around roundf and round, that cast
to int and long int respectively. This is possible since mesa recently
dropped support for VC2013, since 2015 and 2017 support roundf.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
df3ce8fb77 mesa/main: remove unused IROUNDD
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
64014c8302 Replace IROUND_POS with _mesa_roundevenf
Which has the same behavior as long as you don't change the FPU rounding
mode. Other code in mesa makes the same assumption so it should be safe
to make that assumption more generally.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
9d9a2819ee replace IFLOOR with util_ifloor
which are exactly the same function with exactly the same implementation

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
72acb66527 u_math: add x86 optimized version of ifloor
This is copied from the one in src/mesa/main/imports.h, which is the
same otherwise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
bd4e769515 replace LOG2 with util_fast_log2
The implementation is somewhat different, although if you go back in
time far enough they're the same, but the one in u_math was changed a
long time back to be faster.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
f8e4542bad replace _mesa_logbase2 with util_logbase2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
e190e8cef2 replace _mesa_next_pow_two_* with util_next_power_of_two_*
The 64 bit variant in imports.h isn't even used.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Dylan Baker
e533fad182 replace _mesa_is_pow_two with util_is_power_of_two_*
Mostly this uses util_is_power_of_two_or_zero, which has the same
behavior as _mesa_is_pow_two when the input is zero. In cases where the
value is known to be != 0 ahead of time I used the _nonzero variant as
it may be faster on some platforms.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3024>
2020-04-21 11:09:03 -07:00
Eric Anholt
c1e7c1f422 freedreno/drm-shim: Add support for faking other adreno chips.
I wanted to look at the effect of a core NIR change on a2xx codegen, but I
don't have any of those boards.  This could also prove useful for quickly
sanity-checking the compiler by running shader-db on it -- a2xx fails in a
few ways on glmark2, and a3xx-a5xx fails on glmark2 in a debug_assert
(which we don't have enabled in our dEQP runs).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4652>
2020-04-21 15:47:39 +00:00
Gert Wollny
cc23920746 r600/sfn: use new temp register allocation when loading single value temporaries
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
50b66622f1 r600/sfn: Count only literals that are not inline to split instruction groups
An instruction group can only support 4 distinct literals, but inline
constants count into this number, so skip them when counting.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
9c7ce4d76e r600/sfn: Fix using the result of a fetch instruction in next fetch
The result of a fetch instruction can't be used as source in the same CF
block, so force a new CF block when the result would be used in the same
vertex fetch block.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
67495ff9aa r600/sfn: Fix handling of GS inputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
58d6cda5f5 r600/sfn: Handle b2b1 like it was a mov
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
de7ea88ff8 r600/sfn: Fix null pointer deref in live range evalation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
5d10e3ec60 r600/nir: Pin interpolation results to channel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
5e036fef1f r600/sfn: Implementing instructions blocks
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
b51ced7306 r600/sfn: Fix setting alignments when lowering UBOs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
bc9cf6adff r600/sfn: Reduce array limit for scratch usage
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Gert Wollny
6fdc75d1c6 r600: Dump a few more variables when requested
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4609>
2020-04-21 15:10:43 +00:00
Abhishek Kumar
f06e4ab319 anv/android: fix assert in anv_import_ahw_memory
Commit fixes assert that triggers when running
   dEQP-VK.api.external.memory.android_hardware_buffer.dedicated.buffer#bind_export_import_bind

on a debug build of Mesa.

Fixes: c79a528d ("anv/android: support import/export of AHardwareBuffer objects")
Signed-off-by: Abhishek Kumar <abhishek4.kumar@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4655>
2020-04-21 11:50:15 +00:00
Danylo Piliaiev
829013d0ca st/mesa: Re-assign vs in locations after updating nir info for ffvp/ARB_vp
After call to nir_shader_gather_info - inputs_read may have changed so
st_nir_assign_vs_in_locations should be called for shader to remain in
sync with vbo state.

Fixes piglit tests:
  gl-1.0-fpexceptions
  gl-1.1-color-material-unused-normal-array
  arb_vertex_program-unused-attributes
regression on several gallium drivers.

Fixes: d684fb37bf
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4645>
2020-04-21 11:16:41 +00:00
Connor Abbott
ae169f38ce tu: Fix the advertised maxFragmentInputComponents
This appears to be limited by VPC_CNTL_0::NUMNONPOSVAR, which is an
8-bit bitfield with no possibility for expansion. Also, in practice
we'll be limited by the vertex shader output maximum, which includes
gl_Position, of 128, so that users won't be able to use more than 124
components anyways. Lower it to match the GL blob.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4641>
2020-04-21 10:04:13 +00:00
Connor Abbott
45ec9c0f3d freedreno/a6xx: Expand various varying-count bitfields
The extra bit needs to be used when using the maximum of 128 varying
components. I confirmed that PC_PRIMITIVE_CNTL_1 and SP_PRIMITIVE_CNTL
are expanded using a trace of the Vulkan blob with the maximum number of
varyings, and changed the others by analogy.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4641>
2020-04-21 10:04:13 +00:00
Erik Faye-Lund
d29fea77b9 docs: remove outdated sentence
The releasing documentation no longer contains this step, so this seems
out of date. The anchor for this link is also removed, making it point
nowhere.

Fixes: d4cb9ef826 ("docs: Update release notes with current process")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4654>
2020-04-21 09:49:22 +00:00
Pierre-Eric Pelloux-Prayer
56f174d14e st/omx: fix gcc warnings
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4584>
2020-04-21 09:16:28 +02:00
Pierre-Eric Pelloux-Prayer
07071cac7b gallium/utils: silence strncpy warning
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4584>
2020-04-21 09:16:26 +02:00
Pierre-Eric Pelloux-Prayer
dbfeec62c3 mesa: fix crash in find_value
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4584>
2020-04-21 09:16:18 +02:00
Jason Ekstrand
7c43b8ce1b nir: Delete the fnoise opcodes
As of the previous commit, they are never used.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4624>
2020-04-21 06:16:13 +00:00
Jason Ekstrand
4386c06770 glsl: Hard-code noise to zero in builtin_functions.cpp
Version 4.4 of the GLSL spec changed the definition of noise*() to
always return zero and earlier versions of the spec allowed zero as a
valid implementation.

All drivers, as far as I can tell, unconditionally call lower_noise()
today which turns ir_unop_noise into zero.  We've got a 10-year-old
comment in there saying "In the future, ir_unop_noise may be replaced by
a call to a function that implements noise."  Well, it's the future now
and we've not yet gotten around to that.  In the mean time, the GLSL
spec has made doing so illegal.

To make things worse, we then pretend to handle the opcode in
glsl_to_nir, ir_to_mesa, and st_glsl_to_tgsi even though it should never
get there given the lowering.  The lowering in st_glsl_to_tgsi defines
noise*() to be 0.5 which is an illegal implementation of the noise
functions according to pre-4.4 specs.  We also have opcodes for this in
NIR which are never used because, again, we always call lower_noise().

Let's just kill the whole opcode and make builtin_builder.cpp build a
bunch of functions that just return zero.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4624>
2020-04-21 06:16:13 +00:00
Timothy Arceri
95f555a93a st/glsl_to_nir: make use of nir linker for linking uniforms
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4395>
2020-04-21 01:57:34 +00:00
Timothy Arceri
0f79e0f7c6 glsl: fix gl_nir_set_uniform_initializers() for bindless textures
We need to skip opaque variables inside blocks, this is handled
elsewhere and will cause a crash here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4395>
2020-04-21 01:57:34 +00:00
Timothy Arceri
9546440227 glsl: add bindless support to nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4395>
2020-04-21 01:57:34 +00:00
Eric Engestrom
57e65cabd4 pick-ui: show commit sha in the pick list
Useful to get more context when a manual merge is needed, for instance.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4651>
2020-04-21 01:25:44 +00:00
Eric Engestrom
32451a15ec pick-ui: make .pick_status.json path relative to the git root instead of the script
This allows the script to be called from another git worktree for instance,
which I need for my workflow :)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4649>
2020-04-21 01:13:53 +00:00
Eric Engestrom
26a26a3584 pick-ui: compute .pick_status.json path only once
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4649>
2020-04-21 01:13:53 +00:00
Jason Ekstrand
a4b36cd3dd intel/fs: Coalesce when the src live range is contained in the dst
Consider the following case:

    // g119-123 are written somewhere above
    mul.sat(16)   g67<1>F    g6.4<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g69<1>F    g6.5<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g71<1>F    g6.6<0,1,0>F   g125<8,8,1>F
    mov(16)       g119<1>F   g67<8,8,1>F
    mov(16)       g121<1>F   g69<8,8,1>F
    mov(16)       g123<1>F   g71<8,8,1>F

We should be able to coalesce it into

    mul.sat(16)   g119<1>F   g6.4<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g121<1>F   g6.5<0,1,0>F   g125<8,8,1>F
    mul.sat(16)   g123<1>F   g6.6<0,1,0>F   g125<8,8,1>F

What's stopping us is an overly conservative check for writes to the two
registers being coalesced.  The check walks over the intersection of
their live ranges and checks for no writes to either one.  However,
because the register which starts the live range (the mul.sat in this
case) is inside that intersection, we flag it as a write in the
intersection and don't coalesce.  However, this case is safe because the
destination register of the copy is never read after the source is
written.

Shader-db changes on ICL:

    total instructions in shared programs: 16043613 -> 16042610 (<.01%)
    instructions in affected programs: 43036 -> 42033 (-2.33%)
    helped: 226
    HURT: 0
    helped stats (abs) min: 1 max: 30 x̄: 4.44 x̃: 4
    helped stats (rel) min: 0.09% max: 26.67% x̄: 4.89% x̃: 3.43%
    95% mean confidence interval for instructions value: -4.86 -4.02
    95% mean confidence interval for instructions %-change: -5.57% -4.22%
    Instructions are helped.

    total cycles in shared programs: 334766372 -> 334710124 (-0.02%)
    cycles in affected programs: 617548 -> 561300 (-9.11%)
    helped: 214
    HURT: 2
    helped stats (abs) min: 15 max: 1512 x̄: 263.21 x̃: 212
    helped stats (rel) min: 0.30% max: 75.36% x̄: 25.30% x̃: 21.58%
    HURT stats (abs)   min: 40 max: 40 x̄: 40.00 x̃: 40
    HURT stats (rel)   min: 0.15% max: 0.15% x̄: 0.15% x̃: 0.15%
    95% mean confidence interval for cycles value: -277.91 -242.90
    95% mean confidence interval for cycles %-change: -27.58% -22.55%
    Cycles are helped.

No spill/fill changes or gained/lost

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4627>
2020-04-21 01:00:24 +00:00
Jason Ekstrand
14b8d979db intel/fs: Rename block to scan_block in can_coalesce_vars
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4627>
2020-04-21 01:00:24 +00:00
Jonathan Marek
064d39e620 radv: use common nir_convert_ycbcr
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Jonathan Marek
7870d71459 anv: use common nir_convert_ycbcr
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Jonathan Marek
71820c6b02 nir: convert_ycbcr: preserve alpha channel
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Jonathan Marek
f8558fb1ce nir: add common convert_ycbcr for vulkan csc
Copied from anv, replaced state with passing model/range directly.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4528>
2020-04-20 22:01:43 +00:00
Dave Airlie
c2d8a4bf17 nir/linking: fix issue with two compact variables in a row. (v2)
If we have a clip dist float[1] compact followed by a tess factor
float[2] we don't want to overlap them, but the partial check
only happens for non-compact vars.

This fixes some issues seen with my sw vulkan layer with
dEQP-VK.clipping.user_defined.clip_distance*

v2: v1 failed with clip/cull mixtures, since in that
case the cull has a location_frac to follow after the clip
so only reset if we get a location_frac of 0 in a subsequent
clip var

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4635>
2020-04-20 21:08:54 +00:00
Eric Engestrom
a24ab26ff7 pick-ui: auto-scroll the feedback window
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4650>
2020-04-20 22:11:00 +02:00
Dylan Baker
8b8a99ba56 bin/pick-ui: Add a new maintainer script for picking patches
In the long term the goal of this script is to nearly completely
automate the process of picking stable nominations, in a well tested
way.

In the short term the goal is to provide a better, faster UI to interact
with stable nominations.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3608>
2020-04-20 19:40:55 +00:00
Dylan Baker
0123b8f634 bin/gen_release_notes.py: Fix version detection for .0 release
The previous version is being calculated incorrectly, resulting in
20.0.0 deciding it's version is 19.3.x+1. This fixes that.

Fixes: 3226b12a09
       ("release: Add an update_release_calendar.py script")

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4070>
2020-04-20 19:21:15 +00:00
Rafael Antognolli
4abf0837cd anv: Add support for new MMAP_OFFSET ioctl.
v2: Update getparam check (Ken).

[jordan.l.justen@intel.com: use 0 offset for MMAP_OFFSET]

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
0d387da083 anv: Add anv_device parameter to anv_gem_munmap.
Also update all of its callers.

On the next commit, the device will be used by anv_gem_munmap to choose
whether we need to call the valgrind code or not, depending on which
type of mmap we are using.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
d1c1ead7cd iris/bufmgr: Add support for MMAP_OFFSET ioctl.
Use the new DRM_IOCTL_I915_GEM_MMAP_OFFSET ioctl when available.

[jordan.l.justen@intel.com: iris port]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

v2: Update getparam check (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
ae6f06c509 i965/bufmgr: Add support for MMAP_OFFSET ioctl.
Use the new DRM_IOCTL_I915_GEM_MMAP_OFFSET ioctl when available.

v2: update getparam check (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
5bc3f52dd8 iris/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
We want to add a new ioctl for mmap'ing buffers, so let's avoid
duplicating that code on both functions by extracting it from them
first.

[jordan.l.justen@intel.com: iris port]
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

v2: Rename helper function names (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:06 -07:00
Rafael Antognolli
a42d715784 i965/bufmgr: Factor out GEM_MMAP ioctl from mmap_cpu and mmap_wc.
We want to add a new ioctl for mmap'ing buffers, so let's avoid
duplicating that code on both functions by extracting it from them
first.

v2: Update helper function names (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:05 -07:00
Rafael Antognolli
16be8ff022 drm-uapi: Update headers from Linux 5.7-rc1.
commit 8f3d9f354286745c751374f5f1fcafee6b3f3136
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sun Apr 12 12:35:55 2020 -0700

    Linux 5.7-rc1

Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1675>
2020-04-20 10:59:05 -07:00
Caio Marcelo de Oliveira Filho
a1f6ae4744 spirv: Fix propagation of OpVariable access flags
After the decorations of a variable are evaluated, propagate the
access flag to the associated vtn_pointer.  This was done when
creating the pointer but at that point there was no access flags for
the variable.

Inline the pointer creation to make this point clearer, in isolation
the helper made the impression that the value was being propagated.

Issue found by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4620>
2020-04-20 16:46:06 +00:00
Caio Marcelo de Oliveira Filho
c76f2292b5 intel/fs,vec4: Properly account SENDs in IVB memory fence
Change brw_memory_fence to return the number of messages emitted, and
use that to update the send_count statistic in code generation.

This will fix the book-keeping for IVB since the memory fences will
result in two SEND messages.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4646>
2020-04-20 09:29:09 -07:00
Daniel Schürmann
c3c1f4d6bc aco: move src1 to vgpr instead of using VOP3 for VOP2 instructions during isel
Is simpler and helps a couple of shaders.
Totals from affected shaders: (Vega)
Code Size: 16341296 -> 16335460 (-0.04 %) bytes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4642>
2020-04-20 15:12:50 +00:00
Daniel Schürmann
be0bb7e101 aco: fix 64bit fsub
Fixes: 425558bfd5 ('aco: use v_subrev_f32 for fsub with an sgpr operand in src1')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4642>
2020-04-20 15:12:50 +00:00
Tomeu Vizoso
ad3ef6d0fc gitlab-ci: Test virgl driver
Add virglrenderer to the container and use the vtest transport to test
the Gallium driver. On the "host", llvmpipe is used.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4433>
2020-04-20 13:53:09 +00:00
Erik Faye-Lund
d6b7439619 meson: do not disable incremental linking for debug-builds
Meson specifies /EDITANDCONTINUE for MSVC projects when using the debug
build-type. This collides with our across-the-board disabling of
incremental linking.

It's clear that we don't want to do incremental linking for
release-builds; it increase the code-size, and adds some needless jumps
to be able to patch in new code. But for debug-builds this seems like a
good thing; we can now debug and on-the-fly recompile changes if we want
to.

This flag seems to have been simply forwarded from the SCons build
system, where it makes a bit more sense; SCons doesn't really integrate
with visual studio, so you can't properly debug with it. But Meson does,
so let's keep some bells-and-whistles here.

So let's avoid disabling incremental linking for debug-builds. For other
builds we still want to do this, because Meson only disables it
automatically for minsize-builds.

This avoids a boat-loads of warnings on the form:

warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/INCREMENTAL:NO' specification

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4572>
2020-04-20 12:25:42 +00:00
Erik Faye-Lund
ed29b24e23 gtest: Update to 1.10.0
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4576>
2020-04-20 11:57:11 +00:00
Samuel Pitoiset
59427b6d1d nir/opt_algebraic: lower 64-bit fmin3/fmax3/fmed3
This unconditionally lowers 64-bit fmin3/fmax3/fmed3 because
AMD hardware doesn't have native instructions, and no drivers
except RADV uses these instructions.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.*.f64.*
with ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4570>
2020-04-20 06:59:47 +00:00
Samuel Pitoiset
eed0ace466 nir/lower_int64: lower imin3/imax3/umin3/umax3/imed3/umed3
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.*.i64.*
with ACO because this backend compiler expects most of the 64-bit
operations to be lowered.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4570>
2020-04-20 06:59:47 +00:00
Pierre-Eric Pelloux-Prayer
17acff01a0 radeonsi: skip vs output optimizations for some outputs
If PT_SPRITE_TEX is enabled, PS inputs are overriden at runtime so
we can't apply the vs output optim.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2747
Fixes: 3ec9975555 ("radeonsi: eliminate trivial constant VS outputs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4559>
2020-04-20 08:45:16 +02:00
Timothy Arceri
839818332c nir/gcm: dont move movs unless we can replace them later with their src
This helps us avoid moving the movs outside if branches when there
src can't be scalarized.

For example it avoids:

   vec4 32 ssa_7 = tex ssa_6 (coord), 0 (texture), 0 (sampler),
   if ... {
      r0 = imov ssa_7.z
      r1 = imov ssa_7.y
      r2 = imov ssa_7.x
      r3 = imov ssa_7.w
      ...
   } else {
      ...
      if ... {
         r0 = imov ssa_7.x
         r1 = imov ssa_7.w
         ...
      else {
         r0 = imov ssa_7.z
         r1 = imov ssa_7.y
         ...
      }
      r2 = imov ssa_7.x
      r3 = imov ssa_7.w
   }
   ...
   vec4 32 ssa_36 = vec4 r0, r1, r2, r3

Becoming something like:

   vec4 32 ssa_7 = tex ssa_6 (coord), 0 (texture), 0 (sampler),
   r0 = imov ssa_7.z
   r1 = imov ssa_7.y
   r2 = imov ssa_7.x
   r3 = imov ssa_7.w

   if ... {
      ...
   } else {
      if ... {
         r0 = imov r2
         r1 = imov r3
         ...
      else {
         ...
      }
      ...
   }

While this is has a smaller instruction count it requires more work
for the same result. With more complex examples we can also end up
shuffling the registers around in a way that requires more registers
to use as temps so that we don't overwrite our original values along
the way.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Timothy Arceri
e4e5beee8a nir/gcm: be more conservative about moving instructions from loops
Here we only pull instructions further up control flow if they are
constant or texture instructions. See the code comment for more
information.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Timothy Arceri
bf4a6c99d2 nir/gcm: allow derivative dependent intrinisics to be moved earlier
We can't move them later as we could move them into non-uniform
control flow, but moving them earlier should be fine.

This helps avoid a bunch of spilling in unigine shaders due to
moving the tex instructions sources earlier (outside if branches)
but not the instruction itself.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
50a6dd0d65 nir/gcm: Prefer the instruction's original block
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
d4cf2df01a nir/gcm: Delete dead instructions
Classically, global code motion is also a dead code pass.  However, in
the initial implementation, the decision was made to place every
instruction and let conventional DCE clean up the dead ones.  Because
any uses of a dead instruction are unreachable, we have no late block
and the dead instructions are always scheduled early.  The problem is
that, because we place the dead instruction early, it  pushes the
placement of any dependencies of the dead instruction earlier than they
may need to be placed.  In order prevent dead instructions from
affecting the placement of live ones, we need to delete them.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
dca3f351e5 nir/gcm: Add a real concept of "progress"
Now that the GCM pass is more conservative and only moves instructions
to different blocks when it's advantageous to do so, we can have a
proper notion of what it means to make progress.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
5b1615fdb7 nir/gcm: Move block choosing into a helper function
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
1f60f1aa3d nir/gcm: Use an array for storing the early block
We are about to adjust our instruction block assignment algorithm and we
will want to know the current block that the instruction lives in.  In
order to allow for this, we can't overwrite nir_instr::block in the
early scheduling pass.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
6006a9e275 nir/gcm: Loop over blocks in pin_instructions
Now that we have the new block iterators, we can simplify things a bit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Jason Ekstrand
4d083b52c0 nir/dominance: Better handle unreachable blocks
v2: Fix minor comments (Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4636>
2020-04-20 03:46:29 +00:00
Daniel Schürmann
425558bfd5 aco: use v_subrev_f32 for fsub with an sgpr operand in src1
This fixes an accidentally introduced regression.

Fixes: 9be4be515f ('aco: implement 16-bit nir_op_fsub/nir_op_fadd')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4633>
2020-04-19 16:16:27 +00:00
Daniel Stone
adeef43d15 CI: Disable Lima jobs due to lab unhealthiness
The BayLibre LAVA host appears to be down.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4631>
2020-04-19 12:57:04 +01:00
Daniel Stone
e6c7bdc851 ci/windows: Make Chocolatey installs more reliable
Chocolatey installs depend on downloading binaries from SourceForge,
which is an unreliable host: container builds often fail because it
cannot pick up winflexbison.

Add a loop to retry chocolatey installs if any installs have failed, and
ensure Python is in the accessible PowerShell path rather than relying
on the path being externally refreshed.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4631>
2020-04-19 12:55:02 +01:00
Arcady Goldmints-Orlov
ec1b96fdc8 nir: Lower returns correctly inside nested loops
Inside nested flow control, nir_lower_returns inserts predicated breaks
in the outer block. However, it would omit doing this if the remainder
of the outer block (after the inner block) was empty. This is not
correct in the case of loops, as execution just wraps back around to the
start of the loop, so this change doesn't skip the predication inside
loops.

Fixes: 79dec93ead (nir: Add return lowering pass)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2724

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4603>
2020-04-19 02:54:08 +00:00
Jason Ekstrand
969aeb6a93 anv: Apply any needed PIPE_CONTROLs before emitting state
Push constants in particular can get picked up by the hardware at weird
times that happen *before* 3DPRIMITIVE.  Therefore, we need to flush
before we emit all our state to ensure that any data they may pick up is
in memory in time.  This fixes an app which does vkCmdCopyBuffers
immediately followed by a vkCmdBeginRenderPass and vkCmdDraw which uses
the destination of the copy as a UBO which we push.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4601>
2020-04-19 02:41:22 +00:00
Jason Ekstrand
ffc84eac0d anv: Move vb_emit setup closer to where it's used in flush_state
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4601>
2020-04-19 02:41:22 +00:00
Albert Astals Cid
06c5875fd6 Fix promotion of floats to doubles
Use the f variants of the math functions if the input parameter is a
float, saves converting from float to double and running the double
variant of the math function for gaining no precision at all

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3969>
2020-04-18 19:55:45 +00:00
Connor Abbott
94cb129d51 ir3/ra: Fix off-by-one issues with live-range extension
The intersects() function assumes that inside each instruction values
always die before they are defined, so that if the end of one range is
the same instruction as the beginning of the next then they don't
intersect. However, this isn't the case for values that become live at
the beginning of a basic block, which become live *before* the first
instruction, or instructions that die at the end of a basic block which
die after the last instruction.

For example, imagine that we have two values, A which is defined earlier
in the block and B which is defined in the last instruction of the block
and both die at the end of the basic block (e.g. are used in the next
iteration of a loop). We would compute a range for A of, say, (10, 20)
and for B of (20, 20) since each block's end_ip is the same as the ip of
the last instruction, and RA would consider them to not interfere.
There's a similar problem with values that become live at the beginning.

The fix is to offset the block's start_ip and end_ip by one so that they
don't correspond to any actual instruction. One way to think about this
is that we're adding fake instructions at the beginning and end of a
block where values become live & die. We could invert the order, so that
values consumed by each instruction are considered dead at the end of
the previous instruction, but then values that become dead at the
beginning of the basic block would incorrectly have an empty live range,
with a similar problem at the end of the basic block if we try to say
that values are defined at the beginning of the next instruction. So
the extra padding instructions are unavoidable.

This fixes an accidental infinite loop in the shader for
dEQP-VK.spirv_assembly.type.scalar.u32.switch_vert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4614>
2020-04-18 17:31:56 +00:00
Lionel Landwerlin
cdc4377591 util/sparse_free_list: manipulate node pointers using atomic primitives
Probably doesn't fix anything but those should be accessed in an
atomic way just like the head pointer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e4f01eca3b ("util: Add a free list structure for use with util_sparse_array")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4613>
2020-04-18 12:18:03 +00:00
Timothy Arceri
36d2a0eed6 glsl: only set stage ref when uniforms referenced in stage
This updates the NIR uniform linker to behave like the GLSL IR
linker and fixes a number of CTS tests once we enable the NIR
linker for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
6afd0954e1 glsl: pull mark_array_elements_referenced() out into common helper
We will reuse this helper in the NIR linker in the following
patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
5d992b539e glsl: fix block index in NIR uniform linker
We only want to set the index for the first block of an array. Also
add a comment about why we do not break here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
5dbebf4982 glsl: error check max user assignable uniform locations
This adds the error check to the NIR uniform linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
c7355c4fb9 glsl: fix explicit locations for the glsl linker
We already reserved explicit locations in the GLSL linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
5442712c6d Revert "glsl: fix resizing of the uniform remap table"
This reverts commit e0aa0a839f.

Instead we fix it correctly in the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
723edf859f glsl: tidy up uniform storage value count code in NIR linker
This makes the code cleaner and better reflects what the existing
glsl IR  linker does possibly fixing subtle bugs.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
3e2dbb6e70 glsl: fix struct offsets in the nir uniform linker
This change properly applies layouts to structs of uniforms in a
similar way to the GLSL IR linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Timothy Arceri
c19ebca308 nir: add matrix_layout to nir_variable data
This will be used by the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
2020-04-18 11:50:44 +00:00
Lionel Landwerlin
f27c707585 anv: skip writing perfcntr in results on Gen12+
We were not capturing the register already so don't bother writing the
delta in the results (we were previously doing a delta between two 0
values).

v2: Fix unused function warning

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
2020-04-18 13:32:27 +03:00
Lionel Landwerlin
086ea1ac7e intel/perf: Enable MDAPI queries for Gen12
We're missing the cases for gen12 leading to those metrics going
missing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 15b7b56eb2 ("intel/perf: add TGL support")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
2020-04-18 02:04:09 +03:00
Alyssa Rosenzweig
29fb5451a9 pan/bit: Add fp16 min/max tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
532dfebc71 pan/bit: Add constants test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
15fe8d5d7b pan/bit: Add fexp2_fast test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
20f255b18e pan/bit: Add fexp2_fast interp
Kind of a hack and not at all how the h/w does it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
8890fa4050 pan/bit: Add FMA_MSCALE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
b7dd5b579d pan/bit: _MSCALE interp
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
1e3960a725 pan/bit: Add BI_TABLE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
93fffd8a11 pan/bit: Add log2 helper interp
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
1c45b58ceb pan/bit: Add FMA_REDUCE test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
5546d1958b pan/bit: Add BI_REDUCE_FMA interp
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
68b4e708f1 pan/bit: Add frexp_log test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
36cfe722e5 pan/bit: Add FREXP interp support
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
c05860789a pan/bi: Lower special ops to 32-bit
We don't have 16-bit tables. We could probably do a bit better to avoid
so many conversions but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
4d0f941036 pan/bi: Round constants to 32-bit
We can only access lo/hi at 32-bit intervals.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
d30df466b5 pan/bi: Dump extra bits for disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
590d66fa0c pan/bi: Pack MAX.v2f16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
f87403c4c1 pan/bi: Pack ADD.v2f16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
7e76c2b806 pan/bi: Structify add and min/max fp16 ADD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
1647884cec pan/bi: Workaround constant packing errata
Incomplete fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d772bf0101 pan/bi: Try to reuse constants in ALU
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
aba7f09902 pan/bi: Handle st_vary with <4 components
Still no writemasks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
438e445e17 pan/bi: Fix vec2/3 handling
Otherwise we get moves from null.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
031ad0ecc2 pan/bi: Implement flog2
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
8e52206dbe pan/bi: Add fexp2 implementation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
b1d4d8f743 pan/bi: Fix lower_combine swizzle rewrite
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
60f252708f pan/bi: Fix packing with low-nibble-set on hi constant
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
10fb5fb460 pan/bi: Fix packing with multiple constants
Need to use bottom nibble of the 64, not the half.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
86c2a6b9fe pan/bi: Fix bi_get_immediate with multiple imms
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
df69304ac8 pan/bi: Ensure CONSTANT srcs have types
So the next commit is valid.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
8f70f4432c pan/bi: Split src/dest index printing
So we can handle constant printing correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
db5c1ae8fd pan/bi: Add fexp2_fast packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
c3eebfeb11 pan/bi: Pack FMA_MSCALE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
0cb703984e pan/bi: Structify FMA_MSCALE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
4570c34fc7 pan/bi: Add _MSCALE flag for FMA/ADD
So we can bias by exponents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d3643cdd81 pan/bi: Add log2_help packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
6039d51e32 pan/bi: Pack ADD_FREXPM
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
ffa9f6a789 pan/bi: Add bi_pack_fma_2src helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
9904ed170a pan/bi: Add frexp_log packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
e067fd7b00 pan/bi: Add log_frexpe op to IR
As part of BI_FREXP

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
40befaa965 pan/bi: Add FLOG2_U op to disassembler
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
62c8c3445e pan/bi: Add op for ADD_FREXPM
Used in log2. Needs a new class as well due to scheduling silliness.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
cc61156626 pan/bi: Add special op for exp2
Needs some extra help but basically exp2_fast

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
af01378dce pan/bi: Add BI_TABLE for fast table accesses
Used to implement SPECIAL ops. Separate class since they are faster
which means you can pair them with actual work on FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
83d961b0c2 pan/bi: Disable FMA scheduling for CONVERT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
86c0ea383d pan/bi: Add disasm for ADD.i8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
2020-04-17 16:25:34 -04:00
Jason Ekstrand
f5deed138a spirv,nir: Move the SPIR-V vector insert code to NIR
This also makes spirv_to_nir a bit simpler because the new
nir_vector_insert helper automatically handles a constant component
selector like nir_vector_extract does.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
feca439697 spirv: Call nir_builder directly for vector_extract
The nir_builder helper already handles checking if the component
selector is an immediate and returns an undef in the OOB case.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
acaccff4d3 nir/builder: Handle any bit-size selector in nir_extract
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
4b160c6776 spirv: Error if OpCompositeInsert/Extract has OOB indices
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
c478f8ad6c spirv,nir: Add a better vector_insert
The old one in spirv_to_nir was besel'ing the whole vector for every
component.  If we think about this as a vector operation, we can do it
way more efficiently.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
Jason Ekstrand
380bf556bf spirv: Handle OOB vector extract operations
We use vtn_vector_extract to handle vector component level derefs.  This
makes us gracefully handle the case where your vector component is OOB
and give you an undef.  The SPIR-V working group is still working out
whether or not this is technically legal but it's very little code for
us to handle it so we may as well.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
2020-04-17 19:21:44 +00:00
D Scott Phillips
dc3a17997b util/sparse_array: don't stomp head's counter on pop operations
By temporarily storing the new_head by a uint32_t, we wipe out the
counter section of the head pointer.

Fixes: e4f01eca ("util: Add a free list structure for use with util_sparse_array")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4612>
2020-04-17 18:41:40 +00:00
Danylo Piliaiev
d684fb37bf st/mesa: Update shader info of ffvp/ARB_vp after translation to NIR
We must update stp->Base.info after translation and before
st_prepare_vertex_program is called, because inputs_read
may become outdated after NIR optimization passes.

For ffvp/ARB_vp inputs_read is populated based on declared
attributes without taking their usage into consideration.
When creating shader variants we expect that their inputs_read
would match the base ones for input mapping to work properly.

Cc: <mesa-stable@lists.freedesktop.org>
Fixes: 8a0dd0af3f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2758
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4598>
2020-04-17 20:16:15 +03:00
Samuel Pitoiset
c4ca9e66dd aco: fix exporting the viewport index if the fragment shader needs it
It's like the layer, it has to be exported via the pos and also
as a varying if the fragment shader reads it.

Fixes dEQP-VK.draw.shader_viewport_index.fragment_shader_*

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4564>
2020-04-17 16:23:24 +00:00
Samuel Pitoiset
b424d49ac0 radv/llvm: fix exporting the viewport index if the fragment shader needs it
It's like the layer, it has to be exported via the pos and also
as a varying if the fragment shader reads it.

Fixes dEQP-VK.draw.shader_viewport_index.fragment_shader_*

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4564>
2020-04-17 16:23:24 +00:00
Samuel Pitoiset
19aa68ae31 radv: set missing SHARED_VGPR_CNT for NGG VS and ACO
shuffle is implemented with shared VGPRs with ACO and Wave64.

Fixes dEQP-VK.subgroups.shuffle.framebuffer.subgroupshuffle*_vertex
with Wave64.

Fixes: c24d9522da ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4595>
2020-04-17 16:11:17 +00:00
Samuel Pitoiset
fd6e44236c radv: fix geometry shader primitives query with ACO on GFX10
Fixes
dEQP-VK.query_pool.statistics_query.*.geometry_shader_primitives.*.

Fixes: c24d9522da ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4593>
2020-04-17 17:39:16 +02:00
Ian Romanick
f7d620f47d intel/compiler: Fixup operands in fs_builder::emit() that takes array
The versions that take a specific number of operands will do various
fixups depending on the platform and the opcode.  However, the version
that takes an array of sources did not.  This makes all version operate
similarly.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:47 -07:00
Ian Romanick
39ad0c2af8 intel/compiler: CSEL can do saturate
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:46 -07:00
Ian Romanick
5afaa407c1 intel/compiler: Only GE and L modifiers are commutative for SEL
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:43 -07:00
Ian Romanick
a80e44902f intel/compiler: Silence unused parameter warning in update_inst_scoreboard
src/intel/compiler/brw_fs_scoreboard.cpp: In function ‘void {anonymous}::update_inst_scoreboard(const fs_visitor*, const ordered_address*, const fs_inst*, unsigned int, {anonymous}::scoreboard&)’:
src/intel/compiler/brw_fs_scoreboard.cpp:793:45: warning: unused parameter ‘shader’ [-Wunused-parameter]
  793 |    update_inst_scoreboard(const fs_visitor *shader, const ordered_address *jps,
      |                           ~~~~~~~~~~~~~~~~~~^~~~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:42 -07:00
Ian Romanick
c836295dfd intel/compiler: Silence unused parameter warning in fs_live_variables::setup_one_read
src/intel/compiler/brw_fs_live_variables.cpp: In member function ‘void brw::fs_live_variables::setup_one_read(brw::fs_live_variables::block_data*, fs_inst*, int, const fs_reg&)’:
src/intel/compiler/brw_fs_live_variables.cpp:56:67: warning: unused parameter ‘inst’ [-Wunused-parameter]
   56 | fs_live_variables::setup_one_read(struct block_data *bd, fs_inst *inst,
      |                                                          ~~~~~~~~~^~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:40 -07:00
Ian Romanick
62f70a353f intel/compiler: Silence unused parameter warnings in vec4_tcs_visitor
In file included from src/intel/compiler/brw_vec4_tcs.cpp:31:
src/intel/compiler/brw_vec4_tcs.h: In member function ‘virtual void brw::vec4_tcs_visitor::emit_urb_write_header(int)’:
src/intel/compiler/brw_vec4_tcs.h:74:43: warning: unused parameter ‘mrf’ [-Wunused-parameter]
   74 |    virtual void emit_urb_write_header(int mrf) {}
      |                                       ~~~~^~~
src/intel/compiler/brw_vec4_tcs.h: In member function ‘virtual brw::vec4_instruction* brw::vec4_tcs_visitor::emit_urb_write_opcode(bool)’:
src/intel/compiler/brw_vec4_tcs.h:75:57: warning: unused parameter ‘complete’ [-Wunused-parameter]
   75 |    virtual vec4_instruction *emit_urb_write_opcode(bool complete) { return NULL; }
      |                                                    ~~~~~^~~~~~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
2020-04-17 08:21:37 -07:00
Jason Ekstrand
030e5ceac4 intel/blorp: Delete an unused enum
This was lying around from back when BLORP write to fs_visitor directly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4606>
2020-04-17 15:01:10 +00:00
Jason Ekstrand
d0d039a4d3 anv: Emit pushed UBO bounds checking code in the back-end compiler
This commit fixes performance regressions introduced by e03f965280
in which we started bounds checking our push constants.  This added a
LOT of shader code to shaders which use the robustBufferAccess feature
and led to substantial spilling.  The checking we just added to the FS
back-end is far more efficient for two reasons:

 1. It can be done at a whole register granularity rather than per-
    scalar and so we emit one SIMD8 SEL per 32B GRF rather than one
    SIMD16 SEL (executed as two SELs) for each component loaded.

 2. Because we do it with NoMask instructions, we can do it on whole
    pushed GRFs without splatting them out to SIMD8 or SIME16 values.
    This means that robust buffer access no longer explodes our register
    pressure for no good reason.

As a tiny side-benefit, we're now using can use AND instead of SEL which
means no need for the flag and better scheduling.

Vulkan pipeline database results on ICL:

    Instructions in all programs: 293586059 -> 238009118 (-18.9%)
    SENDs in all programs: 13568515 -> 13568515 (+0.0%)
    Loops in all programs: 149720 -> 149720 (+0.0%)
    Cycles in all programs: 88499234498 -> 84348917496 (-4.7%)
    Spills in all programs: 1229018 -> 184339 (-85.0%)
    Fills in all programs: 1348397 -> 246061 (-81.8%)

This also improves the performance of a few apps:

 - Shadow of the Tomb Raider: +4%
 - Witcher 3: +3.5%
 - UE4 Shooter demo: +2%

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4447>
2020-04-17 14:48:06 +00:00
Jason Ekstrand
eb5a10ff63 intel/cfg: Add first/last_block helpers
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4447>
2020-04-17 14:48:06 +00:00
Connor Abbott
64e3b8d66b tu: Use tu_cs_add_entries() with non-render-pass secondaries
Even though vkCmdRenderPassBegin() isn't allowed inside a secondary
command buffer, vkCmdDispatch() is, and we emit an IB with compute
dispatches, which means that if the secondary command buffer records a
vkCmdDispatch() then we'll have an IB inside an IB, which is illegal.
Fixes hangs in e.g.
dEQP-VK.api.command_buffers.record_simul_use_secondary_one_primary.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4605>
2020-04-17 14:11:07 +00:00
Ilia Mirkin
ac0b8d58b9 mesa: add interaction between compute derivatives and variable local sizes
This is an added interaction in NV_compute_shader_derivatives added in
Sep 2019.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4583>
2020-04-17 13:51:11 +00:00
Karol Herbst
8c949b2aa6 st/mesa: properly guard fallback_copy_texsubimage aginst failed maps
Fixes random crashes in some packed_pixel GLES CTS tests

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4592>
2020-04-17 11:50:21 +00:00
Pierre-Eric Pelloux-Prayer
8521acd660 radeonsi: don't assume ctx is always a threaded_context
Fixes: dcb1e8fef8 ("radeonsi: use thread_context::bytes_mapped_limit")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4587>
2020-04-17 11:36:20 +02:00
Daniel Stone
791134658e Revert "CI: Disable Windows/VS2019 builds"
DNS is now fixed.

This reverts commit 460b8b1758d953b2b820443615d73ccdb1455b5e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4591>
2020-04-16 22:40:24 +00:00
Ilia Mirkin
2f009c4b49 docs: update for recently-added nvc0 features
Also sort while we're at it.

And add NV_pixel_buffer_object.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4599>
2020-04-16 15:58:37 -04:00
Ilia Mirkin
6ae214ac2e nv50,nvc0: update with latest caps
One notable change is that DRAW_INFO_START_WITH_USER_INDICES is enabled.
An audit of the code indicates that it should work, and a number of
piglit tests exercising glMultiDrawElements continue to function.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4520>
2020-04-16 18:19:27 +00:00
Jason Ekstrand
029471c3c4 intel/batch_decoder: Stop printing to stdout
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Jason Ekstrand
b8acf9a3d4 anv: Report correct SLM size
Fixes: d787a2d0 "anv: Implement VK_KHR_pipeline_executable_properties"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Jason Ekstrand
e003104605 intel: Add _const versions of prog_data cast helpers
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
2020-04-16 17:26:16 +00:00
Jason Ekstrand
9b17d7caac nir: Add some sanity assertions in opt_large_constants
We make some assumptions in opt_large_constants such as the size_align
function returning the obvious sizes for vectors.  Now that we've got
the deref_size lying around, we may as well assert it's consistent with
our assumptions.  In particular, we now assert that it really claims
booleans are 32-bit.  If anyone's driver ever decides to be clever and
change this, we'll now catch the breakage earlier.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4468>
2020-04-16 17:00:13 +00:00
Jason Ekstrand
33eb43349e nir: Add an alignment to nir_intrinsic_load_constant
In f1883cc73d we tried to pass through alignments from load_constant
intrinsics when rewriting them to load_ubo in iris.  However, those
intrinsics don't have ALIGN_MUL or ALIGN_OFFSET indices.  It's easy
enough to add them.  We just call the size/align function on the vector
type at the end of our deref chain and use the alignment returned from
there.  It's possible we could do better by walking the whole deref
chain but this should be good enough.

Fixes: f1883cc73d "iris: Set alignments on cbuf0 and constant reads"
Closes: #2739
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4468>
2020-04-16 17:00:13 +00:00
Jan Vesely
8cbeb13704 clover: Check if the detected clang libraries are usable
clang-cpp.so is broken in LLVM-9 and doesn't exist in LLVM<9,
however meson will find and try to use system libraries in these cases.

v2: Use helper variable to dedpulicate test code
    Move second test inside the condition to avoid testing good clang-cpp twice
v3: Check for cross compilation
v4: style fixes

Fixes: ff1a3a00cb
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4457>
2020-04-16 16:29:44 +00:00
Rhys Perry
839c886b34 aco: add missing scc clobber to nir_op_unpack_32_2x16_split_y
The ISA doc is inconsistent whether this instruction writes SCC. It does.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4552>
2020-04-16 17:04:53 +01:00
Rhys Perry
ac74367bef aco: implement various 8/16-bit conversions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4552>
2020-04-16 17:04:45 +01:00
Rafael Antognolli
0443a4a0af iris: Enable EXT_depth_bounds_test extension.
It was implemented in 1df871f8ff, but to
really enable it we need to enable PIPE_CAP_DEPTH_BOUNDS_TEST.

v2: Add release notes (Ian).

Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4540>
2020-04-16 15:28:59 +00:00
Erik Faye-Lund
daeff19608 meson: tell flex that we support c99
flexint.h uses stdint.h if the compiler claims to support C99. MSVC
doesn't support enough of C99 to enable this flag, but it supports
enough to keep flex happy.

Without this, we end up with *both* some flex-specific definitions as
well as our own definitions from mesa-headers, producing a slew of
compiler warnings.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
0752648a99 vbo: avoid including wingdi.h on win32
On Windows, main/glheader.h ends up including windows.h which in turn
includes wingdi.h unless the NOGDI macro is defined. And wingdi.h
defines a macro called "ERROR", which we end up redefining below.

To avoid a warning on the redefinition, we can define NOGDI to prevent
wingdi.h from implicitly being included.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
b55b033f76 mesa: fixup cast expression
This cast-expression was meant to cast the result of the terniary
expression, but it just casted the condition expression instead. Let's
correct this, to silence a compiler-warning.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
c55fc35435 util/tests: initialize variable
This just silences a compiler-warning about a potentially uninitialized
variable. It's not uninitialized, but it's a bit hard for the compiler
to see. So let's just initialize it to zero.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
522bb08131 wgl: silence some cast-warnings
These casts cause warnings on x64. We're passing integers through
pointers, which works fine.

So let's make the casts a bit more explicit, to silence that warning.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Erik Faye-Lund
e9ad8af6f3 meson: use override_options to change warning-level
This pevents MSVC from complaining about multiple warning-levels on the
command-line.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4577>
2020-04-16 14:48:40 +00:00
Jonathan Marek
2437808671 turnip: image_view rework
Instead of exposing various layout functions, move image-related logic
into tu_image.c and have the image_view pre-fill relevant register values.

This changes the clear/blit code to use image_view.

This will make it much easier to deal with aspect masks, in particular for
planar formats and D32_S8.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4581>
2020-04-16 14:04:18 +00:00
Jonathan Marek
300d0e2b80 turnip: don't limit framebuffer size to image size
Minor cleanup, I couldn't find anything that suggests this should be done,
and anv doesn't do it either.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4581>
2020-04-16 14:04:18 +00:00
Jonathan Marek
b6455e9a6a turnip: compute render_components/srgb_cntl at renderpass creation time
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4581>
2020-04-16 14:04:18 +00:00
Bas Nieuwenhuizen
d80fb02430 winsys/amdgpu: Retrieve WC flags from imported buffers.
Otherwise reading from an imported mapped GTT+WC linear texture
is painfully slow.

Sadly no radeon winsys implementation, as I don't know a suitable
kernel driver operation.

Hit this  in vaGetImage with an image imported from minigbm (which
we are switching to allocate WC for SCANOUT images).

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4542>
2020-04-16 13:51:28 +00:00
Marek Olšák
80797edd71 st/mesa: fix a crash due to passing a draw vertex shader into the driver
Fixes: bc99b22a30
Closes: #2754

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4527>
2020-04-16 13:31:46 +00:00
Daniel Stone
7a794b1de4 CI: Disable Windows/VS2019 builds
An update seems to have poisoned gitlab-runner, and it can no longer
resolve DNS even though the host system can.

Disable this until we can figure out what's going on.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4589>
2020-04-16 14:03:49 +01:00
Daniel Stone
9ecd9463de meson: Make shared-llvm into a tri-state boolean
Choosing LLVM's link mode is legitimate on UNIX systems, but only static
actually really works under Windows.

Give shared-llvm a default 'auto' mode which will pick the previous
default of true (shared) on UNIX systems, but newly defaulting to false
(static) on Windows.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Suggested-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4555>
2020-04-16 12:18:36 +00:00
Connor Abbott
0c05d46237 tu: Align GMEM resolve blit scissor
Even though we normally use the CP_BLIT path with resolves that aren't
aligned, there's a special case when we're resolving the entire image
and there's enough padding so that we can still use CP_EVENT_WRITE::BLIT
when the render area isn't aligned. The hardware seems to not like
unaligned scissors when not clearing, and sometimes hangs rather than
silently round the scissor. This causes hangs in e.g.
dEQP-VK.glsl.derivate.dfdx.texture.msaa4.float_highp.

There was some concern that the CP_BLIT path might use this scissor
also, but I confirmed that this isn't the case by setting it to 0 before
resolving and then noting that CP_BLIT still works (but CP_EVENT_WRITE
doesn't). Furthermore, this is actually impossible because of how the 2D
engine is set up: it gets its own pair of register banks, which can be
switched independently of the 3D register banks, so that 2D events
(CP_BLIT) normally aren't synchronized relative to 3D events
(CP_EVENT_WRITE, CP_DRAW_*, and CP_EXEC_CS) and therefore they can't
share any registers except for non-pipelined registers like RB_CCU_CNTL
that don't use the register bank mechanism at all.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4585>
2020-04-16 12:00:22 +00:00
Erik Faye-Lund
d2e172c03f .mailmap: add an alias for Zhongmin Wu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
eafacdc0fa .mailmap: add alias for Zhaowei Yuan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
56222c13cf .mailmap: add an alias for Yaakov Selkowitz
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
8be72b4c79 .mailmap: add an alias for Xavier Bouchoux
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
a96e1a2d9f .mailmap: specify spelling for Wladimir J. van der Laan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
f9e1e5857d .mailmap: specify spelling for Vivek Kasireddy
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
47d17238dd .mailmap: add an alias for Varad Gautam
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
55f883b8ea .mailmap: add an alias for Vadym Shovkoplias
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
d8982ce84c .mailmap: add an alias for Topi Pohjolainen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
0399b4f298 .mailmap: add an alias for Tomasz Figa
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
049ce5f417 .mailmap: add an alias for Tom Stellard
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
05b2a4471c .mailmap: add an alias for Tim Wiederhake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
e430136cc9 .mailmap: add a couple of aliases for Timothy Arceri
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
34ab507c1f .mailmap: add an alias for Timo Aaltonen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:15 +00:00
Erik Faye-Lund
cb177e054a .mailmap: add an alias for Thierry Reding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
032a603e3c .mailmap: add a couple of aliases for Suresh Guttula
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
6d1fe4a687 .mailmap: add a couple of aliases for Steinar H. Gunderson
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5ee82189f2 .mailmap: specify spelling for Sonny Jiang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
d3f36056fa .mailmap: add an alias for Sergii Romantsov
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
00d9496a12 .mailmap: add an alias for Samuel Li
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
9a5bd1512a .mailmap: add an alias for Rodrigo Vivi
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
c6fcca4bd8 .mailmap: add an alias for Rob Clark
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
b7c1f150c9 .mailmap: add an alias for Renato Caldas
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3dac186704 .mailmap: specify spelling for Randy Xu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
9e904253e4 .mailmap: add an alias for Qiang Yu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3ba1d912a0 .mailmap: add an alias for Plamena Manolova
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
b42a25320e .mailmap: update aliases for Pierre-Eric Pelloux-Prayer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3ffa511d60 .mailmap: add an alias for Philipp Zabel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
2b82c50e79 .mailmap: update aliases for Nicolai Hähnle
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
f40c48c0c4 .mailmap: add an alias for Nicholas Bishop
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
004c69fbfa .mailmap: specify spelling for Nian Wu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3ce0e25a98 .mailmap: add an alias for Neil Roberts
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
1ac6946ded .mailmap: add an alias for Neha Bhende
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
a9ed1085ab .mailmap: add alias for Matthias Groß
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3223198b4d .mailmap: update aliases for Marc-André Lureau
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
79bb330904 .mailmap: specify spelling for Liviu Prodea
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
25dcbcbb5b .mailmap: add an alias for Lionel Landwerlin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
2e53e65e23 .mailmap: add a few aliases for Kristian Høgsberg
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
69489e48bc .mailmap: add a few aliases for Kevin Rogovin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ab4c32a50e .mailmap: add a few aliases for Karol Herbst
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
92e4597544 .mailmap: add an alias for Julien Isorce
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ec001fd323 .mailmap: clean up aliases for Jeremy Huddleston
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
f131469d14 .mailmap: add an alias for Jan Beich
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
d8cb7efd30 .mailmap: specify spelling for James Zhu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
16ed147cab .mailmap: add an alias for Illia Iorin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
b7f912f11a .mailmap: add an alias for Igor Gnatenko
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ebaa8765fe .mailmap: specify spelling for Henri Verbeet
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
eb96435aaf .mailmap: specify spelling for Heinrich Fink
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
02b2dc22d3 .mailmap: add an alias for Harish Krupo
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
3c86bc03b3 .mailmap: add an alias for Haihao Xiang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5ea2e1044e .mailmap: specify spelling for Gurchetan Singh
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
194c9f9982 .mailmap: specify spelling for Francesco Ansanelli
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
edb4e21e26 .mailmap: add an alias for Erik Faye-Lund
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
c11e1d4408 .mailmap: add an alias for Emmanuel Gil Peyrot
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
8efee3cea3 .mailmap: add a couple of aliases for Dylan Noblesmith
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
ee068df4f5 .mailmap: add an alias for Dylan Baker
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
e7699f92e9 .mailmap: add an alias for Dave Airlie
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
4e793b7b4b .mailmap: add an alias for Danylo Piliaiev
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
aa6ad898ba .mailmap: add an alias for Daniel Schürmann
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
e8764917c4 .mailmap: add an alias for Craig Stout
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
7f4d26b3cd .mailmap: specify spelling for Constantine Kharlamov
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5437ccda31 .mailmap: add an alias for Colin McDonald
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
a07c11b0fe .mailmap: add a few aliases for Christoph Haag
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
0d6af7f9b1 .mailmap: add an alias for Christian Inci
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
832d1f913e .mailmap: add an alias for Christian Gmeiner
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
9278ea2920 .mailmap: add alias for Chenglei Ren
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
43bdff8a5c .mailmap: add a couple of aliases for Chandu Babu Namburu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
d89e963133 .mailmap: add an alias for Chad Versace
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
a3a2c49e13 .mailmap: update aliases for Carl-Philip Hänsch
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
88eb6b7d58 .mailmap: add an alias for Bruce Cherniak
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
da8a309882 .mailmap: add an alias for Boris Brezillon
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
0efc82183d .mailmap: add an alias for Axel Davy
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
84a9fe7766 .mailmap: add an alias for Anuj Phogat
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
5cf8dc7f54 .mailmap: add an alias for Andrii Simiklit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
174e97e969 .mailmap: add an alias for Alyssa Rosenzweig
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Erik Faye-Lund
12ec5b94ea .mailmap: add an alias for Alan Swanson
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1999>
2020-04-16 11:46:14 +00:00
Tapani Pälli
a934c8e7ed mesa/st: initialize all winsys_handle fields for memory objects
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reported-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4547>
2020-04-16 11:25:29 +00:00
Michel Dänzer
e3e704c7e7 amd/addrlib: Use enum instead of sparse chars to identify dimensions
The enum values can be used directly as indices into arrays, simplifying
the code.

This significantly cuts down the number of CPU cycles spent inside

* Addr::V2::Gfx9Lib::HwlComputeDccAddrFromCoord:

+------------------------------------------------------------------------+
|+         +++    +                                                x x xx|
|    |_____AM____|                                                 |_A__||
+------------------------------------------------------------------------+
    N           Min           Max        Median           Avg        Stddev
x   5         14.89         15.44         15.14        15.156    0.24704251
+   5          8.26          9.96          9.37         9.282     0.6262747
Difference at 95.0% confidence
	-5.874 +/- 0.694294
	-38.7569% +/- 4.58098%
	(Student's t, pooled s = 0.476051)

* Addr::V2::CoordEq::solve:

+------------------------------------------------------------------------+
| +                                                                x     |
| + +   +   +                                       x           x  x    x|
||__MA____|                                              |______A__M____||
+------------------------------------------------------------------------+
    N           Min           Max        Median           Avg        Stddev
x   5          8.11          9.59          9.21          9.02    0.55605755
+   5          4.28          5.05          4.48         4.564    0.32867917
Difference at 95.0% confidence
	-4.456 +/- 0.666135
	-49.4013% +/- 7.38509%
	(Student's t, pooled s = 0.456744)

(The measured numbers are the percentages of samples inside the
respective function and its calles for
`perf record --call-graph=fp kitty -e false`, measured on a Lenovo
Thinkpad E595 (Picasso))

v2:
* Add missed 'coords[dim] |= bit << ord;' (Pierre-Eric Pelloux-Prayer)
* Put 'ADDR_ASSERT(dim < DIM_S);' where the code previous had
  'ADDR_ASSERT_ALWAYS()' for the s/m dimensions.
* Use 1u for BitsValid (since it's 32-bit unsigned values).
* Use parens in 'BitsValid[dim] & (1u << ord)' for clarity.

Acked-by: Marek Olšák <marek.olsak@amd.com> # v1
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4523>
2020-04-16 11:10:52 +00:00
Michel Dänzer
e58509cdec gbm/dri: Propagate queryDmaBufModifiers return value
We were treating count == 0 as the format not being supported at all,
but queryDmaBufModifiers would return false in that case.

Fixes spuriously reporting all formats as unsupported with radeonsi
(which doesn't support modifiers yet), which would e.g. cause mutter
to think the HW cursor format isn't supported and fall back to SW
cursor.

Suggested-by: Daniel Stone <daniels@collabora.com>
Fixes: 4e3a7dcf6e "gallium: enable
                     EGL_EXT_image_dma_buf_import_modifiers
                     unconditionally"

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4532>
2020-04-16 10:19:35 +00:00
Erik Faye-Lund
b5b25ee032 zink: be less picky about tiled resources
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2678>
2020-04-16 09:57:25 +00:00
Erik Faye-Lund
040a2643c0 st/dri: make sure software color-buffers are linear
Otherwise, we might end up with a tiling-capable driver creating a
tiled resource here instead of linear. This is currently possible with
Zink, although we currently force all display-targets to be linear.

But that doesn't seem like a good idea in the long run, so let's loosen
this restriction.

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2678>
2020-04-16 09:57:25 +00:00
Lepton Wu
1c4f68b089 virgl: Use ETC2 formats directly when possible.
Don't emulate them with uncompressed formats if the host
support them since uncompressed formats like GL_R16 could
be not available on GLES hosts.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-04-16 09:21:21 +00:00
Pierre-Eric Pelloux-Prayer
dcb1e8fef8 radeonsi: use thread_context::bytes_mapped_limit
Limit the amount of "in-flight" mapping to 1/4 of the total RAM.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2735
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4508>
2020-04-16 08:36:04 +00:00
Pierre-Eric Pelloux-Prayer
15cf7d170b gallium/u_threaded: flush batch when hitting mapping limit
tc_transfer_map maps buffers directly, but the unmap operation is executed
in the driver thread.
When an application does a lot of map/unmap operations, without flushing,
this increase the RAM used (and eventually get the app killed by the oom-killer).

This commit allows tc to keep track of how many bytes were mapped during
the current batch. When this estimation becomes higher than a threshold,
we flush the batch.

See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2735
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4508>
2020-04-16 08:36:04 +00:00
Samuel Pitoiset
35b3963928 radv: do not abort with unknown/unimplemented descriptor types
To workaround a crash with Wolfeinstein Younglood because the
games creates one descriptor with
VK_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE_NV...

I reported the problem to Machine Games, but still no answer, so
let's remove the unreachable calls (which are technically not
unreachable for buggy apps) to help gamers.

Note that AMDVLK and AMDGPU-PRO don't crash because they ignore
unsupported descriptor types.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4571>
2020-04-16 08:14:56 +00:00
Samuel Pitoiset
11faaf646d aco: fix emitting stream output with tess eval shaders
Fixes dEQP-VK.transform_feedback.simple.winding_patch_list_12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4553>
2020-04-16 07:57:39 +00:00
Samuel Pitoiset
91aa596ca7 aco: implement nir_op_f2i8/nir_op_f2u8
I think we should really refactor the conversions path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4551>
2020-04-16 08:47:49 +02:00
Ilia Mirkin
04a7ec7c8a nvc0: enable GL_NV_viewport_array2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-By: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:21:18 -04:00
Ilia Mirkin
cd092bf937 st/mesa: add support for GL_NV_viewport_array2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:48 -04:00
Ilia Mirkin
b0d0a3c916 gallium: add PIPE_CAP_VIEWPORT_MASK
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:48 -04:00
Ilia Mirkin
8f191e0c37 gallium: add TGSI_PROPERTY_LAYER_VIEWPORT_RELATIVE
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
17308c1014 gallium: add TGSI_SEMANTIC_VIEWPORT_MASK
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
2d4787d77e mesa: add NV_viewport_array2 enable, attach to glsl
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
cc6661bfc8 glsl: add NV_viewport_array2 support
This enables gl_Layer/gl_ViewportIndex when the ext is enabled, as well
as adding the new gl_ViewportMask[] array and viewport_relative layout
qualifier for gl_Layer.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Ilia Mirkin
54424a3d13 compiler: add VARYING_SLOT_VIEWPORT_MASK
See GL_NV_viewport_array2::gl_ViewportMask for how this is supposed
to work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4529>
2020-04-15 20:12:00 -04:00
Connor Abbott
3a9e66277a ir3: Handle load_ubo_ir3 when promoting to constants
This restores support for promoting UBO loads to constant loads when
using LDC.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4568>
2020-04-15 22:38:20 +00:00
Connor Abbott
abcfb64370 ir3: Fix LDC offset units
I had missed that LDC actually uses vec4 units for its offset. This
means that we have to create a new instruction, and lower it in
ir3_nir_lower_io_offsets, similar to the existing SSBO instructions.
Unfortunately we can't assume that loads are always vec4-aligned, so we
have to use the alignment information that NIR gives us. Unfortunately,
it's currently woefully inadequate, and will have to be fixed to give us
good codegen in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4568>
2020-04-15 22:38:20 +00:00
Karol Herbst
2d489f76f4 Revert "nvc0: fix line width on GM20x+"
This reverts commit a0e57432b7.

It's unclear what caused the test to fail back then. Now it's seems to be
reversed. I tested with a close enough piglit and mesa branch and wasn't
able to reproduce the same test result I've got in some older piglit runs.

Fixes:
dEQP-GLES2.functional.rasterization.primitives.lines_wide
dEQP-GLES2.functional.rasterization.primitives.line_strip_wide
dEQP-GLES2.functional.rasterization.primitives.line_loop_wide
dEQP-GLES2.functional.rasterization.limits.points
dEQP-GLES2.functional.clipping.line.wide_line_z_clip
dEQP-GLES2.functional.clipping.line.wide_line_z_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_z_clip_viewport_corner
dEQP-GLES2.functional.clipping.line.wide_line_clip
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES2.functional.clipping.line.wide_line_attrib_clip
dEQP-GLES2.functional.polygon_offset.default_result_depth_clamp
dEQP-GLES2.functional.polygon_offset.default_factor_1_slope
dEQP-GLES2.functional.polygon_offset.fixed16_result_depth_clamp
dEQP-GLES2.functional.polygon_offset.fixed16_factor_1_slope

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4575>
2020-04-15 22:03:46 +00:00
Jason Ekstrand
26a1adce5b anv: Fix UBO range detection in anv_nir_compute_push_layout
This fixes two bugs:  First, if the same block index showed up twice, we
only pick the first one.  Second, we weren't multiplying by 32.  This
didn't show up in tests because RBA testing is garbage.  Found while
looking at shaders from the UE4 Shooter demo.

Fixes: e03f9652 "anv: Bounds-check pushed UBOs when..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4578>
2020-04-15 21:51:55 +00:00
Jason Ekstrand
b2e4157143 anv: Advertise SEND count through VK_EXT_pipeline_executable_properties
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4578>
2020-04-15 21:51:55 +00:00
Paulo Zanoni
2c82b13c8f iris: make BATCH_SZ smaller by BATCH_RESERVED bytes
Iris allocates gem buffers using buckets of allocation sizes that are
page aligned. We always ask for batch buffers of size BATCH_SZ +
BATCH_RESERVED, which is not page aligned: we ask for 65552 bytes,
which ends up in the bucket of size 81920, resulting in 20% unused
space. Adjust things so there is no waste of space: BATCH_SZ +
BATCH_RESERVED is now 65536.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Paulo Zanoni
103cb32c79 iris: remove useless bo->gtt_offset assignment
We assign a real value a few lines below, and none of the lines in
between rely on the zeroed bo->gtt_offset value.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Paulo Zanoni
c586cb23e0 iris: remove unnecessary forward declaration
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Paulo Zanoni
f3f5016c0b iris: remove hole from struct iris_bo
This decreases the size of the struct on a 64bit machine from 144 to
136. While that's not a lot, this is one of the structs that we're
allocating all the time.

For a full Aztec run on BDW we allocate this struct 3273 times, and we
can have up to 3259 of them live at the same time. So we end up saving
just a little over 6 pages for this benchmark.

Spotted this while trying to add another bool for an unrelated
feature.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4561>
2020-04-15 21:35:14 +00:00
Jon Turney
0158f73f08 Fix util/process test on Cygwin
It seems meson returns the filename with extension for full_path(), even
though Cygwin does it's best to pretend the file doesn't have that
extension.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4514>
2020-04-15 21:10:11 +00:00
Dave Airlie
befe2ff3a6 llvmpipe/nir: free the nir shader
Fixes: 18f896e55d (llvmpipe: add initial nir support)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4563>
2020-04-16 06:25:46 +10:00
Dave Airlie
cb0a2b3df6 draw/tess: free the NIR
Fixes: 0d02a7b8ca (draw: add main tessellation code)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4563>
2020-04-16 06:25:43 +10:00
Dave Airlie
f01c0565bb draw: free the NIR IR.
Not sure how I missed this, the ownership was a bit blurry,
free the NIR.

Fixes: bf12bc2dd7 (draw: add nir info gathering and building support)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4563>
2020-04-16 06:25:39 +10:00
Brian Ho
13ce637f1b freedreno/turnip: Update GRAS_LAYER_CNTL to GRAS_MAX_LAYER_INDEX
After some experimentation, I believe that GRAS_LAYER_CNTL is
actually just a count register storing the number of layers in the
render target. While debugging cube_array geometry tests, I noticed
that the blob was setting an unknown 0x8 to LAYER_CNTL, so I checked
the value of LAYER_CNTL for various layer sizes:

1: LAYER_CNTL=0
2: LAYER_CNTL=1
3: LAYER_CNTL=2
4: LAYER_CNTL=3
9: LAYER_CNTL=8
256: LAYER_CNTL=255
2000: LAYER_CNTL=1999

Seems like this register just stores a count of the largest layer
that can be written to via gl_Layer. This commit updates the reg
docs, freedreno's gs implementation, and turnip's gs implementation.

Fixes dEQP-VK.geometry.layered.cube_array.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4541>
2020-04-15 16:19:34 +00:00
Brian Ho
c2399e9574 turnip: Emit geometry shader descriptor consts
Without these consts, the geometry shader is unable to read from
textures or uniforms.

Fixes dEQP-VK.geometry.layered.*.readback

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4541>
2020-04-15 16:19:34 +00:00
Brian Ho
d6d5ee29ab turnip: Correctly set layer stride for 3D images
Previously we were using layout.layer_size for the layer stride, but
in Vulkan, you can alias a 3D image as an array of 2D images via the
VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT flag. One reason to use
this behavior is so the geometry shader can write to a specific
depth in a 3D framebuffer with gl_Layer.

Since the 3D image is not a *true* layered image, layer_size is 0.
Instead, we can copy what freedreno does and use the slice size.

Fixes dEQP-VK.geometry.layered.3d.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4541>
2020-04-15 16:19:34 +00:00
Karol Herbst
7e525d29ab gallium: initialize viewport swizzle in cso_set_viewport_dims
Fixes: dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_* and more
Fixes: 4137a79c2a ("gallium: add viewport swizzling state and cap")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4567>
2020-04-15 16:43:57 +02:00
Karol Herbst
1aefe78b47 mesa: fix enum value of VIEWPORT_SWIZZLE_POSITIVE_W_NV
Fixes: ff168b297d ("mesa: add GL_NV_viewport_swizzle support")
Reported-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4567>
2020-04-15 16:43:36 +02:00
Samuel Pitoiset
e2650db952 radv/aco: do not advertise VK_KHR_shader_subgroup_extended_types
It's unsupported because small bitsizes are still not completely
supported. It should have been disabled by default with ACO.

Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4549>
2020-04-15 14:45:43 +02:00
Karol Herbst
4ee2370972 nvc0: enable ASTC and ETC on GM20B
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4554>
2020-04-15 12:08:02 +00:00
Emil Velikov
22406da756 glx: omit loader_loader() for macOS
Earlier commit added the code unconditionally, since the loader code
itself is already built on macOS.
Although it did not consider the #include mayhem that src/glx is.

In particular, none of the __GLXDRI{screen,context,drawable) are
available for macOS... those are pulled by dri_common.[ch].

Ideally we'll untangle that, but for the time being simply #ifdef out
the include/call.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2726
Fixes: b699d070a6 ("glx: set the loader_logger early and for everyone")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4490>
2020-04-15 11:37:21 +00:00
Karol Herbst
471fd41e84 clover: expose cl_arm_shared_virtual_memory for devices with SVM support
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
657ff3b3b8 clover: implement cl_arm_shared_virtual_memory
v2: use static array to keep name -> func mapping
v3: use unordered_map
v4: handle ARM constants
    reorder dispatch table
    wrap enqueue APIs as the command value differs between khr and arm
v5: move declarations into dispatch.hpp
    handle CL_MEM_USES_SVM_POINTER_ARM in clGetMemObjectInfo
v6: breaking long lines

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
a218658556 clover: implement SVM functions for devices with fine grained system SVM support
all of the functionality can be mapped to malloc/free if the device supports
fine grained system SVM.

v2: fix some API bugs found with the OpenCL CTS
v3: remove validate_even_wait_list
    improve implementation of clSetKernelExecInfo
    make clEnqueueSVMFree spec compliant
    rename can_emulate_non_system_svm to has_system_svm and make it a member method
    improve validation in clEnqueueSVMMemFill
    handle CL_MEM_USES_SVM_POINTER in clGetMemObjectInfo
v4: break long lines and other minor cosmetic adjustments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
d6754eb920 clover: implement clSetKernelArgSVMPointer
it is pretty much identical to a clSetKernelArg for a scalar field, except
it is only valid for global and constant memory pointers.

Also the type equals void* on the Host, so we can just check the size of it.

v2: prefer using target_size to extend the pointer value
v3: handle more corner cases in combiation to clSetKernelArg

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
035e882819 clover: implement CL_DEVICE_SVM_CAPABILITIES
v2: without supporting userptrs SVM can't be implemented as it's impossible
    to ensure memory consistency with HOST_PTR buffers
v3: fix comment style
v4: fixes typo in comment

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
c170c0cfe4 clover: add stubs for SVM
although most of those are 2.0 core functions, there is
cl_arm_shared_virtual_memory to expose those in a 1.2 context. But we
should be able to expose this extension with 1.1 as well as there is no
technicaly reason why this shouldn't work.

v2: move svm functions into existing files
v3: rename func args to match convention

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Karol Herbst
e738967d6e gallium: add PIPE_CAP_SYSTEM_SVM
v2: split enum in specific caps to abstract the CL enum
v3: remove BUFFER_SVM caps

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2076>
2020-04-15 11:08:13 +00:00
Rhys Perry
c818b5c089 aco: fix 1D textureGrad() on GFX9
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6f718edced ('aco: simplify gathering of MIMG address components')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4550>
2020-04-15 10:45:07 +00:00
Lionel Landwerlin
8ce46f352e iris: drop cache coherent cpu mapping for external BO
We have to assume any external buffer could be used by the display HW.
In the case that buffer is also CPU mapped, we want to assume no cache
coherency as it is only available between GT & CPU, not display.

Many thanks to Michel Dänzer for the hint!

v2: Move cache coherent drop to bufmgr (Chris)

v3: Also make BO external if created with PIPE_BIND_SHARED (Eric)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2552
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4533>
2020-04-15 09:01:52 +00:00
Samuel Pitoiset
08a396033b aco: fix nir_op_frexp_exp with 16-bit floats and negative exponents
v_frexp_exp_i16_f16 returns the two's complement for negative
exponents. For example, with 0.333252 it returns 0.666504 for
the mantissa and 65535 for the exponent (-1 in decimal).

RADV/LLVM and AMDVLK do a v_bfe_i32 and AMDGPU-PRO uses SDWA with
the sign extension bit set. The latter is probably what we want to
do in long term but for now RA doesn't support changing non-SDWA
instructions to SDWA if useful/needed.

Fixes dEQP-VK.glsl.builtin.precision_fp16_storage16b.frexp.compute.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4546>
2020-04-15 10:12:44 +02:00
Dave Airlie
9bf8e92386 u_blitter: fix stencil blitting
Fixes: KHR-GL45.packed_depth_stencil.blit.depth32f_stencil8

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:33 +10:00
Dave Airlie
381e9fe64a draw: fix user culling pipeline order. (v2)
GL spec requires user culling, then clipping then face culling.
llvmpipe was doing clipping then user culling then face culling.

Fix the ordering by adding a new user_cull stage that does the user
culling

Fixes piglit clip_cull-4.shader_test

v2: simplify this a lot (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:29 +10:00
Dave Airlie
30ef6f5137 draw/cull: run pipeline for culled points.
This just appears to be missing:
Fixes:
KHR-GL45.cull_distance.functional

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:24 +10:00
Dave Airlie
dc261cdd42 llvmpipe/setup: move line stats collection earlier.
You have to count the stats pre-culling here.

Fixes:
KHR-GL45.pipeline_statistics_query_tests_ARB.functional_primitives_vertices_submitted_and_clipping_input_output_primitives

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:20 +10:00
Dave Airlie
80fa8304c8 draw: fix tessellation stats query
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:17 +10:00
Dave Airlie
335827eade llvmpipe: fix no tokens detections.
this only applies to the TGSI path, fixes
KHR-GLES31.core.geometry_shader.api.program_pipeline_vs_gs_capture

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:14 +10:00
Dave Airlie
ccc6a48ec5 gallivm/draw: calloc prim id toavoid undef
Otherwise masked off channels can access random bad memory

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:11 +10:00
Dave Airlie
e20b3b3720 gallivm/nir: lower implicit lod to tex.
Fixes some sampling issues in vertex shaders

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:08 +10:00
Dave Airlie
c494ed0467 gallivm: fix left over shader vote debug
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:06 +10:00
Dave Airlie
7690606bf7 llvmpipe/query: fix transform feedback overflow any queries.
The any queries need to signal if any stream has overflowed,
so we have to track all the streams.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:03 +10:00
Dave Airlie
96e12ca7d7 llvmpipe: report tessellation shader statistics.
Fixes KHR-GL45.pipeline_statistics_query_tests_ARB.functional_tess_queries

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:26:00 +10:00
Dave Airlie
202bc38ce9 draw: collect tessellation invocations statistics
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:25:56 +10:00
Dave Airlie
f4edc6f8bd llvmpipe: fixup context leaks.
Make sure we unreference all resources for all shaders on context
destruction.

Fixes: eb5227173f (llvmpipe: add support for tessellation shaders)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4560>
2020-04-15 14:25:50 +10:00
Vinson Lee
68b40cfe27 swr: Remove Byte Order Mark.
before:
$ file src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py: Python script text executable, UTF-8 Unicode (with BOM) text

after:
$ file src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py: Python script text executable, ASCII text

This patch also fixes this build error.

  File "src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py", line 1

    # Copyright (C) 2014-2018 Intel Corporation.   All Rights Reserved.

    ^

SyntaxError: invalid character in identifier

Fixes: c6e67f5a93 ("gallium/swr: add OpenSWR rasterizer")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4221>
2020-04-14 13:23:38 -07:00
Danylo Piliaiev
600c91fed8 glsl/list: Fix undefined behaviour of foreach_* macros
These macros produced a lot of errors with ubsan preventing us from
expanding the ubsan coverage on CIs.

C++ spec has such clause:

 "If the prvalue of type "pointer to cv1 B" points to a B that is
  actually a subobject of an object of type D, the resulting pointer
  points to the enclosing object of type D. Otherwise, the result
  of the cast is undefined."

Ubsan error example:

 ../src/compiler/glsl/builtin_functions.cpp:4945:4: runtime error: downcast of address 0x559b926abb50 which does not point to an object of type 'ir_instruction'
 0x559b926abb50: note: object has invalid vptr
  9b 55 00 00  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  58 ba 6a 92 9b 55 00 00  01 00 00 00
               ^~~~~~~~~~~~~~~~~~~~~~~
               invalid vptr
     #0 0x559b914dbe1a in call ../src/compiler/glsl/builtin_functions.cpp:4945

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4129>
2020-04-14 19:29:38 +00:00
Jonathan Marek
23be216071 freedreno/ir3: don't overwrite wrmask in ir3_SAM
Fixes (with other patches to allow these tests to run):

dEQP-VK.ycbcr.query.size_lod.vertex.*

Suggested-by: Rob Clark <robclark@gmail.com>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4557>
2020-04-14 19:12:47 +00:00
Jonathan Marek
aeb5b9cebf freedreno/ir3: fix emit_tex_info split_dest
Fixes a "free(): invalid next size (fast)" error in:

dEQP-VK.glsl.texture_functions.query.texturequerylevels.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4557>
2020-04-14 19:12:47 +00:00
Gert Wollny
cb08f451d0 gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to 0
Since the alignment is now checked in the validator we must set it.

v2: Use alignement of 4, i.e. dest bit size by eight.
v3: Use alignment 16 (Rhys Perry & Jason Ekstand)
v4: Use nir_intrinsic_set_align to make it clear that align offset is 0
    (Jason)

Fixes: e78a7a1825
    nir: Assert memory loads are aligned

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4544>
2020-04-14 18:47:09 +00:00
Connor Abbott
31988baba4 ir3: Fix txs with bindless
I missed that this had a micro-optimization to assume that there was
only ever one source, which is no longer valid for the bindless model
since we now have a bindless handle source. Remove the optimization to
fix assertion failures with turnip.

Fixes e.g.
dEQP-VK.glsl.texture_functions.query.texturesize.sampler2d_fixed_vertex

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4548>
2020-04-14 16:25:34 +00:00
Andres Gomez
acf7e73be5 gitlab-ci: make explicit tracie is gitlab specific
Tracie main script and traces.yml file talk about repo(sitory) when it
actually means GitLab's project.

Since the script is GitLab's API specific, make it clear.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4496>
2020-04-14 16:07:28 +03:00
Andres Gomez
1ca91683e2 gitlab-ci: protect usage of shell variables with double quotes
Not really needed right now, but seems dangerous to have paths without
the double quote.

I went ahead and used in the rest of values too.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4496>
2020-04-14 16:07:19 +03:00
Andres Gomez
35782b6593 gitlab-ci: Vulkan tracie runner to return last command exit code
No need to cache the return value if there is only a single trace
execution call.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4496>
2020-04-14 16:06:51 +03:00
Alexandros Frantzis
4c6ce826af gitlab-ci: Check the Mesa version used for tracie tests
Verify that the Mesa version used when running tracie tests is the
one that was built by CI, rather than any installed distro version.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3894>
2020-04-14 11:34:02 +00:00
Rhys Perry
fbd2be3f5d aco: clear moved operands in get_reg_create_vector()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Rhys Perry
52cc1f8237 aco: improve p_create_vector RA for sub-dword operands
These's still improvements needed for sub-dword definitions, but that's
not as simple.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Rhys Perry
e18711cda3 aco: fix p_extract_vector validation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Rhys Perry
41ac44e1b3 aco: improve vector optimization with sub-dword vectors
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
2020-04-14 10:49:12 +00:00
Samuel Pitoiset
849eb0a776 radv: use RMW packets for updating the maximum sample distance
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4531>
2020-04-14 11:31:37 +02:00
Samuel Pitoiset
cb6ab17d1f radv: add radeon_set_context_reg_rmw() helper
For emitting RMW packets in the command stream. This new helper
will be useful for implementing extended dynamic states to only
overwrite the fields that need to be updated instead of storing
more values in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4531>
2020-04-14 11:31:33 +02:00
pal1000
f0b94262c1 scons/windows: Support build with LLVM 10.
LLVM engine component contains 2 new libraries, LLVMCFGuard and LLVMTextAPI.
Without them build fails like in this run: https://ci.appveyor.com/project/Alexpux/mingw-packages/builds/32102425/job/wkmb4gimfqkkb3cg

Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4521>
2020-04-14 08:40:56 +00:00
Tobias Jakobi
c38946e62d meson: Link Gallium Nine with ld_args_build_id
This fixes an assertion in iris_disk_cache_init() when the initialization
goes through drm_create_adapter(), which lives in d3dadapter9.so.
In this case build_id_find_nhdr_for_addr() fails and returns NULL, since
the shared library does not include a build ID.

The issue can be reproduced with an iris capable GPU and Xnine, while
removing the shader cache prior to launching the application.

Fix this by doing the same as in 29ea92e6a1.

Fixes: 4756864cdc "iris: Start wiring up on-disk shader cache"
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4499>
2020-04-14 00:22:45 +00:00
Greg V
924f3f3de7 svga: fix build on FreeBSD
MADV_HUGEPAGE only exists on Linux

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3966>
2020-04-13 23:51:43 +00:00
Eric Anholt
9ce4db6231 freedreno/a5xx+: Skip compiling the old gmem blit programs.
Saves a bunch of noise for me to sort through in IR3_SHADER_DEBUG=vs,fs
shader-db/run <single shader_test>.  I found that we were crashing on
destroy of NULL programs in fd_prog_fini, so I replicated the gpu_id < 300
early exit from fd_prog_init() down to _fini as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4538>
2020-04-13 22:50:58 +00:00
Alyssa Rosenzweig
2513d0257c pan/bit: Add BI_CONVERT tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
9f50b19534 pan/bit: Add BI_CONVERT interpretation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
640d69d166 pan/bi: ADD packing for CONVERT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
8cfe660326 pan/bi: Rewrite conversion packing
To support roundmodes and other goodies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
0b000c54c0 pan/bi: Fix incorrect swizzle packing assert
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
d0cf8b977c pan/bi: Set BI_ROUNDMODE for BI_CONVERT
It's rarely used in GL but converts do have roundmodes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Alyssa Rosenzweig
2799353f5b pan/midgard: Fix f2u naming confusion
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4539>
2020-04-13 22:32:40 +00:00
Matt Turner
e4268ffb99 meson: Specify the maximum required libdrm in dri.pc
When dealing with a regression in libdrm-2.4.101, I masked the package
in Gentoo. In doing so, we discovered that Mesa's dri.pc specifies a
version requirement in dri.pc for >= the version of libdrm Mesa was
built against, thus preventing packages from being rebuilt with the
older version of libdrm installed.

Let's reduce this version requirement to the latest libdrm required by
Mesa instead, since libdrm is backward compatible.

Fixes: a3a16d4aa7 ("meson: use dep_libdrm version for pkg-config")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4534>
2020-04-13 22:07:41 +00:00
Rob Clark
4b24b9647d freedreno/ir3/ra: cleanup some leftovers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
751c11a8c7 freedreno/ir3: rename depth->dce
Since DCE is the only remaining function of this pass, after the pre-RA
scheduler rewrite.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
cf74048fd1 freedreno/ir3: better cleanup when removing unused instructions
Do a better job of pruning when removing unused instructions, including
cleaning up dangling false-deps.

This introduces a new ssa src pointer iterator, which makes it easy to
clear links without having to think about whether it is a normal ssa
src or a false-dep.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
96ff2a4099 freedreno/ir3/ra: handle array case for SFU select_reg opt
The src of the SFU instruction could also be array/reg (non-SSA).
Handle this case too.

The postsched cp pass makes this scenario more likely.

Fixes: cc82521de4 ("freedreno/ir3: round-robin RA")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
b787b353d0 freedreno/ir3: add mov/cov stats
While not always avoidable, cov instructions are a useful thing to look
at to see if we could fold into src.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
89a78a07de freedreno/ir3/postsched: avoid moving tex ahead of kill
Add extra dependencies of tex/mem instructions on previous kill
instructions to avoid moving them ahead of kills.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
017fdab217 freedreno/ir3/postsched: remove some leftovers
These aren't used in postsched.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
9701008d64 freedreno/ir3/sched: awareness of partial liveness
Realize that certain instructions make a vecN live, and account for
this, in hopes of scheduling the remaining components of the vecN
sooner.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
d2f4d332db freedreno/ir3: new pre-RA scheduler
This replaces the depth-first search scheduler with a more traditional
ready-list scheduler.  It primarily tries to reduce register pressure
(number of live values), with the exception of trying to schedule kills
as early as possible.  (Earlier iterations of this scheduler had a
tendency to push kills later, and in particular moving texture fetches
which may not be necessary ahead of kills.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
0f22f85fe7 freedreno/ir3: fix location of inserted mov's
If the group pass must insert a mov to resolve conflicts, avoid the mov
appearing *after* the meta:collect whose src it is.

The current pre-RA scheduler doesn't really care about the initial
instruction order, but the new one will in some cases.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
908044ef4b freedreno/ir3: simplify grouping pass
Since bdf6b7018c the logic only needs to
handle grouping collect srcs, So remove the now unnecessary indirection.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
860f5981f0 freedreno/ir3: make falsedep use's optional
Add option when collecting uses to control whether they include
falsedeps or not.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Rob Clark
d09e3afdcc freedreno/ir3: spiff out disasm a bit
for verbose mode, print also the instruction "cycle" (which takes into
account (rptN) and (nopN)) in addition to instruction offset.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
2020-04-13 20:47:28 +00:00
Jonathan Marek
40ccbae622 freedreno/computerator: support bindless sampler instructions
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4526>
2020-04-13 20:15:48 +00:00
Jonathan Marek
bc9a28beed freedreno/computerator: support nop prefix
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4526>
2020-04-13 20:15:48 +00:00
Eric Anholt
95d4a956c0 freedreno/ir3: CSE the up/downconversion of SEL's cond's size.
Not many programs hit this, but if you were, say, selecting between vec4s,
you'd convert the cond 4 times.

instructions in affected programs: 2957 -> 2717 (-8.12%)
nops in affected programs: 989 -> 899 (-9.10%)
non-nops in affected programs: 1968 -> 1818 (-7.62%)
dwords in affected programs: 3232 -> 2752 (-14.85%)
last-baryf in affected programs: 102 -> 90 (-11.76%)
full in affected programs: 5 -> 4 (-20.00%)
sstall in affected programs: 329 -> 329 (0.00%)
(ss) in affected programs: 86 -> 105 (22.09%)
(sy) in affected programs: 14 -> 12 (-14.29%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4516>
2020-04-13 19:24:52 +00:00
Eric Anholt
82375ccaa4 freedreno/ir3: Stop doing b2n on the SEL condition.
SEL_B32 (and presumably B16) checks for 0 or nonzero in the condition
(tested by just stuffing a uniform's value into it), so there's no need to
do ir3_b2n() on it, or any preceding ir3_n2b().

instructions in affected programs: 664444 -> 659927 (-0.68%)
nops in affected programs: 267898 -> 266312 (-0.59%)
non-nops in affected programs: 420260 -> 417329 (-0.70%)
dwords in affected programs: 144032 -> 137568 (-4.49%)
last-baryf in affected programs: 10801 -> 10321 (-4.44%)
full in affected programs: 2003 -> 2002 (-0.05%)
sstall in affected programs: 76670 -> 77405 (0.96%)
(ss) in affected programs: 4515 -> 4525 (0.22%)
(sy) in affected programs: 612 -> 604 (-1.31%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4516>
2020-04-13 19:24:52 +00:00
Ian Romanick
0d1917da86 tnl: Code formatting in t_rebase.c
Many little changes.  Almost everything is indentation or removal of
trailing whitespace.  Some places move a loop variable declaration to
the loop.  Some comments either re-wrapped or converted to single
line.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:27:00 -07:00
Ian Romanick
887ae78718 tnl: Code formatting in t_draw.c
So many little changes.  Almost everything is indentation or removal of
trailing whitespace.  There's a couple places where an "else" is moved
to the previous line with the "}".  Some places move a loop variable
declaration to the loop.  One change of assert to unreachable.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:57 -07:00
Ian Romanick
ac13258a6e tnl: Silence unused parameter warnings in _tnl_split_inplace
Unused since db0eb3a437 ("vbo: Fix up in-place splitting for non-contiguous/indexed primitives.") which landed in 2010.

src/mesa/tnl/t_split_inplace.c: In function ‘_tnl_split_inplace’:
src/mesa/tnl/t_split_inplace.c:270:27: warning: unused parameter ‘min_index’ [-Wunused-parameter]
  270 |                    GLuint min_index,
      |                    ~~~~~~~^~~~~~~~~
src/mesa/tnl/t_split_inplace.c:271:27: warning: unused parameter ‘max_index’ [-Wunused-parameter]
  271 |                    GLuint max_index,
      |                    ~~~~~~~^~~~~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:54 -07:00
Ian Romanick
7a004f7987 tnl: Silence unused parameter warnings in dump_draw_info
src/mesa/tnl/t_split_copy.c: In function ‘dump_draw_info’:
src/mesa/tnl/t_split_copy.c:149:35: warning: unused parameter ‘ctx’ [-Wunused-parameter]
  149 | dump_draw_info(struct gl_context *ctx,
      |                ~~~~~~~~~~~~~~~~~~~^~~
src/mesa/tnl/t_split_copy.c:154:23: warning: unused parameter ‘min_index’ [-Wunused-parameter]
  154 |                GLuint min_index,
      |                ~~~~~~~^~~~~~~~~
src/mesa/tnl/t_split_copy.c:155:23: warning: unused parameter ‘max_index’ [-Wunused-parameter]
  155 |                GLuint max_index)
      |                ~~~~~~~^~~~~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:51 -07:00
Ian Romanick
114e078001 tnl: Silence unused parameter warnings in _tnl_draw_prims
A tangled mess of a couple parameters that nobody wanted.

src/mesa/tnl/t_draw.c: In function ‘_tnl_draw_prims’:
src/mesa/tnl/t_draw.c:440:42: warning: unused parameter ‘tfb_vertcount’ [-Wunused-parameter]
  440 |     struct gl_transform_feedback_object *tfb_vertcount,
      |     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~
src/mesa/tnl/t_draw.c:441:35: warning: unused parameter ‘stream’ [-Wunused-parameter]
  441 |                          unsigned stream)
      |                          ~~~~~~~~~^~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:48 -07:00
Ian Romanick
1996f1d3dd tnl: Silence unused parameter 'attrib' warning in convert_half_to_float
Also clean up some trivial code / whitespace style issues.

src/mesa/tnl/t_draw.c: In function ‘convert_half_to_float’:
src/mesa/tnl/t_draw.c:121:57: warning: unused parameter ‘attrib’ [-Wunused-parameter]
  121 |                       const struct gl_array_attributes *attrib,
      |                       ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:45 -07:00
Ian Romanick
7a03240b63 tnl: Don't dereference NULL obj pointer in t_rebase_prims
Structurally the code is now similar to the handling of other
gl_buffer_object::obj pointers elsewhere in TNL.  The fixes tag is a
little bit misleading.  I think the change in that commit just exposes a
previously existing bug.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2746
Fixes: f3cce7087a ("mesa: don't ever bind NullBufferObj for glBindBuffer targets")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:43 -07:00
Ian Romanick
2e43b32e72 tnl: Don't dereference NULL obj pointer in replay_init
Structurally the code is now similar to the handling of other
gl_buffer_object::obj pointers elsewhere in TNL.  The fixes tag is a
little bit misleading.  I think the change in that commit just exposes a
previously existing bug.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2746
Fixes: f3cce7087a ("mesa: don't ever bind NullBufferObj for glBindBuffer targets")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:40 -07:00
Ian Romanick
65f14fd68d tnl: Don't dereference NULL obj pointer in bind_indices
Structurally the code is now similar to bind_inputs.  The fixes tag is a
little bit misleading.  I think the change in that commit just exposes a
previously existing bug.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2746
Fixes: f3cce7087a ("mesa: don't ever bind NullBufferObj for glBindBuffer targets")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4512>
2020-04-13 10:26:38 -07:00
Daniel Schürmann
28d36d26c2 aco: fix p_extract_vector optimization in presence of unequally sized vector operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4506>
2020-04-13 16:35:40 +00:00
Alyssa Rosenzweig
0e4432bfba pan/bi: Lower fsqrt
For G72+ anyway. G71 will want something a bit more fine grained. I hope
this has enough precision for GL (the blob apparently does some exponent
fixup).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4530>
2020-04-13 15:44:31 +00:00
Alyssa Rosenzweig
3025ea6abe panfrost: Drop dependency on nonexistant write_value
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4530>
2020-04-13 15:44:31 +00:00
Tapani Pälli
53e4159eaa glsl: stop processing function parameters if error happened
Fixes: d1fa69ed61 ("glsl: do not attempt assignment if operand type not parsed correctly")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2696
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4341>
2020-04-13 15:53:15 +03:00
Samuel Pitoiset
fc1068de0d aco: fix nir_op_pack_32_2x16_split if one operand is a constant
Because 16-bit constants are represented with the s1 RegClass, we
have to extract the low half.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
2020-04-13 11:51:17 +00:00
Samuel Pitoiset
4cfaef68d7 aco: implement 16-bit nir_op_f2i64/nir_op_f2u64
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
2020-04-13 11:51:17 +00:00
Samuel Pitoiset
729bdc0d70 aco: fix f2i64/f2u64 with sgprs if the exponent computation overflow
This fixes f16->{i64,u64} conversions for +0/-0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
2020-04-13 11:51:17 +00:00
Michel Dänzer
6a8e5dde66 gitlab-ci: Use all_paths in .test-manual rules
Without this, the .test-manual jobs could end up as 'when: manual' when
the jobs they depend on were 'when: never', which was flagged as
invalid YAML, preventing the pipeline from being created.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4522>
2020-04-13 10:29:48 +00:00
Ilia Mirkin
5e6267b20b nvc0: add NV_viewport_swizzle support for GM200+
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Ilia Mirkin
90fcb3fef2 st/mesa: add NV_viewport_swizzle support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Ilia Mirkin
ff168b297d mesa: add GL_NV_viewport_swizzle support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Ilia Mirkin
4137a79c2a gallium: add viewport swizzling state and cap
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4519>
2020-04-12 12:01:46 -04:00
Tapani Pälli
e2457bedd3 glsl: remove redudant assignment
CID: 1461087
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4500>
2020-04-12 16:48:53 +03:00
Tapani Pälli
e667802a7c mesa: remove redudant assignment
CID: 1461397
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4500>
2020-04-12 16:48:45 +03:00
Tapani Pälli
fd24172200 mesa: remove redudant check
CID: 1461410
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4500>
2020-04-12 16:48:27 +03:00
Qiang Yu
25a61cce7d lima: set offset when export resource
We missed set reource offset.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4517>
2020-04-12 10:02:24 +00:00
Lionel Landwerlin
4094558e86 i965: share buffer managers across screens
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:37 +03:00
Lionel Landwerlin
865b840a6b i965: store DRM fd on intel_screen
v2: Fix storing of drm fd (Ajax)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:33 +03:00
Lionel Landwerlin
0a497eb130 iris: make resources take a ref on the screen object
Because St creates resources from a screen and attach them onto
another we need to ensure the resources associated to a screen &
bufmgr stay around until we don't need them anymore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:28 +03:00
Lionel Landwerlin
7557f16059 iris: share buffer managers accross screens
St happilly uses pipe_resources created with one screen with other
screens. Unfortunately our resources have a single identifier that
related to a given screen and its associated DRM file descriptor.

To workaround this, let's share the buffer manager between screens for
a given DRM device. That way handles are always valid.

v2: Don't forget to close the fd that bufmgr now owns
    Take a copy of the fd to ensure it stays alive even if the dri
    layer closes it

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:25 +03:00
Lionel Landwerlin
bd3e505453 iris: properly free resources on BO allocation failure
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
2020-04-11 22:04:22 +03:00
Rob Clark
7aa6720ba4 freedreno/log: better decoding for multiple chunks per batch
For larger render targets or smaller GMEM size, we could end up needing
multiple chunks of tracepoints per batch.  But we still want to decode
the traces as single batch.  So we need a bit of a state across
process_chunk() calls to accumulate timestamp information.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4510>
2020-04-10 19:29:54 +00:00
Rob Clark
7aa55f5acb freedreno/log: spiff out parser some more
Extract breakdown of time in GMEM passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4510>
2020-04-10 19:29:54 +00:00
Rob Clark
b5b32387d6 freedreno/log: android support
In particular, when stdout doesn't go anywhere useful we need to log to
file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4510>
2020-04-10 19:29:54 +00:00
Eric Anholt
904d5d63b4 freedreno: Fix leak of binning shader variants.
The v->binning variant is never added to shader->variants, so just free
each one as we free the nonbinning variant.

Noticed from drm-shim mode running out of open fds, since each bo ends up
with an fd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4502>
2020-04-10 18:42:20 +00:00
Kristian H. Kristensen
5ec1f264f1 freedreno/ir3: Fix sz vs class confusion
Add bounds checking to make sure we don't silently access out of
bounds again.

Fixes: 90f7d12236 ("freedreno/ir3/ra: pick higher numbered scalars in first pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4503>
2020-04-10 10:24:14 -07:00
Alyssa Rosenzweig
65e2eaa4d3 pan/decode: Print Bifrost blend descriptor
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:54:02 +02:00
Alyssa Rosenzweig
80dd692813 pan/bi: Let !b2b imply branch_cond
Like the blob. Probably doesn't matter.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:59 +02:00
Alyssa Rosenzweig
3439c24bdb panfrost: Fix BI_BLEND packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:57 +02:00
Alyssa Rosenzweig
e34add229f pan/bi: Fix backwards registers ports
Will matter when packing multiple instructions per bundle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:56 +02:00
Alyssa Rosenzweig
23620d1830 panfrost: Pass compiler-appropriate options
FMAs need to fuse for Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:54 +02:00
Alyssa Rosenzweig
e30091bc51 panfrost: Move uniform_count to pan_assemble
Again, not Midgard specific.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:53 +02:00
Alyssa Rosenzweig
d10423989e panfrost: Move varying linking to cmdstream
This isn't ISA/compiler specific, it's just looking at the NIR. So let's
move it from midgard to pan_assemble.c so it runs for Bifrost too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:51 +02:00
Alyssa Rosenzweig
776697dd34 pan/midgard: Remove unused max_varying variable
I don't know why this was here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:50 +02:00
Alyssa Rosenzweig
90e02db9a1 pan/bi: Fix nondeterministic register packing
Uninitialized read.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:48 +02:00
Alyssa Rosenzweig
8016906cf2 panfrost: Call the Bifrost compiler on bi devices
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:47 +02:00
Alyssa Rosenzweig
0a9fa4bcb6 panfrost: Set mfbd.msaa.sample_locations on Bifrost
And mfbd.shared_memory only on Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:44 +02:00
Tomeu Vizoso
46e4246d49 panfrost: On Bifrost, set the right tiler descriptor
On both fragment and tiler jobs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:39 +02:00
Tomeu Vizoso
547f999e2c panfrost: Don't emit write_value jobs on Bifrost
As on Bifrost GPUs there's a different mechanism for reusing the tiler
data structures.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:31 +02:00
Tomeu Vizoso
30e7027e1c panfrost: Pass IS_BIFROST to pandecode_jc
So we can decode the right structures on Bifrost hw.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:21 +02:00
Tomeu Vizoso
7b10d4ece6 panfrost: Remove most usage of midgard_payload_vertex_tiler
By passing the prefix and postfix structs around, we can use most of the
cmdstream functions as well for bifrost, as those structs haven't
changed between midgard and bifrost.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:53:03 +02:00
Alyssa Rosenzweig
b010a6d5f1 panfrost: Unify vertex/tiler structures
Some fields were shuffled but these are essentially the same across the
generations.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:52:59 +02:00
Alyssa Rosenzweig
aee68b06c8 panfrost: Staticize a few cmdstream functions
They are only used within the same source file.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:52:56 +02:00
Alyssa Rosenzweig
dd09571c77 panfrost: Populate bifrost-specific structs within mali_shader_meta
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:52:54 +02:00
Alyssa Rosenzweig
b096a1dbd3 panfrost: Add IS_BIFROST quirk
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>
2020-04-10 16:51:57 +02:00
Christian Gmeiner
693480a581 etnaviv: remove the "active" member of queries
The state tracker only gets to begin/query/destroy when !active and end
when active, so we have no need to try to track this ourselves.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4456>
2020-04-10 12:42:24 +00:00
Christian Gmeiner
7cb98e02e4 etnaviv: change begin_query(..) to a void function
We always return true.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4456>
2020-04-10 12:42:24 +00:00
Christian Gmeiner
7a9cbb2b61 etnaviv: drop redundant calls to etna_acc_query_suspend(..)
Introduced by accident during rebase.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4456>
2020-04-10 12:42:24 +00:00
Jose Maria Casanova Crespo
b06fdb8edd v3d: Primitive Counts Feedback needs an extra 32-bit padding.
Store Primitive Counts operations write 7 counters in 32-bit words
but also a padding 32-bit with 0. So we need 8 32-bit words instead
of the current 7 allocated.

This was causing an corruption in the next buffer when Transform
Feedback was enabled that were exposed on tests like:
dEQP-GLES3.functional.transform_feedback.*.points.*

This patch fixes 196 tests that were failing when they were run isolated
but they were passing when run using cts-runner.

Fixes: 0f2d1dfe65 ("v3d: use the GPU to record primitives written to transform feedback")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2674
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4501>
2020-04-10 10:02:56 +02:00
Daniel Schürmann
38622de2ec aco: make some reg_file helpers private and fix their uses
Fixes various subdword RA issues

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
331794495e aco: rename aco_lower_bool_phis() -> aco_lower_phis()
We also lower subdword phis, now.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
1d41521b16 aco: lower subdword phis with SGPR operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
a39df3bfce aco: don't constant-propagate into subdword PSEUDO instructions
PSEUDO instructions are lowered using SDWA, and thus,
cannot take literals and before GFX9 cannot take constants
at all. As the in-register representation differs between
32bit and 16bit floats, we first need to ensure correct
behavior.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
1de18708cb aco: ensure correct bit representation of subdword constants
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Daniel Schürmann
637f45f390 aco: setup subdword regclasses for ssa_undef & load_const
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>
2020-04-10 07:19:27 +00:00
Samuel Pitoiset
67b567d0d0 aco: implement nir_op_b2f16/nir_op_i2f16/nir_op_u2f16
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
3119f978e5 aco: implement 16-bit comparisons
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
ccf8e23f59 aco: implement 16-bit nir_op_fmax3/nir_op_fmin3/nir_op_fmed3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
981ced07a5 aco: implement 16-bit nir_op_ldexp
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
55537ed9d3 aco: implement 16-bit nir_op_f2i32/nir_op_f2u32
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
68339ff7a7 aco: implement 16-bit nir_op_bcsel
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
0646562a17 aco: implement 16-bit nir_op_fsign
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
6793ae1c5e aco: implement 16-bit nir_op_fsat
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
0ecca65d11 aco: implement 16-bit nir_op_fmul
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
b0c60999bc aco: implement 16-bit nir_op_fcos/nir_op_fsin
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
9be4be515f aco: implement 16-bit nir_op_fsub/nir_op_fadd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
b0b637ca17 aco: implement 16-bit nir_op_fabs/nir_op_fneg
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
acc5912786 aco: implement 16-bit nir_op_fmax/nir_op_fmin
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
66d5bfb09a aco: implement 16-bit nir_op_ffloor/nir_op_fceil
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
c097c9f20c aco: implement 16-bit nir_op_fsqrt/nir_op_frcp/nir_op_frsq
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
26ed9fb79e aco: implement 16-bit nir_op_ftrunc/nir_op_fround_even
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
ee96181ad9 aco: implement 16-bit nir_op_fexp2/nir_op_flog2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:05 +02:00
Samuel Pitoiset
b8486041df aco: implement 16-bit nir_op_ffract
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:04 +02:00
Samuel Pitoiset
a8b45d7034 aco: implement 16-bit nir_op_frexp_sig/nir_op_frexp_exp
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4452>
2020-04-10 08:05:04 +02:00
Caio Marcelo de Oliveira Filho
db74ad0696 intel/compiler: Remove cs_prog_data->threads
At this point all drivers are doing this math on their own -- since
most of them need to cover the variable group size case, in which at
compile time the group size (and number of threads) is not defined.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:20 -07:00
Caio Marcelo de Oliveira Filho
9ff55621d9 iris: Stop using cs_prog_data->threads
This is a preparation for dropping this field since this value is
expected to be calculated by the drivers now for variable group size
case.  And also the field would get in the way of brw_compile_cs
producing multiple SIMD variants (like FS).

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Caio Marcelo de Oliveira Filho
928f5f5434 anv: Stop using cs_prog_data->threads
Move the calculation to helper functions -- similar to what GL already
needs to do.

This is a preparation for dropping this field since this value is
expected to be calculated by the drivers now for variable group size
case.  And also the field would get in the way of brw_compile_cs
producing multiple SIMD variants (like FS).

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Plamena Manolova
5664bd6db3 i965: Implement ARB_compute_variable_group_size
This patch adds the implementation of ARB_compute_variable_group_size
for i965. We do this by storing the local group size in a push constant.

Additional changes made by Caio Marcelo de Oliveira Filho.

Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Plamena Manolova
c77dc51203 intel/compiler: Add support for variable workgroup size
Add new builtin parameters that are used to keep track of the group
size.  This will be used to implement ARB_compute_variable_group_size.

The compiler will use the maximum group size supported to pick a
suitable SIMD variant.  A later improvement will be to keep all SIMD
variants (like FS) so the driver can select the best one at dispatch
time.

When variable workgroup size is used, the small workgroup optimization
is disabled as it we can't prove at compile time that the barriers
won't be needed.

Extracted from original i965 patch with additional changes by
Caio Marcelo de Oliveira Filho.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Caio Marcelo de Oliveira Filho
c54fc0d07b intel/compiler: Replace cs_prog_data->push.total with a helper
The push.total field had three values but only one was directly
used (size).  Replace it with a helper function that explicitly takes
the cs_prog_data and the number of threads -- and use that in the
drivers.

This is a preparation for ARB_compute_variable_group_size where the
number of threads (hence the total size for push constants) is not
defined at compile time (not cs_prog_data->threads).

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4504>
2020-04-09 19:23:12 -07:00
Vinson Lee
0536ca20d7 swr/rasterizer: Use private functions for min/max to avoid namespace issues.
This is a similiar fix as bb2287ccdf ("gallivm/tessellator: use
private functions for min/max to avoid namespace issues").

Fixes: ab55708200 ("swr/rasterizer: Add tessellator implementation to the rasterizer")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4208>
2020-04-09 17:57:02 -07:00
Connor Abbott
089e1fb287 tu: Implement descriptor set update templates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
e1595026f6 tu: Add missing code for immutable samplers
Actually fill out the samplers, based on the radv implementation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
a07b55443b tu: Emit CP_LOAD_STATE6 for descriptors
This restores the pre-loading of descriptor state, using the new
SS6_BINDLESS method that allows us to pre-load bindless resources.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
d37843fee1 tu: Switch to the bindless descriptor model
Under the bindless model, there are 5 "base" registers programmed with a
64-bit address, and sam/ldib/ldc and so on each specify a base register
and an offset, in units of 16 dwords. The base registers correspond to
descriptor sets in Vulkan. We allocate a buffer at descriptor set
creation time, hopefully outside the main rendering loop, and then
switching descriptor sets is just a matter of programming the base
registers differently. Note, however, that some kinds of descriptors
need to be patched at command recording time, in particular dynamic
UBO's and SSBO's, which need to be patched at CmdBindDescriptorSets
time, and input attachments which need to be patched at draw time based
on the the pipeline that's bound. We reserve the fifth base register
(which seems to be unused by the blob driver) for these, creating a
descriptor set on-the-fly and combining all the dynamic descriptors from
all the different descriptor sets. This way, we never have to copy the
rest of the descriptor set at draw time like the blob seems to do. I
mostly chose to do this because the infrastructure was already there in
the form of dynamic_descriptors, and other drivers (at least radv) don't
cheat either when implementing this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
fc850080ee ir3: Rewrite UBO push analysis to support bindless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
274f3815a5 ir3: Plumb through bindless support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
7d0bc13fca ir3: LDC also has a destination
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
1842961e58 ir3: Also don't propagate immediate offset with LDC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
de7d90ef53 ir3: Plumb through support for a1.x
This will need to be used in some cases for the upcoming bindless
support, plus ldc.k instructions which push data from a UBO to const
registers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
c8b0f90439 ir3: Add bindless instruction encoding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
122a900d7d freedreno/a6xx: Add registers for the bindless model
In Vulkan, descriptors for samplers, SSBO's, etc. are collected into
descriptor sets, and shaders can use multiple descriptor sets. At
command-recording time, users can swap out only some of the descriptor
sets, and the driver is supposed to do the minimum amount necessary to
update any internal binding tables, knowing that only some of the
descriptors have changed.

With the old binding model, focused on GL, where there are separate
tables for each type of resource, we can do somewhat better than now by
preserving descriptors from lower descriptor sets when switching higher
descriptor sets. However we still have to copy around descriptors before
each draw.

At least for a6xx, qualcomm went further, essentially copying the Vulkan
binding model as an alternate way to load resources. There's an array of
registers (actually an array for compute and one for everything else),
where each register holds a pointer to a descriptor set that can contain
various different descriptor types. The descriptors are padded out to 16
dwords, so that every instruction can use an index instead of a dword
offset. It's called "bindless", I think, because it can also be used to
implement the old GL bindless extensions (presumably it allows more
samplers and textures than the old model).

This commit adds the register and cmdstream parts. Next up will be the
instruction encoding.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
e088d82aa6 freedreno/a6xx: Add UBO size field
Verified with the vulkan blob, which uses ldc and UBO descriptors, and
turnip will too soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
d3b7681df2 tu: ir3: Emit push constants directly
Carve out some space at the beginning for push constants, and push them
directly, rather than remapping them to a UBO and then relying on the
UBO pushing code. Remapping to a UBO is easy now, where there's a single
table of UBO's, but with the bindless model it'll be a lot harder. I
haven't removed all the code to move the remaining UBO's over by 1,
though, because it's going to all get rewritten with bindless anyways.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Connor Abbott
63c2e8137d tu: Dump out shader assembly when requested
We don't use the ir3 variant machinery, so we have to do this ourselves.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
2020-04-09 15:56:55 +00:00
Daniel Schürmann
d22e2b3bd0 aco: RA - move all std::function objects into proper functions
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
5351fee56a aco: move all needed helper containers to ra_ctx
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
2ae27b96ef aco: change live_out variables to std::unordered_set
Improves performance of live_var_analysis for larger shaders

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
acc10a7e51 aco: change some std::map to std::unordered_map in register_allocation
This improves compile times slightly for larger shaders

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
69b6069dd2 aco: refactor try_remove_trivial_phi() in RA
Minor refactoring to avoid some pointer chasing.
This patch also changes the live_out argument to be
passed by reference to avoid an unnecessary copy.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
b66f474121 aco: improve speed of live_var_analysis
by merging live_sgprs and live_vgprs sets.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
09850e0a94 aco: during RA only insert into renames table if a variable got renamed
This improves the speed of register allocation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
48a74b6815 aco: replace assignment hashmap by std::vector in register allocation
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
ba482c2e5f aco: improve register assignment when live-range splits are necessary
When finding a good place for a register, we can ignore
killed operands.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
fb5a7902f2 aco: improve hashing for value numbering
An improved hashing greatly reduces the number of collisions,
and thus, increases the speed for lookups in the hash table.
The hash function now uses Murmur3 written by Austin Appleby.

This patch also pre-reserves space for the hashmap to avoid rehashing.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
c99107ece0 aco: add explicit padding for all Instruction sub-structs
This patch also adds static_asserts on the size of Instructions
to ensure no internal padding is present.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Daniel Schürmann
7f962a9362 aco: guarantee that Temp fits in 4 bytes
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4130>
2020-04-09 15:08:57 +00:00
Jonathan Marek
2e084c2cb3 turnip: new clear/blit implementation with shader path fallback
The shader path is used to implement the following cases:
* stencil aspect mask on D24S8 (for image_to_buffer,buffer_to_image)
* clear/copy msaa destination (2D engine can't have msaa dest)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
de6967488a turnip: add vk_format_is_snorm/is_float
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
51fe52d2fd turnip: rework format helpers
* Take tile_mode as input directly
* tu6_format_gmem to tu6_base_format, use may not be limited to GMEM
* Add new helpers that will return the correct tile_mode as for image level
  as part of the format.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
009082dcff turnip: use dirty bits for dynamic viewport/scissor state
CmdClearAttachments shader path will overwrite this state, so it needs to
be re-emitted with dirty bits in that case.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
ed83281f0c turnip: save attachment samples in renderpass state
This is needed to be able to know the number of samples during
CmdClearAttachments which can be used while the framebuffer is unknown.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
0637eab678 turnip: disable 8x msaa
Not everything supports 8x msaa, and the blob doesn't support it at all.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
f03e63cd99 turnip: fix nir validate failure from push constant lowering
Fixes newly added checks in nir validate failing.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
86d1a4c907 turnip: split up gmem/tile alignment
Note: the x1/y1 align in tu6_emit_blit_scissor was broken

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
f494799a7f turnip: RB_CCU_CNTL fixes
* Correct bypass value for a618
* Bypass value for blitter
* Don't set RB_CCU_CNTL again unnecessarily in tu6_emit_binning_pass

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
cca7c29980 freedreno/a6xx: set bypass RB_CCU_CNTL value for blitter
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Jonathan Marek
e4c05a5335 freedreno/registers: add RB_CCU_CNTL bitfields
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
2020-04-09 14:43:02 +00:00
Samuel Pitoiset
2d8453e6e6 radv: allow TC-compat HTILE with GENERAL outside of render loops
This gives +8% with Wolfeinstein Youngblood on my Vega64, and
according to someone else, it also improves performance with Doom
2016 and Wolfenstein 2 (and probably other ID Tech games).

This improvement is because Youngblood uses GENERAL for the main
depth-only pass and TC-compat HTILE is now enabled with GENERAL if
we know that we are outside of a render loop. This obviously also
reduces the number of HTILE decompressions from/to GENERAL.

Note that Youngblood violates the Vulkan spec regarding render loops
because they are only allowed with input attachments. Expect possible
rendering issues if apps use render loops with the wrong way (ie.
without input attachmens) because HTILE might not be coherent if
a depth-stencil texture is sampled and rendered in the same draw.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2704
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4391>
2020-04-09 12:10:37 +00:00
Samuel Pitoiset
4de84c8cbd radv: only enable TC-compat HTILE for images readable by a shader
If no texture fetches happen it's useless to enable TC-compat HTILE.

Because the driver currently doesn't support TC-compat HTILE for
storage images we don't have to check.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4497>
2020-04-09 11:55:59 +00:00
Samuel Pitoiset
63f07a3047 radv: only expose fp16 control features for chips with double rate fp16
This disables all fp16 shader control features on GFX8 because only
GFX9+ supports double rate packed math.

This improves consistency regarding other AMD Vulkan drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:35:08 +02:00
Samuel Pitoiset
1e4bd1de98 radv: only expose storageInputOutput16 for chips with double rate fp16
This feature allows to use both 16-bit integers and 16-bit floats
as inputs/outputs.

This disables storageInputOutput16 on GFX8 because only GFX9+ supports
double rate packed math.

This improves consistency regarding other AMD Vulkan drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:35:08 +02:00
Samuel Pitoiset
1d74c6565d radv: only expose shaderFloat16 for chips with double rate fp16
This disables shaderFloat16 on GFX8 because only GFX9+ supports
double rate packed math.

This improves consistency regarding other AMD Vulkan drivers and
it makes no sense to enable that feature without packed math.

This also reduces performance with Wolfeinstein Youngblood if
fp16 is forced enabled on GFX8, while it's similar on GFX9.

We might re-introduce that feature in the future with ACO support
if it ends up being faster and correct.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:34:36 +02:00
Samuel Pitoiset
a3113e07b9 ac,radv: add ac_gpu_info::has_double_rate_fp16
Only GFX9+ support double rate packed math instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
2020-04-09 13:30:54 +02:00
Jonathan Marek
420ca1e4a1 turnip: use buffer size instead of bo size for VFD_FETCH_SIZE
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4224>
2020-04-09 02:05:52 +00:00
Jonathan Marek
e62f8ae15a turnip: improve vertex input handling
Emit vertexBindingDescriptionCount bindings, instead of one per attribute.

Verified with dEQP-VK.pipeline.vertex_input.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4224>
2020-04-09 02:05:52 +00:00
James Zhu
98743f648a radeonsi: fix Segmentation fault during vaapi enc test
Fix Segmentation fault during vaapi enc test on Arcturus.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by Leo Liu <leo.liu@amd.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4472>
2020-04-08 18:11:45 +00:00
Bas Nieuwenhuizen
a7e2efa7c9 radv: Use correct buffer count with variable descriptor set sizes.
Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.iublimitlow.frag.ialimitlow.0

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4489>
2020-04-08 15:26:50 +00:00
Bas Nieuwenhuizen
bb7e44a23d radv: Whitespace fixup.
Review comment that I did, but forgot to git add before amending ...

From https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4334

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4488>
2020-04-08 11:18:18 +00:00
Samuel Iglesias Gonsálvez
8b42d26132 radv: set sparseAddressSpaceSize to RADV_MAX_MEMORY_ALLOCATION_SIZE
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4487>
2020-04-08 11:03:35 +00:00
Samuel Iglesias Gonsálvez
cc678c9ce9 radv: check buffer size in vkCreateBuffer()
Fixes:

   dEQP-VK.api.buffer.basic.size_max_uint64

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4487>
2020-04-08 11:03:35 +00:00
Bas Nieuwenhuizen
a3682670c8 radv: Consider maximum sample distances for entire grid.
The other pixels in the grid might have samples with a larger
distance than the (0,0) pixel.

Fixes dEQP-VK.pipeline.multisample.sample_locations_ext.verify_location.samples_8_packed
when CTS is compiled with clang.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4480>
2020-04-08 10:53:33 +00:00
Samuel Pitoiset
9f005f1f85 radv: enable lowering of GS intrinsics for the LLVM backend
This replaces emit_vertex with:
   if (vertex_count < max_vertices) {
      emit_vertex_with_counter vertex_count ...
      vertex_count += 1
   }

Which is exactly what NIR->LLVM was doing but at NIR level. This
pass is already called by ACO.

pipeline-db changes on GFX10:
Totals from affected shaders:
SGPRS: 1952 -> 1912 (-2.05 %)
VGPRS: 2112 -> 2044 (-3.22 %)
Code Size: 189368 -> 185620 (-1.98 %) bytes
Max Waves: 494 -> 491 (-0.61 %)

No pipeline-db changes on other generations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4182>
2020-04-08 08:24:05 +02:00
Samuel Pitoiset
cd99ea7318 radv: remove radv_layout_has_htile() helper
The goal of this function was to return whether a depth-stencil image
has HTILE, in comparison to radv_layout_is_htile_compressed() which
is used to know whether a depth-stencil image has HTILE compressed.

These two functions are actually similar and they have never been
used for what they were supposed to. Remove radv_layout_has_htile()
in favour of radv_layout_is_htile_compressed() for now. If it's
needed in the future, I will re-introduce this concept properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:16 +02:00
Samuel Pitoiset
ffea3e7348 radv: cleanup creating the decompress/resummarize pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:14 +02:00
Samuel Pitoiset
6f6276bd24 radv: rename extra graphics pipeline decompress/resummarize fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:12 +02:00
Samuel Pitoiset
8b7586655f radv: rename decompress/resummarize depth/stencil functions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4389>
2020-04-08 07:55:10 +02:00
Jonathan Marek
d6a8591f72 turnip: fix compute shaders crashing after geometry shader change
Fixes: 1af71bee73 ("turnip: Set has_gs in ir3_shader_key")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4483>
2020-04-08 01:56:53 +00:00
Timothy Arceri
52c8bc0130 nir: make opt_if_loop_terminator() less strict
nir_cf_{extract,reinsert}() can't stitch a block together
if the block we are extracting ends in a jump but other jumps
nested in further ifs should be fine to move.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4477>
2020-04-08 01:35:45 +00:00
Timothy Arceri
1f649ff107 radeonsi: don't lower constant arrays to uniforms in GLSL IR
This re-enables the change made in 2f5783bc2b which was
incorrectly disabled by 3e1dd99adc.

For radeonsi, we will prefer the NIR pass as it'll generate better code
(some index calculation and a single load vs. a load, then index
calculation, then another load) and oftentimes NIR optimization can kick
in and make all the access indices constant.

Fixes: 3e1dd99adc ("radeonsi: Remove a bunch of default handling of pipe caps.")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4474>
2020-04-08 01:23:40 +00:00
Dominik Behr
c682ea598f meson: fix debug build on Android
debug_stack functions are implemented in another file for Android.
Also add backtrace library dependency.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-bu: Kristian H. Kristensen <hoegsber@google.com>
Signed-off-by: Dominik Behr <dbehr@chromium.org>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2435>
2020-04-07 23:15:11 +00:00
Bas Nieuwenhuizen
940ed5078d radv: Store 64-bit availability bools if requested.
Fixes dEQP-VK.query_pool.*.reset_before_copy.* on RAVEN.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2296
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4334>
2020-04-07 22:57:24 +00:00
Vinson Lee
ff8daa0136 gallivm: Add missing header for powf.
Fix build error after llvm-11 commit 3a29393b4709 ("Remove
math.h/cmath include from DataTypes.h").

src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c: In function ‘lp_build_linear_to_srgb’:
src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c:194:44: error: implicit declaration of function ‘powf’ [-Werror=implicit-function-declaration]
  194 |                                  exp2f_c * powf(coeff_f, 1.0f / exp_f));
      |                                            ^~~~
src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c:194:44: warning: incompatible implicit declaration of built-in function ‘powf’
src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c:78:1: note: include ‘<math.h>’ or provide a declaration of ‘powf’
   77 | #include "lp_bld_format.h"
  +++ |+#include <math.h>
   78 |

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4473>
2020-04-07 21:48:31 +00:00
Kristian H. Kristensen
4399cacaf0 turnip: Drop dep_llvm from dependencies
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Kristian H. Kristensen
5789505ab3 turnip: Make Android platform build
We still don't have a way to keep this from breaking, but I don't
think this ever built.  Let's call it progress.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Kristian H. Kristensen
97578c69e8 turnip: Stub out VK_KHR_external_{fence,semaphore}_fd
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Kristian H. Kristensen
e99f6f2ea1 turnip: Add missing VKAPI_ATTR annotations
Make sure the types match.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4478>
2020-04-07 18:44:21 +00:00
Rohan Garg
80c13a81b1 tracie: Reformat code to fix indentation
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4435>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4435>
2020-04-07 18:21:32 +00:00
Rohan Garg
efbbf8bb81 tracie: Print results in a machine readable format
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4435>
2020-04-07 18:21:32 +00:00
Eric Anholt
1618159772 freedreno/a6xx: Set a level's pitch based on minified level0 pitch, not width0.
Found from piglit fbo-generatemipmaps failures, then tracked down with the
texturator test.  The piece that really revealed things was finding that
1024x1 linear RGBA8 on the older blob drivers would have a pitch of 5120
instead of 4096, and the following levels minified that pitch.

Fixes ~124 piglit tests (~8.5% of piglit failures) on cheza.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
4b881d5270 freedreno: Add the outline of a test for a6xx texture layout.
Trying to work out texture layout by remembering what things looked like
in texturator is hard.  Instead, let's use texture layouts from tracing
the blob as a source of truth to make sure that we pick the same layouts
they do (and don't break known-good ones).  More testcases will be added
as I fix layout bugs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
9c6bfe8733 freedreno/a6xx: Drop the "alignment" layout temporary.
It's just 1 for !3d, which means that the align we're doing in that case
is pointless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
59a2220398 freedreno/a6xx: Remove the "aligned_height" temporary.
Now that we're not incrementally minifying height, we can just modify it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Eric Anholt
cdff81fa9a freedreno/a6xx: Sink the per-level size temps inside the loop.
u_minify(n, 1) is no cheaper than u_minify(n, level), and this makes the
logic a lot simpler to follow.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3987>
2020-04-07 18:02:56 +00:00
Michel Dänzer
4176dfa880 gitlab-ci: Run merge request pipelines automatically only for Marge Bot
MR pipelines not triggered by Marge Bot can still be triggered manually.

Motivation: The main & forked Mesa project CI pipelines combined are
currently generating over 1 TB of egress traffic per week. ~80% of this
is from pre-merge pipelines. Assuming this corresponds to 4 pre-merge
and one post-merge pipeline per MR on average, this change could
potentially eliminate up to ~60% of the overall traffic (by preventing
3 of the 4 pre-merge pipelines from running automatically).

(Of course, this could be subverted if all jobs of the other pipelines
were triggered manually anyway... In most cases, manually triggering
just a few jobs should suffice)

v2:
* $GITLAB_USER_NAME was the wrong variable, $GITLAB_USER_LOGIN should
  do the trick.

Suggested-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Michel Dänzer
42fe600c0c gitlab-ci: Don't require triggering build/test jobs manually
Let them run automatically once all their dependencies have passed.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Michel Dänzer
27c4ef1397 gitlab-ci/lava: Add needs: for container image to test jobs (again)
Without this, the test jobs could spuriously run after the container
job failed or was cancelled, even if the build job didn't run at all.

(I already did this in 94cfe59070, but it
got dropped accidentally in 22d976454f)

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Michel Dänzer
c12576efbe gitlab-ci: Rename "paths" YAML anchor to "all_paths"
To avoid confusion with `paths:` elements.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4432>
2020-04-07 17:36:15 +00:00
Caio Marcelo de Oliveira Filho
cf54785239 anv/gen12: Lower VK_KHR_multiview using Primitive Replication
Identify if view_index is used only for position calculation, and use
Primitive Replication to implement Multiview in Gen12.  This feature
allows storing per-view position information in a single execution of
the shader, treating position as an array.

The shader is transformed by adding a for-loop around it, that have an
iteration per active view (in the view_mask).  Stores to the position
now store into the position array for the current index in the loop,
and load_view_index() will return the view index corresponding to the
current index in the loop.

The feature is controlled by setting the environment variable
ANV_PRIMITIVE_REPLICATION_MAX_VIEWS, which defaults to 2 if unset.
For pipelines with view counts larger than that, the regular
instancing will be used instead of Primitive Replication.  To disable
it completely set the variable to 0.

v2: Don't assume position is set in vertex shader; remove only stores
    for position; don't apply optimizations since other passes will
    do; clone shader body without extract/reinsert; don't use
    last_block (potentially stale). (Jason)

    Fix view_index immediate to contain the view index, not its order.
    Check for maximum number of views supported.
    Add guard for gen12.

v3: Clone the entire shader function and change it before reinsert;
    disable optimization when shader has memory writes. (Jason)

    Use a single environment variable with _DEBUG on the name.

v4: Change to use new nir_deref_instr.
    When removing stores, look for mode nir_var_shader_out instead
    of the walking the list of outputs.
    Ensure unused derefs are removed in the non-position part of the
    shader.
    Remove dead control flow when identifying if can use or not
    primitive replication.

v5: Consider all the active shaders (including fragment) when deciding
    that Primitive Replication can be used.
    Change environment variable to ANV_PRIMITIVE_REPLICATION.
    Squash the emission of 3DSTATE_PRIMITIVE_REPLICATION into this patch.
    Disable Prim Rep in blorp_exec_3d.

v6: Use a loop around the shader, instead of manually unrolling, since
    the regular unroll pass will kick in.
    Document that we don't expect to see copy_deref or load_deref
    involving the position variable.
    Recover use_primitive_replication value when loading pipeline from
    the cache.
    Set VARYING_SLOT_LAYER to 0 in the shader.  Earlier versions were
    relying on ForceZeroRTAIndexEnable but that might not be
    sufficient.
    Disable Prim Rep in cmd_buffer_so_memcpy.

v7: Don't use Primitive Replication if position is not set, fallback
    to instancing; change environment variable to be
    ANV_PRIMITVE_REPLICATION_MAX_VIEWS and default it to 2 based on
    experiments.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Caio Marcelo de Oliveira Filho
395de69b1f intel/fs: Allow multiple slots for position
Change brw_compute_vue_map() to also take the number of pos slots.  If
more than one slot is used, the VARYING_SLOT_POS is treated as an
array.

When using Primitive Replication, instead of a single position, the
VUE must contain an array of positions.  Padding might be
necessary (after clip distance) to ensure rest of attributes start
aligned.

v2: Add note about array in the commit message and assert that
    pos_slots >= 1 to make clear 0 is invalid. (Jason)
    Move padding to be after the clip distance.

v3: Apply the correct offset when gathering the sources from outputs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v2]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Caio Marcelo de Oliveira Filho
afa5447312 intel/gen12: Add XML description for 3DSTATE_PRIMITIVE_REPLICATION
v2: Use groups for the 16-element arrays "Viewport Offset"
    and "RTAI Offset". (Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Caio Marcelo de Oliveira Filho
5dc85abc4f nir: Add per_view attribute to nir_variable
If a nir_variable is tagged with per_view, it must be an array with
size corresponding to the number of views.  For slot-tracking, it is
considered to take just the slot for a single element -- drivers will
take care of expanding this appropriately.

This will be used to implement the ability of having per-view position
in a vertex shader in Intel platforms.

Acked-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
2020-04-07 17:16:09 +00:00
Simon Ser
0bc77bcdb2 mesa: add support for NV_pixel_buffer_object
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4422>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4422>
2020-04-07 16:52:15 +00:00
Jonathan Marek
a1727598a0 turnip: implement timestamp query
Passes tests in:
dEQP-VK.pipeline.timestamp.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4027>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4027>
2020-04-07 14:58:47 +00:00
Brian Ho
d64a7d6e69 turnip: Enable geometryShader device feature
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:21 +00:00
Brian Ho
bdf6b481d8 turnip: Enable geometry shaders for CP_DRAWs
Enable geometry shading on draw if the pipeline has a geometry
stage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
b80dc4f5a6 turnip: Populate tu_pipeline.active_stages
This can be used to determine if the pipeline has a specific shader
stage (e.g. geometry shader).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
8eb0096312 turnip: Update maxGeometryShaderInvocations to match blob
Geometry shaders support an invocations parameter up to a limit
defined by maxGeometryShaderInvocations. This was set to 127, but
executing with invocations > 32 causes a crash. As it turns out, the
blob only advertises a max of 32 invocations, so we set that in
turnip as well.

Fixes dEQP-VK.geometry.instanced.draw_*_instances_{127, 64}_geometry_invocations

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
3550e20229 turnip: Selectively configure GRAS_LAYER_CNTL
One of the features of geometry shaders is the ability to render to
different layers by assigning to the gl_Layer (Layer in SPIR-V)
builtin.

While have already plumbed the layer regid to the geometry shader,
we also need to GRAS_LAYER_CNTL to actually use layered rendering.
In addition, gmem does not support layered rendering, so we need to
force sysmem.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
475fe500bf turnip: Set up REG_A6XX_SP_GS_CONFIG
Updates GS_CONFIG and HLSQ_GS_CNTL registers to match those emitted
by the blob and fd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
fceccc411a turnip: Configure VFD_CONTROL with gsheader and primitiveid
This commit updates VFD_CONTROL to use the GS header and primitive
ID sysvals if a geometry shader stage is present in the pipeline.
Like in the case of VPC, the code here is adapted from fd6_program.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
012773be26 turnip: Configure VPC for geometry shaders
This commit updates tu6_emit_vpc to selectively emit GS-specifc
configuration. Most of this is repurposed from fd6_program.c.

This also refactors `link_geometry_stages` to ir3_nir_lower_tess.c
so it can be shared between fd and tu.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
6eabd6bd51 turnip: Emit geometry shader obj and related consts
Like with other shader types, we need to emit the geometry shader
object and the consts it uses. In addition, we need to emit
additional geometry-specific consts that link primitive/vertex stride
between the vs and gs. In conjunction with the gsheader, these are
used by the vs to determine where to stlw outputs and used by the gs
to determine where to ldlw those outputs from.

FD emits these consts in the draw call because in GL, you can mix
and match shaders in different programs. In Vulkan, however, we
compile and link the shaders at pipeline creation, so we can emit
these in the pipeline IB instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Brian Ho
1af71bee73 turnip: Set has_gs in ir3_shader_key
The ir3 compiler only lowers the VS and GS for geometry shading if
the corresponding has_gs key is set in the shader key. Without it,
GS-specific intrinsics like load_per_vertex_input won't get lowered
and the GS header will be initialized with invalid values.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
2020-04-07 14:13:20 +00:00
Timur Kristóf
db2ee3686d radv: Print shader stage before disassembly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
aa42b504d6 aco: Print shader stage in aco_print_program.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
c24d9522da radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
64225c4f96 aco/ngg: Run GS_ALLOC_REQ on priority 3 for NGG VS and TES.
It is recommended to do this as quickly as possible.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
e4da482d9e aco/ngg: Schedule position exports of NGG VS/TES.
Similarly to the HW VS stage, the HW NGG GS stage also
benefits from executing these exports as early as possible.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
c633edad72 aco/ngg: Implement NGG VS and TES.
When NGG is used, vertex and tess eval shaders are executed on the
hardware NGG geometry stage. There is a series of steps they
must perform:

* Request GS space using GS_ALLOC_REQ
* Export the primitive
* Finally, export the normal VS outputs

In this commit, two modes are implemented:

* "late" which matches what the RADV LLVM backend currently does
* "early" which is an optimized version as seen in radeonsi

Vulkan doesn't allow the shader to write the edge flags, so we can
currently always use the "early" mode.

Exporting the primitive ID is also supported by having the GS threads
write that into LDS and reading them from LDS in the ES threads.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
c5ed0883fc aco/ngg: Setup NGG VS and TES stages.
ngg_vertex_gs and ngg_tess_eval_gs work very similarly to
vertex_vs and tess_eval_vs, but they run on the HW NGG GS stage.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
d7b4bb3a88 aco/ngg: Fix exports for NGG VS and TES.
The exports in NGG VS and TES work just like VS exports,
so the assembler needs to fix these too in the same manner.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
ec72c504c6 aco/ngg: Initialize exec mask for NGG VS and TES.
They behave like merged ESGS shaders, so the exec mask needs
to be manually initialized for these NGG shaders too.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
1436c0b8e0 aco/ngg: Add new stage for hw_ngg_gs.
This is needed to distinguish between NGG and legacy.
Otherwise, vertex_geometry_gs and ngg_vertex_geometry_gs
have the same value, which we want to avoid.

Also, there is no such thing as ngg_vertex_tess_control_hs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
35e58314d8 aco: Treat s_setprio as a scheduling barrier.
We want to execute instructions after s_setprio in the given
priority, so we must prevent the scheduler from scheduling beyond
s_setprio, otherwise some instructions could be executed in a
different priority.

Rename hazard_fail_memtime to hazard_fail_unreorderable and include
s_setprio in the list of unreorderable opcodes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
d345bfe195 aco: Extract merged_wave_info_to_mask to its own function.
Currently we only use this at the beginning of merged shader parts,
but we are going to need to use	it with	some NGG code as well.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
90b1047fdf aco: Print block_kind_export_end.
Useful when debugging issues with exports.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
b9cbdb6a45 aco: Extract uniform if handling to separate functions.
Currently we only use this for uniform ifs that come from NIR,
but we are going to need to use it with some NGG parts as well.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
2020-04-07 11:29:35 +00:00
Timur Kristóf
cc8a85d05a aco: Fix crash in insert_wait_states.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4465>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4465>
2020-04-07 09:51:14 +00:00
Alyssa Rosenzweig
eeb626257d pan/bit: Wire up add/add op+test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
e456630bd9 pan/bit: Add fmin/max16 tests
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
fc446dc322 pan/bit: Enable more debug for run
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
0e0f7f110c pan/bit: Add min/max support to interpreter
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
e9967e9f80 pan/bit: Unify test frontends
Random.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
f91929e515 pan/bi: Force ADD scheduling for MINMAX
Might be GPU version specific.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
9279ed1550 pan/bi: Fix incorrect abs flip in fma/fadd16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
3bbce876e6 pan/bi: Set BI_MODS for MINMAX
We support it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
822f127fe5 pan/bi: Add ADD add/min/max fp32 packing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
36e4c6b267 pan/bi: Structify ADD unit add/min/max
..since it's missing for FMA

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
f6bd0ec907 pan/bi: Implement min/max on FMA
Unfortunately, while this looks fine to the disasm, it's raising
INSTR_INVALID_ENC on my g31 board here. Looks like it might be ADD only
on newer Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
545fc7b26a pan/bit: Add special unit test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
8e50d44950 pan/bit: Add special op interpreting
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
c37c799284 pan/bi: Add fp16 support for frcp/frsq
More ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
d7bb7b79a8 pan/bi: Add 32-bit _FAST packing
For frcp/frsq on newer Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Alyssa Rosenzweig
a6ae2d8f94 pan/bi: Remove nontrivial SPECIAL ops
These require a lot more handholding in the IR than we can deal with at
this stage; we need to restrict ourselves to frcp/sqrt.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
2020-04-06 19:41:56 +00:00
Rhys Perry
20a4b1461b aco: zero-initialize Temp
Fixes dEQP-VK.transform_feedback.* crashes from accesses garbage
temporaries in emit_extract_vector().

Fixes: 85521061 ("aco: prepare helper functions for subdword handling")
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4463>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4463>
2020-04-06 19:15:19 +00:00
Rhys Perry
8dd6a51e80 aco: remove divergence check in sanitize_if()
We also need to do this if a side ends in a divergent break.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4461>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4461>
2020-04-06 18:39:29 +00:00
Rob Clark
57557783f6 nir/lower_amul: fix slot calculation
Fixes incorrect indexing in
dEQP-GLES31.functional.ssbo.layout.instance_array_basic_type.packed.mat2x3

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
2020-04-06 18:00:17 +00:00
Rob Clark
4638a16a93 nir: add some swizzle helpers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
2020-04-06 18:00:17 +00:00
Jason Ekstrand
e78a7a1825 nir: Assert memory loads are aligned
We've had alignment parameters on these operations for a while but a
bunch of places weren't setting them.  That should be resolved now so we
can start validating that they're always set.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4441>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4441>
2020-04-06 15:57:30 +00:00
Marek Olšák
068a3bf0d7 util: move and adjust the vertex upload heuristic equation from u_vbuf
This will also be used by glthread.

The new equation is optimized for glthread.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:30:10 -04:00
Marek Olšák
d9cb0ec5e6 vbo: expose helper function vbo_get_minmax_index_mapped for glthread
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:29:52 -04:00
Marek Olšák
e69e59778c mesa: split _mesa_primitive_restart_index into a function without gl_context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:29:38 -04:00
Marek Olšák
e6bc1702f4 mesa: precompute _mesa_primitive_restart_index during state changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:29:16 -04:00
Marek Olšák
10beee8a77 mesa: remove no longer needed _mesa_is_bufferobj function
All buffers have Name != 0.

Note that there is no longer the pointer dereference to get Name,
so it's faster.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
58fab9a6fe mesa: remove NullBufferObj
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
54525808aa mesa: don't ever bind NullBufferObj to glBindBuffer(Base,Range) slots
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
f3cce7087a mesa: don't ever bind NullBufferObj for glBindBuffer targets
Since VAOs don't use NullBufferObj for vertex attribs anymore, let's remove
more uses of NullBufferObj.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
e630271e0e mesa: don't ever set NullBufferObj in gl_vertex_array_binding
This improves performance by 5% in the game "torcs", FPS: 98.83 -> 103.73

It does a lot of glPush/PopClientAttrib, which exacerbates the overhead
of setting NullBufferObj.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:28:53 -04:00
Marek Olšák
a0a0c68150 mesa: optimize initialization of new VAOs
Precompute the default state in gl_context, and just copy it when we create
a VAO.

This also helps glPushClientAttrib function, which always creates a VAO,
which has a substantial CPU overhead in profiles.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4466>
2020-04-06 10:27:59 -04:00
Mauro Rossi
dbdd0149ed android: aco: add various compiler statistics
Fixes a building error due to compiler/aco_statistics.cpp
missing in src/amd/Makefile.sources

Fixes: b1544352 ("aco: add various compiler statistics")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
2020-04-06 12:59:13 +02:00
Hyunjun Ko
9f174eb2df nir: fix wrong assignment to buffer in xfb_varyings_info
Tested with dEQP-VK.transform_feedback.fuzz.various_buffers.buffers100_instance_array_vertex

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4459>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4459>
2020-04-06 08:55:05 +00:00
Tapani Pälli
84e845c969 mesa/st: release variants for active programs before unref
Programs can be shared among many contexts and each program holds a
variant list which has context specific variants. When context gets
destroyed it must make sure it relases all variants, otherwise remaining
context that utilizes same program will attempt to save a zombie shader
for already deleted context when releasing program and its variants.

Fixes:
   dEQP-EGL.functional.sharing.gles2.program.render

and other flaky multihread dEQP-EGL failures.

v2: pass program pointer via & (Marek)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4386>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4386>
2020-04-06 08:00:00 +03:00
Tapani Pälli
4822cc9700 mesa/st: unbind shader state before deleting it
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4386>
2020-04-06 08:00:00 +03:00
Alyssa Rosenzweig
82597c46c3 pan/bit: Add mode to run unit tests
Probably the most useful of the bunch going forward.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
1a1c55709e pan/bit: Make run more useful
..by printing some output.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
50476efb61 pan/bit: Add csel tests
..and pull out common instruction generation to reduce duplication in
tests a bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
9b262208b6 pan/bit: Add CSEL to interpreter
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
069189ff0f pan/bit: Add FMA tests
Now that the earlier reg ctrl issue is fixed these should pass.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
78ba6d50a4 pan/bit: Add 16-bit fmod tests
These raise another set of issues -- indeed, not all of these tests are
passing, since it turns out I have an actual bug in the packing code. So
after all this work, test bringup has identified an actual issue :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
40160c576d pan/bit: Add verbose printing for tests
We'd like to dump both the generated IR (so we know exactly what's being
tested) as well as the compiled program (so we know what's running for
comparison).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
7c887d368e pan/bit: Add helper for generating floating mod tests
We can iterate them, isn't that adorable!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
14c5343867 pan/bit: Add packing test framework
Given an instruction, we'd like to wrap it in a clause with some I/O on
each end so we can pack it up and send it to the hardware to compare
against the simulator.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
5e3e32e368 pan/bit: Implement floating source mods
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
dbb8a564f2 pan/bit: Implement outmods
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
ab58185604 pan/bit: Add preliminary FMA/ADD/MOV implementations
Missing some details about modifiers but the core structure should
look like this for 32 and 16-bit, I think. My sincerest apologies for
the macro magic, I tried to make it the least bad I could but trying to
keep down repitition.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
fbe504e221 pan/bit: Handle read/write
We case the various sources and destinations to model register file
access and passthrough in particular.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
7904a29340 pan/bit: Stub out BIR interpreter
We'd like to step through a BIR program to evaluate it for testing.
Let's stub out some infrastructure for modeling Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
8eefb2765a pan/bi: Match CSEL argument order with hw
It turns out ports need to be in order of the arguments of an
instruction (port 3, that is), which breaks on instructions whose IR
argument order is different from the packed order, like csel. So fix
that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
9114ebbe79 pan/bi: Add helper to debug port assignment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
0ab3f687c0 pan/bi: Handle BIFROST_FIRST_WRITE_FMA_P2_READ_P3
It's a special case for unclear reasons, and if you mess it up you get
INSTR_INVALID_ENC. Isn't hardware fun?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
75aabc6ea1 pan/bi: Allow BI_FMA to take mods
It doesn't take abs but it can take outmod/neg.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
69dde49f80 pan/bi: Don't gobble zero ports
In case we've reading/writing R0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
c7a6df4638 pan/bi: Fix negation in ADD.v2f16
When we flip the sources we need to flip the negates as well to stay
consistent.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
5f48caf98b pan/bi: Fix duplicated source in ADD.v2f16
Typo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Alyssa Rosenzweig
08fe1081b7 pan/bi: Export bi_class_name
For use in naming tests.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
2020-04-05 23:26:04 +00:00
Vasily Khoruzhick
c04964c690 lima: avoid situations when scissor minx > maxx or miny > maxy
Clip scissor to viewport and then to framebuffer to avoid that since
hardware can't handle this case.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4427>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4427>
2020-04-05 18:52:11 +00:00
Christian Gmeiner
eed5a00989 etnaviv: convert perfmon queries to acc queries
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
20e0ef88ed etnaviv: move generic perfmon functionality into own file
This change removes the basic infrastructure to work with perfmon
from the perfmon query impl and puts it into its own place.
Makes the whole series easier to review and ends smaller changes.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
c111f79b1c etnaviv: extend acc sample provide with an allocate(..)
We might be able to sub-class etna_acc_query.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
e0bc251ef8 etnaviv: extend result(..) to return if data is ready
For the upcoming conversion of perfmon queries to the acc query
framework we need a way to tell that the data is not ready.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
e5b0eed0f5 etnaviv: make use of a fixed size array to track of all acc query provider
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
6963fcd81f etnaviv: extend acc query provider with supports(..) function
Move the logic if a query provider supports a query_type
directly to the provider.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
f47b4eddd9 etnaviv: rework wait/flush logic
Saves us from doing an extra flush in !wait case and seems more
logical now. Also evaluate etna_bo_cpu_prep(..) retun value.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
d1697fef1a etnaviv: reset no_wait_cnt after triggered flush
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
2381904030 etnaviv: explicitly call resource_written(..)
We might end in cases where etna_acc_get_query_result(..) gets called
within one draw call (aka before flushing). At this point the status
of the resource was not set but gets used in etna_acc_get_query_result(..)
to handle different wait cases. Fix this issue by calling resource_written(..)
explicitly.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
f2c4892512 etnaviv: rework etna_acc_sample_provider
Simplify the interface a sampler provider needs to implement. The start(..)
and stop(..) functions got called by resume(..) and suspend(..) so lets
get rid of start(..) and stop(..). Also the way we count and use samples
is much easier to follow now.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Christian Gmeiner
46096a4cb4 etnaviv: rename hw queries to acc queries
The name hw queries was choosen as occlusion queries are 'feeling'
like nothing special. It is possible to interact with them only
via the command stream - unlike perfom queries where some kernel
magic is needed.

Accumulated HW queries is a much better name for this type of queries.
We read some hardware values over some draw calls and need to accumulate
them to get the final result.

This is some prep work for the following perfmon changes.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1530>
2020-04-05 18:01:43 +00:00
Eric Engestrom
7af813d48a glx: use anonymous namespace to avoid -Wodr issues when building with LTO enabled
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2597>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2597>
2020-04-04 17:46:05 +00:00
Eric Engestrom
17d783b2ed glx: fix 630 times -Wlto-type-mismatch when building with LTO enabled
The prototypes are simply copied from include/GL/gl*.h

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2597>
2020-04-04 17:46:05 +00:00
Jason Ekstrand
a0a4df7e4f Revert "spirv: Rewrite CFG construction"
This reverts commit fa5a36dbd4.
2020-04-04 09:47:00 -05:00
Dave Airlie
51492f20f7 Revert "gallivm: disable rgtc/latc SNORM accellerated fetches"
This reverts commit 4897e70ccd.

Fixed in previous commits.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
2020-04-04 12:37:20 +10:00
Dave Airlie
aa95b6aed5 gallivm/rgtc: enable fast path for snorm types.
As per Roland's suggestions it should be easy to enable the
fast path fetch for rgtc snorm as well here.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
2020-04-04 12:37:20 +10:00
Dave Airlie
03204dadbc gallivm/rgtc: fix the truncation to 8-bit
The 8 bit type wasn't 8-bit so when doing signed work we lost
the sign bit. This fixes it to use a proper vector type,
even if we just end up in here with the 1-wide path for now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4425>
2020-04-04 12:33:49 +10:00
Rob Clark
0b06adb750 glsl: don't limit fp16 lowering to frag
This restriction doesn't belong in core code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
f054230ea3 freedreno: limit fp16 to frag and compute
To avoid dealing w/ some backend varying linking issues when mixing
precision vs geom/tess.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
c0d56efa31 freedreno/ir3: also precompile compute shaders for shaderdb
Similar as with draw shaders, nothing will trigger the final variant in
shader-db.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
37e052c8b0 freedreno: fix missing locking
Fixes: d0b3ccb060 ("freedreno: Fix detection of being in a blit for acc queries.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
f8fc690d1c freedreno/a6xx: add some compute logging
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
629c0cee0a freedreno/ir3/cf: use ssa-uses
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
72f6b03aec freedreno/ir3: add a pass to collect SSA uses
We don't really track these as the ir is transformed, but it would be a
useful thing for some passes to have.  So add a pass to collect this
information.  It uses instr->data (generic per-pass ptr), with the
hashsets hanging under a mem_ctx for easy disposal at the end of the
pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
67dbe8088f freedreno/ir3/cf: skip array load/store
Don't fold conversions into array (incl phi lowered to regs/array).
These aren't SSA.  Avoids crashes in particular in frag shaders with
flow control, which would leave a dangling array write disconnect from
the original cov src.

Possibly this could be slightly relaxed, if there is no other consumer
of the src, and it were in the same block.  But it would require
updating block->keeps, and taking care of barrier state.  Which isn't a
thing the cf pass does currently.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
c2d0cc8b8d freedreno/ir3: fixup cat3 32b vs 16b
These should be keyed on src arg type.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
e73a8a9703 freedreno/ir3/cf: handle widening too
We can also fold f16->f32 conversions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Rob Clark
bf64648864 nir: fix definition of imadsh_mix16 for vectors
Fixes: c27b3758fa ("nir/opcodes: Add new 'umul_low' and 'imadsh_mix16' opcodes")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
2020-04-04 00:07:10 +00:00
Daniel Schürmann
1d293096d0 aco: use MUBUF to load subdword SSBO
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
8cfddc9199 aco: implement 8bit/16bit store_ssbo
Currently without alignment check, so that
we can only use the _byte and _short versions
and multi-component stores are split.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
3df0a41c75 aco: implement 8bit/16bit load_buffer
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
c70d014455 aco: implement storagePushConstant8 & storagePushConstant16
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
5718347c2b aco: implement vec2/3/4 with subdword operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
85521061d6 aco: prepare helper functions for subdword handling
- get_alu_src()
- emit_extract_vector()
- emit_split_vector()

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
fe08f0ccf9 aco: add byte_align_scalar() & trim_subdword_vector() helper functions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
23ac24f5b1 aco: add missing conversion operations for small bitsizes
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
d223e4e8de aco: don't vectorize 8/16bit load/store_ssbo
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
0bb3537676 aco: don't assume split_vector(create_vector) has the same number of elements when optimizing
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
c436743b0c aco: don't propagate SGPRs into subdword PSEUDO instructions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
8f1712ba2f aco: lower subdword shuffles correctly.
Note that subdword swaps are not yet implemented

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
ca38c1f1f1 aco: add builder function for subdword copy()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
9f779a2518 aco: small refactoring of shuffle code lowering
Uses now bytes instead of 32bit size

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
0680b258f4 aco: align subdword registers during RA when necessary
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
031edbc4a5 aco: adapt register allocation for subdword registers
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
2c74fc98b8 aco: create helper function to collect variables from register area
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
aca2bbf975 aco: add notion of subdword registers to register allocator
To not having to split the register file into single bytes,
we maintain a map with registers which contain subdword variables.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
90811554da aco: remove unnecessary reg_file.fill() operation in get_reg_create_vector()
No pipelinedb changes

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
7de003473c aco: fix Temp and assignment of renamed operands during RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
2d957311f1 aco: print subdword registers
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
3c0c28a1ff aco: validate RA of subdword assignments
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
799bb10328 aco: validate uninitialized operands
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
9374659426 aco: validate register alignment of subdword operands and definitions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
ad4e104bb9 aco: validate p_create_vector with subdword elements properly
Also allows for undef operands

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
f01bf51a2b aco: refactor regClass setup for subdword VGPRs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
c4223fa512 aco: add emission support for register-allocated sdwa sels
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
8acb384471 aco: add sub-dword regclasses
Co-authored-by: Rhys Perry <pendingchaos02@gmail.com>

Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
9915af5ca1 aco: print and validate opsel
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
b84d59af50 aco: add SDWA_instruction
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
00312f3c95 aco: add comparison operators for PhysReg
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Rhys Perry
34424b81df aco: make PhysReg in units of bytes
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Daniel Schürmann
dc69738b0f nir: fix unpack_64_4x16 in lower_alu_to_scalar()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
2020-04-03 23:13:15 +01:00
Lionel Landwerlin
373f1eb9de drm-shim: stub libdrm's use of realpath()
libdrm started using realpath to get the type of bus associated with a
given device. This stubs the very specific usage that prevents
drm-shim's device from being listed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
2020-04-03 21:14:18 +00:00
Lionel Landwerlin
c3e305616c drm-shim: return device platform as specified
v2: Embed the libdrm dependency inside the drm-shim dependency

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Eric Anholt <eric@anholt.net> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
2020-04-03 21:14:18 +00:00
Jason Ekstrand
fa5a36dbd4 spirv: Rewrite CFG construction
This commit completely rewrites the way we extract a structured CFG from
SPIR-V.  The new approach is different in a few ways:

 1. It does a breadth-first search instead of depth-first.  This means
    that we've visited the merge node for a construct before we visit
    any of the nodes inside the construct.  This makes it easier to
    validate things like loop and switch nesting.

 2. We record more information in the CFG.  Earlier commits added a
    parent pointer to vtn_cf_node but we now record all of the merge and
    other special blocks for each CFG node.  This lets us validate
    things more precisely.

 3. It makes heavy use of merge blocks for walking the CFG.  Previously,
    we sort of used them as hints for trying to guess the CFG structure
    but things got dicey whenever a merge was missing.  We had some
    heuristics for how to handle short-circuiting if statements but it
    was a bunch of special cases.

    Now, we make them a fundamental part of walking the CFG.  When we
    encounter a control-flow construct, we add the body components of
    the construct to the BFS work list and then jump to the merge block
    if one exists to continue scanning the current CFG nesting level.
    If no merge block exists, we assume that means that control-flow
    never re-converges in a normal way and that the only way to get back
    to normality is with a direct jump such as a loop break or continue.
    This should make things far more robust when trying to deal with the
    more creative placement (or lack thereof) of merge instructions.

Reviewed-by: Alan Baker <alanbaker@google.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
2de5a41595 spirv: Add a parent field to vtn_cf_node
This makes it easier to crawl up the CF tree when trying to validate the
incoming SPIR-V control-flow.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
d94e464a9f spirv: Make vtn_function a vtn_cf_node
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
255aacbec1 spirv: Make vtn_case a vtn_cf_node
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
9d7fcf1de0 spirv: Add cast and loop helpers for vtn_cf_node
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
8c5c65d0d6 spirv: Add a vtn_block() helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
2020-04-03 20:54:00 +00:00
Jason Ekstrand
991c426160 intel/nir: Enable load/store vectorization
This commit enables the I/O vectorization pass that was originally
written for ACO for Intel drivers.  We enable it for UBOs, SSBOs, global
memory, and SLM.  We only enable vectorization for the scalar back-end
because it vec4 makes certain alignment assumptions.

Shader-db results with iris on ICL:

    total instructions in shared programs: 16077927 -> 16068236 (-0.06%)
    instructions in affected programs: 199839 -> 190148 (-4.85%)
    helped: 324
    HURT: 0
    helped stats (abs) min: 2 max: 458 x̄: 29.91 x̃: 4
    helped stats (rel) min: 0.11% max: 38.94% x̄: 4.32% x̃: 1.64%
    95% mean confidence interval for instructions value: -37.02 -22.80
    95% mean confidence interval for instructions %-change: -5.07% -3.58%
    Instructions are helped.

    total cycles in shared programs: 336806135 -> 336151501 (-0.19%)
    cycles in affected programs: 16009735 -> 15355101 (-4.09%)
    helped: 458
    HURT: 154
    helped stats (abs) min: 1 max: 77812 x̄: 1542.50 x̃: 75
    helped stats (rel) min: <.01% max: 34.46% x̄: 5.16% x̃: 2.01%
    HURT stats (abs)   min: 1 max: 22800 x̄: 336.55 x̃: 20
    HURT stats (rel)   min: <.01% max: 17.11% x̄: 2.12% x̃: 1.00%
    95% mean confidence interval for cycles value: -1596.83 -542.49
    95% mean confidence interval for cycles %-change: -3.83% -2.82%
    Cycles are helped.

    total sends in shared programs: 814177 -> 809049 (-0.63%)
    sends in affected programs: 15422 -> 10294 (-33.25%)
    helped: 324
    HURT: 0
    helped stats (abs) min: 1 max: 256 x̄: 15.83 x̃: 2
    helped stats (rel) min: 1.33% max: 67.90% x̄: 21.21% x̃: 15.38%
    95% mean confidence interval for sends value: -19.67 -11.98
    95% mean confidence interval for sends %-change: -23.03% -19.39%
    Sends are helped.

    LOST:   7
    GAINED: 2

Most of the helped shaders were in the following titles:

 - Doom
 - Deus Ex: Mankind Divided
 - Aztec Ruins
 - Shadow of Mordor
 - DiRT Showdown
 - Tomb Raider (Rise, I think)

Five of the lost programs are SIMD16 shaders we lost from dirt showdown.
The other two are compute shaders in Aztec Ruins which switched from
SIMD8 to SIMD16.

Vulkan pipeline-db stats on ICL:

    Instructions in all programs: 296780486 -> 293493363 (-1.1%)
    Loops in all programs: 149669 -> 149669 (+0.0%)
    Cycles in all programs: 90999206722 -> 88513844563 (-2.7%)
    Spills in all programs: 1710217 -> 1730691 (+1.2%)
    Fills in all programs: 1931235 -> 1958138 (+1.4%)

By far the most help was in the Tomb Raider games.  A couple of Batman
games with DXVK were also helped.  In Shadow of the Tomb Raider:

    Instructions in all programs: 41614336 -> 39408023 (-5.3%)
    Loops in all programs: 32200 -> 32200 (+0.0%)
    Cycles in all programs: 1875498485 -> 1667034831 (-11.1%)
    Spills in all programs: 196307 -> 214945 (+9.5%)
    Fills in all programs: 282736 -> 307113 (+8.6%)

Benchmarks of real games I've done on this patch:

 - Rise of the Tomb Raider: +3%
 - Shadow of the Tomb Raider: +10%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
36a32af008 nir/load_store_vectorize: Add support for nir_var_mem_global
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
b6273291b5 nir/load_store_vectorize: Use nir_iadd_imm for offsets
This makes it capable of handling 64-bit offsets

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
04d08ea149 nir/load_store_vectorize: Fix shared atomic info
These were clearly copied and pasted from SSBOs.  The shared atomics
don't have an SSBO index so their offset is src0 and data is src1.

Fixes: ce9205c03b "nir: add a load/store vectorization pass"
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
c1bcb025db intel/nir: Lower memory access bit sizes later
We're about to do load/store vectorization right before this but we need
that to happen after we've done a round of optimization.  Otherwise,
we'll be getting unoptimized NIR in from ANV and the vectorizer won't be
able to do anything with it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
f1883cc73d iris: Set alignments on cbuf0 and constant reads
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
4c8b100388 anv: Improve brw_nir_lower_mem_access_bit_sizes
This commit makes us take both bit size and alignment into account so
that we can properly handle cases such as when we have a 32-bit store
to an 8-bit-aligned address.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Jason Ekstrand
c643979228 intel/fs: Choose memory message type based on bit size
Thanks to the NIR vectorizing pass, we're about to see alignments that
are higher than the bit size.  Previously, we could use either and we
just happened to choose alignment (probably the wrong choice) so it's
harmless to switch to detecting based on bit size.  This commit changes
things to take both into account which is more accurate to what the
messages we're using do.  We also beef up the asserts and make them more
consistent, more accurate, and more complete.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
2020-04-03 20:26:54 +00:00
Brian Ho
6e76453472 ir3: Disable copy prop for immediate ldlw offsets
Immediate offsets are currently collapsed for ldlw, but ldlw does
behave correctly with immediate values. For example,
`ldlw.u32 r0.x, l[4], 1` actually means to use the value of
regid 4 (r1.x) as the offset when we actually want it to use the
imm value of 4 as the offset.

This commit disables copy prop for ldlw offsets so the same
intrinsic gets compiled to:
  mov.u32u32 r0.y, 0x00000004
  ldlw.u32 r0.x, l[r0.y], 1

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4439>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4439>
2020-04-03 19:44:46 +00:00
Rhys Perry
ea51f8f79a radv: fix null winsys gpu_info array
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: de550805c5 ('radv/winsys: spoof some values for num_render_backends in the null winsys')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4437>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4437>
2020-04-03 17:40:32 +00:00
Icecream95
319158a814 pan/midgard: Fix a divide by zero in emit_alu_bundle
util_dynarray_grow_bytes divides by eltsize, but it's possible for
bundle->padding to be zero.

I changed the other call to util_dynarray_grow_bytes for consistency.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4397>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4397>
2020-04-03 16:49:04 +00:00
Brian Ho
355abfeed5 turnip: Advertise 8 bit subpixel precision
Previously, turnip advertised 4-bit subpixel precision when in
practice, a6xx seems to render with 8-bit precision. This caused
dEQP-VK.renderpass2.suballocation.subpass_dependencies.late_fragment_tests.*
to fail because they compare images rendered with turnip against
ones rendered via a software reference implementation parameterized
by turnip's VkPhysicalDeviceLimits.subPixelPrecisionBits value.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4172>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4172>
2020-04-03 16:27:56 +00:00
Pierre-Eric Pelloux-Prayer
61566f2ae1 mesa: update pipeline when re-linking a program in use
Updating was only done for bound program, so add the
same logic for existing pipelines.

This fixes piglit test arb_shader_storage_buffer_object-issue1258.
It might also help the following issue:
  https://gitlab.freedesktop.org/mesa/mesa/-/issues/1258

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4404>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4404>
2020-04-03 13:42:43 +00:00
Ilia Mirkin
1288ac7632 nv50: don't try to upload MSAA settings for BUFFER textures
We need the MSAA scaling parameters to properly fetch samples from MSAA
textures. These are stored in the miptree which wraps all regular
textures. However it does not wrap buffer textures, so make sure to skip
them rather than accessing out-of-bounds or unmapped memory.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2727
Fixes: 3bd40073b9 ("nv50: add support for texelFetch'ing MS textures")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4424>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4424>
2020-04-03 13:00:08 +00:00
Lionel Landwerlin
b38c32a573 intel/aub_viewer: fix access to freed memory
Windows closed while we're displaying them might lead to invalid
memory accessed, so use the safe iterators on the list of windows.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4430>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4430>
2020-04-03 15:46:24 +03:00
Rhys Perry
7e6aec6687 radv, aco: collect statistics if requested but executables are not
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Rhys Perry
507956ed04 aco: add vmem/smem score statistic
This isn't perfect (for example, changes might not be too meaningful when
comparing shaders with different control flow) but it should be useful for
evaluating scheduler changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Rhys Perry
b1544352c0 aco: add various compiler statistics
Adds these statistics:
- hash of code and constant data
- number of instructions
- number of copies from pseudo-instructions
- number of branches
- estimate of cycles spent not waiting in s_waitcnt
- number of vmem/smem "clauses"
- sgpr/vgpr usage before scheduling

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Rhys Perry
ad2703653f radv: add code for exposing compiler statistics
Statistics will be added to ACO in later commits.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
2020-04-03 12:12:08 +00:00
Daniel Stone
bfb9c08e5c EGL: Add eglSetDamageRegionKHR to GLVND dispatch list
This was missed in the original conversion, which added support for
eglSetDamageRegionKHR to local EGL exports, but forgot to generate
updated dispatch for GLVND.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: 9827547313 ("egl/android: support for EGL_KHR_partial_update")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4403>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4403>
2020-04-03 12:22:51 +01:00
Eric Engestrom
8af2eba424 docs: update calendar, add news item, and link releases notes for 20.0.4
Note that the next 20.0.x releases numbers have been shifted as this was
not one of the planned releases.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
2020-04-03 13:16:07 +02:00
Eric Engestrom
a89b08b744 docs/relnotes: add sha256sum for 20.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
2020-04-03 13:11:59 +02:00
Eric Engestrom
71e6f15a24 docs: add release notes for 20.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
2020-04-03 13:11:59 +02:00
Pierre-Eric Pelloux-Prayer
43f785419c util/xmlconfig: fix sha1 comparison code
Fixes: 8f48e7b1e9 ("util/xmlconfig: add new sha1 application attribute")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2730
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4426>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4426>
2020-04-03 11:44:00 +02:00
Samuel Pitoiset
655e8449d0 radv/llvm: enable 16-bit storage features on GFX6-GFX7
Should allow to play Doom Eternal on GFX6-GFX7 because the
driver now supports storageBuffer16BitAccess.

It's now supported and all CTS tests pass.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/857
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
3cd5450df5 ac/nir: split 16-bit SSBO stores on GFX6
Due to possible alignment issues, make sure to split stores of
16-bit vectors.

Doom Eternal requires storageBuffer16BitAccess.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
55fdcc03de ac/nir: split 16-bit load/store to global memory on GFX6
Due to possible alignment issues, make sure to split loads/stores
of 16-bit vectors.

Doom Eternal requires storageBuffer16BitAccess.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
7308f2e912 radv/llvm: enable 8-bit storage features on GFX6-GFX7
It's now supported and all CTS tests pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
c6bf1597d1 ac/nir: split 8-bit SSBO stores on GFX6
Due to possible alignment issues, make sure to split stores of
8-bit vectors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
433f3380eb ac/nir: split 8-bit load/store to global memory on GFX6
Due to possible alignment issues, make sure to split loads/stores
of 8-bit vectors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
Samuel Pitoiset
c953292630 aco: always optimize v_mad to v_madak in presence of literals
v_mad and v_madak are both 64-bit instructions, so it doesn't
increase code size to always apply a 32-bit literal instead of
using v_mad and a sgpr which contains that literal.

Found with some Youngblood shaders but help some other games.

vkpipeline-db (VEGA10):
Totals from affected shaders:
SGPRS: 46168 -> 46016 (-0.33 %)
VGPRS: 45576 -> 45564 (-0.03 %)
Code Size: 5187208 -> 5179584 (-0.15 %) bytes
Max Waves: 3297 -> 3297 (0.00 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4410>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4410>
2020-04-03 07:30:49 +00:00
Neil Roberts
63b4fcba33 glsl/lower_precision: Use vector.back() instead of vector.end()[-1]
The use of vector.end()[-1] seems to generate warnings in Coverity about
not allowing a negative argument to a parameter. The intention with the
code snippet is just to access the last element of the vector. The
vector.back() call acheives the same thing, is clearer and will
hopefully fix the Coverity warning.

I’m not exactly sure why Coverity thinks the array index can’t be
negative. cplusplus.com says that vector::end() returns a random access
iterator and that the type of the array index operator argument to that
should be the difference type for the container. It then also says that
difference_type for a vector is "a signed integral type".

Reviewed-by: Eric Anholt <eric@anholt.net>
2020-04-03 09:10:17 +02:00
Karol Herbst
ff1a3a00cb clover: fix build with single library clang build
Closes: #2560
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4417>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4417>
2020-04-03 04:07:38 +00:00
Drew Davenport
2243f0cd01 radv: Filter extensions not whitelisted for Android
Android enforces through CTS a whitelist of Vulkan extensions that are
allowed in each Android version. When building radv for Android, disable
extensions that are unknown to the version of Android for which
radv is being built.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4398>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4398>
2020-04-03 02:25:50 +00:00
Ilia Mirkin
d6368d404b st/vdpau: make query test for 2D support
The 3D check has been there since the dawn of time, but I see no reason
for it, most likely a typo. When the surfaces are actually created, they
use the 2D resource type (as expected).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
2020-04-03 01:40:35 +00:00
Ilia Mirkin
c1cc79739a st/vdpau: avoid asserting on new VDP_YCBCR_* formats
Depending on user's vdpau headers, not all of those defines may exist.
Eventually we may want a private copy of these, but this is simple
enough for now.

Fixes asserts when running vdpauinfo which supports these recently added
formats.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
2020-04-03 01:40:35 +00:00
Jason Ekstrand
c71c1f44b0 nir/from_ssa: Only chain movs when a src is also a dest
The algorithm we use for resolving parallel copy instructions plays this
little shell game with the values.  The reason for this is that it lets
us handle cases where, for instance we have a -> b and b -> a and we
need to use a temporary to do a swap.  One result of this algorithm is
that it tends to emit a lot of mov chains which are typcially really bad
for GPUs where a mov is far from free.  For instance, it's likely to
turn this:

    r16 = ssa_0; r17 = ssa_0; r18 = ssa_0; r15 = ssa_0

into this:

    r15 = mov ssa_0
    r18 = mov r15
    r17 = mov r18
    r16 = mov r17

which, if it's the only thing in a block (this is common for phis) is
impossible for a scheduler to fix because of the dependencies and you
end up with significant stalling.  If, on the other hand, we only do the
chaining in the actual case where we need to free up a so that it can be
used as a destination, we can emit this:

    r15 = mov ssa_0
    r18 = mov ssa_0
    r17 = mov ssa_0
    r16 = mov ssa_0

which is far nicer to the scheduler.  On Intel, our copy propagation
pass will undo the chain for us so this has no shader-db impact.
However, for less intelligent back-ends, it's probably a lot better.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4412>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4412>
2020-04-02 19:06:46 +00:00
Connor Abbott
73e574acb8 freedreno: Rename RB_DONE_TS
This makes the various cache_flush implementations make more sense.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
2020-04-02 16:18:25 +00:00
Connor Abbott
36133a5434 freedreno: Cleanup event names
It turns out that every *_TS event, i.e. every event which requires a
seqno pointer, also allows generating an interrupt in the kernel, at
least since a3xx. And furthermore these interrupts are named by the kgsl
kernel driver and already in envytools. Therefore it's possible to map
out what the *_TS events are with 100% certainty, given access to the
hardware, by sending a CP_EVENT_WRITE with bit 31 set, unmasking all
interrupts in the kernel, and logging which ones get hit. I've done this
for a6xx, and I've also looked at the a5xx firmware, and the list of TS
interrupts is the same as a6xx, so I have a pretty good idea of what the
a5xx events are. I also fixed a few related things along the way:

- VIZQUERY_END overlaps with WT_DONE_TS, but VIZQUERY_START was also a
mess, with neither VIZQUERY_START nor HLSQ_FLUSH using variants. I added
what seems like reasonable variants, based on the existing comment
and the fact that HLSQ_FLUSH is only used in Mesa with a3xx and a4xx.
- CACHE_FLUSH_AND_INVALIDATE seems to come straight from R600, and I
have no idea if it's actually valid with a2xx, but given that RB_DONE_TS
exists in the interrupt mask since a3xx, I guessed that RB_DONE_TS
hasn't changed position since then and put it down as a3xx+ and limited
CACHE_FLUSH_AND_INVALIDATE to a2xx. Someone with the relevant hardware
should be able to confirm.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
2020-04-02 16:18:25 +00:00
Roland Scheidegger
2077421437 gallivm: fix stream id fetch
Fetching the stream id directly can crash since bld->immediates may not
exist (if there's too many immediates or we use the array due to indirect
accesses). So just call emit_fetch_immediate instead.

v2: fix the swizzle

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
2020-04-02 15:53:23 +00:00
Roland Scheidegger
0a3a880670 gallivm: switch the mask6/mask7 cases for signed rgtc formats
This fixes some regressions where -1.0/1.0 results got flipped, but it's still
broken in some cases.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
2020-04-02 15:53:23 +00:00
Roland Scheidegger
ebb5b88a02 gallivm: fix rgtc2 format
In some cases, there can be garbage in the upper bits after the channel
decode - for dxt5 this didn't matter (as the upper bits are shifted out
anyway) but for rgtc2 formats it does.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
2020-04-02 15:53:23 +00:00
Jason Ekstrand
5cc27d59a1 anv/image: Use align_u64 for image offsets
The ALIGN functions in util/u_math.h work on uintptr_t whose size
changes depending on your platform.  Use ones which take an explicit
64-bit type instead to avoid 32-bit platform issues.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4414>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4414>
2020-04-02 15:08:42 +00:00
Adam Jackson
4e3a7dcf6e gallium: enable EGL_EXT_image_dma_buf_import_modifiers unconditionally
This is a re-do of [1].

Enable EGL_EXT_image_dma_buf_import_modifiers with
EXT_image_dma_buf_import. This allows users to use queryDmaBufFormats to
query the list of supported formats even if modifiers are not supported.

With this change, queryDmaBufModifiers always returns zero modifiers. A
compositor survey reveals that this should be fine: wlroots [2],
Weston [3], Mutter [4] [5], kwin [6] and xorg-xserver [7] seem to all
support this case gracefully.

Tested with Sway and wlroots by running weston-info and checking the
list of formats advertised by zwp_linux_dmabuf_v1. Also ran weston-simple-egl
and checked zwp_linux_dmabuf_v1 was used instead of wl_drm.

[1]: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1812
[2]: 8707a9b7ec/render/egl.c (L629)
[3]: 786490cb53/libweston/renderer-gl/gl-renderer.c (L2337)
[4]: f0df07cba3/src/wayland/meta-wayland-dma-buf.c (L486)
[5]: 0a6034ef3a/src/backends/native/meta-renderer-native.c (L399)
[6]: https://cgit.kde.org/kwin.git/tree/platformsupport/scenes/opengl/egl_dmabuf.cpp?id=9b7ab4d16a8ee0cb35108362ee5aa046f4ae20b7#n473
[7]: 26004df63c/glamor/glamor_egl.c (L682)

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4298>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4298>
2020-04-02 14:22:58 +00:00
Marek Olšák
e0aa203fa9 driconf: whilelist more games for glthread
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4402>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4402>
2020-04-02 09:55:57 -04:00
Rohan Garg
d0f836e5ae tracie: Switch to using shutil.move for cross filesystem moves
When running tracie in a docker container, renaming files from
inside the container to a bind-mounted folder on the host causes
a invalid cross-device link due to os.rename limitations.

Switching to shutil allows us to overcome this.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4377>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4377>
2020-04-02 10:53:05 +00:00
Erik Faye-Lund
7b7dbd4fc8 wgl: do not create screen from DllMain
There's a lot of operations that aren't allowed from DllMain, so we
shouldn't create a driver-screen from there. So let's instead delay this
until it's needed from a normal function call.

See https://docs.microsoft.com/en-us/windows/win32/dlls/dllmain for
details about what is allowed and isn't from DllMain.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Erik Faye-Lund
99a0864b48 wgl: move screen-init to a helper
This will be useful in the next commit.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Erik Faye-Lund
098d4cf25f wgl: drop unused member
While we're at it, drop trying to re-calculate the max-size from the
max-level. It's not accurate on any drivers where the max-size isn't a
power of two anyway.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Erik Faye-Lund
0a8da6102d wgl: drop pointless debug_printf
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>
2020-04-02 09:51:58 +00:00
Pierre-Eric Pelloux-Prayer
dbc86fa3de radeonsi: dump shader stats when hitting the live cache
With the introduction of the live shader cache, when a shader is
fetched from the cache no stats are printed for shaderdb.
So in a sequence like this: vs1, fs1, vs1, fs2, shaderdb may see
3 or 4 lines, depending on the threads being used.
If one run produces 3 lines while the other produces 4 lines, it
would compare vs1 stats with fs2 stats.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
2020-04-02 08:31:37 +02:00
Pierre-Eric Pelloux-Prayer
8306c533fe gallium/util: let shader live cache users know if a hit occured
This will be used in next commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
2020-04-02 08:31:37 +02:00
Timothy Arceri
d259768e62 glsl_to_nir: remove dead code
This code was made unused by the changes described in be2990d8fb.

NIR based Gallium drivers switched to the NIR based lowering in
efa4fc0ebd.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4415>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4415>
2020-04-02 04:49:10 +00:00
Juan A. Suarez Romero
191ced539a anv/pipeline: allow more than 16 FS inputs
A fragment shader can have more than 16 inputs, so SBE emission should
deal with all of them.

This fixes dEQP-VK.pipeline.max_varyings.*

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
2020-04-01 23:36:28 +00:00
Juan A. Suarez Romero
460de2159e intel/compiler: store the FS inputs in WM prog data
Store the fragment shader inputs in the program data so we can use them
later when required without needing the NIR shader.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
2020-04-01 23:36:28 +00:00
Juan A. Suarez Romero
67c7cabd7f anv: use urb_setup_attribs in SBE
Avoid looping over all VARYING_SLOT_MAX urb_setup arrray entries.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2010>
2020-04-01 23:36:28 +00:00
Eric Engestrom
1ac9f362e0 docs: update calendar, add news item, and link releases notes for 20.0.3
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
2020-04-02 00:06:57 +02:00
Eric Engestrom
a264edd74c docs/relnotes: add sha256sum for 20.0.3
(cherry picked from commit a680481532)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
2020-04-02 00:04:10 +02:00
Eric Engestrom
2e01090b54 docs: add release notes for 20.0.3
(cherry picked from commit b04ae1f964)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4413>
2020-04-02 00:04:10 +02:00
Dave Airlie
2a2fd4c530 gallium/llvmpipe: add an optimised 32-bit memset
This might have other users beyond filling/clearing buffers,

increase a fullscreen 4k gears from 68->74 fps on my Ryzen
since gears is really just a clear benchmark, and this helps
clearing.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4394>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4394>
2020-04-01 20:58:23 +00:00
Mark Janes
c07bbdbe82 nir: place aligned members after bitfields in shader_info.tess
The placement of new shader_info.tess members unnecessarily wastes
space by interspersing 64bit members between bitfields.

Fixes: f1dd81ae10 ("nir: Collect if shader uses cross-invocation or indirect I/O.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
2020-04-01 20:25:55 +00:00
Mark Janes
90a8b458ac nir: check shader type before writing to shaderinfo.tess union
If the shader is not a tesselation shader, then writing to the tess
member of the shaderinfo union will overwrite other members and crash.

Closes: #2722
Fixes: f1dd81ae10 ("nir: Collect if shader uses cross-invocation or indirect I/O.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
2020-04-01 20:25:55 +00:00
Danylo Piliaiev
e47bf7dadf anv: Do not sample from 3d depth image with HiZ
For Gen8-11, there are some restrictions around sampling from HiZ.
The Skylake PRM docs for RENDER_SURFACE_STATE::AuxiliarySurfaceMode
say:

    "If this field is set to AUX_HIZ, Number of Multisamples must
    be MULTISAMPLECOUNT_1, and Surface Type cannot be SURFTYPE_3D."

Fixes: dEQP-VK.geometry.layered.3d.*.readback

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2720
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4409>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4409>
2020-04-01 20:12:29 +00:00
Krzysztof Raszkowski
0487130d34 gallium/swr: Re-enable scratch space for client-memory buffers
Commit 7d33203b44 fixed race condition
in freeing scratch memory mechanism but that approach creates
performance regression in some cases. This change revert previous
changes and fix freeing scratch memory mechanism.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4406>
2020-04-01 20:00:06 +00:00
Krzysztof Raszkowski
37b8130bf9 gallium/swr: Fix array stride problem.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4405>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4405>
2020-04-01 19:43:50 +00:00
Eric Anholt
c1e7e83d52 ci: Consistently use -j4 across x86 build jobs and -j8 on ARM.
Our shared runners are set up for concurrent jobs ~= CPUs / 4 (x86) or 8
(ARM).  If you use more build processes than that, then jobs may be
fighting each other for shared system resources, possibly to the point of
failure (we've seen one of the runners OOM on some jobs before, though I'm
not sure if this was the cause).

To try to systematically prevent the problem, we make a ninja wrapper in
the containers that passes the -j flags, and set MAKEFLAGS in the
container builds.  This doesn't cover make in non-container builds, but I
believe we don't have any of those.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3782>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3782>
2020-04-01 18:33:58 +00:00
Samuel Pitoiset
2f424c83e0 aco: only break SMEM clauses if XNACK is enabled (mostly APUs)
According to LLVM, it seems only required for APUs like RAVEN, but
we still ensure that SMEM stores are in their own clause.

pipeline-db (VEGA10):
Totals from affected shaders:
SGPRS: 1775364 -> 1775364 (0.00 %)
VGPRS: 1287176 -> 1287176 (0.00 %)
Spilled SGPRs: 725 -> 725 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 65386620 -> 65107460 (-0.43 %) bytes
Max Waves: 287099 -> 287099 (0.00 %)

pipeline-db (POLARIS10):
Totals from affected shaders:
SGPRS: 1797743 -> 1797743 (0.00 %)
VGPRS: 1271108 -> 1271108 (0.00 %)
Spilled SGPRs: 730 -> 730 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 64046244 -> 63782324 (-0.41 %) bytes
Max Waves: 254875 -> 254875 (0.00 %)

This only affects GFX6-GFX9 chips because the compiler uses a
different pass for GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4349>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4349>
2020-04-01 17:50:31 +00:00
Jason Ekstrand
68f325b256 Revert "spirv: Implement OpCopyObject and OpCopyLogical as blind copies"
This reverts commit 7a53e67816.
2020-04-01 12:40:34 -05:00
Emil Velikov
91478db20d loader: fallback to kernel name, if PCI fails
Currently, if the PCI machinery fails, we return a NULL driver name.
In the past this has resulted in various workarounds.

To avoid those, fallback to loader_get_kernel_driver_name(). It's not
perfect, yet perfectly reasonable.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
bf1838838a loader: move "using driver..." message to loader_get_kernel_driver_name
Move the message to the function which fetches the name.

While here use the same DEBUG/WARNING approach like in the PCI case. The
current method spam a tad much, plus isn't consistent.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
e3572f977f loader: simplify codeflow in drm_get_pci_id_for_fd
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
164f4a9a4a loader: simplify loader_get_user_preferred_fd()
Reoder the function a bit to make the code-flow more obvious and short.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
25b2b32588 loader: use a maximum of 64 drmDevices
Currently that's the hard-coded maximum in the kernel, even though the
libdrm API allows for more. Latter is done with extendability in mind.

Allocate 64 pointers^Wdevices on stack for now. Making for shorter and
ever-so-slightly faster code.

v2: Use single MAX_DRM_DEVICES #define (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com> (v1)
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:57:22 +01:00
Emil Velikov
d3c9143971 Revert "egl/dri2: Don't dlclose() the driver on dri2_load_driver_common failure"
This reverts commit 1b87f4058d.

dlclose() of the handle is perfectly reasonable, a follow-up NULL
assignment is missing.

As-is this causes a leak for nearly every platform, since they call
dri2_load_driver* initially, followed by a second swrast fallback call.

Some platforms even loop through the existing drivers probing.

Revert the commit and add the NULL check.

Fixes: 1b87f4058d ("egl/dri2: Don't dlclose() the driver on dri2_load_driver_common failure")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:24:19 +01:00
Emil Velikov
fa5e800e05 egl/drm: reinstate (kms_)swrast support
With earlier commit we've added a generic LIBGL_ALWAYS_SOFTWARE handling
yet did not consider that the existing codebase unconditionally errors
out when set. That was fixed with a latter commit, while the fix itself
added erroneous restriction for egl/drm.

As mentioned in the report - the feature was working for ages. It was a
Gnome developer who added kms_swrast support for gbm in the first place.

Admittedly kms_swrast is somewhat in the middle between traditional
swrast and HW drivers, regardless - reinstate support.

Fixes: 47273d7312 ("egl: set UseFallback if LIBGL_ALWAYS_SOFTWARE is set")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/165
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:21:36 +01:00
Emil Velikov
b699d070a6 glx: set the loader_logger early and for everyone
Currently we set the logger only for DRI3. Even though it's used nearly
everywhere. For platforms where we don't the function is effectively a
no-op.

With this in place, LIBGL_DEBUG=verbose works across the board.

Fixes: d971a4230d ("loader: Factor out the common driver opening logic from each loader.")
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:21:32 +01:00
Emil Velikov
06f758b093 meson: glx: drop with_glx == dri check
We can get into src/glx only with with_glx == dri. Thus there's no point
in the secondary, nested, check - it's always true.

Cc: Dylan Baker <dylan@pnwbakers>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4084>
2020-04-01 16:21:28 +01:00
Erik Faye-Lund
70ac7f5b0c mesa/main: remove unused macro
This macro is no longer used, so let's get rid of it.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
9ddd9d454c mesa/main: clean up extension-check for GL_TEXTURE_EXTERNAL
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
dd6b35c99e mesa/main: clean up extension-check for GL_RASTERIZER_DISCARD
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
0006dfbaed mesa/main: clean up extension-check for GL_TEXTURE_CUBE_MAP_SEAMLESS
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
994675b24d mesa/main: clean up extension-check for GL_FRAGMENT_SHADER_ATI
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
541708680f mesa/main: clean up extension-check for AMD_depth_clamp_separate
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
e2dbd31dc0 mesa/main: clean up extension-check for GL_DEPTH_BOUNDS_TEST
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
67a7022f83 mesa/main: clean up extension-check for GL_STENCIL_TEST_TWO_SIDE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
421a1accf0 mesa/main: clean up extension-check for GL_TEXTURE_RECTANGLE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
81d901aef1 mesa/main: clean up extension-check for GL_VERTEX_PROGRAM_POINT_SIZE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
a5e781aa80 mesa/main: clean up extension-check for GL_VERTEX_PROGRAM_TWO_SIDE
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
12e228fc9c mesa/main: clean up extension-check for GL_VERTEX_PROGRAM
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
23570066bf mesa/main: clean-up extension-checks for point-sprites
This is the only user of the CHECK_EXTENSION2 macro, so let's remove
that while we're at it.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:57 +02:00
Erik Faye-Lund
70b6972140 mesa/main: correct extension-checks for GL_BLACKHOLE_RENDER_INTEL
KHR_blend_equation_advanced_coherent isn't exposed on OpenGL ES 1.x
nor OpenGL versions prior to 30, so we shouldn't allow to query its
enum-states there either.

Fixes: 74ec39f66d ("mesa: add INTEL_blackhole_render")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/329>
2020-04-01 12:57:43 +02:00
Eric Anholt
1e3b74ee73 loader: Warn when we fail to open a device node due to permissions.
This is definitely not the first time I've debugged why I'm getting swrast
on a device only to find out I'm not a member of the render node's group.

This does mean that you'll get a warning print even without EGL_LOG_LEVEL
set.  This may be an issue if we expect people outside of the DRI node's
group to actually be using swrast instead of getting their permissions
fixed.  Right now surfaceless throws a "libEGL warning: No hardware driver
found, falling back to software rendering" in that case anyway, so this is
just more informative.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3703>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3703>
2020-04-01 09:32:25 +00:00
Thomas Hellstrom
15a9f6c072 svga: Treat forced coherent maps as maps of persistent memory
A previous commit made sure we sent a BindGBSurface command at map time
rather than at unmap time for persistent memory. To be consistent, do the
same for forced coherent maps. This makes it possible to avoid the
explicit UpdateGBSurface at unmap time for discard maps and to instead rely
on the kernel's dirty-tracking mechanism at the cost of an additional flush.

Tested with SVGA_FORCE_COHERENT=1, piglit run quick. No regressions.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4399>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4399>
2020-04-01 08:58:28 +02:00
Thomas Hellstrom
46fdc288fb svga, winsys/svga: Fix persistent memory discard maps
The kernel driver requires immediate notification using a
BindGBSurface command when a graphics coherent memory resource changes
backing MOB, so that it can start dirty-tracking the new MOB.
Since we always use graphics coherent memory for persistent memory, enqueue
and flush a BindGBSurface commmand at map time rather than at unmap time.
Since we're dealing with persistent memory, It's OK to flush while mapped.

This fixes an issue with gnome-shell / Wayland which uses persistent
memory together with discard maps when we advertise ARB_buffer_storage.
XWayland clients will render incorrectly.

Fixes: 71b43490dd ("svga: Support ARB_buffer_storage")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4399>
2020-04-01 08:38:04 +02:00
Alyssa Rosenzweig
1b16d6354b pan/bi: Fix outmod/roundmode flip
I misread the disassembler, the fields are in the other order.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
12cf9f43f0 pan/bi: Handle fmov class ops
We need to lower them to something reasonable (ideally, the modifier
would be attached but we need to do something for the case it's not). We
specifically have to lower pre-sched as well, but we can do the lower
literally at schedule time for now (if this proves annoying, we can move
it earlier, but I want to leave room for modifier-aware copyprop should
that prove interesting).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
357b8b5906 pan/bi: Fix unused port swapping
Fixes INSTR_INVALID_ENC

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
b150fa214b pan/bi: Add cmdline option for verbose disassembly
Useful for debugging packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
ae4f48b2bc pan/bi: Don't set the back-to-back bit yet
This is bad for performance but we can't assume it's true without some
analysis, which we presently don't do. Leave it for future work and
don't break the present.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
0b241c70b6 pan/bi: Use STAGE srcs for scheduler nops
..rather than using port 0 for the source, which may or may not actually
exist.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
2292e2aa10 pan/bi: Fix writes_component for VECTOR
I'm not convinced this is the best way and it's sort of a hack, but it
fixes RA for st_vary.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
b033189dd7 pan/bit: Wire through I/O
We'd like to wire in attributes and uniforms as inputs and look at the
varying as output for automatic testing on-device, building up a test
framework for us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Alyssa Rosenzweig
b26214e907 pan/bit: Add run mode to the cmdline
This emulates the functionality of shader_runner (built for kbase) using
the bifrost testing infrastructure so it runs on mainline. Ideally this
will let us test shaders from the assembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4396>
2020-04-01 02:25:05 +00:00
Jose Fonseca
cb56d5d9f8 appveyor: Remove Meson job.
Appveyor Meson fails misteriously some times, e.g.,
- https://ci.appveyor.com/project/mesa3d/mesa/builds/31780753/job/w8b28iahboxq4na2
- https://ci.appveyor.com/project/mesa3d/mesa/builds/31857376
and now that we have msvc coverage on gitlab ci this is no longer necessary.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4392>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4392>
2020-04-01 01:13:21 +00:00
Rob Clark
59754409cc freedreno/log: fix build error
It seems some versions of gcc are less clever about const initializers:

```
../src/gallium/drivers/freedreno/freedreno_log.c:58:33: error: initializer element is not constant
 const unsigned msgs_per_chunk = bo_size / sizeof(uint64_t);
                                 ^~~~~~~
```

See https://gitlab.freedesktop.org/mesa/mesa/-/issues/2713

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4390>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4390>
2020-04-01 00:51:09 +00:00
Ian Romanick
b097e326b8 nir/algebraic: Remove a redundant fabs pattern
Made redundant by 5544b2cbbd ("nir/algebraic: Use value range analysis
to eliminate useless unary ops").

No shader-db changes on any Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
af1bc7e0c7 nir/algebraic: Use value range analysis to convert fmax to fsat
This is conceptually similar to the 1-fsat(a) <=> fsat(1-a) rearragement
done in:

3b74790941 ("nir/algebraic: Recognize open-coded flrp(a, b, fsat(c))")

2d259713b7 ("nir/algebraic: Commute 1-fsat(a) to fsat(1-a) for all
non-fmul instructions").

Note: this helps the Aztex Ruins shader that was hurt for spills and
fills on Braodwell in the previous commit, but it does not fix the
spills or fills. :(

All Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 14528985 -> 14526116 (-0.02%)
instructions in affected programs: 477300 -> 474431 (-0.60%)
helped: 2332
HURT: 0
helped stats (abs) min: 1 max: 18 x̄: 1.23 x̃: 1
helped stats (rel) min: 0.07% max: 8.89% x̄: 0.88% x̃: 0.64%
95% mean confidence interval for instructions value: -1.27 -1.19
95% mean confidence interval for instructions %-change: -0.92% -0.85%
Instructions are helped.

total cycles in shared programs: 203723684 -> 203692984 (-0.02%)
cycles in affected programs: 4878847 -> 4848147 (-0.63%)
helped: 1764
HURT: 324
helped stats (abs) min: 1 max: 706 x̄: 22.94 x̃: 17
helped stats (rel) min: <.01% max: 17.75% x̄: 1.94% x̃: 1.66%
HURT stats (abs)   min: 1 max: 400 x̄: 30.15 x̃: 10
HURT stats (rel)   min: <.01% max: 17.76% x̄: 1.91% x̃: 0.69%
95% mean confidence interval for cycles value: -16.55 -12.86
95% mean confidence interval for cycles %-change: -1.44% -1.24%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
62795475e8 nir/algebraic: Distribute source modifiers into instructions
There are three main classes of cases that are helped by this change:

1. When the negation is applied to a value being type converted (e.g.,
   float(-x)).  This could possibly also be handled with more clever
   code generation.

2. When the negation is applied to a phi node source (e.g., x = -(...);
   at the end of a basic block).  This was the original case that caught
   my attention while looking at shader-db dumps.

3. When the negation is applied to the source of an instruction that
   cannot have source modifiers.  This includes texture instructions and
   math box instructions on pre-Gen7 platforms (see more details below).

In many these cases the negation can be propagated into the instructions
that generate the value (e.g., -(a*b) = (-a)*b).

In addition to the operations implemtned in this patch, I also tried:

 - frcp - Helped 6 or fewer shaders on Gen7+, and hurt just as many on
   pre-Gen7.  On Gen6 and earlier, frcp is a math box instruction, and
   math box instructions cannot have source modifiers.

   I suspect this is why so many more shaders are helped on Gen6 than on
   Gen5 or Gen7.  Gen6 supports OpenGL 3.3, so a lot more shaders
   compile on it.  A lot of these shaders may have things like cos(-x)
   or rcp(-x) that could result in an explicit negation instruction.

 - bcsel - Hurt a few shaders with none helped.  bcsel operates on
   integer sources, so the fabs or fneg cannot be a source modifier in
   the bcsel itself.

 - Integer instructions - No changes on any Intel platform.

Some notes about the shader-db results below.

 - On Tiger Lake, a single Deus Ex fragment shader is hurt for both
   spills and fills.

 - On Haswell, a different Deus Ex fragment shader is hurt for both
   spills and fills.

 - On GM45, the "LOST: 1" and "GAINED: 1" is a single Left4Dead 2
   (very high graphics settings, lol) fragment shader that upgrades
   from SIMD8 to SIMD16.

v2: Add support for fsign.  Add some patterns that remove redundant
negations and redundant absolute value rather than trying to push them
down the tree.

Tiger Lake
total instructions in shared programs: 17611333 -> 17586465 (-0.14%)
instructions in affected programs: 3033734 -> 3008866 (-0.82%)
helped: 10310
HURT: 632
helped stats (abs) min: 1 max: 35 x̄: 2.61 x̃: 1
helped stats (rel) min: 0.04% max: 16.67% x̄: 1.43% x̃: 1.01%
HURT stats (abs)   min: 1 max: 47 x̄: 3.21 x̃: 2
HURT stats (rel)   min: 0.04% max: 5.08% x̄: 0.88% x̃: 0.63%
95% mean confidence interval for instructions value: -2.33 -2.21
95% mean confidence interval for instructions %-change: -1.32% -1.27%
Instructions are helped.

total cycles in shared programs: 338365223 -> 338262252 (-0.03%)
cycles in affected programs: 125291811 -> 125188840 (-0.08%)
helped: 5224
HURT: 2031
helped stats (abs) min: 1 max: 5670 x̄: 46.73 x̃: 12
helped stats (rel) min: <.01% max: 34.78% x̄: 1.91% x̃: 0.97%
HURT stats (abs)   min: 1 max: 2882 x̄: 69.50 x̃: 14
HURT stats (rel)   min: <.01% max: 44.93% x̄: 2.35% x̃: 0.74%
95% mean confidence interval for cycles value: -18.71 -9.68
95% mean confidence interval for cycles %-change: -0.80% -0.63%
Cycles are helped.

total spills in shared programs: 8942 -> 8946 (0.04%)
spills in affected programs: 8 -> 12 (50.00%)
helped: 0
HURT: 1

total fills in shared programs: 9399 -> 9401 (0.02%)
fills in affected programs: 21 -> 23 (9.52%)
helped: 0
HURT: 1

Ice Lake
total instructions in shared programs: 16124348 -> 16102258 (-0.14%)
instructions in affected programs: 2830928 -> 2808838 (-0.78%)
helped: 11294
HURT: 2
helped stats (abs) min: 1 max: 12 x̄: 1.96 x̃: 1
helped stats (rel) min: 0.07% max: 17.65% x̄: 1.32% x̃: 0.93%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 3.45% max: 4.00% x̄: 3.72% x̃: 3.72%
95% mean confidence interval for instructions value: -1.99 -1.93
95% mean confidence interval for instructions %-change: -1.34% -1.29%
Instructions are helped.

total cycles in shared programs: 335393932 -> 335325794 (-0.02%)
cycles in affected programs: 123834609 -> 123766471 (-0.06%)
helped: 5034
HURT: 2128
helped stats (abs) min: 1 max: 3256 x̄: 43.39 x̃: 11
helped stats (rel) min: <.01% max: 35.79% x̄: 1.98% x̃: 1.00%
HURT stats (abs)   min: 1 max: 2634 x̄: 70.63 x̃: 16
HURT stats (rel)   min: <.01% max: 49.49% x̄: 2.73% x̃: 0.62%
95% mean confidence interval for cycles value: -13.66 -5.37
95% mean confidence interval for cycles %-change: -0.69% -0.48%
Cycles are helped.

LOST:   0
GAINED: 2

Skylake
total instructions in shared programs: 14949240 -> 14927930 (-0.14%)
instructions in affected programs: 2594756 -> 2573446 (-0.82%)
helped: 11000
HURT: 2
helped stats (abs) min: 1 max: 12 x̄: 1.94 x̃: 1
helped stats (rel) min: 0.07% max: 18.75% x̄: 1.39% x̃: 0.94%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 4.76% max: 4.76% x̄: 4.76% x̃: 4.76%
95% mean confidence interval for instructions value: -1.97 -1.91
95% mean confidence interval for instructions %-change: -1.42% -1.37%
Instructions are helped.

total cycles in shared programs: 324829346 -> 324821596 (<.01%)
cycles in affected programs: 121566087 -> 121558337 (<.01%)
helped: 4611
HURT: 2147
helped stats (abs) min: 1 max: 3715 x̄: 33.29 x̃: 10
helped stats (rel) min: <.01% max: 36.08% x̄: 1.94% x̃: 1.00%
HURT stats (abs)   min: 1 max: 2551 x̄: 67.88 x̃: 16
HURT stats (rel)   min: <.01% max: 53.79% x̄: 3.69% x̃: 0.89%
95% mean confidence interval for cycles value: -4.25 1.96
95% mean confidence interval for cycles %-change: -0.28% -0.02%
Inconclusive result (value mean confidence interval includes 0).

Broadwell
total instructions in shared programs: 14971203 -> 14949957 (-0.14%)
instructions in affected programs: 2635699 -> 2614453 (-0.81%)
helped: 10982
HURT: 2
helped stats (abs) min: 1 max: 12 x̄: 1.93 x̃: 1
helped stats (rel) min: 0.07% max: 18.75% x̄: 1.39% x̃: 0.94%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 4.76% max: 4.76% x̄: 4.76% x̃: 4.76%
95% mean confidence interval for instructions value: -1.97 -1.90
95% mean confidence interval for instructions %-change: -1.42% -1.37%
Instructions are helped.

total cycles in shared programs: 336215033 -> 336086458 (-0.04%)
cycles in affected programs: 127383198 -> 127254623 (-0.10%)
helped: 4884
HURT: 1963
helped stats (abs) min: 1 max: 25696 x̄: 51.78 x̃: 12
helped stats (rel) min: <.01% max: 58.28% x̄: 2.00% x̃: 1.05%
HURT stats (abs)   min: 1 max: 3401 x̄: 63.33 x̃: 16
HURT stats (rel)   min: <.01% max: 39.95% x̄: 2.20% x̃: 0.70%
95% mean confidence interval for cycles value: -29.99 -7.57
95% mean confidence interval for cycles %-change: -0.89% -0.71%
Cycles are helped.

total fills in shared programs: 24905 -> 24901 (-0.02%)
fills in affected programs: 117 -> 113 (-3.42%)
helped: 4
HURT: 0

LOST:   0
GAINED: 16

Haswell
total instructions in shared programs: 13148927 -> 13131528 (-0.13%)
instructions in affected programs: 2220941 -> 2203542 (-0.78%)
helped: 8017
HURT: 4
helped stats (abs) min: 1 max: 12 x̄: 2.17 x̃: 1
helped stats (rel) min: 0.07% max: 15.25% x̄: 1.40% x̃: 0.93%
HURT stats (abs)   min: 1 max: 7 x̄: 2.50 x̃: 1
HURT stats (rel)   min: 0.33% max: 4.76% x̄: 2.73% x̃: 2.91%
95% mean confidence interval for instructions value: -2.21 -2.13
95% mean confidence interval for instructions %-change: -1.43% -1.37%
Instructions are helped.

total cycles in shared programs: 321221791 -> 321079870 (-0.04%)
cycles in affected programs: 126886055 -> 126744134 (-0.11%)
helped: 4674
HURT: 1729
helped stats (abs) min: 1 max: 23654 x̄: 56.47 x̃: 16
helped stats (rel) min: <.01% max: 53.22% x̄: 2.13% x̃: 1.05%
HURT stats (abs)   min: 1 max: 3694 x̄: 70.58 x̃: 18
HURT stats (rel)   min: <.01% max: 63.06% x̄: 2.48% x̃: 0.90%
95% mean confidence interval for cycles value: -33.31 -11.02
95% mean confidence interval for cycles %-change: -0.99% -0.78%
Cycles are helped.

total spills in shared programs: 19872 -> 19874 (0.01%)
spills in affected programs: 21 -> 23 (9.52%)
helped: 0
HURT: 1

total fills in shared programs: 20941 -> 20941 (0.00%)
fills in affected programs: 62 -> 62 (0.00%)
helped: 1
HURT: 1

LOST:   0
GAINED: 8

Ivy Bridge
total instructions in shared programs: 11875553 -> 11853839 (-0.18%)
instructions in affected programs: 1553112 -> 1531398 (-1.40%)
helped: 7304
HURT: 3
helped stats (abs) min: 1 max: 16 x̄: 2.97 x̃: 2
helped stats (rel) min: 0.07% max: 15.25% x̄: 1.62% x̃: 1.15%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.05% max: 3.33% x̄: 2.44% x̃: 2.94%
95% mean confidence interval for instructions value: -3.04 -2.90
95% mean confidence interval for instructions %-change: -1.65% -1.59%
Instructions are helped.

total cycles in shared programs: 178246425 -> 178184484 (-0.03%)
cycles in affected programs: 13702146 -> 13640205 (-0.45%)
helped: 4409
HURT: 1566
helped stats (abs) min: 1 max: 531 x̄: 24.52 x̃: 13
helped stats (rel) min: <.01% max: 38.67% x̄: 2.14% x̃: 1.02%
HURT stats (abs)   min: 1 max: 356 x̄: 29.48 x̃: 10
HURT stats (rel)   min: <.01% max: 64.73% x̄: 1.87% x̃: 0.70%
95% mean confidence interval for cycles value: -11.60 -9.14
95% mean confidence interval for cycles %-change: -1.19% -0.99%
Cycles are helped.

LOST:   0
GAINED: 10

Sandy Bridge
total instructions in shared programs: 10695740 -> 10667483 (-0.26%)
instructions in affected programs: 2337607 -> 2309350 (-1.21%)
helped: 10720
HURT: 1
helped stats (abs) min: 1 max: 49 x̄: 2.64 x̃: 2
helped stats (rel) min: 0.07% max: 20.00% x̄: 1.54% x̃: 1.13%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.04% max: 1.04% x̄: 1.04% x̃: 1.04%
95% mean confidence interval for instructions value: -2.69 -2.58
95% mean confidence interval for instructions %-change: -1.57% -1.51%
Instructions are helped.

total cycles in shared programs: 153478839 -> 153416223 (-0.04%)
cycles in affected programs: 22050900 -> 21988284 (-0.28%)
helped: 5342
HURT: 2200
helped stats (abs) min: 1 max: 1020 x̄: 20.34 x̃: 16
helped stats (rel) min: <.01% max: 24.05% x̄: 1.51% x̃: 0.86%
HURT stats (abs)   min: 1 max: 335 x̄: 20.93 x̃: 6
HURT stats (rel)   min: <.01% max: 20.18% x̄: 1.03% x̃: 0.30%
95% mean confidence interval for cycles value: -9.18 -7.42
95% mean confidence interval for cycles %-change: -0.82% -0.71%
Cycles are helped.

Iron Lake
total instructions in shared programs: 8114882 -> 8105574 (-0.11%)
instructions in affected programs: 1232504 -> 1223196 (-0.76%)
helped: 4109
HURT: 2
helped stats (abs) min: 1 max: 6 x̄: 2.27 x̃: 1
helped stats (rel) min: 0.05% max: 8.33% x̄: 0.99% x̃: 0.66%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.94% max: 4.35% x̄: 2.65% x̃: 2.65%
95% mean confidence interval for instructions value: -2.31 -2.21
95% mean confidence interval for instructions %-change: -1.01% -0.96%
Instructions are helped.

total cycles in shared programs: 188504036 -> 188466296 (-0.02%)
cycles in affected programs: 31203798 -> 31166058 (-0.12%)
helped: 3447
HURT: 36
helped stats (abs) min: 2 max: 92 x̄: 11.03 x̃: 8
helped stats (rel) min: <.01% max: 5.41% x̄: 0.21% x̃: 0.13%
HURT stats (abs)   min: 2 max: 30 x̄: 7.33 x̃: 6
HURT stats (rel)   min: 0.01% max: 1.65% x̄: 0.18% x̃: 0.10%
95% mean confidence interval for cycles value: -11.16 -10.51
95% mean confidence interval for cycles %-change: -0.22% -0.20%
Cycles are helped.

LOST:   0
GAINED: 1

GM45
total instructions in shared programs: 4989697 -> 4984531 (-0.10%)
instructions in affected programs: 703952 -> 698786 (-0.73%)
helped: 2493
HURT: 2
helped stats (abs) min: 1 max: 6 x̄: 2.07 x̃: 1
helped stats (rel) min: 0.05% max: 8.33% x̄: 1.03% x̃: 0.66%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.95% max: 4.35% x̄: 2.65% x̃: 2.65%
95% mean confidence interval for instructions value: -2.13 -2.01
95% mean confidence interval for instructions %-change: -1.07% -0.99%
Instructions are helped.

total cycles in shared programs: 128929136 -> 128903886 (-0.02%)
cycles in affected programs: 21583096 -> 21557846 (-0.12%)
helped: 2214
HURT: 17
helped stats (abs) min: 2 max: 92 x̄: 11.44 x̃: 8
helped stats (rel) min: <.01% max: 5.41% x̄: 0.24% x̃: 0.13%
HURT stats (abs)   min: 2 max: 8 x̄: 4.24 x̃: 4
HURT stats (rel)   min: 0.01% max: 1.65% x̄: 0.20% x̃: 0.09%
95% mean confidence interval for cycles value: -11.75 -10.88
95% mean confidence interval for cycles %-change: -0.25% -0.22%
Cycles are helped.

LOST:   1
GAINED: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
c0bdf37c91 nir/algebraic: Change the default cursor location when replacing a unary op
If the expression tree that is being replaced has a unary operation at
its root, set the cursor (location where new instructions are inserted)
at the source instruction instead.

This doesn't do much now because there are very few patterns that have a
unary operation as the root.  Almost all of the patterns that do have a
unary operation as the root have inot.  All of the shaders that are
affected by this commit have expression trees with an inot at the root.

This change prevents some significant, spurious caused by the next
commit.  There is further explanation in the large comment added in
the code.

I also considered a couple other options that may still be worth exploring.

1. Add some mark-up to the search pattern to denote where new
   instructions should be added.  I considered using "@" to denote the
   cursor location.  For example,

    (('fneg', ('fadd@', a, b)), ...)

2. To prevent other kinds of unintended code motion, add the ability to
   name expressions in the search pattern so that they can be reused in
   the replacement.  For example,

   (('bcsel', ('ige', ('find_lsb=b', a), 0), ('find_lsb', a), -1), b),

   An alternative would be to add some kind of CSE at the time of
   inserting the replacements.  Create a new instruction, then check to
   see if it already exists.  That option might be better overall.

Over the years I know Matt has heard me complain, "I added a pattern
that just deleted an instruction, but it added a bunch of spills!"  This
was always in large, complex shaders that are very hard to analyze.  I
always blamed these cases on the scheduler being dumb.  I am now very
suspicious that unintended code motion was the real problem.

All Gen4+ Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611405 -> 17611333 (<.01%)
instructions in affected programs: 18613 -> 18541 (-0.39%)
helped: 41
HURT: 13
helped stats (abs) min: 1 max: 18 x̄: 4.46 x̃: 4
helped stats (rel) min: 0.27% max: 5.68% x̄: 1.29% x̃: 1.34%
HURT stats (abs)   min: 1 max: 20 x̄: 8.54 x̃: 7
HURT stats (rel)   min: 0.30% max: 4.20% x̄: 2.15% x̃: 2.38%
95% mean confidence interval for instructions value: -3.29 0.63
95% mean confidence interval for instructions %-change: -0.95% 0.02%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 338366118 -> 338365223 (<.01%)
cycles in affected programs: 257889 -> 256994 (-0.35%)
helped: 42
HURT: 15
helped stats (abs) min: 2 max: 120 x̄: 39.38 x̃: 34
helped stats (rel) min: 0.04% max: 2.55% x̄: 0.86% x̃: 0.76%
HURT stats (abs)   min: 6 max: 204 x̄: 50.60 x̃: 34
HURT stats (rel)   min: 0.11% max: 4.75% x̄: 1.12% x̃: 0.56%
95% mean confidence interval for cycles value: -30.39 -1.02
95% mean confidence interval for cycles %-change: -0.66% -0.02%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Ian Romanick
d2b4f3f137 intel/vec4: Allow late copy propagation on vec4
This change incurs a small amount of hurt now, but it enables a lot of
benefit on vec4 shaders on the next commit.  nir_opt_algebraic_late
converts dph, dot3, etc. to dhp_replicated, dot_replicated3, etc.  In
the process, it introduces extra moves.  If the original NIR contained

        vec1 32 ssa_45 = fdot4 ssa_51, ssa_44
        vec1 32 ssa_46 = fneg ssa_45

nir_opt_algebraic_late will produce

        vec4 32 ssa_18 = fdot_replicated4 ssa_1, ssa_15
        vec1 32 ssa_19 = mov ssa_18.x
        vec1 32 ssa_17 = fneg ssa_19

The algebraic pass added in the next commit can't see through the move
to know that the fneg applies to a fdot_replicated4.

Haswell, Ivy Bridge, and Sandybridge had similar results. (Haswell shown)
total cycles in shared programs: 187077604 -> 187079858 (<.01%)
cycles in affected programs: 350132 -> 352386 (0.64%)
helped: 174
HURT: 194
helped stats (abs) min: 2 max: 124 x̄: 23.60 x̃: 16
helped stats (rel) min: 0.12% max: 15.88% x̄: 4.98% x̃: 3.86%
HURT stats (abs)   min: 2 max: 164 x̄: 32.78 x̃: 16
HURT stats (rel)   min: 0.17% max: 22.82% x̄: 6.46% x̃: 0.86%
95% mean confidence interval for cycles value: 2.04 10.21
95% mean confidence interval for cycles %-change: 0.17% 1.93%
Cycles are HURT.

No shader-db changes on any other Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1359>
2020-04-01 00:28:38 +00:00
Timothy Arceri
0f4a81430e nir: fix crash in varying packing on interface mismatch
For example when the outputs are scalars but the inputs are struct
members.

Fixes: 26aa460940 ("nir: rewrite varying component packing")

Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4351>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4351>
2020-03-31 23:43:31 +00:00
Eric Anholt
31011c7a39 freedreno/turnip: Use the NIR info to decide if we need helper invocations.
We had an approximation that was assuming any ddx or tex instruction
needed helper invocations, but that's not true for texelFetch() or
textureSize().  It also meant that we were setting PIXLOD on vertex and
compute shaders doing texturing, which doesn't really make sense.

shader-db (with a hack to log pixlod):
total pixlod in shared programs: 582 -> 573 (-1.55%)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2681
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4308>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4308>
2020-03-31 22:29:22 +00:00
Eric Anholt
974b9c57c1 freedreno: Drop an unnecessary include marked "this should go away"
It came in with the initial import, and doesn't seem to be necessary any
more.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4289>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4289>
2020-03-31 21:20:11 +00:00
Rob Clark
127fa5d00c freedreno/ir3: fix android build
Fixes: e5339fe4a4 ("Move compiler.h and imports.h/c from src/mesa/main into src/util")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4381>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4381>
2020-03-31 18:46:04 +00:00
Rob Clark
ae7da1a017 util: move ALIGN/ROUND_DOWN_TO to u_math.h
These are less mesa specific than the rest of macros.h, and would be
nice to use outside of mesa.  Prep for next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4381>
2020-03-31 18:46:04 +00:00
Jason Ekstrand
7a53e67816 spirv: Implement OpCopyObject and OpCopyLogical as blind copies
Because the types etc. are required to logically match, we can just
copy-propagate the guts of the vtn_value.  This was causing issues with
some new CTS tests that are doing an OpCopyObject of a sampler which is
a special-cased type in spirv_to_nir.  Of course, this is only a partial
solution.  Ideally, we've got a bit of work to do to make all the
composite stuff able to handle all types including images, sampler, and
combined image/samplers but this gets some CTS tests passing.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4375>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4375>
2020-03-31 17:55:30 +00:00
Lionel Landwerlin
88c046a6d3 isl: don't warn in physical extent calculation for yuv formats
Those format have correct descriptions already with the exception of
the planar format. In that case we introduce an assert.

This fine because we don't use the planar format in any of our
drivers. There are restrictions on how the addresses of the 2 planes
are relative to one another which make this annoying. The sampler is
also more limited than what we can do with a shader snippet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2999>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2999>
2020-03-31 15:59:21 +00:00
Lionel Landwerlin
015f08dd43 isl: set bpb for Y8_UNORM
This isn't a format we use in any of the drivers but for consistency
just give it a correct bpb.

We also set the luminance in the G channel. We can't actually use this
format with the 3D sampler (only media).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2999>
2020-03-31 15:59:21 +00:00
Eric Engestrom
5f4d9b419a scons: prune unused Makefile.sources
Fixes: 2e92d33819 ("scons: Prune out unnecessary targets.")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4373>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4373>
2020-03-31 09:42:07 +00:00
Connor Abbott
d63acce5f4 tu: Return the correct alignment for images
The alignment field was never initialized, so we were just returning an
alignment of 0. Return the alignment from fdl, and while we're here
cleanup some leftovers in tu_private.h.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4357>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4357>
2020-03-31 08:22:58 +00:00
Connor Abbott
d84c206d85 freedreno/fdl: Add base_align
Tell users what the base address of the image needs to be aligned to.
These values are based on experimentation via passing an offset to
vkBindImageMemory with turnip and seeing if tests still pass. Note that
r8g8 is also special in this regard, however it actually has an
increased alignment (in bytes).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4357>
2020-03-31 08:22:58 +00:00
Jason Ekstrand
896a7c28eb anv/allocator: Use util_dynarray for blocks in anv_state_stream
When we originally wrote a bunch of the allocation data structures, we
re-used the GPU memory for CPU-side data structures.  It's a bit more
memory efficient and usually ok.  However, this has a couple of
problems:

 1. It makes it MUCH more likely that the GPU will accidentlly stomp
    CPU-side data structures and cause nearly impossible to debug
    crashes.

 2. With discrete GPUs, the memory will be mapped somehow and that map
    may be across the BAR so it could have horribly slow CPU access.
    This is bad for our CPU-side data structures.

In the case of anv_state_stream, it also made the data structure
massively more complex than it needed to be.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4336>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4336>
2020-03-31 08:12:07 +00:00
Jason Ekstrand
63bec07e14 anv: Account for the header in anv_state_stream_alloc
If we have an allocation that's exactly the block size, we end up
computing a new block size to allocate that's exactly the block size,
add in the header, and then assert fail.  When computing the block size,
we need to account for the header.

Fixes: 955127db93 "anv/allocator: Add support for large stream..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4336>
2020-03-31 08:12:07 +00:00
Marek Olšák
6e672074dd st/mesa: add environment variable pin_app_thread for faster glthread on AMD Zen
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4369>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4369>
2020-03-30 23:57:52 -04:00
Marek Olšák
4df3c7a207 gallium/u_threaded: call the driver to pin threads to L3 immediately
This is thread-safe and we want it to be done immediately for good L3 cache
usage.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4369>
2020-03-30 23:57:49 -04:00
Qiang Yu
4de35bed42 lima: also check tiled and depth case when import
We missed the tiled and depth case when check buffer alignment.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4362>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4362>
2020-03-31 01:40:29 +00:00
Qiang Yu
e46b2ef724 lima: fix buffer import with offset
With EGL_EXT_image_dma_buf_import, user can import dma_buf
with offset.

This is also used by AOSP GLConsumer::updateTexImage
with HAL_PIXEL_FORMAT_YV12 buffer which store YUV planes in
the same buffer with offset. Render sample from it using
GL_OES_EGL_image_external. This should fix some video
display problem when using MediaCodec soft decoding which
generates HAL_PIXEL_FORMAT_YV12 buffer and render it on
screen.

Test program:
https://github.com/yuq/gfx/tree/master/yuv2rgb/dma-buf

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4362>
2020-03-31 01:40:29 +00:00
Alyssa Rosenzweig
02ad147c5c pan/bi: Fix handling of constants with COMBINE
We should never see COMBINE constants explicitly since they'll become
moves anyway, so we can simplify that. On the other hand, we do need the
type information for the lowering to work properly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
bd19e76340 pan/bi: Handle fp16/abs scheduling restriction
See previous commit for the packing side. Here we update the scheduler
to accomodate this. Note we don't actually hit this path yet, but it's
good to be proactive.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c88f816169 pan/bi: Handle abs packing for fp16/FMA add/min
It's seriously quirky, and all to save a single bit. Alas. It also
introduces an edge case for the scheduler which is a bit annoying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
ba8e11f0f1 pan/bi: Handle core faddminmax16 packing
This works without the exception of absolute values, which have some...
odd properties to be handled in the next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
12a16f2247 pan/bi: Structify fadd/min/max16
There is some quirky encoding here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c12a208d78 pan/bi: Add v2f16 versions of rounding ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
f81b67b857 pan/bi: Handle round opcodes in frontend
These correspond to various ops routed through BI_ROUND

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c7170e9742 pan/bi: Assert out i16 related converts for now
Needs more investigation, and GLSL doesn't use it quite yet sadly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
2fd8b2e6d4 pan/bi: Add one-source f32->f16 op
This really has a second op for vectorization but we don't handle this
quite yet...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
197c6414ea pan/bi: Add bifrost_fma_2src generic
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
57a8e6e8d0 pan/bi: Handle standard FMA conversions
These are plain old 1-sources so they're easy to start with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
499e97b519 pan/bi: Enumerate conversions
There are lots of Bifrost conversion opcodes that can all be emitted
from BI_CONVERT, let's pattern match.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
902f99a45d pan/bi: Expand out FMA conversion opcodes
There are a *lot* of them, with lots of symmetry we can exploit to
simplify the packing logic (but not entirely). Let's add the
corresponding header structs/defines, although we don't actually poke
the disassembler at this stage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
73715124ea pan/bi: Pack outmod and roundmode with FMA
The fields got missed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
158f2452f2 pan/bi: Add FMA16 packing
It's like the original FMA packing but with swizzles introduced.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
b5148b6b49 pan/bi: Fix missing type for fmul
We add a zero argument, we want it to align with the size of whatever
the other arguments were for optimization.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
5eb209a05f pan/bi: Finish FMA structures
There were some missing fields for the 32-bit case, and the 16-bit case
has separate packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
375a7d0f32 pan/bi: Ignore swizzle in unwritten component
Otherwise we can trip the assert for no good reason.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
aa77d8128e pan/bi: Handle f2f* opcodes
Just more converts that got missed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
c2a8ef907b panfrost: Enable PIPE_SHADER_CAP_FP16 on Bifrost
We don't have fp16 implemented on Midgard yet but on Bifrost we can flip
it on now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
77e04eb2e2 pan/bi: Enable precision lowering in standalone compiler
..since there's no CAP to guide here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
683cd9b6f4 pan/bi: Fix off-by-one in scoreboarding packing
Clauses actually encode the *next* clauses' dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
f3726a0874 pan/bi: Fix overzealous write barriers
It's possible this triggers an INSTR_INVALID_ENC.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
3d7166fa69 pan/bit: Begin generating a vertex job
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
a0d1be30e1 pan/bit: Submit a WRITE_VALUE job as a sanity check
If this fails, everything else probably will too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
97029c773e panfrost: Stub out G31/G52 quirks
There are none so far, but we'll need quirks accessible for Bifrost
specific details in the future, and in the mean time we need to handle
the cases somehow to avoid the unreachable(..)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
bf1929e479 pan/bit: Open up the device
As a start and a sanity check.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
39378eec57 panfrost: Move device open/close to root panfrost
We need it for standalone testing too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
fd18695a26 pan/bit: Link standalone compiler with en/decoder
We would like to submit jobs from the standalone compiler for testing
purposes, so let's get things wired up.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
0f65f00a0d panfrost: Move pan_bo to root panfrost
Now that its Gallium dependencies have been resolved, we can move this
all out to root. The only nontrivial change here is keeping the
pandecode calls in Gallium-panfrost to avoid creating a circular
dependency between encoder/decoder. This could be solved with a third
drm folder but this seems less intrusive for now and Roman would
probably appreciate if I went longer than 8 hours without breaking the
Android build.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
3283c7f4da panfrost: Inline reference counting routines
We use only a very small subset of the capabilities of
pipe_reference (just wrappers for atomic ints..). Let's inline it and
drop the dependency on Gallium from pan_bo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
02a638cc51 panfrost: Isolate panfrost_bo_access_for_stage to pan_cmdstream.c
We don't use it outside this file (and really shouldn't) and it has a
strict Gallium dependency in pan_bo.h.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Alyssa Rosenzweig
ca8c62592c panfrost: Split panfrost_device from panfrost_screen
We would like to access properties of the device in a
Gallium-independent way (for out-of-Gallium testing in the short-term,
and would help a theoretical Vulkan implementation in the long run).
Let's split up the struct.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
2020-03-31 01:12:26 +00:00
Icecream95
50e3b2e390 panfrost: Correctly identify format 0x4c
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
bd87bcb8ac panfrost: Add support for R3G3B2
Tested with texenv from mesa-demos.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
49a81a431e st/mesa: Fall back on R3G3B2 for R3_G3_B2
It's simpler for Panfrost to use R3G3B2 instead of B2G3R3, but
format_map only listed the BGR variation.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
81d059c898 panfrost: Add support for B5G5R5X1
Tested with texenv from mesa-demos.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Icecream95
bad6fc4871 panfrost: Mark 64-bit formats as unsupported
There is no hardware support for these formats, but some games use
them for vertex data.

This fixes a crash in Aleph One.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4292>
2020-03-31 00:48:58 +00:00
Jason Ekstrand
9468f0729b nir: Handle vec8/16 in nir_shrink_array_vars
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
c26bf848ba nir: Handle vec8/16 in opt_undef_vecN
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
99540edfde nir: Treat vec8/16 as select in opt_peephole_select
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
e3554a293b nir: Handle vec8/16 in opt_split_alu_of_phi
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
2aab7999e4 nir: Handle vec8/16 in lower_regs_to_ssa
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
1033255952 nir: Handle vec8/16 in lower_phis_to_scalar
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
ac7a940eba nir: Handle vec8/16 in gather_ssa_types
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
a18c4ee7b0 nir: Handle vec8/16 in bool_to_bitsize
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
f5bbdf7621 nir: Copy propagate through vec8s and vec16s
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
842338e2f0 nir: Add a nir_op_is_vec helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
84ab61160a nir/algebraic: Add downcast-of-pack opts
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Jason Ekstrand
14a49f31d3 nir/lower_int64: Lower 8 and 16-bit downcasts with nir_lower_mov64
We have the code to do the lowering, we were just missing the
boilerplate bits to make should_lower_int64_alu_instr return true.

Fixes: 62d55f1281 "nir: Wire up int64 lowering functions"
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4365>
2020-03-31 00:18:05 +00:00
Rob Clark
1b3aefad46 freedreno/log: avoid duplicate ts's
In cases where `fd_log()`/`fd_log_stream()` are called multiple times
back-to-back, just use the timestamp of the first trace.

This seems to avoid some occasional GPU hangs I was seeing with logging
enabled.  Although not exactly sure the reason for the hangs.  (Looks
like GPU hangs *after* all the cmdstream is processed, according to
crashdec.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
2bf7dba80b freedreno/a6xx: add some more tracepoints
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
31173a7e7a freedreno: add some initial fd_log tracepoints
Mostly convert over existing DBG traces.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
55839fd41c freedreno/a6xx: timestamp logging support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:13 +00:00
Rob Clark
a0ca1462f3 freedreno: add logging infrastructure
Provides a way to log msgs timestamped at the corresponding position in
the GPU cmdstream, mostly for the purposes of profiling.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:12 +00:00
Rob Clark
ffd3226678 util: fix u_fifo_pop()
Seems like no one ever depended on it to actually return false when fifo
is empty.

Fixes: 6e61d06209 ("util: Add super simple fifo")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:12 +00:00
Rob Clark
356b93f102 freedreno: remove some obsolete debug options
'fraghalf' is unused (superceeded by actually lowering output based on
the precision information in nir).  And glsl140 support in ir3 is long
past the experimental stage, so the glsl120 option is no longer needed.
So remove them and free up some bits for new things.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
2020-03-30 23:20:12 +00:00
Jason Ekstrand
b113170559 nir/opt_loop_unroll: Fix has_nested_loop handling
In 87839680c0, a very subtle mistake was made with the CFG walking
recursion.  Instead of setting the local has_nested_loop variable when
process child loops, has_nested_loop_out was passed directly into the
process_loop_in_block call.  This broke nested loop detection heuristics
and caused loop unrolling to run massively out of control.  In
particular, it makes the following CTS test compile virtually forever:

dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.struct_mixed_types.uniform_buffer_block_geom

Fixes: 87839680c0 "nir: Fix breakage of foreach_list_typed_safe..."
Closes: #2710
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4380>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4380>
2020-03-30 22:20:47 +00:00
Eric Anholt
92afe94d28 freedreno: Work around UBWC flakiness.
In trying to track down the new failure in #2670, I found that I could get
the flaky test set down to 4 tests, and dropping any remaining test
wouldn't trigger the failure (a bad 8x4 block in the middle of
dEQP-GLES3.functional.fbo.msaa.4_samples.r16f's render target).  Disabling
gmem or bypass didn't help, and adding lots of CCU flushing didn't help.
What did help was disabling blitting, or this memset to initialize the
UBWC area after we (presumably) pull a BO out of the BO cache.  My guess
is that the 2D blitter can't handle some rare set of state in the flags
buffer and emits some garbage.

I've run 8 gles3 and 7 gles31 runs with this branch now so hopefully I've got the4 right set of flakes marked for removal.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2670
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4290>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4290>
2020-03-30 21:48:59 +00:00
Eric Anholt
d0b3ccb060 freedreno: Fix detection of being in a blit for acc queries.
The batch might not have stage == FD_STAGE_BLIT set because
fd_blitter_pipe_begin was sticking the stage on some random batch (or none
at all) rather than the one that would be used in the meta operation.

What we actually wanted to be looking at was set_active_query_state(),
which is already called by util_blitter and whose state we just needed to
track.

Fixes piglit occlusion_query_meta_no_fragments.  I haven't changed
query_hw.c's stage handling to clean the rest up because I don't have a
db410c/db820c at home to iterate over the piglit tests.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
57d54bcf99 freedreno: Rename "is_blit" to "is_discard_blit"
It's about the special case of an overwrite of a level meaning we can
discard old batch contents.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
8cdc6c1e4b freedreno/a6xx: Fix timestamp queries.
We were returning the same kind of result as time_elapsed (an end - start
time in ns), which on a timestamp query is approximately zero since
begin/end are at the same point in time.  What we're supposed to return is
a converted-to-ns timestamp based on the GPU clock.  Remove the _pause()
function for time_elapsed to reduce the command stream overhead, and just
capture start (which is, unfortunately, going to happen on each tile and
thus the final start value we ready will be the last tile of the frame,
not the first).

Fixes piglit spec/arb_timer_query/query gl_timestamp

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
7ef61c1f10 freedreno: Count blits in GL_TIME_ELAPSED and perf counter queries.
Fixes 0 gpu time reported for glBlitFramebuffer in apitrace replay --pgpu.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
4a07839948 freedreno: Associate the acc query bo with the batch.
Otherwise, a result query with wait won't trigger flushing the batch, and
we can end up with zeroed results.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
36612c96bd freedreno: Fix acc query handling in the presence of batch reordering.
When we switch batches and start a new draw, we need to cap the queries in
the previous batch and start queries again in the new one.

FD_STAGE_NULL got renamed to 0 so that it would naturally return
!is_active and end the queries at the end of the batch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
a99ff93374 freedreno: Remove the "active" member of queries.
The state tracker only gets to begin/query/destroy when !active and end
when active, so we have no need to try to track this ourselves.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Eric Anholt
b7fe793869 freedreno: Remove always-true return from per-gen begin_query.
You should do failure-prone allocation in create_query, not begin, anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4356>
2020-03-30 21:35:21 +00:00
Rhys Perry
1ef9658906 util/u_queue: fix race in total_jobs_size access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
CC: <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4335>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4335>
2020-03-30 20:17:43 +00:00
Rhys Perry
d101ca3f5a glsl: fix race in instance getters
Insertions can modify entry->data. Seems to fix random Fossilize crashes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
CC: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4335>
2020-03-30 20:17:43 +00:00
Jason Ekstrand
f5b14d983e nir: Set UBO alignments in lower_uniforms_to_ubo
Fixes: fb64954d9d "nir: Validate that memory load/store ops work on..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4378>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4378>
2020-03-30 19:18:17 +00:00
Rhys Perry
4a909068ad aco: look at p_{extract,split}_vector's definitions in pred_by_exec_mask()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4333>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4333>
2020-03-30 17:34:46 +00:00
Daniel Stone
9197fd59da CI: Re-enable Windows VS2019 builds
The failures are fixed, but I didn't notice this had been silently
disabled in !4272.

Re-enable the VS2019 build.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4374>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4374>
2020-03-30 16:22:20 +00:00
Jason Ekstrand
fb64954d9d nir: Validate that memory load/store ops work on whole bytes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
4e80151c5d anv: Set alignments on descriptor and constant loads
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
c217ee8d35 nir: Insert b2b1s around booleans in nir_lower_to
By inserting a b2b1 around the load_ubo, load_input, etc. intrinsics
generated by nir_lower_io, we can ensure that the intrinsic has the
correct destination bit size.  Not having the right size can mess up
passes which try to optimize access.  In particular, it was causing
brw_nir_analyze_ubo_ranges to ignore load_ubo of booleans which meant
that booleans uniforms weren't getting pushed as push constants.  I
don't think this is an actual functional bug anywhere hence no CC to
stable but it may improve perf somewhere.

Shader-db results on ICL with iris:

    total instructions in shared programs: 16076707 -> 16075246 (<.01%)
    instructions in affected programs: 129034 -> 127573 (-1.13%)
    helped: 487
    HURT: 0
    helped stats (abs) min: 3 max: 3 x̄: 3.00 x̃: 3
    helped stats (rel) min: 0.45% max: 3.00% x̄: 1.33% x̃: 1.36%
    95% mean confidence interval for instructions value: -3.00 -3.00
    95% mean confidence interval for instructions %-change: -1.37% -1.29%
    Instructions are helped.

    total cycles in shared programs: 338015639 -> 337983311 (<.01%)
    cycles in affected programs: 971986 -> 939658 (-3.33%)
    helped: 362
    HURT: 110
    helped stats (abs) min: 1 max: 1664 x̄: 97.37 x̃: 43
    helped stats (rel) min: 0.03% max: 36.22% x̄: 5.58% x̃: 2.60%
    HURT stats (abs)   min: 1 max: 554 x̄: 26.55 x̃: 18
    HURT stats (rel)   min: 0.03% max: 10.99% x̄: 1.04% x̃: 0.96%
    95% mean confidence interval for cycles value: -79.97 -57.01
    95% mean confidence interval for cycles %-change: -4.60% -3.47%
    Cycles are helped.

    total sends in shared programs: 815037 -> 814550 (-0.06%)
    sends in affected programs: 5701 -> 5214 (-8.54%)
    helped: 487
    HURT: 0

    LOST:   2
    GAINED: 0

The two lost programs were SIMD16 shaders in CS:GO.  However, CS:GO was
also one of the most helped programs where it shaves sends off of 134
programs.  This seems to reduce GPU core clocks by about 4% on the first
1000 frames of the PTS benchmark.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
d2dfcee7f7 nir: Use b2b opcodes for shared and constant memory
No shader-db changes on ICL with iris

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
16a80ff18a aco: Implement b2b32 and b2b1
The implementations here just clone i2b32 and i2b1.  This means that
b2b32 doesn't technically generate true NIR 0/-1 booleans but it should
be fine as it's only ever generated for shared variable writes which
will always be consumed by something which will then run it through an
i2b again.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
b2db84153a nir: Add b2b opcodes
These exist to convert between different types of boolean values.  In
particular, we want to use these for uniform and shared memory
operations where we need to convert to a reasonably sized boolean but we
don't care what its format is so we don't want to make the back-end
insert an actual i2b/b2i.  In the case of uniforms, Mesa can tweak the
format of the uniform boolean to whatever the driver wants.  In the case
of shared, every value in a shared variable comes from the shader so
it's already in the right boolean format.

The new boolean conversion opcodes get replaced with mov in
lower_bool_to_int/float32 so the back-end will hopefully never see them.
However, while we're in the middle of optimizing our NIR, they let us
have sensible load_uniform/ubo intrinsics and also have the bit size
conversion.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Jason Ekstrand
2cb9cc56d5 intel/nir: Run copy-prop and DCE after lower_bool_to_int32
No shader-db impact on ICL with iris.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4338>
2020-03-30 15:46:19 +00:00
Christian Gmeiner
5278e9dea7 etnaviv: compiled_framebuffer_state: get rid of SE_SCISSOR_*
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
22ee3eabca etnaviv: s/scissor_s/scissor
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
43b4eb394c etnaviv: get rid of struct compiled_scissor_state
We can reuse pipe_scissor_state.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
9491c1b04d etnaviv: do the left shift by 16 at emit time
Also round up the max bounds.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
5ba2d398d8 etnaviv: rework clippling calculation to be a derived state
This moves the whole clipping calculation out of the emit function.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Christian Gmeiner
95763e20ce etnaviv: get rid of SE_CLIP_*
The only difference between e.g. SE_SCISSOR_RIGHT and SE_CLIP_RIGHT
is the used margin value. With that information we can remove
SE_CLIP_* and apply the different margins during emit time.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
2020-03-30 15:30:15 +00:00
Jose Fonseca
27d58a1c20 gitlab-ci: Prune all SCons jobs except scons-win64, and allows failures.
Based on the discussion in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4352

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4363>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4363>
2020-03-30 14:52:34 +00:00
Samuel Pitoiset
3935a729d9 nir/algebraic: add fexp2(fmul(flog2(a), 0.5) -> fsqrt(a) optimization
Helps some Wolfenstein II and Wolfenstein Youngblood shaders.

pipeline-db (VEGA10/ACO):
Totals from affected shaders:
SGPRS: 17904 -> 17904 (0.00 %)
VGPRS: 14492 -> 14492 (0.00 %)
Spilled SGPRs: 20 -> 20 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 1753152 -> 1749708 (-0.20 %) bytes
Max Waves: 2581 -> 2581 (0.00 %)

pipeline-db (VEGA10/LLVM):
Totals from affected shaders:
SGPRS: 26656 -> 26656 (0.00 %)
VGPRS: 23780 -> 23780 (0.00 %)
Spilled SGPRs: 2112 -> 2112 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 2552712 -> 2549236 (-0.14 %) bytes
Max Waves: 3359 -> 3359 (0.00 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4353>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4353>
2020-03-30 14:07:43 +00:00
Jose Fonseca
2e92d33819 scons: Prune out unnecessary targets.
This prunes out all targets except libgl-gdi, libgl-xlib, and svga, as
suggested by Marek Olšák.

libgl-xlib will be remove once I have had time to confirm no automated
tests we have rely upon it.

There are also a bunch of Makefile.sources which become orphaned as
result, that are not taken care of in this change.

v2: Prune remainders of swr support.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4348>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4348>
2020-03-30 13:38:01 +00:00
Timur Kristóf
0f847b18bc aco: Don't store LS VS outputs to LDS when TCS doesn't need them.
Totals:
Code Size: 254764624 -> 254745104 (-0.01 %) bytes

Totals from affected shaders:
VGPRS: 12132 -> 12112 (-0.16 %)
Code Size: 573364 -> 553844 (-3.40 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
798dd98d6e aco: When LS and HS invocations are the same, pass LS outputs in temps.
We know that in this case, the LS and HS invocations are working
on the exact same vertex, so it's safe to skip the LDS.

Totals:
VGPRS: 3960744 -> 3961844 (0.03 %)
Code Size: 254824300 -> 254764624 (-0.02 %) bytes
Max Waves: 1053748 -> 1053574 (-0.02 %)

Totals from affected shaders:
VGPRS: 26152 -> 27252 (4.21 %)
Code Size: 1496600 -> 1436924 (-3.99 %) bytes
Max Waves: 4860 -> 4686 (-3.58 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
0a91c086b8 aco: Extract store_output_to_temps into a separate function.
Will be used by LS output stores.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
0f35b3795d aco: Fix workgroup size calculation.
Clear the workgroup size for all supported shader stages.
Also, unify the workgroup size calculation accross various places.

As a result, insert_waitcnt can use the proper workgroup size
which means that some waits can be dropped from tessellation
shaders. Also, in cases where the previous calculation was wrong,
we now insert s_barrier instructions.

Totals from affected shaders (GFX10):
Code Size: 340116 -> 338484 (-0.48 %) bytes

Fixes: a8d15ab6da
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
99ad62ff27 aco: Extract setup_tcs_info to a separate function.
Will be required by the workgroup size calculation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
0ad65f2c55 aco: Zero-fill undefined elements in create_vec_from_array.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
50634ad4a0 aco: Change isel inputs/outputs to a flat array.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e4a1b246a4 aco: Treat outputs of the previous stage as inputs of the next stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
f1dd81ae10 nir: Collect if shader uses cross-invocation or indirect I/O.
The following new fields are added to tess shader info:

* `tcs_cross_invocation_inputs_read`
* `tcs_cross_invocation_outputs_read`

These are I/O masks that are a subset of inputs_read and outputs_read
and they contain which per-vertex inputs and outputs are read
cross-invocation.

Additionall, the following new fields are added to shader_info:

* `inputs_read_indirectly`
* `outputs_accessed_indirectly`
* `patch_inputs_read_indirectly`
* `patch_outputs_accessed_indirectly`

These new fields can be used for optimizing TCS in a back-end compiler.
If you can be sure that the TCS doesn't use cross-invocation inputs
or outputs, you can choose a different strategy for storing VS and TCS
outputs. However, such optimizations might need to be disabled when
the inputs/outputs are accessed indirectly due to backend limitations,
so this information is also collected.

Example: RADV currently has to store all VS and TCS outputs in LDS, but
for shaders when only inputs and/or outputs belonging to the current
invocation ID are used, it could skip storing these in LDS entirely.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e7d733fdab aco: Use more optimal sequence at the beginning of merged shaders.
It can be further optimized in the future, but
the new sequence already has a few advantages:

* Uses fewer instructions
* Uses even fewer instructions in wave32 mode
* Doesn't use the VALU at all

Totals from affected shaders (GFX10):
VGPRS: 43504 -> 43496 (-0.02 %)
Code Size: 2436000 -> 2423688 (-0.51 %) bytes
Max Waves: 8704 -> 8705 (0.01 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
17c779ab9e aco: Skip 2nd read of merged wave info when TCS in/out vertices are equal.
When TCS has an equal number of input and output, it means that the
number of VS and TCS invocations (LS and HS) are the same; and that
the HS invocations operate on the same vertices as the LS.

When this is the case, this commit removes the else-if between
the merged VS and TCS halves, making it possible to schedule
and optimize the code accross the two halves.

Totals:
SGPRS: 5577367 -> 5581735 (0.08 %)
VGPRS: 3958592 -> 3960752 (0.05 %)
Code Size: 254867144 -> 254838244 (-0.01 %) bytes
Max Waves: 1053887 -> 1053747 (-0.01 %)

Totals from affected shaders:
SGPRS: 29032 -> 33400 (15.05 %)
VGPRS: 35664 -> 37824 (6.06 %)
Code Size: 1979028 -> 1950128 (-1.46 %) bytes
Max Waves: 7310 -> 7170 (-1.92 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
4ec48440a0 aco: Allow combining LDS loads when loading tess factors.
Previously the tess factors were loaded individually, but now they can
be loaded using a single LDS load instruction.

Note that the inner and outer tess factors are not yet combined.

Totals (GFX10):
Code Size: 254896008 -> 254879212 (-0.01 %) bytes

Totals from affected shaders (GFX10):
Code Size: 2028352 -> 2011556 (-0.83 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
ace3833293 aco: Allow combining TCS output VMEM stores.
Some copypasta may have stuck in the code.
This was left on false by mistake.

Totals (GFX10):
Code Size: 254939248 -> 254896008 (-0.02 %) bytes

Totals from affected shaders (GFX10):
VGPRS: 16196 -> 16212 (0.10 %)
Code Size: 1126332 -> 1083092 (-3.84 %) bytes
Max Waves: 2336 -> 2334 (-0.09 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e2b1d749b1 aco: Fix handling of tess factors.
There is no need to check whether they are written using indirect
indices, because all tess factors should be written to VMEM only
at the end of the shader.

No pipeline db changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
d3f6adcaed aco: Extract tcs_driver_location_matches_api_mask to separate function.
Also clear up should_write_tcs_output_to_lds a little bit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Timur Kristóf
e0dff5fd86 aco: Create null exports in instruction selection instead of assembler.
This allows the passes after isel to assume that the exports are
always correct, and also allows to schedule these null exports later.
Additionally, it ensures that the correct exec mask is used for
these exports.

Totals from affected shaders (GFX10):
SGPRS: 84224 -> 84344 (0.14 %)
VGPRS: 23088 -> 23076 (-0.05 %)
Code Size: 882892 -> 894368 (1.30 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4165>
2020-03-30 13:09:08 +00:00
Danylo Piliaiev
87839680c0 nir: Fix breakage of foreach_list_typed_safe assumptions in loop unrolling
foreach_list_typed_safe works with assumption that even if current node
becomes invalid, the next will be still valid.

However process_loops broke this assumption, because during iteration
when immediate child is unrolled - not only current node could be removed
but also the one after it.

This doesn't cause issues now but it will cause issues when undefined
behaviour in foreach* macros is fixed.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4189>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4189>
2020-03-30 14:41:30 +03:00
Pierre-Eric Pelloux-Prayer
716a065ac0 radeon: switch to 3-spaces style
For clang-format config see the previous commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Pierre-Eric Pelloux-Prayer
d7008fe46a radeonsi: switch to 3-spaces style
Generated automatically using clang-format and the following config:

AlignAfterOpenBracket: true
AlignConsecutiveMacros: true
AllowAllArgumentsOnNextLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: false
AlwaysBreakAfterReturnType: None
BasedOnStyle: LLVM
BraceWrapping:
  AfterControlStatement: false
  AfterEnum: true
  AfterFunction: true
  AfterStruct: false
  BeforeElse: false
  SplitEmptyFunction: true
BinPackArguments: true
BinPackParameters: true
BreakBeforeBraces: Custom
ColumnLimit: 100
ContinuationIndentWidth: 3
Cpp11BracedListStyle: false
Cpp11BracedListStyle: true
ForEachMacros:
  - LIST_FOR_EACH_ENTRY
  - LIST_FOR_EACH_ENTRY_SAFE
  - util_dynarray_foreach
  - nir_foreach_variable
  - nir_foreach_variable_safe
  - nir_foreach_register
  - nir_foreach_register_safe
  - nir_foreach_use
  - nir_foreach_use_safe
  - nir_foreach_if_use
  - nir_foreach_if_use_safe
  - nir_foreach_def
  - nir_foreach_def_safe
  - nir_foreach_phi_src
  - nir_foreach_phi_src_safe
  - nir_foreach_parallel_copy_entry
  - nir_foreach_instr
  - nir_foreach_instr_reverse
  - nir_foreach_instr_safe
  - nir_foreach_instr_reverse_safe
  - nir_foreach_function
  - nir_foreach_block
  - nir_foreach_block_safe
  - nir_foreach_block_reverse
  - nir_foreach_block_reverse_safe
  - nir_foreach_block_in_cf_node
IncludeBlocks: Regroup
IncludeCategories:
  - Regex:           '<[[:alnum:].]+>'
    Priority:        2
  - Regex:           '.*'
    Priority:        1
IndentWidth: 3
PenaltyBreakBeforeFirstCallParameter: 1
PenaltyExcessCharacter: 100
SpaceAfterCStyleCast: false
SpaceBeforeCpp11BracedList: false
SpaceBeforeCtorInitializerColon: false
SpacesInContainerLiterals: false

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Pierre-Eric Pelloux-Prayer
53e5e802f8 radeon: fix includes
And add required forward declarations.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Pierre-Eric Pelloux-Prayer
7f52bbb7c0 ddebug: add missing forward declaration
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Daniel Stone
04885d61dd meson: Add VS 4624 warning exclusion to remove piles of LLVM warnings
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4343>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4343>
2020-03-30 10:13:40 +00:00
Erik Faye-Lund
5127160fb6 meson: disable some more warnings on msvc
These warnings triggers for me, and they are harmless as-is. Let's
disable them to avoid hiding actually scary warnings.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4343>
2020-03-30 10:13:40 +00:00
Daniel Stone
2db1d73e53 CI: Avoid htz4 runner for VS2019
The htz4 runner needs to be updated in order for our support binaries
like Chocolatey to work. Temporarily restrict jobs to the EC2 runner
until this has happened.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4371>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4371>
2020-03-30 10:19:35 +01:00
Eric Engestrom
8970b7839a intel: drop unused include directories
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
231273d588 vulkan: drop unused include directories
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
79af30768d meson: inline inc_common
Let's make it clear what includes are being added everywhere, so that
they can be cleaned up.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Eric Engestrom
5a32dda8e6 meson: use existing variables in inc_common
Stepping stone to make review of the next commits easier.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
2020-03-28 21:36:54 +01:00
Vinson Lee
7df7520305 mesa: Change _mesa_exec_malloc argument type.
Fix build error.

In file included from ../src/mesa/x86/rtasm/x86sse.c:7:0:
../src/mesa/main/execmem.h:31:19: error: unknown type name ‘GLuint’; did you mean ‘uint’?
 _mesa_exec_malloc(GLuint size);
                   ^~~~~~
                   uint

Suggested-by: Marek Olšák <marek.olsak@amd.com>
Fixes: e5339fe4a4 ("Move compiler.h and imports.h/c from src/mesa/main into src/util")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4361>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4361>
2020-03-28 13:14:42 -07:00
Michel Dänzer
fcd3377cfe gitlab-ci: Update to current templates
The .fdo.container-ifnot-exists template has been replaced by
.fdo.container-build.

We need to include "debian/" in FDO_REPO_SUFFIX for now, we can drop it
for individual images when their tags are bumped if we want.

Miscellaneous other goodies this gets us:
* The templates now add some labels to images which may be useful for
  garbage collecting unused tags in the future.
* The templates now copy the current tag from the main project
  registry to the forked project's if it already exists in the latter
  but points to a different image hash. This will avoid false failures
  (or passes) due to using the wrong image.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4286>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4286>
2020-03-28 16:12:38 +00:00
Tomeu Vizoso
447890ad64 Revert "gitlab-ci: Disable jobs for Collabora's LAVA lab"
Lab is online again.

This reverts commit 1351ee0335.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4347>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4347>
2020-03-28 09:45:03 +00:00
Marek Olšák
e609737526 radeonsi/gfx10: fix descriptors and compute registers for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
4ef1c8d60b radeonsi/gfx10: fix the wave size for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
b4a0087a1c radeonsi/gfx10: user correct ACQUIRE_MEM packet for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
acc5bdf887 radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
ee4d797d8b radeonsi/gfx10: don't use NGG culling if compute-based culling is used
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
65e9239977 radeonsi: add num_vbos_in_user_sgprs into the shader cache key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
be9455bdf7 radeonsi: always create wait_mem_scratch for compute-based culling
used by the primitive restart emulation

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
42ce52b904 radeonsi: set amdgpu-gds-size for mode == 2 of compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
3381f2fa06 radeonsi: fix incorrect ordered_wave_id initilization for compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Marek Olšák
d89b19cfe1 radeonsi: remove obsolete TODO comment related to compute-based culling
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
2020-03-28 00:58:34 +00:00
Vasily Khoruzhick
5d45ffbfb6 lima: Implement lima_texture_subdata
We can avoid intermediate copy if we implement it ourselves.
Improves x11perf -shmput500 from 199.0/s to 283.0/s

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4281>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4281>
2020-03-28 00:17:40 +00:00
Rob Clark
6a10397a01 gitlab-ci: disable vs2019 build
Seems to be broken atm and blocking merging anything.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 16:34:27 -07:00
Rob Clark
f7d53275fb freedreno/ir3/ra: re-work a6xx merged register file conflicts
In particular setup the full/half conflicts first.  This avoids spurious
conflicts that where causing RA to place vecN half-regs poorly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
faf276b4c8 freedreno/ir3/ra: split building regs/classes and conflicts
Split out the construction of registers and classes (which is the same
on all gens) from setting up conflicts.  Prep to re-work how we setup
conflicts on a6xx+ which merged half/full register file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
90f7d12236 freedreno/ir3/ra: pick higher numbered scalars in first pass
Since we are re-assigning the scalars anyways in the second pass, assign
them to the highest free reg in the first pass (rather than lowest) to
allow packing vecN regs as low as possible.

Note this required some changes specifically for tex instructions with a
single component writemask that is not necessarily .x, as previously
these would get assigned in the first RA pass, and since they are still
scalar, we'd end up w/ some r47.* and other similarly way-to-high
assignments after the 2nd pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
1da90ca9bf freedreno/ir3/ra: compute register target from liveranges
Using the output of the first pass isn't ideal, as it can bake in the
losses from fragmentation which the scalar pass is intended to fill in.
This gets worse when we start using "vectorish" instructions, due to
higher use of vecN values.

Instead, we can just use the outputs of the liveness analysis to get a
more accurate # of maximum live values at any point.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
d2cc92c747 freedreno/ir3/ra: fix array liveranges
Fixes: 1b658533e1 ("freedreno/ir3: extend liverange of arrays")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
6347c2ea89 freedreno/ir3/ra: add def/use iterators
Decouple the messy logic of figuring out vreg names defined/used by an
instruction from the logic of what to do about it by introducing
iterators.  There is still *some* array vs ssa special casing in
ra_block_compute_live_ranges(), but less than before.  And this will
avoid introducing a second copy of the def/use logic in a following
patch which uses the liveranges to calculate the maximum # of live
values (which is the optimal target for max physical register window
to round-robin within).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
bf0aa7ed90 freedreno/ir3/ra: drop extending output live-ranges
This is no longer needed as we create meta:collect instructions in the
end block, which achieves the same result.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
0e7d24b532 freedreno/ir3/ra: add helper to map name to array
For vreg names that refer to arrays rather than SSA values, this is the
counterpart to name_to_instr().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
d99d358389 freedreno/ir3/ra: fix target register calculation
Account for the # of regs an instruction writes, and fix an off-by-one.

(We are about to replace this with calculating the register target using
the live-ranges, but in debugging that it was useful to assert() if it
chose a higher target.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
d20a06e401 freedreno/ir3/ra: add helper to map name to instruction
Extract out a helper from the select_reg callback.  And include all the
instructions in the hashtable, not just SFU.  This will be useful in the
following commits.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
29992a039e freedreno/ir3/ra: split-up
Split out regset and shared header, since the RA pass is already getting
large-ish.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
6da53911c1 freedreno/ir3/ra: add debug option for RA debug msgs
Similar to the debug switch for sched debug msgs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
142f2d4551 freedreno/ir3: convert debug bitfield to BITFIELD_BIT()
(Little more verbose than the kernel's BIT())

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
3d0905582a freedreno/ir3: reformat disasm output
In particular, make sure we see all the shader-db stats.  The format
(order) is the sameish, except split across multiple lines to make it
easier to read.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
afdb8e3907 freedreno/ir3: fix bogus register footprint with tess/gs
When we have a tess or gs stage, VS outputs aren't normal varyings, so
regid is r63.x.. we shouldn't extend our registerfootprint to 64!

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
1b4b455739 freedreno/ir3: remove unused helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
c6a8792753 freedreno/ir3: add bary_ij as src for meta:tex_prefetch
This way RA doesn't have to special case it in use/def accounting..

This gets rid of an extra level of split/collect, which shouldn't be
needed.  And interferes with scheduler trying to put tex-prefetches
after inputs but before other instructions.  (Otherwise it would have
to figure out which split/collects need to go before the tex-prefetch)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
a0de0db0e4 freedreno/ir3: small cleanup and comments
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Rob Clark
7d9a794f35 freedreno/a6xx: register update
No functional change, and this register isn't used in userspace.  Just
syncing from envytools tree to eliminate the delta.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>
2020-03-27 22:41:36 +00:00
Daniel Stone
46a32f0b6b CI: Disable Panfrost Mali-T820 jobs
The BayLibre T820 runners appear to be unhealthy.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4359>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4359>
2020-03-27 21:32:01 +00:00
Marek Olšák
871bd2819d util: remove duplicated MALLOC_STRUCT and CALLOC_STRUCT
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:10 +00:00
Marek Olšák
7164674500 util: don't include p_defines.h and u_pointer.h from gallium
It's a mess, but this is what I arrived at.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:10 +00:00
Marek Olšák
013b65635f radv: stop including files from mesa/main
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:10 +00:00
Marek Olšák
76f79db3f5 util: stop including files from mesa/main
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:09 +00:00
Marek Olšák
c42fa40a51 mesa: don't use <> for including internal headers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:09 +00:00
Marek Olšák
e5339fe4a4 Move compiler.h and imports.h/c from src/mesa/main into src/util
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
2020-03-27 21:00:09 +00:00
Jesse Natalie
6cfe074b86 wgl: use gldrv.h instead of stw_icd.h
Now that we have the official header, let's use that instead of
stw_icd.h.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305>
2020-03-27 19:50:24 +00:00
Jesse Natalie
ec20169264 wgl: add official gldrv.h header-file
This is the official, Microsoft-provided gldrv.h that describes the
driver-interface for OpenGL drivers on Windows.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305>
2020-03-27 19:50:24 +00:00
Karol Herbst
c9091f1f24 nv50, nvc0: fix must_check warning of util_dynarray_resize_bytes
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330>
2020-03-27 18:20:20 +00:00
Erik Faye-Lund
f4a4d4607e nv50: remove unused variable
This isn't used anymore, so let's get rid of it to silence a warning.

Fixes: c574cda3c6 ("util: Make helper functions for pack/unpacking pixel rows.")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330>
2020-03-27 18:20:20 +00:00
Lionel Landwerlin
aad0e6f810 intel/perf: store the probed i915-perf version
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
8e7202d45f intel/perf: document meaning of query field
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
dde96d31b7 intel/perf: move mdapi query definitions to their own file
Where they belong.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
33b9c7a7f6 intel/perf: break GL query stuff away
This stuff is somewhat specific to the GL extension & drivers. On
Vulkan we won't use this, it also made a rather large file.

v2: Fix Android build (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
f5c5574f42 intel/perf: move register definition to special file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Andres Gomez
b9d2b5dcec gitlab-ci/traces: Add D3D11 sample entry for POLARIS10
v2:
  - Updated traces-db commit.
  - Changed the reference DXVK trace.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
07e5b3ad50 gitlab-ci: add Wine and DXVK env variables to Vulkan's tracie runner
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
6bae042b3d gitlab-ci: replay apitrace traces in headless mode
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
9f4acd465e gitlab-ci: add apitrace's DXGI traces support
v2:
  - Pass the whole retrace command for apitrace traces (Alexandros).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
fb8fa83a30 gitlab-ci: add Wine, win64's apitrace and DXVK to the Vulkan testing container
In preparation for having automated testing with DXGI traces.

v2:
  - Updated DXVK version.
  - Merged the new Wine container into the existing Vulkan
    one (Michel).

v3:
  - Updated commit log.
  - Use a particular known-good apitrace version (Alexandros).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez
05a3b49308 gitlab-ci: Don't use buster-backports packages by default for x86_test-vk
The backports repository can be temporarily inconsistent between
architectures, which can break the docker image build.

Suggested-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Daniel Stone
4a8876b025 CI: Windows: Fix Docker tag argument inversion
docker tag takes its arguments as source and dest, not dest and source.
Went unnoticed as the host already had a tag for my image when I was
testing.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4346>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4346>
2020-03-27 13:23:33 +00:00
Daniel Stone
07885cbcdb CI: Add native Windows VS2019 build
Adds a native build of Mesa using Meson with the Visual Studio 2019
toolchain on a Windows host.

Though Docker is supported on Windows, Docker-in-Docker is not possible,
nor are podman and skopeo available. We handle this by creating the
container from a shell-executor Windows machine, which gives us a native
PowerShell that we can execute Docker from. This attempts to do the same
copy-from-upstream-or-create-if-not-exists optimisation as the
ci-templates do for our Linux builds, albeit open-coded in PowerShell.

The Mesa build itself is executed inside a container, using Meson and
Ninja.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Brian Paul <brianp@vmware.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:47 +00:00
Daniel Stone
bc98de4d14 util/test: Use MAX_PATH on Windows
Windows provides MAX_PATH rather than PATH_MAX for the maximum allowable
path length. This is not a limit on the length of filename which can
exist on the filesystem, but a length on the length of path which can be
passed to Win32 API calls.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:47 +00:00
Pierre-Eric Pelloux-Prayer
8f573bdaaa util: fix process_test path
Make sure we only use winepath when needed.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2690
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:31 +00:00
Tomeu Vizoso
1351ee0335 gitlab-ci: Disable jobs for Collabora's LAVA lab
The lab is going down for a few hours to upgrade the LAVA installation
to the latest stable release.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
2020-03-27 09:25:20 +01:00
Timothy Arceri
b5e00f5c2b nir: fix packing of TCS varyings not read by the TES
Unlike other stages TCS outputs not read by the TES cannot always
be demoted to globals e.g. when they are read by other TCS
invocations.

We were not taking these outputs into account when packing which
could result in other outputs being assigned to the same location.

Here we make sure to gather information on these outputs and group
them together when packing.

This fixes rendering issues in QUBE 2 via Proton.

Closes: #2653
Fixes: 26aa460940 ("nir: rewrite varying component packing")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
2020-03-27 07:26:39 +00:00
Timothy Arceri
8b9ebbcb54 glsl: fix varying packing for 64bit integers
Without this we can incorrectly end up marking things as making
use of ARB_enhanced_layouts style packing.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
2020-03-27 07:26:39 +00:00
Samuel Pitoiset
ba2ec1f369 ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()
Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

No pipeline-db changes with VEGA10/LLVM 9.

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 6672 -> 6672 (0.00 %)
VGPRS: 6652 -> 6652 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 561780 -> 561692 (-0.02 %) bytes
Max Waves: 1043 -> 1043 (0.00 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 84608 -> 83768 (-0.99 %)
VGPRS: 106768 -> 106636 (-0.12 %)
Spilled SGPRs: 1625 -> 1713 (5.42 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 10850936 -> 10726712 (-1.14 %) bytes
Max Waves: 3152 -> 3180 (0.89 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 08:05:43 +01:00
Samuel Pitoiset
d548384fc6 ac/nir: use llvm.amdgcn.rsq for nir_op_frsq
Instead of emitting 1.0 / sqrt(x) which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEGA10/LLVM 9):
Totals from affected shaders:
SGPRS: 16872 -> 16864 (-0.05 %)
VGPRS: 15320 -> 15464 (0.94 %)
Spilled SGPRs: 2021 -> 2133 (5.54 %)
Code Size: 1915464 -> 1917476 (0.11 %) bytes
Max Waves: 641 -> 639 (-0.31 %)

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 43936 -> 44120 (0.42 %)
VGPRS: 41776 -> 41972 (0.47 %)
Spilled SGPRs: 875 -> 875 (0.00 %)
Code Size: 4468164 -> 4468120 (-0.00 %) bytes
Max Waves: 2412 -> 2414 (0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 60096 -> 60096 (0.00 %)
VGPRS: 63552 -> 63648 (0.15 %)
Spilled SGPRs: 6135 -> 6117 (-0.29 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 6252996 -> 6249772 (-0.05 %) bytes
Max Waves: 2324 -> 2337 (0.56 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 07:45:47 +01:00
Samuel Pitoiset
66426ce119 ac/nir: use llvm.amdgcn.rcp for nir_op_frcp
Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEG10/LLVM 9):
Totals from affected shaders:
SGPRS: 50384 -> 50312 (-0.14 %)
VGPRS: 42572 -> 42696 (0.29 %)
Spilled SGPRs: 1372 -> 1372 (0.00 %)
Code Size: 5692040 -> 5691428 (-0.01 %) bytes
Max Waves: 3954 -> 3951 (-0.08 %)

pipeline-db (VEG10/LLVM 10):
Totals from affected shaders:
SGPRS: 78512 -> 78464 (-0.06 %)
VGPRS: 62408 -> 62484 (0.12 %)
Spilled SGPRs: 1502 -> 1502 (0.00 %)
Code Size: 8106188 -> 8103372 (-0.03 %) bytes
Max Waves: 7759 -> 7753 (-0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 112760 -> 113232 (0.42 %)
VGPRS: 111132 -> 110568 (-0.51 %)
Spilled SGPRs: 5870 -> 5940 (1.19 %)
Spilled VGPRs: 650 -> 652 (0.31 %)
Code Size: 11887232 -> 11561744 (-2.74 %) bytes
Max Waves: 8964 -> 9015 (0.57 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 07:45:43 +01:00
H.J. Lu
e352e7e792 x86: Add ENDBR at function entries
Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

contains shadow stack (SHSTK) and indirect branch tracking (IBT).
When IBT is enabled, all indirect branch targets must start with
ENDBR instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2538

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
2020-03-26 16:38:46 -07:00
Marek Olšák
9899a8e26c mesa: try to fix the android build
Fixes: 8a3e2cd9b2
Closes: #2685

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
2020-03-26 18:43:42 -04:00
Francisco Jerez
36c155a017 intel/fs/gen12: Fix interaction of SWSB dependency combination with EU fusion workaround.
This has been reported to fix a hang in Shadow of Mordor on Gen12.
One of its compute shaders seems to cause an in-order exec_all
dependency to be merged into an out-of-order SET dependency slot,
which would prevent us from baking the SET dependency into the parent
instruction, leading to an assert failure in emit_inst_dependencies()
(Thanks to Rafael for noticing that).  Prevent that by avoiding
combination of in-order dependencies whenever that would cause a SET
dependency to be demoted to a SYNC.NOP instruction.

Fixes: e14529ff32 "intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow."
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2020-03-26 19:09:42 +00:00
H.J. Lu
007e623025 x86_init_func_common: Add ENDBR at function entry
Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

when IBT is enabled, all indirect branch targets must start with ENDBR
instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2575

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
2020-03-26 18:36:20 +00:00
Danylo Piliaiev
2d0599b1b4 intel/aub_viewer: Fix format specifier for uint64_t
Use PRIx64 instead of lx for uint64_t

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2692
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
2020-03-26 18:00:15 +00:00
Icecream95
7b9f1b6ef7 panfrost: Extend the tiled store fast-path to loads
The access functions are forced to be inline, so performance shouldn't
be impacted for stores.

WebGL performance in Firefox is more than doubled, and track loading
in STK is noticeably faster.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
2020-03-26 14:34:55 +00:00
Icecream95
dac1573a35 mesa/format_utils: Add a fast-path for RGBA to BGRA
This is similar to an existing fast-path, but this is for an array
source while the existing one is for an array destination.

Firefox can hit this case for WebGL when GL compositing is not used.
For a WebGL sample on the Panfrost driver, the frame-rate increased
from 19.4 fps to 20.6 fps, which is a 6% gain.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
2020-03-26 13:36:47 +00:00
Tapani Pälli
0847fe6e7f glsl: set error_emitted true if type not ok for assignment
Patch changes also existing assert to not trigger when we have
error types in assignment.

v2: simplify, cleanup (Ian)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2629
Fixes: d1fa69ed61 ("glsl: do not attempt assignment if operand type not parsed correctly")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
2020-03-26 12:41:12 +00:00
Alexandros Frantzis
05069e1f07 gitlab-ci: Fix traces caching in tracie
We are currently comparing a hex string representation of the git lfs
OID with a byte array representation of the locally calculated OID,
causing detection of valid cached traces to fail. Ensure we are
comparing compatible representations (in this case hex strings).

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
2020-03-26 13:55:26 +02:00
Boris Brezillon
efdce97e4b vtn/opencl: add rint-support
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
6d69ed88f8 vtn/opencl: add native exp2/log2-support
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
7b2bfb6bc4 vtn/opencl: add native exp10/log10-support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
25cb87bcdd vtn/opencl: add native exp/log-support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
c98e745e78 compiler/nir: move build_log helper into builtin-builder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
f59ae68838 compiler/nir: move build_exp helper into builtin-builder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund
4821ec6d8f vtn/opencl: fully enable OpenCLstd_Clz
Fixes: 7325f6ac98 ("vtn/opencl: add clz support")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Neil Armstrong
51831537a2 gitlab-ci: re-enable mali400/450 and t820 jobs
The FILES_HOST_NAME and FILES_HOST_URL are in the baylibre's runner
environment to make it more flexible.

Also use the new aarch64 mesa-ci-aarch64-lava-baylibre runner with
embedded nginx server to serve the LAVA artifacts.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Neil Armstrong
842f13d8f8 gitlab-ci: add FILES_HOST_URL and move FILES_HOST_NAME into jobs
The FILES_HOST_URL & FILES_HOST_NAME will be in the Baylibre's runner
environment, move them into the t860/t720/t760 jobs using Collabora's
runner.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Tomeu Vizoso
b123849880 gitlab-ci: Serve files for LAVA via separate service
Currently, we store the kernel and ramdisk for each LAVA job in the
artifacts of the job that built them. Because artifacts are stored in
GCE and LAVA labs aren't, this causes a lot of egress with is expensive.

To avoid this, have runners download most of the data via the (cached)
container images once, and for each job upload the kernel and ramdisk to
a server outside GCE.

Right now we only have Collabora's runner with a local web server, so
jobs that go to Baylibre's lab have been disabled.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Tomeu Vizoso
92f3c51560 gitlab-ci: Place files from the Mesa repo into the build tarball
There's some files from the .gitlab-ci directory that are needed in the
test stage and that, because the Mesa repository isn't checked out in
that stage, need to be made available through other means.

Because those files are going to be needed in LAVA devices, place them
ino the tarball containing the built files so it's available to both
gitlab-ci runners and LAVA devices.

Before those files were passed in the artifacts of the Gitlab CI job,
but this commit places them into the built tarball so scripts later in
the pipeline don't need to account for this discrepancy.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Marek Olšák
b94c277fd1 radeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák
8c053e5fad mesa: allow out-of-order drawing to optimize immediate mode if it's safe
This increases performance by 11-13% in Viewperf11/Catia - first scene.

Set allow_draw_out_of_order=true to enable this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák
0c6a667d93 glsl_to_tgsi: set shader_info::writes_memory
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák
85a723975b nir: add and gather shader_info::writes_memory
for out-of-order drawing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Kristian H. Kristensen
d269fb33b0 radeonsi: Stop exposing PIPE_SHADER_CAP_FP16
Not fully supported.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
2020-03-25 22:43:41 +00:00
Vinson Lee
603f38f171 util/u_process: Add util_get_process_exec_path for macOS.
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2682
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
2020-03-25 14:38:03 -07:00
Christian Gmeiner
8cdace95ac freedreno: ssbo: mark resource read or written depending on usage
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner
061b262a0c freedreno: ssbo: keep track if a buffer gets written
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner
0ed053f03d freedreno: simplify fd_set_shader_buffers(..)
Clear the modified bits for enabled_mask and then iterate over the
whole range and set the specific bit where there is a buffer.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner
3340cbd398 freedreno: calculate modified bit mask only once
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Roland Scheidegger
3cbcb1b73e gallium/util: Add back (and rename) util_float_to_half implementation
This implementation was removed by 8b8af6d3 ("gallium/util: Switch
util_float_to_half to _mesa_float_to_half()'s impl.")
It was not actually broken, but _mesa_float_to_half() implements
round-to-nearest-even, whereas util_float_to_half() implemented
round-to-zero. So rename it appropriately.
GL actually never cares about rounding (except a broken piglit test),
however d3d10 very much does and requires RTZ for float to half
conversion. Moreover, apparently at least radeon gpus actually always
do RTZ when doing RT writes (and I'd suspect for shader image writes
as well). Hence it seems appropriate to hook up this rtz function to
the format instead. This will cause llvmpipe and softpipe to use rtz
rounding for clears with half float formats, and softpipe would use rtz
behavior for rt writes as well (llvmpipe has that hardcoded), not sure
if "real" hw drivers hit this function for much.
(For shader opcodes would still need to figure out what rounding to use
appropriately, but this is a question for another day.)
Note should probably unify with _mesa_float_to_float16_rtz. Unclear at
this point which one is better, so just restore previous function here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
2020-03-25 19:16:13 +00:00
Marek Vasut
9e78f17b74 etnaviv: Emit PE.ALPHA_COLOR_EXT* on GPUs with half-float support
At least GC880 (iMX6S), GC2000 (iMX6Q) blobs do not emit the
PE.ALPHA_COLOR_EXT0 and PE.ALPHA_COLOR_EXT1 into the command
stream. The GCnano (STM32MP1) is not affected by this change
either. This is because neither of these GPUs support the
half-float feature.

Emit PE.ALPHA_COLOR_EXT* in etnaviv only if half-float support
is present in the GPU. This fixes all of the currently failing
dEQPs in this group:
  dEQP-GLES2.functional.fragment_ops.blend.*

Fixes: 76adf041f2 ("etnaviv: fix blend color on newer GPUs")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
2020-03-25 19:21:05 +01:00
Roland Scheidegger
4897e70ccd gallivm: disable rgtc/latc SNORM accellerated fetches
Unfortunately this appears to be bugged (it seems the piglit tests aren't
quite exhaustive enough). I'm almost certain it's the lerp
(lp_build_lerpdxta()) which doesn't handle signed numbers correctly, let's
disable for now.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
2020-03-25 17:56:11 +00:00
Erik Faye-Lund
8c30b9d987 rbug: do not return void-value
Returning a void-value is nonsensical, and in this case it seems like a
mistake.

This eliminates a warning when building on MSVC.

Fixes: fb04e5da97 ("gallium: add pipe_screen::finalize_nir")
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
2020-03-25 14:19:37 +00:00
Erik Faye-Lund
411d7429c9 rbug: clean up cast-warnings
Similarly to the previous cast; on 64-bit Windows, unsigned long is
32-bit, and casting a pointer to a non-matchin bit-width integer produce
warnings. So let's use uintpre_t for this purpose instead.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
2020-03-25 14:19:37 +00:00
Erik Faye-Lund
079cb4949d pipebuffer: clean up cast-warnings
This code produces warnings, so let's fix that. The problem is that
casting a pointer to an integer of non-pointer-size triggers warnings on
MSVC, and on 64-bit Windows unsigned long is 32-bit large.

So let's instead use uintptr_t, which is exactly for these kinds of
things.

While we're at it, let's make the resulting index a plain "unsigned",
which is the type this originated from before we started with this
cast-dance.

Fixes: 1a66ead1c7 ("pipebuffer, winsys/svga: Add functionality to update pb_validate_entry flags")
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
2020-03-25 14:19:37 +00:00
Lionel Landwerlin
1271193932 vulkan/overlay: Add a workaround semaphore for application presenting without one
When an application calls vkQueuePresent() on a different queue than
the one we run our drawing on and it doesn't give a semaphore to wait
on, let's insert our own semaphore so that we don't race the
application's drawing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2540
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3893>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3893>
2020-03-25 13:42:01 +02:00
Pierre-Eric Pelloux-Prayer
5533c41541 ac: fix ac_build_is_helper_invocation when postponed_kill is null
If there was no demote() in the shader, ac_build_is_helper_invocation
behaves exactly the same as ac_build_load_helper_invocation, i.e.
the helper lanes are the same as they were at the beginning of the shader.

Fixes: de57ea2a3d ("amd/llvm: implement nir_intrinsic_demote(_if) and nir_intrinsic_is_helper_invocation")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
2020-03-25 08:19:38 +01:00
Pierre-Eric Pelloux-Prayer
84da4ded4b nir: update uses_demote flag in discard_to_demote pass
Otherwise the ctx.ac.postponed_kill will not be allocated.

Fixes: ce87da71e9 ("nir: add pass to lower discard() to demote()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2662
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
2020-03-25 08:19:33 +01:00
Neil Roberts
fc8432e6d6 glsl/lower_precision: Lower builtins depending on arguments
When an ir_call is encountered that invokes a builtin, it will now try
to generate a lowered version of the builtin. This only happens if all
of the arguments to the function are lowerable. Previously the builtin
would be inlined before the lowering pass is invoked and then the
implementation would be lowered as a consequence of the pass. However
this causes problems if the builtin has multiple arguments and the
implementation has operations on only a few of the arguments before
combining it with the others. In that case the entire builtin should
only be lowered if all of the arguments are lower precision. The
previous approach would end up lowering only parts of the
implementation.

The lowered implementations are cached in a hash table in case they can
be reused.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
e7434c0a06 glsl: Inline builtins in a separate pass
Previously, the ir_call functions for builtin functions were replaced
with the inline implementation immediately after being added to the
instruction list. This patch replaces that with a separate pass that
lowers them after the conversion from AST to IR is complete. This will
be useful to be able to insert some handling for the precision lowering
pass before the inlining. This needs to happen because the precision
of the operations in the inlined implementation depends on the highest
precision of all of the arguments to the call.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Hyunjun Ko
1ee2ad584c freedreno/ir3: enable nir_opt_loop_unroll on a6xx
If precision lowering happens at GLSL IR, loop_analysis at IR doesn't
work as expected since it can't handle things like:

"(expression bool < (expression float16_t f2fmp (var_ref ndx) ) (constant float16_t (1.000000)) )"

So we'd rather do this optimization at the NIR stage.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
61f7a1dfc5 freedreno/ir3: Lower bools to bitsize
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Iago Toral Quiroga
467c9a0faa nir: add a bool bitsize lowering pass
The pass lowers 1-bit booleans produced by NIR to the native bitsize
of the operations that produce them.

v2: change on lower_load_const_instr after upstream changes. Added
    TODO2 to explain it, as it was not properly tested yet (see
    already existing TODO) (Neil)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Hyunjun Ko
75674ed4d4 freedreno: Enable mediump lowering
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
cc09745714 glsl: Add unit tests for the lower_precision pass
Adds a unit tests script that invokes the standalone compiler with
--lower-precision and verifies that lowered operations are being used.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
32cd3bd850 glsl/standalone: Add an option to lower the precision
Adds a --lower-precision option that just sets the LowerPrecision
compiler option. That way it can be used in unit tests to test the
precision lowering pass.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
b83f4b9fa2 glsl: Add an IR lowering pass to convert mediump operations to 16-bit
This works by finding the first rvalue that it can lower using an
ir_rvalue_visitor. In that case it adds a conversion to float16
after each rvalue and a conversion back to float before storing
the assignment.

Also it uses a set to keep track of rvalues that have been
lowred already. The handle_rvalue method of the rvalue visitor doesn’t
provide any way to stop iteration. If we handle a value in
find_precision_visitor we want to be able to stop it from descending into
the lowered rvalue again.

Additionally this pass disallows converting nodes containing non-float.
The can_lower_rvalue function explicitly excludes any branches
that have non-float types except bools. This avoids the need to have
special handling for functions that convert to int or double.

Co-authored-by: Hyunjun Ko <zzoon@igalia.com>

v2. Adds lowering for texture samples

v3. Instead of checking whether each node can be lowered while walking the
tree, a separate tree walk is now done to check all of the nodes in a
single pass. The lowerable nodes are added to a set which is checked
during find_precision_visitor instead of calling can_lower_rvalue.

v4. Move the special case for temporaries to find_lowerable_rvalues. This
needs to be handled while checking for lowerable rvalues so that any
later dereferences of the variable will see the right precision.

v5. Add an override to visit ir_call instructions and apply the same
technique to override the precision of the temporary variable in the
same way as done for builtin temporaries and ir_assignment calls.

v6. Changes the pass so that it doesn’t need to lower an entire subtree in
order do perform a lowering. Instead, certain instructions can be
marked as being indepedent of their child instructions. For example,
this is the case with array dereferences. The precision of the array
index doesn’t have any bearing on whether things using the result of
the array deref can be lowered.

Now, only toplevel lowerable nodes are added to the lowerable_rvalues
instead instead of additionally adding all of the subnodes.

It now also only needs one hash table instead of two.

v7. Don’t try to lower sampler types. Instead, the sample instruction is
now treated as an independent point where the result of the sample can
be used in a lowered section. The precision of the sampler type
determines the precision of the sample instruction. This also means
the coordinates to the sampler can be lowered.

v8. Use f2fmp instead of f2f16.

v9.  Disable lowering derivatives calcualtions, which might not work
properly on some hw backends.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
c525785edc glsl/hierarchical_visitor: Call leave_callback on leaf nodes
Previously for leaf ir_instructions only the enter callback was
called. This makes it a bit difficult to make a pass that wants to
visit every instruction using a stack. Making it call the leave
callback as well makes it behave less surprisingly.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Neil Roberts
0e1680a1e2 glsl: Add a method to get precision from a deref instruction
Adds ir_dereference::precision(). For a normal variable dereference,
the precision comes from the variable. For a record member it comes
from the field within the record. For an array it can come from
either, depending on where the underlying array is stored. The method
recursively walks the derefs until it finds one of the first two.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
2020-03-24 23:21:21 +00:00
Lionel Landwerlin
ba56684a14 i965/iris: fix crash when calling GetPerfQueryDataINTEL
On a query that was never begun.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>
2020-03-24 22:54:12 +00:00
Marek Olšák
8a3e2cd9b2 glthread: compile marshal_generated.c faster by breaking it up into 8 files
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
2020-03-24 16:28:30 -04:00
Marek Olšák
cadddbd269 glthread: declare marshal and unmarshal functions as non-static
Declare them in the header file. Then we can split marshal_generated.c
into multiple files.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
2020-03-24 16:28:30 -04:00
Marek Olšák
03da51eb07 glthread: inline SET_func and add -O1 to build _mesa_create_marshal_table faster
The compile time of marshal_generated.c improved from 30.1s to 12.4s.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
2020-03-24 16:28:30 -04:00
Samuel Pitoiset
238e2ed210 radv: enable VK_KHR_8bit_storage on GFX6-GFX7
Enabling a Vulkan extension doesn't mean that all features need
to be implemented. DOOM Eternal crashes at launch if that ext
is not supported but it doesn't matter if the features are enabled
or not.

Let's enable it like we did for VK_KHR_16bit_storage.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>
2020-03-24 16:34:21 +00:00
Pierre-Eric Pelloux-Prayer
bd22a0f710 util/u_process: fix Windows build
Reported by Brian Paul.

Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>
2020-03-24 15:58:34 +00:00
Alyssa Rosenzweig
6a4fadce12 pan/bi: Rewrite aligned vectors as well
This still isn't optimal, but it handles another common case where we
have a vector "prefix" and can rewrite directly. The last case is one
where writemasks and such would start coming into play and - for the
moment - is not worth the hike in complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
2020-03-24 15:29:35 +00:00
Alyssa Rosenzweig
5a3493c536 pan/bi: Lower combines to rewrites for scalars
This avoids unneeded moves for scalars. It still generates suboptimal
code for vectors, however.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
2020-03-24 15:29:35 +00:00
Alyssa Rosenzweig
e0a51d5308 pan/bi: Ingest vecN directly (again)
Last time, I swear. We still generate writemasks but SSA-like ones and
do the lowering ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
2020-03-24 15:29:35 +00:00
Jonathan Marek
04509dae7f turnip: implement depth clamp
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
2020-03-24 13:01:44 +00:00
Jonathan Marek
afe27d5345 turnip: fix znear clipping
Vulkan clips znear at 0 instead of -1.

Fixes dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
2020-03-24 13:01:44 +00:00
Jonathan Marek
07a8100aed freedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
2020-03-24 13:01:44 +00:00
Rhys Perry
43918c9a7f aco: implement 64-bit VGPR constant copies in handle_operands()
64-bit VGPR constant copies can happen because of 64-bit constant copy
propagation. Since this optimization is beneficial and more annoying to
deal with in the optimizer, I've implemented 64-bit VGPR constant copies
in handle_operands().

This also sets copy_operation::size correctly for 64-bit constant copies.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
2020-03-24 11:28:55 +00:00
Rhys Perry
21ba2bc595 aco: remove dead code in handle_operands()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
2020-03-24 11:28:55 +00:00
Rhys Perry
9f4ba2d2b4 nir/gather_info: fix per-vertex handling in try_mask_partial_io
pipeline-db (Navi, ACO):
Totals from affected shaders:
SGPRS: 6432 -> 6432 (0.00 %)
VGPRS: 11924 -> 11924 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1596 -> 1596 (0.00 %) dwords per thread
Code Size: 575524 -> 518620 (-9.89 %) bytes
LDS: 12187 -> 12187 (0.00 %) blocks
Max Waves: 2695 -> 2695 (0.00 %)

Helps a few hundred Dark Souls 3 shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>
2020-03-24 11:09:15 +00:00
Pierre-Eric Pelloux-Prayer
f1cc13727c radeonsi: enable workarounds for YoYo engine based games
Without the radeonsi_sync_compile option the games crashes at
startup.
The engine seems to be using a custom global new operator and
it doesn't plays well with multithreading it seems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1310
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1271
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1272
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1288
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2611
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:33:29 +01:00
Pierre-Eric Pelloux-Prayer
8f48e7b1e9 util/xmlconfig: add new sha1 application attribute
This is useful to enable workarounds for applications with a generic name.

For instance all games made with the YoYo game engine have the same executable
name "runner".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:33:29 +01:00
Pierre-Eric Pelloux-Prayer
f8f1413070 util/u_process: add util_get_process_exec_path
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:30:34 +01:00
Pierre-Eric Pelloux-Prayer
2cb965e5b6 util/os_file: extend os_read_file to return the file size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
2020-03-24 08:30:34 +01:00
Pierre-Eric Pelloux-Prayer
bd6234f24b radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.

When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.

Verified with the captures from bugs cited below.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
2020-03-24 08:05:12 +01:00
Jason Ekstrand
67a10ea215 intel/dump_gpu: Handle a bunch of getparam in the no-HW case
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
2020-03-24 06:28:29 +00:00
Jason Ekstrand
7fd4184378 intel/dump_gpu: Add an ensure_device_info helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
2020-03-24 06:28:29 +00:00
Jason Ekstrand
be451f71ab anv: Stop fetching the timestamp frequency ourselves
gen_get_device_info_from_fd fetches the timestamp frequency from the
kernel.  ANV also carrying code for it is redundant.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
2020-03-24 06:28:28 +00:00
Chia-I Wu
d63d000686 egl/android: enable/disable KHR_partial_update correctly
Commit f3728816af (egl/android: require ANDROID_native_fence_sync
for buffer age) re-added some stale code removed in commit
b4345da876 (egl/android: Delete set_damage_region from egl dri
vtbl).  Remove it now.

Commit b4345da876 assumes KHR_partial_update is only
driver-dependent.  That is mostly true except that the extension
also introduces buffer age query, which depends on
ANDROID_native_fence_sync on Android.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>
2020-03-23 16:22:24 -07:00
Eric Anholt
41412cc4b7 ci: Ban the recent popular freedreno a630 intermittent failure.
This popped up last thursday.  The only relevant code commit was my pixel
center half integer change, but the more likely thing to me seems to be
having shuffled the test order by introducing more skips the day before.

Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2670
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>
2020-03-23 20:22:53 +00:00
Marek Olšák
719063d4d0 st/mesa: fix use of uninitialized memory due to st_nir_lower_builtin
reported by valgrind

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>
2020-03-23 20:01:31 +00:00
Rhys Perry
17c7f4e30e aco: fix boolean undef regclass
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>
2020-03-23 19:43:09 +00:00
Roman Stratiienko
4ed12efb58 lima: Add missing source file to Android.mk
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>
2020-03-23 19:26:29 +00:00
D Scott Phillips
1182a3934a intel/tools/aubinator_error_decode: Decode ring buffers from HEAD to TAIL
Capture the HEAD and TAIL register values from the dump and
properly index the ring buffer using those. Previously we would
decode the ring buffer from the beginning, printing out whatever
happened to be there.

Also, properly pass the `from_ring` parameter to gen_print_batch()
so that decoding doesn't stop once MI_BATCH_BUFFER_END is
encoutered.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>
2020-03-23 19:10:50 +00:00
Elie Tournier
84e707e6f2 docs/features: Update virgl OpenGL 4.5 features
GL_ARB_clip_control and GL_KHR_robustness are now expose in the guest.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>
2020-03-23 18:49:13 +00:00
D Scott Phillips
49f9a0bb57 intel/tools/aubinator_error_decode: read HW Context before other batches
The hardware context buffer has state that was set before the
batch started. By decoding it first, references to things like
Dynamic State Base Address are decodable in the command batches.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>
2020-03-23 18:13:37 +00:00
Sagar Ghuge
c40acdef52 iris: Set patch count threshold in 3DSTATE_HS
Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Sagar Ghuge
60c789543e anv: Set patch count threshold in 3DSTATE_HS
Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Sagar Ghuge
1a5ac646ce intel/compiler: Track patch count threshold
Return the number of patches to accumulate before an 8_PATCH mode thread
is launched.

v2: (Kenneth Graunke)
- Track patch count threshold instead of input control points.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Sagar Ghuge
b3dd54fe13 intel/genxml: Add patch count threshold field on gen12
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
2020-03-23 17:57:57 +00:00
Andres Gomez
39ac87bf50 gitlab-ci/traces: Add Vulkan sample entries for POLARIS10
v2:
  - Updated commit log.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>
2020-03-23 17:36:32 +00:00
Denys
6bca192e12 gitlab: add bug report template
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>
2020-03-23 17:15:42 +00:00
Rhys Perry
9d56ed199b aco: emit IR in IF's merge block instead if the other side ends in a jump
Fixes NIR such as:
if (divergent) {
   a = sgpr()
} else {
   break;
}
use(a)

Previously we would have emitted:
if (divergent) {
   a = sgpr()
}
if (!divergent) {
   break;
}
use(a)

But "a" isn't available at it's use. Now we emit:
if (divergent) {
}
if (!divergent) {
   break;
}
a = sgpr()
use(a)

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 1936 -> 1936 (0.00 %)
VGPRS: 1264 -> 1264 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 159408 -> 159152 (-0.16 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 81 -> 81 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2557
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
8d8c864beb aco: improve check for unreachable loop continue blocks
The old code would have previously caught:
loop {
   ...
   break
}
when it was meant to just catch:
loop {
   if (...)
      break
   else
      break
}

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
46e94fd854 aco: skip NIR in unreachable merge blocks
NIR removes most of this but undef instructions for loop header phis can
remain. These were harmless because ACO would DCE them itself.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
638cbc21a1 aco: handle when ACO adds new continue edges
Usually a loop ends with a uniform continue. If it doesn't and we end up
adding our own continue edges (because of continue_or_break or divergent
breaks at the end), we have to add extra operands to the loop header phis.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
f2c4878de9 aco: handle missing second predecessors at merge block phis
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Rhys Perry
f1a2e1df78 aco: set has_divergent_branch for discards in loops
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
2020-03-23 15:55:12 +00:00
Andres Gomez
8bc3d6574c gitlab-ci: add python3-requests to the test-vk container
After 90a39af5f6 ("ci: Drop the git dependency in tracie"), we have
this error in the radv-polaris10-traces job:

"
...

+ /builds/tanty/mesa/artifacts/tracie/tests/test.sh
tracie_succeeds_if_all_images_match: Fail
Traceback (most recent call last):
  File "/tmp/tracie.test.glY0O23HJo/tracie.py", line 6, in <module>
    import requests
ModuleNotFoundError: No module named 'requests'

...
"

v2:
  - Updated commit log to be more descriptive (Michel).

Fixes: 90a39af5f6 ("ci: Drop the git dependency in tracie")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4237>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4237>
2020-03-23 17:17:56 +02:00
Samuel Pitoiset
7ac8bb33cd radv/llvm: fix subgroup shuffle for chips without bpermute
bpermute only exists on GFX8+ and only with Wave32 on GFX10. Instead
we have to use readlane with a waterfall loop to defeat the LLVM
backend.

This fixes DOOM Eternal which requires subgroup shuffle.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4284>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4284>
2020-03-23 14:19:03 +00:00
Roman Stratiienko
2a70a1d69d panfrost: Align Android makefiles with recent changes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4280>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4280>
2020-03-23 14:03:22 +00:00
Samuel Pitoiset
6c8ccbe41b gitlab-ci: add a bunch of new fossils from the Sascha Vulkan demos
The whole fossils-db is only 448KB of data which is pretty small.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Samuel Pitoiset
48e920315c gitlab-ci: add a new stage for RADV CI
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Samuel Pitoiset
e22d562c17 gitlab-ci: compile fossils with more ASICs
I think we want to cover these 3 generations at the barely minimum.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Samuel Pitoiset
1517e58c1b gitlab-ci: compile fossils with both RADV compiler backends (LLVM/ACO)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4082>
2020-03-23 12:16:02 +00:00
Jan Zielinski
8b3b07afc0 gallium/gallivm: Remove workaround disabling AVX code for newer CPUs
The change enables using full 256-bit AVX and AVX2 instructions
on newer platforms.

Reviewed-by: Alok Hota <alok.hota@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4225>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4225>
2020-03-23 09:20:51 +00:00
Samuel Pitoiset
de550805c5 radv/winsys: spoof some values for num_render_backends in the null winsys
To avoid crashes when RADV_FORCE_FAMILY is set to GFX9+ because
num_render_backends is used to compute binning state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
2020-03-23 09:50:53 +01:00
Samuel Pitoiset
b911af06cd radv/winsys: fix wrong PCI ID for Vega10 in the null winsys
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4282>
2020-03-23 09:50:51 +01:00
Eric Anholt
050ec8ff53 glsl: Restore the IsES flag on the shader when reading from cache.
I found that when trying to MESA_SHADER_CAPTURE_PATH a trace, I was
getting "GLSL >= 3.00" for the ES shaders I was trying to capture.
Keeping this metadata in the cached shader program lets us capture
correctly.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4219>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4219>
2020-03-22 20:49:37 -07:00
Dave Airlie
9e3efa4294 gallivm: add support for rgtc/latc fetches.
Annoyingly heaven uses rgtc2 snorm but this at least avoids
the function call overheads to the util fetch functions.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
2020-03-23 11:02:03 +10:00
Dave Airlie
b3894e52c2 gallivm/s3tc: split out dxt5 alpha code
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3924>
2020-03-23 11:02:00 +10:00
Jordan Justen
f02ae69867 intel: Add TGL PCI ID
Ref: Bspec 44455
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-03-21 23:49:38 -07:00
Jordan Justen
1c6ef0165f intel: Update TGL PCI strings
Ref: Bspec 44455
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-03-21 23:49:34 -07:00
Alyssa Rosenzweig
d9d549ff88 pan/bi: Pack csel4 opcodes
These are pretty straightforward but there's a lot of details to keep
straight. In the IR, we keep a general logical comparator and types
separately; in the hardware, the type gets fused with a (much more)
limited number of comparators. So there's a fair bit of code here to
account for these differences, fusing in the type information, and
changing up argument order as necessary to make it actually correct.
Anything to save a bit!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
5cdc31abd6 pan/bi: Default csel to "!= 0" mode
This way we always have regular csel conditions instead of a weird
.always special case for 3-src CSEL mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
46f526eb1e pan/bi: Use bi_lookup_immediate when packing
This gets us part of the way there to packing lo/hi separately. A little
more work is needed to do this "properly", but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
11bccb0564 pan/bi: Respect shift when printing immediates
We allow packing multiple immediates in, but we were missing this in the
print.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
3f786ed10b pan/bi: Implement csel fusing
When generating csel instructions, we can peak to see what condition is
being used. If we're using a "nice" condition, we can fuse it in with
the csel itself, ideally letting the condition itself be DCE'd away.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
5a02c871f2 pan/bi: Add soft NIR->BIR condition translation
We would like to use this routine opportunistically when fusing
conditions into csels and branches, so let's add a mode where we don't
abort.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
cd7fec782e pan/bi: Remove hacks for 1-bit booleans in IR
Now that we lower them away, a bunch of special cases disappear.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
12299dead7 pan/bi: Lower bool to ints
Currently we lower to int32, but once mediump lands we'll be ready for
that too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
1097c69087 pan/bi: Pack LD_ATTR
Also requires the usual R61/62 games.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
0be1116b81 pan/bi: Pack st_vary
This should let varying writes go through finally.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
9213b2520c pan/bi: Add store_channels property
It can't be inferred from the usual writemask since stores don't write
to a register destination.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
c57ac9d136 pan/bi: Generalize data register setting
So we can use it for stores too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
9458b017a9 pan/bi: Flesh out st_vary IR
We need to make the semantics of BI_VECTOR a bit more precise -
vectorize only the first argument, not all of them. This is enough for
current and future users, as far as I know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
409e4f8a49 pan/bi: Pack ld_var_addr
Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
7321a17c6a pan/bi: Pack ld_ubo ops
Routes some infrastructure to do so at least slightly generically but
we'll see.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
908341ea3f pan/bi: Add bi_load32_components helper
Pattern seems to crop up a lot.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
8bb16138b6 pan/bi: Include UBO index for sysval reads
Trivially zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
fc0b49bb2c pan/bi: Index out constants in instructions
We rewrite BIR_INDEX_CONSTANT (and _ZERO) to preassigned constant ports
when assign uniform_const for the bundle. There are a lot of issues
raised here, unfortunately, and the implementation here is woefully
incomplete with a nasty hack for loads... nevertheless, it's somewhere
to start.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
d2d0de962e pan/bi: Document constant related errata(?)
We're not totally sure what's up with this but Connor says if you
violate it Bad Things happen in your shader. I think this might be an
issue affecting early Bifrost (G71, ..?); when we know more we can look
into patching in a fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
eb590a98d2 pan/bi: Pack a constant quadword
The piping isn't there to make use of it yet, but this stubs out
constant support at the clause level.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
50d3f4df45 pan/bi: Add move lowering pass
We need ALU mostly scalarized, but we get vector moves created from
lower_vec_to_mov so let's scalarize that ourselves rather than bother
NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:35 +00:00
Alyssa Rosenzweig
58a51c49bb pan/bi: Add bi_emit_before helper
For BIR lowering passes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:34 +00:00
Alyssa Rosenzweig
6b7077efda pan/bi: Implement FMA/MOV without modifiers
We split off MOV from FMOV since the canonical move on Bifrost doesn't
accept modifiers. (We can still do fmov, but with something like add-0.)
This will also make copyprop a little nicer, I think. Anyway, the
non-modifier version we can implement as-is for FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
2020-03-22 03:32:34 +00:00
Jonathan Marek
f8bbf44ca4 etnaviv: nir: add compile_check_limits
To match TGSI compiler behaviour in glmark terrain scene for example.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4199>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4199>
2020-03-22 00:29:36 +00:00
Marek Olšák
303842b2db ac: fix fast division
This stopped working with LLVM 11 and might occasionally have been broken
on older LLVM, because the metadata was set on the mul, not on the rcp.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4268>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4268>
2020-03-21 22:34:17 +00:00
Eduardo Lima Mitev
55b0a676fd turnip: Instance can be NULL resolving 'GetInstanceProcAddr' entry point
Using turnip driver without a vulkan loader is currently broken because
the entry point resolver is expecting a valid instance when resolving
'vkGetInstanceProcAddr' through vk_icdGetInstanceProcAddr().

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4257>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4257>
2020-03-21 18:56:07 +01:00
Marek Olšák
5cc3ab0ba0 vbo,gallium: make glBegin/End buffer size configurable by drivers
The default is 512 KB, but radeonsi wants 4 MB.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
2020-03-21 03:39:51 +00:00
Marek Olšák
11d3aa5e7b glthread: remove the marshal_fail XML attribute
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
c02a1347e5 glthread: ignore vertex arrays with user pointers if they're disabled
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
0b1dd18591 glthread: track which vertex array attribs are enabled
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
c571dda1e0 glthread: rename non_vbo helper functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
bde4505f61 glthread: handle buffer unbinding via glDeleteBuffers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
15b0719ae2 mesa: put gl_thread_state inside gl_context to remove pointer indirection
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
8a4114b929 glthread: rename marshal.h/c to glthread_marshal.h and glthread_shaderobj.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
df74163995 glthread: move buffer functions into glthread_bufferobj.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
37725e6c38 glthread: autogenerate prototypes for custom-marshalled functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
4ded23a4ad glthread: simplify printing safe_mul in gl_marshal.py
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Marek Olšák
01a50e2493 glthread: remove _mesa_post_marshal_hook, because it's not very useful
and also remove the useless forward declaration of enum marshal_dispatch_cmd_id.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4124>
2020-03-20 23:01:13 -04:00
Jason Ekstrand
aee004a7c8 util/sparse_array: Stash the node level in the node pointer
This reworks the data structure a bit and, in my view, simplifies it.
Instead of each node having a header which has the node level in it, we
use the bottom 6 bits of the pointer for that.  This requires us to
allocate with the os_malloc/free_aligned helpers (which call into
posix_memalign on Linux) but cache-line aligning our allocations is
actually probably a good thing given that we're doing atomics on them.

The primary advantages to doing this is that it changes the number of
memory accesses per tree level from 2 to 1 when walking the tree because
we no longer have to look at node->level.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:31:10 -05:00
Jason Ekstrand
6be65b0777 meson,ci: Disable sparse_array tests on windows
As soon as I switch to using the allocation helpers in os_memory.h,
these tests start blowing up on the Windows build in GitLab CI.  As far
as I can tell, the issue is something with the combination of the debug
allocator in u_debug_memory.c and the mutex implementation in the
version of Wine running in CI.  The tests don't fail on real windows nor
do they fail with newer versions of Wine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:26:07 -05:00
Jason Ekstrand
9fcd8bdbfc util/sparse_array: Add a node_size_log2 temporary
We use this value several times.  It's probably best to encourage the
compiler to only read it once.  I have no proof that this actually makes
any performance improvement whatsoever.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:26:07 -05:00
Jason Ekstrand
7893872a6c util/sparse_array: Finish the sparse_array in the tests
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4228>
2020-03-20 15:26:07 -05:00
Eric Anholt
8edaa843ab ci: Move db820c and db410c's gles3 tests to manual, like radv did.
This should make these tests available for clicking on the web ui in
personal branches, while hiding them from marge and the post-merge CI
pipelines.  We had already disabled db410c's gles3, but it wasn't
available in the ui and you had to hack .gitalb-ci.yml.  db820c is now
being disabled by default, due to instaboots mentioned in
https://gitlab.freedesktop.org/mesa/mesa/issues/2649

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4247>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4247>
2020-03-20 18:27:37 +00:00
Mark Menzynski
866a8da2a4 tgsi/util: Change boolean for bool
I was getting errors with "boolean" when compiling. This patch changes
boolean to bool from <stdbool.h>.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3903>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3903>
2020-03-20 17:25:25 +00:00
Mark Menzynski
24e82e4533 util/blob: Add overwrite function for uint8
Overwrite function for this type  was missing and I needed it for my project.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3903>
2020-03-20 17:25:25 +00:00
Vasily Khoruzhick
1b49534df2 lima: add support for R and RG formats
Unfortunately these are not supported natively for sampling
so we have to lower them.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4241>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4241>
2020-03-20 17:00:10 +00:00
Vasily Khoruzhick
e763c6778c lima: split pixel and texel format tables
This is preparation for the next commit where we may need different
swap_r_b flags for pixel and texel formats.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4241>
2020-03-20 17:00:10 +00:00
Erik Faye-Lund
d4b0e28f62 zink/spirv: do not use bitwise operations on booleans
According to the SPIR-V specification, these operations require
integer-types. When bit_size is 1, we use booleans, which makes us emit
illegal code.

So let's fix the emitting to check if the first source is one bit wide.

For inot we can take a short-cut, and check the destination instead.
This doesn't work for ieq and ine, so let's not bother to do this
BINOP_LOG.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4036>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4036>
2020-03-20 16:37:30 +00:00
Michel Dänzer
130c0ba1cc gitlab-ci: Restrict s390x/ppc64el jobs to packet runners
They are hitting timeouts on the gstreamer runners now... *sigh*

Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4233>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4233>
2020-03-20 16:39:17 +01:00
Rhys Perry
500842399a radv/winsys: set has_syncobj_wait_for_submit in the null winsys
Needed for Vulkan 1.1+

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4249>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4249>
2020-03-20 09:51:06 +00:00
Lionel Landwerlin
58deebe547 intel: add new TGL pci ids
Update following kernel : https://patchwork.freedesktop.org/patch/357921/

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bspec: 44455
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4248>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4248>
2020-03-20 10:55:57 +02:00
Samuel Pitoiset
2d3223ca90 radv: fix optional pSizes parameter when binding streamout buffers
The Vulkan spec 1.2.135 says:

   "pSizes is an optional array of buffer sizes, specifying the maximum
   number of bytes to capture to the corresponding transform feedback
   buffer. If pSizes is NULL, or the value of the pSizes array element
   is VK_WHOLE_SIZE, then the maximum bytes captured will be the size
   of the corresponding buffer minus the buffer offset."

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2650
Fixes: b4eb029062 ("radv: implement VK_EXT_transform_feedback")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4232>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4232>
2020-03-20 09:25:14 +01:00
Caio Marcelo de Oliveira Filho
fdc6032928 mesa/main: Fix overflow in validation of DispatchComputeGroupSizeARB
An uint64_t can store the result of multiplying two GLuint (uint32_t),
so use that property to check for overflow when calculating the total.

Change the error message so we don't need to care about the actual
total -- which means we don't need a larger than 64-bit value to hold
it.

Fixes: 45ab63c0cb ("mesa/main: add support for ARB_compute_variable_groups_size")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4240>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4240>
2020-03-20 03:07:45 +00:00
Marek Olšák
4ac1d3cc45 driconf: enable glthread for "From The Depths"
25% perf improvement

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4254>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4254>
2020-03-19 21:27:01 -04:00
Marek Olšák
7a59d6eaa2 winsys/radeon: change to 3-space indentation
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4192>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4192>
2020-03-19 20:33:01 -04:00
Marek Olšák
b13d5265cc glthread: don't declare unmarshal functions as inline
They are never inlined.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
efaeac9e84 glthread: clean up debug_print_sync code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
b00d219ec0 glthread: remove debug_print_marshal function
We don't need to print every function we execute.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
951c6acb07 glthread: don't execute any custom VAO and BindBuffer code in the Core profile
It's not needed, because user pointers can never occur there.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
87f6be4456 glthread: track VAOs created by CreateVertexArrays
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
720f34d5eb glthread: enable display lists
They seem to work fine.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
4dcdf974f8 glthread: align the batch buffer to 8 bytes for pointers and doubles again
This was changed when I switched to types from size_t to int.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4251>
2020-03-20 00:00:22 +00:00
Marek Olšák
ff0881c686 mesa: remove redundant api_loopback functions
vbo_attrib_tmp.h implements them, so this loopback code isn't needed
and shouldn't be used.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4123>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4123>
2020-03-19 23:24:08 +00:00
Marek Olšák
98d1197233 mesa: use vbo_attrib_tmp.h to generate display list vertex attrib functions
This removes about 1150 lines of code.

The diff is messy, but the new code really starts with save_Attr32bit and
below. Ignore false Eval/Material/Begin changes etc. Git can't figure out
what was really changed. I didn't change them.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4123>
2020-03-19 23:24:08 +00:00
Jason Ekstrand
3252041a78 anv: Only add END_OF_PIPE_SYNC if we actually have AUX_INVAL
Fixes: 43dc842cb9 "anv: Wait for the GPU to be idle before..."
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: D Scott Phillips <d.scott.phillips@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4234>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4234>
2020-03-19 21:58:49 +00:00
Eric Anholt
5b57aa79e2 freedreno: Switch to exposing only half-integer pixel centers.
This is what the HW provides us.  If we need integer pixel centers, we
want the state tracker to do the lowering pass so that it gets to optimize
on the subtract.  This is also the shader instructions that the blob is
doing on GLES, and is what Vulkan wants too, as was noted in MR !4172.

shader-db on a630:
total instructions in shared programs: 186689 -> 186168 (-0.28%)
total nops in shared programs: 66253 -> 66139 (-0.17%)
total non-nops in shared programs: 120436 -> 120029 (-0.34%)
total dwords in shared programs: 292192 -> 291168 (-0.35%)
total last-baryf in shared programs: 4810 -> 4734 (-1.58%)
total full in shared programs: 10176 -> 10195 (0.19%)
total constlen in shared programs: 54589 -> 54575 (-0.03%)
total sstall in shared programs: 24582 -> 24802 (0.89%)
total (ss) in shared programs: 3921 -> 3925 (0.10%)
total (sy) in shared programs: 1934 -> 1923 (-0.57%)

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4223>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4223>
2020-03-19 21:35:49 +00:00
John Stultz
5c8ba96a54 r600: Fix build error in sfn_nir_lower_fs_out_to_vector.cpp
In trying a full build under AOSP, I ran into the following error:

In file included from external/mesa3d/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp:33:
external/libcxx/include/set:942:26: error: the specified comparator type does not provide a const call operator [-Werror,-Wuser-defined-warnings]
    static_assert(sizeof(__diagnose_non_const_comparator<_Key, _Compare>()), "");
                         ^
external/mesa3d/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp:78:34: note: in instantiation of template class 'std::__1::multiset<nir_intrinsic_ins
tr *, r600::nir_intrinsic_instr_less, std::__1::allocator<nir_intrinsic_instr *> >' requested here
   using InstrSubSet = std::pair<InstrSet::iterator, InstrSet::iterator>;
                                 ^
external/libcxx/include/__tree:967:5: note: from 'diagnose_if' attribute on '__diagnose_non_const_comparator<nir_intrinsic_instr *, r600::nir_intrinsic_instr_less>':
    _LIBCPP_DIAGNOSE_WARNING(!std::__invokable<_Compare const&, _Tp const&, _Tp const&>::value,
    ^                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/libcxx/include/__config:1244:21: note: expanded from macro '_LIBCPP_DIAGNOSE_WARNING'
     __attribute__((diagnose_if(__VA_ARGS__, "warning")))
                    ^           ~~~~~~~~~~~
1 error generated.

Which is pretty opaque to me, but searching the web suggested
adding a cost, which seems to resovle it.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
John Stultz
0df48e5d1f vc4_bufmgr: Remove duplicative VC definition
This is already defined in
  src/broadcom/cle/v3d_packet_helpers.h:42:9

And was causing build issues in AOSP when building with mmma

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
John Stultz
e3bbe1fa65 etnaviv: Avoid shift overflow
Building with AOSP I'm seeing:

external/mesa3d/src/gallium/drivers/etnaviv/etnaviv_screen.c:245:31: error: signed shift result (0x100000000) requires 34 bits to represent, but 'int' only has 32 bits [-Werror,-Wshift-overflow]
         system_memory = 4096 << 20;

system_memory is a uint_64t, so this patch addresses the issue
by casting 4096 to a unint_64t before the shift is done.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
John Stultz
511c6408f4 Android.mk: Tweak MESA_ENABLE_LLVM checks
Change the MESA_ENABLE_LLVM checks in Android.mk
files in order to get mesa3d to build w/ AOSP
using mmma.

This tries to re-create a change that was introduced
in the following merge in the AOSP branch:
  69f2c0128d2b Merge branch 'aosp/upstream-18.0'

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
2020-03-19 21:20:08 +00:00
Jason Ekstrand
9dbff6f6ce intel/iris: Always initialize CCS to 0
Previously, we were initializing the CCS to 0xFF for MCS+CCS due to a
misunderstanding of the following lines in the bspec:

    The following are the general SW requirements for MCS buffer clear
    functionality:
        ...
         - If Software wants to enable Color Compression without Fast
           clear, Software needs to initialize MCS with zeros.
         - Lossless compression and CCS initialized to all F (using HW
           Fast Clear or SW direct Clear) on the same surface is not
           supported.

The first line does not refer to the CCS as the comment author supposed
but refers to the MCS as the comment says.  It means that if you want to
use MCS compression without a fast-clear, you should initialize the MCS
to 0x00.  This is because the value 0x00 in the MCS means "all data is
in plane 0" which is a perfectly valid non-fast-clear initialization.
It's also the value the MCS should be in if you do a RECTLIST slow-clear
where the primitive fully covers each pixel such that the same value is
written to all samples.

The second line in the above quote seems to imply that CCS fast-clear is
incompatible with MCS fast-clear.  In particular, MCS+CCS fast-clear
uses a 0xff value in the MCS (like on Gen7-11) and leaves the CCS in
either the compressed or the pass-through state.  Therefore, we should
initialize the CCS to 0x00 even for MCS+CCS surfaces.

Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4074>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4074>
2020-03-19 20:54:19 +00:00
Lionel Landwerlin
507abc3959 isl: drop min row pitch alignment when set by the driver
When the caller of the isl_surf_init() specifies a row pitch, do not
consider the minimum CCS requirement if it's incompatible with the
caller's value.

isl_surf_get_ccs_surf() will check that the main surface alignment
matches CCS expectations.

v2: Simplify checks (Nanley)

v3: Add Comment about isl_surf_get_ccs_surf() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Fixes: a3f6db2c4e ("isl: drop CCS row pitch requirement for linear surfaces")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Lionel Landwerlin
def3470e9b isl: only apply main surface ccs pitch constraint with CCS
We could be creating a Y-tiled surface that isn't going to use CCS
(this could be the case when clearly indicated through modifiers).
Don't apply the main surface pitch alignment constraint in that case.

v2: Use logical NOT (Sagar)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a3f6db2c4e ("isl: drop CCS row pitch requirement for linear surfaces")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Lionel Landwerlin
dab0aadea9 isl: properly filter supported display modifiers on Gen9+
Y tiling is supported for display on Gen9+ so don't filter it from the
possible flags.

v2: Drop Yf from display supported tilings on Gen12+ (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Lionel Landwerlin
157a3cf3ec isl: implement linear tiling row pitch requirement for display
We're missing a requirement for alignment of row pitch for the display
HW. In linear tiling, the row pitch must be a 64bytes aligned.

v2: Use correct formula to align to 64bytes (Chad)

v3: Matching {} (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
2020-03-19 19:17:10 +00:00
Eric Anholt
f778c48869 ci: Only run the freedreno baremetal tests when freedreno/core changes.
Same as we do for a630 (docker) tests.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4229>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4229>
2020-03-19 17:21:24 +00:00
Dylan Baker
7524717ba2 docs/release-calendar: Add calendar for 20.1 Release candidates
It's time to start getting the calendar going for 20.1 so that everyone
is clear on when the close date for new features is. Eric Engstrom has
agreed to help out with the 20.1 series, and will be the primary point,
he's also helping out with a few of the 20.0.x point releases.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4077>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4077>
2020-03-19 09:26:11 -07:00
Rhys Perry
cf62c2b2ac radv: call nir_shader_gather_info again
pipeline-db (Navi, ACO):
Totals from affected shaders:
SGPRS: 11840 -> 11840 (0.00 %)
VGPRS: 19012 -> 19124 (0.59 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 3696 -> 3696 (0.00 %) dwords per thread
Code Size: 998680 -> 921388 (-7.74 %) bytes
LDS: 19646 -> 19646 (0.00 %) blocks
Max Waves: 3398 -> 3401 (0.09 %)

pipeline-db (Navi, LLVM):
Totals from affected shaders:
SGPRS: 17016 -> 17128 (0.66 %)
VGPRS: 19564 -> 14876 (-23.96 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 3872 -> 3872 (0.00 %) dwords per thread
Code Size: 820416 -> 743576 (-9.37 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 3367 -> 3534 (4.96 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4193>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4193>
2020-03-19 15:37:07 +00:00
Rhys Perry
5193688e1a nir/gather_info: handle emit_vertex_with_counter
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4193>
2020-03-19 15:37:07 +00:00
Tomasz Pyra
36ec3cbcf8 gallium/swr: spin-lock performance improvement
Currently, the worker threads are very aggresively
polling for new tasks. If the work is not constantly
fed into the pipeline (which is a case for most of
interactive applications), this creates unnecessary
memory pressure and is using CPU cycles that
could otherwise be used by the applications.
The change implements simple back off mechanism
to help with this problem

Change by Tomasz Pyra (tomasz.pyra@intel.com)

Reviewed-by: Alok Hota <alok.hota@intel.com>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4226>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4226>
2020-03-19 11:11:26 +00:00
Pierre-Eric Pelloux-Prayer
db5cc6a7dd radeonsi: enable glsl_zero_init for Curse of the Dead Gods
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2598
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4214>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4214>
2020-03-19 08:47:09 +01:00
Marek Olšák
3c03718fd7 nir: fix clip/cull_distance_array_size in nir_lower_clip_cull_distance_arrays
This fixes a GPU hang on radeonsi.

It only works if optimizations have already been run.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4194>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4194>
2020-03-19 01:47:28 -04:00
Alyssa Rosenzweig
73812999d9 pan/bi: Pack BI_BLEND
MRT not yet supported to keep things easy.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
a4fb88723e pan/bi: Flesh out BI_BLEND
It ingests the output of ATEST, whatever that actually is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
e06426ea85 pan/bi: Add ATEST packing
Only fp32 for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
b18d0ef708 pan/bi: Flesh out ATEST in IR
ATEST actually takes two sources and has a destination. Although the
details are a little funny, we should still model this correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
61260819ba pan/bi: Track clause types during scheduling
There's an easy mapping for this, so let's do it. Note we do this at
schedule-time instead of emit since we'll need to lookahead clause
types. The alternative is a prepass running after schedule but before
codegen, but there's no reason not to just stick it here when we're
preparing bi_clause in the first place.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
e323df05a9 pan/bi: Don't hide SCHED_ADD inside HI_LATENCY
It makes bitwise property checking annoying.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
d797822d31 pan/bi: Pretty-print clause types in disassembler
Also note that type=1 is for load_vary.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
42af9f47c8 pan/bi: Route through clause header
We already track almost all the information we need, let's dump it onto
the wire now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
d4fbf751cf pan/bi: Skip over data registers in port assignment
They bypass the usual mechanism entirely, let's add some props to
describe this and respect them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
32e5a7e6e9 pan/bi: Emit load_vary ops
Annoyingly long code to do so, but this should theoretically work for
both direct and indirect load_vary. Still need to handle destination.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
37f14c9e50 pan/bi: Pass second src for load_vary ops
For direct, this is just 0, but for indirct, this is a sample mask
preloaded in R61. Handle this at code emit time instead of trying to do
crazy monkeypatching later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
265169f48a pan/bi: Generalize bi_get_src a bit
Allow it to work with ADD ops and stub out some immediate fetching
infrastructure (currently only works with 0).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
1c0e786084 pan/bi: List ADD classes in bi_pack_add
Handling will be... somewhat tricky.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
6069904bbd pan/bi: Pack fadd32
Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
f2afcc6101 pan/bi: Pack BI_FMA ops
This is our first instruction we've emitted, requiring us to pipe
through registes/ports and various details from the IR. It's quite a bit
of code, but overall I'm happy with this structure. With some tedium we
should be able to emit the rest of the ALU ops this way, too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
8a3bf3f1a1 pan/bi: Add struct bifrost_fma_fma
So we can pack regular FMA ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
cd40e189b6 pan/bi: Model 3-bit Bifrost srcs in IR
We'll want to set these manually for schedule-time passthrough, as well
as use the enum for packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
fe379776c7 pan/bi: Route through first_instruction field
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
90ca6a9a6b pan/bi: Assign registers to ports
Now that we can pack registers given the assigned ports, and we can
assign registers from the indices, the missing link is assigning ports
from the registers, and now finally we get some real data showing up in
a disassembly exercising lots of different code paths.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
ff39f57a48 pan/bi: Add missing __attribute__((packed))
That this code worked before makes me rather nervous...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
9080ea8b57 pan/bi: Pack register fields
Now that we have ctrl, the rest is natural... sorta.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
03a271bf15 pan/bi: Add packing for register control field
Filling in some gaps based on intuition from the bit patterns but this
should be vaguely right. More investigation needed down the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
50bce53cd0 pan/bi: Sketch out instruction word packing
Instructions are 78-bits with some seriously suspicious packing
requirements but hey, gotta save 'em bits.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Alyssa Rosenzweig
9269c85578 pan/bi: Setup initial clause packing
At the moment, we just iterate the clauses in the post-RA, post-sched IR
and generate a dummy clause corresponding, passing the results to the
disassembler to verify.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
2020-03-19 03:23:07 +00:00
Dylan Baker
0c5aab626b docs: update calendar, add news item, and link releases notes for 20.0.2
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
2020-03-18 22:47:06 +00:00
Dylan Baker
3c572fa571 docs/relnotes: Add sha256 sums for 20.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
2020-03-18 22:47:06 +00:00
Dylan Baker
552078aec6 Docs: Add release notes for 20.0.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4236>
2020-03-18 22:47:06 +00:00
Eric Anholt
3210214b67 ci: Disable tests that showed intermittent fails on a530 in day 1.
Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2649
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4231>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4231>
2020-03-18 22:17:53 +00:00
Eric Anholt
116a3ac481 ci: Ban the recent popular freedreno a630 flakes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4231>
2020-03-18 22:17:53 +00:00
Samuel Pitoiset
56de6f698e radv: remove wrong assert that checks compute subgroup size
Ooops. For some reasons, I have been confused with Wave32 on GFX10,
but it's still possible to require a specific subgroup size if
only Wave64 is supported.

Fixes: 672d106199 ("radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4227>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4227>
2020-03-18 21:31:47 +00:00
Jason Ekstrand
46187bb54f anv: Swizzle fast-clear values
Starting with Gen12, we can fast-clear a lot more surface formats and we
are suddenly in the position of having to fast-clear surfaces with
formats with an implicit swizzle such as VK_FORMAT_R4G4B4A4_UNORM_PACK16
which is represented as ISL_FORMAT_A4B4G4R4 with a BGRA swizzle.  In
order for blorp to do the fast-clear color conversion for us, it needs
a properly swizzled color.

This fixes the following Vulkan CTS groups on TGL:

 - dEQP-VK.pipeline.blend.format.b4g4r4a4_unorm_pack16.*
 - dEQP-VK.api.image_clearing.core.clear_color_image.*.b4g4r4a4*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4218>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4218>
2020-03-18 21:05:07 +00:00
Jason Ekstrand
3fb8f19481 intel/blorp: Add support for swizzling fast-clear colors
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4218>
2020-03-18 21:05:07 +00:00
Ian Romanick
bf2eb3e0ee soft-fp64: Split a block that was missing a cast on a comparison
This function has code like:

   if (0x7FD <= zExp) {
      if ((0x7FD < zExp) ||
         ((zExp == 0x7FD) &&
            (0x001FFFFFu == zFrac0 && 0xFFFFFFFFu == zFrac1) &&
               increment)) {
         ...
	 return ...;
      }
      if (zExp < 0) {

I saw that, and I thought, "Uh... what?  Dead code?"  I thought it was a
bit fishy, so I grabbed the Berkeley SoftFloat Library 3e code, and
there is similar code in softfloat_roundPackToF64
(source/s_roundPackToF64.c), but it has an extra (uint16_t) cast in the
first comparison.  This is basicially a shortcut for

   if (zExp < 0 || zExp >= 0x7FD) {

So, having the nesting kind of makes sense. On a CPU, nesting the flow
control can be an optimization.  On a GPU, it's just fail.  Split the
block so that we don't need the uint16_t cast magic.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 683638 -> 658127 (-3.73%)
instructions in affected programs: 666839 -> 641328 (-3.83%)
helped: 92
HURT: 0
helped stats (abs) min: 26 max: 2456 x̄: 277.29 x̃: 144
helped stats (rel) min: 3.21% max: 4.22% x̄: 3.79% x̃: 3.90%
95% mean confidence interval for instructions value: -345.84 -208.75
95% mean confidence interval for instructions %-change: -3.86% -3.73%
Instructions are helped.

total cycles in shared programs: 5458858 -> 5344600 (-2.09%)
cycles in affected programs: 5360114 -> 5245856 (-2.13%)
helped: 92
HURT: 0
helped stats (abs) min: 126 max: 10300 x̄: 1241.93 x̃: 655
helped stats (rel) min: 1.71% max: 2.37% x̄: 2.12% x̃: 2.17%
95% mean confidence interval for cycles value: -1539.93 -943.94
95% mean confidence interval for cycles %-change: -2.16% -2.08%
Cycles are helped.

Fixes: f111d72596 ("glsl: Add "built-in" functions to do add(fp64, fp64)")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
a8882132f9 soft-fp64/fadd: Common code optimization for differing sign case
This is basically the same ideas from the previous 4 commits applied
to the aSign != bSign part... and all smashed into one commit.

The shader hurt for spill and / or fills is from
KHR-GL46.gpu_shader_fp64.builtin.inverse_dmat4.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake
total instructions in shared programs: 787258 -> 683638 (-13.16%)
instructions in affected programs: 725435 -> 621815 (-14.28%)
helped: 74
HURT: 0
helped stats (abs) min: 152 max: 10261 x̄: 1400.27 x̃: 975
helped stats (rel) min: 11.61% max: 20.92% x̄: 15.40% x̃: 14.86%
95% mean confidence interval for instructions value: -1740.11 -1060.43
95% mean confidence interval for instructions %-change: -16.01% -14.79%
Instructions are helped.

total cycles in shared programs: 6483227 -> 5458858 (-15.80%)
cycles in affected programs: 6051245 -> 5026876 (-16.93%)
helped: 74
HURT: 0
helped stats (abs) min: 1566 max: 95474 x̄: 13842.82 x̃: 9757
helped stats (rel) min: 13.94% max: 23.26% x̄: 17.98% x̃: 17.57%
95% mean confidence interval for cycles value: -17104.25 -10581.40
95% mean confidence interval for cycles %-change: -18.61% -17.35%
Cycles are helped.

total spills in shared programs: 553 -> 445 (-19.53%)
spills in affected programs: 553 -> 445 (-19.53%)
helped: 1
HURT: 0

total fills in shared programs: 1307 -> 1323 (1.22%)
fills in affected programs: 1307 -> 1323 (1.22%)
helped: 0
HURT: 1

Ice Lake
total instructions in shared programs: 781216 -> 678470 (-13.15%)
instructions in affected programs: 720088 -> 617342 (-14.27%)
helped: 74
HURT: 0
helped stats (abs) min: 153 max: 8863 x̄: 1388.46 x̃: 975
helped stats (rel) min: 11.24% max: 21.03% x̄: 15.47% x̃: 15.01%
95% mean confidence interval for instructions value: -1703.57 -1073.35
95% mean confidence interval for instructions %-change: -16.09% -14.85%
Instructions are helped.

total cycles in shared programs: 6464085 -> 5453997 (-15.63%)
cycles in affected programs: 6031771 -> 5021683 (-16.75%)
helped: 74
HURT: 0
helped stats (abs) min: 1552 max: 90317 x̄: 13649.84 x̃: 9650
helped stats (rel) min: 13.84% max: 23.11% x̄: 17.83% x̃: 17.41%
95% mean confidence interval for cycles value: -16802.89 -10496.79
95% mean confidence interval for cycles %-change: -18.46% -17.21%
Cycles are helped.

total spills in shared programs: 279 -> 368 (31.90%)
spills in affected programs: 279 -> 368 (31.90%)
helped: 0
HURT: 1

total fills in shared programs: 973 -> 1155 (18.71%)
fills in affected programs: 973 -> 1155 (18.71%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
2d1216a039 soft-fp64/fadd: Move common code out of both branches of an if-statement
The previous two commits were just setting the scene for this change.

The mix(..., __propagateFloat64NaN(a, b), propagate) statements are not
identical in the two halves, but they are equivalent.  The first clause
of the mix in the else-branch is trivally ±Inf.  The first clause in the
then-branch __packFloat64(aSign, aExp, aFracHi, aFracLo).  The
preceeding conditions prove that aExp=0x7ff, aFracHi=0, and aFracLo=0.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 819560 -> 787258 (-3.94%)
instructions in affected programs: 757737 -> 725435 (-4.26%)
helped: 74
HURT: 0
helped stats (abs) min: 43 max: 3545 x̄: 436.51 x̃: 296
helped stats (rel) min: 3.54% max: 6.16% x̄: 4.52% x̃: 4.36%
95% mean confidence interval for instructions value: -548.42 -324.61
95% mean confidence interval for instructions %-change: -4.68% -4.37%
Instructions are helped.

total cycles in shared programs: 6817254 -> 6483227 (-4.90%)
cycles in affected programs: 6385272 -> 6051245 (-5.23%)
helped: 74
HURT: 0
helped stats (abs) min: 430 max: 33271 x̄: 4513.88 x̃: 3047
helped stats (rel) min: 4.28% max: 7.45% x̄: 5.48% x̃: 5.31%
95% mean confidence interval for cycles value: -5610.46 -3417.30
95% mean confidence interval for cycles %-change: -5.65% -5.32%
Cycles are helped.

total spills in shared programs: 591 -> 553 (-6.43%)
spills in affected programs: 591 -> 553 (-6.43%)
helped: 1
HURT: 0

total fills in shared programs: 1353 -> 1307 (-3.40%)
fills in affected programs: 1353 -> 1307 (-3.40%)
helped: 1
HURT: 0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
16dfd06472 soft-fp64/fadd: Use absolute value of expDiff
In one branch we know that expDiff is already positive.

In the other branch we know the expDiff is negative.  Previously in that
branch the code was -(expDiff + 1).  This is equvialent to (-expDiff) -
1, and since expDiff is negative, abs(expDiff) - 1.

The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 818246 -> 819560 (0.16%)
instructions in affected programs: 756423 -> 757737 (0.17%)
helped: 1
HURT: 73
helped stats (abs) min: 1205 max: 1205 x̄: 1205.00 x̃: 1205
helped stats (rel) min: 1.36% max: 1.36% x̄: 1.36% x̃: 1.36%
HURT stats (abs)   min: 2 max: 149 x̄: 34.51 x̃: 27
HURT stats (rel)   min: 0.14% max: 1.09% x̄: 0.41% x̃: 0.30%
95% mean confidence interval for instructions value: -16.56 52.07
95% mean confidence interval for instructions %-change: 0.30% 0.47%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 6816686 -> 6817254 (<.01%)
cycles in affected programs: 6384704 -> 6385272 (<.01%)
helped: 37
HURT: 37
helped stats (abs) min: 30 max: 5790 x̄: 289.05 x̃: 102
helped stats (rel) min: 0.04% max: 0.86% x̄: 0.29% x̃: 0.31%
HURT stats (abs)   min: 2 max: 1020 x̄: 304.41 x̃: 232
HURT stats (rel)   min: <.01% max: 1.58% x̄: 0.55% x̃: 0.43%
95% mean confidence interval for cycles value: -165.37 180.72
95% mean confidence interval for cycles %-change: <.01% 0.27%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 705 -> 591 (-16.17%)
spills in affected programs: 705 -> 591 (-16.17%)
helped: 1
HURT: 0

total fills in shared programs: 1501 -> 1353 (-9.86%)
fills in affected programs: 1501 -> 1353 (-9.86%)
helped: 1
HURT: 0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
da3fa01891 soft-fp64/fadd: Rename aFrac and bFrac variables
Exchanging aFracHi / bFracHi and aFracLo / bFracLo should not affect the
result of the later call to __add64.

The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

v2: Fix a typo in a comment.  Noticed by Matt.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 812094 -> 818246 (0.76%)
instructions in affected programs: 750271 -> 756423 (0.82%)
helped: 0
HURT: 74
HURT stats (abs)   min: 7 max: 520 x̄: 83.14 x̃: 59
HURT stats (rel)   min: 0.52% max: 1.48% x̄: 0.89% x̃: 0.84%
95% mean confidence interval for instructions value: 63.96 102.31
95% mean confidence interval for instructions %-change: 0.83% 0.95%
Instructions are HURT.

total cycles in shared programs: 6797157 -> 6816686 (0.29%)
cycles in affected programs: 6365175 -> 6384704 (0.31%)
helped: 0
HURT: 74
HURT stats (abs)   min: 16 max: 1690 x̄: 263.91 x̃: 181
HURT stats (rel)   min: 0.14% max: 0.68% x̄: 0.32% x̃: 0.27%
95% mean confidence interval for cycles value: 199.74 328.07
95% mean confidence interval for cycles %-change: 0.29% 0.36%
Cycles are HURT.

total spills in shared programs: 703 -> 705 (0.28%)
spills in affected programs: 703 -> 705 (0.28%)
helped: 0
HURT: 1

total fills in shared programs: 1499 -> 1501 (0.13%)
fills in affected programs: 1499 -> 1501 (0.13%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
3c9ff97215 soft-fp64/fadd: Combine an if-statement into the preceeding else-clause
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 812590 -> 812094 (-0.06%)
instructions in affected programs: 672135 -> 671639 (-0.07%)
helped: 57
HURT: 0
helped stats (abs) min: 1 max: 32 x̄: 8.70 x̃: 7
helped stats (rel) min: <.01% max: 0.49% x̄: 0.12% x̃: 0.09%
95% mean confidence interval for instructions value: -10.46 -6.94
95% mean confidence interval for instructions %-change: -0.15% -0.09%
Instructions are helped.

total cycles in shared programs: 6798039 -> 6797157 (-0.01%)
cycles in affected programs: 5810059 -> 5809177 (-0.02%)
helped: 54
HURT: 2
helped stats (abs) min: 2 max: 68 x̄: 16.44 x̃: 12
helped stats (rel) min: <.01% max: 0.12% x̄: 0.03% x̃: 0.02%
HURT stats (abs)   min: 2 max: 4 x̄: 3.00 x̃: 3
HURT stats (rel)   min: <.01% max: <.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for cycles value: -19.50 -12.00
95% mean confidence interval for cycles %-change: -0.03% -0.02%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
480565812c soft-fp64/fadd: Reformat after previous commit
Convert

   } else if (...) {
      ...
   } else {
      ...
   }

to

   } else {
      if (...) {
         ...
      } else {
         ...
      }
   }

Not doing this reformatting in the previous commit makes the previous
commit easier to review, and doing it before the next commit makes the
next commit easier to review.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
9496a67eec soft-fp64/fadd: Delete a redundant condition check
Previous condition checks already guaranteen that expDiff != 0 and
!(expDiff > 0), so expDiff < 0 is the only option left.

The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 815491 -> 812590 (-0.36%)
instructions in affected programs: 753668 -> 750767 (-0.38%)
helped: 74
HURT: 0
helped stats (abs) min: 3 max: 281 x̄: 39.20 x̃: 25
helped stats (rel) min: 0.29% max: 0.73% x̄: 0.42% x̃: 0.40%
95% mean confidence interval for instructions value: -48.50 -29.91
95% mean confidence interval for instructions %-change: -0.45% -0.40%
Instructions are helped.

total cycles in shared programs: 6813681 -> 6798039 (-0.23%)
cycles in affected programs: 6381699 -> 6366057 (-0.25%)
helped: 74
HURT: 0
helped stats (abs) min: 24 max: 1488 x̄: 211.38 x̃: 149
helped stats (rel) min: 0.20% max: 0.44% x̄: 0.26% x̃: 0.25%
95% mean confidence interval for cycles value: -261.68 -161.08
95% mean confidence interval for cycles %-change: -0.28% -0.25%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
7078105592 soft-fp64/fadd: Just let the subtraction happen when the result will be zero
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 815717 -> 815491 (-0.03%)
instructions in affected programs: 735489 -> 735263 (-0.03%)
helped: 39
HURT: 34
helped stats (abs) min: 2 max: 192 x̄: 20.79 x̃: 12
helped stats (rel) min: 0.01% max: 0.46% x̄: 0.26% x̃: 0.28%
HURT stats (abs)   min: 1 max: 65 x̄: 17.21 x̃: 11
HURT stats (rel)   min: <.01% max: 1.11% x̄: 0.35% x̃: 0.19%
95% mean confidence interval for instructions value: -10.40 4.21
95% mean confidence interval for instructions %-change: -0.07% 0.13%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 6820707 -> 6813681 (-0.10%)
cycles in affected programs: 6388725 -> 6381699 (-0.11%)
helped: 51
HURT: 23
helped stats (abs) min: 3 max: 1837 x̄: 184.76 x̃: 120
helped stats (rel) min: <.01% max: 0.48% x̄: 0.25% x̃: 0.25%
HURT stats (abs)   min: 18 max: 216 x̄: 104.22 x̃: 98
HURT stats (rel)   min: 0.06% max: 0.73% x̄: 0.31% x̃: 0.11%
95% mean confidence interval for cycles value: -154.67 -35.22
95% mean confidence interval for cycles %-change: -0.15% <.01%
Inconclusive result (%-change mean confidence interval includes 0).

total spills in shared programs: 702 -> 703 (0.14%)
spills in affected programs: 702 -> 703 (0.14%)
helped: 0
HURT: 1

total fills in shared programs: 1497 -> 1499 (0.13%)
fills in affected programs: 1497 -> 1499 (0.13%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
cae36fa217 soft-fp64/fadd: Pick zero or non-zero result based on subtraction result
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 817327 -> 815717 (-0.20%)
instructions in affected programs: 755504 -> 753894 (-0.21%)
helped: 73
HURT: 1
helped stats (abs) min: 1 max: 159 x̄: 22.12 x̃: 14
helped stats (rel) min: 0.05% max: 0.40% x̄: 0.22% x̃: 0.23%
HURT stats (abs)   min: 5 max: 5 x̄: 5.00 x̃: 5
HURT stats (rel)   min: 0.07% max: 0.07% x̄: 0.07% x̃: 0.07%
95% mean confidence interval for instructions value: -27.27 -16.24
95% mean confidence interval for instructions %-change: -0.24% -0.20%
Instructions are helped.

total cycles in shared programs: 6822826 -> 6820707 (-0.03%)
cycles in affected programs: 6390844 -> 6388725 (-0.03%)
helped: 71
HURT: 3
helped stats (abs) min: 2 max: 537 x̄: 30.72 x̃: 18
helped stats (rel) min: <.01% max: 0.08% x̄: 0.03% x̃: 0.03%
HURT stats (abs)   min: 10 max: 32 x̄: 20.67 x̃: 20
HURT stats (rel)   min: 0.01% max: 0.02% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for cycles value: -43.41 -13.86
95% mean confidence interval for cycles %-change: -0.04% -0.03%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
70be98f17a soft-fp64/fadd: Massively split the live range of zFrac0 and zFrac1
The main purpose of this commit is to prepare for "soft-fp64/fadd: Move
common code out of both branches of an if-statement".

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 822766 -> 817327 (-0.66%)
instructions in affected programs: 760943 -> 755504 (-0.71%)
helped: 74
HURT: 0
helped stats (abs) min: 8 max: 515 x̄: 73.50 x̃: 51
helped stats (rel) min: 0.58% max: 1.10% x̄: 0.77% x̃: 0.73%
95% mean confidence interval for instructions value: -91.17 -55.83
95% mean confidence interval for instructions %-change: -0.81% -0.74%
Instructions are helped.

total cycles in shared programs: 6816791 -> 6822826 (0.09%)
cycles in affected programs: 6384809 -> 6390844 (0.09%)
helped: 0
HURT: 74
HURT stats (abs)   min: 6 max: 1179 x̄: 81.55 x̃: 50
HURT stats (rel)   min: 0.02% max: 0.17% x̄: 0.09% x̃: 0.09%
95% mean confidence interval for cycles value: 48.99 114.12
95% mean confidence interval for cycles %-change: 0.09% 0.10%
Cycles are HURT.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
73fa3a1ca4 soft-fp64/fadd: Instead of tracking "b < a", track sign of the difference
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 824403 -> 822766 (-0.20%)
instructions in affected programs: 756260 -> 754623 (-0.22%)
helped: 68
HURT: 1
helped stats (abs) min: 1 max: 118 x̄: 26.26 x̃: 18
helped stats (rel) min: 0.02% max: 0.97% x̄: 0.31% x̃: 0.23%
HURT stats (abs)   min: 149 max: 149 x̄: 149.00 x̃: 149
HURT stats (rel)   min: 0.17% max: 0.17% x̄: 0.17% x̃: 0.17%
95% mean confidence interval for instructions value: -31.94 -15.51
95% mean confidence interval for instructions %-change: -0.37% -0.23%
Instructions are helped.

total cycles in shared programs: 6828935 -> 6816791 (-0.18%)
cycles in affected programs: 6385191 -> 6373047 (-0.19%)
helped: 73
HURT: 0
helped stats (abs) min: 2 max: 852 x̄: 166.36 x̃: 120
helped stats (rel) min: <.01% max: 0.80% x̄: 0.22% x̃: 0.17%
95% mean confidence interval for cycles value: -210.80 -121.91
95% mean confidence interval for cycles %-change: -0.27% -0.17%
Cycles are helped.

total fills in shared programs: 1442 -> 1497 (3.81%)
fills in affected programs: 1442 -> 1497 (3.81%)
helped: 0
HURT: 1

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
5b07f542e5 soft-fp64: Optimize __fmin64 and __fmax64 by using different evaluation order [v2]
v2: Go to extra effort to avoid flow control inserted to implement
short-circuit evaluation rules.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 797779 -> 796849 (-0.12%)
instructions in affected programs: 3499 -> 2569 (-26.58%)
helped: 21
HURT: 0
helped stats (abs) min: 8 max: 112 x̄: 44.29 x̃: 44
helped stats (rel) min: 16.09% max: 33.15% x̄: 25.72% x̃: 24.62%
95% mean confidence interval for instructions value: -55.94 -32.63
95% mean confidence interval for instructions %-change: -28.14% -23.30%
Instructions are helped.

total cycles in shared programs: 6601355 -> 6588351 (-0.20%)
cycles in affected programs: 25376 -> 12372 (-51.25%)
helped: 21
HURT: 0
helped stats (abs) min: 156 max: 1410 x̄: 619.24 x̃: 526
helped stats (rel) min: 42.39% max: 53.98% x̄: 50.12% x̃: 50.75%
95% mean confidence interval for cycles value: -776.58 -461.89
95% mean confidence interval for cycles %-change: -51.57% -48.67%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
617a69107e soft-fp64/ffloor: Simplify the >= 0 comparison
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 797951 -> 797779 (-0.02%)
instructions in affected programs: 126482 -> 126310 (-0.14%)
helped: 15
HURT: 0
helped stats (abs) min: 1 max: 20 x̄: 11.47 x̃: 10
helped stats (rel) min: <.01% max: 0.60% x̄: 0.28% x̃: 0.29%
95% mean confidence interval for instructions value: -14.79 -8.14
95% mean confidence interval for instructions %-change: -0.40% -0.16%
Instructions are helped.

total cycles in shared programs: 6601437 -> 6601355 (<.01%)
cycles in affected programs: 1089336 -> 1089254 (<.01%)
helped: 15
HURT: 0
helped stats (abs) min: 2 max: 12 x̄: 5.47 x̃: 6
helped stats (rel) min: <.01% max: 0.04% x̄: 0.01% x̃: 0.01%
95% mean confidence interval for cycles value: -7.06 -3.87
95% mean confidence interval for cycles %-change: -0.02% <.01%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
abf28d6a70 soft-fp64: Relax the way NaN is propagated
Also reassociate a couple expressions to encourage some CSE.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 813599 -> 797951 (-1.92%)
instructions in affected programs: 796110 -> 780462 (-1.97%)
helped: 92
HURT: 0
helped stats (abs) min: 3 max: 5198 x̄: 170.09 x̃: 83
helped stats (rel) min: 0.36% max: 5.50% x̄: 1.57% x̃: 1.40%
95% mean confidence interval for instructions value: -282.42 -57.75
95% mean confidence interval for instructions %-change: -1.71% -1.42%
Instructions are helped.

total cycles in shared programs: 6687128 -> 6601437 (-1.28%)
cycles in affected programs: 6582246 -> 6496555 (-1.30%)
helped: 92
HURT: 0
helped stats (abs) min: 36 max: 14442 x̄: 931.42 x̃: 592
helped stats (rel) min: 0.45% max: 3.16% x̄: 1.44% x̃: 1.23%
95% mean confidence interval for cycles value: -1257.58 -605.27
95% mean confidence interval for cycles %-change: -1.58% -1.30%
Cycles are helped.

total spills in shared programs: 759 -> 702 (-7.51%)
spills in affected programs: 759 -> 702 (-7.51%)
helped: 3
HURT: 0

total fills in shared programs: 2412 -> 1442 (-40.22%)
fills in affected programs: 2412 -> 1442 (-40.22%)
helped: 3
HURT: 0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
8178fa8876 soft-fp64/fsat: Micro-optimize x >= 1 test
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 841590 -> 841332 (-0.03%)
instructions in affected programs: 121957 -> 121699 (-0.21%)
helped: 7
HURT: 0
helped stats (abs) min: 15 max: 54 x̄: 36.86 x̃: 41
helped stats (rel) min: 0.16% max: 0.33% x̄: 0.23% x̃: 0.18%
95% mean confidence interval for instructions value: -49.73 -23.98
95% mean confidence interval for instructions %-change: -0.29% -0.16%
Instructions are helped.

total cycles in shared programs: 6926828 -> 6923967 (-0.04%)
cycles in affected programs: 1038569 -> 1035708 (-0.28%)
helped: 7
HURT: 0
helped stats (abs) min: 128 max: 616 x̄: 408.71 x̃: 446
helped stats (rel) min: 0.18% max: 0.44% x̄: 0.29% x̃: 0.22%
95% mean confidence interval for cycles value: -571.72 -245.70
95% mean confidence interval for cycles %-change: -0.38% -0.19%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
b6f58b4709 soft-fp64/fsat: Micro-optimize x < 0 test
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 841647 -> 841590 (<.01%)
instructions in affected programs: 122014 -> 121957 (-0.05%)
helped: 7
HURT: 0
helped stats (abs) min: 3 max: 12 x̄: 8.14 x̃: 9
helped stats (rel) min: 0.04% max: 0.07% x̄: 0.05% x̃: 0.04%
95% mean confidence interval for instructions value: -11.23 -5.06
95% mean confidence interval for instructions %-change: -0.06% -0.03%
Instructions are helped.

total cycles in shared programs: 6926904 -> 6926828 (<.01%)
cycles in affected programs: 1038645 -> 1038569 (<.01%)
helped: 7
HURT: 0
helped stats (abs) min: 4 max: 16 x̄: 10.86 x̃: 12
helped stats (rel) min: <.01% max: 0.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for cycles value: -14.97 -6.74
95% mean confidence interval for cycles %-change: -0.01% <.01%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
7673dcbd21 soft-fp64/fsat: Correctly handle NaN
fsat is defined as min(max(a, 0.0), 1.0), and IEEE defines both min and
max to return the non-NaN value when one value is NaN.  Based on this,
fsat should definitely return 0.0 for NaN.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 841666 -> 841647 (<.01%)
instructions in affected programs: 122033 -> 122014 (-0.02%)
helped: 7
HURT: 0
helped stats (abs) min: 1 max: 4 x̄: 2.71 x̃: 3
helped stats (rel) min: 0.01% max: 0.02% x̄: 0.02% x̃: 0.01%
95% mean confidence interval for instructions value: -3.74 -1.69
95% mean confidence interval for instructions %-change: -0.02% -0.01%
Instructions are helped.

total cycles in shared programs: 6927246 -> 6926904 (<.01%)
cycles in affected programs: 1038987 -> 1038645 (-0.03%)
helped: 7
HURT: 0
helped stats (abs) min: 18 max: 72 x̄: 48.86 x̃: 54
helped stats (rel) min: 0.03% max: 0.05% x̄: 0.03% x̃: 0.03%
95% mean confidence interval for cycles value: -67.38 -30.33
95% mean confidence interval for cycles %-change: -0.05% -0.02%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: a42163cbbc ("compiler: Add lowering support for 64-bit saturate operations to software")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2585
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
b421c0466d soft-fp64/flt: Perform checks in a different order
The change to nir_opt_algebraic cleans up a pattern that was never
produced before the rest of this commit was added.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 843005 -> 841666 (-0.16%)
instructions in affected programs: 460655 -> 459316 (-0.29%)
helped: 64
HURT: 17
helped stats (abs) min: 1 max: 72 x̄: 21.72 x̃: 20
helped stats (rel) min: 0.01% max: 28.07% x̄: 12.67% x̃: 16.07%
HURT stats (abs)   min: 1 max: 7 x̄: 3.00 x̃: 2
HURT stats (rel)   min: 0.01% max: 0.04% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for instructions value: -20.87 -12.19
95% mean confidence interval for instructions %-change: -12.35% -7.66%
Instructions are helped.

total cycles in shared programs: 6944998 -> 6927246 (-0.26%)
cycles in affected programs: 3891872 -> 3874120 (-0.46%)
helped: 71
HURT: 10
helped stats (abs) min: 2 max: 772 x̄: 254.21 x̃: 156
helped stats (rel) min: <.01% max: 66.44% x̄: 21.72% x̃: 18.40%
HURT stats (abs)   min: 18 max: 69 x̄: 29.70 x̃: 20
HURT stats (rel)   min: 0.02% max: 0.04% x̄: 0.03% x̃: 0.03%
95% mean confidence interval for cycles value: -270.82 -167.50
95% mean confidence interval for cycles %-change: -24.41% -13.65%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
f6992bf624 soft-fp64/fneg: Don't treat NaN specially
__fabs64 doesn't do anything special, and the value is still NaN
regardless of the value of the MSB.  In a strict sense, it's possible
that both functions should set the "signal" bit.

lts on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 844558 -> 843005 (-0.18%)
instructions in affected programs: 725975 -> 724422 (-0.21%)
helped: 53
HURT: 4
helped stats (abs) min: 1 max: 313 x̄: 29.87 x̃: 21
helped stats (rel) min: 0.01% max: 0.94% x̄: 0.30% x̃: 0.22%
HURT stats (abs)   min: 4 max: 11 x̄: 7.50 x̃: 7
HURT stats (rel)   min: 0.03% max: 0.09% x̄: 0.05% x̃: 0.04%
95% mean confidence interval for instructions value: -39.02 -15.47
95% mean confidence interval for instructions %-change: -0.34% -0.21%
Instructions are helped.

total cycles in shared programs: 6962024 -> 6944998 (-0.24%)
cycles in affected programs: 6185470 -> 6168444 (-0.28%)
helped: 59
HURT: 0
helped stats (abs) min: 64 max: 2863 x̄: 288.58 x̃: 208
helped stats (rel) min: 0.11% max: 0.87% x̄: 0.33% x̃: 0.27%
95% mean confidence interval for cycles value: -387.15 -190.00
95% mean confidence interval for cycles %-change: -0.38% -0.28%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
de4acd8816 soft-fp64: Store sign value as 0 or 0x80000000
...instead of 0 or 1.  Many places the sign bit is extracted, then later
put back in the same position.  This saves some left-shift operations.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 848106 -> 844558 (-0.42%)
instructions in affected programs: 833480 -> 829932 (-0.43%)
helped: 106
HURT: 1
helped stats (abs) min: 1 max: 995 x̄: 33.48 x̃: 12
helped stats (rel) min: 0.15% max: 2.20% x̄: 0.60% x̃: 0.35%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: <.01% max: <.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for instructions value: -51.88 -14.43
95% mean confidence interval for instructions %-change: -0.71% -0.47%
Instructions are helped.

total cycles in shared programs: 6969125 -> 6962024 (-0.10%)
cycles in affected programs: 6717689 -> 6710588 (-0.11%)
helped: 78
HURT: 7
helped stats (abs) min: 2 max: 2083 x̄: 110.27 x̃: 56
helped stats (rel) min: <.01% max: 0.30% x̄: 0.11% x̃: 0.11%
HURT stats (abs)   min: 2 max: 1340 x̄: 214.29 x̃: 4
HURT stats (rel)   min: 0.01% max: 0.71% x̄: 0.13% x̃: 0.02%
95% mean confidence interval for cycles value: -144.02 -23.06
95% mean confidence interval for cycles %-change: -0.12% -0.07%
Cycles are helped.

total spills in shared programs: 814 -> 759 (-6.76%)
spills in affected programs: 814 -> 759 (-6.76%)
helped: 2
HURT: 1

total fills in shared programs: 2488 -> 2412 (-3.05%)
fills in affected programs: 2488 -> 2412 (-3.05%)
helped: 2
HURT: 1

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
598e2fc6a1 soft-fp64: Pick a single idiom for treating sign value as a Boolean
Replace all of the bool(qSign) with qSign != 0u.  Remove unnecessary
parenthesis from around most of the existing qSign != 0u.

This dramatically simplifies the next commit.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 848109 -> 848106 (<.01%)
instructions in affected programs: 53 -> 50 (-5.66%)
helped: 1
HURT: 0

total cycles in shared programs: 6969145 -> 6969125 (<.01%)
cycles in affected programs: 396 -> 376 (-5.05%)
helped: 1
HURT: 0

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
325a21f5eb soft-fp64: Simplify __countLeadingZeros32 function
findMSB returns -1 for an input of zero, so 31 - findMSB(a) is
sufficient on its own.

There's only one user of findMSB in shader-db, and it does not match
this pattern.

TODO: Add a pattern in the backend code generator that emits 31 -
nir_op_ufind_msb(a) as if it were nir_op_uclz.  That should save a couple
instructions.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 859509 -> 848109 (-1.33%)
instructions in affected programs: 841058 -> 829658 (-1.36%)
helped: 97
HURT: 0
helped stats (abs) min: 3 max: 1161 x̄: 117.53 x̃: 72
helped stats (rel) min: 0.98% max: 6.74% x̄: 1.70% x̃: 1.35%
95% mean confidence interval for instructions value: -147.21 -87.84
95% mean confidence interval for instructions %-change: -1.94% -1.46%
Instructions are helped.

total cycles in shared programs: 7072275 -> 6969145 (-1.46%)
cycles in affected programs: 6955767 -> 6852637 (-1.48%)
helped: 97
HURT: 0
helped stats (abs) min: 32 max: 10900 x̄: 1063.20 x̃: 560
helped stats (rel) min: 1.18% max: 7.58% x̄: 1.84% x̃: 1.45%
95% mean confidence interval for cycles value: -1339.43 -786.96
95% mean confidence interval for cycles %-change: -2.11% -1.57%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
812230fd94 soft-fp64: Don't open-code umulExtended
Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 928859 -> 859509 (-7.47%)
instructions in affected programs: 866293 -> 796943 (-8.01%)
helped: 76
HURT: 0
helped stats (abs) min: 75 max: 8042 x̄: 912.50 x̃: 688
helped stats (rel) min: 5.35% max: 21.02% x̄: 10.35% x̃: 7.58%
95% mean confidence interval for instructions value: -1138.37 -686.63
95% mean confidence interval for instructions %-change: -11.69% -9.00%
Instructions are helped.

total cycles in shared programs: 7272912 -> 7072275 (-2.76%)
cycles in affected programs: 6763486 -> 6562849 (-2.97%)
helped: 76
HURT: 0
helped stats (abs) min: 214 max: 30136 x̄: 2639.96 x̃: 1923
helped stats (rel) min: 1.75% max: 9.20% x̄: 4.04% x̃: 2.41%
95% mean confidence interval for cycles value: -3455.29 -1824.63
95% mean confidence interval for cycles %-change: -4.69% -3.39%
Cycles are helped.

total spills in shared programs: 817 -> 814 (-0.37%)
spills in affected programs: 791 -> 788 (-0.38%)
helped: 2
HURT: 0

total fills in shared programs: 2438 -> 2488 (2.05%)
fills in affected programs: 2392 -> 2442 (2.09%)
helped: 0
HURT: 2

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
d1e0227ef1 soft-fp64/b2f: Reimplement using bitwise logic ops
This doesn't help a lot of shaders, but it helps those few a LOT.

This could also be implemented using bcsel.  That version is very
slightly worse because the generated SEL instruction wants to have two
immediate sources, so one of them usually needs an extra MOV instruction
to load.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 929619 -> 928859 (-0.08%)
instructions in affected programs: 1651 -> 891 (-46.03%)
helped: 8
HURT: 0
helped stats (abs) min: 38 max: 152 x̄: 95.00 x̃: 95
helped stats (rel) min: 42.70% max: 86.36% x̄: 49.88% x̃: 44.66%
95% mean confidence interval for instructions value: -132.97 -57.03
95% mean confidence interval for instructions %-change: -62.28% -37.49%
Instructions are helped.

total cycles in shared programs: 7280180 -> 7272912 (-0.10%)
cycles in affected programs: 12960 -> 5692 (-56.08%)
helped: 8
HURT: 0
helped stats (abs) min: 352 max: 1456 x̄: 908.50 x̃: 910
helped stats (rel) min: 52.45% max: 91.19% x̄: 59.24% x̃: 55.15%
95% mean confidence interval for cycles value: -1274.03 -542.97
95% mean confidence interval for cycles %-change: -70.06% -48.41%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
4e3d69ad07 nir/algebraic: Simplify a contradiction that can occur in __flt64_nonnan
The pattern is added to opt_algebraic because, for example, comparisons
with constant 0.0 will produce (a1 < 0).

Even with a pass that optimized Boolean expressions, I think this would
be very difficult to automatically recognize and optimize.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 933054 -> 929619 (-0.37%)
instructions in affected programs: 784041 -> 780606 (-0.44%)
helped: 59
HURT: 0
helped stats (abs) min: 2 max: 213 x̄: 58.22 x̃: 44
helped stats (rel) min: 0.02% max: 2.51% x̄: 0.72% x̃: 0.46%
95% mean confidence interval for instructions value: -70.80 -45.64
95% mean confidence interval for instructions %-change: -0.92% -0.53%
Instructions are helped.

total cycles in shared programs: 7304712 -> 7280180 (-0.34%)
cycles in affected programs: 7176260 -> 7151728 (-0.34%)
helped: 92
HURT: 0
helped stats (abs) min: 8 max: 1414 x̄: 266.65 x̃: 166
helped stats (rel) min: 0.04% max: 2.34% x̄: 0.43% x̃: 0.22%
95% mean confidence interval for cycles value: -333.05 -200.26
95% mean confidence interval for cycles %-change: -0.54% -0.31%
Cycles are helped.

Regular shader-db changes:

No changes on any Intel platform.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
e0cefc5a23 nir/algebraic: Constant reassociation for bitwise operations too
Like 5886cd79a0, but for iand, ior, and ixor.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake
total instructions in shared programs: 903108 -> 902830 (-0.03%)
instructions in affected programs: 654910 -> 654632 (-0.04%)
helped: 31
HURT: 5
helped stats (abs) min: 2 max: 31 x̄: 9.58 x̃: 7
helped stats (rel) min: 0.01% max: 0.23% x̄: 0.06% x̃: 0.04%
HURT stats (abs)   min: 1 max: 10 x̄: 3.80 x̃: 3
HURT stats (rel)   min: 0.01% max: 0.10% x̄: 0.03% x̃: 0.02%
95% mean confidence interval for instructions value: -10.55 -4.89
95% mean confidence interval for instructions %-change: -0.07% -0.03%
Instructions are helped.

total cycles in shared programs: 7059681 -> 7058006 (-0.02%)
cycles in affected programs: 5081309 -> 5079634 (-0.03%)
helped: 33
HURT: 12
helped stats (abs) min: 1 max: 444 x̄: 60.91 x̃: 18
helped stats (rel) min: <.01% max: 2.17% x̄: 0.25% x̃: 0.05%
HURT stats (abs)   min: 1 max: 288 x̄: 27.92 x̃: 2
HURT stats (rel)   min: <.01% max: 1.00% x̄: 0.23% x̃: 0.02%
95% mean confidence interval for cycles value: -68.32 -6.12
95% mean confidence interval for cycles %-change: -0.28% 0.03%
Inconclusive result (%-change mean confidence interval includes 0).

Ice Lake
total instructions in shared programs: 895384 -> 895159 (-0.03%)
instructions in affected programs: 658678 -> 658453 (-0.03%)
helped: 37
HURT: 0
helped stats (abs) min: 3 max: 16 x̄: 6.08 x̃: 4
helped stats (rel) min: <.01% max: 0.07% x̄: 0.04% x̃: 0.04%
95% mean confidence interval for instructions value: -7.46 -4.70
95% mean confidence interval for instructions %-change: -0.04% -0.03%
Instructions are helped.

total cycles in shared programs: 7092224 -> 7091195 (-0.01%)
cycles in affected programs: 5221666 -> 5220637 (-0.02%)
helped: 35
HURT: 11
helped stats (abs) min: 1 max: 247 x̄: 43.46 x̃: 12
helped stats (rel) min: <.01% max: 2.17% x̄: 0.23% x̃: 0.05%
HURT stats (abs)   min: 2 max: 432 x̄: 44.73 x̃: 5
HURT stats (rel)   min: <.01% max: 1.00% x̄: 0.25% x̃: 0.02%
95% mean confidence interval for cycles value: -49.00 4.26
95% mean confidence interval for cycles %-change: -0.27% 0.03%
Inconclusive result (value mean confidence interval includes 0).

Regular shader-db results:

All Haswell+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611408 -> 17611398 (<.01%)
instructions in affected programs: 1648 -> 1638 (-0.61%)
helped: 2
HURT: 0

total cycles in shared programs: 338366148 -> 338366124 (<.01%)
cycles in affected programs: 124048 -> 124024 (-0.02%)
helped: 2
HURT: 0

No changes on any earlier Intel platforms.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
1d36af9338 nir/algebraic: Generalize some and-of-shift-right patterns [v2]
Generalizes some of the patterns from 76289fbfa8 and 905ff86198.  In
particular, some of the soft-fp64 code generates (a & 0x7fffffff) << 1
when constant 0.0 is compared (flt or feq).

v2: Reduce the set of added patterns to those that actually help
something.  This reduces the size of the state transition tables by
about 29k.  Suggested by Jason.  Remove the existing patterns that this
commit subsumes.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake
total instructions in shared programs: 903171 -> 903108 (<.01%)
instructions in affected programs: 635903 -> 635840 (<.01%)
helped: 25
HURT: 11
helped stats (abs) min: 1 max: 16 x̄: 5.04 x̃: 3
helped stats (rel) min: <.01% max: 0.15% x̄: 0.04% x̃: 0.03%
HURT stats (abs)   min: 2 max: 14 x̄: 5.73 x̃: 5
HURT stats (rel)   min: <.01% max: 0.11% x̄: 0.04% x̃: 0.02%
95% mean confidence interval for instructions value: -3.91 0.41
95% mean confidence interval for instructions %-change: -0.03% <.01%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 7059527 -> 7059681 (<.01%)
cycles in affected programs: 5249401 -> 5249555 (<.01%)
helped: 41
HURT: 9
helped stats (abs) min: 2 max: 76 x̄: 11.90 x̃: 10
helped stats (rel) min: <.01% max: 11.86% x̄: 0.99% x̃: 0.01%
HURT stats (abs)   min: 2 max: 380 x̄: 71.33 x̃: 12
HURT stats (rel)   min: <.01% max: 0.22% x̄: 0.04% x̃: 0.01%
95% mean confidence interval for cycles value: -14.93 21.09
95% mean confidence interval for cycles %-change: -1.40% -0.20%
Inconclusive result (value mean confidence interval includes 0).

Ice Lake
total instructions in shared programs: 895506 -> 895384 (-0.01%)
instructions in affected programs: 658800 -> 658678 (-0.02%)
helped: 37
HURT: 0
helped stats (abs) min: 2 max: 8 x̄: 3.30 x̃: 2
helped stats (rel) min: <.01% max: 0.03% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for instructions value: -4.00 -2.59
95% mean confidence interval for instructions %-change: -0.02% -0.02%
Instructions are helped.

total cycles in shared programs: 7092748 -> 7092224 (<.01%)
cycles in affected programs: 5272008 -> 5271484 (<.01%)
helped: 36
HURT: 14
helped stats (abs) min: 2 max: 440 x̄: 21.67 x̃: 8
helped stats (rel) min: <.01% max: 11.86% x̄: 1.12% x̃: 0.02%
HURT stats (abs)   min: 2 max: 122 x̄: 18.29 x̃: 6
HURT stats (rel)   min: <.01% max: 0.07% x̄: 0.01% x̃: <.01%
95% mean confidence interval for cycles value: -29.24 8.28
95% mean confidence interval for cycles %-change: -1.40% -0.21%
Inconclusive result (value mean confidence interval includes 0).

Regular shader-db results:

All Haswell+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611489 -> 17611408 (<.01%)
instructions in affected programs: 21188 -> 21107 (-0.38%)
helped: 23
HURT: 1
helped stats (abs) min: 1 max: 16 x̄: 3.78 x̃: 3
helped stats (rel) min: 0.03% max: 5.82% x̄: 1.13% x̃: 0.85%
HURT stats (abs)   min: 6 max: 6 x̄: 6.00 x̃: 6
HURT stats (rel)   min: 0.60% max: 0.60% x̄: 0.60% x̃: 0.60%
95% mean confidence interval for instructions value: -5.27 -1.48
95% mean confidence interval for instructions %-change: -1.70% -0.42%
Instructions are helped.

total cycles in shared programs: 338418502 -> 338366148 (-0.02%)
cycles in affected programs: 2289052 -> 2236698 (-2.29%)
helped: 18
HURT: 3
helped stats (abs) min: 4 max: 18000 x̄: 2909.67 x̃: 38
helped stats (rel) min: 0.09% max: 4.07% x̄: 0.96% x̃: 0.43%
HURT stats (abs)   min: 2 max: 14 x̄: 6.67 x̃: 4
HURT stats (rel)   min: 0.22% max: 1.13% x̄: 0.66% x̃: 0.64%
95% mean confidence interval for cycles value: -5204.00 217.91
95% mean confidence interval for cycles %-change: -1.31% -0.14%
Inconclusive result (value mean confidence interval includes 0).

Ivy Bridge
total instructions in shared programs: 11875617 -> 11875615 (<.01%)
instructions in affected programs: 1339 -> 1337 (-0.15%)
helped: 2
HURT: 0

No changes on any earlier Intel platforms.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
d6d63aec18 nir/algebraic: optimize ior(ine(a, 0), ine(b, 0)) to ine(ior(a, b), 0)
Like 70f9e2589e.  Also scrub the unnecessary size qualifier in both
replacement patterns.

This occurs in a handful of places in the soft-fp64 code, and that is
the primary reason for the change.

Perhaps the patterns that generate umin should be conditioned on
something, but I'm not sure what.  lower_bitops might cover the cases
that matter, but it seems ugly.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 936505 -> 933388 (-0.33%)
instructions in affected programs: 925719 -> 922602 (-0.34%)
helped: 154
HURT: 1
helped stats (abs) min: 1 max: 211 x̄: 35.45 x̃: 16
helped stats (rel) min: 0.34% max: 9.30% x̄: 2.28% x̃: 0.96%
HURT stats (abs)   min: 2342 max: 2342 x̄: 2342.00 x̃: 2342
HURT stats (rel)   min: 2.28% max: 2.28% x̄: 2.28% x̃: 2.28%
95% mean confidence interval for instructions value: -51.21 10.99
95% mean confidence interval for instructions %-change: -2.61% -1.89%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 7323502 -> 7306184 (-0.24%)
cycles in affected programs: 7220376 -> 7203058 (-0.24%)
helped: 126
HURT: 1
helped stats (abs) min: 2 max: 946 x̄: 159.10 x̃: 95
helped stats (rel) min: 0.01% max: 9.62% x̄: 0.80% x̃: 0.37%
HURT stats (abs)   min: 2728 max: 2728 x̄: 2728.00 x̃: 2728
HURT stats (rel)   min: 0.37% max: 0.37% x̄: 0.37% x̃: 0.37%
95% mean confidence interval for cycles value: -192.07 -80.66
95% mean confidence interval for cycles %-change: -1.07% -0.51%
Cycles are helped.

total spills in shared programs: 635 -> 817 (28.66%)
spills in affected programs: 635 -> 817 (28.66%)
helped: 0
HURT: 3

total fills in shared programs: 2065 -> 2438 (18.06%)
fills in affected programs: 2019 -> 2392 (18.47%)
helped: 0
HURT: 2

Regular shader-db results:

All Haswell+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611506 -> 17611489 (<.01%)
instructions in affected programs: 33442 -> 33425 (-0.05%)
helped: 32
HURT: 6
helped stats (abs) min: 1 max: 6 x̄: 1.69 x̃: 1
helped stats (rel) min: 0.08% max: 1.90% x̄: 0.27% x̃: 0.11%
HURT stats (abs)   min: 1 max: 15 x̄: 6.17 x̃: 5
HURT stats (rel)   min: 0.09% max: 1.50% x̄: 0.65% x̃: 0.55%
95% mean confidence interval for instructions value: -1.70 0.80
95% mean confidence interval for instructions %-change: -0.30% 0.05%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 338419218 -> 338418502 (<.01%)
cycles in affected programs: 385795 -> 385079 (-0.19%)
helped: 42
HURT: 3
helped stats (abs) min: 2 max: 192 x̄: 24.57 x̃: 16
helped stats (rel) min: 0.04% max: 2.09% x̄: 0.33% x̃: 0.22%
HURT stats (abs)   min: 64 max: 164 x̄: 105.33 x̃: 88
HURT stats (rel)   min: 0.77% max: 1.58% x̄: 1.09% x̃: 0.93%
95% mean confidence interval for cycles value: -29.76 -2.06
95% mean confidence interval for cycles %-change: -0.40% -0.07%
Cycles are helped.

Ivy Bridge and Sandy Bridge had similar results. (Ivy Bridge shown)
total instructions in shared programs: 11875620 -> 11875617 (<.01%)
instructions in affected programs: 421 -> 418 (-0.71%)
helped: 2
HURT: 0

total cycles in shared programs: 178245336 -> 178245326 (<.01%)
cycles in affected programs: 3425 -> 3415 (-0.29%)
helped: 2
HURT: 0

No changes on Gen4 or Gen5.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Ian Romanick
88eb8f190b nir/algebraic: Simplify logic to detect sign of an integer
This occurs in a handful of places in the soft-fp64 code, and that is
the primary reason for the change.

v2: Fix a typo in a comment.  Noticed by Matt.  Copy the correct fp64
shader-db results to the commit message.  I realized that I used
accidentally used the results from the next commit.

Results on the 308 shaders extracted from the fp64 portion of the OpenGL
CTS:

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 906235 -> 906149 (<.01%)
instructions in affected programs: 353966 -> 353880 (-0.02%)
helped: 31
HURT: 2
helped stats (abs) min: 1 max: 8 x̄: 3.03 x̃: 3
helped stats (rel) min: 0.01% max: 1.59% x̄: 0.10% x̃: 0.04%
HURT stats (abs)   min: 3 max: 5 x̄: 4.00 x̃: 4
HURT stats (rel)   min: 0.02% max: 0.02% x̄: 0.02% x̃: 0.02%
95% mean confidence interval for instructions value: -3.51 -1.70
95% mean confidence interval for instructions %-change: -0.19% <.01%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 7076552 -> 7076173 (<.01%)
cycles in affected programs: 2878361 -> 2877982 (-0.01%)
helped: 37
HURT: 2
helped stats (abs) min: 2 max: 48 x̄: 10.81 x̃: 6
helped stats (rel) min: <.01% max: 2.17% x̄: 0.47% x̃: 0.01%
HURT stats (abs)   min: 1 max: 20 x̄: 10.50 x̃: 10
HURT stats (rel)   min: <.01% max: 0.01% x̄: <.01% x̃: <.01%
95% mean confidence interval for cycles value: -13.96 -5.48
95% mean confidence interval for cycles %-change: -0.72% -0.16%
Cycles are helped.

total fills in shared programs: 2064 -> 2065 (0.05%)
fills in affected programs: 45 -> 46 (2.22%)
helped: 0
HURT: 1

Regular shader-db results:

All Gen7+ platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 17611530 -> 17611506 (<.01%)
instructions in affected programs: 5934 -> 5910 (-0.40%)
helped: 10
HURT: 0
helped stats (abs) min: 1 max: 5 x̄: 2.40 x̃: 2
helped stats (rel) min: 0.14% max: 1.24% x̄: 0.47% x̃: 0.34%
95% mean confidence interval for instructions value: -3.53 -1.27
95% mean confidence interval for instructions %-change: -0.78% -0.17%
Instructions are helped.

total cycles in shared programs: 338419178 -> 338419218 (<.01%)
cycles in affected programs: 19244 -> 19284 (0.21%)
helped: 4
HURT: 2
helped stats (abs) min: 2 max: 4 x̄: 3.00 x̃: 3
helped stats (rel) min: 0.05% max: 0.11% x̄: 0.08% x̃: 0.08%
HURT stats (abs)   min: 26 max: 26 x̄: 26.00 x̃: 26
HURT stats (rel)   min: 1.20% max: 1.20% x̄: 1.20% x̃: 1.20%
95% mean confidence interval for cycles value: -9.08 22.41
95% mean confidence interval for cycles %-change: -0.35% 1.04%
Inconclusive result (value mean confidence interval includes 0).

No changes on any earlier Intel platform.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>
2020-03-18 20:36:29 +00:00
Pierre-Eric Pelloux-Prayer
e7f3a8d695 st/mesa: disallow deferred flush if there are multiple contexts
u_threaded can hang in these situation, with one context waiting on a
deferred fence from the other context.
But the other context isn't flushing its pending work (because it's waiting
for more work to pushed) so everything is stuck.

Fixes: d17b35e671 ("gallium: add PIPE_FLUSH_DEFERRED")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1430
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4213>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4213>
2020-03-18 20:01:57 +00:00
Chad Versace
6ee971c882 anv: Use isl_drm_modifier_get_default_aux_state()
Use it in anv_layout_to_aux_state().

Refactor only. No change in behavior.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3881>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3881>
2020-03-18 11:39:33 -07:00
Jason Ekstrand
0905d5a14a intel/isl: Don't align linear images to 64K on Gen12+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4048>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4048>
2020-03-18 17:33:28 +00:00
Samuel Pitoiset
94e37859a9 radv: fix random depth range unrestricted failures due to a cache issue
The shader module name is used to compute the pipeline key. The
driver used to load the wrong pipelines because the shader names
were similar.

This should fix random failures of
dEQP-VK.pipeline.depth_range_unrestricted.*

Fixes: f11ea22666 ("radv: fix a performance regression with graphics depth/stencil clears")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4216>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4216>
2020-03-18 11:36:24 +00:00
Hyunjun Ko
a6625b15a4 turnip: Do gathering xfb info after nir_remove_dead_variables
So we could align stream outputs correctly even if unused in/outs are
removed.

Fixes:
  dEQP-VK.transform_feedback.fuzz.random_vertex.scalar_types.*
  dEQP-VK.transform_feedback.fuzz.random_vertex.vector_types.*

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4207>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4207>
2020-03-18 09:47:04 +00:00
Hyunjun Ko
c11a2bc202 turnip: Fix wrong assignment of xfb output's offset.
Should be divided by 4 so we could calculate the offset correctly in
tu6_setup_streamout.

Fixes: 2a1d6b81ed
Related: 374406a7c4

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4207>
2020-03-18 09:47:04 +00:00
Lionel Landwerlin
25a54554b3 intel/decoder: don't consider header fields past dword0
v2: use ULL

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
2020-03-18 09:19:53 +00:00
Vasily Khoruzhick
0c41937440 lima: decode depth/stencil write bits in RSW
Now that we know the bits that are responsible for enabling depth/stencil
writes in shader we can decode them properly.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
2020-03-18 08:36:17 +00:00
Icenowy Zheng
9205762cae lima: implement zsbuf reload
Fragment shader can write depth and stencil if we set necessary flags
in RSW. In addition to that we need to use special format for Z24S8.
Original format is apparently Z24X8 since we can't sample stencil in GLES2.
This new format also seems to use several components for storing depth
since we saw r != g != b when sampling with this format.

[vasily: - initialize clear->depth to 0xffffff if we reload depth, just
           like blob does. Reloading doesn't work otherwise
         - use single bitmap for reload type]

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
2020-03-18 08:36:17 +00:00
Vasily Khoruzhick
dbceabed72 lima: disable Z16 format
Unfortunately we don't know how to reload Z16 buffers yet and blob
is using Z24 for dEQP tests that need depth reload.

Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4197>
2020-03-18 08:36:17 +00:00
Eric Anholt
8b8af6d398 gallium/util: Switch util_float_to_half to _mesa_float_to_half()'s impl.
The util_float_to_half() implementation was much smaller, but when trying
to switch _mesa_float_to_half to it, many testcases
(dEQP-VK.spirv_assembly.instruction.graphics.opquantize.*,
piglit.spec.arb_shading_language_packing.*packhalf2x16) start failing on
Intel.  Replace the broken impl so that people don't have to debug it
later.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3699>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3699>
2020-03-17 22:28:12 +00:00
Bas Nieuwenhuizen
8e4e2cedcf amd/llvm: Fix divergent descriptor regressions with radeonsi.
piglit/bin/arb_bindless_texture-limit -auto -fbo:
  Needed to deal with non-NULL dynamic_index without deref in tex instructions.

piglit/bin/shader_runner tests/spec/arb_bindless_texture/execution/images/multiple-resident-images-reading.shader_test -auto:
  Need to deal with non-deref images in enter_waterfall_imae.

Fixes: b83c9aca4a "amd/llvm: Fix divergent descriptor indexing. (v3)"
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4191>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4191>
2020-03-17 22:53:16 +01:00
Dave Airlie
040ce9a1b3 gallium: fix build with latest meson and gcc10
In Fedora 32 build was failing with meson-0.53.2-1.git88e40c7.fc32
and gcc-10.0.1-0.9.fc32.x86_64.

Worked with meson-0.53.1-1 and same gcc.

/usr/bin/ld: src/gallium/state_trackers/dri/libdri.a(dri2.c.o): in function `dri2_interop_export_object':
/home/airlied/devel/mesa/mesa/build/../src/gallium/state_trackers/dri/dri2.c:1813: undefined reference to `st_finalize_texture'
/usr/bin/ld: src/gallium/state_trackers/dri/libdri.a(dri_screen.c.o): in function `dri_init_screen_helper':
/home/airlied/devel/mesa/mesa/build/../src/gallium/state_trackers/dri/dri_screen.c:580: undefined reference to `st_gl_api_create'

Moving this around seems to fix it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4220>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4220>
2020-03-17 21:14:38 +00:00
Marek Olšák
8dc5e174c7 ac: don't set old denormals flags with LLVM >= 11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
2020-03-17 20:47:48 +00:00
Marek Olšák
63a5051ea6 ac: set new LLVM denormal flags
See: https://reviews.llvm.org/D71358

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
2020-03-17 20:47:48 +00:00
Marek Olšák
56cc10bd27 ac: unify denorm setting enforcement
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
2020-03-17 20:47:48 +00:00
Marek Olšák
e4959add2f gallium/u_vbuf: simplify the first if statement in u_vbuf_upload_buffers
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4153>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4153>
2020-03-17 19:13:57 +00:00
Marek Olšák
99a29a20d2 gallium/u_threaded: don't sync the thread for all unsychronized mappings
This was missing for the READ case. This improves glBegin/End performance.
(vbo maps with WRITE | READ | UNSYCHRONIZED)

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4153>
2020-03-17 19:13:57 +00:00
Eric Anholt
5960dadd1f freedreno/a5xx: Fix min-vs-mag filtering decisions on non-mipmap tex.
This a port of 3338d6e5f8 ("freedreno/a3xx: Mostly fix min-vs-mag
filtering decisions on non-mipmap tex.")

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4177>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4177>
2020-03-17 11:11:51 -07:00
Eric Anholt
4bc15e78fa ci: Enable testing GLES2-3 on a530 (Dragonboard 820c).
Following on from the db410c conversion to baremetal testing, reuse the
same scripts in the same rack to run 7 db820c boards (#4/8 is failing in
the bootloader for unknown reasons).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4177>
2020-03-17 11:11:51 -07:00
Eric Anholt
8997757c6a ci: Enable ccaching of CMake builds as well.
They ignore $PATH for unknown reasons, so you have to force the ccache
wrapping yourself.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
2020-03-17 10:44:39 -07:00
Eric Anholt
ba39cc5e85 ci: Enable ccache in the container builds.
This should reduce our container rebuild times, particularly on the
40-minute ARM build (which is split across only 2 runners and thus likely
to have a hot cache) when working on updating containers.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
2020-03-17 10:44:39 -07:00
Eric Anholt
af7dca3560 ci: Update the ci-templates commit.
There has been a big rename of variables in the upstream repo to make it
clear what's being handed to ci-templates.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4099>
2020-03-17 10:44:37 -07:00
Jason Ekstrand
d60375cbc2 anv: Do an end-of-pipe sync before updating AUX table entries
We've found in GL that an actual end-of-pipe sync is required before
invalidating the aux tables and that a simple CS stall is insufficient.
If we're about to modify the actual AUX table entries from the GPU, we
should definitely make sure it's stopped dead before we do so.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4206>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4206>
2020-03-17 16:38:50 +00:00
Caio Marcelo de Oliveira Filho
3dd0d12aa5 intel/blorp: Plumb the stage through blorp upload_shader
Vulkan uses that for its own upload function -- even though for BLORP
it doesn't really currently care.  Neither Iris and i965 makes use of
it at the moment.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4170>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4170>
2020-03-17 08:24:46 -07:00
Duncan Hopkins
4c35bc7e61 zink: zero out zink_render_pass_state
Since zink_render_pass_state is used as a hash-key, the entire struct gets
compared. This means we don't want any uninitialized padding in there, or
else we risk getting false negatives. This has led to issues on macOS builds.

So let's zero out the struct before we start filling it out.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4212>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4212>
2020-03-17 13:04:30 +00:00
Samuel Pitoiset
c923de68dd radv/gfx10: fix required ballot size with VK_EXT_subgroup_size_control
If compute shaders require a specific subgroup size (ie. Wave32),
we have to use the correct ballot size.

Fixes dEQP-VK.subgroups.ballot_other.compute.*_requiredsubgroupSize.

Fixes: fb07fd4e6c ("radv: implement VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
2020-03-17 12:45:01 +00:00
Samuel Pitoiset
672d106199 radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control
If compute shaders require a specific subgroup size (ie. Wave32),
we have to return the correct one.

Fixes dEQP-VK.subgroups.size_control.compute.required_subgroup_size_*.

Fixes: fb07fd4e6c ("radv: implement VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
2020-03-17 12:45:01 +00:00
Samuel Pitoiset
46e8ba1344 radv: only inject implicit subpass dependencies if necessary
The Vulkan 1.2.134 spec update clarified when implicit subpass
dependencies should be injected by the driver. They only make
sense if automatic layout transitions are performed.

This should fix a performance regression with RPCS3 (although
they added a workaround for RADV since the regression has been found).

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2502
Fixes: e60de08547 ("radv: handle missing implicit subpass dependencies")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4210>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4210>
2020-03-17 13:24:36 +01:00
Michel Dänzer
a0591863db gitlab-ci: Enable more Gallium drivers in meson-i386 job
These are the ones which can be enabled with the current x86_build
docker image and which build without warnings.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:21:45 +01:00
Michel Dänzer
106bf59ca9 llvmpipe: Use uintptr_t for pointer values
Instead of uint64_t. Fixes potentially writing beyond the end of the
handles pointer array on 32-bit architectures (and copying all 0s
instead of the computed pointer values to the array on big endian
ones).

Corresponding compiler warning:

../src/gallium/drivers/llvmpipe/lp_state_cs.c: In function ‘llvmpipe_set_global_binding’:
../src/gallium/drivers/llvmpipe/lp_state_cs.c:1312:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
 1312 |       va = (uint64_t)((char *)lp_res->data + offset);
      |            ^

Fixes: 264663d55d "gallivm/llvmpipe: add support for global
                     operations."

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:20:49 +01:00
Michel Dänzer
c56f09124b gitlab-ci: Move classic driver testing to a new meson-classic job
The motivation is to allow llvmpipe to be enabled instead in the
meson-i386 job.

v2: (Eric Engestrom)
* Rename meson-main job to meson-gallium
* Remove stale comment above meson-i386 job

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:20:23 +01:00
Michel Dänzer
c3727ae431 gitlab-ci: Fold scons-swr job into scons job
Should be fast enough.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
2020-03-17 11:17:10 +01:00
Connor Abbott
3ff437abb3 tu: Fix border color with compute shaders
I wasn't able to find any CTS tests that used compute shaders with
samplers and set a border color, so I hacked one of the tests included
with amber:

https://gist.github.com/cwabbott0/e72f0ed8259b84ed6bf3920c68fefee6

The register was found via looking at dumps of the Vulkan blob, and
setting it fixes this test.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
2020-03-17 09:40:26 +00:00
Michel Dänzer
32eecf5879 gitlab-ci: Don't use buster-backports packages by default for x86_build
The backports repository can be temporarily inconsistent between
architectures, which can break the docker image build.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4209>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4209>
2020-03-17 09:49:09 +01:00
Rohan Garg
90a39af5f6 ci: Drop the git dependency in tracie
Instead of using git, use python and the Gitlab API
to fetch traces. This helps us slim down our ramdisks
in preparation for integrating trace replay on LAVA
devices.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
2020-03-17 07:23:27 +01:00
Tomeu Vizoso
43873afda4 gitlab-ci: Use surfaceless platform also for apitrace
In preparation for using apitrace to replay traces in LAVA jobs, build a
newer waffle so apitrace can use the surfaceless EGL platform.

As things were before this commit, Xvfb would have been needed in the
LAVA images.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
2020-03-17 07:12:36 +01:00
Tomeu Vizoso
2ca662fb61 gitlab-ci: Update renderdoc
Get closer to upstream to avoid accumulating changes.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
2020-03-17 07:12:36 +01:00
Vasily Khoruzhick
ac1dbd5ef8 lima/gpir: fix crash in schedule_insert_ready_list()
Fix crash if node is already at position we want. Otherwise we remove
it from list (and list->prev becomes NULL) and then we dereference list->prev
in list_addtail()

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
2020-03-16 16:28:33 -07:00
Vasily Khoruzhick
2756b62917 lima/gpir: add better lowering for ftrunc
GP doesn't support ftrunc natively and unfortunately one in generic
opt_algebraic is not GP-friendly either. Introduce our own lowering
that utilizes fsign() that GP supports:
ftrunc(a) = fmul(fsign(a), ffloor(fmax(a, -a)))

Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
2020-03-16 16:28:33 -07:00
Vasily Khoruzhick
b7d89476f1 lima/gpir: kill dead writes to regs in DCE
Writes to regs that are never read will confuse regalloc since they
are never live and don't conflict with any regs. Kill them to prevent
overwriting another live reg.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Connor Abbott
8c1bcc8555 lima/gpir: Optimize nots created from branch lowering
We also add a DCE pass to cleanup the result of this pass, which turns
out to also be necessary to cleanup the result of nir->gpir in some
cases that we didn't hit until the next commit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Connor Abbott
47dacf3867 lima/gpir: Optimize conditional break/continue
Optimize the result of a conditional break/continue. In NIR something
like:

loop {
   ...
   if (cond)
      continue;

would get lowered to:

block_0:
...
block_1:
branch_cond !cond block_3
block_2:
branch_uncond block_0
block_3:
...

We recognize the conditional branch skipping over the unconditional
branch, and turn it into:

block_0:
...
block_1:
branch_cond cond block_0
block_2:
block_3:

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Connor Abbott
9fb0fda8e7 lima/gpir: Make lima_gpir_node_insert_child() useful
We weren't using this function before. The name is confusing, but it
changes the child while also fixing up the dependence link, if you don't
have access to it already. Or at least, I think that's what the
intention is, and what we'll need to change the branch condition in the
next commit. Adding a dependency between the new and old source doesn't
make any sense for this, and we also need to change the actual source.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
2020-03-16 23:08:06 +00:00
Vinson Lee
5c3f20a25b panfrost: Fix gnu-empty-initializer error.
../src/gallium/drivers/panfrost/pan_cmdstream.c:1553:54: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
        union mali_attr varyings[PIPE_MAX_ATTRIBS] = { };
                                                     ^

Fixes: 836686daf3 ("panfrost: Move panfrost_emit_varying_descriptor() to pan_cmdstream.c")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4198>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4198>
2020-03-16 15:06:57 -07:00
Rhys Perry
2d14a8f237 aco: fix operand order for LS VGPR init bug workaround
Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
2020-03-16 19:34:32 +00:00
Rhys Perry
ded7a8bb46 aco: fix instruction encoding for LS VGPR init bug workaround
Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
2020-03-16 19:34:32 +00:00
Rhys Perry
ee9e0d1eca aco: set late kill for v_interp_p1_f32 for some APUs
Apparently needed for Stoney Ridge, Kabini and Mullins APUs.

gfx702 also has 16-bank LDS and https://llvm.org/docs/AMDGPUUsage.html
lists some dGPUs under there. Those GPUs seem to be Hawaii actually
(gfx701) and we don't seem to have gotten any interpolation related bugs
reported with them so far.

The late kill flag was tested by running pipeline-db with
ACO_DEBUG=validatera while setting late kill for SMEM buffer loads,
emit_vop2_instruction() and texture instructions. I also tested with
just setting the flag for v_interp_p1_f32.

As far as I know, the only other thing we have to consider for 16-bank LDS
is something to do with 16-bit interpolation. We don't do that yet.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
2020-03-16 16:09:02 +00:00
Rhys Perry
1872759f55 aco: add a late kill flag
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
2020-03-16 16:09:02 +00:00
Rhys Perry
c51348bd9b aco: move some register demand helpers into aco_live_var_analysis.cpp
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
2020-03-16 16:09:02 +00:00
Samuel Pitoiset
e1b08b55ff radv/sqtt: handle thread trace capture in sqtt_QueuePresentKHR()
To avoid wasting CPU cycles when thread trace is not enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4180>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4180>
2020-03-16 15:42:04 +00:00
Jason Ekstrand
4061ac859d anv: Push UBO ranges relative to the start of the binding
There was a disconnect between anv_nir_compute_push_layout and the code
which sets up the push_ubo_sizes array.  The NIR code we emit checks
relative to the start of the bound UBO range so that, if we end up with
a vector which straddles the start of the push range, we can perform the
bounds check without risking overflow issues.  The code which sets up
the push_ubo_sizes, on the other hand, assumed it was relative to the
start of the push range.  Somehow, this didn't get get caught by any of
the available tests.

Fixes: e03f965280 "anv: Bounds-check pushed UBOs when ..."
Closes: #2623
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
2020-03-16 15:14:14 +00:00
Jason Ekstrand
ae15b4fd73 anv: Fix the comparison in an assert
Fixes: e03f965280 "anv: Bounds-check pushed UBOs when ..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
2020-03-16 15:14:14 +00:00
Samuel Pitoiset
299fad5585 gitlab-ci: bump Vulkan CTS to 1.2.1.0
Vulkan CTS 1.1.6.0 is quite old.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Samuel Pitoiset
af6d8dea00 gitlab-ci: do not set the number of deqp-parallel jobs for RADV CTS
Let's the runner uses the maximum number of jobs to speedup CTS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Samuel Pitoiset
4668a08e9d gitlab-ci: allow deqp-runner to use the maximum number of jobs
if $DEQP_PARALLEL is not set, it will use the maximum number of
jobs instead of 1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Samuel Pitoiset
888b41f0ee gitlab-ci: remove useless 'patch' package in the VK test image
It was copied from the GL test image but it's actually unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
2020-03-16 14:36:41 +00:00
Connor Abbott
3349fe9a26 tu: Rewrite border color handling
Emit a single table of all possible Vulkan border colors up front, and
then index into it using the Vulkan enum directly. In fact this seems to
be the entire point of separating out border colors in the first place.

In addition to being simpler and having less CPU overhead, and fixing
cases where more than one sampler uses border color, this paves the way
for bindless samplers because the existing approach isn't great for
bindless.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4200>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4200>
2020-03-16 13:17:54 +00:00
Jose Fonseca
f6dad10d04 meson: Avoid duplicate symbols.
All the stubs in src/compiler/glsl/glcpp/pp_standalone_scaffolding.c
are duplicate symbols.  They should only be used as replacement for
Mesa functions when building glcpp and glsl standalone compilers, but
in fact they are getting linked with Mesa.

This change fixes this by moving the standalone stubs to a
libglcpp_standalone target, that's only linked with the glcpp/glsl
tools.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4186>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4186>
2020-03-16 11:52:26 +00:00
Neil Armstrong
4b61ad372d Revert "ci: Remove T820 from CI temporarily"
This reverts commit 089c8f0b8d.

Our office changes are finished and power is now stable in our lab
for T820 CI to run again.

Cc: Daniel Stone <daniels@collabora.com>
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
2020-03-16 11:16:27 +00:00
Neil Armstrong
bbdb4b1a6d gitlab-ci/lava: fix handling of lava tags
The lava tags was a python array not it's a gitlab CI string,
slit the string with periods in the jinja2 template to avoid having
the following tags :

tags:
 - p
 - a
 - n
 - f
 - r
 - o
 - s
 - t

instead of :
tags:
 - panfrost

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
2020-03-16 11:16:27 +00:00
Tapani Pälli
fd1436440b iris: allow compression conditionally for images on gen12
With this change, amount of resolves happening with deqp-gles31
(--deqp-case=*load_store*) drops ~50%.

v2: use iris_image_view_get_format to get the format,
    get devinfo from context instead of passing it (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
d836f3fadf isl: allow compression for storage images on gen12+
This is done to be able to use ISL_AUX_USAGE_CCS_E with images.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
cd132a8eed iris: determine aux usage during predraw and state setup
Patch changes surface state setup to alloc/fill states for all possible
usages for image resource on gen12. Also predraw and binding table
population is changed to determine correct aux usage with the new
iris_image_view_aux_usage.

v2: alloc always all states independent on current image
    aux state on gen >= 12 , code cleanups (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
d4c879e69e iris: move existing image format fallback as a helper function
Patch adds a helper function for determining image format and changes
iris_set_shader_images to use it.

v2: pass iris_context instead of pipe one, rename function,
    code cleanup (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
fe2baf72e7 iris: provide dummy iris_image_view_aux_usage
Similar to iris_resource_texture_aux_usage this function will
determine proper aux_usage for image, now it will default to
ISL_AUX_USAGE_NONE.

v2: drop gen_device_info parameter, rename function (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
e8f0483ec4 intel/compiler: detect if atomic load store operations are used
Patch adds a new arg and modifies existing calls from i965, anv
pass NULL but iris stores this information for later use.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
6dd654ba41 iris: use the images_used mask in resolve pass
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Tapani Pälli
5910c938a2 nir/glsl: gather bitmask of images used by program
In a similar fashion as commit f5c7df4dc9 does for textures.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
2020-03-16 10:34:21 +00:00
Danylo Piliaiev
51b1b102bd st/mesa: Fix signed integer overflow when using util_throttle_memory_usage
../src/mesa/state_tracker/st_cb_texture.c:1719:57: runtime error: signed integer overflow: 203489280 * 16 cannot be represented in type 'int'

Fixes: 21ca322e63
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4185>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4185>
2020-03-16 10:10:13 +00:00
Matt Turner
b93a195225 isl: Avoid EXPECT_DEATH in unit tests
EXPECT_DEATH works by forking the process and letting the forked process
fail with an assertion. This process is evidently incredibly expensive,
taking ~30 seconds to run the whole isl_aux_info_test on a 2.8GHz
Skylake. Annoyingly all of the (expected) assertion failures also leaves
lots of messages in dmesg and potentially generates lots of coredumps.

Instead, avoid the expense of fork/exec by redefining assert() and
unreachable() in the code we're testing to return a unit-test-only
value. With this patch, the test takes ~1ms.

Also, while modifying the EXPECT_EQ() calls, reverse the arguments so
that the expected value comes first, as is intended. Otherwise gtest
failure messages don't make much sense.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/issues/2567
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4174>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4174>
2020-03-13 17:48:03 -07:00
Jan Zielinski
5e523c9265 gallium/swr: use ElementCount type arguments for getSplat()
Reviewed-by: Alok Hota <alok.hota@intel.com>

In LLVM11, ConstantVector::getSplat() function definition
has changed and the first function argument has now ElementCount type.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4188>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4188>
2020-03-13 17:56:13 +00:00
Christian Gmeiner
a19d8c836f etnaviv: enable shareable shaders
We are not using any pctx reference in the shader so it seems fine
to enable this cap.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
2020-03-13 16:50:19 +00:00
Christian Gmeiner
fe204de632 etnaviv: get rid of etna_spec in etna_context
There is no need to have a complete copy of etna_spec - just
reference the one and only from etna_screen.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
2020-03-13 16:50:19 +00:00
Jason Ekstrand
4432dd6ea4 anv: Dump push ranges via VK_KHR_pipeline_executable_properties
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4173>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4173>
2020-03-13 16:31:44 +00:00
Rhys Perry
625d8705f0 aco: don't stop scheduling at exports
This allows us to move v_cvt_pkrtz_f16_f32 instructions upwards, improving
schedules and (somewhat unintentionally) moving the exports slightly
closer together.

Totals from affected shaders:
SGPRS: 1030224 -> 1030248 (0.00 %)
VGPRS: 794080 -> 794392 (0.04 %)
Spilled SGPRs: 127117 -> 127117 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 89028152 -> 89032312 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 65252 -> 65219 (-0.05 %)
SMEM score: 843808.00 -> 843918.00 (0.01 %)
VMEM score: 5331687.00 -> 5397802.00 (1.24 %)
SMEM clauses: 567659 -> 567655 (-0.00 %)
VMEM clauses: 290715 -> 290716 (0.00 %)
Instructions: 17143219 -> 17144259 (0.01 %)
Cycles: 1098442808 -> 1098446968 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Rhys Perry
6b4c31f814 aco: allow barriers to be skipped during scheduling
Much better scheduling apparently in 160 shaders

Totals from affected shaders:
SGPRS: 6272 -> 6344 (1.15 %)
VGPRS: 4832 -> 4844 (0.25 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 467192 -> 467428 (0.05 %) bytes
LDS: 459 -> 459 (0.00 %) blocks
Max Waves: 1407 -> 1409 (0.14 %)
SMEM score: 9309.00 -> 11216.00 (20.49 %)
VMEM score: 26679.00 -> 33652.00 (26.14 %)
SMEM clauses: 1817 -> 1776 (-2.26 %)
VMEM clauses: 2286 -> 2288 (0.09 %)
Instructions: 86537 -> 86596 (0.07 %)
Cycles: 676260 -> 676568 (0.05 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Rhys Perry
928ac97875 aco: add helpers for ensuring correct ordering while scheduling
Pipeline-db changes in 721 shaders.

Totals from affected shaders:
SGPRS: 42336 -> 42656 (0.76 %)
VGPRS: 38368 -> 38636 (0.70 %)
Spilled SGPRs: 11967 -> 11967 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5268088 -> 5269840 (0.03 %) bytes
LDS: 1069 -> 1069 (0.00 %) blocks
Max Waves: 4473 -> 4447 (-0.58 %)
SMEM score: 41155.00 -> 41826.00 (1.63 %)
VMEM score: 146339.00 -> 147471.00 (0.77 %)
SMEM clauses: 24434 -> 24535 (0.41 %)
VMEM clauses: 16637 -> 16592 (-0.27 %)
Instructions: 996037 -> 996388 (0.04 %)
Cycles: 76476112 -> 75281416 (-1.56 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Rhys Perry
2cd760847a aco: add helpers for moving instructions for scheduling
No pipeline-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
2020-03-13 14:04:50 +00:00
Samuel Pitoiset
2d295ab3f3 radv: add llvm_compiler_shader() helper
To match aco_compile_shader().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Samuel Pitoiset
4d991c2de4 radv: remove unnecessary LLVM includes
They are already included from src/amd/llvm.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Samuel Pitoiset
5ea32a6201 radv: remove radv_shader_variant::aco_used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Samuel Pitoiset
3fea948177 radv: cleanup occurences of use_aco everywhere
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
2020-03-13 10:22:13 +00:00
Danylo Piliaiev
1305b93274 glsl: do not crash if string literal is used outside of #include/#line
Fixes: 67b32190f3
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2619
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4146>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4146>
2020-03-13 11:49:06 +02:00
Caio Marcelo de Oliveira Filho
f8051f77ea anv: Remove duplicate code in anv_cmd_buffer_bind_descriptor_set
Also use a single condition statement instead of two.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
0a5053b687 anv: Reduce compute pipeline batch_data size
The batch associated with the compute pipeline only needs room for a
MEDIA_VFE_STATE. So this patch moves the batch_data to each pipeline
struct and cap the one in compute pipeline.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
925df46b7e anv: Split graphics and compute bits from anv_pipeline
Add two new structs that use the anv_pipeline as base.  Changed all
functions that work on a specific pipeline to use the corresponding
struct.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
af33f0d767 anv: Use a separate field in the pipeline for compute shader
This is a preparation for splitting the compute and graphics pipelines
into separate structs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
bff45b6a7f anv: Decouple flush_descriptor_sets() from pipeline struct
Explicitly pass the active stages and the array (and size) of shaders
to be processed.  This will make easy to store only the shaders needed
for each pipeline.

The active stages can be identified by a non-NULL shader in the
shaders array, so stop using it and keep track of the flushed stages
as iteration happens.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
6df0ac2653 anv: Decouple flush_descriptor_sets() helpers from pipeline struct
Pass the `anv_shader_bin *` instead of expecting the helpers to peek
into the pipeline struct.  Also reach for the device from the
cmd_buffer instead of the pipeline.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
d1c13f01aa anv: Remove redundant check in flush_descriptor_sets() helpers
These helpers are only called for stages that are active, so the code
for a non-active stage is never executed.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
eec04c0aae anv: Pass the right pipe_state to flush_descriptor_sets()
The caller has this information, so pass directly instead of making
each helper function call figure that one out.  Also, since we can
reach the pipeline from pipe_state, drop that parameter from the
function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
88df3bf79a anv: Keep the shader stage in anv_shader_bin
This will be used to decouple the logic flush_descriptor_sets() from
the position in the shader array, allowing us to store just the
shaders needed for each pipeline.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
9bf044d254 anv: Use a dynamic array for storing executables in pipeline
Avoids waste for pipelines that don't use all the shaders, and is
flexible enough to cover cases where there are multiple variants per
shader (e.g. SIMD8/16/32 for fragment shader).

Even though we could pre-calculate the exact size of the array, this
is not a critical path so it is worth preventing the bug that will
likely happen when new variants are added but not accounted for.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
9b0682df82 anv: Use pipeline type to decide whether or not lower multiview
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Caio Marcelo de Oliveira Filho
613c9b78e3 anv: Add a new enum to identify the pipeline type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
2020-03-12 13:18:54 -07:00
Eric Anholt
d0a52432b1 glsl/tests: Fix waiting for disk_cache_put() to finish.
We were wasting 4s on waiting for expected-not-to-appear files to show
up on every test.  Using timeouts in test code is error-prone anyway,
as our shared runners may be busy on other jobs.

Fixes: 50989f87e6 ("util/disk_cache: use a thread queue to write to shader cache")
Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2505
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
2020-03-12 19:47:23 +00:00
Eric Anholt
e178bca5cc glsl/tests: Catch mkdir errors to help explain when they happen.
A recent pipeline
(https://gitlab.freedesktop.org/Venemo/mesa/-/jobs/1893357) failed
with what looks like an intermittent error related to making files for
the cache test inside of the core of the cache.  Given some of the
errors, it looks like maybe a mkdir failed, so log those errors
earlier so we can debug what's going on next time.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
2020-03-12 19:47:23 +00:00
Caio Marcelo de Oliveira Filho
7d54b84d49 intel/fs: Combine adjacent memory barriers
This will avoid generating multiple identical fences in a row.

For Gen11+ we have multiple types of fences (affecting different
variable modes), but is still better to combine them in a single
scoped barrier so that the translation to backend IR have the option
of dispatching both fences in parallel.

This will clean up redundant barriers from various
dEQP-VK.memory_model.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Caio Marcelo de Oliveira Filho
bf432cd831 nir: Add pass to combine adjacent scoped memory barriers
SPIR-V generates very granular barriers, however HW and backends might
not necessarily take advantage of those.  This pass provides a general
mechanism to combine such barriers.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Caio Marcelo de Oliveira Filho
d31a8ed8fd nir: Reorder nir_scopes so wider scope has larger numeric value
Makes code comparing and combining scopes slightly more readable.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Caio Marcelo de Oliveira Filho
67fc88fbb9 nir: Don't skip a bit in nir_memory_semantics
There was another enum entry in the draft versions of
nir_memory_semantics, but when it got dropped the entries were not
updated.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
2020-03-12 19:21:36 +00:00
Samuel Pitoiset
a46e9f4d9a radv: use ac_gpu_info::use_late_alloc
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
741dd9e32b radv: rewrite late alloc computation
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
74e7b442f2 radv: tune primitive binning for small chips
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
22d3e047e5 radv: use better tessellation tunables on GFX9+
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Samuel Pitoiset
6d27022ce1 radv/gfx10: cache metadata in L2 on small chips
Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
2020-03-12 18:17:47 +00:00
Jason Ekstrand
6310c666a4 intel/isl: Set DepthStencilResource based on aux usage
In ISL, usage flags only carry intent and not semantic meaning.  We
don't have a bulletproof way in ISL to specify that an image is of
depth/stencil type.  The usage flags are great but blorp, for instance,
loves to disrespect them.  One proposed solution to this problem is to
add explicit depth/stencil formats which are distinct from the
corresponding color formats.

Fortunately, however, empirical evidence suggests that this bit only
affects the sampler's interpretation of the CCS data.  Therefore, we can
set the bit based off of the aux_usage which is now very specific and
does carry semantic meaning.  In particular, aux_usage now makes a
distinction between color CCS and depth/stencil CCS which appears to be
exactly what the DepthStencilResource bit is for.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
f047e504a5 intel: Require ISL_AUX_USAGE_STC_CCS for stencil CCS
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
56e15bf31c iris: Use ISL_AUX_USAGE_STC_CCS for stencil CCS
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
69a0150e4e intel/blorp: Allow STC_CCS in blit sources
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
6fa92cd015 intel/isl: Add a separate ISL_AUX_USAGE_STC_CCS
Stencil CCS is slightly different from color CCS.  Using a color CCS
resolve with stencil CCS doesn't do the right thing and you can't sample
from a stencil CCS image without the DepthStencilResource bit set or you
will get the wrong data.  Stencil CCS also has it's own rules such as it
doesn't support fast-clear and has no partial resolve.  This seems to
indicate that it should probably be its own isl_aux_usage.  Now that
adding new isl_aux_usage values is pretty cheap, let's split stencil CCS
out on its own.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
05a8e981ad intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode
We also delete the badly named isl_surf_supports_hiz_ccs_wt.  The name
is misleading because it doesn't return whether or not the surface
supports HiZ+CCS in write-through mode (any single-sampled HiZ+CCS
capable surface does) but rather a heuristic decision about whether or
not we want to enable write-through mode based on the usage flags in the
isl_surf.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
ff1f0a720d iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ
Previously, we always set the aux_usage to ISL_AUX_USAGE_HIZ_CCS and let
ISL choose write-through based on isl_surf_supports_hiz_ccs_wt.  This
commit makes us choose explicitly at surface creation time whether to
use HIZ_CCS or HIZ_CCS_WT based on the same set of conditions.  This is
more explicit and should be more robust as it lets us choose WT mode in
one place rather than trusting isl_surf_supports_hiz_ccs_wt to return
the same thing every time.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
e13ed0e9e5 intel/blorp: Allow HIZ_CCS_WT in copy sources
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
98dc7f56b7 intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT
This is distinct from ISL_AUX_USAGE_HIZ_CCS in that the HiZ surface
operates in write-through mode which means that the HiZ surface is only
used for depth-testing acceleration and the CCS-compressed main surface
is always valid so we can texture from it.

Separating full HiZ from write-through mode at the isl_aux_usage level
has a couple of advantages:

 1. It's more explicit.  Instead of write-through mode depending on the
    heuristic decision in isl_surf_supports_hiz_ccs_wt, it's now
    something that's explicitly requested by the driver.  This should be
    more robust than hoping isl_surf_supports_hiz_ccs_wt always returns
    the same thing every time.  If someone (say BLORP) ever drops a
    usage flag on the isl_surf, there's a chance it could return a
    different value without us noticing leading to corruptions.

 2. Because ISL_AUX_USAGE_HIZ_CCS_WT is it's own isl_aux_usage flag, we
    can say inside the driver that HIZ_CCS does not support sampling but
    HIZ_CCS_WT does.  We can also pass HIZ_CCS_WT to isl_surf_fill_state
    and it can do some validation for us beyond what we would be able to
    do if we conflate HIZ_CCS_WT and CCS_E.

 3. In the future, we can add new heuristics to the driver which do
    things such as start all depth surfaces (regardless of usage flags)
    off in HIZ_CCS and then do a full resolve and drop to HIZ_CCS_WT the
    first time it gets used by the sampler.  This would potentially let
    us enable the faster HIZ_CCS mode even in cases where it technically
    comes in through the API as a texture.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Jason Ekstrand
feaedc1fbe intel/isl: Clean up some aux surface logic
The first check is redundant because the first thing we do in the "emit
the aux surface" section is assert that we actually have an aux_surf.
The second check involves an exclusion list of things which don't have
aux surfaces on Gen12 but an inclusion list is much simpler because it's
just "does it have MCS?".

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
2020-03-12 17:51:28 +00:00
Marek Olšák
84f97a21a6 ac: disable late alloc on small gfx10 chips
same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
7ba5e94c50 ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
09295e95eb radeonsi: tune primitive binning for small chips
same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
629b6ddd71 radeonsi: set better tessellation tunables on gfx9 and gfx10
same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Marek Olšák
bf5b65d0fd radeonsi/gfx10: cache metadata in L2 on small chips
same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
2020-03-12 17:27:23 +00:00
Samuel Pitoiset
e6e97ea92e radv/sqtt: describe layout transitions with user markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
2020-03-12 17:04:55 +00:00
Samuel Pitoiset
b229302b96 radv/sqtt: describe begin/end subpass barriers with user markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
2020-03-12 17:04:55 +00:00
Juan A. Suarez Romero
90550b2a3e nir/algebraic: coalesce fmod lowering
As fmod for 16/32/64 bits lowering does the same, let's merge all of
them in a single case.

Fixes dEQP-VK.glsl.builtin.precision_double.mod.compute.* on ACO.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
2020-03-12 16:42:52 +00:00
Juan A. Suarez Romero
acd0dd3b4b nir/lower_double_ops: relax lower mod()
Currently when lowering mod() we add an extra instruction so if
mod(a,b) == b then 0 is returned instead of b, as mathematically
mod(a,b) is in the interval [0, b).

But Vulkan spec has relaxed this restriction, and allows the result to
be in the interval [0, b].

For the OpenGL case, while the spec does not allow this behaviour, due
the allowed precision errors we can end up having the same result, so
from a practical point of view, this behaviour is allowed (see
https://github.com/KhronosGroup/VK-GL-CTS/issues/51).

This commit takes this in account to remove the extra instruction
required to return 0 instead.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
2020-03-12 16:42:52 +00:00
Bas Nieuwenhuizen
b83c9aca4a amd/llvm: Fix divergent descriptor indexing. (v3)
There are multiple LLVM passes that very much move the
intrinsic using the descriptor outside of the loop, defeating
the entire point of creating the loop.

Defeat the optimizer by  splitting the break into a separate
if-statement and putting an optimization barrier on the bool
in between.

v2: Move from a callback based system to begin/end loop.
    This does not make it significantly less intrusive but
    is a bit nicer with all the extra struct and callback
    stubs.
v3: Deal with non-divergent values in divergent path.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2160
Fixes: 028ce52739 "radv: Add non-uniform indexing lowering."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4109>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4109>
2020-03-12 16:12:02 +00:00
Ian Romanick
ba88e95187 intel/fs: Fix NULL destinations on 3-source instructions again after late DCE
We considered moving this down near the call to
insert_gen4_send_dependency_workarounds.  By that point it's too late
for a couple reasons.  One, we're potentially increasing resiter
pressure that may lead to anoter spill.  Two, fixup_3src_null_dest tries
to allocate a VGRF, but the post-register allocation shader uses
physical registers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2621
Fixes: ba2fa1ceaf ("intel/fs: Do cmod prop again after scheduling")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4155>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4155>
2020-03-12 08:22:43 -07:00
Timur Kristóf
cfa299eadb radv: Enable subgroup shuffle on GFX10 when ACO is used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4159>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4159>
2020-03-12 13:34:41 +00:00
Timur Kristóf
967eb23261 radv: Enable lowering dynamic quad broadcasts.
This will lower dynamic quad broadcasts into something that both
LLVM and ACO can understand. On hardware which supports shuffles,
they are lowered to shuffle, on older hardware (GFX6-7) they will
get lowered to constant quad broadcasts.

Fixes dEQP-VK.subgroups.quad.*.subgroupquadbroadcast_nonconst_*

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
2020-03-12 13:16:07 +00:00
Timur Kristóf
ec16535b49 nir: Add ability to lower non-const quad broadcasts to const ones.
Some hardware doesn't support subgroup shuffle, and on such hardware
it makes no sense to lower quad broadcasts to shuffle. Instead, let's
lower them to four const quad broadcasts, paired with bcsel instructions.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
2020-03-12 13:16:07 +00:00
Eric Engestrom
3aa83d809f gen_release_notes: resolve ambiguity by renaming version to previous_version and next_version to this_version
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4113>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4113>
2020-03-12 12:57:11 +00:00
Eric Engestrom
64af6b3bcf gen_release_notes: fix version in "you should wait" message
Fixes: 86079447da ("scripts: Add a gen_release_notes.py script")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4113>
2020-03-12 12:57:11 +00:00
Alyssa Rosenzweig
dcc50f4302 pan/bi: Interpret register allocation results
Once LCRA has run, we have a map from IR indices to byte offsets into
the register file, so we need to "install" these results, rewriting the
IR to use native registers and fixing up writemasks/swizzles to
substitute vectorization for adjacent registers (for LCRA, we're
modeling in terms of real vectors).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
e8139ef645 pan/bi: Add register allocator
We model the machine as vector (with restrictions) to natively handle
mixed types and I/O and other goodies. We use LCRA for the heavylifting.
This commit adds only the modeling to feed into LCRA and spit LCRA
solutions back; next commit will integrate it with the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
116c541c07 pan/bi: Fix missing src_types
We want types to be consistent throughout the IR so we don't have to
make exceptions to parse things out. These cases just got missed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
e1d9533925 pan/bi: Fix vector handling of readmasks
The issue was messing with liveness analysis... with Midgard we look at
the writemask to decide how the instruction behaves. Here, since our ALU
is scalar (except for subdivision which doesn't have proper writemasks
anyway) we just look at the component count directly -- either 4 for
vector instructions (essentially - for smaller loads we can replicate
manually without much burden), or 1 for scalar.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
c63105f988 pan/bi: Minor fixes in iteration macros
Found during RA bringup.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
545dedba13 pan/midgard: Remove incorrect comment in RA
Ironically, this comment was mistakenly added by the commit that fixed
the purported issue in the comment (1bce7fdecd - found by `git blame`)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Alyssa Rosenzweig
f06db4d54c panfrost: Move lcra to panfrost/util
We'll want to use it for the Bifrost RA as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>
2020-03-12 12:41:08 +00:00
Rhys Perry
4d0203aa83 glsl/list: use uintptr_t for exec_node_data()'s subtraction
This fixes UBSan warnings when foreach_list_typed_safe() passes NULL:
pointer index expression with base 0x000000000000 overflowed to 0xffffffffffffffa8

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4157>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4157>
2020-03-12 12:09:07 +00:00
Rhys Perry
85d05b3fd7 aco: fix uninitialized data error in waitcnt pass
Shouldn't create any incorrect waitcnts but may create suboptimial
waitcnts in rare cases.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4133>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4133>
2020-03-12 11:46:56 +00:00
Samuel Pitoiset
cc320ef9af ac/llvm: add missing optimization barrier for 64-bit readlanes
Otherwise, LLVM optimizes it but it's actually incorrect.

Fixes: 0f45d4dc2b ("ac: add ac_build_readlane without optimization barrier")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3585>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3585>
2020-03-12 08:46:42 +01:00
Tapani Pälli
9c53a3bb22 iris: toggle on PIPE_CAP_MIXED_COLOR_DEPTH_BITS
This enables additional EGL configs where we have depth/stencil buffer
with different number of bits per pixel than color buffer has. This
enables some Android games to work that require such config.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4127>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4127>
2020-03-12 05:08:48 +00:00
Hyunjun Ko
1896b44aee turnip: Add tu6_control struct.
Follow the way that freedreno is doing so that we could see the whole
layout of the scratch buffer.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:17 +00:00
Hyunjun Ko
e4f1697b54 turnip: Enable VK_EXT_transform_feedback
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
4a45c84672 turnip: Implement an empty function vkCmdDrawIndirectByteCountEXT
TODO. We should implement this since indirect draw is enabled.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
9ff1959ca5 turnip: Implement stream-out emit and vkApis for transform feedback
1. Implement vkCmdBindTransformFeedbackBuffersEXT,
vkCmdBeginTransformFeedbackEXT and vkCmdEndTransformFeedbackEXT.
 - Not handling counter buffers yet.
2. Implement streamout emit function, mostly taken from fd6_emit.c

v2. Replace emit_pkt4 funcs with emit_regs.

v3. Don't copy the state of stream-output from tu_pipeline.

v4. Set zero to VPC_SO_CNTL/VPC_SO_BUF_CNTL in tu6_init_hw.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
374406a7c4 turnip: Setup stream-output when linking program
Mostly taken from fd6_program.c.

v2. Note that it forces to use full VS instead of binning pass VS if
there's stream output as the binning pass VS will have outputs on
other than position/psize stripped out, which is the same as freedreno.

v3. fix indentation.

v4. Use register index instead of location when setup streamout.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
82fdb13c25 turnip: Define structs for transform feedback
Define new structures for streamout buffers and state.
Most members of the state struct are taken from freedreno driver.

v2. Use IR3_MAX_SO_* and avoid using magic values.

v3. Remove the state of stream-output in tu_cmd_state and use one in
tu_pipeline and split out reset and enabled fields.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
Hyunjun Ko
2a1d6b81ed turnip: Gather information for transform feedback
- Add one member to the existed ir3_stream_output so that we could
assign location information from nir_xfb_info, rather than defining
new struct.

- Redefine maximum of so buffers, streams and outputs, which will be
used for turnip.

- Also enable caps for transform feedback for spirv_to_nir.

v2. Remove redefined maximums and use IR3_MAX_SO_* and add
IR3_MAX_SO_STREAMS.

v3. Remove the newly added location field so that we could keep aligned
with 32 bytes. Instead we create an array mapping between the location
and consecutive index, which is GL driver is doing.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3942>
2020-03-12 03:10:16 +00:00
David Stevens
31c420565c egl/android: set window usage flags
When creating an egl surface from an ANativeWindow, the window's usage
flags need to be set so that buffers are allocated properly.

Signed-off-by: David Stevens <stevensd@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
2020-03-12 11:03:32 +09:00
Eric Anholt
cf5ba9d409 ci: Make a simple little bare-metal fastboot mode for db410c.
This supports powering up the device (using an external tool you
provide based on your particular lab), talking over serial to wait for
the fastboot prompt, and then booting a fastboot image on a target
device.

I was previously relying on LAVA for this, but that ran afoul of
corporate policies related to the AGPL.  However, LAVA wasn't doing
too much for us, given that gitlab already has a job scheduler and
tagging and runners.  We were spending a lot of engineering on making
the two systems match up, when we can just have gitlab do it directly.

Lightly-reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
2020-03-11 21:36:47 +00:00
Eric Anholt
d51da8610f ci: Fix installation of firmware for db410c's nic.
The debian firmware package doesn't actually contain it, costing us a
minute of boot time waiting for it to show up.

Lightly-reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
2020-03-11 21:36:47 +00:00
Eric Anholt
ff1183648a ci: Print the renderer/version that our dEQP invocation is using.
This is useful for sanity checking how the driver loads.

Lightly-reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4076>
2020-03-11 21:36:47 +00:00
Yevhenii Kolesnikov
32b7ba66b0 intel/compiler: fix cmod propagation optimisations
Knowing following:
 - CMP writes to flag register the result of
   applying cmod to the `src0 - src1`.
   After that it stores the same value to dst.
   Other instructions first store their result to
   dst, and then store cmod(dst) to the flag
   register.
 - inst is either CMP or MOV
 - inst->dst is null
 - inst->src[0] overlaps with scan_inst->dst
 - inst->src[1] is zero
 - scan_inst wrote to a flag register

There can be three possible paths:

 - scan_inst is CMP:

   Considering that src0 is either 0x0 (false),
   or 0xffffffff (true), and src1 is 0x0:

   - If inst's cmod is NZ, we can always remove
     scan_inst: NZ is invariant for false and true. This
     holds even if src0 is NaN: .nz is the only cmod,
     that returns true for NaN.

   - .g is invariant if src0 has a UD type

   - .l is invariant if src0 has a D type

 - scan_inst and inst have the same cmod:

   If scan_inst is anything than CMP, it already
   wrote the appropriate value to the flag register.

 - else:

   We can change cmod of scan_inst to that of inst,
   and remove inst. It is valid as long as we make
   sure that no instruction uses the flag register
   between scan_inst and inst.

Nine new cmod_propagation unit tests:
 - cmp_cmpnz
 - cmp_cmpg
 - plnnz_cmpnz
 - plnnz_cmpz (*)
 - plnnz_sel_cmpz
 - cmp_cmpg_D
 - cmp_cmpg_UD (*)
 - cmp_cmpl_D (*)
 - cmp_cmpl_UD

(*) this would fail without changes to brw_fs_cmod_propagation.

This fixes optimisation that used to be illegal (see issue #2154)

= Before =
 0: linterp.z.f0.0(8) vgrf0:F, g2:F, attr0<0>:F
 1: cmp.nz.f0.0(8) null:F, vgrf0:F, 0f
= After =
 0: linterp.z.f0.0(8) vgrf0:F, g2:F, attr0<0>:F

Now it is optimised as such (note change of cmod in line 0):

= Before =
 0: linterp.z.f0.0(8) vgrf0:F, g2:F, attr0<0>:F
 1: cmp.nz.f0.0(8) null:F, vgrf0:F, 0f
= After =
 0: linterp.nz.f0.0(8) vgrf0:F, g2:F, attr0<0>:F

No shaderdb changes

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2154

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3348>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3348>
2020-03-11 21:21:25 +00:00
Alyssa Rosenzweig
3b76b3bc09 pan/bi: Fix swizzle for second argument to ST_VARY
Off-by-one.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
f6d96aa962 pan/bi: Implement nir_op_ffma
We have native FMA which works for graphics usage (unlike Midgard where
it's really reserved for compute for various reasons), let's use it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
58f9171894 pan/bi: Add dead code elimination pass
Now that we have liveness analysis, we can cleanup the IR considerably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
56e1c606f8 pan/bi: Add liveness analysis pass
Now that all the guts are shared with Midgard, it's just a matter of
wiring it in.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
0bff6e5e07 pan/bi: Add bi_max_temp helper
Instead of trying to reindex all the times, just be okay with consistent
but sparse indices, then figuring out the max index is easy enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
6e0479a6a8 pan/bi: Add bi_next/prev_op helpers
From Midgard. These are surprisingly helpful.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
e623007eb7 pan/bi: Add bi_bytemask_of_read_components helpers
Same purpose as the Midgard version, but the implementation is
*dramatically* simpler thanks to our more regular IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
e94754a7c4 pan/bi: Paste over bi_has_arg
While we're at it, cleanup the Midgard one.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
9b75f410c4 panfrost: Sync Midgard/Bifrost control flow
We can move e v e n more code to be shared and let bi_block inherit from
pan_block, which will allow us to use the shared data flow analysis.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
933e44dd43 panfrost: Move liveness analysis to root panfrost/
This way we can share the code with Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:21 +00:00
Alyssa Rosenzweig
5aaaf7b12c pan/midgard: Subclass midgard_block from pan_block
Promote as much as we feasibly can while keeping it Midgard/Bifrost
agnostic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
c5dd1d542d pan/midgard: Sync midgard_block field names with Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
4998925d6a pan/midgard: Decontextualize liveness analysis core
We mostly just need the temp_count from it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
3bbec3bc64 pan/midgard: Localize visited tracking
Instead of a property on the block, just track it within the function to
minimize IR dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
218785c4a9 pan/bi: Implement sysvals
Now that it's all abstracted nicely with an implementation shared with
Midgard, this is pretty easy to get.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
e6f5ae88a7 pan/bi: Switch to panfrost_program
...now that it's shared.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
e610267510 panfrost: Move Midgard sysval code to common Panfrost
We'll use this all as-is in Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
b756a66607 pan/midgard: Remove dest_override sysval argument
Unused, noticed while working on porting over to Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
c2ff3bb0fe pan/midgard: Decontextualize midgard_nir_assign_sysval_body
Now all sysval code should be fairly generic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
674b24dcfd pan/midgard: Remove indexing dependency of sysvals
Ideally we would sync the compilers to use the same indexing scheme but
that's a lot more Midgard refactoring than I have time for right now.
This is good enough honestly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
7c2647f411 pan/midgard: Adjust sysval-related prototypes
We'd like to share this big chunk of code with Bifrost but that requires
removing the compiler_context parameter... which is totally unused in
fact!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
c3f438e023 pan/midgard: Remove unused iterators
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Alyssa Rosenzweig
3a4524e2fe panfrost: Promote midgard_program to panfrost/util
We'll want Bifrost to reuse the same linking mechanisms for the most
part.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4150>
2020-03-11 20:28:20 +00:00
Samuel Pitoiset
529c0ba219 gitlab-ci: build RADV in meson-i386 to avoid 32-bit build failures
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4044>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4044>
2020-03-11 19:30:13 +00:00
Samuel Pitoiset
f0178f516f radv: fix 32-bits build (again)
Fixes: dcfc08f5b8 ("radv/sqtt: describe begin/end command buffers with user markers")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4044>
2020-03-11 19:30:13 +00:00
Marek Olšák
fb477cc421 mesa: don't unroll glMultiDrawElements with user indices for gallium
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
70298ec4c0 gallium: add PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
510bd474e6 vbo: fix vbo_copy_vertices for GL_PATCHES and adjacency primitive types
Fixes: 4c6323c49f - vbo: handle GS and tess primitive types when splitting Begin/End

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
218dfd8c1a vbo: fix transitions from glVertexN to glVertexM where M < N
Fixes: 1f6e53e2 "vbo: don't store glVertex values temporarily into exec"

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
ec7d48afc4 vbo: use vbo_exec_wrap_upgrade_vertex for glVertex in ATTR_UNION
We can't decrease the size for glVertex before a flush,
so use vbo_exec_wrap_upgrade_vertex directly.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
2020-03-11 18:45:28 +00:00
Marek Olšák
a398a9d7e7 st/mesa: keep serialized NIR instead of nir_shader in st_program
This decreases memory usage, because serialized NIR is more compact.

The first variant is created from nir_shader for uncached shaders.
All other variants are created from serialized NIR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2909>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2909>
2020-03-11 18:17:46 +00:00
Michel Dänzer
86d270cde4 gitlab-ci: Don't restrict ppc64el/s390x build jobs to gstreamer runners
The packet runners have beefier CPUs now and don't seem to run into
test timeouts anymore.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4128>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4128>
2020-03-11 17:20:40 +00:00
Andres Gomez
bbdf215fbd gitlab-ci: Sort packages to install alphabetically
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-03-11 16:17:20 +02:00
Andres Gomez
f5235a5b73 gitlab-ci: Remove unneeded python3-pilkit dependency
It was added with tracie, but it doesn't depend on it.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-03-11 16:17:05 +02:00
Andres Gomez
52c53c4a49 gitlab-ci: Fix indentation and dangerous "\" in the last multiline line
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-03-11 16:16:56 +02:00
Chris Lord
b760ccfedb vc4: Fix query_dmabuf_modifiers mis-reporting external_only property
vc4_screen_query_dmabuf_modifiers doesn't consider that the given format
may only be supported by lowering, which only happens for external
textures.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4063>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4063>
2020-03-11 09:10:13 +00:00
Timur Kristóf
61f2e8d9bb aco: Don't store TCS outputs to LDS when we're sure that none are read.
This allows us not to write an output to LDS, even if it has
an indirect offset.

No pipeline DB changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
9b36d8c23a aco: Only write TCS outputs to LDS when they are read by the TCS.
Note that tess factors are always read at the end of the shader,
so those are still always saved to LDS.

Totals from affected shaders:
VGPRS: 25244 -> 25164 (-0.32 %)
Code Size: 1768268 -> 1690804 (-4.38 %) bytes
Max Waves: 4947 -> 4953 (0.12 %)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
4dcca26945 aco: Store tess factors in VMEM only at the end of the shader.
This optimizes out several superfluous stores of the tess factors,
especially if the shader wrote those outputs multiple times.

Pipeline DB changes on GFX10:
Totals from affected shaders:
SGPRS: 30384 -> 29536 (-2.79 %)
Code Size: 2260720 -> 2214484 (-2.05 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
8c3ab49c6b aco: Don't generate an if when the first part of a merged HS or GS is empty.
In some cases (eg. in a few tessellation CTS tests) the VS part of
a merged HS is completely empty. Let's not generate a divergent if
in these cases. (LLVM also doesn't do it.)

No pipeline DB changes, only affects the CTS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
b969501398 radv: Enable ACO on all stages.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
cec6a856e5 aco: Enable running TES as ES, including merged TES+GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
4fe5eadfae radv: Enable ACO for TES when there is no GS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
926bdfae7d aco: Implement loading TES inputs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
ec56a7093c aco: Enable streamout when TES runs on the HW VS stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
6047e51430 aco: Store TES outputs when TES runs on the HW VS stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
1d9d1cbce9 aco: Use TES output info when TES runs on the VS stage.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:11 +00:00
Timur Kristóf
0e8f4baede aco: Setup tessellation evaluation shader variables.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
80d281c6dc radv: Enable ACO for tessellation control shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
a952bf3946 aco: Fix LS VGPR init bug on affected hardware.
Vega 10 and Raven have a HW bug: when the HS thread count is zero,
the LS input arguments are loaded in the wrong registers. This commit
works around this by using the registers where the data actually is,
for the affected arguments.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
57a7d58c5d aco: Store VS outputs correctly when tessellation is used.
When tessellation is used, the VS runs on the HW LS stage (merged
into HS on GFX9-10). This commit enables such VS to store its
outputs properly in LDS so that the TCS can load them as its
per-vertex inputs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
7b7f196fbc aco: Implement tessellation control shader input/output.
Tessellation control shaders can have per-vertex inputs,
and both per-vertex and per-patch outputs. TCS can not only store,
but also load their outputs.

The TCS outputs are stored in RING_HS_TESS_OFFCHIP in VMEM, which
is where the TES reads them from. Additionally, the are also stored
in LDS to make sure they can be loaded fast when read by the TCS.

Tessellation factors are always just stored in LDS.
At the end of the shader, the first shader invocation reads these
from LDS and writes them to RING_HS_TESS_FACTOR in VMEM, and
additionally to RING_HS_TESS_OFFCHIP when they are read by
the Tessellation Evaluation Shader.

This implementation matches the memory layouts used by radv_nir_to_llvm.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
655c050119 aco: Fix combining DS additions in the optimizer.
Previously, it was calculated incorrectly for 64-bit writes and reads.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
c70b0d0267 aco: Slight fix to lds_store and lds_load.
This commit fixes lds_store and lds_load so that they can
properly support 32 and 64-bit loads and stores; and makes
them a little more reusable so they can be used by
tessellation control shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
db93af5f1b aco: Refactor VS output stores in preparation for tessellation.
This commit takes the new helpers into use by the VS output
store function. This function is also where the VS outputs will
be handled when the VS runs on the HW LS stage.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
0062bb04ac aco: Refactor load_per_vertex_input in preparation for tessellation.
This commit carves out the GS per-vertex input load, and takes the
new helper functions into use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
4e692d65e1 aco: Introduce new helpers for calculating address offsets.
These helpers are going to make it unnecessary to reimplement the
(almost) same address offset calculation in mulitple places.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
19d5dc9cee aco: Introduce new VMEM load/store helpers.
These are going to be used for loading and storing inputs
and outputs in various stages, such as GS, TCS and TES.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
4fc1da208e aco: Remove esgs_itemsize from LDS alignment calculation.
It was problematic to have it, because some shader stages might
not even know about the esgs_itemsize, for example TCS and
the merged VS+TCS stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
ca342701c5 aco: Extract LDS alignment calculation to a separate function.
This function is going to be reused in multiple functions when
storing or loading something in the LDS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
fe80f22470 aco: Remove vertex_geometry_gs assertion from merged shaders.
We are going to support more kinds of merged shaders, such
as vertex_tess_control_hs and tess_eval_geometry_gs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
f53d31fb9b aco: Use mesa shader stage when loading inputs.
This makes it more clear which stages should load these inputs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
9016711273 aco: Setup correct HW stages when tessellation is used.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
89ff5b1e51 aco: Implement load_view_index for TCS and TES.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
aa5eed673c aco: Implement memory_barrier_tcs_patch.
TCS outputs are going to be written to LDS, so it
has to use memory_barrier_shared in order to ensure
that it waits for LDS writes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
a8d15ab6da aco: Implement control_barrier for tessellation control shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
2489e4dfd1 aco: Implement load_invocation_id for tessellation control shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
5107b0312a aco: Implement load_patch_vertices_in.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
6edf6ad130 aco: Implement load_primitive_id for tessellation shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
754837f3b5 aco: Implement load_tess_coord.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
9ca2b254ca aco: Setup tessellation control shader variables.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
7b3316f3c9 aco: Extract setup_gs_variables into a separate function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Timur Kristóf
346bd0c623 radv: Move some helper functions to the radv_shader.h header file.
Move calculate_tess_lds_size and get_tcs_num_patches to radv_shader.h
ACO will need to call these functions too.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3964>
2020-03-11 08:34:10 +00:00
Pierre-Eric Pelloux-Prayer
78d42d41d4 vdpau: remove bogus assert
The assert introduced by 24f2b0a856 triggers when an application
requests a chroma_type that's different to the one from the
PIPE_VIDEO_CAP_PREFERED_FORMAT (before this change the chroma_type
was set but ignored).

So restore this behavior and ignore the chroma_type.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Fixes: 24f2b0a856 ("gallium/video: remove pipe_video_buffer.chroma_format")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4104>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4104>
2020-03-11 08:17:07 +00:00
Samuel Pitoiset
b6cebf6439 radv: do not recursively begin/end render pass for meta operations
To avoid breaking SQTT user markers that are emitted to report
barriers and layout transitions to RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4136>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4136>
2020-03-11 07:54:43 +00:00
Vasily Khoruzhick
c78e88e8a6 lima/gpir: print acc ops even if we have only one source
floor and sign have only one source, so we need to print acc ops
even if src1 is unused.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
2020-03-11 07:36:45 +00:00
Vasily Khoruzhick
492ef353fb lima/gpir: improve disassembler output
Print each op at new line and add unit name suffix for each op.
It improves readability a bit and gives us a hint what unit
was used for particular op.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
2020-03-11 07:36:44 +00:00
Vasily Khoruzhick
bcbc2b61b5 lima: print gp uniforms if gp debug is enabled
Since we keep other constants there as well it's useful for reading disassembly.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4110>
2020-03-11 07:36:44 +00:00
Samuel Pitoiset
8f5543990e gitlab-ci: add rules:changes for RADV
Including mesa_core_file_list is probably not the best but it's
better than nothing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4117>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4117>
2020-03-11 08:04:05 +01:00
John Stultz
be22995ecf gallium: hud_context: Fix scalar initializer warning.
When trying to build mesa/master under AOSP, I've run into the
following error:

external/mesa3d/src/gallium/auxiliary/hud/hud_context.c:1821:31: error: braces around scalar initializer [-Werror,-Wbraced-scalar-init]
   struct sigaction action = {{0}};
                              ^~~
1 error generated.

This patch addresses this by switching to using memset instead of
using an initializer.

Signed-off-by: John Stultz <john.stultz@linaro.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
John Stultz
09fbde830f panfrost: Move pan_afbc.c file to the the right Makefile.source file
It seems pan_afbc.c was added to the wrong Makefile.sources file.

So fix this, so we don't run into build issues with mesa/master
trying to build under AOSP.

Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
John Stultz
67aae8f98f freedreno: Add ir3_cf.c and ir3_delay.c to Makefile.sources
This patch adds missing ir3_cf.c and ir3_delay.c files to
the Makefile.sources file to address build issues seen
when trying to build mesa/master on AOSP

Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
Marek Olšák
2dc300421d gallium/cso_context: remove cso_delete_xxx_shader helpers to fix the live cache
With the live shader cache, equivalent shaders can be backed by the same
CSO. This breaks the logic that identifies whether the shader being deleted
is bound.

For example, having shaders A and B, you can bind shader A and delete
shader B. Deleting shader B will unbind shader A if they are equivalent.

Pierre-Eric figured out the root cause for this issue.

Fixes: 0db74f479b - radeonsi: use the live shader cache
Closes: #2596

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4078>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4078>
2020-03-10 22:19:47 -04:00
Eric Engestrom
1fa259b035 vulkan/wsi: fix cleanup when dup() fails
Fixes: f5433e4d6c ("vulkan/wsi: Add modifiers support to wsi_create_native_image")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4137>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4137>
2020-03-10 22:43:25 +00:00
Karol Herbst
6e035c01fb Revert "gallium: make handles of set_global_binding 64 bit"
This reverts commit e1ffb72a05
2020-03-10 22:41:26 +00:00
Karol Herbst
e1ffb72a05 gallium: make handles of set_global_binding 64 bit
needed by CL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
2020-03-10 22:06:19 +00:00
Alyssa Rosenzweig
0541350e3a pan/bi: Implement comparison opcodes via BI_CMP
Pretty straightforward for the moment. Ideally these would be fused into
csel/branches but that will come a bit later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
6409896ca7 pan/bi: Print source types unconditionally
We track them all now, let's use them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
20c7d57ede pan/bi: Specify comparison op for BI_CMP
...and adjust printing so we can use it as an op name.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
08ab7cecd9 pan/bi: Lower b2f to bcsel
Since we can get a zero for free and a one inlined into the constant,
the obvious turns out to be efficient (while allowing flexibility for
boolean size).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
d3823551b4 pan/bi: Implement nir_op_bcsel
No condition fusing yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
3a1baafede pan/bi: Import algebraic pass from midgard
We'll need some of these at least.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
55f0d811e4 pan/bi: Add isub op
Can't be a regular ADD since there's no negate modifier for integers
(it's a different opcode entirely).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
acab788578 pan/bi: Disable lower_sub
For float, fixing up the modifier ourselves is easy. For int, we have a
dedicated isub instruction anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
1216a63ff2 pan/bi: Implement fabs, fneg as fmov with mods
Fusing will come later with the appropriate NIR support.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
8ed79c9ed7 pan/bi: Handle special ops in NIR->BIR
Only on supported GPUs at the moment; for older Bifrost that don't
support these, I'm not sure yet where the right place to do the lowering
is. NIR algebraic rules would be "nice" but probably impractical -- but
it wouldn't be hard to do it directly in BIR (as a lowering pass or
alternative implementation).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
b674e39d72 pan/bi: Add BI_SPECIAL_* enum
To disambiguate the different special ops from each other.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
c862234ab3 pan/bi: Add a bunch of ALU ops
These are all regular ALU ops found in GLES2 which makes them
particularly nice targets at the moment. Just translate straight to our
IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
5a5896cd76 pan/bi: Implement fsat as mov.sat
Soon we'll have a NIR support to handle this the Right Way along with
pos and sat_signed support, but we'll always need the fallback anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
48e50efd5d pan/bi: Allow inlining constants
This will allow us to optimize out the constant moves (although that
will require a DCE pass which has yet to be written).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
929baf3f88 pan/bi: Add initial handling of ALU ops
We do the bare minimum translation, just enough for fmov/fadd/fmul right
now with no modifiers / inlined constants / etc. The rest is to come!
But hopefully I got bitsize handling right this time around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
330e9a6696 pan/bi: Lower vec* to writemasks in NIR
I was hoping not to tread down this path but it seems inevitable now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
69c66ffd84 pan/bi: Remove bi_load
This is now made redundant with writemasks, so let's regularize the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
e9d480ca1b pan/bi: Introduce writemasks
I feel so dirty. But this will let the IR be a lot more flexible seeing
as we really are vector in a certain sense (I/O, small types)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
795646d8f8 pan/bi: Generalize swizzles to avoid extracts
We'd really rather not emit extracts. We are approaching on a vector IR
anyway which is annoying but really necessary to handle I/O and fp16
correctly. So let's just go all the way and deal with swizzles and masks
within reason; it'll still be somewhat saner in the long-term.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
9b8cb9f5ae panfrost: Move mir_to_bytemask to common code
...also so we can start sharing code properly between the panfrost
compilers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Rob Clark
ba03e308b6 freedreno/fdperf: set locale
Set local to get numbers printed w/ commas.. much easier to read that
way.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
2020-03-10 16:52:02 +00:00
Rob Clark
30dd059925 freedreno/computerator: add performance counter support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
2020-03-10 16:52:02 +00:00
Jason Ekstrand
af68b0d346 vulkan/wsi: Return an error if dup() fails
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
2020-03-10 16:39:27 +00:00
Jason Ekstrand
34d2637fa7 vulkan/wsi: Don't leak the FD when GetImageDrmFormatModifierProperties fails
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
2020-03-10 16:39:27 +00:00
Rob Clark
3c96e25de7 freedreno/ir3: try to avoid syncs
Update postsched to be better aware of where costly (ss) syncs would
result.  Sometimes it is better to allow a nop or two, to avoid a
sync quickly after an SFU.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
cc82521de4 freedreno/ir3: round-robin RA
In the second (scalar pass) use the information about # of registers
used in the first pass as the target max, and round-robin within that
range.  This generally gives the post-RA sched pass more opportunities
to re-order instructions to remove nop's.

Also, we can be a bit clever when assigning dest registers for SFU
instructions, by picking the register used for it's src (if available
and already assigned).  This avoids some (ss) syncs caused by write
after read hazards.  (Ie. the SFU instruction will read it's own src
before writing dest.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b2b349096f freedreno/ir3: track register usage in first RA pass
We'll use the feedback from the first pass to select a target register
usage in the second pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
9ae93be8fb freedreno/ir3: fix has_latency_to_hide
Also count tex-prefetch instructions.  And only let the no-latency rule
kick in for frag shaders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b6eb11295a freedreno/ir3: split out has_latency_to_hide()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
dd2e050a84 util/ra: move NO_REG to header
In the select_reg callback, I want to be able to determine if a given
node is already assigned, and if so what physical register has been
assigned.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
36aed70b59 util/ra: spiff out select_reg_callback
Add a parameter so the callback can know which node it is selecting a
register for.  And remove the graph parameter, as it is unused by
existing users, and somewhat unnecessary (ie. the callback data could
be used instead).

And add a comment so $future_me remembers how this works.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b3efa2a4da freedreno: fix FD_MESA_DEBUG=inorder
Fixes: 2c07e03b79 ("freedreno: allow ctx->batch to be NULL")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
752b9985be freedreno/ir3: add simplified stall estimation
Doesn't take into account stalls that result from a register written in
a different block, etc.  But this should be more useful than just using
number of (ss)'s by trying to estimate how costly a given sync is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
64ae2ef8bb freedreno/ir3: remove extra nops inserted in scheduler
They were inserting a nop between back to back SFU instrucions.  But
that doesn't actually appear to be required.  And they get stripped out
later anyways before legalize.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
ad2ff7a278 freedreno/computerator: add hrsq/hlog2/hexp2
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
4a8e4c18d2 freedreno/ir3: also lower lowp frag outputs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
3535797e8c nir/print: show variable precision
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Danylo Piliaiev
10eee6d8c6 intel/tools: Fix compilation with UBSan
Compilation failed with several similar errors:

../src/intel/tools/aub_read.c:322:4: error: case label does not reduce to an integer constant
  322 |    case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_HEADER):

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4132>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4132>
2020-03-10 15:20:26 +00:00
Mathias Fröhlich
74be835a84 i965: Use gl_vertex_format in brw_vertex_element.
State upload needs to cope with the vertex format
rather than with the full attribute data.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e62b82a693 i965: Make use of the vertex format functions in i965.
v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
cf929823bf mesa: Provide gl_vertex_format accessors.
Provide the same set of VAO and current value gl_vertex_format
accessor functions like we have for the gl_array_attributes.
For most purpose the vertex format is what we need.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
1641c872ed mesa: Remove now unused _mesa_draw_attrib.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
305724dd7b mesa: Remove now unused _mesa_draw_attrib_and_binding.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
4ccda7bfd9 i965: Remove glbinding from brw_vertex_element.
v2: Rebase.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
38db4f1720 i965: Reorder workaround flags computation.
Vertex processing workaround flags can be split into
array and current vertex attributes. By that we
can use specific access functions for these different
vertex attribute kinds. This finally obsoletes
some access functions that I introduced last winter
for a smooth transition.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e53fd073be i965: Split merge_inputs and clear_buffers.
The merge_inputs function handles that part that changes when the
inputs change. The clear_buffers function triggers when we may need
a new upload. Thus the merge_inputs can be limited to be once
per brw_draw_prims.

v2: Move declaration of attribute index into the for scope.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
de579ffba2 i965: Test original vertex array pointer to skip array upload.
Rather than do a NULL pointer check on a pointer that may be offset by the
min-max index range of an GL draw operation, execute the NULL test on the
original vertex array pointer.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
b684030c3a i965: Use the VAOs binding information in array setup.
The change basically reimplements array setup by walking
the gl_contex::Array._DrawVAO on a per binding sequence.
In this way we can make direct use of the application
provided minimum set of buffer objects and emit fewer relocs.

v2: Rebase onto:
    compiler: Move double_inputs to gl_program::DualSlotInputs
v3: Rebase onto introduction of gl_vertex_format
v4: Reorder and extend patch series.
v5: Split out two hunks into seperate patches.
v6: Avoid using GL* types.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e1f2c84282 i965: Use 32 bit u_bit_scan for vertex attribute setup.
The vertex array object contains 32 vertex arrays. By that we cannot
reference more then these in the vertex shader inputs. So, we can use
the 32 bits u_bit_scan function to iterate the vertex shader inputs
and place an assert that only these are present. Also place an other
assert that the vertex array setup in i965 does not overrun the
enabled array in brw_context:🆚:enabled.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
0ea3ca3eca iris: Move down iris_emit_sbe_swiz in profiles.
Harvest the information gathered in the previous patch
inside of iris.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:36 +00:00
Mathias Fröhlich
630154e77b i965: Move down genX_upload_sbe in profiles.
Avoid looping over all VARYING_SLOT_MAX urb_setup array
entries from genX_upload_sbe. Prepare an array indirection
to the active entries of urb_setup already in the compile
step. On upload only walk the active arrays.

v2: Use uint8_t to store the attribute numbers.
v3: Change loop to build up the array indirection.
v4: Rebase.
v5: Style fix.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:36 +00:00
Boris Brezillon
b1a6a15aaf panfrost: Get rid of ctx->payloads[]
Now that vertex/tiler payloads are re-initialized at draw/launch_grid
time we can get of of the ctx->payloads[] field and allocate those
payload templates on the stack.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
093da77ce6 panfrost: Use ctx->active_prim in panfrost_writes_point_size()
Check ctx->active_prim instead of prefix.draw_mode so we can eventually
get rid of ctx->payloads.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
d66ef690d1 panfrost: Re-init the VT payloads at draw/launch_grid() time
Doing that should help us avoiding state leaks between draw/launch_grid
calls.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
836686daf3 panfrost: Move panfrost_emit_varying_descriptor() to pan_cmdstream.c
Move panfrost_emit_varying_descriptor() to pan_cmdstream.c where other
emit functions live and adjust the prototype to be consistent with other
emit helpers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
b95530bef2 panfrost: Move panfrost_emit_vertex_data() to pan_cmdstream.c
Move panfrost_emit_vertex_data() to pan_cmdstream.c where other emit
functions live, and adjust the prototype for consistency.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
251e685e72 panfrost: Inline panfrost_queue_draw() and panfrost_emit_for_draw()
Now that panfrost_queue_draw() and panfrost_emit_for_draw() are
small enough, we can move the code to panfrost_draw_vbo() and have all
vt and emit calls grouped in one place.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
5d9995e82c panfrost: Move vertex/tiler payload initialization out of panfrost_draw_vbo()
Add a panfrost_vt_set_draw_info() function taking care of the draw
related initialization of the vertex and tiler payloads.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
13881a4dad panfrost: Move streamout offset update out of panfrost_draw_vbo()
That's part of out attempt to shrink panfrost_draw_vbo().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
046c154585 panfrost: Rename panfrost_stage_attributes()
panfrost_stage_attributes() is emitting mali_attr_meta descriptors, so
let's rename it accordingly and move it to pan_cmdstream.c.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
dcc0b1ff01 panfrost: Move the mali_attr.src_offset adjustment to a sub-function
Create a panfrost_vertex_state_upd_attr_offs() helper to adjust
the attr_meta src_offsets.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
575f62ea02 panfrost: Emit attribute descriptors after patching the templates
Patching attribute desc when they are in cacheable memory should be
more efficient.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
4a2ee61a22 panfrost: Prepare attribute for builtins at state creation time
The attribute meta slots reserved for gl_VertexID and gl_InstanceID
can be pre-filled at state creation time. Only the index needs to be
adjusted when attributes are generated.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
b692ab076a panfrost: Ignore BO start addr when adjusting src_offset
BOs are guaranteed to be aligned on 4K which inherently guarantees the
64 byte alignment.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
128820b886 panfrost: Drop initial mali_attr_meta.src_offset assignment
The mali_attr_meta.src_offset is initialized to
pipe_vertex_element.src_offset at vertex element creation time, but
this field is then adjusted when the descrptors are emitted. Let's
use the pipe_vertex_element data we saved earlier and drop this initial
assignment.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
528384cb6d panfrost: Add an helper to emit a pair of vertex/tiler jobs
Add the panfrost_emit_vertex_tiler_jobs() helper and use it in
panfrost_queue_draw().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
8e0a08bc8e panfrost: Move sampler/tex descs emission helpers to pan_cmdstream.c
Move panfrost_upload_texture_descriptors() and
panfrost_upload_sampler_descriptors() to pan_cmdstream.c where other
cmdstream related helpers live. While at it, change their prototype
and name to make it consistent with the other helpers and prepare
things for ctx->payloads[] removal.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
2b946a1d2b panfrost: Add a panfrost_sampler_desc_init() helper
It just makes sense to group all HW descriptor initilization logic in
pan_cmdstream.c, so let's move this code out of
panfrost_create_sampler_state().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
b02f97c875 panfrost: Prepare shader_meta descriptors at emission time
This way we avoid potential state leaks and keep the shader_meta
initialization in once place. The time spent preparing the shader
descriptors should be negligible compared to the time spent pushing
those descriptors to the transient buffer (remember we are writing to
non-cacheable memory here).

Note that we might get back to some sort of shader_meta descriptor
caching at some point if that proves necessary, but now we have those
panfrost_frag_meta_xxx_update() helpers now where xxx maps directly to
a CSO bind, which should ease desc template updates.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
55e014336f panfrost: Prepare things to get rid of panfrost_shader_state.tripipe
panfrost_shader_state.tripipe is used as a template for shader_meta
desc emission, but shader_meta desc preparation time should be negligible
compared to desc emission time (remember we are writing to non-cacheable
memory here). Let's prepare for generating the the shader_meta desc
entirely at draw time by adding the necessary fields to
panfrost_shader_state.

Note that we might brink back some sort of shader_meta desc caching at
some point, but let's simplify things a bit for now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
e94076f8f5 panfrost: Add an helper to update the rasterizer part of a tiler job desc
That's part of our attempt to make panfrost_emit_for_draw() a bit more
dry and eventually get rid of it by inlining the code in
panfrost_draw_vbo(). This is just one step in this direction.

Note that we get rid of the panfrost_rasterizer.tiler_gl_enables field
along the way, as setting/clearing those bits at draw time instead of
doing when the state is created should make a huge difference. We might
get back to pre-computed VT descs at some point, but let's keep things
simple for now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
56aeb921e9 panfrost: Add an helper to update the occclusion query part of a tiler job desc
That's part of our attempt to make panfrost_emit_for_draw() a bit more
dry and eventually get rid of it by inlining the code in
panfrost_draw_vbo(). This is just one step in this direction.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
5f043cc776 panfrost: Simplify panfrost_emit_for_draw() and make it private
Now that panfrost_launch_grid() no longer calls panfrost_emit_for_draw(),
we can keep it private to pan_context.c and drop all compute-related
stuff.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
8ac17139b1 panfrost: Stop using panfrost_emit_for_draw() for compute jobs
We actually need a small subset of what's done in
panfrost_emit_for_draw() when emitting compute jobs, so let's copy
what we need directly in panfrost_launch_grid() instead of re-using
this function whose initial purpose was to generate vertex/tiler jobs
for draw operations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
0d75eb002e panfrost: Move panfrost_attach_vt_framebuffer() to pan_cmdstream.c
Move panfrost_attach_vt_framebuffer() to pan_cmdstream.c and change its
name to panfrost_vt_attach_framebuffer() so we can use a consistent
prefix (panfrost_vt_) for all helpers initializing/updating
midgard_payload_vertex_tiler fields.

Note that the function only initializes one VT object now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:34 +01:00
Boris Brezillon
5d33d42b4d panfrost: Dissociate shader meta patching from the desc emission
Right now we emit two shader descriptors for the fragment shader, one
when panfrost_patch_shader_state() is called, and the final one
including both the shader_meta and the blend RT descriptors.
The first generated fragment shader descriptor is never used, since the
second one overrides the postfix.shader pointer.

Let's dissociate the state patching logic from the descriptor emission
so we don't upload descriptors that are never used.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
36725be4d9 panfrost: Move shared mem desc emission out of panfrost_launch_grid()
Let's move the shared memory descriptor emission to a dedicated function
living with its pairs in pan_cmdstream.c.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
0b735a2d80 panfrost: Move the const buf emission logic out of panfrost_emit_for_draw()
Let's move the constant buffer emission logic in a dedicated helper
to make panfrost_emit_for_draw() a bit more dry.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
a72bab1c3e panfrost: Move viewport desc emission out of panfrost_emit_for_draw()
Let's move the viewport descriptor emission logic to a dedicated helper
in order to shrink a bit the panfrost_emit_for_draw().

Note that this helper is placed in a new pan_cmdstream.c file where we
will group all cmdstream related helpers (everything that's related to
HW descriptor initialization emission).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
79f8850527 panfrost: Move the batch stack size adjustment out of panfrost_queue_draw()
That's part of our attempt to sanitize panfrost_queue_draw(),
panfrost_draw_vbo() and panfrost_emit_for_draw(). The new
panfrost_batch_adjust_stack_size() helper is placed in pan_job.c, where
all batch related functions live.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
b28f4bb67c panfrost: Add an helper to retrieve the currently active shader state
Doing that improves readability and helps avoiding code duplication.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Boris Brezillon
a0402f7960 panfrost: Assign primitive_size.pointer only if writes_point_size() returns true
Checking vs->writes_point_size is not enough, as we might have a vertex
shader writing point size, but a primitive that's not MALI_POINT. That
currently works because emit_varying_descriptor() is called before the
primitive_size.constant field is update, but let's make the logic more
robust, just in case things are re-ordered at some point.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
2020-03-10 12:47:33 +01:00
Samuel Pitoiset
24db276d11 radv/sqtt: describe pipeline and wait events barriers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
c04e9befc0 radv/rgp: bump the instrumentation spec version to 1
RGP expects the version to be 1, otherwise it doesn't display the
barriers (including layout transitions) correctly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
ac0d5b6b11 radv/sqtt: describe render pass color/depthstencil clears
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
b829fbb7f0 radv/sqtt: describe draw/dispatch and emit event markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 10:05:40 +01:00
Samuel Pitoiset
dcfc08f5b8 radv/sqtt: describe begin/end command buffers with user markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:58:02 +01:00
Samuel Pitoiset
31ecf0b17d radv: initial implementation of the driver internal layer SQTT
This layer is used to emit SQTT user markers to command buffers. It
currently only emits API markers but it will consolidated soon with
barrier markers and more.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:59 +01:00
Samuel Pitoiset
be700775dc radv/sqtt: add a helper that emits thread trace userdata markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:56 +01:00
Samuel Pitoiset
f4fbcfe818 radv: use device entrypoints from the SQTT layer if enabled
This allows to override RADV device entrypoints if the prefix
is 'sqtt' instead of 'radv'.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:53 +01:00
Samuel Pitoiset
9c88e4a272 radv/entrypoints: declare a driver internal layer for SQTT
Some Vulkan commands will be overriden to emit user SQTT markers.
These markers are then used by the Radeon GPU Profiler to display
timings, barrier operations (cache flushes, pipeline stalls, layout
transitions) and more.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4031>
2020-03-10 09:57:49 +01:00
Boris Brezillon
a64599a303 panfrost: Pass the sampler view format when creating a tex descriptor
A sampler can use a different format than the native texture format.
Let's pass the sampler format instead of the native texture format when
creating a texture descriptor.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4101>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4101>
2020-03-10 08:43:08 +01:00
Boris Brezillon
ce845f44e9 Revert "panfrost: Z24 variants should be sampled as R32UI"
Commit 0406ea4856 ("panfrost: Z24 variants should be sampled as
R32UI") causes a regression when depth textures are sampled.

It's still not clear how MALI_Z32 can work for for Z32 and Z24{S,X}8,
but let's leave that question for later.

Reported-by: Icecream95 <ixn@keemail.me>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4101>
2020-03-10 08:42:05 +01:00
Tomeu Vizoso
8d0ec5b8a6 gallium: Add forgotten docs for new CAPs related to transform feedback
These three caps were missing docs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4115>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4115>
2020-03-10 07:26:13 +01:00
Vasily Khoruzhick
251c6991a3 lima: enable minmax cache for index buffers
Re-use minmax cache for index buffers from panfrost.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4051>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4051>
2020-03-10 02:41:27 +00:00
Vasily Khoruzhick
53d6bb9fc6 panfrost: split index cache into shared part
Split it into shared part since we're going to re-use it in lima.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4051>
2020-03-10 02:41:27 +00:00
Marek Olšák
040a7117c3 st/mesa: fix a possible crash with selection and feedback modes
The index bounds are always valid without an index buffer, but they won't be.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3986>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3986>
2020-03-09 21:26:55 -04:00
Marek Olšák
7b0e043d48 st/mesa: flush the bitmap cache before st/dri and vbo flushes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3986>
2020-03-09 21:26:55 -04:00
Francisco Jerez
45d4665dc7 intel/fs: Fix workaround for VxH indirect addressing bug under control flow.
The current workaround for this hardware bug involved marking the ADD
instruction used to initialize the address register as NoMask on
Gen12, which was based on the assumption that the problem was caused
by a hardware bug affecting the application of the execution mask to
the address register write.

However that doesn't seem to be the case: The address register write
was working correctly, the real problem leading to hangs on TGL is
that the indirect addressing logic is unable to deal with garbage
values in the address register (e.g. misaligned offsets), even for
channels which are currently inactive due to non-uniform control flow.
The current workaround isn't able to avoid that situation in general,
since the result of the NoMask ADD instruction for a dead channel is
calculated based on the corresponding (dead) component of the
indirect_byte_offset source, which would still be undefined in the
likely case that the source was initialized under control flow itself.

This would lead to hangs whenever MOV_INDIRECT was used under
non-uniform control flow in some scenarios like a tessellation shader
from GFXBench5/gl_4 (AKA Car Chase) on TGL.  In addition I've managed
to reproduce the same issue on earlier platforms by initializing the
whole address register with garbage before the ADD instruction, so
this seems to be a long-standing issue we have avoided mostly by luck.

This patch fixes the problem and applies the workaround to all
platforms, since even when the hardware is able to deal with garbage
address values without hanging there might be a significant
performance cost from reading random GRF registers due to the useless
extra EU cycles spent fetching registers for dead channels and due to
the potential for unintended serialization with respect to other
random instructions that could be executed in parallel, which may have
had a cost of the order of hundreds of cycles in the worst case
scenario.

Fixes: f93dfb509c "intel/fs: Write the address register with NoMask for MOV_INDIRECT"
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2020-03-10 00:42:50 +00:00
Ian Romanick
c144875f62 intel/fs: Allow NOT instructions in conditional discard optimization
I don't know why I explicitly disallowed NOT in the first place. :(

All Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 14549846 -> 14549770 (<.01%)
instructions in affected programs: 12934 -> 12858 (-0.59%)
helped: 76
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.13% max: 5.56% x̄: 1.04% x̃: 0.90%
95% mean confidence interval for instructions value: -1.00 -1.00
95% mean confidence interval for instructions %-change: -1.25% -0.84%
Instructions are helped.

total cycles in shared programs: 203793967 -> 203792696 (<.01%)
cycles in affected programs: 77920 -> 76649 (-1.63%)
helped: 67
HURT: 1
helped stats (abs) min: 2 max: 36 x̄: 19.00 x̃: 16
helped stats (rel) min: 0.04% max: 4.68% x̄: 2.35% x̃: 2.28%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.03% max: 0.03% x̄: 0.03% x̃: 0.03%
95% mean confidence interval for cycles value: -20.75 -16.63
95% mean confidence interval for cycles %-change: -2.57% -2.05%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3965>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3965>
2020-03-09 16:46:28 -07:00
Ian Romanick
ba2fa1ceaf intel/fs: Do cmod prop again after scheduling
Pre-RA scheduling can create more opportunities for CMOD propagation.
This takes advantage of that.

It may be worth doing this again in post-RA scheduling, but there are
additional problems there.

I'm a little torn about the use of the OPT() macro.  On the one hand, it
would be confusing to see dumps from INTEL_DEBUG=optimizer that don't
match the final output.  On the other hand, since register allocation
can fail, the same pass can be run multiple times.  Each time one or
both passes might or might not make progress.  This would also lead to
incongruous, confusing output.

Ice Lake
total instructions in shared programs: 14549808 -> 14548529 (<.01%)
instructions in affected programs: 231985 -> 230706 (-0.55%)
helped: 632
HURT: 0
helped stats (abs) min: 1 max: 32 x̄: 2.02 x̃: 1
helped stats (rel) min: 0.05% max: 2.56% x̄: 0.57% x̃: 0.41%
95% mean confidence interval for instructions value: -2.25 -1.79
95% mean confidence interval for instructions %-change: -0.61% -0.54%
Instructions are helped.

total cycles in shared programs: 203770850 -> 203776599 (<.01%)
cycles in affected programs: 2495653 -> 2501402 (0.23%)
helped: 282
HURT: 197
helped stats (abs) min: 1 max: 242 x̄: 20.37 x̃: 16
helped stats (rel) min: <.01% max: 11.65% x̄: 0.91% x̃: 0.64%
HURT stats (abs)   min: 2 max: 609 x̄: 58.35 x̃: 20
HURT stats (rel)   min: <.01% max: 10.97% x̄: 1.35% x̃: 0.66%
95% mean confidence interval for cycles value: 5.27 18.73
95% mean confidence interval for cycles %-change: -0.16% 0.21%
Inconclusive result (%-change mean confidence interval includes 0).

LOST:   0
GAINED: 2

Skylake
total instructions in shared programs: 13447708 -> 13446594 (<.01%)
instructions in affected programs: 216813 -> 215699 (-0.51%)
helped: 623
HURT: 0
helped stats (abs) min: 1 max: 32 x̄: 1.79 x̃: 1
helped stats (rel) min: 0.06% max: 2.86% x̄: 0.59% x̃: 0.42%
95% mean confidence interval for instructions value: -1.99 -1.59
95% mean confidence interval for instructions %-change: -0.63% -0.55%
Instructions are helped.

total cycles in shared programs: 193759224 -> 193762726 (<.01%)
cycles in affected programs: 2540035 -> 2543537 (0.14%)
helped: 249
HURT: 190
helped stats (abs) min: 2 max: 196 x̄: 16.67 x̃: 14
helped stats (rel) min: <.01% max: 4.71% x̄: 0.66% x̃: 0.62%
HURT stats (abs)   min: 2 max: 614 x̄: 40.27 x̃: 14
HURT stats (rel)   min: 0.02% max: 5.78% x̄: 0.86% x̃: 0.37%
95% mean confidence interval for cycles value: 2.57 13.39
95% mean confidence interval for cycles %-change: -0.11% 0.11%
Inconclusive result (%-change mean confidence interval includes 0).

LOST:   0
GAINED: 1

Broadwell
total instructions in shared programs: 13418631 -> 13417393 (<.01%)
instructions in affected programs: 243192 -> 241954 (-0.51%)
helped: 694
HURT: 0
helped stats (abs) min: 1 max: 31 x̄: 1.78 x̃: 1
helped stats (rel) min: 0.06% max: 2.86% x̄: 0.59% x̃: 0.44%
95% mean confidence interval for instructions value: -1.95 -1.62
95% mean confidence interval for instructions %-change: -0.62% -0.55%
Instructions are helped.

total cycles in shared programs: 200822940 -> 200829128 (<.01%)
cycles in affected programs: 2128651 -> 2134839 (0.29%)
helped: 251
HURT: 226
helped stats (abs) min: 1 max: 200 x̄: 14.32 x̃: 12
helped stats (rel) min: <.01% max: 3.56% x̄: 0.60% x̃: 0.50%
HURT stats (abs)   min: 2 max: 611 x̄: 43.28 x̃: 18
HURT stats (rel)   min: 0.02% max: 7.03% x̄: 0.93% x̃: 0.54%
95% mean confidence interval for cycles value: 7.44 18.50
95% mean confidence interval for cycles %-change: 0.02% 0.23%
Cycles are HURT.

Haswell and Ivy Bridge had similar results. (Haswell shown)
total instructions in shared programs: 11569710 -> 11568829 (<.01%)
instructions in affected programs: 147862 -> 146981 (-0.60%)
helped: 487
HURT: 0
helped stats (abs) min: 1 max: 34 x̄: 1.81 x̃: 1
helped stats (rel) min: 0.12% max: 4.75% x̄: 0.57% x̃: 0.45%
95% mean confidence interval for instructions value: -2.03 -1.59
95% mean confidence interval for instructions %-change: -0.61% -0.54%
Instructions are helped.

total cycles in shared programs: 187079425 -> 187079437 (<.01%)
cycles in affected programs: 1088494 -> 1088506 (<.01%)
helped: 234
HURT: 124
helped stats (abs) min: 2 max: 282 x̄: 22.66 x̃: 16
helped stats (rel) min: 0.03% max: 7.88% x̄: 0.93% x̃: 0.75%
HURT stats (abs)   min: 1 max: 276 x̄: 42.86 x̃: 20
HURT stats (rel)   min: 0.03% max: 6.70% x̄: 0.99% x̃: 0.53%
95% mean confidence interval for cycles value: -5.54 5.61
95% mean confidence interval for cycles %-change: -0.41% -0.11%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 7746 -> 7740 (-0.08%)
spills in affected programs: 6 -> 0
helped: 1
HURT: 0

total fills in shared programs: 6264 -> 6258 (-0.10%)
fills in affected programs: 6 -> 0
helped: 1
HURT: 0

Sandy Bridge
total instructions in shared programs: 10688576 -> 10688177 (<.01%)
instructions in affected programs: 137875 -> 137476 (-0.29%)
helped: 358
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 1.11 x̃: 1
helped stats (rel) min: 0.15% max: 1.43% x̄: 0.35% x̃: 0.28%
95% mean confidence interval for instructions value: -1.18 -1.05
95% mean confidence interval for instructions %-change: -0.37% -0.32%
Instructions are helped.

total cycles in shared programs: 153397144 -> 153393046 (<.01%)
cycles in affected programs: 1220713 -> 1216615 (-0.34%)
helped: 255
HURT: 31
helped stats (abs) min: 1 max: 304 x̄: 16.71 x̃: 16
helped stats (rel) min: <.01% max: 6.70% x̄: 0.41% x̃: 0.31%
HURT stats (abs)   min: 1 max: 41 x̄: 5.29 x̃: 3
HURT stats (rel)   min: 0.02% max: 0.65% x̄: 0.16% x̃: 0.11%
95% mean confidence interval for cycles value: -17.44 -11.22
95% mean confidence interval for cycles %-change: -0.40% -0.29%
Cycles are helped.

Iron Lake
total instructions in shared programs: 8106894 -> 8105529 (-0.02%)
instructions in affected programs: 287197 -> 285832 (-0.48%)
helped: 1099
HURT: 0
helped stats (abs) min: 1 max: 10 x̄: 1.24 x̃: 1
helped stats (rel) min: 0.16% max: 4.55% x̄: 0.67% x̃: 0.61%
95% mean confidence interval for instructions value: -1.29 -1.19
95% mean confidence interval for instructions %-change: -0.70% -0.64%
Instructions are helped.

total cycles in shared programs: 188347022 -> 188344266 (<.01%)
cycles in affected programs: 3740632 -> 3737876 (-0.07%)
helped: 758
HURT: 10
helped stats (abs) min: 2 max: 38 x̄: 3.68 x̃: 2
helped stats (rel) min: <.01% max: 1.00% x̄: 0.12% x̃: 0.08%
HURT stats (abs)   min: 2 max: 4 x̄: 3.20 x̃: 4
HURT stats (rel)   min: 0.03% max: 0.07% x̄: 0.06% x̃: 0.07%
95% mean confidence interval for cycles value: -3.82 -3.35
95% mean confidence interval for cycles %-change: -0.13% -0.11%
Cycles are helped.

GM45
total instructions in shared programs: 4985449 -> 4984768 (-0.01%)
instructions in affected programs: 145154 -> 144473 (-0.47%)
helped: 547
HURT: 0
helped stats (abs) min: 1 max: 10 x̄: 1.24 x̃: 1
helped stats (rel) min: 0.16% max: 2.86% x̄: 0.66% x̃: 0.61%
95% mean confidence interval for instructions value: -1.31 -1.18
95% mean confidence interval for instructions %-change: -0.69% -0.62%
Instructions are helped.

total cycles in shared programs: 128835062 -> 128833144 (<.01%)
cycles in affected programs: 2720650 -> 2718732 (-0.07%)
helped: 517
HURT: 1
helped stats (abs) min: 2 max: 38 x̄: 3.71 x̃: 2
helped stats (rel) min: <.01% max: 0.89% x̄: 0.11% x̃: 0.07%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.04% max: 0.04% x̄: 0.04% x̃: 0.04%
95% mean confidence interval for cycles value: -4.02 -3.39
95% mean confidence interval for cycles %-change: -0.12% -0.10%
Cycles are helped.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3965>
2020-03-09 16:46:19 -07:00
Eric Engestrom
461ee85248 docs: update calendar, add news item, and link releases notes for 19.3.5
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4121>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4121>
2020-03-09 23:04:36 +00:00
Eric Engestrom
b06471b77d docs: add release notes for 19.3.5
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4121>
2020-03-09 23:04:36 +00:00
Vinson Lee
5ffa6eab88 st/nine: Fix incompatible-pointer-types-discards-qualifiers errors.
../src/gallium/state_trackers/nine/nine_ff.c:129:28: error: initializing 'struct nine_ff_vs_key *' with an expression of type 'const void *' discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
    struct nine_ff_vs_key *vs = key;
                           ^    ~~~
../src/gallium/state_trackers/nine/nine_ff.c:145:28: error: initializing 'struct nine_ff_ps_key *' with an expression of type 'const void *' discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers]
    struct nine_ff_ps_key *ps = key;
                           ^    ~~~

Fixes: fdd96578ef ("nine: Add state tracker nine for Direct3D9 (v3)")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4015>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4015>
2020-03-09 15:37:54 -07:00
Marek Olšák
c1b8e84961 radeonsi: determine uses_bindless_samplers correctly
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:14 -04:00
Marek Olšák
fc65df5651 ac: add a bug workaround for the 100% NGG culling case
Fixes: 8db00a51f8 - radeonsi/gfx10: implement NGG culling for 4x wave32 subgroups
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:11 -04:00
Marek Olšák
7481c4be58 radeonsi: add a bug workaround for NGG - LATE_ALLOC_GS
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:10 -04:00
Sonny Jiang
5ea2034f58 radeonsi: enable EXT_texture_shadow_lod
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
2020-03-09 16:08:07 -04:00
Chia-I Wu
f3728816af egl/android: require ANDROID_native_fence_sync for buffer age
Querying buffer age requires a buffer to be dequeued.  But dequeuing
without ANDROID_native_fence_sync might imply eglClientWaitSync,
which results in a deadlock as the display lock is already held by
eglQuerySurface.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/221>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/221>
2020-03-09 18:27:11 +00:00
Edmondo Tommasina
c7976ed43a radv/sqtt: fix RADV_THREAD_TRACE_BUFFER_SIZE spelling
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4116>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4116>
2020-03-09 17:26:33 +00:00
Eric Engestrom
7bbd10da23 docs/releasing: add missing </li> tags
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4094>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4094>
2020-03-09 17:23:45 +00:00
Eric Engestrom
68d8606c4c docs: trivial fix for html structure
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4094>
2020-03-09 17:23:45 +00:00
Neil Roberts
83e20139db glsl/opt_minmax: Add support for float16
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
e3cc81e86c glsl/lower_instructions: Handle fp16 for FDIV_TO_MUL_RCP
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Hyunjun Ko
4fcac46cbd glsl/lower_instructions: Handle fp16 for MOD_TO_FLOOR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
6c1c2b779a glsl/lower_instructions: Use float16 constants when appropriate
When lowering instructions that involve floating-point constants, pick
the appropriate type for the constant so that it will also work with
float16 parameters.

v2: Use float16_t constructor instead of helper function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
2b39bb4fc0 glsl/validate: Allow float16 in the expression tree
v2. [Hyunjun Ko (zzoon@igalia.com)] squashed 3 commits
into one commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
198d4a535b glsl: Add type queries for fp16+float and fp16+float+double
Following the is_integer_32_64() convention, add is_float_16_32() and
float_16_32_64() for these commonly tested combinations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Hyunjun Ko
ad27eb28d9 glsl: Handle fp16 unary operations when lowering matrix operations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
1b8edffaa5 glsl: Add ir_unop_f2fmp
This is the same as ir_unop_f2f16 except that it comes with a promise
that it is safe to optimise it out if the result is immediately
converted back to float32 again. Normally this would be a lossy
operation but it is safe to do if the conversion was generated as part
of the precision lowering pass.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
5d6b007da8 glsl: Add b2f16 and f162b conversion operations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
6b9f6caf06 glsl: Add IR conversion ops for 16-bit float types
Adds ir_unop_f162f and ir_unop_f2f16.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
878a35db9d glsl: Expand fp16 to float before constant expression evaluation
This way the generated constant folding code doesn't need to
understand fp16.  All operations have to be expanded to full float for
evaulation on the CPU, so we might as well do it up front.  As far as
GLSL is concerned, fp16 isn't a separate type from float, so
everything we're supposed to support for float we need to do for fp16.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
505428f20b glsl: Implement constant propagation for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
83afebf359 glsl: Add fp16 case for ir_triop_lrp optimization
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Neil Roberts
668ab9f19d glsl: Add support for float16 types in the IR tree
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
4068d6baff glsl: Add ir_constant constructor for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Kristian H. Kristensen
b75a166e68 freedreno/ir3: Don't fold conversions into sign
Not supported.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:07 +00:00
Pierre-Eric Pelloux-Prayer
2a9d6fdd8c gitlab-ci: rules:changes to test on tested drivers changes
For now tests only use these drivers:
  * llvmpipe
  * softpipe
  * freedreno
  * lima
  * etnaviv
  * panfrost

So using rules:changes gitlab feature to run the tests when the changes
made are potentially affecting these drivers.

A few notes:
  * the following code:
      .piglit-test:
        extends:
          - .test-gl
          - .llvmpipe-rules
    makes gitlab replace .test-gl "rules:changes" values by the one from
    ".llvmpipe-rules".
  * rules:changes always matches for non-MR new branches so jobs will always be
    created (and they'll be run if their dependencies are run). For pushes to
    existing branches the files changed by the push are used to match the
    rules:changes path.
  * the same gitlab feature could be used for some build jobs

Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2569>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2569>
2020-03-09 16:31:55 +01:00
Daniel Schürmann
61fb17e8d7 amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
bdd7587414 radv: use nir_lower_discard_to_demote to work around game bugs
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
9d64ad2fe7 radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL is enabled
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
de57ea2a3d amd/llvm: implement nir_intrinsic_demote(_if) and nir_intrinsic_is_helper_invocation
The current implementation uses a temporary helper variable
to ensure correct behavior until LLVM provides an intrinsic.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
ce87da71e9 nir: add pass to lower discard() to demote()
This pass is intended to work around game bugs, only!
It also lowers nir_intrinsic_load_helper_invocation to
nir_intrinsic_is_helper_invocation for consistency.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Daniel Schürmann
5adcfa68a9 nir: gather info whether a shader uses demote_to_helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
2020-03-09 12:29:32 +00:00
Eli Schwartz
66bb314cb4 docs: fix typo in v20 release notes
It makes no sense to wait for it to stabilize on a version released
months previously in the previous major release cycle.

This was probably intended to be recommending the first bugfix release
of the current major.minor release cycle.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4106>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4106>
2020-03-09 12:09:09 +00:00
Eric Engestrom
4390c232ad Revert "docs/relnotes/19.3: fix vulkan version reported"
This reverts commit 5ff443b8aa

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4112>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4112>
2020-03-09 11:41:59 +00:00
Tapani Pälli
24408acca4 nir: fix compilation warning on glsl_get_internal_ifc_packing
Removes following warning:
   warning: 'const' type qualifier on return type has no effect

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4111>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4111>
2020-03-09 09:43:49 +00:00
Krzysztof Raszkowski
ad66b25415 gallium/swr: Fix vcvtph2ps llvm intrinsic compile error
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4090>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4090>
2020-03-09 09:21:00 +00:00
Pierre-Eric Pelloux-Prayer
33b255e107 meson: enable -fno-common by default
This flag is enabled by default starting with gcc 10.
All the compilation issues have been fixed, so use it by default
to make sure we're not introducing regressions.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
2020-03-09 09:11:07 +01:00
Pierre-Eric Pelloux-Prayer
283e815339 omx: fix build with gcc 10
bellagio/omx header files reference a global variable without the
extern keyworkd.
Now that gcc-10 enables the '-fno-common' by default the build fails.
Since these are external headers we can't easily fix them, so for
now build the omx module with the '-fcommon' flag to keep the
previous behavior.

See https://gitlab.freedesktop.org/mesa/mesa/issues/2385

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4058>
2020-03-09 09:11:00 +01:00
Matt Turner
e924181ea8 intel/compiler: Discount NOPs from instruction counts
Scheduler changes can cause changes in the number of instructions due to
this workaround, so just don't include NOPs in the instruction counts to
prevent shader-db noise.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
bb3e7b0fe3 intel/compiler: Pass shader_stats for each SIMD mode
Passing shader_stats to the fs_generator constructor means that the
SIMD8 shader stats from the visitor (such as the scheduler mode) will be
reported out for the SIMD16/SIMD32 versions as well.

As you can see, we are now passing 'shader_stats' and 'stats' to
generate_code(), which is obviously odd looking. Ian rebased and
committed an old patch of mine which added the shader_stats struct on
July 30 in commit dabb5d4bee (i965/fs: Add a shader_stats struct.) and
shortly after on August 12 Jason added the brw_compile_stats struct in
commit 134607760a (intel/compiler: Fill a compiler statistics struct).

I'd like to combine the two, but I'm not sure how. shader_stats is an
input to generate_code() while brw_compile_stats is an output and is
only used by the Vulkan driver. Leave it as is for now...

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
e7d0460d58 intel/compiler: Pass backend_shader * to cfg_t()
As you can see, not having a pointer to the backend_shader from within
the class makes for some weird looking code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
edae75037f intel/compiler: Mark visitor parameters to scheduler const
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:12 +00:00
Matt Turner
75a33e268e intel/compiler: Mark some methods and parameters const
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Matt Turner
03ac90aae5 intel/compiler: Make instructions_to_schedule a local variable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Matt Turner
43019c6f2c intel/compiler: Remove unnecessary local variables
These are already provided in the fs_reg_alloc class.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Matt Turner
3d0821a216 intel/vec4: Make implied_mrf_writes() a vec4_instruction method
Same as commit c20dc9b836 (intel/fs: Make implied_mrf_writes() an
fs_inst method.)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
2020-03-09 04:44:11 +00:00
Christian Gmeiner
d8f3d0a3a8 etnaviv: implement emit_string_marker
Writes string to cmdstream in payload of a nop command.
Could be useful for internal driver debugging too.

Here is how it looks decoded:

    0x18000000, /* NOP (3) OP=NOP */
    0x65736572, /*   rese */
    0x18000000, /* NOP (3) OP=NOP */
    0x00000074, /*   t */
    0x00000000, /*   GL.API_MODE := OPENGL */

or

    0x00000705, /*   GL.STALL_TOKEN := FROM=RA,TO=PE,FLIP0=0,FLIP1=0 */
    0x00000001, /*   TS.FLUSH_CACHE := FLUSH=1 */
    0x18000000, /* NOP (3) OP=NOP */
    0x616e7465, /*   etna */
    0x18000000, /* NOP (3) OP=NOP */
    0x6275735f, /*   _sub */
    0x18000000, /* NOP (3) OP=NOP */
    0x5f74696d, /*   mit_ */
    0x18000000, /* NOP (3) OP=NOP */
    0x735f7372, /*   rs_s */
    0x18000000, /* NOP (3) OP=NOP */
    0x65746174, /*   tate */
    0x00004606, /*   RS.CONFIG := SOURCE_FORMAT=A8R8G8B8

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3744>
2020-03-08 13:29:56 +00:00
Christian Gmeiner
4460628330 etnaviv: increase number of supported varyings to 16
No deqp regressions.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
2020-03-08 11:08:59 +00:00
Christian Gmeiner
53c6cb1bad etnaviv: update headers from rnndb
Update to etna_viv commit fd2e2cfd.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
2020-03-08 11:08:59 +00:00
Christian Gmeiner
84816c22e4 etnaviv: ask kernel for max number of supported varyings
The inital etnaviv kernel driver in 4.5 has support for this param.
See kernel commit 602eb48966d7b7f7e64dca8d9ea2842d83bfae73

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3827>
2020-03-08 11:08:59 +00:00
Michel Dänzer
0103f02acb gitlab-ci: Always name artifacts archive after the job producing it
This will help determine which artifacts generate how much traffic.

v2:
* Add "mesa_" prefix to make it obvious which project the artifacts are
  from.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4085>
2020-03-07 11:09:50 +01:00
Lionel Landwerlin
20c09c9c06 anv: stop storing prog param data into shader blobs
We have no use for this data in Anv.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason EKstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3517>
2020-03-07 05:51:45 +00:00
Jason Ekstrand
e03f965280 anv: Bounds-check pushed UBOs when robustBufferAccess = true
We also have to add nir_intrinsic_load_push_constant to the list of
intrinsics which use push constants in brw_nir_analyze_ubo_ranges
because we're moving the loop where we rewrite the intrinsics to after
we've analyzed UBO loads.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:29 +00:00
Jason Ekstrand
faea84e254 anv: Add an align_down_u32 helper
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:29 +00:00
Jason Ekstrand
61ac8cf083 anv: Align UBO sizes to 32B
This makes all of our bounds checking consistent with the block loads we
do for constant offset UBO accesses.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
4610d69e37 anv: Delete some pointless break statements
They immediately follow returns.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
28c243e9ec anv: Pass buffer addresses into emit_push_constant*
While we're here, we add an assert that bind_map::push_ranges is tightly
packed.  If it isn't, it breaks assumptions in the emit_push_constant*
functions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
ff5de35127 anv: Mark max_push_range UNUSED and simplify the code
The compiler should be smart enough to figure out that it's unused on
Gen11 and earlier and delete the code which calculates.  Us adding an
`if (GEN_GEN >= 12)` check is unnecessary and just dirties the code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Jason Ekstrand
35ca2ad22e anv: Parse VkPhysicalDeviceFeatures2 in CreateDevice
The client may enable robustBufferAccess2 via either
pCreateInfo->pEnabledFeatures or via a chained-in
VkPhysicalDeviceFeatures2 struct.  We need to parse both.

Fixes: 022e5c7e5a "anv: Implement VK_KHR_get_physical_device_properties2"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3777>
2020-03-07 04:51:28 +00:00
Eric Engestrom
0e4c001951 docs/relnotes/20.0: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Eric Engestrom
5ff443b8aa docs/relnotes/19.3: fix vulkan version reported
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Eric Engestrom
2557d614d3 gen_release_notes: fix vulkan version reported
Fixes: 4ef3f7e3d3 ("anv: Enable Vulkan 1.2 support")
Fixes: 7f5462e349 ("radv: enable Vulkan 1.2")
Fixes: 75755e0eba ("turnip: Pretend to support Vulkan 1.2")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4092>
2020-03-07 00:57:15 +00:00
Alyssa Rosenzweig
de30a7ae6e pan/bi: Fix Android.mk
Files listed in Makefile.sources did not exist, this affects the android
build for other drivers as well.

[Patch by Tapani manually cherrypicked into this branch]

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
0b0be49005 pan/bi: Rename next-wait to simply 'wait'
next-wait is from a quirk of packing that the dependency indices are
"off by one"; we don't emulate this quirk in the IR since it's easy
enough to patch over in the disassembler. Let's not confuse anybody with
it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
b329f8c750 pan/bi: Add dummy scheduler
Do the absolute simplest possible thing -- create a clause for every
instruction, and just pick whichever slot we can, nopping the other,
copying whatever constant we have whether it's used or not.

To be clear - this is not to be used in a production compiler. But this
lets actual bundles and clauses show up in the BIR, which unblocks work
on final code generation and packing (which can happen more or less in
parallel to NIR->BIR, optimization, register allocation, and writing an
actual scheduling).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
51e537c9fa pan/bi: Implement load_const
In the laziest possible way...  We can just emit worst case moves which
DCE will eat for breakfast anyway, and inline constants on instructions
where that is supported directly. This approach eliminates a lot of
nasty corner cases that Midgard's crazy cache scheme has hit, at the
expense of slightly more work for DCE (but it's only a single iteration
of an O(N) pass that has to run anyway..)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
1ead0d3488 pan/bi: Add preliminary LOAD_UNIFORM implementation
Lots of things are missing (indirect access, UBOs) but we have this
stubbed out for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
48910e8388 pan/bi: Implement store_vary for vertex shaders
As far as I/O goes, these four should hold us over for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
d86659ca57 pan/bi: Add helpers for creating temporaries
Also from Midgard, adapted to our addressing scheme.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
59b476e11a pan/bi: Implement load_input for vertex shaders
Corresponds to a single LD_ATTR instruction, easy enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
dabb6c6b9f pan/bi: Implement store_output for fragment shaders
Corresponds to a BLEND instruction, possibly preceded by an ATEST
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
79c1af0623 pan/bi: Add bi_schedule_barrier helper
Copypaste from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
92a4f26e7f pan/bi: Add blend_location to IR for BI_BLEND
To specify which render target is being written.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
0767182665 pan/bi: Implement nir_intrsinic_load_interpolated_input
Enough for basic varying reads.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
806533ba7f pan/bi: Fix destination printing
It should get the same treatment as sources to handle SSA/reg/etc.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
65c8dcca3b pan/bi: Handle jumps (breaks, continues)
Loops should behave reasonably now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
987aea1400 pan/bi: Handle loops when ingesting CFG
Not very useful without also handling breaks and continues, of course.
We use the strategy from v3d (vir_to_nir) instead of Midgard's, since
the latter is mildly insane. I mean, it passes deqp but...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
9a00cf3d1e pan/bi: Add support for if-else blocks
Branch lowering code lifted from Midgard as usual.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
977a38c87f pan/bi: Call nir_lower_io_to_temporaries in cmdline
Normally mesa/st would do this for us, but we're using the standalone
compiler (in advance of having the hardware) and need this pass
particularly for fragment writeout.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
55dab92073 pan/bi: Add instruction emit/remove helpers
As we start descending into code generation these will be of interest.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
7fd22c3bbd pan/bi: Print branch target
...if it's present, anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
2e9b5f8ef4 pan/bi: Don't print types for unconditional branches
There's nothing to type!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
5c7ee8a974 pan/bi: Improve block printing
Skip predecessor printing if there are none and match a missing brace,
also fixup the spacing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
83c4562503 pan/bi: Walk through the NIR control flow graph
Copypaste from Midgard with some cleanups. That seems to be a trend
these days. Hopefully boilerplate will come to a close soon.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Alyssa Rosenzweig
0d29184f69 pan/bi: Lower and optimize NIR
Pretty much a copypaste from Midgard except where architectural
decisions diverge around vectorization. On that note, we will need our
own ALU scalarization pass at some point (or rather we'll need to extend
nir_lower_alu_scalar) to allow partial lowering for 8/16-bit ops. I.e.
we'll approximately need to lower

   vec4 16 ssa_2 = fadd ssa_0, ssa_1

to

   vec2 16 ssa_2 = fadd ssa_0.xy, ssa_1.xy
   vec2 16 ssa_3 = fadd ssa_0.zw, ssa_1.zw
   vec4 16 ssa_4 = vec4 ssa_2.x, ssa_2.y, ssa_3.x, ssa_4

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
2020-03-07 00:37:39 +00:00
Chad Versace
c652ff8caa anv: Flatten the logic add_aux_surface_if_supported (v3)
Reduces the function's max indentation level from 5 to 3 inside the big
'if' tree. And enables more comments to be attached to the condition
they describe.

v2:
  - Add missing DEBUG_NO_RBC check.
v3:
  - Return early on DISABLE_AUX_BIT.
  - Restore original order of gen7 hiz check.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Chad Versace
615c65ba1b anv: Refactor creation of aux surfaces (v2)
make_surface() contained a giant if-tree for creation of aux surfaces.
Move the if-tree into its own function, add_aux_surface_if_supported().
This will simplify future changes for VK_EXT_image_drm_format_modifier.

This patch merely moves the code verbatim, then extracts duplicate
assertions to the top.

v2: Rename func to add_aux_surface_if_supported [for jekstrand].

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Chad Versace
d1b7d80bc3 anv: Add anv_image_plane_needs_shadow_surface() (v2)
The function returns true if hardware limitations require the image
plane to use a shadow surface. It replaces equivalent code in
make_surface().

Refactor only. No intended change in behavior.

Why extract this code out of vkCreateImage? If an image requires
a shadow surface, then that may impact its support for DRM format
modifiers, which must be evaluated during
vkGetPhysicalDeviceImageFormatProperties2.

v2:
  - Use early return. [for jekstrand]
  - Unexport function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4096>
2020-03-06 23:40:41 +00:00
Timothy Arceri
1da6b7f8a3 glsl: add subroutine support to nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
b1bc24f826 glsl: dont try to assign uniform storage for uniform blocks
Fixes a crash in some shaders.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
576b5ace9e glsl: add support for builtins to the nir uniform linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
79127f8d5b glsl: set ShaderStorageBlocksWriteAccess in the nir linker
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
17f240b874 glsl: nir linker fix setting of ssbo top level array
This helps correcly set it for each top level member and correctly
handle unsized arrays.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
8ffd09f311 glsl: find the base offset for block members from unnamed blocks
These block member have been split into individual vars so we need
to set the correct offsets for each member in the new glsl nir
linker. We also take this opportunity to set the correct location
for the variable.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
76ce775240 glsl: correctly set explicit offsets for struct members
This correctly sets offsets set in glsl when using the nir linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
590a59437f glsl: add std140 and std430 layouts to nir uniform linker
The current ARB_gl_spirv linking only supports explicit layouts so
we need to update it to support std140 and std430 layouts before
we can use the linker for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
858a49a10d nir: add glsl_get_std430_size() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
a005f1a6e7 nir: add glsl_get_std430_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
1ccfe821b2 nir: add glsl_get_std140_size() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
120a26c6f2 nir: add glsl_get_std140_base_alignment() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
262b611a5b nir: add glsl_get_internal_ifc_packing() helper
This will be used by the nir glsl linker for linking uniforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
a02d8e040f glsl: correctly find block index when linking glsl with nir linker
The existing code for spirv expects all vars to have explicit
bindings set which is not true for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
10b816d27e glsl: add name support to nir uniform linker
Name support is optional for spirv support but is required for glsl
support.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
aa9b457062 glsl: move get_next_index() earlier in nir link uniforms
We will use get_next_index() in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
219cefe24f glsl: move add_parameter() earlier in nir link uniforms
We will use add_parameter() in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Timothy Arceri
51898c8ee5 glsl: move nir link uniforms struct defs earlier
We will need to use the state in more of the helper functions in
the following patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4050>
2020-03-06 23:22:14 +00:00
Vasily Khoruzhick
4d5a0ae22c lima: gpir: enforce instruction limit earlier
Enforce instruction limit of 512 instructions earlier. This is a
workaround for infinite loops in gpir compiler and allows us to
pin point the tests that are affected.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4055>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4055>
2020-03-06 21:06:54 +00:00
Francisco Jerez
70349a2252 intel/compiler: Calculate num_instructions in O(1) during register pressure calculation
And mark the variable declaration as const.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:13 -08:00
Francisco Jerez
e5e4d016b9 intel/compiler: Move register pressure calculation into IR analysis object
This defines a new BRW_ANALYSIS object which wraps the register
pressure computation code along with its result.  For the rationale
see the previous commits converting the liveness and dominance
analysis passes to the IR analysis framework.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:10 -08:00
Francisco Jerez
f6cdf66cd6 entel/compiler: Simplify new_idom reduction in dominance tree calculation
Trivial, just use a few less tokens to do the same thing.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:07 -08:00
Francisco Jerez
c9a608c090 intel/compiler: Move dominance tree data structure into idom_tree object
It makes sense to keep the result of analysis passes independent from
the IR itself.  Instead of representing the idom tree as a pointer in
each basic block pointing to its immediate dominator, the whole
dominator tree is represented separately from the IR as an array of
pointers inside the idom_tree object.  This has the advantage that
it's no longer possible to use stale dominance results by accident
without having called require() beforehand, which makes sure that the
idom tree is recalculated if necessary.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:05 -08:00
Francisco Jerez
c2a7eababf intel/compiler: Move idom tree calculation and related logic into analysis object
This only does half of the work.  The actual representation of the
idom tree is left untouched, but the computation algorithm is moved
into a separate analysis result class wrapped in a BRW_ANALYSIS
object, along with the intersect() and dump_domtree() auxiliary
functions in order to keep things tidy.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:03 -08:00
Francisco Jerez
2878817197 intel/compiler: Drop invalidate_live_intervals()
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:21:01 -08:00
Francisco Jerez
acf24df201 intel/compiler/vec4: Switch liveness analysis to IR analysis framework
This involves wrapping vec4_live_variables in a BRW_ANALYSIS object
and hooking it up to invalidate_analysis() so it's properly
invalidated.  Seems like a lot of churn but it's fairly
straightforward.  The vec4_visitor invalidate_ and
calculate_live_intervals() methods are no longer necessary after this
change.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:59 -08:00
Francisco Jerez
ea44de6d8c intel/compiler/fs: Switch liveness analysis to IR analysis framework
This involves wrapping fs_live_variables in a BRW_ANALYSIS object and
hooking it up to invalidate_analysis() so it's properly invalidated.
Seems like a lot of churn but it's fairly straightforward.  The
fs_visitor invalidate_ and calculate_live_intervals() methods are no
longer necessary after this change.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:57 -08:00
Francisco Jerez
bb8cfa6837 intel/compiler/vec4: Add live interval validation pass
This could be improved somewhat with additional validation of the
calculated live in/out sets and by checking that the calculated live
intervals are minimal (which isn't strictly necessary to guarantee the
correctness of the program).  This should be good enough though to
catch accidental use of stale liveness results due to missing or
incorrect analysis invalidation.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:55 -08:00
Francisco Jerez
24535604aa intel/compiler/fs: Add live interval validation pass
This could be improved somewhat with additional validation of the
calculated live in/out sets and by checking that the calculated live
intervals are minimal (which isn't strictly necessary to guarantee the
correctness of the program).  This should be good enough though to
catch accidental use of stale liveness results due to missing or
incorrect analysis invalidation.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:53 -08:00
Francisco Jerez
a9cdc14f60 intel/compiler: Pass single backend_shader argument to the vec4_live_variables constructor
The IR analysis framework requires the analysis result to be
constructible with a single argument.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:51 -08:00
Francisco Jerez
d0433971f9 intel/compiler: Pass single backend_shader argument to the fs_live_variables constructor
This removes the dependency of fs_live_variables on fs_visitor.  The
IR analysis framework requires the analysis result to be constructible
with a single argument -- The second argument was redundant anyway.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:49 -08:00
Francisco Jerez
d7e84cbb0f intel/compiler: Restructure live intervals computation code
This makes the structure of the vec4 live intervals calculation more
similar to the FS back-end liveness analysis code.  The non-CF-aware
start/end computation is moved into the same pass that calculates the
block-local def/use sets, which saves quite a bit of code, while the
CF-aware start/end computation is moved into a separate
compute_start_end() function as is done in the FS back-end.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:46 -08:00
Francisco Jerez
48dfb30f92 intel/compiler: Move all live interval analysis results into vec4_live_variables
This moves the following methods that are currently defined in
vec4_visitor (even though they are side products of the liveness
analysis computation) and are already implemented in
brw_vec4_live_variables.cpp:

> int var_range_start(unsigned v, unsigned n) const;
> int var_range_end(unsigned v, unsigned n) const;
> bool virtual_grf_interferes(int a, int b) const;
> int *virtual_grf_start;
> int *virtual_grf_end;

It makes sense for them to be part of the vec4_live_variables object,
because they have the same lifetime as other liveness analysis results
and because this will allow some extra validation to happen wherever
they are accessed in order to make sure that we only ever use
up-to-date liveness analysis results.

The naming of the virtual_grf_start/end arrays was rather misleading,
they were indexed by variable rather than by vgrf, this renames them
start/end to match the FS liveness analysis pass.  The churn in the
definition of var_range_start/end is just in order to avoid a
collision between the start/end arrays and local variables declared
with the same name.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:44 -08:00
Francisco Jerez
ba73e606f6 intel/compiler: Move all live interval analysis results into fs_live_variables
This moves the following methods that are currently defined in
fs_visitor (even though they are side products of the liveness
analysis computation) and are already implemented in
brw_fs_live_variables.cpp:

> bool virtual_grf_interferes(int a, int b) const;
> int *virtual_grf_start;
> int *virtual_grf_end;

It makes sense for them to be part of the fs_live_variables object,
because they have the same lifetime as other liveness analysis results
and because this will allow some extra validation to happen wherever
they are accessed in order to make sure that we only ever use
up-to-date liveness analysis results.

This shortens the virtual_grf prefix in order to compensate for the
slightly increased lexical overhead from the live_intervals pointer
dereference.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:43 -08:00
Francisco Jerez
3ceb496cdf intel/compiler: Mark virtual_grf_interferes and vars_interfere as const
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:41 -08:00
Francisco Jerez
ab6d792986 intel/compiler: Pass detailed dependency classes to invalidate_analysis()
Have fun reading through the whole back-end optimizer to verify
whether I've missed any dependency flags -- Or alternatively, just
trust that any mistake here will trigger an assertion failure during
analysis pass validation if it ever poses a problem for the
consistency of any of the analysis passes managed by the framework.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:39 -08:00
Francisco Jerez
65080dc8df intel/compiler: Define more detailed analysis dependency classes
I've deliberately separated this from the general analysis pass
infrastructure in order to discuss it independently.  The dependency
classes defined here refer to state changes of several objects of the
program IR, and are fully orthogonal and expected to change less often
than the set of analysis passes present in the compiler back-end.

The objective is to avoid unnecessary coupling between optimization
and analysis passes in the back-end.  By doing things in this way the
set of flags to be passed to invalidate_analysis() can be determined
from knowledge of a single optimization pass and a small set of well
specified dependency classes alone -- IOW there is no need to audit
all analysis passes to find out which ones might be affected by
certain kind of program transformation performed by an optimization
pass, as well as the converse, there is no need to audit all
optimization passes when writing a new analysis pass to find out which
ones can potentially invalidate the result of the analysis.

The set of dependency classes defined here is rather conservative and
mainly based on the requirements of the few analysis passes already
part of the back-end.  I've also used them without difficulty with a
few additional analysis passes I've written but haven't yet sent for
review.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:37 -08:00
Francisco Jerez
d966a6b4c4 intel/compiler: Introduce backend_shader method to propagate IR changes to analysis passes
The invalidate_analysis() method knows what analysis passes there are
in the back-end and calls their invalidate() method to report changes
in the IR.  For the moment it just calls invalidate_live_intervals()
(which will eventually be fully replaced by this function) if anything
changed.

This makes all optimization passes invalidate DEPENDENCY_EVERYTHING,
which is clearly far from ideal -- The dependency classes passed to
invalidate_analysis() will be refined in a future commit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:32 -08:00
Francisco Jerez
03eb46f4a7 intel/compiler: Introduce simple IR analysis pass framework
Motivated in detail in the source code.  The only piece missing here
from the analysis pass infrastructure is some sort of mechanism to
broadcast changes in the IR to all existing analysis passes, which
will be addressed by a future commit.  The analysis_dependency_class
enum might seem a bit silly at this point, more interesting dependency
categories will be defined later on.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:30 -08:00
Francisco Jerez
27ae3c1f68 intel/compiler: Reverse inclusion dependency between brw_vec4_live_variables.h and brw_vec4.h
brw_vec4.h (in particular vec4_visitor) is logically a user of the
live variables analysis pass, not the other way around.
brw_vec4_live_variables.h requires the definition of some VEC4 IR data
structures to compile, but those can be obtained directly from
brw_ir_vec4.h without including brw_vec4.h.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:28 -08:00
Francisco Jerez
a6fc88e91b intel/compiler: Reverse inclusion dependency between brw_fs_live_variables.h and brw_fs.h
brw_fs.h (in particular fs_visitor) is logically a user of the live
variables analysis pass, not the other way around.
brw_fs_live_variables.h requires the definition of some FS IR data
structures to compile, but those can be obtained directly from
brw_ir_fs.h without including brw_fs.h.  The dependency of
fs_live_variables on fs_visitor is rather accidental and will be
removed in a future commit, a forward declaration is enough for the
moment.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:26 -08:00
Francisco Jerez
06c5c49646 intel/compiler: Nest definition of live variables block_data structures
When this commit was originally written, these two structures had the
exact same name. Subsequently in commit 12a8f2616a (intel/compiler:
Fix C++ one definition rule violations) they were renamed.

Original commit message:

> These two structures have exactly the same name which prevents the two
> files from being included at the same time and could cause serious
> trouble in the future if it ever leads to a (silent) violation of the
> C++ one definition rule.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:23 -08:00
Francisco Jerez
310aef6b59 intel/compiler: Reverse inclusion dependency between brw_cfg.h and brw_shader.h
This reflects the natural dependency relationship between brw_cfg.h
and brw_shader.h.  brw_cfg.h only requires the base IR definitions
which are now part of a separate header.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:19 -08:00
Francisco Jerez
d46fb2126d intel/compiler: Move base IR definitions into a separate header file
This pulls out the i965 IR definitions into a separate file and leaves
the top-level backend_shader structure and back-end compiler entry
points in brw_shader.h.  The purpose is to keep things tidy and
prevent a nasty circular dependency between brw_cfg.h and
brw_shader.h.  The logical dependency between these data structures
looks like:

 backend_shader (brw_shader.h) -> cfg_t (brw_cfg.h)
    -> bblock_t (brw_cfg.h) -> backend_instruction (brw_shader.h)

This circular header dependency is currently resolved by using forward
declarations of cfg_t/bblock_t in brw_shader.h and having brw_cfg.h
include brw_shader.h, which seems backwards and won't work at all when
the forward declarations of cfg_t/bblock_t are no longer sufficient in
a future commit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
2020-03-06 10:20:11 -08:00
Christian Gmeiner
74e4cda64b etnaviv: add etna_constbuf_state object
With this new state object we keep track of enabled pipe_constant_buffer
and only mark them as read when needed.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4088>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4088>
2020-03-06 17:48:17 +01:00
Thong Thai
9f5802ad3e st/va: add check for P010 and P016 encode/decode support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
2020-03-06 16:10:40 +00:00
Thong Thai
d375803576 radeon: add support for 10-bit HEVC encoding to VCN 2.0
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
2020-03-06 16:10:40 +00:00
Thong Thai
8ab31808fd radeonsi: add 10-bit HEVC encode support for VCN2.0 devices
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
2020-03-06 16:10:40 +00:00
Alejandro Piñeiro
2ba272135a nir/linker: remove reference to just SPIR-V linking
Several files had a initial comment about the purpose of such files,
including a reference that the NIR linker was implemented with just
ARB_gl_spirv in mind.

Since the nice job Timothy is doing to use the NIR linker on GLSL,
that is not true anymore, so let's remove that reference and also
tweak some other comments.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4081>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4081>
2020-03-06 12:28:08 +00:00
Eric Engestrom
d7a70fbb23 bin/gen_release_notes.py: fix commit list command
Fixes: 86079447da ("scripts: Add a gen_release_notes.py script")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4069>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4069>
2020-03-06 11:46:45 +00:00
Eric Engestrom
894e286391 docs: fix typos in the release docs
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4067>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4067>
2020-03-06 11:44:03 +00:00
Pierre-Eric Pelloux-Prayer
771f16cf61 radeonsi: remove AMD_DEBUG=sisched option
sisched is not maintained anymore in LLVM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059>
2020-03-06 11:35:12 +01:00
Samuel Pitoiset
913d2dcd23 nir/lower_input_attachments: remove bogus assert in try_lower_input_texop()
It can be a sampler too.

Fixes: 84b08971fb ("nir/lower_input_attachments: lower nir_texop_fragment_{mask}_fetch")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2558
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4043>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4043>
2020-03-06 09:13:40 +00:00
Samuel Pitoiset
6dc38cea52 radv/rgp: report correct system ram size
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
2020-03-06 08:22:02 +00:00
Samuel Pitoiset
eeb09a01e7 radv/rgp: report correct cu_mask info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
2020-03-06 08:22:02 +00:00
Samuel Pitoiset
b3ece36257 ac: add ac_gpu_info::cu_mask to store bitmask of compute units
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023>
2020-03-06 08:22:02 +00:00
Samuel Pitoiset
c6c661de31 radv/sqtt: abort if SQTT is used on GFX6-GFX7
RGP only supports GFX8+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
14283ddc79 radv/sqtt: add support for GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
d747015935 ac/registers: adjust some definitions for thread trace on GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
0d55732a61 radv/sqtt: add radv_copy_thread_trace_info_regs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
9baad41469 radv/sqtt: tidy up radv_emit_thread_trace_{start,stop}
Check for GFX10 first.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
6c91aa7955 radv/sqtt: fix wrong check in radv_is_thread_trace_complete()
Oops, should be equal actually.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4022>
2020-03-06 08:00:39 +00:00
Samuel Pitoiset
ba29c050a3 radv/winsys: fix missing initializations of shader info in the null device
To avoid divide by zero when computing shader stats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3999>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3999>
2020-03-06 07:43:31 +00:00
Jason Ekstrand
9d07d59842 iris: Don't skip fast depth clears if the color changed
We depend on BLORP to convert the clear color and write it into the
clear color buffer for us.  However, we weren't bothering to call blorp
in the case where the state is ISL_AUX_STATE_CLEAR.  This leads to the
clear color not getting properly updated if we have back-to-back clears
with different clear colors.  Technically, we could go out of our way to
set the clear color directly from iris in this case but this is a case
we're unlikely to see in the wild so let's not bother.  This matches
what we already do for color surfaces.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4073>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4073>
2020-03-06 01:40:02 +00:00
Vinson Lee
382b902a6d swr: Fix non-pod-varargs error.
../src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp:391:24: error: cannot pass object of non-trivial type 'std::string' (aka 'basic_string<char>') through variadic function; call will abort at runtime [-Wnon-pod-varargs]
                       pFunc->getName().str());
                       ^

Fixes: ff8265b64f ("gallium/swr: Fix llvm11 compilation issues")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4008>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4008>
2020-03-06 01:19:50 +00:00
Marek Olšák
ed0bea4495 glthread: fall back if a param size is non-zero and a pointer param is NULL
So that we don't crash. This is a GL error anyway.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
57a9c1ee47 glthread: fix a crash with incorrect glShaderSource parameters
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
c5825b7b6e glthread: add custom marshalling for glNamedBuffer(Sub)DataEXT
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b8aa5edfc5 glthread: merge glBufferSubData and glNamedBufferSubData into 1 set of functions
This is a big cleanup.
GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD also doesn't sync anymore.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
8eb0332749 glthread: merge glBufferData and glNamedBufferData into 1 set of functions
This is a big cleanup.
GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD also doesn't sync anymore.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
93b2ee18a1 glthread: replace custom glBindBuffer marshalling with generated one
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
85276e2c1b glthread: sync instead of disabling glthread for non-VBO pointers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
28a2ad7ddf glthread: track for each VAO whether the user has set a user pointer
This commit mainly adds basic infrastructure for tracking vertex array
state.

If glthread gets a non-VBO pointer, this commit delays disabling
glthread until glDraw is called. The next will change that to "sync"
instead of "disable".

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
d510e652d4 glthread: add marshal_call_after and remove custom glFlush and glEnable code
Instead of implementing marshalling manually, this XML property allows us
to insert additional code into code-generated functions.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
4970199d11 glthread: don't insert an empty line after (void) cmd;
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b9eef27920 glthread: add support for glMemoryObjectParameteriv, glSemaphoreParameterui64v
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b5c58bbf6c glthread: add support for glCallLists, glPatchParameterfv
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
1668a93903 glthread: add support for glClearNamedFramebuffer, glMaterial, glPointParameter
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
b0a20e7531 glthread: add support for glFog, glLight, glLightModel, glTexEnv, glTexGen
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
59e96bc513 glthread: add support for TexParameteri and SamplerParameteri functions
It's straightfoward except that I had to hack the python scripts to add
"marshal_count", which behaves just like "count" except that "variable_param"
is ignored. ("variable_param" changes the behavior of "count", which I don't
want)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
108fdb54c6 glthread: replace custom ClearBuffer marshalling with generated one
If the count attribute contains "enum", the count is evaluated only once.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
88b5fb18b3 glthread: check the size of all variable params and clean up the code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
358d923c8b glthread: handle complex pointer parameters and support GL functions with strings
The python changes add a local variable that computes the parameter size
only once.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
d00f36ac25 glthread: add/update count and marshal fields for many GL functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
fb95a4693f glthread: add GL_DRAW_INDIRECT_BUFFER tracking and generator support
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
30b6e82364 glthread: don't increment variable_data if it's the last variable-size param
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
19dc528bbf glthread: don't insert _mesa_post_marshal_hook into every function
Let the developer decide that in the python script.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
c920572f60 glthread: simplify repeated function sequences in marshal_generated.c
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
9dbf5ec9f7 glthread: use int instead of size_t where it's OK
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
313e98fb81 glthread: reduce pointer dereferences in glthread_unmarshal_batch
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
19151e2605 glthread: inline _mesa_unmarshal_dispatch_cmd and convert the switch to a table
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
245f9593b7 glthread: don't prefix variable_data with const
Not all variable data that is constant is declared with const, such as
glDeletePerfMonitorsAMD.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:14 +00:00
Marek Olšák
d93f4faefb glthread: don't generate the sync fallback if the call size is not variable
marshal_generated.c is 12% smaller.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3948>
2020-03-06 01:06:13 +00:00
Dylan Baker
a19c9290f4 docs: update news, calendar, and link release notes for 20.0.1
Also fix a couple of dates that are wrong.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
2020-03-06 00:24:35 +00:00
Dylan Baker
6b1f94e9f2 docs: Add sha256sums for 20.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
2020-03-06 00:24:35 +00:00
Dylan Baker
7c8766402e docs: add relnotes for 20.0.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
2020-03-06 00:24:35 +00:00
Dylan Baker
f1890b7ad8 docs: update releasing to cover updated post_version.py
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:15:01 -08:00
Dylan Baker
5cdaa06221 bin/post_version.py: Make the git commit as well.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:14:56 -08:00
Dylan Baker
e3d3abb1bc bin/post_version.py: Pretty print the html
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:14:56 -08:00
Dylan Baker
d7ada7d7e0 bin/post_version.py: Update the release calendar as well
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
2020-03-05 15:14:56 -08:00
Dylan Baker
d4cb9ef826 docs: Update release notes with current process
There's a lot of stuff here that's out of date, update it to something
more modern.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
2020-03-05 22:47:28 +00:00
Dylan Baker
7451eb9a27 docs/submittingpatches: Fix confusing typo + missing pronoun
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
2020-03-05 22:47:28 +00:00
Samuel Pitoiset
42a3d821cb gitlab-ci: add a job that runs Fossilize on RADV/Polaris10
RADV_FORCE_FAMILY forces creating a null device that allows RADV
to be instanced without AMDGPU.

The Fossilize database only contains pipelines from the Sascha
Vulkan triangle demos at the moment. I will add more once this
is merged.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Samuel Pitoiset
af1cd45858 gitlab-ci: enable building the test image for VK unconditionally
It was diabled because RADV is the only driver that tests Vulkan
and running CTS on my personal machine and without recovery is
not safe enough for CI (too long and too unstable).

Now that we are going to test Fossilize with RADV, it's needed to
build the test image for VK unconditionally. As RADV now supports
creating NULL devices, the fossilize jobs can run everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Samuel Pitoiset
1cdb6edbe6 gitlab-ci: add Fossilize support to detect compiler regressions
Fossilize is equivalent to vkpipeline-db but it's definitely more
robust. This is based on the CI traces system.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Samuel Pitoiset
93fcc9ad57 gitlab-ci: build Fossilize in the test image for VK
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
2020-03-05 20:33:56 +00:00
Rhys Perry
b088a4b113 aco: only reserve sgprs for vcc if it's used
pipeline-db (Vega):

Totals:
SGPRS: 5186302 -> 5075616 (-2.13 %)
VGPRS: 3704580 -> 3704580 (0.00 %)
Spilled SGPRs: 144859 -> 144859 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 4124 -> 4124 (0.00 %) dwords per thread
Code Size: 247315944 -> 247315944 (0.00 %) bytes
LDS: 1311 -> 1311 (0.00 %) blocks
Max Waves: 674560 -> 674562 (0.00 %)

Totals from affected shaders:
SGPRS: 536992 -> 426306 (-20.61 %)
VGPRS: 356404 -> 356404 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 8498748 -> 8498748 (0.00 %) bytes
LDS: 8 -> 8 (0.00 %) blocks
Max Waves: 113832 -> 113834 (0.00 %)

There are some small code size changes in a few RotTR shaders and a small
increase in max_waves in two Detroit: Become Human shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906>
2020-03-05 20:18:34 +00:00
Rhys Perry
c6e0c062da aco: improve control flow handling in GFX6-9 NOP pass
Fixes Detroit: Become Human hang. Also affects World of Warships.

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 17168 -> 17168 (0.00 %)
VGPRS: 11296 -> 11296 (0.00 %)
Spilled SGPRs: 1870 -> 1870 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1472628 -> 1473292 (0.05 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 628 -> 628 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 17168 -> 17168 (0.00 %)
VGPRS: 11296 -> 11296 (0.00 %)
Spilled SGPRs: 1870 -> 1870 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1409716 -> 1410380 (0.05 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Max Waves is lower than it should be because of a null winsys bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Rhys Perry
47b7f104a0 aco: consider non-hazard writes in handle_raw_hazard_internal
I think this helps GFX6 in particular because code like this is common:
s_add_i32       s4, 0x60, s3
s_mov_b32       s5, 0
s_load_dwordx4  s[4:7], s[4:5], 0x0
s_buffer_load_dword s4, s[4:7], 0xcc

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 1923878 -> 1923878 (0.00 %)
VGPRS: 1528964 -> 1528964 (0.00 %)
Spilled SGPRs: 476 -> 476 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 88723604 -> 88528880 (-0.22 %) bytes
LDS: 241 -> 241 (0.00 %) blocks
Max Waves: 145402 -> 145402 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 428128 -> 428128 (0.00 %)
VGPRS: 353092 -> 353092 (0.00 %)
Spilled SGPRs: 119251 -> 119251 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 57580468 -> 57563964 (-0.03 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 11631 -> 11631 (0.00 %)

piepline-db (Vega):
Totals from affected shaders:
SGPRS: 425016 -> 425016 (0.00 %)
VGPRS: 349588 -> 349588 (0.00 %)
Spilled SGPRs: 117835 -> 117835 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 54890792 -> 54874432 (-0.03 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 54 -> 54 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Rhys Perry
38743577f8 aco: improve get_wait_states()
pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 21208 -> 21208 (0.00 %)
VGPRS: 22388 -> 22388 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 3278596 -> 3277004 (-0.05 %) bytes
LDS: 19 -> 19 (0.00 %) blocks
Max Waves: 238 -> 238 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 64 -> 64 (0.00 %)
VGPRS: 96 -> 96 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5200 -> 5192 (-0.15 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 10 -> 10 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Rhys Perry
7f1b537304 aco: add new NOP insertion pass for GFX6-9
This new pass is more similar to the GFX10 pass and should be able to
handle control flow better.

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
2020-03-05 19:37:24 +00:00
Jason Ekstrand
ce19681257 iris: Enable HiZ and stencil CCS for blorp blit destinations
Now that blorp blits write to depth and stencil as depth and stencil, we
can leave HiZ and stencil CCS enabled for blorp blit destinations.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
a0d5c7da18 iris: Enable CCS for copies from HiZ+CCS depth buffers
Ever since b274469daa, BLORP is able to sample from whatever the
sampler supports.  In c0c899cf78, we added HiZ support for copies from
HiZ compressed depth buffers but forgot HiZ+CCS.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
83b641a038 anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
6cec618e82 blorp: Write to depth/stencil images as depth/stencil when possible
On Gen4 and G45 and earlier, we have to handle weird offsetting to write
to depth and stencil due to a lack of proper depth mipmapping support in
hardware.  On Gen6, we have to deal with strange HiZ and stencil
layouts.  Prior to Gen9, we also had to do crazy things for stencil
writes because we didn't support GL_ARB_shader_stencil_export and
friends in hardware.  However, starting with Gen7 for depth and Gen9 for
stencil, we can easily write out with the "right" hardware.  This allows
us to leave HiZ and other compression enabled for blorp_blit() and
blorp_copy() operations.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
4531f0ffce iris: Allow HiZ on blit sources
Ever since 95cc5438eb, BLORP has been able to read from HiZ-compressed
depth buffers as long as the sampler supports HiZ.  This just makes iris
stop doing the unneeded resolve.

Closes: #2583
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Jason Ekstrand
9f5f4269a6 isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
2020-03-05 18:56:45 +00:00
Dylan Baker
07f1ef5656 docs: Update stable process around using fixes: and gitlab
Currently the docs still recommend using
mesa-stable@lists.freedesktop.org, which is pretty awful. We really
don't want a second mailing list and it's mostly full of junk because of
CC: tags anyway.

This changes the preferred actions to be:
1) use a fixes: tag ahead of time
2) use a Cc tag ahead of time if fixes isn't appropriate
3) Use a gitlab MR against the staging/ branch for post-merge/backport
   nominations

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>
2020-03-05 18:24:14 +00:00
Jonathan Marek
55dac91adc turnip: fix tile->slot calculation
Fixes HW binning cases when the horizontal number of tiles isn't divisible
by the horizontal number of pipes (only happens with more than 32 tiles).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
2020-03-05 12:53:29 -05:00
Jonathan Marek
036230341f turnip: improve binning pipe layout config
The old code looks the same as GL driver, but we get things like
pipe_count = {32, 1}, which seems bad.

This uses similar logic as for tiles which produces a balanced pipe_count
width/height.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
2020-03-05 12:48:12 -05:00
Kristian H. Kristensen
9f9432d56c Revert "spirv: Use a simpler and more correct implementaiton of tanh()"
This reverts commit da1c49171d.

The reduced formula has precision problems on fp16 around 0.  Bring
back the old formula, but make sure to keep the clamping.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
2020-03-05 15:23:31 +00:00
Kristian H. Kristensen
986e92f0ea Revert "glsl: Use a simpler formula for tanh"
This reverts commit 9807f502eb.

The simplified formula doesn't pass the tanh dEQP tests when we lower
to fp16 math.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
2020-03-05 15:23:31 +00:00
Alyssa Rosenzweig
bc5724faf4 pan/bi: Add bi_print_shader
Woot! That's the last of it! IR printing is now complete*

*until the IR gets updated when new shiny things are added.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c152d4c835 pan/bi: Add bi_print_block
Almost there...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c316d1553b pan/bi: Add bi_print_clause
Again for post-sched purposes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
919cdf15b3 pan/bi: Add bi_print_bundle for printing bi_bundle
Post-schedule, nops are significnat here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
bde54cb6d3 pan/bi: Add bi_instruction printing
So we can debug the IR in memory before code emit has happened. We'd
like to have a complete dump of the IR -- neglecting this with Midgard
was one of those mistakes I've regretted so let's get this right for the
first time around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
aef0f00cbc pan/bi: Move bi_interp_mode_name to bi_print
Instead of open-coding it in the middle of the disassembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5d16a8109c pan/bi: Add BIR manipulation routines to bir.c
New file.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5f7a3ba872 pan/bi: Move some print routines out of the disasm
These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
8ec671801a pan/bi: Add IR iteration macros
Copypaste from Midgard, for the most part.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
0b26cb194c pan/bi: Add quirks system
Modeled after the Midgard system. Already we know of two
compiler-visible differences between G52 and G71, so let's keep track so
we can eventually port the compiler to other Bifrost systems.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
07228a6895 pan/bi: Add high-latency property for classes
This is required to know how to schedule legally, and also influences
some issues relating to RA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
546c301ff6 pan/bi: Add CSEL condition
Along with src_types, this is enough to represent CSEL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
47451bb9f1 pan/bi: Add bi_branch data
For BI_BRANCH, of course. Meshes well with the cfg.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
73c91f14c9 pan/bi: Extract bifrost_branch structure
It's in the disassembler as bitfields, let's extract to a proper
structure so we can see what's there.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
2afddc4433 pan/bi: Add pred/successors to build CFG
We'll want this for analysis passes or something, probably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
d3370bd5a5 pan/bi: Add constants to bi_clause
Scheduling will have to pay attention to this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
cb3cd8aa56 pan/bi: Add EXTRACT, MAKE_VEC synthetic ops
These allow translating between the vector I/O and scalar ALUs,
facilitated by an RA dance to ensured contiguous registers are used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
8929fe0c84 pan/bi: Add source type for conversions
We should now be able to unambiguously represent conversions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
5896db9578 pan/bi: Add swizzles
Requires a new field on bifrost_instruction, as well as a new class
property and a new class for the dedicated swizzle ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c70a198f24 pan/bi: Clarify special op scheduling
They're encoded on ADD but eat the full cycle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
fba1d12742 pan/bi: Add clause header fields to bi_clause
These will be filled out during scheduling (and possibly RA), to be used
when emitting code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
44ebc275fe pan/bi: Add class-specific ops
For disambiguating things like min and max within the MINMAX class.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
b5bdd89444 pan/bi: Add constant field to bi_instruction
Now that we can index it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
a2c1265dd3 pan/bi: Add special indices
For fixed registers, uniforms, and constants, which bypass the usual SSA
mechanism to map well to the ISA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
c42002d26f pan/bi: Add dest_type field to bifrost_instruction
A number of opcodes within a class are disambiguated by type/size, and
whether modifiers make sense or not depends on whether the instruction
acts like a float.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
a35854c5ee pan/bi: Add bi_clause, bi_bundle abstractions
These will be used during and after scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
99f3c1f34c pan/bi: Add PAN_SCHED_* flags
Class (mostly) determines scheduling options.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
9643b9dd5b pan/bi: Add bi_load_vary structure
For ld_vary in the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
6a7987aba1 pan/bi: Pull out bifrost_load_var
We're not using this structure yet but we want everything in the ISA
ready for us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
aa2f12de56 pan/bi: Add bi_load structure
Fills out the class for LD_ATTR, LD_VAR_ADDR

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
b93aec6df1 pan/bi: Add bifrost_minmax_mode field
We'll open up a union for class specific data, since this is interesting
only to BI_MINMAX. (And even then...)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
d69bf8db62 pan/bi: Add a bifrost_roundmode field
And a class property signaling it's okay to use.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
bbf41ffb00 pan/bi: Factor out enum bifrost_minmax_mode
We'll want it from the compiler-side.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
34165c7ec0 pan/bi: Add BI_GENERIC property
I don't want to have 20 class-specific structures floating around. So
let's derive them all from a common generic ALU type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
29acd7bd8e pan/bi: Add modifiers to bi_instruction
Now that we can check if we support them via the class.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
7ac62121e0 pan/bi: Add class properties
We need to keep track of what specific classes support. For now just
track floating point modifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:38 +00:00
Alyssa Rosenzweig
230be61f20 pan/bi: Add src/dest fields to bifrost_instruction
...along with some helpers to generate indices. The indexing scheme is
mostly a copypaste from Midgard, except we specifically reserve 0 as the
sentinel (midgard uses ~0 for this which has always been a pain point).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
e7dc2a7b9b pan/bi: Add the control flow graph
We're starting to build up the IR data structures in preparation to get
everything piped through.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
eceaea43e3 pan/bi: Stub out new compiler
Just enough to pipe in the NIR shader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
5d3a4e3113 pan/bi: Gut old compiler
We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Alyssa Rosenzweig
eb15525ab7 panfrost: Add note about preloaded varyings
There's a magic bit in preload_regs which controls this. It doesn't
appear to be supported on G71 but it is on G52. I'd guess G72 supports
it too but I don't have a way to check this.

Needless to say, we'll need a quirks database for this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
2020-03-05 14:35:37 +00:00
Samuel Pitoiset
7618fe1b48 aco: fix image load/store with lod and 1D images
Make sure to add the lod value if non-null as the 2nd operand.

Fixes dEQP-VK.image.load_store_lod.with_format.1d.* on all gens
except GFX9.

Fixes: 4d49a7ac73 ("aco: handle nir_intrinsic_image_deref_{load,store} with lod")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
2020-03-05 14:29:27 +01:00
Michel Dänzer
cc9493f78e gitlab-ci: Distribute jobs across more stages
The stages and mapping of jobs to them are somewhat arbitrary; the goal
is to avoid having to scroll through large numbers of jobs.

v2: (Pierre-Eric Pelloux-Prayer)
* Use even more stages for test jobs
* Give somewhat meaningful names to stages

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
2020-03-05 12:46:51 +01:00
Michel Dänzer
71436f9640 gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names
Redundant.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
2020-03-05 12:45:51 +01:00
Marek Olšák
53a22c4b89 vbo: merge draws even when begin==0 or end==0
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:57:22 -05:00
Marek Olšák
ab7209fb83 vbo: merge more primitive types for glBegin/End (v2)
v2: clean it up more

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
d740e3d6ee mesa: deduplicate draw indirect functions
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
7700ac3d80 mesa: optimize get_index_size
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
450152f8d8 mesa: remove _mesa_index_buffer::index_size in favor of index_size_shift
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
df3891e74a Revert "mesa: check for z=0 in _mesa_Vertex3dv()"
This reverts commit f04d7439a0.

It no longer helps performance and the current vbo implementation is
faster anyway.

The app that hit this was a CAD program called Spazio3D. It made pretty
terrible use of the OpenGL API and we sent them some tips for improvements.
I'm assuming they've fixed this by now.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
9c9c314e41 vbo: fold code from vbo_exec_fixup_vertex to vbo_exec_wrap_upgrade_vertex
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
8205042be6 vbo: clean up conditional blocks in ATTR_UNION
Move the A != 0 code to the first block.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:43 -05:00
Marek Olšák
4c6323c49f vbo: handle GS and tess primitive types when splitting Begin/End
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
f97341a9d6 vbo: clean up vbo_copy_vertices
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
1be1ea0b8e vbo: deduplicate copy_vertices functions
There are some differences in exec, but those look like bug fixes not ported
to vbo_save.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
fd8eb634fd vbo: don't look at the second draw's count when merging 2 glBegin/End draws
Only the first count needs to be aligned.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
e92a4f817d mesa: replace some index_size multiplications and divisions with shifts
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Marek Olšák
87085c673d mesa: add index_size_shift = log2(index_size) into _mesa_index_buffer
for faster division

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanic@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
2020-03-04 19:54:42 -05:00
Mauro Rossi
f38ffa4659 android: r600/sfn: Add GDS instructions
Fixes the following building errors:

external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:59: error: undefined reference to 'r600::GDSInstr::GDSInstr(r600::ESDOp, r600::GPRVector const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, int)'
...
external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:256: error: undefined reference to 'r600::RatInstruction::RatInstruction(r600::ECFOpCode, r600::RatInstruction::ERatOp, r600::GPRVector const&, r600::GPRVector const&, int, std::__1::shared_ptr<r600::Value> const&, int, int, int, bool)'

Fixes: 32d3435a ("r600/sfn: Add GDS instructions")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-03-04 22:25:36 +01:00
Mauro Rossi
88c68c0ac7 android: r600/sfn: fix includes and libmesa_nir dependency
Fixes the following building errors:

In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
In file included from external/mesa/src/compiler/nir/nir.h:41:
In file included from external/mesa/src/compiler/nir_types.h:36:
external/mesa/src/compiler/glsl_types.h:38:10: fatal error: 'main/config.h' file not found
#include "main/config.h"
         ^~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
external/mesa/src/compiler/nir/nir.h:50:10: fatal error: 'nir_opcodes.h' file not found
#include "nir_opcodes.h"
         ^~~~~~~~~~~~~~~
1 error generated.

Fixes: f718ac62 ("r600/sfn: Add a basic nir shader backend")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-03-04 22:25:36 +01:00
Mauro Rossi
01778d1e3c android: aco: fix PIPE_FORMAT related building errors
Fixes the following building errors:

In file included from external/mesa/src/amd/compiler/aco_dead_code_analysis.cpp:25:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_dominance.cpp:31:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_instruction_selection.cpp:31:
In file included from external/mesa/src/amd/common/ac_shader_util.h:32:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
3 errors generated.

Fixes: 8d07d661 ("glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
2020-03-04 22:25:36 +01:00
Jason Ekstrand
b20693be41 nir: Flush to zero with OOB low exponents in ldexp
Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2020-03-04 11:39:50 -06:00
Duncan Hopkins
ec9da89900 zink. Added storage CISto descriptor pool.
Added storage in descriptor pool for combined image samplers as well as uniform buffers.
Stops some shaders from running through a pools storage faster than zinks internal tracking.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
2020-03-04 15:59:16 +00:00
Andres Gomez
0ac731b1ff gitlab-ci: Add jobs to be able to test Vulkan
Also, adds an example job for radv.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:24:03 +02:00
Andres Gomez
5c65f8b377 gitlab-ci: Add gfxreconstruct traces support
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:24:03 +02:00
Andres Gomez
1d75595da4 gitlab-ci: Change devices format to <api-vendor-deviceId>
In preparation to having "vk" (Vulkan) along "gl" (OpenGL/ES).

This is so it is clearer which traces belong to which API and also for
the build jobs.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:22:04 +02:00
Andres Gomez
f1b7b8c0ee gitlab-ci: build VulkanTools into the Vulkan testing container
In preparation for having automated testing with Vulkan traces.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:21:58 +02:00
Andres Gomez
028ab482bf gitlab-ci: build gfxreconstruct into the Vulkan testing container
In preparation for having automated testing with Vulkan traces.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:21:47 +02:00
Andres Gomez
fc2338dc44 gitlab-ci: add missing popd to the build-deqp-vk.sh script
Since we are at it, replace "cd" with pushd / popd and homogenize how
VK-GL-CTS is built in comparison with other build scripts.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:21:39 +02:00
Andres Gomez
8c5e2ef19f tracie: correct typo
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2020-03-04 15:20:22 +02:00
Christian Gmeiner
83f54e3c54 etnaviv: fix alpha test on GC3000
Store ref_value in PE_STENCIL_CONFIG_EXT as done by blob.

Fixes following piglits:
 spec@ext_framebuffer_object@fbo-alphatest-formats
 spec@ext_packed_float@fbo-alphatest-formats
 spec@ext_texture_srgb@fbo-alphatest-formats

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
2020-03-04 11:59:47 +00:00
Christian Gmeiner
f95fa3d1ac etnaviv: update headers from rnndb
Update to etna_viv commit 3bc187a.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
2020-03-04 11:59:47 +00:00
Daniel Stone
e5b01183a6 egl/wayland: Don't invalidate buffers on no-op resize
The Wayland platform's resize_callback is invoked from libwayland-egl
when wl_egl_window_resize() is called. The resize call is the only place
for the application to insert dx/dy arguments to wl_surface_attach().

When modifying the cursor hotspot (as in wayland/wayland#148), we want
to set dx/dy, but leave the surface size the same. If we get
wl_egl_window_resize() with the same width and height argument as we
already have, we do not need to invalidate our existing drawable.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
2020-03-04 11:38:11 +00:00
Andrii Simiklit
311c82e192 Revert "glx: convert glx_config_create_list to one big calloc"
This reverts commit 35fc7bdf0e.

Unfortunately mentioned commit introduced a memory leak because
`driwindowsMapConfigs` and `createDriMode` functions allocate
small memory portions for each element:
 21,576 (232 direct, 21,344 indirect) bytes in 1 blocks are definitely lost in loss record 1,411 of 1,414
    at 0x483A7F3: malloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
    by 0x5D4AA09: createDriMode (dri_common.c:291)
    by 0x5D4ABF5: driConvertConfigs (dri_common.c:310)
    by 0x5D58414: dri3_create_screen (dri3_glx.c:945)
    by 0x5D39829: AllocAndFetchScreenConfigs (glxext.c:815)
    by 0x5D39C57: __glXInitialize (glxext.c:941)
    by 0x5D3290A: GetGLXPrivScreenConfig (glxcmds.c:174)
    by 0x5D34F38: glXQueryExtensionsString (glxcmds.c:1307)
    by 0x4F83038: glXQueryExtensionsString (in /usr/local/lib/libGL.so.1.7.0)
    by 0x4F2EA6B: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
    by 0x4F2A0D7: waffle_display_connect (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
    by 0x498F42A: wfl_checked_display_connect (piglit-util-waffle.h:74)

There is one more thing which disallow us to easily fix it are different element sizes
for instance: `glx_config_create_list` allocates memory just for `glx_config`,
`driwindowsMapConfigs` for `driwindows_config` and
`createDriMode` for `__GLXDRIconfigPrivate`.
Yes it is possible but size of such fix
will be more big and complex than original one.
So it make sense only if the malloc overhead
really is a big problem there.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
2020-03-04 10:19:48 +00:00
Vilya Harvey
6ceda48560 zink. Don't set incorrect sType in VkImportMemoryFdInfoKHR struct
imfi.sType was being set to an invalid value, triggering a warning in Clang. The only valid value for imfi.sType is VK_STRUCTURE_TYPE_IMPORT_MEMORY_FD_INFO_KHR which is the value it is being given at initialisation time, a few lines earlier. The incorrect value, VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT, is supposed to be used in imfi.handleType instead - and indeed, handleType *is* being set to this value a few lines later.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
2020-03-04 08:37:29 +00:00
Hyunjun Ko
3199b8b9e7 turnip: support indirect draw
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
2020-03-04 01:20:32 +00:00
Mauro Rossi
a933934efb android: gallium/auxiliary: fix "Unused source files" in tesselator
Avoids the following Android Build System error:

FAILED:
build/make/core/binary.mk:1245: error: external/mesa/src/gallium/auxiliary/Android.mk: libmesa_gallium: Unused source files: tessellator/tessellator.hpp
10:24:30 ckati failed with: exit status 1

Fixes: bd0188f ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2020-03-03 21:32:26 +00:00
Eric Anholt
aea8c9c7b1 ci: Flip db410c back to docker mode.
Turns out there's corporate policy to not deploy AGPL software, so I
have to take down the LAVA lab until we sort out how to do it without
a local server.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
2020-03-03 12:49:09 -08:00
Rafael Antognolli
5f13996262 intel/gen12+: Disable mid thread preemption.
Fixes a GPU hang in Car Chase.

Cc: mesa-stable@lists.freedesktop.org

v2: Add comment explaining why (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
2020-03-03 19:52:06 +00:00
Krzysztof Raszkowski
42ee6ff706 Revert "gallium/swr: Fix min/max range index draw"
This reverts commit 5e9a2c603f

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
2020-03-03 19:33:36 +00:00
Chris Lord
291f40a499 vc4: fix vc4_yuv_blit overwriting fragment constant buffer slot 0
vc4_yuv_blit calls util_blitter_restore_constant_buffer_state without
first calling util_blitter_save_fragment_constant_buffer_slot. This causes
subsequent crashes in vc4_write_uniforms when using fragment shaders that
reference YUV textures.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2581
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
2020-03-03 19:06:03 +00:00
Rhys Perry
2d1ba86382 aco: handle v_add_co_u32_e64 in parse_base_offset()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
2020-03-03 18:31:06 +00:00
Rhys Perry
215df21dea aco: fix carry-out size for wave32 v_add_co_u32_e64
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: e0bcefc3a0 ('aco/wave32: Use lane mask regclass for exec/vcc.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
2020-03-03 18:31:06 +00:00
Jan Zielinski
18675363a3 gallium/swr: fix corruptions in Unigine Heaven
Few changes to fix the last corruptions in Heaven:
- fix indirect TCS input when vertex/attribute
  index is not the same for each patch
- use the correct functions to build loops in shader
- fix using vmask for writting TCS output

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
2020-03-03 17:50:25 +00:00
Satyajit Sahu
0ab5c88a0a st/va: GetConfigAttributes: check profile and entrypoint combination
Added check if profile is supported or not for the entrypoint in
GetConfigAttributes.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
2020-03-03 17:06:07 +00:00
Rafael Antognolli
cd40110420 intel/isl: Implement D16_UNORM workarounds.
GEN:BUG:14010455700 (lineage 1808121037):

   "To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer
   Surface Format is D16_UNORM , surface type is not NULL & 1X_MSAA"

Required for fixing ttps://gitlab.freedesktop.org/mesa/mesa/issues/2501.

GEN:BUG:1806527549:

   "Set HIZ_CHICKEN (7018h) bit 13 = 1 when depth buffer is D16_UNORM."

This one could fix a GPU hang in some workloads.

v2: Implement WA in isl and add another similar WA (Jason).
v3: Add flushes before changing chicken registers (Jason)
v4: Depth flush and stall + end of pipe sync when changing registers
(Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
2020-03-03 16:25:54 +00:00
Rhys Perry
9fea90ad51 aco: keep track of which events are used in a barrier
And properly handle unordered events so that they always wait for 0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa78 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
2020-03-03 15:38:13 +00:00
Thong Thai
3f31c54842 st/va/postproc: reallocate interlaced destination buffer
When the source buffer is progressive source, re-allocate the
destination buffer as progressive if it isn't already - otherwise
transcoding will fail.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1418
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
2020-03-03 15:17:26 +00:00
Louis-Francis Ratté-Boulianne
2d32248f49 panfrost: fix transform feedback
Fix different use cases for transform feedback by setting:

 - PIPE_CAP_PACKED_STREAM_OUTPUT=0
 - PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED=1
 - PIPE_CAP_PSIZ_CLAMPED=1

This is enough for all dEQP xfb-related test cases to run
successfully.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> (Update dEQP expectations)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
585a21ceca gallium: add PIPE_CAP_PSIZ_CLAMPED
This new capability indicates that the point size has been clamped.
This also means that the gl_PointSize has been modified and that
its value should be lowered for transform feedback, if needed.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
babf7357d2 gallium: add PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED
This new capability indicates that the nir_lower_viewport_transform
pass is enabled. This also means that the gl_Position value is
modified and should be lowered for transform feedback, if needed.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
4ce339e741 gallium: add PIPE_CAP_PACKED_STREAM_OUTPUT
Setting this cap to 0 (default is 1) should disable packing
optimization for stream output (e.g. GL transform feedback captured
variables).

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
82dc149254 glsl/linker: add xfb workaround for modified built-in variables
Some lowering passes modify the value of built-in variables in
order for drivers to work properly. However, modifying such values
will also break transform feedback as the captured value won't
match what's expected.

For example, on some hardware, the vertex shaders are expected to
output gl_Position in screen space. However, the transform
feedback captured value is still supposed to be the world-space
coordinates (see nir_lower_viewport_transform).

To fix that, we create a new variable that contains the
pre-transformation value and use it for transform feedback instead
of the built-in one.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
4a329bea44 glsl/linker: handle array/struct members for DisableXfbPacking
When varying packing is disabled for transform feedback and a xfb
declaration points to an array element or structure member, the
element/member should be aligned to the start of a slot as well.
If that's not the case, a new varying is created and the
element/member value is copied.

There might a way to further optimize the number of slots allocated
or the number of copies necessary if the performance cost is
problematic. For example, in cases where simply padding the top
level variable might correctly align all the captured values.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Louis-Francis Ratté-Boulianne
00746fa2da glsl/linker: add DisableTransformFeedbackPacking workaround
Some drivers (e.g. Panfrost) don't support packing of varyings when
used for transform feedback. This new constant ensures that any
varying used for xfb is aligned at the start of a slot and won't be
packed with other varyings.

Scenarios where transform feedback declarations are related to an
array element or a struct member will be handled in a subsequent
patch.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> (Fix order of arguments to varying_matches())
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
2020-03-03 12:28:23 +00:00
Rhys Perry
8b361df9cf spirv: fix memory_barrier_tcs_patch emission
Shouldn't affect any driver, since all currently implement
memory_barrier_tcs_patch as a no-op. It also looks like optimizations are
fine

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
2020-03-03 11:49:40 +00:00
Rhys Perry
6d839addf9 spirv: improve creation of memory_barrier
It shouldn't check for atomic counters or return in case we also need to
create a TCS output barrier.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
2020-03-03 11:49:40 +00:00
Vasily Khoruzhick
5d713fb66e lima: don't disable tiling if there's linear modifier in list
Instead we should disable it if tiling modifier is not here and we
already do that.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
2020-03-03 09:43:18 +00:00
Samuel Pitoiset
46a8cab58b ac: rename min_vgpr_alloc to min_wave64_vgpr_alloc
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
2020-03-03 08:17:00 +01:00
Samuel Pitoiset
33faef6a34 ac: rename vgpr_alloc_granularity to wave64_vgpr_alloc_granularity
And update the value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
2020-03-03 08:17:00 +01:00
Samuel Pitoiset
9432eb3e9c ac: rename lds_size_per_cu to lds_size_per_workgroup
It's more accurate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
2020-03-03 08:16:56 +01:00
Brian Ho
69628ababb turnip: Execute main cs for secondary command buffers
Previously, we only added the secondary command buffer's draw and
draw epilogue command streams to the primary command buffer on
vkCmdExecuteCommands. However, we also need to merge the primary cs
for non-draw operations like vkCmdCopyBuffer and vkCmdBeginQuery.

Fixes dEQP-VK.memory.pipeline_barrier.host_write_transfer_src.*
and various other tests in dEQP-VK.api.command_buffers.*.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
2020-03-03 02:25:25 +00:00
Brian Ho
5715a61fa9 turnip: Promote tu_cs_get_size/is_empty to header
These will be used in tu_cmd_buffer.c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
2020-03-03 02:25:25 +00:00
Ilia Mirkin
bdf20d324b nvc0: enable EXT_texture_shadow_lod
This passes all the CTS tests for this extension.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
2020-03-02 20:01:13 -05:00
Ilia Mirkin
11a06dfd4b st/mesa: allow TXB2/TXL2 to work with cube array shadow textures
It's a bit asymmetric, but it's such a contrived use-case, and not a lot
of drivers will support it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
2020-03-02 20:00:52 -05:00
Ilia Mirkin
1d3b0b9088 nv50,nvc0: add newly added PIPE_CAP's to list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
2020-03-02 19:55:06 -05:00
Paulo Zanoni
62f7197fb5 anv: multiply the scratch space by 4 on gen9-10 like iris and i965
My understanding is that there's no reason for the scratch space
allocation to be different between iris, i965 and anv. Let's make all
the functions behave the same.

I don't know if this fixes any specific gen9 bugs, it it might since
it increases the scratch space.

v2: Rebase.
v3: Rebase.
v4: Remove redundant gen 11 check (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Paulo Zanoni
aa78801f0a intel/device: bdw_gt1 actually has 6 eus per subslice
Found by inspection, I'm not aware of any bugs caused by this typo.

According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.

v2: improve commit message, cc stable (Lionel).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Paulo Zanoni
9e5ce30da7 intel: fix the gen 12 compute shader scratch IDs
This is the same idea as "intel: fix the gen 11 compute shader scratch
IDs".

The number of EUs on TGL is not the same as ICL, but the
MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it.
Also, consider the base configuration instead of what we read from the
Kernel.

According to Mark, this fixes the following piglit tests on TGL:

    piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64
    piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64
    piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64

v2: s/ICL+/Gen11+/ (Jason).

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Paulo Zanoni
1efe139cad intel: fix the gen 11 compute shader scratch IDs
Scratch space allocation is based on the number of threads in the base
configuration, and we only have one base configuration for ICL, with 8
subslices.

This fixes an issue with Aztec on Vulkan in a machine with a
configuration that's not the base. The issue looks like a regression
from b9e93db208, but it seems things are broken since forever, just
not easily reproducible.

v2: Reimplement it using the subslices variable. Don't touch TGL.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
2020-03-03 00:36:10 +00:00
Alyssa Rosenzweig
d0c66869c1 pan/bi: Move some definitions from disasm to bifrost.h
These are generally useful outside the disassmbler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
346262ceb6 pan/bi: Structify FMA_FADD
Just to make it easier to work with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
4fe5b59a96 pan/bi: Squash LD_ATTR ops together
*whistles*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
ee957bc0f3 pan/bi: Combine LOAD_VARYING_ADDRESS instructions by type
It's all a single opcode in fact.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
36fe378f1c pan/bi: Decode ADD_SHIFT properly
Just like FMA_SHIFT, but with some bits shuffled around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
8c79c710d4 pan/bi: Identify extended FMA opcodes
When the top 3 bits of the opcode are 111, it leads to a special
extended opcode mode instead.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
b51468ed9c pan/bi: Add v4i8 mode to FMA_SHIFT
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
2db454bbab pan/bi: Decode FMA_SHIFT properly
The shift-bitwise ops are fairly configurable, let's decode this the
right way. Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
67bbaddf7d pan/bi: Move notes on ADD ops to notes file
Again, we'd like to see just the opcode table more clearly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
7c96bd2dc5 pan/bi: Introduce CSEL4 class
All of these "ops" are just variants on the same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
19a449e425 pan/bi: Move notes on FMA opcodes from disassembler
We're going to be shuffling around the opcode table, so let's get this
moved out first.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
dff83476c4 pan/bi: Add ICMP.GL.NEQ op
A fused not useful to feed into `discard`.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
178d9d4269 pan/bi: Add discard ops
These run on the ADD unit and evidently need to be their own clause
(probably treated as a high-latency instruction). Like csel, they can
either do a float comparison directly or ingest a 0/1 value.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
3044a37a84 pan/decode: Skip analysis for Bifrost tiler structures
We don't understand the Bifrost at all yet, so let's just print and move
on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
acd140c2e2 pan/decode: Fix tiler weights printing
Theoretical - still always zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
3f5cd446b2 pan/decode: Restore bifrost sample_locations
Code by Connor Abbott, reverting a part of
254f40fd53 where it was removed during a
Midgard refactor.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Alyssa Rosenzweig
5815f33c6b pan/decode: Calm an assert to a pandecode error
We'd like to see what the problem actually was...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
2020-03-03 00:03:50 +00:00
Rafael Antognolli
b4ddc6139b iris: Wait for the GPU to be idle before invalidating the aux table.
An end of pipe sync seems to satisfy this restriction. It takes care of
GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Rafael Antognolli
a7de6f1321 iris: Split aux map initialization from invalidation.
We can write the aux map address only once during the batch
initialization, and then only invalidate it once we modify it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Rafael Antognolli
43dc842cb9 anv: Wait for the GPU to be idle before invalidating the aux table.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Jason Ekstrand
3ca3050de5 anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stall
v2: Do end-of-pipe sync after clear depth stencil too (Jason).
v3: Also do end-of-pipe sync before clear depth stencil too (Jason).

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Jason Ekstrand
2db471953a anv: Use a proper end-of-pipe sync instead of just CS stall
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Jason Ekstrand
ac8d412ba3 anv: Use the PIPE_CONTROL instead of bits for the CS stall W/A
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
2020-03-02 22:28:11 +00:00
Dave Airlie
bb2287ccdf gallivm/tessellator: use private functions for min/max to avoid namespace issues
Different builds are failing because of namespace collisions here.

Just fix the MS code to avoid it.

Fixes: bd0188f9ea ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2586
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
2020-03-03 07:30:07 +10:00
Ivan Molodetskikh
c376865f5e egl: allow INVALID format for linux_dmabuf
As per
fb9b2a8731,
the compositor may advertise DRM_FORMAT_MOD_INVALID as a supported
modifier. This patch makes mesa recognize this fact and allow
linux_dmabuf usage with the INVALID modifier in this case.

In case the driver doesn't support modifiers, we can still use
linux-dmabuf protocol instead of the legacy wl_drm interface to create
wl_buffers. This will help compositors to handle these buffers better.

In this commit, the INVALID modifier is allowed to be added to the list
of supported modifiers, and create_wl_buffer will be able to use
linux_dmabuf with an INVALID modifier if the compositor advertised it as
supported.

Signed-off-by: Ivan Molodetskikh <yalterz@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
2020-03-02 21:09:26 +00:00
Vasily Khoruzhick
646fbb1c4f lima: add RGBA5551 and RGBA4444 formats
We also need to set channel_layout in pp_frame reg (previously known as
foureight) depending on cbuf format.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
2020-03-02 12:48:44 -08:00
Eric Anholt
ede93a3278 ci: Add a disabled-by-default job for GLES3 testing on db410c.
Now that we have 7 (soon 8) boards available, there's capacity to be
testing GLES 3.0.  However, due to (it looks like) buffer overflows in the
driver, we end up with flaky test results: 1/60 jobs spuriously failed,
and another 6/60 jobs reported flakes.  At 6 jobs per pipeline, that's way
too high of a failure rate to enable for non-freedreno developers.  Leave
the job present but disabled so that we can do manual test runs for
regressions.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
2020-03-02 11:38:46 -08:00
Eric Anholt
5865944635 ci: Switch testing on db410c over to LAVA.
This should get us better stability of the db410c boards by having a
smaller per-board software stack, with no disks involved (just initramfs).
Additionally, the new cluster is 7 (soon 8) db410cs, while currently the
docker cluster only has 1/4 of its db410cs still running.

Unfortunately, we have to prepare the fastboot boot image during the ARM
drivers build stage, because LAVA relies on publicly available URLs for
the images to load into the bootloaders of the boards, and the only thing
we have for that is gitlab's artifacts.

Note that this testing relies on the boards being freshly flashed with the
linaro v136 firmware to pick up the initramfs size fixes and to stop the
boot at fastboot.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
2020-03-02 11:38:46 -08:00
Gert Wollny
adcb365c1d r600/sfn: Don't try to catch exceptions, the driver doesn't throw any
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
2020-03-02 20:00:26 +01:00
Gert Wollny
b66170b537 r600/sfn: Use static_cast when type is already known
In all these cases the type was tested before based, so don't use
dynamic_casts.

Closes #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
2020-03-02 20:00:23 +01:00
Gert Wollny
7780b50b7e r600/sfn: Avoid using dynamic_cast to identify type
v2: Fix typo (maurossi)

Related: #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
2020-03-02 20:00:14 +01:00
Alejandro Piñeiro
3503cb4c28 docs/features: add v3d driver
Now that we bumped the GLES version to 3.1, it makes even more sense
to include the driver here.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2507

Reviewed-by: Jose Maria Casanova <jmcasanova@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3810>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3810>
2020-03-02 15:54:40 +01:00
Albert Astals Cid
760fe44e8c aco: pass vars by const &
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
2020-03-02 13:18:49 +00:00
Daniel Stone
5469221e77 Revert "gitlab-ci: disable panfrost runners"
The infrastructure issues, caused by building electrical works gone
wrong, have been fixed, and the Panfrost LAVA runners are available
again.

This reverts commit a86662c44d.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4019>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4019>
2020-03-02 12:40:31 +00:00
Albert Astals Cid
2521c81c9e aco: Minor optimization in spill_ctx constructor
'register_demand' is passed by value and only copied once; consider moving it to avoid unnecessary copies

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
2020-03-02 12:21:03 +00:00
Samuel Pitoiset
d555794f30 radv: update entrypoints generation from ANV
It's a massive rework loosely based on ANV. This introduces separate
dispatch tables for the instance, physical device and device objects.

This will help for implementing internal driver layers for SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
2020-03-02 11:51:43 +00:00
Samuel Pitoiset
79d4d2807f radv/sqtt: add support for GFX10
All SQTT registers were moved to privileged space on GFX10, to emit
them we need a workaround with COPY_DATA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:43 +01:00
Samuel Pitoiset
eea3912451 ac/registers: add definitions for thread trace on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:39 +01:00
Samuel Pitoiset
fedbc4c929 radv/sqtt: update SPI_CONFIG_CNTL.EXP_PRIORITY_ORDER value
It should be 3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:37 +01:00
Samuel Pitoiset
36768eee9a radv/sqtt: do not assume that the number of shader engines is 4
It's not always 4, for example on RAVEN there is only one.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:35 +01:00
Samuel Pitoiset
1b565e56e9 radv/rgp: adjust trace memory/shader clocks to fix frame duration
To report microseconds instead of clocks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
2020-03-02 12:23:33 +01:00
Tapani Pälli
fbd61b3fb6 mesa/st: fix formats required for EXT_texture_norm16
Earlier commit did not take in to account that lists required for
rendering and texturing are parsed separately. This commit simply
removes formats added to the other list.

Fixes: de4eb9a3bb ("mesa/st: toggle EXT_texture_norm16 based on format support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
2020-03-02 10:53:44 +00:00
Andreas Baierl
e58bb417b5 lima: Add etc1 support
Layer stride has to be divided by 4. We also have to take care of
the array_size when returning the bo_size.

Drop the affected tests from the fails list.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
2020-03-02 10:33:06 +00:00
Uros Bizjak
37a670d76c doc: Update features.txt for r600 with misc supported features
Update features.txt with misc supported features for r600,
as reported by glxinfo for Cypress XT [Radeon HD 5870].

Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4010>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4010>
2020-03-02 08:45:18 +00:00
Lionel Landwerlin
85457e350d intel/tools/dump_gpu: fix getparam values
Don't return the pci_id for all params

Fixes: 76bf38eaf0 ("intel/tools/aub_dump: move aub file initialization to maybe_init()")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
2020-03-02 08:24:40 +00:00
Vinson Lee
1e43910aa2 meson: Enable -Wno-deprecated only for bison > 2.3.
Older versions of bison do not support the -W option.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2571
Fixes: 11a1cb2fa8 ("meson: Disable bison's -Wdeprecated since we still support old bison.")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3993>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3993>
2020-03-01 18:13:52 -08:00
Ilia Mirkin
5306b662dd mesa: fix _mesa_draw_nonzero_divisor_bits to return nonzero divisors
The bitmask is _EffEnabledNonZeroDivisor, so no need to invert it before
returning.

Fixes: fd6636ebc0 (st/mesa: simplify determination whether a draw needs min/max index)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
2020-03-01 23:16:36 +00:00
Ilia Mirkin
a86662c44d gitlab-ci: disable panfrost runners
They seem to be timing out.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4011>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4011>
2020-03-01 15:30:56 -05:00
Samuel Pitoiset
02f3af2ad1 radv: fix size of sqtt_file_chunk_asic_info on 32-bit system
The struct is actually 716 bytes, but on 64-bit systems the compiler
aligns it to 720. Add padding to make sure it's always 720.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
2020-02-29 05:54:54 +00:00
Samuel Pitoiset
33f604a331 radv: fix 32-bit build failure in radv_queue_internal_submit()
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
2020-02-29 05:54:54 +00:00
Timothy Arceri
ad094433b4 glsl: add some error checks to the nir uniform linker
These are optional for spirv but it shouldnt hurt to enable them.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
61dc9354c0 glsl: fix sampler index calculation in nir linker
Here we reset the counter to 0 for each shader stage not each program.
We also make add a flag to stop iterating over indices that have
already been processed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
ef47069cc3 glsl: reset next_image_index count for each shader stage
This fixes the image index calculation in the nir linker. We need
to reset the counter to 0 for each shader stage not each program.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
e0aa0a839f glsl: fix resizing of the uniform remap table
In the NIR linker we were not resizing the remap table correctly
for explicit locations when it was needed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
190a1ed170 glsl: set the correct number of images in a shader
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
b232a54df1 glsl: set the correct number of samplers in a shader
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Timothy Arceri
7dafc3050d glsl: fix possible memory leak in nir uniform linker
Use UniformDataSlots for the context of UniformDataDefaults rather
than UniformStorage as in some cause UniformStorage may be NULL.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
2020-02-28 23:48:46 +00:00
Jordan Justen
cf12faef61 intel/compiler: Restrict cs_threads to 64
Our current GPGPU_WALKER code only supports up to 64 threads.

On HSW we could use up to 70 and TGL up to 112, but only if the walker
is adjusted so the width does not exceed 64. Work to support this is
in progress.

Previous to this change, we might try to downgrade to SIMD8 if the
SIMD16 shader spilled. Since HSW and TGL have the max number of
threads above 64, we would then try to emit an invalid GPGPU walker
command.

Fixes: 932045061b ("i965/cs: Emit compute shader code and upload programs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2020-02-28 14:45:43 -08:00
Thong Thai
0932363489 st/va: remove unneeded code
No need to explicitly set the 10-bit buffer format as the correct
buffer format will be allocated later

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>
2020-02-28 20:16:38 +00:00
Rob Clark
8cb9f79413 freedreno/ir3: add assert
Catch problems earlier when inputs are not setup correctly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
ac705edd82 freedreno/ir3: fix assert with getinfo
Fixes:
dEQP-VK.glsl.texture_functions.query.texturesamples.sampler2dms_fixed_vertex

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
c1f4367461 freedreno/ir3: don't precolor unassigned inputs
Fixes crash seen in:
dEQP-VK.glsl.conversions.matrix_to_matrix.mat4_to_mat3x4_vertex

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
4b8e198fd2 freedreno/ir3: fix crash with samgq workaround
Need to list_delinit() before we clone the instruction to split it into
individual samgpN instructions, otherwise we get list corruption.

Tested-by: Eduardo Lima Mitev <elima@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
56565b7bba freedreno/ir3: update SFU delay
1) emperically, 10 seems like a more accurate # than 4
2) push "soft" delay handling into ir3_delayslots(), as
   we should also be using it to calculate the costs
   that the schedulers use

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
2cf4b5f29e freedreno/ir3: track half-precision live values
In schedule live value tracking, differentiate between half vs full
precision.  Half-precision live values are less costly than full
precision.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
4353b3c1c5 freedreno/ir3: don't hide latency when there is none to hide
Current scheduler thresholds try to ensure there are warps available to
switch to when hiding texture fetch latency.  But if there is none to
hide, we should allow scheduler to use more registers to reduce nops.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
9d2aaa589c freedreno/ir3: rewrite regmask to better support a6xx+
To avoid spurious sync flags, we want to, for a6xx+, operate in terms of
half-regs, with a full precision register testing the corresponding two
half-regs that it conflicts with.

And while we are at it, stop open-coding BITSET

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
c02cd8afbd freedreno/ir3: remove regmask_set_if_not()
No longer used.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
2fa64729db freedreno: honor FD_MESA_DEBUG=nogrow
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:41 +00:00
Rob Clark
bab9db6c02 freedreno/a6xx: enable SKIP_IB2_ENABLE properly
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
9724a7c105 freedreno/a6xx: don't emit YIELD packet
We don't implement the rest of this.. and it would probably cause bad
things when kernel gains support for preemption.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
45771786e4 freedreno/a6xx: whitespace fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
ae3e237db0 freedreno/a6xx: emit LRZ clear in sysmem too
Fixes rendering issues in manhattan with FD_MESA_DEBUG=nogmem

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
6b605804ea freedreno/a6xx: remove unused param
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Rob Clark
141d0d1c25 freedreno/ir3: remove from_tgsi
No longer used, other than in ir3 cmdline compiler, where it can be
replaced with a local variable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
2020-02-28 16:53:40 +00:00
Jonathan Marek
c7ac1bcea0 turnip: increase array sizes in tu_descriptor_map
Pending the descriptor rework, this allows running the follow test:
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_127

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
d195eef05d turnip: fall back to sysmem when attachments don't fit into gmem
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
de3230e0a5 turnip: remove unnecessary fb size check
Framebuffer with 0 width or height is not valid.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
cf302c9a22 turnip: don't hardcode gmem base for input attachment
Newer a6xx no longer has programmable GMEM base, so we can't rely on the
kernel driver setting it to 0x100000 (GMEM base is 0 on such GPUs).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
6420406f19 turnip: fix srgb MRT
Register packing macros makes this only set the first bit. Set to whole
dword to fix srgb for color attachments >0.

Fixes: 59f29fc8 ("turnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
8f9e1c6047 turnip: fix hw binning + render_area offset interaction
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
de33c23370 turnip: minify image_view extent
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
b18d6575fe turnip: remove unecessary MRT_CONTROL fill
Hardware won't use MRT_CONTROL after mrt_count

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
33b2db5fb9 turnip: move some constant state to tu6_init_hw
Also remove duplicates.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
7d27a9ffb3 turnip: check the right alignment requirement on shader iova
I had some trouble because I assumed this was right, tested that the
alignment requirement is actually 16.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
2020-02-28 14:04:20 +00:00
Jonathan Marek
0f0662a551 turnip: add r5g5b5a1_unorm/b5g5r5a1_unorm formats
r5g5b5a1/b5g5r5a1 tiled/ubwc is the same as a1r5g5b5 (in memory), but
linear is read as 1_5_5_5 and written with 5_5_5_1 with swap.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
2020-02-28 12:48:11 +00:00
Jonathan Marek
80ceebcdd1 turnip: rework format table to support r5g5b5a1_unorm/b5g5r5a1_unorm
These formats are an exception that can't be modeled in the current format
table. Switch to a table with only a single a6xx_format per vk format,
and deal with the exceptions separately (currently the only exception is
10_10_10_2_UNORM which has a different color format).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
2020-02-28 12:48:11 +00:00
Jonathan Marek
89c6ef4233 util/format: add missing BC4/BC5 vulkan formats
Enables these formats for turnip.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
2020-02-28 12:48:11 +00:00
Icecream95
339f127f2b panfrost: LogicOp fixes and non 8-bit format support
With the previous LogicOp commit almost half of the blend modes were
broken because the surplus bits were not cleared after an inot.

v2:
 - Remove u8 "fast path" as 8-bit is not well optimised yet
 - Don't mask for 32-bit formats as that triggers an assert

Fixes: 068806c9f6 ("panfrost: LogicOp support")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
2020-02-28 11:52:40 +00:00
Icecream95
574b03eebf nir: Allow nir_format conversions to work on 32-bit values
The constant has to changed to unsigned long long, as shifting a
32-bit value by 32 is undefined behaviour.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
2020-02-28 11:52:40 +00:00
Greg V
cf69b9635a r600: add missing <array> include
Fixes error with clang/libc++:

../src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h:69:88: error: implicit instantiation of undefined template 'std::__1::array<unsigned char, 3>'
   bool emit_alu_op3(const nir_alu_instr& instr, EAluOp opcode, std::array<uint8_t, 3> reorder={0,1,2});

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
2020-02-28 11:30:39 +00:00
Dave Airlie
eb5227173f llvmpipe: add support for tessellation shaders
This adds the hooks between llvmpipe and draw to enable tessellation shaders.

It also updates the CI results and docs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
a3257ae7be gallium/nir/tgsi: only scan fragment shader inputs for usage_mask
The scanner doesn't work with tess shaders, but we don't need it for those,
in fact only frag shaders need it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
dacf8f5f5c draw: hook up final bits of tessellation
This hooks tessellation into various parts of draw, so the
tessellation shaders are used in the correct places as the
last shader of the pipeline.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
0d02a7b8ca draw: add main tessellation code
This is the bulk of the llvm shader builders and tessellation
execution code.

TCS uses a coroutine launcher like compute shaders to handle
barriers. It executes 4-wide with one input vertex per lane.

Tessellation happens before the TES is run.

TES is just a 4-wide launcher, one per primitive is executed,
with one lane per tessellation coordinate input.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
76daf893ea draw: add JIT context/functions for tess stages.
This adds the initial draw_tess.h with a define needed
for the interfaces. TCS input array doesn't need to handle
patch inputs so can be smaller.

The TCS context has some dummy values to align the textures/images
properly.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
3ecd496117 gallivm/nir: add tessellation i/o support.
This add support for the tessellation i/o callbacks.

Tessellation requires another level of indirect indexing,
and allows fetches from shader outputs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
70a7603b63 gallivm/tgsi/swr: add mask vec to the tcs store
For the nir paths we want to access the mask vector to only
store when the mask allows it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
87359d68a9 gallivm/nir: align store_var param order with load_var
This was ugly so align load/store to have mostly the same
parameter ordering

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
7898e37fb4 gallivm/nir: add support for tess system values
hooks up the tessellation specific system values in the NIR paths

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
c632d806cb gallivm/nir: split out 64-bit splitting code
This just lets it be reused for tess later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Dave Airlie
bd0188f9ea gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.
This adds the same tessellator code that swr uses, swr should
move to using this copy, unfortunately that wasn't trivial on my first
look.

The p_tessellator wrapper wraps it in a form that is a useful interface
for draw.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
2020-02-28 18:33:34 +10:00
Samuel Pitoiset
bf16ff3172 radv: allow to capture SQTT traces with RADV_THREAD_TRACE=<start_frame>
This is pretty basic (and a bit crappy at the moment). I think we
might want some sort of overlay in the future and also be able to
trigger captures with F12 or whatever.

To record a capture, set RADV_THREAD_TRACE to something greater than
zero (eg. RADV_THREAD_TRACE=100 will capture frame #100). If the
driver didn't crash (or the GPU didn't hang), the capture file
should be stored in /tmp.

To open that capture, use Radeon GPU Profiler and enjoy your
profiling times with RADV! \o/

Note that thread trace support is quite experimental, only GFX9 is
supported at the moment, and a bunch of useful stuff are still missing
(shader ISA, pipelines info, etc). More is comming soon.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:11:11 +01:00
Samuel Pitoiset
ed0c852243 radv: add initial SQTT files generation support
SQTT is also a file format (.rgp extension) that can be consumed
by Radeon GPU Profiler for profiling purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:11:07 +01:00
Samuel Pitoiset
b3ef07db96 radv: emit thread trace markers after every draw/dispatch call
Thread trace markers (also called events in Radeon GPU Profiler)
should be emitted after every draw/dispatch calls to collect data.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:11:02 +01:00
Samuel Pitoiset
768d4f0551 radv: add initial SQ Thread Trace support for GFX9
SQTT is a hardware block that collects thread trace data (like
wave occupancy, timings, etc) for every draw/dispatch calls.

It's only supported on GFX9 at the moment but I will add other
generations support soon.

This is the first step towards profiling with RADV!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:55 +01:00
Samuel Pitoiset
94099ee642 radv: add a small helper that allows to submit internal CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:53 +01:00
Samuel Pitoiset
dbbf49c8f3 ac/registers: add definitions for thread trace
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:51 +01:00
Samuel Pitoiset
3de4f6c9f0 ac: add more fields to ac_gpu_info
For RGP traces.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
2020-02-28 08:10:37 +01:00
Eric Anholt
3c7c021ffc ci: Enable -Werror on meson-vulkan and meson-testing.
I want to make sure that I don't introduce warnings in turnip where we
have active work going on, and I also want to make sure that the drivers
we care about testing are warnings-clean.

As with the previous -Werror change, this is for CI only and doesn't
affect end-user builds.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
2020-02-27 21:59:34 -08:00
Eric Anholt
b9773631d3 aco: Fix signed-vs-unsigned warning.
The previous instance of this comparision was 1u to avoid the warning, fix
this one too.

Fixes: dba71de5c6 ("aco: only create parallelcopy to restore exec at loop exit if needed")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
2020-02-27 21:59:31 -08:00
Marek Olšák
2976ae2717 gallium/u_vbuf: silence a warning by using unreachable
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
ad192385e3 mesa: fix 11 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
6d7b076166 nir: fix 5 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
0e25746dde gallivm: fix 5 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
d18d07c9d7 nir: replace GCC unroll with an option that works on GCC < 8.0
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
2020-02-27 22:53:12 -05:00
Marek Olšák
1a61a5b1d4 mesa: fix incorrect prim.begin/end for glMultiDrawElements
This has no effect on Gallium, but it affects tnl.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
a1f4023443 mesa: optimize glMultiDrawArrays, call Draw only once (v2)
v2: use the macros

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
e636a062f1 mesa: don't unroll glMultiDrawElements if one count is 0
let the driver skip or submit an empty draw call.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
4c5cd113b8 mesa: clean up glMultiDrawElements code, use alloca for small draw count (v2)
v2: use calloc, add reusable macros

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de> (v1)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
b78ab9c741 mesa: move num_instances and base_instance out of _mesa_prim
They are never used by multi draws and internal draws.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
aaa758d3dd mesa: remove redundant _mesa_prim::is_indexed
Instead, check (ib != NULL) like all other drivers.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
0c9850e55d mesa/i965: remove _mesa_prim::indirect_offset
Only i965 was using it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
f55ae2cdbe gallium/u_threaded: convert dividing by index_size to a bit shift
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
28d75fc286 gallium/u_threaded: fix uploading user indices with start != 0
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
c9e4dc8d5e gallium: pass cso_velems_state into cso_context instead of pipe_vertex_element
This removes one memcpy from the CSO hashing code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
6c90e39a5b gallium/cso_hash: inline struct cso_hash_data
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
505cd5f12b gallium/cso_hash: pack cso_node better
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
950ee0a370 mesa: remove unused "indirect" parameter from Driver.Draw
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Marek Olšák
9556805ac4 i965: stop using "indirect" parameter from Driver.Draw (non-indirect)
The parameter will be removed.

v2: added UNUSED, removed "!!"

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
2020-02-28 00:53:45 +00:00
Caio Marcelo de Oliveira Filho
dab7a4d82c anv: Remove unused field urb.total_size
This was used before the URB calculation functions were shared by GL
and Vulkan.  Also drop the substruct for the remaining, `l3_config` is
a good name on its own.

Also-written-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
2020-02-27 14:45:10 -08:00
Alyssa Rosenzweig
0bb25e4713 pan/midgard: Use address analysis for globals, etc
..instead of opencoding for constants and doing the rest as ALU.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
f5401cb886 pan/midgard: Add address analysis framework
Midgard has the ability to calculate addresses as part of the load/store
pipeline. We'd like to make use of this to avoid doing this work on the
ALU pipes. To do so, when emitting globals/SSBOs/shareds, we walk the
tree looking for address arithmetic to try to parse out something the
hardware can work with, letting the original instructions be DCE'd
ideally. This analysis is done at the NIR level to properly account for
some messy details of vectorization which we'd rather not poke at the
backend level. (Originally I wrote this as a MIR pass but I'm fairly
sure it was wrong.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
658541a745 pan/midgard: Force address alignment
I thought we already had this but... maybe not..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
93ca47e046 pan/midgard: Round up bytemasks when promoting uniforms
Fixes crashes with uniform promotion in certain mixed type
circumstances.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
fd888d351f pan/midgard: Fix load/store argument sizing
The swizzles are as-if they were 32-bit regardless of the bitness of the
operation, but the source sizes can and do change depending on the
flags. Account for this in the analysis.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
ee47ce6ac3 pan/midgard: Add LDST_ADDRESS property
Many load/store ops (used for globals, SSBOs, shared memory, etc) have
the ability to compute addresses directly. Mark off which ones behave
like this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
1a2bb78840 pan/midgard: Extract nir_ssa_index helper
In case we don't have a nir_src.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
4e60dc8f48 pan/midgard: Partially fix 64-bit swizzle alignment
When mixing 32/64-bit, we need to align the 32-bit registers to get the
required alignment. This isn't quite enough yet, though, since user
swizzles could bypass and will need to be lowered to 32-bit moves
(outstanding todo).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
9c59f9f379 pan/midgard: Allow fusing inverted sources for inverted ops
It doesn't make a difference to the actual algorithm, so let's get rid
of them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
21c578027f pan/midgard: Allow inverted inverted ops
We'd like to transform `inand.not` back to `iand` and so forth.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Alyssa Rosenzweig
995e437105 panfrost: Increase SSBO/image limit from 4->8
Fixes an error compiling some shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
2020-02-27 21:02:35 +00:00
Jonathan Marek
1046d73af1 etnaviv: disable INT_FILTER for ASTC
Tested on GC3000: INT_FILTER bit is incompatible with ASTC formats.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
2020-02-27 20:31:45 +00:00
Caio Marcelo de Oliveira Filho
811990dc1c anv: Remove unused field xfb_used from anv_pipeline
Since we only use xfb_info for GEN >= 8, make the ifdef cover that
local variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
2020-02-27 10:44:11 -08:00
Eric Anholt
33f38605e9 ci: Include db410c support in the ARM container.
I'm working on moving the db410c CI from docker to LAVA, which means we
get to boot a custom kernel.  To do that, we need to enable ARCH_QCOM in
the kernel, save the dtb around, and include abootimg in our container so
that we can generate combined kernel/dtb/ramdisk images for fastboot.

LAVA's fastboot support is unable to pack the overlay into an abootimg
image, just a cpio rootfs.  We could flash the cpio rootfs after overlay
addition, but that takes 2 minutes to do, and causes wear on the devices.
Instead, we'll bring up the network at boot and use wget to fetch the
overlay.  We'll want network support anyway, so that we can transfer the
failure xmls back to the gitlab job's artifacts at some point.

Since the msm GPU and realtek network firmware increase our payload by
3MB, add in firmware compression so that it doesn't waste as much RAM on
devices not using it.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:26 -08:00
Eric Anholt
20659f1894 ci: Shrink the arm64 kernel build a bit.
No sense building some of these subsystems for just testing the GPU.
Saves some container rebuild time and kernel contents to move around.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:24 -08:00
Eric Anholt
9ed6c1be6b ci: Stop disabling ACPI in the LAVA arm64 kernel build.
I can't figure out why, but it's necessary to get QCOM_CLK_APCS_MSM8916
for db410c.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:22 -08:00
Eric Anholt
257415863b ci: Remove LLVM from ARM test drivers.
The LLVM libraries were a significant fraction of the entire payload
(55M/250M uncompressed) into the initramfs of the test boards, but
LLVM is only used for the draw module used in select/feedback (which
isn't even tested in CI on ARM yet).

Assume that llvmpipe draw is safe enough for ARM given the coverage on
x86, and disable LLVM for these jobs.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:19 -08:00
Rohan Garg
9c0bbba856 ci: Split out radv build-testing on arm64
radv needs libllvm which increases our ramdisk size
significantly. Since this driver is only build tested,
we can split it out into a separate job.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
2020-02-27 09:36:16 -08:00
Tomeu Vizoso
ebfa899089 gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.*
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:57 +01:00
Tomeu Vizoso
17d775ca5d gitlab-ci: Remove GLES3 test from Panfrost fails list
Seems to have been fixed recently.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:52 +01:00
Tomeu Vizoso
1fa987ae5e gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost
We can drop now the GLES version overrides now that we have a DEBUG flag
that enables all what is expected from a GLES 3.0 implementation.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:33 +01:00
Alyssa Rosenzweig
5491a13be9 panfrost: Add PAN_MESA_DEBUG=gles3 option
This enables experimental GLES3.0 support without ES3.1/2 hacks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:28 +01:00
Alyssa Rosenzweig
f5b6dfcb18 panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART
It works just fine, we just forgot to expose the CAP.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:23 +01:00
Alyssa Rosenzweig
2fea44c636 panfrost: Simplify stack shift calculation
I'm not sure why I never saw smaller values, but here you go.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:17 +01:00
Alyssa Rosenzweig
40fd1f9da4 panfrost: Reserve an extra page for spilling
I'm not sure what this is for, but the blob does it and I'd rather not
poke farther than needed into hardware-internal details.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:11 +01:00
Alyssa Rosenzweig
f37cec3275 panfrost: Default to 256 threads for TLS
I'm not sure where I got the impression 1024 was the right number. From
kbase:

   #define THREAD_MT_DEFAULT 256

(where MT = "max threads" and the threads to allocate for TLS is <= max
threads). Let's cut out memory footprint for spilling by 75% :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:05 +01:00
Alyssa Rosenzweig
f6ca7ea551 panfrost: Fix param getting
....Oops....

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:32:00 +01:00
Alyssa Rosenzweig
4a10cfab76 panfrost: Don't set shared->unk0
This field controls the size of per-thread temporaries (somehow this is
separate from the regular stack for register spilling..), though I'm not
certain on the details. Regardless this value of 0x1e despite being used
in places by the blob seems wrong and is interfering with correct sizing
of the stack.

We don't use non-spilling scratchpad yet, so this is just here to fix
some details of spilling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:54 +01:00
Alyssa Rosenzweig
febabb0502 panfrost: Update spilling comment framebuffer->shared
All of this should apply equally with compute shaders, as far as I know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:48 +01:00
Alyssa Rosenzweig
03822a27e6 panfrost: Fix padded_vertex_count generation
These two cases were flipped from the notes, leading to underestimates
of the padded vertex count, manifesting as visual corruption (random
geometry messed up). This issue was raised when noticing the corruption
went away when dramaticlaly oversizing max_index on an instanced indexed
draw, and then checking that padded_count >= vertex_count -- which
turned out *not* to be the case on certain inputs, a clear issue. Hence
looking into this routine...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:42 +01:00
Alyssa Rosenzweig
23c8597172 panfrost: Fix gl_VertexID/InstanceID
Fixes a bunch of tests in dEQP-GLES3.functional.instanced.*.

Fixes: 027944c7c8 ("panfrost: Avoid reading GPU memory when packing
vertices")

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:37 +01:00
Alyssa Rosenzweig
a0b90b45a9 pan/midgard: Don't spill near a branch
Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:32 +01:00
Alyssa Rosenzweig
ed52855680 pan/decode: Dump scratchpad size if present
This will help us narrow the size required for thread local storage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
2020-02-27 16:31:06 +01:00
Alyssa Rosenzweig
d385c5840f panfrost: Implement index buffer cache
For index bufer resources (not user index buffers), we're able to cache
results. In practice, the cache works pretty dang well. It's still
important that the min/max computation is efficient (since when the
cache misses it'll run at draw-time and we don't want jank), but this
can eliminate a lot of computations entirely.

We use a custom data structure for caching. Search is O(N) to the size
but sizes are capped so it's effectively O(1). Insertion is O(1) with
automatic oldest eviction, on the assumption that the oldest results are
the least likely to still be useful. We might also experiment with other
heuristics based on actual usage later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
2020-02-27 10:30:48 +00:00
Alyssa Rosenzweig
12db69aa3f panfrost: Combine get_index_buffer with bound computation
These operations are intertwined since there are optimizations that will
want to "double dip". In particular for user index buffers we'd want to
upload simultaneous with index computation. For resources we'd like to
keep resource related code together.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
2020-02-27 10:30:48 +00:00
Leo Liu
e272b110bb radeon/jpeg: fix the jpeg dt_pitch with YUYV format
The dt_pitch should be same as NV12 format from decoder views,
and it finally got corrected with gfx9 surface's fixes from MR
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3738

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:35 +01:00
Pierre-Eric Pelloux-Prayer
5bc71e1bac st/va: add support YUY2
YUY2 is a duplicate of YUYV and is used by gstreamer for 4:2:2.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:35 +01:00
Pierre-Eric Pelloux-Prayer
d2e715e57a st/va: enable 4:2:2 chroma format
Everything is in place to support them.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:35 +01:00
Pierre-Eric Pelloux-Prayer
69aadc4933 radeonsi: fix surf_pitch for subsampled surface
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.

For subsampled formats like uyvy (bpe is 2) this breaks in various places:
 - sdma copy
 - video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363)
   when the vl_compositor_gfx_render method is used

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
c4197fbcdd gallium/vl: add 4:2:2 support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2363
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
24f2b0a856 gallium/video: remove pipe_video_buffer.chroma_format
chroma_format depends on buffer_format so use the format_to_chroma_format
helper instead of storing it next to buffer_format.
This avoids bugs where one value is changed without updating the other.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
87807298a3 format: add format_to_chroma_format
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer
fb29f0847f radeonsi: test subsampled format in testdma
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
2020-02-27 10:01:31 +01:00
Samuel Pitoiset
9e5d2a73c5 ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
The hardware doesn't flush denorms, exactly like fmin/fmax, so
we have to do it manually. This doesn't fix anything known.

Fixes: d6a07732c9 ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
2020-02-27 08:04:33 +01:00
Samuel Pitoiset
30ac733680 ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
16-bit med3 is only supported on GFX9+.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.

Fixes: d6a07732c9 ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
2020-02-27 08:04:30 +01:00
Samuel Pitoiset
50b8c25274 ac/llvm: fix 64-bit fmed3
Lower 64-bit fmed3 because LLVM doesn't expose an intrinsic.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f64.*.

Fixes: d6a07732c9 ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
2020-02-27 08:04:28 +01:00
Mathias Fröhlich
636656bcd7 mesa: Flush vertices before changing the OpenGL state.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
2020-02-27 06:58:56 +01:00
Mathias Fröhlich
4a54f8cd2c mesa: Check for OpenGL state change before flushing vertices.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
2020-02-27 06:58:49 +01:00
Dave Airlie
2b155b1086 gallivm/nir: handle mod 0 better.
I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.

Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
2020-02-26 23:20:01 +00:00
Dave Airlie
5370c685da gallivm/nir: fix integer divide SIGFPE
Blender was crashing with a SIGFPE even though the divide by 0
logic was kicking in. I'm not sure why TGSI doesn't get into this state.

The problem was is the numerator was INT_MIN we'd replace the div by
0 with a divide by -1, which is an exception for INT_MIN as INT_MIN/-1
== INT_MAX + 1 (too large for 32-bits). Instead for integer divides
just replace the mask values with 0x7fffffff. Also fix up the
result handling so it aligns with TGSI usage. (gives 0)

Fixes: c717ac1247 ("gallivm/nir: wrap idiv to avoid divide by 0 (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
2020-02-26 23:20:01 +00:00
Dave Airlie
954cf8e86b gallivm/tgsi: fix stream id regression
This broke TGSI GS shaders with llvmpipe, it wasn't looking at the
right immediates and it should be cast to an integer type.

Fixes: 163d5fde06 (gallium/swr: Enable GL_ARB_gpu_shader5: multiple streams)

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Acked-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
2020-02-26 22:33:18 +00:00
Marek Olšák
4449611ffb mesa: call FLUSH_VERTICES before updating CoordReplace
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
2020-02-26 22:10:35 +00:00
Marek Olšák
aae09ffb6e mesa: remove leftovers from ARB_shadow_ambient
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
2020-02-26 22:10:35 +00:00
Albert Astals Cid
d988061172 cube_face_index: Use fabsf instead of fabs since we know it's floats
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
2020-02-26 21:47:01 +00:00
Albert Astals Cid
6db7467b59 cube_face_coord: Use fabsf instead of fabs since we know it's floats
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
2020-02-26 21:47:01 +00:00
Rafael Antognolli
a70a605ad6 iris: Apply the flushes when switching pipelines.
Even though the workaround description says:

   "all the listed commands are non-pipelined and hence flush caused due
   to pipeline mode change must not cause performance issues..."

My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.

Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.

Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
                 state)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
2020-02-26 21:16:24 +00:00
Marek Olšák
f6d1dd34d7 gallium/hash_table: remove some function wrappers
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
502840855a gallium/hash_table: turn it into a wrapper around util/hash_table
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
10d235a843 gallium/hash_table: use the same callback signatures as util/hash_table
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
76dff2fabe gallium/hash_table: consolidate hash tables with FD keys
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Marek Olšák
a01a875081 gallium/hash_table: consolidate hash tables with pointer keys
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
2020-02-26 20:35:50 +00:00
Greg V
56f31328f2 amd/addrlib: fix build on non-x86 platforms
regparm(0) attribute does not work on aarch64 (and presumably powerpc64 and others).
Default to not specifying any calling convention on non-amd64/i386 platforms.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
2020-02-26 20:10:52 +00:00
Marek Olšák
c798aae739 tgsi_to_nir: set num_images and num_samplers with holes correctly
This fixes the copy_uv shader from st/omx, because it uses image 0 and 2
and image 1 isn't declared.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
2020-02-26 19:49:25 +00:00
Jason Ekstrand
349898a967 nir: Drop nir_tex_instr::texture_array_size
It's set by lots of things and we spend a lot of time maintaining it but
no one actually uses the value for anything useful.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
2020-02-26 18:29:49 +00:00
Eric Anholt
ec2f905ca8 freedreno/computerator: Fix defined-but-not-used warnings from lex/yacc.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
2020-02-26 17:20:24 +00:00
Eric Anholt
bd53f4f56b turnip: Fix compiler warning about casting a nondispatchable handle.
Fixes: 1c5d84fcae ("turnip: hook up cmdbuffer event set/wait")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
2020-02-26 16:58:50 +00:00
Tomeu Vizoso
ebd071d8cf gitlab-ci: Move to 5.5 kernel plus fixes for Panfrost
There's two fixes that help with stability when running dEQP on Kevin
Chromebooks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
2020-02-26 14:03:04 +01:00
Tomeu Vizoso
ae5e6406df panfrost: Remove some more prints to stdout
They can confuse test runners.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
2020-02-26 14:02:59 +01:00
Tomeu Vizoso
fcd8308b28 gitlab-ci: Run GLES3 tests in dEQP on Panfrost
We are able to run only 1/5th of the tests in around the same time that
dEQP-GLES2 takes, so do that for now while more DUTs are installed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
2020-02-26 14:02:25 +01:00
Tapani Pälli
de4eb9a3bb mesa/st: toggle EXT_texture_norm16 based on format support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2556
Fixes: 7f467d4f73 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
2020-02-26 11:12:59 +00:00
Tapani Pälli
200a83a983 i965: toggle on EXT_texture_norm16
Fixes: 7f467d4f73 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
2020-02-26 11:12:59 +00:00
Tapani Pälli
dc531869a9 mesa: introduce boolean toggle for EXT_texture_norm16
Fixes: 7f467d4f73 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
2020-02-26 11:12:59 +00:00
Juan A. Suarez Romero
784c454607 nir/lower_double_ops: add note for lowering mod
Add a note to clarify that while Vulkan allows mod(x,y) to be in [0, y]
range, OpenGL does not allow it, so the lowering ensures the result is
always in [0, y) range, as this lowering is shared by the Vulkan and
OpenGL implementation.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
2020-02-26 10:46:06 +00:00
Samuel Pitoiset
d2e4435c20 radv: fix creating null devices if KHR_display is enabled
Found this while replaying pipelines with Fossilize, it worked
fine with vkpipeline-db.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
2020-02-26 10:28:46 +00:00
Andreas Baierl
ef0abe5404 gitlab-ci: Add add a set of lima flakes
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
2020-02-26 10:12:45 +00:00
Samuel Pitoiset
4c03d20396 radv: make use of ac_gpu_info::max_wave64_per_simd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
9204ad70f2 radv/gfx10: adjust the number of VGPRs used to compute waves
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
568f150409 radv/gfx10: adjust the LDS size used to compute waves
It's 128KB per CU in WGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
ea91b15a31 radv/gfx10: adjust SGPRs/VGPRs related info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
a6df3ef6ec radv/gfx10: adjust the number of simd per compute unit
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
09d8726187 ac: add more ac_gpu_info related shader fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
974c87e449 ac,radeonsi: add ac_gpu_info::lds_size_per_cu
Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
2020-02-26 07:58:47 +00:00
Samuel Pitoiset
cd6ec2b1ab radv: implement a dummy winsys for creating devices without AMDGPU
To allow developers to test the compiler backends without having
any AMD GPUs. To create a null device, set eg.
RADV_FORCE_FAMILY=polaris10 in your environment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
2020-02-26 08:09:46 +01:00
Mathias Fröhlich
f280c00ba6 egl: Factor out dri2_add_pbuffer_configs_for_visuals {device,surfaceless}.
v2: dri2_add_configs_for_visuals -> dri2_add_pbuffer_configs_for_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
2020-02-26 06:53:50 +01:00
Mathias Fröhlich
d32c458de7 egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.
The __DRI_IMAGE_FORMAT_* part wants to be handled for the *101010
type formats as well. Factor out a common function for that task.
That again makes the piglit egl_ext_device_base test work again
for hardware drivers.

v2: Factor out a common function for that task.
v3: dri2_pbuffer_visuals -> dri2_pbuffer_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 9acb94b623 "egl: Enable 10bpc EGLConfigs for platform_{device,surfaceless}"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
2020-02-26 06:53:46 +01:00
Jonathan Marek
87924646db turnip: enable fullDrawIndexUint32/independentBlend/dualSrcBlend/logicOp
These are already implemented but missing from VkPhysicalDeviceFeatures.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
2020-02-26 00:21:45 +00:00
Jonathan Marek
708c3a5ffd turnip: enable sampleRateShading feature
There's still a TODO related to key->sample_shading, but it doesn't look
like it changes anything in ir3, so it works without that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
2020-02-26 00:21:45 +00:00
Matt Turner
cb166aea24 intel/tools: Do not print type/qualifiers/name for c_literal
External tools may wish to choose their own type, qualifiers, and name,
so do not emit our own.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
5feea40889 intel/tools: Allow i965_disasm to disassemble c_literal input type
Added extra argument named 'type' which can be 'bin' (default if
ommited) or 'c_literal' for input type.

Change 'binary-path' argument name to 'input-path'.

v2:
- Use util_dynarray for assembly (Matt Turner)
- Read data in 8 bytes chunk (Matt Turner)
- Fix help option (Akeem Abodunrin)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
2f83daedb1 intel/tools: Print c_literals 4 byte wide
We already print hex value a byte wide, instead of printing c_literal
byte wide, we can print it 4 byte wide, which gives us 2 different
combinations.

v2: Fix the aliasing issue (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
0b0e958f4f intel/tools: Add test for state register as source
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
31c29f4f55 intel/tools: Add test for address register as source
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
9526e5c359 intel/tools: Set correct address register file and number in i965_asm
We need to use already created brw_reg and set correct file type,
register number and sub register number.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
87d9e78f26 intel/tools: Handle STATE_REG in typed source operand
Also stop using brw_sr0_reg function as it return new brw_reg, we
already created register, all we have to is just set file, register
number and subnr.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Sagar Ghuge
2a75e60365 intel/tools: Handle illegal instruction
Allow assembler to handle illegal instruction even though mesa doesn't
use it but might be required at some point in future.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
2020-02-25 22:23:38 +00:00
Eric Anholt
11a1cb2fa8 meson: Disable bison's -Wdeprecated since we still support old bison.
We can't stop using deprecated keywords because we maintain support for
ancient bison.  Silence the warning so that builds are less noisy.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3868>
2020-02-25 21:45:06 +00:00
Jason Ekstrand
5dfd83d7a1 anv: Always enable the data cache
Because we set the needs_data_cache bit from the NIR during compilation,
any time a shader was pulled out of the pipeline cache, we wouldn't set
the bit and the data cache was disabled.  Fortunately, on Gen8+, this
bit is ignored because we always use the ALL section in the L3$ config
instead of separate DC and RO sections.  On Gen7, however, this meant
that we were basically never running with the data cache enabled and our
compute performance was suffering massively because of it.  This commit
improves Geekbench 5 scores on my Haswell GT3 by roughly 330% (no,
that's not a typo).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
2020-02-25 20:12:10 +00:00
Lionel Landwerlin
d4e7a11bc3 intel/aub_dump: stub the waits when overriding the device
We don't actually want to wait on anything, just complete submitting
the commands as fast as possible.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:49 +02:00
Lionel Landwerlin
31461e2379 intel/tools/aub_dump: fix crash when using the default legacy context
When execbuffer->rsvd1 == 0, the legacy context is used. Ensure we
have context created for this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:45 +02:00
Lionel Landwerlin
76bf38eaf0 intel/tools/aub_dump: move aub file initialization to maybe_init()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3705>
2020-02-25 20:56:40 +02:00
Icenowy Zheng
3569215d49 lima: expose fragment shader derivatives capability
Support for fragment shader derivatives has landed in the Lima PP
compiler for a long time, but its capability is not exposed yet.

Expose the support now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3944>
2020-02-26 01:47:58 +08:00
Jose Maria Casanova Crespo
01496e3d1e v3d: Sync on last CS when non-compute stage uses resource written by CS
When a resource is written by a compute shader and then used by a
non-compute stage we sync on last compute job to guarantee that the
resource has been completely written when the next stage reads resources.

In the other cases how flushes are done guarantee the serialization of
the writes and reads.

To reproduce the failure the following tests should be executed in batch
as last test don't fail when run isolated:

KHR-GLES31.core.shader_image_load_store.basic-allFormats-load-fs
KHR-GLES31.core.shader_image_load_store.basic-allFormats-loadStoreComputeStage
KHR-GLES31.core.shader_image_load_store.basic-allTargets-load-cs
KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray

v2: Use fence dep instead of bo_wait (Eric Anholt)
v3: Rename struct names (Iago Toral)
    Document why is not needed on graphics->compute case. (Iago Toral)
    Follow same code pattern of the other update of in_sync_bcl.
v4: Fixed comments style. (Iago Toral)

Fixes KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
CC: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2700>
2020-02-25 11:41:44 +00:00
Andreas Baierl
5de8bc7c75 gitlab-ci: Enable the lima job again
Flaky tests should be fixed to the best of our knowledge.
Fails and skips lists should be up-to-date again.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
2020-02-25 07:45:53 +00:00
Andreas Baierl
31a8075678 gitlab-ci: lima: Add flaky tests to the skips list
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3884>
2020-02-25 07:45:53 +00:00
Marek Olšák
5ab94df0f6 nir: fix gl_nir_lower_images for bindless images
Fixes: 7342b859af

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3938>
2020-02-25 02:30:08 +00:00
Rob Clark
26d42645f9 freedreno/computerator: fix build dependency
Ensure the generated register headers are built before computerator uses
them.

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3939>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3939>
2020-02-25 02:02:06 +00:00
Dave Airlie
84395190ec glx/drisw: fix shm put image fallback
The fallback to the non-shm put path used the wrong width here
as the pixmap is still allocated in a shared segment, so the
width needs to reflect that.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Dave Airlie
246e4aeaef glx/drisw: return false if shmid == -1
If an attempt to create an shm pixmap in XCreateDrawable fails
then it ends up with the shmid == -1. This means the get image
path needs to fallback so return false in this case to use the
non-shm get image path.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Dave Airlie
8d0bab8a93 glx/drisw: add getImageShm2 path
This adds return values to the get image path, so the caller can fallback.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Dave Airlie
466a0b2e49 dri: add another get shm variant.
When Brian in 02c3dad0f3 restricted
the shm permissions it means we hit the fallback paths in some
scenarios we hadn't before.

When you use Xephyr to xdmcp from one user to another the new perms
stop the X server (running as user a) attaching to the SHM segments
from gnome-shell (running as user b).

In this case however only the GLX side of the code had insight into this,
and the dri could was meant of fall back, and it worked for put image
fine but the get image path was broken, since there was no indication
in the broken case of the need to fallback.

This adds a return type to a new interface member that lets the
caller know it has to fallback.

Fixes: 02c3dad0f3 ("Call shmget() with permission 0600 instead of 0777")

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3823>
2020-02-25 01:23:01 +00:00
Eric Anholt
a91067d3f5 ci: Blacklist another freedreno flaky test.
This is the recurring flake from the last week, including spuriously
failing a pipeline once.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3937>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3937>
2020-02-25 01:07:14 +00:00
Jason Ekstrand
6fbe3f40a9 intel/isl: Add isl_aux_info.c to Makefile.sources
This should fix the Android build.

Fixes: 58d4749e56 "isl: Add a module which manages aux resolves"
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3934>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3934>
2020-02-25 00:41:15 +00:00
Rafael Antognolli
9ab0e92cff intel/blorp: Implement GEN:BUG:1605967699.
v2:
 - Update comments and refactor code (Lionel).
 - Only apply workaround to stencil resolves.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3909>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3909>
2020-02-25 00:04:36 +00:00
Erik Faye-Lund
36515e295c gallium/util: remove unused debug_print_foo helpers
These are unused, so let's just get rid of them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
2020-02-24 23:07:57 +00:00
Erik Faye-Lund
dfea933a2a gallium/util: do not use debug_print_format
These are the only two places we use this macro, and it's no longer very
gallium-specific. So let's get rid of this, and just use debug_printf
and util_format_name directly instead.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
2020-02-24 23:07:57 +00:00
Erik Faye-Lund
5f0b984cb8 util: move debug_memory_{begin,end} to os_memory_debug.h
This is where the other debug_memory_* functions are declared, so let's
move it here for symmetry.

This allows us to drop an include of u_debug_gallium.h, which makes us
depend on gallium-headers in non-gallium code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3901>
2020-02-24 23:07:57 +00:00
Jonathan Marek
31a7815785 hud: add GALLIUM_HUD_SCALE
Scale hud by an integer factor, for high DPI displays.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3931>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3931>
2020-02-24 22:53:09 +00:00
Jonathan Marek
0ee76b90d5 turnip: move tile_load_ib/sysmem_clear_ib into draw_cs
Avoids having to calculate reserved sizes for substream cs, also matches
what the blob does.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:46 +00:00
Jonathan Marek
a410e64b68 turnip: make cond_exec helper easier to use
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:46 +00:00
Jonathan Marek
6ede9749d2 turnip: remove marker seqno
Use robclark's new crashdec/devcoredump thing instead.

Note: not sure this ever really worked because it didn't WFI.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Jonathan Marek
cf94124e1c turnip: automatically reserve cmdstream space in emit_pkt4/emit_pkt7
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Jonathan Marek
4b2a7dcd93 turnip: add tu_device pointer to tu_cs
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Jonathan Marek
a9a990a60b turnip: fix COND_EXEC reserved size in tu_query
Conditionally executed dwords must be in the same bo.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3925>
2020-02-24 21:52:45 +00:00
Rob Clark
2275343ba3 freedreno/computerator: add computerator
A standalone tool to compile and run compute shaders from ir3 assembly.
Mostly to have an easy way to experiment with instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
568e948d1f freedreno/ir3: allow block->predecessors to be null
This way we can also use ir3_print from computerator, which mostly
bypasses the ir3_block construct (since it doesn't need to do
scheduling, etc)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
f87d412f08 freedreno/computerator: rename prefix asm->ir3
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
6ee68d796e freedreno/computerator: polish out some of the rust
Updates for differences between fdre-a3xx's early version of ir3, and
what we have now in mesa.  And updates for instruction name and syntax
changes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Rob Clark
3bb340cf4f freedreno/computerator: import parser/lexer from fdre-a3xx
Import the rusty old parser from freedreno.git

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3926>
2020-02-24 21:31:53 +00:00
Icenowy Zheng
6499738d3d lima: remove its hash table entry when invalidating a resource
When a resouce is already invalidated, its hash table entry becomes
useless. In addition, the lima_job_free() function won't remove the hash
table entry for invalidated resource. So the hash entry should be
removed when invalidating the resource, otherwise bogus hash entry might
be left in the table, and when the resource is reused in another job,
the code will find the freed job when invalidating and thus result in crash.

Fixes: c64994433c ("lima: track write submits of context (v3)")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3917>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3917>
2020-02-24 20:53:31 +00:00
Caio Marcelo de Oliveira Filho
956e4b2d37 nir, intel: Move use_scoped_memory_barrier to nir_options
This option will be used later by GLSL, so move to a common struct.

Because nir_options is filled in the compiler instead of the Vulkan
driver, fix that up.  GLSL will ignore that for now.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Caio Marcelo de Oliveira Filho
6be766336a nir/tests: Use nir_scoped_memory_barrier() helper
Most of the vars tests already had a local helper, so just drop it in
favor of the one in nir_builder.  Remaining two tests changed to use
the helper.

The load_store_vectorizer tests were using the specific memory
barriers, but since scoped barriers are also handled, prefer that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Caio Marcelo de Oliveira Filho
6ff898a653 nir: Add the alias NIR_MEMORY_ACQ_REL
This will help upcoming C++ code that will have to combine those two
semantics.  In C++ it is not possible to do this without a cast or
adding an operator| to the enum.  Since having the short form will
also be convient to C, we picked the former solution.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Caio Marcelo de Oliveira Filho
424737da3e nir/builder: Add nir_scoped_memory_barrier()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3913>
2020-02-24 19:12:11 +00:00
Eric Anholt
e4baff9081 freedreno: Switch to using lowered image intrinsics.
This cuts out a bunch of deref chain walking that the compiler can do for
us.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
3e16434acd nir: Move intel's intrinsic_image_coordinate_components() to core nir.
This is a query that both Intel and freedreno need to do.  We can simplify
it a lot with the new glsl_get_sampler_dim_coordinate_components()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
a703840320 freedreno/ir3: Fix the arg to ir3_get_num_components_for_image_format()
GLuint worked fine for storing our enum, but it should be an enum
pipe_format since the image-formats merge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
8aa54e6ed0 prog_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
b8644349d1 tgsi_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
1b7de2d6b8 freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in tex_info.
Now that we have access to the interior switch statement not going through
the txs special case for coord_components, we can just use it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
d37c6ebd3c spirv_to_nir: Reuse glsl_sampler_dim_coordinate_components().
We just needed to move the SUBPASS_MS case in, and the rest of the cases
match up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
5072719e66 glsl: Factor out the sampler dim coordinate components switch statement.
I want to reuse this in NIR image intrinsics in backends, which just have
dim/is_array.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
12cf484d02 v3d: Ask the state tracker to lower image accesses off of derefs.
This saves a bunch of hassle in handling derefs in the backend, and would
be needed for reasonable handling of dynamic indexing of image arrays.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
9c90ecf37f gallium: Add a cap for enabling lowering of image load/store intrinsics.
The deref stuff is hard to handle in a backend supporting dynamic
indexing, while the lowering can easily turn that into the same kind of
dynamic indexing we do for textures, UBOs, and SSBOs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
7342b859af nir: Make image lowering optionally handle the !bindless case as well.
iris was doing this internally, but let's rename the function and move the
iris code there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Eric Anholt
cad2d6583c nir: Rename gl_nir_lower_bindless_images.c in preparation for extending it.
The bulk of it can be reused to implement iris's internal non-bindless
image lowering, which I would like to reuse in freedreno, v3d, and
nir-to-tgsi.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
2020-02-24 18:25:02 +00:00
Nanley Chery
b62379ac6f i965: Use isl_aux_state_transition_write()
v2. Dirty shadow miptrees independent of aux. (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
b9856fbf3b i965: Use ISL's access preparation functions
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
b00e7a6485 iris: Use isl_aux_state_transition_write()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
af04779410 iris: Use ISL's access preparation functions
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
fec957900d iris: Use isl_aux_usage_has_fast_clear()
Make sure fast-clears aren't attempted or allowed for ISL_AUX_USAGE_MC.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Nanley Chery
58d4749e56 isl: Add a module which manages aux resolves
Provide a generic interface which manages aux resolves in ISL. The
feature differences between this and what's in iris is:
* Support for media compression. ISL_AUX_USAGE_MC behaves differently
  from many other usages of CCS, so it was useful to implement this
  support upfront, while designing the interfaces.
* Optimizations for full-surface writes. For example, after a
  full-surface write occurs with ISL_AUX_USAGE_CCS_E in the PARTIAL_CLEAR
  state, isl_aux_state_transition_write() returns COMPRESSED_NO_CLEAR
  instead of COMPRESSED_CLEAR.

A performance suggestion for main-surface-invalidating/replacing writes
is given as a comment instead of adding a boolean to
isl_aux_prepare_access(). This avoids extra validation and should be
simple enough for the caller to handle.

v2. Add assertions. (Jason)
v3. Use switches in 2 more functions. (Jason)
    Store aux metadata in a static table. (Jason)
    Change prepare and finish function signatures. (Jason)
    Keep isl_aux_state_transition_* functions separate.
v4. (Jason)
    Assert against resolving in AUX_INVALID.
    Rename aux_info struct to aux_usage_info.
    Drop the justification for each aux_usage_info field.
    Split out the NONE case in write function.
    Restructure tests to more easily confirm coverage.
    Rename access_compressed field to compressed.
    Make write behavior less ambiguous.
v5. (Jason)
    Add more detail above WRITES_RESOLVE_AMBIGUATE.
    Add ISL_AUX_USAGE_MC to WritesResolveAmbiguate.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
2020-02-24 18:00:05 +00:00
Kristian H. Kristensen
daa4020948 freedreno/ir3: Lower output precision
This lowers mediump FS outputs to fp16 in the ir3 backend. For now
this is a modest improvement, which mostly helps us whittle down the
full mediump work.  Once the GLSL level support lands, then right hand
side of the store output intrinsics will be fp16 expressions and we'll
cancel out the fp16 -> fp32 -> fp 16 round trip here.

We've had different attempts at implementing this: rewriting stores in
the GLSL IR, lowering GLSL IR outputs to temporaries and inserting
conversions when writing the temporaries to the outputs.  In the end,
GLSL ends up getting in the way a lot and doing it at the nir level is
easier and still possible since we have the output var precisions.

This part of the fp16 work is more of a step on the way towards full
fp16 support and will add a few extra conversion instructions:

total instructions in shared programs: 8151 -> 8163 (0.15%)
instructions in affected programs: 1187 -> 1199 (1.01%)
helped: 4
HURT: 10

total nops in shared programs: 3146 -> 3152 (0.19%)
nops in affected programs: 563 -> 569 (1.07%)
helped: 5
HURT: 10

total non-nops in shared programs: 5005 -> 5011 (0.12%)
non-nops in affected programs: 92 -> 98 (6.52%)
helped: 0
HURT: 3

total dwords in shared programs: 12832 -> 12800 (-0.25%)
dwords in affected programs: 96 -> 64 (-33.33%)
helped: 1
HURT: 0

total last-baryf in shared programs: 118 -> 115 (-2.54%)
last-baryf in affected programs: 21 -> 18 (-14.29%)
helped: 1
HURT: 0

total full in shared programs: 424 -> 417 (-1.65%)
full in affected programs: 15 -> 8 (-46.67%)
helped: 7

HURT: 0
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Kristian H. Kristensen
6c750d9c4d nir/types: Add glsl_float16_type() helper
This returns the float16 version of a float type.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Hyunjun Ko
c822460f85 freedreno/ir3: handle half registers for arrays during register allocation.
So far we only handle full regs of arrays during pre-allocation.
This patch is to handle half regs of arrays and also consider the size
of half regs when finding out conflicts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Hyunjun Ko
9e8466a866 nir: Add optimization for doing removing f16/f32 conversions
This eliminates conversions between f16 and f32 where possible. We can
always remove an upcast followed by a down cast, that is:

  f2f16 ( f2f32 (a) )  ->  a
  f2fmp ( f2f32 (a) )  ->  a

In the other direction, f2f16 loses precision and can't be undone by a
f2f32.  However, by definition it's always safe to elminate f2fmp:

  f2f32 ( f2fmp (a) )  ->  a

v2. [Neil Roberts (nroberts@igalia.com)]

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Hyunjun Ko
6ee375f68d freedreno/ir3: Add new ir3 pass to fold out fp16 conversions
This pass tries to fold f2f16 conversion into alu instructions.
This will be useful to help reduce the number of instructions once
mesa starts supporting precision lowering.  For example:

  add.f r0.w, r0.w, c0.x
  cov.f32f16 hr2.x, r0.w

to

  add.f hr2.x, r0.w, c0.x

Additionally this pass also tries to fold f2f16 conversion into load_input
instruction:

  bary.f r0.x, 3, r0.w
  cov.f32f16 hr0.x, r0.x

to

  bary.f hr1.x, 3, r0.x

v2: Edit to not fold OPC_MAX_F and OPC_MIN_F, since that's not valid.

v3: Add OPC_ABSNEG_F to the blacklist as well.

v4: Don't remove dead cov instructions, DCE will do that later; don't
iterate through sources when a cov only has one; remove special
handling of IR3_REG_ARRAY and IR3_REG_RELATIV.

v5: Handle folding into u32.u32 movs of floats correctly, don't bail
out on IR3_REG_RELATIV or IR3_REG_ARRAY movs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Neil Roberts
125f867d3d nir/opcodes: Add nir_op_f2fmp
This opcode is the same as the f2f16 opcode except that it comes with
a promise that it is safe to optimise it out if the result is
immediately converted back to a 32-bit float again. Normally this
would be a lossy conversion and so it would be visible to the
application, but if the conversion is generated as part of the mediump
lowering process then this removal doesn’t matter. The opcode is
eventually replaced with a regular f2f16 in the late optimisations so
the backends don’t need to handle it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
2020-02-24 17:24:13 +00:00
Indrajit Kumar Das
18124d7278 glapi/copyimage: Implement CopyImageSubDataNV
Implement CopyImageSubDataNV from NV_copy_image spec.
This is derived out of the existing implementation of CopyImageSubData.
It differs from CopyImageSubData in accordance with the differences
laid down in the ARB_copy_image spec.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3649>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3649>
2020-02-24 16:31:06 +00:00
Chris Wilson
ae7bda27a0 iris: Fix import sync-file into syncobj
When importing a sync-file, the kernel expects to be told which syncobj
to replace with the new fence -- it does not automatically create a new
handle for us. Abide by this rule and create a new syncobj for the
imported sync-file.

Fixes: f459c56be6 ("iris: Add fence support using drm_syncobj")
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
2020-02-24 15:43:19 +00:00
Alyssa Rosenzweig
3a310fbd0b pan/midgard: Implement load/store_shared
Shared memory is implemented almost identically to global memory from an
ISA perspective, so let's handle the new intrinsics. We include a code
path for constant offsets, which doesn't come up for globals.

Fixes dEQP-GLES31.functional.compute.basic.shared_var_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
2020-02-24 13:56:59 +00:00
Alyssa Rosenzweig
fcbb3d422e pan/midgard: Implement nir_intrinsic_get_buffer_size
We route it as a sysval. Fixes dEQP-GLES31.functional.compute.basic.ssbo_unsized_arr_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
2020-02-24 13:56:59 +00:00
Alyssa Rosenzweig
3148937ef7 pan/midgard: Lower SSBOs in NIR
We need to lower SSBOs to globals regardless. Rather than do this in our
backend like we do now, use the common NIR pass, which will support
bounds checking.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
2020-02-24 13:56:59 +00:00
Eduardo Lima Mitev
99f2b6144b turnip/pipeline: Don't assume tu_shader is a valid object
Fixes a crash in tu6_emit_fs_config() when 'shader' argument is
assumed to be non-null, which is possible.

Fixes dEQP test:

dEQP-VK.api.descriptor_set.descriptor_set_layout_lifetime.graphics

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3756>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3756>
2020-02-24 12:20:20 +00:00
Samuel Pitoiset
12a22da683 radv: add the trace BO to the BO list at submit time
Instead of adding it in every command buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3891>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3891>
2020-02-24 12:43:53 +01:00
Krzysztof Raszkowski
5e9a2c603f gallium/swr: Fix min/max range index draw
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3905>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3905>
2020-02-24 10:27:23 +00:00
Kenneth Graunke
4d57a27504 iris: Set MOCS for constant packets on Gen12+
It seems to be back, and we shouldn't use 0, as that's now considered
an error.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
2020-02-21 16:44:55 -08:00
Kenneth Graunke
4bac2fa3c6 iris: Fix BLORP vertex buffers to respect ISL MOCS settings
Fixes: a4da6008b6 ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
2020-02-21 16:44:53 -08:00
Kenneth Graunke
1cdf5abdfa iris: Make mocs an inline helper in iris_resource.h
Now that it uses ISL rather than genxml code, there's no need for it to
live as a vtable function inside the state module.  We can just make it
a static inline helper in iris_resource.h so it's available throughout
the codebase.

Fixes: a4da6008b6 ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
2020-02-21 16:44:38 -08:00
Eric Anholt
f8ab00776c ci: Remove a useless filtering of the lava logs.
We don't print every case any more, so no need to filter them out.  This
makes it so the output form "lavacli jobs logs" gets line-buffered into
"tee" and you can actually see what happened when the job is stuck but
before it times out.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
7f3f9b2b19 ci: Don't bother generating deqp junit results since we don't present it.
We disabled presentation a while back because it's so expensive for gitlab
to parse it on the other side.  We may have a use for it some day if
gitlab gets better, but for now let's not spend the time processing it.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
4c372d384a ci: Document how LAVA runners work.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
994e258122 ci: Make LAVA job fails emit the full list of unexpected test results.
When bringing up a new board or starting a new GLES version, we have a lot
of unexpected fails to document, so we need the full list in the log (not
just deqp-runner.sh's head -n 50) so we can populate the xfail list.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
54dbb55ea8 ci: Make sure that we have a proper shell prompt for LAVA.
LAVA finds a '#' early in boot and races to emit its shell commands.
Apparently for the current boards those serial commands end up getting
buffered such that things work out, but for db410c and db820c, the buffer
is lost and LAVA gets stuck waiting for the prompt.  By setting a prompt,
we can delay our commands until we're actually supposed to emit them (and
suppress a complaint from the lava dispatcher that we're using a risky
prompt!)

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Eric Anholt
985343e71a ci: prepare-artifacts: Make the indent here match previously in the file
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
2020-02-21 15:28:38 -08:00
Caio Marcelo de Oliveira Filho
89a3856714 anv: Add pipe_state_for_stage() helper
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
2020-02-21 13:09:44 -08:00
Caio Marcelo de Oliveira Filho
7df5d36078 anv: Use intel_debug_flag_for_shader_stage()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
2020-02-21 13:09:44 -08:00
Caio Marcelo de Oliveira Filho
f58b384fbe spirv: Be consistent when checking for Shader/Kernel
Use == and != instead of the ordered comparisons.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
2020-02-21 13:09:44 -08:00
Arcady Goldmints-Orlov
5f3cbbd958 spirv: Remove outdated SPIR-V decoration warnings
spirv_to_nir warns if it encounters XFB decorations and errors if
it encounters a Stream decoration with value other than 0, despite
the fact that these decorations are in fact handled correctly.

Fixes dEQP-VK.transform_feedback.simple.query_1_*
Fixes: cd4a14be06 "spirv: Handle XFB variable decorations"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
2020-02-21 20:34:03 +00:00
Jason Ekstrand
1598370aca nir/builder: Return an integer from nir_get_texture_size
It's convenient in a bunch of cases for nir_get_texture_size to return a
float but it's very unexpected.  This fixes a bug in the R600 NIR code.

Fixes: f718ac6268 "r600/sfn: Add a basic nir shader backend"
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
2020-02-21 18:48:03 +00:00
Jason Ekstrand
265e234e23 nir: Fix the nir_builder include path for nir_builtin_builder
Because it's in double-quotes, it will search the current folder before
any search paths.  Since nir_builder.h and nir_builtin_builder.h are in
the same folder, this guarantees a correct include.  However,
nir/nir_builder.h does not unless the includer's path is set up just
right.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
2020-02-21 18:48:03 +00:00
Michel Dänzer
f5a8958910 util: Change os_same_file_description return type from bool to int
This allows communicating that it wasn't possible to determine whether
the two file descriptors reference the same file description. When
that's the case, log a warning in the amdgpu winsys.

In turn, remove the corresponding debugging output from the fallback
os_same_file_description implementation. It depends on the caller if
false negatives are problematic or not.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
2020-02-21 17:10:48 +01:00
Michel Dänzer
228cbdfe67 winsys/amdgpu: Make local variable r signed
This is consistent with the return type of the functions whose return
values we assign to it.

No functional change intended.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
2020-02-21 17:09:05 +01:00
Karol Herbst
87365e263e nir/lower_ssbo: handle atomics
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
2020-02-21 13:06:22 +00:00
Alyssa Rosenzweig
7ab4e4dd96 nir: Add SSBO->global lowering pass
To facilitate lowering SSBOs to globals, we need a load_ssbo_address
intrinsic. This intrinsic takes an SSBO index and loads the address in
global memory of the SSBO (likely implemented via a uniform in the
driver). In the future, we'll support bounds checking, but at the moment
this is not supported (this pass should only be used for trusted
contexts at the moment, i.e. contexts without robustness extensions).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
2020-02-21 13:06:22 +00:00
Alyssa Rosenzweig
b929565ea8 panfrost: Rewrite texture descriptor creation logic
Rather than creating partially within the Gallium create function and
monkeypatching on draw time with code split across N different files
with tight Gallium dependencies, let's streamline everything into a
series of maintainable routines in mesa/src/panfrost with no Gallium
dependencies, doing the entire texture creation in one-shot and thus
adding absolutely zero draw-time overhead (since we can allocate a BO
for the descriptor and upload ahead-of-time, so switching textures is as
cheap as switching pointers).

Was this worth it? You know, I'm not sure :|

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:27:05 -05:00
Alyssa Rosenzweig
ad44f587a8 panfrost: Move format translation to root
Since PIPE formats are now shared across Mesa we can do this, and the
routines themselves are good enough code that I'm happy to move them
here. We'll use them momentarily.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:27:03 -05:00
Alyssa Rosenzweig
58f14018b4 panfrost: Move pan_afbc.c to root
Now that PIPE formats are shared across Mesa, this well-documented piece
of code is a good fit for root panfrost, let's move it and get a little
closer to taming the mess of resources.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:27:01 -05:00
Alyssa Rosenzweig
5ddf7ad9d2 panfrost: Move checksum routines to root panfrost
These are Gallium-independent and clean code; as is tradition, let's
hoist them up out of the Gallium driver as a bit of yak shaving as we
prepare to untangle the monster that is pan_resource.c

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
2020-02-21 07:26:52 -05:00
Erik Faye-Lund
2e3318b151 util: promote u_debug_memory.c to src/util
When os_memory_debug.h was promoted to src/util, this source-file on
which it depends on when the debug-flag is set on windows was left
out. So let's move this also.

It doesn't seem there's any way of triggering this issue right now, but
it seems better to correct this to avoid this from biting us in the ass
in the future.

Fixes: 88c4680b5a ("util: promote u_memory to src/util")
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
2020-02-21 10:32:19 +01:00
Vasily Khoruzhick
8021daeb1f lima: implement PLB PP stream cache
Generating PLB PP stream is expensive. PLB PP stream content depends on
damage, and if damage consists of several rects it's impossible to come
up with a simple key.

Simplify damage to a single bounding box so we have a simple key
and cache PLB PP stream. Cache size is limited to 0.1% of system RAM and
once limit is reached least recently used entries are dropped.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3834>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3834>
2020-02-21 07:20:20 +00:00
Dylan Baker
7edde3d26b docs: Update index, relnotes, and release-calendar for 20.0
This includes the release schedule for 20.0.x. Currently there are four
planned releases, but I assume we'll need more before 20.1.0 is ready.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
2020-02-20 14:15:37 -08:00
Dylan Baker
0ada39f37a Docs: Add 20.0.0 release notes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
2020-02-20 14:04:20 -08:00
Samuel Pitoiset
740cb3d193 radv: use RADEON_FLAG_ZERO_VRAM when creating the trace BO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
2020-02-20 18:47:34 +01:00
Samuel Pitoiset
37650bf938 radv/winsys: add a new flag that requests zerovram allocations
This introduces RADON_FLAG_ZERO_VRAM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
2020-02-20 18:47:29 +01:00
Roland Scheidegger
7a73446c51 gallivm: fix crash in emit_get_buffer_size
Seems a bit odd we extract a value from a vector in the first place
(as we always extract the first element), but llvm asserts if using
a zero-vector instead of zero as the index element.
Fixes piglit crashes for example in arb_shader_storage_buffer_object-layout-std140-write-shader.

Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
2020-02-20 17:32:54 +00:00
Roland Scheidegger
1b610aab58 gallivm: fix crash with bptc border color sampling
bptc uses fallback for decoding, but still need to handle border color
properly.

v2: adjust piglit gitlab-ci expectations

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
2020-02-20 17:32:54 +00:00
Rhys Perry
8291d728dc aco: improve GFX9 1D ddx/ddy assertion
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2547
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3890>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3890>
2020-02-20 15:41:26 +00:00
Alyssa Rosenzweig
cc3d29c6e7 pan/midgard: Identify clamp(x, -1.0, 1.0) flag
So *that's* what's .unk2 was about :)

We still need to add an opt pass for it, but we can do that further down
the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3892>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3892>
2020-02-20 13:34:18 +00:00
Alyssa Rosenzweig
0263d2793c panfrost: Remove flush_frontbuffer
A relic from software rasterizers. Hardware drivers generally don't need
to implement this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3878>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3878>
2020-02-20 13:04:52 +00:00
Icecream95
068806c9f6 panfrost: LogicOp support
The generated shaders are definitely not optimal, but for a feature
hardly anyone uses, it's probably good enough.

The XScreensaver demos quasicrystal, blitspin, bouboule, crystal and
munch now seem to work, with no obvious problems.

Currently this only works for 8-bit textures.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3887>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3887>
2020-02-20 07:41:54 -05:00
Danylo Piliaiev
5bfd363be4 i965: Do not generate D16 B5G6R5_UNORM configs on gen < 8
We don't support MESA_FORMAT_Z_UNORM16 before Gen8, see
intel_screen_init_surface_formats.

As a consequence disables B5G6R5_UNORM configs with depth
on gen < 6.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2275
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
2020-02-20 11:14:44 +00:00
Alexandros Frantzis
803ab5d6be gitlab-ci: Automated testing with OpenGL traces
Introduce automated testing of Mesa by replaying traces with Renderdoc
or Apitrace.

For now only LLVMPipe is tested, but other drivers can be tested if
there's runners with the necessary hardware.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
2020-02-20 08:06:13 +01:00
Tomeu Vizoso
50f1950ac0 gitlab-ci: Disable the lima job for now
Some dEQP tests have started passing and it's taking a while to update
the expectations and skips list.

Disable for now so CI doesn't fail and stuff can be merged.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
2020-02-20 08:06:08 +01:00
Marek Olšák
f7bfb10c69 util: remove the dependency on kcmp.h
Fixes: f76cbc7901 "util: Add os_same_file_description helper"

Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
2020-02-20 00:15:23 +00:00
Ian Romanick
273b8cd1ca intel/fs: Correctly handle multiply of fsign with a source modifier
The other source of the multiply will be interpreted as a uint32_t in an
XOR instruction.  Any source modifiers with either not be interpreted at
all or will be misinterpreted due to the differing types.

If the other operand of the multiplication has a source modifier, just
emit an extra move to resolve the source modifiers.

The negation source modifier problem is difficult to reproduce due to an
algebraic optimization that changes (-a*b) to -(a*b).  However, changes
in MR !1359 push the negations back down.

On Gen7+ it might be possible to do slightly better for an abs() source
modifier by using BFI2 as a glorified copysign().

On Gen8+ it might be possible to do slightly better for a neg() source
modifier by emitting (~a ^ b).

There were no shader-db changes on any Intel platform, so I think we can
deal with that problem when it arises.

See also piglit!224.

Fixes: 06d2c11641 ("intel/fs: Add a scale factor to emit_fsign")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
2020-02-19 23:51:42 +00:00
Thong Thai
c81aa15d64 gallium/auxiliary/vl: fix bob compute shaders for deint yuv
Scales the Y-axis by 2 when using the Bob deinterlace filter.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2523
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3857>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3857>
2020-02-19 23:23:07 +00:00
Bas Nieuwenhuizen
68d1757420 radeonsi: Fix compute copies for subsampled formats.
We cannot do image stores (or render) to subsampled formats.

Reinterpret as R32_UINT instead.

si_set_shader_image_desc already uses the blockwidth from
the view formats, so the image width adjustments are
already implemented.

This is still icky with mipmapping on GFX9+ though, but
since it is mostly a video format I don't think that will
be much of an issue and broken mipmapping is still better
than broken everything.

Fixes: e5167a9276 "radeonsi: disable SDMA on gfx8 to fix corruption on RX 580"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2535
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
2020-02-19 22:51:12 +00:00
Jonathan Marek
d795eb207f turnip: add option to force use of hw binning
For running deqp tests which have small render sizes and don't otherwise
get coverage of hw binning / multiple tiles.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3851>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3851>
2020-02-19 22:24:44 +00:00
Dylan Baker
97a590af21 docs: Mark 20.0.0-rc3 as done
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Dylan Baker
772d60385c docs: Mark 19.3.4 as done
The calendar had an error, 19.3.4 and 19.3.5 had the same release date.
I've fixed the date for 19.3.5 and removed 19.3.6 which I don't believe
will be needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Dylan Baker
288e9fd295 docs: Add SHA256 sum for 19.3.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Dylan Baker
3238f4c3ab docs: Add release notes for 19.3.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
2020-02-19 20:05:38 +00:00
Chad Versace
d8fe9e045f anv: Drop anv_image.c:get_surface()
It was called exactly once, and even there it returned the wrong surface
in a corner case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3882>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3882>
2020-02-19 19:41:05 +00:00
Ian Romanick
58bdc1c748 nir/search: Use larger type to hold linearized index
"index" is an offset into a linearized 3-dimensional array.  Starting
with fbd5359a0a, the 3-dimensional array can have 43 elements in each
dimension.  43**3 = 79507, and that will overflow the uint16_t.

See also the discussion in MR !3765.

Fixes: fbd5359a0a ("nir/algebraic: Rearrange bcsel sequences generated by nir_opt_peephole_select")
Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
2020-02-19 19:07:34 +00:00
Marek Olšák
912ee82521 gallium/util: remove unused u_surfaces.c/h
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
2020-02-19 18:34:33 +00:00
Kristian H. Kristensen
360ffdf4e2 main/get: Converted type conversion macros to inline functions
Quiet warnings when called with a GLubyte:

  src/mesa/main/get.c:3215:19: warning: result of comparison of constant 32767 with expression of type 'GLubyte' (aka 'unsigned char') is always false [-Wtautological-constant-out-of-range-compare]
      params[0] = INT_TO_FIXED(((GLubyte *) p)[0]);
                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  src/mesa/main/get.c:78:38: note: expanded from macro 'INT_TO_FIXED'
                                 ~~~ ^ ~~~~~~~~

Delete ENUM_TO_INT64, ENUM_TO_FIXED and BOOLEAN_TO_INT64 which aren't
used.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
2020-02-19 18:34:33 +00:00
Kristian H. Kristensen
f1dc4c9554 Mark a few static inline helpers with ASSERTED
Quiet warnings in release builds where these look unused.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
2020-02-19 18:34:33 +00:00
Ian Romanick
d46a5cfe78 mesa/draw: Make sure all the unused fields are initialized to zero
Not initializing prim.indexed caused a few thousand failures on Intel
drivers.

I also compared the generated assembly with this change and before
a6d3158909.  The code is still somewhat improved, which I am assuming
was the original goal. _mesa_DrawArrays, for example, appears to drop an
instruction or two... though the body of the function is only one byte
shorter.

MR !3591 will eventually delete the uninitialized fields.  However, I
believe that explicitly initializing the whole thing is more future
proof.  This ensures that if someone adds fields in the future, they
will also be initialized.  Once the extra fields are removed, the two
implementations should generate idential code.

Fixes: a6d3158909 ("mesa: don't use memset in glDrawArrays")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3870>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3870>
2020-02-19 10:07:47 -08:00
Mathias Fröhlich
6edbb3c6d0 mesa: Fix FLUSH_VERTICES in SubpixelPrecisionBiasNV.
The FLUSH_VERTICES macro is supposed to be called before the current
context state is changed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2020-02-19 15:51:25 +01:00
Alyssa Rosenzweig
d3160a6177 panfrost: Remove old hack
I don't know why I thought this was needed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
2020-02-19 08:02:03 -05:00
Alyssa Rosenzweig
7f6f419be9 panfrost: Remove old comment
We already handle primitive restart earlier in the function.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
2020-02-19 08:01:59 -05:00
Alyssa Rosenzweig
aed052f703 panfrost: Remove dirty tracking
We never really respected it and it doesn't quite make sense for Mali
the way it was previously setup. The correct solution is to do push as
much code into CSO creation as possible.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
2020-02-19 08:01:46 -05:00
Rhys Perry
fe5c5507bd aco: add some helpers for filling/testing register ranges
We do this a lot

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
2020-02-19 12:23:50 +00:00
Rhys Perry
43497e30e2 aco: add RegisterFile
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
2020-02-19 12:23:50 +00:00
Michel Dänzer
7e6010106f st/vdpau: Only call is_video_format_supported hook if needed
Namely only if *is_supported is true, otherwise the hook result can't
affect it.

Avoids

../src/gallium/state_trackers/vdpau/vdpau_private.h:138: FormatYCBCRToPipe: Assertion `0' failed.

with assertions enabled.

Fixes: 5d5b414a7b "st/vdpau: fix chroma_format handling in
                     VideoSurfaceQueryGetPutBitsYCbCrCapabilities"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
2020-02-19 12:41:08 +01:00
Danylo Piliaiev
72154237fb iris: Do not dereference nullptr with pipe_reference
../src/gallium/drivers/iris/iris_fence.h:54:8: runtime error: member access within null pointer of type 'struct iris_syncpt'

../src/gallium/drivers/iris/iris_fence.c:136:8: runtime error: member access within null pointer of type 'struct pipe_fence_handle'

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d800bcd9b9 glsl/blob: Do not call memcpy if there is nothing to copy
../src/util/blob.c:166:7: runtime error: null pointer passed as argument 2, which is declared to never be null
    #0 0x7fe51bc315df in blob_write_bytes ../src/util/blob.c:166
    #1 0x7fe51c7a7b9a in iris_disk_cache_store ../src/gallium/drivers/iris/iris_disk_cache.c:115
    #2 0x7fe51c7f444d in iris_compile_fs ../src/gallium/drivers/iris/iris_program.c:1693
    #3 0x7fe51c7fdcd9 in iris_create_fs_state ../src/gallium/drivers/iris/iris_program.c:2331
    #4 0x7fe519e871a3 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1275
    #5 0x7fe519e89dd0 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1435
    #6 0x7fe519ed51e1 in st_update_fp ../src/mesa/state_tracker/st_atom_shader.c:163
    #7 0x7fe519eb5d73 in st_validate_state ../src/mesa/state_tracker/st_atom.c:261
    #8 0x7fe519e4e0bf in prepare_draw ../src/mesa/state_tracker/st_draw.c:132
    #9 0x7fe519e4e76e in st_draw_vbo ../src/mesa/state_tracker/st_draw.c:184
    #10 0x7fe51aca5245 in vbo_save_playback_vertex_list ../src/mesa/vbo/vbo_save_draw.c:215
    #11 0x7fe51a25b1cc in ext_opcode_execute ../src/mesa/main/dlist.c:1126
    #12 0x7fe51a2f8d58 in execute_list ../src/mesa/main/dlist.c:11830
    #13 0x7fe51a34b2d0 in _mesa_CallList ../src/mesa/main/dlist.c:14267

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
7685f48ece intel/bufmgr: Cast bitshift to unsigned
../src/mesa/drivers/dri/i965/intel_buffer_objects.c:405:4: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x7f9404ac4ae1 in brw_map_buffer_range ../src/mesa/drivers/dri/i965/intel_buffer_objects.c:405
    #1 0x7f9405a9cb13 in vbo_save_map_vertex_store ../src/mesa/vbo/vbo_save_api.c:261
    #2 0x7f9405b6a89d in vbo_save_NewList ../src/mesa/vbo/vbo_save_api.c:1774
    #3 0x7f94051aba3d in _mesa_NewList ../src/mesa/main/dlist.c:14172

../src/gallium/drivers/iris/iris_resource.c:1725:61: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x7fe51c820c8e in iris_map_direct ../src/gallium/drivers/iris/iris_resource.c:1725
    #1 0x7fe51c82322c in iris_transfer_map ../src/gallium/drivers/iris/iris_resource.c:1895
    #2 0x7fe5202628be in u_transfer_helper_transfer_map ../src/gallium/auxiliary/util/u_transfer_helper.c:243
    #3 0x7fe51997c508 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:344
    #4 0x7fe51997ec8d in u_upload_alloc_buffer ../src/gallium/auxiliary/util/u_upload_mgr.c:221
    #5 0x7fe51997f24f in u_upload_alloc ../src/gallium/auxiliary/util/u_upload_mgr.c:254
    #6 0x7fe51ccf43af in upload_state ../src/gallium/drivers/iris/iris_state.c:323
    #7 0x7fe51d06963a in gen9_init_state ../src/gallium/drivers/iris/iris_state.c:7516
    #8 0x7fe51c7c2ea0 in iris_create_context ../src/gallium/drivers/iris/iris_context.c:294
    #9 0x7fe519dc729b in st_api_create_context ../src/mesa/state_tracker/st_manager.c:921
    #10 0x7fe5198c47ea in dri_create_context ../src/gallium/state_trackers/dri/dri_context.c:161
    #11 0x7fe519898aac in driCreateContextAttribs ../src/mesa/drivers/dri/common/dri_util.c:475

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d5931f285b intel/compiler: Do not qsort zero sized array
../src/intel/compiler/brw_nir_analyze_ubo_ranges.c:316:4: runtime error: null pointer passed as argument 1, which is declared to never be null
    #0 0x7f78f5916611 in brw_nir_analyze_ubo_ranges ../src/intel/compiler/brw_nir_analyze_ubo_ranges.c:316
    #1 0x7f78f255c189 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:97
    #2 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #3 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #4 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #5 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #6 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #7 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #8 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #9 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #10 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #11 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #12 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d596795d4d brw_fs: Avoid zero size vla
../src/intel/compiler/brw_fs.cpp:2247:46: runtime error: variable length array bound evaluates to non-positive value 0
    #0 0x7f78f5697678 in fs_visitor::assign_constant_locations() ../src/intel/compiler/brw_fs.cpp:2247
    #1 0x7f78f571d29e in fs_visitor::optimize() ../src/intel/compiler/brw_fs.cpp:7361
    #2 0x7f78f574eb84 in fs_visitor::run_fs(bool, bool) ../src/intel/compiler/brw_fs.cpp:8022
    #3 0x7f78f575641b in brw_compile_fs ../src/intel/compiler/brw_fs.cpp:8408
    #4 0x7f78f255c8e4 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:123
    #5 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #6 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #7 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #8 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #9 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #10 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #11 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #12 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #13 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #14 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #15 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Danylo Piliaiev
d4e395a27d brw_nir: Cast bitshift to unsigned
../src/intel/compiler/brw_nir.c:979:40: runtime error: left shift of 1 by 31 places cannot be represented in type 'int'
    #0 0x7f78f590d10b in brw_nir_apply_sampler_key ../src/intel/compiler/brw_nir.c:979
    #1 0x7f78f590e07b in brw_nir_apply_key ../src/intel/compiler/brw_nir.c:1057
    #2 0x7f78f5754b45 in brw_compile_fs ../src/intel/compiler/brw_fs.cpp:8347
    #3 0x7f78f255c8e4 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:123
    #4 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #5 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #6 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #7 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #8 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #9 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #10 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #11 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #12 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #13 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #14 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
2020-02-19 12:07:24 +02:00
Samuel Pitoiset
82913bac14 docs/envvars: document RADV_TEX_ANISO
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2524
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3873>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3873>
2020-02-19 08:46:03 +01:00
Eric Anholt
72f7d3d5b0 gallium: Only define PIPE_ALIGNSTACK on x86.
At least arm and arm64 don't respect this attribute, producing compiler
warnings in lp_test_format.c.  The gcc and LLVM docs for the attribute
only talk about them being needed on x86.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
427870abfd llvmpipe: Fix another uninitialized value warning, on init_val.
It's only used in the vote_ieq paths, but gcc doesn't see that.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
81225e1f03 llvmpipe: Silence uninitialized variable warning about "scissor"
nr_planes is only > 3 when scissor is enabled, but gcc doesn't see it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
dc8c5af99b llvmpipe: Silence uninitialized variable warning about "vals"
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
d8d34238a6 llvmpipe: Fix warning about uninitialized "op" in the NIR path.
Similar to TGSI, move the switch statement and use more unreachable().

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
b32bd704c0 llvmpipe: Silence uninitialized variable warning about "chan"
Both arms of an if define it, but gcc doesn't notice.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
ce611935df llvmpipe: Silence "possibly uninitialized value" warning for ssbo_limit.
The condition for the use matches the def, but you can't trust a compiler
to notice.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
45b2ccc6b3 llvmpipe: Fix real uninitialized use of "atype" for SEMANTIC_FACE
Fixes: 502548a09c ("gallivm/llvmpipe: add support for front facing in sysval.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:40:04 -08:00
Eric Anholt
13a276ed3b radv: Squelch possibly-undefined warning
The same condition is used in the def as in the use, but gcc wasn't
figuring it out.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
2020-02-18 15:35:32 -08:00
Eric Anholt
1427f666dc ci: Extend the a630 flake list to reduce spurious failures.
These are the tests I've seen flake twice while logged in to the IRC
channel this year.  Also include fragment_out.random.5 which fully
spuriously failed recently.

Closes: #2516
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3862>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3862>
2020-02-18 22:40:33 +00:00
Marek Olšák
2e05a280b6 mesa: fix immediate mode with tessellation and varying patch vertices
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:47:30 -05:00
Marek Olšák
a6d3158909 mesa: don't use memset in glDrawArrays
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:46:55 -05:00
Marek Olšák
ee549c6766 mesa: document _mesa_prim::begin/end
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:50 -05:00
Marek Olšák
c9246282b7 vbo: remove redundant code in vbo_exec_fixup_vertex
Callers of this function also set FLUSH_STORED_VERTICES for attr == 0.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:34 -05:00
Marek Olšák
3eeeb86cb0 vbo: remove dead code in vbo_can_merge_prims
This is only used by immediate mode and the values are immutable.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:34 -05:00
Marek Olšák
2491a2ddeb st/mesa: try to fix MSVC build failure due to ALWAYS_INLINE
Fixes: 11db8e0e00 ("st/mesa: optimize st_update_array with ALWAYSINLINE")
Tested-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3861>
2020-02-18 16:45:34 -05:00
Rob Clark
06dc280a57 freedreno/registers: cleanup CP_SET_MARKER
1) Name RM6_COMPUTE, and rename RM6_ENDVIS (from RM6_BLIT) to better
   reflect what it actually does
2) Cleanup open-coded mode enum values
3) Removed unused 0x10

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Rob Clark
7b4d6bb1ec freedreno: quiet INFO_MSG
Probably not useful unless LIBGL_DEBUG is set to something.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Rob Clark
838ed2885d freedreno/a6xx: few register updates
Nothing used by mesa, but crashdec tool uses a few of these.  And since
the practice is these days to sync mesa->envytools, adding these on the
mesa side first.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Rob Clark
4fc31e7d33 freedreno/registers: teach gen_header.py about a3xx_regid
This is a builtin type (treated as uint, but with special type-aware
decoding) in envytools/cffdump.  Lets teach gen_header.py about it and
drop the enum hack in the xml so I don't have to keep deleting the enum
when I sync the xml back to the freedreno envytools tree.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3833>
2020-02-18 20:52:42 +00:00
Eric Engestrom
ecca5ef6c3 meson: explicitly disallow unsupported build directory layout
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2512
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3832>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3832>
2020-02-18 20:05:03 +00:00
Caio Marcelo de Oliveira Filho
79788b8f7f intel/gen12: Take into account opcode when decoding SWSB
The interpretation of the fields is different depending whether the
instruction is a SEND/MATH or not.

This fixes the disassembly output for non-SEND/MATH instructions that
have both in-order and out-of-order dependencies.  Their dependencies
were wrongly represented as `@A $B` when the correct would be `@A
$B.dst`.

Fixes: 6154cdf924 ("intel/eu/gen12: Add auxiliary type to represent SWSB information during codegen.")
Fixes: 83612c0127 ("intel/disasm/gen12: Disassemble software scoreboard information.")
Acked-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3660>
2020-02-18 09:17:51 -08:00
Alyssa Rosenzweig
bee5c9b0dc panfrost: Remove enum panfrost_memory_layout
It duplicates mali_texture_layout. Let's use the native hardware enum
and spare a pointless translation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3854>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3854>
2020-02-18 16:20:56 +00:00
Caio Marcelo de Oliveira Filho
28e94e0a94 radv: Advertise VK_KHR_shader_non_semantic_info
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
2020-02-18 09:57:17 -06:00
Caio Marcelo de Oliveira Filho
8004cb256a anv: Advertise VK_KHR_shader_non_semantic_info
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
2020-02-18 09:57:15 -06:00
Jason Ekstrand
2dae89ac36 vulkan: Update the XML and headers to 1.2.133
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3856>
2020-02-18 09:57:14 -06:00
Alyssa Rosenzweig
7d3c48f131 panfrost: Debitfieldize mali_uniform_buffer_meta
It fits snugly in a u64, just give a macro for direct computation rather
than fudging around with bitfields. Not sure if this actually matters
with well-optimized compilers but it makes the code subjectively cleaner
so it's worth it for that if nothing else.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
2020-02-18 14:44:08 +00:00
Alyssa Rosenzweig
027944c7c8 panfrost: Avoid reading GPU memory when packing vertices
These occurred unintentionally as a byproduct of bitfields, etc. Whoops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
2020-02-18 14:44:08 +00:00
Alyssa Rosenzweig
4c52e16c9c panfrost: Cleanup transfer_map
A lot of these checks are obsolete since we've started tracking BO
accesses correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3849>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3849>
2020-02-18 14:13:18 +00:00
Alyssa Rosenzweig
308f9cf104 panfrost: Update scoreboarding notes
Our understanding of the set/write value jobs has evolved, so let's
update the rules.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:25 -05:00
Alyssa Rosenzweig
88323d1ba0 panfrost: Rewrite scoreboarding routines
Rather than manipulating job descriptor headers as fat pointers (slow)
and using fancy manipulation functions for programatically building the
tree in arbitrary orders (slow and complicated) and then having to do a
topological sort at runtime every frame (slow) which requires traversing
said headers in GPU memory (slow!)... we finally know enough about
the hardware to just get things right the first time, or second for
next_job linking. So rip out all that code and replace it with a much
better routine to create, upload, and queue a job all in one (since now
it's the same operation essentially - which is much better for memory
access patterns, by the way) and most everything falls into place
gracefully according to the rules we've set out. Even wallpapering isn't
*so* terrible if you just... move that one little... giant... hack out
of sight... ahem....

panfrost_scoreboard_link_batch is no longer a bottleneck, mostly because
it no longer exists :-)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:21 -05:00
Alyssa Rosenzweig
070bc883d3 panfrost: Print synced traces to stderr
To match the existing behaviour.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:18 -05:00
Alyssa Rosenzweig
c46a090942 panfrost: Implement PAN_DBG_SYNC with pandecode/minimal
This way we avoid duplicating job traversal logic.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:14 -05:00
Alyssa Rosenzweig
5998646125 pan/decode: Cleanup pandecode_jc
Some of this code is, to put it mildly, impossibly ancient horsedropping
crazy cruft.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:45:09 -05:00
Alyssa Rosenzweig
4122f747ac pan/decode: Add minimal mode
We would like a mode to skip decoding job payloads so we can just
inspect for faults.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3836>
2020-02-18 08:44:59 -05:00
Danylo Piliaiev
b684ba6ce7 st/nir: Unify inputs_read/outputs_written before serializing NIR
Otherwise input/output interfaces won't be unified when reading
NIR from a cache.

Fixes piglit test on iris:
  clip-distance-vs-gs-out.shader_test

Fixes: 19ed12af

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3787>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3787>
2020-02-18 09:18:37 +00:00
Erik Faye-Lund
9903f10636 zink: do not convert bools to/from uint
Since bools are the only 1-bit type, we always know if an SSA-def is a
bool or not. So we don't need to marshal it to uint.

So let's simplify the code a bit here.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
4d016de250 zink/spirv: uint -> raw
Similarly to the previous commit, the important bit here is the rawness
of these variables, not the uintness. So let's rename these to reflect
this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
7c1a2cbcad zink/spirv: unit_value -> raw_value
The point here isn't that the value is uint, but that is't untreated. So
raw seems more fitting as a description.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
16339646f0 zink/spirv: rename functions a bit
The code is about to change so the whole uint-story isn't as true as it
used to be. So let's soften up the semantics a bit here; we only care
about if we're doing a typed ot untyped store here, really.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
a6211a4247 zink/spirv: prefer store_dest over store_dest_uint
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
Erik Faye-Lund
7e8f7df800 zink/spirv: do not reinvent store_dest
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
2020-02-17 12:46:54 +00:00
luc
692093fbdc zink: confused compilation macro usage for zink in target helpers.
Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3831>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3831>
2020-02-17 12:21:01 +00:00
Erik Faye-Lund
b7e966dc7f zink: do not report texture-samplers for unsupported stages
This caused the max combined samplers to be reported as artificially
high.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
2020-02-17 10:00:18 +00:00
Erik Faye-Lund
4a20db70de zink: fix binding-usage
Rewriting the variable bindings is nasty and error-prone, and this code
triggered an assert when trying to resolve API bindings into Vulkan
bindings.

This code still needs some tweaks, but this makes things much better,
and fixes a few bugs where we incorrectly accounted for the
array-indexes.

Fixes: 1c3f4c0704 ("zink: fixup sampler-usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
2020-02-17 10:00:18 +00:00
Samuel Pitoiset
c095b7d5bd radv: add a comment about VK_AMD_mixed_attachment_samples on GFX6-GFX7
There is some CTS failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:33:44 +01:00
Samuel Pitoiset
4159b24be7 radv: enable VK_NV_compute_shader_derivatives on GFX6-GFX7
All Crucible tests pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:33:42 +01:00
Samuel Pitoiset
83dd0cace6 radv: enable VK_EXT_sampler_filter_minmax on GFX6
Works fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:33:40 +01:00
Samuel Pitoiset
170c3a8b7b radv: enable shaderStorageImageMultisample on GFX6-GFX7
It was disabled because untested, but CTS is happy with it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
2020-02-17 08:32:26 +01:00
Mathias Fröhlich
c7617d8908 egl: Implement getImage/putImage on pbuffer swrast.
This change adds getImage/putImage callbacks to the swrast pbuffer
loader extension.
This fixes a recent crash with Weston as well as a crashing
test with classic swrast without an official gitlab issue.

v2: Determine bytes per pixel differently and fix non X11 builds.
v3: Plug memory leak and fix crash on out of bounds access.
    (Daniel Stone)
v4: Follow the code structure of the wayland get/put image
    implementation - hopefully being more obvious.
    Handle 64 bits formats.
    Use BufferSize directly.
    (Emil Velikov)
v5: Change pixel size computation.
    (Eric Engestrom)

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2219
Fixes: d6edccee8d "egl: add EGL_platform_device support"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3711>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3711>
2020-02-17 04:01:37 +00:00
Qiang Yu
6fc0890cd9 lima: rename lima_submit to lima_job
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
57d9a51d45 lima: move dump check to macro for lima_dump_command_stream_print
This can prevent the execution of some function like lima_ctx_buff_va
which is passed in as parameter when no dump case.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
5502bc83b0 lima: enable multi submit optimization
Also provide a debug option to disable it.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
131c505690 lima: optinal flush submit in lima_clear
flush current submit only when there is any draw pending instead of
flush all submits.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
d6ad8e590f lima: use per submit dump file
After multi lima_submit, commands for one lima_submit may not be
flushed when change framebuffer. But we want to track command
stream for one submit, so save dump file for each submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
d0dde3de25 lima: move framebuffer info to lima_submit
draw code path does not use framebuffer info, only flush
code path use it now.

Use zsbuf/cbuf in submit instead of context.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
ed117ee630 lima: move clear into submit (v2)
clear info is needed when submit flush and may be changed after
framebuffer switch, so we need to move it into submit.

This also fixes 5 dEQP tests as a side effect: clear info is per
submit so clear value when one submit won't affect next submit.

v2:
remove fixed dEQP test from CI list.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
4b93792274 lima: move damage_rect into lima_submit
damage_rect is preserved across draws.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
a4b048c046 lima: move pp_max_stack_size to lima_submit
pp_max_stack_size is preserved across draws.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
6a5b1c62db lima: move resolve into lima_submit
resolve is preserved across draws.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
7e5abc11f4 lima: move plbu/vs_cmd_array into lima_submit
This information is preserved across draws and needed
when task submission.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
c64994433c lima: track write submits of context (v3)
We need to flush submit which write to the FBO before read it as
texture.

v2:
rename lima_flush_previous_write_submit to
lima_flush_previous_submit_writing_resouce.

v3:
delay add submit to hash_table to lima_update_submit_wb when really
know the render target will be written.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
48fc5f841a lima: make lima_submit one time use drop data (v3)
lima_submit is created by lima_submit_get() in draw/clear functions
and freed after submit to kernel.

There is a hash map to find the same lima_submit for color/depth
buffer combination if user switch framebuffer w/o flush the command
then switch back again.

v2:
rename lima_flush_submit to lima_flush_submit_accessing_bo.

v3:
delay flush access submit to lima_update_submit_wb when really know
if this submit will write to the target buffer.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
545988c617 lima: add lima_submit_get
Replace all usage of "ctx->submit" in draw code path with
lima_submit_get(). This function will create new submit
in the following changes.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
0caefb6d9d lima: use lima_submit_create_stream_bo for plbu/vs_cmd and pp_stack
lima_ctx_buff is used cross function calls in draws. But plbu/vs_cmd
and pp_stack are used immediately after create. And we need to get
rid of "ctx->submit" in the flush code path which exists in
lima_ctx_buff.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
ed8837f946 lima: adjust pp_stream to use lima_submit_create_stream_bo
No need to save the bo, just map and va for use in this submit
is enough.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
e90d8b6e4d lima: add lima_submit_create_stream_bo
For creating stream buffer which is used in single submit
and freed after the submit is passed to kernel driver.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
5c78ba6014 lima: pass submit parameter for functions in lima_submic.c (v2)
"ctx->submit" won't be used directly, so remove the usage in
lima_submit.c by directly passing the submit parameter. And
more data in lima_context will be moved to lima_submit, so
"ctx" will be replaced by "submit" in those functions.

v2:
rename lima_submit_flush to lima_do_submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
21a2ce71b1 lima: move flush code to lima_submit.c
Just code move, no content change.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
29c7235507 lima: put hardware related info to lima_gpu.h
For sharing with multi .c files.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
09127641f4 lima: merge gp/pp submit
Use single lima_submit for the submit operation. This is also
for moving more information in lima_context to lima_submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
79c65fa56f lima: move syncobj from lima_submit to lima_context
As there will be multi lima_submit per context, move
syncobj out of it.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
b9003111bb lima: add missing resolve check for damage and reload
If color buffer is not touched, we do not need to reload or get
damage region from it.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
47200f5c8d lima: add render target to submit by dirty buffer flags
No need to add un-touched buffer to submit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
32f1733972 lima: delay plbu head command generation to flush stage (v2)
Prepare for multi submit in which case only know the plb_index when
final flush. Another need for this is proper reload detection: only
when flush stage can we know if need to do reload, because user may
first clear depth, then color individually, so we don't know if need
to pack repload plbu cmd when first clear depth.

v2:
move lima_update_submit_wb before ctx->resolve change for lima_ctx_dirty
to work in lima_submit_wb.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
ccfe5f9d28 lima: delay add plb buffer to submit when flush
Prepare for multi submit in which case plb buffer is known
only when flush.

Keep the write back buffer update which is needed for FB
dirty track.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
92387ca236 lima: pass array as parameter to PLBU and VS command macros
Don't assume the ctx parameter, prepare for moving PLBU and
VS arrary from lima_context to lima_submit and adding new
plbu_cmd_head array.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
c3bbe4f7f8 lima: remove lima_ctx_buff_va submit flags (v2)
We don't have any shared lima_ctx_buff for both GP and PP,
so no need to have these flags.

v2:
still add submit in lima_ctx_buff_va because some bo need
to exist cross flush, so not every submit will call
lima_ctx_buff_alloc.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
9f924c795b lima: always add texture bo to submit
No matter texture desc change, we need to add texture to submit.
Otherwise texture may be freed before submit finish.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
3c4ff27250 lima: use util_copy_framebuffer_state
Use this helper to replace self written code.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Qiang Yu
c8b53d8020 lima: remove definition of lima_is_scanout
There is no implementation of this function.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
2020-02-17 02:54:15 +00:00
Alyssa Rosenzweig
0c4a70b64d pan/decode: Remove extraneous newline
pandecode_log already does this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:50 -05:00
Alyssa Rosenzweig
8ab0bf1f93 pan/midgard: Use fprintf instead of printf for constants
I was wondering where those constants disappeared to :-)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 968f36d1fc ("pan/midgard: Support disassembling to a file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:50 -05:00
Alyssa Rosenzweig
6af14d3685 pan/midgard: Don't crash with constants on unknown ops
Just use a dummy name instead.. we can't know a priori what type an
unknown op will consume, but we don't want to dereference a null
pointer.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 24360966ab ("panfrost/midgard: Prettify embedded constant
prints")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:50 -05:00
Alyssa Rosenzweig
5c06ecd2c6 pan/midgard: Identify stack barrier flag
In case thread local storage is used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:49 -05:00
Alyssa Rosenzweig
d3747fb1eb pan/midgard: Set xyzx swizzle for load_compute_arg
Probably harmless but the w component doesn't appear valid so let's
match the blob... one less bit to be nervous about.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:48 -05:00
Alyssa Rosenzweig
f0ee55ad2a pan/midgard: Infer tags entirely
We're so close, again marking off a few edge cases is enough to allow us
to omit this data entirely. Woot!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:48 -05:00
Alyssa Rosenzweig
57a84278fd pan/midgard: Imply next tags
As long as we can disambiguate a few edge cases, we can imply next tags
entirely which cleans up the disassembly a fair bit (though not as much
as implying tags entirely would -- we'll get there!)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
453c64663c pan/midgard: Overhaul tag handling
We unify disparate metadata about tags into a single structure to ensure
information is not left out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
9168e7a65d pan/midgard: Improve barrier disassembly
Just move some state from unknowns to actual keywords.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
d208212f80 pan/midgard: Use dummy tag for empty shaders
Fixes INSTR_INVALID_ENC in dEQP-GLES31.functional.compute.basic.empty

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
b2cab6b6db pan/midgard: Fix 32/64 mixed swizzle packing
Occurs in SSBO address computation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
a55a2e02a5 pan/midgard: Allow jumping out of a shader
This comes up as a `return;` instruction in a compute shader. We need to
use the special tag 1 to signify "break". Fixes numerous
INSTR_INVALID_ENC faults in dEQP-GLES31.functional.compute.basic.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
3f59098d1a pan/midgard: Implement barriers
Barriers execute on the texture pipeline on Midgard, so let's
tentatively handle barrier() as conservatively as possible (forcing
memory barriers of both buffers and shared memory). Implementation isn't
quite there yet -- it doesn't look at interactions of adjacent barriers
like it's supposed to -- but the core is there.

Fixes dEQP-GLES31.functional.compute.basic.ssbo_local_barrier_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
4f0b928921 pan/midgard: Fix swizzles harder
Just for disassembly for now~

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:47 -05:00
Alyssa Rosenzweig
fbe1fd3de0 pan/midgard: Fix missing prefixes
I was wondering where those were going... :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: c1952779d6 ("pan/decode: Dump to a file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
521406a069 pan/midgard: Track pressure when scheduling ld/st
Fixes RA failure in
dEQP-GLES31.functional.shaders.builtin_functions.common.modf.* (which
uses multiple indirect SSBO writes)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
9603126b74 panfrost: Allocate RAM backing of shared memory
Unlike other GPUs, Mali does not have dedicated shared memory for
compute workloads. Instead, we allocate shared memory (backed to RAM),
and the general memory access functions have modes to access shared
memory (essentially, think of these modes as adding this allocates base
+ workgroupid * stride  in harder). So let's allocate enough memory
based on the shared_size parameter and supply it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
50138abb5a panfrost: Rename unknown2_8 to padding
It's zero everywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
6d9ee3e65a panfrost: Rename bifrost_framebuffer->mali_framebuffer
(And bifrost_fb_extra to mali_framebuffer_extra, bifrost_render_target
to mali_render_target)

These structures are the norm on midgard t760+, drop the bifrost names,
it's silly... unrelated to the rest of the series but while I'm messing
with pandecode and cleaning up bifrost abstractions, might as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
6dc105555b panfrost: Unify bifrost_scratchpad with mali_shared_memory
It looks like these are the same structure, so this allows us to reuse
mali_shared_memory across architectures, and dispels with the
Bifrost-specific mystery of the scratchpads... nothing so mysterious
after all, just stack.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
254f40fd53 panfrost: Identify mali_shared_memory structure
This small structure is used to configure shared memory and stack for
compute shaders, and is also present at the beginning of framebuffer
descriptors. Let's factor it out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
418ca5dc1a panfrost: Ensure compute shader_meta is zeroed
In theory the hardware doesn't care but it'll make for easier traces.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Alyssa Rosenzweig
058faf5a4b panfrost: Update comment about magic number relating to barriers
It's a complicated story. But from what I can tell, in GL compute
without barriers, the blob is able to redistribute the workgroups in
various ways (that are not yet understood), whereas with barriers it
cannot redistribute anything, which accounts for erratic workgroup
packing without barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
2020-02-16 09:16:46 -05:00
Dave Airlie
8f5a252d35 ci: bump debian image and change llvm deps to 8
v3: remove version in a few places (Michel)

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
2020-02-15 04:15:00 +00:00
Dave Airlie
e7375e1795 gallivm/s390: fix pass init order on s390 with llvm 8 (v2)
llvm 8 has some missing pass dependencies, fix the s390 case
as well.

v2: add ARM also (Michel)

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
2020-02-15 04:15:00 +00:00
Kenneth Graunke
a603822b2f iris: Trim "../../src/gallium/drivers/iris/" out of debug dump filenames
Easier to read.

v2: Also trim "/iris/" (Jordan Justen)

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
2020-02-15 00:55:55 +00:00
Kenneth Graunke
96f247d1b3 iris: Dump frame markers with INTEL_DEBUG=submit
Now you can see which batches go with which frames.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
2020-02-15 00:55:55 +00:00
Marek Olšák
e395ce03e9 gallium/cso_hash: remove another layer of pointer indirection
Convert this:

    struct cso_hash {
       union {
          struct cso_hash_data *d;
          struct cso_node      *e;
       } data;
    };

to this:

    struct cso_hash {
       struct cso_hash_data data;
       struct cso_node      *end;
    };

1) data is not a pointer anymore.
2) "end" points to "data" and acts as the end of the linked list.
3) This code is still crazy.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
e0bb7b87e2 gallium/cso_hash: cosmetic changes, no behavior changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
789ed29d59 gallium/cso_hash: remove always constant variable nodeSize
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
a8bbf10540 gallium/cso_hash: make cso_hash declared within structures instead of alloc'd
This removes one level of indirection.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:28 -05:00
Marek Olšák
f8594a06e4 gallium/cso_hash: inline a bunch of functions
I'm probably not getting anything out of this, but it's harmless.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
cf86f522b2 gallium/u_vbuf: adjust the heuristic for unrolling indices
This improves performance in the first subtest of Viewperf11/Catia by 10%.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
55d8baa285 gallium/u_upload_mgr: don't do align twice in the u_upload_alloc fast path
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
19c18d532e gallium/u_upload_mgr: reduce dereferences by adding buffer_size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
909a2d0ed3 st/mesa: simplify releasing the current attrib buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
6954efce23 st/mesa: make st_setup_current static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
e3617fd00b st/mesa: change some loops from while to do..while in st_atom_array.c
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
fd6636ebc0 st/mesa: simplify determination whether a draw needs min/max index
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
1d93372802 st/mesa: simplify determination whether a draw has user vertex buffers
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
61e4c582e0 st/mesa: always inline the code setting non-64bit vertex elements
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
3c98dccd40 mesa: remove unused _mesa_draw_indirect
All drivers that expose ARB_draw_indirect also set the driver callback.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Marek Olšák
e6448f993b mesa: translate into gallium vertex formats in mesa/main
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
2020-02-14 18:16:27 -05:00
Francisco Jerez
8d3b86e34a intel/fs/gen7+: Implement discard/demote for SIMD32 programs.
At this point this simply involves fixing the initialization of the
sample mask flag register to take the right dispatch mask from the
thread payload, and fixing sample_mask_reg() to return f1.1 for the
second half of a SIMD32 thread.  This improves Manhattan 3.1
performance by 2.4%±0.31% (N>40) on my ICL with SIMD32 enabled
relative to falling back to SIMD16 for the shaders that use discard.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:49 -08:00
Francisco Jerez
04c7d3d4b1 intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.
In SIMD32 programs that don't use discard, the upper 16 bits of the UD
result of sample_mask_reg() don't contain the sample mask of the upper
16 channels as one would expect.  Stop pretending we are returning a
valid 32-bit mask.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:49 -08:00
Francisco Jerez
1c6853a9be intel/fs: Refactor predication on sample mask into helper function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
a792e11f5c intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.
FIND_LIVE_CHANNEL was using f1.0-f1.1 as temporary flag register on
Gen7, instead use f0.0-f0.1.  In order to avoid collision with the
discard sample mask, move the latter to f1.0-f1.1.  This makes room
for keeping track of the sample mask of the second half of SIMD32
programs that use discard.

Note that some MOVs of the sample mask into f1.0 become redundant now
in lower_surface_logical_send() and lower_a64_logical_send().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>x
2020-02-14 14:31:48 -08:00
Francisco Jerez
083fd96a97 intel/fs: Use helper for discard sample mask flag subregister number.
Use it instead of hard-coding f0.1 for the sample mask of programs
that use discard.  This will make the task easier when we replace f0.1
with another flag register location in order to support discard with
SIMD32 shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
a6bc11a789 intel/fs: Make sample_mask_reg() local to brw_fs.cpp and use it in more places.
It's only really useful there.  This will avoid confusion with another
helper with a similar purpose I'm about to introduce that will be
useful in multiple files from the FS back-end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
b84fa0b31e intel/fs/gen11: Work around dual-source blending hangs in combination with SIMD32.
The SIMD8 dual-source blending framebuffer write messages seem to have
trouble releasing the pixel scoreboard dependency in SIMD32 dispatch
mode, which leads to hangs.  I have a better workaround for this which
doesn't involve disabling SIMD32 when dual-source blending is enabled,
but I'm still investigating some issues with it.  Limit the dispatch
width to SIMD16 in such cases for the moment in order to make the CI
happy on ICL with SIMD32 fragment shaders enabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
57dee58c82 intel/fs: Set src0 alpha present bit in header when provided in message payload.
Currently the "Source0 Alpha Present to RenderTarget" bit of the RT
write message header is derived from brw_wm_prog_data::replicate_alpha.
However the src0_alpha payload is provided anytime it's specified to
the logical message.  This could theoretically lead to an
inconsistency if somebody provided a src0_alpha value while
brw_wm_prog_data::replicate_alpha was false, as I'm planning to do in
a future commit in order to implement a hardware workaround.

Instead calculate the header bit based on whether a src0_alpha value
was provided to the logical message, which guarantees the same
behavior on pre-ICL and ICL+ (the latter used an extended descriptor
bit for this which didn't suffer from the same issue).  Remove the
brw_wm_prog_data::replicate_alpha flag.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
e14529ff32 intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow.
Together with the fixup_nomask_control_flow() pass introduced in a
previous patch, this implements a less invasive alternative to the
workaround documented in the hardware spec for GEN:BUG:1407528679,
which doesn't involve disabling structured control flow.

Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down.  This could break assumptions of the SWSB pass
if the data computed by a NoMask instruction is synchronized against
by using an SWSB annotation baked into a regular execution-masked
instruction, since the first (NoMask) instruction may be executed
redundantly by the hardware, even though the second will correctly be
shot down, potentially leading to a RaW or WaW hazard if a third
instruction subsequently accesses the destination register of the
first instruction.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
4e4e8d793f intel/fs/gen12: Fixup/simplify SWSB annotations of SIMD32 scratch writes.
Found by inspection.  Existing code was trying to avoid assuming that
an SBID had been assigned to the virtual instruction, but
synchronizing the header setup with respect to the previous SIMD16
SEND by using SYNC.ALLRD doesn't really seem possible unless the SEND
instruction had been assigned an SBID.  Assert-fail instead if no SBID
has been allocated.

Fixes: 15e3a0d9d2 "intel/eu/gen12: Set SWSB annotations in hand-crafted assembly."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
a8ac0bd759 intel/fs/gen12: Workaround unwanted SEND execution due to broken NoMask control flow.
This is a less invasive alternative to the workaround documented in
the hardware spec for GEN:BUG:1407528679, which doesn't involve
disabling structured control flow (it's unlikely that switching to
GOTO/JOIN would have actually fixed the problem anyway).

Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down.  This may break assumptions of some NoMask
SEND messages whose descriptor depends on data generated by live
invocations of the shader.

This avoids the problem by predicating certain instructions on an ANY
horizontal predicate that makes sure that their execution is omitted
when all channels of the program are disabled.  The shader-db impact
of this patch seems to be minimal:

total instructions in shared programs: 17169833 -> 17169913 (0.00%)
instructions in affected programs: 30663 -> 30743 (0.26%)
helped: 0
HURT: 42

total cycles in shared programs: 336966176 -> 336968568 (0.00%)
cycles in affected programs: 2367290 -> 2369682 (0.10%)
helped: 0
HURT: 13

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
008f95a043 intel/fs: Add virtual instruction to load mask of live channels into flag register.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
b8b509fb92 intel/fs/gen7: Fix fs_inst::flags_written() for SHADER_OPCODE_FIND_LIVE_CHANNEL.
We need to pass a width of 32 since the opcode bashes the whole f1.0
register on IVB.  This is unlikely to have caused problems since f1.0
is largely unused currently.  That's likely to change soon though,
even on platforms other than Gen7.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
c9e33e5cbf intel/fs/cse: Make HALT instruction act as CSE barrier.
Found by inspection.  This seems particularly likely to cause problems
with instructions dependent on the current execution mask like
SHADER_OPCODE_FIND_LIVE_CHANNEL or the FS_OPCODE_LOAD_LIVE_CHANNELS
instruction I'm about to introduce, but one could imagine it leading
to data corruption if CSE ever managed to combine two instructions
before and after the FS_OPCODE_PLACEHOLDER_HALT, since the one before
may not be executed for some channels.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Andreas Baierl
fe1b0b7c50 lima/parser: Extend rsw parsing showing strings instead of numbers
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3807>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3807>
2020-02-14 21:48:25 +00:00
Marek Olšák
7e2b4bf256 radeonsi: don't wait for shader compilation to finish when destroying a context
This was a hack for glsl_types deinitialization and it predates the proper
fix, which was the addition of glsl_type_singleton_decref.

This fixes a crash when the context is destroyed via the atexit handler.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
2020-02-14 16:19:38 -05:00
Eric Engestrom
7bee388fb5 egl: directly access static members instead of using _egl{Get,Set}ConfigKey()
This function is meant for when the attribute is unknown at compile-time
(eg. user-specified), but in all these cases it is much simpler to just
read/write the member directly.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3816>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3816>
2020-02-14 18:03:07 +00:00
Jonathan Marek
946eacbafb freedreno/a6xx: document some unknown bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
2020-02-14 08:22:33 -05:00
Jonathan Marek
75fbe089a6 freedreno: name sysmem color/depth flush events
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
2020-02-14 08:22:33 -05:00
Alyssa Rosenzweig
c57456aab6 panfrost: Simplify swizzle translation
It lines up anyway, and Gallium shouldn't change this. (And if it does,
we'll deal with that then since CI would start failing.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
2020-02-14 12:53:36 +00:00
Icecream95
f3490a141c panfrost: Inline panfrost_get_default_swizzle
This commit replaces panfrost_get_default_swizzle with an inlined
implementation where the returned values can be determined at compile
time.

According to perf, this previously used about 2% CPU for Openarena.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
2020-02-14 12:53:36 +00:00
Elie Tournier
efda2cfcf9 spirv2nir: Add kernel spirv support
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
2020-02-14 11:14:58 +00:00
Elie Tournier
eeb6d61128 spirv2nir: print nir shader if translation succed
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
2020-02-14 11:14:58 +00:00
Erik Faye-Lund
7e80b03dd1 zink: do not use SpvDimRect
Vulkan doesn't support SpvDimRect. But we don't need to pass this at
all, as we already mark the sampler as un-normalized.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3764>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3764>
2020-02-14 10:51:46 +00:00
Vasily Khoruzhick
f43a3fc28f lima: handle early-z and pixel kill better
[1] calls bit 12 of aux0 'pixel kill' which is likely forward pixel
kill described in [2]. Blob sets this bit if early-z is enabled and
blending is disabled and colormask is RGBA.

Bit 8 seems to be always enabled with bit 9 (early-z).

Let's mimic blob behavior.

[1] https://web.archive.org/web/20171026123213/http://limadriver.org/Render_State/
[2] https://community.arm.com/developer/tools-software/graphics/b/blog/posts/killing-pixels---a-new-optimization-for-shading-on-arm-mali-gpus

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3754>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3754>
2020-02-14 10:03:01 +00:00
Michel Dänzer
582d0c5f14 gitlab-ci: Add three more dEQP-GLES31 tests to softpipe skips
These have randomly flipped lately, see e.g.
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/1620056
https://gitlab.freedesktop.org/daenzer/mesa/-/jobs/1621374
https://gitlab.freedesktop.org/daenzer/mesa/-/jobs/1622156

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
2020-02-14 09:55:48 +01:00
Michel Dänzer
3d16bfc42d gitlab-ci: Sort random failure softpipe skips
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
2020-02-14 09:55:10 +01:00
Samuel Pitoiset
f86bf2e90a docs/new_features: empty the feature list for the 20.1 cycle
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3793>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3793>
2020-02-14 07:31:20 +00:00
Samuel Pitoiset
886acbe1c5 radv: remove unnecessary RADV_DEBUG=nobatchchain option
It was used in the past but nowadays chained submissions work fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
2020-02-14 07:48:14 +01:00
Timothy Arceri
676869e1d4 glsl: fix gl_nir_set_uniform_initializers() for image arrays
The if was incorrectly checking for an image type on what could
be an array of images. Here we change it to use the type stored
in uniform storage which has already been stripped of arrays,
this is what the above code for samplers does also.

Fixes: 2bf91733fc ("nir/linker: Set the uniform initial values")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
2020-02-14 01:37:03 +00:00
Rafael Antognolli
6baeca3689 intel/tools: Update aubinator_error_decode.
"ringbuffer" is now called only "ring" in the error state.

v2: Keep compatible with old error state (Lionel).
v3: Also update "gtt_offset" -> "batch".

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1206
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-02-13 16:53:18 -08:00
Rob Clark
334788d4cc freedreno: allow INVALID modifier
Re-allow INVALID modifier in import path.  The legacy import path
(createImageFromFds()), which is used by android, uses the INVALID
modifier.  Previously we would ignore this and just setup the imported
buffer as linear.  Restore this behavior to unbreak the legacy import
path.

Fixes: 9891062642 freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
2020-02-13 19:16:17 +00:00
Sagar Ghuge
3547e19bbd intel/isl: Switch to R8_UNORM format for compatiblity
Gen12 added CCS_E support for A8_UNORM. Intercept A8_UNORM format and
switch to R8_UNORM, as both share the same aux map format encoding so
they are compatible.

Fixes Piglit's ext_framebuffer_multisample-formats all_samples, which
was hitting an assert about A8_UNORM and R8_UINT not being CCS_E
compatible formats.

v2: Add gen check (Kenneth Graunke)

v3: Intercept A8_UNORM and set format to R8_UNORM (Jason Ekstrand)

v4:
- Remove gen check and move block little bit down (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
2020-02-13 18:44:50 +00:00
Sagar Ghuge
207a93bbff intel/isl: Move get_format_encoding function to isl
Move get_format_encoding function to isl and rename to
isl_get_aux_map_format_encoding.

v2:
- Rename isl_get_aux_map_format_encoding to
  isl_format_get_aux_map_encoding (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
2020-02-13 18:44:50 +00:00
Fritz Koenig
2a98cf3b2e Revert "gitlab-ci: disable a630 tests as mesa-cheza is down (again)"
This reverts commit 18657c0c0a

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
2020-02-13 18:13:55 +00:00
Jonathan Marek
5a82273f09 freedreno/a6xx: fix Z24_UNORM_S8_UINT_AS_R8G8B8A8
CI didn't run so missed this.

Note previously had :
   texfmt = TFMT6_Z24_UNORM_S8_UINT
   rbfmt = RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8

which are both now FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8

Fixes: 18786cc7d5 ("freedreno/a6xx: use single format enum")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
2020-02-13 18:13:55 +00:00
Lionel Landwerlin
4151d84323 iris: add support INTEL_blackhole_render
v2: Use a software mechanism to manage blackhole state

v3: s/iris_batchbuffer/iris_batch/ (Ken)

v4: Fixup state transition mistake (Ken/Lionel)

v5: Cleanup iris_batch_flush (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
6d35610bd5 st: add support for INTEL_blackhole_render
Adding a new CSO proved to be fairly difficult especially because this
extension affect draw/dispatch/blit alike.

Instead this change passes the state of the noop into the entry points
emitting the operations affected.

v2: Fix assert in default pipe caps

v3: Drop whitespace changes (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
5d7e9edba1 i965: enable INTEL_blackhole_render
v2: condition the extension on context isolation support from the
    kernel (Chris)

v3: (Lionel)

    The initial version of this change used a feature of the Gen7+
    command parser to turn the primitive instructions into no-ops.
    Unfortunately this doesn't play well with how we're using the
    hardware outside of the user submitted commands. For example
    resolves are implicit operations which should not be turned into
    no-ops as part of the previously submitted commands (before
    blackhole_render is enabled) might not be disabled. For example
    this sequence :

       glClear();
       glEnable(GL_BLACKHOLE_RENDER_INTEL);
       glDrawArrays(...);
       glReadPixels(...);
       glDisable(GL_BLACKHOLE_RENDER_INTEL);

    While clear has been emitted outside the blackhole render, it
    should still be resolved properly in the read pixels. Hence we
    need to be more selective and only disable user submitted
    commands.

    This v3 manually turns primitives into MI_NOOP if blackhole render
    is enabled. This lets us enable this feature on any platform.

v4: Limit support to gen7.5+ (Lionel)

v5: Enable Gen7.5 support again, requires a kernel update of the
    command parser (Lionel)

v6: Disable Gen7.5 again... Kernel devs want these patches landed
    before they accept the kernel patches to whitelist INSTPM (Lionel)

v7: Simplify change by never holding noop (there was a shortcoming in the test not considering fast clears)
    Only program register using MI_LRI (Lionel)

v8: Switch to software managed blackhole (BDW hangs on compute batches...)

v9: Simplify the noop state tracking (Lionel)

v10: Don't modify flush function (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v8)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
74ec39f66d mesa: add INTEL_blackhole_render
v2: Implement missing Enable/Disable (Emil)

v3: Drop unused NewIntelBlackholeRender (Ken)

v4: Bring back NewIntelBlackholeRender as i965 implementation uses it
    again (Lionel)

v5: Drop atom (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Thong Thai
08cff938b7 Revert "st/va: Convert interlaced NV12 to progressive"
This reverts commit 2add63060b.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2454
Fixes: 2add63060b "st/va: Convert interlaced NV12 to progressive"
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
2020-02-13 16:43:02 +00:00
Jason Ekstrand
3a2977e7b5 anv: Reject modifiers on depth/stencil formats
6790397346 added code which attempts to reject modifiers on
depth/stencil formats but it was placed after the early return for depth
and stencil aspects.  This commit moves it up so it actually works.

Of course, this doesn't actually matter because the only user of any of
the modifiers stuff is the WSI code and it will never do anything with
depth/stencil.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
2020-02-13 15:40:18 +00:00
Krzysztof Raszkowski
5a593bec16 gallium/swr: fix rdtsc debug statistics mechanism
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
2020-02-13 15:33:27 +01:00
Rhys Perry
dd16ad107d gitlab-ci: remove load_store_vectorizer from expected s390x test failures
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
2020-02-13 10:53:37 +00:00
Rhys Perry
aca2458d1b nir: fix nir_const_value_as_uint bit size in load/store vectorizer tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
2020-02-13 10:53:37 +00:00
Erik Faye-Lund
0c1ba69a27 Revert "nir: Add a couple trivial abs optimizations"
These were already added in 9fdaeb7776 ("nir: add min/max optimisation"),
and there's no point in doing them twice.

This reverts commit e4d346c86d.

Fixes: e4d346c86d ("nir: Add a couple trivial abs optimizations")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
2020-02-13 09:18:27 +00:00
Tapani Pälli
fdd20be324 iris: fix aux buf map failure in 32bits app on Android
Cc: mesa-stable@lists.freedesktop.org
Reported-by: Zhifang Long <zhifang.long@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
2020-02-13 10:54:53 +02:00
Samuel Pitoiset
b9e0947a9e radv: remove unused RADV_HASH_SHADER_IS_GEOM_COPY_SHADER
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Samuel Pitoiset
b2531370c9 radv: remove RADV_DEBUG=nosisched and RADV_PERFTEST=sisched
They are no longer useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Samuel Pitoiset
fa48e7edc2 radv: remove LLVM sicheduler enable for The Talos Principle
sisched is completely unmaintained, it used to give few more FPS
in the past but with ACO, it's now obsolete. It seems even faster
without sisched now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Tapani Pälli
f7d1bf075a glsl: fix a memory leak with resource_set
==7265== 248 (120 direct, 128 indirect) bytes in 1 blocks are definitely lost in loss record 1,438 of 1,465
   ==7265==    at 0x483980B: malloc (vg_replace_malloc.c:309)
   ==7265==    by 0x598A2AB: ralloc_size (ralloc.c:119)
   ==7265==    by 0x598F861: _mesa_set_create (set.c:127)
   ==7265==    by 0x599079D: _mesa_pointer_set_create (set.c:570)
   ==7265==    by 0x58BD7D1: build_program_resource_list(gl_context*, gl_shader_program*, bool) (linker.cpp:4026)
   ==7265==    by 0x548231B: st_link_shader (st_glsl_to_ir.cpp:170)
   ==7265==    by 0x54DA269: _mesa_glsl_link_shader (ir_to_mesa.cpp:3119)

Fixes: a6aedc66 ("st/glsl_to_nir: use nir based program resource list builder")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
2020-02-13 07:47:33 +00:00
Samuel Pitoiset
556c940149 radv: implement VK_EXT_line_rasterization
Only Bresenham lines are supported. GFX9 is currently disabled
because there is some CTS failures for some weird reasons.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
2020-02-13 08:14:01 +01:00
Samuel Pitoiset
fbcf05382b radv: fix line width range and granularity
The hardware supports wide lines and the granularity is way larger.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
2020-02-13 08:14:01 +01:00
Connor Abbott
da64c35ff9 tu: Force sysmem with mipmapped non-aligned linear stores
Fixes hangs with
dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear.single_layer.r8g8b8a8_unorm
and many others on a640, and presumably silent corruption with a630.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:05 -05:00
Connor Abbott
f026982265 tu: Support input attachments with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:05 -05:00
Connor Abbott
c1b3f9e832 tu: Support resolve ops with sysmem rendering
Similar to vkCmdClearAttachments(), we use CP_COND_REG_EXEC to
conditionally execute both the gmem and sysmem paths, except for after
the last subpass where it's known whether we're using sysmem rendering
or not.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:01 -05:00
Connor Abbott
8647a24a8d tu: Handle vkCmdClearAttachments() with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:41 -05:00
Connor Abbott
07e07daeae tu: Add helper for CP_COND_REG_EXEC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:41 -05:00
Connor Abbott
6a0c4008bf tu: Sysmem rendering
This has only lightly been tested. It passes dEQP-VK.api.smoke.triangle,
so at least we're able to show a triangle. For now, it's just enabled
under a debug flag. In the future we'll probably want some heuristics
like what freedreno has and another debug flag to disable it except when
it's forced.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:36 -05:00
Connor Abbott
041783d49d tu: Disable linear depth attachments
Also, disable importing depth/stencil textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:57 -05:00
Connor Abbott
ab3db20cb5 tu: Support multisample image clears
We may need shader workarounds for some formats, but for now this seems
to work at least as well as the gmem path for clearing multisample
attachments. And soon we'll start calling this even on the gmem path,
since we leave the final decision of whether to use sysmem or not up
till the end, so we can't have it assert or otherwise working tests
would assert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:57 -05:00
Connor Abbott
a5fb515301 tu/blit: Support blits in secondary cmdstreams
For sysmem rendering we'll have to emit a delayed clear IB to implement
LOAD_OP_*, similar to the existing tile_load_ib.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:44 -05:00
Connor Abbott
a94be3da84 tu: Properly set UBWC flags in RB_RENDER_CNTL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:23:50 -05:00
Connor Abbott
49817cb3ea tu: Don't emit initial render target state in tile_load_ib
Emitting it directly in CmdBeginRenderPass should be around the same,
except that now we can easily share it with the sysmem path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:23:50 -05:00
Peng Huang
0660cbf426 radeonsi: make si_fence_server_signal flush pipe without work
glSignalSemaphoreEXT sometime doesn't signal the semaphore, it is
because radeonsi doesn't flush if gl context doesn't have pending
work. Fix the porblem by always submit ib.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
2020-02-12 23:51:50 +00:00
Chad Versace
787b56ac0e turnip: Add a618 support
I merely ported a freedreno patch to turnip which
updates some magic regsiter values.

    commit ff6e148a3d
    Author:     Rob Clark <robdclark@chromium.org>
    CommitDate: Tue Oct 29 09:19:34 2019 -0700
    Subject:    freedreno/a6xx: add a618 support

That's all that Rob did for gallium for a618, so I assume that's we need
for turnip also.

Tested manually with:

    dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.*
        pass 300/555
        fail   0/555
        skip 255/555

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
2020-02-12 23:27:43 +00:00
Chad Versace
ef5da26089 turnip: Add magic register values to tu_physical_device
The value of some magic regsiters differ across chipsets. fd6_context
manages the differences by initializing them at runtime. Let's do the
same.

Add to tu_physical_device a subset of those found in fd6_context:

    RB_UNKNOWN_8E04_blit
    RB_CCU_CNTL_gmem
    PC_UNKNOWN_9805
    SP_UNKNOWN_A0F8

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
2020-02-12 23:27:43 +00:00
Jonathan Marek
18786cc7d5 freedreno/a6xx: use single format enum
Loses some information about which formats can be used in which cases, but
we encode that information in the format table anyway.

Important notes:
* RB6_R10G10B10A2_UNORM becomes FMT6_R10G10B10A2_UNORM_DEST
* TFMT6_8_8_8_UNORM becomes FMT6_8_8_8_X8_UNORM (not FMT6_8_8_8_UNORM)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
2020-02-12 21:59:59 +00:00
Chad Versace
c13202af7a anv: Respect ISL_SURF_USAGE_DISABLE_AUX_BIT in make_surface()
If set, then don't make the aux surface.

Only anv_android.c used the flag, but anv_image.c fully ignored it.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
2020-02-12 21:34:02 +00:00
Chad Versace
a76fd8b08c anv: Clarify behavior of anv_image_aspect_to_plane()
It returns the aspect's _format_ plane, not its _memory_ plane (using the
vocabulary of VK_EXT_image_drm_format_modifier).

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
2020-02-12 21:01:45 +00:00
Chad Versace
da2b0c6c19 anv: Delete anv_image::ccs_e_compatible
It was set exactly once, and read exactly once, both times during
anv_image_create().

I found its permanency as a member of anv_image to be distracting while
implementing VK_EXT_image_drm_format_modifier.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
2020-02-12 20:31:39 +00:00
Rhys Perry
483d4ec57c aco: improve SCC handling in some SALU combines
Add some checks and remove some unnecessary checks.

Found by observation. No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
2020-02-12 19:18:45 +00:00
Rhys Perry
d45e9451cf aco: disable some instruction combining if it could change an exec operand
Found by observation. No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
2020-02-12 19:18:40 +00:00
Arcady Goldmints-Orlov
e9f83185a2 Rename nir_lower_constant_initializers to nir_lower_variable_initalizers
This is naming is more clear as nir_variables can be initializes not
just with a nir_constant but with a pointer to another nir_variable.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
2020-02-12 15:41:49 +00:00
Arcady Goldmints-Orlov
e459c7f0a1 compiler/spirv: Add support for non-constant initializers
This adds support for OpVariable having an initializer that points to
another variable, rather than a constant. In this case, the variable is
initialized to a pointer to the other variable.

Fixes Vulkan CTS tests:
dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.*

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
2020-02-12 15:41:49 +00:00
Arcady Goldmints-Orlov
7acc81056f compiler/nir: Add support for variable initialization from a pointer
Add a pointer_initializer field to nir_variable analogous to
constant_initializer, which can be used to initialize the nir_variable
to a pointer to another nir_variable. Just like the
constant_initializer, the pointer_initializer gets eliminated in the
nir_lower_constant_initializers pass.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
2020-02-12 15:41:49 +00:00
Veerabadhran
461c40e0fd radeon/vce: Move global function pointer si_get_pic_param to local encoder structure
Multi gpu use case broken when the function was global

Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
2020-02-12 13:43:35 +00:00
Chad Versace
286141197d anv: Rename param make_surface::dev to device
Everywhere in anvil, each variable of type anv_device is named 'device',
except this single instance. Rename it for consistency.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
2020-02-11 13:26:38 -06:00
Chad Versace
84b791a4bb anv: Drop unused anv_image_get_surface_for_aspect_mask()
Replaced by anv_image.c:get_surface() in:

  commit a62a979335
  Author:     Lionel Landwerlin <lionel.g.landwerlin@intel.com>
  CommitDate: Fri Oct 6 16:32:20 2017 +0100
  Subject:    anv: enable multiple planes per image/imageView

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
2020-02-11 13:26:06 -06:00
Michel Dänzer
2303762735 gitlab-ci: Only use gstreamer runners for the s390x job for now
The fdo-packet-* runners keep hitting the (already quite long) timeouts
for some of the tests, taking many times as long for them as the
gstreamer runners.

The fdo-gitlab-gce-runner3 runner would work as well, but it doesn't
have any tags we could use.

Acked-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3760>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3760>
2020-02-11 09:59:08 +01:00
Samuel Pitoiset
8e77280774 nir: do not use De Morgan's Law rules for flt and fge
In presence of NaNs, "!(flt(a, b) && flt(c, d))" is NOT EQUAL
to "fge(a, b) || fge(c, d)". These optimizations are unsafe for
apps that rely on NaN behaviour.

pipeline-db (GFX9/LLVM):
Totals from affected shaders:
SGPRS: 3176 -> 3136 (-1.26 %)
VGPRS: 2188 -> 2144 (-2.01 %)
Spilled SGPRs: 227 -> 169 (-25.55 %)
Code Size: 150572 -> 151800 (0.82 %) bytes
Max Waves: 307 -> 310 (0.98 %)

pipeline-db (GFX9/ACO):
Totals from affected shaders:
SGPRS: 18744 -> 18744 (0.00 %)
VGPRS: 15576 -> 15580 (0.03 %)
Spilled SGPRs: 164 -> 164 (0.00 %)
Code Size: 1573012 -> 1576492 (0.22 %) bytes
Max Waves: 1534 -> 1532 (-0.13 %)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2127
Fixes: d1ed4ffe0b ("nir: Use De Morgan's Law on logic compounded comparisons")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3696>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3696>
2020-02-11 08:36:00 +01:00
Samuel Pitoiset
ddd767387f aco: fix creating v_madak if v_mad_f32 has two sgpr literals
Do not ignore that src1 can be a sgpr.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2435
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3759>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3759>
2020-02-11 07:17:31 +00:00
Samuel Pitoiset
cd08d9abd7 radv: set the chip name to GCN-NOOP when RADV_FORCE_FAMILY is set
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
2020-02-11 07:56:59 +01:00
Samuel Pitoiset
a8024aaaab radv: make sure to not submit any IBs when RADV_FORCE_FAMILY is set
To prevent GPU hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
2020-02-11 07:56:55 +01:00
Bas Nieuwenhuizen
5b335e1599 radv: Do not redundantly set the RB+ regs on pipeline switch.
No significant perf changes seen on Bayonetta. (Changes are in the
noise on my Raven Laptop)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3735>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3735>
2020-02-11 04:39:42 +00:00
Vinson Lee
63345a3596 panfrost: Remove unused anonymous enum variables.
This patch fix these build errors with GCC 10.

/usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:52: multiple definition of `pan_sysval'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:52: first defined here
/usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:68: multiple definition of `pan_special_attributes'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:68: first defined here

Fixes: 7e8de5a707 ("panfrost: Implement system values")
Fixes: 306800d747 ("pan/midgard: Lower gl_VertexID/gl_InstanceID to attributes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
2020-02-11 03:26:04 +00:00
Bas Nieuwenhuizen
7792d774e0 radv: Optimize emitting index buffer changes.
Since the direct indexed draw packet has the address/count info
inline, there is no sense in emitting the base and size.

No real significant changes found during benchmarks.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3466>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3466>
2020-02-11 03:07:11 +00:00
Ian Romanick
1d97d186fb nir: Mark fmin and fmax as commutative and associative
Per the resolution of Khronos GLSL issue 80
(https://github.com/KhronosGroup/GLSL/issues/80).  Spec updates have not
landed yet, but I'll get to it soon. :)

The extra hurt shaders on Gen8+ are a handful of shaders that see things like

    bcsel(fmin(b - a, a - c) >= 0, x, y)

converted to

   bcsel(a >= b && c >= a, x, y)

The former can be generated as a CSEL instruction.  If either b - a or a
- c is used elsewhere in the shader, this saves an instruction.

All Haswell+ platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 14550188 -> 14550048 (<.01%)
instructions in affected programs: 12168 -> 12028 (-1.15%)
helped: 30
HURT: 3
helped stats (abs) min: 1 max: 17 x̄: 4.77 x̃: 2
helped stats (rel) min: 0.05% max: 3.85% x̄: 1.77% x̃: 1.80%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.50% max: 0.50% x̄: 0.50% x̃: 0.50%
95% mean confidence interval for instructions value: -6.15 -2.33
95% mean confidence interval for instructions %-change: -2.00% -1.12%
Instructions are helped.

total cycles in shared programs: 203770286 -> 203771464 (<.01%)
cycles in affected programs: 688466 -> 689644 (0.17%)
helped: 172
HURT: 220
helped stats (abs) min: 1 max: 286 x̄: 12.15 x̃: 6
helped stats (rel) min: 0.03% max: 5.97% x̄: 0.70% x̃: 0.35%
HURT stats (abs)   min: 1 max: 578 x̄: 14.85 x̃: 6
HURT stats (rel)   min: 0.03% max: 32.36% x̄: 1.21% x̃: 0.52%
95% mean confidence interval for cycles value: -0.74 6.75
95% mean confidence interval for cycles %-change: 0.15% 0.59%
Inconclusive result (value mean confidence interval includes 0).

total fills in shared programs: 4525 -> 4523 (-0.04%)
fills in affected programs: 48 -> 46 (-4.17%)
helped: 1
HURT: 0

Ivy Bridge
total instructions in shared programs: 11858995 -> 11858898 (<.01%)
instructions in affected programs: 10822 -> 10725 (-0.90%)
helped: 25
HURT: 13
helped stats (abs) min: 1 max: 17 x̄: 5.32 x̃: 2
helped stats (rel) min: 0.40% max: 5.00% x̄: 2.16% x̃: 1.85%
HURT stats (abs)   min: 1 max: 15 x̄: 2.77 x̃: 2
HURT stats (rel)   min: 0.47% max: 2.90% x̄: 1.83% x̃: 2.15%
95% mean confidence interval for instructions value: -4.66 -0.45
95% mean confidence interval for instructions %-change: -1.54% -0.05%
Instructions are helped.

total cycles in shared programs: 177947023 -> 177946880 (<.01%)
cycles in affected programs: 822075 -> 821932 (-0.02%)
helped: 157
HURT: 175
helped stats (abs) min: 1 max: 164 x̄: 13.17 x̃: 4
helped stats (rel) min: 0.03% max: 6.72% x̄: 0.64% x̃: 0.17%
HURT stats (abs)   min: 1 max: 308 x̄: 11.00 x̃: 4
HURT stats (rel)   min: 0.03% max: 9.76% x̄: 0.70% x̃: 0.18%
95% mean confidence interval for cycles value: -3.86 3.00
95% mean confidence interval for cycles %-change: -0.09% 0.22%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 4185 -> 4188 (0.07%)
spills in affected programs: 146 -> 149 (2.05%)
helped: 0
HURT: 1

total fills in shared programs: 5248 -> 5249 (0.02%)
fills in affected programs: 347 -> 348 (0.29%)
helped: 0
HURT: 1

Sandy Bridge
total instructions in shared programs: 10680224 -> 10680144 (<.01%)
instructions in affected programs: 4702 -> 4622 (-1.70%)
helped: 15
HURT: 3
helped stats (abs) min: 1 max: 17 x̄: 5.53 x̃: 5
helped stats (rel) min: 0.39% max: 4.76% x̄: 2.17% x̃: 1.67%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.52% max: 0.52% x̄: 0.52% x̃: 0.52%
95% mean confidence interval for instructions value: -7.24 -1.65
95% mean confidence interval for instructions %-change: -2.55% -0.89%
Instructions are helped.

total cycles in shared programs: 152988780 -> 152985691 (<.01%)
cycles in affected programs: 1072850 -> 1069761 (-0.29%)
helped: 168
HURT: 145
helped stats (abs) min: 1 max: 592 x̄: 33.90 x̃: 12
helped stats (rel) min: 0.02% max: 10.73% x̄: 0.90% x̃: 0.31%
HURT stats (abs)   min: 1 max: 259 x̄: 17.98 x̃: 6
HURT stats (rel)   min: 0.02% max: 8.17% x̄: 0.77% x̃: 0.19%
95% mean confidence interval for cycles value: -17.95 -1.79
95% mean confidence interval for cycles %-change: -0.34% 0.08%
Inconclusive result (%-change mean confidence interval includes 0).

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8107033 -> 8107025 (<.01%)
instructions in affected programs: 696 -> 688 (-1.15%)
helped: 5
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.60 x̃: 2
helped stats (rel) min: 0.34% max: 7.14% x̄: 3.47% x̃: 4.65%
95% mean confidence interval for instructions value: -2.28 -0.92
95% mean confidence interval for instructions %-change: -7.22% 0.28%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 188348526 -> 188348404 (<.01%)
cycles in affected programs: 33618 -> 33496 (-0.36%)
helped: 23
HURT: 0
helped stats (abs) min: 2 max: 12 x̄: 5.30 x̃: 6
helped stats (rel) min: 0.05% max: 1.83% x̄: 0.47% x̃: 0.51%
95% mean confidence interval for cycles value: -6.70 -3.91
95% mean confidence interval for cycles %-change: -0.64% -0.30%
Cycles are helped.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1359>
2020-02-10 18:37:36 -08:00
Eric Anholt
1886dbfe73 Revert "gallium: Fix big-endian addressing of non-bitmask array formats."
This reverts the functional part of commit
d17ff2f7f1, leaving the unit test for
mesa/pipe agreement on what's an array.

The issue is that the util_channel_desc.shift values on array formats are
not used for bit addressing in memory, they're bit addressing within a
word treating a pixel of the format as a native type, as seen by
llvmpipe's use of the values to do shifts (see
lp_build_unpack_arith_rgba_aos() for example).  This means the values are
nonsensical for 3-byte RGB, but then llvmpipe doesn't expose those formats
so it works out.

I still want to clean up our big-endian format handling at some point, but
let's fix the s390x regression first, sort out our format unit tests in
CI, then be able to refactor with confidence.

Fixes: d17ff2f7f1 ("gallium: Fix big-endian addressing of non-bitmask array formats.")
Closes: #2472
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3721>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3721>
2020-02-11 00:53:04 +00:00
Marek Olšák
11db8e0e00 st/mesa: optimize st_update_array with ALWAYSINLINE
The time spent in st_update_array is reduced by 5-10%.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
36cc6b105b mesa: don't use bitfields in _mesa_prim
This is better.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
47d7e21619 mesa: remove unused _mesa_prim::is_indirect
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
734654a89c í965: don't use _mesa_prim::is_indirect
the vbo change only affects i965

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
a7d03103f3 vbo: merge use_buffer_objects into vbo_CreateContext to skip the big malloc
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
7575a0a251 vbo: clean up resetting vertex attribs
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
ee5bd8638b vbo: also map the immediate mode buffer for read
because we read from it sometimes and we want cached reads.

We can only do it with the persistent mapping, because the non-persistent
mapping uses incompatible flags.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
27bd241103 vbo: delay flagging FLUSH_STORED_VERTICES until glEnd
Only state changes see this, which can't occur before glEnd.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
ca99fe8a60 vbo: add/update unlikely statements in ATTR_UNION
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
a5f72c91e5 vbo: increase the size of the immediate mode buffer to decrease draw count
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
2fe771f4e9 vbo: use FlushVertices flags properly and clear NeedFlush correctly
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
63a241fa32 vbo: fix resizing 64-bit vertex attributes
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
077a843c27 vbo: optimize resizing vertex attributes during immediate mode
Just move data manually instead of copying all attributes back and forth.

This increases performance by 5% for Viewperf11/Catia - first scene.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
1f6e53e243 vbo: don't store glVertex values temporarily into exec
This improves performance by 4.3% in Viewperf11/Catia, first scene.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
cd7241c4f8 vbo: pass only either uint32_t or uint64_t into ATTR_UNION
This makes the next commit possible.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
afa7f1984a vbo: don't set FLUSH_UPDATE_CURRENT for glVertex
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
f8b98d48bf vbo: keep the immediate mode buffer always mapped for simplicity
It only unmaps when it draws with a non-persistent buffer.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
8c76ef5b59 vbo: don't check ctx->NewState twice in glBegin
_mesa_valid_to_render does it too.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
f2c6de1eec vbo: remove a funky recursive call in glBegin
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
653bd14730 vbo: interleave attrsz, attrtype, and active_sz in memory
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
2b22e33c10 vbo: remove immediate mode code that doesn't do anything and simplify stuff
no change in behavior

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
3e0d612f5e vbo: don't unmap persistent buffer mappings for glBegin/End
This significantly improves performance by lowering CPU overhead.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
03ded3d6ce vbo: skip FlushMappedBufferRange for glBegin/End by using a persistent mapping
This is a preparation for the next commit and just isolates the removal
of GL_MAP_FLUSH_EXPLICIT_BIT and other map flags that don't make sense with
UNSYNCHRONIZED.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
10cf7a5113 vbo: create the immediate mode buffer only in vbo_exec_vtx_map
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
f89ee44ab0 mesa: import PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET handling
This should decrease overhead in st_update_array.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
27dada7ce9 mesa: remove FLUSH_CURRENT calls that have no effect
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
c7c8fe1cc1 mesa: fix incorrect uses of FLUSH_CURRENT
FLUSH_CURRENT is used to copy attributes from the vbo module to
Current.Attrib. It flushes vertices too, but that's a side effect,
not the intent.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
2020-02-11 00:34:57 +00:00
Marek Olšák
01443dc738 glx: print FPS with 2 decimal places
useful if FPS is low.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3590>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3590>
2020-02-10 19:02:33 -05:00
Marek Olšák
1082e6fcb8 radeonsi: don't update states for the DCC MSAA bug on GFX6-7
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
2020-02-10 17:24:09 -05:00
Marek Olšák
fbb27eebc8 radeonsi: fix the DCC MSAA bug workaround
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
2020-02-10 17:24:02 -05:00
Gert Wollny
897a4a0041 r600/sfn: Add some documentation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
7413aab3c8 r600/sfn: Add .editorconfig file
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
110ee7ff93 r600/sfn: Add support for SSBO load and store
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
148f0ad4f9 r600/sfn: Add support for atomic instructions
v2: fix compilation with gcc-6

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
90a7d2e08f r600: Make sure LLVM is not used for DRAW
For some reasone that is not yet clear the piglit
gl-1.0-rendermode-feedback makes use of the LLVM pipe draw module and
fails there with an assertion. Explicietly disabling LLVM fixes this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
37125b7cc2 r600/sfn: Add lowering UBO access to r600 specific codes
r600 reads vec4 from the UBO, but the offsets in nir are evaluated to the component.
If the offsets are not literal then all non-vec4 reads must resolve the component
after reading a vec4 component (TODO: figure out whether there is a consistent way
to deduct the component that is actually read).

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
32d3435a78 r600/sfn: Add GDS instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
5aadd809d0 r600/sfn: Add compute shader skeleton
This adds some very basic compute shader support.

v2: fix compilation with gcc-6

v3: rebase: correct barrier intrinstic

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
7fb5c835f7 r600/sfn: Add VS for TCS shader skeleton
This adds the VS shader type that handles the output to tesselation shaders

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
e17ac0d774 r600/sfn: Add support for geometry shader
v2: fix compilation with gcc-6

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
5c7124e134 r600/sfn: add emitVertex instructions
More preparation for GS support

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
f7ec616bed r600/sfn: Add MemRingOut instructions
Preparing support for Geometry shaders.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
1b17316bf3 r600/sfn: Add a load GDS result instruction
This is required to read results for atomic SSBO  instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
31a4dd6451 r600/sfn: Add lowering arrays to scratch and according instructions
Make use of the scratch space for arrays that are larger then 100 elements.
Since for IO r600 is vector based, there is a bit of a scratch space waste
here for arrays that use types smaller then vec4.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
5c19013904 r600/sfn: add register remapping
Make use of the live range evaluation to merge registers. Since the
live ranges are evaluated for register indices, the algorithm is not
optimal, but for most piglits up to glsl-3.3 it does the job.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
393655d5cb r600/sfn: add live range evaluation for the GPR
The algoritm is basically a copy of the TGSI implementation without the
array bits.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
24f683fe81 r600/sfn: Add the WaitAck instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
e09cdb3f86 r600/sfn: Add the VS in and FS out vectorization
Since the nir default implementation doesn't support vectorizing the VS
inputs and FS outputs, additional lowering passes are added here to do
just that. The work is based on the Timothy Arceri's related work.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
c5d9456d84 r600: enable NIR backend DEBUG flag for supported architectures
When NIR is enabled, a few features that are not yet supported will be
explicitely disabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
f718ac6268 r600/sfn: Add a basic nir shader backend
This commit adds support for vertex and fragment shaders from NIR, and
support for most TEX and ALU instructions.

Thanks Dave Airlied for adding support for a number of ALU instructions.

v2: fix compilation with gcc-6
v3: rebase: use mesa/core glsl_type_size function

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
295be0e8df r600: Update state code to accept NIR shaders
v2: Correct commit message (Konstantin Kharlamov)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
51285bf32e r600: Add NIR compiler options
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
27cacd28ac r600: Increase space for IO values to agree with PIPE_MAX_SHADER_IN/OUTPUTS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:08 +00:00
Gert Wollny
4422ce1b04 r600: force new CF with TEX only if any texture value is written
This works aound splitting the CF when the gradient is set.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
2020-02-10 19:09:07 +00:00
Neha Bhende
144561dc5e svga: Use pipe_shader_state_from_tgsi to set shader state
Use pipe_shader_state_from_tgsi() to set shader state for transformed
shader so that we get all correct data for respective shader state.

This fixes several regressed glretrace, piglit crashes found during merging
upsteam mesa

Fixes: bf12bc2dd7 (draw: add nir info gathering and building support)

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2020-02-10 09:27:11 -08:00
Neha Bhende
470e73e7f8 svga: fix size of format_conversion_table[]
Since we are now using sparse matrix for format_conversion_table,
we have to make sure we have last entry in table which gives the
sense of required size of format_conversion_table

Fixes: 84db6ba7 ("svga: Drop unsupported formats from the format table")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2020-02-10 09:26:49 -08:00
Krzysztof Raszkowski
689817c9df gallium/swr: simplify environmental variabled expansion code
There were 2 versions of code doing the same thing.
Since std::regexp are locale-sensitive better is to leave old
good way to do this.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3761>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3761>
2020-02-10 17:10:47 +01:00
Samuel Pitoiset
34fd894e42 aco: fix waiting for scalar stores before "writing back" data on GFX8-GFX9
Seems required also on GFX8-GFX9 to achieve correct behaviour. This
is an undocumented behaviour but it makes real sense to me.

pipeline-db on GFX9:
Totals from affected shaders:
SGPRS: 1018 -> 1018 (0.00 %)
VGPRS: 516 -> 516 (0.00 %)
Code Size: 40516 -> 40636 (0.30 %) bytes
Max Waves: 280 -> 280 (0.00 %)

This fixes some sort of sun flickering with Assassins Creed Origins.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2488
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3750>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3750>
2020-02-10 12:07:25 +00:00
Georg Lehmann
7283c33b98 Vulkan overlay: use the corresponding image index for each swapchain
pImageIndices should be a pointer to the current image index
otherwise every swapchain but the first one could have a wrong image index

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3741>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3741>
2020-02-10 11:32:08 +00:00
Erik Faye-Lund
eb0195358c zink: only inspect dual-src limit if feature enabled
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3689>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3689>
2020-02-10 11:01:47 +00:00
Erik Faye-Lund
e365f83740 zink: emit blend-target index
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3689>
2020-02-10 11:01:47 +00:00
Erik Faye-Lund
8736ffae2e zink: replace unset buffer with a dummy-buffer
This fixes a crash in spec@!opengl 1.1@ppgtt_memory_alignment

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3673>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3673>
2020-02-10 10:40:19 +00:00
Samuel Pitoiset
18657c0c0a gitlab-ci: disable a630 tests as mesa-cheza is down (again)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3758>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3758>
2020-02-10 10:34:41 +01:00
Marek Olšák
35961b10da radeonsi: don't report that multi-plane formats are supported
Fixes: a554b45d - st/mesa: don't lower YUV when driver supports it natively
Closes: #2376

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632>
2020-02-07 20:42:42 -05:00
Erik Faye-Lund
1c3f4c0704 zink: fixup sampler-usage
It seems I got this stuff all wrong, and looked at driver_location
rather than the binding. But since we mess with the binding, we need to
adjust things a bit to get things right.

This still isn't great as-is, but it seems to work. In the future, we
should move to having samplers always at bindings 0 and up, and just
update the bindings that are used by either of the stages. But this
band-aid should be OK for now.

This fixes 0AD for me.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3668>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3668>
2020-02-07 22:03:00 +00:00
Erik Faye-Lund
fa915a724f zink: lower away fdph
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3668>
2020-02-07 22:03:00 +00:00
Christian Gmeiner
0c36b1c0db etnaviv: enable texture upload memory throttling
Fixes oom-killer during piglit's streaming-texture-upload on a
SolidRun CuBox-i with 2GB of RAM.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3745>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3745>
2020-02-07 18:21:54 +00:00
Hyunjun Ko
7bddaa6136 freedreno/ir3: Fold const only when the type is float
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:53:48 -08:00
Hyunjun Ko
260bd32b58 freedreno/ir3: put the conversion back for half const to the right place.
The previous commit leads to match immed values unexpectedly.

This makes constlen for each shader including bvert wrong.
Also fixes atan2 for mediump deqp tests.

Fixes: cbd1f47433 ("freedreno/ir3: convert back to 32-bit values for half constant registers.")

v2: Move conversion up above fabs/fneg modifier handling as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:53:42 -08:00
Hyunjun Ko
d70192e697 freedreno/ir3: Add cat4 mediump opcodes
v2: Reworked to assign half-opcodes in ir3_ra.c (krh).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Rob Clark
3eca6d9ce1 freedreno/ir3: fold const conversion into consumer
A sequence like:

  (nop3)cov.f32f16 hr0.x, c0.x
  mul.f hr4.y, hr1.z, hr0.x

can be turned into:

  mul.f hr4.y, hr1.z, hc0.x

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Hyunjun Ko
5e2012d5c7 freedreno/ir3: fix printing half constant registers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Kristian H. Kristensen
d55dfef782 freedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOV
This lets is_same_type_reg() recognize that the dst and src of the
immediate MOV are the same and unblocks fp16 constant propagation.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>
2020-02-07 09:51:25 -08:00
Dylan Baker
fbfc8c3531 docs: Mark 20.0-rc2 as done
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3751>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3751>
2020-02-07 09:02:02 -08:00
Martin Fuzzey
d8bae10bfe freedreno: android: fix build of perfcounters.
Some dependencies were missing on android causing a build failure.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
2020-02-07 16:34:49 +00:00
Martin Fuzzey
fad9924315 freedreno: android: add a6xx-pack.xml.h generation to android build
The generation of a6xx-pack.xml.h was missing in the android build scripts
leading to a build failure.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
2020-02-07 16:34:49 +00:00
Martin Fuzzey
cad400a59e freedreno: android: fix build failure on android due to python version
The freedreno gen_header.py script now only works under python3.
It contains a "print()" call which prints a blank line under python3
but prints "()" under python2.7.

However the Android build currently uses python2.

This leads to incorrect code generation and a later build error.

.../STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno_common.xml.h:163:2: error: expected identifier or '('
()

Fix this by adding MESA_PYTHON3 and using it for the freedreno scripts.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3736>
2020-02-07 16:34:49 +00:00
Krzysztof Raszkowski
ff8265b64f gallium/swr: Fix llvm11 compilation issues
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3747>
2020-02-07 15:03:55 +00:00
Georg Lehmann
f239bb8020 Vulkan Overlay: Don't try to change the image layout to present twice
The render pass already does the transition.
The pipeline barrier is still needed to transfer the queue family ownership.

Fixes: 320b0f66c2 ("vulkan/overlay: bounce image back to present layout")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3740>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3740>
2020-02-07 14:23:23 +00:00
Samuel Pitoiset
4b978cd950 aco: do not use ds_{read,write}2 on GFX6
According to LLVM, these instructions have a bounds checking bug.
LLVM only uses them on GFX7+.

This fixes broken geometry in Assassins Creed Origins.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2489
Fixes: 4a553212fa ("radv: enable ACO support for GFX6")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3746>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3746>
2020-02-07 14:17:06 +01:00
Tapani Pälli
da76dfb515 intel/vec4: fix valgrind errors with vf_values array
Fixes valgrind errors introduced since commit a8ec4082.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2346
Fixes: a8ec4082 ("nir+vtn: vec8+vec16 support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3691>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3691>
2020-02-07 09:06:18 +00:00
Andreas Baierl
1572e8f3e1 lima/parser: Change value name in RSW parser
Second value of SHADER_ADDRESS is the length of the first instruction
in the shader, so give it a better name.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
2020-02-07 09:26:32 +01:00
Andreas Baierl
5802259e54 lima/parser: Extend AUX0 findings
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
2020-02-07 09:26:32 +01:00
Andreas Baierl
cebfb3169c lima/parser: Fix RSW depth test parsing
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3619>
2020-02-07 09:26:32 +01:00
Leandro Ribeiro
eaa0784fd3 i965: remove duplicated comment
Signed-off-by: Leandro Ribeiro <leandrohr@riseup.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2416>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2416>
2020-02-07 07:14:20 +02:00
Kristian H. Kristensen
26ab38f144 ci: Drop turnip opt-in option
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3742>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3742>
2020-02-07 01:36:58 +00:00
Dave Airlie
fbc117cba3 llvmpipe: advertise 4 vertex streams
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
7e6690b1a6 draw: don't emit vertex to streams with no outputs
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
72154c9075 draw: emit multiple streams to streamout.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
00c066e5a0 draw/gs: track emitted prims + verts per stream.
This adds tracking of the emitted prims/verts per-stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
0c77007c9d draw: change geom shader output to an array of outputs.
Instead of a single output ptr, pass in one per output stream.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
8583fcd8f1 gallivm/nir: add support for multiple vertex streams
This adds support to the nir shader build for multiple vertex streams
we store separate stats for each stream, then write them out in the epilogue.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
b668841313 gallivm/swr: add stream_id to geom epilogue emit
We want to pass a stream in here so we can write out separate
prim/vertex counts for each stream at the end.

This also adds an ignore any stream option so we can stage more code

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Dave Airlie
9d70002744 llvmpipe/query: add support for indexed queries
This adds support for the queries needed for gpu_shader5 vertex streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3530>
2020-02-07 00:54:42 +00:00
Eric Anholt
658eb691fc ci: Bump the GLES CTS version to 3.2.6.1.
This brings in the surfaceless fixes so we don't need to check out the
whole repo to cherry pick any more (which was bothering me as I debugged
things late in the painfully slow ARM container build process).

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
2020-02-06 15:18:24 -08:00
Eric Anholt
b37922dd1e ci: Disable a bunch of tests on freedreno a630.
On a daily basis I've been having to restart people's a630 jobs in the
front couple of pages of /merge_requests due to spurious failures from our
flaky tests, and fielding reports of spurious fails from other developers,
and babysitting my own marge merges that are failing due to our flakes.

Nobody should have to deal with that, especially not non-freedreno
developers, so just scrape the list of flakes reported to #freedreno-ci
for the last month and ban those tests that have failed more than once
until we have a credible fix.

Acked-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3662>
2020-02-06 15:18:15 -08:00
Kristian H. Kristensen
b3063cbd18 turnip: Drop explicit configure opt-in for turnip
We don't need this silly thing anymore. Everthing here is WIP.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3739>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3739>
2020-02-06 13:23:40 -08:00
Eric Anholt
4ca77f347d u_tile: Skip the packed temporary and just store tiles directly.
We were generating a packed copy and then memcpying it, but we can just
pack directly to the destination.  Change on glmark2 -b build:use-vbo=true
is modest: 1.06328% +/- 0.994771% (n=84) but does remove the function that
was .6% of CPU time.

I'm not doing the equivalent "get" path at this time because softpipe's
texture cache has some clipping issues that get revealed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3698>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3698>
2020-02-06 20:48:03 +00:00
Jose Maria Casanova Crespo
68bb26af63 broadcom: Fix implicit declaration of ffs for Android build
Include util/bitscan.h to ensure ffs is available when there is no
glibc like in Android.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1983
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
2020-02-06 18:31:13 +01:00
Rhys Perry
ce23911b77 aco: gfx10_wave64_bpermute reduce op to print_ir
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
2020-02-06 16:43:03 +00:00
Rhys Perry
20eb1acb6f aco: fix gfx10_wave64_bpermute
Since 9254fb4fc7, the pass replaced the SCC clobber with the scalar
identity temporary. Just skip most of the temporary setup, since we don't
need it for gfx10_wave64_bpermute.

Although shuffles are disabled on GFX10, Detroit: Become Human seems to
use them anyway.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 9254fb4fc7 ('aco: don't use a scalar
       temporary for reductions on GFX10')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3683>
2020-02-06 16:43:03 +00:00
Georg Lehmann
1c79afd946 Correctly wait in the fragment stage until all semaphores are signaled
This fixes two issues:
- a crash if the application uses more than one semaphore for presenting because the driver expects one stage per semaphore
- the swapchain image could be not ready yet if the semaphores aren't signaled, #946 is possible related

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3718>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3718>
2020-02-06 15:16:47 +00:00
Thomas Hellstrom
451cf228d5 svga: Fix banded DMA upload
A previous commit ("winsys/svga: Limit the maximum DMA hardware buffer
size") made banded DMA transfer kick in when transfering gnome-shell
window contents under gnome-shell / wayland. This uncovered a bug where
we assumed that banded DMA transfers always occur to the top (y=0) of the
surface.
Fix this by taking the destination y offset into account.

Cc: 19.2 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Fixes: 287c94ea49 ("Squashed commit of the following:")
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3733>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3733>
2020-02-06 11:26:04 +00:00
Jason Ekstrand
5aec9e84a8 anv: No-op submit and wait calls when no_hw is set
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3734>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3734>
2020-02-06 10:48:33 +00:00
Lionel Landwerlin
f9febfae41 anv: set MOCS on push constants
v2: Also set MOCS on 3DSTATE_CONSTANT_ALL (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 67d2cb3e93 ("anv: Add get_push_range_address() helper.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3732>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3732>
2020-02-06 10:10:11 +00:00
Michel Dänzer
a140ea1ced llvmpipe: Bump test timeout to 180 seconds
120 still wasn't always enough for the s390x cross-build job, see e.g.
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/1551685

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3715>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3715>
2020-02-06 09:41:28 +00:00
Rafael Antognolli
4aa7af9e9a intel: Load the driver even if I915_PARAM_REVISION is not found.
This param is only available starting on kernel 4.1. Use a default
value of 0 if it is not found instead.

v2: Update commit message (Lionel)

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Fixes: 96e1c945f2 ("i965: Move device info initialization to common
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
2020-02-06 09:46:51 +02:00
Kenneth Graunke
20bcbcd958 isl: Fix the android build.
Fixes: 5bea0cf779 ("intel/isl: Move iris's pipe-to-isl format function to isl.")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
2020-02-05 21:31:40 -08:00
Kenneth Graunke
a92be2fb26 intel/genxml: Drop "reserved" enum
This was adding "#define reserved 2" to genxml includes, which is a
fairly mean lowercase word to redefine.  It ends up breaking the build
on Android, which has __u32 reserved fields in headers.

Defining it also has no purpose.  Just drop it.

Fixes: 5bea0cf779 ("intel/isl: Move iris's pipe-to-isl format function to isl.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3729>
2020-02-05 21:31:27 -08:00
Vinson Lee
deb2bbf57e swr: Fix GCC 4.9 checks.
Fixes: f0a22956be ("swr/rast: _mm*_undefined_* implementations for gcc<4.9")
Fixes: e21fc2c625 ("swr/rast: non-regex knob fallback code for gcc < 4.9")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
2020-02-05 19:39:13 -08:00
James Xiong
205ce0bea5 gallium: let the pipe drivers decide the supported modifiers
fixes: ac0219cc5b ("gallium: dmabuf support for yuv formats that are not natively supported")

Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
2020-02-06 00:43:58 +00:00
James Xiong
d8569baaed iris: handle the failure of converting unsupported yuv formats to isl
Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3527>
2020-02-06 00:43:58 +00:00
Eric Engestrom
76f300f2e4 Revert "egl: put full path to libEGL_mesa.so in GLVND json"
This reverts commit 0021f7dc30.

That commit had 2 issues:
- I missed the `.0` from the filename, causing issues on Debian & Ubuntu
  platforms.
- I didn't think about multilib/multi-arch systems, where we'd now need
  a separate json for each arch as they point to different libs.

Reverting this commit for now, I'll try again later.

Requested-by: Michel Dänzer <michel@daenzer.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2466
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2471
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2480
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3726>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3726>
2020-02-06 00:19:13 +00:00
Eric Engestrom
9595b23a45 meson: don't bother trying python2
Meson requires `python3`, so we know it's there, no need to fall back to
python2.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3701>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3701>
2020-02-05 23:17:26 +00:00
Timur Kristóf
4d34abd15c aco/optimizer: Don't combine uniform bool s_and to s_andn2.
Fixes: 8a32f57fff

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3714>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3714>
2020-02-05 22:53:45 +00:00
Eric Anholt
a77c3d5eed nouveau: Reuse tgsi_get_gl_varying_semantic().
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:26:00 +00:00
Eric Anholt
f4f769c851 nouveau: reuse tgsi_get_gl_frag_result_semantic().
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:25:59 +00:00
Eric Anholt
f9358f6f76 nouveau: Reuse tgsi_get_sysval_semantic().
It's now in a place accessible from the nouveau driver.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:25:59 +00:00
Eric Anholt
e25967d6b8 mesa/st: Move the SYSTEM_VALUE -> TGSI_SEMANTIC map to tgsi_from_mesa.
This will let us reuse the table from nir-to-tgsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3506>
2020-02-05 22:25:59 +00:00
Kristian H. Kristensen
9891062642 freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
This brings back fd6_fill_ubwc_buffer_sizes() to implement
layout_resource_for_modifier for DRM_FORMAT_MOD_QCOM_COMPRESSED.

Fixes: ecd62ff766 "freedreno: Allow UBWC on textures with multiple mipmap levels."
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Kristian H. Kristensen
d233c8c914 freedreno: Add layout_resource_for_modifier screen vfunc
This function is responsible for completing the layout for an imported
resource with the given modifier.  Returns 0 on success or -1 If the
modifier is unsupported, invalid or the input parameters are not
compatible with the modifier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Kristian H. Kristensen
af6fb4f0a9 freedreno: Set up supported modifiers in fd*_resource_screen_init()
Keep the modifier logic together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Kristian H. Kristensen
d0a7c8f4a8 freedreno/a6xx: Add fd6_resource_screen_init()
We'll move a few things here in the next commits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3704>
2020-02-05 20:53:32 +00:00
Eric Anholt
8d07d66180 glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.
This means you can directly use format utils on it without having to have
your own GL enum to number-of-components switch statement (or whatever) in
your vulkan backend.

Thanks to imirkin for fixing up the nouveau driver (and a couple of core
details).

This fixes the computed qualifiers for EXT_shader_image_load_store's
non-integer sizeNxM qualifiers, which we don't have tests for.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v3d)
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
2020-02-05 10:31:14 -08:00
Eric Anholt
5bea0cf779 intel/isl: Move iris's pipe-to-isl format function to isl.
This will get reused in the shader compiler once we switch it over to pipe
formats instead of GL enums.  We can't easily deduplicate i965's
mesa-to-isl mapping because of cases like A32_FLOAT that are mapped
differently.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
2020-02-05 10:31:09 -08:00
Eric Anholt
bb615e5fe3 mesa: Clean up some endianness adapters for shader image formats.
We already had a uint version in formats.h, move the snorm/unorm ones
there, too.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
2020-02-05 10:31:09 -08:00
Jan Zielinski
23c137612b gallium/swr: Fix various asserts and security issues
To improve the robustness of the code, we want to better
detect issues in testing (using asserts) and use more
secure techniques.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3710>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3710>
2020-02-05 16:08:44 +00:00
Alyssa Rosenzweig
7eaf21cb6f pan/midgard: Fix scheduling issue with csel + render target reference
Fixes dEQP-GLES3.functional.shaders.fragdepth.write.dynamic_conditional_write

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
38c20696a5 panfrost: Set the MALI_WRITES_{Z,S} flags when needed
In order to make Z/S writes from fragment shaders effective, we need
to set the MALI_WRITES_{Z,S} flags when the shader has a
FRAG_RESULT_{DEPTH,STENCIL} output variable.

Now that shaders can change the S value, we can expose the
STENCIL_EXPORT cap.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
8ed94d38b4 panfrost: Add the MALI_WRITES_{Z,S} flags
We discovered 2 new shader flags used when a fragment shader updates
the depth/stencil value through a ZS writeout. If those flags are not
set, the depth/stencil value stored in the depth/stencil tilebuffer
remain unchanged.

While at it, rename unknown2 into flags_hi and rename flags into
flags_lo.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
0406ea4856 panfrost: Z24 variants should be sampled as R32UI
Midgard has no dedicated samplers for Z24S8 and Z24X8 formats, and the
GPU expects the depth to be encoded in an IEEE 32-bit float. Turn all
Z24_UNORM variants into R32UI and let the shader do the conversion
using bfe+fmul instructions.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
e1ba0cd452 pan/midgard: Add nir_intrinsic_store_zs_output_pan support
ZS fragment stores are done like color fragment stores, except it's
using a different RT id (0xFF), the depth and stencil values are stored
in r1.x and r1.y.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
[Fix the scheduling part]

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Boris Brezillon
f5619f5073 pan/midgard: Turn Z/S stores into zs_output_pan intrinsics
Midgard can't write depth and stencil separately. It has to happen in
a single store operation containing both. Let's add a panfrost specific
intrinsic and turn all depth/stencil stores into a packed depth+stencil
one.

Note that this intrinsic is not yet handled in emit_intrinsic(), but
we'll address that later.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
2020-02-05 15:41:55 +00:00
Ian Romanick
59488cbbac intel/fs: Don't count integer instructions as being possibly coissue
Integer instructions don't coissue.  Before e64be391dd
("intel/compiler: generalize the combine constants pass"), this pass
only looked at float sources.  There's no shader-db data in that commit,
so I collected some.  The results are not good:

    Haswell
    total instructions in shared programs: 11898805 -> 11908127 (0.08%)
    instructions in affected programs: 1218680 -> 1228002 (0.76%)
    helped: 2
    HURT: 5171
    helped stats (abs) min: 12 max: 111 x̄: 61.50 x̃: 61
    helped stats (rel) min: 1.59% max: 9.20% x̄: 5.40% x̃: 5.40%
    HURT stats (abs)   min: 1 max: 311 x̄: 1.83 x̃: 1
    HURT stats (rel)   min: 0.02% max: 9.91% x̄: 1.05% x̃: 0.70%
    95% mean confidence interval for instructions value: 1.55 2.05
    95% mean confidence interval for instructions %-change: 1.02% 1.08%
    Instructions are HURT.

    total cycles in shared programs: 221664974 -> 221404750 (-0.12%)
    cycles in affected programs: 120012620 -> 119752396 (-0.22%)
    helped: 3464
    HURT: 3159
    helped stats (abs) min: 1 max: 428160 x̄: 314.55 x̃: 16
    helped stats (rel) min: <.01% max: 57.33% x̄: 3.40% x̃: 1.28%
    HURT stats (abs)   min: 1 max: 87846 x̄: 262.54 x̃: 14
    HURT stats (rel)   min: <.01% max: 85.57% x̄: 3.01% x̃: 0.77%
    95% mean confidence interval for cycles value: -224.23 145.65
    95% mean confidence interval for cycles %-change: -0.50% -0.19%
    Inconclusive result (value mean confidence interval includes 0).

    total spills in shared programs: 9804 -> 10047 (2.48%)
    spills in affected programs: 6869 -> 7112 (3.54%)
    helped: 2
    HURT: 41

    total fills in shared programs: 19863 -> 20319 (2.30%)
    fills in affected programs: 17428 -> 17884 (2.62%)
    helped: 2
    HURT: 41

    LOST:   20
    GAINED: 13

This also prevents regressions in "intel/fs: Promote integer constants
after lowering integer multiplication" (note: that patch will probably
not be committed).  When the passes are reorderd, code like

    mul(8)      acc0<1>D    g9<8,8,1>D  -2078209981D    { align1 1Q };

gets turned into

    mov(1)      g23<1>D     2078209981D                 { align1 WE_all 1N };
    ...
    mul(8)      acc0<1>D    g13<8,8,1>D  -g23<0,1,0>D   { align1 1Q compacted };

It's not 100% clear why, but these produce different results.  Note that
-2078209981 & 0x0ffff = 0x0843, and -(2078209981 & 0x0ffff) =
0xffff0843.  It seems like the upper 16-bits of the negation should be
ignored.

Fixes: e64be391dd ("intel/compiler: generalize the combine constants pass")
Cc: Iago Toral Quiroga <itoral@igalia.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

The shaders with spills or fills hurt are the usual suspects.  A couple
compute shaders in Dirt Showdown and a compute shader in Bioshock
Infinite.  On Haswell, a compute shader (that appears twice in
shader-db) from Aztec Ruins was also hurt for spill and fills.

Haswell
total instructions in shared programs: 11573934 -> 11568335 (-0.05%)
instructions in affected programs: 828623 -> 823024 (-0.68%)
helped: 2825
HURT: 6
helped stats (abs) min: 1 max: 134 x̄: 2.16 x̃: 1
helped stats (rel) min: 0.02% max: 9.05% x̄: 0.84% x̃: 0.61%
HURT stats (abs)   min: 1 max: 216 x̄: 81.83 x̃: 56
HURT stats (rel)   min: 0.16% max: 8.65% x̄: 4.21% x̃: 4.68%
95% mean confidence interval for instructions value: -2.31 -1.64
95% mean confidence interval for instructions %-change: -0.85% -0.80%
Instructions are helped.

total cycles in shared programs: 187573593 -> 187004633 (-0.30%)
cycles in affected programs: 82816107 -> 82247147 (-0.69%)
helped: 2186
HURT: 1741
helped stats (abs) min: 1 max: 35230 x̄: 326.96 x̃: 16
helped stats (rel) min: <.01% max: 46.11% x̄: 3.11% x̃: 0.90%
HURT stats (abs)   min: 1 max: 6138 x̄: 83.73 x̃: 16
HURT stats (rel)   min: <.01% max: 104.11% x̄: 2.73% x̃: 0.75%
95% mean confidence interval for cycles value: -197.13 -92.64
95% mean confidence interval for cycles %-change: -0.72% -0.33%
Cycles are helped.

total spills in shared programs: 7870 -> 7743 (-1.61%)
spills in affected programs: 2260 -> 2133 (-5.62%)
helped: 31
HURT: 5

total fills in shared programs: 6320 -> 6263 (-0.90%)
fills in affected programs: 3547 -> 3490 (-1.61%)
helped: 31
HURT: 6

LOST:   9
GAINED: 9

Ivybridge
total instructions in shared programs: 11863372 -> 11859793 (-0.03%)
instructions in affected programs: 757183 -> 753604 (-0.47%)
helped: 2236
HURT: 3
helped stats (abs) min: 1 max: 81 x̄: 1.86 x̃: 1
helped stats (rel) min: 0.03% max: 5.26% x̄: 0.74% x̃: 0.48%
HURT stats (abs)   min: 11 max: 301 x̄: 192.33 x̃: 265
HURT stats (rel)   min: 1.55% max: 10.51% x̄: 6.89% x̃: 8.62%
95% mean confidence interval for instructions value: -2.01 -1.18
95% mean confidence interval for instructions %-change: -0.77% -0.70%
Instructions are helped.

total cycles in shared programs: 178377378 -> 177946087 (-0.24%)
cycles in affected programs: 76261390 -> 75830099 (-0.57%)
helped: 1635
HURT: 1395
helped stats (abs) min: 1 max: 34796 x̄: 333.53 x̃: 16
helped stats (rel) min: <.01% max: 47.15% x̄: 2.82% x̃: 0.64%
HURT stats (abs)   min: 1 max: 4315 x̄: 81.74 x̃: 18
HURT stats (rel)   min: <.01% max: 49.98% x̄: 1.99% x̃: 0.53%
95% mean confidence interval for cycles value: -197.06 -87.62
95% mean confidence interval for cycles %-change: -0.78% -0.43%
Cycles are helped.

total spills in shared programs: 4188 -> 4182 (-0.14%)
spills in affected programs: 1557 -> 1551 (-0.39%)
helped: 30
HURT: 3

total fills in shared programs: 5056 -> 5245 (3.74%)
fills in affected programs: 2708 -> 2897 (6.98%)
helped: 30
HURT: 3

LOST:   5
GAINED: 1

No shader-db changes on any other Intel platform.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544>
2020-02-05 15:13:17 +00:00
Connor Abbott
8455648cca tu: Move vsc_data and vsc_data2 allocation into the device
In addition to preparing us for dynamically resizing them, which has to
be controlled by the device, this greatly reduces the memory usage when
allocating large numbers of command buffers, making
dEQP-VK.api.object_management.max_concurrent.command_buffer_primary go
from crash -> pass.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3621>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3621>
2020-02-05 15:27:28 +01:00
Connor Abbott
84bd4da468 freedreno: Fix CP_COND_EXEC
Noticed while looking at a trace of the Vulkan blob.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
2020-02-05 13:14:22 +00:00
Connor Abbott
ed5d1c1c47 freedreno: Add CP_REG_WRITE documentation
Document the first DWORD, which at least for the Vulkan blob on a640
isn't always 2.

Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
2020-02-05 13:14:22 +00:00
Connor Abbott
65197a3ac1 freedreno: Fix CP_COND_REG_EXEC bit positions
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3600>
2020-02-05 13:14:22 +00:00
Michel Dänzer
8be81f8a2a gitlab-ci: Build radeonsi & RADV in the ppc64el job
This requires cross-building libdrm for ppc64el.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
65610ec774 gitlab-ci: Add ppc64el and s390x cross-build jobs
Using LLVM 8 for ppc64el and 7 for s390x (which hits some coroutine
related issues with LLVM 8).

There are some test failures we need to ignore for now. Also, the
timeout needs to be bumped from the default 30s for some tests, because
they can take longer under emulation.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
a443f81f26 gitlab-ci: Merge ccache and libxml2-utils into main apt-get install
The motivation for this is that we want to make use of the meson cross
files in this script, which have the ccache compiler paths.

We need to remove the ccache directory at the end, it would just waste
space in the image for no benefit.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
a06fc0296d gitlab-ci: Pass -j4 to make
Might speed up x86_build docker image build a little.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Michel Dänzer
84fefa206c gitlab-ci: Update to latest ci-templates HEAD
Among other things, this increases robustness when copying a docker
image from the main Mesa project to a forked project, avoiding spurious
image rebuilds from scratch.

Also drop the comment about .gitlab-ci/lava-gitlab-ci.yml, it doesn't
include the templates anymore.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3643>
2020-02-05 10:52:31 +00:00
Pierre-Eric Pelloux-Prayer
3da91b3327 radeonsi/ngg: add VGT_FLUSH when enabling fast launch
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2418
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2426
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2434
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
2020-02-05 10:27:54 +00:00
Eric Engestrom
2799676218 util/disk_cache: check for write() failure in the zstd path
CoverityID: 1458074
Fixes: a8d941091f ("util: Use ZSTD for shader cache if possible")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672>
2020-02-05 01:09:04 +00:00
Eric Engestrom
6321e3fb9f dri: delete gen-symbol-redefs.py
Introduced in ba10d79cca but it looks like it was never wired
into anything.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3669>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3669>
2020-02-05 00:46:46 +00:00
Lionel Landwerlin
bcb611361b anv: implement gen12 post sync pipe control workaround
Same as Skylake.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
2020-02-05 00:25:48 +00:00
Lionel Landwerlin
8949d27bb8 anv: implement gen9 post sync pipe control workaround
We've been missing this workaround for a while and since it's required
for Gen12, let's implement it for Gen9 first.

v2: Update comment for Gen9.

v3: Fix clearing of bits... (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
2020-02-05 00:25:48 +00:00
Lionel Landwerlin
19e7bcee17 iris: implement gen12 post sync pipe control workaround
Like Skylake, Gen12 requires a workaround for PIPE_CONTROLs using a
post-sync operation.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
2020-02-05 00:25:48 +00:00
Rob Clark
2c07e03b79 freedreno: allow ctx->batch to be NULL
This was mostly true already, now that we use `fd_context_batch()` for
first access to batch in draw/clear/grid paths.  So we can drop the old
code in `batch_flush()` that tried to prevent `ctx->batch` from being
NULL.

Fixes a crash with a large number of tabs in chromium.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700>
2020-02-04 23:59:33 +00:00
Eric Anholt
22d2cbe685 freedreno: Allow UBWC on textures with multiple mipmap levels.
This is a backport of Jonathan Marek's UBWC work on turnip to GL.

Performance highlights from our trace set (320 frames sampled)
traces/glmark2/texture-texture-filter=mipmap.rdc:    +9.1% +/-   2.2%
traces/android/trex.rdc:                             +8.7% +/-   0.4%
traces/glmark2/desktop-effect=shadow:windows=4.rdc:  +4.2% +/-   2.5%

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
ecd62ff766 freedreno: Disable UBWC on Z24S8 if not TEXTURE_2D.
Fixes two of our three remaining GLES CTS failures, and avoids more
regressions once we enable UBWC mipmaps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
ddb0b35b76 freedreno: Blit all array levels when uncompressing UBWC.
Fixes regressions in GLES CTS's format_reintepret once we enable UBWC
with mipmaps.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
6b586d5a48 freedreno: Swap the whole resource layout in shadowing.
Let's not have to worry about whether this unusual code path gets
updated whenever we adjust what is in the layout struct.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
f9f5d3eb55 freedreno/a6xx: Disable the core layer-size setup.
This was getting in the way of UBWC mipmap handling.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
17312b4a10 freedreno: Rename the UBWC layer size field and store it as bytes.
This makes the field description match its usage in the code, matches tu's
usage of the field, and avoids storing values in surprising units.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
b6b4118bb0 freedreno: Include the layer size in layout debug.
It's been many of my bugs so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Eric Anholt
20357dfde8 freedreno: Move the layout debug under FD_MESA_DEBUG=layout.
I keep wanting to turn this on while debugging layout stuff, and I
suspect krh and robclark could use it too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3059>
2020-02-04 23:18:00 +00:00
Bas Nieuwenhuizen
65a6dc5139 radv: Do not set SX DISABLE bits for RB+ with unused surfaces.
The extra bits in CB_SHADER_MASK break dual source blending in
SkQP on a Stoney device. However:

- As far as I can tell, some other dual source blend tests are passing
  before and after the change.
- A hacked around skqp passes on my Vega desktop and Raven laptop
- Getting Skqp to give any useful info or to run it outside of Android
  on ChromeOS is proving difficult.

I have confirmed 3 strategies that seem to work:
- The old radv behavior of setting CB_SHADER_MASK to 0xF
- AMDVLK: CB_SHADER_MASK = 0xFF, and the 3 RB+ regs
  are 0.
- radeonsi: CB_SHADER_MASK = 0xFF, but does not set DISABLE
  bits in SX_BLEND_OPT_CONTROL for CB 1-7.

Let us use the radeonsi solution as that solution also seems like the correct
thing to do for holes. I have tested on my Raven laptop that setting the high
surfaces to not disabled and downconvert to 32_R does not imply a performance
penalty.

Fixes: e9316fdfd4 "radv: fix setting CB_SHADER_MASK for dual source blending"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670>
2020-02-04 21:22:30 +00:00
Marek Olšák
17303c9851 mesa: implement missing display list functions while switching to the template
The vbo_init_tmp.h template tells us which functions are unimplemented.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:05 -05:00
Marek Olšák
56de59b931 vbo: move reusable code from vbo_attrib_tmp.h into vbo_util.h
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:03 -05:00
Marek Olšák
052e8f758e vbo: use the template for save GLvertexformat initialization
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:01 -05:00
Marek Olšák
9ec5e96ec8 vbo: use the template for noop GLvertexformat initialization
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:12:00 -05:00
Marek Olšák
d447a4888f vbo: move GLvertexformat initialization into a template header file for reuse
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3611>
2020-02-04 15:11:58 -05:00
Eric Engestrom
cae6093266 freedreno/perfcntrs: fix fd leak
CoverityID: 1110568, 1458071
Fixes: 5a13507164 ("freedreno/perfcntrs: add fdperf")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671>
2020-02-04 19:26:40 +00:00
Eric Anholt
8a2c507a8a util: Drop unpacking from int signed to unsigned and vice versa.
After all the previous cleanups, it's clear that the callers only ever
ask for SINT->SINT or UINT->UINT.  Cuts 20k of compiled text from
gallium drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
1d367c3aa5 gallium: Refactor some single-pixel util_format_read/writes.
We can use the new row helpers to cut down on the noise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
ab081970e0 gallium: Add and use a helper for packing uc from a color_union.
The same pattern kept coming up, and we don't need to hit
util_format_write_4* to do it when we have util_format_pack_rgba().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
b2a2cf492d softpipe: Refactor pipe_get/put_tile_rgba_* paths.
We always want the same behavior of choosing which unpack to do to
generate our 4x32-bit RGBA values, so just sink that choice down below
the pipe_get/put_tile API.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
8bc56551da softpipe: Drop the raw_to* part of the tile cache interface.
Nothing else uses it, so make it static.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
6cdf523f00 gallium/util: Remove pipe_get_tile_z/put_tile_z.
The previous caller wasn't using it as tiled, just row-at-a-time, and
didn't want the clipping (since copytexsubimage comes in clipped).  If
someone wanted these functions again in the future, they should be
rewritten on u_format_pack/unpack.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
e986f2b7af mesa/st: Use direct util_format_pack/unpack instead of u_tile.
We're doing a row at a time, and don't need u_tile's clipping.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Eric Anholt
c574cda3c6 util: Make helper functions for pack/unpacking pixel rows.
Almost all users of the unpack functions don't have strides to plug in
(and many are only doing one pixel!), and this will help simplify
them.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
2020-02-04 19:02:59 +00:00
Karol Herbst
333c9d5bb0 clover: add trivial clCreateCommandQueueWithProperties implementation
It's not adding 2.0 features, but it's enough to run the 2.0 CTS on top of
clover and probably most CL applications using it.

We just fail if we hit unknown properties and that's probably good enough
until we implement the other bits properly.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2370>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2370>
2020-02-04 18:09:23 +00:00
Eric Anholt
b064697af1 gallium/osmesa: Try to fix the test for big-endian.
Our packed expected values will be byte-swapped for the (mostly) array
formats we're testing.

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Eric Anholt
dd899fd43e gallium/osmesa: Fill out other format tests.
Move expected values/bpp into the test params, add more formats now that
we've fixed context setup so that they work.

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Eric Anholt
0a53918f02 gallium/osmesa: Fix MakeCurrent of non-8888 contexts.
OSMesa is weird and you only get the type (byte/ubyte/565/etc.) at
MakeCurrent time, having only a channel order at CreateContext time.  The
code was setting up a visual at CreateContext time, and then at
MakeCurrent it would fail to validate against the visual.

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Eric Anholt
655394c6ed gallium/osmesa: Fix a typo in the unit test's test names.
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Danylo Piliaiev
75c50d0342 osmesa/tests: Cover OSMESA_RGB GL_UNSIGNED_BYTE case
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:08 +00:00
Danylo Piliaiev
d83abf1d37 st/mesa: Handle the rest renderbuffer formats from OSMesa
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2189
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/989
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2036
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216>
2020-02-04 17:48:07 +00:00
Eric Engestrom
d1165ad18b util/os_socket: fix header unavailable on windows
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2464
Fixes: e62c3cf350 ("util/os_socket: Include unistd.h to fix build error")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
2020-02-04 17:33:49 +00:00
Danylo Piliaiev
36126b6211 i965: Do not set front_buffer_dirty if there is no front buffer
Otherwise there will be a warning:
 "libEGL warning: FIXME: egl/x11 doesn't support front buffer rendering."

Happens with EGL_KHR_surfaceless_context:

 eglMakeCurrent(egl_display, EGL_NO_SURFACE, EGL_NO_SURFACE, egl_context)
 eglMakeCurrent(egl_display, egl_surface, egl_surface, egl_context)
 glFlush() // Here will be a warning

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1525
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3628>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3628>
2020-02-04 15:41:05 +00:00
Tomeu Vizoso
9afdcd64f2 gitlab-ci: Switch kernel for LAVA jobs to 5.5
All fixes we were carrying in our branch have been merged already.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:34 +01:00
Alyssa Rosenzweig
162927e43c panfrost: Use size0 when calculating the offset to a depth level
Previously, we were using cubemap_stride and sometimes overwriting other
BOs such as shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:30 +01:00
Tomeu Vizoso
64541dd698 panfrost: Only clamp the LOD to disable mipmapping when needed
Otherwise, we may be incrementing max_lod over the limit, causing a
DATA_INVALID_FAULT.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:26 +01:00
Tomeu Vizoso
255227ecec panfrost: Fix decoding of tiled 3D textures
From decoding cmd streams generated by the blob, the pointers in the
payload don't seem to include those that refer to different depth levels
when the texture is in tiled format.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3692>
2020-02-04 15:46:06 +01:00
Erik Faye-Lund
fd27fb5113 st/mesa: use uint-result for sampling stencil buffers
Otherwise, we end up mismatching the result-type and the sampler-type.

Fixes: 642125edd9 ("st/mesa: use uint-samplers for sampling stencil buffers")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3680>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3680>
2020-02-04 07:43:36 +00:00
Alyssa Rosenzweig
9cdd89a34b pan/midgard: Remove unused variable
../src/panfrost/midgard/mir.c: In function ‘mir_bytemask_of_read_components_index’:
../src/panfrost/midgard/mir.c:471:18: warning: unused variable ‘mask’ [-Wunused-variable]
  471 |         uint16_t mask = 0;

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
2020-02-04 08:24:37 +01:00
Alyssa Rosenzweig
0f3eb7989b pan/midgard: Check for null consts
Valid shaders shouldn't hit this, but Coverity doesn't know that.

CID 1458029:    (FORWARD_NULL)
Passing null pointer "consts" to "print_scalar_field", which dereferences it.

Tomeu: Fix name of variable

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
2020-02-04 08:24:33 +01:00
Alyssa Rosenzweig
8ec4028d40 panfrost: Avoid overlapping copy
CID 1457486:  Memory - corruptions  (OVERLAPPING_COPY)

Assigning "(*attr).extra_flags = (*attr).size = 0U" to "(*attr).stride",
which have overlapping memory +locations.

Coverity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
2020-02-04 08:24:18 +01:00
Marek Vasut
c32bd325e7 etnaviv: Destroy rsc->pending_ctx set in etna_resource_destroy()
Destroy rsc->pending_ctx set in etna_resource_destroy(), otherwise
the memory is allocated, never free'd, and becomes unreachable. This
fixes a memory leak.

Fixes: 9e672e4d20 ("etnaviv: keep references to pending resources")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3633>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3633>
2020-02-04 06:27:19 +00:00
Kristian H. Kristensen
df6a2a7197 turnip: Be explicit about converting vk compare func to a6xx
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
6dd57f0e38 nir: Remove always-true assert
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
e3dfa8f4d6 glsl: Use 'using' to be explicit about visitor overloads
Clang has a warning about overloading virtuals that triggers when a
derived class defines a virtual function that's an overload of
function in the base class.  This kind of thing:

  struct chart; // let's pretend this exists
  struct Base
  {
      virtual void* get(char* e);
  };

  struct Derived: public Base {
      virtual void* get(chart* e); // typo, we wanted to override the same function
  };

The solution is to use

  using Base::get;

to be explicit about the intention to reuse the base class virtual.
We hit this a lot with out glsl ir_hierarchical_visitor visitor
pattern, so let's adds some 'using' to calm down the compiler.

See-also: https://stackoverflow.com/questions/18515183/c-overloaded-virtual-function-warning-by-clang)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
0bc516fceb spirv/opencl: Cast opcode up front to avoid warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
67dd51606c freedreno/fdperf: Cast away some ignored return values
This is developer tool, it can crash and burn if it fails to allocate.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
2be81a3bfa nir: Make unroll pragma work on clang
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Kristian H. Kristensen
de856c6170 nir: Delete unused is_var_constant() helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
2020-02-04 06:03:52 +00:00
Fritz Koenig
42f7e124ca Revert "gitlab-ci: disable a630 tests as mesa-cheza is down"
This reverts commit f38851d84c

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3687>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3687>
2020-02-03 21:45:16 +00:00
Jan Vesely
0ccda2ebff clover: Use explicit conversion from llvm::StringRef to std::string
Fixes build after llvm 777180a32b61070a10dd330b4f038bf24e916af1
("[ADT] Make StringRef's std::string conversion operator explicit")

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2020-02-03 21:25:59 +00:00
Erik Faye-Lund
5d83314945 zink: disallow depth-stencil blits with format-change
The Vulkan spec says this about vkCmdBlitImage:

   "No format conversion is supported between depth/stencil images. The
    formats must match."

So yeah, let's stop trying to do this.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
2020-02-03 21:42:52 +01:00
Erik Faye-Lund
85d4b41f68 zink: be more careful about the mask-check
We currently disallow blits that we can support. Let's be more accurate
when checking the mask.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
2020-02-03 21:42:49 +01:00
Boris Brezillon
b550b7ef3b panfrost: Fix the damage box clamping logic
When the rendering are is not covering the whole FBO, and the biggest
damage rect is empty, we can have damage.max{x,y} > damage.min{x,y},
which leads to invalid reload boxes.

Fixes: 65ae86b854 ("panfrost: Add support for KHR_partial_update()")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
2b089e26bf pan/midgard: Stop leaking instruction objects in mir_schedule_alu()
Allocate those instructions with ralloc() instead of using mem_dup.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
c7e68d8625 pan/midgard: Don't check 'branch && branch->writeout' twice in mir_schedule_alu()
There's a writeout bool storing the result of this test. Use it instead
of duplicating the test.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
ef89a52fe5 pan/midgard: Lower bitfield extract to shifts
Let's lower bitfield extract to shifts until we figure out if it can be
natively supported.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
c68cd39eb3 pan/midgard: Make sure we pass the right RT id to emit_fragment_store()
nir_intrinsic_base() is assigned nir_variable.data.driver_location,
which is assigned a unique ID based on the variable position in the
shader variable list. There's no guarantee that this position will
match the RT id we want to pass to emit_fragment_store().

Add a search_var() helper to retrieve a nir_variable based on its driver
location, so we can pass the right RT value to emit_fragment_store().

We also make sure the shader output is color, since emit_fragment_store()
is not ready for depth/stencil stores yet.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Boris Brezillon
25946be4c4 pan/midgard: Add an enum to describe the render targets
We are about to add a special ZS render target, let's add a enum so we
can easily know which render target we're dealing with.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
2020-02-03 12:53:47 +00:00
Bernd Kuhls
e62c3cf350 util/os_socket: Include unistd.h to fix build error
Fixes

In file included from ../src/util/os_socket.c:8:
../src/util/os_socket.h:26:1: error: unknown type name ‘ssize_t’; did you mean ‘size_t’?
 ssize_t os_socket_recv(int socket, void *buffer, size_t length, int flags);

seen with gcc version 8.3.0 (Buildroot 2019.11) and uClibc 1.0.32.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: ef5266ebd5 ("util/os_socket: Add socket related functions.")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659>
2020-02-03 10:55:44 +00:00
Eric Engestrom
f38851d84c gitlab-ci: disable a630 tests as mesa-cheza is down
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3677>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3677>
2020-02-03 10:08:25 +00:00
Ilia Mirkin
a4e6270541 nv50: report max lod bias of 15.0
The blob returns 15, the state creation code clamps it to 15, but since
the dawn of time we've returned 4.0. Setting this to 15 also fixes

GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_clamp_m_le_M

which is sensitive to these limits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2020-02-02 22:01:18 -05:00
Eric Engestrom
0021f7dc30 egl: put full path to libEGL_mesa.so in GLVND json
This is useful when installing to a non-standard path.

glvnd_icd.py copied & adapted from src/intel/vulkan/anv_icd.py

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3038>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3038>
2020-02-02 17:46:17 +00:00
Bas Nieuwenhuizen
d5fd8cd46e radv: Allow non-dedicated linear images and buffer.
Requested for virtualized Vulkan as they need to export memory to
map it.

Since radeonsi and the kernel assume an image without metadata is
linear, this should work just fine.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3583>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3583>
2020-02-02 17:47:14 +01:00
Alyssa Rosenzweig
38f963226b pan/midgard: Implement mixed-type constant packing
Lot of churn but mostly just specializes types per source instead of per
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
2020-02-02 15:51:06 +00:00
Alyssa Rosenzweig
a12fe52cbc pan/midgard: Break out one-src read_components
For constant packing, this is interesting to break down further.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
2020-02-02 15:51:06 +00:00
Icecream95
b74212e701 panfrost: Fix non-debug builds
For non-debug builds, where assertions are compiled out, GCC complains
about the end of the non-void function panfrost_translate_channel_width
being reached.

Fixes: 226c1efe9a ("panfrost: Add more info to some assertions")
Reported-by: Piotr Oniszczuk
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3665>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3665>
2020-02-02 15:33:17 +00:00
Jason Ekstrand
d7fe9af620 anv/blorp: Use the correct size for vkCmdCopyBufferToImage
Now that we're using an uncompressed format for the buffer, we have to
scale down the dimensions we pass into BLORP when doing buffer->image
copies.

Fixes: dd92179a72 "anv: Canonicalize buffer formats for image/buffer..."
Closes: #2452
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664>
2020-02-02 11:41:09 +00:00
Eric Engestrom
8ff613dc58 VERSION: bump after 20.0 branch point
Closes: #2457
2020-02-02 06:54:14 +00:00
Vinson Lee
02658df152 lima: Fix build with GCC 10.
This patch fixes this build error with GCC 10.

/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_context.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_resource.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_draw.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_bo.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_submit.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_util.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here
/usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_texture.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here

Fixes: d71cd245d7 ("lima: Rotate dump files after each finished pp frame")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2020-01-31 19:18:58 -08:00
Rob Clark
982d61e2cd freedreno/ir3: fix a dirty lie
Lies, damn lies, and leftover hacks!

We no longer hard-code these two, so fix the disasm to print the correct
values.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
752aeb7b3f freedreno/ir3: simplify split from collect
In some cases we need to split components out from what was already a
collect.  That was making it hard to DCE unused components of the
collect.  (Ie. unused components of fragcoord, etc)

So just detect this case and skip the chained collect+split.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
8d0e7d9a4c freedreno/ir3: create fragcoord instructions in input block
This was somehow working to create the instructions in a random block,
and use the value in other blocks, by dumb luck.  But two-pass-RA's
better choice of register assignment causes a couple dEQPs to start
failing without this fix:

dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_1
dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_2

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
fb09020ef2 freedreno/ir3: remove unused tex arg harder
Just killing the SSA link isn't enough.  It confuses RA, legalize,
and postsched to see a bogus unused reg.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
2ffe44ec0a freedreno/ir3: add RA sanity check
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
2f4f46b708 freedreno/a6xx: fix lrz overflow
Running the complete deqp_gles2 seems to trigger an overflow in lrz
cmdstream.  We skip the blit clear fast-path if there have been any
draws (so mid-batch clears of any attached buffer hit the 3d pipe).
Which means it is safe to simply discard any lrz clear rendering.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
3e79c4f0ed freedreno/ir3: two pass register allocation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
b0293af7a5 freedreno/ir3: don't precolor unused inputs
This apparently can happen with gs/tess.  And will cause problems with
two-pass-ra, so lets just skip them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
ad2587d3c8 freedreno/ir3: add is_tex_or_prefetch()
Some of the aspects of tex prefetch are in common with normal tex
instructions, such as having a wrmask to control which components
are written.  Add a helper for this.

This should result in actually using the prefetch wrmask to avoid
fetching unneeded components.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
4a7a6c9ef0 freedreno/ir3: number instructions from one
ra_block_compute_live_ranges() treats zero as "not yet defined", so
probably best to not let this be a valid instruction #

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
0f78c32492 freedreno/ir3: post-RA sched pass
After RA, we can schedule to increase parallelism (reduce nop's) without
worrying about increasing register pressure.  This pass lets us cut down
the instruction count ~10%, and prioritize bary.f, kill, etc, which
would tend to increase register pressure if we tried to do that before
RA.

It should be more useful if RA round-robin'd register choices.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
3369406e44 freedreno/ir3: fix kill scheduling
kill (and other cat0/flow instructions) do not have a dst register.
Which was mostly harmless before, other than RA thinking it would need
a free register to write.  (But nothing consumed it, so the value would
be immediately dead.)  But this would cause more problems with postsched
which would see a bogus dependency.

Also, post-RA sched *does* need to see the dependency on the predicate
register.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
9a9f78f1f9 freedreno/ir3/ra: make use()/def() functions instead of macros
Originally these were nested functions, which worked nicely, giving us
the function of a local macro that was actual 'c' syntax (ie. not token
pasted macro).  But these were converted to macros because clang doesn't
let us have nice gcc extensions.

Extract these back out into functions, before adding more things and
making the macros even more cumbersome.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
a5f24f966a freedreno/ir3: a bit more optmsgs debug
Also dump where arrays are allocated.  This was useful for debugging.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
300d1181c7 freedreno/ir3: move atomic fixup after RA
A post-RA sched pass will move the extra mov's to the wrong place, so
rework the fixup so it can run after RA (and therefore after postsched)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
304b50c9f8 freedreno/ir3: move block-scheduling into legalize
We want to do this only once.  If we have post-RA sched pass, then we
don't want to do it pre-RA.  Since legalize is where we resolve the
branch/jumps, we might as well move this into legalize.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
093c94456b freedreno/ir3: move nop padding to legalize
This way we can deal with it in one place, *after* all the blocks have
been scheduled.  Which will simplify life for a post-RA sched pass.

This has the benefit of already taking into account nop's that legalize
has to insert for non-delay related reasons.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
c803c662f9 freedreno/ir3: split out delay helpers
We're going to want these also for a post-RA sched pass.  And also to
split nop stuffing out into it's own pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
54c795f829 freedreno/ir3: fix crash when no non-input instructions
This scenario can come up with block-sched and nop-sched moved to after
RA.  So lets fix it first to keep things bisectable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
c1194e10b2 freedreno/ir3: cleanup after lower_locals_to_regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Rob Clark
f0b792ea06 freedreno/ir3: shuffle a few ir3_register fields
It makes life easier for postsched to always be able to rely on wrmask.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
2020-02-01 02:40:22 +00:00
Anuj Phogat
95831e2f66 intel/gen12+: Set way_size_per_bank to 4
This patch fixes the way_size_per_bank for Gen12+

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
2020-01-31 18:14:54 -08:00
Anuj Phogat
00a84c170a intel/gen12+: Reserve 4KB of URB space per bank for Compute Engine
This patch is required to fix 11K+ vulkan CTS failures we were
getting with way_size_per_bank of 4 (see next patch).

Thanks to Sagar Ghuge and Jordan Justen for all the hard work of
debugging and testing.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
2020-01-31 18:14:54 -08:00
Szymon Andrzejuk
c0d8b373ad virgl: Use align_free for align_malloc allocated buffer
Signed-off-by: Szymon Andrzejuk <s.andrzejuk@samsung.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2020-02-01 00:41:38 +00:00
Rob Clark
d326d30efe freedreno/drm: readonly cmdstream
Noticed that we weren't consistently making cmdstream buffers
gpu-readonly.  Fix that and drop the need to pass flags to
fd_bo_new_ring().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3663>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3663>
2020-01-31 13:01:52 -08:00
Jason Ekstrand
f93dfb509c intel/fs: Write the address register with NoMask for MOV_INDIRECT
This fixes a hang in the following Vulkan CTS test on TGL-LP:

    dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Jason Ekstrand
9a95abd0f7 intel/tools: Handle strides better when dumping buffers
The old code would only break at stride boundaries if the stride was
less than 32B; otherwise it would just break every 32B.  This commit
makes it break at stride boundaries and 32B boundaries (starting from
the last stride).  This makes reading large vertex buffers in aubinator
much nicer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Jason Ekstrand
51d7c42165 intel/disasm: SEND has two sources on Gen12+
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Jason Ekstrand
fa3ef6a837 intel/eu/validate: Don't validate regions of sends
Otherwise, the validator tries to read the type of src1 of a SEND/SENDS
which doesn't actually have a type field.  This prevents validation
issues in the next commit.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
2020-01-31 17:23:39 +00:00
Daniel Schürmann
3b323d6601 aco: fix image_atomic_cmp_swap
Fixes: 71440ba0f5 ('aco: reorder VMEM operands in ACO IR')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
2020-01-31 16:51:46 +00:00
Samuel Pitoiset
0d14f41625 aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6
When some unused channels are skipped and that we expand vec3 loads
to vec4 loads, we have to adjust the fourth component.

While we are at it, add an assertion to make sure we don't use
MUBUF for vec3 loads on GFX6.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2450
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2442
Fixes: 6aecc316 ("aco: fix VS input loads with MUBUF on GFX6")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3641>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3641>
2020-01-31 13:48:56 +01:00
Krzysztof Raszkowski
d8410fec4e gallium/swr: Fix gcc 4.8.5 compile error
Stop using C++14 feature so it can be compile on default centos7
gcc compiler.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3640>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3640>
2020-01-31 10:40:54 +00:00
Vinson Lee
8dacf5f9d1 swr: Fix build with GCC 10.
GCC 10 added _mm256_storeu2_m128i.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91341

This patch fixes this build error with GCC 10.

In file included from src/gallium/drivers/swr/rasterizer/codegen/gen_knobs.cpp:39:
../src/gallium/drivers/swr/rasterizer/common/os.h:178:20: error: ‘void _mm256_storeu2_m128i(__m128i*, __m128i*, __m256i)’ redeclared inline without ‘gnu_inline’ attribute
  178 | static INLINE void _mm256_storeu2_m128i(__m128i* hi, __m128i* lo, __m256i a)
      |                    ^~~~~~~~~~~~~~~~~~~~
In file included from /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:51,
                 from /usr/lib/gcc/x86_64-redhat-linux/10/include/x86intrin.h:32,
                 from ../src/gallium/drivers/swr/rasterizer/common/os.h:107,
                 from src/gallium/drivers/swr/rasterizer/codegen/gen_knobs.cpp:39:
/usr/lib/gcc/x86_64-redhat-linux/10/include/avxintrin.h:1580:1: note: ‘void _mm256_storeu2_m128i(__m128i_u*, __m128i_u*, __m256i)’ previously defined here
 1580 | _mm256_storeu2_m128i (__m128i_u *__PH, __m128i_u *__PL, __m256i __A)
      | ^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3650>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3650>
2020-01-31 10:18:53 +00:00
Krzysztof Raszkowski
790516db0b gallium/swr: fix gcc warnings
Few changes to make gcc happy.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3629>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3629>
2020-01-31 09:52:27 +00:00
Erik Faye-Lund
8405e1bef0 zink: implement support for derivative-control
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3645>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3645>
2020-01-31 08:56:55 +00:00
Erik Faye-Lund
f12b844e7c zink: implement load_instance_id
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3644>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3644>
2020-01-31 08:40:24 +00:00
Erik Faye-Lund
c0ced1e79b zink: enable texture-buffer objects
This seems to work as-is, and just need enabling. There's a few piglit
failures, but those seems to be problems with the tests, where they
don't handle lacking GL3-support.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3647>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3647>
2020-01-31 08:23:07 +00:00
Zhang, Boyuan
00edb82fde radeonsi: Add support for midstream bitrate change in encoder
BACKPORT: Remove |picture| argument from enc->begin in radeon_vcn_enc.c

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3426>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3426>
2020-01-31 07:47:36 +00:00
Tomeu Vizoso
d902e23d80 panfrost: Use DBG macro to avoid noise in the console
It pollutes the output of programs that use Panfrost and can confuse its
callers, such as test runners.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Tomeu Vizoso
2504206221 pan/midgard: Handle nir_intrinsic_load_barycentric_centroid
To avoid hitting the assert in the default case, add a nop for this
intrinsic.

dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.3

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Tomeu Vizoso
226c1efe9a panfrost: Add more info to some assertions
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Tomeu Vizoso
2d5c433aee panfrost: Print intended field when decoding
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
2020-01-31 06:02:31 +00:00
Jason Ekstrand
8c5fd2942b anv: Always fill out the AUX table even if CCS is disabled
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:31 -06:00
Jason Ekstrand
2ccdf881ab iris: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:30 -06:00
Jason Ekstrand
e6b39850f0 anv: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:28 -06:00
Jason Ekstrand
ce9c45a60e intel/blorp: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:27 -06:00
Jason Ekstrand
fdc0c19328 intel/common: Return the block size from get_urb_config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:26 -06:00
Jason Ekstrand
e340a79b9c anv: Emit URB setup earlier
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:24 -06:00
Jason Ekstrand
e928676b69 iris: Consolodate URB emit
Now that we don't have to carry a URB state emit function for BLORP we
can roll some stuff together and drop a genX helper.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:22 -06:00
Jason Ekstrand
09e4c33085 intel/blorp: Always emit URB config on Gen7+
Previously, i965/iris tried to reuse the currently programmed URB config
if it was good enough for BLORP, rather than reprogramming it each time.
However, this will make some things harder on Gen12+ and we've not seen
any performance impact from emitting URB more frequently in ANV.

This makes the blorp <-> driver interface a bit simpler on Gen7+ because
now all the driver has to do is to provide the L3$ config rather than
trying to hand off URB re-config to blorp.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:20 -06:00
Jason Ekstrand
73a684964b intel: Take a gen_l3_config in gen_get_urb_config
Instead of making each driver pass in the same push constant size and do
it's own L3$ config URB size calculation, just make them pass in their
L3$ configuration.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:18 -06:00
Jason Ekstrand
9d05822cb8 i965: Re-emit l3 state before BLORP executes
If BLORP is the first thing to execute, we may not have set the L3$
config yet.  That's not normally a problem but we're about to add code
to BLORP which will look at brw_context::l3::config and we'd like that
to be initialized.  It's also just good practice.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:16 -06:00
Jason Ekstrand
bff7b3c7bd iris: Use the URB size from the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:14 -06:00
Jason Ekstrand
99f3178a24 iris: Store the L3$ configs in the screen
We only calculate them based on device info and never change them so
this seems like a reasonable place to put them.  We could also put them
in the context, but that's not accessible from iris_init_*_context.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:13 -06:00
Jason Ekstrand
6471bac99e iris: Set SLMEnable based on the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:10 -06:00
Jason Ekstrand
73434b665b intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
SML is no longer in the L3$ on Gen11+.  It's not incredibly clear from
the docs but no Gen11 platforms are in the list of platforms on which
this bit exists.  Also, we've been always setting it false on Gen11 in
ANV and i965 thanks to GEN_L3P_SLM being zero with no ill effects.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:45:53 -06:00
Jason Ekstrand
e1bdb127b6 anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+
According to the BSpec, this should prevent hangs when using shaders
with large URB entries.  A more precise fix can be done but it requires
re-arranging URB setup.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:45:52 -06:00
Jason Ekstrand
9da9abf8a7 genxml: Add a new 3DSTATE_SF field on gen12
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:45:49 -06:00
Dylan Baker
21dd0a1514 docs/release-calendar: 20.0.0-rc1 has been released 2020-01-30 14:43:17 -08:00
2207 changed files with 192362 additions and 120618 deletions

View File

@@ -1,26 +1,34 @@
variables:
UPSTREAM_REPO: mesa/mesa
FDO_UPSTREAM_REPO: mesa/mesa
include:
- project: 'wayland/ci-templates'
# Must be the same as in .gitlab-ci/lava-gitlab-ci.yml
ref: 0a9bdd33a98f05af6761ab118b5074952242aab0
- project: 'freedesktop/ci-templates'
ref: 4b2997287317808830e9cb4eb0f99b691787da88
file: '/templates/debian.yml'
- local: '.gitlab-ci/lava-gitlab-ci.yml'
- local: '.gitlab-ci/test-source-dep.yml'
stages:
- container
- build
- test
- meson-x86_64
- scons
- meson-misc
- llvmpipe
- softpipe
- freedreno
- panfrost
- radv
- lima
- virgl
- success
# When to automatically run the CI
.ci-run-policy:
rules:
# Run pipeline by default for merge requests changing files affecting it
- if: '$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME == $CI_COMMIT_REF_NAME'
changes: &paths
# If any files affecting the pipeline are changed, build/test jobs run
# automatically once all dependency jobs have passed
- changes: &all_paths
- VERSION
- bin/**/*
# GitLab CI
@@ -38,16 +46,7 @@ stages:
- include/**/*
- src/**/*
when: on_success
# Run pipeline by default in the main project if files affecting it were
# changed
- if: '$CI_PROJECT_PATH == "mesa/mesa"'
changes:
*paths
when: on_success
# Allow triggering jobs manually on branches of forked projects
- if: '$CI_PROJECT_PATH != "mesa/mesa" && $CI_MERGE_REQUEST_SOURCE_BRANCH_NAME != $CI_COMMIT_REF_NAME'
when: manual
# Otherwise, most jobs won't run
# Otherwise, build/test jobs won't run
- when: never
retry:
max: 2
@@ -63,7 +62,7 @@ success:
- merge_requests
except:
changes:
*paths
*all_paths
variables:
GIT_STRATEGY: none
script:
@@ -72,6 +71,7 @@ success:
.ci-deqp-artifacts:
artifacts:
name: "mesa_${CI_JOB_NAME}"
when: always
untracked: false
paths:
@@ -81,7 +81,7 @@ success:
# Build the CI docker images.
#
# DEBIAN_TAG is the tag of the docker image used by later stage jobs. If the
# FDO_DISTRIBUTION_TAG is the tag of the docker image used by later stage jobs. If the
# image doesn't exist yet, the container stage job generates it.
#
# In order to generate a new image, one should generally change the tag.
@@ -100,20 +100,40 @@ success:
stage: container
extends:
- .ci-run-policy
rules:
# Run pipeline by default if it was triggered by Marge Bot, is for a
# merge request, and any files affecting it were changed
- if: '$GITLAB_USER_LOGIN == "marge-bot" && $CI_MERGE_REQUEST_SOURCE_BRANCH_NAME == $CI_COMMIT_REF_NAME'
changes:
*all_paths
when: on_success
# Run pipeline by default in the main project if any files affecting it were
# changed
- if: '$CI_PROJECT_PATH == "mesa/mesa"'
changes:
*all_paths
when: on_success
# Allow triggering jobs manually for MRs or branches of forked projects if
# any files affecting the pipeline were changed
- changes:
*all_paths
when: manual
# Otherwise, container jobs won't run
- when: never
variables:
DEBIAN_VERSION: buster-slim
REPO_SUFFIX: $CI_JOB_NAME
DEBIAN_EXEC: 'bash .gitlab-ci/container/${CI_JOB_NAME}.sh'
FDO_DISTRIBUTION_VERSION: buster-slim
FDO_REPO_SUFFIX: "debian/$CI_JOB_NAME"
FDO_DISTRIBUTION_EXEC: 'bash .gitlab-ci/container/${CI_JOB_NAME}.sh'
# no need to pull the whole repo to build the container image
GIT_STRATEGY: none
# Debian 10 based x86 build image
x86_build:
extends:
- .debian@container-ifnot-exists
- .fdo.container-build@debian
- .container
variables:
DEBIAN_TAG: &x86_build "2020-01-14"
FDO_DISTRIBUTION_TAG: &x86_build "2020-04-22-winehq"
.use-x86_build:
variables:
@@ -126,32 +146,20 @@ x86_build:
x86_test-gl:
extends: x86_build
variables:
DEBIAN_TAG: &x86_test-gl "2020-01-14"
FDO_DISTRIBUTION_TAG: &x86_test-gl "2020-04-21"
# Debian 10 based x86 test image for VK
x86_test-vk:
extends: x86_build
variables:
DEBIAN_TAG: &x86_test-vk "2020-01-14"
# Can only be triggered manually on personal branches because RADV is the only
# driver that does Vulkan testing at the moment.
rules:
# Never build the test image for VK by default in the main project.
- if: '$CI_PROJECT_PATH == "mesa/mesa"'
when: never
# Never build the test image for VK by default for merge requests.
- if: '$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME == $CI_COMMIT_REF_NAME'
when: never
# Otherwise, allow building it manually for personal branches.
- when: manual
FDO_DISTRIBUTION_TAG: &x86_test-vk "2020-04-09"
# Debian 9 based x86 build image (old LLVM)
x86_build_old:
extends: x86_build
variables:
DEBIAN_TAG: &x86_build_old "2019-09-18"
DEBIAN_VERSION: stretch-slim
FDO_DISTRIBUTION_TAG: &x86_build_old "2019-03-18-jflags"
FDO_DISTRIBUTION_VERSION: stretch-slim
.use-x86_build_old:
variables:
@@ -163,10 +171,10 @@ x86_build_old:
# Debian 10 based ARM build image
arm_build:
extends:
- .debian@container-ifnot-exists@arm64v8
- .fdo.container-build@debian@arm64v8
- .container
variables:
DEBIAN_TAG: &arm_build "2020-01-14"
FDO_DISTRIBUTION_TAG: &arm_build "2020-04-01-jflags"
.use-arm_build:
variables:
@@ -179,7 +187,7 @@ arm_build:
arm_test:
extends: arm_build
variables:
DEBIAN_TAG: &arm_test "2019-12-18"
FDO_DISTRIBUTION_TAG: &arm_test "2020-03-18-jflags"
.use-arm_test:
variables:
@@ -189,14 +197,52 @@ arm_test:
- meson-arm64
- arm_test
# Native Windows docker builds
#
# Unlike the above Linux-based builds - including MinGW/SCons builds which
# cross-compile for Windows - which use the freedesktop ci-templates, we
# cannot use the same scheme here. As Windows lacks support for
# Docker-in-Docker, and Podman does not run natively on Windows, we have
# to open-code much of the same ourselves.
#
# This is achieved by first running in a native Windows shell instance
# (host PowerShell) in the container stage to build and push the image,
# then in the build stage by executing inside Docker.
.windows-docker-vs2019:
variables:
WINDOWS_TAG: "2020-03-24"
WINDOWS_IMAGE: "$CI_REGISTRY_IMAGE/windows/x64_build:$WINDOWS_TAG"
WINDOWS_UPSTREAM_IMAGE: "$CI_REGISTRY/$FDO_UPSTREAM_REPO/windows/x64_build:$WINDOWS_TAG"
windows_build_vs2019:
extends:
- .container
- .windows-docker-vs2019
stage: container
variables:
GIT_STRATEGY: fetch # we do actually need the full repository though
tags:
- windows
- shell
- "1809"
- mesa
script:
- .\.gitlab-ci\windows\mesa_container.ps1 $CI_REGISTRY $CI_REGISTRY_USER $CI_REGISTRY_PASSWORD $WINDOWS_IMAGE $WINDOWS_UPSTREAM_IMAGE
.use-windows_build_vs2019:
extends: .windows-docker-vs2019
image: "$WINDOWS_IMAGE"
needs:
- windows_build_vs2019
# BUILD
# Shared between windows and Linux
.build-common:
extends: .ci-run-policy
stage: build
artifacts:
name: "mesa_${CI_JOB_NAME}"
when: always
paths:
- _build/meson-logs/*.txt
@@ -222,7 +268,10 @@ arm_test:
.build-windows:
extends: .build-common
tags:
- mesa-windows
- windows
- docker
- "1809"
- mesa
cache:
key: ${CI_JOB_NAME}
paths:
@@ -232,6 +281,7 @@ arm_test:
extends:
- .build-linux
- .use-x86_build
stage: meson-x86_64
variables:
LLVM_VERSION: 9
script:
@@ -241,6 +291,7 @@ arm_test:
extends:
- .build-linux
- .use-x86_build
stage: scons
variables:
SCONSFLAGS: "-j4"
script:
@@ -259,14 +310,16 @@ meson-testing:
-D platforms=x11,drm,surfaceless
GALLIUM_ST: >
-D dri3=true
GALLIUM_DRIVERS: "swrast"
GALLIUM_DRIVERS: "swrast,virgl"
VULKAN_DRIVERS: amd
BUILDTYPE: "debugoptimized"
EXTRA_OPTION: >
-D werror=true
script:
- .gitlab-ci/meson-build.sh
- .gitlab-ci/prepare-artifacts.sh
meson-main:
meson-gallium:
extends: .meson-build
variables:
UNWIND: "true"
@@ -275,7 +328,6 @@ meson-main:
-D gbm=true
-D egl=true
-D platforms=x11,wayland,drm,surfaceless
DRI_DRIVERS: "i915,i965,r100,r200,nouveau"
GALLIUM_ST: >
-D dri3=true
-D gallium-extra-hud=true
@@ -294,9 +346,24 @@ meson-main:
- .gitlab-ci/meson-build.sh
- .gitlab-ci/run-shader-db.sh
meson-classic:
extends: .meson-build
variables:
UNWIND: "true"
DRI_LOADERS: >
-D glx=dri
-D gbm=true
-D egl=true
-D platforms=x11,wayland,drm,surfaceless
DRI_DRIVERS: "auto"
EXTRA_OPTION: >
-D osmesa=classic
-D tools=all
.meson-cross:
extends:
- .meson-build
stage: meson-misc
variables:
UNWIND: "false"
DRI_LOADERS: >
@@ -313,6 +380,7 @@ meson-main:
-D gallium-va=false
-D gallium-xa=false
-D gallium-nine=false
LLVM_VERSION: "8"
.meson-arm:
extends:
@@ -322,8 +390,6 @@ meson-main:
VULKAN_DRIVERS: freedreno
GALLIUM_DRIVERS: "etnaviv,freedreno,kmsro,lima,nouveau,panfrost,swrast,tegra,v3d,vc4"
BUILDTYPE: "debugoptimized"
EXTRA_OPTION: >
-D I-love-half-baked-turnips=true
tags:
- aarch64
@@ -334,6 +400,8 @@ meson-armhf:
variables:
CROSS: armhf
LLVM_VERSION: "7"
EXTRA_OPTION: >
-D llvm=false
script:
- .gitlab-ci/meson-build.sh
- .gitlab-ci/prepare-artifacts.sh
@@ -343,12 +411,22 @@ meson-arm64:
- .meson-arm
- .ci-deqp-artifacts
variables:
LLVM_VERSION: "8"
VULKAN_DRIVERS: "freedreno,amd"
VULKAN_DRIVERS: "freedreno"
EXTRA_OPTION: >
-D llvm=false
script:
- .gitlab-ci/meson-build.sh
- .gitlab-ci/prepare-artifacts.sh
meson-arm64-build-test:
extends:
- .meson-arm
- .ci-deqp-artifacts
variables:
VULKAN_DRIVERS: "amd"
script:
- .gitlab-ci/meson-build.sh
meson-clang:
extends: .meson-build
variables:
@@ -361,27 +439,20 @@ meson-clang:
CC: "ccache clang-9"
CXX: "ccache clang++-9"
.meson-windows:
meson-windows-vs2019:
extends:
- .build-windows
before_script:
- $ENV:ARCH = "x86"
- $ENV:VERSION = "2019\Community"
- .use-windows_build_vs2019
stage: meson-misc
script:
- cmd /C .gitlab-ci\meson-build.bat
scons-swr:
extends: .scons-build
variables:
SCONS_TARGET: "swr=1"
SCONS_CHECK_COMMAND: "true"
LLVM_VERSION: "6.0"
- . .\.gitlab-ci\windows\mesa_build.ps1
scons-win64:
extends: .scons-build
variables:
SCONS_TARGET: platform=windows machine=x86_64
SCONS_TARGET: platform=windows machine=x86_64 debug=1
SCONS_CHECK_COMMAND: "true"
allow_failure: true
meson-clover:
extends: .meson-build
@@ -451,25 +522,48 @@ meson-vulkan:
VULKAN_DRIVERS: intel,amd,freedreno
EXTRA_OPTION: >
-D vulkan-overlay-layer=true
-D werror=true
# While the main point of this build is testing the i386 cross build,
# we also use this one to test some other options that are exclusive
# with meson-main's choices (classic swrast and osmesa)
meson-i386:
extends: .meson-cross
variables:
CROSS: i386
VULKAN_DRIVERS: intel
DRI_DRIVERS: "swrast"
GALLIUM_DRIVERS: "iris"
VULKAN_DRIVERS: intel,amd
GALLIUM_DRIVERS: "iris,r300,radeonsi,swrast,virgl"
EXTRA_OPTION: >
-D vulkan-overlay-layer=true
-D llvm=false
-D osmesa=classic
-D werror=true
script:
- dpkg -i /var/cache/apt/archives/$CROSS/*.deb
- .gitlab-ci/meson-build.sh
meson-s390x:
extends:
- .meson-cross
tags:
- kvm
variables:
CROSS: s390x
GALLIUM_DRIVERS: "swrast"
script:
# For unknown reasons "too many" installed i386 libraries cause qemu to
# crash while executing llvm-config for s390x.
- apt-get purge -y winehq-stable
- apt-get autoremove -y --purge
- dpkg -i /var/cache/apt/archives/$CROSS/*.deb
- .gitlab-ci/meson-build.sh
meson-ppc64el:
extends:
- meson-s390x
variables:
CROSS: ppc64el
GALLIUM_DRIVERS: "nouveau,radeonsi,swrast,virgl"
VULKAN_DRIVERS: "amd"
meson-mingw32-x86_64:
extends: .meson-build
stage: meson-misc
variables:
UNWIND: "false"
DRI_DRIVERS: ""
@@ -479,26 +573,9 @@ meson-mingw32-x86_64:
-Dosmesa=gallium
--cross-file=.gitlab-ci/x86_64-w64-mingw32
scons:
extends: .scons-build
variables:
SCONS_TARGET: "llvm=1"
SCONS_CHECK_COMMAND: "scons llvm=1 force_scons=1 check"
script:
- SCONS_TARGET="" SCONS_CHECK_COMMAND="scons check force_scons=1" .gitlab-ci/scons-build.sh
- LLVM_VERSION=9 .gitlab-ci/scons-build.sh
scons-old-llvm:
extends:
- scons
- .use-x86_build_old
script:
- LLVM_VERSION=3.9 .gitlab-ci/scons-build.sh
.test:
extends:
- .ci-run-policy
stage: test
variables:
GIT_STRATEGY: none # testing doesn't build anything from source
before_script:
@@ -508,7 +585,7 @@ scons-old-llvm:
- LD_LIBRARY_PATH=install/lib find install/lib -name "*.so" -print -exec ldd {} \;
artifacts:
when: always
name: "$CI_JOB_NAME-$CI_COMMIT_REF_NAME"
name: "mesa_${CI_JOB_NAME}"
paths:
- results/
dependencies:
@@ -535,17 +612,19 @@ scons-old-llvm:
- x86_test-vk
.piglit-test:
extends: .test-gl
extends:
- .test-gl
- .llvmpipe-rules
artifacts:
when: on_failure
name: "$CI_JOB_NAME-$CI_COMMIT_REF_NAME"
name: "mesa_${CI_JOB_NAME}"
paths:
- summary/
variables:
LIBGL_ALWAYS_SOFTWARE: 1
PIGLIT_NO_WINDOW: 1
script:
- artifacts/piglit/run.sh
- install/piglit/run.sh
piglit-quick_gl:
extends: .piglit-test
@@ -582,7 +661,7 @@ piglit-quick_shader:
variables:
DEQP_SKIPS: deqp-default-skips.txt
script:
- ./artifacts/deqp-runner.sh
- ./install/deqp-runner.sh
.deqp-test-gl:
extends:
@@ -596,7 +675,12 @@ piglit-quick_shader:
variables:
DEQP_VER: vk
test-llvmpipe-gles2:
.fossilize-test:
extends: .test-vk
script:
- ./install/fossilize-runner.sh
llvmpipe-gles2:
variables:
DEQP_VER: gles2
DEQP_PARALLEL: 4
@@ -606,31 +690,87 @@ test-llvmpipe-gles2:
LP_NUM_THREADS: 0
DEQP_EXPECTED_FAILS: deqp-llvmpipe-fails.txt
LIBGL_ALWAYS_SOFTWARE: "true"
extends: .deqp-test-gl
DEQP_EXPECTED_RENDERER: llvmpipe
extends:
- .deqp-test-gl
- .llvmpipe-rules
test-softpipe-gles2:
extends: test-llvmpipe-gles2
softpipe-gles2:
extends:
- llvmpipe-gles2
- .softpipe-rules
variables:
DEQP_EXPECTED_FAILS: deqp-softpipe-fails.txt
DEQP_SKIPS: deqp-softpipe-skips.txt
GALLIUM_DRIVER: "softpipe"
DEQP_EXPECTED_RENDERER: softpipe
test-softpipe-gles3:
softpipe-gles3:
parallel: 2
variables:
DEQP_VER: gles3
extends: test-softpipe-gles2
extends: softpipe-gles2
test-softpipe-gles31:
softpipe-gles31:
parallel: 4
variables:
DEQP_VER: gles31
extends: test-softpipe-gles2
extends: softpipe-gles2
virgl-gles2:
variables:
DEQP_VER: gles2
DEQP_PARALLEL: 4
NIR_VALIDATE: 0
DEQP_NO_SAVE_RESULTS: 1
# Don't use threads inside llvmpipe, we've already got all 4 cores
# busy with DEQP_PARALLEL.
LP_NUM_THREADS: 0
DEQP_EXPECTED_FAILS: deqp-virgl-fails.txt
LIBGL_ALWAYS_SOFTWARE: "true"
GALLIUM_DRIVER: "virpipe"
DEQP_EXPECTED_RENDERER: virgl
extends:
- .deqp-test-gl
- .virgl-rules
virgl-gles3:
variables:
DEQP_VER: gles3
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 3
DEQP_RUNNER_OPTIONS: "--timeout 120"
extends: virgl-gles2
virgl-gles31:
variables:
DEQP_VER: gles31
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 10
DEQP_OPTIONS: "--deqp-log-images=disable"
DEQP_RUNNER_OPTIONS: "--timeout 120"
MESA_GLES_VERSION_OVERRIDE: "3.1"
MESA_GLSL_VERSION_OVERRIDE: "310"
extends: virgl-gles2
# Rules for tests that should not be present in MRs or the main
# project's pipeline (don't block marge or report red on
# mesa/mesamaster) but should be present on pipelines in personal
# branches (so you can opt in to running the flaky test when you want
# to).
.test-manual:
rules:
- if: '$CI_PROJECT_PATH != "mesa/mesa" && $CI_MERGE_REQUEST_SOURCE_BRANCH_NAME != $CI_COMMIT_REF_NAME'
changes:
*all_paths
when: manual
- when: never
arm64_a630_gles2:
extends:
- .deqp-test-gl
- .use-arm_test
- .freedreno-rules
variables:
DEQP_VER: gles2
DEQP_EXPECTED_FAILS: deqp-freedreno-a630-fails.txt
@@ -638,6 +778,7 @@ arm64_a630_gles2:
NIR_VALIDATE: 0
DEQP_PARALLEL: 4
FLAKES_CHANNEL: "#freedreno-ci"
DEQP_EXPECTED_RENDERER: FD630
tags:
- mesa-cheza
dependencies:
@@ -653,38 +794,180 @@ arm64_a630_gles3:
variables:
DEQP_VER: gles3
arm64_a306_gles2:
arm64_a630_gles31_options:
extends: arm64_a630_gles2
variables:
DEQP_VER: gles31
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 5
script:
# We almost always manage to lower UBOs back to constant uploads in
# the test suite, so get a little testing for it here.
- DEQP_RUN_SUFFIX=-nouboopt IR3_SHADER_DEBUG=nouboopt DEQP_EXPECTED_FAILS=deqp-freedreno-a630-noubo-fails.txt DEQP_CASELIST_FILTER="functional.\*ubo" ./install/deqp-runner.sh
# The driver does some guessing as to whether to render using gmem
# or bypass, and some GLES3.1 features interact with either one.
# Do a little testing with gmem and bypass forced.
- DEQP_RUN_SUFFIX=-bypass FD_MESA_DEBUG=nogmem DEQP_EXPECTED_FAILS=deqp-freedreno-a630-bypass-fails.txt ./install/deqp-runner.sh
- DEQP_RUN_SUFFIX=-gmem FD_MESA_DEBUG=nobypass ./install/deqp-runner.sh
.baremetal-test:
extends:
- .ci-run-policy
stage: test
arm64_a306_gles2:
extends:
- .baremetal-test
- .use-arm_build
- .freedreno-rules
variables:
BM_KERNEL: /lava-files/Image.gz
BM_DTB: /lava-files/apq8016-sbc.dtb
BM_ROOTFS: /lava-files/rootfs-arm64
BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8"
DEQP_EXPECTED_FAILS: deqp-freedreno-a307-fails.txt
DEQP_SKIPS: deqp-default-skips.txt
DEQP_SKIPS: deqp-freedreno-a307-skips.txt
DEQP_VER: gles2
DEQP_PARALLEL: 4
DEQP_EXPECTED_RENDERER: FD307
script:
- .gitlab-ci/bare-metal/fastboot.sh
needs:
- meson-arm64
tags:
- db410c
- google-freedreno-db410c
# Disabled due to flaky results
arm64_a306_gles3:
extends:
- arm64_a306_gles2
variables:
DEQP_VER: gles3
DEQP_PARALLEL: 1
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 50
arm64_a530_gles2:
extends:
- arm64_a306_gles2
variables:
BM_KERNEL: /lava-files/db820c-kernel
BM_DTB: /lava-files/db820c.dtb
BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8"
DEQP_EXPECTED_FAILS: deqp-freedreno-a530-fails.txt
DEQP_SKIPS: deqp-freedreno-a530-skips.txt
DEQP_EXPECTED_RENDERER: FD530
tags:
- google-freedreno-db820c
arm64_a530_gles3:
extends:
- arm64_a530_gles2
variables:
DEQP_VER: gles3
DEQP_PARALLEL: 1
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 100
arm64_a530_gles31:
extends:
- arm64_a530_gles3
variables:
DEQP_VER: gles31
# RADV CI
.test-radv:
extends: .radv-rules
stage: radv
variables:
VK_DRIVER: radeon
RADV_DEBUG: checkir
# Can only be triggered manually on personal branches because RADV is the only
# driver that does Vulkan testing at the moment.
rules:
# Never test RADV by default in the main project.
- if: '$CI_PROJECT_PATH == "mesa/mesa"'
when: never
# Never test RADV by default for merge requests.
- if: '$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME == $CI_COMMIT_REF_NAME'
when: never
# Otherwise, allow testing RADV if the test image for VK has been manually
# started.
- when: on_success
.test-radv-fossilize:
extends:
- .fossilize-test
- .test-radv
script:
- ./install/fossilize-runner.sh
- ACO_DEBUG=validateir,validatera RADV_PERFTEST=aco ./install/fossilize-runner.sh
# Can only be triggered manually on personal branches because RADV is the only
# driver that does Vulkan testing at the moment.
radv_polaris10_vkcts:
extends:
- .deqp-test-vk
- .test-radv
- .test-manual
variables:
DEQP_PARALLEL: 4
DEQP_SKIPS: deqp-radv-polaris10-skips.txt
tags:
- polaris10
radv-fossils:
extends:
- .fossilize-test
- .test-radv
script:
# Polaris10
- export RADV_FORCE_FAMILY="polaris10"
- ./install/fossilize-runner.sh
- ACO_DEBUG=validateir,validatera RADV_PERFTEST=aco ./install/fossilize-runner.sh
# Vega10
- export RADV_FORCE_FAMILY="gfx900"
- ./install/fossilize-runner.sh
- ACO_DEBUG=validateir,validatera RADV_PERFTEST=aco ./install/fossilize-runner.sh
# Navi10
- export RADV_FORCE_FAMILY="gfx1010"
- ./install/fossilize-runner.sh
- ACO_DEBUG=validateir,validatera RADV_PERFTEST=aco ./install/fossilize-runner.sh
# Traces CI
.traces-test:
cache:
key: ${CI_JOB_NAME}
paths:
- traces-db/
.traces-test-gl:
extends:
- .test-gl
- .traces-test
script:
- ./install/tracie-runner-gl.sh
.traces-test-vk:
extends:
- .test-vk
- .traces-test
script:
- ./install/tracie-runner-vk.sh
llvmpipe-traces:
extends:
- .traces-test-gl
- .llvmpipe-rules
variables:
LIBGL_ALWAYS_SOFTWARE: "true"
GALLIUM_DRIVER: "llvmpipe"
DEVICE_NAME: "gl-vmware-llvmpipe"
radv-polaris10-traces:
extends:
- .traces-test-vk
- .test-radv
- .test-manual
variables:
DEVICE_NAME: "vk-amd-polaris10"
tags:
- polaris10
virgl-traces:
extends:
- .traces-test-gl
- .virgl-rules
variables:
LIBGL_ALWAYS_SOFTWARE: "true"
GALLIUM_DRIVER: "virpipe"
DEVICE_NAME: "gl-virgl"
MESA_GLES_VERSION_OVERRIDE: "3.1"
MESA_GLSL_VERSION_OVERRIDE: "310"

View File

@@ -1,14 +1,104 @@
## Mesa testing using gitlab-runner
# Mesa testing
The goal of the "test" stage of the .gitlab-ci.yml is to do pre-merge
testing of Mesa drivers on various platforms, so that we can ensure no
regressions are merged, as long as developers are merging code using
the "Merge when pipeline completes" button.
marge-bot.
This document only covers the CI from .gitlab-ci.yml and this
directory. For other CI systems, see Intel's [Mesa
CI](https://gitlab.freedesktop.org/Mesa_CI) or panfrost's LAVA-based
CI (`src/gallium/drivers/panfrost/ci/`)
There are currently 4 automated testing systems deployed for Mesa.
LAVA and gitlab-runner on the DUTs are used in pre-merge testing and
are described in this document. Managing bare metal using
gitlab-runner is described under [bare-metal/README.md]. Intel also
has a jenkins-based CI system with restricted access that isn't
connected to gitlab.
## Mesa testing using LAVA
[LAVA](https://lavasoftware.org/) is a system for functional testing
of boards including deploying custom bootloaders and kernels. This is
particularly relevant to testing Mesa because we often need to change
kernels for UAPI changes (and this lets us do full testing of a new
kernel during development), and our workloads can easily take down
boards when mistakes are made (kernel oopses, OOMs that take out
critical system services).
### Mesa-LAVA software architecture
The gitlab-runner will run on some host that has access to the LAVA
lab, with tags like "lava-mesa-boardname" to control only taking in
jobs for the hardware that the LAVA lab contains. The gitlab-runner
spawns a docker container with lava-cli in it, and connects to the
LAVA lab using a predefined token to submit jobs under a specific
device type.
The LAVA instance manages scheduling those jobs to the boards present.
For a job, it will deploy the kernel, device tree, and the ramdisk
containing the CTS.
### Deploying a new Mesa-LAVA lab
You'll want to start with setting up your LAVA instance and getting
some boards booting using test jobs. Start with the stock QEMU
examples to make sure your instance works at all. Then, you'll need
to define your actual boards.
The device type in lava-gitlab-ci.yml is the device type you create in
your LAVA instance, which doesn't have to match the board's name in
`/etc/lava-dispatcher/device-types`. You create your boards under
that device type and the Mesa jobs will be scheduled to any of them.
Instantiate your boards by creating them in the UI or at the command
line attached to that device type, then populate their dictionary
(using an "extends" line probably referencing the board's template in
`/etc/lava-dispatcher/device-types`). Now, go find a relevant
healthcheck job for your board as a test job definition, or cobble
something together from a board that boots using the same boot_method
and some public images, and figure out how to get your boards booting.
Once you can boot your board using a custom job definition, it's time
to connect Mesa CI to it. Install gitlab-runner and register as a
shared runner (you'll need a gitlab admin for help with this). The
runner *must* have a tag (like "mesa-lava-db410c") to restrict the
jobs it takes or it will grab random jobs from tasks across fd.o, and
your runner isn't ready for that.
The runner will be running an ARM docker image (we haven't done any
x86 LAVA yet, so that isn't documented). If your host for the
gitlab-runner is x86, then you'll need to install qemu-user-static and
the binfmt support.
The docker image will need access to the lava instance. If it's on a
public network it should be fine. If you're running the LAVA instance
on localhost, you'll need to set `network_mode="host"` in
`/etc/gitlab-runner/config.toml` so it can access localhost. Create a
gitlab-runner user in your LAVA instance, log in under that user on
the web interface, and create an API token. Copy that into a
`lavacli.yaml`:
```
default:
token: <token contents>
uri: <url to the instance>
username: gitlab-runner
```
Add a volume mount of that `lavacli.yaml` to
`/etc/gitlab-runner/config.toml` so that the docker container can
access it. You probably have a `volumes = ["/cache"]` already, so now it would be
```
volumes = ["/home/anholt/lava-config/lavacli.yaml:/root/.config/lavacli.yaml", "/cache"]
```
Note that this token is visible to anybody that can submit MRs to
Mesa! It is not an actual secret. We could just bake it into the
gitlab CI yml, but this way the current method of connecting to the
LAVA instance is separated from the Mesa branches (particularly
relevant as we have many stable branches all using CI).
Now it's time to define your test runner in
`.gitlab-ci/lava-gitlab-ci.yml`.
## Mesa testing using gitlab-runner on DUTs
### Software architecture

View File

@@ -44,3 +44,4 @@ CONFIG_DEBUG_LOCKDEP=n
CONFIG_SOFTLOCKUP_DETECTOR=n
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=n
CONFIG_FW_LOADER_COMPRESS=y

View File

@@ -12,6 +12,9 @@ CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_PANFROST=y
CONFIG_DRM_LIMA=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_MSM=y
CONFIG_DRM_I2C_ADV7511=y
CONFIG_DRM_I2C_ADV7533=y
CONFIG_PWM_CROS_EC=y
CONFIG_BACKLIGHT_PWM=y
@@ -26,6 +29,9 @@ CONFIG_TYPEC_FUSB302=y
CONFIG_TYPEC=y
CONFIG_TYPEC_TCPM=y
# db410c ethernet
CONFIG_USB_RTL8152=y
CONFIG_ARCH_ALPINE=n
CONFIG_ARCH_BCM2835=n
CONFIG_ARCH_BCM_IPROC=n
@@ -38,7 +44,6 @@ CONFIG_ARCH_LG1K=n
CONFIG_ARCH_HISI=n
CONFIG_ARCH_MEDIATEK=n
CONFIG_ARCH_MVEBU=n
CONFIG_ARCH_QCOM=n
CONFIG_ARCH_SEATTLE=n
CONFIG_ARCH_SYNQUACER=n
CONFIG_ARCH_RENESAS=n
@@ -62,7 +67,13 @@ CONFIG_ARCH_XGENE=n
CONFIG_ARCH_ZX=n
CONFIG_ARCH_ZYNQMP=n
CONFIG_ACPI=n
# Strip out some stuff we don't need for graphics testing, to reduce
# the build.
CONFIG_CAN=n
CONFIG_SPI=n
CONFIG_WIRELESS=n
CONFIG_RFKILL=n
CONFIG_WLAN=n
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR=y
@@ -81,3 +92,5 @@ CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_FW_LOADER_COMPRESS=y

View File

@@ -0,0 +1,2 @@
[*.sh]
indent_size = 2

View File

@@ -0,0 +1,80 @@
# bare-metal Mesa testing
Testing Mesa with gitlab-runner running on the devices being tested
(DUTs) proved to be too unstable, so this set of scripts is for
running Mesa testing on bare-metal boards connected to a separate
system using gitlab-runner. Currently only "fastboot" devices are
supported.
In comparison with LAVA, this doesn't involve maintaining a separate
webservice with its own job scheduler and replicating jobs between the
two. It also places more of the board support in git, instead of
webservice configuration. Most importantly, it doesn't download the
rootfs as artifacts on each job, so we can avoid traffic to
freedesktop.org. On the other hand, the serial interactions and
bootloader support are more primitive.
## Requirements
This testing requires power control of the DUTs by the gitlab-runner
machine, since this is what we use to reset the system and get back to
a pristine state at the start of testing.
We require access to the console output from the gitlb-runner system,
since that is how we get the final results back from te tests. You
should probably have the console on a serial connection, so that you
can see bootloader progress.
The boards need to be able to have a kernel/initramfs supplied by the
gitlab-runner system, since the initramfs is what contains the Mesa
testing payload. Currently only "fastboot" devices are supported.
The boards should have networking, so that (in a future iteration of
this code) we can extract the dEQP .xml results to artifacts on
gitlab.
## Setup
Each board will be registered in fd.o gitlab. You'll want something
like this to register:
```
sudo gitlab-runner register \
--url https://gitlab.freedesktop.org \
--registration-token $1 \
--name MY_BOARD_NAME \
--tag-list MY_BOARD_TAG \
--executor docker \
--docker-image "alpine:latest" \
--docker-volumes "/dev:/dev" \
--docker-network-mode "host" \
--docker-privileged \
--non-interactive
```
The registration token has to come from a fd.o gitlab admin going to
https://gitlab.freedesktop.org/admin/runners
The name scheme for Google's lab is google-freedreno-boardname-nn, and
our tag is google-freedreno-db410c. The tag is what identifies a
board type so that board-specific jobs can be dispatched into that
pool.
We need privileged mode and the /dev bind mount in order to get at the
serial console and fastboot USB devices (--device arguments don't
apply to devices that show up after container start, which is the case
with fastboot). We use host network mode so that we can (in the
future) spin up a server to collect XML results.
Once you've added your boards, you're going to need to specify the
board-specific env vars, adding something like this `environment` line
to each runner in `/etc/gitlab-runner/config.toml`
```
[[runners]]
name = "google-freedreno-db410c-01"
environment = ["BM_SERIAL=/dev/ttyDB410c8", "BM_POWERUP=google-power-up.sh 8", "BM_FASTBOOT_SERIAL=15e9e390"]
```
Once you've updated your runners' configs, restart with `sudo service
gitlab-runner restart`

View File

@@ -0,0 +1,9 @@
#!/bin/bash
set -e
echo "Waiting for $1 to say '$2'"
while ! grep -q "$2" $1; do
sleep 2
done

108
.gitlab-ci/bare-metal/fastboot.sh Executable file
View File

@@ -0,0 +1,108 @@
#!/bin/bash
BM=$CI_PROJECT_DIR/.gitlab-ci/bare-metal
if [ -z "$BM_SERIAL" ]; then
echo "Must set BM_SERIAL in your gitlab-runner config.toml [[runners]] environment"
echo "This is the serial device to talk to for waiting for fastboot to be ready and logging from the kernel."
exit 1
fi
if [ -z "$BM_POWERUP" ]; then
echo "Must set BM_POWERUP in your gitlab-runner config.toml [[runners]] environment"
echo "This is a shell script that should reset the device and begin its boot sequence"
echo "such that it pauses at fastboot."
exit 1
fi
if [ -z "$BM_POWERDOWN" ]; then
echo "Must set BM_POWERDOWN in your gitlab-runner config.toml [[runners]] environment"
echo "This is a shell script that should power off the device."
exit 1
fi
if [ -z "$BM_FASTBOOT_SERIAL" ]; then
echo "Must set BM_FASTBOOT_SERIAL in your gitlab-runner config.toml [[runners]] environment"
echo "This must be the a stable-across-resets fastboot serial number."
exit 1
fi
if [ -z "$BM_KERNEL" ]; then
echo "Must set BM_KERNEL to your board's kernel vmlinuz or Image.gz in the job's variables:"
exit 1
fi
if [ -z "$BM_DTB" ]; then
echo "Must set BM_DTB to your board's DTB file in the job's variables:"
exit 1
fi
if [ -z "$BM_ROOTFS" ]; then
echo "Must set BM_ROOTFS to your board's rootfs directory in the job's variables:"
exit 1
fi
set -ex
# Copy the rootfs to a temporary for our setup, as I believe changes to the
# container can end up impacting future runs.
cp -Rp $BM_ROOTFS rootfs
# Set up the init script that brings up the system.
cp $BM/init.sh rootfs/init
sed -i "s|DEQP_VER_REPLACE|$DEQP_VER|g" rootfs/init
sed -i "s|DEQP_PARALLEL_REPLACE|$DEQP_PARALLEL|g" rootfs/init
sed -i "s|DEQP_EXPECTED_RENDERER_REPLACE|$DEQP_EXPECTED_RENDERER|g" rootfs/init
sed -i "s|CI_NODE_INDEX_REPLACE|$CI_NODE_INDEX|g" rootfs/init
sed -i "s|CI_NODE_TOTAL_REPLACE|$CI_NODE_TOTAL|g" rootfs/init
# Add the Mesa drivers we built, and make a consistent symlink to them.
mkdir -p rootfs/$CI_PROJECT_DIR
tar -C rootfs/$CI_PROJECT_DIR/ -xf $CI_PROJECT_DIR/artifacts/install.tar
ln -sf $CI_PROJECT_DIR/install rootfs/install
# Copy the deqp runner script and metadata.
cp .gitlab-ci/deqp-runner.sh rootfs/deqp/.
cp .gitlab-ci/$DEQP_SKIPS rootfs/$CI_PROJECT_DIR/install/deqp-skips.txt
if [ -n "$DEQP_EXPECTED_FAILS" ]; then
cp .gitlab-ci/$DEQP_EXPECTED_FAILS rootfs/$CI_PROJECT_DIR/install/deqp-expected-fails.txt
fi
# Finally, pack it up into a cpio rootfs.
pushd rootfs
find -H | cpio -H newc -o | xz --check=crc32 -T4 - > $CI_PROJECT_DIR/rootfs.cpio.gz
popd
cat $BM_KERNEL $BM_DTB > Image.gz-dtb
abootimg \
--create artifacts/fastboot.img \
-k Image.gz-dtb \
-r rootfs.cpio.gz \
-c cmdline="$BM_CMDLINE"
rm Image.gz-dtb
# Start watching serial, and power up the device.
$BM/serial-buffer.py $BM_SERIAL | tee artifacts/serial-output.txt &
while [ ! -e artifacts/serial-output.txt ]; do
sleep 1
done
PATH=$BM:$PATH $BM_POWERUP
# Once fastboot is ready, boot our image.
$BM/expect-output.sh artifacts/serial-output.txt "fastboot: processing commands"
fastboot boot -s $BM_FASTBOOT_SERIAL artifacts/fastboot.img
# Wait for the device to complete the deqp run
$BM/expect-output.sh artifacts/serial-output.txt "DEQP RESULT"
# power down the device
PATH=$BM:$PATH $BM_POWERDOWN
set +e
if grep -q "DEQP RESULT: pass" artifacts/serial-output.txt; then
exit 0
else
exit 1
fi

View File

@@ -0,0 +1,10 @@
#!/bin/bash
relay=$1
if [ -z "$relay" ]; then
echo "Must supply a relay arg"
exit 1
fi
$CI_PROJECT_DIR/.gitlab-ci/bare-metal/google-power-relay.py off $relay

View File

@@ -0,0 +1,19 @@
#!/usr/bin/python3
import sys
import serial
mode = sys.argv[1]
relay = sys.argv[2]
# our relays are "off" means "board is powered".
mode_swap = {
"on" : "off",
"off" : "on",
}
mode = mode_swap[mode]
ser = serial.Serial('/dev/ttyACM0', 115200, timeout=2)
command = "relay {} {}\n\r".format(mode, relay)
ser.write(command.encode())
ser.close()

View File

@@ -0,0 +1,12 @@
#!/bin/bash
relay=$1
if [ -z "$relay" ]; then
echo "Must supply a relay arg"
exit 1
fi
$CI_PROJECT_DIR/.gitlab-ci/bare-metal/google-power-relay.py off $relay
sleep 5
$CI_PROJECT_DIR/.gitlab-ci/bare-metal/google-power-relay.py on $relay

View File

@@ -0,0 +1,30 @@
#!/bin/sh
set -ex
mount -t proc none /proc
mount -t sysfs none /sys
mount -t devtmpfs none /dev || echo possibly already mounted
mkdir -p /dev/pts
mount -t devpts devpts /dev/pts
export DEQP_NO_SAVE_RESULTS=1
export DEQP_VER=DEQP_VER_REPLACE
export DEQP_PARALLEL=DEQP_PARALLEL_REPLACE
export DEQP_EXPECTED_RENDERER=DEQP_EXPECTED_RENDERER_REPLACE
export CI_NODE_INDEX=CI_NODE_INDEX_REPLACE
export CI_NODE_TOTAL=CI_NODE_TOTAL_REPLACE
export DEQP_SKIPS=deqp-skips.txt
if [ -e /install/deqp-expected-fails.txt ]; then
export DEQP_EXPECTED_FAILS=deqp-expected-fails.txt
fi
if sh /deqp/deqp-runner.sh; then
echo "DEQP RESULT: pass"
else
echo "DEQP RESULT: fail"
fi
# Wait until the job would have timed out anyway, so we don't spew a "init
# exited" panic.
sleep 6000

View File

@@ -0,0 +1,46 @@
#!/usr/bin/python3
# Copyright © 2020 Google LLC
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
# Tiny script to read bytes from serial, and write the output to stdout, with a
# buffer in between so we don't lose serial output from its buffer.
#
# We don't use 'cu' because it requires stdin to be hooked up and I never
# managed to make that work without getting blocked somewhere. We don't use
# 'conserver' because it's non-free.
import sys
import serial
import select
import os
import posix
dev=sys.argv[1]
ser = serial.Serial(dev, 115200, timeout=10)
while True:
bytes = ser.read()
sys.stdout.buffer.write(bytes)
sys.stdout.flush()
ser.close()

View File

@@ -0,0 +1,30 @@
#!/bin/bash
set -ex
# Need an unreleased version of Waffle for surfaceless support in apitrace
# Replace this build with the Debian package once that's possible
WAFFLE_VERSION="e3c995d9a2693b687501715b6550619922346089"
git clone https://gitlab.freedesktop.org/mesa/waffle.git --single-branch --no-checkout /waffle
pushd /waffle
git checkout "$WAFFLE_VERSION"
cmake -B_build -DCMAKE_INSTALL_LIBDIR=lib -DCMAKE_BUILD_TYPE=Release .
make -C _build -j4 install
popd
rm -rf /waffle
APITRACE_VERSION="9.0"
git clone https://github.com/apitrace/apitrace.git --single-branch --no-checkout /apitrace
pushd /apitrace
git checkout "$APITRACE_VERSION"
cmake -G Ninja -B_build -H. -DCMAKE_BUILD_TYPE=Release -DENABLE_GUI=False -DENABLE_WAFFLE=on -DWaffle_DIR=/usr/local/lib/cmake/Waffle/
ninja -C _build
mkdir build
cp _build/apitrace build
cp _build/glretrace build
cp _build/eglretrace build
strip build/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -2,9 +2,9 @@
set -ex
git clone https://gitlab.freedesktop.org/mesa/parallel-deqp-runner.git --depth 1 -b mesa-ci-2019-12-17
cd parallel-deqp-runner
git clone https://gitlab.freedesktop.org/mesa/parallel-deqp-runner.git --depth 1 -b mesa-ci-2019-12-17 /parallel-deqp-runner
pushd /parallel-deqp-runner
meson build/ $EXTRA_MESON_ARGS
ninja -C build -j4 install
cd ..
rm -rf parallel-deqp-runner
ninja -C build install
popd
rm -rf /parallel-deqp-runner

View File

@@ -1,14 +1,13 @@
#!/bin/bash
git config --global user.email "mesa@example.com"
git config --global user.name "Mesa CI"
# XXX: Use --depth 1 once we can drop the cherry-picks.
git clone \
--depth 1 \
https://github.com/KhronosGroup/VK-GL-CTS.git \
-b opengl-es-cts-3.2.5.1 \
-b opengl-es-cts-3.2.6.1 \
/VK-GL-CTS
pushd /VK-GL-CTS
# Fix surfaceless build
git cherry-pick -x 22f41e5e321c6dcd8569c4dad91bce89f06b3670
git cherry-pick -x 1daa8dff73161ea60ead965bd6c9f2a0a2165648
# surfaceless links against libkms and such despite not using it.
sed -i '/gbm/d' targets/surfaceless/surfaceless.cmake
@@ -38,7 +37,7 @@ ninja
mkdir /deqp/mustpass
for gles in gles2 gles3 gles31; do
cp \
/deqp/external/openglcts/modules/gl_cts/data/mustpass/gles/aosp_mustpass/3.2.5.x/$gles-master.txt \
/deqp/external/openglcts/modules/gl_cts/data/mustpass/gles/aosp_mustpass/3.2.6.x/$gles-master.txt \
/deqp/mustpass/$gles-master.txt
done

View File

@@ -1,8 +1,13 @@
git clone --depth 1 \
#!/bin/bash
set -ex
git clone \
--depth 1 \
https://github.com/KhronosGroup/VK-GL-CTS.git \
-b vulkan-cts-1.1.6.0 \
-b vulkan-cts-1.2.1.0 \
/VK-GL-CTS
cd /VK-GL-CTS
pushd /VK-GL-CTS
# --insecure is due to SSL cert failures hitting sourceforge for zlib and
# libpng (sigh). The archives get their checksums checked anyway, and git
@@ -10,12 +15,15 @@ cd /VK-GL-CTS
python3 external/fetch_sources.py --insecure
mkdir -p /deqp
cd /deqp
popd
pushd /deqp
cmake -G Ninja \
-DDEQP_TARGET=x11_glx \
-DCMAKE_BUILD_TYPE=Release \
/VK-GL-CTS
ninja -j4
ninja
# Copy out the mustpass list we want.
mkdir /deqp/mustpass
@@ -31,3 +39,4 @@ find -iname '*cmake*' -o -name '*ninja*' -o -name '*.o' -o -name '*.a' | xargs r
strip external/vulkancts/modules/vulkan/deqp-vk
du -sh *
rm -rf /VK-GL-CTS
popd

View File

@@ -0,0 +1,14 @@
#!/bin/bash
set -ex
git clone https://github.com/ValveSoftware/Fossilize.git
cd Fossilize
git checkout 6b5b570008c9ab5269e341f04c811fe49a1bb72c
git submodule update --init
mkdir build
cd build
cmake .. -DCMAKE_BUILD_TYPE=Release -G Ninja
ninja -C . install
cd ../..
rm -rf Fossilize

View File

@@ -0,0 +1,19 @@
#!/bin/bash
set -ex
# https://github.com/LunarG/gfxreconstruct/issues/328
GFXRECONSTRUCT_VERSION=b66cd392a84b226cb60ad9d4130ddeb58a1559cb
git clone https://github.com/LunarG/gfxreconstruct.git --single-branch --no-checkout /gfxreconstruct
pushd /gfxreconstruct
git checkout "$GFXRECONSTRUCT_VERSION"
git submodule update --init
git submodule update
cmake -G Ninja -B_build -H. -DCMAKE_BUILD_TYPE=Release
ninja -C _build gfxrecon-replay
mkdir -p build/bin
install _build/tools/replay/gfxrecon-replay build/bin
strip build/bin/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -7,7 +7,7 @@ pushd /piglit
git checkout 8771c3860505db2bcf4877216221d774bf90af6b
patch -p1 <$OLDPWD/.gitlab-ci/piglit/disable-vs_in.diff
cmake -G Ninja -DCMAKE_BUILD_TYPE=Release
ninja -j4
ninja
find -name .git -o -name '*ninja*' -o -iname '*cmake*' -o -name '*.[chao]' | xargs rm -rf
rm -rf target_api
popd

View File

@@ -0,0 +1,17 @@
#!/bin/bash
set -ex
RENDERDOC_VERSION=da02e88201dc3b64316fc33ce6ff69cc729689aa
git clone https://github.com/baldurk/renderdoc.git --single-branch --no-checkout /renderdoc
pushd /renderdoc
git checkout "$RENDERDOC_VERSION"
cmake -G Ninja -B_build -H. -DENABLE_QRENDERDOC=false -DCMAKE_BUILD_TYPE=Release
ninja -C _build
mkdir -p build/lib
cp _build/lib/renderdoc.so build/lib
cp _build/lib/librenderdoc.so build/lib
strip build/lib/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -0,0 +1,20 @@
#!/bin/bash
set -ex
mkdir -p /epoxy
pushd /epoxy
wget -qO- https://github.com/anholt/libepoxy/releases/download/1.5.4/libepoxy-1.5.4.tar.xz | tar -xJ --strip-components=1
meson build/ $EXTRA_MESON_ARGS
ninja -C build install
popd
rm -rf /epoxy
VIRGLRENDERER_VERSION=70b18e56d5c3ed69c561c36e098e8aea71ebffc2
git clone https://gitlab.freedesktop.org/virgl/virglrenderer.git --single-branch --no-checkout /virglrenderer
pushd /virglrenderer
git checkout "$VIRGLRENDERER_VERSION"
meson build/ $EXTRA_MESON_ARGS
ninja -C build install
popd
rm -rf /virglrenderer

View File

@@ -0,0 +1,29 @@
#!/bin/bash
set -ex
VULKANTOOLS_VERSION=1862c6a47b64cd09156205d7f7e6b3bfcea76390
git clone https://github.com/LunarG/VulkanTools.git --single-branch --no-checkout /VulkanTools
pushd /VulkanTools
git checkout "$VULKANTOOLS_VERSION"
./update_external_sources.sh
mkdir _build
./scripts/update_deps.py --dir=_build --config=release --generator=Ninja
cmake -G Ninja -B_build -H. \
-DCMAKE_BUILD_TYPE=Release \
-DCMAKE_INSTALL_PREFIX=/VulkanTools/build \
-DBUILD_TESTS=OFF \
-DBUILD_VLF=OFF \
-DBUILD_VKTRACE=OFF \
-DBUILD_VIA=OFF \
-DBUILD_VKTRACE_REPLAY=OFF \
-C_build/helper.cmake
ninja -C _build VkLayer_screenshot VkLayer_screenshot-staging-json
mkdir -p build/etc/vulkan/explicit_layer.d
mkdir build/lib
install _build/layersvt/staging-json/VkLayer_screenshot.json build/etc/vulkan/explicit_layer.d
install _build/layersvt/libVkLayer_screenshot.so build/lib
strip build/lib/*
find . -not -path './build' -not -path './build/*' -delete
popd

View File

@@ -10,6 +10,8 @@ echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources
dpkg --add-architecture armhf
apt-get update
apt-get -y install \
abootimg \
android-sdk-ext4-utils \
bc \
bison \
ccache \
@@ -17,6 +19,7 @@ apt-get -y install \
cpio \
crossbuild-essential-armhf \
debootstrap \
fastboot \
flex \
g++ \
gettext \
@@ -41,17 +44,22 @@ apt-get -y install \
meson \
pkg-config \
python \
python3-distutils \
python3-mako \
python3-serial \
unzip \
wget \
xz-utils \
zlib1g-dev
. .gitlab-ci/container/container_pre_build.sh
# dependencies where we want a specific version
export LIBDRM_VERSION=libdrm-2.4.100
wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
tar -xvf $LIBDRM_VERSION.tar.bz2 && rm $LIBDRM_VERSION.tar.bz2
cd $LIBDRM_VERSION; meson build -D vc4=true -D freedreno=true -D etnaviv=true; ninja -j4 -C build install; cd ..
cd $LIBDRM_VERSION; meson build -D vc4=true -D freedreno=true -D etnaviv=true; ninja -C build install; cd ..
rm -rf $LIBDRM_VERSION
############### Generate cross build file for Meson
@@ -69,6 +77,7 @@ DEBIAN_ARCH=arm64 . .gitlab-ci/container/lava_arm.sh
DEBIAN_ARCH=armhf . .gitlab-ci/container/lava_arm.sh
apt-get purge -y \
python3-distutils \
wget
apt-get autoremove -y --purge
. .gitlab-ci/container/container_post_build.sh

View File

@@ -10,6 +10,7 @@ echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources
apt-get update
apt-get -y install \
bzip2 \
ccache \
cmake \
g++ \
gcc \
@@ -30,10 +31,13 @@ apt-get -y install \
pkg-config \
procps \
python \
python3-distutils \
waffle-utils \
wget \
zlib1g
. .gitlab-ci/container/container_pre_build.sh
############### Build dEQP runner
. .gitlab-ci/build-cts-runner.sh
@@ -45,8 +49,11 @@ apt-get -y install \
############### Uninstall the build software
ccache --show-stats
apt-get purge -y \
bzip2 \
ccache \
cmake \
g++ \
gcc \
@@ -59,6 +66,7 @@ apt-get purge -y \
meson \
pkg-config \
python \
python3-distutils \
wget
apt-get autoremove -y --purge

View File

@@ -0,0 +1,5 @@
#!/bin/sh
apt-get autoremove -y --purge
ccache --show-stats

View File

@@ -0,0 +1,29 @@
#!/bin/sh
# Common setup among container builds before we get to building code.
export CCACHE_COMPILERCHECK=content
export CCACHE_COMPRESS=true
export CCACHE_DIR=/cache/mesa/ccache
export PATH=/usr/lib/ccache:$PATH
# CMake ignores $PATH, so we have to force CC/GCC to the ccache versions.
# Watch out, you can't have spaces in here because the renderdoc build fails.
export CC="/usr/lib/ccache/gcc"
export CXX="/usr/lib/ccache/g++"
ccache --show-stats
if uname -m | grep -q arm || uname -m | grep -q aarch64; then
export JFLAGS=-j8
else
export JFLAGS=-j4
fi
# Make a wrapper script for ninja to always include the -j flags
echo /usr/bin/ninja $JFLAGS '"$@"' > /usr/local/bin/ninja
chmod +x /usr/local/bin/ninja
# Set MAKEFLAGS so that all make invocations in container builds include the
# flags (doesn't apply to non-container builds, but we don't run make there)
export MAKEFLAGS=$JFLAGS

View File

@@ -7,7 +7,7 @@ if [[ "$DEBIAN_ARCH" = "arm64" ]]; then
GCC_ARCH="aarch64-linux-gnu"
KERNEL_ARCH="arm64"
DEFCONFIG="arch/arm64/configs/defconfig"
DEVICE_TREES="arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dtb arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dtb arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dtb arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dtb"
DEVICE_TREES="arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dtb arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dtb arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dtb arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dtb arch/arm64/boot/dts/qcom/apq8016-sbc.dtb"
KERNEL_IMAGE_NAME="Image"
else
GCC_ARCH="arm-linux-gnueabihf"
@@ -34,7 +34,7 @@ mv /deqp /lava-files/rootfs-${DEBIAN_ARCH}/.
############### Cross-build kernel
KERNEL_URL="https://gitlab.freedesktop.org/tomeu/linux/-/archive/v5.5-rc5-panfrost-fixes/linux-v5.5-rc5-panfrost-fixes.tar.gz"
KERNEL_URL="https://gitlab.freedesktop.org/tomeu/linux/-/archive/v5.5-panfrost-fixes/linux-v5.5-panfrost-fixes.tar.gz"
if [[ "$DEBIAN_ARCH" = "armhf" ]]; then
export ARCH=${KERNEL_ARCH}
@@ -45,7 +45,7 @@ mkdir -p kernel
wget -qO- ${KERNEL_URL} | tar -xz --strip-components=1 -C kernel
pushd kernel
./scripts/kconfig/merge_config.sh ${DEFCONFIG} ../.gitlab-ci/${KERNEL_ARCH}.config
make -j12 ${KERNEL_IMAGE_NAME} dtbs
make ${KERNEL_IMAGE_NAME} dtbs
cp arch/${KERNEL_ARCH}/boot/${KERNEL_IMAGE_NAME} /lava-files/.
cp ${DEVICE_TREES} /lava-files/.
popd
@@ -54,10 +54,45 @@ rm -rf kernel
############### Create rootfs
set +e
debootstrap --variant=minbase --arch=${DEBIAN_ARCH} testing /lava-files/rootfs-${DEBIAN_ARCH}/ http://deb.debian.org/debian
debootstrap \
--variant=minbase \
--arch=${DEBIAN_ARCH} \
--components main,contrib,non-free \
testing \
/lava-files/rootfs-${DEBIAN_ARCH}/ \
http://deb.debian.org/debian
cat /lava-files/rootfs-${DEBIAN_ARCH}/debootstrap/debootstrap.log
set -e
cp .gitlab-ci/create-rootfs.sh /lava-files/rootfs-${DEBIAN_ARCH}/.
chroot /lava-files/rootfs-${DEBIAN_ARCH} sh /create-rootfs.sh
rm /lava-files/rootfs-${DEBIAN_ARCH}/create-rootfs.sh
if [ ${DEBIAN_ARCH} = arm64 ]; then
# Pull down a specific build of qcomlt/release/qcomlt-5.4 8c79b3d12355
# ("Merge tag 'v5.4.23' into release/qcomlt-5.4"), where I used the
# .config from
# http://snapshots.linaro.org/96boards/dragonboard820c/linaro/debian/457/config-5.4.0-qcomlt-arm64
# with the following merged in:
#
# CONFIG_DRM=y
# CONFIG_DRM_MSM=y
# CONFIG_ATL1C=y
#
# Reason: 5.5 has a big stack of oopses and warns on db820c. 4.14-5.4
# linaro kernel binaries (see above .config link) have these as modules
# and distributed the modules only in the debian system, not the initrd,
# so they're very hard to extract (involving simg2img and loopback
# mounting). 4.11 is missing d72fea538fe6 ("drm/msm: Fix the check for
# the command size") so it can't actually run fredreno. qcomlt-4.14 is
# unstable at boot (~10% instaboot rate). The 5.4 qcomlt kernel with msm
# built in seems like the easiest way to go.
wget https://people.freedesktop.org/~anholt/qcomlt-5.4-msm-build/Image.gz -O Image.gz \
-O /lava-files/db820c-kernel
wget https://people.freedesktop.org/~anholt/qcomlt-5.4-msm-build/apq8096-db820c.dtb \
-O /lava-files/db820c.dtb
# Make a gzipped copy of the Image for db410c.
gzip -k /lava-files/Image
fi

View File

@@ -0,0 +1,20 @@
-----BEGIN PGP PUBLIC KEY BLOCK-----
Version: GnuPG v2.0.15 (GNU/Linux)
mQENBFu8fWQBCADM64J7qlcnI2KwxSKSdyaOi7hz44EUXDpC3+3hfFP8k28SgV3U
4a/ydOdd2cDSne5w+yjrnJWYuS0sTiE7vQPtKfmCmQZfCStvoRe5Pt+AOy1GA/iu
U5wHIZD+/A9CeQcu5L3PkVkmijz0LmSCq7HnnVB0SdFA5eFlV98H875EasvpJ3xU
ziI3yvqdZ5/0LgKzOiFjk4rMXQS01a1dNpwFO7EXiq921ZjnXatdnsDQ/NAj7z8P
3qnTAj6yvl7DtdlXXA2hiznEOZNCRLZ69vHq0hGIw+OKjpsUkCZK29AnY4wJxxzY
frjknVW7tyZ6Hxwz6R4vaVlZ6h5WR/OiAdqlABEBAAG0NEVtdWxhdG9ycyBPQlMg
UHJvamVjdCA8RW11bGF0b3JzQGJ1aWxkLm9wZW5zdXNlLm9yZz6JAT4EEwEIACgF
Alu8fWQCGwMFCQQesAAGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJEN+hdadR
BJYOXVoH/Rd0dRx4SUx7KVjTrDfSuf6jXseyenkl4aQnp46n0MttatkoCdGVvyrq
VWvGfO3MI122MnFKqia7Hep1HlcYGe2a5tW/w1SGGEy+VZduxcZCMmVuSnl+3ioG
2fRGx3uoNBEGQIbZ5VVlABUJC+c/Vq1m6kT9Edz4XWRPHW1Nwjjfn79618ebGZMc
R0fUM9L3GZw9V/kAK8kXmIL7rkglfewTbs6fByqAix79MjsNURAuCeIc5OmbxL4j
LxuoNhnxxucB7YGBhCa9ZL8LYEIbdeyaJmgdHDoUQjz4peXibz5v+Er8mGOwuSLl
y1U21T3huNf9Osjw52nxVcDmugBWqQKIRgQTEQIABgUCW7x9ZAAKCRA7MBG3a51l
IwayAJ9dHmDag9nFY9GujfMr+foKquFS9wCfQlvp6Sz0N5aKdW00NGnZZ/EKHIQ=
=uZyA
-----END PGP PUBLIC KEY BLOCK-----

View File

@@ -5,7 +5,7 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
CROSS_ARCHITECTURES="i386"
CROSS_ARCHITECTURES="i386 ppc64el s390x"
for arch in $CROSS_ARCHITECTURES; do
dpkg --add-architecture $arch
done
@@ -20,18 +20,23 @@ apt-get install -y \
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
echo "deb https://apt.llvm.org/buster/ llvm-toolchain-buster-9 main" >/etc/apt/sources.list.d/llvm9.list
# Upstream Wine (WineHQ) package repository. We use the OBS service
# instead of the repository at the winehq.org domain because:
#
# " The WineHQ packages for Debian 10 and later require libfaudio0
# as a dependency. Since the distro does not provide it for Debian
# 10, users of that version can download libfaudio0 packages from
# the OBS. See https://forum.winehq.org/viewtopic.php?f=8&t=32192
# for details."
#
# As explained at https://wiki.winehq.org/Debian
apt-key add .gitlab-ci/container/obs-emulators-wine-debian.gpg.key
echo 'deb https://download.opensuse.org/repositories/Emulators:/Wine:/Debian/Debian_10/ ./' >/etc/apt/sources.list.d/obs-emulators-wine-debian.list
sed -i -e 's/http:\/\/deb/https:\/\/deb/g' /etc/apt/sources.list
echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources.list.d/backports.list
apt-get update
# Use newer packages from backports by default
cat >/etc/apt/preferences <<EOF
Package: *
Pin: release a=buster-backports
Pin-Priority: 500
EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
@@ -39,6 +44,7 @@ apt-get install -y --no-remove \
automake \
autotools-dev \
bison \
ccache \
clang-9 \
cmake \
flex \
@@ -63,10 +69,12 @@ apt-get install -y --no-remove \
libva-dev \
libvdpau-dev \
libvulkan-dev \
libvulkan-dev:ppc64el \
libx11-dev \
libx11-xcb-dev \
libxdamage-dev \
libxext-dev \
libxml2-utils \
libxrandr-dev \
libxrender-dev \
libxshmfence-dev \
@@ -74,12 +82,14 @@ apt-get install -y --no-remove \
libxxf86vm-dev \
llvm-6.0-dev \
llvm-7-dev \
llvm-8-dev \
llvm-9-dev \
meson \
pkg-config \
python-mako \
python3-mako \
python3-pil \
python3-requests \
qemu-user \
scons \
x11proto-dri2-dev \
x11proto-gl-dev \
@@ -87,22 +97,41 @@ apt-get install -y --no-remove \
xz-utils \
zlib1g-dev
. .gitlab-ci/container/container_pre_build.sh
# Cross-build Mesa deps
for arch in $CROSS_ARCHITECTURES; do
apt-get install -y --no-remove \
crossbuild-essential-${arch} \
libdrm-dev:${arch} \
libelf-dev:${arch} \
libexpat1-dev:${arch}
libexpat1-dev:${arch} \
libffi-dev:${arch} \
libllvm8:${arch} \
libstdc++6:${arch} \
libtinfo-dev:${arch}
if [ "$arch" == "i386" ]; then
# libpciaccess-dev is only needed for Intel.
apt-get install -y --no-remove \
libpciaccess-dev:${arch}
fi
mkdir /var/cache/apt/archives/${arch}
# Download llvm-* packages, but don't install them yet, since they can
# only be installed for one architecture at a time
apt-get install -o Dir::Cache::archives=/var/cache/apt/archives/$arch --download-only -y --no-remove \
llvm-8-dev:${arch}
done
apt-get install -y --no-remove \
llvm-8-dev \
# for 64bit windows cross-builds
apt-get install -y --no-remove \
libz-mingw-w64-dev \
mingw-w64 \
wine \
wine32 \
wine64
libz-mingw-w64-dev \
mingw-w64 \
winehq-stable
# Debian's pkg-config wrapers for mingw are broken, and there's no sign that
# they're going to be fixed, so we'll just have to fix it ourselves
@@ -114,6 +143,23 @@ PKG_CONFIG_LIBDIR=/usr/x86_64-w64-mingw32/lib/pkgconfig pkg-config \$@
EOF
chmod +x /usr/local/bin/x86_64-w64-mingw32-pkg-config
# Generate cross build files for Meson
for arch in $CROSS_ARCHITECTURES; do
cross_file="/cross_file-$arch.txt"
/usr/share/meson/debcrossgen --arch "$arch" -o "$cross_file"
# Explicitly set ccache path for cross compilers
sed -i "s|/usr/bin/\([^-]*\)-linux-gnu\([^-]*\)-g|/usr/lib/ccache/\\1-linux-gnu\\2-g|g" "$cross_file"
if [ "$arch" = "i386" ]; then
# Work around a bug in debcrossgen that should be fixed in the next release
sed -i "s|cpu_family = 'i686'|cpu_family = 'x86'|g" "$cross_file"
fi
# Rely on qemu-user being configured in binfmt_misc on the host
sed -i -e '/\[properties\]/a\' -e "needs_exe_wrapper = False" "$cross_file"
done
# for the vulkan overlay layer
wget https://github.com/KhronosGroup/glslang/releases/download/master-tot/glslang-master-linux-Release.zip
unzip glslang-master-linux-Release.zip bin/glslangValidator
@@ -150,7 +196,11 @@ rm -rf $LIBXCB_VERSION
wget https://dri.freedesktop.org/libdrm/$LIBDRM_VERSION.tar.bz2
tar -xvf $LIBDRM_VERSION.tar.bz2 && rm $LIBDRM_VERSION.tar.bz2
cd $LIBDRM_VERSION; meson build -D vc4=true -D freedreno=true -D etnaviv=true; ninja -j4 -C build install; cd ..
cd $LIBDRM_VERSION
meson build -D vc4=true -D freedreno=true -D etnaviv=true -D libdir=lib/x86_64-linux-gnu; ninja -C build install
rm -rf build; meson --cross-file=/cross_file-ppc64el.txt build -D libdir=lib/powerpc64le-linux-gnu; ninja -C build install
rm -rf build; meson --cross-file=/cross_file-i386.txt build -D libdir=lib/i386-linux-gnu; ninja -C build install
cd ..
rm -rf $LIBDRM_VERSION
wget $WAYLAND_RELEASES/$LIBWAYLAND_VERSION.tar.xz
@@ -181,27 +231,6 @@ cd shader-db
make
popd
# Use ccache to speed up builds
apt-get install -y --no-remove ccache
# We need xmllint to validate the XML files in Mesa
apt-get install -y --no-remove libxml2-utils
# Generate cross build files for Meson
for arch in $CROSS_ARCHITECTURES; do
cross_file="/cross_file-$arch.txt"
/usr/share/meson/debcrossgen --arch "$arch" -o "$cross_file"
# Explicitly set ccache path for cross compilers
sed -i "s|/usr/bin/\([^-]*\)-linux-gnu\([^-]*\)-g|/usr/lib/ccache/\\1-linux-gnu\\2-g|g" "$cross_file"
if [ "$arch" = "i386" ]; then
# Work around a bug in debcrossgen that should be fixed in the next release
sed -i "s|cpu_family = 'i686'|cpu_family = 'x86'|g" "$cross_file"
# Don't need wrapper for i386 executables
sed -i -e '/\[properties\]/a\' -e "needs_exe_wrapper = False" "$cross_file"
fi
done
############### Uninstall the build software
@@ -217,4 +246,4 @@ apt-get purge -y \
unzip \
wget
apt-get autoremove -y --purge
. .gitlab-ci/container/container_post_build.sh

View File

@@ -24,36 +24,37 @@ EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
llvm-3.9-dev \
libclang-3.9-dev \
llvm-4.0-dev \
libclang-4.0-dev \
llvm-5.0-dev \
libclang-5.0-dev \
g++ \
bison \
bzip2 \
ccache \
zlib1g-dev \
pkg-config \
flex \
g++ \
gcc \
gettext \
git \
libepoxy-dev \
libclang-3.9-dev \
libclang-4.0-dev \
libclang-5.0-dev \
libclc-dev \
xz-utils \
libdrm-dev \
libexpat1-dev \
libelf-dev \
libunwind-dev \
libepoxy-dev \
libexpat1-dev \
libpng-dev \
libunwind-dev \
llvm-3.9-dev \
llvm-4.0-dev \
llvm-5.0-dev \
meson \
pkg-config \
python-mako \
python3-mako \
bison \
flex \
gettext \
scons \
meson
xz-utils \
zlib1g-dev
. .gitlab-ci/container/container_pre_build.sh
############### Uninstall unused packages
apt-get autoremove -y --purge
. .gitlab-ci/container/container_post_build.sh

View File

@@ -6,8 +6,8 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y \
ca-certificates \
gnupg \
ca-certificates \
gnupg
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
@@ -28,37 +28,61 @@ EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
autoconf \
automake \
ccache \
cmake \
g++ \
git \
gcc \
git \
libexpat1 \
libgbm-dev \
libgles2-mesa-dev \
libpng16-16 \
libllvm9 \
libpcre3-dev \
libpcre32-3 \
libpng-dev \
libvulkan1 \
libpng16-16 \
libpython3.7 \
libvulkan-dev \
libvulkan1 \
libwaffle-dev \
libwayland-server0 \
libxcb-keysyms1 \
libxcb-keysyms1-dev \
libxcb-xfixes0 \
libxkbcommon0 \
libxkbcommon-dev \
libxrender1 \
libxkbcommon0 \
libxrender-dev \
libllvm9 \
libxrender1 \
make \
meson \
patch \
pkg-config \
python \
python3-distutils \
python3-mako \
python3-numpy \
python3-pil \
python3-requests \
python3-six \
python \
python3-yaml \
python3.7 \
python3.7-dev \
qt5-default \
qt5-qmake \
waffle-utils \
wget \
xauth \
xvfb \
xz-utils \
zlib1g
. .gitlab-ci/container/container_pre_build.sh
############### Build virglrenderer
. .gitlab-ci/build-virglrenderer.sh
############### Build piglit
@@ -72,25 +96,42 @@ apt-get install -y --no-remove \
. .gitlab-ci/build-deqp-gl.sh
############### Build apitrace
. .gitlab-ci/build-apitrace.sh
############### Build renderdoc
. .gitlab-ci/build-renderdoc.sh
############### Uninstall the build software
ccache --show-stats
apt-get purge -y \
autoconf \
automake \
ccache \
cmake \
g++ \
gcc \
git \
gnupg \
libc6-dev \
libgbm-dev \
libgles2-mesa-dev \
libpcre3-dev \
libpng-dev \
libwaffle-dev \
libxcb-keysyms1-dev \
libxkbcommon-dev \
libxrender-dev \
make \
meson \
patch \
pkg-config \
python
python3-distutils \
python3.7-dev \
wget \
xz-utils
apt-get autoremove -y --purge

View File

@@ -6,8 +6,8 @@ set -o xtrace
export DEBIAN_FRONTEND=noninteractive
apt-get install -y \
ca-certificates \
gnupg \
ca-certificates \
gnupg
# Upstream LLVM package repository
apt-key add .gitlab-ci/container/llvm-snapshot.gpg.key
@@ -18,70 +18,165 @@ echo 'deb https://deb.debian.org/debian buster-backports main' >/etc/apt/sources
apt-get update
# Use newer packages from backports by default
cat >/etc/apt/preferences <<EOF
Package: *
Pin: release a=buster-backports
Pin-Priority: 500
EOF
apt-get dist-upgrade -y
apt-get install -y --no-remove \
ccache \
cmake \
g++ \
git \
gcc \
git \
git-lfs \
libexpat1 \
libgbm-dev \
libgles2-mesa-dev \
libpng16-16 \
libllvm9 \
liblz4-1 \
liblz4-dev \
libpng-dev \
libvulkan1 \
libpng16-16 \
libvulkan-dev \
libvulkan1 \
libwayland-client0 \
libwayland-server0 \
libxcb-ewmh-dev \
libxcb-ewmh2 \
libxcb-keysyms1 \
libxcb-keysyms1-dev \
libxcb-randr0 \
libxcb-xfixes0 \
libxkbcommon0 \
libxkbcommon-dev \
libxrender1 \
libxkbcommon0 \
libxrandr-dev \
libxrandr2 \
libxrender-dev \
libllvm9 \
libxrender1 \
meson \
patch \
p7zip \
pkg-config \
python3-distutils \
python \
python3-distutils \
python3-pil \
python3-requests \
python3-yaml \
vulkan-tools \
wget \
xauth \
xvfb
# We need multiarch for Wine
dpkg --add-architecture i386
apt-get update
apt-get install -y --no-remove \
wine \
wine32 \
wine64
############### Set up Wine env variables
export WINEDEBUG="-all"
export WINEPREFIX="/dxvk-wine64"
############### Install DXVK
DXVK_VERSION="1.6"
# We don't want crash dialogs
cat >crashdialog.reg <<EOF
Windows Registry Editor Version 5.00
[HKEY_CURRENT_USER\Software\Wine\WineDbg]
"ShowCrashDialog"=dword:00000000
EOF
# Set the wine prefix and disable the crash dialog
wine regedit crashdialog.reg
rm crashdialog.reg
# DXVK's setup often fails with:
# "${WINEPREFIX}: Not a valid wine prefix."
# and that is just spit because of checking the existance of the
# system.reg file, which fails.
# Just giving it a bit more of time for it to be created solves the
# problem ...
test -f "${WINEPREFIX}/system.reg" || sleep 2
wget "https://github.com/doitsujin/dxvk/releases/download/v${DXVK_VERSION}/dxvk-${DXVK_VERSION}.tar.gz"
tar xzpf dxvk-"${DXVK_VERSION}".tar.gz
dxvk-"${DXVK_VERSION}"/setup_dxvk.sh install
rm -rf dxvk-"${DXVK_VERSION}"
rm dxvk-"${DXVK_VERSION}".tar.gz
############### Install Windows' apitrace binaries
APITRACE_VERSION="9.0"
APITRACE_VERSION_DATE="20191126"
wget "https://github.com/apitrace/apitrace/releases/download/${APITRACE_VERSION}/apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64.7z"
7zr x "apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64.7z" \
"apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64/bin/apitrace.exe" \
"apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64/bin/d3dretrace.exe"
mv "apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64" /apitrace-msvc-win64
rm "apitrace-${APITRACE_VERSION}.${APITRACE_VERSION_DATE}-win64.7z"
# Add the apitrace path to the registry
wine \
reg add "HKEY_LOCAL_MACHINE\System\CurrentControlSet\Control\Session Manager\Environment" \
/v Path \
/t REG_EXPAND_SZ \
/d "C:\windows\system32;C:\windows;C:\windows\system32\wbem;Z:\apitrace-msvc-win64\bin" \
/f
############### Building ...
. .gitlab-ci/container/container_pre_build.sh
############### Build dEQP runner
. .gitlab-ci/build-cts-runner.sh
############### Build Fossilize
. .gitlab-ci/build-fossilize.sh
############### Build dEQP VK
. .gitlab-ci/build-deqp-vk.sh
############### Build gfxreconstruct
. .gitlab-ci/build-gfxreconstruct.sh
############### Build VulkanTools
. .gitlab-ci/build-vulkantools.sh
############### Uninstall the build software
ccache --show-stats
apt-get purge -y \
ccache \
cmake \
g++ \
gcc \
git \
gnupg \
libgbm-dev \
libgles2-mesa-dev \
liblz4-dev \
libpng-dev \
libvulkan-dev \
libxcb-ewmh-dev \
libxcb-keysyms1-dev \
libxkbcommon-dev \
libxrandr-dev \
libxrender-dev \
meson \
patch \
p7zip \
pkg-config \
python
wget
apt-get autoremove -y --purge

View File

@@ -2,14 +2,8 @@
set -ex
LLVM=libllvm8
# LLVMPipe on armhf is broken with LLVM 8
if [ `dpkg --print-architecture` = "armhf" ]; then
LLVM=libllvm7
fi
apt-get -y install --no-install-recommends \
ca-certificates \
initramfs-tools \
libpng16-16 \
strace \
@@ -17,15 +11,33 @@ apt-get -y install --no-install-recommends \
libexpat1 \
libdrm2 \
libdrm-nouveau2 \
$LLVM
firmware-qcom-media \
wget \
xz-utils
passwd root -d
chsh -s /bin/sh
ln -s /bin/sh /init
cat > /init <<EOF
#!/bin/sh
export PS1=lava-shell:
exec sh
EOF
chmod +x /init
mkdir -p /lib/firmware/rtl_nic
wget https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/rtl_nic/rtl8153a-3.fw -O /lib/firmware/rtl_nic/rtl8153a-3.fw
#######################################################################
# Strip the image to a small minimal system without removing the debian
# toolchain.
# xz compress firmware so it doesn't waste RAM at runtime. Except db820c's
# GPU firmware, due to using a precompiled kernel without compression support.
find /lib/firmware -type f -print0 | \
grep -vz a530 | \
xargs -0r -P4 -n4 xz -T1 -C crc32
ln -s /lib/firmware/qcom/a530* /lib/firmware/
# Copy timezone file and remove tzdata package
rm -rf /etc/localtime
cp /usr/share/zoneinfo/Etc/UTC /etc/localtime
@@ -93,10 +105,10 @@ UNNEEDED_PACKAGES="apt libapt-pkg5.0 "\
"init-system-helpers "\
"bash "\
"cpio "\
"xz-utils "\
"passwd "\
"libsemanage1 libsemanage-common "\
"libsepol1 "\
"gzip "\
"gpgv "\
"hostname "\
"adduser "\
@@ -191,5 +203,3 @@ rm usr/lib/*/libdb-5.3.so
# remove NSS support for nis, nisplus and hesiod
rm usr/lib/*/libnss_hesiod*
rm usr/lib/*/libnss_nis*
rm bin/tar

View File

@@ -0,0 +1,4 @@
lp_test_arit
roundeven
u_format_test
u_half_test

View File

@@ -0,0 +1,4 @@
lp_test_arit
lp_test_format
lp_test_printf
u_format_test

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,23 @@
# Note: skips lists for CI are just a list of lines that, when
# non-zero-length and not starting with '#', will regex match to
# delete lines from the test list. Be careful.
# Skip the perf/stress tests to keep runtime manageable
dEQP-GLES[0-9]*.performance.*
dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*
# Flaky results
dEQP-GLES3.functional.occlusion_query.stencil_write
dEQP-GLES3.functional.rasterization.fbo.rbo_.*
dEQP-GLES3.functional.rasterization.fbo.texture_2d.interpolation.triangles
dEQP-GLES3.functional.rasterization.fbo.texture_2d.primitives.points
dEQP-GLES3.functional.rasterization.flatshading.lines_wide
dEQP-GLES3.functional.rasterization.flatshading.triangles
dEQP-GLES3.functional.shaders.linkage.varying.interpolation.centroid
dEQP-GLES3.functional.shaders.texture_functions.texturegradoffset.*
dEQP-GLES3.functional.shaders.texture_functions.textureprojgradoffset.*
dEQP-GLES3.functional.texture.units.4_units.only_3d.*
dEQP-GLES3.functional.vertex_arrays.single_attribute.*

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,17 @@
# Note: skips lists for CI are just a list of lines that, when
# non-zero-length and not starting with '#', will regex match to
# delete lines from the test list. Be careful.
# Skip the perf/stress tests to keep runtime manageable
dEQP-GLES[0-9]*.performance.*
dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*
# unstable results (probably related to the iommu faults).
dEQP-GLES3.functional.texture.filtering.3d.*
dEQP-GLES3.functional.texture.vertex.3d.filtering.*
dEQP-GLES3.functional.fbo.invalidate.sub.unbind_blit_msaa_stencil
dEQP-GLES3.functional.fbo.invalidate.whole.unbind_blit_msaa_stencil
dEQP-GLES31.functional.ubo.2_level_struct_array.single_buffer.packed_instance_array_fragment

View File

@@ -0,0 +1,96 @@
dEQP-GLES31.functional.blend_equation_advanced.barrier.colorburn
dEQP-GLES31.functional.blend_equation_advanced.barrier.colordodge
dEQP-GLES31.functional.blend_equation_advanced.barrier.darken
dEQP-GLES31.functional.blend_equation_advanced.barrier.difference
dEQP-GLES31.functional.blend_equation_advanced.barrier.exclusion
dEQP-GLES31.functional.blend_equation_advanced.barrier.hardlight
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.barrier.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.barrier.lighten
dEQP-GLES31.functional.blend_equation_advanced.barrier.multiply
dEQP-GLES31.functional.blend_equation_advanced.barrier.overlay
dEQP-GLES31.functional.blend_equation_advanced.barrier.screen
dEQP-GLES31.functional.blend_equation_advanced.barrier.softlight
dEQP-GLES31.functional.blend_equation_advanced.basic.colorburn
dEQP-GLES31.functional.blend_equation_advanced.basic.colordodge
dEQP-GLES31.functional.blend_equation_advanced.basic.darken
dEQP-GLES31.functional.blend_equation_advanced.basic.difference
dEQP-GLES31.functional.blend_equation_advanced.basic.exclusion
dEQP-GLES31.functional.blend_equation_advanced.basic.hardlight
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.basic.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.basic.lighten
dEQP-GLES31.functional.blend_equation_advanced.basic.multiply
dEQP-GLES31.functional.blend_equation_advanced.basic.overlay
dEQP-GLES31.functional.blend_equation_advanced.basic.screen
dEQP-GLES31.functional.blend_equation_advanced.basic.softlight
dEQP-GLES31.functional.blend_equation_advanced.msaa.colorburn
dEQP-GLES31.functional.blend_equation_advanced.msaa.colordodge
dEQP-GLES31.functional.blend_equation_advanced.msaa.darken
dEQP-GLES31.functional.blend_equation_advanced.msaa.difference
dEQP-GLES31.functional.blend_equation_advanced.msaa.exclusion
dEQP-GLES31.functional.blend_equation_advanced.msaa.hardlight
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.msaa.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.msaa.lighten
dEQP-GLES31.functional.blend_equation_advanced.msaa.multiply
dEQP-GLES31.functional.blend_equation_advanced.msaa.overlay
dEQP-GLES31.functional.blend_equation_advanced.msaa.screen
dEQP-GLES31.functional.blend_equation_advanced.msaa.softlight
dEQP-GLES31.functional.blend_equation_advanced.srgb.colorburn
dEQP-GLES31.functional.blend_equation_advanced.srgb.colordodge
dEQP-GLES31.functional.blend_equation_advanced.srgb.darken
dEQP-GLES31.functional.blend_equation_advanced.srgb.difference
dEQP-GLES31.functional.blend_equation_advanced.srgb.exclusion
dEQP-GLES31.functional.blend_equation_advanced.srgb.hardlight
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_color
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_hue
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_luminosity
dEQP-GLES31.functional.blend_equation_advanced.srgb.hsl_saturation
dEQP-GLES31.functional.blend_equation_advanced.srgb.lighten
dEQP-GLES31.functional.blend_equation_advanced.srgb.multiply
dEQP-GLES31.functional.blend_equation_advanced.srgb.overlay
dEQP-GLES31.functional.blend_equation_advanced.srgb.screen
dEQP-GLES31.functional.blend_equation_advanced.srgb.softlight
dEQP-GLES31.functional.compute.basic.shared_var_single_group
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_common.common_advanced_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_common.common_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_common.common_separate_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_advanced_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_separate_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_separate_blend_eq_buffer_blend_eq
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.11
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.15
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.17
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.18
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.2
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.3
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.6
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.7
dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.19
dEQP-GLES31.functional.draw_buffers_indexed.random.max_required_draw_buffers.3
dEQP-GLES31.functional.image_load_store.early_fragment_tests.early_fragment_tests_depth_fbo
dEQP-GLES31.functional.ssbo.layout.3_level_array.std140.column_major_mat4x2
dEQP-GLES31.functional.ssbo.layout.3_level_unsized_array.std430.mat3
dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.6
dEQP-GLES31.functional.ssbo.layout.unsized_struct_array.per_block_buffer.shared_instance_array
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw
dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_draw
dEQP-GLES31.functional.tessellation.invariance.inner_triangle_set.quads_fractional_even_spacing
dEQP-GLES31.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_cw
dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_depth_2d_array
dEQP-GLES31.functional.texture.multisample.samples_2.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_2.use_texture_depth_2d_array
dEQP-GLES31.functional.texture.multisample.samples_3.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_3.use_texture_depth_2d_array
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_depth_2d
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_depth_2d_array

View File

@@ -1,3 +1,4 @@
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
dEQP-GLES2.functional.clip_control.depth_mode_zero_to_one
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw

View File

@@ -0,0 +1,18 @@
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.11
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.16
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.21
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.31
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.6
dEQP-GLES31.functional.ubo.random.all_shared_buffer.12
dEQP-GLES31.functional.ubo.random.all_shared_buffer.17
dEQP-GLES31.functional.ubo.random.all_shared_buffer.2
dEQP-GLES31.functional.ubo.random.all_shared_buffer.27
dEQP-GLES31.functional.ubo.random.all_shared_buffer.37
dEQP-GLES31.functional.ubo.random.all_shared_buffer.47
dEQP-GLES31.functional.ubo.random.basic_type_arrays.1
dEQP-GLES31.functional.ubo.random.basic_type_arrays.11
dEQP-GLES31.functional.ubo.random.basic_type_arrays.16
dEQP-GLES31.functional.ubo.random.basic_type_arrays.21
dEQP-GLES31.functional.ubo.random.basic_type_arrays.6

View File

@@ -18,4 +18,46 @@ dEQP-GLES31.functional.primitive_bounding_box.*
# Intermittent timeout
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.48
# Flakes reported more than once during Jan-Feb 2020
dEQP-GLES31.functional.layout_binding.ssbo.fragment_binding_array
dEQP-GLES3.functional.fragment_out.random.0
dEQP-GLES3.functional.fragment_out.random.1
dEQP-GLES3.functional.fragment_out.random.12
dEQP-GLES3.functional.fragment_out.random.13
dEQP-GLES3.functional.fragment_out.random.17
dEQP-GLES3.functional.fragment_out.random.24
dEQP-GLES3.functional.fragment_out.random.27
dEQP-GLES3.functional.fragment_out.random.28
dEQP-GLES3.functional.fragment_out.random.32
dEQP-GLES3.functional.fragment_out.random.34
dEQP-GLES3.functional.fragment_out.random.35
dEQP-GLES3.functional.fragment_out.random.36
dEQP-GLES3.functional.fragment_out.random.40
dEQP-GLES3.functional.fragment_out.random.44
dEQP-GLES3.functional.fragment_out.random.47
dEQP-GLES3.functional.fragment_out.random.5
dEQP-GLES3.functional.fragment_out.random.50
dEQP-GLES3.functional.fragment_out.random.51
dEQP-GLES3.functional.fragment_out.random.55
dEQP-GLES3.functional.fragment_out.random.58
dEQP-GLES3.functional.fragment_out.random.59
dEQP-GLES3.functional.fragment_out.random.61
dEQP-GLES3.functional.fragment_out.random.63
dEQP-GLES3.functional.fragment_out.random.66
dEQP-GLES3.functional.fragment_out.random.67
dEQP-GLES3.functional.fragment_out.random.69
dEQP-GLES3.functional.fragment_out.random.70
dEQP-GLES3.functional.fragment_out.random.71
dEQP-GLES3.functional.fragment_out.random.80
dEQP-GLES3.functional.fragment_out.random.82
dEQP-GLES3.functional.fragment_out.random.86
dEQP-GLES3.functional.fragment_out.random.88
dEQP-GLES3.functional.fragment_out.random.91
dEQP-GLES3.functional.fragment_out.random.93
dEQP-GLES3.functional.fragment_out.random.95
dEQP-GLES3.functional.fragment_out.random.96
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.triangles.highp_mat2x3
dEQP-GLES3.functional.transform_feedback.array_element.interleaved.triangles.lowp_mat2x4
dEQP-GLES3.functional.transform_feedback.array_element.separate.triangles.lowp_mat2x4

View File

@@ -4,32 +4,6 @@ dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_neg_x_neg_y_pos_z_a
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_neg_x_pos_y_pos_z_and_pos_x_neg_y_neg_z
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_pos_x_neg_y_pos_z_and_neg_x_pos_y_neg_z
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_pos_x_pos_y_pos_z_and_neg_x_neg_y_neg_z
dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb565_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgb5_a1_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_stencil_index8
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb565_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgb5_a1_depth_component16
dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
@@ -61,116 +35,9 @@ dEQP-GLES2.functional.fragment_ops.depth_stencil.random.7
dEQP-GLES2.functional.fragment_ops.depth_stencil.random.8
dEQP-GLES2.functional.fragment_ops.depth_stencil.random.9
dEQP-GLES2.functional.fragment_ops.depth_stencil.write_mask.stencil
dEQP-GLES2.functional.shaders.algorithm.hsl_to_rgb_vertex
dEQP-GLES2.functional.shaders.functions.array_arguments.global_in_int_vertex
dEQP-GLES2.functional.shaders.functions.array_arguments.local_in_int_vertex
dEQP-GLES2.functional.shaders.functions.datatypes.int_int_vertex
dEQP-GLES2.functional.shaders.functions.overloading.builtin_sin_vertex
dEQP-GLES2.functional.shaders.functions.overloading.builtin_step_vertex
dEQP-GLES2.functional.shaders.functions.overloading.user_func_arg_int_types_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.inout_highp_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.inout_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.inout_lowp_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.out_highp_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.out_int_vertex
dEQP-GLES2.functional.shaders.functions.qualifiers.out_lowp_int_vertex
dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat3_dynamic_loop_write_static_loop_read_vertex
dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat3_dynamic_loop_write_static_read_vertex
dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat3_dynamic_write_dynamic_loop_read_vertex
dEQP-GLES2.functional.shaders.loops.do_while_constant_iterations.conditional_body_vertex
dEQP-GLES2.functional.shaders.loops.do_while_dynamic_iterations.vector_counter_fragment
dEQP-GLES2.functional.shaders.loops.do_while_uniform_iterations.conditional_body_vertex
dEQP-GLES2.functional.shaders.loops.do_while_uniform_iterations.nested_tricky_dataflow_2_vertex
dEQP-GLES2.functional.shaders.loops.for_dynamic_iterations.vector_counter_fragment
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.compound_statement_vertex
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.sequence_statement_vertex
dEQP-GLES2.functional.shaders.loops.while_dynamic_iterations.nested_sequence_vertex
dEQP-GLES2.functional.shaders.loops.while_dynamic_iterations.vector_counter_fragment
dEQP-GLES2.functional.shaders.loops.while_uniform_iterations.nested_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_effect.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub_assign_result.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec2_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec3_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec4_int_vertex
dEQP-GLES2.functional.shaders.operator.binary_operator.sub.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_int_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.highp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_int_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.lowp_ivec4_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_int_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_ivec2_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_ivec3_vertex
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.mediump_ivec4_vertex
dEQP-GLES2.functional.shaders.random.all_features.fragment.37
dEQP-GLES2.functional.shaders.random.exponential.fragment.11
dEQP-GLES2.functional.shaders.random.exponential.fragment.12
@@ -179,19 +46,13 @@ dEQP-GLES2.functional.shaders.random.exponential.fragment.37
dEQP-GLES2.functional.shaders.random.exponential.fragment.5
dEQP-GLES2.functional.shaders.random.exponential.fragment.74
dEQP-GLES2.functional.shaders.random.texture.fragment.28
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.1
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.65
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.69
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2dproj_vec4_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texturecube_bias
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_clamp_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_clamp_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_mirror_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_linear_mirror_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_clamp_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_clamp_rgba8888
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_mirror_etc1
dEQP-GLES2.functional.texture.filtering.2d.linear_mipmap_linear_nearest_mirror_rgba8888
dEQP-GLES2.functional.texture.mipmap.cube.basic.linear_linear
dEQP-GLES2.functional.texture.mipmap.cube.basic.linear_nearest

View File

@@ -9,31 +9,23 @@ dEQP-GLES[0-9]*.stress
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish
# Crashes
dEQP-GLES2.functional.shaders.invariance.highp.common_subexpression_1
dEQP-GLES2.functional.shaders.invariance.mediump.common_subexpression_1
dEQP-GLES2.functional.shaders.invariance.lowp.common_subexpression_1
# Flaky
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
dEQP-GLES2.functional.default_vertex_attrib.*
dEQP-GLES2.functional.fbo.completeness.size.distinct
dEQP-GLES2.functional.negative_api.shader.uniform_matrixfv_invalid_transpose
dEQP-GLES2.functional.negative_api.texture.generatemipmap_zero_level_array_compressed
dEQP-GLES2.functional.shaders.builtin_variable.frontfacing
dEQP-GLES2.functional.shaders.random.exponential.fragment.94
dEQP-GLES2.functional.shaders.random.all_features.fragment.55
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
# Driver bugs causing GPU errors
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.nested_sequence_vertex
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.conditional_body_vertex
dEQP-GLES2.functional.shaders.loops.while_uniform_iterations.conditional_continue_vertex
dEQP-GLES2.functional.shaders.loops.while_uniform_iterations.double_continue_vertex
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.1
dEQP-GLES2.functional.shaders.random.trigonometric.fragment.69
# Hangs / OOM
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_static_read
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_dynamic_read
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_static_loop_read
dEQP-GLES2.functional.shaders.indexing.varying_array.vec4_dynamic_loop_write_dynamic_loop_read
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec3_dynamic_loop_write_dynamic_read_vertex
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec4_dynamic_loop_write_static_read_vertex
dEQP-GLES2.functional.shaders.indexing.tmp_array.vec4_dynamic_loop_write_dynamic_read_vertex

View File

@@ -28,7 +28,6 @@ dEQP-GLES2.functional.rasterization.interpolation.basic.lines_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide
dEQP-GLES2.functional.rasterization.limits.points
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2dproj_vec3_bias
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2dproj_vec4_bias

View File

@@ -8,3 +8,4 @@ dEQP-GLES[0-9]*.stress.*
# These are really slow on tiling architectures (including llvmpipe).
dEQP-GLES[0-9]*.functional.flush_finish.*

File diff suppressed because it is too large Load Diff

View File

@@ -11,3 +11,10 @@ dEQP-GLES[0-9]*.functional.flush_finish.*
# XXX: Why does this flake?
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
# XXX: Causes irrecoverable GPU hangs when run in parallel with dEQP-GLES3.functional.transform_feedback.*
dEQP-GLES3.functional.rasterizer_discard.*
# XXX: Not completely implemented yet, behave flakily
dEQP-GLES3.functional.shaders.derivate.*

View File

@@ -0,0 +1,3 @@
# Exclude WSI related tests.
dEQP-VK.image.swapchain_mutable.*
dEQP-VK.wsi.*

View File

@@ -0,0 +1,35 @@
# CTS bug (should be fixed in next version)
dEQP-VK.api.buffer_marker.graphics.default_mem.bottom_of_pipe.memory_dep.draw
dEQP-VK.api.buffer_marker.graphics.external_host_mem.bottom_of_pipe.memory_dep.draw
# SPIR-V->NIR issues.
dEQP-VK.glsl.builtin.precision.asin.highp.scalar
dEQP-VK.glsl.builtin.precision.asin.highp.vec2
dEQP-VK.glsl.builtin.precision.asin.highp.vec3
dEQP-VK.glsl.builtin.precision.asin.highp.vec4
# CTS bug (list of extensions not up-to-date).
dEQP-VK.info.device_extensions
# ACO specific issues.
dEQP-VK.graphicsfuzz.loops-ifs-continues-call
# Interesting failures...
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_zero
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_max
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_min
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_zero

View File

@@ -0,0 +1,13 @@
# SPIR-V->NIR issues.
dEQP-VK.glsl.builtin.precision.asin.highp.scalar
dEQP-VK.glsl.builtin.precision.asin.highp.vec2
dEQP-VK.glsl.builtin.precision.asin.highp.vec3
dEQP-VK.glsl.builtin.precision.asin.highp.vec4
# CTS bug (list of extensions not up-to-date).
dEQP-VK.info.device_extensions
# ACO specific issues.
dEQP-VK.transform_feedback.simple.multistreams_1
dEQP-VK.transform_feedback.simple.multistreams_3
dEQP-VK.graphicsfuzz.loops-ifs-continues-call

View File

@@ -0,0 +1,11 @@
# SPIR-V->NIR issues.
dEQP-VK.glsl.builtin.precision.asin.highp.scalar
dEQP-VK.glsl.builtin.precision.asin.highp.vec2
dEQP-VK.glsl.builtin.precision.asin.highp.vec3
dEQP-VK.glsl.builtin.precision.asin.highp.vec4
# CTS bug (list of extensions not up-to-date).
dEQP-VK.info.device_extensions
# ACO specific issues.
dEQP-VK.graphicsfuzz.loops-ifs-continues-call

View File

@@ -0,0 +1,15 @@
# CTS bug (should be fixed in next version)
dEQP-VK.api.buffer_marker.graphics.default_mem.bottom_of_pipe.memory_dep.draw
dEQP-VK.api.buffer_marker.graphics.external_host_mem.bottom_of_pipe.memory_dep.draw
# SPIR-V->NIR issues.
dEQP-VK.glsl.builtin.precision.asin.highp.scalar
dEQP-VK.glsl.builtin.precision.asin.highp.vec2
dEQP-VK.glsl.builtin.precision.asin.highp.vec3
dEQP-VK.glsl.builtin.precision.asin.highp.vec4
# CTS bug (list of extensions not up-to-date).
dEQP-VK.info.device_extensions
# ACO specific issues.
dEQP-VK.graphicsfuzz.loops-ifs-continues-call

View File

@@ -0,0 +1,13 @@
# SPIR-V->NIR issues.
dEQP-VK.glsl.builtin.precision.asin.highp.scalar
dEQP-VK.glsl.builtin.precision.asin.highp.vec2
dEQP-VK.glsl.builtin.precision.asin.highp.vec3
dEQP-VK.glsl.builtin.precision.asin.highp.vec4
# CTS bug (list of extensions not up-to-date).
dEQP-VK.info.device_extensions
# ACO specific issues.
dEQP-VK.transform_feedback.simple.multistreams_1
dEQP-VK.transform_feedback.simple.multistreams_3
dEQP-VK.graphicsfuzz.loops-ifs-continues-call

View File

@@ -2,7 +2,7 @@
set -ex
DEQP_OPTIONS="--deqp-surface-width=256 --deqp-surface-height=256"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-surface-width=256 --deqp-surface-height=256"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-surface-type=pbuffer"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-gl-config-name=rgba8888d24s8ms0"
DEQP_OPTIONS="$DEQP_OPTIONS --deqp-visibility=hidden"
@@ -31,7 +31,7 @@ if [ -z "$DEQP_SKIPS" ]; then
exit 1
fi
ARTIFACTS=`pwd`/artifacts
INSTALL=`pwd`/install
# Set up the driver environment.
export LD_LIBRARY_PATH=`pwd`/install/lib/
@@ -60,17 +60,25 @@ if [ -n "$CI_NODE_INDEX" ]; then
sed -ni $CI_NODE_INDEX~$CI_NODE_TOTAL"p" /tmp/case-list.txt
fi
if [ -n "$DEQP_CASELIST_FILTER" ]; then
sed -i "/$DEQP_CASELIST_FILTER/p" /tmp/case-list.txt
fi
if [ ! -s /tmp/case-list.txt ]; then
echo "Caselist generation failed"
exit 1
fi
if [ -n "$DEQP_EXPECTED_FAILS" ]; then
XFAIL="--xfail-list $ARTIFACTS/$DEQP_EXPECTED_FAILS"
XFAIL="--xfail-list $INSTALL/$DEQP_EXPECTED_FAILS"
fi
set +e
if [ -n "$DEQP_PARALLEL" ]; then
JOB="--job $DEQP_PARALLEL"
fi
run_cts() {
deqp=$1
caselist=$2
@@ -79,9 +87,10 @@ run_cts() {
--deqp $deqp \
--output $output \
--caselist $caselist \
--exclude-list $ARTIFACTS/$DEQP_SKIPS \
--exclude-list $INSTALL/$DEQP_SKIPS \
--compact-display false \
$XFAIL \
--job ${DEQP_PARALLEL:-1} \
$JOB \
--allow-flakes true \
$DEQP_RUNNER_OPTIONS \
-- \
@@ -130,7 +139,7 @@ extract_xml_result() {
if [ "$line" = "#endTestCaseResult" ]; then
echo $line >> $dst
echo "#endSession" >> $dst
/deqp/executor/testlog-to-xml $dst "$RESULTS/$testcase.xml"
/deqp/executor/testlog-to-xml $dst "$RESULTS/$testcase$DEQP_RUN_SUFFIX.xml"
# copy the stylesheets here so they only end up in artifacts
# if we have one or more result xml in artifacts
cp /deqp/testlog.css "$RESULTS/"
@@ -178,6 +187,28 @@ generate_junit() {
echo "</testsuites>"
}
parse_renderer() {
RENDERER=`grep -A1 TestCaseResult.\*info.renderer $RESULTS/deqp-info.qpa | grep '<Text' | sed 's|.*<Text>||g' | sed 's|</Text>||g'`
VERSION=`grep -A1 TestCaseResult.\*info.version $RESULTS/deqp-info.qpa | grep '<Text' | sed 's|.*<Text>||g' | sed 's|</Text>||g'`
echo "Renderer: $RENDERER"
echo "Version: $VERSION "
if ! echo $RENDERER | grep -q $DEQP_EXPECTED_RENDERER; then
echo "Expected GL_RENDERER $DEQP_EXPECTED_RENDERER"
exit 1
fi
}
check_renderer() {
echo "Capturing renderer info for driver sanity checks"
# If you're having trouble loading your driver, uncommenting this may help
# debug.
# export EGL_LOG_LEVEL=debug
VERSION=`echo $DEQP_VER | tr '[a-z]' '[A-Z]'`
$DEQP $DEQP_OPTIONS --deqp-case=dEQP-$VERSION.info.\* --deqp-log-filename=$RESULTS/deqp-info.qpa
parse_renderer
}
# wrapper to supress +x to avoid spamming the log
quiet() {
set +x
@@ -185,52 +216,72 @@ quiet() {
set -x
}
run_cts $DEQP /tmp/case-list.txt $RESULTS/cts-runner-results.txt
if [ "$GALLIUM_DRIVER" = "virpipe" ]; then
# deqp is to use virpipe, and virgl_test_server llvmpipe
export GALLIUM_DRIVER="$GALLIUM_DRIVER"
GALLIUM_DRIVER=llvmpipe \
GALLIVM_PERF="nopt,no_filter_hacks" \
VTEST_USE_EGL_SURFACELESS=1 \
VTEST_USE_GLES=1 \
virgl_test_server >$RESULTS/vtest-log.txt 2>&1 &
sleep 1
fi
if [ $DEQP_VER != vk ]; then
quiet check_renderer
fi
RESULTSFILE=$RESULTS/cts-runner-results$DEQP_RUN_SUFFIX.txt
UNEXPECTED_RESULTSFILE=$RESULTS/cts-runner-unexpected-results$DEQP_RUN_SUFFIX.txt
FLAKESFILE=$RESULTS/cts-runner-flakes$DEQP_RUN_SUFFIX.txt
run_cts $DEQP /tmp/case-list.txt $RESULTSFILE
DEQP_EXITCODE=$?
quiet generate_junit $RESULTS/cts-runner-results.txt > $RESULTS/results.xml
# junit is disabled, because it overloads gitlab.freedesktop.org to parse it.
#quiet generate_junit $RESULTSFILE > $RESULTS/results.xml
if [ $DEQP_EXITCODE -ne 0 ]; then
# preserve caselist files in case of failures:
cp /tmp/deqp_runner.*.txt $RESULTS/
echo "Some unexpected results found (see cts-runner-results.txt in artifacts for full results):"
cat $RESULTS/cts-runner-results.txt | \
grep -v ",Pass" | \
grep -v ",Skip" | \
grep -v ",ExpectedFail" > \
$RESULTS/cts-runner-unexpected-results.txt
head -n 50 $RESULTS/cts-runner-unexpected-results.txt
egrep -v ",Pass|,Skip|,ExpectedFail" $RESULTSFILE > $UNEXPECTED_RESULTSFILE.txt
if [ -z "$DEQP_NO_SAVE_RESULTS" ]; then
echo "Some unexpected results found (see cts-runner-results.txt in artifacts for full results):"
head -n 50 $UNEXPECTED_RESULTSFILE.txt
# Save the logs for up to the first 50 unexpected results:
head -n 50 $RESULTS/cts-runner-unexpected-results.txt | quiet extract_xml_results /tmp/*.qpa
head -n 50 $UNEXPECTED_RESULTSFILE.txt | quiet extract_xml_results /tmp/*.qpa
else
echo "Unexpected results found:"
cat $UNEXPECTED_RESULTSFILE.txt
fi
count=`cat $RESULTS/cts-runner-unexpected-results.txt | wc -l`
count=`wc -l $UNEXPECTED_RESULTSFILE.txt`
# Re-run fails to detect flakes. But use a small threshold, if
# something was fundamentally broken, we don't want to re-run
# the entire caselist
else
cat $RESULTS/cts-runner-results.txt | \
grep ",Flake" > \
$RESULTS/cts-runner-flakes.txt
grep ",Flake" $RESULTSFILE > $FLAKESFILE
count=`cat $RESULTS/cts-runner-flakes.txt | wc -l`
count=`wc -l $FLAKESFILE`
if [ $count -gt 0 ]; then
echo "Some flakes found (see cts-runner-flakes.txt in artifacts for full results):"
head -n 50 $RESULTS/cts-runner-flakes.txt
head -n 50 $FLAKESFILE
if [ -z "$DEQP_NO_SAVE_RESULTS" ]; then
# Save the logs for up to the first 50 flakes:
head -n 50 $RESULTS/cts-runner-flakes.txt | quiet extract_xml_results /tmp/*.qpa
head -n 50 $FLAKESFILE | quiet extract_xml_results /tmp/*.qpa
fi
# Report the flakes to IRC channel for monitoring (if configured):
quiet report_flakes $RESULTS/cts-runner-flakes.txt
quiet report_flakes $FLAKESFILE
else
# no flakes, so clean-up:
rm $RESULTS/cts-runner-flakes.txt
rm $FLAKESFILE
fi
fi

View File

@@ -449,7 +449,6 @@ dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.blit_framebuffer
dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.read_pixels_fbo_format_mismatch
dEQP-GLES31.functional.debug.negative_coverage.log.buffer.read_pixels_fbo_format_mismatch
dEQP-GLES31.functional.draw_base_vertex.draw_elements_instanced_base_vertex.line_loop.instanced_attributes
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_color_mask_buffer_color_mask
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.0
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.1
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.10

View File

@@ -10,7 +10,10 @@ dEQP-GLES[0-9]*.stress.*
dEQP-GLES[0-9]*.functional.flush_finish.*
# Random failures
dEQP-GLES31.functional.shaders.builtin_functions.*geometry
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_color_mask_buffer_color_mask
dEQP-GLES31.functional.fbo.no_attachments.maximums.all
dEQP-GLES31.functional.fbo.no_attachments.maximums.size
dEQP-GLES31.functional.geometry_shading.input.basic_primitive.points
dEQP-GLES31.functional.shaders.builtin_functions.*geometry
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_expression.geometry.usampler3d
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.dynamically_uniform.geometry.sampler2darray

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dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES2.functional.clipping.point.wide_point_clip
dEQP-GLES2.functional.clipping.point.wide_point_clip_viewport_center
dEQP-GLES2.functional.clipping.point.wide_point_clip_viewport_corner
dEQP-GLES2.functional.clipping.triangle_vertex.clip_two.clip_neg_y_neg_z_and_neg_x_neg_y_pos_z
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dEQP-GLES2.functional.fbo.render.recreate_depthbuffer.rebind_rbo_rgba4_depth_component16
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dEQP-GLES2.functional.fbo.render.shared_depthbuffer.rbo_rgba4_depth_component16
dEQP-GLES2.functional.polygon_offset.default_displacement_with_units
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dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide
dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_corner
dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_center
dEQP-GLES3.functional.clipping.triangle_vertex.clip_two.clip_neg_y_neg_z_and_neg_x_neg_y_pos_z
dEQP-GLES3.functional.clipping.triangle_vertex.clip_two.clip_pos_y_pos_z_and_neg_x_neg_y_neg_z
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dEQP-GLES3.functional.draw.random.174
dEQP-GLES3.functional.draw.random.31
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dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_x
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_y
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dEQP-GLES3.functional.fbo.msaa.2_samples.r16f
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dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_4x4_khr_rgba32f.texture2d_array_to_texture2d_array
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_5x4_khr_rgba32f.texture2d_array_to_texture3d
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_5x4_khr_rgba32f.texture2d_to_texture2d_array
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_5x5_khr_rgba32f.cubemap_to_texture2d_array
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_5x5_khr_rgba32f.texture2d_to_texture3d
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_6x5_khr_rgba32f.cubemap_to_texture3d
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_8x5_khr_rgba32f.texture2d_array_to_texture2d_array
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_8x6_khr_rgba32f.texture2d_array_to_texture3d
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_8x6_khr_rgba32f.texture2d_to_texture2d_array
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_8x8_khr_rgba32f.cubemap_to_texture2d_array
dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.srgb8_alpha8_astc_8x8_khr_rgba32f.texture2d_to_texture3d
dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.read_pixels_fbo_format_mismatch
dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawarrays_combined_grid_200x200_drawcount_8
dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawarrays_separate_grid_200x200_drawcount_800
dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_combined_grid_1000x1000_drawcount_5000
dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_separate_grid_200x200_drawcount_1
dEQP-GLES31.functional.draw_indirect.compute_interop.separate.drawelements_compute_data_and_indices
dEQP-GLES31.functional.fbo.no_attachments.interaction.127x127ms0_default_129x129ms0
dEQP-GLES31.functional.fbo.no_attachments.npot_size.15x511
dEQP-GLES31.functional.fbo.no_attachments.npot_size.65x65
dEQP-GLES31.functional.fbo.no_attachments.random.0
dEQP-GLES31.functional.image_load_store.2d.atomic.comp_swap_r32ui_result
dEQP-GLES31.functional.image_load_store.2d.atomic.max_r32ui_result
dEQP-GLES31.functional.image_load_store.2d.atomic.or_r32i_return_value
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.r32f_r32i
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.r32i_rgba8ui
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.rgba32i_rgba32ui
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.rgba8_rgba8_snorm
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.rgba8ui_r32i
dEQP-GLES31.functional.image_load_store.2d.image_size.readonly_7x1
dEQP-GLES31.functional.image_load_store.2d.load_store.rgba8i
dEQP-GLES31.functional.image_load_store.2d.qualifiers.coherent_r32i
dEQP-GLES31.functional.image_load_store.2d.store.r32f
dEQP-GLES31.functional.image_load_store.2d.store.rgba8_snorm
dEQP-GLES31.functional.image_load_store.2d_array.atomic.exchange_r32ui_return_value
dEQP-GLES31.functional.image_load_store.2d_array.atomic.min_r32ui_return_value
dEQP-GLES31.functional.image_load_store.2d_array.atomic.or_r32i_result
dEQP-GLES31.functional.image_load_store.2d_array.format_reinterpret.r32f_rgba8i
dEQP-GLES31.functional.image_load_store.2d_array.format_reinterpret.r32i_r32f
dEQP-GLES31.functional.image_load_store.2d_array.format_reinterpret.rgba32i_rgba32f
dEQP-GLES31.functional.image_load_store.2d_array.format_reinterpret.rgba8_r32i
dEQP-GLES31.functional.image_load_store.2d_array.format_reinterpret.rgba8ui_rgba8i
dEQP-GLES31.functional.image_load_store.2d_array.image_size.readonly_1x1x1
dEQP-GLES31.functional.image_load_store.2d_array.load_store.r32i_single_layer
dEQP-GLES31.functional.image_load_store.2d_array.load_store.rgba32f_single_layer
dEQP-GLES31.functional.image_load_store.2d_array.load_store.rgba8ui_single_layer
dEQP-GLES31.functional.image_load_store.2d_array.qualifiers.volatile_r32ui
dEQP-GLES31.functional.image_load_store.2d_array.store.rgba16i_single_layer
dEQP-GLES31.functional.image_load_store.2d_array.store.rgba32ui_single_layer
dEQP-GLES31.functional.image_load_store.3d.atomic.add_r32ui_result
dEQP-GLES31.functional.image_load_store.3d.atomic.max_r32i_return_value
dEQP-GLES31.functional.image_load_store.3d.atomic.xor_r32ui_result
dEQP-GLES31.functional.image_load_store.3d.format_reinterpret.r32ui_r32i
dEQP-GLES31.functional.image_load_store.3d.format_reinterpret.rgba16f_rgba16i
dEQP-GLES31.functional.image_load_store.3d.format_reinterpret.rgba16ui_rgba16i
dEQP-GLES31.functional.image_load_store.3d.format_reinterpret.rgba8_rgba8ui
dEQP-GLES31.functional.image_load_store.3d.format_reinterpret.rgba8_snorm_rgba8
dEQP-GLES31.functional.image_load_store.3d.format_reinterpret.rgba8i_r32i
dEQP-GLES31.functional.image_load_store.3d.image_size.readonly_writeonly_12x34x56
dEQP-GLES31.functional.image_load_store.3d.load_store.rgba16ui
dEQP-GLES31.functional.image_load_store.3d.load_store.rgba8i
dEQP-GLES31.functional.image_load_store.3d.qualifiers.coherent_r32f
dEQP-GLES31.functional.image_load_store.3d.store.r32f
dEQP-GLES31.functional.image_load_store.3d.store.rgba32i
dEQP-GLES31.functional.image_load_store.3d.store.rgba8_snorm
dEQP-GLES31.functional.image_load_store.cube.atomic.and_r32ui_return_value
dEQP-GLES31.functional.image_load_store.cube.atomic.exchange_r32i_result
dEQP-GLES31.functional.image_load_store.cube.atomic.min_r32i_result
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.r32i_rgba8
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.r32ui_r32f
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba32f_rgba32ui
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba32ui_rgba32f
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba8_snorm_r32ui
dEQP-GLES31.functional.image_load_store.cube.format_reinterpret.rgba8i_r32f
dEQP-GLES31.functional.image_load_store.cube.image_size.writeonly_1x1
dEQP-GLES31.functional.image_load_store.cube.load_store.r32f_single_layer
dEQP-GLES31.functional.image_load_store.cube.load_store.rgba32i_single_layer
dEQP-GLES31.functional.image_load_store.cube.load_store.rgba8_snorm_single_layer
dEQP-GLES31.functional.image_load_store.cube.store.r32i_single_layer
dEQP-GLES31.functional.image_load_store.cube.store.rgba32f_single_layer
dEQP-GLES31.functional.image_load_store.cube.store.rgba8ui_single_layer
dEQP-GLES31.functional.shaders.builtin_constants.core.max_combined_image_uniforms
dEQP-GLES31.functional.shaders.builtin_constants.core.max_draw_buffers
dEQP-GLES31.functional.shaders.builtin_constants.core.max_vertex_atomic_counter_buffers
dEQP-GLES31.functional.shaders.builtin_constants.tessellation_shader.max_tess_control_total_output_components
dEQP-GLES31.functional.shaders.builtin_constants.tessellation_shader.max_tess_evaluation_uniform_components
dEQP-GLES31.functional.shaders.builtin_functions.common.abs.int_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.abs.ivec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.abs.vec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.abs.vec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.ceil.vec2_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.ceil.vec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floatbitstoint.vec2_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floatbitstoint.vec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floatbitstouint.float_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floatbitstouint.vec3_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floatbitstouint.vec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floor.float_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floor.vec3_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.floor.vec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.fract.float_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.fract.vec3_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.fract.vec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.frexp.vec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.frexp.vec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.intbitstofloat.int_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.isinf.float_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.isinf.vec2_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.isinf.vec4_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.isnan.float_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.isnan.vec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.ldexp.float_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.ldexp.vec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.modf.vec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.modf.vec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.round.float_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.round.vec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.roundeven.float_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.roundeven.vec2_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.roundeven.vec4_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.sign.float_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.sign.ivec2_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.sign.ivec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.sign.vec2_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.sign.vec4_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.trunc.vec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.trunc.vec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.common.uintbitstofloat.uvec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.int_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.ivec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.uint_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.uvec2_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.uvec4_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldextract.ivec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldextract.ivec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldextract.uint_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldextract.uvec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldinsert.int_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldinsert.ivec2_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldinsert.ivec4_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldinsert.uvec2_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldinsert.uvec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.int_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.ivec3_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.ivec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.uvec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.uvec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.ivec2_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.ivec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.uint_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.uvec3_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.uvec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.ivec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.ivec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.uint_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.uvec3_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.imulextended.ivec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.uaddcarry.uint_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.uaddcarry.uvec3_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.uaddcarry.uvec4_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.umulextended.uvec3_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.usubborrow.uvec2_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.integer.usubborrow.uvec4_lowp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.pack_unpack.packsnorm4x8_mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.pack_unpack.packunorm4x8_highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.precision.abs.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.acos.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.acosh.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.add.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.add.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.asin.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.asinh.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.atan2.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.atanh.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.ceil.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.ceil.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.clamp.mediump_compute.vec2
dEQP-GLES31.functional.shaders.builtin_functions.precision.cos.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.cosh.highp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.degrees.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.degrees.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.distance.lowp_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.div.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.dot.highp_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.dot.lowp_compute.vec2
dEQP-GLES31.functional.shaders.builtin_functions.precision.exp.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.exp2.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.exp2.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.faceforward.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.floor.highp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.fract.highp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.frexp.lowp_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.frexp.mediump_compute.vec2
dEQP-GLES31.functional.shaders.builtin_functions.precision.inversesqrt.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.ldexp.highp_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.length.mediump_compute.vec2
dEQP-GLES31.functional.shaders.builtin_functions.precision.log.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.log2.highp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.matrixcompmult.highp_compute.mat2
dEQP-GLES31.functional.shaders.builtin_functions.precision.matrixcompmult.lowp_compute.mat4
dEQP-GLES31.functional.shaders.builtin_functions.precision.max.lowp_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.min.lowp_compute.vec2
dEQP-GLES31.functional.shaders.builtin_functions.precision.mix.mediump_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.mod.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.mul.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.normalize.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.outerproduct.highp_compute.mat3x2
dEQP-GLES31.functional.shaders.builtin_functions.precision.outerproduct.lowp_compute.mat2x3
dEQP-GLES31.functional.shaders.builtin_functions.precision.outerproduct.mediump_compute.mat2x4
dEQP-GLES31.functional.shaders.builtin_functions.precision.pow.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.radians.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.reflect.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.refract.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.refract.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.round.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.roundeven.lowp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.sign.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.sign.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.sin.highp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.sinh.highp_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.sinh.lowp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.smoothstep.lowp_compute.vec4
dEQP-GLES31.functional.shaders.builtin_functions.precision.sqrt.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.step.mediump_compute.vec2
dEQP-GLES31.functional.shaders.builtin_functions.precision.sub.highp_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.tan.mediump_compute.scalar
dEQP-GLES31.functional.shaders.builtin_functions.precision.tanh.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.precision.transpose.highp_compute.mat4x2
dEQP-GLES31.functional.shaders.builtin_functions.precision.transpose.lowp_compute.mat3
dEQP-GLES31.functional.shaders.builtin_functions.precision.transpose.mediump_compute.mat3x4
dEQP-GLES31.functional.shaders.builtin_functions.precision.trunc.mediump_compute.vec3
dEQP-GLES31.functional.shaders.builtin_functions.texture_size.samples_1_texture_2d_array
dEQP-GLES31.functional.shaders.builtin_functions.uniform.findLSBMinusOne.mediump_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.uniform.findMSBMinusOne.highp_tess_eval
dEQP-GLES31.functional.shaders.builtin_functions.uniform.findMSBZero.lowp_tess_eval
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dEQP-GLES31.functional.tessellation.invariance.tess_coord_component_range.triangles_fractional_odd_spacing_ccw
dEQP-GLES31.functional.tessellation.invariance.triangle_set.triangles_fractional_even_spacing
dEQP-GLES31.functional.tessellation.misc_draw.fill_overlap_quads_equal_spacing
dEQP-GLES31.functional.tessellation.primitive_discard.isolines_fractional_odd_spacing_cw
dEQP-GLES31.functional.tessellation.primitive_discard.quads_fractional_even_spacing_ccw
dEQP-GLES31.functional.tessellation.primitive_discard.triangles_equal_spacing_ccw
dEQP-GLES31.functional.tessellation.primitive_discard.triangles_fractional_even_spacing_cw
dEQP-GLES31.functional.tessellation.shader_input_output.barrier
dEQP-GLES31.functional.tessellation.shader_input_output.patch_vertices_in_tes
dEQP-GLES31.functional.tessellation.tesscoord.isolines_fractional_even_spacing
dEQP-GLES31.functional.tessellation.user_defined_io.per_patch.vertex_io_array_size_implicit.isolines
dEQP-GLES31.functional.tessellation.user_defined_io.per_patch_array.vertex_io_array_size_shader_builtin.triangles
dEQP-GLES31.functional.tessellation.user_defined_io.per_patch_block.vertex_io_array_size_shader_builtin.quads
dEQP-GLES31.functional.tessellation.user_defined_io.per_patch_block_array.vertex_io_array_size_shader_builtin.isolines
dEQP-GLES31.functional.tessellation.user_defined_io.per_vertex.vertex_io_array_size_query.quads_explicit_tcs_out_size
dEQP-GLES31.functional.tessellation.user_defined_io.per_vertex.vertex_io_array_size_shader_builtin.triangles
dEQP-GLES31.functional.tessellation.user_defined_io.per_vertex_block.vertex_io_array_size_shader_builtin.isolines
dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_float_depth

16
.gitlab-ci/fossilize-runner.sh Executable file
View File

@@ -0,0 +1,16 @@
#!/bin/sh
set -ex
if [ -z "$VK_DRIVER" ]; then
echo 'VK_DRIVER must be to something like "radeon" or "intel" for the test run'
exit 1
fi
INSTALL=`pwd`/install
# Set up the driver environment.
export LD_LIBRARY_PATH=`pwd`/install/lib/
export VK_ICD_FILENAMES=`pwd`/install/share/vulkan/icd.d/"$VK_DRIVER"_icd.x86_64.json
"$INSTALL/fossils/fossils.sh" "$INSTALL/fossils.yml"

6
.gitlab-ci/fossils.yml Normal file
View File

@@ -0,0 +1,6 @@
fossils-db:
repo: "https://gitlab.freedesktop.org/hakzsam/fossils-db"
commit: "59b11cd19e375c5871c512f73b1f8ecc33a5c417"
fossils:
- path: sascha-willems/database.foz

71
.gitlab-ci/fossils/fossils.sh Executable file
View File

@@ -0,0 +1,71 @@
#!/usr/bin/env bash
FOSSILS_SCRIPT_DIR="$(dirname "$(readlink -f "$0")")"
FOSSILS_YAML="$(readlink -f "$1")"
clone_fossils_db()
{
local repo="$1"
local commit="$2"
rm -rf fossils-db
git clone --no-checkout "$repo" fossils-db
(cd fossils-db; git reset "$commit" || git reset "origin/$commit")
}
query_fossils_yaml()
{
python3 "$FOSSILS_SCRIPT_DIR/query_fossils_yaml.py" \
--file "$FOSSILS_YAML" "$@"
}
create_clean_git()
{
rm -rf .clean_git
cp -R .git .clean_git
}
restore_clean_git()
{
rm -rf .git
cp -R .clean_git .git
}
fetch_fossil()
{
local fossil="${1//,/?}"
echo -n "[fetch_fossil] Fetching $1... "
local output=$(git lfs pull -I "$fossil" 2>&1)
local ret=0
if [[ $? -ne 0 || ! -f "$1" ]]; then
echo "ERROR"
echo "$output"
ret=1
else
echo "OK"
fi
restore_clean_git
return $ret
}
if [[ -n "$(query_fossils_yaml fossils_db_repo)" ]]; then
clone_fossils_db "$(query_fossils_yaml fossils_db_repo)" \
"$(query_fossils_yaml fossils_db_commit)"
cd fossils-db
else
echo "Warning: No fossils-db entry in $FOSSILS_YAML, assuming fossils-db is current directory"
fi
# During git operations various git objects get created which
# may take up significant space. Store a clean .git instance,
# which we restore after various git operations to keep our
# storage consumption low.
create_clean_git
for fossil in $(query_fossils_yaml fossils)
do
fetch_fossil "$fossil" || exit $?
fossilize-replay $fossil || exit $?
rm $fossil
done
exit $ret

View File

@@ -0,0 +1,69 @@
#!/usr/bin/python3
# Copyright (c) 2019 Collabora Ltd
# Copyright (c) 2020 Valve Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import argparse
import yaml
def cmd_fossils_db_repo(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
print(y['fossils-db']['repo'])
def cmd_fossils_db_commit(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
print(y['fossils-db']['commit'])
def cmd_fossils(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
fossils = list(y['fossils'])
if len(fossils) == 0:
return
print('\n'.join((t['path'] for t in fossils)))
def main():
parser = argparse.ArgumentParser()
parser.add_argument('--file', required=True,
help='the name of the yaml file')
subparsers = parser.add_subparsers(help='sub-command help')
parser_fossils_db_repo = subparsers.add_parser('fossils_db_repo')
parser_fossils_db_repo.set_defaults(func=cmd_fossils_db_repo)
parser_fossils_db_commit = subparsers.add_parser('fossils_db_commit')
parser_fossils_db_commit.set_defaults(func=cmd_fossils_db_commit)
parser_fossils = subparsers.add_parser('fossils')
parser_fossils.set_defaults(func=cmd_fossils)
args = parser.parse_args()
args.func(args)
if __name__ == "__main__":
main()

View File

@@ -24,6 +24,8 @@ args = parser.parse_args()
env = Environment(loader = FileSystemLoader(os.path.dirname(args.template)), trim_blocks=True, lstrip_blocks=True)
template = env.get_template(os.path.basename(args.template))
env_vars = "%s CI_NODE_INDEX=%s CI_NODE_TOTAL=%s" % (args.env_vars, args.ci_node_index, args.ci_node_total)
values = {}
values['pipeline_info'] = args.pipeline_info
values['base_artifacts_url'] = args.base_artifacts_url
@@ -33,11 +35,9 @@ values['kernel_image_type'] = args.kernel_image_type
values['gpu_version'] = args.gpu_version
values['boot_method'] = args.boot_method
values['tags'] = args.lava_tags
values['env_vars'] = args.env_vars
values['env_vars'] = env_vars
values['deqp_version'] = args.deqp_version
values['arch'] = args.arch
values['ci_node_index'] = args.ci_node_index
values['ci_node_total'] = args.ci_node_total
f = open('lava-deqp.yml', "w")
f.write(template.render(values))

View File

@@ -1,4 +1,4 @@
job_name: mesa-deqp-{{ gpu_version }} {{ pipeline_info }}
job_name: mesa-deqp-{{ deqp_version }}-{{ gpu_version }} {{ pipeline_info }}
device_type: {{ device_type }}
timeouts:
job:
@@ -11,8 +11,9 @@ timeouts:
priority: 75
visibility: public
{% if tags %}
{% set lavatags = tags.split(',') %}
tags:
{% for tag in tags %}
{% for tag in lavatags %}
- {{ tag }}
{% endfor %}
{% endif %}
@@ -20,6 +21,13 @@ actions:
- deploy:
timeout:
minutes: 10
{% if boot_method == "fastboot" %}
{# fastboot has just one boot image with the dtb and rootfs packed in #}
to: fastboot
images:
boot:
url: {{ base_artifacts_url }}/{{ kernel_image_name }}
{% else %}
to: tftp
kernel:
url: {{ base_artifacts_url }}/{{ kernel_image_name }}
@@ -31,14 +39,25 @@ actions:
compression: gz
dtb:
url: {{ base_artifacts_url }}/{{ device_type }}.dtb
{% endif %}
os: oe
- boot:
timeout:
minutes: 5
method: {{ boot_method }}
{% if boot_method == "fastboot" %}
{#
For fastboot, LAVA doesn't know how to unpack the rootfs/apply overlay/repack,
so we transfer the overlay over the network after boot.
#}
transfer_overlay:
download_command: wget -S --progress=dot:giga
unpack_command: tar -C / -xzf
{% else %}
commands: ramdisk
{% endif %}
prompts:
- '#'
- 'lava-shell:'
- test:
timeout:
minutes: 60
@@ -56,7 +75,7 @@ actions:
steps:
- mount -t proc none /proc
- mount -t sysfs none /sys
- mount -t devtmpfs none /dev
- mount -t devtmpfs none /dev || echo possibly already mounted
- mkdir -p /dev/pts
- mount -t devpts devpts /dev/pts
@@ -64,24 +83,17 @@ actions:
- export {{ env_vars }}
{% endif %}
# deqp-runner.sh assumes some stuff is in pwd
- cd /
- export DEQP_NO_SAVE_RESULTS=1
- 'export DEQP_RUNNER_OPTIONS="--compact-display false --shuffle false"'
- 'export DEQP_RUNNER_OPTIONS="--shuffle false"'
- export DEQP_EXPECTED_FAILS=deqp-{{ gpu_version }}-fails.txt
- export DEQP_SKIPS=deqp-{{ gpu_version }}-skips.txt
- export DEQP_VER={{ deqp_version }}
- export LIBGL_DRIVERS_PATH=`pwd`/install/lib/dri
- export CI_NODE_INDEX={{ ci_node_index }}
- export CI_NODE_TOTAL={{ ci_node_total }}
# Put stuff where the runner script expects it
- mkdir artifacts
- mkdir results
- mkdir -p install/lib
- cp /deqp/$DEQP_EXPECTED_FAILS artifacts/.
- cp /deqp/$DEQP_SKIPS artifacts/.
- mv /mesa/lib/* install/lib/.
- "if sh /deqp/deqp-runner.sh; then
- "if sh /install/deqp-runner.sh; then
echo 'deqp: pass';
else
echo 'deqp: fail';

View File

@@ -1,21 +1,27 @@
.lava-test:
extends:
- .ci-run-policy
stage: test
variables:
GIT_STRATEGY: none # testing doesn't build anything from source
ENV_VARS: "MESA_GLES_VERSION_OVERRIDE=3.0 DEQP_PARALLEL=6"
ENV_VARS: "DEQP_PARALLEL=6"
DEQP_VERSION: gles2
script:
- BUILD_JOB_ID=`cat artifacts/build_job_id.txt`
- mkdir -p /srv/${FILES_HOST_NAME}/$CI_JOB_ID/
- cp /lava-files/${KERNEL_IMAGE_NAME} /srv/${FILES_HOST_NAME}/$CI_JOB_ID/.
- cp /lava-files/${DEVICE_TYPE}.dtb /srv/${FILES_HOST_NAME}/$CI_JOB_ID/.
- tar -C /lava-files/rootfs-${ARCH} -xf artifacts/install.tar
- pushd /lava-files/rootfs-${ARCH}
- find -H | cpio -H newc -o | gzip -c - > /srv/${FILES_HOST_NAME}/$CI_JOB_ID/lava-rootfs-${ARCH}.cpio.gz
- popd
- >
artifacts/generate_lava.py \
--template artifacts/lava-deqp.yml.jinja2 \
--pipeline-info "$CI_PIPELINE_URL on $CI_COMMIT_REF_NAME ${CI_NODE_INDEX}/${CI_NODE_TOTAL}" \
--base-artifacts-url $CI_PROJECT_URL/-/jobs/$BUILD_JOB_ID/artifacts/raw/artifacts \
--base-artifacts-url ${FILES_HOST_URL}/$CI_JOB_ID \
--device-type ${DEVICE_TYPE} \
--env-vars "${ENV_VARS}" \
--arch ${ARCH} \
--deqp-version gles2 \
--deqp-version ${DEQP_VERSION} \
--kernel-image-name ${KERNEL_IMAGE_NAME} \
--kernel-image-type "${KERNEL_IMAGE_TYPE}" \
--gpu-version ${GPU_VERSION} \
@@ -23,16 +29,19 @@
--lava-tags "${LAVA_TAGS}" \
--ci-node-index "${CI_NODE_INDEX}" \
--ci-node-total "${CI_NODE_TOTAL}"
- lava_job_id=`lavacli jobs submit lava-deqp.yml`
- lava_job_id=`lavacli jobs submit lava-deqp.yml` || lavacli jobs submit lava-deqp.yml
- echo $lava_job_id
- rm -rf artifacts/*
- cp lava-deqp.yml artifacts/.
- lavacli jobs logs $lava_job_id | grep -a -v "{'case':" | tee artifacts/lava-deqp-$lava_job_id.log
- lavacli jobs logs $lava_job_id | tee artifacts/lava-deqp-$lava_job_id.log
- lavacli jobs show $lava_job_id
- result=`lavacli results $lava_job_id 0_deqp deqp | head -1`
- echo $result
- '[[ "$result" == "pass" ]]'
after_script:
- rm -rf /srv/${FILES_HOST_NAME}/$CI_JOB_ID/
artifacts:
name: "mesa_${CI_JOB_NAME}"
when: always
paths:
- artifacts/
@@ -49,6 +58,7 @@
dependencies:
- meson-armhf
needs:
- arm_build
- meson-armhf
.lava-test:arm64:
@@ -63,60 +73,101 @@
dependencies:
- meson-arm64
needs:
- arm_build
- meson-arm64
panfrost-t720-test:arm64:
extends: .lava-test:arm64
panfrost-t720-gles2:arm64:
extends:
- .lava-test:arm64
- .panfrost-rules
variables:
DEVICE_TYPE: sun50i-h6-pine-h64
GPU_VERSION: panfrost-t720
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T720"
FILES_HOST_NAME: "mesa-ci-lava-files.freedesktop.org"
FILES_HOST_URL: "https://mesa-ci-lava-files.freedesktop.org"
tags:
- lava-sun50i-h6-pine-h64
- mesa-ci-aarch64-lava-collabora
panfrost-t760-test:armhf:
extends: .lava-test:armhf
panfrost-t760-gles2:armhf:
extends:
- .lava-test:armhf
- .panfrost-rules
variables:
DEVICE_TYPE: rk3288-veyron-jaq
GPU_VERSION: panfrost-t760
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T760"
FILES_HOST_NAME: "mesa-ci-lava-files.freedesktop.org"
FILES_HOST_URL: "https://mesa-ci-lava-files.freedesktop.org"
tags:
- lava-rk3288-veyron-jaq
- mesa-ci-aarch64-lava-collabora
panfrost-t860-test:arm64:
extends: .lava-test:arm64
panfrost-t860-gles2:arm64:
extends:
- .lava-test:arm64
- .panfrost-rules
variables:
DEVICE_TYPE: rk3399-gru-kevin
GPU_VERSION: panfrost-t860
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T860"
FILES_HOST_NAME: "mesa-ci-lava-files.freedesktop.org"
FILES_HOST_URL: "https://mesa-ci-lava-files.freedesktop.org"
tags:
- lava-rk3399-gru-kevin
- mesa-ci-aarch64-lava-collabora
.panfrost-t820-test:arm64:
extends: .lava-test:arm64
panfrost-t860-gles3:arm64:
extends:
- .lava-test:arm64
- .panfrost-rules
variables:
DEVICE_TYPE: rk3399-gru-kevin
GPU_VERSION: panfrost-t860
BOOT_METHOD: depthcharge
KERNEL_IMAGE_TYPE: ""
DEQP_VERSION: gles3
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T860"
CI_NODE_INDEX: 1
CI_NODE_TOTAL: 5
FILES_HOST_NAME: "mesa-ci-lava-files.freedesktop.org"
FILES_HOST_URL: "https://mesa-ci-lava-files.freedesktop.org"
tags:
- mesa-ci-aarch64-lava-collabora
.panfrost-t820-gles2:arm64:
extends:
- .lava-test:arm64
- .panfrost-rules
variables:
DEVICE_TYPE: meson-gxm-khadas-vim2
GPU_VERSION: panfrost-t820
LAVA_TAGS: panfrost
ENV_VARS: "PAN_MESA_DEBUG=gles3 DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=T820"
tags:
- lava-meson-gxm-khadas-vim2
- mesa-ci-aarch64-lava-baylibre
.lima-mali400-test:armhf:
parallel: 2
extends: .lava-test:armhf
extends:
- .lava-test:armhf
- .lima-rules
variables:
DEVICE_TYPE: sun8i-h3-libretech-all-h3-cc
GPU_VERSION: lima
ENV_VARS: "DEQP_PARALLEL=3"
ENV_VARS: "DEQP_PARALLEL=3 DEQP_EXPECTED_RENDERER=Mali400"
tags:
- lava-sun8i-h3-libretech-all-h3-cc
- mesa-ci-aarch64-lava-baylibre
lima-mali450-test:arm64:
extends: .lava-test:arm64
.lima-mali450-test:arm64:
extends:
- .lava-test:arm64
- .lima-rules
variables:
DEVICE_TYPE: meson-gxl-s905x-libretech-cc
GPU_VERSION: lima
ENV_VARS: "DEQP_PARALLEL=6"
ENV_VARS: "DEQP_PARALLEL=6 DEQP_EXPECTED_RENDERER=Mali450"
tags:
- lava-meson-gxl-s905x-libretech-cc
- mesa-ci-aarch64-lava-baylibre

View File

@@ -54,11 +54,10 @@ meson _build --native-file=native.file \
${GALLIUM_ST} \
-D gallium-drivers=${GALLIUM_DRIVERS:-[]} \
-D vulkan-drivers=${VULKAN_DRIVERS:-[]} \
-D I-love-half-baked-turnips=true \
${EXTRA_OPTION}
cd _build
meson configure
ninja -j4
ninja
LC_ALL=C.UTF-8 ninja test
ninja install
cd ..

View File

@@ -148,8 +148,6 @@ spec/amd_conservative_depth/preprocessor/disabled-undefined-core.geom: skip
spec/amd_conservative_depth/preprocessor/disabled-undefined-core.tesc: skip
spec/amd_conservative_depth/preprocessor/disabled-undefined-core.tese: skip
spec/amd_conservative_depth/preprocessor/disabled-undefined-core.vert: skip
spec/amd_conservative_depth/preprocessor/enabled-core.tesc: skip
spec/amd_conservative_depth/preprocessor/enabled-core.tese: skip
spec/amd_shader_stencil_export/preprocessor/disabled-defined-compat.frag: skip
spec/amd_shader_stencil_export/preprocessor/disabled-defined-compat.vert: skip
spec/amd_shader_stencil_export/preprocessor/disabled-defined-core.comp: skip
@@ -166,8 +164,6 @@ spec/amd_shader_stencil_export/preprocessor/disabled-undefined-core.geom: skip
spec/amd_shader_stencil_export/preprocessor/disabled-undefined-core.tesc: skip
spec/amd_shader_stencil_export/preprocessor/disabled-undefined-core.tese: skip
spec/amd_shader_stencil_export/preprocessor/disabled-undefined-core.vert: skip
spec/amd_shader_stencil_export/preprocessor/enabled-core.tesc: skip
spec/amd_shader_stencil_export/preprocessor/enabled-core.tese: skip
spec/amd_shader_trinary_minmax/preprocessor/disabled-defined-compat.frag: skip
spec/amd_shader_trinary_minmax/preprocessor/disabled-defined-compat.vert: skip
spec/amd_shader_trinary_minmax/preprocessor/disabled-defined-core.comp: skip
@@ -184,8 +180,6 @@ spec/amd_shader_trinary_minmax/preprocessor/disabled-undefined-core.geom: skip
spec/amd_shader_trinary_minmax/preprocessor/disabled-undefined-core.tesc: skip
spec/amd_shader_trinary_minmax/preprocessor/disabled-undefined-core.tese: skip
spec/amd_shader_trinary_minmax/preprocessor/disabled-undefined-core.vert: skip
spec/amd_shader_trinary_minmax/preprocessor/enabled-core.tesc: skip
spec/amd_shader_trinary_minmax/preprocessor/enabled-core.tese: skip
spec/amd_vertex_shader_layer/preprocessor/disabled-defined-core.comp: skip
spec/amd_vertex_shader_layer/preprocessor/disabled-defined-core.frag: skip
spec/amd_vertex_shader_layer/preprocessor/disabled-defined-core.geom: skip
@@ -200,8 +194,6 @@ spec/amd_vertex_shader_layer/preprocessor/disabled-undefined-core.tese: skip
spec/amd_vertex_shader_layer/preprocessor/disabled-undefined-core.vert: skip
spec/amd_vertex_shader_layer/preprocessor/enabled-compat.frag: skip
spec/amd_vertex_shader_layer/preprocessor/enabled-compat.vert: skip
spec/amd_vertex_shader_layer/preprocessor/enabled-core.tesc: skip
spec/amd_vertex_shader_layer/preprocessor/enabled-core.tese: skip
spec/amd_vertex_shader_viewport_index/preprocessor/disabled-defined-core.comp: skip
spec/amd_vertex_shader_viewport_index/preprocessor/disabled-defined-core.frag: skip
spec/amd_vertex_shader_viewport_index/preprocessor/disabled-defined-core.geom: skip
@@ -216,8 +208,6 @@ spec/amd_vertex_shader_viewport_index/preprocessor/disabled-undefined-core.tese:
spec/amd_vertex_shader_viewport_index/preprocessor/disabled-undefined-core.vert: skip
spec/amd_vertex_shader_viewport_index/preprocessor/enabled-compat.frag: skip
spec/amd_vertex_shader_viewport_index/preprocessor/enabled-compat.vert: skip
spec/amd_vertex_shader_viewport_index/preprocessor/enabled-core.tesc: skip
spec/amd_vertex_shader_viewport_index/preprocessor/enabled-core.tese: skip
spec/arb_arrays_of_arrays/compiler/glsl-4.00-basic-types.vert: skip
spec/arb_arrays_of_arrays/compiler/glsl-4.20-basic-types.frag: skip
spec/arb_arrays_of_arrays/compiler/subroutine.vert: skip
@@ -237,8 +227,6 @@ spec/arb_arrays_of_arrays/preprocessor/disabled-undefined-core.geom: skip
spec/arb_arrays_of_arrays/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_arrays_of_arrays/preprocessor/disabled-undefined-core.tese: skip
spec/arb_arrays_of_arrays/preprocessor/disabled-undefined-core.vert: skip
spec/arb_arrays_of_arrays/preprocessor/enabled-core.tesc: skip
spec/arb_arrays_of_arrays/preprocessor/enabled-core.tese: skip
spec/arb_bindless_texture/compiler/images/arith-bound-image.frag: skip
spec/arb_bindless_texture/compiler/images/arith-expr.vert: skip
spec/arb_bindless_texture/compiler/images/arrays-of-struct.frag: skip
@@ -325,8 +313,6 @@ spec/arb_compute_shader/preprocessor/disabled-undefined-core.geom: skip
spec/arb_compute_shader/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_compute_shader/preprocessor/disabled-undefined-core.tese: skip
spec/arb_compute_shader/preprocessor/disabled-undefined-core.vert: skip
spec/arb_compute_shader/preprocessor/enabled-core.tesc: skip
spec/arb_compute_shader/preprocessor/enabled-core.tese: skip
spec/arb_compute_variable_group_size/compiler/do_nothing.comp: skip
spec/arb_compute_variable_group_size/compiler/gl_localgroupsizearb_illegal_use.comp: skip
spec/arb_compute_variable_group_size/compiler/gl_localgroupsizearb_layout.comp: skip
@@ -348,8 +334,6 @@ spec/arb_conservative_depth/preprocessor/disabled-undefined-core.geom: skip
spec/arb_conservative_depth/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_conservative_depth/preprocessor/disabled-undefined-core.tese: skip
spec/arb_conservative_depth/preprocessor/disabled-undefined-core.vert: skip
spec/arb_conservative_depth/preprocessor/enabled-core.tesc: skip
spec/arb_conservative_depth/preprocessor/enabled-core.tese: skip
spec/arb_derivative_control/preprocessor/disabled-defined-core.comp: skip
spec/arb_derivative_control/preprocessor/disabled-defined-core.frag: skip
spec/arb_derivative_control/preprocessor/disabled-defined-core.geom: skip
@@ -362,8 +346,6 @@ spec/arb_derivative_control/preprocessor/disabled-undefined-core.geom: skip
spec/arb_derivative_control/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_derivative_control/preprocessor/disabled-undefined-core.tese: skip
spec/arb_derivative_control/preprocessor/disabled-undefined-core.vert: skip
spec/arb_derivative_control/preprocessor/enabled-core.tesc: skip
spec/arb_derivative_control/preprocessor/enabled-core.tese: skip
spec/arb_draw_buffers/preprocessor/disabled-defined-compat.frag: skip
spec/arb_draw_buffers/preprocessor/disabled-defined-compat.vert: skip
spec/arb_draw_buffers/preprocessor/disabled-defined-core.comp: skip
@@ -380,8 +362,6 @@ spec/arb_draw_buffers/preprocessor/disabled-undefined-core.geom: skip
spec/arb_draw_buffers/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_draw_buffers/preprocessor/disabled-undefined-core.tese: skip
spec/arb_draw_buffers/preprocessor/disabled-undefined-core.vert: skip
spec/arb_draw_buffers/preprocessor/enabled-core.tesc: skip
spec/arb_draw_buffers/preprocessor/enabled-core.tese: skip
spec/arb_draw_instanced/preprocessor/disabled-defined-compat.frag: skip
spec/arb_draw_instanced/preprocessor/disabled-defined-compat.vert: skip
spec/arb_draw_instanced/preprocessor/disabled-defined-core.comp: skip
@@ -398,22 +378,16 @@ spec/arb_draw_instanced/preprocessor/disabled-undefined-core.geom: skip
spec/arb_draw_instanced/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_draw_instanced/preprocessor/disabled-undefined-core.tese: skip
spec/arb_draw_instanced/preprocessor/disabled-undefined-core.vert: skip
spec/arb_draw_instanced/preprocessor/enabled-core.tesc: skip
spec/arb_draw_instanced/preprocessor/enabled-core.tese: skip
spec/arb_enhanced_layouts/compiler/compile-time-constants/invocation.geom: skip
spec/arb_enhanced_layouts/compiler/compile-time-constants/negative-qualifiers/negative-layout-qualifier-invocation.geom: skip
spec/arb_enhanced_layouts/compiler/compile-time-constants/negative-qualifiers/negative-layout-qualifier-stream.geom: skip
spec/arb_enhanced_layouts/compiler/compile-time-constants/negative-qualifiers/negative-layout-qualifier-vertices.tesc: skip
spec/arb_enhanced_layouts/compiler/compile-time-constants/stream.geom: skip
spec/arb_enhanced_layouts/compiler/compile-time-constants/vertices.tesc: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-invocation-identifiers-in-single-layout-mismatch.geom: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-invocation-identifiers-in-single-layout.geom: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-stream-identifiers-in-single-layout-global-no-enhanced-layouts.geom: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-stream-identifiers-in-single-layout-global.geom: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-stream-identifiers-in-single-layout-no-enhanced-layouts.geom: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-stream-identifiers-in-single-layout.geom: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-vertices-identifiers-in-single-layout-mismatch.tesc: skip
spec/arb_enhanced_layouts/compiler/duplicate-layout-qualifier-identifiers/multiple-vertices-identifiers-in-single-layout.tesc: skip
spec/arb_enhanced_layouts/preprocessor/disabled-defined-core.comp: skip
spec/arb_enhanced_layouts/preprocessor/disabled-defined-core.frag: skip
spec/arb_enhanced_layouts/preprocessor/disabled-defined-core.geom: skip
@@ -426,8 +400,6 @@ spec/arb_enhanced_layouts/preprocessor/disabled-undefined-core.geom: skip
spec/arb_enhanced_layouts/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_enhanced_layouts/preprocessor/disabled-undefined-core.tese: skip
spec/arb_enhanced_layouts/preprocessor/disabled-undefined-core.vert: skip
spec/arb_enhanced_layouts/preprocessor/enabled-core.tesc: skip
spec/arb_enhanced_layouts/preprocessor/enabled-core.tese: skip
spec/arb_es3_1_compatibility/preprocessor/disabled-defined-core.comp: skip
spec/arb_es3_1_compatibility/preprocessor/disabled-defined-core.frag: skip
spec/arb_es3_1_compatibility/preprocessor/disabled-defined-core.geom: skip
@@ -462,8 +434,6 @@ spec/arb_explicit_attrib_location/preprocessor/disabled-undefined-core.geom: ski
spec/arb_explicit_attrib_location/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_explicit_attrib_location/preprocessor/disabled-undefined-core.tese: skip
spec/arb_explicit_attrib_location/preprocessor/disabled-undefined-core.vert: skip
spec/arb_explicit_attrib_location/preprocessor/enabled-core.tesc: skip
spec/arb_explicit_attrib_location/preprocessor/enabled-core.tese: skip
spec/arb_explicit_uniform_location/preprocessor/disabled-defined-compat.frag: skip
spec/arb_explicit_uniform_location/preprocessor/disabled-defined-compat.vert: skip
spec/arb_explicit_uniform_location/preprocessor/disabled-defined-core.comp: skip
@@ -480,8 +450,6 @@ spec/arb_explicit_uniform_location/preprocessor/disabled-undefined-core.geom: sk
spec/arb_explicit_uniform_location/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_explicit_uniform_location/preprocessor/disabled-undefined-core.tese: skip
spec/arb_explicit_uniform_location/preprocessor/disabled-undefined-core.vert: skip
spec/arb_explicit_uniform_location/preprocessor/enabled-core.tesc: skip
spec/arb_explicit_uniform_location/preprocessor/enabled-core.tese: skip
spec/arb_fragment_coord_conventions/preprocessor/disabled-defined-compat.frag: skip
spec/arb_fragment_coord_conventions/preprocessor/disabled-defined-compat.vert: skip
spec/arb_fragment_coord_conventions/preprocessor/disabled-defined-core.comp: skip
@@ -498,8 +466,6 @@ spec/arb_fragment_coord_conventions/preprocessor/disabled-undefined-core.geom: s
spec/arb_fragment_coord_conventions/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_fragment_coord_conventions/preprocessor/disabled-undefined-core.tese: skip
spec/arb_fragment_coord_conventions/preprocessor/disabled-undefined-core.vert: skip
spec/arb_fragment_coord_conventions/preprocessor/enabled-core.tesc: skip
spec/arb_fragment_coord_conventions/preprocessor/enabled-core.tese: skip
spec/arb_fragment_layer_viewport/preprocessor/disabled-defined-core.comp: skip
spec/arb_fragment_layer_viewport/preprocessor/disabled-defined-core.frag: skip
spec/arb_fragment_layer_viewport/preprocessor/disabled-defined-core.geom: skip
@@ -512,8 +478,6 @@ spec/arb_fragment_layer_viewport/preprocessor/disabled-undefined-core.geom: skip
spec/arb_fragment_layer_viewport/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_fragment_layer_viewport/preprocessor/disabled-undefined-core.tese: skip
spec/arb_fragment_layer_viewport/preprocessor/disabled-undefined-core.vert: skip
spec/arb_fragment_layer_viewport/preprocessor/enabled-core.tesc: skip
spec/arb_fragment_layer_viewport/preprocessor/enabled-core.tese: skip
spec/arb_fragment_shader_interlock/compiler/begininvocationinterlock-after-discard.frag: skip
spec/arb_fragment_shader_interlock/compiler/begininvocationinterlock-after-return.frag: skip
spec/arb_fragment_shader_interlock/compiler/begininvocationinterlock-endinvocationinterlock.frag: skip
@@ -558,10 +522,6 @@ spec/arb_geometry_shader4/compiler/sanity.geom: skip
spec/arb_geometry_shader4/compiler/uniforms.geom: skip
spec/arb_geometry_shader4/compiler/verticesin-const-expression.geom: skip
spec/arb_geometry_shader4/compiler/verticesin-const.geom: skip
spec/arb_geometry_shader4/preprocessor/disabled-defined-core.tesc: skip
spec/arb_geometry_shader4/preprocessor/disabled-defined-core.tese: skip
spec/arb_geometry_shader4/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_geometry_shader4/preprocessor/disabled-undefined-core.tese: skip
spec/arb_geometry_shader4/preprocessor/enabled-compat.frag: skip
spec/arb_geometry_shader4/preprocessor/enabled-compat.vert: skip
spec/arb_geometry_shader4/preprocessor/enabled-core.comp: skip
@@ -660,10 +620,6 @@ spec/arb_gpu_shader5/compiler/stream-qualifier/incorrect-in-layout-qualifier-str
spec/arb_gpu_shader5/compiler/stream-qualifier/incorrect-multiple-block-layout-qualifier-stream.geom: skip
spec/arb_gpu_shader5/compiler/stream-qualifier/incorrect-multiple-named-block-layout-qualifier-stream.geom: skip
spec/arb_gpu_shader5/compiler/stream-qualifier/incorrect-negative-layout-qualifier-stream.geom: skip
spec/arb_gpu_shader5/preprocessor/disabled-defined-core.tesc: skip
spec/arb_gpu_shader5/preprocessor/disabled-defined-core.tese: skip
spec/arb_gpu_shader5/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_gpu_shader5/preprocessor/disabled-undefined-core.tese: skip
spec/arb_gpu_shader5/preprocessor/enabled-core.comp: skip
spec/arb_gpu_shader5/preprocessor/enabled-core.frag: skip
spec/arb_gpu_shader5/preprocessor/enabled-core.geom: skip
@@ -682,8 +638,6 @@ spec/arb_gpu_shader_fp64/preprocessor/disabled-undefined-core.geom: skip
spec/arb_gpu_shader_fp64/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_gpu_shader_fp64/preprocessor/disabled-undefined-core.tese: skip
spec/arb_gpu_shader_fp64/preprocessor/disabled-undefined-core.vert: skip
spec/arb_gpu_shader_fp64/preprocessor/enabled-core.tesc: skip
spec/arb_gpu_shader_fp64/preprocessor/enabled-core.tese: skip
spec/arb_gpu_shader_int64/compiler/built-in-functions/abs-i64vec2.frag: skip
spec/arb_gpu_shader_int64/compiler/built-in-functions/abs-i64vec2.geom: skip
spec/arb_gpu_shader_int64/compiler/built-in-functions/abs-i64vec2.vert: skip
@@ -1186,10 +1140,6 @@ spec/arb_sample_shading/compiler/gl_numsamples.frag: skip
spec/arb_sample_shading/compiler/gl_sampleid.frag: skip
spec/arb_sample_shading/compiler/gl_samplemask.frag: skip
spec/arb_sample_shading/compiler/gl_sampleposition.frag: skip
spec/arb_sample_shading/preprocessor/disabled-defined-core.tesc: skip
spec/arb_sample_shading/preprocessor/disabled-defined-core.tese: skip
spec/arb_sample_shading/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_sample_shading/preprocessor/disabled-undefined-core.tese: skip
spec/arb_sample_shading/preprocessor/enabled-compat.frag: skip
spec/arb_sample_shading/preprocessor/enabled-compat.vert: skip
spec/arb_sample_shading/preprocessor/enabled-core.comp: skip
@@ -1214,8 +1164,6 @@ spec/arb_separate_shader_objects/preprocessor/disabled-undefined-core.geom: skip
spec/arb_separate_shader_objects/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_separate_shader_objects/preprocessor/disabled-undefined-core.tese: skip
spec/arb_separate_shader_objects/preprocessor/disabled-undefined-core.vert: skip
spec/arb_separate_shader_objects/preprocessor/enabled-core.tesc: skip
spec/arb_separate_shader_objects/preprocessor/enabled-core.tese: skip
spec/arb_shader_atomic_counter_ops/preprocessor/disabled-defined-core.comp: skip
spec/arb_shader_atomic_counter_ops/preprocessor/disabled-defined-core.frag: skip
spec/arb_shader_atomic_counter_ops/preprocessor/disabled-defined-core.geom: skip
@@ -1228,8 +1176,6 @@ spec/arb_shader_atomic_counter_ops/preprocessor/disabled-undefined-core.geom: sk
spec/arb_shader_atomic_counter_ops/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_atomic_counter_ops/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_atomic_counter_ops/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_atomic_counter_ops/preprocessor/enabled-core.tesc: skip
spec/arb_shader_atomic_counter_ops/preprocessor/enabled-core.tese: skip
spec/arb_shader_atomic_counters/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shader_atomic_counters/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shader_atomic_counters/preprocessor/disabled-defined-core.comp: skip
@@ -1246,8 +1192,6 @@ spec/arb_shader_atomic_counters/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_atomic_counters/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_atomic_counters/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_atomic_counters/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_atomic_counters/preprocessor/enabled-core.tesc: skip
spec/arb_shader_atomic_counters/preprocessor/enabled-core.tese: skip
spec/arb_shader_bit_encoding/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shader_bit_encoding/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shader_bit_encoding/preprocessor/disabled-defined-core.comp: skip
@@ -1264,12 +1208,6 @@ spec/arb_shader_bit_encoding/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_bit_encoding/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_bit_encoding/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_bit_encoding/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_bit_encoding/preprocessor/enabled-core.tesc: skip
spec/arb_shader_bit_encoding/preprocessor/enabled-core.tese: skip
spec/arb_shader_clock/preprocessor/disabled-defined-core.tesc: skip
spec/arb_shader_clock/preprocessor/disabled-defined-core.tese: skip
spec/arb_shader_clock/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_clock/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_clock/preprocessor/enabled-compat.frag: skip
spec/arb_shader_clock/preprocessor/enabled-compat.vert: skip
spec/arb_shader_clock/preprocessor/enabled-core.comp: skip
@@ -1290,8 +1228,6 @@ spec/arb_shader_draw_parameters/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_draw_parameters/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_draw_parameters/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_draw_parameters/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_draw_parameters/preprocessor/enabled-core.tesc: skip
spec/arb_shader_draw_parameters/preprocessor/enabled-core.tese: skip
spec/arb_shader_group_vote/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shader_group_vote/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shader_group_vote/preprocessor/disabled-defined-core.comp: skip
@@ -1308,8 +1244,6 @@ spec/arb_shader_group_vote/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_group_vote/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_group_vote/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_group_vote/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_group_vote/preprocessor/enabled-core.tesc: skip
spec/arb_shader_group_vote/preprocessor/enabled-core.tese: skip
spec/arb_shader_image_load_store/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shader_image_load_store/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shader_image_load_store/preprocessor/disabled-defined-core.comp: skip
@@ -1326,8 +1260,6 @@ spec/arb_shader_image_load_store/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_image_load_store/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_image_load_store/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_image_load_store/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_image_load_store/preprocessor/enabled-core.tesc: skip
spec/arb_shader_image_load_store/preprocessor/enabled-core.tese: skip
spec/arb_shader_image_size/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shader_image_size/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shader_image_size/preprocessor/disabled-defined-core.comp: skip
@@ -1344,12 +1276,6 @@ spec/arb_shader_image_size/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_image_size/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_image_size/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_image_size/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_image_size/preprocessor/enabled-core.tesc: skip
spec/arb_shader_image_size/preprocessor/enabled-core.tese: skip
spec/arb_shader_precision/preprocessor/disabled-defined-core.tesc: skip
spec/arb_shader_precision/preprocessor/disabled-defined-core.tese: skip
spec/arb_shader_precision/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_precision/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_precision/preprocessor/enabled-compat.frag: skip
spec/arb_shader_precision/preprocessor/enabled-compat.vert: skip
spec/arb_shader_precision/preprocessor/enabled-core.comp: skip
@@ -1374,8 +1300,6 @@ spec/arb_shader_stencil_export/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_stencil_export/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_stencil_export/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_stencil_export/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_stencil_export/preprocessor/enabled-core.tesc: skip
spec/arb_shader_stencil_export/preprocessor/enabled-core.tese: skip
spec/arb_shader_storage_buffer_object/compiler/unused-array-element.comp: skip
spec/arb_shader_storage_buffer_object/compiler/unused-array-element.frag: skip
spec/arb_shader_storage_buffer_object/preprocessor/disabled-defined-compat.frag: skip
@@ -1394,8 +1318,6 @@ spec/arb_shader_storage_buffer_object/preprocessor/disabled-undefined-core.geom:
spec/arb_shader_storage_buffer_object/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_storage_buffer_object/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_storage_buffer_object/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_storage_buffer_object/preprocessor/enabled-core.tesc: skip
spec/arb_shader_storage_buffer_object/preprocessor/enabled-core.tese: skip
spec/arb_shader_subroutine/preprocessor/disabled-defined-core.comp: skip
spec/arb_shader_subroutine/preprocessor/disabled-defined-core.frag: skip
spec/arb_shader_subroutine/preprocessor/disabled-defined-core.geom: skip
@@ -1408,15 +1330,9 @@ spec/arb_shader_subroutine/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_subroutine/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_subroutine/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_subroutine/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_subroutine/preprocessor/enabled-core.tesc: skip
spec/arb_shader_subroutine/preprocessor/enabled-core.tese: skip
spec/arb_shader_texture_image_samples/compiler/fs-image-samples.frag: skip
spec/arb_shader_texture_image_samples/compiler/fs-texture-samples.frag: skip
spec/arb_shader_texture_image_samples/compiler/vs-texture-samples.vert: skip
spec/arb_shader_texture_image_samples/preprocessor/disabled-defined-core.tesc: skip
spec/arb_shader_texture_image_samples/preprocessor/disabled-defined-core.tese: skip
spec/arb_shader_texture_image_samples/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_texture_image_samples/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_texture_image_samples/preprocessor/enabled-compat.frag: skip
spec/arb_shader_texture_image_samples/preprocessor/enabled-compat.vert: skip
spec/arb_shader_texture_image_samples/preprocessor/enabled-core.comp: skip
@@ -1441,8 +1357,6 @@ spec/arb_shader_texture_lod/preprocessor/disabled-undefined-core.geom: skip
spec/arb_shader_texture_lod/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shader_texture_lod/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shader_texture_lod/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shader_texture_lod/preprocessor/enabled-core.tesc: skip
spec/arb_shader_texture_lod/preprocessor/enabled-core.tese: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-input-non-value-layout-qualifier-in-single-declaration-1.geom: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-input-non-value-layout-qualifier-in-single-declaration-2.geom: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-input-value-layout-qualifier-in-single-declaration-3.geom: skip
@@ -1452,8 +1366,6 @@ spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-stream-qua
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-stream-qualifier-in-single-declaration-no-420-pack.geom: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-stream-qualifier-in-single-global-declaration-420-pack.geom: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-stream-qualifier-in-single-global-declaration-no-420-pack.geom: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-vertices-in-single-declaration-mismatch.tesc: skip
spec/arb_shading_language_420pack/compiler/layout-qualifiers/multiple-vertices-in-single-declaration.tesc: skip
spec/arb_shading_language_420pack/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shading_language_420pack/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shading_language_420pack/preprocessor/disabled-defined-core.comp: skip
@@ -1470,8 +1382,6 @@ spec/arb_shading_language_420pack/preprocessor/disabled-undefined-core.geom: ski
spec/arb_shading_language_420pack/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shading_language_420pack/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shading_language_420pack/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shading_language_420pack/preprocessor/enabled-core.tesc: skip
spec/arb_shading_language_420pack/preprocessor/enabled-core.tese: skip
spec/arb_shading_language_packing/preprocessor/disabled-defined-compat.frag: skip
spec/arb_shading_language_packing/preprocessor/disabled-defined-compat.vert: skip
spec/arb_shading_language_packing/preprocessor/disabled-defined-core.comp: skip
@@ -1488,67 +1398,18 @@ spec/arb_shading_language_packing/preprocessor/disabled-undefined-core.geom: ski
spec/arb_shading_language_packing/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_shading_language_packing/preprocessor/disabled-undefined-core.tese: skip
spec/arb_shading_language_packing/preprocessor/disabled-undefined-core.vert: skip
spec/arb_shading_language_packing/preprocessor/enabled-core.tesc: skip
spec/arb_shading_language_packing/preprocessor/enabled-core.tese: skip
spec/arb_tessellation_shader/compiler/barrier-for.tesc: skip
spec/arb_tessellation_shader/compiler/barrier-func.tesc: skip
spec/arb_tessellation_shader/compiler/barrier-if.tesc: skip
spec/arb_tessellation_shader/compiler/barrier-redeclared.tesc: skip
spec/arb_tessellation_shader/compiler/barrier-return.tesc: skip
spec/arb_tessellation_shader/compiler/barrier-switch-always.tesc: skip
spec/arb_tessellation_shader/compiler/barrier-switch.tesc: skip
spec/arb_tessellation_shader/compiler/barrier.tesc: skip
spec/arb_tessellation_shader/compiler/barrier.tese: skip
spec/arb_tessellation_shader/compiler/custom-block-out-indexing-const.tesc: skip
spec/arb_tessellation_shader/compiler/custom-in-length.tesc: skip
spec/arb_tessellation_shader/compiler/custom-in-length.tese: skip
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spec/arb_tessellation_shader/compiler/gl_out-indexing-uniform.tesc: skip
spec/arb_tessellation_shader/compiler/gl_out-indexing-writemask.tesc: skip
spec/arb_tessellation_shader/compiler/gl_out-length-before-declared.tesc: skip
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spec/arb_tessellation_shader/compiler/input-block-must-be-array-unnamed.tesc: skip
spec/arb_tessellation_shader/compiler/input-block-must-be-array-unnamed.tese: skip
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spec/arb_tessellation_shader/compiler/input-must-be-array.tese: skip
spec/arb_tessellation_shader/compiler/layout-multiple-qualifier-declarations-vertices-mismatch.tesc: skip
spec/arb_tessellation_shader/compiler/layout-multiple-qualifier-declarations-vertices.tesc: skip
spec/arb_tessellation_shader/compiler/no-input-layout.tese: skip
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spec/arb_tessellation_shader/compiler/output-block-must-be-array-unnamed.tesc: skip
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spec/arb_tessellation_shader/compiler/output-must-be-array.tesc: skip
spec/arb_tessellation_shader/compiler/output-size-mismatch.tesc: skip
spec/arb_tessellation_shader/compiler/redeclaring-gl_out-junk-member.tesc: skip
spec/arb_tessellation_shader/compiler/redeclaring-gl_out-must-be-array.tesc: skip
spec/arb_tessellation_shader/compiler/redeclaring-gl_out-no-instance-name.tesc: skip
spec/arb_tessellation_shader/compiler/redeclaring-gl_out-ok.tesc: skip
spec/arb_tessellation_shader/compiler/sanity.tesc: skip
spec/arb_tessellation_shader/compiler/sanity.tese: skip
spec/arb_tessellation_shader/compiler/uniform-block-non-array.tesc: skip
spec/arb_tessellation_shader/preprocessor/disabled-defined-core.comp: skip
spec/arb_tessellation_shader/preprocessor/disabled-defined-core.frag: skip
spec/arb_tessellation_shader/preprocessor/disabled-defined-core.geom: skip
spec/arb_tessellation_shader/preprocessor/disabled-defined-core.tesc: skip
spec/arb_tessellation_shader/preprocessor/disabled-defined-core.tese: skip
spec/arb_tessellation_shader/preprocessor/disabled-defined-core.vert: skip
spec/arb_tessellation_shader/preprocessor/disabled-undefined-core.comp: skip
spec/arb_tessellation_shader/preprocessor/disabled-undefined-core.frag: skip
spec/arb_tessellation_shader/preprocessor/disabled-undefined-core.geom: skip
spec/arb_tessellation_shader/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_tessellation_shader/preprocessor/disabled-undefined-core.tese: skip
spec/arb_tessellation_shader/preprocessor/enabled-core.comp: skip
spec/arb_tessellation_shader/preprocessor/enabled-core.frag: skip
spec/arb_tessellation_shader/preprocessor/enabled-core.geom: skip
spec/arb_tessellation_shader/preprocessor/enabled-core.tesc: skip
spec/arb_tessellation_shader/preprocessor/enabled-core.tese: skip
spec/arb_tessellation_shader/preprocessor/enabled-core.vert: skip
spec/arb_tessellation_shader/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_cube_map_array/preprocessor/disabled-defined-compat.frag: skip
spec/arb_texture_cube_map_array/preprocessor/disabled-defined-compat.vert: skip
spec/arb_texture_cube_map_array/preprocessor/disabled-defined-core.comp: skip
@@ -1565,8 +1426,6 @@ spec/arb_texture_cube_map_array/preprocessor/disabled-undefined-core.geom: skip
spec/arb_texture_cube_map_array/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_texture_cube_map_array/preprocessor/disabled-undefined-core.tese: skip
spec/arb_texture_cube_map_array/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_cube_map_array/preprocessor/enabled-core.tesc: skip
spec/arb_texture_cube_map_array/preprocessor/enabled-core.tese: skip
spec/arb_texture_gather/preprocessor/disabled-defined-compat.frag: skip
spec/arb_texture_gather/preprocessor/disabled-defined-compat.vert: skip
spec/arb_texture_gather/preprocessor/disabled-defined-core.comp: skip
@@ -1583,8 +1442,6 @@ spec/arb_texture_gather/preprocessor/disabled-undefined-core.geom: skip
spec/arb_texture_gather/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_texture_gather/preprocessor/disabled-undefined-core.tese: skip
spec/arb_texture_gather/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_gather/preprocessor/enabled-core.tesc: skip
spec/arb_texture_gather/preprocessor/enabled-core.tese: skip
spec/arb_texture_multisample/preprocessor/disabled-defined-compat.frag: skip
spec/arb_texture_multisample/preprocessor/disabled-defined-compat.vert: skip
spec/arb_texture_multisample/preprocessor/disabled-defined-core.comp: skip
@@ -1601,8 +1458,6 @@ spec/arb_texture_multisample/preprocessor/disabled-undefined-core.geom: skip
spec/arb_texture_multisample/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_texture_multisample/preprocessor/disabled-undefined-core.tese: skip
spec/arb_texture_multisample/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_multisample/preprocessor/enabled-core.tesc: skip
spec/arb_texture_multisample/preprocessor/enabled-core.tese: skip
spec/arb_texture_query_levels/preprocessor/disabled-defined-compat.frag: skip
spec/arb_texture_query_levels/preprocessor/disabled-defined-compat.vert: skip
spec/arb_texture_query_levels/preprocessor/disabled-defined-core.comp: skip
@@ -1619,8 +1474,6 @@ spec/arb_texture_query_levels/preprocessor/disabled-undefined-core.geom: skip
spec/arb_texture_query_levels/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_texture_query_levels/preprocessor/disabled-undefined-core.tese: skip
spec/arb_texture_query_levels/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_query_levels/preprocessor/enabled-core.tesc: skip
spec/arb_texture_query_levels/preprocessor/enabled-core.tese: skip
spec/arb_texture_query_lod/preprocessor/disabled-defined-compat.frag: skip
spec/arb_texture_query_lod/preprocessor/disabled-defined-compat.vert: skip
spec/arb_texture_query_lod/preprocessor/disabled-defined-core.comp: skip
@@ -1637,8 +1490,6 @@ spec/arb_texture_query_lod/preprocessor/disabled-undefined-core.geom: skip
spec/arb_texture_query_lod/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_texture_query_lod/preprocessor/disabled-undefined-core.tese: skip
spec/arb_texture_query_lod/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_query_lod/preprocessor/enabled-core.tesc: skip
spec/arb_texture_query_lod/preprocessor/enabled-core.tese: skip
spec/arb_texture_rectangle/preprocessor/disabled-defined-compat.frag: skip
spec/arb_texture_rectangle/preprocessor/disabled-defined-compat.vert: skip
spec/arb_texture_rectangle/preprocessor/disabled-defined-core.comp: skip
@@ -1655,8 +1506,6 @@ spec/arb_texture_rectangle/preprocessor/disabled-undefined-core.geom: skip
spec/arb_texture_rectangle/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_texture_rectangle/preprocessor/disabled-undefined-core.tese: skip
spec/arb_texture_rectangle/preprocessor/disabled-undefined-core.vert: skip
spec/arb_texture_rectangle/preprocessor/enabled-core.tesc: skip
spec/arb_texture_rectangle/preprocessor/enabled-core.tese: skip
spec/arb_uniform_buffer_object/preprocessor/disabled-defined-compat.frag: skip
spec/arb_uniform_buffer_object/preprocessor/disabled-defined-compat.vert: skip
spec/arb_uniform_buffer_object/preprocessor/disabled-defined-core.comp: skip
@@ -1673,8 +1522,6 @@ spec/arb_uniform_buffer_object/preprocessor/disabled-undefined-core.geom: skip
spec/arb_uniform_buffer_object/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_uniform_buffer_object/preprocessor/disabled-undefined-core.tese: skip
spec/arb_uniform_buffer_object/preprocessor/disabled-undefined-core.vert: skip
spec/arb_uniform_buffer_object/preprocessor/enabled-core.tesc: skip
spec/arb_uniform_buffer_object/preprocessor/enabled-core.tese: skip
spec/arb_vertex_attrib_64bit/preprocessor/disabled-defined-core.comp: skip
spec/arb_vertex_attrib_64bit/preprocessor/disabled-defined-core.frag: skip
spec/arb_vertex_attrib_64bit/preprocessor/disabled-defined-core.geom: skip
@@ -1687,8 +1534,6 @@ spec/arb_vertex_attrib_64bit/preprocessor/disabled-undefined-core.geom: skip
spec/arb_vertex_attrib_64bit/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_vertex_attrib_64bit/preprocessor/disabled-undefined-core.tese: skip
spec/arb_vertex_attrib_64bit/preprocessor/disabled-undefined-core.vert: skip
spec/arb_vertex_attrib_64bit/preprocessor/enabled-core.tesc: skip
spec/arb_vertex_attrib_64bit/preprocessor/enabled-core.tese: skip
spec/arb_viewport_array/preprocessor/disabled-defined-compat.frag: skip
spec/arb_viewport_array/preprocessor/disabled-defined-compat.vert: skip
spec/arb_viewport_array/preprocessor/disabled-defined-core.comp: skip
@@ -1705,8 +1550,6 @@ spec/arb_viewport_array/preprocessor/disabled-undefined-core.geom: skip
spec/arb_viewport_array/preprocessor/disabled-undefined-core.tesc: skip
spec/arb_viewport_array/preprocessor/disabled-undefined-core.tese: skip
spec/arb_viewport_array/preprocessor/disabled-undefined-core.vert: skip
spec/arb_viewport_array/preprocessor/enabled-core.tesc: skip
spec/arb_viewport_array/preprocessor/enabled-core.tese: skip
spec/ext_clip_cull_distance/preprocessor/disabled-defined-es.comp: skip
spec/ext_clip_cull_distance/preprocessor/disabled-defined-es.frag: skip
spec/ext_clip_cull_distance/preprocessor/disabled-defined-es.geom: skip
@@ -1720,8 +1563,6 @@ spec/ext_clip_cull_distance/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_clip_cull_distance/preprocessor/disabled-undefined-es.tese: skip
spec/ext_clip_cull_distance/preprocessor/disabled-undefined-es.vert: skip
spec/ext_clip_cull_distance/preprocessor/enabled-es.geom: skip
spec/ext_clip_cull_distance/preprocessor/enabled-es.tesc: skip
spec/ext_clip_cull_distance/preprocessor/enabled-es.tese: skip
spec/ext_demote_to_helper_invocation/compiler/demote_identifier_with_ext.frag: skip
spec/ext_demote_to_helper_invocation/compiler/demote_keyword.frag: skip
spec/ext_demote_to_helper_invocation/compiler/is_helper_invocation_builtin.frag: skip
@@ -1738,14 +1579,8 @@ spec/ext_draw_buffers/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_draw_buffers/preprocessor/disabled-undefined-es.tese: skip
spec/ext_draw_buffers/preprocessor/disabled-undefined-es.vert: skip
spec/ext_draw_buffers/preprocessor/enabled-es.geom: skip
spec/ext_draw_buffers/preprocessor/enabled-es.tesc: skip
spec/ext_draw_buffers/preprocessor/enabled-es.tese: skip
spec/ext_geometry_point_size/preprocessor/disabled-defined-es.geom: skip
spec/ext_geometry_point_size/preprocessor/disabled-defined-es.tesc: skip
spec/ext_geometry_point_size/preprocessor/disabled-defined-es.tese: skip
spec/ext_geometry_point_size/preprocessor/disabled-undefined-es.geom: skip
spec/ext_geometry_point_size/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_geometry_point_size/preprocessor/disabled-undefined-es.tese: skip
spec/ext_geometry_point_size/preprocessor/enabled-es.comp: skip
spec/ext_geometry_point_size/preprocessor/enabled-es.frag: skip
spec/ext_geometry_point_size/preprocessor/enabled-es.geom: skip
@@ -1753,11 +1588,7 @@ spec/ext_geometry_point_size/preprocessor/enabled-es.tesc: skip
spec/ext_geometry_point_size/preprocessor/enabled-es.tese: skip
spec/ext_geometry_point_size/preprocessor/enabled-es.vert: skip
spec/ext_geometry_shader/preprocessor/disabled-defined-es.geom: skip
spec/ext_geometry_shader/preprocessor/disabled-defined-es.tesc: skip
spec/ext_geometry_shader/preprocessor/disabled-defined-es.tese: skip
spec/ext_geometry_shader/preprocessor/disabled-undefined-es.geom: skip
spec/ext_geometry_shader/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_geometry_shader/preprocessor/disabled-undefined-es.tese: skip
spec/ext_geometry_shader/preprocessor/enabled-es.comp: skip
spec/ext_geometry_shader/preprocessor/enabled-es.frag: skip
spec/ext_geometry_shader/preprocessor/enabled-es.geom: skip
@@ -2797,11 +2628,7 @@ spec/ext_gpu_shader4/compiler/xor-uvec4-unsigned_int.vert: skip
spec/ext_gpu_shader4/compiler/xor-uvec4-uvec4.frag: skip
spec/ext_gpu_shader4/compiler/xor-uvec4-uvec4.vert: skip
spec/ext_gpu_shader5/preprocessor/disabled-defined-es.geom: skip
spec/ext_gpu_shader5/preprocessor/disabled-defined-es.tesc: skip
spec/ext_gpu_shader5/preprocessor/disabled-defined-es.tese: skip
spec/ext_gpu_shader5/preprocessor/disabled-undefined-es.geom: skip
spec/ext_gpu_shader5/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_gpu_shader5/preprocessor/disabled-undefined-es.tese: skip
spec/ext_gpu_shader5/preprocessor/enabled-es.comp: skip
spec/ext_gpu_shader5/preprocessor/enabled-es.frag: skip
spec/ext_gpu_shader5/preprocessor/enabled-es.geom: skip
@@ -2821,8 +2648,6 @@ spec/ext_separate_shader_objects/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_separate_shader_objects/preprocessor/disabled-undefined-es.tese: skip
spec/ext_separate_shader_objects/preprocessor/disabled-undefined-es.vert: skip
spec/ext_separate_shader_objects/preprocessor/enabled-es.geom: skip
spec/ext_separate_shader_objects/preprocessor/enabled-es.tesc: skip
spec/ext_separate_shader_objects/preprocessor/enabled-es.tese: skip
spec/ext_shader_framebuffer_fetch/compiler/gles2/negative-gl_lastfragdata-write.frag: skip
spec/ext_shader_framebuffer_fetch/compiler/gles2/negative-inout-fragment-output.frag: skip
spec/ext_shader_framebuffer_fetch/compiler/gles2/negative-output-layout.frag: skip
@@ -2850,8 +2675,6 @@ spec/ext_shader_io_blocks/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_shader_io_blocks/preprocessor/disabled-undefined-es.tese: skip
spec/ext_shader_io_blocks/preprocessor/disabled-undefined-es.vert: skip
spec/ext_shader_io_blocks/preprocessor/enabled-es.geom: skip
spec/ext_shader_io_blocks/preprocessor/enabled-es.tesc: skip
spec/ext_shader_io_blocks/preprocessor/enabled-es.tese: skip
spec/ext_shader_samples_identical/glsl-1.10/compiler/all-functions.frag: skip
spec/ext_shader_samples_identical/glsl-1.10/compiler/all-functions.vert: skip
spec/ext_shader_samples_identical/glsl-1.50/compiler/all-functions.frag: skip
@@ -2859,16 +2682,8 @@ spec/ext_shader_samples_identical/glsl-1.50/compiler/all-functions.geom: skip
spec/ext_shader_samples_identical/glsl-1.50/compiler/all-functions.vert: skip
spec/ext_shader_samples_identical/glsl-es-3.10/compiler/all-functions.frag: skip
spec/ext_shader_samples_identical/glsl-es-3.10/compiler/all-functions.vert: skip
spec/ext_shader_samples_identical/preprocessor/disabled-defined-core.tesc: skip
spec/ext_shader_samples_identical/preprocessor/disabled-defined-core.tese: skip
spec/ext_shader_samples_identical/preprocessor/disabled-defined-es.geom: skip
spec/ext_shader_samples_identical/preprocessor/disabled-defined-es.tesc: skip
spec/ext_shader_samples_identical/preprocessor/disabled-defined-es.tese: skip
spec/ext_shader_samples_identical/preprocessor/disabled-undefined-core.tesc: skip
spec/ext_shader_samples_identical/preprocessor/disabled-undefined-core.tese: skip
spec/ext_shader_samples_identical/preprocessor/disabled-undefined-es.geom: skip
spec/ext_shader_samples_identical/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_shader_samples_identical/preprocessor/disabled-undefined-es.tese: skip
spec/ext_shader_samples_identical/preprocessor/enabled-compat.frag: skip
spec/ext_shader_samples_identical/preprocessor/enabled-compat.vert: skip
spec/ext_shader_samples_identical/preprocessor/enabled-core.comp: skip
@@ -2899,8 +2714,6 @@ spec/ext_texture_array/preprocessor/disabled-undefined-core.geom: skip
spec/ext_texture_array/preprocessor/disabled-undefined-core.tesc: skip
spec/ext_texture_array/preprocessor/disabled-undefined-core.tese: skip
spec/ext_texture_array/preprocessor/disabled-undefined-core.vert: skip
spec/ext_texture_array/preprocessor/enabled-core.tesc: skip
spec/ext_texture_array/preprocessor/enabled-core.tese: skip
spec/ext_texture_buffer/preprocessor/disabled-defined-es.comp: skip
spec/ext_texture_buffer/preprocessor/disabled-defined-es.frag: skip
spec/ext_texture_buffer/preprocessor/disabled-defined-es.geom: skip
@@ -2914,8 +2727,6 @@ spec/ext_texture_buffer/preprocessor/disabled-undefined-es.tesc: skip
spec/ext_texture_buffer/preprocessor/disabled-undefined-es.tese: skip
spec/ext_texture_buffer/preprocessor/disabled-undefined-es.vert: skip
spec/ext_texture_buffer/preprocessor/enabled-es.geom: skip
spec/ext_texture_buffer/preprocessor/enabled-es.tesc: skip
spec/ext_texture_buffer/preprocessor/enabled-es.tese: skip
spec/ext_texture_shadow_lod/compiler/negative_compile.frag: skip
spec/ext_texture_shadow_lod/compiler/sampler2darray.frag: skip
spec/ext_texture_shadow_lod/compiler/samplercube.frag: skip
@@ -4906,8 +4717,6 @@ spec/nv_image_formats/preprocessor/disabled-undefined-es.tesc: skip
spec/nv_image_formats/preprocessor/disabled-undefined-es.tese: skip
spec/nv_image_formats/preprocessor/disabled-undefined-es.vert: skip
spec/nv_image_formats/preprocessor/enabled-es.geom: skip
spec/nv_image_formats/preprocessor/enabled-es.tesc: skip
spec/nv_image_formats/preprocessor/enabled-es.tese: skip
spec/nv_shader_atomic_float/compiler/imageatomicadd-float-image1d.frag: skip
spec/nv_shader_atomic_float/compiler/imageatomicadd-float-image1darray.frag: skip
spec/nv_shader_atomic_float/compiler/imageatomicadd-float-image2d-fail.frag: skip
@@ -4937,11 +4746,7 @@ spec/nv_shader_atomic_float/compiler/shared-atomicexchange-float-fail.comp: skip
spec/nv_shader_atomic_float/compiler/ssbo-atomicadd-float-fail.frag: skip
spec/nv_shader_atomic_float/compiler/ssbo-atomicexchange-float-fail.frag: skip
spec/oes_blend_func_extended/preprocessor/disabled-defined-es.geom: skip
spec/oes_blend_func_extended/preprocessor/disabled-defined-es.tesc: skip
spec/oes_blend_func_extended/preprocessor/disabled-defined-es.tese: skip
spec/oes_blend_func_extended/preprocessor/disabled-undefined-es.geom: skip
spec/oes_blend_func_extended/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_blend_func_extended/preprocessor/disabled-undefined-es.tese: skip
spec/oes_blend_func_extended/preprocessor/enabled-es.comp: skip
spec/oes_blend_func_extended/preprocessor/enabled-es.frag: skip
spec/oes_blend_func_extended/preprocessor/enabled-es.geom: skip
@@ -4961,14 +4766,8 @@ spec/oes_egl_image_external/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_egl_image_external/preprocessor/disabled-undefined-es.tese: skip
spec/oes_egl_image_external/preprocessor/disabled-undefined-es.vert: skip
spec/oes_egl_image_external/preprocessor/enabled-es.geom: skip
spec/oes_egl_image_external/preprocessor/enabled-es.tesc: skip
spec/oes_egl_image_external/preprocessor/enabled-es.tese: skip
spec/oes_geometry_point_size/preprocessor/disabled-defined-es.geom: skip
spec/oes_geometry_point_size/preprocessor/disabled-defined-es.tesc: skip
spec/oes_geometry_point_size/preprocessor/disabled-defined-es.tese: skip
spec/oes_geometry_point_size/preprocessor/disabled-undefined-es.geom: skip
spec/oes_geometry_point_size/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_geometry_point_size/preprocessor/disabled-undefined-es.tese: skip
spec/oes_geometry_point_size/preprocessor/enabled-es.comp: skip
spec/oes_geometry_point_size/preprocessor/enabled-es.frag: skip
spec/oes_geometry_point_size/preprocessor/enabled-es.geom: skip
@@ -4976,11 +4775,7 @@ spec/oes_geometry_point_size/preprocessor/enabled-es.tesc: skip
spec/oes_geometry_point_size/preprocessor/enabled-es.tese: skip
spec/oes_geometry_point_size/preprocessor/enabled-es.vert: skip
spec/oes_geometry_shader/preprocessor/disabled-defined-es.geom: skip
spec/oes_geometry_shader/preprocessor/disabled-defined-es.tesc: skip
spec/oes_geometry_shader/preprocessor/disabled-defined-es.tese: skip
spec/oes_geometry_shader/preprocessor/disabled-undefined-es.geom: skip
spec/oes_geometry_shader/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_geometry_shader/preprocessor/disabled-undefined-es.tese: skip
spec/oes_geometry_shader/preprocessor/enabled-es.comp: skip
spec/oes_geometry_shader/preprocessor/enabled-es.frag: skip
spec/oes_geometry_shader/preprocessor/enabled-es.geom: skip
@@ -4988,11 +4783,7 @@ spec/oes_geometry_shader/preprocessor/enabled-es.tesc: skip
spec/oes_geometry_shader/preprocessor/enabled-es.tese: skip
spec/oes_geometry_shader/preprocessor/enabled-es.vert: skip
spec/oes_gpu_shader5/preprocessor/disabled-defined-es.geom: skip
spec/oes_gpu_shader5/preprocessor/disabled-defined-es.tesc: skip
spec/oes_gpu_shader5/preprocessor/disabled-defined-es.tese: skip
spec/oes_gpu_shader5/preprocessor/disabled-undefined-es.geom: skip
spec/oes_gpu_shader5/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_gpu_shader5/preprocessor/disabled-undefined-es.tese: skip
spec/oes_gpu_shader5/preprocessor/enabled-es.comp: skip
spec/oes_gpu_shader5/preprocessor/enabled-es.frag: skip
spec/oes_gpu_shader5/preprocessor/enabled-es.geom: skip
@@ -5000,11 +4791,7 @@ spec/oes_gpu_shader5/preprocessor/enabled-es.tesc: skip
spec/oes_gpu_shader5/preprocessor/enabled-es.tese: skip
spec/oes_gpu_shader5/preprocessor/enabled-es.vert: skip
spec/oes_multisample_interpolation/preprocessor/disabled-defined-es.geom: skip
spec/oes_multisample_interpolation/preprocessor/disabled-defined-es.tesc: skip
spec/oes_multisample_interpolation/preprocessor/disabled-defined-es.tese: skip
spec/oes_multisample_interpolation/preprocessor/disabled-undefined-es.geom: skip
spec/oes_multisample_interpolation/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_multisample_interpolation/preprocessor/disabled-undefined-es.tese: skip
spec/oes_multisample_interpolation/preprocessor/enabled-es.comp: skip
spec/oes_multisample_interpolation/preprocessor/enabled-es.frag: skip
spec/oes_multisample_interpolation/preprocessor/enabled-es.geom: skip
@@ -5012,11 +4799,7 @@ spec/oes_multisample_interpolation/preprocessor/enabled-es.tesc: skip
spec/oes_multisample_interpolation/preprocessor/enabled-es.tese: skip
spec/oes_multisample_interpolation/preprocessor/enabled-es.vert: skip
spec/oes_sample_variables/preprocessor/disabled-defined-es.geom: skip
spec/oes_sample_variables/preprocessor/disabled-defined-es.tesc: skip
spec/oes_sample_variables/preprocessor/disabled-defined-es.tese: skip
spec/oes_sample_variables/preprocessor/disabled-undefined-es.geom: skip
spec/oes_sample_variables/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_sample_variables/preprocessor/disabled-undefined-es.tese: skip
spec/oes_sample_variables/preprocessor/enabled-es.comp: skip
spec/oes_sample_variables/preprocessor/enabled-es.frag: skip
spec/oes_sample_variables/preprocessor/enabled-es.geom: skip
@@ -5036,8 +4819,6 @@ spec/oes_shader_image_atomic/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_shader_image_atomic/preprocessor/disabled-undefined-es.tese: skip
spec/oes_shader_image_atomic/preprocessor/disabled-undefined-es.vert: skip
spec/oes_shader_image_atomic/preprocessor/enabled-es.geom: skip
spec/oes_shader_image_atomic/preprocessor/enabled-es.tesc: skip
spec/oes_shader_image_atomic/preprocessor/enabled-es.tese: skip
spec/oes_shader_io_blocks/compiler/layout-location-aliasing.vert: fail
spec/oes_shader_io_blocks/preprocessor/disabled-defined-es.comp: skip
spec/oes_shader_io_blocks/preprocessor/disabled-defined-es.frag: skip
@@ -5052,8 +4833,6 @@ spec/oes_shader_io_blocks/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_shader_io_blocks/preprocessor/disabled-undefined-es.tese: skip
spec/oes_shader_io_blocks/preprocessor/disabled-undefined-es.vert: skip
spec/oes_shader_io_blocks/preprocessor/enabled-es.geom: skip
spec/oes_shader_io_blocks/preprocessor/enabled-es.tesc: skip
spec/oes_shader_io_blocks/preprocessor/enabled-es.tese: skip
spec/oes_standard_derivatives/preprocessor/disabled-defined-es.comp: skip
spec/oes_standard_derivatives/preprocessor/disabled-defined-es.frag: skip
spec/oes_standard_derivatives/preprocessor/disabled-defined-es.geom: skip
@@ -5067,8 +4846,6 @@ spec/oes_standard_derivatives/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_standard_derivatives/preprocessor/disabled-undefined-es.tese: skip
spec/oes_standard_derivatives/preprocessor/disabled-undefined-es.vert: skip
spec/oes_standard_derivatives/preprocessor/enabled-es.geom: skip
spec/oes_standard_derivatives/preprocessor/enabled-es.tesc: skip
spec/oes_standard_derivatives/preprocessor/enabled-es.tese: skip
spec/oes_texture_buffer/preprocessor/disabled-defined-es.comp: skip
spec/oes_texture_buffer/preprocessor/disabled-defined-es.frag: skip
spec/oes_texture_buffer/preprocessor/disabled-defined-es.geom: skip
@@ -5082,8 +4859,6 @@ spec/oes_texture_buffer/preprocessor/disabled-undefined-es.tesc: skip
spec/oes_texture_buffer/preprocessor/disabled-undefined-es.tese: skip
spec/oes_texture_buffer/preprocessor/disabled-undefined-es.vert: skip
spec/oes_texture_buffer/preprocessor/enabled-es.geom: skip
spec/oes_texture_buffer/preprocessor/enabled-es.tesc: skip
spec/oes_texture_buffer/preprocessor/enabled-es.tese: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/disabled-defined-es.comp: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/disabled-defined-es.frag: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/disabled-defined-es.geom: skip
@@ -5097,15 +4872,13 @@ spec/oes_texture_storage_multisample_2d_array/preprocessor/disabled-undefined-es
spec/oes_texture_storage_multisample_2d_array/preprocessor/disabled-undefined-es.tese: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/disabled-undefined-es.vert: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/enabled-es.geom: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/enabled-es.tesc: skip
spec/oes_texture_storage_multisample_2d_array/preprocessor/enabled-es.tese: skip
summary:
name: results
---- --------
pass: 9682
pass: 9909
fail: 2
crash: 0
skip: 5099
skip: 4872
timeout: 0
warn: 0
incomplete: 0

View File

@@ -459,8 +459,6 @@ spec/arb_depth_buffer_float/depthstencil-render-miplevels 585 d=z32f_s8_s=z24_s8
spec/arb_depth_buffer_float/depthstencil-render-miplevels 585 d=z32f_s=z24_s8: skip
spec/arb_depth_buffer_float/depthstencil-render-miplevels 585 s=z24_s8_d=z32f: skip
spec/arb_depth_buffer_float/depthstencil-render-miplevels 585 s=z24_s8_d=z32f_s8: skip
spec/arb_direct_state_access/create-programpipelines/default tcs == 0: skip
spec/arb_direct_state_access/create-programpipelines/default tes == 0: skip
spec/arb_direct_state_access/getcompressedtextureimage: skip
spec/arb_direct_state_access/gettextureimage-formats: skip
spec/arb_direct_state_access/gettextureimage-formats init-by-rendering: skip
@@ -506,79 +504,6 @@ spec/arb_post_depth_coverage/arb_post_depth_coverage-basic: skip
spec/arb_post_depth_coverage/arb_post_depth_coverage-multisampling: skip
spec/arb_post_depth_coverage/arb_post_depth_coverage-sample-shading: skip
spec/arb_program_interface_query/arb_program_interface_query-getprogramresourceindex/'vs_input2[1][0]' on gl_program_input: fail
spec/arb_program_interface_query/arb_program_interface_query-getprogramresourceiv/tcs_patch on gl_program_output: skip
spec/arb_program_interface_query/arb_program_interface_query-getprogramresourceiv/tess_control on gl_tess_control_subroutine_uniform: skip
spec/arb_program_interface_query/arb_program_interface_query-resource-location/test_subroutine_stages_tcs_tes: skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_input(tcs): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_input(tcs,tes): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_input(tes): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_input(vs,tcs,tes): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_output(tcs): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_output(tcs,tes): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_output(tcs,tes,gs): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_program_output(tes): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_tess_control_subroutine: skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_tess_control_subroutine_uniform: skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_tess_evaluation_subroutine: skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_tess_evaluation_subroutine_uniform: skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_uniform(tes,tcs): skip
spec/arb_program_interface_query/arb_program_interface_query-resource-query/gl_uniform_block(tcs,tes): skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_tess_control_shader_patches: skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_tess_evaluation_shader_invocations: skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_time_elapsed: skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_timestamp: skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_transform_feedback_primitives_written: skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_vertex_shader_invocations: skip
spec/arb_query_buffer_object/coherency/index-buffer-gl_vertices_submitted: skip
spec/arb_query_buffer_object/coherency/indirect-dispatch-gl_tess_control_shader_patches: skip
spec/arb_query_buffer_object/coherency/indirect-dispatch-gl_tess_evaluation_shader_invocations: skip
spec/arb_query_buffer_object/coherency/indirect-dispatch-gl_transform_feedback_primitives_written: skip
spec/arb_query_buffer_object/coherency/indirect-dispatch-gl_vertex_shader_invocations: skip
spec/arb_query_buffer_object/coherency/indirect-dispatch-gl_vertices_submitted: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_tess_control_shader_patches: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_tess_evaluation_shader_invocations: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_time_elapsed: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_timestamp: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_transform_feedback_primitives_written: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_vertex_shader_invocations: skip
spec/arb_query_buffer_object/coherency/indirect-draw-count-gl_vertices_submitted: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_tess_control_shader_patches: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_tess_evaluation_shader_invocations: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_time_elapsed: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_timestamp: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_transform_feedback_primitives_written: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_vertex_shader_invocations: skip
spec/arb_query_buffer_object/coherency/indirect-draw-gl_vertices_submitted: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async_cpu_read_after-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async_cpu_read_after-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async_cpu_read_after-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async_cpu_read_before-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async_cpu_read_before-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-async_cpu_read_before-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-sync-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-sync-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-sync-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-sync_cpu_read_after_cache_test-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-sync_cpu_read_after_cache_test-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_control_shader_patches-sync_cpu_read_after_cache_test-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async_cpu_read_after-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async_cpu_read_after-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async_cpu_read_after-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async_cpu_read_before-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async_cpu_read_before-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-async_cpu_read_before-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-sync-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-sync-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-sync-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-sync_cpu_read_after_cache_test-gl_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-sync_cpu_read_after_cache_test-gl_unsigned_int: skip
spec/arb_query_buffer_object/qbo/query-gl_tess_evaluation_shader_invocations-sync_cpu_read_after_cache_test-gl_unsigned_int64_arb: skip
spec/arb_query_buffer_object/qbo/query-gl_time_elapsed-async_cpu_read_before-gl_int: fail
spec/arb_query_buffer_object/qbo/query-gl_time_elapsed-async_cpu_read_before-gl_unsigned_int: fail
spec/arb_query_buffer_object/qbo/query-gl_time_elapsed-async_cpu_read_before-gl_unsigned_int64_arb: fail
@@ -649,23 +574,15 @@ spec/arb_sample_shading/samplemask 6: skip
spec/arb_sample_shading/samplemask 6 all: skip
spec/arb_sample_shading/samplemask 8: skip
spec/arb_sample_shading/samplemask 8 all: skip
spec/arb_separate_shader_objects/mix-and-match-tcs-tes: skip
spec/arb_separate_shader_objects/programuniform coverage/double matrices: skip
spec/arb_separate_shader_objects/programuniform coverage/double scalar and vectors: skip
spec/arb_separate_shader_objects/rendezvous by location (5 stages): skip
spec/arb_separate_shader_objects/validateprogrampipeline/only tes from tes/tcs program: skip
spec/arb_separate_shader_objects/validateprogrampipeline/tcs splitting a vs/gs pipeline: skip
spec/arb_separate_shader_objects/validateprogrampipeline/tes splitting a vs/gs program: skip
spec/arb_separate_shader_objects/validateprogrampipeline/tes/tcs without vs: skip
spec/arb_shader_atomic_counters/max-counters/combined test above maximum number of atomic counter buffers: skip
spec/arb_shader_atomic_counters/semantics/tessellation control shader atomic built-in semantics: skip
spec/arb_shader_atomic_counters/semantics/tessellation evaluation shader atomic built-in semantics: skip
spec/arb_shader_atomic_counters/unused-result/tessellation control shader atomic built-in semantics: skip
spec/arb_shader_atomic_counters/unused-result/tessellation evaluation shader atomic built-in semantics: skip
spec/arb_shader_image_load_store/early-z/occlusion query test/early-z pass: fail
spec/arb_shader_image_load_store/indexing/compute shader/dynamically uniform indexing test: fail
spec/arb_shader_image_load_store/indexing/fragment shader/dynamically uniform indexing test: fail
spec/arb_shader_image_load_store/indexing/geometry shader/dynamically uniform indexing test: fail
spec/arb_shader_image_load_store/indexing/tessellation control shader/dynamically uniform indexing test: fail
spec/arb_shader_image_load_store/indexing/tessellation evaluation shader/dynamically uniform indexing test: fail
spec/arb_shader_image_load_store/indexing/vertex shader/dynamically uniform indexing test: fail
spec/arb_shader_image_load_store/invalid/imageload/address bounds test/image2d/r11f_g11f_b10f: fail
spec/arb_shader_image_load_store/invalid/imageload/address bounds test/image2d/r16: fail
@@ -696,6 +613,8 @@ spec/arb_shader_image_load_store/max-images/combined max image uniforms test: fa
spec/arb_shader_image_load_store/max-images/compute shader max image uniforms test: fail
spec/arb_shader_image_load_store/max-images/fragment shader max image uniforms test: fail
spec/arb_shader_image_load_store/max-images/geometry shader max image uniforms test: fail
spec/arb_shader_image_load_store/max-images/tessellation control shader max image uniforms test: fail
spec/arb_shader_image_load_store/max-images/tessellation evaluation shader max image uniforms test: fail
spec/arb_shader_image_load_store/max-images/vertex shader max image uniforms test: fail
spec/arb_shader_image_load_store/max-size/imagecube max size test/8192x8192x6x1: skip
spec/arb_shader_image_load_store/max-size/imagecubearray max size test/8192x8192x6x1: skip
@@ -817,17 +736,8 @@ spec/arb_sparse_buffer/commit: skip
spec/arb_sparse_buffer/minmax: skip
spec/arb_stencil_texturing/glblitframebuffer corrupts state/gl_texture_2d_multisample: fail
spec/arb_stencil_texturing/glblitframebuffer corrupts state/gl_texture_2d_multisample_array: fail
spec/arb_tessellation_shader/arb_tessellation_shader-get-tcs-params: skip
spec/arb_tessellation_shader/arb_tessellation_shader-get-tes-params: skip
spec/arb_tessellation_shader/arb_tessellation_shader-immediate-mode-draw-patches: skip
spec/arb_tessellation_shader/arb_tessellation_shader-invalid-get-program-params: skip
spec/arb_tessellation_shader/arb_tessellation_shader-invalid-patch-vertices-range: skip
spec/arb_tessellation_shader/arb_tessellation_shader-invalid-primitive: skip
spec/arb_tessellation_shader/arb_tessellation_shader-large-uniforms: skip
spec/arb_tessellation_shader/arb_tessellation_shader-layout-mismatch: skip
spec/arb_tessellation_shader/arb_tessellation_shader-minmax: skip
spec/arb_tessellation_shader/arb_tessellation_shader-tes-gs-max-output -small -scan 1 50: skip
spec/arb_tessellation_shader/built-in-constants: skip
spec/arb_tessellation_shader/arb_tessellation_shader-tes-gs-max-output -small -scan 1 50: fail
spec/arb_texture_barrier/arb_texture_barrier-blending-in-shader 32 1 1 128 1: skip
spec/arb_texture_barrier/arb_texture_barrier-blending-in-shader 32 1 1 128 2: skip
spec/arb_texture_barrier/arb_texture_barrier-blending-in-shader 32 1 1 128 3: skip
@@ -975,8 +885,6 @@ spec/arb_texture_barrier/arb_texture_barrier-blending-in-shader 512 42 8 8 8: sk
spec/arb_texture_buffer_object/indexed: skip
spec/arb_texture_buffer_object/negative-unsupported: skip
spec/arb_texture_compression_bptc/bptc-float-modes: fail
spec/arb_texture_compression_bptc/texwrap formats bordercolor: crash
spec/arb_texture_compression_bptc/texwrap formats bordercolor-swizzled: crash
spec/arb_texture_cube_map/copyteximage cube samples=16: skip
spec/arb_texture_cube_map/copyteximage cube samples=2: skip
spec/arb_texture_cube_map/copyteximage cube samples=32: skip
@@ -984,10 +892,6 @@ spec/arb_texture_cube_map/copyteximage cube samples=4: skip
spec/arb_texture_cube_map/copyteximage cube samples=6: skip
spec/arb_texture_cube_map/copyteximage cube samples=8: skip
spec/arb_texture_cube_map/cubemap npot: fail
spec/arb_texture_cube_map_array/texturesize/tes-texturesize-isamplercubearray: skip
spec/arb_texture_cube_map_array/texturesize/tes-texturesize-samplercubearray: skip
spec/arb_texture_cube_map_array/texturesize/tes-texturesize-samplercubearrayshadow: skip
spec/arb_texture_cube_map_array/texturesize/tes-texturesize-usamplercubearray: skip
spec/arb_texture_float/multisample-formats 16 gl_arb_texture_float: skip
spec/arb_texture_float/multisample-formats 2 gl_arb_texture_float: skip
spec/arb_texture_float/multisample-formats 32 gl_arb_texture_float: skip
@@ -1192,12 +1096,6 @@ spec/arb_texture_multisample/texelfetch/8-vs-sampler2dms: skip
spec/arb_texture_multisample/texelfetch/8-vs-sampler2dmsarray: skip
spec/arb_texture_multisample/texelfetch/8-vs-usampler2dms: skip
spec/arb_texture_multisample/texelfetch/8-vs-usampler2dmsarray: skip
spec/arb_texture_multisample/texturesize/tes-texturesize-isampler2dms: skip
spec/arb_texture_multisample/texturesize/tes-texturesize-isampler2dmsarray: skip
spec/arb_texture_multisample/texturesize/tes-texturesize-sampler2dms: skip
spec/arb_texture_multisample/texturesize/tes-texturesize-sampler2dmsarray: skip
spec/arb_texture_multisample/texturesize/tes-texturesize-usampler2dms: skip
spec/arb_texture_multisample/texturesize/tes-texturesize-usampler2dmsarray: skip
spec/arb_texture_rectangle/copyteximage rect samples=16: skip
spec/arb_texture_rectangle/copyteximage rect samples=2: skip
spec/arb_texture_rectangle/copyteximage rect samples=32: skip
@@ -1223,8 +1121,6 @@ spec/arb_texture_rg/multisample-formats 8 gl_arb_texture_rg: skip
spec/arb_texture_rg/multisample-formats 8 gl_arb_texture_rg-float: skip
spec/arb_texture_rg/multisample-formats 8 gl_arb_texture_rg-int: skip
spec/arb_texture_stencil8/fbo-clear-formats/gl_stencil_index8 (fbo incomplete): skip
spec/arb_texture_stencil8/texwrap formats bordercolor-swizzled/gl_stencil_index8, swizzled, border color only: fail
spec/arb_texture_stencil8/texwrap formats bordercolor/gl_stencil_index8, border color only: fail
spec/arb_texture_view/rendering-formats/clear gl_r8 as gl_r8_snorm: fail
spec/arb_texture_view/rendering-formats/clear gl_r8 as gl_r8i: fail
spec/arb_texture_view/rendering-formats/clear gl_rg8 as gl_r16_snorm: fail
@@ -2030,35 +1926,6 @@ spec/glsl-1.30/execution/tex-miplevel-selection texture(bias) cubearray: fail
spec/glsl-1.30/execution/tex-miplevel-selection texture(bias) cubeshadow: fail
spec/glsl-1.30/execution/tex-miplevel-selection textureoffset 2darrayshadow: skip
spec/glsl-1.50/built-in constants compatibility: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isampler1d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isampler1darray: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isampler2d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isampler2darray: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isampler2drect: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isampler3d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isamplerbuffer: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-isamplercube: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler1d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler1darray: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler1darrayshadow: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler1dshadow: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler2d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler2darray: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler2darrayshadow: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler2drect: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler2drectshadow: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler2dshadow: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-sampler3d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-samplerbuffer: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-samplercube: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-samplercubeshadow: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usampler1d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usampler1darray: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usampler2d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usampler2darray: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usampler3d: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usamplerbuffer: skip
spec/glsl-1.50/execution/texturesize/tes-texturesize-usamplercube: skip
spec/glsl-1.50/gs-max-output: fail
spec/glsl-es-3.00/execution/varying-struct-centroid_gles3: fail
spec/intel_blackhole_render/intel_blackhole-dispatch: skip
@@ -2124,6 +1991,15 @@ spec/nv_vertex_program2_option/vp-clipdistance-01: skip
spec/nv_vertex_program2_option/vp-clipdistance-02: skip
spec/nv_vertex_program2_option/vp-clipdistance-03: skip
spec/nv_vertex_program2_option/vp-clipdistance-04: skip
spec/oes_geometry_shader/built-in constants/gl_maxgeometryatomiccounterbuffers: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometryatomiccounters: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometryimageuniforms: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometryinputcomponents: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometryoutputcomponents: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometryoutputvertices: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometrytextureimageunits: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometrytotaloutputcomponents: fail
spec/oes_geometry_shader/built-in constants/gl_maxgeometryuniformcomponents: fail
spec/oes_matrix_get/all queries: skip
spec/oes_texture_compression_astc/miptree-3d-gl hdr: skip
spec/oes_texture_compression_astc/miptree-3d-gl ldr: skip
@@ -2205,10 +2081,10 @@ wgl/wgl-sanity: skip
summary:
name: results
---- --------
pass: 19320
fail: 234
crash: 2
skip: 1948
pass: 19539
fail: 246
crash: 0
skip: 1814
timeout: 0
warn: 2
incomplete: 0
@@ -2217,4 +2093,4 @@ summary:
changes: 0
fixes: 0
regressions: 0
total: 21524
total: 21619

File diff suppressed because it is too large Load Diff

View File

@@ -3,7 +3,7 @@
set -e
set -o xtrace
VERSION=`cat artifacts/VERSION`
VERSION=`cat install/VERSION`
cd /piglit
@@ -15,7 +15,7 @@ xvfb-run --server-args="-noreset" sh -c \
PIGLIT_RESULTS=${PIGLIT_RESULTS:-$PIGLIT_PROFILES}
mkdir -p .gitlab-ci/piglit
cp $OLDPWD/artifacts/piglit/$PIGLIT_RESULTS.txt .gitlab-ci/piglit/$PIGLIT_RESULTS.txt.baseline
cp $OLDPWD/install/piglit/$PIGLIT_RESULTS.txt .gitlab-ci/piglit/$PIGLIT_RESULTS.txt.baseline
./piglit summary console $OLDPWD/results | head -n -1 | grep -v ": pass" >.gitlab-ci/piglit/$PIGLIT_RESULTS.txt
if diff -q .gitlab-ci/piglit/$PIGLIT_RESULTS.txt{.baseline,}; then

View File

@@ -22,38 +22,28 @@ find install -name \*.so -exec $STRIP {} \;
# Test runs don't pull down the git tree, so put the dEQP helper
# script and associated bits there.
mkdir -p artifacts/
cp VERSION artifacts/
cp -Rp .gitlab-ci/deqp* artifacts/
cp -Rp .gitlab-ci/piglit artifacts/
cp VERSION install/
cp -Rp .gitlab-ci/deqp* install/
cp -Rp .gitlab-ci/piglit install/
cp -Rp .gitlab-ci/traces.yml install/
cp -Rp .gitlab-ci/tracie install/
cp -Rp .gitlab-ci/tracie-runner-gl.sh install/
cp -Rp .gitlab-ci/tracie-runner-vk.sh install/
cp -Rp .gitlab-ci/fossils.yml install/
cp -Rp .gitlab-ci/fossils install/
cp -Rp .gitlab-ci/fossilize-runner.sh install/
cp -Rp .gitlab-ci/deqp-runner.sh install/
cp -Rp .gitlab-ci/deqp-*-fails.txt install/
cp -Rp .gitlab-ci/deqp-*-skips.txt install/
# Tar up the install dir so that symlinks and hardlinks aren't each
# packed separately in the zip file.
mkdir -p artifacts/
tar -cf artifacts/install.tar install
# If the container has LAVA stuff, prepare the artifacts for LAVA jobs
if [ -d /lava-files ]; then
# Copy kernel and device trees for LAVA
cp /lava-files/*Image artifacts/.
cp /lava-files/*.dtb artifacts/.
# Pack ramdisk for LAVA
mkdir -p /lava-files/rootfs-${CROSS:-arm64}/mesa
cp -a install/* /lava-files/rootfs-${CROSS:-arm64}/mesa/.
cp .gitlab-ci/deqp-runner.sh /lava-files/rootfs-${CROSS:-arm64}/deqp/.
cp .gitlab-ci/deqp-*-fails.txt /lava-files/rootfs-${CROSS:-arm64}/deqp/.
cp .gitlab-ci/deqp-*-skips.txt /lava-files/rootfs-${CROSS:-arm64}/deqp/.
find /lava-files/rootfs-${CROSS:-arm64}/ -type f -printf "%s\t%i\t%p\n" | sort -n | tail -100
pushd /lava-files/rootfs-${CROSS:-arm64}/
find -H | cpio -H newc -o | gzip -c - > $CI_PROJECT_DIR/artifacts/lava-rootfs-${CROSS:-arm64}.cpio.gz
popd
# Store job ID so the test stage can build URLs to the artifacts
echo $CI_JOB_ID > artifacts/build_job_id.txt
# Pass needed files to the test stage
cp $CI_PROJECT_DIR/.gitlab-ci/generate_lava.py artifacts/.
cp $CI_PROJECT_DIR/.gitlab-ci/lava-deqp.yml.jinja2 artifacts/.
# Pass needed files to the test stage
cp $CI_PROJECT_DIR/.gitlab-ci/generate_lava.py artifacts/.
cp $CI_PROJECT_DIR/.gitlab-ci/lava-deqp.yml.jinja2 artifacts/.
fi

View File

@@ -0,0 +1,146 @@
# This file list source dependencies to avoid creating/running jobs
# those outcome cannot be changed by the modifications from a branch.
# Mesa core source file dependencies
# ----------------------------------
.mesa-rules:
rules:
- changes: &mesa_core_file_list
- .gitlab-ci.yml
- .gitlab-ci/**/*
- include/**/*
- meson.build
- SConstruct
- src/*
- src/compiler/**/*
- src/drm-shim/**/*
- src/egl/**/*
- src/gbm/**/*
- src/glx/**/*
- src/gtest/**/*
- src/hgl/**/*
- src/include/**/*
- src/loader/**/*
- src/mapi/**/*
- src/mesa/**/*
- src/util/**/*
# Gallium core source file dependencies
# -------------------------------------
.gallium-rules:
rules:
- changes: &gallium_core_file_list
- src/gallium/*
- src/gallium/auxiliary/**/*
- src/gallium/drivers/*
- src/gallium/include/**/*
- src/gallium/state_trackers/**/*
- src/gallium/targets/**/*
- src/gallium/tests/**/*
- src/gallium/winsys/*
.softpipe-rules:
stage: softpipe
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
*gallium_core_file_list
when: on_success
- changes:
- src/gallium/drivers/softpipe/**/*
- src/gallium/winsys/sw/**/*
when: on_success
- when: never
.llvmpipe-rules:
stage: llvmpipe
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
*gallium_core_file_list
when: on_success
- changes:
- src/gallium/drivers/llvmpipe/**/*
- src/gallium/winsys/sw/**/*
when: on_success
- when: never
.freedreno-rules:
stage: freedreno
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
*gallium_core_file_list
when: on_success
- changes:
- src/freedreno/**/*
- src/gallium/drivers/freedreno/**/*
- src/gallium/winsys/freedreno/**/*
when: on_success
- when: never
.panfrost-rules:
stage: panfrost
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
*gallium_core_file_list
when: on_success
- changes:
- src/gallium/drivers/panfrost/**/*
- src/gallium/winsys/panfrost/**/*
- src/panfrost/**/*
when: on_success
- when: never
.lima-rules:
stage: lima
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
*gallium_core_file_list
when: on_success
- changes:
- src/gallium/drivers/lima/**/*
- src/gallium/winsys/lima/**/*
- src/lima/**/*
when: on_success
- when: never
.radv-rules:
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
- src/amd/**/*
- src/vulkan/**/*
when: on_success
- when: never
.virgl-rules:
stage: virgl
rules:
- changes:
*mesa_core_file_list
when: on_success
- changes:
*gallium_core_file_list
when: on_success
- changes:
- src/gallium/drivers/llvmpipe/**/*
- src/gallium/drivers/virgl/**/*
- src/gallium/winsys/virgl/**/*
- src/gallium/winsys/sw/**/*
when: on_success
- when: never

35
.gitlab-ci/traces.yml Normal file
View File

@@ -0,0 +1,35 @@
traces-db:
gitlab-project-url: "https://gitlab.freedesktop.org/gfx-ci/tracie/traces-db"
commit: "d3b1efe0cd69ef6ae40a29a14ed733ee0ba0cb4c"
traces:
- path: glmark2/desktop-blur-radius=5:effect=blur:passes=1:separable=true:windows=4.rdc
expectations:
- device: gl-vmware-llvmpipe
checksum: 8867f3a41f180626d0d4b7661ff5c0f4
- device: gl-virgl
checksum: 8867f3a41f180626d0d4b7661ff5c0f4
- path: glmark2/jellyfish.rdc
expectations:
- device: gl-vmware-llvmpipe
checksum: e0fe979fee129c0ed42a3059d1a4e1c9
- device: gl-virgl
checksum: e0fe979fee129c0ed42a3059d1a4e1c9
- path: glxgears/glxgears.trace
expectations:
- device: gl-vmware-llvmpipe
checksum: 02aca9b4b4ad6fd60331df6e4f87f2cd
- device: gl-virgl
checksum: 02aca9b4b4ad6fd60331df6e4f87f2cd
- path: KhronosGroup-Vulkan-Tools/vkcube.gfxr
expectations:
- device: vk-amd-polaris10
checksum: 29dc9e5e55c3de331407248737c23aa7
- path: LunarG-VulkanSamples/Hologram:-w:640:-h:480.gfxr
expectations:
- device: vk-amd-polaris10
checksum: 351710942ea93d511cef39ae2d7c68da
- path: Wicked-Engine/Tests:Cloth_Physics_Test.trace-dxgi
expectations:
- device: vk-amd-polaris10
checksum: 6b6d27df609b8d086cc3335e6d103581

49
.gitlab-ci/tracie-runner-gl.sh Executable file
View File

@@ -0,0 +1,49 @@
#!/bin/sh
set -ex
INSTALL="$(pwd)/install"
# Set up the driver environment.
export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:$(pwd)/install/lib/"
# Set environment for renderdoc libraries.
export PYTHONPATH="$PYTHONPATH:/renderdoc/build/lib"
export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:/renderdoc/build/lib"
# Set environment for the waffle library.
export LD_LIBRARY_PATH="/waffle/build/lib:$LD_LIBRARY_PATH"
# Set environment for apitrace executable.
export PATH="/apitrace/build:$PATH"
# Use the surfaceless EGL platform.
export EGL_PLATFORM="surfaceless"
export DISPLAY=
export WAFFLE_PLATFORM="surfaceless_egl"
RESULTS=`pwd`/results
mkdir -p $RESULTS
# Perform a self-test to ensure tracie is working properly.
"$INSTALL/tracie/tests/test.sh"
if [ "$GALLIUM_DRIVER" = "virpipe" ]; then
# tracie is to use virpipe, and virgl_test_server llvmpipe
export GALLIUM_DRIVER="$GALLIUM_DRIVER"
GALLIUM_DRIVER=llvmpipe \
GALLIVM_PERF="nopt,no_filter_hacks" \
VTEST_USE_EGL_SURFACELESS=1 \
VTEST_USE_GLES=1 \
virgl_test_server >$RESULTS/vtest-log.txt 2>&1 &
sleep 1
fi
# Sanity check to ensure that our environment is sufficient to make our tests
# run against the Mesa built by CI, rather than any installed distro version.
MESA_VERSION=$(cat "$INSTALL/VERSION" | sed 's/\./\\./g')
wflinfo --platform surfaceless_egl --api gles2 | grep "Mesa $MESA_VERSION\(\s\|$\)"
python3 "$INSTALL/tracie/tracie.py" --file "$INSTALL/traces.yml" --device-name "$DEVICE_NAME"

37
.gitlab-ci/tracie-runner-vk.sh Executable file
View File

@@ -0,0 +1,37 @@
#!/bin/sh
set -ex
INSTALL="$(pwd)/install"
# Set the Vulkan driver to use.
export VK_ICD_FILENAMES="$(pwd)/install/share/vulkan/icd.d/${VK_DRIVER}_icd.x86_64.json"
# Set environment for VulkanTools' VK_LAYER_LUNARG_screenshot layer.
export VK_LAYER_PATH="$VK_LAYER_PATH:/VulkanTools/build/etc/vulkan/explicit_layer.d"
export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:/VulkanTools/build/lib"
# Set environment for Wine
export WINEDEBUG="-all"
export WINEPREFIX="/dxvk-wine64"
export WINEESYNC=1
# Set environment for DXVK
export DXVK_LOG_LEVEL="none"
export DXVK_STATE_CACHE=0
# Perform a self-test to ensure tracie is working properly.
"$INSTALL/tracie/tests/test.sh"
# Sanity check to ensure that our environment is sufficient to make our tests
# run against the Mesa built by CI, rather than any installed distro version.
MESA_VERSION=$(cat "$INSTALL/VERSION" | sed 's/\./\\./g')
vulkaninfo | grep "Mesa $MESA_VERSION\(\s\|$\)"
# Run gfxreconstruct traces against the host's running X server (xvfb
# doesn't have DRI3 support).
# Set the DISPLAY env variable in each gitlab-runner's configuration
# file:
# https://docs.gitlab.com/runner/configuration/advanced-configuration.html#the-runners-section
PATH="/gfxreconstruct/build/bin:$PATH" \
python3 "$INSTALL/tracie/tracie.py" --file "$INSTALL/traces.yml" --device-name "$DEVICE_NAME"

161
.gitlab-ci/tracie/README.md Normal file
View File

@@ -0,0 +1,161 @@
Tracie - Mesa Traces Continuous Integration System
==================================================
Home of the Mesa trace testing effort.
### Traces definition file
The trace definition file contains information about the GitLab
project and git commit to get the traces from, and a list of the
traces to run along with their expected image checksums on each
device. An example:
```yaml
traces-db:
gitlab-project-url: https://gitlab.freedesktop.org/gfx-ci/tracie/traces-db
commit: master
traces:
- path: glmark2/jellyfish.rdc
expectations:
- device: gl-intel-0x3185
checksum: 58359ea4caf6ad44c6b65526881bbd17
- device: gl-vmware-llvmpipe
checksum: d82267c25a0decdad7b563c56bb81106
- path: supertuxkart/supertuxkart-antediluvian-abyss.rdc
expectations:
- device: gl-intel-0x3185
checksum: ff827f7eb069afd87cc305a422cba939
```
The traces-db entry can be absent, in which case it is assumed that the
current directory is the traces-db directory.
Traces that don't have an expectation for the current device are skipped
during trace replay.
Adding a new trace to the list involves commiting the trace to the git repo and
adding an entry to the `traces` list. The reference checksums can be calculated
with the [image_checksum.py](.gitlab-ci/tracie/image_checksum.py) script.
Alternatively, an arbitrary checksum can be used, and during replay (see below)
the scripts will report the mismatch and expected checksum.
### Trace-db GitLab projects
The trace-db GitLab projects are assumed to have git repositories
using LFS for their trace files. This is so that trace files can be
potentially checked out and replayed individually, thus reducing
storage requirements during CI runs.
### Enabling trace testing on a new device
To enable trace testing on a new device:
1. Create a new job in .gitlab-ci.yml. The job will need to be tagged
to run on runners with the appropriate hardware.
1. If you mean to test GL traces, use the `.traces-test-gl`
template jobs as a base, and make sure you set a unique value for the
`DEVICE_NAME` variable:
```yaml
my-hardware-gl-traces:
extends: .traces-test-gl
variables:
DEVICE_NAME: "gl-myhardware"
```
2. If you mean to test Vulkan traces, use the `.traces-test-vk`
template jobs as a base, set the `VK_DRIVER` variable, and make
sure you set a unique value for the `DEVICE_NAME` variable:
```yaml
my-hardware-vk-traces:
extends: .traces-test-vk
variables:
VK_DRIVER: "radeon"
DEVICE_NAME: "vk-myhardware"
```
2. Update the .gitlab-ci/traces.yml file with expectations for the new device.
Ensure that the device name used in the expectations matches the one
set in the job. For more information, and tips about how to calculate
the checksums, see the section describing the trace definition files.
### Trace files
Tracie supports renderdoc (.rdc), apitrace (.trace) and gfxreconstruct
(.gfxr) files. Trace files need to have the correct extension so that
tracie can detect them properly.
The trace files that are contained in public traces-db repositories must be
legally redistributable. This is typically true for FOSS games and
applications. Traces for proprietary games and application are typically not
redistributable, unless specific redistribution rights have been granted by the
publisher.
### Replaying traces
Mesa traces CI uses a set of scripts to replay traces and check the output
against reference checksums.
The high level script [tracie.sh](.gitlab-ci/tracie/tracie.sh) accepts
a traces definition file and the type of traces
(apitrace/renderdoc/gfxreconstruct) to run:
tracie.sh .gitlab-ci/traces.yml renderdoc
tracie.sh copies produced artifacts to the `$CI_PROJECT_DIR/result`
directory. By default, created images from traces are only stored in case of a
checksum mismatch. The `TRACIE_STORE_IMAGES` CI/environment variable can be set
to `1` to force storing images, e.g., to get a complete set of reference
images.
The `tracie.sh` script requires that the environment variable `DEVICE_NAME` is
properly set for the target machine, and matches the `device` field of the
relevant trace expectations in the used `traces.yml` file.
At a lower level the
[dump_trace_images.py](.gitlab-ci/tracie/dump_trace_images.py) script is
called, which replays a trace, dumping a set of images in the process. By
default only the image corresponding to the last frame of the trace is dumped,
but this can be changed with the `--calls` parameter. The dumped images are
stored in a subdirectory `test/<device-name>` next to the trace file itself,
with names of the form `tracefilename-callnum.png`. The full log of any
commands used while dumping the images is also saved in a file in the
'test/<device-name>' subdirectory, named after the trace name with '.log'
appended.
Examples:
python3 dump_traces_images.py --device-name=gl-vmware-llvmpipe mytrace.trace
python3 dump_traces_images.py --device-name=gl-vmware-llvmpipe --calls=2075,3300 mytrace.trace
### Running the replay scripts locally
It's often useful, especially during development, to be able to run the scripts
locally.
Depending on the target 3D API, the scripts require a recent version
of apitrace being in the path, and also the renderdoc python module
being available, for GL traces.
To ensure python3 can find the renderdoc python module you need to set
`PYTHONPATH` to point to the location of `renderdoc.so` (binary python modules)
and `LD_LIBRARY_PATH` to point to the location of `librenderdoc.so`. In the
renderdoc build tree, both of these are in `renderdoc/<builddir>/lib`. Note
that renderdoc doesn't install the `renderdoc.so` python module.
In the case of Vulkan traces, the scripts need a recent version of
gfxrecon-replay being in the path, and also the
`VK_LAYER_LUNARG_screenshot` Vulkan layer from LunarG's VulkanTools.
To ensure that this layer can be found when running the trace you need
to set `VK_LAYER_PATH` to point to the location of
`VkLayer_screenshot.json` and `LD_LIBRARY_PATH` to point to the
location of `libVkLayer_screenshot.so`.
In the case of DXGI traces, the scripts require Wine, a recent version
of DXVK installed in the default `WINEPREFIX`, and a recent binary
version of apitrace for Windows which should be reachable through
Windows' `PATH` environment variable.

View File

@@ -0,0 +1,180 @@
#!/usr/bin/python3
# Copyright (c) 2019 Collabora Ltd
# Copyright © 2019-2020 Valve Corporation.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import argparse
import os
import sys
import subprocess
from pathlib import Path
from traceutil import trace_type_from_filename, TraceType
def log(severity, msg, end='\n'):
print("[dump_trace_images] %s: %s" % (severity, msg), flush=True, end=end)
def log_result(msg):
print(msg, flush=True)
def run_logged_command(cmd, env, log_path):
ret = subprocess.run(cmd, stdout=subprocess.PIPE, stderr=subprocess.STDOUT, env=env)
logoutput = ("[dump_trace_images] Running: %s\n" % " ".join(cmd)).encode() + \
ret.stdout
log_path.parent.mkdir(parents=True, exist_ok=True)
with log_path.open(mode='wb') as log:
log.write(logoutput)
if ret.returncode:
raise RuntimeError(
logoutput.decode(errors='replace') +
"[dump_traces_images] Process failed with error code: %d" % ret.returncode)
def get_last_apitrace_frame_call(cmd_wrapper, trace_path):
cmd = cmd_wrapper + ["apitrace", "dump", "--calls=frame", str(trace_path)]
ret = subprocess.run(cmd, stdout=subprocess.PIPE)
for l in reversed(ret.stdout.decode(errors='replace').splitlines()):
s = l.split(None, 1)
if len(s) >= 1 and s[0].isnumeric():
return int(s[0])
return -1
def get_last_gfxreconstruct_frame_call(trace_path):
# FIXME: It would be great to have another way to get the amount of
# traces which wouldn't imply replaying the whole trace:
# https://github.com/LunarG/gfxreconstruct/issues/329
cmd = ["gfxrecon-replay", str(trace_path)]
ret = subprocess.run(cmd, stdout=subprocess.PIPE)
for l in reversed(ret.stdout.decode(errors='replace').splitlines()):
s = l.split(", ", 2)
if len(s) >= 3:
c = s[2].split(None, 1)
if len(c) >= 1 and c[0].isnumeric():
return int(c[0])
return -1
def dump_with_apitrace(retrace_cmd, trace_path, calls, device_name):
outputdir = str(trace_path.parent / "test" / device_name)
os.makedirs(outputdir, exist_ok=True)
outputprefix = str(Path(outputdir) / trace_path.name) + "-"
if len(calls) == 0:
calls = [str(get_last_apitrace_frame_call(retrace_cmd[:-1], trace_path))]
cmd = retrace_cmd + ["--headless",
"--snapshot=" + ','.join(calls),
"--snapshot-prefix=" + outputprefix, str(trace_path)]
log_path = Path(outputdir) / (trace_path.name + ".log")
run_logged_command(cmd, None, log_path)
def dump_with_renderdoc(trace_path, calls, device_name):
outputdir = str(trace_path.parent / "test" / device_name)
script_path = Path(os.path.dirname(os.path.abspath(__file__)))
cmd = [str(script_path / "renderdoc_dump_images.py"), str(trace_path), outputdir]
cmd.extend(calls)
log_path = Path(outputdir) / (trace_path.name + ".log")
run_logged_command(cmd, None, log_path)
def dump_with_gfxreconstruct(trace_path, calls, device_name):
from PIL import Image
outputdir_path = trace_path.parent / "test" / device_name
outputdir_path.mkdir(parents=True, exist_ok=True)
outputprefix = str(outputdir_path / trace_path.name) + "-"
if len(calls) == 0:
# FIXME: The VK_LAYER_LUNARG_screenshot numbers the calls from
# 0 to (total-num-calls - 1) while gfxreconstruct does it from
# 1 to total-num-calls:
# https://github.com/LunarG/gfxreconstruct/issues/284
calls = [str(get_last_gfxreconstruct_frame_call(trace_path) - 1)]
cmd = ["gfxrecon-replay", str(trace_path)]
log_path = outputdir_path / (trace_path.name + ".log")
env = os.environ.copy()
env["VK_INSTANCE_LAYERS"] = "VK_LAYER_LUNARG_screenshot"
env["VK_SCREENSHOT_FRAMES"] = ",".join(calls)
env["VK_SCREENSHOT_DIR"] = str(outputdir_path)
run_logged_command(cmd, env, log_path)
for c in calls:
ppm = str(outputdir_path / c) + ".ppm"
outputfile = outputprefix + c + ".png"
with log_path.open(mode='w') as log:
log.write("Writing: %s to %s" % (ppm, outputfile))
Image.open(ppm).save(outputfile)
os.remove(ppm)
def dump_with_testtrace(trace_path, calls, device_name):
from PIL import Image
outputdir_path = trace_path.parent / "test" / device_name
outputdir_path.mkdir(parents=True, exist_ok=True)
with trace_path.open() as f:
rgba = f.read()
color = [int(rgba[0:2], 16), int(rgba[2:4], 16),
int(rgba[4:6], 16), int(rgba[6:8], 16)]
if len(calls) == 0: calls = ["0"]
for c in calls:
outputfile = str(outputdir_path / trace_path.name) + "-" + c + ".png"
log_path = outputdir_path / (trace_path.name + ".log")
with log_path.open(mode='w') as log:
log.write("Writing RGBA: %s to %s" % (rgba, outputfile))
Image.frombytes('RGBA', (32, 32), bytes(color * 32 * 32)).save(outputfile)
def dump_from_trace(trace_path, calls, device_name):
log("Info", "Dumping trace %s" % trace_path, end='... ')
trace_type = trace_type_from_filename(trace_path.name)
try:
if trace_type == TraceType.APITRACE:
dump_with_apitrace(["eglretrace"], trace_path, calls, device_name)
elif trace_type == TraceType.APITRACE_DXGI:
dump_with_apitrace(["wine", "d3dretrace"], trace_path, calls, device_name)
elif trace_type == TraceType.RENDERDOC:
dump_with_renderdoc(trace_path, calls, device_name)
elif trace_type == TraceType.GFXRECONSTRUCT:
dump_with_gfxreconstruct(trace_path, calls, device_name)
elif trace_type == TraceType.TESTTRACE:
dump_with_testtrace(trace_path, calls, device_name)
else:
raise RuntimeError("Unknown tracefile extension")
log_result("OK")
return True
except Exception as e:
log_result("ERROR")
log("Debug", "=== Failure log start ===")
print(e)
log("Debug", "=== Failure log end ===")
return False
def main():
parser = argparse.ArgumentParser()
parser.add_argument('tracepath', help="trace to dump")
parser.add_argument('--device-name', required=True,
help="the name of the graphics device used to produce images")
parser.add_argument('--calls', required=False,
help="the call numbers from the trace to dump (default: last frame)")
args = parser.parse_args()
if args.calls is not None:
args.calls = args.calls.split(",")
else:
args.calls = []
success = dump_from_trace(Path(args.tracepath), args.calls, args.device_name)
sys.exit(0 if success else 1)
if __name__ == "__main__":
main()

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#!/usr/bin/env python3
# Copyright (c) 2019 Collabora Ltd
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import argparse
import hashlib
from PIL import Image
def main():
parser = argparse.ArgumentParser()
parser.add_argument('imagefile', help='image file to calculate checksum for')
args = parser.parse_args()
md5 = hashlib.md5(Image.open(args.imagefile).tobytes())
print(md5.hexdigest())
if __name__ == "__main__":
main()

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#!/usr/bin/python3
# Copyright (c) 2019 Collabora Ltd
# Copyright © 2020 Valve Corporation.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import argparse
import yaml
from traceutil import all_trace_type_names, trace_type_from_name
from traceutil import trace_type_from_filename
def trace_devices(trace):
return [e['device'] for e in trace['expectations']]
def cmd_traces_db_gitlab_project_url(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
print(y['traces-db']['gitlab-project-url'])
def cmd_traces_db_commit(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
print(y['traces-db']['commit'])
def cmd_traces(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
traces = y['traces']
traces = filter(lambda t: trace_type_from_filename(t['path']) in args.trace_types,
traces)
if args.device_name:
traces = filter(lambda t: args.device_name in trace_devices(t), traces)
traces = list(traces)
if len(traces) == 0:
return
print('\n'.join((t['path'] for t in traces)))
def cmd_checksum(args):
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
traces = y['traces']
trace = next(t for t in traces if t['path'] == args.trace_path)
expectation = next(e for e in trace['expectations'] if e['device'] == args.device_name)
print(expectation['checksum'])
def main():
parser = argparse.ArgumentParser()
parser.add_argument('--file', required=True,
help='the name of the yaml file')
subparsers = parser.add_subparsers(help='sub-command help')
parser_traces_db_gitlab_project_url = subparsers.add_parser('traces_db_gitlab_project_url')
parser_traces_db_gitlab_project_url.set_defaults(func=cmd_traces_db_gitlab_project_url)
parser_traces_db_commit = subparsers.add_parser('traces_db_commit')
parser_traces_db_commit.set_defaults(func=cmd_traces_db_commit)
parser_traces = subparsers.add_parser('traces')
parser_traces.add_argument('--device-name', required=False,
help="the name of the graphics device used to "
"produce images")
parser_traces.add_argument('--trace-types', required=False,
default=",".join(all_trace_type_names()),
help="the types of traces to look for in recursive "
"dir walks " "(by default all types)")
parser_traces.set_defaults(func=cmd_traces)
parser_checksum = subparsers.add_parser('checksum')
parser_checksum.add_argument('--device-name', required=True,
help="the name of the graphics device used to "
"produce images")
parser_checksum.add_argument('trace_path')
parser_checksum.set_defaults(func=cmd_checksum)
args = parser.parse_args()
if hasattr(args, 'trace_types'):
args.trace_types = [trace_type_from_name(t) for t in args.trace_types.split(",")]
args.func(args)
if __name__ == "__main__":
main()

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#!/usr/bin/env python3
# Copyright (c) 2019 Collabora Ltd
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import atexit
import os
import shutil
import sys
import tempfile
from pathlib import Path
def cleanup(dirpath):
shutil.rmtree(dirpath)
dirpath = tempfile.mkdtemp()
atexit.register(cleanup, dirpath)
RENDERDOC_DEBUG_FILE = dirpath + "/renderdoc.log"
# Needs to be in the environment before importing the module
os.environ['RENDERDOC_DEBUG_LOG_FILE'] = RENDERDOC_DEBUG_FILE
import renderdoc as rd
def findDrawWithEventId(controller, eventId):
for d in controller.GetDrawcalls():
if d.eventId == eventId:
return d
return None
def dumpImage(controller, eventId, outputDir, tracefile):
draw = findDrawWithEventId(controller, eventId)
if draw is None:
raise RuntimeError("Couldn't find draw call with eventId " + str(eventId))
controller.SetFrameEvent(draw.eventId, True)
texsave = rd.TextureSave()
# Select the first color output
texsave.resourceId = draw.outputs[0]
if texsave.resourceId == rd.ResourceId.Null():
return
filepath = Path(outputDir)
filepath.mkdir(parents = True, exist_ok = True)
filepath = filepath / (tracefile + "-" + str(int(draw.eventId)) + ".png")
print("Saving image at eventId %d: %s to %s" % (draw.eventId, draw.name, filepath))
# Most formats can only display a single image per file, so we select the
# first mip and first slice
texsave.mip = 0
texsave.slice.sliceIndex = 0
# For formats with an alpha channel, preserve it
texsave.alpha = rd.AlphaMapping.Preserve
texsave.destType = rd.FileType.PNG
controller.SaveTexture(texsave, str(filepath))
def loadCapture(filename):
cap = rd.OpenCaptureFile()
status = cap.OpenFile(filename, '', None)
if status != rd.ReplayStatus.Succeeded:
raise RuntimeError("Couldn't open file: " + str(status))
if not cap.LocalReplaySupport():
raise RuntimeError("Capture cannot be replayed")
status, controller = cap.OpenCapture(rd.ReplayOptions(), None)
if status != rd.ReplayStatus.Succeeded:
if os.path.exists(RENDERDOC_DEBUG_FILE):
print(open(RENDERDOC_DEBUG_FILE, "r").read())
raise RuntimeError("Couldn't initialise replay: " + str(status))
if os.path.exists(RENDERDOC_DEBUG_FILE):
open(RENDERDOC_DEBUG_FILE, "w").write("")
return (cap, controller)
def renderdoc_dump_images(filename, eventIds, outputDir):
rd.InitialiseReplay(rd.GlobalEnvironment(), [])
cap, controller = loadCapture(filename);
tracefile = Path(filename).name
if len(eventIds) == 0:
eventIds.append(controller.GetDrawcalls()[-1].eventId)
for eventId in eventIds:
dumpImage(controller, eventId, outputDir, tracefile)
controller.Shutdown()
cap.Shutdown()
rd.ShutdownReplay()
if __name__ == "__main__":
if len(sys.argv) < 3:
raise RuntimeError("Usage: renderdoc_dump_images.py <trace> <outputdir> [<draw-id>...]")
eventIds = [int(e) for e in sys.argv[3:]]
renderdoc_dump_images(sys.argv[1], eventIds, sys.argv[2])

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ff00ffff

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80800080

152
.gitlab-ci/tracie/tests/test.sh Executable file
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#!/bin/sh
TRACIE_DIR="$(dirname "$(readlink -f "$0")")/.."
TEST_DIR=""
TEST_EXIT=0
assert() {
if ! $1; then
echo "Assertion failed: \"$1\""
exit 1
fi
}
run_tracie() {
# Run tests for the .testtrace types, using the "gl-test-device" and "vk-test-device" device names.
python3 $TEST_DIR/tracie.py --file $TEST_DIR/tests/traces.yml --device-name gl-test-device && \
python3 $TEST_DIR/tracie.py --file $TEST_DIR/tests/traces.yml --device-name vk-test-device
}
cleanup() {
[ "$TEST_DIR" = "/tmp/*" ] && rm -rf "$TEST_DIR"
}
prepare_for_run() {
TEST_DIR="$(mktemp -d -t tracie.test.XXXXXXXXXX)"
# Copy all the tracie scripts to the test dir for the run-tests.sh script.
# This avoids polluting the normal working dir with test result artifacts.
cp -R "$TRACIE_DIR"/. "$TEST_DIR"
cd "$TEST_DIR"
mkdir traces-db
mv tests/test-data/* traces-db/.
trap cleanup EXIT
# Ensure we have a clean environment.
unset TRACIE_STORE_IMAGES
}
run_test() {
prepare_for_run
log=$(mktemp)
if ($1 > "$log" 2>&1 ;); then
if [ -t 1 ]; then
echo "$1: \e[0;32mSuccess\e[0m"
else
echo "$1: Success"
fi
else
if [ -t 1 ]; then
echo "$1: \e[0;31mFail\e[0m"
else
echo "$1: Fail"
fi
cat "$log"
TEST_EXIT=1
fi
rm "$log"
cleanup
}
assert_results_yaml_contains() {
grep -q "actual: $1" $4
assert "[ $? = 0 ]"
grep -q "expected: $2" $4
assert "[ $? = 0 ]"
if [ $3 != "" ]; then
grep -q $3 $4
fi
assert "[ $? = 0 ]"
}
tracie_succeeds_if_all_images_match() {
run_tracie
assert "[ $? = 0 ]"
assert_results_yaml_contains 5efda83854befe0155ff8517a58d5b51 5efda83854befe0155ff8517a58d5b51 "" "$PWD/results/results.yml"
}
tracie_fails_on_image_mismatch() {
sed -i 's/5efda83854befe0155ff8517a58d5b51/8e0a801367e1714463475a824dab363b/g' \
"$TEST_DIR/tests/traces.yml"
run_tracie
assert "[ $? != 0 ]"
assert_results_yaml_contains 5efda83854befe0155ff8517a58d5b51 8e0a801367e1714463475a824dab363b "trace2/test/vk-test-device/olive.testtrace-0.png" "$PWD/results/results.yml"
}
tracie_skips_traces_without_checksum() {
echo " - path: trace1/red.testtrace" >> "$TEST_DIR/tests/traces.yml"
echo " expectations:" >> "$TEST_DIR/tests/traces.yml"
echo " - device: bla" >> "$TEST_DIR/tests/traces.yml"
echo " checksum: 000000000000000" >> "$TEST_DIR/tests/traces.yml"
# red.testtrace should be skipped, since it doesn't
# have any checksums for our device
echo "ff0000ff" > traces-db/trace1/red.testtrace
run_tracie
assert "[ $? = 0 ]"
}
tracie_fails_on_dump_image_error() {
# "invalid" should fail to parse as rgba and
# cause an error
echo "invalid" > traces-db/trace1/magenta.testtrace
run_tracie
assert "[ $? != 0 ]"
}
tracie_stores_only_logs_on_checksum_match() {
run_tracie
assert "[ $? = 0 ]"
assert "[ -f "$TEST_DIR/results/trace1/test/gl-test-device/magenta.testtrace.log" ]"
assert "[ -f "$TEST_DIR/results/trace2/test/vk-test-device/olive.testtrace.log" ]"
assert "[ ! -f "$TEST_DIR/results/trace1/test/gl-test-device/magenta.testtrace-0.png" ]"
assert "[ ! -f "$TEST_DIR/results/trace2/test/vk-test-device/olive.testtrace-0.png" ]"
ls -lR "$TEST_DIR"
}
tracie_stores_images_on_checksum_mismatch() {
sed -i 's/5efda83854befe0155ff8517a58d5b51/8e0a801367e1714463475a824dab363b/g' \
"$TEST_DIR/tests/traces.yml"
run_tracie
assert "[ $? != 0 ]"
assert "[ ! -f "$TEST_DIR/results/trace1/test/gl-test-device/magenta.testtrace-0.png" ]"
assert "[ -f "$TEST_DIR/results/trace2/test/vk-test-device/olive.testtrace-0.png" ]"
}
tracie_stores_images_on_request() {
(export TRACIE_STORE_IMAGES=1; run_tracie)
assert "[ $? = 0 ]"
assert "[ -f "$TEST_DIR/results/trace1/test/gl-test-device/magenta.testtrace-0.png" ]"
assert "[ -f "$TEST_DIR/results/trace2/test/vk-test-device/olive.testtrace-0.png" ]"
ls -lR "$TEST_DIR"
}
run_test tracie_succeeds_if_all_images_match
run_test tracie_fails_on_image_mismatch
run_test tracie_skips_traces_without_checksum
run_test tracie_fails_on_dump_image_error
run_test tracie_stores_only_logs_on_checksum_match
run_test tracie_stores_images_on_checksum_mismatch
run_test tracie_stores_images_on_request
exit $TEST_EXIT

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traces:
- path: trace1/magenta.testtrace
expectations:
- device: gl-test-device
checksum: 8e0a801367e1714463475a824dab363b
- path: trace2/olive.testtrace
expectations:
- device: vk-test-device
checksum: 5efda83854befe0155ff8517a58d5b51

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# Copyright (c) 2019 Collabora Ltd
# Copyright © 2019-2020 Valve Corporation.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
#
# SPDX-License-Identifier: MIT
import os
from pathlib import Path
from enum import Enum, auto
class TraceType(Enum):
UNKNOWN = auto()
APITRACE = auto()
APITRACE_DXGI = auto()
RENDERDOC = auto()
GFXRECONSTRUCT = auto()
TESTTRACE = auto()
_trace_type_info_map = {
TraceType.APITRACE : ("apitrace", ".trace"),
TraceType.APITRACE_DXGI : ("apitrace-dxgi", ".trace-dxgi"),
TraceType.RENDERDOC : ("renderdoc", ".rdc"),
TraceType.GFXRECONSTRUCT : ("gfxreconstruct", ".gfxr"),
TraceType.TESTTRACE : ("testtrace", ".testtrace")
}
def all_trace_type_names():
s = []
for t,(name, ext) in _trace_type_info_map.items():
if t != TraceType.UNKNOWN:
s.append(name)
return s
def trace_type_from_name(tt_name):
for t,(name, ext) in _trace_type_info_map.items():
if tt_name == name:
return t
return TraceType.UNKNOWN
def trace_type_from_filename(trace_file):
for t,(name, ext) in _trace_type_info_map.items():
if trace_file.endswith(ext):
return t
return TraceType.UNKNOWN

175
.gitlab-ci/tracie/tracie.py Normal file
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import argparse
import enum
import glob
import hashlib
import os
import requests
import sys
import tempfile
import time
import yaml
import shutil
from pathlib import Path
from PIL import Image
from urllib import parse
import dump_trace_images
TRACES_DB_PATH = os.getcwd() + "/traces-db/"
RESULTS_PATH = os.getcwd() + "/results/"
def replay(trace_path, device_name):
success = dump_trace_images.dump_from_trace(trace_path, [], device_name)
if not success:
print("[check_image] Trace %s couldn't be replayed. See above logs for more information." % (str(trace_path)))
return None, None, None
else:
base_path = trace_path.parent
file_name = trace_path.name
files = glob.glob(str(base_path / "test" / device_name / (file_name + "-*" + ".png")))
assert(files)
image_file = files[0]
files = glob.glob(str(base_path / "test" / device_name / (file_name + ".log")))
assert(files)
log_file = files[0]
return hashlib.md5(Image.open(image_file).tobytes()).hexdigest(), image_file, log_file
def gitlab_download_metadata(project_url, repo_commit, trace_path):
url = parse.urlparse(project_url)
url_path = url.path
if url_path.startswith("/"):
url_path = url_path[1:]
gitlab_api_url = url.scheme + "://" + url.netloc + "/api/v4/projects/" + parse.quote_plus(url_path)
r = requests.get(gitlab_api_url + "/repository/files/%s/raw?ref=%s" % (parse.quote_plus(trace_path), repo_commit))
metadata_raw = r.text.strip().split('\n')
metadata = dict(line.split(' ', 1) for line in metadata_raw[1:])
oid = metadata["oid"][7:] if metadata["oid"].startswith('sha256:') else metadata["oid"]
size = int(metadata['size'])
return oid, size
def gitlfs_download_trace(repo_url, repo_commit, trace_path, oid, size):
headers = {
"Accept": "application/vnd.git-lfs+json",
"Content-Type": "application/vnd.git-lfs+json"
}
json = {
"operation": "download",
"transfers": [ "basic" ],
"ref": { "name": "refs/heads/%s" % repo_commit },
"objects": [
{
"oid": oid,
"size": size
}
]
}
r = requests.post(repo_url + "/info/lfs/objects/batch", headers=headers, json=json)
url = r.json()["objects"][0]["actions"]["download"]["href"]
open(TRACES_DB_PATH + trace_path, "wb").write(requests.get(url).content)
def checksum(filename, hash_factory=hashlib.sha256, chunk_num_blocks=128):
h = hash_factory()
with open(filename,'rb') as f:
for chunk in iter(lambda: f.read(chunk_num_blocks*h.block_size), b''):
h.update(chunk)
return h.hexdigest()
def gitlab_ensure_trace(project_url, repo_commit, trace):
trace_path = TRACES_DB_PATH + trace['path']
if project_url is None:
assert(repo_commit is None)
assert(os.path.exists(trace_path))
return
os.makedirs(os.path.dirname(trace_path), exist_ok=True)
if os.path.exists(trace_path):
local_oid = checksum(trace_path)
remote_oid, size = gitlab_download_metadata(project_url, repo_commit, trace['path'])
if not os.path.exists(trace_path) or local_oid != remote_oid:
print("[check_image] Downloading trace %s" % (trace['path']), end=" ", flush=True)
download_time = time.time()
gitlfs_download_trace(project_url + ".git", repo_commit, trace['path'], remote_oid, size)
print("took %ds." % (time.time() - download_time), flush=True)
def gitlab_check_trace(project_url, repo_commit, device_name, trace, expectation):
gitlab_ensure_trace(project_url, repo_commit, trace)
result = {}
result[trace['path']] = {}
trace_path = Path(TRACES_DB_PATH + trace['path'])
checksum, image_file, log_file = replay(trace_path, device_name)
if checksum is None:
return False
elif checksum == expectation['checksum']:
print("[check_image] Images match for %s" % (trace['path']))
ok = True
else:
print("[check_image] Images differ for %s (expected: %s, actual: %s)" %
(trace['path'], expectation['checksum'], checksum))
print("[check_image] For more information see "
"https://gitlab.freedesktop.org/mesa/mesa/blob/master/.gitlab-ci/tracie/README.md")
ok = False
trace_dir = os.path.split(trace['path'])[0]
dir_in_results = os.path.join(trace_dir, "test", device_name)
results_path = os.path.join(RESULTS_PATH, dir_in_results)
os.makedirs(results_path, exist_ok=True)
shutil.move(log_file, os.path.join(results_path, os.path.split(log_file)[1]))
if not ok or os.environ.get('TRACIE_STORE_IMAGES', '0') == '1':
image_name = os.path.split(image_file)[1]
shutil.move(image_file, os.path.join(results_path, image_name))
result[trace['path']]['image'] = os.path.join(dir_in_results, image_name)
result[trace['path']]['expected'] = expectation['checksum']
result[trace['path']]['actual'] = checksum
return ok, result
def main():
parser = argparse.ArgumentParser()
parser.add_argument('--file', required=True,
help='the name of the traces.yml file listing traces and their checksums for each device')
parser.add_argument('--device-name', required=True,
help="the name of the graphics device used to replay traces")
args = parser.parse_args()
with open(args.file, 'r') as f:
y = yaml.safe_load(f)
if "traces-db" in y:
project_url = y["traces-db"]["gitlab-project-url"]
commit_id = y["traces-db"]["commit"]
else:
project_url = None
commit_id = None
traces = y['traces']
all_ok = True
results = {}
for trace in traces:
for expectation in trace['expectations']:
if expectation['device'] == args.device_name:
ok, result = gitlab_check_trace(project_url, commit_id, args.device_name, trace, expectation)
all_ok = all_ok and ok
results.update(result)
with open(os.path.join(RESULTS_PATH, 'results.yml'), 'w') as f:
yaml.safe_dump(results, f, default_flow_style=False)
sys.exit(0 if all_ok else 1)
if __name__ == "__main__":
main()

View File

@@ -0,0 +1,10 @@
# escape=`
FROM mcr.microsoft.com/windows:1809
# Make sure any failure in PowerShell scripts is fatal
SHELL ["powershell", "-ExecutionPolicy", "RemoteSigned", "-Command", "$ErrorActionPreference = 'Stop';"]
ENV ErrorActionPreference='Stop'
COPY mesa_deps.ps1 C:\
RUN C:\mesa_deps.ps1

View File

@@ -0,0 +1,32 @@
# Native Windows GitLab CI builds
Unlike Linux, Windows cannot reuse the freedesktop ci-templates as they exist
as we do not have Podman, Skopeo, or even Docker-in-Docker builds available
under Windows.
We still reuse the same model: build a base container with the core operating
system and infrequently-changed build dependencies, then execute Mesa builds
only inside that base container. This is open-coded in PowerShell scripts.
## Base container build
The base container build job executes the `mesa_container.ps1` script which
reproduces the ci-templates behaviour. It looks for the registry image in
the user's namespace, and exits if found. If not found, it tries to copy
the same image tag from the upstream Mesa repository. If that is not found,
the image is rebuilt inside the user's namespace.
The rebuild executes `docker build` which calls `mesa_deps.ps1` inside the
container to fetch and install all build dependencies. This includes Visual
Studio Community Edition (downloaded from Microsoft, under the license which
allows use by open-source projects), other build tools from Chocolatey, and
finally Meson and Python dependencies from PyPI.
This job is executed inside a Windows shell environment directly inside the
host, without Docker.
## Mesa build
The Mesa build runs inside the base container, executing `mesa_build.ps1`.
This simply compiles Mesa using Meson and Ninja, executing the build and
unit tests. Currently, no build artifacts are captured.

View File

@@ -0,0 +1,19 @@
# force the CA cert cache to be rebuilt, in case Meson tries to access anything
Write-Host "Refreshing Windows TLS CA cache"
(New-Object System.Net.WebClient).DownloadString("https://github.com") >$null
Get-Date
Write-Host "Compiling Mesa"
$builddir = New-Item -ItemType Directory -Name "build"
Push-Location $builddir.FullName
cmd.exe /C "C:\BuildTools\Common7\Tools\VsDevCmd.bat -host_arch=amd64 -arch=amd64 && meson -Dgallium-drivers=swrast -Dbuild-tests=true .. && ninja test"
$buildstatus = $?
Pop-Location
Remove-Item -Recurse -Path $builddir
Get-Date
if (!$buildstatus) {
Write-Host "Mesa build or test failed"
Exit 1
}

View File

@@ -0,0 +1,56 @@
# Implements the equivalent of ci-templates container-ifnot-exists, using
# Docker directly as we don't have buildah/podman/skopeo available under
# Windows, nor can we execute Docker-in-Docker
$registry_uri = $args[0]
$registry_username = $args[1]
$registry_password = $args[2]
$registry_user_image = $args[3]
$registry_central_image = $args[4]
Set-Location -Path ".\.gitlab-ci\windows"
docker login -u "$registry_username" -p "$registry_password" "$registry_uri"
if (!$?) {
Write-Host "docker login failed to $registry_uri"
Exit 1
}
# if the image already exists, don't rebuild it
docker pull "$registry_user_image"
if ($?) {
Write-Host "User image $registry_user_image already exists; not rebuilding"
docker logout "$registry_uri"
Exit 0
}
# if the image already exists upstream, copy it
docker pull "$registry_central_image"
if ($?) {
Write-Host "Copying central image $registry_central_image to user image $registry_user_image"
docker tag "$registry_central_image" "$registry_user_image"
docker push "$registry_user_image"
$pushstatus = $?
docker logout "$registry_uri"
if (!$pushstatus) {
Write-Host "Pushing image to $registry_user_image failed"
Exit 1
}
Exit 0
}
Write-Host "No image found at $registry_user_image or $registry_central_image; rebuilding"
docker build --no-cache -t "$registry_user_image" .
if (!$?) {
Write-Host "Container build failed"
docker logout "$registry_uri"
Exit 1
}
Get-Date
docker push "$registry_user_image"
$pushstatus = $?
docker logout "$registry_uri"
if (!$pushstatus) {
Write-Host "Pushing image to $registry_user_image failed"
Exit 1
}

View File

@@ -0,0 +1,58 @@
Get-Date
Write-Host "Installing Chocolatey"
Invoke-Expression ((New-Object System.Net.WebClient).DownloadString('https://chocolatey.org/install.ps1'))
Import-Module "$env:ProgramData\chocolatey\helpers\chocolateyProfile.psm1"
Update-SessionEnvironment
Write-Host "Installing Chocolatey packages"
# Chocolatey tries to download winflexbison from SourceForge, which is not super reliable, and has no retry
# loop of its own - so we give it a helping hand here
For ($i = 0; $i -lt 5; $i++) {
choco install -y python3 --params="/InstallDir:C:\python3"
$python_install = $?
choco install --allow-empty-checksums -y cmake git git-lfs ninja pkgconfiglite winflexbison
$other_install = $?
$choco_installed = $other_install -and $python_install
if ($choco_installed) {
Break
}
}
if (!$choco_installed) {
Write-Host "Couldn't install dependencies from Chocolatey"
Exit 1
}
# Add Chocolatey's native install path
Update-SessionEnvironment
# Python adds itself to the system environment path, which doesn't get refreshed until we start a new shell
$env:PATH = "C:\python3;C:\python3\scripts;$env:PATH"
Start-Process -NoNewWindow -Wait git -ArgumentList 'config --global core.autocrlf false'
Get-Date
Write-Host "Installing Meson and Mako"
pip3 install meson mako
if (!$?) {
Write-Host "Failed to install dependencies from pip"
Exit 1
}
# we want more secure TLS 1.2 for most things, but it breaks SourceForge
# downloads so must be done after Chocolatey use
[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12;
# VS16.x is 2019
$msvc_2019_url = 'https://aka.ms/vs/16/release/vs_buildtools.exe'
Get-Date
Write-Host "Downloading Visual Studio 2019 build tools"
Invoke-WebRequest -Uri $msvc_2019_url -OutFile C:\vs_buildtools.exe
Get-Date
Write-Host "Installing Visual Studio 2019"
Start-Process -NoNewWindow -Wait C:\vs_buildtools.exe -ArgumentList '--wait --quiet --norestart --nocache --installPath C:\BuildTools --add Microsoft.VisualStudio.Workload.VCTools --add Microsoft.VisualStudio.Workload.NativeDesktop --add Microsoft.VisualStudio.Component.VC.ATL --add Microsoft.VisualStudio.Component.VC.ATLMFC --add Microsoft.VisualStudio.Component.VC.Tools.x86.x64 --add Microsoft.VisualStudio.Component.Graphics.Tools --add Microsoft.VisualStudio.Component.Windows10SDK.18362 --includeRecommended'
Remove-Item C:\vs_buildtools.exe -Force
Get-Date
Write-Host "Complete"

View File

@@ -0,0 +1,54 @@
### Before submitting your bug report:
- Check if a new version of Mesa is available which might have fixed the problem.
- If you can, check if the latest development version (git master) works better.
- Check if your bug has already been reported here.
- For any logs, backtraces, etc - use [code blocks](https://docs.gitlab.com/ee/user/markdown.html#code-spans-and-blocks)
- As examples of good bug reports you may review one of these - #2598, #2615, #2608
Otherwise, please fill the requested information below.
And please remove anything that doesn't apply to keep things readable :)
### System information
Please post `inxi -GSC -xx` output OR fill information below manually
- OS: (`cat /etc/os-release | grep "NAME"`)
- GPU: (`lspci | grep VGA` or `lshw -C display`)
- Kernel version: (run `uname -a`)
- Mesa version: (`glxinfo -B | grep "OpenGL version string"`)
- Xserver version (if applicable): (`sudo X -version`)
- Desktop manager and compositor:
#### If applicable
- DXVK version:
- Wine/Proton version:
### Describe the issue
Please describe what you are doing, what you expect and what you're
seeing instead.
"It doesn't work" usually is not a helpful description of an issue.
The more detail about how things are going wrong, the better.
### Regression
Did it used to work? It can greatly help to know when the issue started.
### Log files as attachment
- Output of `dmesg`
- Backtrace
- Gpu hang details
### Screenshots/video files (if applicable)
### Any extra information would be greatly appreciated

166
.mailmap
View File

@@ -6,9 +6,12 @@ Adam Jackson <ajax@redhat.com> <ajax@freedesktop.org>
Adrian Marius Negreanu <adrian.m.negreanu@intel.com> Adrian Negreanu <adrian.m.negreanu@intel.com>
Adrian Marius Negreanu <adrian.m.negreanu@intel.com> Negreanu Marius Adrian <adrian.m.negreanu@intel.com>
Alan Swanson <reiver@improbability.net> <swanson@ukfsn.org>
Dave Airlie <airlied@redhat.com> <airliedfreedesktop.org>
Dave Airlie <airlied@redhat.com> airlied <airlied@unused-12-215.bne.redhat.com>
Dave Airlie <airlied@redhat.com> <airlied@dhcp-1-203.bne.redhat.com>
Dave Airlie <airlied@redhat.com> <airlied@dhcp-40-204.bne.redhat.com>
Dave Airlie <airlied@redhat.com> <airlied@gmail.com>
Dave Airlie <airlied@redhat.com> <airlied@itt42.(none)>
Dave Airlie <airlied@redhat.com> <airlied@linux.ie>
@@ -38,6 +41,8 @@ Alex Deucher <alexdeucher@gmail.com> <alex@botch2.(none)>
Alex Deucher <alexdeucher@gmail.com> <alex@cube.(none)>
Alex Deucher <alexdeucher@gmail.com> <alex@samba.(none)>
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> <alyssa@rosenzweig.io>
Andreas Fänger <a.faenger@e-sign.com> <a.faenger@e-sign.com>
Andreas Hartmetz <ahartmetz@gmail.com> <andreas.hartmetz@kdab.com>
@@ -50,8 +55,14 @@ Andreas Pokorny <andreas.pokorny@canonical.com> <andreas.pokorny@elektrobit.com>
Andrew Randrianasulu <randrianasulu@gmail.com> <randrik_a@yahoo.com>
Andrew Randrianasulu <randrianasulu@gmail.com> <randrik@mail.ru>
Andrii Simiklit <andrii.simiklit@globallogic.com> <asimiklit.work@gmail.com>
Anuj Phogat <anuj.phogat@gmail.com> <anuj.phogat@intel.com>
Arthur Huillet <arthur.huillet@free.fr> Arthur HUILLET <arthur.huillet@free.fr>
Axel Davy <axel.davy@ens.fr> <davyaxel0@gmail.com>
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> <basni@chromium.org>
Benjamin Franzke <benjaminfranzke@googlemail.com> ben <benjaminfranzke@googlemail.com>
@@ -68,6 +79,8 @@ Ben Widawsky <benjamin.widawsky@intel.com> Ben Widawsky <ben@bwidawsk.net>
Blair Sadewitz <blair.sadewitz@gmail.com> Blair Sadewitz <blair.sadewitz.gmail.com>
Boris Brezillon <boris.brezillon@collabora.com> <boris.brezillon@free-electrons.com>
Boris Peterbarg <reist@users.sourceforge.net> reist <reist>
Brian Paul <brianp@vmware.com> Brian <brian.paul@tungstengraphics.com>
@@ -86,23 +99,36 @@ Brian Paul <brianp@vmware.com> root <root@i915.localnet.net>
Brian Paul <brianp@vmware.com> root <root@nostromo.localnet.net>
Brian Paul <brianp@vmware.com> root <root@i965.localnet.net>
Bruce Cherniak <bruce.cherniak@intel.com>
Bruce Merry <bmerry@users.sourceforge.net> <bmerry@gmail.com>
Carl-Philip Hänsch <cphaensch@googlemail.com> Carl-Philip Haensch <s3734770@mail.zih.tu-dresden.de>
Carl-Philip Hänsch <cphaensch@googlemail.com> Carl-Philip Haensch <carli@carli-laptop.(none)>
Carl-Philip Hänsch <cphaensch@googlemail.com> Carl-Philip Haensch <Carl-Philip.Haensch@mailbox.tu-dresden.de>
Carl-Philip Hänsch <cphaensch@googlemail.com>
Carl-Philip Hänsch <cphaensch@googlemail.com> <s3734770@mail.zih.tu-dresden.de>
Carl-Philip Hänsch <cphaensch@googlemail.com> <carli@carli-laptop.(none)>
Carl-Philip Hänsch <cphaensch@googlemail.com> <Carl-Philip.Haensch@mailbox.tu-dresden.de>
Chad Versace <chadversary@chromium.org> <chad@kiwitree.net>
Chad Versace <chadversary@chromium.org> <chad@chad-versace.us>
Chad Versace <chadversary@chromium.org> <Chad Versace chad@chad-versace.us>
Chad Versace <chadversary@chromium.org> <chad.versace@intel.com>
Chad Versace <chadversary@chromium.org> <chad.versace@linux.intel.com>
Chad Versace <chadversary@chromium.org> <chadversary@google.com>
Chandu Babu Namburu <chandu@amd.com>
Chandu Babu Namburu <chandu@amd.com> <mailto:chandu@amd.com>
Chenglei Ren <chenglei.ren@intel.com>
Chia-I Wu <olvaffe@gmail.com> <olv@lunarg.com>
Chia-I Wu <olvaffe@gmail.com> Chia-Wu <olvaffe@gmail.com>
Chih-Wei Huang <cwhuang@linux.org.tw> Chih-Wei Huang <cwhuang@android-x86.org>
Christian Gmeiner <christian.gmeiner@gmail.com> <christian.GMEINER@bachmann.info>
Christian Inci <chris.bugsfd@broke-the-inter.net> <chris.pcguy.inci@gmail.com>
Christian König <christian.koenig@amd.com> Christian Koenig <christian.koenig@amd.com>
Christian König <christian.koenig@amd.com> Christian König <christian.koenig at amd.com>
Christian König <christian.koenig@amd.com> Christian König <deathsimple@vodafone.de>
@@ -112,23 +138,37 @@ Christoph Brill <egore911@egore911.de> <egore@gmx.de>
Christoph Bumiller <christoph.bumiller@speed.at> <e0425955@student.tuwien.ac.at>
Christoph Haag <haagch@frickel.club> <christoph.haag@collabora.com>
Christoph Haag <haagch@frickel.club> <haagch+mesa@frickel.club>
Christoph Haag <haagch@frickel.club> <haagch+mesadev@frickel.club>
Christopher James Halse Rogers <christopher.halse.rogers@canonical.com> Christopher James Halse Rogers <raof@ubuntu.com>
Claudio Ciccani <klan@directfb.org> <klan@users.sf.net>
Claudio Ciccani <klan@directfb.org> <klan@users.sourceforge.net>
Colin McDonald <cjmmail10-bz@yahoo.co.uk> <cjmcdonald@qinetiq.com>
Connor Abbott <cwabbott0@gmail.com> <connor.w.abbott@intel.com>
Connor Abbott <cwabbott0@gmail.com> <connor.abbott@intel.com>
Constantine Kharlamov <Hi-Angel@yandex.ru>
Corbin Simpson <MostAwesomeDude@gmail.com> <mostawesomed...@gmail.com>
Corbin Simpson <MostAwesomeDude@gmail.com> <mostawesomedude@gmail.com>
Courtney Goeltzenleuchter <courtney@lunarg.com> <courtney@LunarG.com>
Craig Stout <cstout@google.com>
Daniel Schürmann <daniel.schuermann@campus.tu-berlin.de> <daniel@schuermann.dev>
Daniel Skinner <sio@users.sourceforge.net> sio <sio>
Daniel Stone <daniels@collabora.com> <daniel@fooishbar.org>
Danylo Piliaiev <danylo.piliaiev@globallogic.com> <danylo.piliaiev@gmail.com>
David Miller <davem@davemloft.net> David S. Miller <davem@davemloft.net>
David Miller <davem@davemloft.net> Dave Miller <davem@davemloft.net>
David Miller <davem@davemloft.net> davem69 <davem69>
@@ -143,6 +183,10 @@ Dieter Nützel <Dieter@nuetzel-hh.de> Dieter Nützel <dieter@nuetzel-hh.de>
Dmitry Cherkassov <dcherkassov@gmail.com> Dmitry Cherkasov <dcherkassov@gmail.com>
Dylan Baker <dylanx.c.baker@intel.com> <baker.dylan.c@gmail.com>
Dylan Baker <dylanx.c.baker@intel.com> <dylan@pnwbakers.com>
Dylan Noblesmith <nobled@dreamwidth.org>
Dylan Noblesmith <nobled@dreamwidth.org> nobled <nobled2@nobled2-karmic.(none)>
Edward O'Callaghan <funfunctor@folklore1984.net> <eocallaghan@alterapraxis.com>
@@ -157,11 +201,15 @@ Emil Velikov <emil.l.velikov@gmail.com> <emil.veliikov@collabora.com>
Emil Velikov <emil.l.velikov@gmail.com> <emil.velikov@gmail.com>
Emil Velikov <emil.l.velikov@gmail.com> <emmil.velikov@collabora.com>
Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> <emmanuel.peyrot@collabora.com>
Eric Anholt <eric@anholt.net> Eric Anholt <anholt@FreeBSD.org>
Eric Engestrom <eric@engestrom.ch> <eric.engestrom@imgtec.com>
Eric Engestrom <eric@engestrom.ch> <eric.engestrom@intel.com>
Erik Faye-Lund <kusmabite@gmail.com> <erik.faye-lund@collabora.com>
Eugeni Dodonov <eugeni.dodonov@intel.com> <eugeni@mandriva.com>
Fabian Bieler <der.fabe@gmx.net> <fabianbieler@fastmail.fm>
@@ -169,6 +217,8 @@ Fabian Bieler <der.fabe@gmx.net> <&lt;der.fabe@gmx.net&gt>
Feng, Haitao <haitao.feng@intel.com> Haitao Feng <haitao.feng@intel.com>
Francesco Ansanelli <francians@gmail.com>
Frank Binns <frank.binns@imgtec.com> <francisbinns@gmail.com>
Frank Henigman <fjhenigman@google.com> <fjhenigman@chromium.org>
@@ -177,12 +227,22 @@ George Sapountzis <gsapountzis@gmail.com> George Sapountzis <gsap7@yahoo.gr>
Gert Wollny <gert.wollny@collabora.com> <gw.fossdev@gmail.com>
Gurchetan Singh <gurchetansingh@chromium.org>
Gwenole Beauchesne <gwenole.beauchesne@intel.com> <gb.devel@gmail.com>
Haihao Xiang <haihao.xiang@intel.com>
Hamish Marson <hmarson@users.sourceforge.net> hmarson <hmarson>
Hans de Goede <hdegoede@redhat.com> Hans de Goede <j.w..r..degoede@hhs.nl>
Harish Krupo <harish.krupo.kps@intel.com> <harishkrupo@gmail.com>
Heinrich Fink <heinrich.fink@daqri.com>
Henri Verbeet <hverbeet@gmail.com>
Homer Hsing <dongsheng.xing@intel.com> <homer.hsing@gmail.com>
Hui Qi Tay <hqtay@vmware.com> <tayhuiqithq@gmail.com>
@@ -190,6 +250,10 @@ Hui Qi Tay <hqtay@vmware.com> <tayhuiqithq@gmail.com>
Ian Romanick <ian.d.romanick@intel.com> <idr@freedesktop.org>
Ian Romanick <ian.d.romanick@intel.com> <idr@us.ibm.com>
Igor Gnatenko <i.gnatenko.brain@gmail.com> <ignatenko@redhat.com>
Illia Iorin <illia.iorin@globallogic.com> <illia.iorin@gmail.com>
Jakob Bornecrantz <wallbraker@gmail.com> <jakob@vmware.com>
Jakob Bornecrantz <wallbraker@gmail.com> <jakob@aurora.(none)>
Jakob Bornecrantz <wallbraker@gmail.com> <jakob@aurora.walkyrie.se>
@@ -202,15 +266,19 @@ Jakub Bogusz <qboosh@pld-linux.org> <gboosh@pld-linux.org>
James Legg <jlegg@feralinteractive.com> <lankyleggy@gmail.com>
James Zhu <James.Zhu@amd.com>
Jan Beich <jbeich@freebsd.org> <jbeich@FreeBSD.org>
Jan Vesely <jano.vesely@gmail.com> Jan Vesely <jan.vesely@rutgers.edu>
Jason Ekstrand <jason@jlekstrand.net> <jason.ekstrand@intel.com>
Jeremy Huddleston <jeremyhu@apple.com>
Jeremy Huddleston <jeremyhu@apple.com> <jeremyhu@freedesktop.org>
Jeremy Huddleston <jeremyhu@apple.com> <jeremy@tifa.local>
Jeremy Huddleston <jeremyhu@apple.com> <jeremy@vincent.local>
Jeremy Huddleston <jeremyhu@apple.com> <jeremy@yuffie.local>
Jeremy Huddleston <jeremyhu@apple.com> Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Jeremy Kolb <jkolb@freedesktop.org> <jkolb@brandeis.edu>
@@ -256,6 +324,7 @@ Juan Zhao <juan.j.zhao@intel.com> <juan.j.zhao@linux.intel.com>
Julien Cristau <jcristau@debian.org> <julien.cristau@logilab.fr>
Julien Isorce <j.isorce@samsung.com> <julien.isorce@gmail.com>
Julien Isorce <j.isorce@samsung.com> <jisorce@oblong.com>
Kalyan Kondapally <kalyan.kondapally@intel.com> <kondapallykalyancontribute@gmail.com>
@@ -265,6 +334,10 @@ Karl Schultz <karl.w.schultz@gmail.com> <k.w.schultz@comcast.net>
Karl Schultz <karl.w.schultz@gmail.com> <Karl.W.Schultz@gmail.com>
Karl Schultz <karl.w.schultz@gmail.com> <kschultz@freedesktop.org>
Karol Herbst <kherbst@redhat.com> <git@karolherbst.de>
Karol Herbst <kherbst@redhat.com> <karolherbst@gmail.com>
Karol Herbst <kherbst@redhat.com> <nouveau@karolherbst.de>
Keith Harrison <sio2@users.sourceforge.net> sio2 <sio2>
Keith Packard <keithp@keithp.com> <keithp@koto.keithp.com>
@@ -273,6 +346,8 @@ Keith Packard <keithp@keithp.com> <keithp@neko.keithp.com>
Keith Whitwell <keithw@vmware.com> <keith@tungstengraphics.com>
Keith Whitwell <keithw@vmware.com> keithw <keithw@keithw-laptop.(none)>
Kevin Rogovin <kevin.rogovin@intel.com> <kevin.rogovin@gmail.com>
Kristian Høgsberg <krh@bitplanet.net> <krh@redhat.com>
Kristian Høgsberg <krh@bitplanet.net> <krh@hinata.boston.redhat.com>
Kristian Høgsberg <krh@bitplanet.net> <krh@sasori.boston.redhat.com>
@@ -281,11 +356,18 @@ Kristian Høgsberg <krh@bitplanet.net> <kristian.h.kristensen@intel.com>
Kristian Høgsberg <krh@bitplanet.net> <hoegsberg@chromium.org>
Kristian Høgsberg <krh@bitplanet.net> <hoegsberg@google.com>
Kristian Høgsberg <krh@bitplanet.net> <hoegsberg@gmail.com>
Kristian Høgsberg <krh@bitplanet.net> <krh@sweater.jf.intel.com>
Kristian Høgsberg <krh@bitplanet.net> <krh@bitplanet.net>
Kristian Høgsberg <krh@bitplanet.net> <krh@owl.jf.intel.com>
Krzesimir Nowak <qdlacz@gmail.com> <krzesimir@kinvolk.io>
Li Peng <peng.li@intel.com> <peng.li@linux.intel.com>
Lionel Landwerlin <lionel.g.landwerlin@intel.com> <llandwerlin@gmail.com>
Liviu Prodea <liviuprodea@yahoo.com>
Lucas Stach <dev@lynxeye.de> <l.stach@pengutronix.de>
Maarten Lankhorst <maarten.lankhorst@ubuntu.com> <dev@mblankhorst.nl>
@@ -294,7 +376,8 @@ Maarten Lankhorst <maarten.lankhorst@ubuntu.com> <maarten.lankhorst@canonical.co
Maciej Cencora <m.cencora@gmail.com> <maciej@osiris.(none)>
Marc-André Lureau <marcandre.lureau@gmail.com> Marc-Andre Lureau <marcandre.lureau@gmail.com>
Marc-André Lureau <marcandre.lureau@gmail.com> <marcandre.lureau@gmail.com>
Marc-André Lureau <marcandre.lureau@gmail.com> <marcandre.lureau@redhat.com>
Marc Dietrich <marvin24@gmx.de> Marc <marvin24@gmx.de>
Marc Dietrich <marvin24@gmx.de> marvin24 <marvin24@gmx.de>
@@ -320,6 +403,8 @@ Mathias Fröhlich <mathias.froehlich@gmx.net> <Mathias.Froehlich@gmx.net>
Mathias Fröhlich <mathias.froehlich@gmx.net> <Mathias.Froehlich@web.de>
Mathias Fröhlich <mathias.froehlich@gmx.net> M.Froehlich@science-computing.de <M.Froehlich@science-computing.de>
Matthias Groß <grmat@sub.red>
Matthew W. S. Bell <matthew@bells23.org.uk> Matthew Bell <matthew@bells23.org.uk>
Maxence Le Doré <maxence.ledore@gmail.com> Maxence Le Dore <maxence.ledore@gmail.com>
@@ -348,17 +433,24 @@ Mike Kaplinskiy <mike.kaplinskiy@gmail.com> <mike.kaplinskiy@gmai.com>
Mike Stroyan <mike@lunarg.com> <mike@LunarG.com>
Neha Bhende <bhenden@vmware.com> <nbhende@vmware.com>
Neil Roberts <nroberts@igalia.com> <neil@linux.intel.com>
Nian Wu <nian.wu@intel.com>
Nian Wu <nian.wu@intel.com> <nian@graphics.(none)>
Nian Wu <nian.wu@intel.com> <nian@tinderbox.sh.intel.com>
Nicholas Bishop <nbishop@neverware.com> <nicholasbishop@gmail.com>
Nick Bowler <nbowler@draconx.ca>
Nick Sarnie <commendsarnex@gmail.com>
Nicolai Hähnle <nicolai.haehnle@amd.com>
Nicolai Hähnle <nicolai.haehnle@amd.com> <nhaehnle@gmail.com>
Nicolai Hähnle <nicolai.haehnle@amd.com> Nicolai Haehnle <nhaehnle@gmail.com>
Nicolai Hähnle <nicolai.haehnle@amd.com> Nicolai Haehnle <prefect_@gmx.net>
Nicolai Hähnle <nicolai.haehnle@amd.com> Nicolai Haehnle <prefect@upb.de>
Nicolai Hähnle <nicolai.haehnle@amd.com> <prefect_@gmx.net>
Nicolai Hähnle <nicolai.haehnle@amd.com> <prefect@upb.de>
Nigel Stewart <nigels@users.sourceforge.net> <nigels@sourceforge.net>
Nigel Stewart <nigels@users.sourceforge.net> <nstewart@nvidia.com>
@@ -386,14 +478,25 @@ Pekka Paalanen <pekka.paalanen@collabora.co.uk> <pq@iki.fi>
Peter Hutterer <peter.hutterer@who-t.net> <peter@cs.unisa.edu.au>
Pierre-Eric Pelloux-Prayer <pelloux@gmail.com> pepp <pelloux@gmail.com>
Philipp Zabel <p.zabel@pengutronix.de> <philipp.zabel@gmail.com>
Pierre-Eric Pelloux-Prayer <pelloux@gmail.com> <pelloux@gmail.com>
Pierre-Eric Pelloux-Prayer <pelloux@gmail.com> <pierre-eric.pelloux-prayer@amd.com>
Pierre Willenbrock <pierre@pirsoft.de> Pierre Willenbrok <pierre@pirsoft.de>
Plamena Manolova <plamena.manolova@intel.com> <plamena.n.manolova@gmail.com>
Qiang Yu <yuq825@gmail.com> <Qiang.Yu@amd.com>
Quentin Glidic <sardemff7+git@sardemff7.net> <sardemff7@sardemff7.net>
Randy Xu <randy.xu@intel.com>
RALOVICH, Kristóf <tade60@freemail.hu> <kristof.ralovich@gmail.com>
Renato Caldas <seventhguardian@gmail.com>
Richard Li <richardradeon@gmail.com> <RichardZ.Li@amd.com>
# The next ones are not 100% sure
Richard Li <richardradeon@gmail.com> richard <richard@richard-desktop3.(none)>
@@ -404,6 +507,7 @@ Richard Sandiford <rsandifo@linux.vnet.ibm.com> <r.sandiford@uk.ibm.com>
Rob Clark <robclark@freedesktop.org> <Rob Clark robdclark@freedesktop.org>
Rob Clark <robclark@freedesktop.org> <robdclark@gmail.com>
Rob Clark <robclark@freedesktop.org> <robdclark@chromium.org>
Robert Bragg <robert@sixbynine.org> <robert@linux.intel.com>
@@ -412,6 +516,8 @@ Robert Ellison <papillo@vmware.com> <papillo@tungstengraphics.com>
Robert Hooker <sarvatt@ubuntu.com> <robert.hooker@canonical.com>
Rodrigo Vivi <rodrigo.vivi@intel.com> <rodrigo.vivi@gmail.com>
Roland Scheidegger <sroland@vmware.com> <rscheidegger@gmx.ch>
Roland Scheidegger <sroland@vmware.com> <sroland@tungstengraphics.com>
@@ -425,18 +531,30 @@ Sam Hocevar <sam@hocevar.net> Sam Hocevar <sam@zoy.org>
Samuel Iglesias Gonsálvez <siglesias@igalia.com> Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Samuel Li <samuel.li@amd.com> <Samuel.Li@amd.com>
Sean D'Epagnier <sean@depagnier.com> <geckosenator@freedesktop.org>
Serge Martin <edb+mesa@sigluy.net> Serge Martin (EdB) <edb+mesa@sigluy.net>
Serge Martin <edb+mesa@sigluy.net> EdB <edb+mesa@sigluy.net>
Sergii Romantsov <sergii.romantsov@globallogic.com> <sergii.romantsov@gmail.com>
Sinclair Yeh <syeh@vmware.com> <sinclair.yeh@intel.com>
Sonny Jiang <sonny.jiang@amd.com>
Stefan Brüns <stefan.bruens@rwth-aachen.de> <Stefan.Bruens@rwth-aachen.de>
Steinar H. Gunderson <sgunderson@bigfoot.com> <sesse@google.com>
Steinar H. Gunderson <sgunderson@bigfoot.com> <steinar+mesa@gunderson.no>
Stéphane Marchesin <marcheu@chromium.org> Stephane Marchesin <marchesin@icps.u-strasbg.fr>
Stéphane Marchesin <marcheu@chromium.org> Stephane Marchesin <stephane.marchesin@gmail.com>
Suresh Guttula <suresh.guttula@amd.com>
Suresh Guttula <suresh.guttula@amd.com> <Suresh.Guttula@amd.com>
Sven M. Hallberg <pesco@users.sourceforge.net> pesco <pesco>
Tapani Pälli <tapani.palli@intel.com> <tapani.palli@gmail.com>
@@ -444,6 +562,7 @@ Tapani Pälli <tapani.palli@intel.com> Tapani <tapani.palli@intel.com>
Thierry Reding <treding@nvidia.com> <thierry@gilfi.de>
Thierry Reding <treding@nvidia.com> <thierry.reding@avionic-design.de>
Thierry Reding <treding@nvidia.com> <thierry.reding@gmail.com>
Thierry Vignaud <thierry.vignaud@gmail.com> <tvignaud@mandriva.com>
@@ -459,21 +578,38 @@ Thomas Tanner <tanner@gmx.net> tanner <tanner>
Tilman Sauerbeck <tilman@code-monkey.de> <tilman@freedesktop.org>
Tim Wiederhake <twied@gmx.net>
Timothy Arceri <timothy.arceri@collabora.com> <t_arceri@yahoo.com.au>
Timothy Arceri <timothy.arceri@collabora.com> Timothy <t_arceri@yahoo.com.au>
Timo Aaltonen <tjaalton@debian.org> <tjaalton@cc.hut.fi>
Timothy Arceri <tarceri@itsqueeze.com> <tarceri@localhost.localdomain>
Timothy Arceri <tarceri@itsqueeze.com> <timothy.arceri@collabora.com>
Tom Fogal <tfogal@alumni.unh.edu> <tfogal@sci.utah.edu>
Tom Stellard <thomas.stellard@amd.com> <tstellar@gmail.com>
Tom Stellard <thomas.stellard@amd.com> Thomas Stellard <tom.stellard@amd.com>
Tom Stellard <thomas.stellard@amd.com> <tstellar@redhat.com>
Tomasz Figa <tfiga@chromium.org> <tomasz.figa@gmail.com>
Tomeu Vizoso <tomeu.vizoso@collabora.com> <tomeu@tomeuvizoso.net>
Topi Pohjolainen <topi.pohjolainen@intel.com> <topi.pohjolainen@gmail.com>
Tormod Volden <debian.tormod@gmail.com> <lists.tormod@gmail.com>
Török Edwin <edwin+mesa@etorok.net> Török Edvin <edwintorok@gmail.com>
Török Edwin <edwin+mesa@etorok.net> <edwintorok@gmail.com>
Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Vadym Shovkoplias <vadym.shovkoplias@globallogic.com> <vadim.shovkoplias@gmail.com>
Varad Gautam <varad.gautam@collabora.com> <varadgautam@gmail.com>
Ville Syrjälä <ville.syrjala@linux.intel.com> Ville Syrjala <syrjala@freedesktop.org>
Ville Syrjälä <ville.syrjala@linux.intel.com> Ville Syrjala <syrjala@sci.fi>
@@ -481,8 +617,20 @@ Vincent Lejeune <vljn@ovi.com> <peluche.canard@gmail.com>
Vinson Lee <vlee@freedesktop.org> <vlee@vmware.com>
Vivek Kasireddy <vivek.kasireddy@intel.com>
Yaakov Selkowitz <yselkowi@redhat.com> <yselkowitz@users.sourceforge.net>
Wladimir J. van der Laan <laanwj@gmail.com>
Xavier Bouchoux <xavierb@gmail.com>
Zhaowei Yuan <zhaowei.yuan@samsung.com>
Zhenyu Wang <zhenyuw@linux.intel.com> Wang Zhenyu <zhenyu.z.wang@intel.com>
Zhongmin Wu <zhongmin.wu@intel.com>
Zack Rusin <zackr@vmware.com> <zack@kde.org>
Zack Rusin <zackr@vmware.com> <zack@pixel.(none)>
Zack Rusin <zackr@vmware.com> <zack@tungstengraphics.com>

File diff suppressed because it is too large Load Diff

View File

@@ -43,6 +43,7 @@ MESA_DRI_LDFLAGS := -Wl,--build-id=sha1
MESA_COMMON_MK := $(MESA_TOP)/Android.common.mk
MESA_PYTHON2 := python
MESA_PYTHON3 := python3
# Lists to convert driver names to boolean variables
# in form of <driver name>.<boolean make variable>

View File

@@ -1 +1 @@
20.0.0-rc2
20.1.0-devel

View File

@@ -53,9 +53,6 @@ environment:
matrix:
- compiler: msvc
buildsystem: scons
- compiler: msvc
buildsystem: meson
path: C:\Python38-x64;C:\Python38-x64\Scripts;%path%
install:
- cmd: .appveyor\appveyor_msvc.bat install

View File

@@ -1,5 +1,5 @@
#!/usr/bin/env python3
# Copyright © 2019 Intel Corporation
# Copyright © 2019-2020 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
@@ -36,7 +36,7 @@ from mako import exceptions
CURRENT_GL_VERSION = '4.6'
CURRENT_VK_VERSION = '1.1'
CURRENT_VK_VERSION = '1.2'
TEMPLATE = Template(textwrap.dedent("""\
<%!
@@ -58,19 +58,19 @@ TEMPLATE = Template(textwrap.dedent("""\
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa ${next_version} Release Notes / ${today}</h1>
<h1>Mesa ${this_version} Release Notes / ${today}</h1>
<p>
%if not bugfix:
Mesa ${next_version} is a new development release. People who are concerned
Mesa ${this_version} is a new development release. People who are concerned
with stability and reliability should stick with a previous release or
wait for Mesa ${version[:-1]}1.
wait for Mesa ${this_version[:-1]}1.
%else:
Mesa ${next_version} is a bug fix release which fixes bugs found since the ${version} release.
Mesa ${this_version} is a bug fix release which fixes bugs found since the ${previous_version} release.
%endif
</p>
<p>
Mesa ${next_version} implements the OpenGL ${gl_version} API, but the version reported by
Mesa ${this_version} implements the OpenGL ${gl_version} API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL ${gl_version}. OpenGL
@@ -78,7 +78,7 @@ TEMPLATE = Template(textwrap.dedent("""\
Compatibility contexts may report a lower version depending on each driver.
</p>
<p>
Mesa ${next_version} implements the Vulkan ${vk_version} API, but the version reported by
Mesa ${this_version} implements the Vulkan ${vk_version} API, but the version reported by
the apiVersion property of the VkPhysicalDeviceProperties struct
depends on the particular driver being used.
</p>
@@ -125,7 +125,7 @@ TEMPLATE = Template(textwrap.dedent("""\
async def gather_commits(version: str) -> str:
p = await asyncio.create_subprocess_exec(
'git', 'log', f'mesa-{version}..', '--grep', r'Closes: \(https\|#\).*',
'git', 'log', '--oneline', f'mesa-{version}..', '--grep', r'Closes: \(https\|#\).*',
stdout=asyncio.subprocess.PIPE)
out, _ = await p.communicate()
assert p.returncode == 0, f"git log didn't work: {version}"
@@ -242,14 +242,14 @@ async def main() -> None:
assert '-devel' not in raw_version, 'Do not run this script on -devel'
version = raw_version.split('-')[0]
previous_version = calculate_previous_version(version, is_point_release)
next_version = calculate_next_version(version, is_point_release)
this_version = calculate_next_version(version, is_point_release)
shortlog, bugs = await asyncio.gather(
get_shortlog(previous_version),
gather_bugs(previous_version),
)
final = pathlib.Path(__file__).parent.parent / 'docs' / 'relnotes' / f'{next_version}.html'
final = pathlib.Path(__file__).parent.parent / 'docs' / 'relnotes' / f'{this_version}.html'
with final.open('wt') as f:
try:
f.write(TEMPLATE.render(
@@ -258,9 +258,9 @@ async def main() -> None:
changes=walk_shortlog(shortlog),
features=get_features(is_point_release),
gl_version=CURRENT_GL_VERSION,
next_version=next_version,
this_version=this_version,
today=datetime.date.today(),
version=previous_version,
previous_version=previous_version,
vk_version=CURRENT_VK_VERSION,
))
except:

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